The present invention relates to an aqueous cleaning composition used to remove unwanted organic and inorganic residues and contaminants from a substrate such as, for example, a semiconductor substrate. The cleaning composition comprises from about 0.01% to about 40% by weight of a salt selected from a guanidinium salt, an acetamidinium salt, a formamidinium salt, and mixtures thereof; water; and optionally a water soluble organic solvent. Compositions according to the present invention are free of an oxidizer and abrasive particles and are capable of removing residues from a substrate and, particularly, a substrate having silicon-containing BARC and/or photoresist residue.

The present invention provides cleaning compositions that can be used for a variety of applications including, for example, removing unwanted resist films, post-etch, BARC and post-ash residue on a semiconductor substrate. In particular, the present invention provides cleaning compositions that comprise a salt selected from a guanidinium salt, an acetamidinium salt, a formamidinium salt, and mixtures thereof as a cleaning agent.
The background of the present invention will be described in connection with its use in cleaning applications involving the manufacture of integrated circuits. It should be understood, however, that the use of the present invention has wider applicability.
In the manufacture of integrated circuits, it is sometimes necessary to etch openings or other geometries in a thin film deposited or grown on the surface of silicon, gallium arsenide, glass, or other substrate located on an in-process integrated circuit wafer. Present methods for etching such a film require that the film be exposed to a chemical etching agent to remove portions of the film. The particular etching agent used to remove the portions of the film depends upon the nature of the film. In the case of an oxide film, for example, the etching agent may be hydrofluoric acid. In the case of a polysilicon film, it will typically be hydrofluoric acid or a mixture of nitric acid and acetic acid.
In order to assure that only desired portions of the film are removed, a photolithography process is used, through which a pattern in a computer drafted photo mask is transferred to the surface of the film. The mask serves to identify the areas of the film which are to be selectively removed. This pattern is formed with a photoresist material, which is a light sensitive material spun onto the in-process integrated circuit wafer in a thin film and exposed to high intensity radiation projected through the photo mask. The exposed or unexposed photoresist material, depending on its composition, is typically dissolved with developers, leaving a pattern which allows etching to take place in the selected areas, while preventing etching in other areas. Positive-type resists, for example, have been extensively used as masking materials to delineate patterns on a substrate that, when etching occurs, will become vias, trenches, contact holes, etc.
The trend towards the miniaturization of semiconductor devices has lead to the use of sophisticated multilevel systems to overcome difficulties associated with such miniaturization such as, for example, those noted below. The use of highly absorbing anti-reflective coatings in photolithography is a simpler approach to diminish the problems that result from back reflection of light from highly reflective substrates. Two deleterious effects of back reflectivity are thin film interference and reflective notching. Thin film interference results in changes in critical linewidth dimensions caused by variations in the total light intensity in the resist film as the thickness of the resist changes. Variations of linewidth are proportional to the swing ratio (S) and therefore must be minimized for better linewidth control. Swing ratio is defined as S=4(RaRb)1/2eαD, where Ra is the reflectivity at the resist/air or resist/top coat interface, Rb is the reflectivity at the resist/substrate interface, α is the resist optical absorption coefficient, and D is the film thickness.
Bottom anti-reflective coatings ("BARC") function by absorbing the radiation used for exposing the photoresist, thus reducing Rb and thereby reducing the swing ratio. Reflective notching becomes severe as the photoresist is patterned over substrates containing topographical features, which scatter light through the photoresist film, leading to linewidth variations, and in the extreme case, forming regions with complete resist loss. Similarly, dyed top anti-reflective coatings reduce the swing ratio by reducing Ra, where the coating has the optimal values for refractive index and absorption characteristics, such as absorbing wavelength and intensity.
Increasingly, a dry etching process such as, for example, plasma etching, reactive ion etching, or ion milling is used to attack the photoresist-unprotected area of the substrate to form the vias, trenches, contact holes, etc. As a result of the plasma etching process, photoresist, etching gas and etched material by-products are deposited as residues around or on the sidewall of the etched openings on the substrate.
Such dry etching processes also typically render the resist mask extremely difficult to remove. For example, in complex semiconductor devices such as advanced DRAMS and logic devices with multiple layers of back end lines of interconnect wiring, reactive ion etching (RIE) is used to produce vias through the interlayer dielectric to provide contact between one level of silicon, silicide or metal wiring to the next level of wiring. These vias typically expose, Al, AlCu, Cu, Ti, TiN, Ta, TaN, silicon or a silicide such as, for example, a silicide of tungsten, titanium or cobalt. The RIE process leaves a residue on the involved substrate comprising a complex mixture that may include, for example, re-sputtered oxide material, polymeric material derived from the etch gas, and organic material from the resist used to delineate the vias.
Additionally, following the termination of the etching step, the photoresist (including BARC or other antireflective coating) and etch residues must be removed from the protected area of the wafer so that the final finishing operation can take place. This can be accomplished in a plasma "ashing" step by the use of suitable plasma ashing gases. This typically occurs at high temperatures, for example, above 200° C. Ashing converts most of the organic residues to volatile species, but leaves behind on the substrate a predominantly inorganic residue. Such residue typically remains not only on the surface of the substrate, but also on inside walls of vias that may be present. As a result, ash-treated substrates are often treated with a cleaning composition typically referred to as a "liquid stripping composition" to remove the highly adherent residue from the substrate. Finding a suitable cleaning composition for removal of this residue without adversely affecting, e.g., corroding, dissolving or dulling, the metal circuitry has also proven problematic. Failure to completely remove or neutralize the residue can result in discontinuances in the circuitry wiring and undesirable increases in electrical resistance.
Prior art stripping compositions have included, for example: (a) organic sulfonic acid-based stripping solutions that contain an alkyl benzenesulfonic acid as the main stripping component; and (b) organic amine-based stripping solutions that contain an amine such as monoethanol amine as the main stripping component. Such prior art stripping compositions for removing the etching residue suffer, however, from significant drawbacks. For example, their use tends to erode copper wire exposed on the bottoms of via holes.
Therefore, there is a need in the art for a cleaning composition for back-end cleaning operations including stripping photoresist and plasma ash residues that is capable of selectively removing such residues without etching the underlying and exposed substrate. The underlying and exposed substrate includes, for example, metals, high dielectric constant materials (referred to herein as "high-k"), silicon, silicide and/or interlevel dielectric materials including low dielectric constant materials (referred to herein as "low-k"), such as deposited oxides, HSQ films, MSQ films, Fox films, black diamond films, and tetraethylorthosilicate ("TEOS") films.

Composition for removal of residue comprising cationic salts and methods using same


A three dimensional soft magnetic metal mass suitable for milling is formed wrapping soft magnetic metal ribbon into a three dimensional shape and then applying adhesive to the three dimensional shape. The adhesive permeates the three dimensional shape. The adhesive is then cured. If the soft magnetic metal mass is made as a toroid, then it could be processed into an electro-mechanical component. The electro-mechanical component would then be suitable for use in very high frequency electric motors.

Multi-pole rotating electro-mechanical devices, such as motors, generators, re-gen motors, alternators, brakes and magnetic bearings are comprised of rotors and electro-mechanical components. AC motors rotate by producing a rotating magnetic field pattern in the electro-mechanical component that causes the rotor to follow the rotation of this field pattern. As the frequency varies, the speed of the rotor varies. To increase the speed of the motor, the frequency of the input source must be increased.
High frequency motors manufactured with the proper materials can be very efficient. For certain applications, like electric or hybrid cars, highly efficient electric motors are desirable.
The construction of electro-mechanical components for high frequency electric motors and generators is problematic. Iron or steel components are quite common in electric motors and generators. However, at high frequencies, such as those greater than 400 Hz, conventional iron or steel components are no longer practical. The high frequency of the AC source increases the core losses of the iron or steel components, reducing the overall efficiency of the motor. Additionally, at very high frequencies, the component may become extremely hot, cannot be cooled by any reasonably acceptable means and may cause motor failure.
For construction of electro-mechanical components used in high frequency electric motors, ribbon made from soft magnetic material provides distinct advantages. Examples of soft magnetic ribbon materials would be either 1) conventional material typically defined as 0.008″ and thicker, non grain oriented with a typical Si content of 3%+/−½% or 2) alternate soft materials that are 0.007″ or thinner with Si content of 3% to 7%, amorphous, or nanocrystalline alloys and other grain oriented or non grain oriented alloys. Some soft magnetic ribbon materials exhibit inherent characteristics that make their use in high frequency electro-mechanical rotating devices highly desirable. Some soft magnetic ribbons are easy to magnetize and demagnetize, which means an electro-mechanical component made with these metals would have low power loss, low temperature rise at high frequency, extremely fast magnetization and easy conversion of electrical to mechanical energy. An electro-mechanical component made of such a metal would generate less core losses and be able to operate at much higher frequencies, resulting in motors and generators of exceptional efficiency and power density.
Soft magnetic materials are commercially produced as ribbon or strip. A preferred example of a soft magnetic metal ribbon is Metglas®, which is an amorphous material, manufactured by Honeywell, Inc. Soft magnetic metal ribbons are very thin and of varying width. Manufacturing components of soft magnetic metal ribbon requires winding the soft magnetic ribbon into a shape and then heat processing the shape. Simple three dimensional shapes, such as toroids, can currently be constructed from soft magnetic metal ribbon.
However electro-mechanical components are often not simple three dimensional shapes. The electro-mechanical component can have numerous slots for accommodating motor coils in a generally toroidal structure.
Attempts to create complex three dimensional configurations from soft magnetic metal ribbon have heretofore been commercially unsuccessful. Various manufacturing techniques have been attempted by industry such as but not limited to: wire electrical discharge machining, electrochemical creep grinding, conventional electrical discharge machining, cutting, stamping, acid etching and fine blanking. None have proven satisfactory for reasons such as cost-effectiveness, manufacturing repeatability, or process cycle time.
This inability to fabricate complex three dimensional shapes from soft magnetic ribbon has been the significant impediment to producing high efficiency axial flux motors and generators. A method to produce electro-mechanical components from soft magnetic ribbon in a cost effective, end use functional, high volume capable method that will also provide substantial design flexibility for end use requirements is highly desirable.

This patent is subject to a terminal disclaimer.

Soft magnetic amorphous electromechanical component and method making the same


A medical device consists of a dual lumen catheter with three intra-connecting balloons comprising a balloon stent. The adjustable tissue approximation using negative pressure exerted between device and mucosa of stomach/esophagus/colon with improved injury site isolation via adjustable balloon stent and added potential of negative pressure application to injury site for active healing process and distal feeding potential.

Numerous serious medical issues arise within the proximal and/or distal aspect of the Gastrointestinal or GI tract. Many of these conditions are related to wall perforation allowing intra luminal content exposure to the abdominal cavity with morbid consequences. Treatment often is difficult and with undesirable outcomes. In the event of post-operative complication of the proximal stomach in the case of a sleeve gastrectomy a staple line dehiscence represents the most feared complication due to the futility of the few available treatment options. Currently the intraluminal expandable metallic covered stents are considered the treatment of choice with a high associated cost and significant complication rate including migration, stomach perforation and inability of removal requiring total gastrectomy.
Staple line dehiscence or leakage can create a state of sepsis which is technically challenging and potential harmful to patients.
Current self-expanding stents have high rates of distal mobility, may cause bleeding, reflux, non-isolation and prolong time to resolution. Also, there may be a high cost associated with the use of a non FDA approved application.
Currently, a non-FDA approved esophageal self-expanding esophageal stent is being used with moderate resolution rates. While this conventional device provides some improvement over prior approaches, it is desirable to provide for improved isolation, distal feeding and negative pressure application which may aid in hastening resolution, recover and potential for prevention. Conventional devices and approaches do not address these desired improvements.
Improvements to these conventional approaches to treatment of conditions within the GI tract are desirable.


Possible deficiencies of a communication link are detected and automatically counteracted, at least to some degree. The deficiencies addressed can include phase shift and attenuation compensation. The counter-action can include adjustment of pre-emphasis given a signal applied to the communication link and/or adjustment of equalization given a signal received from the communication link.

This invention relates to communication between devices in a system, and more particularly to methods and apparatus for automatically adjusting transmission and/or reception of signals to compensate for deficiencies in the communication link being used.
Circuitry via which it is desired to send a signal may have various deficiencies that adversely affect transmission of the signal. For example, the communication link may somewhat attenuate (weaken) the signal and/or the communication link may introduce a phase shift into the signal. The magnitudes of these various deficiencies (e.g., attenuation and/or phase shift) may depend on the frequency(ies) of the signal being transmitted. These deficiencies can make it more difficult or even impossible to reliably receive a signal that has been transmitted, especially at certain frequencies or in certain frequency ranges.
Pre-emphasis and equalization are known techniques for attempting to compensate for deficiencies in a communication link. Pre-emphasis is used at the transmitter and involves giving the signal transmitted some extra energy for a certain amount of time after each change in level of the signal. Equalization is used at the receiver and involves initially responding more strongly to each change in level of the received signal. Each communication link is, however, potentially different. Also, some components (e.g., programmable logic devices or PLDs) are manufactured to be general-purpose devices to at least some degree, so that it may not be known by the manufacturer what use will be made of those devices (e.g., what communication links and frequencies they will be used with). It can accordingly be difficult or impossible to build into communication devices the appropriate amount of pre-emphasis and/or equalization.

Adaptive communication methods and apparatus


A semiconductor device of the present invention includes a semiconductor layer made of a wide bandgap semiconductor and a Schottky electrode being in contact with a surface of the semiconductor layer. The semiconductor layer includes a drift layer that forms the surface of the semiconductor layer and a high-resistance layer that is formed on a surface layer portion of the drift layer and that has higher resistance than the drift layer. The high-resistance layer is formed by implanting impurity ions from the surface of the semiconductor layer and then undergoing annealing treatment at less than 1500° C.

Attention has been heretofore paid to a semiconductor device (semiconductor power device) for use in systems, such as a motor control system or a power conversion system, chiefly in the field of various power electronics.
For example, Patent Literature 1 (PTL 1) discloses a Schottky barrier diode in which SiC is employed. The Schottky barrier diode of Patent Literature 1 includes an n type 4H—SiC bulk substrate in which a (000-1) plane is defined as a principal plane, an n type epitaxial layer that has grown into a principal plane of the bulk substrate, an oxide film that is formed on a surface ((000-1) plane) of the epitaxial layer and by which the surface of the epitaxial layer is partially exposed, and a Schottky electrode that is formed inside an opening of the oxide film and that makes a Schottky junction with the epitaxial layer.

Wide band-gap semiconductor device including schotky electrode and method for producing same


A mechanism is provided in a data processing system to implement a cognitive natural language processing (NLP) system with descriptor uniqueness identification to support named entity mention clustering. The mechanism annotates a set of documents from a corpus of documents for entity types and mentions, collects descriptor usages from all documents in the corpus of documents, analyzes the descriptor usages to classify the descriptors as base terms or modifier terms, generates compatibility scores for the descriptors, and performs entity merging of entity clusters based on the compatibility scores.

The present application relates generally to an improved data processing apparatus and method and more specifically to mechanisms for identifying uniqueness of description phrases in order to support entity clustering.
Natural language processing (NLP) is a subfield of linguistics, computer science, information engineering, and artificial intelligence concerned with the interactions between computers and human (natural) languages, in particular how to program computers to process and analyze large amounts of natural language data. Challenges in natural language processing frequently involve speech recognition, natural language understanding, and natural language generation.
Named-entity recognition (NER) (also known as entity identification, entity chunking, and entity extraction) is a subtask of information extraction that seeks to locate and classify named entities mentioned in unstructured text into pre-defined categories such as person names, organizations, locations, medical codes, time expressions, quantities, monetary values, percentages, etc. Most research on NER systems has been structured as taking an unannotated block of text and producing an annotated block of text that highlights the names of entities.
An NLP system may encounter two or more entities that actually relate to the same person or thing. Entity clustering can merge these entities into one. Merging means that one entity (the "merge" entity) inherits the links from other entities transferred to it, and then those other entities are deleted. Only entities of the same type can be merged.

Descriptor uniqueness for entity clustering

International Business Machines Corporation


A method and system for checking the validity of a sequence of input characters according to the syntactical rules of a selected language is provided. If an input character may not begin a valid sequence of characters, or if the input character may not be appended to a previously input sequence of characters according to the rules of the selected language, the newly input character may be prohibited from being displayed singularly or appended to the previous sequence and displayed on the user's computer. Previously input character sequences may be edited by determining the sequence validity context of previously input sequences of characters.

In recent years, use of computers has increased dramatically worldwide. Users of computers utilize computer programs for a variety of purposes including word processing, database management, desktop publishing, and the like. Computer users are accustomed to using "checking" program modules (e.g., spell checkers and grammar checkers) that alert the user to words or sequences of characters found in the document that are questionable based on some predefined set of rules.
The written form of some languages includes sequences of complex characters and/or symbols. For example, South Asian languages like Thai, Vietnamese, and Hindi use combinations of various characters (also called simple characters herein) such as vowels, consonants, diacritics, tone marks, and accents to form complex characters. Those languages follow stringent syntactical rules that dictate which simple character is allowed next to or above or below another simple character in the composition of more complex characters used in the formation of words. In this context, a word can be composed of (a) one or more simple characters (e.g., consonant); (b) one or more complex characters (e.g., a complex character being formed by more than one simple character like a consonant and a tone mark); and (c) a combination of simple and complex characters. That is, the correct position of these simple characters in a complex character is necessary both syntactically and orthographically based on syntactical rules for each language. For example, in the Thai language, a leading Thai vowel must be followed by a consonant or a trailing vowel (also called following vowels) to form a valid Thai character. If other than a consonant or trailing vowel is input after the input of a leading vowel, then the sequence of the leading vowel and the subsequent non-consonant or non-trailing vowel character is an incorrect sequence and does not form a correct Thai language complex character or word. Similar character sequence and syntactical rules apply for other languages mentioned above, such as Vietnamese and Hindi. A problem arises for the person typing one of those languages because if the sequence of characters that should form a complex character is invalid, the complex character will not be rendered on the screen correctly, and therefore, the complex character will be meaningless.
Techniques to verify the validity of a sequence of input characters have been implemented, but those techniques are mainly oriented towards getting a proper display of the complex character and do not address the issue of enforcing a correct input sequence of characters according to the syntactical rules defined by the selected language. In some prior art systems, the validity of the sequence of characters is determined by comparing the typed sequence with a known valid displayable sequence (i.e., a sequence of characters that are valid in accordance with the rules of a selected language). Some prior art techniques allow the display of sequences of characters that are orthographically incorrect or simply display a symbol, such as a black box, whenever the sequence was not displayable due to errors in the sequence of input characters. Also, prior art sequence checking techniques do not allow for determining accurately the sequence context of a previously input sequence of characters once the user moves the cursor to a new location in the text.
Accordingly, there is a need in the art for an efficient method and system for checking the validity of a sequence of input characters according to the syntactical rules of a selected language. There is further a need for a method and system for determining the sequence validity context of a sequence of previously typed simple characters.

Method and system for character sequence checking according to a selected language


Time information which is to be transmitted via a data packet network is called up from a time information source and is transmitted to a data packet transmission module. The data packet transmission module controls the transmission time of a data packet in which the time information is transmitted via the data packet network. The transmission time and the calling of the time information are aligned with respect to one another in time by a transmission signal which is generated by the time information source or by the data packet transmission module and indicates the transmission time.

Real-time communications devices and data processing devices are increasingly being networked by data packet networks, such as local area networks (LAN), ATM networks (ATM: Asynchronous Transfer Mode), the Internet or other data networks based on the Internet Protocol (IP). Many communications or data processing applications require the current time or some other accurate time reference. Real time clocks (RTC) or crystal-controlled timers are provided for this purpose in most communications or data processing devices.
In a networked system, the real time clocks of the networked communications and data processing devices must be synchronized in order to provide a standard time reference throughout the network. The respectively required synchronization accuracy in this case depends essentially on the nature of the applications which are distributed via the network. While pure data processing applications generally result in synchronization requirements which are not very stringent, high synchronization accuracy is generally required for real-time communications applications. A high level of clock synchronicity is required in particular for connection-oriented communications technologies which are actually synchronous and which at present are being increasingly ported onto asynchronous data packet networks.
Synchronization of a number of real-time clocks or timers in a network requires that the time information be transmitted as accurately as possible between the network devices to be synchronized.
In the past, the so-called NTP protocol (Network Time Profile) has frequently being used for synchronization of network devices in data packet networks. The NTP protocol is described, for example, in the document "Request For Comments 1305: Network Time Protocol (Version 3), Specification, Implementation and Analysis", by David L. Mills dated March 1992. Within the NTP protocol, time information originating from a time information source is transmitted within data packets via the data packet network. The synchronization error resulting from transmission delays can be reduced by repeatedly transmitting time information at predetermined time intervals and, possibly, in different directions. However, the synchronization accuracy of the NTP protocol is restricted by the delay time fluctuations, which are unavoidable in networks based on the Internet Protocol, and fluctuations in the packet processing times in network devices, such as routers or switching nodes. Fluctuations such as these are typically in the range from 1 to 100 milliseconds. Thus, in a good situation, a synchronization accuracy of only about 1 millisecond can be achieved by the NTP protocol. However, this accuracy is inadequate for many real-time network applications.

Method for transmitting time information via a data packet network


An Sn alloy plating apparatus is disclosed which can relatively easily perform control of an Sn alloy plating solution, including control of the Sn ion concentration and the acid concentration of the plating solution. The Sn alloy plating apparatus includes: a plating bath configured to hold therein an Sn alloy plating solution in which an insoluble anode a the substrate are to be disposed opposite each other; a plating-solution circulation line configured to circulate the Sn alloy plating solution in the plating bath; an Sn supply reservoir configured to draw a part of the Sn alloy plating solution from the plating-solution circulation line, perform electrolysis in a presence of the Sn alloy plating solution to replenish the Sn alloy plating solution with Sn ions and an acid that stabilizes Sn ions, and return the Sn alloy plating solution that has been replenished with the Sn ions to the plating bath; and a dialysis unit configured to draw a part of the Sn alloy plating solution from the plating-solution circulation line, remove the acid from the Sn alloy plating solution, and then return the Sn alloy plating solution to the plating bath.

As is known in the art, a film of an alloy of Sn (tin) and a metal which is nobler than Sn (e.g., an Sn—Ag alloy which is an alloy of Sn and silver), formed by electroplating on a substrate surface, is used for lead-free solder bumps. Sn—Ag alloy plating is typically carried out by applying a voltage between an anode and a substrate surface, which are disposed opposite to each other and immersed in an Sn—Ag alloy plating solution containing Sn ions and Ag ions, thereby forming a metal film of Sn—Ag alloy on the substrate surface. Other than the Sn—Ag alloy, an Sn—Cu alloy which is an alloy of Sn and Cu (copper), an Sn—Bi alloy which is an alloy of Sn and Bi (bismuth), or the like can be used as an alloy of Sn and a metal which is nobler than Sn.
Japanese Patent No. 4441725 discloses an Sn alloy plating method using a soluble anode made of Sn (i.e., Sn anode). The Sn anode is disposed in an anode chamber, which is separated from a cathode chamber by an anion exchange membrane. An Sn plating solution and an acid or a salt thereof are held in the anode chamber, while an Sn alloy plating solution is held in the cathode chamber. Sn ions in the anode chamber are supplied through a (liquid) replenishment line to the Sn alloy plating solution in a plating bath.
Japanese Patent No. 3368860 discloses an Sn alloy plating method in which plating of a workpiece, disposed in a plating bath, is performed using an Sn anode that is isolated in the plating bath by means of an anode bag or box formed of a cation exchange membrane.
Japanese laid-open patent publication No. 2003-105581 discloses an Sn alloy plating method using an insoluble anode made of e.g., titanium. In this plating method, Sn is dissolved from an Sn anode in a dissolution bath that is different from a plating bath (or an electrolytic bath), and the dissolved Sn is supplied to an Sn alloy plating solution.
Japanese laid-open patent publication No. H11-21692 discloses an Sn—Ag alloy plating method which involves the steps of providing an auxiliary bath, having a cathode chamber and an anode chamber separated by a diaphragm or partition so that a substance that would cause deterioration will not diffuse into the cathode chamber, and supplying Sn ions to a plating solution (or an anolyte) held in the anode chamber in the auxiliary bath.
The Sn—Ag alloy plating is generally performed with use of an Sn—Ag alloy plating solution containing a salt of an acid capable of forming a water-soluble salt with Sn ion (Sn2+), e.g., tin methanesulfonate, and a salt of an acid capable of forming a water-soluble salt with Ag ion (Ag+), e.g., silver methanesulfonate.
When Sn alloy plating is carried out with use of a soluble anode (Sn anode), Sn ions dissolve from the Sn anode into an Sn alloy plating solution, and therefore an Sn ion concentration of the Sn alloy plating solution increases. Because of this, it is generally difficult to keep the Sn alloy plating solution at a predetermined Sn ion concentration.
When Sn—Ag alloy plating is carried out with use of an insoluble anode made of e.g., titanium, metal ions (Sn ions and Ag ions) and a free acid, e.g., methanesulfonic acid, are separated from each other with the progress of Sn—Ag alloy plating. The metal ions are consumed by plating, and therefore an acid concentration of the Sn—Ag alloy plating solution gradually increases. In order to compensate for the consumption of the metal ions, it is desirable to replenish the Sn—Ag alloy plating solution with metal ions (preferably metal ions dissolved from a metal) and to adjust the acid concentration of the Sn—Ag alloy plating solution within a preferable range so that good appearance of the resulting metal film and a uniformity of a film thickness can be maintained.
Sn ions are consumed in Sn alloy plating. In the plating method disclosed in the above-mentioned patent publication 3, Sn ions that have been dissolved from the Sn anode are supplied to the Sn alloy plating solution. However, no consideration is given to the concentration of an acid, such as methanesulfonic acid, contained in the Sn alloy plating solution. It therefore appears that, while the Sn alloy plating solution can be kept at a constant Sn concentration, the acid concentration of the Sn alloy plating solution may fall outside a preferable range, resulting in poor appearance of the resulting metal film and non-uniformity of a film thickness.

Sn alloy plating apparatus and Sn alloy plating method


A detection system for a vehicle pulled by cable circulating between two stations. The system includes a beacon placed on the vehicle and a receiving antenna placed in each of the stations, and the vehicle includes at least one retractable element on the top of the vehicle and wherein the beacon emits only when the retractable element remains protruding from the vehicle. When the beacon emits, the receiving antenna situated in the station is informed of a risk of collision of an element of the vehicle with the station, thus being able to communicate the information to the control/command system of the cable. When the beacon is not emitting, the receiving antenna is idle and the vehicle can enter into the station.

Cable transport installations, in particular cable cars, require a certain servicing which is performed using service vehicles. These service vehicles often have top platforms and guard rails which protrude from the station access area. In particular when they are being used to service levers, they are higher than the station ceiling. There is therefore a risk of collision with the ceiling of the station resulting in damage to the latter and to the vehicle, not to mention the danger to workers in the vehicle or in the station.

System for detecting service vehicles approaching stations


A metering hopper which utilizes an oscillating friction pad to engage and initiate the feeding of successive, bulky newspaper sections or the like from the bottom of a stack may be converted into a machine using a vacuum separating feeder for thin, single-sheet articles by disabling the rocker pad assembly and bolting in place a tray module having an essentially self-contained oscillating vacuum sucker head assembly. When the tray is installed, the self-contained oscillating mechanism for the sucker head assembly makes operable engagement with pre-existing drive means on the machine so as to carry out the necessary rocking action of the sucker heads in timed relationship with other functions of the machine. Connecting the sucker assembly to vacuum control mechanism and a source of vacuum pressure completes the conversion. Separation of the lowermost article from the next higher article is carried out by causing the sucker heads to adhere themselves to the bottom surface of a leading marginal edge of the lowermost article, bend such marginal edge downwardly away from the rest of the stack, and present the edge to awaiting, high speed delivery nip rollers which take control of the article and finish its withdrawal from the bottom of the stack.

My prior U.S. Pat. Nos. 3,608,891 and 3,734,488 disclose and claim a machine known as a "rocker hopper" which is especially well suited for feeding bulky newspaper sections at a predetermined, metered rate of delivery as part of an overall system for assembling and collating various sections of a big city newspaper. The rocker hopper disclosed in such patents utilizes an oscillating gripper pad that underlies the bottom-most article in the hopper and oscillates through both a reverse stroke and a subsequent forward stroke during each cycle of operation. As the rocker swings rearwardly, it engages the bottom surface of the lowermost article and thus pulls a leading marginal edge of the article off of a forwardly located shelf which supports the front margin of the stack. This has the effect of separating the leading edge of the lowermost edge of the article from the rest of the stack.
Then, as the rocker swings forwardly, the separated leading edge of the lowermost article is presented to a pair of nip rollers that grab the article and quickly pull it completely out of the stack, feeding it to the main collating line or other part of the system.
While the oscillating rocker pad performs extremely well for bulky, multiple page newspaper sections, it is not well-suited for dispensing thin, single-sheet articles such as advertising fliers and the like. When folded newspaper sections are dispensed, they are arranged in the hopper with their "hard" folded edge leading and with the two halves of the section superimposed upon one another. Thus, as the rocker sweeps rearwardly in engagement with the bottom half of the newspaper section and pulls it rearwardly off the front shelf, the upper half of the newspaper necessarily moves along with it due to the interconnection presented by the folded edge. However, when thin, single-sheet articles are involved, it is difficult for the rocker pad to overcome the significant frictional drag between the lowermost article and the next higher article. Consequently, there is a tendency to feed "doubles" or "triples", instead of only one sheet at a time.

Convertible metering hopper for thin single sheet and bulky multiple sheet articles


A method of customizing a boot, for example a skate boot, includes generating a tridimensional digital representation of a wearer's foot using numerical data obtained by scanning the wearer's foot. A boot with a foot size corresponding generally to a foot length of the wearer's foot is selected. A core is also selected. The core, a medial side insert and a lateral side insert are inserted into an internal space of the boot such that the medial side insert and the lateral side insert straddle the core. The medial side insert and the lateral side insert are manufactured based on the tridimensional shape of the foot. At least a portion of the boot is then heated such that the boot is thermoformed to follow surfaces of the medial and lateral side inserts. The core, the medial side insert and the lateral side insert are then removed from the boot.

Footwear such as shoes or boots that are used for sports or other activities typically fall within general size ranges based on the foot size of a wearer. To further enhance comfort, fit and/or performance, the sizing of such footwear may be customized based on the specific measurements of an individual wearer's foot.
While known boot customization methods may allow for the customization of a shoe or boot according to the shape of the wearer's foot, there remains a need in the industry for a method of customizing a boot that further reduces both the manufacturing cost and complexity of the components or method, simplifies the design of the components used in the method and/or provides a better way to customize the fit of the boot by thermoforming the boot according to the wearer's foot in a wearing condition.


A method for forming retroreflective sheeting comprising a binder layer having a first surface with protrusions thereon and a plurality of retroreflective elements partially embedded in the surface, wherein the method comprises forming the binder layer in a first profile, embedding the retroreflective elements therein, and then activating that binder layer such that it is restored to the first profile via shape memory.

A variety of retroreflective sheetings comprising microspheres have been used for traffic signs, road signs, pavement markings, conspicuity tapes, etc. Illustrative examples include those disclosed in U.S. Pat. No. 3,005,382 (Weber) and Japan-A-57-27748.
These sheetings typically comprise a polymeric binder layer and a plurality of microspheres, typically arranged in a monolayer, partially embedded in and protruding from the binder layer. The microspheres typically have a reflective layer thereon, e.g., aluminum, silver, or dielectric coating, or in other embodiments, the binder layer contains reflective particles, e.g., pigment particles such as titanium dioxide, metal flake, nacreous flakes, etc., which function in optical association with the microspheres to provide retroreflective effect.
These sheetings typically provide the most effective retroreflective performance at incidence angles that are substantially perpendicular to the plane of the monolayer of microspheres.
In many applications, such as traffic signs, a sign and the sheeting thereon are oriented substantially perpendicularly to prevalent the direction of approach and effective retroreflective effect is attained.
To improve retroreflective performance at high incidence angles, e.g., such as is encountered with sheetings used on the sides of vehicles, on the sides of tunnels, guard rails, road surfaces, etc., it has been known to form protrusions in the sheeting such that at least some of the microspheres are oriented so as to be presented more perpendicularly to the observer. This configuration has been used extensively in pavement marking tapes where effective retroreflection at very high incidence angles is desired. See, for example, U.S. Pat. No. 5,316,406 (Wyckoff).
Several approaches to achieving a support layer with protrusions bearing retroreflective elements are known.
In some embodiments, a foaming composition is applied to a desired spot on a flat substrate and a liquid composition, e.g., a paint, containing binder resins and reflective pigments is coated over the substrate surface. Microspheres are scattered on the surface of the liquid composition, becoming partially embedded therein. The composition is cured to secure the microspheres thereto and the foaming composition activated, e.g., with heat, to raise portions of the binder layer thereby forming protrusions with microspheres thereon. Examples of this approach are disclosed in Japanese Publication Nos. A-55-65524 and A-57-193352.
In some embodiments, a substrate made of thermoplastic resins is embossed to form a surface with protrusions thereon. A paint containing binder resins and reflective pigments is coated on the surface in sufficient thickness to fill the indented portions and yield a flat surface. Microspheres are partially embedded in the surface the binder resins cured to secure them there. The construction is then heated to cause the substrate to return to a flat shape, thereby deforming the binder layer to yield protrusions corresponding to the different in coated thickness of the binder layer. Examples of this approach are disclosed in Japanese Publication Nos. A-53-46363 and A-53-46371.
In some embodiments, a paint which shrinks and forms wrinkles is used. The paint, which contains binder material and reflective pigments, is coated on a substrate, microspheres are partially embedded therein, and the paint then heated to dry it and secure the microspheres therein, and to also cause it to wrinkle, thereby forming protrusions with microspheres thereon. An example of this approach is disclosed in Japanese Publication No. A-57-10102.
Other approaches include forming protrusions and partially embedding microspheres therein as disclosed in U.S. Pat. No. 4,069,281 (Eigenmann) and Japanese Publication No. A-58-237243. GB Patent No. 2,251,091 discloses a retroreflective sheeting comprising microspheres adhered to an aluminum layer and German Patent No. 3,039,037 discloses a vehicle tire with a side face having raised areas to which microspheres are adhered.
Each of these approaches suffers some deficiency. It is frequently difficult to control the depth to which the microspheres are embedded because the microspheres are typically applied to the binder layer before it is cured and/or dried and thus it is still quite soft. It is also difficult to form protrusions of desired shape and size in which the microspheres are uniformly embedded. If the microspheres are not embedded deeply enough, they may tend to be easily dislodged. If the microspheres are too deeply embedded the retroreflective response may be impaired. If the microspheres are not uniformly embedded, the product may not provide a desired uniformity of retroreflective effect. Finally, it is also often difficult in these approaches to form protrusions in the shape of pyramids and prisms which would be advantageous for retroreflection at very high incidence angles.

Retroreflective sheeting and method for forming same

Minnesota Mining and Manufacturing Company


A semiconductor device is composed of a first circuit receiving a first power supply voltage; and a second circuit receiving a second power supply voltage. The second power supply voltage is higher than the first power supply voltage. Such device arrangement is effective for reducing the soft error rate, when the second circuit is more susceptive to a soft error than the first circuit, especially when the second circuit is a memory device.

1. Field of the Invention
The present invention relates to semiconductor devices, particularly to soft error reduction in semiconductor devices.
2. Description of the Related Art
Consumer electronic appliances operating on a battery often require reduction in the power consumption of a microcomputer incorporated therein.
As disclosed in Japanese Laid Open Patent Application No. Jp-A Heisei 5-108193, one approach for reducing power consumption of a microcomputer is to reduce the power supply voltage and/or the clock signal frequency, when high speed operation is not required.
FIG. 1 illustrates a typical structure of a microcomputer which adopts the above-described approach. A microcomputer 100 is provided with a voltage control circuit 10, a peripheral circuit 20, a CPU (Central Processing Unit) 30, a RAM (Random Access Memory) 40, a frequency divider circuit 50 and a register 60. The voltage control circuit 10 receives an external power supply voltage VDD0 from a power supply terminal. The peripheral circuit 20, the CPU 30, the RAM 40, the frequency divider circuit 50 and the register 60 are connected to the voltage control circuit 10. The CPU 30 is connected to the frequency divider circuit 50 and the register 60. The frequency divider circuit 50 is connected to a clock terminal to which an external clock CLK0 is supplied.
The microcomputer 100 in FIG. 1 operates as follows: The voltage control circuit 10 feeds an internal power supply voltage to the peripheral circuit 20, the CPU 30, and the RAM 40. The voltage control circuit 10 controls the voltage level of the internal power supply voltage. The internal power supply voltage may have a voltage level identical to that of the external power supply voltage VDD0, or lower than that of the external power supply voltage VDD0. The frequency divider circuit 50 is designed to control the frequency of an internal clock signal fed to the CPU 30. In a certain operation, the frequency of the internal clock signal may be identical to that of the external clock signal CLK0, while the internal clock signal may be generated by frequency-dividing of the external clock CLK0. The operations of the voltage control circuit 10 and the frequency divider circuit 50 are controlled on a value set to the register 60 by the CPU 30. For example, when the value set to the register 60 is "0", the voltage control circuit 10 controls the internal power supply voltage to the same level as the external power source voltage VDD0, and the frequency divider circuit 50 controls the frequency of the internal clock signal to the same frequency as the external clock signal CLK0. When the value of the register 60 is "1", on the other hand, the voltage control circuit 10 generates the internal power supply voltage through stepping down the external power source voltage VDD0, and the frequency divider circuit 50 generates the internal clock signal through frequency-dividing of the external clock signal CLK0. As a result, the operation voltage is controlled in accordance with the operation frequency, and the power consumption is reduced.
One issue of the microcomputer 100 shown in FIG. 1 is an increased soft error rate caused by the reduction of the operation voltage. The "soft error" is a phenomenon that electric charges are generated within a memory cell by an incoming radiation of a cosmic ray, such as, an alpha ray and a neutron ray, and data stored in the memory cell is undesirably destroyed by the generated electric charges. The soft error rate depends on a RAM capacity and a RAM operation voltage. In accordance with an increase in the capacity of the RAM (or the area of the RAM), the possibility also increases that the RAM suffers from a soft error. The reduction in the RAM operation voltage also increases the possibility in which the RAM suffers from a soft error, because the operation voltage reduction is accompanied by reduction in the charges stored in memory cells.

Semiconductor device for reducing soft error rate with reduced power consumption


A method and apparatus for controlling command line transfer to a network element. The method and apparatus allow for transfer of command lines such as command lines in the Transaction Language 1 syntax, to a designated network element based upon a wait duration as well as based upon the maximum number of outstanding command lines for which acknowledgement has not yet been received from the network element to whom the command line was directed. As long as the maximum number of outstanding unacknowledged command lines is less than the maximum number set, command lines are transferred to the network element after waiting an amount of time equal to the wait duration. The overall result is that command lines can be directed to network elements with assurance that the commands will be properly executed by the network element. Furthermore, the network element can, to the extent that the command line causes a change in an equipment database associated thereto, appropriately modify the equipment database in the network element and cause such information to be transferred to an overall equipment database containing similar information for all network elements under the control of a network management system.

It is important that tools be available for performing network management, such as fault management, configuration management and performance management of telephone company central office equipment. In the past, what is known as operations system (OS) has been used for conducting such functions by use of command line languages; such as Transaction Language 1 (TL1). TL1 is a command line language well-known in the art which allows the operator to initiate the execution of various commands at selected equipment within the central office. These commands can be used to monitor alarm status, to perform recovery from alarm situations, to perform configuration management of equipment, as well as to test the performance of equipment.
As equipment installed at the central office has become more and more complex, the use of a command line language can become cumbersome and difficult for the operator. This is particularly apparent with the introduction of asymmetrical digital subscriber loop (ADSL) related equipment which can provide high bandwidth asymmetrical communications, such as network elements (NEs) known as ADSL subscriber access multiplexers (ASAMs) as disclosed in the present assignee's copending U.S. application Ser. No. 08/891,145, entitled A Telecommunications System for Providing both Narrowband and Broadband Services to Subscribers; Subscriber Equipment; a Shelf Therefor; a Replaceable Lowpass Filter Unit; Line Termination Equipment; Network Termination Equipment; and a Telecommunications Rack with a Plurality of Shelves having a Redundancy Feature, filed on Jul. 10, 1997, hereby incorporated by reference. As a result, a network management system (NMS) has been developed for operation on a workstation. This NMS generates commands using the Simple Network Management Protocol (SNMP) and performs fault management, configuration management and performance management functions for such ASAM equipment. This NMS uses an expert system software platform known as the NM-Expert Platform as described in Alcatel Alsthom document NM-Expert, Alcatel 1303, copyright 1995, Alcatel Bell, Belgium, as well as in Alcatel Alsthom document "The NM-Expert Reasoning Capabilities", copyright 1996, Alcatel Bell, Belgium, said documents incorporated by reference. With the use of NM-Expert, the NMS can perform fault management, configuration management and performance management through an intelligent graphically oriented presentation to the operator.
However, there is a need to be able to provide for command line language interface through the same workstation or through a terminal elsewhere at the central office. In particular, there is a need to be able to execute and display results of the command line language known as Transaction Language 1 (TL1) command line language that is widely used with telephone company central office equipment operations to perform management functions for telephony equipment. For an ASAM network element, there is a local equipment database resident within the network element. The ASAM network element includes line termination cards, alarm craft unit cards, and a network termination card which maintains information with respect to the other cards that form an overall ASAM.
In addition to the local equipment database, there is a similar equipment database associated with the NMS. The NMS equipment database maintains equipment data for all the NEs managed by the NMS. When the network element is maintained by the NMS, both the NMS equipment database and the local database within the ASAM are automatically updated at the time of program execution. However for the TL1 command line interface module, it is desirable at times to use what is known as a batch file for execution of a plurality of TL1 commands by the network termination card within the ASAM. It has been found that due to the number of cards forming an overall ASAM, the command line interface module can cause an overflow of TL1 commands to the network termination card which can result in the loss of information and consequent degradation of network management functions.
Thus it is the intent of the present invention to provide a command line interface module in association with a network management system which provides for reliable execution of the command lines and accurate storage of equipment information at the ASAM local equipment database and at the equipment database associated with the NMS.

Method and apparatus for controlling command line transfer to a network element


A volume rendering processor renders a two-dimensional image from a volume data set of voxels constituting a three-dimensional representation of an object. Voxel memory interface logic retrieves the voxels from a voxel memory in a scanned order with respect to X, Y and Z coordinate axes, the Z axis being the axis most nearly parallel to a predefined viewing direction. The set of voxels having equal Z coordinate values are referred to as a xe2x80x9cslicexe2x80x9d of voxels. Interpolation logic calculates a sequence of samples from the retrieved voxels such that (i) each sample lies along a corresponding imaginary ray extending through the object parallel to the viewing direction, (ii) each sample results from interpolating the eight voxels surrounding the sample in the XYZ coordinate system. xe2x80x9cSupersamplingxe2x80x9d in the Z dimension is performed such that the number of samples calculated for each ray is greater than the number of slices of voxels in the volume data set. Gradient calculation logic calculates for each sample respective gradients in the X, Y and Z directions for use by classification and illumination logic. The X and Y gradients are calculated from the samples emitted by the interpolation logic, and Z gradients are calculated by (i) calculating Z gradients at the voxel positions from voxel values retrieved from memory, and (ii) interpolating the voxel Z gradients to arrive at the Z gradients at the sample positions.

The present invention is related to the field of computer graphics, and in particular to volume graphics.
Volume graphics is the subfield of computer graphics that deals with the visualization of objects or phenomena represented as sampled data in three or more dimensions. These samples are called volume elements, or xe2x80x9cvoxels,xe2x80x9d and contain digital information representing physical characteristics of the objects or phenomena being studied. For example, voxel values for a particular object or system may represent density, type of material, temperature, velocity, or some other property at discrete points in space throughout the interior and in the vicinity of that object or system.
Volume rendering is the part of volume graphics concerned with the projection of volume data as two-dimensional images for purposes of printing, display on computer terminals, and other forms of visualization. By assigning colors and transparency to particular voxel data values, different views of the exterior and interior of an object or system can be displayed. For example, a surgeon needing to examine the ligaments, tendons, and bones of a human knee in preparation for surgery can utilize a tomographic scan of the knee and cause voxel data values corresponding to blood, skin, and muscle to appear to be completely transparent. The resulting image then reveals the condition of the ligaments, tendons, bones, etc. which are hidden from view prior to surgery, thereby allowing for better surgical planning, shorter surgical operations, less surgical exploration and faster recoveries. In another example, a mechanic using a tomographic scan of a turbine blade or welded joint in a jet engine can cause voxel data values representing solid metal to appear to be transparent while causing those representing air to be opaque. This allows the viewing of internal flaws in the metal that would otherwise be hidden from the human eye.
Real-time volume rendering is the projection and display of volume data as a series of images in rapid succession, typically at 30 frames per second or faster. This makes it possible to create the appearance of moving pictures of the object, phenomenon, or system of interest. It also enables a human operator to interactively control the parameters of the projection and to manipulate the image, while providing to the user immediate visual feedback. It will be appreciated that projecting tens of millions or hundreds of millions of voxel values to an image requires enormous amounts of computing power. Doing so in real time requires substantially more computational power.
Further background on volume rendering is included in a Doctoral Dissertation entitled xe2x80x9cArchitectures for Real-Time Volume Renderingxe2x80x9d submitted by Hanspeter Pfister to the Department of Computer Science at the State University of New York at Stony Brook in December 1996, and in U.S. Pat. No. 5,594,842, xe2x80x9cApparatus and Method for Real-time Volume Visualization.xe2x80x9d Additional background on volume rendering is presented in a book entitled xe2x80x9cIntroduction to Volume Renderingxe2x80x9d by Barthold Lichtenbelt, Randy Crane, and Shaz Naqvi, published in 1998 by Prentice Hall PTR of Upper Saddle River, N.J.
The reconstruction of images from sampled data is the domain of a branch of mathematics known as xe2x80x9csampling theoryxe2x80x9d. From the well-known Nyquist sampling theorem, the frequency at which data must be sampled must equal or exceed twice the spatial frequency of the data in order to obtain faithful reconstruction of the information in the data. This constraint is true in multiple dimensions as well as in one dimension.
Volume data sets are typically organized as samples along regular grids in three dimensions, which defines the spatial frequency inherent in the data. In order to project three-dimensional volume data onto a two-dimensional image plane by ray-casting, the data must be re-sampled at a sampling frequency equal to or greater than the Nyquist frequency. If the sampling frequency is not sufficiently high, undesirable visual artifacts caused by aliasing appear in the rendered image, especially moving images such as images being manipulated by a human viewer in real-time. Thus one of the challenges in real-time volume rendering is the efficient re-sampling of volume data in support of high-quality rendering from an arbitrary and changing view direction.
Another aspect of volume rendering is the application of artificial xe2x80x9cilluminationxe2x80x9d or xe2x80x9clightingxe2x80x9d to the rendered image, which is the creation of highlights and shadows that are essential to a realistic two-dimensional representation of a three-dimensional object. Lighting techniques are well-known in the computer graphics art and are described, for example, in the textbook xe2x80x9cComputer Graphics: Principles and Practice,xe2x80x9d 2nd edition, by J. Foley, A. vanDam, S. Feiner, and J. Hughes, published by Addison-Wesley of Reading, Mass., in 1990.
One illumination technique that generates very high quality images is known as xe2x80x9cPhong illuminationxe2x80x9d or xe2x80x9cPhong shadingxe2x80x9d. The Phong illumination algorithm requires knowledge of the orientation of surfaces appearing in the rendered image. Surface orientation is indicated by a vector referred to as a xe2x80x9cnormalxe2x80x9d. In volume rendering, one way to obtain the normal is to estimate gradients for the samples of the volume data. Various techniques can be used to calculate gradients. According to one commonly-used technique, the gradients are estimated by calculating xe2x80x9ccentral differencesxe2x80x9d. That is, the gradient in a given direction at a sample point is equal to the difference between the values of the two sample points surrounding the sample in the indicated direction.
The performance of illumination algorithms in general is very sensitive to the accuracy of the gradient calculation. To obtain the best-quality rendered image, it is important that gradients be calculated very accurately.
In a ray-casting system in which sample planes are normal to the rays, it is fairly straightforward to calculate gradients from samples of the volume data using central differences. There are, however, systems in which sample planes are parallel to the planes of voxels, so that the angle between sample planes and rays is dependent on view angle. One example of such a system is shown in the aforementioned Doctoral Dissertation. In these systems, the calculation of gradients is substantially more difficult, because the weight to be given neighboring samples is dependent on the viewing angle.
One prior technique for calculating gradient values has been to calculate an intermediate value using unity weights, and then to apply a correction factor that is a function of viewing angle. Unfortunately, this technique is both complicated and inaccurate. It would be desirable to improve the performance of illumination algorithms such as Phong illumination by enabling the calculation of accurate gradients in a manner that lends itself to efficient hardware implementation in a volume rendering processor.
In accordance with the present invention, a ray-casting volume rendering processor is disclosed which in which volume data is efficiently re-sampled as an image is rendering from an arbitrary and changing view direction. Accurate gradients are calculated for use in a Phong illumination algorithm, and high rendering throughput is maintained while the appearance of sampling-induced artifacts in the rendered image is minimized.
The disclosed volume rendering processor includes voxel memory interface logic operative to continually retrieve the voxels from a voxel memory in which a volume data set is stored. The voxel memory is scanned in order with respect to a Cartesian coordinate system having mutually perpendicular X, Y and Z coordinate axes, the Z axis being the axis more nearly parallel to a predefined viewing direction than either the X or Y axes. Interpolation logic coupled to the voxel memory interface logic continually receives the retrieved voxels and calculates samples such that (i) each sample lies along a corresponding imaginary ray extending through the object parallel to the viewing direction, (ii) each sample is the result of interpolation among a surrounding set of voxels in the Cartesian coordinate system, and (iii) the spatial frequency of the samples in one or more or the X, Y and Z directions is greater than the spatial frequency of the voxels in the same direction. This xe2x80x9csupersamplingxe2x80x9d greatly reduces the presence of visual artifacts in the rendered image.
In another disclosed technique, X and Y components of gradients are calculated from samples emitted by the interpolation logic, and Z gradients are calculated by (i) calculating Z gradients at the voxel positions from voxel values retrieved from memory, and (ii) interpolating the voxel Z gradients to arrive at the Z gradients at the sample positions. The calculation of Z-gradients from the voxels rather than from samples greatly simplifies the calculation of the Z gradients while attaining greater accuracy over prior approaches.
In yet another disclosed technique, the interpolation logic generates (i) a first set of intermediate interpolation values by interpolating between adjacent voxels in a first dimension, and (ii) a second set of intermediate interpolation values resulting by interpolating between the first intermediate interpolation values in a second dimension, and the samples representing the re-sampling of the retrieved voxels are calculated by interpolating between the second intermediate interpolation values in the third dimension. The intermediate interpolation values are used to calculate multiple adjacent samples, so that high throughput in the interpolation stages is maintained.
Other aspects, features, and advantages of the present invention are disclosed in the detailed description which follows.

Super-sampling and gradient estimation in a ray-casting volume rendering system


A liquid crystal injection method for fabricating a liquid crystal display (LCD) device includes attaching a liquid crystal material to a pattern mask to form a liquid crystal film, and printing the liquid crystal film on a substrate for the LCD device by pressing the pattern mask to the substrate.

1. Field of the Invention
The present invention relates to a liquid crystal display (LCD) device, and more particularly, to a pattern mask, a liquid crystal injection process and a method of fabricating an LCD device using the same.
2. Discussion of the Related Art
In general, an LCD device includes an array substrate where thin film transistors are arranged in a matrix form, a color filter substrate where color filters are formed, and a liquid crystal layer interposed between the array substrate and the color filter substrate.
A liquid crystal (LC) cell is fabricated by aligning the array substrate with the color filter substrate such that a common electrode of the color filter substrate faces a pixel electrode of the array substrate, a liquid crystal material is then injected into a gap between the array substrate and the color filter substrate, an injection hole is sealed, and then polarizers are attached on the outer sides of the two substrates. Light transmittance of the LC cell is controlled by a voltage applied to the pixel and common electrodes, and an image is displayed by a light shutter effect.
The LC cell forming process includes forming alignment layers and an LC cell gap, and cutting cells, while an array substrate forming process and a color filter substrate forming process include repeated processes.
FIG. 1 is a flow chart showing a process of fabricating an LC cell according to the related art. In FIG. 1, a step S1 includes preparation of an array substrate having thin film transistors and pixel electrodes, and a color filter substrate having a color filter layer and a common electrode.
Next, a step S2 includes formation of first and second alignment layers on the pixel electrode and the common electrode, respectively. The formation of the first and second alignment layers includes coating thin polymer films, such as polyimide, on the pixel and common electrodes, and rubbing the thin polymer films in a predetermined direction using a rubbing fabric. The thin polymer films must have a uniform thickness, and the rubbing process must be performed uniformly along the thin polymer films. Accordingly, an initial orientation of liquid crystal molecules is determined by the rubbing process. The liquid crystal molecules are moved by the rubbing to display uniform images.
Then, a step S3 includes formation of a seal pattern on either the array substrate or the color filter substrate, thereby providing a cell gap for accommodating a liquid crystal material between the array substrate and color filter substrate. In addition, the seal pattern prevents the injected liquid crystal material from leaking through the seal pattern. The seal pattern is commonly formed by using a screen-printing method or a dispensing method that includes a mixture of thermosetting resin and glass fiber.
During a step S4, a plurality of spacers are sprayed on one of the array substrate and color filter substrate using a spacer spraying method to maintain a uniform gap between the array substrate and the color filter substrate. The spacer spray method can be divided into two different types, such as a wet spray method that includes spraying a mixture of alcohol and spacer material, and a dry spray method that includes spraying spacer material alone. Here, the seal pattern and the spacers are formed on different substrates. For example, the seal pattern may be formed on the color filter substrate that has a flat surface, and the spacers may be formed on the array substrate.
At a step S5, the array substrate and color filter substrate are aligned and are attached to each other along the seal pattern. An alignment accuracy of the substrates is determined by an alignment margin, wherein the alignment accuracy of several micrometers is required since light leakage occurs if the substrates are misaligned beyond the alignment margin.
At a step S6, the attached substrates are divided into unit cells using a cell cutting process because a plurality of liquid crystal cells are formed on a large substrate. The cell cutting process includes a scribing process that forms scribe lines on a surface of the substrate using a diamond pen or a cutting wheel of tungsten carbide, wherein a hardness of the diamond pen or cutting wheel is higher than a hardness of the substrate, which is formed of glass. Then, a breaking process is performed to divide the unit cells by applying a force.
AT a step S7, a liquid crystal material is injected into each individual unit cells between two substrates using a vacuum injection method, wherein each unit cell has an area of several square centimeters and a cell gap of several micrometers. The vacuum injection process employs a pressure difference between an interior of the unit cell and an exterior of the unit cell.
FIG. 2 is a cross-sectional view schematically illustrating a liquid crystal injection process using a vacuum injection method according to the related art, and FIG. 3 is a flow chart showing the liquid crystal injection process of FIG. 3. As shown in FIG. 2, in order to inject a liquid crystal material 10 into a liquid crystal cell 2, a vacuum chamber 6 where the liquid crystal cell 2 is placed therein and a container 8 is filled with the liquid crystal material 10.
First, at a step S10 of FIG. 3, the liquid crystal cell 2 is disposed in the vacuum chamber 6 where the liquid crystal material 10 is to be injected into the liquid crystal cell 2, and then air in the liquid crystal cell 2 is removed. On the other hand, the container 8 is disposed in a bubble removing room, and then air in the liquid crystal material 10 within the container 8 is removed. At this time, the vacuum chamber 6 has an inner pressure of about 10−6 Torr and the bubble removing room has an inner pressure of about 10−3 Torr.
If fine bubbles in the liquid crystal material 10 are injected into the liquid crystal cell 2, the fine bubbles are combined to form large foams as time passes. Thus, a bubble removing process should be performed. That is, the liquid crystal material 10 is left under a vacuum condition for a long time to remove the fine bubbles in the liquid crystal material 10. The bubble process may be carried out by simultaneously loading the liquid crystal material 10 while the inside of the liquid crystal cell 2 is under vacuum.
A dipping method that the unit liquid crystal cell 2 is soaked in a liquid crystal tray has been widely used, but consumes a large amount of the liquid crystal material 10. For this reason, a touch method that only an injection hole 4 touches the liquid crystal material 10 may be used. Hereinafter, the touch method will be explained.
After the air in the liquid crystal cell 2 and the fine bubbles in the liquid crystal material 10 are sufficiently removed, at a step S20, the container 8 including the liquid crystal material 10 is located in the vacuum chamber 6 as shown in FIG. 2, and the injection hole 4 of the liquid crystal cell 2 is dipped into the container 8. Since there is no difference in pressure between the liquid crystal material 10 and the inside of the liquid crystal cell 2, the liquid crystal material 10 is injected into the inside of the liquid crystal cell 2 due to the capillary phenomenon at the initial stage of the liquid crystal injection.
After that, at a step S30, a slow vent process that a nitrogen gas (N2) is injected into the vacuum chamber 6 is performed to maintain the inside of the vacuum chamber 6 under the atmospheric pressure. Then, the liquid crystal material 10 is injected into the inside of the liquid crystal cell 2 due to the difference in pressure between the liquid crystal material 10 and the inside of the liquid crystal cell 2.
At a step S40, when the inside of the liquid crystal cell 2 is perfectly filled with the liquid crystal material 10, the liquid crystal cell 2 is left under the atmospheric pressure for about 2 hours.
Accordingly, the liquid crystal material 10 is injected in the liquid crystal cell 2 through the above-described processes. Injection time of the liquid crystal material 10 depends on a size of the liquid crystal cell 2. A 10.4 inch liquid crystal cell requires about 6 hours 50 minutes, a 12.1 inch liquid crystal cell requires about 8 hours, and a 14.1 inch liquid crystal cell requires about 10 hours. After the vacuum injection process is completed, the injection hole 4 is sealed to prevent leakage of the liquid crystal material 10 out of the liquid crystal cell 2. In general, an ultraviolet (UV) curable resin is injected into the injection hole using a dispenser, and ultraviolet light is irradiated onto the resin to harden the resin and seal the injection hole 4.
However, the vacuum injection process is time-consuming and wastes a large amount of the liquid crystal material. In addition, problems in the liquid crystal cell may be caused because it is difficult to control an amount of the injected liquid crystal material during the injection process. Moreover, an accompanying apparatus such as the vacuum chamber should be fully equipped.

Pattern mask, liquid crystal injection process, and method of fabricating LCD device using the same


Systems and techniques to preserve state information in a client-server environment. In general, in one implementation, the technique includes: storing, in a shared memory of a client, a scripting object that retains state information for an original document, and cloning the stored scripting object to a newly loaded document. Storing the scripting object can involve copying a scripting object reference to the shared memory to cause retention of the scripting object by the client during document loading. Cloning the stored scripting object to the newly loaded document can be performed recursively, and can involve creating a new scripting object in the new document and copying data from the stored scripting object to the new scripting object. The state information retained in the scripting object can be navigation information associated with the loaded document, and the loaded document can be a portal page in a portal system.

The following description relates to loading documents in a client-server environment.
When writing dynamic pages that run on a browser, JavaScript (JS) objects are frequently used. In general, events or actions (including user actions) can be reflected in those JS objects. Thus, a JS object can hold state information that reflects a specific flow of actions performed. These actions are commonly performed by the user but can be a result of other input sources. In some client-server environments, state information in JS objects is sent to and stored at the server in response to each action that changes the state information. In other client-server environments, the server maintains its own record of client state based on the page requests received from the client. In still other client-server environments, state information need not be stored because state information is not necessary. But when state information needs to be maintained, caching the state information on the server can be used to prevent a loss of current state in a browser when a page with client-side dynamic behavior is reloaded.

System for preserving scripting objects and cloning the objects to a new document in response to a reload of the new document


Data is received that characterizes a chip in the package system (CPS) having a plurality of wires and vias. Thereafter, using the received data, a chip power calculation is performed. The chip power calculated is used to generate a thermal-aware power map. Further, package and system level thermal analysis is performed using the power map to generate a tile-based CPS thermal profile. A plurality of chip finite element sub-models are then generated that each correspond to a different tile. A thermal field solution is solved for each sub-model so that, for each wire, wire temperature rises are extracted from the corresponding the chip sub-model analysis and combined with temperature values from the CPS thermal profile. This extracting and combining is then used to generate a back-annotation file covering each metal wire and via in the CPS.

Temperatures on wires in a chip are critical information in determining the allowable currents in wires to meet the expected Mean-Time-To-Failure (MTTF) as described in Black's equation (as illustrated in diagram 100 of FIG. 1), to predict reliability failure from Electromigration (EM) phenomenon in metal wire which generates undesired open or short of circuits over time of uses. Temperatures on wires/devices also have impacts on power (particularly leakage power, a strong function of temperature), resistance, EM limit, and consequently on timing, IR/dynamic voltage drop, and signal integrity.
Accurate temperature (steady-state) on wire is not easy to predict due to layout geometry complexity of the modern chips, affected by the following factors:                Local wire temperature rises due to Joule-heating power from its average or root-mean-square (rms) current and thermal coupling among wires, where the local Joule-heating power is defined as I*I*Rwire and I (current) can be Iavg on power/ground wire or Irms on signal wire;        Self-heating or local temperature rise from CMOS devices with devices in switching or idle mode; and        Thermal environment of the chip in package with complex thermal conductivity distribution and multiple die heating, e.g., in 3D-IC, and variations of the Chip-Package-System (CPS) configurations.

Calculating and extracting Joule-heating and self-heat induced temperature on wire segments for chip reliability


In a method of manufacturing a planar buried heterojunction laser a semiconductor structure is etched to delimit a laser stripe upstanding on a confinement layer. Lateral layers surround the laser stripe to constitute the planar buried heterojunction laser. They are formed by a non-selective growth method not only at the sides of said stripe but also on top of said stripe to create a parasitic projection. These layers and the projection are subsequently covered with a contact localizing layer. The projection is then removed to form a contact window in the contact localizing layer for localizing an electrical contact on top of the laser stripe. The invention finds a particular application in the manufacture of lasers for fiber optic telecommunication systems.

1.Field of the invention
The present invention concerns the manufacture of a buried stripe semiconductor laser. The semiconductor structure of a laser of this kind is known internationally as a "planar buried heterojunction" (PBH) structure.
2.Description of the prior art
One prior art method of manufacturing a PBH laser includes so-called layer growing steps during which the semiconductor layer thickness is increased by epitaxial deposition of the material of the layers. This process is briefly as follows (see FIG. 1):
Growth of binary composition, then quaternary composition and then binary composition semiconductor layers on a substrate. This produces a double heterostructure.
Growth of a ternary composition contact layer having a forbidden band energy that is lower than that of the previous binary composition layer.
Definition of a laser stripe in the quaternary composition layer by chemical etching from the top surface of the substrate using a dielectric mask.
Growth of two lateral semiconductor layers to surround and bury the laser stripe.
Localized deposition of a contact layer through a window formed on top of the laser stripe in a dielectric layer previously deposited for this purpose onto the top surface of the substrate.
The lateral layer growth step conventionally employs so-called "selective" growth methods which have various drawbacks including a limited yield. However, they enable localized growth of layers on the semiconductor material with no deposit of material on top of the laser stripe. This requires retaining the mask which was used to define the laser stripe during this growth step. This growth step is carried out at temperatures above 500.degree. C. For this reason the dielectric mask used is formed by depositing and etching a dielectric layer.
This prior art process is described, for example, in an article by M. HIRAO et al "Long wavelength InGaAsP/InP buried heterostructure laser", J. Opt commun., 1980 , 1, pp. 10-14.
Laser semiconductors are known in some cases to show deterioration of their properties with time and this may be the result of pollution during manufacture.
Also, forming a contact localizing window to enable localized injection of current into the laser stripe requires at least one photo-etching stage requiring delicate realignment.
An NTT document, PATENT ABSTRACTS OF JAPAN vol.12, No.449(E-686) (3296) Nov. 25, 1988,abstract of document JP-A-63 177 493(NTT) July 21, 1988, describes the manufacture of a planar buried heterojunction laser in which lateral layers are formed by a non-selective growth method which grows the semiconductor material not only at the sides of the laser stripe but also on top of it to create a parasitic projection. This is subsequently removed. No arrangement is described for localizing the electrical contact on top of the laser stripe. If injection of current into the laser stripe is not localized, the performance of the laser is seriously degraded.
The objects of the present invention include:
simplifying a method of manufacturing a planar buried heterojunction semiconductor laser,
enabling the use of high-yield growth processes within this method,
reducing the risk of pollution during formation of the semiconductor structure of the component,
avoiding realignment problems associated with contact localization on the component, and
generally, enabling the use in the method of processes which may be advantageous as compared with processes previously employed.

Method of manufacturing a planar buried heterojunction laser


The present invention provides an electrode material for use in an aluminum electrolytic capacitor that does not necessitate an etching treatment. Specifically, the present invention provides an electrode material for use in an aluminum electrolytic capacitor, the electrode material comprising a sintered body of at least one of aluminum and an aluminum alloy.

Aluminum electrolytic capacitors are widely used because they allow a high capacity to be achieved at a low cost. Aluminum foil is generally used as an electrode material for an aluminum electrolytic capacitor.
The surface area of the electrode material for an aluminum electrolytic capacitor can usually be increased by performing an etching treatment to form etching pits. The etched surface of the electrode material is then anodized to obtain an oxide film that functions as a dielectric substance. By etching the aluminum foil and applying one of various voltages to the surface thereof to match the voltage that is to be used, an anodic oxide film can be formed, thus enabling various aluminum anodes (foils) to be produced for electrolytic capacitors that are suited to specific applications.
In the etching process, pores called etching pits are formed in the aluminum foil, and the etching pits are processed into various shapes depending on the anodization voltage to be applied.
More specifically, a thick oxide film must be formed for use in medium- to high-voltage capacitors. Therefore, in order to prevent the etching pits from being buried by such a thick oxide film, the etching pits for an aluminum foil that is to be used in a medium- to high-voltage anode are made to a tunnel type by conducting direct-current etching, and then processed to have an appropriate size for the voltage that is to be used. In contrast, small etching pits are necessary for use in low-voltage capacitors. Therefore, sponge-like etching pits are generally formed by alternating-current etching. In a cathode foil, the surface area is similarly increased by etching.
However, the etching treatments for both anodes and cathodes require the use of an aqueous hydrochloric acid solution that contains sulfuric acid, phosphoric acid, nitric acid, etc., in hydrochloric acid. Hydrochloric acid has a strong environmental impact, and its disposal also impacts the production process or production cost. Therefore, the development of a novel method for increasing the surface area of an aluminum foil that does not require etching is in demand.
In order to meet this demand, the use of an aluminum electrolytic capacitor that is characterized by adhering a fine aluminum powder to the surface of an aluminum foil has been proposed (Patent Document 1). Another example of a known electrolytic capacitor is one that uses an electrode foil that comprises a flat aluminum foil having a thickness of not less than 15 μm but less than 35 μm, wherein an aggregate of self-similar aluminum fine particles having a length of 2 to 0.01 μm and/or an aggregate of aluminum fine particles having an aluminum oxide layer formed on the surface thereof are adhered to one or both surfaces of the flat aluminum foil (Patent Document 2).
However, the methods disclosed in the aforementioned documents, wherein aluminum powder is adhered to the aluminum foil by plating and/or vacuum evaporation, are insufficient, at least for obtaining thick etching pits for medium- to high-voltage capacitors.
Patent Document 1: Japanese Unexamined Patent Publication No. 2-267916
Patent Document 2: Japanese Unexamined Patent Publication No. 2006-108159

Electrode material for aluminum electrolytic capacitor and process for producing the electrode material


Disclosed is a communication terminal transmitting and receiving audio data and at least one of image data obtained by imaging a subject and display data of a shared screen between the communication terminal and one or more other communication terminals via a relay device. The communication terminal includes a detector configured to detect a predetermined event in which transmission of the image data is not required while imaging the subject is continuously executed, and a stopper configured to stop imaging the subject and stop transmitting the image data in response to the detection of the predetermined event.

1. Field of the Invention
The disclosures discussed herein relate to a teleconferencing system capable of holding a conference between remote locations via a network, a communication terminal employed in the teleconferencing system, and a non-transitory computer-readable recording medium storing a program executed by the communication terminal.
2. Description of the Related Art
Teleconferencing system have increasingly become popular along with the widespread use and the progress in speed of Internet access. The teleconferencing system enables conference members to hold the conference by teleconferencing between remote locations, which eliminates the members' extra labor and time for gathering in one location.
The teleconferencing system includes a communication terminal disposed in a conference room at one end where one group of members of a conference gather, and a communication terminal disposed in a conference room at the other end where the other group of members of the conference gather. Each of the communication terminals is configured to capture images of the conference room including the members of the conference, receive audio inputs such as utterances, convert the captured images and received audio inputs into digital image data and audio data, respectively, and transmit the converted digital image data and digital audio data to the communication terminal at the other end. The communication terminal at the other end is configured to receive the image data to display on a display of the communication terminal while receiving the audio data to output sound from a speaker of the communication terminal, which implements holding a virtual conference similar to the actual conference.
In above teleconferencing system, there is disclosed a technology in which display data of documents used in the conference are transmitted together with the image data and the audio data by utilizing an external input unit from a communication terminal at one end to a communication terminal at the other end, thereby sharing the same documents between the two remotely located groups of members of the conference (e.g., Patent Document 1 and Patent Document 2).

Communication terminal, teleconference system, and recording medium


A data storage subsystem that includes three data storage units, three check storage units, and an array controller coupled to the three data and three check storage units can tolerate failure of any three data and check storage units failures can be occur before data stored on the data storage subsystem is lost. Information is stored on the data storage subsystem as a symmetric Maximum Distance Separation code, such as a Winograd code, a Reed Solomon code, an EVENODD code or a derivative of an EVENODD code. The array controller determines the contents of the check storage units so that any three erasures of the data storage units and the check storage units can be corrected by the array controller. The array controller updates a block of data contained in any one of the data storage units and the check storage units using only six IO operations.

1. Field of the Invention
The present invention relates to storage systems. In particular, the present invention relates to a system and a method for providing improved performance, protection and efficiency for an array of storage units.
2. Description of the Related Art
The following definitions are used herein and are offered for purposes of illustration and not limitation:
An "element" is a block of data on a storage unit.
A "base array" is a set of elements that comprise an array unit for an Error or Erasure Correcting Code.
An "array" is a set of storage units that holds one or more base arrays.
A "stripe" is a base array within an array.
n is the number of data units in the base array.
r is the number of redundant units in the base array.
m is the number of storage units in the array.
d is the minimum Hamming distance of the array.
D is the minimum Hamming distance of the storage system.
IOw is the number of IOs to perform an update write.
The total number of storage units in an array is m=n+r.
Storage systems have typically relied on RAID techniques for protecting against data loss caused by storage unit failures. Current RAID designs, however, are reaching the limits of their usefulness based on increasing storage unit capacities. The notation (X+Y) used herein will be used to indicate X data units and Y redundant units. Most systems today use RAID 5 (n+1) or single mirroring (1+1) as a basic array design. Both of these types of storage system configurations have a minimum Hamming distance of D=2 and, therefore, protect against a single storage unit failure. As used herein, the term "distance" refers to the minimum Hamming distance. The likelihood of multiple drive failures and hard errors, however, have increased the occurrence of data loss events in RAID 5 system configurations. Multiple storage unit losses leading to data loss have been observed in practice.
Many array configurations have been proposed for handling such a high failure rate. For example, RAID 6 (n+2) having a distance D=3, double mirroring (1+2) having a distance D=3, and RAID 51 (n+(n+2)) having a distance D=4 have all been proposed as solutions for handing a high failure rate. Nevertheless, all of these array configurations have shortcomings as will be described in connection with Table 1 and FIG. 2.
What is still needed is an array configuration that provides improved performance, protection and efficiency over conventional approaches.