A magnetic detection device includes a mode switching section capable of switching over a 1-output mode in which a (+) magnetic-field detected signal and a (−) magnetic-field detected signal are both outputted from a first external output terminal, and a 2-output mode in which the (+) magnetic-field detected signal and the (−) magnetic-field detected signal are outputted respectively from the first external output terminal and a second external output terminal. The provision of the mode switching section in an integrated circuit makes it possible to perform mode selection, in particular to realize the mode selection with a simple circuit configuration resulting in a reduction of the production cost.

1. Field
The present embodiments relate to a magnetic detection device including a magnetoresistance effect device, and more particularly to a magnetic detection device capable of switching over a 1-output mode and a 2-output mode to be adapted for dipole detection.
2. Description of the Related Art
FIG. 20 is a circuit diagram of a known magnetic detection device. The known magnetic detection device comprises a sensor section S and an integrated circuit (IC) 1. The magnetic detection device shown in FIG. 20 is a sensor adaptable for dipole detection. The sensor section S comprises a first bridge circuit BC1 including two first magnetoresistance effect devices 2, e.g., GMR devices, each of which has a resistance value that changes depending on an external magnetic field in the (+) direction, and a second bridge circuit BC2 including two second magnetoresistance effect devices 3, e.g., GMR devices, each of which has a resistance value that changes depending on an external magnetic field in the (−) direction. The term "external magnetic field in the (+) direction" means an external magnetic field in one arbitrary direction. More specifically, in the circuit of FIG. 20, it means an external magnetic field acting in such a direction that the resistance value of the first magnetoresistance effect device 2 is varied, but the resistance value of the second magnetoresistance effect device 3 is not varied (namely, the device 3 acts as a fixed resistance). The term "external magnetic field in the (−) direction" means an external magnetic field acting in a direction opposite to the external magnetic field in the (+) direction. More specifically, in the circuit of FIG. 20, it means an external magnetic field acting in such a direction that the resistance value of the second magnetoresistance effect device 3 is varied, but the resistance value of the first magnetoresistance effect device 2 is not varied (namely, the device 2 acts as a fixed resistance).
As shown in FIG. 20, each of the two first magnetoresistance effect devices 2 constitutes a serial circuit in combination with a fixed resistance device 4. Two serial circuits are connected in parallel to constitute the first bridge circuit BC1. Output terminals of the two serial circuits constituting the first bridge circuit BC1 are connected to a first differential amplifier 6. Also, as shown in FIG. 20, each of the two second magnetoresistance effect devices 3 constitutes a serial circuit in combination with a fixed resistance device 5. Two serial circuits are connected in parallel to constitute the second bridge circuit BC2. Output terminals of the two serial circuits constituting the second bridge circuit BC2 are connected to a second differential amplifier 7.
The integrated circuit 1 includes in addition to the differential amplifiers 6 and 7, Schmidt-trigger comparators 12 and 13, latch circuits 8 and 9, etc. Detected signals of the external magnetic field are output from external output terminals 10 and 11.
In the magnetic detection device shown in FIG. 20, when the external magnetic field in the (+) direction is exerted on the magnetic detection device, the resistance values of the first magnetoresistance effect devices 2 constituting the first bridge circuit BC1 are varied, whereupon an output of the first bridge circuit BC1 is differentially amplified by the first differential amplifier 6. Accordingly, a (+) magnetic-field detected signal is generated and outputted from the first external output terminal 10. On the other hand, when the external magnetic field in the (−) direction is exerted on the magnetic detection device, the resistance values of the second magnetoresistance effect devices 3 constituting the second bridge circuit BC2 are varied, whereupon an output of the second bridge circuit BC2 is differentially amplified by the second differential amplifier 7. Accordingly, a (−) magnetic-field detected signal is generated and outputted from the second external output terminal 11.
Thus, the magnetic detection device shown in FIG. 20 is a dipole-detection adapted sensor which can detect any of the external magnetic fields in the (+) direction and the (−) direction.
The related art with respect to the present invention includes Patent Document 1: Japanese Unexamined Patent Application Publication No. 2004-77374, Patent Document 2: Japanese Unexamined Patent Application Publication No. 2004-180286, Patent Document 3: Japanese Unexamined Patent Application Publication No. 2005-214900, Patent Document 4: Japanese Unexamined Patent Application Publication No. 2003-14833, Patent Document 5: Japanese Unexamined Patent Application Publication No. 2003-14834, Patent Document 6: Japanese Unexamined Patent Application Publication No. 2003-121268, and Patent Document 7: Japanese Unexamined Patent Application Publication No. 2004-304052.
The known magnetic detection device shown in FIG. 20 is used in a 2-output mode in which the (+) magnetic-field detected signal and the (−) magnetic-field detected signal are separately outputted from the first external output terminal 10 and the second external output terminal 11, respectively.
Meanwhile, it is often needed to use the magnetic detection device in a 1-output mode in which only the first external output terminal 10, for example, is employed, and the (+) magnetic-field detected signal and the (−) magnetic-field detected signal are both outputted from the first external output terminal 10.
In order to be adapted for such need, the known magnetic detection device requires the circuit configuration of the integrated circuit 1 to be rearranged depending on the 1-output mode or the 2-output mode, thus resulting in an increase of cost.

Magnetic detection device including circuit capable of switching over output mode of N pole and S pole between non-separated one output and separated two outputs


Packaging for seafood that may have been coated in sauce or marinated, including the optional use of pallet structure for positioning the product within the packaging to be vacuum sealed and flash frozen before being subsequently microwaved without rupture of the packaging until after microwaving.

Heretofore, packaging of seafood in vacuum packed containers, which could subsequently be microwaved, has not been extended to include the addition of ingredients such as sauces and the like whereby products such as shrimp scampi and lemon pepper snapper can be achieved.
With vacuum packaging of any seafood product, there has been significant concern with the potential of mold, yeast, bacteria, especially botulism. Prior to the development at hand, seafood companies have stayed away from attempting to produce a product comparable to that disclosed within. Processes have been tried before to eliminate the threat of botulism. Examples of such processes are nitrogen flushing and radiation. Notwithstanding these attempts, success has not previously been obtainable, primarily because of problems associated with the integrity of the packaging leading to health issues such as botulism.
While vacuum sealing has been successfully used for packaging shellfish without the shells and other fish in bulk, flat packing seafood marinated in sauces in vacuum sealed containers suitable for retail has not been successfully done, explaining the absence of the use of such packaging in the marketplace. Further, with prior packaging, the packaged product has not been suitable for microwaving the product directly in its shipping and sales package. While vacuum packaging has been used for a variety of vegetables and meats, this usage has not extended successfully to retail packaging of seafood.
An example of vacuum packaging technique of food stuffs generally is found in U.S. Pat. No. 5,473,866. A seafood vacuum pack system is disclosed in U.S. Pat. No. 4,835,942 but with respect to packing technique, this patent teaches away from the subject invention in that shrimp are intentionally stacked one above the other at the periphery of the packages. Likewise, U.S. Pat. No. 4,964,507 teaches the use of a "protruding-up curved section" of a case which is also contrary to the packing technique of the subject invention. Neither of these latter patents disclose any use of prepared delicacies such as shrimp scampi and fish in lemon pepper or honey mustard sauce which are prepared, and subsequently vacuum packed in a microwaveable container. None of the prior art patents teach microwaving such foodstuffs in a sealed package without any venting during the microwaving step.

Microwaveable vacuum packed seafood package and process


A bootstrap clock generator powered by a variable DC power supply voltage signal generates an approximate boost voltage signal depending on the DC power supply voltage signal level. The clock generator comprises a capacitor having a first and a second terminal and a first switching circuit coupled to the first terminal so as to couple the variable voltage supply signal to the first terminal. A second switching circuit is coupled to the second terminal so as to couple a variable reference voltage signal to the second terminal. A third switching circuit is coupled to the second terminal so as to connect a substantially fixed reference voltage signal to the second terminal. A first and a second control signal activates the switching circuits, such that the first control signal activates the first and second switching circuits, and the second control signal activates the third switching circuit.

In recent years there has been an increased demand for integrated circuit chips that can operate with lower power supply voltage signals. Previously, many integrated circuits used to operate with DC power supply voltage signals, V.sub.DD, in the range of about 5 volts. Recently, some manufacturers have developed integrated circuits that operate with DC power supply voltage signals, V.sub.DD, in the range of 3 volts.
Most of the logic circuits, digital circuits, and some of the analog components of integrated circuits, work well with lower voltage signals, such as about 3 volts. However, there are many switching transistors employed in such integrated circuits which are intended to switch reference voltage signals having amplitudes that range between V.sub.DD and ground. Typically, such switching devices operate in response to an applied clock signal. For lower DC power voltage signals, such as 3 volts, these switching transistors may need to switch signals even lower than 3 volts. As a result, the switch signal applied to the gate source of a switching transistor may not be sufficient to activate the switches. For example, in order to turn a MOSFET switch "on" or "off", it may be required to apply a clock signal to the gate of the transistor having a magnitude larger than the lower level power supply voltage signals, such as about 3 volts.
Typically, in prior art devices employing a low voltage DC power supply, a level shifter or a fixed voltage boost arrangement is used to generate the required clock signals for operating the switches. Therefore, a voltage level shifter or a booster circuit may provide a clock signal that has a magnitude higher than the DC power source, sufficient to operate the switching devices reliably.
Recently, there has been a demand for integrated circuits that can operate with either low or high voltage DC power supplies, such as 3 volts and 5 volts. A shortcoming with prior art fixed level shifters or boost circuits is that they are not appropriate for integrated circuits that are intended to operate with either low or high voltage DC power supplies. This follows because a fixed level shifter or boost circuit that generates a clock signal, appropriately shifts the magnitude of a lower supply voltage signal to an appropriate clock signal level. However, the same level shifter may shift the magnitude of a higher supply voltage signal to a clock signal level that is sufficiently high to damage the switching devices.
Furthermore, in many battery operated applications, the voltage level of the battery diminishes with use and time. Therefore, when the battery is fresh, the integrated circuit powered by the battery works appropriately. However, as the life of the battery diminishes, the clock signal applied to the switching circuits may not attain a sufficient level capable of operating the switches. Again a fixed level shifter or a boost circuit may not be appropriate in this situation. When the battery is fresh, the fixed level shifter may provide a clock signal level that is sufficiently high to cause damage to the switching devices.
Thus, there is a need for a variable level shifter or a boost circuit which can operate with a variable DC power supply that generates either a low or high DC power signal, and can generate an appropriate boost in response to the DC power supply voltage level.


Method and systems for of evaluating a mechanical property of a material by applying force to the material sufficient to physically displace a portion of the material, measuring displacement of the material, adaptively adjusting the force when the displacement measured is not within a predetermined range of displacement values, wherein the force is increased or decreased depending upon whether the measured displacement is below or above the predetermined range, respectively, and computing a mechanical property value resultant from the displacement of the material.

Unregulated hemostasis represents a leading cause of mortality and morbidity in the developed world. The ability to recognize and quantify defects of the hemostatic process is critical to reduce mortality and implement appropriate treatment.
The formation of a blood clot and its successive dissolution, referred to as the hemostatic process, is required to arrest blood loss from an injured vessel. This process is the result of a delicate functional balance between plasma coagulation factors, platelets, and fibrinolytic proteins. Each of these elements plays an important role in activating/deactivating the others, and the appropriate stimuli are necessary to prevent excessive blood loss without causing inappropriate thrombosis, see Laposata M., et al., The Clinical Hemostasis Handbook, Year Book Medical Publisher 1989. Disruption of this balance plays a significant role in the onset of potentially fatal conditions, including myocardial infarction, stroke, deep vein thrombosis, pulmonary embolism, and hemorrhage, see Hoyert et al., "Deaths: preliminary data for 2003", Natl. Vital Stat. Rep. 2005; 53:1-48 and Hambleton et al., "Coagulation: Consultative Hemostasis"; Hematology 2002; 1:335-352.
The hemostatic process is initiated by the activation and subsequent adhesion of platelets to the site of injury within the vessel wall. Activated platelets recruit other platelets and interact with fibrinogen in the blood plasma to form a platelet-plug that serves as the initial response to stop blood loss. Hemostasis then proceeds with a cascade of proteolytic reactions of the plasma coagulation proteins that ultimately form a three-dimensional network of fibrin that strengthens the platelet-plug. The fibrin chains are cross-linked and stabilized by the plasma factor XIIIa (FXIIIa). Platelets also have a central role in regulating the process of fibrin polymerization. The final step of hemostasis (i.e., fibrinolysis) involves the activation of the plasma protein plasmin, which lyses the blood clot when its useful life is over. This cell-based model of hemostasis closely reflects the in vivo physiological process, e.g., see Hoffman et al., "A cell-based model of hemostasis"; Thromb. Haemost. 2001; 85:958-965 and Becker, "Cell-Based Models of Coagulation: A Paradigm in Evolution"; J. Thromb. Thrombolysis 2005: 20:65-68.
The mechanical properties of blood clots are essential for its primary function of stopping blood loss. Alterations in clot structure and its underlying mechanical properties have been implicated in thrombotic disease and other life threatening pathologies, see Weisel, J. W., "Enigmas of Blood Clot Elasticity"; Science 2008; 320:456. Recently, it was shown that fibrin clots of patients affected by premature coronary artery disease have a different structure and higher stiffness compared to the fibrin clots of healthy age-matched controls, see Collet et al, "Altered Fibrin Architecture is Associated with Hypofibrinloysis and Premature Coronary Atherothrombosis"; Arterioscler. Thromb. Vase. Biol. 2006; 26:2567-2573. The mechanics of fibrin networks have been studied extensively at the macroscopic level see Ryan et al., "Structural Origins of Fibrin Clot Rheology"; Biophys. J. 1999; 77:2813-2826 and Jen et al., "The Structural Properties and Contractile Force of a Clot"; Cell Motil. 1982; 2:445-455. The viscoelastic properties of individual fibrin strands have also been investigated by means of AFM (see Liu et al., "Fibrin Fibers Have Extraordinary Extensibility and Elasticity"; Science 2006; 313:634) and "optical tweezers", see Collet et al., "The elasticity of an individual fibrin fiber in a clot"; Proc. Natl. Acad. Sci. USA 2005; 102:9133-9137. These studies, however, have not examined the combined effects of coagulation plasma factors, platelets, and fibrinolytic proteins. It would be desirable to provide systems and methods with the ability to monitor and characterize the mechanical properties of whole blood during clot formation and dissolution to: (i) enhance understanding of both normal and pathological hemostasis, (ii) identify patients at high risk of bleeding and thrombotic disorders, (iii) inform appropriate medical treatment, and (iv) support the development of new pharmacological agents.
Current tests of hemostasis can be divided into two broad categories: endpoint biochemical assays and mechanical/viscoelastic analyzers. Endpoint assays are traditionally performed on blood plasma and include such tests as the pro-thrombin time (PT), activated partial thromboplastin time (aPTT), and the activated clotting time (ACT). While each of these assays measures a different aspect of the coagulation cascade, even in combination they do not provide a complete representation of overall hemostasis, see Gravlee et al., "Predictive value of blood clotting tests in cardiac surgical patients"; Aim. Thorac. Surg. 1994; 58:216-221 and Bajaj et al., "New insights into how blood clots: Implication for the use of APTT and PT as coagulation screening tests and in monitoring anticoagulant therapy"; Semin. Thromb. Hemost. 1999; 25:407-418. These tests are further limited by the absence of active platelets.
In contrast, mechanical methods, such as the Thromboelastogram (TEG) and SonoClot, measure the contribution of all the components of hemostasis in whole blood. These methods have been widely studied and shown to offer valuable clinical and scientific insights, see Ganter et al., "Coagulation Monitoring: Current Techniques and Clinical Use of Viscoelastic Point-of-Care Coagulation Devices"; Anesth. Analg. 2008; 106:1366-1374. However, they utilize complex and expensive mechanical transducers, resulting in instruments that are difficult to operate. In addition, the large mechanical strains (in the range of 8% to 16%) applied to the blood samples have been shown to interfere with clot formation and limit sensitivity and speed of the measurements, see Evans et al., "Rheometry and associated techniques for blood coagulation studies"; Med. Eng. Phys. 2008; 30:671-679 and Burghardt et al., "Nonlinear viscoelasticity and thromboelastograph: Studies on bovine plasma clots"; Biorheology 1995; 32:621-630.
It would be desirable to provide systems and methods to make repeated viscoelastic measurements of a whole blood sample, wherein such systems and methods are not impeded by applications of large mechanical strains, but which apply much smaller forces to measure dynamic changes of viscoelastic properties observed during clot formation and clot dissolution to characterize hemostatic function.
The present invention meets all of the above needs and desires as well as providing additional advantages as set forth in the detailed description below.

Ultrasound-based method and related system to evaluate hemostatic function of whole blood

University of Virginia Patent Foundation


A brush (200) has a straight stem (201) defining a main axis (X--X), a flexible core (202) having a first and a second end, the first end being integral with the stem, and bristles (204) implanted radially in the core. The end of the bristles defining the surface (205) of the brush have a first face, the intersection of any meridian plane passing through the main axis with the surface of the brush defining two peak lines (207) having a specific curvature. The core is curved, the peak lines (207) are convex, and the first face (207.1) is substantially straight and parallel to the main axis (X--X).

Field of the Invention
The invention relates to a brush, in particular a brush for applying a cosmetic product to keratinous fibers, especially for applying mascara to the eyelashes or a dye to the hair, and to a make-up device which comprises this brush and has a substantially plano-convex profile.
Conventionally, a brush for applying a cosmetic product comprises an elongate core formed by helically winding two branches of a metal wire and bristles implanted radially in this core and gripped between these wound branches. Such brushes may be of various shapes and may have cutouts.
If these brushes are used for applying mascara to the eyelashes, such shapes and such cutouts are provided in order to make it possible to obtain more or less heavy make-up or a greater or lesser elongation and curving of the eyelashes.
The prior art, for example FR-A-2715038, discloses mascara brushes having a substantially convex shape, such as for example the shape of a rugby ball, a flat notch having been cut out in the brushes over their entire length. Since the bristles of the flat notch are short, they are wiped off only slightly on exit from the reservoir containing the mascara; such brushes provide very heavy make-up.
Brushes are also known having the shape of a portion of a torus, these brushes being obtained by twisting the core of a cylindrical brush in an arc of a circle. Such brushes have a convex face, a concave face and two substantially plane faces. Such brushes are not very easy to handle: in fact if the user rotates the stem of such a brush about its axis between her fingers, for example in order to apply a product to the eyelashes, she must continually correct the distance between the brush and the eyelashes. Moreover, it was found that such a brush loaded the eyelashes, but without smoothing them sufficiently. Brushes obtained by twisting the core of a cylindroconical brush in an arc of a circle have the same disadvantages.


Methods and apparatus are provided for outlier detection in databases by determining sparse low dimensional projections. These sparse projections are used for the purpose of determining which points are outliers. The methodologies of the invention are very relevant in providing a novel definition of exceptions or outliers for the high dimensional domain of data.

The outlier detection problem is an important one for very high dimensional data sets. Much of the recent work has focused on finding outliers for high dimensional data sets which are based on relatively low dimensionalities, for example, up to 10 or 20. However, the typical applications in which points are outliers may involve higher dimensionality such as, for example, 100 or 200. For such applications, more effective techniques are required for outlier detection.
Many data mining algorithms described in the literature find outliers as an aside-product of clustering algorithms. Such techniques typically find outliers based on their nuisance value rather than using techniques which are focused towards detecting deviations, see, e.g., A. Arning et al., "A Linear Method for Deviation Detection in Large Databases," Proceedings of the KDD Conference, 1995. Outliers are however quite useful based on their value for finding behavior which deviates significantly from the norm. In this invention, we carefully distinguish between the two, and develop algorithms which generate only outliers which are based on their deviation value.
Although the outlier detection definition described in S. Ramaswamy et al., "Efficient Algorithms for Mining Outliers from Large Data Sets," Proceedings of the ACM SIGMOD Conference, 2000 has some advantages over that provided in E. Knorr et al., "Algorithms for Mining Distance-based Outliers in Large Data Sets," Proceedings of the VLDB Conference, September 1998, both of them suffer from the same inherent disadvantages of treating the entire data in a uniform way. However, different localities of the data may contain clusters of varying density. Consequently, a new technique which finds outliers based on their local density was proposed in M. M. Breunig et al., "LOF: Identifying Density-Based Local Outliers," Proceedings of the ACM SIGMOD Conference, 2000, which finds the outliers based on their local neighborhoods; particularly with respect to the densities of these neighborhoods. This technique has some advantages in accounting for local levels of skews and abnormalities in data collections. In order to compute the outlier factor of a point, the method in the M. M. Breunig et al. reference computes the local reachability density of a point o by using the average smoothed distances to a certain number of points in the locality of o.
Thus, the above-mentioned techniques proposed in the above-cited E. Norr et al. reference, the S. Ramaswamy et al. reference and the M. M. Breunig et al. reference try to define outliers based on the distances in full dimensional space in one way or another. Recent results have also shown that when the distances between pairs of points are measured in the full dimensional space, all pairs of points are almost equidistant, see, e.g., K. Beyer et al., "When is Nearest Neighbors Meaningful?" Proceedings of the ICDT, 1999. In such cases, it becomes difficult to use these measures effectively, since it is no longer clear whether or not these are meaningful. In the context of the algorithms proposed in the above-cited E. Knorr et al. reference, a very small variation in d can result in either all points being considered outliers or no point being considered an outlier. The definition in the S. Ramaswamy et al. reference is slightly more stable since it does not rely on the use of such a parameter which is difficult to pick a priori. However, for high dimensional problems, the meaningfulness of the k-nearest neighbor in high dimensional space is in itself in doubt; therefore, the quality of outliers picked by such a method may be difficult to estimate. The same problem is relevant for the method discussed in the M. M. Breunig et al. reference in a more subtle way; since the local densities are defined using full dimensional distance measures.
For problems such as clustering, it has been shown (e.g., in C. C. Aggarwal et al., "Fast Algorithms for Projected Clustering," Proceedings of the ACM SIGMOD Conference, 1999 and C. C. Aggarwal et al., "Finding Generalized Projected Clusters in High Dimensional Spaces," Proceedings of the ACM SIGMOD Conference, 2000) that by examining the behavior of the data in subspaces, it is possible to design more meaningful clusters which are specific to the particular subspace in question. This is because different localities of the data are dense with respect to different subsets of attributes. By defining clusters which are specific to particular projections of the data, it is possible to design more effective techniques for finding clusters. The same insight is true for outliers, because in typical applications such as credit card fraud, only the subset of the attributes which are actually affected by the abnormality of the activity are likely to be applicable in detecting the behavior.
In order to more fully explain this point, let us consider the example illustrated in FIGS. 1A-1D. In the example, we have shown several 2-dimensional cross-sections of a very high dimensional data set. It is quite likely that for high dimensional data, many of the cross-sections may be structured; whereas others may be more noisy. For example, the points A and B show abnormal behavior in views 1 (FIG. 1A) and 4 (FIG. 1D) of the data. In other views, i.e., views 2 (FIG. 1B) and 3 (FIG. 1C), the points show average behavior. In the context of a credit card fraud application, both the points A and B may correspond to different kinds of fraudulent behavior, yet may show average behavior when distances are measured in all the dimensions. Thus, by using full dimensional distance measures, it would be more difficult to detect points which are outliers, because of the averaging behavior of the noisy and irrelevant dimensions. Furthermore, it is impossible to prune off specific features a priori, since different points (such as A and B) may show different kinds of abnormal patterns, each of which use different features or views.
Thus, the problem of outlier detection becomes increasingly difficult for very high dimensional data sets, just as any of the other problems in the literature such as clustering, indexing, classification, or similarity search. Previous work on outlier detection has not focused on the high dimensionality aspect of outlier detection, and has used methods which are more applicable for low dimensional problems by using relatively straightforward proximity measures, e.g., the above-mentioned E. Knorr et al. and S. Ramaswamy et al. references. This is very important for practical data mining applications which are mostly likely to arise in the context of very large numbers of features. The present invention focuses for the first time on the effects of high dimensionality on the problem of outlier detection. Recent work has discussed some of the concepts of defining the intentional knowledge which characterizes distance-based outliers in terms of subsets of attributes. Unfortunately, this technique was not intended for high dimensional data, and the complexity increases exponentially with dimensionality. As the results in E. Knorr et al., "Finding Intentional Knowledge of Distance-based Outliers," Proceedings of the VLDB Conference, September, 1999 show, even for relatively small dimensionalities of 8 to 10, the technique is highly computationally intensive. For even slightly higher dimensionalities, the technique is likely to be infeasible from a computational standpoint.

Methods and apparatus for outlier detection for high dimensional data sets

International Business Machines Corporation


A method for securing a memory area comprising data blocks, wherein at least two control bits are associated with each data block, is provided. The method comprises a step of reading the control bits associated with a current data block intended to be replaced with the new data block, before the writing of a new data block in the memory area. A securing action for securing the memory area is begun if the two control bits have the same value. Upon each write of a new data block in the memory area, control bits having opposite values are written in the memory area. The method may be applied, for example, to the securization of a binary counter.

1. Field of the Invention
The present invention relates to a method for securing a memory area comprising data blocks, and an electronic circuit comprising groups of memory cells each receiving a data block, and means for executing a command for writing a data block in a group of memory cells.
The present invention relates to the securization of a binary counter implemented on an integrated circuit, such as integrated circuits for odometers of motor vehicles.
The present invention also relates to the securization of integrated circuits used to manage transaction data, such as integrated circuits for smart cards of electronic cash card, telephone card, transportation pass, etc.
2. Description of the Related Art
Transaction or counting data generally have a tangible monetary value, whether the data is transaction data enabling a service to be accessed or counting data of an odometer enabling the value of a vehicle to be established. As a result, the integrated circuits comprising such data are often the target of fraudsters who try to falsify or refresh these data.
The memories used to store this type of data are non-volatile memories generally of the electrically programmable and erasable type. Thus, a fraudster who wishes to refresh the value of a transaction unit counter or of a binary counter will generally try to erase memory cells that are in the programmed state so that all or part of the units of the counter are reset to 0. The erasing technique most frequently used is the collective erasing of the memory cells, by exposing the memory to a beam of particles, generally a UV beam (beam of ultra-violet light). The exposure to the UV light results in electric charges being extracted from the memory cells and put into a blank electrical state corresponding generally, when read, to the erased state.
A solution to counter this type of fraud, described by EP 1 006 532, is to provide a control memory cell that is put into an initial, erased or programmed state, and is then read with two read voltages so as to detect whether the memory cell is in the initial state or in an intermediate state corresponding to the UV state. This solution has the disadvantage of needing two read voltages, one being a "standard" read voltage and the other one allowing whether or not the memory cell is in the UV state to be detected.
Moreover, this solution does not counter certain types of fraud such as the corruption of the read process, which enables protection mechanisms intervening at the time of reading data to be inhibited, or the corruption of the writing process, enabling counterfeit data to be written in a memory.

Method for securing data blocks in an electrically programmable memory


The present invention relates to the biological treatment of waste water using microorganisms whose living conditions are maintained by addition of oxygen into a contact path. An underwater support frame has a double-walled duct arranged as a contact path such that the duct is placed angularly towards a surface of the water. The duct is made for holding air bubbles to prevent the premature rise of the air bubbles added by an aerator providing air at the beginning of the contact path. The contact path has a suction point at an end which is connected via a fresh organism pipe with the aerator. A connection piece connects the aerator to a suction pipe at the beginning of the contact path. The other end of the suction pipe is connected to a flowing-in opening located at a distance from the aerator contrary to the flow direction, for supplying contaminated water to the aerator before the water actually reaches the contact path.

This invention relates to a process for the biological treatment of waste water using microorganisms whose living conditions are maintained by the addition of oxygen into a contact path which is arranged at a slight upward angle towards the water surface and has an interior air-permeable and an exterior air-impermeable wall, whereby air and contaminated waste water are added into the contact path for the development of the microorganisms approximately parallel to the water surface. The invention also relates to a device for implementing the process which has an underwater support frame in which a double-walled duct is arranged with a slight rise towards the water surface and holds the air bubbles and which has installations which prevent the premature rise of the latter and which in its capacity as contact path holds the contaminated waste water which was added via an aerator and the air.
Such processes are used for the biological decontamination of waste waters and especially for the regeneration of waters which are seriously contaminated and silted because of a lack of oxygen. A known device used for this purpose (German Patent 2523591) has a water jet pump which is used to produce a water-air mixture which is then passed for a certain time period in a pipe in such a way that the air bubbles do not rise too fast. The pipe is extended so far and is equipped with an air-permeable interior wall and an air-impermeable exterior wall that the individual air bubbles which are as small as possible must travel long distances and are, during this time, in intensive contact with the water. In this way oxygen-saturated water is obtained in a certain area so that the bacteria eliminating the sludge are preserved or are able to multiply as quick as possible. The device stands with its support frame on the bottom of the water and may, if needed, be transported from one location to another. In order to ensure the necessary contact of the air bubbles with the water, such contact paths have a length of 15 m or more. Inside of the contact paths are installations at which the individual microorganisms may also settle and develop in order to ensure the shortest possible and complete purification of the water. But the disadvantage is that the microorganisms develop more or less randomly depending on oxygen and food supply, i.e. the added contaminations. In addition, the microorganisms which have just achieved optimum effectiveness are removed with the purified waste water, something which is partially desired, but which on the other hand constitutes an overall impediment of the even development of microorganisms. This causes problems particularly when the composition of the waste water changes. Then, either not enough microorganisms are present, or the present microorganisms cannot change, or the currently required microorganisms are available only in small or minute numbers. British application 587 400 publishes a process for waste water treatment in a contact path which is simply aerated cross-wise to flow direction. Part of the microorganisms leaving the contact path are recycled together with absorbed sludge into the contact path. Notwithstanding the fact that this achieves only an insufficient aeration, i.e. supply of oxygen, the suggestion of the recycling of sludge obviously shows that only a small purification result may be presupposed.

Process for the biological treatment of waste water using microorganisms


The object is to provide a capacity control valve for a variable displacement compressor, which is not adversely affected by pressure from a pressure-regulating chamber. The cross-sectional area of a valve hole of a high pressure-side valve seat for introducing discharge pressure Pd of a variable displacement compressor into a pressure-regulating chamber is A, the cross-sectional area of a valve hole of a low pressure-side valve seat for introducing pressure Pc1 (=Pc2) of the pressure-regulating chamber into a suction chamber is B, and the average cross-sectional area of a refrigerant passage assumed when a low-pressure valve element is open during most of control time of actual operation is b. A and B are set to A<B to make the effective pressure receiving area (≅A) of the high pressure-side valve and the effective pressure receiving area (≅B−b) of the low pressure-side valve approximately equal.

(1) Field of the Invention
This invention relates to a capacity control valve for a variable displacement compressor, and more particularly to a capacity control valve for use in a variable displacement compressor for compressing a refrigerant gas in a refrigeration cycle of an automotive air conditioner.
(2) Description of the Related Art
A compressor used for compressing refrigerant in a refrigeration cycle of an automotive air conditioner is driven by an engine, and hence is not capable of controlling the rotational speed thereof. For this reason, a variable displacement compressor capable of changing the compression capacity for compressing refrigerant is employed so as to obtain adequate refrigerating capacity without being constrained by the rotational speed of the engine.
In such a variable displacement compressor, compression pistons are connected to a wobble plate fitted on a shaft driven for rotation by the engine, and the angle of the wobble plate is changed to change the stroke of the pistons for changing the discharge amount of the refrigerant, i.e. the capacity of the compressor.
The angle of the wobble plate is continuously changed by introducing part of the compressed refrigerant into a gastight pressure-regulating chamber and changing the pressure of the introduced refrigerant, thereby changing a balance between pressures applied to the both ends of each piston.
To control the amount of refrigerant introduced into the pressure-regulating chamber of the variable displacement compressor, in a compression capacity control device described e.g. in Japanese Unexamined Patent Publication No. 2001-132650, there have been proposed a construction in which a capacity control valve is disposed between a discharge chamber and a pressure-regulating chamber of the variable displacement compressor, and an orifice is provided between the pressure-regulating chamber and a suction chamber, and a construction in which an orifice is provided between a discharge chamber and a pressure-regulating chamber, and a capacity control valve is disposed between the pressure-regulating chamber and a suction chamber.
Each of the capacity control valves opens and closes the communication between the chambers such that a differential pressure across the capacity control valve is maintained at a predetermined value, and the capacity control valve is implemented by a solenoid control valve capable of externally setting the predetermined value of the differential pressure by a current value. Thus, when the engine rotational speed increases, the capacity control valve between the discharge chamber and the pressure-regulating chamber is opened, or the capacity control valve between the pressure-regulating chamber and the suction chamber is closed, whereby the pressure introduced into the pressure-regulating chamber is increased to reduce the volume of refrigerant that can be compressed, while when the engine rotational speed decreases, the capacity control valve is reversely controlled such that the pressure introduced into the pressure-regulating chamber is decreased to increase the volume of refrigerant that can be compressed, whereby the pressure of refrigerant discharged from the variable displacement compressor is maintained at a constant level irrespective of the engine rotational speed.
In such a capacity control valve for a variable displacement compressor, to minimize the operating capacity of the compressor, it is necessary to maximize the amount of refrigerant introduced from the discharge chamber into the pressure-regulating chamber or minimize the amount of refrigerant introduced from the pressure-regulating chamber into the suction chamber, and inversely, to maximize the operating capacity of the compressor, it is necessary to minimize the amount of refrigerant introduced from the discharge chamber into the pressure-regulating chamber or maximize the amount of refrigerant introduced from the pressure-regulating chamber into the suction chamber. If an orifice is provided between the discharge chamber and the pressure-regulating chamber or between the pressure-regulating chamber and the suction chamber of the compressor, the flow rate of refrigerant passing through the orifice is restricted. Therefore, when the operation of the compressor is changed from the maximum capacity operation to the minimum capacity operation or vice versa, the orifice limits the flow rate of refrigerant flowing from the discharge chamber to the pressure-regulating chamber or from the pressure-regulating chamber to the suction chamber, which causes much time to taken in transition to the minimum capacity operation or to the maximum capacity operation.
To eliminate this inconvenience, there is proposed a capacity control valve for a variable displacement compressor in Japanese Patent Application No. 2001-224209 which is arranged between a discharge chamber and a pressure-regulating chamber and between the pressure-regulating chamber and a suction chamber, for opening and closing communication between the discharge chamber and the pressure-regulating chamber and communication between the pressure-regulating chamber and the suction chamber, in an interlocked manner. This capacity control valve for a variable displacement compressor has a three-way valve construction in which two valves are arranged respectively between the discharge chamber and the pressure-regulating chamber and between the pressure-regulating chamber and the suction chamber, and when one of the valves is closed, the other is opened in a manner interlocked therewith, whereas when the one is opened, the other is closed in a manner interlocked therewith. The three-way valve is configured such that the high pressure-side valve arranged between the discharge chamber and the pressure-regulating chamber and the low pressure-side valve arranged between the pressure-regulating chamber and the suction chamber have the same effective pressure-receiving area so as to enable them to be moved only by the differential pressure between the discharge pressure and the suction pressure without being influenced by the pressure from the pressure-regulating chamber, and respective cross-sectional areas of refrigerant passages of the valves are made sufficiently larger than those of orifices. This makes it possible to cause a sufficiently large amount of refrigerant to flow during transition to the minimum capacity operation and the maximum capacity operation, which makes it possible to reduce the time taken for the transition.
Especially, when the compressor is operating in a state close to the minimum capacity operation, the refrigerant discharged from the discharge chamber is always introduced into the pressure-regulating chamber, so that the introduced refrigerant sometimes stays within the pressure-regulating chamber. In this state, to make a transition to the maximum capacity operation, it is desired to reduce the pressure within the pressure-regulating chamber as soon as possible. However, when the pressure-regulating chamber is communicated with the suction chamber to undergo a pressure drop in the pressure-regulating chamber, the refrigerant staying inside the pressure-regulating chamber is evaporated, and as long as the evaporation continues, the minimum capacity operation is maintained. Thus, it sometimes takes much time before the pressure in the pressure-regulating chamber actually drops. Even in such a case, since the three-way valve having large cross-sectional areas of the refrigerant passages fully opens the communication between the pressure-regulating chamber and the suction chamber, so that the refrigerant in the pressure-regulating chamber can be caused to promptly flow into the suction chamber, thereby reducing the time for transition from the minimum capacity operation to the maximum capacity operation.
However, although the high pressure-side valve and the low pressure-side valve of the conventional capacity control valve for a variable displacement compressor have the same effective pressure-receiving area, during most of actual operation, the valves are controlled such that the high pressure-side valve is fully closed and the low pressure-side valve is almost fully opened. Now, let it be assumed that the cross-sectional area of a valve hole of the high pressure-side valve is represented by A, the average cross-sectional area of a refrigerant passage of this valve when it is open by a, the cross-sectional area of a valve hole of the low pressure-side valve by B, and the average cross-sectional area of a refrigerant passage of this valve when it is open by b, the effective pressure-receiving area of the high pressure-side valve is represented by A−a, and the effective pressure-receiving area of the low pressure-side valve by B−b. During most of control time of actual operation, the effective pressure-receiving area of the high pressure-side valve is approximately equal to A, and that of the low pressure-side valve is equal to B−b, so that the high pressure-side valve and the low pressure-side valve are made to be different in effective pressure-receiving area, which causes the capacity control valve to be affected by the pressure from the pressure-regulating chamber.

Capacity control valve for variable displacement compressor


A device for treating tissue comprises an enlongate probe and a light delivery unit illuminating a target area with light within a first wavelength band selected to enhance identification of target tissue in combination with an ultrasound crystal mounted at a distal end of the probe, the crystal being stimulated to treat target tissue identified using the light delivery unit.

Lesions and abnormal tissue growths within organs and body lumens are often difficult to treat because they are not easily accessed. For example, endometriosis lesions are difficult to access for identification and treatment.
Laparoscopic procedures allow minimally invasive access to the interiors of many organs and body lumens. However, difficulties in accessing certain target areas remain and thus, therapies often do not completely treat conditions in these areas.

This patent is subject to a terminal disclaimer.

Device and method for detecting and treating lesions


Apparatus, and accompanying methods for use therein, for translating virtual page addresses in one address space, e.g. virtual, to page addresses in a second address space, e.g. real, and specifically for increasing the speed of such translations by translating multiple contiguous virtual page addresses upon the occurrence of a miss in a translation lookaside buffer (TLB). In response to a TLB miss, the address of each virtual page in a pre-defined block of, e.g. four, contiguous virtual pages, is separately translated through segment and/or page table lookup operations to yield corresponding page frame addresses. The virtual and corresponding page frame addresses for this block are then stored within a single TLB entry. Inasmuch as successive virtual page addresses can be constructed through simple incrementation of a starting virtual page address for this block, a TLB entry contains the first virtual page address for the block followed by the separate page frame address, and its associated invalid and page protection bit fields, for each of the contiguous virtual pages in that block. Since segment and block values are the same for all the page frame addresses in each block, these values are only stored once within the corresponding TLB entry for that block.

1. Field of the Invention
The invention relates to apparatus, and accompanying methods for use therein, for translating virtual memory page addresses to real page addresses and specifically for increasing the speed of such translations by translating multiple contiguous virtual page addresses upon the occurrence of a miss in a translation lookaside buffer (TLB).
2. Description of the Prior Art
Most modern computer systems, particularly mainframe computers, employ high speed random access (RAM) memory circuits as main memory and relatively slow mass memory devices, such as hard disk or magnetic tape drives, as auxiliary (mass) storage. The disparity in access times between random access memory and disk or tape drives is substantial and severe, with the former having access times ranging on the order of tenths of microseconds or less while the latter has access times often ranging on the order of at least tens of milliseconds. Given this disparity, user programs are not executed from auxiliary storage, but rather are transferred therefrom into main memory for execution therein.
In practice, considerations of cost, physical circuitry size and/or power requirements frequently limit the amount of RAM memory that is used in implementing a main memory to a finite real address space which is often substantially less than the maximum address space of a processor that is to access this memory. For example, a processor that operates with a 31 bit virtual address word, which inherently possesses the capability of separately addressing 2.sup.31 (over 2 billion) bytes, may often operate with as little as a few Mbytes of actual RAM memory. To provide sufficiently rapid execution speeds, the available RAM memory must be shared among all current user programs that are executing on the processor as well as with a resident portion of the operating system used by the processor. Unfortunately, the RAM memory is rarely, if ever, sized sufficiently large to fully accommodate all the instructions and data that form each such user program and the resident portion of the operating system.
However, it has been recognized quite early in the art that, that through normal operation of instruction fetches and stack and data accesses and standard programming techniques, most program instructions possess a rather good spatial locality of reference. This means that at memory location x in an executing user program, that program will exhibit a strong tendency to interact within relatively small time delays with different but nearby memory locations, such as locations x+1, x+2 and so on. This behaviour, often involving preceding instructions, e.g. locations x-1, x-2 and so on, is clearly evident in loops and other similar program structures. Although the organization of external data is often not as constrained by the architecture of the processor as are the stack and instruction accesses, such data, particularly arrays, are stored in contiguous memory locations and, as such, often exhibit considerable spatial locality. In this regard, certain programmed operations, such as illustratively clearing, transposing, adding or array multiplication, that at any instance utilize one element of an array will likely access other elements of the array within a short time. Similarly, the art has recognized that instructions and data often exhibit a good temporal locality of reference as well, i.e. where the same memory location is repeatedly accessed over time.
Given these recognitions regarding spatial and temporal localities, the art has turned to and now widely uses a number of memory techniques that attempt to share a relatively small amount of real memory among a number of currently executing user programs, each of which is capable of addressing a much larger memory space.
One such technique is paging. Here, in essence, different finite portions, i.e. "pages", of memory data (collectively including both instructions and data values) for each user program, rather than all the memory data for that program, are successively copied ("swapped") from auxiliary storage into main memory and then used for current execution. Owing to spatial and temporal localities, the main memory contains pages of memory data that not only possess memory locations that have just been recently accessed but also locations that are expected to be subsequently accessed within a very short delay time. With a well designed paging system, the vast majority of memory access time should be spent accessing memory data located within pages previously copied into main memory with relatively little access time being spent in copying new pages of memory data from auxiliary storage.
Specifically, whenever the processor attempts to access memory while executing a user program, the processor issues a so-called "virtual address" for a desired memory datum that is to be accessed. The size of the virtual address is generally only limited by the maximum address space of the processor that is allowed for program usage. By contrast, a so-called "real" or "physical" address is used to directly access memory in order to locate the desired memory datum stored therein. Since the virtual address of any given memory datum is not necessarily the same as its corresponding real address, a translation facility, provided by the operating system and generally transparent to any executing user program, translates each virtual address issued by the processor to a corresponding real address prior to accessing main memory in order to obtain this datum.
Both virtual and real memory space are divided into fixed sized areas or segments, each of which is, in turn, divided into a number of contiguous pages. Each page is formed of a predefined number of memory locations, typically ranging between 2 to 4K bytes. Though pages for any program are contiguous in virtual memory; the corresponding physical pages for that program, being swapped into and out of main memory as required by the operating system during on-going program execution, tend to be randomly scattered throughout main memory. A physical page in main memory is often referred to as a "page frame".
The random location of page frames in main memory necessitates that the operating system maintains address translation, specifically and illustratively segment and page, software tables and an address translation process which utilizes these tables for use in translating virtual to real addresses. These tables and the translation process collectively form the address translation facility. For each virtual page copied from auxiliary storage as a page frame into main memory, the address translation tables store its virtual page address along with its corresponding page frame address. Inasmuch as memory locations within any page, whether virtual or real, are contiguous, then through these tables, a virtual address located within such a virtual page can be mapped into a physical address of a location residing in main memory.
Given this virtual addressing scheme, whenever the processor attempts a memory access for a given memory datum during execution of a user program, the processor issues a virtual address for that datum. The datum may currently reside in main memory or it may not. If the datum resides in the main memory, the virtual to real address correspondence for that datum exists in the page and segment tables. As such, the address translation process, upon accessing these tables, extracts the physical address of the datum and thereafter applies this address to the main memory. Once this datum has been accessed, user program execution proceeds accordingly.
If, however, the desired datum does not currently reside within the main memory because a page containing that datum has not yet been swapped into main memory, then no valid entry for its associated virtual page exists in the page and segment tables. As such, the datum must be retrieved from the auxiliary store. Accordingly, the address translation process, upon accessing these tables using that virtual address, produces a page fault. At this point, interpretation of a current instruction (which caused the page fault) halts, the current state of processor is saved and the processor transfers execution to a software page fault handler. Rather than accessing and copying only the desired datum from auxiliary storage, the page fault handler translates the incoming virtual page address and then, through input/output controller(s) for an appropriate mass storage device(s), copies an entire page containing that desired datum from auxiliary storage as a page frame into main memory. Thereafter, the fault handler updates the segment and page tables accordingly with new corresponding virtual and real addresses for this page. Execution then returns from the fault handler to the address translation process which, in turn, accesses the desired datum from the newly copied page. When appropriate, the fault handler, as well as other well known components of the operating system, will subsequently resume execution of the current program instruction that generated the page fault.
If pages are correctly sized, then the spatial and temporal localities inherent in most programs within a given virtual page should be very high. Hence, one would then expect that the average access time to a paged memory system consisting of a main memory having a few Mbytes of RAM, an auxiliary store containing a few billion bytes of disk memory and with correctly sized pages should only be slightly longer than but nevertheless remain on the same order as that of the RAM memory. However, disadvantageously and under various circumstances, the access time to such a paged memory system can lengthen considerably.
In particular, translating a virtual address, even if accomplished through use of microcode rather than purely software, often requires several memory accesses into the software based segment and page tables as well as a number of other well known processing steps that collectively may consume upwards of typically 5 to 100 machine cycles to fully accomplish. For that reason, the address translation process tends to be relatively slow and add significant overhead to memory access and instruction execution times. Hence, if the full address translation process were to be performed for every virtual address, then these times would be slowed considerably which, in turn, would substantially decrease the throughput of the computer. Therefore, in an attempt to substantially eliminate the need to perform the entire address translation process for every virtual address, the art has turned to the use of translation lookaside buffers (TLBs). These buffers, in hardware, store recently used virtual page addresses along with their corresponding page frame addresses. Once a virtual page address has been fully translated, this virtual address along with its corresponding physical page frame address are stored in a common entry in the TLB for subsequent use.
TLBs also exploit locality inasmuch as a significant likelihood often exists that after a first memory access has occurred to a virtual address associated with a location within a given page frame, subsequent accesses to virtual locations associated with and located within the same page will occur after a relatively short delay time. Since the relative position of a virtual location within a page of virtual memory is the same as the relative position of a corresponding physical location within a corresponding page frame in physical memory, the same TLB entry can be used in translating any virtual location within a given virtual page to a physical location within a corresponding page frame. As such, low order virtual address bits are merely appended as low order real address bits onto the accessed real page address generated from the TLB to generate a real memory address. For further insight into paged memory systems including the use of TLBs, see S. A. Ward et al, Computation Structures (.COPYRGT.1990, MIT Press/McGraw-Hill Book Co.) pages 486-497 and D. A. Patterson et al, Computer Architecture--A Quantitative Approach (.COPYRGT.1990: Morgan Kaufmann Publishers), pages 432-438.
Consequently, when a TLB is in use, then prior to performing full address translation, the address translation process determines whether an incoming virtual page address resides within the TLB. If so, the corresponding page frame address is accessed therefrom and then used to form a real memory address which, in turn, is used to access main memory. If not, full address translation occurs, and a new entry in the TLB is created for the latest virtual page address and its corresponding page frame address. Hence, only those virtual addresses that have virtual page addresses which are not stored in the TLB are fully translated. Advantageously, this, in turn, drastically reduces the number of full address translations that must occur during program execution.
To facilitate rapid address translation, TLBs are typically implemented in hardware as a hashed set-associative table stored in a high speed memory--rather than in software as are page and segment tables. During operation, a TLB typically writes a new entry into a buffer location occupied by the least recently used entry in the TLB. Through the use of address hashing and parallel compares, particularly when performed in dedicated high speed TLB hardware, a single entry in a TLB can be accessed very quickly--often in less than a single machine cycle.
Given the substantial improvement in translation and overall memory access speed gained through the use of a TLB, the art has turned to several techniques aimed at increasing the speed at which a TLB operates. These techniques are typified by that described in, for example, U.S. Pat. No. 4,695,950 (issued to H. R. Brandt et al on Sep. 22, 1987) which discloses the concept of storing intermediate translations using a TLB during a double level address translation and U.S. Pat. No. 4,638,426 (issued to A. Chang on Jan. 20, 1987) which discloses the concept of translating a virtual address into a real address using an intermediate virtual address. Unfortunately, the TLB based addressing schemes disclosed in these patents, as well as that described above and known in the art, possess serious drawbacks.
Being hardware based, TLBs are finite in size. Generally, a TLB contains anywhere between typically 64 to 1024 separate entries with each entry containing approximately 64 bits. As such, a TLB can only store a certain number of the most recently translated virtual page addresses. Owing to the limited size of a TLB, various user programs that operate on large amounts of data, such as large matrices, routinely trigger successive TLB misses. The occurrence of a TLB miss causes the full address translation process, including accessing the segment and page tables and updating the TLB, to be performed along with its concomitant processing delays. If these misses occur frequently enough, then the efficiency gained through the use of a TLB will seriously degrade. Large matrices and other similar data structures engender a large number of TLB misses, therefore producing a large TLB miss ratio and significant processing delays.
In an attempt to counter the loss of performance resulting from processing data that has a high TLB miss ratio, one of two well-known techniques are frequently used. First, one technique calls for greatly increasing the size of the TLB to a size which is believed to significantly reduce the likelihood that a large number of TLB misses will occur. Inasmuch as a TLB is usually located in a critical path in a computer where accessing delays can not be tolerated, a TLB is necessarily implemented with high speed memory circuits which are generally very expensive. Hence, if the size of a TLB were to be greatly increased, then its cost would rise appreciably. In addition, this technique may be ineffective with certain processing applications, such as processing very large matrices or other similar data structures, which even with realistically large TLBs will nevertheless produce a significant number of TLB misses and resulting processing delays caused by translation overhead. A second technique calls for significantly increasing the page size, from, for example, 4K bytes to 1M byte, in an effort to greatly reduce the number of translations and associated overhead that are expected to occur. However, as the page size increases, an increasing amount of memory data must be swapped into and out of main memory during paging but only a small amount of memory data in any one page is usually being accessed at any one time by the processor. As such, increasing the page size causes increasingly inefficient memory usage. Though supercomputers often employ a large page size, the resulting memory inefficiencies effectively preclude use of this technique in a general purpose computer.
Thus a need exists in the art for a technique, particularly suited for use in, though not exclusively limited to, a general purpose computer, for increasing the efficiency of a TLB used in such a computer particularly when that computer is processing programs and/or accessing data which would otherwise generate a high TLB miss ratio. Advantageously, such a technique should not require the use of TLBs of significantly increased size or use of a relatively large page size.

Translation of multiple virtual pages upon a TLB miss

International Business Machines Corporation


A telephone interface device adapted for the transmission of recorded audio files over communication channels is disclosed. The telephone interface device comprises electronic circuitry contained within a case member. The circuitry includes a plurality of electrical connection jack members, each accessible via an aperture in the case member, with each electrical connection jack member in communication with at least one control switch member mounted in an aperture in the case member and operable from exterior the case member. The plurality of electrical connection jack members includes a first jack member adapted for connection to a telephone handset, a second jack member adapted for connection to a telephone headset, a third jack member adapted for connection to input of an audio file player device, a fourth jack member adapted for connection to output of an audio file player device, a fifth jack member adapted for connection to a speaker of an audio file player device, and a sixth jack member adapted for connection to a microphone. The control switch members include a first control switch member for selectively activating or deactivating the speaker of the audio file player device, a second control switch member for selectively sending audio from the speaker of the audio file player device to the telephone handset or sending audio files directly from the audio file player device to the telephone handset, a third control switch member for selectively connecting the telephone headset to the audio file player or the telephone handset, a fourth control switch member for enabling or disabling recording of audio by the audio file player device, and a fifth control switch member for enabling or disabling the microphone. A message generated by the audio file player device from a recorded audio file is transmitted through the telephone interface device to the telephone handset connected thereto.

1. Field of the Invention
The present invention relates to a telephone interface device and system and, more particularly, to a device and system that allows the transmission of recorded audio files over communication channels, as well as facilitating the recording of audio files on a suitable medium.
2. Background Information
In present day business, the accurate transfer or sharing of recorded information is extremely important. It is important that each individual in a sales force provide consistent information to prospective buyers for any and all of your company's product lines. Although it is preferable to contact prospective buyers in person, time constraints and the high cost of travel makes telephone contact and verbal presentations an attractive alternative. In another situation, a company often needs to provide training to those employees working at remote, on-site locations. Again, consistency in the training and associated information provided to such employees is paramount. These types of situations also arise in all levels of governmental organizations as well as private or public nonprofit organizations.
Thus, there is an unmet need for a cost effective system to provide for the above-described needs for both the private and public sectors of the economy.
Applicant has devised a device and a system for the accurate transfer or sharing of recorded information using readily available communication devices in cooperation with a device that allows the transmission of recorded audio files over communication channels.


A method and system for increasing the collection of network traffic data in a network based on the occurrence of predetermined criteria. A network appliance manages network traffic in the network and passes data traffic on the network. Network traffic data is collected based on the data traffic passing through the network appliance at a normal level. It is determined whether the network traffic data indicates an abnormal condition. The collection of network traffic data is increased through the network traffic appliance when an abnormal condition is detected. The network traffic data from the increased collection is stored in a memory device.

Commonly known local area networks (LAN), such as an Ethernet-based network, communicate data via packets having a set format. Control of packet traffic in a network is critical to insure balanced communication flow and efficient transmission. Such packets are sent between a source network node and a destination node over a communication medium such as coaxial cable or twisted pair wire. Each packet typically has a header that contains limited routing information and a payload.
The most common method of local area network communication is the Ethernet protocol, which is a family of frame-based computer networking technologies for local area networks. The Ethernet protocol is standardized as IEEE 802.3 and defines a number of wiring and signaling standards for the physical layer through means of network access at the Media Access Control (MAC)/Data Link Layer and a common addressing format.
The combination of the twisted pair versions of Ethernet for connecting end systems to the network, along with the fiber optic versions for site backbones, is the most widespread wired LAN technology. Ethernet nodes communicate by sending each other data packets that are individually sent and delivered. Each Ethernet node in a network is assigned a 48-bit MAC address. The MAC address is used both to specify the destination and the source of each data packet in the header. Network interface cards (NICs) or chips on each node normally do not accept packets addressed to other Ethernet nodes.
The speed of computer networks is increasing. Internal LANs with speeds of 1 Gb/s are ubiquitous. Backbones of 10 Gb/s are becoming more and more popular. Some enterprises are moving to 10 Gb/s for their internet gateway, which is already popular at the university institutions.
Network visibility is a desired feature. Network administrators want to know what traffic is on their network and this process takes up networking resources. Also when there are issues in the network, network managers want to investigate by understanding what was happening on the network at the time of the issue and the time leading up to the issue. Additionally when a customer investigates an issue, they typically want highly granular data relating to both network data and non-networking data and richness to the data as well as correlation between the data, so that they can accurately assess the issue.
There are protocols such as NetFlow that output summary information about each network transaction flow as it happens in order to assist network administrators. NetFlow export is a feature that was introduced on Cisco routers that provides the ability to collect IP network traffic as it enters or exits an interface. By analyzing the data provided by NetFlow, a network administrator can determine information such as the source and destination of traffic, class of service, and the causes of congestion. NetFlow records provide detailed visibility into network traffic. However NetFlow records can add 10-15% extra traffic volume on a network. At 1 Gb/s and certainly at 10 Gb/s this represents a large amount of data for a network system to capture and process. Also storing data about the traffic that passes through a network appliance that routes and controls network traffic in a fashion that supports the desired richness represents a large amount of data for a system to capture and process.
Thus, there is a need for a network traffic appliance that varies the type of data monitored on a network based on events in the network. There is also a need for conserving network resources based on the need for additional network traffic data. There is also a need for a network system to collect data from a variety of sources during certain abnormal circumstances.

Method and system for triggering augmented data collection on a network based on traffic patterns


A composition that comprises a) an admixing of at least one epoxy resin and aliphatic amine wherein the ratio of epoxy function group/amine is greater than 1; b) a conductive filler; c) one or more corrosion inhibitors, oxygen scavengers or both; d) imidazole as a curing agent/catalyst; and e) optionally other additives such as organic solvents, flow additives, adhesion promoters and rheology modifiers. The reaction of epoxy and aliphatic amine with excess epoxy functionality results in a flexible resin with remaining active epoxy groups. The compositions exhibit improved electrical stability and impact resistance over other conductive adhesive compositions that do not comprise the admixture.

Conductive compositions are used for a variety of purposes in the fabrication and assembly of semiconductor packages and microelectronic devices. For example, conductive adhesives are used to bond integrated circuit chips to substrates (die attach adhesives) or circuit assemblies to printed wire boards (surface mount conductive adhesives).
The leading technique used throughout the electronics industry for soldering components to the substrate uses a metallic solder alloy which is so called eutectic solder containing by weight 63% tin and 37% lead. It is applied to the circuit board as a paste which is heated to above its melting temperature (183° C.) to let solder paste melt and form joint. Alternatively, the board is passed over a molten wave of solder to form joints to bond the electrical components to the circuit board. In either case, a flux material is used to remove surface oxidation from metallic surfaces and allow the molten solder to strongly bond to the surfaces and form reliable solder joints with excellent impact resistance. While the solder technology has existed for many decades, it has several shortcomings. Lead in the alloy is not environmental friendly. Numerous environmental regulations have been proposed to tax, limit, or ban the use of lead in the electronic solders. Secondly, high process temperature requires to use more expensive thermo-stable substrate and does not fit flexible substrate that becomes more popular in the electronic industry. Another shortcoming is extra step to clean up the residue from flux material after reflow process which is an expensive and inefficient process.
Conductive adhesives offer several advantages over traditional solder assembly due to the absence of lead, low processing temperatures and a simplified assembly process that does not require solder flux and subsequent flux cleaning steps. Among the desired properties of conductive adhesives are long work life at room temperature, relatively low curing temperature and relatively short curing time, good rheology for screen printing, sufficient conductivity to carry an electric current when cured, acceptable adhesion to the substrate when cured, stable electrical resistance at high temperature and humidity over long periods of time, and good impact strength.
Previous testing of commercially available adhesives has concluded that conductive adhesives are suitable for only niche applications due to the limitation by resistance and impact requirements. Some vendor claimed success at develop an impact resistance adhesive and some vendor claim success at stable contact resistance. But none of them has been successful to achieve both impact resistance and stable contact resistance, especially with tin/lead surface. In fact, many adhesive vendors have acknowledged that impact strength and resistance stability are mutually exclusive parameters.
Two conductors with dissimilar electrochemical potentials will form an electrochemical cell in the presence of water. The conductors act as cathode and anode, and environmental humidity provides the necessary aqueous medium to bridge the anode and cathode. The metal with the lower electrochemical potential acts as the anode resulting in the loss of electrons {M−ne→Mn+} and the corrosion of the metal. The metal with the higher electrochemical potential acts as the cathode {2H2O+O2+4e→4OH−}. Oxygen is involved in this mechanism but does not directly react with the anode metal. The metal ion Mn+ will combine with OH− and form a metal hydroxide that stabilizes by developing into a metal oxide, which over time forms on the anode surface. Metal oxides in general are non-conductive, the result being a decrease in conductivity of the metal circuitry.
The problem is less acute when the filler in the composition is the same metal as the contiguous circuitry or the substrate. Thus, a semiconductor package using a conductive composition, one comprising an epoxy resin and silver filler, for example, will not be as susceptible to electrochemical failure when a silver-filled composition is used on a silver substrate. However, if the composition is used on a nickel-plated substrate, electrochemical corrosion will result under high humidity conditions.
These compositions, however, are vulnerable to environmental conditions, and high temperature and high humidity can cause the electrical resistance of the assembly fabricated with these compositions to increase substantially over time. The suspected mode of failure is electrochemical corrosion of the circuitry at the interface of the conductive filler in the composition with another contiguous metal surface, for example, a metal lead frame or other circuitry.
Another vulnerability of the compositions is their resistance to impact when the packaging containing the composition is dropped or struck. Most conductive adhesives are often thought as high Tg rigid materials. This rigidity will prevent effectively dissipate mechanical energy at impact test temperature, i.e. ambient temperature. Thus conductive adhesive cracks or component falls off from substrate when the whole packages drop from height. With high filled conductive filler, the impact resistance of conductive adhesives becomes even worse.
It would be an advantage, therefore, to provide conductive materials that form electrically stable assemblies for use in semiconductor packaging operations. It would also be advantageous to provide a conductive adhesive which would provide improved contact resistance when exposed to harsh environmental conditions and subjected to an impact. At the same time, it is important that the adhesive have a relatively long shelf life.

Conductive materials with electrical stability and good impact resistance for use in electronics devices

National Starch and Chemical Investment Holding Corporation


Multimedia contacts are forecasted, propagated, and managed for each period in a range. The number of contacts received in a period is forecasted using historical methods and is propagated to succeeding periods based on the business goals, such as how quickly a certain contact type is to be handled. After the contacts have been propagated, a total contacts to handle is determined for each period, and the staffing requirements are calculated therefrom.

A call center is an organization of people, telecommunications equipment and management software, with the mission of efficiently handling telephone-based customer contacts. A typical call center must balance competing goals. Customers should experience high quality and consistent service as measured, for example, by how long the customer's call must wait in queue before being answered, generally measured in terms of seconds or minutes. At the same time, this service should be provided at the lowest possible cost to the call center owner.
Workforce management systems provide important tools for meeting the goals of the call center. These systems generate forecasts of call received volumes and call handling times based on historical data to determine how much staff will be needed at different times of the day and week. The systems then create schedules that match the staffing to the anticipated needs.
As methods of communications expand, however, call centers are also expected to handle various forms of multimedia contacts, such as emails, faxes, web chat, and the like. Typically, these other types of multimedia contacts allow a slower response time than calls, such as minutes, hours, days, and the like. A call center expected to handle voice calls and multimedia contacts is generally referred to as a contact center.
Forecasting when to handle the new types of multimedia contacts in the same manner as calls is not efficient. First, handling the contact immediately after it is received is not necessary for certain media. For instance, if an email arrives at midnight, it may not be necessary to have the staff available to respond immediately when a response to the email can wait until the next business day, or some other time set by the competing business goals. Second, since the contacts do not have to be handled immediately, using the forecasted number of contacts received as the basis to plan staffing levels likely results in overstaffing, and hence inefficiencies, for a large portion of the time.
Therefore, there is a need to provide a method and a system for forecasting and planning staffing levels in contact center environments.

Method for forecasting and managing multimedia contacts


A joint is provided for cardan shafts, as are for instance, utilized in steering columns of motor vehicles and includes a trunnion cross provided as a coupling member, the axis length of the one pair of trunnions of this trunnion cross being larger than the axis length of the other trunnion pair, the trunnion pair having the greater axis length being supported in the end of one shaft configured as a bell-shaped joint part, while the trunnion pair having the smaller axis length on the hand is received by the arms of a fork, forming the end of the other shaft. The ratio of the lengths of the lever arms, on which the computation of the arising forces and moments is based, is only slightly greater than one, and the outer side of the bell or tulip shaped joint part is set off in a step like manner for receiving and/or abutting a bearing or a bearing ring. The center point of the joint lies in or closely to the central plane of the bearing or bearing ring received by the bell-shaped joint part.

The invention is directed to a joint for cardan shafts, for instance for steering columns of motor vehicles, which shafts have a coupling member configured as a cross pin or a trunnion cross, whose trunnions are rotationally supported in pairs in the end of the two shafts, at least one end of a shaft being configured as a fork.
In this connection, the joint for cardan shafts in the U.S. Pat. No. 2,271,974 must be mentioned. The end of the one shaft is configured to be bell or tulip shaped. A trunnion passing transversely through this joint part and forming a coupling member is supported in this joint part with a widened central portion comprising a central recess, at which central portion bearing bushes with their axes aligned diametrically with respect to each other are shaped or formed on. These bearing bushes are on the external side of the central portion and are offset through 90.degree. with respect to the trunnion axis. The bearing bushes accept a bolt passing through the central recess in the trunnion. The end of the other shaft projects into the central recess of the trunnion, with the shaft having a transverse bore penetrated by the central segment of the bolt. In the bell-like joint part, incisions emanate from its edge at diametrically opposite points, which incisions then widen in a keyhole-like manner. These incisions serve for receiving the trunnion as a coupling member. The width of these incisions corresponds to the diameter of the trunnion serving as a coupling member and the diameter of the adjacent widening corresponds to the external diameter of the housings of the needle roller bearings, which receive the ends of this trunnion. The housings of the needle roller bearings are fixed respectively by means of a lock screw. The coupling member used here is manufactured by machining or metal cutting. This known joint is impractical for a number of reasons, including those discussed below.
The fabrication of the coupling member by machining is too expensive for a mass produced article. Not only the central bore must be produced for receiving the end segments of the one shaft, but also the bores in the bearing bushes for receiving the transverse bolt. The incisions emanating from the edge of the bell-like joint portion, into which the trunnions of the coupling member are pushed during assembly of the joint, weaken this construction part to a considerable extent. Above all, however, the lever arms serving for the force and a moment transmittal for the one end segment of the one shaft protruding into the central recess of the coupling member are as unfavorable as can be imagined when compared to the lever length for the other shaft segment. Forces or moments which can be transmitted by a joint are determined by the load carrying capacity of the weakest link in the joint. Assuming the most unfavorable case for the lever arms on which the computation of the occurring forces and moments are based, namely that the trunnions or the bore carry load only at their outer end, then the length ratio of the two lever arms in this case amounts to approximately 4 to 1.5. Furthermore, it has to be remembered that the bearing carrying the one shaft is arranged on the side of the bell-shaped joint part, so that a not inconsiderable distance exists between the center of the joint and the mentioned shaft bearing, which favors the occurrence of bending loads.
A comparable design is known from the U.S. Pat. No. 1,003,017. Compared to the initially discussed design we are dealing here with an improved solution, since in this case the coupling member is designed as a single piece cross pin or as a single piece trunnion cross. Statements about the type of bearing arrangement in support of the shaft can, however, not be discerned from this publication. This also applies to the cardan shaft in DE-OS 28 18 167, which joint part proper is designed in a similar manner.
A steering shaft is also known from U.S. Pat. No. 4,608,891, which shaft is supported in a shaft tube and whose one end is configured as a fork of a joint, which is not disclosed in greater detail. A ball bearing is provided in the transitional region between the fork and the shaft. A comparable design is also shown in DE-OS 38 11 215. In both cases, the shaft is supported externally of its joint, so that a not inconsiderable distance exists between the center of the joint and the respective shaft bearing, which favors the occurrence of additional bending loads in the joint region, where, in any case high forces already exist for transmitting the torques.