A radio frequency (RF) to optical converter for RF imaging, wherein the converter comprises an array of RF antenna pixels adapted to receive RF signals, wherein the RF antenna pixels are adapted to facilitate RF resonance of the received RF signals; a photonic band gap (PBG) layer connected to the array of RF antenna pixels, the PBG layer comprising at least two materials, arranged in a photonic crystal (PC), wherein at least one of the materials comprises an electro-optic (EO) material, wherein the EO material is adapted to use the RF resonant signals to produce changes in optical properties of the EO material, and wherein the PC is adapted to use changes in optical properties of the EO material to produce enhanced changes in optical properties of the PBG layer; and an RF ground plane connected to the PBG layer.

1. Technical Field
The embodiments herein generally relate to radio frequency (RF) and photonics, and more particularly to near-millimeter wave (NMMW), terahertz (TH), and microwave (MW) imaging for use in remote sensing (either active or passive, and especially through obscurants), security scanning, medical scanning, and related applications.
2. Description of the Related Art
Within the context of the embodiments herein, "RF" includes MW, NMMW, and TH radiation. By historical convention, these wavelengths are commonly referred to in the literature as RF, even though the wavelengths are much shorter than those used for radio.
Imaging systems may be active, meaning that they include a source of radiation other than the object being viewed. Commonplace examples of active imaging systems are x-ray machines and cameras with a flash. Imaging systems may also be passive, meaning that they utilize only ambient radiation coming from the object of interest. Commonplace examples are cameras and camcorders using only daylight, and infrared viewers for rifle sights, medical imaging, or satellite imagery.
RF active and passive imaging systems are complementary to visible light and infrared (IR) imaging because they encompass wavelength "windows" for transmission through fog, rain, and certain materials, and can be used day and night. Also, certain RF wavelengths may have absorption spectrum features for certain chemical or biochemical species. Therefore, RF imaging systems have important applications for the military, homeland security, civilian aviation, automobile safety, and medical diagnosis.
Generally, there have been a limited number of previously known RF imaging systems. Typically, these have been and are being developed with traditional radar technology that involves sophisticated and expensive electronic circuitry and systems. In addition, previously known systems have generally not proven wholly satisfactory in operation. An important restriction so far has been in the small number of pixels, which is due to the need in these previous systems to directly couple each pixel to a RF detector containing active circuitry to down-convert the very high frequency RF to a low frequency signal that can be handled with conventional electronics. These RF detectors tend to be expensive, heavy, and consume large amounts of electrical power. In fact, the production and operating costs of the RF detectors are such that most RF imaging systems must typically employ scanning techniques to enable them to produce images with only a one-dimensional (1D) array of detectors or even with only one detector. Accordingly, there remains a need for a relatively inexpensive and user-friendly RF imaging system.

RF to optical converter for RF imaging with optical sensors

The United States of America as represented by the Secretary of the Army


Provided is an image forming apparatus which includes a cylindrical image carrier, on which at least an electrostatic latent image is formed, and a charge roller for non-contact charging the image carrier with a predetermined charge gap, and applies at least an alternating current (AC) voltage to the charge roller to non-contact charge the image carrier, wherein a predetermined number of partition members for partitioning an internal space of the image carrier into a plurality of sub-spaces are arranged at a central position of an axial direction of the image carrier or in the vicinity of the central position of the axial direction of the image carrier, in the image carrier.

1. Technical Field
The present invention relates to an image forming apparatus including an electrophotographic device, such as an electrostatic copier, a printer, a facsimile, or the like, which includes an image carrier, on which at least an electrostatic latent image is formed, and a charge roller for non-contact charging the image carrier by bringing gap members fixed on both ends thereof into contact with the image carrier and setting a predetermined charge gap with respect to the image carrier, and applies at least an alternating current (AC) charge bias to the charge roller.
2. Related Art
In the related art, as an image forming apparatus, an image forming apparatus which forms a predetermined charge gap and has a charge roller for non-contact charging an image carrier to perform a non-contact charging method is disclosed in JP-A-2001-296723. In the charge roller used in the image forming apparatus disclosed in JP-A-2001-296723, a resistance layer formed of a conductive elastic member is provided on the outer circumferential surface of a core, a pair of gap members of formed of an insulating film member having a stripe shape are wound in a ring shape to be adhered, and the pair of gap members are brought into contact with the outer circumferential surface of a photosensitive drum which is the image carrier such that the predetermined charge gap is set between the photosensitive drum and a charge portion of the charge roller between the pair of gap members.
Since the charge portion of the charge roller non-contact charges the photosensitive drum via the charge gap such that ozone can be suppressed from being generated and an extraneous material such as a toner attached to the photosensitive drum can be prevented from being attached to the charge roller or a material included in the resistance layer of the charge roller can be prevented from being attached, the capability of charging the photosensitive drum by the charge roller can be improved.
However, in the above-described non-contact charging method, if the charge gap between the photosensitive layer of the photosensitive body and the charge roller is uneven or a rapid environment variation occurs, charging failure may occur and thus image formation failure may occur. Accordingly, in the related art, this problem was solved by applying a charge bias, which is obtained by superposing a direct current (DC) voltage on an AC voltage, to the charge roller.
However, when the charge bias obtained by superposing the direct current (DC) voltage on the AC voltage is applied to the charge roller, the charge roller may vibrate due to the existence of the AC voltage and thus continuous vibration sound may be generated from the photosensitive body due to the vibration of the charge roller. This is because the charge gap is as small as about 20 μm, air in a minute gap between the photosensitive body and the charge roller exhibits a viscous property with respect to the vibration of the charge roller, and thus the photosensitive body and the charge roller integrally vibrate due to the existence of the viscous property of air.
Accordingly, a technology for suppressing the vibration sound of a photosensitive body by completely or substantially filling an elastic vibration suppression member, such as rubber, in the photosensitive body is suggested in JP-A-2003-302870. In the photosensitive body disclosed in JP-A-2003-302870, since the vibration sound of the photosensitive body is absorbed by the elastic vibration suppression member filled in the photosensitive body, the vibration sound of the photosensitive body is suppressed from being generated although the charge roller vibrates when the AC voltage is applied to the charge roller.


A development system, including a scenario generator for generating a plurality of sample interactions representative of interactions between a dialog system and a user of the dialog system on the basis of definition data for the dialog system. The definition data includes state machine code, prompt data, and recognition data. A simulator generates prompts of sample interactions on the basis of the prompt data, and the scenario generator generates responses to the prompts on the basis of the recognition data. A scenario editor allows a user to modify the sample interactions. A grammar learner then updates the prompt data and the recognition data on the basis of the modified sample interactions. An application builder generates the definition data from specification data provided by a developer, an application template, and/or an existing dialog application.

A dialog system has a text or audio interface, allowing a human to interact with the system. Particularly advantageous are 'natural language' dialog systems that interact using a language syntax that is 'natural' to a human. A dialog system is a computer or an Interactive Voice Response (IVR) system that operates under the control of a dialog application that defines the language syntax, and in particular the prompts and grammars of the syntax. For example, IVRs, such as Nortel's Periphonics™ IVR, are used in communications networks to receive voice calls from parties. An IVR is able to generate and send voice prompts to a party and receive and interpret the party's voice responses made in reply. However, the development of a dialog system is cumbersome and typically requires expertise in both programming and the development of grammars that provide language models. Consequently, the development process is often slower than desired.
One approach to reducing the time and expertise of developing natural language dialog systems is to use processes whereby a relatively small amount of data describing the task to be performed is provided to a development system. The development system can then transform this data into system code and configuration data that can be deployed on a dialog system, as described in International Patent Publication number WO 00/78022, A Method of Developing An Interactive System ("Starkie"). However, one difficulty of this process is that the development system needs to make numerous assumptions, some of which may result in the creation of prompts that, while understandable to most humans, could be expressed in a manner more easily understood by humans. For example, a prompt may be created that prompts a person to provide the name of company whose stocks they wish to purchase. The development system might create a prompt such as "Please say the company", whereas the phrase "Please say the name of the company whose stocks you wish to purchase" may be more understandable to a human interacting with the dialog system.
Another approach, described in Starkie, for reducing the time and expertise requirements for developing a natural language dialog system is to use processes whereby developers provide examples of sentences that a human would use when interacting with the dialog system. A development system can convert these example sentences into a grammar that can be deployed on a computer or IVR. This technique is known as grammatical inference. Successful grammatical inference results in the creation of grammars that:                (i) cover a large proportion of the phrases that people will use when interacting with the dialog system;        (ii) attach the correct meaning to those phrases        (iii) only cover a small number of phrases that people won't use when interacting with the dialog system; and        (iv) require the developer to provide a minimal number of example phrases.
The use of grammatical inference to build a dialog system is an example of development by example, whereby a developer can specify a limited set of examples of how the dialog system should behave, rather than developing a system that defines the complete set of possible examples.
Thus a development system can be provided with a list of interactions between a human and a dialog system using a notation that lists the sentences in the order they are spoken or written, indicating whether it is either the dialog system or the human that is speaking (or writing). This is referred to as an example interaction. Similarly, an example interaction can be defined by recording or transcribing the interactions between two or more humans. A benefit of this technique is that example interactions are understandable to anybody who understands the language contained within them. In addition, most people would be capable of creating example interactions of desired behaviour. There is also the benefit that example interactions describe specific behaviours, given a set of inputs, and therefore provide test cases for the behaviour of the dialog system. As they document specific behaviour, there is also a reduced risk of errors being introduced in the specification of the dialog system for the given behaviour listed in the example interactions. Example interactions are also ideal forms of documentation to describe the behaviour of the dialog system to others.
Example interactions can be annotated to include high level descriptions of the meaning of a sentence. This annotation might include the class of the sentence, and any key pieces of information contained in the phrase, known as slots. For example, the sentence "I want to buy three hundred acme bolt shares" might be annotated to signify that the class of the sentence is buy_stocks as opposed to sell_stocks, and that the quantity slot of the sentence is 300, while the stockname slot is "acme bolt".
An example interaction can be converted into a model that describes a sequence of sentence classes. One example of such a model is a state machine. A state machine is a model that causes an action or output to take place, depending upon the input it receives. A state machine can react differently to the same input, depending upon its current state. The state of a state machine can also change depending upon the input it receives. For example, a dialog system may respond differently to the sentence "yes i'm sure" depending upon whether it has just asked the question "are you sure you want to quit?" or the sentence "are you sure that you want to buy three hundred shares of acme bolt?".
Grammatical inference techniques can be used to create a state machine that can generate a sequence of symbols, using an example set of sequences. These techniques are typically applied to the creation of a class of grammars known as regular grammars. As a result, a state machine that defines all of the valid sequences of sentence classes in a dialog system can be inferred from a limited set of example interactions. To do this with a minimal number of training examples requires some assumptions to be made. In particular, this approach suffers from the following difficulties:                (i) The example dialogs need to be constrained in some way to allow easy generalisation. For instance, it is extremely difficult, if not impossible, for a current state of the art development system to automatically build a dialog system from a set of example interactions between two humans.        (ii) Specifying a dialog system using only a set of example interactions may require a large number of example interactions. The difficulty in doing this may outweigh any benefit of reduced speed of development.        (iii) Sentences in the set of example interactions need to be annotated consistently.        (iv) A set of example interactions contains only information that is visible to someone interacting with the dialog system. Example interactions contain sentences created by the dialog system and the human interacting with it, but not the sequence of internal interactions required to make decisions as to what sentences should be spoken by the dialog system.
Thus a development system for dialog systems that uses only example interactions is unlikely to meet the objectives of reduced development time and expertise. It is desired to provide a system and process for developing a dialog system that alleviate one or more of the above difficulties, or at least provide a useful alternative to existing development systems and processes.


A multicolor luminescent device comprising a color conversion material in which a plurality of shielding layers and a plurality of different color conversion layers are separately and repeatedly assembled on the same flat, alternating with each other, and an organic EL emitting material including a plurality of organic EL elements separately assembled on the same flat at each position corresponding to the plurality of color conversion layers, the color conversion material and the organic EL emitting material being disposed so as to sandwich a transmittable medium between them, characterized in that the distance (d.sub.1) between the color conversion material and the organic EL emitting material and the width (d.sub.2) of the shielding layer satisfy the equation, d.sub.2 .gtoreq.d.sub.1. This multicolor luminescent device has excellent characteristics in the angle of view, is capable of inhibiting the occurrence of color drift, and has excellent visibility and practical use

This invention relates to a multicolor luminescent device, especially to a multicolor luminescent device suitable for use in public and industrial indicators, color displays, and the like.
Electronic display devices which are generally called man machine interfaces transfer a variety of information from various machines to man via the organ of vision. The electronic display devices play an important role as interfaces linking man with machines.
There are an active type (light emitting type) and a passive type (light accepting type) for such electronic display devices. The active type includes, for example, a CRT (Cathode Ray Tube), PDP (Plasma Display Panel), ELD (Electro Luminance Display), VFD (Vacuum Fluorescent Display), and LED (Light Emitting Diode). On the other hand, the passive type includes, for example, an LCD (Liquid Crystal Display), ECD (Electro Chemical display), EPID (Electro Phoretic Image Display), SPD (Suspended Particle Display), TBD (Twisting Ball Display), and PLZT (Transparent Ceramics Display, transparent ferroelectric PLZT ((Pb, La) (Zr, Ti)O.sub.3 ceramic display).
Among these displays, the ELD is characterized in exhibiting high visibility due to self-emission and in having excellent impact resistance because of being completely a solid. At present, the development of variable ELDs using an inorganic or an organic compound as the emitting layer is being advanced. Especially, an organic ELD (or organic EL element) in which an organic compound is sandwiched between two electrodes is notable because it can use many sorts of organic compounds and efficiently emit a highly intensive light with a variety of colors.
The methods for preparing a full-color organic ELD include, for example, a method for separately positioning emitting parts of the organic EL elements on the same flat and emitting light with different colors, e.g. three primary colors, that is, red, blue, and green; and a method for separating or converting a monocromatic light using color conversion layers, e.g. a color filter or a fluorescent material.
However, it is necessary to exploit luminous materials of different colors for emitting lights of different colors, thereby providing multiple colors. There is also the problem of inferior durability in a process, for example, photolithography, for separately positioning the emitting parts of the organic EL elements on the same flat. In contrast, the latter method for separating or converting the monocromatic light using the color conversion layers is excellent and simple since it is only provided with a layer emitting a monocromatic color as the emitting layer.
However, because the color conversion layers are provided in addition to the organic EL elements in the latter method, gaps are made between the organic EL elements and the color conversion layers and also between the color conversion layers. These gaps cause light leakage from the organic EL elements and the color conversion layers so that the angle of view is narrowed (the phenomenon of color drift). Therefore, by this method, only a multicolor luminescent device with degraded visibility can be provided.
For this, disclosed is a method in which a transparent resin layer is provided between EL elements and color filters and the thickness of the transparent resin layer is less than the interval between pixels of the EL elements as shown in FIG. 15 (see Japanese Patent Application Laid-open No. 94878/1993).
However, there is no shielding layer in this structure. Light leakage from the side surface of the color filter layers is not prevented so that the problem of angle of view is insufficiently solved. Also, even if, for example, a fluorescent material is used instead of the color filter layers, it emits a fluorescent light more isotropically. As a result, light leakage is increased, thereby impairing the visibility.
Further, a multicolor luminescent device in which fluorescent media are arranged to accept the emitting light from the organic EL elements is disclosed (see Japanese Patent Application Laid-open No. 258860/1993). However, no light-shielding layer positioned between the fluorescent media is disclosed, as shown in FIG. 16. Therefore, the problem of angle of view is insufficiently solved by this method.
In addition, an EL panel is disclosed wherein spacers having a light-shielding capability and projecting almost vertically to the substrate surface of EL elements are disposed in the clearances between pixels of the EL elements while color filters face EL elements as shown in FIG. 17 (see Japanese Patent Application Laid-open NO. 94879/1993).
In this case, the problem of angle of view is solved, but the relation between the thickness of the light shielding layer and the thickness of the color conversion layer is not clearly disclosed. Also, the relation between the distance between the organic EL element and the shielding layer and the width of the shielding layer is not clearly disclosed. Therefore, a substantially full-color ELD cannot be manufactured.
Also, as shown in FIG. 18, a color display in which EL elements and color filters are facing each other is disclosed (see Japanese Patent Application Laid-open No. 40888/1988). However, there is no clear disclosure of the relation between the thickness of the light shielding layer and the thickness of the color conversion layer, and also there is no clear disclosure of the relation between the distance from the organic EL elements to the shielding layer and the width of the shielding layer in the same way as the above method. Therefore, a substantially full-color ELD cannot be manufactured.
This invention has been achieved in view of this situation and has an object of providing a multicolor luminescent device which has excellent characteristics in the angle of view, is capable of inhibiting the occurrence of color drift (color mixing), and has excellent visibility and practical use.


A pair of glasses includes a front frame, at least one lens, two temples, and two elongated couplers. The front frame is formed with two connection blocks at its two opposite ends. The front side of each connection block defines a cut. The rear side of each connection block is provided with two spaced lugs. The lens defines a cut corresponding to the cut of one connection block of the front frame. The front end of each temple is provided with a pivot pin that can be detachably fitted in the through-holes of the lugs of the connection block and the rear end of the elongated coupler, so that each temple is foldable relative to the front frame. The front end of each elongated coupler is provided with a hooked portion that can be detachably fitted into the cuts of the lens and connection block to install the lens.

1. Field of the Invention
The present invention relates to a pair of glasses and, more particularly, to a pair of glasses that can be replaced with lenses and temples more conveniently.
2. Description of the Related Art
With the upgrading of material life, people who pursue innovation and change pay more and more attention on portable decorative items, such as glasses. For increasing the aesthetic appearance and matching the clothes, sunglasses or casual glasses are gradually employed. Because sunglasses or casual glasses focus on fancy and a variety of changes, users often change the temples and/or the lenses of their glasses so as to match their moods and clothes. However, the existing sunglasses or casual glasses are difficult to replace their temples and lens. Even worse, users require replacing the entire glasses for changing the temples or lens, and this is uneconomical.
Generally, conventional glasses include a front frame, two lenses, and two temples pivotally connected to the front frame, wherein the front frame defines two slots for receiving the two lenses. In assembling the lenses, the lenses should be forced to be inserted into the slots of the front frame being somewhat of elasticity, the lenses may be broken or the front frame may be damaged during the assembling process. Furthermore, in conventional glasses, screws are usually employed to connect the temples and the front frame to allow the temples to be folded or unfolded relative to the front frame. Therefore, when a replacement for the temples is required, the user should use a screwdriver to unfasten the screw, and after new temples is positioned with the front frame, the user should also use the screwdriver to fasten the screw. The way of replacing the temples or lenses is inconvenient and time-consuming.

Glasses capable of replacing lenses and temples


A new and distinct Sweetbay Magnolia tree (Magnolia virginiana) named ‘MVMTF’ having a compact habit with dense canopy, profuse flowering from May to October with small light green leaves that mature to a dark green that is true to evergreen withstanding low winter temperatures and also capable of being reproduced reliability from vegetative cuttings.

The present invention relates to a new and distinct variety of Sweetbay Magnolia tree (Magnolia virginiana), which I have named 'MVMTF'.
Discovery
The new Magnolia virginiana is a product of chance discovery. The new variety 'MVMTF' is the result of a selection made by the inventor, Dwayne Moon, from a number of Magnolia virginiana seedlings planted in the spring of 2008 in a production field at Moon's Tree Farm, Inc, 6327 Hwy. 20, Loganville, Ga. in Walton County. Originally the seedlings were purchased in 2006 from a nursery in Florida which takes seeds collected in the wild, sows them in seed beds, lifts them and distributes them at the end of the year as Magnolia virginiana bare-root seedlings. Evaluation of this tree continues in a field at Moon's Tree Farm, Inc., 175 Happy Hollow Rd, Washington, Ga. in Wilkes County.
Propagation
'MVMTF' was asexually propagated by the method of vegetative cutting at my direction in the summer of 2009 at Moon's Tree Farm in Loganville, Walton County, Ga. This propagation from softwood cuttings and resulting progeny has proven the characteristics of my new variety to be genetically stable. Furthermore, these observations have confirmed that my new variety represents a new and improved variety of Sweetbay Magnolia tree as particularly evidenced by the smaller habit with full canopy, medium growth rate, and small light green new growth that matures to dark green in summer and holds foliage through the winter. These genetic traits can be consistently reproduced by asexual propagation.
Uniqueness
'MVMTF' was discovered in a block of seedling Sweetbay Magnolia trees purchased from a supplier of liners in Florida. I claim that the genetic characteristics of this tree are the result of naturally occurring cross-pollination. Due to the nature of the seedling purchase, comparison of surrounding cross pollinators is not possible. The characteristics of my new tree distinguish it from other typical seedling Sweetbay Magnolia trees and the known cultivars. At the time this tree was selected, I observed 'MVMTF' Sweetbay Magnolia tree as a 3″ caliper tree exhibiting a compact, dense canopy, profuse flowering from May to October with small light green leaves like (RHS 143D) that mature to a dark green like (RHS 137A) and which will remain evergreen throughout the winter. It also has the ability to withstand much lower winter temperatures than trees of the species. The remainder of the trees in this block had irregular structure and medium green foliage color and defoliates in winter.
Use
'MVMTF' was observed for a period of several years and is believed to be particularly useful for street tree planting and in large areas such as golf courses, commercial sites and parks. 'MVMTF' will also benefit growers who will profit from the desired look of a small native magnolia which has profuse flowering from May to October and which is able to hold its foliage all winter.


An animal chew may include a first elongated half and a second elongated half rotatably secured to the first elongated half, wherein the first and second elongated halves are rotatable around an axis of rotation. The animal chew may also include a locking pin retained between the first elongated half and the second elongated half, wherein the locking pin slides up and down the axis of rotation into a locked position and an unlocked position. The animal chew may further include a chamber having an opening and an interior volume, wherein the chamber is formed in at least one of the first elongated half and the second elongated half. When the locking pin is in the locked position, rotation of the first elongated half relative to the second elongated half is impeded.

Pet chews are commonly used to help satiate an animal's desire for chewing. Dogs, in particular, are driven to chew on objects for a variety of reasons. In addition to alleviating teething discomfort, dogs may chew to garner attention, alleviate boredom, redirect stress, or alleviate dietary imbalances. Chewing may also help to keep teeth clean.
A number of pet chews have been developed to receive and retain edible treats. The edible treats may retain the pet's interest in the chew, supplement the pet's diet, or may be used as a part of a reward system for the pet. The edible treats, such as biscuits or peanut butter, may be lodged within openings provided in the pet chew and may often extend out of the openings.
In one example of such a pet chew, the chew is molded as a hollow body. Treats may be inserted into the hollow cavity of the chew. The pet may try to dislodge the treats or lick the peanut butter out of the chew. In another example of such a pet chew, one or more cavities or pockets are provided in the pet chew, wherein the cavity openings are smaller in cross-section than the cavities. The treats may be lodged in or inserted through the openings.
Once the pet is finished with the edible treats or no longer has interest in the edible treats, it is often desired to remove the treats from the pet chew. It is often difficult to get any remaining bits out of the chew and clean the chew due to the very features that are used to retain the treats in the chew. Accordingly, room for improvement remains in pet chew design and, particularly, to providing a design where any remaining bits of an edible treat may be periodically cleaned out of a pet chew.


A method of immunizing a mammal against a tumor cell by exposing splenic or peripheral blood mononuclear cells to a peptide that encompasses a fusion joint of a fusion protein encoded by DNA spanning a human chromosomal translocation associated with Ewing's sarcoma (t(11;22)(q24;q12)) or alveolar rhabdomyosarcoma (t(2:13)(q35;q14)) is provided.

For many viruses, the greatest anti-viral immunity arises from natural infection, and this immunity has best been mimicked by live attenuated virus vaccines. However, in the case of HIV, such live attenuated organisms may be considered too risky for uninfected human recipients because such retroviruses have the potential risks of integrating viral genome into the host cellular chromosomes and of inducing immune disorders. To reduce these risks, an alternative is to use pure, well-characterized proteins or synthetic peptides that contain immunodominant determinants for both humoral and cellular immunity. An important component of cellular immunity consists of class I MHC restriction CD8.sup.+ cytotoxic T lymphocytes (CTL) that kill virus infected cells and are thought to be major effectors for preventing viral infection.
Cellular immunity is also a key component of the mechanism of tumor rejection. No previous cancer vaccine has shown much success in treating cancer. Most previous cancer vaccines that have been tried have involved whole cancer cells or cell extracts, which are poorly defined mixtures of many proteins. Prior methods to induce CD8.sup.+ CTL with synthetic peptides have been limited to antigens from foreign microbial pathogens, such as viruses and bacteria.
Present theories of tumor initiation and progression hold that tumor cells arise from mutational events, either inherited or somatic, that occur in a normal cell. These events lead to escape from normal control of proliferation in the cell population which contains the tumorigenic mutation(s). In many instances, mutations resulting in substitution of a single amino acid are sufficient to convert a normal cellular protein into an oncogenic gene product. The normal genes which encode the proteins susceptible to such oncogenic mutation are called "protooncogenes".
Ras is a typical protooncogene. The normal protein product of the ras gene is a GTPase enzyme which is part of the pathway that transduces biochemical signals from cell surface receptors to the nucleus of the cell. Mutations which inhibit or abolish the GTPase activity of ras are oncogenic. For example, the Ala.sup.59, Gly.sup.60 and Gln.sup.61 residue of the ras protooncogene are frequently mutated in human tumors (80).
Previous methods for producing CD8.sup.+ CTL have not shown the feasibility of inducing CTL against proteins that differ from the normal, "self" proteins by only a single amino acid substitution. However, it is clear from studies of tumor-infiltrating lymphocytes in humans, as well as from animal model studies, that CD8.sup.+ CTL can eradicate cancers in vivo.
No previous studies have shown the ability to immunize with a mutant synthetic peptide from a natural endogenous cellular protooncogene product to induce CD8.sup.+ cytotoxic T lymphocytes (CTL) that can kill tumor cells expressing a mutant endogenous gene product. Several studies have shown the ability to immunize mice with peptides to induce virus-specific or bacterial-specific CTL (P. Aichele et al (69); M. Schulz et al (42); W. Kast et al (41); J. Harty and M. J. Bevan, J. (77); M. K. Hart et al (79), but with the exception of Harty and Bevan, these have all required the use of adjuvants and high doses of peptide. Furthermore, since viral or bacterial proteins are foreign to the host, and it is known that it is possible to raise CTL to these, it was expected that any viral peptide immunization that succeeded would result in CTL that could kill cells expressing the foreign viral protein.
However, for oncogene products, or products of mutated tumor suppressor genes, for example p53, which reside primarily in the nucleus, it was not clear whether the mutant protein would be produced in sufficient amounts in tumor cells. Nor was it known if the protein would be processed through the appropriate cytoplasmic pathway to be presented by class I MHC molecules to CTL. It had also been questioned whether a single point mutation in a normal, endogenous protein would be sufficient to produce a CTL response.

Peptides containing a fusion joint of a chimeric protein encoded by DNA spanning a tumor-associated chromosomal translocation and their use as immunogens

The United States of America as represented by the Department of Health and Human Services


A trench-type insulated-gate semiconductor device is disclosed that includes unit cells having a trench gate structure that are scattered uniformly throughout the active region of the device. The impurity concentration in the portion of a p-type base region, sandwiched between an n+-type emitter region and an n-type drift layer and in contact with a gate electrode formed in the trench via a gate insulator film, is the lowest in the portion thereof sandwiched between the bottom plane of n+-type emitter regions and the bottom plane of p-type base region and parallel to the major surface of a silicon substrate. The trench-type insulate-gate semiconductor device according to the invention minimizes the variation of the gate threshold voltage.

A. Field of the Invention
The present invention relates to insulated gate semiconductor devices (hereinafter referred to as "IGBT's").
B. Description of the Related Art
In exploring the developments of electric power converters that exhibit low electric power consumption, power devices that play a key role in the electric power converters have been expected to exhibit low electric power consumption. Among the power devices, insulated gate bipolar transistors (hereinafter referred to as "IGBT's") are preferable to achieve a low ON-state voltage due to their conductivity modulation effects. Moreover, the IGBT's are controlled easily via their gate with a voltage applied thereto. Therefore, the use of the IGBT's has been established. The IGBT's may be classified into a planar IGBT and a trench IGBT. The planar IGBT includes gate electrodes formed along a chip surface. The trench IGBT includes gate electrodes buried in the respective trenches formed perpendicularly from a chip surface with an oxide film interposed between each gate electrode and the wall of the pertinent trench. The trench IGBT is more advantageous than the planar IGBT for increasing the channel density, since channels are formed in the side walls of the trenches. Therefore, the application fields for the trench IGBT are increasing.
Now the structure of the conventional trench IGBT as described above will be described in detail below with reference to FIG. 9. FIG. 9 shows a cross section of an n-channel IGBT including trench gates, the planar pattern of which includes stripes extending in parallel to each other. The cross section shown in FIG. 9 is cut perpendicular to the stripe-shaped trench gates.
Referring now to FIG. 9, a silicon wafer includes a lightly-doped n-type silicon substrate serving as drift layer 2-1, n+-type field stop layer 2-2 on a first surface of drift layer 2-1, and heavily-doped p-type thin collector layer 1-1, the impurity concentration of which is controlled, on field stop layer 2-2. A plurality of p-type base regions 3 are formed on a second surface of drift layer 2-1. In the surface portion of p-type base region 3, n+-type emitter regions 4 are formed selectively. Trench 20 is formed from the surface of n+-type emitter regions 4 to drift layer 2-1 through p-type base region 3. Gate electrode 6 made of electrically-conductive polycrystalline silicon is formed in trench 20 with gate oxide film 5 interposed between gate electrode 6 and the wall of trench 20. Interlayer insulator film 7 on trenches 20 insulates gate electrodes 6 from emitter electrode 8 formed on interlayer insulator film 7. Emitter electrode 8 is formed in such a manner that emitter electrode 8 is in electrical contact commonly with n+-type emitter regions 4 and p-type base regions 3 via windows formed through interlayer insulator film 7. Collector electrode 9 is formed on the back surface of p-type thin collector layer 1-1.
For bringing the trench IGBT shown in FIG. 9 into the ON-state, a voltage higher than the threshold voltage is applied to gate electrodes 6 in the state in which a voltage higher than the voltage applied to emitter electrode 8 is applied to collector electrode 9. As electric charges are accumulated to gate electrodes 6 by the voltage application described above, channels (not shown) inverted to the n-type are formed in the walls of p-type base regions 3 facing to respective gate electrodes 6 via gate oxide films 5. Electrons are injected from n+-type emitter regions 4 into drift layer 2-1 via the n-channels. The injected electrons bias collector junction 1-2 in forward and holes are injected from collector electrode 9, resulting in the ON-state of the trench IGBT. The voltage drop between collector electrode 9 and emitter electrode 8 in the resulting ON-state is the ON-state voltage.
For bringing the IGBT from the ON-state to the OFF-state, the voltage between emitter electrode 8 and gate electrode 6 is lowered below the threshold. By lowering the voltage, the electric charges accumulated in gate electrode 6 are discharged to a gate driver circuit via gate resistance. As the electric charges are discharged, the channel regions that have been inverted to the n-type return to the p-type, interrupting the electron path. Thus, the electron feed to drift layer 2-1 is interrupted. As the electron feed to drift layer 2-1 is interrupted, the hole feed from the collector side is also interrupted. Therefore, the electrons and holes accumulated in drift layer 2-1 are ejected to collector electrode 9 and emitter electrode 8, respectively, or recombine with each other. Thus, the electric current vanishes, bringing the IGBT to the OFF-state thereof.
Various improvements have been proposed to further lower the ON-state voltage of the trench IGBT. The injection enhanced gate bipolar transistor (hereinafter referred to as the "IEGT") disclosed in Unexamined Japanese Patent Application Publication No. Hei. 5(1993)-243561 (FIG. 101), which is a counterpart of U.S. Pat. No. 5,329,142 (hereinafter referred to as "JP 1993-243561") exhibits an extremely low ON-state voltage close to the ON-state voltage of the diode. The trench IEGT shown in FIG. 101 of JP 1993-243561 has a structure in which a part of the surface of an n+-type emitter region and a part of the surface of a p-type base region are covered with an insulator film such that the part of the emitter region and the part of the p-type base region are not in contact with an emitter electrode. The holes in the portion of the p-type base region not in contact with the emitter electrode are hardly ejected to the emitter electrode but liable to be accumulated. As a result, the carrier concentration distribution in an n-type drift layer is close to that in the diode. Therefore, the ON-state voltage of the disclosed trench IEGT can be set to be lower than the ON-state voltage of the trench IGBT. JP 1993-243561 names the effect which the disclosed trench IEGT exhibits an "IE effect."
Power devices have been required to exhibit high-speed switching performances in addition to exhibiting a low ON-state voltage. It has been an important object for conventional IGBT's to improve their high-speed switching performances. However, since trench structures are formed very densely in conventional trench IGBT and trench IEGT, the capacitance between the gate electrode and the emitter electrode is liable to be larger than usual, impairing the switching performance. Therefore, it also is important to reduce the capacitance between the gate electrode and the emitter electrode, which causes impaired switching performances.
Now the IEGT shown in FIG. 1 of the Unexamined Japanese Patent Application Publication No. 2001-308327 (FIG. 1), which is a counterpart of U.S. Pat. No. 6,737,705 (hereinafter referred to as "JP 2001-308327") will be described below with reference to FIG. 9 attached to the description of the present invention and equivalent to FIG. 1 of JP 2001-308327. The mesa region in the conventional IEGT, sandwiched by trench gates equivalent to those sandwiching region 11 in FIG. 9, is covered with an insulator film in the same manner as region 11 in FIG. 9. The mesa region potential floats in the same manner as the potential of region 11 in FIG. 9. (Here, "mesa" means "trapezoidal.") The portion of the trench gate structure in the conventional IEGT covered with an insulator layer does not exhibit all the primary functions effectively in the same manner as the portion of the trench gate covered with an insulator layer in FIG. 9. Therefore, the capacitance between the gate electrode and the emitter electrode in the conventional IEGT is reduced as compared with the usual IGBT, and the trench gate structure thereof exhibits all the primary functions effectively. The conventional IEGT disclosed in JP 2001-308327 shortens the charging and discharging times and reduces the switching loss.
Yamaguchi et al. have reported that the IEGT disclosed in JP 2001-308327 has problems to be solved with respect to its turn-on characteristics ("IEGT Design Criterion for Reducing EMI Noise", Proc. ISPSD 2004, pp. 115-119, 2004). The IEGT disclosed in JP 1993-243561 also has problems to be solved with respect to the turn-on characteristics. Therefore, it is a first object of the present invention to improve the turn-on characteristics.
It is essentially difficult for the IGBT shown in the above-described FIG. 9 to exhibit a high device breakdown voltage. The difficulty in obtaining a high device breakdown voltage poses a second problem for the IGBT shown in FIG. 9. Since the trenches are spaced apart from each other with unequal distances, the electric field distribution is liable to be nonuniform, causing electric field localization to the trench gate bottom. Therefore, the breakdown voltage of the IGBT shown in the FIG. 9 is liable to be lower.
To alleviate the first and second problems, Unexamined Japanese Patent Application Publication No. 2006-210547 (Abstract), which is a counterpart of U.S. Patent Application Publication No. US 2006/0163649 (hereinafter referred to as "JP 2006-210547"), and Unexamined Japanese Patent Application Publication No. 2000-228519 (FIGS. 6 and 7), which is a counterpart of U.S. Pat. No. 6,380,586 (hereinafter referred to as "JP 2000-210547"), disclose an IGBT, the perspective view of which is shown, for example, in FIG. 1 of the former document. The disclosed IGBT has a trench gate structure that includes trenches, the surface pattern of which includes a repetition of stripes extending in parallel to each other. The trenches dug in perpendicular to the semiconductor substrate surface are formed by etching the semiconductor substrate from its surface. The trench gate structure includes a gate electrode buried in each trench with an insulator film interposed between the gate electrode and the wall of the trench. The trench gate structure also includes p-type base regions and the extended portions of an n-type drift layer arranged alternately in the longitudinal direction of the semiconductor substrate surface between the trenches. In other words, the n-type drift layer extends between the p-type base regions between an adjacent pair of the trenches. The IGBT disclosed in these two documents and having the trench gate structure as described above exhibits a low ON-state voltage, low switching losses, improved turn-on characteristics, and a high breakdown voltage.
Now the IGBT disclosed in JP 2006-210547 will be described more in detail. The IGBT disclosed in JP 2006-210547 is characterized in that the mesa region thereof is connected to the emitter electrode via resistance to fix the mesa region potential so that the mesa region sandwiched by the trenches may not be a perfect floating region, the potential thereof is floating completely. The IGBT disclosed in JP 2006-210547, having the specific feature as described above, improves the turn-on characteristics thereof and obviates the first problem. As described in the above-described Yamaguchi et al., the potential of the mesa region in the floating state varies the gate potential in the process of turning-on. The gate potential variations destabilize the turn-on operation of the IGBT, causing problems in the controllability of the IGBT.
Removal of a floating region may be an essential measure for solving the above-described problem. However, if the floating region is simply removed, the usual IGBT, which does not exhibit any IE effect, will be obtained, causing a higher ON-state voltage. Therefore, a first measure of removing a floating region cannot be employed alone. So as not to impair the IE effect, it is necessary to use another measure together with removal of the floating region.
For example, the mesa region sandwiched between the trenches is divided into p-type regions and limited portions in the mesa region are provided with an emitter structure as a second measure. The second measure reduces the switching loss while suppressing the ON-state voltage of the trench IGBT as low as the ON-state voltage of the IEGT, and thus further reduces the total losses. If the first and second measures are employed together, the regions, in which the gate electrode faces the emitter structure, will decrease. Therefore, the electric field distributions in the base region and in the trench gate bottom will be nonuniform, further lowering the breakdown voltage of the device and impairing the reliability of the trench gate.
Therefore, it is necessary to employ a third measure to make the electric field distributions in the base region and in the trench gate bottom uniform in addition to the first and second measures. In detail, the n-type layer portion in the mesa region between the trench gates is set at a width narrow enough to be depleted easily by an applied voltage of several V to relax the electric localization to the trench gate bottom so that a high breakdown voltage may be obtained.
The IGBT disclosed in JP 2006-210547 and provided with the first through third measures facilitates making the electric field distribution near the surface of the device in the OFF-state thereof uniform and improving the breakdown voltage. Moreover, the IGBT disclosed in JP 2006-210547 and provided with the first through third measures facilitates reducing the capacitance between the gate electrode and the collector electrode. Thus, the IGBT disclosed in JP 2006-210547 and provided with the first through third measures also obviates the first and second problems.
However, the gate threshold voltage of the IGBT disclosed in JP 2006-210547 is liable to vary. This problem can be described in detail as follows. First, the structure of the IGBT disclosed in JP 2006-210547 will be described with reference to FIGS. 10-13. FIG. 10 is a perspective and cross sectional view of a trench IGBT taken in perpendicular to the wafer surface and trenches. FIG. 11 is a cross sectional view taken along line segment A-A of FIG. 10. FIG. 12 is a cross sectional view taken along line segment B-B of FIG. 10. FIG. 13 is a cross sectional view taken along line segment C-C of FIG. 10.
Referring now to these drawings, a silicon wafer includes heavily doped p-type collector layer 1-1, n+-type field stop layer 2-2, and lightly doped n-type drift layer 2-1. In the drift-layer-side surface portion of the silicon wafer, p-type base regions 3 are formed selectively. In p-type base region 3, n+-type emitter regions 4 are formed selectively. In FIG. 10, p-type base regions 3 are scattered such that p-type base regions 3 and the extended portions of lightly doped n-type drift layer 2-1 appear alternately in the longitudinal direction of trench 20. In the direction perpendicular to trenches 20, p-type base regions 3 are arranged such that p-type base regions 3 and the extended portions of lightly doped n-type drift layer 2-1 are positioned alternately with trench 20 interposed between base region 3 and the extended portion of drift layer 2-1. In the entire surface of the active region, in which an effective current flows, p-type base regions 3 are arranged in a staggered manner such that a checkered surface pattern is formed. It is preferable to arrange p-type base regions 3 in a staggered manner as described above, since p-type base regions 3 are distributed uniformly throughout the active region. The uniform distribution of p-type base regions 3 makes the electric field distribution uniform and prevents the IGBT from breakdown.
Trench 20 is filled with polycrystalline silicon gate electrode 6 working as a control electrode with gate oxide film 5 interposed between the wall of trench 20 and gate electrode 6. As shown in FIG. 11, a portion in the major surface of the silicon substrate, to which gate electrode 6 and drift layer 2-1 are extended, is covered with interlayer insulator film 7. On interlayer insulator film 7, emitter electrode 8 is formed such that emitter electrode 8 is in contact commonly with n+-type emitter region 4 and p-type base region 3. On the (back) surface of p-type collector layer 1-1, collector electrode 9 is formed. Since p-type base regions 3 are distributed in the surface of drift layer 2-1 between trenches 20 extended in parallel to each other, p-type base region 3 is expanded such that p-type base region 3 is diffused laterally only in the longitudinal direction of trench 20 from a window for ion implantation.
As shown in FIGS. 9-11, n+-type emitter regions 4 are disposed only adjacent to the trench side walls. Since the cross section B-B shown in FIG. 12 does not cut any n+-type emitter region 4, n+-type emitter region 4 is not shown in FIG. 12. In the cross section C-C shown in FIG. 13, n+-type emitter regions 4 are shown. In FIG. 10, the portion in which emitter electrode 8 is in contact commonly with n+-type emitter region 4 and p-type base region 3 is an emitter contact 10, illustrated by a shaded portion.
In the IGBT described in JP 2006-210547, p-type base regions 3, each shaped with a cell, are distributed in the active region surface. Therefore, electrons are injected radially from n+-type emitter region 4 in each cell to drift layer 2-1 via p-type base region 3 as illustrated by arrows 30 in FIG. 13. If the gate threshold voltage of a channel portion, on the most substrate-surface-side and designated by x, is lower than the gate threshold voltage of the other channel portions y, the gate threshold voltage of the entire semiconductor device will be determined by the channel portion x. In the portion x near to the substrate surface, the relative positional relation between the mesa region and the emitter region is liable to change. Since the peak concentration in the mesa region changes when the relative positional relation between the mesa region and the emitter region changes, the channel portion x is adversely affected easily by the gate threshold voltage deviating from the desired value and such causes. Therefore, the IGBT described in JP 2006-210547 causes a wider threshold voltage variation easily as compared with the IGBT described in JP 1993-243561.
In view of the foregoing, it would be desirable to obviate the problems described above. It would be also desirable to provide an insulated gate semiconductor device having a trench IGBT structure that distributes cell units having a trench gate structure throughout the active region and that can minimize threshold voltage variations.
The present invention is directed to overcoming or at least reducing the effects of one or more of the problems set forth above.

Insulated gate semiconductor device and the method of manufacturing the same

Fuji Electric Device Technology Co., Ltd.


A catheter device and method, in which a first lumen coupled to a balloon, a second lumen coupled to the first lumen, the second lumen having a distal opening to dispense an oxygenated infusate, and a third lumen coupled to the second lumen and coupled to a second balloon. The second balloon restricts the flow of the oxygenated infusate, and the oxygenated infusate provides oxygen to tissue at a distal end of said catheter device.

Atherosclerosis, a process in which the walls of the arteries thicken due to the accumulation of plaque in the blood vessels, is the cause of most coronary artery disease that can result in heart attacks, strokes, or inadequate circulation to the extremities. Arterial occlusions caused by plaque accumulation may necessitate major invasive surgery, such as a coronary by-pass procedure. However, less invasive, percutaneous methods may be an alternative in treating atherosclerosis. For example, percutaneous transluminal coronary angioplasty (PTCA) involves advancing a balloon catheter through a body lumen to a target treatment site. In one example, a small incision is made near the femoral artery to insert the catheter, which is then advanced to a plaque area in the coronary artery. The catheter has a deflated balloon near a distal end, and the balloon is positioned across the plaque. Once in position, the balloon is inflated to crack or flatten the plaque, thereby restoring the normal patency of the blood vessel. The balloon is then deflated so that the catheter can be removed, allowing blood flow to resume through the dilated blood vessel.
Another percutaneous catheter treatment method involves drug delivery catheters, which may be used alone or in combination with angioplasty balloons. For example, balloons having micropores may be used to deliver a therapeutic bioactive agent to break-up plaque build-up. One disadvantage of drug delivery catheters that utilize balloons is that the drug, once released from the catheter, requires sufficient time to diffuse into the vessel wall of the treatment site. Otherwise, the drug would be washed downstream by the blood flow. In order to provide sufficient resonance time for diffusion of the drug into the vessel wall, temporary blockage of blood flow upstream from the treatment site may be required. As such, a balloon may be expanded upstream from the treatment site to block blood flow. However, if blood flow is obstructed too long, tissue and organs downstream of the inflated balloon may suffer ischemic damage from lack of oxygenated blood. Ischemia occurs when there is an imbalance between oxygen supply and demand, usually caused by clogged arteries, that leads to insufficient oxygen to tissues such as the heart or brain. The two most common types of ischemia are cardiac and cerebral. Cardiac ischemia includes a continuum of conditions, from silent ischemia to angina to acute myocardial infarction (AMI or "heart attack"). Cerebral ischemia includes transient ischemic attacks (TlAs) and stroke. Consequently, the desired dose to a treatment site may not be achieved in a single procedure because the efficiency of drug diffusion into the vessel wall is not optimized, requiring multiple catheter procedures to adequately treat the target site.
Studies have shown that light activated drugs may be used to treat atherosclerosis. However, ischemia risks may be present with the delivery of light activated drugs. The light activated drug is sensitive to light at a specific intensity or frequency, subsequently targeting cells that have absorbed the drug. However, once released into the blood stream near a target treatment area, the drug requires a certain amount of exposure time to the light for activation, as well as time for the drug to be absorbed into the vessel wall of the treatment site. In order to increase the resonance time to deliver effectively a light activated drug, blood flow needs to be obstructed upstream of the drug delivery area, but this creates the danger of causing ischemia to tissue downstream from the target treatment site.

Catheters and methods of using catheters


Silica and boron are particularly removed at high rate in processing by the electrodeionization apparatus. An electrodeionization apparatus has an anolyte compartment 17 having an anode 11, a catholyte compartment 18 having a cathode 12, concentrating compartments 15, and desalting compartments 16. The concentrating compartments 15 and the desalting compartments 16 are alternately formed between the anolyte compartment 17 and the catholyte compartment 18 by alternately arranging a plurality of anion-exchange membranes 13 and a plurality of cation-exchange membranes 14. The desalting compartments 16 and the concentrating compartments 15 are filled with ion-exchanger. The anion exchanger/cation exchanger volume ratio is 8/2 to 5/5. Electrode water flows into the anolyte compartment 17 and the catholyte compartment 18. Concentrated water is introduced into the concentrating compartments 15. Raw water is fed into the desalting compartment 16 to produce the deionized water from the desalting compartment 16. Water containing silica or boron at a lower concentration than the raw water is introduced into the concentrating compartments 15 as the concentrated water in a direction from a side near an outlet for the deionized water toward a side near an inlet for the raw water of the desalting compartments 16. At least a part of concentrated water flowing out of the concentrating compartments 15 is discharged out of a circulatory system.

Deionized water is used for various purposes, for example, in plants such as for semiconductor production and liquid crystal display production, in industrial facilities such as for pharmaceutical industry, food industry, and electric power industry, even in households, and in laboratories. Electrodeionization apparatuses are frequently used to produce deionized water as described in Japanese Patent No. 1782943, Japanese Patent No. 2751090, and Japanese Patent No. 2699256. A conventional electrodeionization apparatus of FIG. 2 includes electrodes which consist of an anode 11 and a cathode 12, anion-exchange membranes (A membranes) 13 and cation-exchange membranes (C membranes) 14. The membranes are alternately arranged in such a manner as to alternately form concentrating compartments 15 and desalting compartments 16 between the anode and the cathode. The desalting compartments 16 are filled with anion-exchanger and cation-exchanger made of ion exchange resin, ion exchange fibers, or graft exchanger. In the desalting compartments 16, the anion-exchanger and cation-exchanger are in the mixed state or multiple-layered state. In FIG. 2, "17" represents an anolyte compartment, and "18" represents a catholyte compartment.
Ions flowing into the desalting compartments 16 react with the ion exchanger according to the affinity, concentration, and mobility of the ions and move through the ion exchanger in a direction of potential gradient. The ions further pass through the membranes to hold neutralization of charges in all of the compartments. The ions decrease in the desalting compartments 16 and increase in the concentrating compartments 15 because of the semi-permeability of the membranes and the polarities of potential gradient. This means that cations permeate the cation-exchange membranes 14 and anions permeate the anion-exchange membranes 13 so that the cations and anions are concentrated in the concentrating compartments 15. Therefore, deionized water (pure water) as product water is recovered from the desalting compartments 16.
Electrode water flows through the anolyte compartment 17 and the catholyte compartment 18. The water flowing out of the concentrating compartments 15 (concentrated water) and having high ion concentration is as the electrode water in order to ensure the electric conductivity.
Raw water is introduced into the desalting compartments 16 and the concentrating compartments 15. Deionized water (pure water) is taken out from the desalting compartments 16. Concentrated water in which ions are concentrated is discharged from the concentrating compartments 15. A part of the concentrated water is circulated into the inlets of the concentrating compartments 15 by a pump (not shown) in order to improve the product water recovery. Another part of the concentrated water is supplied to the inlet of the anolyte compartment 17. The reminder of the concentrated water is discharged as waste water out of a circulatory system in order to prevent the ion concentration in the circulatory system. Water flowing out of the anolyte compartment 17 is supplied to the inlet of the catholyte compartment 18. Water flowing out of the catholyte compartment 18 is discharged as waste water out of the circulating system.
The pH in the anolyte compartment 17 is lowered due to H+ generated by dissociation of water. On the other hand, the pH in the catholyte compartment 18 is increased due to generation of OH−. Thus, the acid water flowing out of the anolyte compartment 17 is introduced into the catholyte compartment 18 so that alkalinity in the catholyte compartment 18 can be neutralized, thereby eliminating damages due to scale formation.
There have been various reports indicating that the quality of the product water can be affected by the concentrated water in the above conventional electrodeionization apparatus. Filling activated carbon or ion-exchange resin into electrode compartments is disclosed in U.S. Pat. No. 5,868,915.
The above conventional electrodeionization apparatus do not remove silica and boron at extremely high ratio. For example, it is very difficult to remove silica at a rate of removal of 99.9 to 99.99% or higher.
There have been reports indicating that the concentrated water affects the product water, but there have been no reference to the relationship to silica and boron. Filling activated carbon or ion-exchange resin into electrode compartments can reduce the electrical resistance, but it can not reduce silica and boron.

This patent is subject to a terminal disclaimer.

Apparatus for electrodeionization of water


Disclosed is a reference voltage circuit which includes control means for exercising control so as to equalize a divided voltage that is output from a first current-to-voltage converting circuit having a diode-connected MOS transistor and voltage-dividing resistors and a divided voltage that is output from a second current-to-voltage converting circuit having a diode-connected MOS transistor and voltage-dividing resistors; a first current mirror circuit having a non-linear input/output characteristic for supplying currents to the first and second current-to-voltage converting circuits, respectively; a second current mirror circuit having a linear input/output characteristic for outputting a current proportional to the value of the current supplied to the first current-to-voltage converting circuit; and a third current mirror circuit having a linear input/output characteristic for outputting a current proportional to the value of the current supplied to the second current-to-voltage converting circuit. A third current-to-voltage converting circuit converts a current, which is the result of adding the output currents of the second and third current mirror circuits, to a voltage to supply the so converted voltage as a reference voltage.

A conventional CMOS reference voltage circuit is described in detail in the specification of Japanese Patent Kokai Publication No. JP-A-11-45125. In terms of obtaining a reference voltage by a current-to-voltage conversion, this reference voltage circuit naturally is the same as an earlier devised reference voltage circuit of this kind in which a temperature characteristic is cancelled out. However, in the earlier devised reference voltage circuit in which the temperature characteristic is cancelled out, a reference current having a positive temperature characteristic is converted to a voltage by a circuit comprising a resistor and a diode (or a diode-connected transistor), and the circuit obtains a voltage component in which the amount of voltage drop at the resistor has a positive temperature characteristic and a voltage component in which the forward voltage at the diode (or diode-connected transistor) has a negative temperature characteristic, and adds these temperature characteristics, thereby obtaining a reference voltage of about 1.2V in which the temperature characteristic has been cancelled out.
On the other hand, with the proposed reference voltage circuit described in the above-cited Japanese Patent Kokai Publication No. JP-A-11-45125, a reference current having almost no temperature characteristic is obtained, the current is converted to a voltage by an output circuit comprising only a resistor, and a reference voltage having any desired voltage value is obtained.
Accordingly, since 1.2V, from which the temperature characteristic has been cancelled out, stipulated as the output voltage of this conventional type of reference voltage circuit is obtained upon being converted to a current value within the circuit, the reference voltage circuit is outstanding in that in can be operated at a power-supply voltage of less than 1.2V.
In the textbook entitled "Analog Circuit Design Techniques for Applying CMOS to Mobile Wireless Terminals" (1999, published by Torikeppsu K.K.), the author of which is the present Inventor, a "Current-Mode-Type Reference Voltage Circuit" that was made public immediately within the same year is introduced and a detailed circuit analysis thereof is described.
In particular, in reference voltage circuits thus far, since use is made of a forward voltage of a diode (or diode-connected transistor) and this is a voltage component having a negative characteristic, a deviation from the temperature characteristic regarding the forward voltage of the diode (or diode-connected transistor) appears in the output voltage to a marked extent.
That is, although the forward voltage of the diode (or diode-connected transistor) possesses a negative temperature characteristic, the slope of the negative temperature characteristic becomes blunt as temperature falls.
On the other hand, a voltage having a positive characteristic is realized by obtaining a current, which flows into a resistor, owing to a difference voltage between forward voltages of two diodes (or diode-connected transistors) having different current densities, and converting this current to a voltage by the resistor.
In accordance with the content described in the patent document cited above, the operation thereof will be described. As shown in FIG. 7, a resistor R2 is divided into voltage-dividing resistors R2A and R2B and a divided voltage VB′ is output, and a resistor R4 is divided into voltage-dividing resistors R4A and R4B and a divided voltage VA′ is output. Furthermore, the common gate voltage of transistors P1 and P2 is controlled by an operational amplifier (an ordinary operational amplifier or a differential amplifying circuit) in such a manner that VA′=VB′ will hold.
Accordingly, we haveVA′=VB′  (1)
Further, currents I1, I2 that are output from p-channel MOS transistors P1, P2, respectively, are equal to each other.I1=I2   (2)
The current I1 is split into a current I1A that flows into a diode D1 and a current I1B that flows into a resistor R4 (=R4A+R4B). Similarly, the current I2 is split into a current I2A that flows into a serially connected resistor R1 and commonly into N-number of parallel-connected diodes D2, and a current I2B that flows into a resistor R2 (=R2A+R2B).
If we assume the following:R2=R4   (3)then Equations (4) and (5) below will hold.I1A=I2A   (4)I1B=I2B   (5)
Accordingly, we have the following:VA=VB   (6)
Further, if we assume that the forward voltages of diodes D1 and D2 are VF1 and VF2, respectively, then replacing, we have the following:.VA=VF1   (7)VB=VF2+ΔVF   (8)
From Equations (7) and (8), we have the following:ΔVF=VF1−VF2   (9)
The voltage drop across the resistor R1 is ΔVF, and the currents I2A and I1B are represented by Equations (10), (11), respectively, below.I2A=ΔVF/R1   (10)I1B=I2B=VF1/R2   (1)
Here the following holds:ΔVF=VT1n(N)   (12)where VT represents thermal voltage and is expressed byVT=kT/q   (13)where T represents absolute temperature [K], k the Boltzmann constant and q the unit electronic charge.
An output current 13 (=I2) of a p-channel MOS transistor P3 is converted to a voltage by a resistor R3, and an output voltage Vref is expressed by Equation (14) below.
                                                        Vref              =                              R                                                                                3                ×                13                                                                                =                              R                                                                                3                                                  {                                                            VF                                                                                1                        /                        R                                                                                2                                        +                                                                                [                                                      VT                                                                                1                                                                                n                                                                                (                                N                                )                                                                                ]                                                /                        R                                                                                1                                                        }                                                                                =                                                (                                      R                                                                                3                      /                      R                                                                                2                                    )                                                                  {                                                            VF                                                                                1                                        +                                                                  (                                                  R                                                                                2                            /                            R                                                                                1                                                )                                                                                [                                                  VT                                                                                1                                                                                n                                                                                (                              N                              )                                                                                ]                                                                              }                                                                                (        14        )
In Equation (14), {VF1+(R2/R1)[VT1n(N)]} is a voltage value of about 1.205V from which the temperature characteristic has been cancelled. More specifically, VF1 has a negative temperature characteristic (temperature coefficient) of about −1.9 mV/° C., and VT has a positive temperature characteristic (temperature coefficient) of 0.0853 mV/° C. Accordingly, the temperature characteristic of the output voltage Vref is cancelled out, and therefore the value of (R2/R1)1n(N) is 22.27.
Further, since VT is 26 mV at an ambient temperature, (R2/R1)[VT1n(N)] is approximately 579 mV at an ambient temperature. Accordingly, if we assume that VF1 is 626 mV at an ambient temperature, then {VF1+(R2/R1)[VT1n(N)]} will be approximately 1.205V.
The temperature characteristic will now be discussed in detail. A resistor R4 is connected in parallel with the diode D1. If the temperature is low, therefore, the value of the current I1B that flows into the resistor R4 (=R4A+R4B) tends to decrease owing to the non-linearity of the temperature characteristic possessed by the diode. On the other hand, a resistor R1 is connected in series with the diode D2. If the current I2A that flows into the diode D2 has a positive temperature characteristic, therefore, then the voltage VB across the diode D2 and resistor R1 will fall below the voltage VA (=VF1) at the diode D1.
Owing to control by the operational amplifier DA1, the two voltages (the voltage VA at diode D1 and the voltage VB across diode D2 and resistor R1) become equal. With an increase in current (the current I2A that flows into the diode D2) at a low temperature, therefore, the two voltages become equal. At a high temperature, on the other hand, the action is the reverse.
That is, in the circuit shown in FIG. 7, the currents I1A and I2A that flow into the diodes D1 and D2, respectively, are set to a temperature characteristic that is lower than the temperature characteristic decided by [VT1n(N)]/R1, and the currents (VF1/R2, VF1/R4) that flow into the resistors R2 and R4, respectively, increase slightly at a low temperature.
Thus, since the drive currents I1, I2 and I3 that are supplied from the p-channel MOS transistors P1, P2 and P3 act in a direction that cancels out the non-linearity of the temperature characteristic exhibited by the forward voltage of the diodes, the temperature characteristic of the reference voltage obtained can also be set to a characteristic that is very near a straight line having little fluctuation with respect to temperature.
Further, since the ratio of the resistors (R3/R2) does not possess a temperature characteristic, the reference voltage Vref that is output also is a voltage from which the temperature characteristic has been cancelled out. Here the resistor ratio (R3/R2) can be set at will.
If I<(R3/R2) is set, the output voltage Vref becomes a voltage higher than 1.205 V, and if I>(R3/R2) is set, the output voltage Vref becomes a voltage lower than 1.205 V
In the above-cited patent document, N=10 is described as the specific value of N. When the circuit is actually implemented [IEEE Symposium on VLSI Circuits (May)], however, N=100 holds.
In the CMOS process, the progress of finer patterning has resulted in MOS transistors of very small size. By contrast, the size of diodes that employ parasitic bipolar elements is greater than that of MOS transistors by an order of magnitude.
Further, since the ratio N between the diodes D1 and D2 in FIG. 7 is enlarged from one to two digits, the area on the chip is enlarged. [Patent Document 1]
Japanese Patent Kokai Publication No. JP-A-11-45125

Reference voltage circuit driven by non-linear current mirror circuit


A ringing signal is generated at one of a plurality of terminal stations in a SCPC-DAMA (single channel per carrier demand assigned multiple access) satellite communications system. The satellite communications system further includes a central station. Firstly, the central station determines a pair of speech channels in response to a call request from a calling terminal station via a control channel. Further, the central terminal determines a ringing signal pattern number by using a country code which has been sent via the control channel together with said call request. Following this, the central station applies the data indicting the pair of available speech channels to both of the calling terminal station and a called terminal station by way of another control channel. The called terminal station determines a ringing signal pattern using said ringing signal pattern number applied from the central terminal. The called terminal station generates a ringing signal which is used for alerting a destination subscriber terminal which is operatively coupled to the called terminal station.

1. Field of the Invention
The present invention relates generally to improvements in a satellite communications system, and more specifically to a method of generating a ringing signal in a DAMA (demand assigned multiple access) satellite communications system. A communication in the system is established on a SCPC (single channel per single carrier) basis. The present invention is able to provide the system with flexibility in terms of a system design in that a ringing signal at a given terminal station is changed without difficulty.
2. Description of Prior Art
Before turning to the present invention it is deemed preferable to describe, with reference to FIG. 1, a known satellite communications system to which the present invention is applicable.
In FIG. 1, the arrangements which are not directly concerned with the present invention are omitted merely for the sake of simplifying the disclosure.
As shown, a DAMA satellite communications system 10, which establishes a communication on a SCPC basis, includes a satellite 12, a central station 14, and a plurality of terminal stations (only two stations 16a and 16b are shown in this particular case). It is assumed that the terminal stations 16a and 16b are respectively located in different countries.
The central station 14 is provided with a controller 18 and a memory section 20. The controller 18 is arranged to supervise or control overall operations of the system while the memory section 20 stores data indicative of vacant channels which are available in the system 10.
The terminal station 16a is provided with a connection controller 22a and a ringing signal generator 24a. Similarly, the terminal station 16b has a connection controller 22b and a ringing signal generator 24b. Further, a plurality of subscriber terminals (only one is denoted by 26a in the figure) are coupled to the terminal station 16a. Similarly, a plurality of subscriber terminals (only one is denoted by 26b in the figure) are coupled to the terminal station 16b.
It is assumed that the subscriber terminal 26a of the terminal station 16a requests a call to the subscriber terminal 26b of the other station 16b. That is, the terminal stations 16a and 16b are respectively a calling and called station in this case. In order to establish a communication link between the terminal stations 16a and 16b, the station 16a transmits a call request to the central station 14 via a control channel CC1.
The controller 18 of the central station 14, in response to the call request from the station 16a via the satellite 12, determines if a pair of vacant speech channels is available. This check is accomplished by the controller 18 which refers to the memory section 20 which stores vacant channel data therein. It is assumed that a pair of speech channels VC1 and VC2 is available. Thus, the central station 14 advises, via another control channel CC2, the calling and called stations 16a and 16b that the speech channels VC1 and VC2 are to be used for communication between the terminal stations 16a and 16b.
In response to the above-mentioned replay relayed from the central station 14 via the control channel CC2, the connection controllers 22a and 22b initiate to establish the communication link between the stations 16a and 16b. At this time, the connection controller 22b of the terminal station 16b energizes the ringing signal generator 24b. Thus, a subscriber at the terminal 26b is alerted by the ringing signal applied to the subscriber terminal 26b.
A ringing signal is an AC (alternating current) or DC (direct current) signal sent out from the terminal station to a subscriber terminal.
It is known in the art that a ringing voltage, the frequency thereof and the interval (viz., period) of the application of the ringing voltage to the subscriber terminal are different with different countries. Throughout the instant disclosure, the aforesaid electric characteristics of a ringing signal are referred to as a ringing signal pattern.
When the terminal stations 16a and 16b are initially installed, each of the ringing signal generators 24a and 24b is adapted such as to exhibit the ringing signal (viz., ringing signal pattern) which is required in the area or country in which the terminal station is located. Each of the ringing signal generators 24a and 24b is a circuit which is usually prepared using a plurality of discrete electric components in order to generate a required ringing signal.
Therefore, the above-mentioned prior art has encountered the drawback in that the ringing signal generator is fixedly adjusted to produce a predetermined ringing signal and thus is very difficult to be changed to generate a different signal if such a requirement occurs.

Method of generating a ringing signal in a satellite communications system


An optical disk drive includes a light source, a light focusing element, a light-focusing-element moving mechanism, a detecting unit, a holding unit, and first and second control units. The light focusing element arranged so as to be opposed to a disk on which a signal is recordable is capable of focusing light emitted from the light source as near-field light on the disk. The detecting unit detects a state where the moving mechanism approaches the light focusing element to the disk such that the light is focused as near-field light on the disk and outputs a detection signal upon detection. The holding unit holds a voltage applied to the mechanism in response to the detection signal and is capable of releasing the held voltage. The first and second control units perform first and second control operations to control the distance between the light focusing element and the disk.

1. Field of the Invention
The present invention relates to an optical disk drive for performing at least one of writing and reading of signals using near-field light, an optical disk apparatus mounted with the drive, and a method for driving the apparatus.
2. Description of the Related Art
To increase the recording density of an optical disk on which data is written or read using laser light, an optical disk apparatus for writing or reading signals using near-field light has recently been proposed. According to a proposed technique for the optical disk apparatus utilizing near-field light, a gap between an optical disk and the end surface of a solid immersion lens (SIL) disposed in a light focusing element, such as an objective lens unit, is controlled to be a distance (near field) where near-field light is generated. The distance is generally half the wavelength of input laser light. For example, in the use of blue-violet laser light with a 400-nm wavelength, the distance is approximately 200 nm.
Upon starting control of the gap, an overshoot of 1 μm or less may occur. In a far-field optical system in an optical disk apparatus for writing or reading signals on a compact disk (CD) or a digital versatile disk (DVD), the overshoot is insignificant. In an optical recording and playback apparatus using near-field light, the overshoot is a serious problem. In other words, if the overshoot of 1 μm or less occurs upon starting the control, the SIL collides with the disk, resulting in damages of them.
One approach to solving the above-mentioned problem uses a technique for controlling the gap on the basis of the amount of returning laser light reflected from the disk. For instance, in the case of using laser light of a 400-nm wavelength, when the gap length is generally half the wavelength or less, a near-field state is produced. Accordingly, assuming that the gap is more than 200 nm, i.e., in a far-field state, when light emitted from a laser source is incident on the end surface of the SIL at an angle at which total reflection occurs, the light is totally reflected by the end surface of the SIL, so that the amount of returning light is constant. When the gap length is 200 nm or less, i.e., in the near-field state, light incident on the end surface of the SIL at the angle of total reflection partially passes through the end surface thereof, so that the amount of returning light is reduced. When the gap between the SIL and the disk is zero, i.e., when the SIL is in contact with the disk, the entire light incident on the end surface of the SIL at the angle of total reflection passes through the end surface thereof, so that the amount of returning light is zero. In this technique, the amount of returning light is detected by a photodetector and data indicating the detected amount is fed back to an actuator (e.g., a two-axis device for performing focusing servo and tracking servo operations) for the SIL, whereby a gap servo operation is performed. This approach is disclosed in, e.g., U.S. Pat. No. 6,701,913 (Patent Document 1).
Another approach utilizes a technique for setting a threshold used to determine, e.g., whether the near-field state is produced, approaching the SIL to the disk until the threshold is detected, adding a servo voltage to an approach voltage after the threshold is detected, and then performing the gap servo operation. This approach is disclosed in, e.g., Japanese Unexamined Patent Application Publication No. 2004-30821 (Patent Document 2). In this case, the approach voltage is a ramped voltage (see FIG. 8 of Patent Document 2). Since the SIL is moved at the initial velocity upon starting to approach to the disk, the SIL fluctuates at the start of the approach (refer to FIG. 12 of Patent Document 2). After that, the SIL is moved in accordance with the ramped voltage that is reduced to a target value (corresponding to a target gap of several tens of nm).

Optical disk drive using near-field light, optical disk apparatus, and method for driving the apparatus


The shortcomings of the prior art are overcome and additional advantages are provided through the provision of a self-centering nest for testing of microprocessor chip modules. The self-centering nest includes two slideable jaws disposed on a base diagonally opposite each other. Each jaw includes a jaw pin that is receptive in a carrier, such that when the jaw pins are received in the carrier, the jaws are in an open position. The self-centering nest includes a transfer mechanism for urging a microprocessor chip module from the carrier into the self-centering nest. The self-centering nest includes a plurality of springs, each spring having a first end connected to the first slideable jaw and a second end connected to the second slideable jaw. The springs cause the jaws to move toward each other capturing and centering the microprocessor chip module when the jaws are pulled away from the carrier releasing the jaw pins.

1. Field of the Invention
This invention relates to the testing of integrated circuit modules, and particularly to an apparatus for securing and centering an integrated circuit module for testing.
2. Description of Background
When modules comprising microprocessor chips are manufactured, the modules are typically subject to functional testing. The testing is performed to determine a module's individual performance, or to burn in the module at various operating voltages, clock speeds, and power levels, while the module is in a known operating range.
Test fixtures are utilized to locate the module in a proper orientation and to hold the module in place for testing. The test fixtures, however, are often configured to accommodate the largest module allowed by the module's design specifications. For example, if a square-shaped module design is 25 mm×25 mm+/−0.2 nm, the test fixture will be designed and manufactured for a module that is 25.2 μm×25.2 mm. When a smaller module, within its design tolerance, is placed in the test fixture, the smaller module may rotate or otherwise move in the test fixture. The movement or rotation can cause an open circuit or a short circuit during testing, can increase wear of the test fixture, and can increase overall test time because of additional retesting that is required.
What is needed is a test fixture that automatically adjusts to the size of the module to be tested, therefore reducing issues described above.

Self-centering nest for electronics testing

International Business Machines Corportion


In order to provide a thin-film resistor and a manufacturing method thereof capable of restraining reduction of a Q-value of varactor by reducing a parasitic capacitance between the resistor and the substrate, the thin-film resistor includes a semiconductor substrate 10 including an integrated circuit 12 having a plurality of electrode pads 14 placed in a distance from each other in the most upper part of a plurality of stacked interconnections, and the integrated circuit 12 having a passivation film 16 formed between the plurality of electrode pads 14; a secondary interconnections 18 electrically connected to the electrode pads 14; an insulating film 20 formed in a place in between the secondary interconnections 18 on the passivation film 16; and a resistor 26 formed 18 in a predetermined place in between the secondary interconnections 18 on the insulating film 20.

1. Field of the Invention
The present invention relates to a thin film resistor element and a manufacturing method thereof, more particularly, to a thin film resistor element and a manufacturing method thereof using the wafer level chip size package technology.
This is a counterpart of Japanese patent application Serial Number 117576/2008, filed on Apr. 28, 2008, the subject matter of which is incorporated herein by reference.
2. Description of the Related Art
Regarding mobile communication equipments, more requests for higher functions and downsizing have been made progressively, and furthermore, development of lower-power-consumption electric components for the mobile communication equipments has become an important problem, in a prediction that stable operations thereof using longer-life batteries and the energy regeneration technology will become necessary.
According to the Japanese Patent Application Laid-Open Publication No. 2006-186038 and No. 2005-136360, the technology for improving packaging density by forming and integrating resistors, inductors, or capacitors in higher density in insulating films, corresponding to the above-mentioned requests.
In addition, to the above-mentioned requests for lower power consumption, LSIs using the CMOS process technology have become remarkable as higher-frequency analog ICs of radio wave communications. In higher-frequency analog LSIs, voltage-controlled oscillators (VCOs) used for local oscillators are blocks consuming extra-large currents, and lower current consumption VCOs are considered to be effective to reduce the power consumption of the whole chip.
However, since the conventional VCOs uses polysilicon formed at the same time as the gate electrodes formed as resistors, the above resistors lie in between in the vicinity of the substrate. That is, parasitic capacitances between the substrate and the resistors are large, and then quality factor (Q-value) of the passive elements of the VCOs decreases.
In a typical VCO, passive elements such as inductors, varactors, or resistors are formed on-chip. Since the VCO oscillates theoretically by resonance caused by LC, the higher Q-value have the inductors and the varactors, the smaller loss has the resonance circuit, and then it becomes possible that an oscillation using smaller current realizes lower power consumption.
As one of the above passive elements, the varactor varies the capacitance by an applied DC bias voltage, and a resistor of around 3000Ω is usually inserted to a control terminal for applying the DC bias voltage in order to prevent high-frequency signal leakage to the above control terminal. In the case where the above resistor has ideal resistor characteristics, the above-mentioned higher Q-value can be obtained.
Generally, polysilicon used for forming gates of transistors is used as the on-chip resistors inserted between the varactors. Since the polysilicon is formed on a lower layer of wafer process, the distance to the substrate is short. Consequently, a parasitic capacitance is equivalently loaded between the grounds points by capacitive connections between the resistors and the substrate. Subsequently, the impedance decreases in higher frequency region, and an apparent Q-value of the varactor decreases.

Thin film resistor element and manufacturing method of the same