The molding apparatus includes a pattern plate carrier for air-pressurized compaction processes. The carrier is equipped with air venting structure running along the inner contour of the mold box of the sand molding apparatus in the form of elongated slotted bars.

The present invention relates to a pattern plate carrier for air-pressurized compaction processes and, more particularly, a carrier for supporting a pattern plate in a sand mold making process wherein the carrier is equipped with air venting structure running along the inner contour of the molding box of the sand molding apparatus.
In modern sand molding processes used to produce sand molds for casting molten metal, compressed air is made to flow vertically from the top of the sand located in the sand mold to the bottom. In order to obtain better compaction of the sand on the pattern in the molding apparatus, particularly in the marginal zones along the interior wall of the molding box, the compressed air flowing in on the upper side of the molding box and vertically down through the molding sand must be able to escape on the pattern side of the molding box. Heretofore, this has been accomplished by providing orifices in the pattern plate in the form of round nozzles in the area of the pattern plate between the pattern and the molding box, see for example German Patentschrift 26 08 740. As a result of the foregoing, the area of the pattern plate which can be utilized is greatly reduced.
Naturally, it would be highly desirable to provide a sand molding apparatus which would allow for the air flowing through the sand material to escape on the pattern side of the mold while at the same time allowing for high utilization of the area of the pattern plate thereby resulting in higher casting yield per mold box.
Accordingly, it is the principal object of the present invention to provide an apparatus as aforesaid which allows for an enlarging of the pattern plate area utilized in a molding box thereby resulting in higher casting yield per molding box.
It is a further object of the present invention to provide a pattern plate carrier with venting structure for allowing air to escape the molding space on the pattern side of the molding box.
It is a particular object of the present invention to provide a pattern plate carrier as aforesaid which includes elongated slotted bars around the periphery of the pattern plate for venting air.
It is a still further object of the present invention to provide a pattern plate carrier which is simple in structure and efficient in operation.
Further objects and advantages of the present invention will appear hereinbelow.

Molding apparatus including vents comprising elongated slotted bars


Tailoring textual content to a target audience by receiving an input of a user, wherein the input of the user includes textual data, identifying a target audience of the textual data based at least in part on the input of the user, determining a style of the target audience, wherein the style is a variety of language used by the target audience, generating a modification recommendation to the textual data of the input of the user based at least in part on the textual data and the determined style.

The disclosure relates generally to natural language generation. The disclosure relates particularly to tailoring textual content to a target audience.
Natural language processing (NLP) is a subfield of linguistics, computer science, and artificial intelligence (AI) concerned with the interactions between computers and human language, in particular how to program computers to process and analyze large amounts of natural language data. The result is a computer capable of "understanding" the contents of documents, including the contextual nuances of the language within them. The technology can then accurately extract information and insights contained in the documents as well as categorize and organize the documents themselves.
Natural-language generation (NLG) is a software process that produces natural language output. NLG can be compared to the process humans use when they turn ideas into writing or speech. Psycholinguists prefer the term language production for this process, which can also be described in mathematical terms, or modeled in a computer for psychological research. NLG systems can also be compared to translators of artificial computer languages, such as decompilers or transpilers, which also produce human-readable code generated from an intermediate representation.

International Business Machines Corporation


Provided are methods for fabricating semiconductor devices incorporating a fin-FET structure that provides body-bias control, exhibits some characteristic advantages associated with SOI structures, provides increased operating current and/or reduced contact resistance. The methods for fabricating semiconductor devices include forming insulating spacers on the sidewalls of a protruding portion of a first insulation film; forming a second trench by removing exposed regions of the semiconductor substrate using the insulating spacers as an etch mask, and thus forming fins in contact with and supported by the first insulation film. After forming the fins, a third insulation film is formed to fill the second trench and support the fins. A portion of the first insulation film is then removed to open a space between the fins in which additional structures including gate dielectrics, gate electrodes and additional contact, insulating and storage node structures may be formed.

1. Field of the Invention
The invention relates to methods for manufacturing semiconductor devices, and more particularly, to methods for manufacturing semiconductor devices that include fin-type channel regions.
2. Description of the Related Art
Field effect transistors have been manufactured with fin channel structures (hereinafter, referred to as fin-FETs) for improving certain device performance parameters in the resulting semiconductor devices. One example of a memory cell utilizing a fin-FET structure is disclosed in U.S. Pat. No. 6,664,582 to David M. Fried et al. ("Fried") entitled "FIN MEMORY CELL AND METHOD OF FABRICATION," and another example can be found in U.S. Pat. No. 6,876,042 to Bin Yu et al. ("Yu") entitled "ADDITIONAL GATE CONTROL FOR A DOUBLE-GATE MOSFET" which discloses a fin-FET including fins formed on an insulation layer.
Because the top surfaces and side surfaces of the fins in a fin-FET can be used as channel regions, fin-FETs can have wider channel regions than planar transistors formed in the same surface area. Accordingly, fin-FETs can provide increased operation current, thereby providing improved performance relative to corresponding planar transistors.
The fin-FETs disclosed in both Fried and Yu, however, are fabricated using silicon-on-insulator (SOI) substrates in which the fins are insulated from the bulk substrate bodies. Accordingly, the threshold voltage of the fin-FET transistors cannot be effectively controlled using body-bias, thereby complicating efforts to control the threshold voltage of the resulting CMOS transistors. However, if a conventional bulk substrate is used to allow for more effective body-bias control, the resulting increase in the extent of the drain depletion region tends to increase a junction leakage current, off current, and junction capacitance, thereby degrading the performance of the semiconductor devices. In addition, in highly integrated devices, there tend to be additional deceases in threshold voltage and corresponding increases in off current as a result of short channel effects.
Another problem associated with fin-FETs is high contact resistance. According to Fried, for example, the fin-FET includes bit line contacts formed across and contacting the top surfaces of the fins. However, because the bit lines contact only the narrow top surfaces of the fins, the resistance of these bit line contacts may be very high and will tend to degrade the performance of the resulting devices. The configuration of the fins may be modified, for the example, the fins may be bent, in order to increase the area available for forming the bit line contacts and reduce the contact resistance. Reconfiguring the fin structure, however, tends to increase the complexity of the semiconductor device fabrication, thereby increasing costs and tending to suppress yield.
According to Yu, the sizing of the source and drain regions in contact with fins may be increased to provide greater contact area. However, as the distance between the fins is increased to accommodate the enlarged source and drain regions, the overall degree of integration of the resulting fin-FET device will be reduced.
Another problem associated with fabricating fin-FETs is damage to and/or collapse of the thin fins protruding from a substrate. The likelihood of such damage or collapse increases as the widths of the fins is reduced. For example, as illustrated in Fried, elongated fins project from the substrate and are not initially provided with any supporting or reinforcing structures. Accordingly, forming the fins as suggested by Fried produces fin structures that are susceptible to mechanical damage and which may collapse or suffer damage during subsequent fabricating processes.

Method of fabricating a semiconductor device having a single gate electrode corresponding to a pair of fin-type channel regions


The invention relates to the field of video compression and, more specifically, to a video encoding method applied to an input sequence of frames in which each frame is subdivided into blocks of arbitrary size. This method comprises, for at least a part of the blocks of the current frame, the steps of: generating on a block basis motion-compensated frames obtained from each current original frame and a previous reconstructed frame; generating the said motion-compensated frames residual signals; using a matching pursuit algorithm for decomposing each of the generated residual signals into coded dictionary functions called atoms, the other blocks of the current frame being processed by means of other coding techniques; coding said atoms and the motion vectors determined during the motion compensation step, for generating an output coded bitstream; said method being such that any atom acts only on one block B at a time, said block-restriction leading to the fact that the reconstruction of a residual signal f is obtained from a dictionary that is composed of basis functions gγnæBrestricted to the block B corresponding to the indexing parameter γn, according to the following 2D spatial domain operation: gγnæB(i,j)=gγn(i,j) if pixel (i,j)εB; gγnæB(i,j)=0 otherwise (i.e. (i,j)∉B).

In the current video standards (up to the video coding MPEG-4 standard and H.264 recommendation), the video, described in terms of one luminance channel and two chrominance ones, can be compressed thanks to two coding modes applied to each channel: the "intra" mode, exploiting in a given channel the spatial redundancy of the pixels (picture elements) within each image, and the "inter" mode, exploiting the temporal redundancy between separate images (or frames). The inter mode, relying on a motion compensation operation, allows to describe an image from one (or more) previously decoded image(s) by encoding the motion of the pixels from one (or more) image(s) to another one. Usually, the current image to be coded is partitioned into independent blocks (for instance, of size 8×8 or 16×16 pixels in MPEG-4, or of size 4×4, 4×8, 8×4, 8×8, 8×16, 16×8 and 16×16 in H.264), each of them being assigned a motion vector (the three channels share such a motion description). A prediction of said image can then be constructed by displacing pixel blocks from a reference image according to the set of motion vectors associated to each block. Finally, the difference, or residual signal, between the current image to be encoded and its motion-compensated prediction can be encoded in the intra mode (with 8×8 discrete cosine transforms—or DCTs—for MPEG-4, or 4×4 DCTs for H.264 in the main level profile).
The DCT is probably the most widely used transform, because it offers a good compression efficiency in a wide variety of coding situations, especially at medium and high bitrates. However, at low bitrates, the hybrid motion compensated DCT structure may be not able to deliver an artefact-free sequence for two reasons. First, the structure of the motion-compensated inter prediction grid becomes visible, with blocking artifacts. Moreover, the block edges of the DCT basis functions become visible in the image grid, because too few coefficients are quantized—and too coarsely—to make up for these blocking artifacts and to reconstruct smooth objects in the image.
The document "Very low bit-rate video coding based on matching pursuits", R. Neff and A. Zakhor, IEEE Transactions on Circuits and Systems for Video Technology, vol. 7, no. 1, February 1997, pp. 158-171, describes a new motion-compensated system including a video compression algorithm based on the so-called matching pursuit (MP) algorithm, a technique developed about ten years ago (see the document "Matching pursuits with time-frequency dictionaries", S. G. Mallat and Z. Zhang, IEEE Transactions on Signal Processing, vol. 41, no. 12, December 1993, pp. 3397-3414). Said technique provides a way to iteratively decompose any function or signal (for example, image, video, . . . ) into a linear expansion of waveforms belonging to a redundant dictionary of basis functions, well localized both in time and frequency and called atoms. A general family of time-frequency atoms can be created by scaling, translating and modulating a single function g(t)εL2(R) supposed to be real and continuously differentiable. These dictionary functions may be designated by:gγ(t)εG(G=dictionary set),  (1)γ(=gamma) being an indexing parameter associated to each particular dictionary element (or atom). As described in the first cited document, assuming that the functions gγ(t) have unit norm, i.e. <gγ(t), gγ(t)>=1, the decomposition of a one-dimensional time signal f(t) begins by choosing γ to maximize the absolute value of the following inner product:p=<f(t), gγ(t)>,  (2)where p is called an expansion coefficient for the signal f(t) onto the dictionary function gγ(t). A residual signal R is then computed:R(t)=f(t)−p.gγ(t)  (3)and this residual signal is expanded in the same way as the original signal f(t). An atom is, in fact, the name given to each pair γk, pk, where k is the rank of the iteration in the matching pursuit procedure. After a total of M stages of this iterative procedure (where each stage n yields a dictionary structure specified by γn, an expansion coefficient pn and a residual Rn which is passed on to the next stage), the original signal f(t) can be approximated by a signal {circumflex over (f)}(t) which is a linear combination of the dictionary elements thus obtained. The iterative procedure is stopped when a predefined condition is met, for example either a set number of expansion coefficients is generated or some energy threshold for the residual is reached.
In the first document mentioned above, describing a system based on said MP algorithm and which performs better than the DCT ones at low bitrates, original images are first motion-compensated, using a tool called overlapped block-motion compensation which avoids or reduces blocking artifacts by blending the boundaries of predicted/displaced blocks (the edges of the blocks are therefore smoothed and the block grid is less visible). After the motion prediction image is formed, it is subtracted from the original one, in order to produce the motion residual. Said residual is then coded, using the MP algorithm extended to the discrete two-dimensional (2D) domain, with a proper choice of a basis dictionary (said dictionary consists of an overcomplete collection of 2D separable Gabor functions g, shown in FIG. 1).
A residual signal f is then reconstructed by means of a linear combination of M dictionary elements:
                              f          ^                =                              ∑                          n              =              1                                      n              =              M                                                                                p                ^                            n                        ·                          g                              γ                n                                                                        (        4        )            If the dictionary basis functions have unit norm, {circumflex over (p)}n is the quantized inner product <, > between the basis function g□n and the residual updated iteratively, that is to say:
                                          p            n                    =                      <                          f              -                                                ∑                                      k                    =                    1                                                        k                    =                                          n                      -                      1                                                                                p                      ^                                        k                                    ·                                      g                                          γ                      k                                                                                ,                              g                          γ              n                                >                                    (        5        )            the pairs ({circumflex over (p)}n, γn) being the atoms. In the work described by the authors of the document, no restriction is placed on the possible location of an atom in an image (see FIG. 2). The 2D Gabor functions forming the dictionary set are defined in terms of a prototype Gaussian window:w(t)={square root over (2.)}e−nt2  (6)A mono-dimensional (1D) discrete Gabor function is defined as a scaled, modulated Gaussian window:
                                                        g                              α                →                                                                (              i              )                                =                                    K                              α                →                                      .                          w              (                                                i                  -                                      N                    2                                    +                  1                                s                            )                        .                          cos              (                                                                    2                                                              πξ                                                                    (                                                  i                          -                                                      N                            2                                                    +                          1                                                )                                                                              N                                +                ϕ                            )                                                                                with                                :                                                                        i                                                              ε                                              {                              0                ,                1                ,                …                                                                                ,                                  N                  -                  1                                            }                        .                                              (        7        )            The constant K{right arrow over (α)} is chosen so that g{right arrow over (α)}(i) is of unit norm, and {right arrow over (α)}=(s, ξ, φ) is a triple consisting, respectively, of a positive scale, a modulation frequency, and a phase shift. If S is the set of all such triples {right arrow over (α)}, then the 2D separable Gabor functions of the dictionary have the following form:G{right arrow over (α)},{right arrow over (β)}(i,j)=g{right arrow over (α)}(i)g{right arrow over (β)}(j) for i,jε{0,1, . . . ,N−1}, and {right arrow over (α)},{right arrow over (β)}εS  (8)The set of available dictionary triples and associate sizes (in pixels) indicated in the document as forming the 1D basis set (or dictionary) is shown in the following table 1:
TABLE 1sizekskζkφk(pixels)01.00.00113.00.00525.00.00937.00.001149.00.0015512.00.0021614.00.0023717.00.0029820.00.003591.41.0π/23105.01.0π/291112.01.0π/2211216.01.0π/2271320.01.0π/235144.02.007154.03.007168.03.0013174.04.007184.02.0π/47194.04.0π/47To obtain this parameter set, a training set of motion residual images was decomposed using a dictionary derived from a much larger set of parameter triples. The dictionary elements which were most often matched to the training images were retained in the reduced set. The obtained dictionary was specifically designed so that atoms can freely match the structure of motion residual image when their influence is not confined to the boundaries of the block they lie in (see FIG. 2, showing the example of an atom placed in a block-divided image without block-restrictions).
However, the approach described in the cited document suffers from several limitations. The first one is related to the continuous structure of the Gabor dictionary. Because atoms can be placed at all pixel locations without any restriction and therefore span several motion-compensated blocks, the MP algorithm cannot represent blocking artefacts in the residual signal with a limited number of smooth atoms. It is the reason why it is necessary to have some kind of overlapped motion estimation, in order to limit the blocking artifacts. If a classical block-based motion compensation (i.e. without overlapping windows) is used, the smooth basis functions may not be appropriate to make up for blocking artifacts (indeed, it has been recently showed that coding gains could be made when the size of the residual coding transform is matched to the size of the motion-compensated block). Third, it is difficult to combine intra and inter blocks in a coded frame (in the cited document, no DCT intra macroblock exists, probably in order to avoid discontinuities on the boundaries of blocks coded in intra and inter mode that would be badly modelled by the smooth structure of Gabor basis functions).

Video encoding and decoding methods and corresponding devices


A plug includes a housing having an end face through which first and second blades extend. A fuse casing is mounted in the housing and includes a main casing body having an access defined in an upper side thereof through which a fuse is passable and a side opening defined in a side thereof, and a side lid is removably mounted to the side opening.

1. Field of the Invention
The present invention relates to an improved plug of the type having a fuse therein and, more particularly, to a plug having an improved arrangement for accommodating a fuse.
2. Description of the Related Art
U.S. Pat. No. 4,738,639 to Henderson discloses an electric plug for accommodating two fuses. U.S. Pat. No. 4,968,269 to Urani et al. discloses a fuse holder for receiving a fuse. Both patents have limited application as they are different from typical plugs. U.S. Pat. No. 4,679,877 to Ahroni and U.S. Pat. No. 5,634,818 to Applicant both disclose a typical plug having a fuse received therein. A common disadvantage of both patents is that the fuse casing includes two half casing pieces which results in a complicated structure and thus is troublesome to manufacture and assemble. The present invention is intended to provide an improved design which mitigates and/or obviates the above problems.

Plug with improved arrangement for accommodating a fuse

No. 1 Alley 50, Lane 305, Sec. 3 Chung-Shan Road


A vehicle-mounting structure for a fuel cell system of the present invention has a fuel cell, and a hydrogen-related component in which hydrogen to be supplied to the fuel cell flows. In the structure, the fuel cell and the hydrogen-related component are mounted in a space on a front portion in a vehicle body, a hood covering a top opening of the space is inclined downward from a rear side to a front side in the vehicle body, and the hydrogen-related component is placed at a position on the rear side and upper side of the fuel cell in the vehicle body.

1. Field of the Invention
The present invention relates to a vehicle-mounting structure for a fuel cell system, in which a fuel cell is mounted in a space in a front portion of a vehicle.
2. Description of the Related Art
A vehicle having a fuel cell mounted on a space of the front portion of the vehicle body is disclosed in Japanese Patent Laid-Open Publication No. 2003-178767.

Vehicle-mounting structure for fuel cell system


The invention concerns a process for preparing a polymer composition, that is free-radical/photochemical and thermal curing epoxide-methacrylate and/or isocyanate-methacrylate adhesives in broadest terms, dental/medical adhesives, and dental restoratives. Furthermore the dual curing epoxide-methacrylate and/or isocyanate-methacrylate adhesives can be used in the optical industry, in optoelectronics and microelectronics, for example for the adhesion of complicated optical components in the combination glass/glass, glass/metal. Advantageous is the small shrinkage during polymerization and the good mechanical properties in combination with the possibility of step-wise or one-step polymerization.

Dental filling materials mainly consist of liquid polymerizable organic monomers and/or polymers, reactive diluents, polymerization initiators, stabilizers, and fillers.
These composite materials have their good mechanical properties such as high flexural strengths, high compressive strengths and their hardness. Furthermore they are polishable and it is possible to adjust their dye. The most frequently used monomers are esters of methyacrylates and higher multifunctional alcoholes or isocyanates such as the bismethacrylate of biphenol-A diglycidyl ether, urethane bismethacrylates.
One of the main disadvantages using composites as dental filling materials is the relatively high shrinkage of organic monomers during polymerization. The shrinkage causes the well known effect of contraction gaps and subsequent cracks. Common dental composites show a shrinkage of 2.5 up to 4.0 vol.-%.
It is well known that the shrinkage directly depends on the molecular weight of polymerizable organic monomers. On the other hand, increasing molecular weights of the monomers are combined with an increasing viscosity of the resin. Therefore reactive diluents such as oligoethyleneglycoidimethacrylates, are necessary to obtain a lower viscosity and the possibility to incorporates the desired amount of fillers. However, reactive diluents show a relatively high shrinkage by themselves, for example 12.89 vol-% for pure triethyleneglycoldimethacrylate.
Moreover, conventional used composites snow a relatively low self-adhesion to teeth, metals are ceramics. In numerous experiments using epoxide polymers and methacryates for the preparation of IPNs (J. Polym. Sci. Part Al Polym. Chem. 30 (1992) 1941, J. Appl. Chrom. 24 (1991) 692, Polym. 31 (1990) 2066,) multiphase systems were obtained which have insufficient mechanical, thermal and optical properties or which result in microphase separated polymers (Acta Polymerica 38 (1987) 547 and DO 226731) with insufficient adhesion to teeth and ceramics.


A gift box that includes a detachable gift support for insertion into a gift box after construction from a one-piece sheet of material. Gift restraints are provided for restraining the gift on the gift support. Preferably, the gift is in the shape of a card, such as the shape of a credit card, and is preferably what is known as a giftcard, similar to a gift certificate.

The present invention relates generally to gift boxes, and in particular, to an improved gift box construction and display arrangement that, among other things, provides for a more particularized and aesthetically pleasing as well as improved display and construction of a gift box for a gift, such as a gift card.
One-piece gift boxes are well-known, examples of which are described in U.S. Pat. Nos. 1,084,851; 2,643,811 and 4,925,088. Other box constructions are known, some of which were cited during prosecution of parent application Ser. No. 10/443,497, the subject matter of this application Ser. No. 10/443,497 being incorporated by reference as if fully set forth herein. While the prior art gift boxes may be satisfactory for their intended uses, they all are perceived to be deficient in various respects.
The present inventor has discovered that still further improvements in the art are desirable and has also recognized that such improvements to the state of the art are achievable. In particular, a perceived deficiency in the prior art is the lack of a desirable display configuration of such a gift box in a collapsed position at a point of sale. Moreover, the prior art lacks a satisfactory construction of such a gift box having a gift support, particularly for gift cards.
As such, the present invention overcomes the perceived deficiencies in the prior art as well as providing the objectives and advantages set forth above and below.

This patent is subject to a terminal disclaimer.


The present invention relates to a method of realigning the local oscillators of a receiver, as well as a device for implementing the method. In a receiver with a high frequency/intermediate frequency translation oscillator, an intermediate frequency/baseband translation oscillator, and a sampling oscillator receiving a signal modulated by at least one circuit for inverse fast Fourier transform FFT.sup.-1 computation according to a multicarrier modulation of OFDM (Orthogonal Frequency Division Multiplexing) type with addition of a transition interval at the start of each transmission interval. The spectrum of the signal has two master lines with a fixed frequency difference between them. The method is characterized by the following steps: (1) determination of the start of a transmission interval; (2) determination of the position of the two master lines; and (3) computation of the variation of the phases of these two lines as a function of time, and exploitation of the result to set the frequency of the sampling oscillator and of the intermediate frequency baseband translation oscillator. The invention will find particular application to digital television.

1. Field of the Invention
The present invention relates to the realigning of the local oscillators of a receiver making it possible to receive a signal modulated by at least one circuit for inverse fast Fourier Transform computation according to a multicarrier modulation of OFDM (Orthogonal Frequency Division Multiplexing) type.
2. Description of the Related Art
In the International Patent Application PCT/FR 89/00546 filed in the name of THOMSON-CSF, there is described a method for transmitting modulated waves using a plurality of frequencies simultaneously, comprising successive steps of transmission of symbols for a duration T+.DELTA.T, two transmission frequencies being 1/T apart, T being the useful transmission interval and .DELTA.T being the transition interval. In the above patent application, there is also described a transmitter and a receiver enabling this method to be implemented by using, in the transmitter, a circuit for inverse fast Fourier transform (FFT.sup.-1) computation in order to carry out the modulation of the signal and, in the receiver, a circuit for fast Fourier Transform (FFT) computation in order to carry out the demodulation of the signal received. Furthermore, to enable the receiver to be synchronised with the transmitter, the spectrum of the modulated signal comprises two master lines having a fixed frequency difference between them. By using these two master lines, it is possible to slave the local oscillators as well as the sampling clock of the receiver. In the patent application mentioned above, there is therefore described a device for analog feedback control using the two master lines to control certain local oscillators of the receiver as well as the clock giving the sampling frequency.
As shown in FIG. 1, the feedback control device making it possible to realign the local oscillators of the receiver described in the above-mentioned patent application, comprises essentially a band-pass filter 2, a band-pass filter 3, a mixer 4 and a phase-lock loop (PLL) 1 generating a reference frequency for three other PLLS. The two filters 2 and 3 are connected in parallel and receive, among other things, at input two frequencies f.sub.A, f.sub.B, arising from the circuit for translating Intermediate Frequency into Baseband, as is explained in the above application. The outputs from the two band-pass filters 2 and 3 are sent to the mixer 4. The output f rom the mixer 4 is input to the phase-lock loop 1. This phase-lock loop comprises a mixer 5 whose output is connected to the input of a low-pass filter 6. The output of the low-pass filter 6 is connected to a voltage-controlled oscillator (VCO) 7. The output of the oscillator 7 is connected to the input of the phase-lock loop, namely on the other input of the mixer 5. The output from the phase-lock loop 1 is also input to three phase-lock loops 8, 9, 10. These phase-lock loops are frequency-division phase-lock loops. The phase-lock loops 8, 9, 10 constitute the outputs of the feedback control device and deliver frequency references to the various local oscillators, namely the local oscillator of the high frequency/intermediate frequency f'.sub.HF translation circuit, the sampling clock f.sub.e, local oscillator of the Intermediate Frequency to baseband f'.sub.i translation circuit.
The circuit described above operates as follows. The filter 2 selects the frequency f.sub.A namely the frequency of one of the two master lines transmitted by the transmitter. The filter 3 selects the frequency f.sub.B namely the frequency of the other master line. The mixer 4 performs the beating between the frequencies f.sub.A and f.sub.B. The phase-lock loop 1 delivers the value of the differences between frequencies f.sub.A and f.sub.B. The difference between the frequencies f.sub.A and f.sub.B on transmission, determined by the transmission standard, is known. Comparison on reception enables a frequency reference and phase reference to be delivered. The phase-lock loops 8, 9 and 10 therefore deliver frequency and phase references to the various local oscillators and to the sampling clock which are used in the receiver.

Method of realigning the local oscillators of a receiver and device for implementing the method


A hydroquinone derivative (I) represented by the following formula: ##STR1## wherein R.sup.1 is a hydrogen atom, acetyl group or benzoyl group, such hydroquinone derivative being useful as an intermediate for chroman derivatives useful as a blood sugar-lowering agent.

a) Field of the Invention
The present invention relates to a process for the industrial preparation of quinone derivatives such for example as 2-4'-(p-nitrophenoxy)-3'-methyl-2'-butenyl!-3,5,6-trimethyl-1,4-benzoquin one, and novel intermediates.
There are many useful chroman derivatives, as pharmaceuticals, including at first 5- { 4-3,4-dihydro-6-hydroxy-2,5,7,8-tetramethyl-2H-1-benzopyrane-2-yl)methoxy !phenyl} methyl!-2,4-thiazolidinedion (Code Name: CS-045, CAS Registry No.97322-87-7) which is a blood suger lowering agent. For the preparation of these chroman derivatives, there are generally used, as intermediate, 2-4'-(p-nitrophenoxy)-3'-methyl-2'-butenyl!-3,5,6-trimethyl-1,4-benzoquin one.
b) Description of the Related Art
Conventionally, EP-543,346, for example, discloses the preparation of 2-4'-(p-nitrophenoxy)-3'-methyl-2'-buenyl!-3,5,6-trimethyl-1,4-benzoquino ne (XII) which comprises condensing 3,5,6-trimethyl-1,4-hydroxyquinone (VIII) and 1-chloro-2-methyl-3-butene-2-ol (IX) in accordance with a Friedel-Crafts reaction, then oxidizing the resulting condensate (X), and followed by adding p-nitrophenol to the oxidized condensate (XI). This preparation process will be described, as follows, where X means a halogen atom. ##STR2##
According to the process described in EP-543,346, 3,5,6-trimethyl-1,4-hydroquinone (VIII) and an allyl halide such as 1-chloro-2-methyl-2-butene-3-ol (IX) are utilized. However, since such an allyl halide has a very high reactivity, it will produce many decomposites and other structural isomers, and it is therefore difficult to purify the object compound. Furthermore, the allyl halide is unstable and hence, it must be prepared in situ, with some problems in the operationally safe point of view, for instance, its stimulation and the like.
2-(1-Chloro-2-methyl-2-butene-4-yl)-3,5,6-trimethyl-1,4-hydroquinone (X) obtained in accordance with the Friedel-Crafts condensation and 2-(1-chloro-2-methyl-2-butene-4-yl)-3,5,6-trimethyl-1,4-quinone (XI) obtained by oxidizing said hydroquinone (X) are also unstable. Accordingly, they will produce many decomposites and by-products in their respecive reaction steps, and it is therefore difficult to purify the object compound, with a lower yield accompanied therewith. Namely, it can not be concluded that this process of the prior art is an industrially proper process.
As mentioned above, there has not been an industrially excellent preparation process capable of preparing 2-4'-(p-nitrophenoxy)-3'-methyl-2'-butenyl!-3,5,6-trimethyl-1,4-benzoquin one (XII) useful as pharmaceutical intermediates, at a high yield and with safety.


An adjustable tether assembly for a fiber optic distribution cable includes a tether cable and an overmolded housing secured at the end of the tether cable having at least one connector port. The tether assembly is attached to the distribution cable such that the position of the connector port is adjustable along the length of the distribution cable for mitigating differences between the pre-engineered span length distance and the actual span length distance following installation of the distribution cable. A method for mitigating a span length measurement difference in a pre-engineered fiber optic communications network is provided that includes optically connecting an adjustable tether assembly at a mid-span access location of a fiber optic distribution cable and positioning a housing secured at the free end of a tether cable having at least one connector port at a desired location in the network to compensate for the span length measurement difference.

1. Field of the Invention
The present invention relates generally to an interconnection, or "tap," point in a fiber optic communications network. More specifically, the invention is a fiber optic distribution cable having an adjustable tap point comprising at least one connector port attached by a tether to a mid-span access location of the fiber optic distribution cable, wherein the tether provides a length of slack cable to permit the connector port to be positioned at a desired location in the fiber optic communications network.
2. Description of the Related Art
Optical fiber is increasingly being used for a variety of broadband communications including voice, video and data transmissions. As a result of the increasing demand for broadband communications, fiber optic networks typically include a large number of mid-span access locations at which one or more optical fibers are terminated from a distribution cable and interconnected with a branch cable or a drop cable. The mid-span access locations provide an interconnection point, also referred to herein as a "tap" point, from the distribution cable leading to another network distribution or termination point, or from the distribution cable leading directly to an end user, commonly referred to as a subscriber, thereby extending an "all optical" communications network closer to the subscriber. In this regard, fiber optic networks are being developed that deliver "fiber-to-the-curb" (FTTC), "fiber-to-the-business" (FTTB), "fiber-to-the-home"(FTTH), or "fiber-to-the-premises" (FTTP), referred to generically as "FTTx." Based on the large number of mid-span access locations and the unique demands of optical fibers and optical connections, a tap point is needed for providing access to terminated optical fibers in an FTTx network. More particularly, a tap point is needed that is capable of being adjustably positioned along the length of a distribution cable, or positioned away from the distribution cable in order to mitigate span length measurement differences that are encountered when installing a fiber optic distribution cable having predetermined mid-span access locations in a fiber optic communications network.
In one example of a fiber optic communications network, one or more drop cables are interconnected with a distribution cable at a tap point comprising a mid-span access location. Substantial expertise and experience are required to configure the optical connections in the field. In particular, it is often difficult to identify a particular optical fiber of the distribution cable to be optically connected with an optical fiber of a drop cable. Once identified, the optical fiber of the distribution cable is typically joined directly to the optical fiber of the drop cable at the mid-span access location using conventional splicing techniques, such as fusion splicing. In other instances, the optical fiber of the distribution cable and the optical fiber of the drop cable are first spliced to a short length of optical fiber having an optical connector mounted on the other end, which is generally referred to in the art as a "pigtail." The pigtails are then routed to opposite sides of a connector adapter sleeve to interconnect the drop cable with the distribution cable. In either case, the process of configuring the mid-span access location is not only time consuming, but frequently must be accomplished by a highly skilled field technician at significant cost and under field working conditions that are less than ideal. In situations in which a mid-span access location is enclosed within a conventional splice closure, reconfiguring optical connections within the splice closure is especially difficult, based in part on the relatively inaccessible location of the closure, the limited workspace available within the closure, and the inability to readily remove the closure from the distribution cable. Further, once the spliced optical connections are made, it is labor intensive, and therefore relatively costly, to reconfigure the optical connections or to add additional optical connections.
In order to reduce installation costs by permitting less experienced and less skilled technicians to make optical connections and to reconfigure optical connections at mid-span access locations in the field, communications service providers are increasingly pre-engineering new fiber optic networks and demanding factory-prepared interconnection solutions, commonly referred to as "plug-and-play" type systems. There are currently several methods to build a distribution cable assembly for economical deployment and field installation. In one example, the distances between desired network distribution or termination points (i.e., tap points) are measured with great accuracy and a factory-prepared distribution cable assembly is built with mid-span access locations positioned precisely at the desired tap points. However, in this instance the length of the distribution cable between mid-span access locations must be exact, and the deployment of the distribution cable must be performed accurately so that no extra cable length is used between the tap points. If extra length of distribution cable is used, the incorrect placement of even one mid-span access location will have a compounding effect on the position of each downstream mid-span access location. As a result, all downstream mid-span access locations will be out of position and the length of distribution cable will come up short at the end of the cable run. Obviously, measuring the absolute distances between mid-span access locations and building a distribution cable assembly with accurate distances between mid-span access locations is a difficult undertaking. Furthermore, any error in the manufacturing process may result in the entire distribution cable assembly being unusable, and therefore scrapped. Alternatively, an excess length of cable (i.e., slack) may be intentionally built into the distribution cable at each mid-span access location to insure that the tap point can always be positioned in the field at exactly the desired location. The obvious drawbacks with such a distribution cable assembly are the cost associated with the excess lengths of the cable and the associated need to store the cable slack in an aesthetic and practical manner.
In addition to the difficulties associated with manufacturing a distribution cable assembly having the tap points in the pre-engineered locations, there are also problems encountered with using conventional components to optically connect the optical fibers of the distribution cable with optical fibers of a branch cable or drop cable at the mid-span access locations. For example, rigid enclosures are typically used to protect the section of the distribution cable that must be exposed to access the appropriate optical fibers and the splices. Distribution cables provided with conventional enclosures tend to be large in size and inflexible, and thus, unable to satisfy common deployment constraints, such as being wound onto a reel, deployed through conduits having a relatively small inner diameter or significant bends, or deployed through conventional aerial lashing equipment, such as sheaves and rollers. Furthermore, such enclosures are often structurally complex and difficult to install.
Accordingly, there is a specific and unresolved need for a factory-prepared, fiber optic distribution cable having an adjustable tap point that mitigates the difference between the pre-engineered span length distance and the actual span length distance following installation of the distribution cable. Further, there is a need for a fiber optic distribution cable including at least one predetermined mid-span access location for providing access to at least one preterminated optical fiber and a tether assembly including at least one connector port for interconnecting the preterminated optical fiber with an optical fiber of a branch cable or drop cable at a desired location along the length of the distribution cable. To accommodate any installation environment, the tap point preferably has a small diameter and is flexible enough to be wound onto a reel, deployed through a conduit having a relatively small inner diameter or significant bends, or deployed using conventional aerial lashing equipment. In addition, there is a specific and unresolved need for a factory-prepared fiber optic distribution cable that does not require a highly skilled field technician or extensive field labor to interconnect optical fibers of the distribution cable with optical fibers of a branch cable or drop cable.

Adjustable tether assembly for fiber optic distribution cable


A new and distinct variety of Verbena plant, substantially as herein illustrated and described, characterized particularly as to novelty by its light pink flowers with a deeper pink colored edge, early flowering and a habit that is very compact and later spreading.

The present invention comprises a new distinct cultivar of Verbena, botanically known as Verbena×hybrida.
The new cultivar is propagated from cuttings resulting from the cross of 'Z0924-3' and 'Z0637-2'. 'Z0924-3' is a purple flowering Verbena. 'Z0924-3' is not commercially available and is not known by any synonyms. 'Z0637-2' is a white flowering Verbena. 'Z0637-2' is not commercially available and is not known by any synonyms. Neither 'Z0924-3' nor 'Z0637-2' have been patented.
As a result of this cross the present cultivar was created in 2001 in Enkhuizen, Netherlands and has been repeatedly asexually reproduced by cuttings in Enkhuizen, Netherlands and Sarrians, France over a three year period. The new variety is stable and reproduces true to type in successive generations of asexual reproduction.
This new Verbena plant is an annual in most climatical zones in the US, only in zones 9 and 10 is it a perennial plant.


A protective cover for use on the bottom of chair and table legs. The invention device includes an elastomeric sleeve or cup having a bottom to which is connected a disk of soft, dense and durable protective materials such as felt.

To prevent a floor from being damaged when a chair or table is moved various sizes of felt disks or other soft material has been fastened to the bottom of the chair or table legs. The protective materials are usually attached to the furniture legs by a variety of means such as adhesives or mechanical fasteners.
Existing products are not as durable as desired and the adhesives used tend to lose their adhesion ultimately causing the bond to fail. Mechanically connecting the leg covering was not totally dependable and relied on fastening members that could come loose as well as the integrity of the material. In addition, covers often required tools to attach or did not closely fit the leg it was supposed to cover.
The leg covering according to the present invention is a substantial improvement over the prior art by providing a more durable, secure and versatile design.

Protective covers for legs of tables and chairs


A liquid crystal display device includes a thin film transistor arranged at crossings of gate lines and data lines; a pixel electrode connected to each thin film transistor; a common electrode arranged on a second substrate; a layer of liquid crystal material provided between the first and second substrates; a protrusion arranged on the common electrode for controlling an orientation of the liquid crystal molecules within the layer of liquid crystal material; and a common voltage generator applying an AC common voltage to the common electrode, wherein a polarity of the common voltage is inverted every predetermined period.

1. Field of the Invention
The present invention relates to a liquid crystal display device and a driving method thereof. More particularly, the present invention relates to a liquid crystal display device and a driving method thereof, wherein a viewing angle may be expanded by altering a common voltage applied to liquid crystal cells of a liquid crystal display device.
2. Description of the Related Art
Generally, liquid crystal display (LCD) devices are smaller and thinner than cathode ray tubes (CRTs), consume less power than CRTs, and display images by controlling light transmittance characteristics of liquid crystal material via data signals generated in response to video signals (e.g., television signals).
Of the various types of LCD devices, Active matrix LCD (AM-LCD) are excel in displaying moving images. Accordingly, AM-LCD devices generally include a LCD panel supporting a plurality of gate lines, a plurality of data lines crossing the gate lines wherein a plurality of liquid crystal cells (i.e., pixels), defined by the crossings of the gate and data lines, are arranged in a matrix pattern. Switching devices such as thin film transistors (TFTs) are provided within the liquid crystal cells. Arranged at crossings of the gate and data lines, the TFTs transmit data signals applied to the data lines to a corresponding pixel electrode in response to a scan signal applied to a corresponding gate line. Accordingly, light transmittance characteristics of each liquid crystal cell may be selectively controlled in accordance with a voltage level of the data signals applied to the data lines.
Recent developments have suggested that viewing angles of LCD devices may be increased by adjusting an alignment direction of liquid crystal material within different regions (i.e., sub-pixels or domains) within a liquid crystal cell.
FIG. 1 illustrates a sectional view of a LCD panel in a related art, two-domain twisted-nematic (TN) mode LCD device.
Referring to FIG. 1, the related art LCD panel includes a TFT array substrate 34, a color filter array substrate 32 opposing the TFT array substrate 34, and a layer of liquid crystal material 22 arranged between the color filter and TFT array substrates 32 and 34, respectively.
The TFT array substrate 34 includes a lower substrate 11; a plurality of data lines 14 formed on an insulating layer 12; a plurality of gate lines (not shown) crossing the plurality of data lines 14 and divide the lower substrate 11 into a plurality of liquid crystal cells; a plurality of TFTs (not shown) each consisting of a semiconductor layer (not shown) and a source/drain electrode (not shown); a protective film 10 covering and protecting the thin film transistors; a plurality of pixel electrodes 8 formed within pixel areas of each of the liquid crystal cells on the protective film 10 and connected to respective ones of the TFTs; and a lower alignment film 6a covering the pixel electrode 8.
The color filter array substrate 32 includes an upper substrate 1; a black matrix 2 formed on the upper substrate 1 for preventing light leakage in regions corresponding to the gate line, the data line 14, and the TFT (not shown); a plurality of color filters 4 arranged between the black matrix 2 and opposing the pixel areas; a common electrode 18 formed over the color filters 4; a protrusion 20, made of an organic material such as an acrylic resin, formed on each common electrode 18 and over each color filter 4; and an upper alignment film 6b formed on the protrusion 20.
Generally, when a voltage is applied to the LCD panel, an electric field is generated within the liquid crystal layer 22 that drives the liquid crystal molecules within a liquid crystal cell. Where the upper alignment film 6b is formed on the protrusion 20, a projected area 16 is formed that distorts the electric field generated within the liquid crystal layer 22. Accordingly, a dielectric energy of the distorted electric field orients directors of liquid crystal molecules in the layer of liquid crystal material 22 in desired directions.
Two-domain TN mode LCD devices such as those illustrated in FIG. 1 must be driven using a pixel voltage signal having a voltage level that is higher compared to the common voltage to effect a change in the orientation of the liquid crystal molecules arranged proximate the projected area 16. Due to the presence of the projected area 16, pixel voltage signals used in driving liquid crystal cells of two-domain TN mode LCD devices such as those illustrated in FIG. 1 must be about 2V higher than pixel voltage signals are used in driving liquid crystal cells of general TN mode LCD devices. However, data drivers capable of generating such high pixel voltage signals can be prohibitively expensive. Further, effecting an adequate orientation change in liquid crystal molecules arranged proximate the projected area 16 is more difficult than effecting an adequate orientation change in liquid crystal molecules in other areas of the liquid crystal cell. Therefore, viewing angle characteristics of LCD devices such as those illustrated in FIG. 1 can be undesirably degraded or narrowed, thereby requiring the addition of a wide viewing angle film.
Problems related to narrow viewing angles often arise when LCD devices such as those illustrated in FIG. 1 are driven according to a dot inversion scheme. Upon driving LCD devices according to the dot inversion scheme, the polarity of a pixel voltage signal applied to any one liquid crystal cell is opposite the polarity of a pixel voltage signal applied to all adjacent liquid crystal cells, wherein the polarities are opposite with respect to a common voltage. Further, the polarities of the pixel voltage signals applied to the liquid crystal cells are inverted every frame.
For example, and referring to FIG. 2A, during odd frames, a polarity of the pixel voltage signals applied to liquid crystal cells in even numbered rows of odd numbered columns is negative while a polarity of the pixel voltage signals applied to liquid crystal cells in odd numbered rows of even numbered columns is positive. During even frames as shown in FIG. 2B, a polarity of the pixel voltage signals applied to liquid crystal cells in odd numbered rows of even numbered columns is negative while a polarity of the pixel voltage signals applied to liquid crystal cells in even numbered rows of odd numbered columns is positive.
FIG. 3 illustrates a waveform diagram of the relationship between a pixel voltage signal (Vd) and a common voltage (Vcom) applied to liquid crystal cells of the related art LCD device illustrated in FIG. 1, driven according to the dot inversion scheme.
Referring to FIG. 3, according to the aforementioned dot inversion driving scheme, pixel voltage signals (Vd) having positive and negative polarities are alternately applied to liquid crystal cells as AC-type voltages during a horizontal period while a common voltage (Vcom) is commonly applied to the liquid crystal cells as a DC-type voltage. When a voltage difference between the common voltage Vcom and the pixel voltage Vd is about 5V, an orientation of liquid crystal molecules arranged proximate the projected area 16 of the upper alignment film 6b is not altered. Therefore, a larger voltage difference must be generated. Related art solutions typically employ a data driver capable of generating pixel voltage signals (Vd) having larger voltage levels in order to increase the voltage difference. However, these data drivers can be prohibitively expensive.

Liquid crystal display device and driving method thereof


A target point arrival detector for detecting that a vehicle arrives at a target point based on an image ahead of the vehicle moving on a surface captured by an image capturing unit includes a target point arrival signal output unit, using a processing circuit, to output a signal indicating that the vehicle arrives at the target point where an inclination condition of a surface ahead of the vehicle with respect to a surface over which the vehicle moves changes to a downward based on the captured image.

1. Technical Field
The present invention relates to a target point arrival detector, a target point arrival detection program and a vehicle-mounted device control system that detects a vehicle arrives at a given target point based on a plurality of images, captured by a plurality of image capturing unit, ahead of a vehicle such as automobile and robot that moves on surfaces.
2. Background Art
Conventional road surface recognition apparatuses identify three-dimensional shape of a road surface over which a vehicle moves (such as convexities/concavities in the road surface ahead of the vehicle). The vehicle mounts image capturing units to capture an image ahead of the vehicle. Based on a luminance image and a distance image (parallax image data) obtained from the image captured by the image capturing units, three-dimensional shapes of lane markers on a road surface is computed, and the three-dimensional shape of the road surface is identified from the three-dimensional shapes of the lane markers.
As the vehicle approaches the top of a hill, the vehicle arrives at a point where the road surface inclination changes and that uphill road surface becomes a flat road surface or a downhill road surface, which is the point where the driver of the vehicle cannot see beyond the top of the hill. A similar situation exists as the vehicle arrives at a point where the road surface inclination changes from a flat road surface to a downhill road surface.
Therefore, when the road surface inclination of the road ahead of the vehicle changes to downward with respect to the road surface where the vehicle is moving (road surface right below the vehicle), the driver of the vehicle has a poor vision for the ahead of the vehicle.
Therefore, because the driver of the vehicle has a poor vision at a point where the road surface inclination changes to a surface slope inflection point, the driver's recognition of obstacles existing ahead of the vehicle such as other vehicles and pedestrians existing in the ahead of the vehicle is delayed, and the driver's recognition of road condition changing ahead of the vehicle such as sharp curve is delayed, and such delay may cause accidents.

Target point arrival detector, method of detecting target point arrival, storage medium of program of detecting target point arrival and vehicle-mounted device control system


A power supply switching circuit comprises first and second PMOSFETs connected in series between a writing high voltage and an output terminal in the named order, and third and fourth PMOSFETs connected in series between a reading voltage and the output terminal in the named order. A substrate potential of the first PMOSFET is connected to the writing high voltage, and a substrate potential of the third PMOSFET is connected to the reading voltage. A substrate potential of the second and fourth PMOSFETs are connected in common to a substrate potential control circuit which is configured to selectively supply either the writing high voltage or the reading voltage to the common connected sub.about.t rate potential of the second and fourth PMOSFETs.

1. Field of the Invention
The present invention relates to a semiconductor device, and more specifically to power supply switching circuit.
2. Description of Related Art
A semiconductor memory includes the type in which a memory cell is constituted of an electrically writable and erasable floating gate field effect transistor.
Referring to FIG. 1, there is shown a diagrammatic sectional view of this type memory cell. As shown in FIG. 1, the memory cell includes a P-type semiconductor substrate 11 and a drain diffused region 12 and a source diffused region 13 formed separately from each other by selectively ion implanting arsenic into a principal surface of the substrate. Furthermore, a floating gate 14 and a control gate 15 are stacked through an insulator film on the principal surface of the substrate between the drain region 12 and the source the region 13. An insulating film 16 is formed to cover the whole of the memory cell.
In the case of writing information into this memory cell, a high voltage on the order of 12V is applied to the gate electrode 15, and a high voltage of the order of 6 V is applied to the drain 12, and the source 13 is grounded so that electrons are injected to the floating gate by action of a hot carrier injection, with the result that a threshold voltage viewed from the floating gate 15 is made high.
FIG. 2 is a graph illustrating an initial condition (non-written condition) and the written condition of this type memory cell. In the non-written condition, the memory cell becomes conductive by applying a control gate voltage Vcg on the order of 2 V, as shown by the curved line 21. On the other hand, in the non-written condition, the memory cell becomes conductive by applying a control gate voltage Vcg on the order of 6 V, as shown by the curved line 22.
Accordingly, if the control gate voltage is set to 5 V, the memory cell in the non-written condition is brought into a conductive condition, but the memory in the written condition is maintained in a non-conductive condition. Information is memorized by a difference of the current between the conductive condition and the non-conductive condition.
In the above mentioned semiconductor memory, in the case of reading the information, the semiconductor memory is operated with a power supply voltage of 5 V, and in the case of writing the information, it is necessary to selectively supply the memory cell gate with the high voltage of for example 12 V, which is supplied from an external circuit of the semiconductor memory, or is generated by a step-up circuit internally provided in the semiconductor memory. Therefore, a power supply switch circuit is required which selectively switch between the power supply voltage of 5 V at the information reading time and the high voltage of 12 V at the information writing time.
Referring to FIG. 3, there is shown a circuit diagram of one example of a prior art power supply switching circuit. In addition, the following TABLE 1 shows a DC voltage on various nodes in the circuit shown in FIG. 3.
TABLE 1 ______________________________________ G.sub.1 G.sub.2 G.sub.3 G.sub.4 V.sub.out ______________________________________ V.sub.pp (12 V) V.sub.cc (5 V) 0 V 0 V V.sub.cc (5 V) 0 V 0 V V.sub.cc (5 V) V.sub.pp (12 V) V.sub.pp (12 V) ______________________________________
As shown in FIG. 3, the prior art power supply switching circuit includes a pair of P-channel metal oxide semiconductor field effect transistors (each simply called "PMOSFET" hereinafter) MP1 and MP2 are connected in series between a writing high voltage Vpp and an output terminal Vout. A substrate potential of the PMOSFET MPI is connected to the writing high voltage Vpp, and a substrate potential of the PMOSFET M2 is connected to the output terminal Vout. The prior art power supply switching circuit also includes another pair of PMOSFETs MP3 and MP4 are connected in series between a reading voltage Vcc and the output terminal Vout. A substrate potential of the PMOSFET MP3 is connected to the reading voltage Vcc, and a substrate potential of the PMOSFET MP4 is connected to the output terminal Vout.
Now, a DC operation of the shown prior art power supply switching circuit will be described with reference to the TABLE 1, assuming that 2 V is supplied as the writing high voltage Vpp and 5 V is supplied as the reading voltage Vcc.
In the case of outputting 5 V from the output terminal Vout, 0 V is applied to gate terminals G3 and G4 of the PMOSFETs MP3 and MP4, so as to render these PMOSFETs MP3 and MP4 conductive, so that the reading voltage Vcc is transferred throlgh the PMOSFETs MP3 and MP4 to the output terminal Vout. As a result, a voltage of the output terminal Vout becomes 5 V.
At this time, 12 V is applied to a gate G1 of the PMOSFET MP1 and 5 V is applied to a gate G2 of the PMOSFET MP2, so that the PMOSFETs MP1 and MP2 are brought into a non-conductive condition. Therefore, the writing high voltage Vpp is completely isolated from the output terminal Vout.
On the other hand, in the case of outputting 12 V from the output terminal Vout 0 V is applied to the gate terminals G1 and G2 of the PMOSFETs MP1 and MP2, so as to render these PMOSFETs MP1 and MP2 conductive, so that the writing high voltage Vpp is transferred through the PMOSFETs MPI and MP2 to the output terminal Vout. As a result, a voltage of the output terminal Vout becomes 12V.
At this time, 5 V is applied to the gate G3 of the PMOSFET MP3 and 12 V is applied to the gate G4 of the PMOSFET MP2, so that the PMOSFETs MP3 and MP4 are brought into a non-conductive condition. Therefore, the reading voltage Vcc is completely isolated from the output terminal Vout.
Thus, in the prior art power supply switching circuit as mentioned above, either the writing high voltage Vpp or the reading voltage Vcc is alternatively outputted, and there is no unnecessary DC current leakage. This is attributable to provision of the PMOSFETs MP2 and MP4.
Namely. when 12V is outputted from the output terminal Vout, since the gate terminal G4 of the PMOSFET MP4 is brought to 12V, the PMOSFET MP4 is brought into the non-conductive condition, so that the voltage of the utput terminal Vout is never applied to a connection node between the PMOSFETs MP3 and MP4.
Here, if it is assumed that the voltage of 12V is applied to the connection node B, a PN junction between a P-type diffusion layer of the PMOSFET MP3 at the side of the connection node B, and the substrate potential of the PMOSFET MP3 applied with 5 V, is biased in a forward direction, so that a leakage current occurs.
On the other hand, it is considered that when 5 V is outputted from the output terminal Vout, the writing high voltage Vpp is brought to OV, because, in an ordinary reading operation, 0 V is applied to a terminal of the writing high voltage Vpp from an external circuit of the semiconductor memory.
In this case, by applying 5 V to the gate G2 of the PMOSFET MP2, the PMOSFET MP2 is brought into the non-conductive condition, the voltage of the output terminal Vout is not applied to a connection node A between the PMOSFETs MPI and MP2.
Here, if t is assumed that the voltage of 5 V is applied to the connection node A, a PN junction between a P-type diffusion layer of the PMOSFET MP1 at the side of the connection node A, and the substrate potential of the PMOSFET MP1 applied with OV, is biased in a forward direction, so that a leakage current occurs.
Now, an AC operation of the shown prior art power supply switching circut will be described with reference to FIG. 4, which is a waveform diagram illustrating a change in voltage on various nodes in the circuit shown FIG. 3.
First, consider that the output voltage Vout is caused to change from 5V to 12 V. At a timing T1, the gate voltage G1 of the PMOSFET MP1 is caused to change from 12V to OV, and the gate voltage G2 of the PMOSFET MP2 is caused to change from 5V to OV, so that the PMOSFETs MP1 and MP2 are rendered conductive. On the other hand, the gate voltage G3 of the PMOSFET MP3 is caused to change from 0 V to 5 V, and the gate voltage G4 of the PMOSFET MP4 is caused to change from 0 V to 5 V, so that the PMOSFETs MP3 and MP4 are rendered non-conductive. Thus, the output terminal Vout is charged through the PMOSFETs MP1 and MP2, and reaches 12V at a timing T2.
In the above mentioned process of charging the output terminal Vout from 5 V to 12 V, since the P-type diffused layer of the PMOSFET MPt at the side of the writing high voltage Vpp and the substrate potential of the PMOSFET MP1 are 12 V, the voltage is supplied from the writing high voltage Vpp to the connection node A in an ordinary MOSFET operating condition. On the other hand, since the P-type diffused layer of the PMOSFET MP2 at the side of the connection node A is 12 V, and since the P-type diffused layer of the PMOSFET MP1 at the side of the output terminal Vout and the substrate potential of the PMOSFET MP2 are 5 V, a PN junction between the P-type diffused layer of the PMOSFET MP 2 at the side of the connection node A and the substrate potential of the PMOSFET MP 2 is biased in a forward direction.
An Operation condition of this MOSFET MP2 will be described with reference to FIG. 5, which is a diagrammatic section view of the PMOSFET MP2 formed in a P-type semiconductor substrate 1.
As shown in FIG. 5, an N-type well 2 is formed in the P-type semiconductor substrate 1, and the PMOSFET MP2 is constituted of a pair of P-type diffused layers 3 and 4 formed in the N-type well 2 and a gate electrode 7 located through a gate insulator (not shown) on a channel region defined between the pair of P-type diffused layers 3 and 4. Furthermore, an N-type diffused layer 5 is formed in the N-type well 2 for supplying a biasing voltage for the N-type well 2. As seen from comparison between FIGS. 3 and 5, the P-type diffused layer 3 is connected to the connection node A, and the P-type diffused layer 4 and the N-type diffused layer 5 is connected to the output terminal Vout.
A P-type diffused layer 6 is formed for supplying a ground potential GND to the P-type semiconductor substrate 1, and is connected to the ground potential GND.
In the structure shown in FIG. 5, if the N-type well 2 and the P-type diffusect layer 4 are brought to 5 V, and the P-type diffused layer 3 is brought to 12 V, a PN junction between the P-type diffused layer 3 and the N-type well 2 is biased in a forward direction, so that holes are injected from lie P-type diffused layer 3 to the N-type well 2. The holes, which have been injected into the N-type well 2 and which are minority carriers in the N-type well 2, reach the P-type diffused layer 4 by passing through a path I1, so that the holes are supplied to the output terminal Vout. As a result, the potential of the output terminal Vout elevates.
This means that a PNP junction constituted of the P-type diffused layer 3, the N ype well 2 and the P-type diffused layer 4, operates as a bipolar transistor. Thereafter, if the potential of the N-type well 2 elevates and the injection of the holes terminates, the PMOSFET MP2 operates as an ordinary MOSFET.
Furthermore, when the holes are injected from the P-type diffused layer 3, a PNJ junction constituted of the P-type diffused layer 3, the N-type well 2 and the P-type semiconductor substrate 1, also operates as a bipolar transistor. The holes are injected into the P-type semiconductor substrate 1, by passing through a path 12, and the holes injected into the P-type semiconductor substrate I are taken out through the P-type diffused layer 6.
On the other than, when the output terminal Vout is caused to change from 2 V to 5 V, an electric charge is discharged from the output terminal Vout through the PMOSFETs MP3 and MP4 to the reading voltage Vcc, so that the output voltage Vout is brought to 5 V. In this process, the P-type diffused layer of the PMOSFET MP3 at the side of the connection node B is biased in a forward direction, the PMOSFET MP3 operates is a bipolar transistor, similarly to the PMOSFET MP2 mentioned just above.
Incidentally, in order to shorten the period that the PMOSFET MP3 operates as the bipolar transistor, there is provided a means (not shown in FIG. 3) composed of an N-channel metal oxide semiconductor field effect transistor (simply called "NMOSFET" hereinafter) which is connected between the output terminal Vout and the ground GND and which is turned on for a predetermined period at an initial stage of the process of changing the output voltage Vout from 12V to 5 V, so that the charge of the output terminal Vout is further discharged.
As mentioned above, in the prior art power supply switching circuit as mentioned above, when the output voltage Vout is switched from 5 V to 12 V, in the period from TI to T2 in the timing chart of FIG. 4, the PMOSFET MP 2 operates as the bipolar transistor to charge the output terminal Vout. At this time, since the holes are simultaneously charged into the P-type semiconductor substrate, an unnecessary current flows from the writing high voltage Vpp, with the result that a consumed electric current inevitably increases.
This also means that when a load capacitance of the output voltage Vout is large, the period from TI to T2 in the timing chart of FIG. 4 becomes long. This is a serious problem.
Furthermore, there is dangerous possibility that the holes injected into the substrate causes a latch-up. Accordingly, this restricts a location of circuit elements in the neighborhood of the power supply switching circuit.
Other than the period of switching the output voltage Vout from 5 V to 12V, in a period of constantly outputting the output voltage Vout at 12 V or 5 V when a consumed current of a load circuit connected to the output Vout is large, since the output voltage Vout, namely, the substrate potential of the PMOSFETs MP2 and MP4 lower, the P-type diffused layer of the PMOSFET MP2 at the side of the connection node A in the case of outputting 5 V, and the P-type diffused layer of the PMOSPET MP4 at the side of the connection node B in the case of outputting 12 V, are biased in the forward direction with the result that holes are injected into the P-type semiconductor substrate. Accordingly, the consumed current increases, and there occurs dangerous possibility that the holes injected into the substrate causes a latch-up.


A no-drip carafe (10) is taught that is used for storing and serving a hot or cold beverage, which incorporates a vacuum insulated bottle (20) with a lid (30) engaging the top of the bottle. The lid incorporates a pouring spout (34) with a liquid cavity (36) running completely through and also an integral handle for convenience in handling. A spring loaded lever (56) pivotally snaps into the lid with the lever having an integral downwardly projecting plug finger (58) that engages and completely obstructs the liquid cavity when at rest. When the lever is manually depressed the plug finger is pivoted away from the liquid cavity permitting the beverage to flow freely and when released the integral downwardly projecting plug finger seals the cavity in a no-drip manner.

Previously, many types of vacuum carafes and beverage containers have been used in endeavoring to provide an effective means to store and serve hot or cold liquid beverages to prevent heat transfer while affording convenient handling.
The prior art listed below did not disclose patents that possess any of the novelty of the instant invention; however the following U.S. patents are considered related:
Patent NumberInventorIssue Date3,799,408PalmerMar. 26, 19744,625,884ZimmermannDec. 2, 19864,754,888Letsch et al.Jul. 5, 1988D307,229GrolmanApr. 17, 19905,653,362PatelAug. 5, 19975,918,761WessingerJul. 6, 19995,968,618MillerOct. 19, 19996,269,984MurakamiAug. 7, 20016,505,752Rolfes et al.Jan. 14, 2003
Palmer in U.S. Pat. No. 3,799,408 teaches an internally threaded mounting ring engaged to the threaded neck of a vacuum bottle. A sleeve is provided having a small diameter end for engagement with the bottle neck. The outer large diameter of the sleeve faces outwardly and a tapered stopper-type closure swings on an arm for engagement. The closure is manipulated at the handle to swing the stopper into and out of position closing the opening in the vacuum bottle.
U.S. Pat. No. 4,625,884 issued to Zimmermann is for an insulated jug having a protective housing of synthetic material forming a spout. A recess is formed in the top to receive a lid that is threaded on its lower portion with insertion providing a seal. Pouring is accomplished through the relieved portion on the threaded part of the lid.
Letsch et al. in U.S. Pat. No. 4,754,888 discloses a thermos carafe with an inner container surrounded by a casing. The inner container and the casing are open on the top which is closed using a plug. The plug and/or the opening are shaped in such a manner that it is possible to fill and empty the inner container while the plug is left in the opening.
Patel in U.S. Pat. No. 5,653,362 teaches a beverage server having a body with an internal reservoir to hold a beverage such as hot coffee. A lid is pivotally connected to the top of the body. The lid has a conical passage permitting a beverage to pass into the reservoir without removing the lid. A floatable ball is located in the passage for sealing when no liquid is entering the server. A pouring spout extends from the body and is in fluid communication with the reservoir when the beverage server is tilted and the lid pivots. A counter weight in the lid assists smooth motion functioning.
U.S. Pat. No. 5,968,618 disclosed by Miller is for a thermal coffee carafe having the shape similar to the appliance's factory supplied carafe so that the carafe may fit on the heat generation surface of the appliance in place of the factory supplied carafe.
U.S. Pat. No. 6,269,984 issued to Murakami is for a dispensing stopper for a bottle eliminating accumulated residue. The stopper includes a base mounted on the bottle mouth, a seal on the base and a movable gasket moving toward and away from the sealing surface on the bottle. A thin web of resilient material seals a fixed section and the gasket section.
For background purposes and as indicative of the art to which the invention is related reference may be made to the remaining cited patents issued to Wessinger U.S. Pat. No. 5,918,761, Rolfes et al. U.S. Pat. No. 6,505,752 and Grolman in U.S. design Pat. D307,229.


The present invention relates to an LCD (Liquid Crystal Display) test system, and more particularly to an in-line LCD test system capable of promptly and accurately testing LCDs. There is provided an LCD test system including a main frame, an index stage located adjacent to the main frame and having a stacker for supplying a plurality of LCD cassettes, a pre-alinger for aligning the LCD supplied from the stacker of the index stage; a carrier for transferring the aligned LCD so as to test the LCD, and a work table unit for setting such that the LCD transferred by the carrier is tested. According the LCD test system thus constructed, the LCD to be tested is automatically aligned, transferred and electrically contacts to the probe pins by the pre-aligner, the carrier and the work table unit, respectively. A series of such processes reduces the time required to test the LCD and increases in an test accuracy.

1. Field of the Invention
The present invention relates to an LCD (Liquid Crystal Display) test system, and more particularly to an in-line LCD test system capable of promptly and accurately testing LCDs.
2. Description of the Conventional Art
Liquid crystal display (LCD) has generally a structure in which liquid crystals (LCs) are sandwiched by two glass substrates having transparent electrodes thereon. The LCs are compounds which have intermediate states between a liquid and a solid having molecules regularly arranged. The LCs are organic compounds having a long and thin rod-like molecular structure, with optical and dielectric anisotropic characteristics.
The LCDs are non-emissive types of display devices, and thus require a light source located outside a panel. The LCDs provide thinner flat panel than that of a CRT and achieve a full-color display, which lead to rapid practical use thereof.
The LCDs may be greatly classified into three types of TN, GH and TFT LCDs.
A TN type of LCD uses twisted nematic materials as LCs, widely used for displays, which are put into between two glass plates, each having transparent electrode films thereon. The production of such a TN type of LCD includes special processing called a rubbing processing applied to surfaces of the glass plates.
Secondly, a GH type of LCD is manufactured to permit a color display with the above-mentioned TN LCs as host to which dye is added as a guest. Finally, a TFT LCD is structured to have: a glass substrate on which pixels, each including a transistor and a display pixel (transparent) electrode, are arranged in a matrix manner and which transparent common electrodes are attached to; another opposing glass substrate having a color filter with a sequential arrangement of three primary colors in a matrix manner, each color being disposed corresponding to respective pixels, and transistors implemented by thin film FETs (Field Effect Transistors) for the purpose of driving a LC; and the LC inserted between said two glass plates.
Recently, thin film transistor liquid crystal display devices (TFT LCD) having lower power consumption and lightweight advantages have been used as display devices for various electronics, such as electric calculators, telephones, electronic organizer, notebook computers, etc. Also, a transition from 7-segment displays to dot-matrix displays results from an advance in LCD manufacturing and driving techniques, wherein the dot-matrix displays constitute a main trend of displays.
Since the number of electrodes increase in proportion of the amount of information to be displayed, the circuit connections between the LCD driving devices and the LCD become complicated. Accordingly, it is necessary to provide an apparatus for testing the circuit connections of the LCD.
A prior art LCD test system, mainly designed to test the 7-segment displays, conducts tests as to whether each segment of the LCD is properly connected or not, through the use of the key inputs to the test system.
However, a problem exists in that it cannot be tested all of segments of the dot-matrix type of the LCD as main displays currently used.
Therefore, it is an object of the present invention to provide an LCD test system capable of promptly and accurately testing LCDs and of minimizing failure of electrical contact to a tester.
According to the present invention, there is provided an LCD test system comprising: a main frame; an index stage located adjacent to the main frame and having a stacker for supplying a plurality of LCD cassettes; a pre-aligner for aligning the LCD supplied from the stacker of the index stage; a carrier for transferring the aligned LCD so as to test the LCD; and a work table unit for setting such that the LCD transferred by the carrier is tested.
According the LCD test system thus constructed, the LCD to be tested is automatically aligned, transferred and electrically contacts to the probe pins by the pre-aligner, the carrier and the work table unit, respectively. A series of such processes reduces the time required to test the LCD and increases in an test accuracy.


A method performed by a computer processing system includes receiving a design pattern for an integrated circuit, applying a function to the design pattern to generate a model contour, generating a plurality of Optical Proximity Correction (OPC) target points along the model contour, adjusting the design pattern to create an adjusted pattern, and performing a simulation on the adjusted pattern to create a simulated contour.

Integrated circuits may be formed using various photolithographic techniques. Such techniques typically involve exposing a photoresist layer to a light source through a patterned photo-mask. In general, the final pattern formed onto the photoresist layer does not precisely match the designed pattern for which the final pattern was formed. This is caused by various photolithographic process parameters such as the resolution of the light source. It is important to ensure that the final printed pattern is not so far from the designed pattern that functionality of the circuit is adversely affected.
Various procedures are used to ensure that the final printed pattern is within the desired tolerance range of the target pattern. One process that is used is referred to as Optical Proximity Correction (OPC). The OPC process typically involves applying a set of rules to determine target points along edges of the design pattern. The design pattern is then modified so that a contour resulting from a simulation of the printout of the modified design pattern approximates the OPC target points.
Use of target points that were determined based on application a set of rules is a time consuming process. The designer may have to make several modifications to the target points based on experience, simulation, and testing in order to bring the final printout within the design specification. Accordingly, it is desirable to have a method of determining the placement of OPC target points that reduces the amount of time a designer or engineer must spend on fine tuning the design pattern to achieve the desired target pattern.

Target point generation for optical proximity correction

Taiwan Semiconductor Manufacturing Company, Ltd.


A method of maintaining a synthetic gas (syngas) cooler for use within a gasifier system is provided. The method includes breaking at least a portion of a non-bonded joint and a seam weld on a quench ring assembly. At least a portion of the wear sub-assembly and a flow control sub-assembly is removed, and the wear sub-assembly is separated from the flow control sub-assembly. The method further includes removing the separation device that extends between the flow control sub-assembly and the wear sub-assembly. At least a portion of the wear sub-assembly is replaced by positioning the replacement portion of the wear sub-assembly over the flow control sub-assembly and coupling the replacement portion of the wear sub-assembly to the main structural member. The method provides a more efficient replacement of worn sub-assemblies, which decreases the time and costs associated with maintenance.

This invention relates generally to synthesis gas, or syngas, coolers for use in a gasifier system, and, more specifically, to a quench ring assembly for use with a syngas cooler.
Many known gasifier systems include a reactor that defines a reaction chamber in which a fuel mixture is gasified to form a hot product gas and liquefied slag flows downward therefrom. A quench chamber holding a water bath is positioned in the reactor to receive and cool the hot produced effluent. A constricted throat that couples the reaction chamber with the quench chamber directs a stream of the effluent through a dip tube which defines a guide passage to conduct the effluent into the water bath. A toroidally-shaped quench ring is positioned radially inward of the dip tube to direct a water stream onto the dip tube's guide surface.
Most known quench rings include a high-wear hot face portion that is directly exposed to the gasifier's high-temperature and erosive conditions by virtue of the hot product gas which makes contact with hot face portion as the gas is channeled from the reaction chamber to the water bath. While the relatively cooler liquid flowing through the quench ring onto the dip tube's guide surface at least partially mitigates localized high temperatures, significant stresses and strains are induced in the hot face portion of the quench ring. Such thermally-induced stresses and strains facilitate increasing a replacement frequency of the hot face portion due to formation of cracks and fissures along the exposed surface. The hot face portion is typically a portion of a larger structural member, e.g., a removable/replaceable quench ring metal apron that facilitates providing the sacrificial wear surface. In addition, the apron is coupled to a plurality of cooling fluid inlet flanges, typically through welds, such flanges being aligned and coupled with fluid supply lines through fittings, e.g., Grayloc® fittings. Therefore, replacement and/or refurbishment of the hot face portion requires removing the gasifier from service, mobilizing a sizable maintenance crew, uncoupling the flanges, and removing the quench ring in its entirety in sections. During the replacement and/or refurbishment activities that occur outside of the gasifier, the hot face portion is repaired and/or replaced. However, upon replacement of the quench ring sections into the gasifier, the quench ring metal apron and flanges may not be in their original positions and orientations and may not align properly.

Method of maintaining apparatus for a syngas cooler


In a fuel cell state determination method for determining an internal state of a fuel cell supplied with an anode gas and a cathode gas to generate electricity, a decrease of a reaction resistance value of the cathode caused by hydrogen evolution reaction generated in the cathode as the fuel cell has an oxygen deficiency state is detected, and the oxygen deficiency state is determined on the basis of detection of the decrease of the reaction resistance value.

There is known a fuel cell state determination apparatus that measures an internal impedance value of a fuel cell and detects an internal state of the fuel cell on the basis of the measured value.
For example, JP2013-8568A discusses a fuel cell state diagnosis device that diagnoses an internal state of a fuel cell by distinguishing between deficiency of a fuel gas (anode gas) and deficiency of an oxidation gas (cathode gas) on the basis of a measurement value of the internal impedance.
In this fuel cell state diagnosis device, when an internal impedance obtained in the vicinity of a cathode outlet port of the fuel cell increases, it is determined that deficiency is generated in the cathode gas.

Fuel cell state determination method and fuel cell state determination apparatus


The instant invention is a fire protectant composition comprising water, a surfactant, a water-soluble polymer, casein, and a calcium salt. The compositions can be applied to materials such as wood in advance of a fire, and after application, the compositions are capable of retaining their fire protectant capacities for days, weeks or even months. This fire protectant composition is also biodegradable and nontoxic. It is also easily removed from the combustible material by a water wash once the fire danger is passes. If burned, the composition forms a “skin” which can be peeled off or removed by some other method such as pressure water spray or mechanical brushing.

Wildfires in the United States have increased in both frequency and size due to factors such as climate change and droughts, leading to increased dryness in forest soils and vegetation. Additionally, the trends include suburban sprawl which has caused more people to live and recreate in wildland areas, increasing the risk of human-caused fires and also increasing the risk of damage to structures placed into wildland areas. Further, forestry practices since 1900 include suppression of natural fires resulting in many wildland forests becoming more dense with trees and brush. Thus, fires become more destructive.
In many cases, wildland fires burn for many days or even weeks or months. The direction of the fire can be generally predicted and homeowners in the potential path of the fire can be warned and asked to evacuate. Generally, protecting structures in wildlands includes firefighters and homeowners constructing fire breaks, as well as firefighters or homeowners spraying water onto flammable structures in advance of a fire. Water has certain advantages in firefighting by cooling flammable materials and also displacement of oxygen that is necessary for combustion of fuel. However, once homeowners are evacuated, they are unable to continue spraying water onto their structures.
Water evaporates quickly from dry materials. Further, continuously spraying water on combustible materials such as a home is labor-intensive, taking up firefighter's time that is better spent elsewhere, and dangerous to firefighters as well when the fire is nearby.
It would be desirable to provide to homeowners (and firefighters) with a fire protectant product that can be applied to potentially combustible materials in advance of a fire or evacuation order, which would also stay intact on the combustible material for a period of days to weeks, and provide excellent fire protection during that entire time without further attention or application. It is also desirable that the fire protectant product would retain its fire protecting function after application, even after drying or dehydration of the product. It would also be desirable that the fire protectant product would be biodegradable and nontoxic, and also that it can be easily removed from the combustible material by a water wash once the fire danger is passes, or easily removed from the material once it has been combusted.
Firefighting foams have been used for many years. Firefighting foams can work by suppressing and preventing air from mixing with flammable vapors, separating flames from the fuel's surface, and cooling the fuel and its surface through the action of water in the form. The foam is creating by mechanically mixing air with a surfactant and other materials in water.
Hydrolyzed protein surfactant foams are known for fighting fires and are made from hydrolyzed granular keratin proteins (hoof and horn meal, chicken feathers, etc.). They include stabilizing additives and inhibitors to prevent corrosion, resist bacterial decomposition and to control viscosity. Fluoroprotein foams have fluorochemical surfactants which enhance performance by providing faster knockdown and better fuel tolerance. Film forming fluoroprotein foam (FFFP) that are designed to combine the fuel tolerance with increased knockdown power. Aqueous film forming foams AFFF provides fast knockdown of hydrocarbon fuels. Alcohol resistant film forming fluoroprotein foams (AR-FFFP) are produced from protein foam, fluorochemical surfactants and polysaccharide polymers. They are capable of producing a tough membrane that separates the foam from the fuel and prevents the destruction of the foam blanket.
However, none of the foams currently available provide the combination of properties to make a fire protectant product that can be applied to potentially combustible materials in advance of a fire or evacuation order, that will remain intact on the combustible material for a period of days to weeks, and provide excellent fire protection during that entire time without further attention or application, and which is also biodegradable, nontoxic, and can be easily rinsed off when fire protection is no longer needed.
The present invention is directed toward overcoming one or more of the problems discussed above.