A main control circuit generates a plurality of main control signals of different phases to local control circuits. The local control circuits produce row-related control signals greater in number than the main control signals in accordance with these main control signals. A semiconductor memory device can be easily adapted to change in bank structure, and can perform a fast and stable operation with a low current consumption.

1. Field of the Invention
The present invention relates to a semiconductor memory device, and particularly to a semiconductor memory device having a large storage capacity. In particular, the present invention relates to row-related control circuitry for controlling a row selecting operation in a refresh operation mode and a normal operation mode of a clock synchronous DRAM (Dynamic Random Access Memory) used, e.g., in a DRAM integrated on a common chip together with a logic or the like.
2. Description of the Background Art
FIG. 79 schematically shows a whole structure of a conventional clock synchronous semiconductor memory device. In FIG. 79, the clock synchronous semiconductor memory device includes a plurality of sub-memory arrays SMA0–SMA3, row decoders RD0–RD3 provided corresponding to sub-memory arrays SMA0–SMA3 for selecting rows of memory cells in corresponding sub-memory arrays, respectively, a column decoder CDA provided for sub-memory arrays SMA0 and SMA2 for producing a column select signal for selecting columns in these sub-memory arrays, a column decoder CDB provided corresponding to sub-memory arrays SMA1 and SMA3 for producing the column select signal for selecting columns in these sub-memory arrays, a data path DPA for transmitting data to and from memory cells in the column selected by column decoder CDA, and a data path DPB for transmitting data to and from memory cells in the column selected by column decoder CDB. Each of data paths DPA and DPB includes data input circuitry (an input buffer and a write buffer) and data output circuitry (an output buffer and a preamplifier).
Sub-memory arrays SMA0 and SMA1 form a bank BA#1, and sub-memory arrays SMA2 and SMA3 form a bank BA#0. Commonly to banks BA#1 and BA#0, there is arranged a main control circuit MCK that operates in synchronization with a clock signal CLK to receive an address signal ADD and a command CMD instructing an operation mode, and produces an operation control signal for banks BA#0 and BA#1. For bank BA#0, a sub-control circuit SCK0 is provided. For bank BA#1, a sub-control circuit SCK1 is provided. Main control circuit MCK produces an operation control signal for a designated bank in accordance with a bank address included in address signal ADD. Sub-control circuits SCK0 and SCK1 produce control signals for performing designated operations in accordance with the main operation control signal received from main control circuit MCK. These sub-control circuits SCK0 and SCK1 operate independently of each other in accordance with the operation control signal received from main control circuit MCK.
As shown in FIG. 79, the memory array is divided into two banks BA#0 and BA#1 so as to be activated and deactivated independently of each other in accordance with sub-control circuits SCK0 and SCK1, respectively. Therefore, the data access can be made to the banks in an interleaved manner, so that a penalty upon page switching is not caused, and fast access can be performed.
FIG. 80 schematically shows a structure of sub-memory arrays SMA0–SMA3 shown in FIG. 79. Sub-memory arrays SMA0–SMA3 have the same structure, and therefore, FIG. 80 shows only one sub-memory array as a representative.
In FIG. 80, sub-memory array SMA includes a plurality of memory blocks MB0–MB7, a sense amplifier bands SAB1–SAB7 arranged between memory blocks MB0–MB7, and sense amplifier bands SAB0 and SAB8 arranged outside memory blocks MB0 and MB7, respectively.
In memory block MB0, memory cells are arranged in rows and columns. In sense amplifier bands SAB0–SAB8, sense amplifier circuits are arranged corresponding to the columns of corresponding memory blocks MB0–MB7. Sense amplifier bands SAB0–SAB8 have a so-called "alternately arranged, shared sense amplifier structure", in which the sense amplifier circuits are arranged alternately on the opposite sides of the columns of the corresponding memory blocks, and each sense amplifier circuit is shared between the adjacent memory blocks.
In the sub-memory array SMA, the row selecting operation is performed on a block basis. One of the memory blocks is designated by the block select signal produced in accordance with the block address includes in address signal ADD, and the row selection is performed in the selected memory block. Since sub-memory array SMA is divided into the plurality of memory blocks MB0–MB7, each of sub-control circuits SCK0 and SCK1 is divided into local control circuits corresponding to memory blocks MB0–MB7.
As shown in FIG. 80, a block dividing operation or a partial activation is performed in sub-memory array SMA and the memory blocks in an unselected state are maintained in a precharged state for reducing a current consumption.
For arranging the sub-memory array shown in FIG. 80, sense amplifier band SAB8 of bank BA#1 and sense amplifier band SAB0 of bank BA#0 are arranged adjacently to each other on a boundary between banks BA#0 and BA#1. Thus, the sense amplifier band of each bank can be activated and deactivated independently of those of the other bank.
FIG. 81 schematically shows a structure for a portion related to sub-control circuits SCK0 and SCK1 shown in FIG. 79. Sub-memory array SMA2 included in bank BA#0 includes memory blocks MB00–MB07. Sub-memory array SMA0 of bank BA#1 includes memory blocks MB10–MB17. The sense amplifier bands are arranged on the opposite sides of these memory blocks MB00–MB07 and MB10–MB17 in the column direction. In FIG. 81, these sense amplifier bands are depicted as rectangular regions, respectively.
Sub-control circuit CK0 includes local control circuits LCK00–LCK07 provided corresponding to memory blocks MB00–MB07, respectively, and sub-control circuit CK1 includes local control circuits LCK10–LCK17 provided corresponding to memory blocks MB10–MB17, respectively.
Main control circuit MCK produces a row-related control signal group BRC and a predecode block address signal PDA for the banks in accordance with externally applied command CMD and address signal ADD, and also produces internal clock signal CLK in accordance with an externally applied clock signal ECLK. Internal clock signal CLK generated from main control circuit MCK is applied commonly to local control circuits LCK00–LCK07 and LCK10–LCK17. Row-related control signal group BRC for the banks includes a row-related control signal BR0 for bank BA#0 and a row-related control signal BR1 for bank BA#1. Row-related control signal BR0 is applied commonly to local control circuits LCK00–LCK07, and row-related control signal BR1 is applied commonly to local control circuits LCK10–LCK17.
A predecode block address signal PBA is produced by predecoding a block address included in externally applied address signal ADD. Predecode block address signal PBA of 6 bits includes a predecode block address signal group PBG0 of 2 bits and a predecode block address signal group of 4 bits, and is applied commonly to banks BA#0 and BA#1. In FIG. 81, since each of banks BA#0 and BA#1 includes eight memory blocks, the predecode block address of 6 bits is produced. Predecode block address group PBG0 of 2 bits designates the memory blocks in an upper or lower half in each of banks BA#0 and BA#1. Predecode block address group PBG1 of 4 bits designates one memory block among these memory blocks in the upper half and the lower half in each of the banks. Therefore, each of local control circuits LCK00–LCK07 and LCK10–LCK17 receives one bit in each of these predecode block address bit groups PBG0 and PBG1.
Predecode block address signal PBA commonly designates the memory blocks in banks BA#0 and BA#1. In accordance with row-related control signal group BRC for the banks, the row-related control signals for the bank designated by the bank address included in address signal ADD is activated, and the operation related to row selection is performed in an activated bank.
For simplifying the figure, structures of sub-memory arrays SMA1 and SMA3 are not shown in FIG. 81. These sub-memory arrays SMA1 and SMA3 have structures similar to those of sub-memory arrays SMA0 and SMA2, and local control circuits LCK00–LCK07 and LCK10–LCK17 controls the row selecting operation therein.
Each of data paths DPA and DPB includes a write driver, a preamplifier and a data I/O buffer, and transmits data to and from the memory cell on a column selected by column decoder CDA.
As shown in FIG. 81, the row selection is performed on a block basis in each of banks BA#0 and BA#1, so that unselected memory blocks can be maintained in the precharged state, and the current consumption can be reduced.
The address signal (referred to as a "word line address signal", hereinafter) for designating a word line must be applied commonly to all the memory blocks, or commonly to local control circuits LCK00–LCK07 and LCK10 and LCK17.
FIG. 82 shows an example of a structure of an input buffer in main control circuit MCK. Main control circuit MCK takes in externally applied command CMD and address signal ADD in synchronization with external clock signal ECLK (internal clock signal CLK). In FIG. 82, input buffer IB includes: an inverter IV that inverts clock signal (internal clock signal) CLK; a transmission gate XF1 that is turned on to pass input signal IN when clock signal CLK is at L-level; an inverter latch IL1 that latches the signal passing through transmission gate XF1; a transmission gate XF2 that is turned on to pass the signal latched by inverter latch IL1 when clock signal CLK is at H-level; and an inverter latch IL2 that latches the signal passing through transmission gate XF2 for producing an internal output signal OUT.
Transmission gates XF1 and XF2 are CMOS transmission gates, respectively, and are turned on/off in synchronization with clock signal CLK and a complementary clock signal generated from inverter IV. An operation of input buffer IB shown in FIG. 82 will now be described with reference to a signal waveform diagram shown in FIG. 83.
When clock signal CLK is at L-level, transmission gate XF1 is conductive, and inverter latch IN1 latches input signal IN. Meanwhile, transmission gate XF2 is non-conductive, and output signal OUT does not change.
When clock signal CLK rises to H-level, transmission gate XF1 is turned off, and input signal IN does not affect the latched signal of inverter latch IL1. When clock signal CLK rises to H-level, transmission gate XF2 is responsively turned on, and the signal latched by inverter latch IL1 is transmitted to inverter latch IL2, so that output signal OUT is produced. Accordingly, output signal OUT changes in synchronization with the rising of clock signal CLK.
Input buffer IB shown in FIG. 82 is provided in main control circuit MCK for each of address signal ADD and command CMD. Internal signals are produced in synchronization with rising of clock signal CLK, and therefore, the internal signals change in synchronization with the rising of clock signal CLK if a setup/hold time to clock signal CLK is ensured. Therefore, it is not necessary to consider a skew between these input signals, and it is possible to set the start timing of the internal operations faster.
FIG. 84 schematically shows line loads of the internal clock signal, row-related control signal and the predecode block address signal. In FIG. 84, internal clock signal CLK is transmitted by a clock driver DRV0 via a signal line SGL0. Row-related control signal BR (BR0 or BR1) is transmitted by a drive circuit DRV1 through a signal line SGL1. Predecode block address signal PB is transmitted by a drive circuit DRV2 via a signal line SGL2.
As shown in FIG. 81, the internal clock signal must be applied commonly to local control circuits LCK00–LCK07 and LCK10–LCK17, and therefore, signal line SGL0 have the largest load capacitance C0.
As for the row-related control signal BR, since all the local control circuits of the corresponding bank are coupled thereto, signal line SGL1 have a second largest load capacitance C1.
As for predecode block address signal PB, the local control circuits for the two memory blocks are connected in each bank to predecode block address signal bit group PBG1, so that the signal lines for the predecode block address signal bit group PBG1 has the smallest load capacitance C2. For predecode block address signal group PBG0, four local control circuits are connected in each bank to the signal lines for transmitting the predecode block address signal group PBG0. Therefore, a repeater may be arranged between the banks, whereby the load of the driver can be reduced, and the line load thereof can be made smaller than that for the row-related control signal. Since these signal lines SGL0–SGL2 have different line load capacitances C0–C2, their signal transmission delay times are different from each other, resulting in skews between these signals. In particular, these signals are transmitted unidirectionally along the column direction from main control circuit MCK toward local control circuit LCK17 at the remotest position. Therefore, a difference in signal transmission delay time also occurs between local control circuit LCK00 nearest to main control circuit MCK and local control circuit LCK17 remotest therefrom, and therefore a difference occurs in magnitude of the skew between the both.
FIG. 85 schematically shows a timing relationship among the input signals of local control circuits LCK00 and LCK17 as well as the externally applied signals, i.e., clock signal ECLK, address signal ADD and command CMD.
Main control circuit MCK is supplied with external clock signal ECLK, address signal ADD and command CMD. In synchronization with rising of external clock signal ECLK, main control circuit MCK takes in externally applied address signal ADD and command CMD, and produces predecode block address signal PBA and row-related control signal BR (BR0 or BR1). For local control circuit LCK00 nearest to main control circuit MCK, the smallest phase difference occurs between internal clock signal CLK and external clock signal ECLK. Main control circuit MCK produces row-related control signal BR0 and predecode block address signal PBA in synchronization with internal clock signal CLK, for transmission to local control circuit LCK00.
In local control circuit LCK00, signal line SGL0 transmitting internal clock signal CLK has large interconnection capacitance C0, and internal clock signal CLK arrives at local control circuit LCK00 with a slight delay to arrival of predecode block address signal PBA and row-related control signal BR0. In this case, however, the interconnection lines of these signals are short so that a skew between predecode block address signal PBA and internal clock signal CLK is small. If local control circuit LCK00 performs an operation synchronized with internal clock signal CLK at the above described timing, the setup time of the predecode block address signal PBA is insufficient so that a malfunction may occur.
In local control circuit LCK17 remotest from main control circuit MCK, internal clock signal CLK is transmitted with the largest delay due to the long interconnection length. Likewise, the delay times of row-related control signal BR1 and predecode block address signal PBA are larger than those for local control circuit LCK00, but are smaller than that of internal clock signal CLK to the local control circuit LCK7. In this case, a large phase difference occurs between predecode block address signal PBA and internal clock signal CLK, and thus a large skew occurs. In local control circuit LCK17, therefore, it is impossible to advance a timing for starting an internal operation, and the fast operation is impossible.
The operation start timing in each local control circuit may be determined depending on the distance from main control circuit MCK. However, such individual determination scheme complicates the circuit design. As external clock signal ECLK becomes faster, the timing adjustment time becomes an extremely short time, so that the timing adjustment must be performed extremely exactly. For the operation stability, the operation timing of the internal circuits may be determined in accordance with the worst skew conditions of local control circuit LCK17 remotest from main control circuit MCK. However, such a scheme based on the worst case makes the fast operation impossible.
In predecode block address signal PBA, predecode block address bit groups PBG0 and PBG1 are different in line load and delay time. Therefore, the timing at which all the predecode block address bits are made definite differs for different local control circuits, and an accurate decoding may not be performed.
FIG. 86 shows schematically a structure of main control circuit MCK. In FIG. 86, main control circuit MCK includes: a clock buffer 900 which receives externally applied clock signal ECLK, and produces internal clock signal CLK; a command input buffer 902 which takes in externally applied command CMD in synchronization with internal clock signal CLK from clock buffer 900; a row address input buffer 904 which takes in externally applied address signal ADD in synchronization with internal clock signal CLK; a row-related control signal generating circuit 905 which decodes the command received from command input buffer 902 in synchronization with internal clock signal CLK, and produces a row-related control signal BR0 for bank BA#0 in accordance with the result of decoding; a row-related control signal generating circuit 906 which decodes the command received from command input buffer 902 in synchronization with internal clock signal CLK, and produces a row-related control signal BR1 for bank BA#1 in accordance with the result of decoding; and a column related control circuit 908 which decodes the command received from command input buffer 902 in synchronization with internal clock signal CLK, and controls the operation of circuits related to data access (column selection).
Row-related control signal generating circuits 905 and 906 receive a bank address BAD from row address input buffer 904, and activates the row-related signal generating circuit provided for the bank designated by bank address BAD. Row-related control signal BR0 for bank BA#0 includes a row address decode enable signal RADE<0>, a word line drive timing signal RXT<0>, a bit line isolation instructing signal BLI<0>, a bit line equalize instructing signal BLEQ<0> and sense amplifier activating signals SON<0> and SOP<0>. Likewise, row-related control signal BR1 for bank BA#1 includes the corresponding signals RADE<1>, RXT<1>, BLI<1>, BLEQ<1>, SON<1> and SOP<1>.
According to the configuration shown in FIG. 86, column-related control circuit 908 controls data path DP performing input/output of data. However, column-related control circuit 908 also controls the operation of column decoders provided for banks BA#0 and BA#1. Data path DP includes a write driver, a preamplifier, a data input buffer and a data output buffer.
As shown in FIG. 86, main control circuit MCK includes row-related control signal generating circuits 905 and 906 corresponding to banks B#0 and BA#1, respectively. For providing more banks, therefore, the row-related control signal generating circuits must be increased in number, and therefore, a layout of the row-related control signal generating circuits in main control circuit MCK must be changed. Therefore, main control circuit MCK must be re-designed depending on a bank configuration. When the load on the signal line changes in re-designing, further re-design is required for adjusting an inter-signal skew. Therefore, it is difficult to accommodate the change in bank structure. If the banks increase in number, the row-related control signal generating circuits increase in number, and the signal lines for transmitting the row-related control signals increase in number, so that the interconnection region and the area occupied by the circuits increase, and the chip size increases.
In general, a storage capacity required for an embedded DRAM merged with a logic on a common chip depends on its application purpose, and it is required to change the number of memory blocks in accordance with the required storage capacity. In the embedded DRAM, memory cells store information in the form of electric charges accumulated in capacitors. Therefore, a refresh operation for rewriting or restoring the stored information of the memory cells must be performed periodically. If the memory blocks are variable in number as described above, a power is wasted in the refresh operation, and an access efficiency is lowered as well.
FIG. 87 schematically shows a structure of a portion related to refresh of one sub-memory array SMA. In FIG. 87, sub-memory array SMA includes, e.g., 12 memory blocks MB0–MB11. In each of memory blocks MB0–MB11, 512 word lines WL are arranged.
Local control circuits LCK0–LCK11 are arranged corresponding to memory blocks MB0–MB11, respectively. Local control circuits LCK0–LCK11 control operations related to row selection in corresponding memory blocks MB0–MB11, respectively. FIG. 87 representatively shows a block decoder BD, which produces a block select signal for selecting the corresponding memory block. Word line driver groups WDG0–WDG11 are provided corresponding to memory blocks MB0–MB11, respectively. Word line driver groups WDG0–WDG11 drive the word lines, which are selected in accordance with word line select signals applied from corresponding local control circuits LCK0–LCK11, to the selected state, respectively.
Each of word line driver groups WDG0–WDG11 includes word line drivers arranged corresponding to word lines in corresponding one among memory blocks MB0–MB11. The word line driver includes a main word line driver and a sub-word line driver if word line WL in the memory block is formed into a hierarchical word line structure. The sub-word line drivers are arranged corresponding to the sub-word lines, respectively, and are distributed in the corresponding memory block. The main word line driver is arranged corresponding to the main word line, and is located on one side of the corresponding memory block. For the sake of simplicity, FIG. 87 shows the word line driver group (main word line drivers) arranged on one side of the memory block.
For generating a block address for designating the memory block, there are provided: an address input buffer 910 which takes in an externally applied address signal ext<11:0> of 12 bits in synchronization with clock signal CLK; a refresh counter 912 performing a count operation in synchronization with a refresh activating signal REF that is rendered active for a predetermined period in response to the refresh instruction signal applied from a command decoder shown in FIG. 86, and generating a refresh address QA<11:0>; a multiplexer 914 which selects one of the internal address signal applied from address input buffer 910 and read address bits QA<11:0> applied from refresh counter 912 in accordance with refresh activating signal REF; and inverters IV2–IV0 which invert block address signal RA<11:9> of 3 bits received from multiplexer 914 to produce a complementary internal address signal. Multiplexer 914 applies an address signal RA<8:0> of 9 bits to a row decoder of a local control circuit (not shown).
Refresh counter 912 increments or decrements its refresh count value (refresh address) in synchronization with rising or falling of clock signal CLK when refresh activating signal REF is active.
In the structure shown in FIG. 87, the block address signal is formed of three bits RA<11:9>, and two memory blocks are simultaneously selected in twelve memory blocks MB0–MB11. In the arrangement shown in FIG. 87, a block address "000" is allocated to memory blocks MB0 and MB6, a block address "001" is allocated to memory blocks MB1 and MB7, and a block address "010" is allocated to memory blocks MB2 and MB8.
Also, a block address "011" is allocated to memory blocks MB3 and MB9, and a block address "100" is allocated to memory blocks MB4 and MB 10. A block address "101" is allocated to memory blocks MB5 and MB11.
When the refresh is executed in this structure, therefore, word lines WL are simultaneously driven to the selected state in the two memory blocks. If refresh counter 912 are configured to accommodate 16 memory blocks, count value QA<11:9> of this block address must return to the initial block address "000" after changing from "000" to "101". For applying refresh counter 912 to the structure including 16 memory blocks, a block address of four bits must be generated. Depending on a required specification, the refresh is executed on a memory block basis (i.e., a memory block at a time) or is executed in a unit of two memory blocks (i.e., two memory blocks at a time). In order to adapt to various specifications, a block address signal of four bits is required for executing the refresh on the memory block basis.
Therefore, if refresh counter 912 of the above structure is used, the count value of refresh counter 912 must be counted up from "110—00000 0001" to "1111—1111 1111" when the refreshing for memory blocks MB5 and MB1 is completed. Thus, a refresh command must be successively input until the count-up of refresh counter 912. Thus, in spite that refreshing of the memory cells in the whole space of sub-memory array SMA is completed by counting up refresh address QA<11:0> from "000—000000000" to "101—111111111", the refresh command must be further applied (512×2) times for setting the refresh address to the initial value.
Accordingly, in the structure formed of 12 memory blocks, the refresh command must be applied (512×8=4 K) times in total although the refresh of memory cells in the whole space is completed by applying the refresh command (512×6=3 K) times. Therefore, it is necessary to input the refresh command, which does not cause the refresh but is used merely for operating the refresh counter. During this period of input of refresh command, external access is impossible, and in addition, refresh counter 912 wastes the power.
It may be considered to provide refresh counter 912 with a reset circuit for resetting the count value to an initial value of "000 000 000" when the count value reaches "101—111111111". However, such reset circuit can be employable only for a structure formed of 12 memory blocks, and cannot be employed for a structure of 16 memory blocks.
If the number of memory blocks is equal to an integer of a power of 2, input of an unnecessary refresh command can be prevented by resetting the count value of refresh counter 912 at the time of change in any one of block address bits RA<11:9>. However, if the number of memory blocks is equal to, e.g., 12, and is not equal to an integer of a power of 2, as shown in FIG. 87, it is required to program the address of the final refresh memory block in the refresh sequence using a fuse program circuit or the like, for resetting refresh counter 912 in accordance with matching/mismatching between the block address bits output from refresh counter 912 and the programmed refresh block address. A layout area of a fuse element is larger than that of a transistor element. Also, the fuse program circuit requires a large layout area for preventing short-circuit due to a fragment produced upon blowing off the fuse. Therefore, if the fuse program circuit is used, a circuit scale of the refresh counter increases, and an area occupied by the refresh counter increases.
If the number of memory blocks increases to 16 in the structure shown in FIG. 87, the number of bank address signal bits increases to 4 bits, so that it is necessary to change the combination of the block address signal bits for selecting a block decoder BD. Accordingly, for changing the input of the address signal of block decoder BD in each local control circuit, an interconnection pattern must be changed in accordance with the number of memory blocks, resulting in a problem that the memory blocks cannot be expanded easily. In other words, it becomes difficult to change the number of memory blocks by optimising the layout of word line driver group WDG and local control circuit LCK for one memory block, and repeating this optimised layout. The interconnection layout of the block address signal bits must be changed in accordance with change in number of the memory blocks. As a result, it is impossible to adapt to the change in number of memory blocks and thus change in storage capacity without difficulty.
In the case of changing the refresh cycle in accordance with a required specification, i.e., changing the number of word line(s) to be selected simultaneously in the refresh operation, the greatest block address of the refresh address counter also changes, and the block address in the refresh operation for the memory blocks must be changed. Therefore, it is impossible to accommodate for the change in refresh cycle, similarly to the above case.
For ensuring reliability of the semiconductor memory device, the semiconductor memory device must be tested after production. For this test, the test control signal must be applied in synchronization with a clock signal if the semiconductor memory device is of a clock synchronous type. Timing margins of each external signal and data for the clock signal as well as access times can be tested in the semiconductor memory device of the clock synchronous type described above.
However, it is impossible to test a timing margin for to an internal control signal when internally selecting a memory cell. For example, it is impossible to measure a so-called RAS precharge time tRP through measurement of a time period required for internal precharge. In this case, the minimum measurable unit time of the RAS precharge time is equal to one clock cycle time of the clock signal even if the precharge command instructing the precharge and the row active command instructing the memory cell selection are successively applied. This is because the command is applied in synchronization with the clock signal. With a fast operable tester, the clock cycle period can be reduced, and the internal timing can be measured. However, such a fast test apparatus is expensive, and increases a test cost per device so that the semiconductor memory device becomes expensive.

Mitsubishi Electric Engineering Company Limited


The invention relates to a drum housing, a hybrid door for a motor vehicle with a door module with a mounting area for mounting a cable drum of a either a power or manual window lift drive, whereby the mounting area exhibits a first area with a first diameter that is sufficient for mounting the cable drum for the power window lift, and a second area with a second diameter that is sufficient for mounting the cable drum for the manual window lift.

The present invention relates to a drum housing for a motor vehicle, as well as a door module and a hybrid door.
German patent DE 3239370C2 describes a motor vehicle door with an outside door panel exhibiting a supporting frame with an opening for a window pane. A unit carrier holds door fittings, such as a window pane, a window lift mechanism, and a door lock, and is manufactured separately from the outside door panel, ready-assembled and installed on the outside door panel. Inside door lining forms the completion of the motor vehicle door facing the vehicle interior and is connected with the unit carrier or the outer door panel.
U.S. Pat. No. 4,794,735 describes a modular motor vehicle door consisting of an outer door skin, a door module with a door frame, and side-impact protection, and inside lining. A drive unit and a door lock mechanism for a window lift is mounted on the side impact protection.
European patent EP-A-579535 describes a base plate upon which a door handle is placed from the side of the dry area, interior lining and a switch for a window lift unit attached to the side of the wet area is arranged. The window lift unit, together with the motor drive unit, is arranged on the dry area side of the base plate, which is screwed on to the inside door panel of the door body, so that the vehicle door is split in a wet area situated outside and a dry area situated inside. How to split a vehicle door in a wet area and a dry area is also described in European patents EP-A-0944497 und EP-A-0961703B1.
German patent DE69421361T2 furthermore describes a cable window lift with a simplified, kinematic chain. The cable drum of the cable window lift consists of two parts that are coaxial to one another, and placed upon one another by the projections and an edge of the housing, so that both parts are rotable over one another. Moreover, a circular toothed rack is provided in the housing. The projections engage with the toothed rack and fasten one housing part with respect to the other in one direction, and/or release it in the opposite direction.
German patent DE 84 15 624 U1 furthermore describes a vehicle door with a window lift, in which instead of a lever arm drive, a cable or Bowden wire drive or a threaded cable drive may be realized, whereby the respective power transmission member extends from the motor drive of a base plate.
Moreover, German patent DE 695 17 943 T2 describes a window lift for a motor vehicle window that comprise drive means acting upon a locked kinematic hoist in order to move the side window of the vehicle, whereby the said drive means are manual and electrical.
Further drive mechanisms that are suitable for window lifts are known from German patents DE19706872A1, DE4139043A1 and DE4420692C2.
A general disadvantage of previously known door modules is that for series production of motor vehicles, two variants of the door module need to be produced, i.e., one variant for motor vehicles equipped with a power window lift, and another variant for vehicles equipped with a manual window lift. This is, among other things, due to the fact, that the cable drums for the power and manual window lifts are of different size.


An exercise apparatus seat includes a seatbottom and a seatback each pivoted to a support frame at respective first and second stationary pivots, and coupled to each other at a third translational pivot.

The invention relates to exercise apparatus, and more particularly to an exercise apparatus seat.
Exercise apparatus seats may include a seatbottom for supporting a user's buttocks and a seatback for supporting the user's back. Various support and adjustment mechanisms are known for varying the positions of the seatbottom and the seatback, to accommodate different users.
The present invention arose during continuing development efforts directed toward the noted exercise apparatus seats.


A data/clock recovery circuit can recover high-rate data using the data as a clock signal. It includes an edge detector, a clock selection signal generating circuit, a clock selection circuit and a synchronizing circuit. The edge detector generates edge position information using a receiver output as a clock signal. The clock selection signal generating circuit generates a clock selection signal in response to the edge position information using the receiver output as the clock signal. The clock selection circuit selects a recovered clock signal from a clock signal group in response to the clock selection signal. The synchronizing circuit synchronizes the receiver output using the recovered clock signal, and outputs it as a synchronized data signal.

1. Field of the Invention
The present invention relates to a data/clock recovery circuit for recovering a high-rate clock signal and data with high accuracy in high-speed serial communication.
2. Description of Related Art
For example, the USB (Universal Serial Bus) 2.0 standard is a very high-speed serial communication standard with a communication rate of 480 MBPS (megabits per second).
Generally, a communication line consists of a total of four lines, a power supply line, a ground line and a pair of data lines (D+, D−). Thus, a clock signal is not fed through the communication line.
Thus, it is necessary for the serial transmission without the clock signal supplied to recover the clock signal from the received data fed from the data line, and to sample the received data using the clock signal recovered. A circuit for recovering the clock signal and data from the received data is called a data/clock recovery circuit.
As a conventional example of the data/clock recovery circuit, the following document is known.
Dao-Long Chen, "A Power and Area Efficient CMOS Clock/Data Recovery Circuit for High-Speed Serial Interfaces", IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL.31, NO.8 AUGUST 1996.
With the foregoing configuration, the conventional data/clock recovery circuit has the following problem. Since the jitter components on the data line are very large such as 0.4 UI (Unit Interval) and the transmission rate is very high such as 480 MBPS in the USB 2.0 standard, it is difficult to apply the conventional data/clock recovery circuit.

Data/clock recovery circuit for recovering data and clock signal with high accuracy

Mitsubishi Electric System LSI Design Corporation


A wet paper web transfer belt for transferring a wet paper web includes a wet paper web contacting surface for carrying the wet paper web. The wet paper web contacting surface is constituted by a resin layer, and the wet paper web contacting surface includes a wet paper web carrying region for carrying the wet paper web. A prescribed relation of the swelling rate in water of the resin layer and the surface roughness of the wet paper web contacting surface is fulfilled in accordance with the basis weight of the base paper of the wet paper web.

Papermaking machines for removing moisture from the source material of paper are generally equipped with a wire part, a press part and a dryer part. These parts are arranged in the order of wire part, press part and dryer part in the wet paper web transfer direction.
In one type of papermaking machine, the wet paper web is passed from one part to another in an open-draw. In the press part of this open-draw papermaking machine, there are a number of places in which the wet paper web is not supported by any roll or by papermaking equipment such as a felt or a belt; in other words, places in which the wet paper web is traveling on its own. In these places, problems such as "web breaks" tend to occur. The risk of these problems occurring increases as the papermaking machine is operated at higher speeds. Therefore, there are limitations to operating an open-draw papermaking machine at high speeds.
In recent years, most papermaking machines have been of the type in which the wet paper web is passed in a closed-draw. In the press part of this closed-draw papermaking machine, the wet paper web is transferred while being placed on a papermaking felt or wet paper web transfer belt. Therefore, there are no places in which the wet paper web travels on its own as in the open-draw papermaking machine. As a result, it has become possible to operate papermaking machines at even higher speeds and to stabilize operations.
Incidentally, in the press part of such a closed-draw papermaking machine, the so-called "paper robbing" phenomenon may occur, in which the wet paper web gets stuck at a belt or a felt when it is passed between the belts or felts and is not passed to the next belt or felt to which it ought to be passed. In conventional machines, when the "paper robbing" phenomenon occurs, it is necessary to temporarily stop the papermaking operation and to change the setting of the device so that the wet paper web is properly passed.
A number of studies have been made for improving the wet paper web transfer properties in the press part.
JP 06-057678 teaches a wet paper web transfer belt, in which a wet paper web contacting surface formed on the upper surface of a base (wet paper web side) is formed by an impermeable polymer coating layer and a lower surface of the base (roll side) is formed by a fibrous web. Particles with a higher hardness than the polymer coating are mixed in the impermeable polymer coating layer and the particles are made to protrude from the surface by such means as polishing the wet paper web contacting surface.
Moreover, the wet paper web contacting surface is a rough surface configured to be in the range of Rz=0 microns to 20 microns inside the press part and to recover to within the range of Rz=2 microns to 80 microns after exiting the press part.
The wet paper web transfer belt according to JP 06-057678 realizes to a high degree the adhesive and release properties of the wet paper web with the wet paper web contacting surface required to wet paper web transfer belts. Nevertheless, since different types of paper are made in the papermaking step, the basis weight of the paper naturally also differs. Therefore, the amount of moisture removed from the wet paper web during the pressing and the moisture content and amount of moisture of the wet paper web after pressing also differ. The moisture of the wet paper web after pressing has a big influence on the adhesive and release properties of the wet paper web in relation to the wet paper web contacting surface of the wet paper web transfer belt. From this point of view, the wet paper web transfer belt according to JP 06-057678 is not adequate for realizing the adhesive and release properties of the wet paper web for different types of paper (in particular paper of different basis weight).
Furthermore, US 2007/0074836 discloses a wet paper web transfer belt, characterized in that one of the alternative characteristics of wet paper web transfer belts such as surface roughness, bending strength, compressibility, recovery capacity can be continuously changed in the width direction of the wet paper web transfer belt in order to correspond to the papermaking machine specific profile.

Wet paper web transfer belt, papermaking system, papermaking method and design method of a papermaking system


A system and method for facilitating passive alignment of an optical component in an optical bench. A groove is etched into the optical bench. The groove has two sections. The first section is configured to act as an optical guide. The second section is configured to receive the optical component. An optical component is inserted into the first section and moved into the second section. The optical component may be bonded to the optical bench.

One of the primary technical challenges associated with the manufacture of optical systems is component alignment of optical devices. In the manufacturing Micro Electro-Mechanical Systems (MEMS) devices, sub-micrometer alignment tolerances are often required.
There are two general classes of alignment strategies for optical components: active and passive. In passive alignment, alignment features are fabricated directly on the components as well as on the substrate to which the components are to be mounted. The components are then mounted and bonded directly to the substrate using the alignment features.
In active alignment, an optical signal is transmitted through the components and detected, sometimes after an initial passive alignment of the components. The alignment is performed manually, based on checking and adjusting the optical components to achieve the desired performance of the system. Accordingly, the process of checking and adjusting optical components requires substantially higher labor costs than passive alignment. The difference in labor costs is further compounded in fabricating MEMS devices because MEMS devices can have hundreds of components that need to be aligned in order for the system to function properly. In such a system, the cost of active alignment could total thousands of times the cost of passive alignment.
Generally, optical system manufacturing seeks to improve the efficiency of which the optical systems can be configured. Passive alignment is essential to any large scale manufacturing of MEMS optical systems because it drastically reduces the necessary labor costs. The availability of passive aligning optical components greatly influences whether it is economically feasible to produce a particular MEMS optical device.

System and method for passive alignment of components in an optical bench


According to an exemplary embodiment of the present disclosure, a method of detecting matter within a filtering device includes measuring a metric indicative of a first quantity of matter within the filtering device and removing a portion of the matter from the filtering device. The method also includes measuring a metric indicative of a second quantity of matter remaining within the filtering device.

Engines, including diesel engines, gasoline engines, natural gas engines, and other engines known in the art, may exhaust a complex mixture of pollutants. The pollutants may be composed of gaseous and solid material, including particulate matter, nitrogen oxides ("NOx"), and sulfur compounds.
Due to heightened environmental concerns, engine exhaust emission standards have become increasingly stringent over the years. The amount of pollutants emitted from an engine may be regulated depending on the type, size, and/or class of engine. One method that has been implemented by engine manufacturers to comply with the regulation of particulate matter, NOx, and sulfur compounds exhausted to the environment has been to remove these pollutants from the exhaust flow of an engine with filters. Extended use and repeated regeneration of such filters may cause the pollutants to build up within the filters over time, and various methods exist for removing built-up pollutants from the filters. It may be difficult, however, to determine the amount of built-up pollutants captured within the filter and/or the condition of the captured pollutants. Thus, it may also be difficult to determine an appropriate filter maintenance and/or cleaning schedule.
U.S. Pat. No. 5,566,545 (the '545 patent) teaches a system for removing particulate matter from an engine filter. In particular, the '545 patent discloses a filter connected to an engine exhaust line, a valve structure within the exhaust line, and an air feeder. When air is supplied to the filter in a reverse flow direction, the air may remove captured particulates from the filter. Although the '545 patent may teach the removal of matter from a filter using a reversed flow, the system described therein is not capable of determining either the quantity or the condition of matter trapped within the filter.
The present disclosure is directed to overcoming one or more of the problems set forth above.


A device 10 for dissolving a coagulant having a rotor chamber 13 supporting rotors 21 around the horizontal axis, wherein a mixture of the coagulant and water is fed to the rotor chamber 13, the liquid level of the mixture is kept at a medium level of the rotors 21, and the mixture can be stirred vertically by means of the rotation of the rotors 21.

1. Field of the Invention
The present invention relates to a dissolving device in which a high molecular coagulant is gelled by adding water.
2. Description of Related Art
A coagulant which is a water-soluble polymer having a high molecular weight (for example, "DIAFLOC" produced by Diafloc Company Limited) has conventionally been used for the dehydration of sludge and the treatment of various kinds of waste water. The coagulant neutralizes the surface charge of colloids and particulate which are suspended in water to flocculate the particles thereof, and form large flocs by the absorption and crosslinking action to facilitate the settling or floatation of the suspended substances.
It is required that the coagulant is dissolved in water prior to the use and a diluted aqueous solution is prepared. The coagulant, however, is not easily dissolved in water in a short period of time, though it is water-soluble, and several hours are required to prepare a diluted aqueous solution in a single dissolving process. Generally, therefore, in such a procedure, a coagulant is first gelled, then a diluted aqueous solution is prepared. The coagulant in a gel form readily dissolves in water in several seconds.
The conventional dissolving device in which the coagulant is gelled by adding water uses a method in which, as shown in FIG. 7 of the drawings, water and the coagulant are put into a vessel of 100 m.sup.3, a rotation axis is inserted therein from the upper side, and a stirrer having a propeller shape, fixed to a lower end of said rotation axis is rotated at a low speed to gel the coagulant in a period of 30 minutes to 1 hour, and this process is repeated. (This is a low-speed stirring batch treatment.)
The conventional method, however, utilizes low-speed stirring with a propeller-shaped stirrer and requires 30 minutes to 1 hour to gel the coagulant, result in the low productivity.
If the mixture of the coagulant and water is stirred at a high speed, the coagulant is not dissolved and the mixture becomes an aggregate of half-gelled particles which makes the half-dissolved coagulant a nucleus, and a readily water-soluble property is not obtained. Furthermore, the coagulant generally develops viscosity in the mixture as the coagulant is dissolved, and this viscosity can be referred to as a barometer which shows the cohesion (the absorption and crosslinking action) after the dilution. In the mixture stirred at a high speed, the viscosity is poor, which makes the flocculating force weak after the dilution.

Kobayashi Engineering Works, Ltd. Diafloc Company Limited


A cloud based service architecture is used in providing Master Data Management (MDM) services to clients. The MDM cloud based architecture comprises a client architecture and a server architecture. The client architecture includes synchronization services that are used to interact with the MDM cloud based service. The server architecture comprises a public Application Programming Interface (API) and a portal for accessing different MDM functionality. For example, a client may access the server architecture to create/modify MDM workflows that are hosted by the cloud based service. The cloud based service architecture also provides access to different MDM services including MDM workflows, validation, transformation, and storage relating to master data. The cloud based architecture may be used to publish master data and/or subscribe to master data.

Many Master Data Management (MDM) services help enterprises standardize the data people rely on to make critical business decisions. Using MDM Services, organizations attempt to manage critical data assets companywide and across diverse systems, in an attempt to enable more people to securely manage master data directly, and to ensure the integrity of information over time. Each enterprise maintains their own MDM service which can be a complex undertaking.

Cloud based master data management architecture


An optical-fiber filter system to narrow a linewidth and to reduce noise fluctuations of an optical beam is provided. The optical-fiber filter system includes an optical fiber having a first end-face and an opposing second end-face, the first end-face and the second end-face setting a fiber length; a fiber Bragg grating having a first reflectivity positioned at the first end-face; and a reflector having a second reflectivity positioned at the second end-face. When the optical beam at a first frequency is coupled from a laser into one of the first end-face or the second end-face, a resonant cavity is established at the first frequency between the fiber Bragg grating and the reflector while Brillouin scattered light shifted from the first frequency within the optical fiber is transmitted through the fiber Bragg grating.

Resonator fiber optic gyroscope (RFOG) has the potential of serving a wide range of applications. Narrow linewidth lasers with very low phase noise are a critical component needed for achieving the high performance targets for the RFOG. Currently available lasers and potential lasers in development do not meet the phase noise requirements.

Narrow bandwidth reflectors for reducing stimulated Brillouin scattering in optical cavities


A bone plate system including a bone plate and a bone screw with an integrated locking mechanism is disclosed. The bone screw includes an elongate member having a threaded shank and a bone screw head that is radially deformable. The integrated locking mechanism sits within the bone screw head and can rotate between a locked condition and an unlocked condition. When the bone screw head is seated within an aperture in the bone plate, rotating the integrated locking mechanism into the locked condition helps to prevent bone screw backout.

For a number of known reasons, bone fixation devices are useful for promoting proper healing of injured or damaged vertebral bone segments caused by trauma, tumor growth, or degenerative disc disease. The fixation devices immobilize the injured bone segments to ensure the proper growth of new osseous tissue between the damaged segments. These types of bone fixation devices often include internal bracing and instrumentation to stabilize the spinal column to facilitate the efficient healing of the damaged area without deformity or instability, while minimizing any immobilization and post-operative care of the patient.
One such device is an osteosynthesis plate, more commonly referred to as a bone fixation plate, that can be used to immobilize adjacent skeletal parts such as bones. Typically, the fixation plate is a rigid metal or polymeric plate positioned to span bones or bone segments that require immobilization with respect to one another. The plate is fastened to the respective bones, usually with bone screws, so that the plate remains in contact with the bones and fixes them in a desired position. Bone plates can be useful in providing the mechanical support necessary to keep vertebral bodies in proper position and bridge a weakened or diseased area such as when a disc, vertebral body or fragment has been removed.
It is known that in bone plate systems in general, and in those systems used for stabilization of the spinal column in particular, a loosening of the bone screws which secure the bone plate to the bone segment can occur. When the bone screws become loose, they may move in an axial direction (i.e., screw back out may occur).
Conventional bone plate systems offer several options for securing the bone screws to the bone plate and preventing screw backout. For example, some systems rely on split rings positioned between the bone screw and the bone plate; other system use bone screw covers that are mated to the bone plate in a position above an implanted bone screw; and still other systems use a locking screw that is driven into the top of an implanted bone screw. Despite the existence of these bone plate systems, there remains a need for an effective bone screw locking mechanism that can be installed and actuated with ease and efficiency.

This patent is subject to a terminal disclaimer.

Locking bone screw and spinal plate system


A batch-processing type semiconductor-manufacturing device includes a cylindrical reaction chamber with its upper end closed and its bottom end open, a substrate-supporting boat loading multiple substrates, which are inserted within the reaction chamber, and an injector for spraying a reaction gas to the substrates, which injector is provided parallel to the substrate-supporting boat within the reaction chamber. The injector is supported by an injector holder, and both the injector and the injector holder are fitted by a male-female fitting structure.

1. Field of the Invention
The present invention relates to a batch-processing type CVD device of the low-pressure vertical model, and particularly relates to a gas injector (hereinafter referred to as xe2x80x9can injectorxe2x80x9d) and a gas injector holder (hereinafter referred to as xe2x80x9can injector holderxe2x80x9d) within the device.
2. Description of the Related Art
As semiconductor devices have become more highly integrated, reducing a cell area is necessary. In the thin-film forming process, the quality of a film is an important factor for the high integration as well as the homogeneity of film thickness. Particularly in the case of multicomponent thin films (for example, doped-poly Si, SiGe, BST), the homogeneity of the concentration of each constitutive chemical element and doping element has a great influence on the film quality.
Conventionally, an injector has been used to improve the concentration homogeneity of each chemical element in high-productivity batch-processing type CVD devices of the low-pressure vertical model. The injector is to spray a reaction gas to multiple semiconductor substrates at the same time and is fixed within a reaction chamber using a metal injector holder. In this method, however, there is a risk of metal contamination from the injector holder, and it is difficult to employ this method for high-vacuum devices for which high purity is demanded or for processes for next-generation devices.
Additionally conventionally, an injector holder made of SUS (stainless steel) is used to fix an injector made of quartz within the reaction chamber. The injector is fixed by inserting it in the injector holder installed on a gas flange made of SUS (stainless steel). In this method, however, a problem of metal contamination from the injector holder has not been completely solved. For this reason, it is difficult to employ this method for high-vacuum devices for which high purity is demanded or for processes for next-generation devices.
Furthermore, conventionally, to solve the metal contamination problem, an L-shaped integrated injector made of quartz, in which an injector and an injector holder are formed as one, is used. For CVD devices of the typical low-pressure vertical model, the height of a reaction zone is approximately 500 mm. However, the height from a gas inlet to the highest portion of the reaction zone is approximately 1000-1500 mm. In this case, if the angle of the L-shaped portion of the injector deviates by one degree, a gap at the highest portion will become 17-26 mm. Accordingly, when shaping an L-shaped quartz injector by bending, strict accuracy is required, and thus it is not practical to use the L-shaped integrated injector made of quartz for a device which has a small margin between a substrate boat and an inner tube.
Furthermore, for an L-shaped integrated injector made of quartz, because removing a holder portion is necessary when replacing the injector, it takes much care and there is a risk of damaging the injector.
Consequently, an object of the present invention is to provide an injector which can be used for a device with a small margin between a substrate boat and an inner tube and which is not influenced by the accuracy of processing.
Additionally, another object of the present invention is to provide a semiconductor-manufacturing device, which has an injector in which a problem of metal contamination does not occur.
Furthermore, still another object of the present invention is to provide a semiconductor-manufacturing device, which has an injector wherein an injector can be easily replaced without a risk of damaging the injector.
To achieve the above-mentioned objects, a semiconductor-manufacturing device according to the present invention comprises the following means:
That is, in an embodiment of the present invention, a batch-processing type semiconductor-manufacturing device comprises: (a) a cylindrical reaction chamber with its upper end closed and its bottom end open, (b) a substrate-supporting boat for loading multiple substrates which are inserted within the reaction chamber, (c) an injector for spraying a reaction gas to the substrates, said injector being provided parallel to the substrate-supporting boat within the reaction chamber, and (d) an injector holder for supporting the injector, wherein the injector and the injector holder are detachably joined by a male-female fitting structure.
The fitting structure is preferably made of quartz so that metal contamination can be prevented. However, even if either or both of the male portion and the female portion are made of a metal, the injector can advantageously be detached and replaced. Preferably, the injector has a male end, and the injector holder has a female end. However, the other way around is also feasible. Various male-female fitting structures may be available. Preferably, a ball joint is used.
For purposes of summarizing the invention and the advantages achieved over the prior art, certain objects and advantages of the invention have been described above. Of course, it is to be understood that not necessarily all such objects or advantages may be achieved in accordance with any particular embodiment of the invention. Thus, for example, those skilled in the art will recognize that the invention may be embodied or carried out in a manner that achieves or optimizes one advantage or group of advantages as taught herein without necessarily achieving other objects or advantages as may be taught or suggested herein.
Further aspects, features and advantages of this invention will become apparent from the detailed description of the preferred embodiments which follow.


Process data mining system and method. The system analyzes data from complex process plants or systems and operates in open-book and closed-book modes. In closed-book mode, the system monitors incoming data sets against pre-defined clusters of data values and generates reports, indicating whether incoming data is a match or a no-match with the pre-defined clusters. In open-book mode, the system generates initial clusters, without having a-priori knowledge of the component or process, and also creates clusters “on the fly”, thereby fine-tuning the analysis. A knowledge base encompasses a combination of parameters for a particular component. Clusters are defined within the knowledge base, each cluster representing a particular operating condition. The system expands clusters, within pre-defined limits, or creates new clusters, as needed, in order to accommodate incoming data values. Newly created clusters are then named, so as to indicate the particular operating conditions.

1. Field of the Invention
The invention relates to the field of monitoring industrial process plants. More particularly, the invention relates to a method of process data mining.
2. Description of the Prior Art
Industrial process plants employ various means to monitor processes and equipment. These may be Intelligent Electronic Devices (IED) specially made for particular equipment or some mathematical modeling method. IEDs are designed around the concept of a feedback control loop based on traditional control theory. Usually set points are defined within the range of data; violations of these set points trigger an alarm mode. These methods, while excellent at determining violation of set conditions and/or adjusting the control loop accordingly when system parameters change, are usually computationally intensive, even for monitoring and controlling a single piece of equipment. The complexity of such systems increases exponentially when implemented at the plant level, let alone for a fleet-wide implementation.
On the other hand, most mathematical methods employed in the industry currently utilize a two step process for analyzing and monitoring data: a training step and a monitoring step. In the training step, the system "learns" the modeling parameters, based on a-priori data, and in the monitoring step, the system monitors the equipment or the process against the "learned" result.
The major disadvantage of using such a two step process for learning and monitoring is that inconsistent results may be observed if the model changes due to a changing physical process, corrupt data, sensor malfunction etc. In such cases, there are no sure ways to know why the results are inconsistent and this gives rise to the possibility of false alarm.
Another obvious limitation is that a "clean" or optimal set of data is required to train the model before monitoring can be performed. This initial optimal data set usually is not available for the real world and has to be obtained either from simulation or from filtering existing prior data. If the model developed in such a way has some errors, or if some unforeseen event is seen in the data, the model has to be retrained to account for such a data point. This retraining of the model introduces an added effort in the monitoring step.
What is needed, therefore, is a method for analyzing and classifying process data that does not require a clean set of data for training purposes, but that learns parameters on the fly by looking at changing data. What is further needed is such a method that optimizes the control data as more data is added. What is yet further needed is such a method that differentiates between key parameters and base parameters. What is still yet further needed is such a method that combines outputs of related sensors.

Method for analyzing and classifying process data that operates a knowledge base in an open-book mode before defining any clusters


The present invention relates to an improved anti-theft, security package for selectively retaining an object or releasing the object for removal from the housing. The object may be a recording medium, such as a cassette tape or compact disc. The housing has an object-receiving compartment and an object-conformal access opening which communicates with the compartment. A portion of the package, such as a member, is movable between a first position and a second position. In the first position, the member overlies the access opening to block removal of the object therefrom. In the second position of the member, the access opening is not overlain thereby and removal of the object therefrom is permitted.

The present invention relates to a package for recording media and, more particularly, to a reusable, theft-preventing, security package for recording media, such as audiocassettes and compact discs.
Theft-preventing packages for recording media, such as audiocassettes and compact discs, are well-known. Because they are usually molded of clear plastic, these packages typically permit display of the labels on or other literature associated with the recording media, while retaining the recording medium in the package for security, anti-theft reasons. The packages have a size which renders difficult, if it does not prevent, theft of recording media. Unlike records, audiocassettes and compact discs are quite small. If they are not captured in a large size package, they would be easy targets for theft achieved by simply being pocketed or placed in a purse.
Security packages of the above type typically include a frame-like housing of a size sufficiently larger than recording media to obviate the theft of media retained therein by pocketing or palming same. The frame also typically permits a retained recording medium to be displayed, either in a rack or bin or on a peg board. The typical clear plastic package permits relevant data--on labels or included literature--concerning what is recorded on the medium to be ascertained by a customer.
Initially, anti-theft, security packages of the type involved herein were molded so that a tape cassette or CD could be trapped or locked in a compartment thereof by a member on or portions of, the package, which, once fitted together or interlocked with a housing, could not easily be disassociated therefrom. In using the foregoing type of anti-theft package, cashiers or other store personnel (or the customer) would remove the cassette from the package by cutting or severing a portion of the package with an appropriate tool. This cutting or severing, of course, rendered the package not reusable and required its disposal. From an environmental standpoint, such single use and disposal of a molded plastic package is undesirable and, of course, is also wasteful of material and, to that extent, costly. Examples of this type of security package may be found in the following U.S. Pat. Nos. 4,245,741 to Holkestad; 4,381,836 to Rivkin, et al.; 4,567,983 to Morris; 4,572,369 to Morris; 4,759,442 to Gregerson, et al.; and 4,865,190 to Gregerson.
Modified versions of the foregoing anti-theft, security packages involve relatively movable members on the packages, which are normally locked together to a housing to trap the recording medium therein, but which may be unlocked through the use of common tools such as pliers or screw drivers. See U.S. Pat. Nos. 4,759,442 to Gregerson and 4,921,097 to Finke, et al. In the former patent, as noted above, the package may be removed by cutting or severing a member or element of the package which normally holds or retains the recording medium in the package, or, the package may be "unlocked" my manipulation of a common hand tool, such as a pliers or the like. In the latter patent, relatively lockable, medium-retaining members of the package are unlocked and opened with a screw driver. A shortcoming of the package represented by the foregoing two patents is that, to the thief or other miscreant, the matter of opening the package to remove the recording medium is relatively obvious and/or may be easily achieved, as noted, with common hand tools. Thus, these packages offer minimal anti-theft security, since one can, with little difficulty, open the package, remove the recording medium, and pocket same.
Other developments in the anti-theft packaging field are represented by U.S. Pat. Nos. 3,828,922 to Holkestad; 3,871,516 to Holkestad, et al. and 4,285,429 to MacTavish. In all three of these patents, a special "key" or the like having a configuration somewhat different from any standard hand tool is used to unlock relatively locked together medium-retaining members of the package permitting their disassociation and the subsequent removal of the recording medium. However, in all three of these patents, the type of key required is readily apparent from inspection of the package and may be easily counterfeitted or mimicked, and, similarly to packages which may be opened with common hand tools, these packages, therefore, offer limited anti-theft security for contained recording media.
Other types of reusable anti-theft packages for recording media, while possibly effective in preventing theft, involve molded plastic members or a combination of molded plastic members and mechanical elements, which are extremely complicated, thereby increasing the cost thereof. Such devices are represented by U.S. Pat. Nos. 3,933,240 to Humble; 4,589,549 to Hehn and 4,834,238 to Hehn, et al. Another rather complicated anti-theft recording medium package is represented by French Patent 2,497,992.
The reusable anti-theft package of U.S. Pat. No. 4,589,549 includes a housing having a conformal storage compartment for a recording medium. A slide plate is mounted to the housings so that it may move linearly between a first position and a second position. In the first position of the slide plate, a portion thereof overhangs the conformal storage compartment blocking removal of the recording medium therefrom. In its second position, the slide plate uncovers the conformal storage compartment and permits the recording medium to be removed. Integrally molded with the slide plate are flexible levers. A portion of the housing overlain by the slide plate includes projections. These projections engage and interfere with the levers in the slide plate in the first position thereof to normally prevent linear movement of the slide plate. The housing includes one or more openings to permit the passage therethrough of portions of a "key". When the key protrudes through the openings, the levers in the slide plate are flexed thereby out of engagement with the projections, permitting the slide plate to be linearly moved to its second position, thereby permitting removal of the recording medium. While the structure of the foregoing '549 patent is apparently effective as an anti-theft, security package, it is, as already noted, somewhat complex in structure and, therefore, requires rather complex molds, which, accordingly, increases the cost of its production. The earlier, previously-noted '992 French patent, which is in appearance somewhat different from the structure of the '549 patent, contains essentially the same elements and functions operates in essentially the same manner.
The structure covered by the above-noted '238 patent is another version of an anti-theft, recording medium package, which, while apparently effective in achieving its goal, is rather complex in structure and, accordingly, expensive to manufacture. The package of the '238 patent includes a housing with a conformal recording medium-receiving compartment. A plate connected to the main portion of the housing (through dual living hinge structure) is both linearly slidable relative to the housing and may, after being slid in a selected direction, be unfolded by being rotated out of the plane of the housing. In a first position of the slide plate, a portion thereof overlies the conformal storage compartment preventing removal of a recording medium therein. Flexible levers on the housing normally interfere with projections on the slide plate to prevent the slide plate from being linearly moved out of its first position. Openings are provided in the slide plate for the insertion thereinto of a key. The inserted key flexes the levers out of interference with the projections on the slide plate, permitting the slide plate to be linearly moved from a first position to a second position. In its second linear position, the slide plate may be unfolded on the dual living hinges, that is, rotated out of the plane of the housing, to fully uncover the storage compartment permitting removal of the recording medium.
As noted above, many of the prior art anti-theft recording medium packages are not reusable in that they must be cut or severed to remove recording media therefrom. In other prior art anti-theft packages, which are reusable, removal of the recording medium is achieved by the use of either common hand tools or simple keys, the counterfeiting of the latter which or the substitution thereof being a simple matter for a determined thief or miscreant. Yet other prior art, reusable anti-theft packages which require special keys are complex in structure and expensive to manufacture.
An object of the present invention is the provision of a reusable, anti-theft, security package for recording media, which is simple in configuration, inexpensive to manufacture and the unlocking of which requires a special key, the configuration and function of which is not obvious to (or simply reproducable by) a thief or miscreant; to thereby surreptitiously obviate removal or theft of the recording media from the package.


An induced draft, fuel-fired furnace having a heat exchanger with an inlet and an outlet includes a vent having an inlet, a burner, and a vented vestibule in fluid communication with the vent. A blower has an inlet in fluid communication with the heat exchanger outlet, and an outlet disposed at the inlet of the vent. The blower outlet has a cross-sectional area smaller than the vent inlet. The vent inlet and blower outlet define a vent inlet opening. A drafthood formed with an inlet is disposed in the vestibule and forms a plenum in fluid communication with the vent inlet opening. A source of combustion products is disposed in the furnace such that combustion products produced thereby are in fluid communication with the drafthood inlet and vent inlet opening. The source of combustion products includes either a standing pilot or electronic ignitor for igniting fuel operably discharged from the burner.

1. Field of the Invention
The present invention relates to furnaces, and, more particularly, to induced draft, fuel-fired furnaces having a standing pilot.
2. Description of the Related Art
High efficiency fuel-fired furnaces of the type herein concerned include a combustion chamber wherein fuel such as natural or liquified petroleum (LP) gas is burned creating hot gaseous products of combustion, i.e., exhaust gas. A burner having one or more exhaust ports formed therein is connected to a fuel source and burns the fuel which is ignited. The hot exhaust gas is circulated through a heat exchanger which is heated thereby. Air circulates past the heat exchanger and is heated thereby via convection heat transfer. The heated air is circulated through a living space by a circulating blower. In an induced draft furnace, an exhaust blower is located between the heat exchanger and the flue outlet of the furnace and draws the products of combustion through the heat exchanger and discharges them into an exhaust vent.
To ignite the fuel exhausted from the burner, it is known to use either an electronic ignition apparatus or a standing pilot. An electronic ignition apparatus is operably controlled when fuel is exhausted from the burner to ignite the fuel. An electronic ignition system is considerably more costly and complex than a standing pilot. A standing pilot maintains a continuously burning open flame regardless of whether fuel is exhausted from the burner. During periods of inactivity of the burner, therefore, it is necessary to vent the relatively small amount of combustion gas produced by the standing pilot to the flue and ambient environment. A furnace using a standing pilot is less expensive to manufacture than a furnace using an electronic ignition system and may therefore be preferred.
It is known to vent the combustion products produced by a standing pilot through the heat exchanger and into the flue. However, some high efficiency furnaces provide increased heat exchanger efficiency by increasing the pressure drop of the exhaust gas between the inlet and outlet of the heat exchanger. This may be accomplished by providing a longer flow path and/or appropriate sized conduits at various locations within the flow path. This higher pressure drop increases the efficiency of the heat exchanger when exhaust gas is circulated therethrough, thus requiring less heat transfer area for a given output; however, it also prohibits the venting of the standing pilot combustion products through the heat exchanger during periods of inactivity of the burner, i.e., idle flow conditions.
The higher pressure drop therefore further increases internal heat exchanger resistance prohibiting the safe venting of standing pilot combustion products. Thus, a standing pilot may be preferred to reduce manufacturing costs, but may not be safely vented into the heat exchanger and ultimately to the vent.
One method of obtaining the advantages of using a standing pilot while at the same time avoiding the problems of unsafe pilot gas venting mentioned above is to provide a vent tube disposed immediately above the standing pilot. The vent tube is connected to and in fluid communication with the outlet section of a draft inducing fan. Such an apparatus, however, requires relatively precise placement of the vent tube above the standing pilot flame and a specially manufactured or modified blower. Moreover, to prevent back flow of exhaust gas during operation of the blower, a special venturi section forming member must be rigidly fixed at a precise location within the blower adjacent the outlet of the vent tube, thereby further increasing manufacturing costs.
What is needed in the art is an apparatus and method which allows a standing pilot to be used with a high efficiency furnace by easily and inexpensively bypassing the combustion products of the standing pilot directly to the flue of the fuel-fired furnace.

Standing pilot furnace with vented vestibule


A rubber-erasable aqueous ink for a writing material composition contains water, a water-soluble polar solvent, and a particulate adhesive colored resin. The particulate adhesive colored resin contains a pigment and an adhesive resin which is adhesive on at least a part of a surface thereof. The particulate adhesive colored resin has a particle diameter distribution such that the amount of particles having a particle diameter of from 2 xcexcm to 20 xcexcm is not less than 70% by weight of all the particles.

The present invention relates to a rubber-erasable aqueous ink for a writing material composition and writing materials including same incorporated therein. More particularly, the present invention relates to a rubber-erasable aqueous ink for a writing material composition which gives onto paper writing that can be easily erased by an eraser but can be retained thereon even when normally rubbed with finger or paper. Even more particularly, the present invention relates to a rubber-erasable aqueous ink for a writing material composition which, when heated, exhibits a permanent fixability such that writing cannot be erased even when vigorously rubbed.
Many proposals have been heretofore made on ink compositions which provide writing that can be erased by an eraser. These ink compositions can be roughly divided into two groups, i.e., oil ink including a colorant and a vehicle containing a resin dissolved in an organic solvent as a main solvent and aqueous ink including these components dissolved in water as a main solvent. Examples of the oil ink include rubber-erasable aqueous ink for a writing material compositions for ball point pen including a pigment, a specific organic solvent and an elastomer resin having rubber elasticity as disclosed in U.S. Pat. Nos. 4,389,499, 4,390,646 and 4,391,927. The foregoing ink composition includes a resin having a high molecular weight and thus exhibits a high viscosity. In this arrangement, it is tried to prevent the pigment from penetrating deep into paper together with the solvent, making the writing formed by the pigment on paper erasable by an eraser. However, the foregoing ink composition can be practically erased by an eraser for a short period of time after writing but can be erased less gradually with time.
Another disadvantage of the foregoing oil ink composition is that since the solvent used is hardly volatile and thus is normally slow-drying after applied to paper, the ink composition which has just been applied, even when lightly rubbed with finger or hand, causes the undried portion to move to blank area (area around the writing), causing remarkable stain on paper as well as on finger or hand, even on clothing On the other hand, many proposals have been recently made on rubber-erasable aqueous ink for a writing material composition including water as a main solvent. One of these proposals is a rubber-erasable ink composition including a pigment in an amount of from 1 to 50%, a resin having a film-forming temperature of not lower than 40xc2x0 C. in an amount of from 3 to 50%, an organic solvent in an amount of 0.5 to 50% and water in an amount of from 7 to 60% based on the total weight of ink as disclosed in JP-A-4-332776. Since the foregoing ink composition includes a general-purpose pigment that can easily penetrate deep into paper, it can be fairly erased by an eraser. Further, since the resin cannot form a film at room temperature, the film (writing) can be poorly preserved.
Another proposal is an erasable ink composition including a water-insoluble polymer-capsuled colorant obtained by subjecting at least one emulsion-polymerizable monomer including a colorant dissolved therein to polymerization under emulsion polymerization conditions as disclosed in U.S. Pat. No. 5,661,197. In this proposal, a capsuled colorant including a colorant incorporated in a water-insoluble polymer is prepared under emulsion polymerization conditions. The resulting capsuled colorant includes finely divided particles having a diameter of not more than 1 xcexcm. As a result, when the ink composition is applied to paper, the finely divided colorant particles penetrate deep into paper and are trapped by paper. Thus, the foregoing ink composition can be poorly erased by an eraser. Further, the water-insoluble dye to be incorporated in the capsuled colorant is liable to extraction in the aqueous vehicle with the water-soluble polar solvent or surfactant in the aqueous vehicle. The dye thus extracted dyes the surface of paper to an extent such that the trace of writing can be left unerased even when rubbed with an eraser.
A further proposal is an erasable ink having a viscosity of from 5 to 35 mPaxc2x7s including a resin having a film-forming temperature of not higher than 0xc2x0 C. and a glass transition temperature of not higher than 0xc2x0 C., a particulate colored resin having a particle diameter of from 1 xcexcm to 20 xcexcm and water as disclosed in U.S. Pat. No. 5,621,021. In an attempt to prevent the trace of the writing from being left unerased when rubbed, the foregoing erasable ink includes colored resin particles having a great diameter which can less penetrate deep into paper. Nevertheless, the particulate resin used has a particle diameter which is not so small enough and thus can easily penetrate deep into paper. Thus, the particulate colored resin exhibits an enhanced adhesivity to the surface of paper and to each other. Accordingly, the foregoing erasable ink differs greatly in rubber-erasability from paper to paper.
Further, the use of the foregoing conventional rubber-erasable ink compositions for important document such as official document which allows no alteration and document containing date and amount of money is limited.
It is an object of the present invention to provide ink composition which can eliminate the foregoing disadvantages of the foregoing erasable ink compositions, that is, can not only be fairly erased by an eraser but also be fairly retained on paper.
As a result of the inventor""s extensive studies of such ink composition, the inventors paid their attention to the fact that the use of finely divided particles having a particle diameter of not greater than about 1 xcexcm as at least one of coloring element and bonding element has an adverse effect on the rubber-erasability of the conventional ink compositions.
The foregoing particles concerning coloring element and bonding element can penetrate less deep into paper or can easily prevent themselves from penetrating deep into paper if they have a sufficient particle diameter. Taking into account the normal distribution of the particles which have just been prepared, if the particles are distributed in a range of from 2 xcexcm to 20 xcexcm they can almost prevent themselves from penetrating deep into paper. These conditions must be applied both to coloring particles and bonding particles. In other words, even if the particle diameter of the coloring agent falls within the range of from 2 xcexcm to 20 xcexcm, when the particle diameter of the bonding particles falls within the range of from 0.1 xcexcm to 1 xcexcm as in general-purpose resin dispersion, the bonding particles penetrate deep into paper to strongly fix the coloring particles to the surface of paper from behind, making it impossible to obtain a good rubber-erasability. On the contrary, if the particulate coloring agent has a particle diameter of from 0.1 xcexcm to 1 xcexcm, the coloring agent itself penetrates deep into paper regardless of the particle diameter of the bonding particles, making it impossible to obtain a good rubber-erasability. It can therefore be presumed that all the conventional ink compositions are liable to penetration of particulate coloring agent and/or adhesive into paper and thus can attain neither good rubber-erasability nor high fretting resistance. It was thus found concerning the relationship between the penetration of particles into paper and the particle diameter that if the particles concerning coloring element and bonding element have a particle diameter of not less than about 2 xcexcm, the penetration of particles into paper can be lessened or eliminated. The present invention has thus been worked out.
Further, an unprecedented knowledge was found that the incorporation of xe2x80x9cheat-sensitive elementxe2x80x9d in a particulate colored ink composition containing coloring agent particles and bonding particles or the incorporation of xe2x80x9cheat-sensitive elementxe2x80x9d having particles distributed in a particle diameter range of from 2 xcexcm to 20 xcexcm in an ink composition containing particles having coloring properties and adhesive properties makes it possible to provide a writing that can be permanently fixed when subjected to heat treatment. The present invention has thus been worked out.

Rubber-erasable aqueous ink for writing material composition and writing materials using the same


Methods and systems for hardening a clocked latch against single event effects are disclosed. A system includes a first three-input OR gate, a first NAND gate, a second three-input OR gate, and a second NAND gate. The first three-input OR gate receives as inputs a clock signal, a first signal, and a redundant first signal. An output of the first three-input OR gate is connected to an input of the first NAND gate. The second three-input OR gate receives as inputs the clock signal, a second signal, and a redundant second signal. An output of the second three-input OR gate is connected to an input of the second NAND gate. A first output signal of the first NAND gate is connected to another input of the second NAND gate and a second output signal of the second NAND gate is connected to another input of the first NAND gate.

A latch is an electronic device that is typically used to store data. An output of a latch may depend not only on its current input, but also on its previous inputs and outputs. Latches may include any of a variety of logic devices such as NAND gates and NOR gates, and the logic gates may include semiconductor devices such as transistors.
A latch or flip-flop (or circuit, more generally) may be used in applications in which the circuit is exposed to harsh environments, such as in space and military applications. However, these circuits may be susceptible to Single Event Effects (SEE). An SEE is a disturbance in an active semiconductor device caused by a single energetic particle. As semiconductor devices become smaller and smaller, transistor threshold voltages decrease. These lower thresholds reduce the charge per node needed to cause errors. As a result, the semiconductor devices become more and more susceptible to transient upsets.
One type of SEE is a single event upset (SEU). An SEU is a radiation-induced error in a semiconductor device caused when charged particles lose energy by ionizing the medium through which they pass, leaving behind a wake of electron-hole pairs. The electron-hole pairs form a parasitic conduction path, which can cause a false transition on a node. The false transition, or glitch, can propagate through the semiconductor device and may ultimately result in the disturbance of a node containing state information, such as an output of a latch, flip-flop, or register.
An SEU may be caused in any of a variety of ways. As an example, an SEU may be caused by ionizing radiation components, such as neutrons, protons, and heavy ions. Such ionizing radiation components are abundant in space and at commercial flight altitudes. As another example, an SEU may be caused by alpha particles from the decay of trace concentrations of uranium and thorium present in some integrated circuit packaging. As yet another example, an SEU may be caused by detonating nuclear weapons. When a nuclear weapon is detonated, intense fluxes of gamma rays, x-rays, and other high-energy particles are created, and these high-energy particles may cause an SEU.
A latch or flip-flop may be susceptible to SEU in any of a variety of ways. As examples, if an input to or transistor in the latch or flip-flop changes state due to an SEU, then the latch or flip flop may produce an erroneous output.


In an optical recording medium comprising a recording layer on a substrate, a reflective layer in the form of a Cu-Ag or Cu-Au alloy thin film is formed on the recording layer. The Cu-Ag alloy contains 5-40 atom% of Ag and the Cu-Au alloy contains 5-99 atom% of Au. The reflective layer has enough high reflectivity, corrosion resistance, and hardness to provide optical recording medium with improved eye pattern, minimized jitter and minimized error rate.

Additionally or fully recordable optical recording disks of the type having recording and reflective layers on a substrate were proposed in accordance with the compact disk (generally known as CD) standard See Nikkei Electronics, Jan. 23, 1989, No. 465, page 107; the Functional Dye Department of the Kinki Chemical Society, Mar. 3, 1989, Osaka Science & Technology Center; and SPIE, Vol. 1078, Optical Data Storage Topical Meeting, 80, 1989.
This type of disk has a dye layer, a reflective Au layer, and a protective layer disposed on a transparent resin substrate in this order. That is, the reflective layer is in close contact with the dye layer. As opposed to the prior art disk of the air sandwich structure wherein an air layer is provided on a dye layer of the disk in order to allow pits to be formed in the dye layer, the newly proposed disk is of the close contact type wherein the reflective layer is close to the dye layer. The close contact type configuration could meet the total disk thickness of 1.2 mm required by the CD standard.
In the medium of the close contact type wherein a reflective layer is close to a recording layer containing a dye, the recording layer should have a reflectivity of at least 60% with respect to the recording and reproducing light, especially at least 70% in the case of the CD standard. To this end, a gold thin film having high reflectivity and corrosion resistance is used as the reflective layer as disclosed in Japanese Patent Application Kokai No. 79235/1990.
However, the gold thin film has several problems. First, gold is soft. The gold thin film on the recording layer can be deformed by thermal expansion of the recording layer when pits are formed therein by directing recording light to the recording layer. This results in a disturbed eye pattern as reproduced output waveform and increased jitter.
Secondly, gold is expensive. It was proposed to use thin films of silver, copper and other less expensive metals as the reflective layer. For example, Japanese Patent Application Kokai Nos. 79235/1990 and 87341/1990 discloses thin films of Ag and Cu as the reflective layer. The Ag and Cu thin films provide a reflectivity of about 70% as deposited, which is gradually lost due to poor corrosion resistance. Acceptable reflectivity is not available with thin films of metals other than Ag and Cu, for example, aluminum thin films. Therefore, optical recording disks having thin films of metals other than Au as the reflective layer are increased in error rate and thus impractical.

Optical recording medium having a reflective layer made of Cu-Ag or Cu-Au alloy


In a rotation angle detecting device, a signal from a first magnetism detecting element is outputted to a signal output part of a first IC package. A first signal output terminal outputs the signal from the first magnetism detecting element to outside. A signal from a second magnetism detecting element is outputted to a signal output part of a second IC package. A second signal output terminal outputs the signal from the second magnetism detecting element to outside. At least one of a power supply terminal and a ground terminal is located between the first and second signal output terminals. A rotary drive unit includes the device, a motor that rotates a detection object, and a motor power source wire. The ground terminal and a motor power source terminal are adjacent to each other.

Conventionally, there is known a rotation angle detecting device with two integrated circuits (IC) packages including magnetism detecting elements respectively. In, for example, JP-A-2004-004114, there is described a rotation angle detecting device in which two IC packages are arranged side by side in a board surface direction (see FIG. 6 in JP-A-2004-004114). In this rotation angle detecting device, two magnetism detecting elements are arranged at positions away from a rotation axis of a detection object. Accordingly, by providing a stator having a magnetic collecting effect, deterioration of sensor characteristics is limited.
In the case of the above-described rotation angle detecting device, if the stator is eliminated for the purpose of cost reduction, the sensor characteristics deteriorate, and accuracy in detection of a rotation angle is reduced. In JP-A-2004-004114, it is illustrated that two IC packages are arranged side by side in a board thickness direction (see FIG. 8 in JP-A-2004-004114). By arranging the two IC packages in this manner, the sensor characteristics are good, so that the stator can be eliminated. However, in the example illustrated in FIG. 8 in JP-A-2004-004114, wires for signal output which are connected respectively to the two IC packages are disposed to be adjacent to each other. For this reason, the wires may be short-circuited, such as when conductive foreign substances are attached between the two wires for signal output. If the wires for signal output are short-circuited, signals from the two magnetism detecting elements may be mixed together to be outputted to the outside. As a result, a false detection of the rotation angle may be caused.

Rotation angle detecting device and rotary drive unit by use thereof