A system and method is provided that creates a multimodal transportation routing that originates using a road-based vehicle which then requires parking. Parking is not necessarily near the destination, but is determined based on user preferences and specification of the relative importance of speed of travel and monetary cost and/or safety. Other factors can also influence the route selection and comprise: parking availability, user preference for parking type, vehicle restrictions, maximum distance a user is willing to walk or bike and what types of public transportation a user is willing to use. Monetary factors include: fuel costs, parking costs, tolls, and public transportation costs.

Basic methodologies for vehicle routing are well understood and documented in the art. A user can enter an origin and a destination into an application which either resides locally on a device or is a web application or a combination of the two. In one system type, a route is calculated based on the least cost of travel, with what constitutes the cost of travel being fixed in the system or specified by the users. Typical costs in such systems are distance to be traveled, duration of travel, which in turn could be a function of speed limit and traffic. Other user preferences can be taken into account as well, such as, for example, a driver's desire to not drive on limited access highways. Existing systems also include algorithms for optimizing routes for multiple stops.
Systems and techniques for navigation to parking areas and also identification of available parking are known. Newer parking structures may have optical or other sensors to detect where parking is available. Much of the time, this information is readily available on the Internet. GPS applications of in-car navigation devices and on smart phones can notify users when individual vehicles move in and out of parking structures. Optical or other forms of sensors can identify when street parking is being used.
Likewise multimodal or inter-modal transportation routing is also known in the art. In vehicle navigation, a road network is typically represented by what is called a multi-graph consisting of intersections (nodes) and road segments (edges). Both the nodes and edges have associated costs of travel. Because one-way roads exist, all edges are directed. There may exist multiple edges between two nodes. For example, there may exist parallel roads without side streets that diverge and join again. Therefore, the road network is represented as a multi-graph, which can have multiple directed edges between the same two nodes. The cost of travel over a particular route is the summation of the cost of travel over all the road segments and through all the intersections that make up that route. An optimal route is the route that has the minimum cost for a given starting point and destination. In the case of a multimodal transportation network database, the multi-graph may have edges that relate to a mass transit system, such as railroad, buses and subways, and also pedestrian and bike routes, among other routes of transportation.
Several road restrictions occur that can prohibit or make travel undesirable using certain maneuvers. For example, a left-hand turn may be prohibited at a certain intersection when traveling in a certain direction. One way to look at prohibited maneuvers is to consider them to have infinite cost. When running a routing algorithm, if a left-hand turn was necessary for a given route and that left-hand turn was prohibited (had an infinite cost), then that route would never be chosen as optimal as its cost would exceed any other route that had no restrictions with infinite cost.

Multimodal vehicle routing system and method with vehicle parking


A performance monitoring technique which allows faults within an optical communication system to be detected and located. More specifically, a technique employing a signal generator to controllably insert maintenance signals at the input and output of each module within an optical communication system, and a single monitor to receive the inserted maintenance signals at a fixed point within the system, and, in response, determine the location of faulty modules. The monitor analyzes the received inserted maintenance signals, and locates faults by pinpointing modules from which a maintenance signal inserted at the module output is received uncorrupted by the monitor, but which return a corrupted maintenance signal when the insertion is made at the module input. A particular embodiment of the invention enables the maintenance signals to be inserted via pre-existing control drivers within system modules. This allows optical losses with the system to be minimized by eliminating the need for introduction of additional optical couplers or attenuators into the system.

The performance of modern optical communication equipment deployed within a communication network must be monitored in a fashion which allows failures to be detected and located quickly and reliably so that immediate measures may be taken to bring the failed equipment back on-line. This minimizes the loss of service experienced by network users, and any loss of revenue to the network provider. Ideally, this monitoring should be capable of localizing any detected faults to a particular module within the network (a module being the smallest unit within the network that can be readily replaced in the event a fault associated with it is detected). In most applications a built-in automatic fault location scheme is essential.
In general, two basic performance monitoring techniques may be employed which allow for quick detection and localization of faults within multi-module optical communication systems and networks. A first technique provides a dedicated performance monitoring system within each module. This technique typically provides the fastest fault locating ability, but requires accessing electrical or optical signals at each system module so that various fault parameters can be measured. The cost of such performance monitoring systems is very high as separate monitoring equipment must be provided for each system module. Furthermore, this type of monitoring system is very lossy. The optical signal within the system must be accessed or "tapped" at each module so that is may be measured by the monitoring equipment, and every such tap introduces optical losses.
A second technique of performance monitoring utilizes a two-level monitoring system. In this system a maintenance signal of known characteristics is either added to the primary information signal being transmitted within the optical system on the same or slightly different wavelength as the primary information signal, or alternatively modulated on the primary information signal at a signal source prior to entering the system. This maintenance signal may, for example, be added at a previous transmitter or a previous optical amplifier. A preferred method of transmitting such a signal is disclosed in co-pending U.S. patent application Ser. No. 07/499,112 now U.S. Pat. No. 5,229,876, filed Mar. 28, 1990. The first level of performance monitoring is accomplished by a dedicated monitor at the input and output ports of the communication system. When this dedicated monitor detects a performance deterioration or a failure (indicated by an anormaly in the maintenance signal), an inter-module monitor is activated and sequentially connected to the input and output of each module within the failing communication system. This sequential switching and monitoring process goes on until the faulty module is identified. The fault will be located at the module which shows the proper maintenance signal at its input, but not at its output. Obviously, this two-level technique is more cost effective than a system in which each module has its own dedicated monitor. However, this two-level technique is relatively slow in locating a fault as a consequence of the switching which must be performed to connect the inner-module monitor the different modules within the system. In addition, the communication system must still be tapped at the input and output port of each module, and these taps add significant optical losses to the system.

Performance monitoring and fault location for optical equipment, systems and networks


The present invention is directed to a detachable handle assembly for providing a mechanical device capable of utilization in securing and un-securing a work attachment, such as a blade or bit, to a hand-tool. The assembly includes a body portion for grasping, when implemented as an auxiliary handle for a hand-tool such as a power tool or a pneumatic tool.

Tools such as power tools, pneumatic tools and the like often require a mechanical device to change attachments. For example, angle grinders typically include a wrench for removing grinding blades, wire brushes and the like. Spanner wrenches, a wrench with two protrusions extending generally perpendicular from the plane of the wrench, are used for changing attachments such as various blades, brushes, and the like on a grinder. The protrusions are designed to fit into a securing collar or the like for securing the attachment to the tool.
Providing a separate mechanical device for changing attachments may result in the device becoming lost, forgotten, or misplaced. As a result, the mechanical device must be retrieved or replaced in order to change the tool's capability. In some instances, the mechanical device is secured to the tool or in the case of a power tool, to the tool's cord, such as by a chain, cord or the like to prevent loss. A mechanical device secured in the previous manner to a hand-held tool may hinder the user and interfere with operation of the tool.
Moreover, mechanical devices add to the overall cost of the hand tool. In order to minimize expense, tool manufactures may provide only inexpensively made mechanical device. For instance, spanner wrenches typically have a Y-shaped flat body with protrusions for engaging a securing collar. As a result of the desire to minimize cost, mechanical devices such as spanner wrenches are often uncomfortable or unwieldy.
Therefore, it would be desirable to provide a detachable wrench handle assembly apparatus capable of dual utilization as a mechanical device and a detachable handle for user manipulation.


This disclosure relates to systems and methods for real-time electrical power grid restorations. An example system may include a real-time monitoring module configured to acquire operational data associated with electrical grid components of an electrical grid. The system may further include a restoration manager module configured to detect, based on the operational data, one or more unplanned outages or other events in the electrical grid. In response to the detection, the restoration manager module can analyze the operational data to determine or select from a database a restoration plan. The restoration plan can include operations associated with commands for control devices, wherein the control devices are operable to control a power transmission between the electrical grid components. The restoration manager module can be further configured to execute the one or more operations of the restoration plan to restore the electrical power grid to a normal operational state.

Operators of electrical power grids are required to have power system restoration plans. A restoration plan is a measure of preparedness for restoring the power system from an abnormal condition. The scope of a restoration plan may range from a relatively simple plan for restoring a few devices back to service, a relatively complex plan like resynchronization of multiple live islands, to a complex plan such as a black start plan intended to restore the power system from a complete blackout condition.
Given the complexity of power system conditions that arise during abnormal situations, conventional power system restoration processes may have some disadvantages caused by inadequate real-time information concerning islands, inadequate software-based decision support in selection of an appropriate restoration plan based on real-time system conditions, human errors while executing a restoration plan, unintentional topological changes, energization or de-energization of buses, equipment safety issues, island formation or resynchronization with non-sustainable frequency, and/or excessive load or generation jump. Such disadvantages may affect the reliability, security, safety, and efficiency of power system restoration processes.


A physical exercise apparatus including a hand-propelled lawn mower having an exercise computer for selectively displaying exercise data including speed and the like thereon obtained while mowing a lawn.

The present invention relates to a hand-propelled lawn mower that is also a physical exercise appliance which is constructed so as to indicate exercise data, including exercise period of time, speed, calories burned, load pushed, pulse rate, and the like of the user during the mowing of a lawn with the mower.
Hand propelled lawn mowers of various types have been well known for many years. Stationary exercise apparatus on which an exercise computer and display is mounted that measures time, distance, calories burned, pulse rate, and the like are also well known. Additionally, various non-stationary exercise apparatus are known, most often bicycles, have had such computers mounted thereon to measure similar functions are known.

Lawn mower with exercise computer and display


An image forming apparatus includes a head part having a jet opening part configured to jet ink, a moisture retention cap configured to maintain moisture by covering the jet opening part, and a suction part configured to suction ink situated at the jet opening part. A suction cap having the suction part is provided separately from the moisture retention cap. The image forming apparatus includes a shutter member configured to open or close an opening part of the suction cap. The shutter member comes in contact with a perimeter of an edge part forming the opening part of the suction cap in a case where the shutter member is closed.

1. Technical Field
The present disclosure generally relates to image forming apparatuses, and more specifically an image forming apparatus including a head part having a jet opening configured to jet ink, a moisture retention cap configured to maintain moisture by closing the jet opening part, and a suction part configured to suction ink situated at the jet opening part.
2. Description of the Related Art
An inkjet printer as an image forming apparatus which jets an ink drop from a jet opening part of a head part so as to form an image on a recording medium is well known. A water type ink composed of a pigment and a solvent wherein a wetting agent (humectant) and penetrating agent are included in water, is used as ink liquid for such an inkjet printer. In an inkjet printer using the ink liquid, ink viscosity is increased due to evaporation of the ink solvent at a head jet opening so that the jet opening is clogged up or closed due to the adhesion of dust and thereby an image is degraded. In order to solve such a problem, Japan Laid-Open Patent Application Publications No. 2002-361905, No. 2003-1839, and No. 2003-1832 suggest a structure where a cap member for capping a head at the time of non-image forming so that moisture of a head jet opening is maintained and a suction mechanism such as a suction pump, provided at the cap member, for suctioning dust adhered to the jet opening together with the ink are provided. Thus, it is possible to prevent the increase of ink velocity.
By capping the head jet opening, ink viscosity is prevented from being increased due to the evaporation of the ink solvent at the head jet opening so that the jet opening is prevented from being clogged up. In addition, the dust adhered to the jet opening is suctioned together with the ink by the suction pump, so that the jet opening is prevented from being closed.
However, in the above-mentioned related arts disclosures, the ink suctioned by the suction pump is adhered to an internal wall surface of the cap member. Thus, if the head is capped in a state where the ink is adhered to the internal wall surface, the viscosity at the head jet opening is increased while the head jet opening is capped by the cap member. This causes an evaporation component such as water of the ink drop adhered to the internal wall surface of the cap member to evaporate when the cap member is opened, so that the ink drop, wherein the evaporation component adhered to the internal wall surface of the cap member evaporates, absorbs the evaporation component situated at the ink jet opening. As a result of this, the viscosity at the head jet opening is increased. Particularly, in a case where the ink liquid has a high viscosity, the image is influenced even if the viscosity at the head jet opening is slightly increased. Because of this, preliminary jetting is performed in order to adjust the viscosity of the jet opening and ink meniscus before printing starts. However, in order to adjust the viscosity of the jet opening, it is necessary to jet a lot of ink drops. Because of this, a lot of, from ten and several to several thousands, ink drops are jetted from a single jet opening for every preliminary jetting prior to start of the printing. This causes an increase in consumption of the ink.
The assignee of the present application suggests a structure where a moisture retention cap for maintaining moisture of the head jet opening and a suction cap for suctioning ink at the head jet opening are provided so that the viscosity of the ink is prevented from being increased at the time of moisture retention at the jet opening.
In a case where the moisture retention cap and the suction cap are separately provided, the suction cap is in a state where the suction cap is opened other than when the suction cap is suctioning the ink situated at the head jet opening. Because of this, a foreign body such as the dust enters into the suction cap and the dust is pulled into the suction tube and thereby it may not be possible to obtain a sufficient suction force due to closure of the flow path. In order to solve such a problem, a structure where a shutter member for covering an opening part of the suction cap at the time of non-operation of the suction means is provided is suggested at Japanese Patent Application No. 2004-184500. However, in the structure where the opening part of the suction cap is merely covered with the shutter member, a foreign body such as dust may enter into the suction cap via a gap between the opening part of the suction cap and the shutter member. Because of this, the dust may be pulled into the suction tube so that the flow path is closed and therefore sufficient suction force may not be obtained.


A portable grain cart that has independently operated, endless, rubber belted conveyors for moving material out of the hopper and then discharging the material into a truck or other transport or storage facility. A first rubber belted conveyor is mounted inside of the hopper to pick up the material from the hopper and then discharge the material outside the cart onto a second conveyor which then moves the material into the truck. The outside or discharge conveyor is pivotally mounted so that it can be swung to a number of positions, including a storage position, and it also can be elevated to different heights depending upon the truck or storage facility into which the material is to be discharged.

The invention relates to a grain cart having an improved conveyor system for moving grain from the cart and discharging it to a desired location.
Portable grain carts are commonly used during the harvesting of grain to temporarily store the grain during the harvest. The portable cart is usually towed by a tractor alongside the combine to receive the grain as it is harvested. The cart is then towed to a truck where the grain is discharged from the cart into the truck for transport to a storage facility such as a grain bin, grain elevator, etc. The use of grain carts therefore can greatly improve the efficiency of the harvest.
There are numerous manufacturers of grain carts of varying designs. As is well known to those skilled in the art, the grain cart typically includes an auger conveyor usually mounted with its inlet end inside the hopper and then extending toward the front or left front corner of the grain cart. The auger conveyor moves the grain from the bottom of the grain cart hopper upwardly and outwardly where grain can be discharged into a truck for transport. Because the auger must extend outwardly from the hopper of the grain cart a sufficient distance and height to enable efficient unloading, the auger is usually made in two sections. A lower section is mounted inside or on the side of the hopper to move the grain out of the bottom of the hopper, and an upper section is mounted outside the hopper and connected to the lower section to carry the grain to a sufficient height for discharge into a truck or other storage or transport facility. Because it is undesirable during storage or transport of the grain cart for the auger to extend outwardly from the cart, the upper section is usually mounted so that it can be swung out of the way alongside the grain cart. The necessity of providing for movement of the upper part of the auger between a transport position and a operating position requires that a suitable connection be provided between the upper and lower sections. The design of this connection creates problems of how to drive the two auger sections and seal the joint between them. Typical grain carts having various auger arrangements are shown in Grieshop U.S. Pat. No. 5,013,208, Warsaw U.S. Pat. No. 4,846,621 and Barker U.S. Pat. No. 4,274,790. With the auger systems of the grain carts illustrated by these prior art patents, the grain can be distributed as it is discharged by the auger only by moving the cart since the upper auger section is fixed to the lower auger section once they are locked in place in the operating position. Tharaldson U.S. Pat. No. 5,409,344 shows a portable grain cart which has two independently operable augers, each driven by a hydraulic motor. This arrangement permits the upper or discharge auger to be swung through a wide arc during discharge of the grain thereby allowing discharge of the grain to be spread without moving the cart itself.
Regardless of the particular arrangement of the system for removing the grain from the cart and discharging it into a truck or storage facility, the known prior art systems employ an auger in two sections or use two independent augers. Although these prior art carts are extensively used in grain harvest, they are not suitable for all types of crops and other material, and occasionally, the material being handled can be damaged by the auger resulting in losses to the farmer. There is therefore a need for an improved discharge system that is capable of handling almost all crops and other materials without the fear of damage to the material. Any such improved discharge system for grain carts must also be such that it has all of the advantages of the prior art system without the disadvantages, including ease of use and maintenance.


An electric lift including a base, an upright boom support extending from the base and terminating in an end, and an elongated boom having a first end pivotally coupled to the end of the boom support and a second end. An electric power apparatus is coupled between the base and the lifting member for incrementally moving the lifting member between a lowered position and a raised position. A remote control is coupled to the electric power apparatus for controlling the operation thereof.

This invention relates to lifts for use in automotive service.
More particularly, the present invention relates to lifts for lifting automotive engines and transmissions.
In a further and more specific aspect, the instant invention concerns electric lifts for lifting automotive engines and transmissions during automotive service.
At the present time, because of the tremendous number of automotive vehicles (automobiles, trucks, vans, utility vehicles, etc.), there are a large variety of machines for aiding mechanics in servicing these vehicles. For example, in many instances it is necessary to lift the engine or motor (e.g. replacing the engine, replacing engine mounts, working on the drive chain, etc.). Also, in many instances it is necessary to lift the transmission. In either of these functions, the prior art devices are hydraulic lifts or jacks that are difficult to operate and control. For example, while it is generally necessary to move engines and transmissions relatively long distances for removal and the like, in many instances during any of the service operations it is necessary to move the engine or transmission a small fraction of an inch for alignment and the like. Thus the range and amount of movement can be critical. In prior art hydraulic lifts, if the device has a relatively long range it generally moves too fast to allow small movements, that is the controls are insensitive to very small movements.
It would be highly advantageous, therefore, to remedy the foregoing and other deficiencies inherent in the prior art.
Accordingly, it is an object of the present invention to provide new and improved electric lifts for automotive service.
Another object of the invention is to provide new and improved electric lifts for automotive service which are very sensitive to small or short movements.
And another object of the invention is to provide new and improved electric lifts for automotive service which are easy and convenient to use.
Briefly, to achieve the desired objects of the present invention in accordance with a preferred embodiment thereof, provided is an electric lift including a base and a lifting member. An electric power apparatus is coupled between the base and the lifting member for incrementally moving the lifting member between a lowered position and a raised position. A remote control is coupled to the electric power apparatus for controlling the operation thereof.
In a particular aspect of the present invention, electric power apparatus includes an electric motor, a gear box coupled to the electric motor, and a housing carrying an elongated worm gear. The elongated worm gear has a first end coupled to the gear box and a second end coupled to the lifting member.
In a more specific aspect the electric lift includes an upright boom support extending from the base and terminating in an end, and the lifting member includes an elongated boom having a first end coupled to the end of the boom support and a second end. The lifting member can also include a platform having a lower surface coupled to the second end of the worm gear and an upper surface.


Disclosed is a pipeline connection system for a steam turbine and boiler combination that includes a boiler including a boiler heating surface and a boiler outlet header, a high-level steam turbine, and a pipeline system connected between the boiler outlet header and the high-level steam turbine. The boiler outlet header is arranged adjacent to the high-level steam turbine, and a boiler external section of pipe bundle of a pipe bank of the boiler heating surface that is connected to the boiler outlet header is arranged as an L shape comprising a horizontal section of pipe bundle and a vertical section of pipe bundle.

With the continuing development of material technology and increasing bettering of thermal power theory, steam parameters have undergone the development process from low pressure, medium pressure, high pressure, ultrahigh pressure, subcritical pressure, supercritical pressure, all the way up to ultra-supercritical pressure. To further improve the efficiency of a thermal power generating unit, many countries have successively developed units with higher parameters. To develop units with higher parameters, however, the prices of related materials will also greatly increase, particularly for high-temperature and high-pressure steam pipelines between the steam turbine and boiler, such as a main stream pipeline, a reheating steam pipeline and the like. If the parameters of the unit are raised from the current 600° C. level to 700° C. level, the price of the materials of the 700° C. level is nearly ten times the price of the 600° C. level according to the current material prices. Especially for units adopting secondary reheating, the investment will be even larger, because compared with units adopting primary reheating a secondary reheating steam pipeline system is further added to the main high-temperature and high-pressure steam pipeline system connected between the steam turbine and the boiler in addition to the main steam pipeline system and the primary reheating steam pipeline system. Further, the long-distance high-temperature and high-pressure steam pipeline would also lead to larger pipeline pressure losses, reducing the economy of the units to a certain extent.

Pipeline connection system for steam turbine and boiler combination


A push notification mechanism at a mobile user device provides for automated limiting of the rate of production of push notification alerts (such as an audible alert or a vibratory alert) and/or push notifications responsive to the occurrence of chat events relevant to a chat application hosted by the user device. Some chat events automatically trigger suppression periods during which push notification alerts are prevented for subsequent chat events that satisfy predefined suppression criteria. Such push notification and/or alert limiting can be performed separately for separate users, chat groups, and/or chat event types.

Social media applications, such as chat applications, executing on mobile electronic devices often provide for push notifications indicating occurrence of new social media events relevant to the application. For example, in a chat application, push notifications may be generated with respect to chat events in a group chat. These push notifications often take the form of a user interface element displayed on a screen of the electronic device, such as a banner alert displayed on a lock screen of a mobile phone.
Many such applications provide for production of alerts generated by the user device associated with new push notifications. Such push notification alerts often take the form of an audible indication (such as a ping), a tactile indication (such as a phone vibration or buzz), and/or a visual indication separate from the push notification itself (such as an LED flash).
The headings provided herein are merely for convenience and do not necessarily affect the scope or meaning of the terms used.


Disclosed is a reinforced matrix for a molten carbonate fuel cell comprising a porous aluminum support and a lithium aluminate tape-cast on the porous aluminum support. Further, disclosed is a method for preparing the molten carbonate fuel cell comprising the reinforced matrix comprising steps of tape-casting a lithium aluminate on a porous aluminum support so as to prepare a reinforced matrix (S1), making a unit cell or a stack of the unit cells using the reinforced matrix (S2) and heat treating the unit cell or the stack so as to oxidize aluminum in the support into lithium aluminate (S3). According to the present invention, the method is simple and economic, and the mass production of the matrix is easy, and strength of the matrix can be increased effectively and therefore there is no worry about fracture or crack.

1. Field of the Invention
The present invention relates to a reinforced matrix for a molten carbonate fuel cell using a porous aluminum support and to a method for preparing the molten carbonate fuel cell comprising the reinforced matrix.
2. Description of the Related Art
A matrix in a molten carbonate fuel cell (MCFC) serves to prevent a cross-over of a reaction gas, to provide a conduction channel of a CO32− ion with a molten carbonate impregnated in the porous structure of the matrix and to insulate a cathode and an anode electrically.
Since the matrix is not an element participating in an electrochemical reaction but serves just as a support for an electrolyte, a pore size, a porosity, a stability for the electrolyte and a mechanical strength are very important in the matrix.
In particular, fracture and crack of the matrix due to a difference between coefficients of thermal expansion of the matrix and of the electrolyte according to a thermal cycle, and a change of a micro structure due to a long time operation are main causes of a degradation of performance and a reduction of life of a unit cell.
To solve the above problems, there have been suggested methods of dispersing a secondary phase of ceramic fibers or coarse particles as a retardant of crack propagation in γ-LiAlO2 matrix to reinforce the matrix. As a result, it is known that an addition of alumina fibers is relatively efficient for reinforcing the matrix.
However, it is very expensive to manufacture the matrix using the alumina fibers. In view of that, the method using the alumina fibers is not suitable for a commercialization of the MCFC.

Reinforced matrix for molten carbonate fuel cell using porous aluminum support and method for preparing the molten carbonate fuel cell comprising the reinforced matrix

Korea Institute of Science and Technology


A broadcast program retrieval apparatus includes a data server having a database for storing broadcast program information. The data server has a function for searching the broadcast program information stored in the database. A user server stores the same information as the broadcast program information stored in the data server. The user server has a function for selecting a desired broadcast program from the stored broadcast program information. The user server searches the broadcast program information stored in the data server using a content keyword, such as the cast or the like. The desired broadcast program is selected from among broadcast programs based on program retrieval identification codes (event IDs) retrieved and extracted by the content keyword.

1. Field of the Invention
The present invention relates to broadcast program retrieval apparatuses, and more particularly relates to a broadcast program retrieval apparatus in which large amounts of broadcast program information is searched by an exclusive server, thereby reducing the amount of data on broadcast programs to be selected.
2. Description of the Related Art
Digital satellite broadcasting provides programs through an extremely large number of channels, unlike the case of analog broadcasting by broadcasting satellites (BSs). In the case of digital satellite broadcasting, the number of channels is very large, and a single channel provides many programs. Taken all together, the number of programs broadcast is very large. A viewer is thus required to have special skills in order to appropriately select a desired broadcast program from among such a huge number of broadcast programs, and it is often difficult for the viewer to retrieve a desired broadcast program.
Electronic program guide (hereinafter referred to as "EPG") data, that is, broadcast program information, is transmitted independent of information for the actually broadcast program. Based on the EPG data, the viewer can select a desired broadcast program.
For example, the EPG data displays channel numbers on the vertical axis, and time slots and program titles on the horizontal axis. The viewer can find out program information by positioning a cursor on a desired program cell using a remote control.
When the viewer sequentially selects program cells to select program information on many programs one after another, a long period of time is required to reach a desired program. In practice, it is therefore difficult to appropriately select the desired program.
In order to select the appropriate program, the EPG data is searched for the appropriate program using a keyword. In general, retrieval using a keyword, and particularly ambiguous retrieval, demands a large database and fast processing. In consideration of the expense, it is substantially impossible for an individual to perform such retrieval.
Therefore, the viewer is connected to a broadcast program retriever via communication lines such as telephone lines. The viewer gives a keyword for retrieving a desired broadcast program to the broadcast program retriever. The broadcast program retriever searches for the desired program and provides the viewer with information on the retrieval results.
When the viewer receives the entirety of the information on the retrieval results via the telephone lines and the like, detailed information on the broadcast program is generally transmitted, thus requiring a long communication period, which is expensive.


An electronic fuel injection system for an engine with a self-triggered ignition system is provided with means for detecting the time interval between two adjacent voltage signals which are induced before and after an ignition signal in a primary winding of the ignition coil, and have a polarity opposite that of the ignition signal. The latest two time intervals which have been detected are compared to each other, and according to the comparison result, one of said two voltage signals is determined as a specific signal for obtaining a fuel injection timing.

1. Field of the Invention
This invention relates to electronic fuel injection system for engine and, more particularly, to an electronically controlled fuel injection system which can obtain the fuel injection timing without use of any exclusive sensor.
2. Description of the Prior Art
In a well-known electronic fuel injection system, a fuel injection valve is provided in an intake manifold of the engine, and its "on" or "open" time is controlled according to the engine operating conditions to control the fuel injection rate.
In this type of electronic fuel injection system, the fuel ignition timing is an important factor having great influence on the engine performance. Usually, the fuel injection timing is detected by a pulser coil or similar detection means. The pulser coil is so disposed that it faces a magnet provided on the outer periphery of a flywheel connected to a crankshaft, for instance, and the fuel injection timing is obtained according to a magnet detection signal, i.e., a crankshaft rotation detection signal, from the pulser coil. FIG. 6 shows a timing example of the pulser voltage, the shaped waveform obtained therefrom and the fuel injection valve energizing signal.
In a capacitor discharge ignition (CDI) system, the pulser signal for forming the ignition timing is also used for deciding the fuel injection timing.
A self-triggered ignition system, which does not require any pulser signal for fuel injection timing formation, requires an exclusive pulser coil for the fuel injection timing detection. Recently, however, researches and investigations have been conducted concerning fuel injection timing detection systems without any exclusive pulser. As an example, a system has been suggested for obtaining a fuel injection timing signal based on a primary coil voltage waveform in a self-triggered ignition system.
FIG. 7 is a timing chart illustrating this method. It was thought to use the positive or negative part of the voltage induced in the primary coil as a signal source. It has been noted that, however, if it is attempted to obtain a fuel injection timing signal from the negative voltage part used as an energy source for ignition, the energy assigned for the ignition is greatly attenuated. Therefore, it is impossible to obtain a fuel injection timing signal by this method.
Accordingly, studies have been conducted to detect the rising of the positive voltage part of the shaped waveform, and to obtain a fuel ignition timing on the basis of the detected waveform rising. The waveform rising is detected twice in one fuel ignition cycle, and one of the two detections is used as the fuel injection timing. Referring to FIG. 7, a fuel injection valve energizing signal A is produced on the basis of the first appearance of the two waveform risings detected in one cycle, and another fuel injection valve energizing signal B is obtained on the basis of the second waveform rising. In this case, a separate sensor is necessary for judging which one of the fuel injection valve start signals A and B is to be used. In addition, noise is likely to be introduced into the primary coil voltage waveform, making the waveform judgment more difficult.
Recently, there has been an attempt to apply the electronically controlled fuel injection system to small displacement engines such as universal engines and agricultural engines which are not provided with any power source battery, and which are manually started with rope starter or recoil starter systems (Japanese Patent Laid-Open No. 4-43843). In such small displacement engines, the electric power obtainable from a flywheel generator is low during a cranking period, and therefore it is a very important problem to secure a source voltage that is necessary for starting the engine. This means that power for ignition has to be obtained by taking it into consideration to avoid adverse effects on a microcomputer and fuel injection valve drive system.
In the above background, the self-triggered ignition system is desirably used for a small displacement engine, and there is a demand for realizing a practical system for obtaining fuel injection timing according to a signal obtained in the self-triggered ignition system.

Electronic fuel injection system for engine


A compact RF differential circuit has a first differential I/O port comprising a first pair of signal carrying terminals which is connected to a source termination and a second differential I/O port comprising a second pair of signal carrying terminals which is connected to a load termination. The common mode impedance measured at either the first or second differential I/O port is zero. The differential mode impedance measured at the first differential I/O port is equal to the differential mode impedance of the source termination, and the differential mode impedance measured at the second differential I/O port of the circuit is equal to the differential mode impedance of the load termination. The circuit attenuates the common mode component of an RF signal which is incident on the first I/O port of the circuit so that a signal emitted from the second I/O port of the circuit has a differential mode component which is substantially greater than the common mode component and the circuit attenuates the common mode component of an RF signal which is incident on the second I/O port of the circuit so that a signal emitted from the first I/O port of the circuit has a differential mode component which is substantially greater than the common mode component.

Conventional electronic circuits for RF and telecommunications applications comprise one or more input ports to which input RF signals of the electronic circuit are fed, and one or more output ports from which output RF signals of the electronic circuit are emitted. Single-ended input/output ports have a pair of connection terminals: a signal terminal and a ground terminal, where the input and output RF signals of the electronic circuit are carried on the signal terminal and where the ground terminal provides a reference against which the RF signal on the signal terminal is defined.
In RF and telecommunications applications it is sometimes preferable to employ electronic circuits where the input/output (hereinafter referred to as I/O) ports of the device comprise a pair of signal carrying terminals where each terminal carries part of an input or output electrical signal of the electronic circuit.
The pair of RF signals carried on each terminal described above can be individually referenced to ground, or can be described mathematically as a linear combination of two signals: a differential mode signal and a common mode signal. A differential mode signal is divided between two terminals so that the amplitude of the signal on each terminal is the same, and so that there is a phase difference of 180° between both signals; thus, the two parts of a differential signal carried on a pair of terminals are out of phase. A common mode signal is divided across two terminals so that the amplitude of the signal on each terminal is the same, and so that both signals are in phase; thus, the two parts of a common mode signal carried on a pair of terminals are identical.
Differential mode signals are less susceptible to noise than common mode signals and consequently differential mode signals are often preferred for applications where a very high signal to noise ration is required.
RF circuits comprising a pair of terminals for each I/O port of the circuit are usually designed to process differential signals and are usually referred to as differential circuits. Sometimes RF circuits comprising a pair of terminals for each I/O port of the circuit are referred to as "balanced circuits".
A procedure for the analysis of differential circuits, differential components and differential devices is outlined by D. E. Brockelman, W. R. Eisenstadt; "Combined Differential and Common-Mode Scattering Parameters: Theory and Simulation"; IEEE Transactions on Microwave Theory and Techniques, Vol. 43, No. 7, July 1995, pp 1530-1539. According to Brockelman, a differential circuit can be evaluated in terms of the single ended s-parameters which are determined at each signal carrying terminal of the circuit or between any pair of signal carrying terminals of the circuit. A linear transform is used to give what are known as the mixed mode s-parameters of the differential circuit.
For an electronic circuit with two differential I/O ports, the mixed mode S-matrix SMM is defined by EQUATION 1.
                              S          MM                =                                            (                                                                                                              Differential                                                                                Mode                                                                                Stimulous                                                                                Common                                                                                Mode                                                                                Stimulous                                                                                S                                                              DD                                                                                11                                                                                S                                                              DD                                                                                12                                                                                S                                                              DD                                                                                21                                                                                S                                                              DD                                                                                22                                                                                S                                                              D                                                                                C                                                                                11                                                                                S                                                              D                                                                                C                                                                                12                                                                                S                                                              D                                                                                C                                                                                21                                                                                S                                                              D                                                                                C                                                                                22                                                                                S                                                              C                                                                                D                                                                                11                                                                                S                                                              C                                                                                D                                                                                12                                                                                S                                                              C                                                                                D                                                                                21                                                                                S                                                              C                                                                                D                                                                                22                                                                                S                                                              CC                                                                                11                                                                                S                                                              CC                                                                                12                                                                                S                                                              CC                                                                                21                                                                                S                                                              CC                                                                                22                                                                                                            )                        _                                                                                Differential                                                                                Mode                                                                                Response                                                                                Common                                                                                Mode                                                                                Response                                                                                _                        _                                              EQUATION                                                  1
The linear transformation from the single ended s-parameters to the mixed mode s-parameters for a two port differential circuit is given in EQUATION 2.
                              S          MM                =                  (                                                                                1                    2                                                                          (                                                                  S                        11                                            -                                              S                        12                                            -                                              S                        21                                            +                                              S                        22                                                              )                                                                                1                    2                                                                          (                                                                  S                        13                                            -                                              S                        14                                            -                                              S                        23                                            +                                              S                        24                                                              )                                                                                1                    2                                                                          (                                                                  S                        11                                            +                                              S                        12                                            -                                              S                        21                                            -                                              S                        22                                                              )                                                                                1                    2                                                                          (                                                                  S                        13                                            +                                              S                        14                                            -                                              S                        23                                            -                                              S                        24                                                              )                                                                                1                    2                                                                          (                                                                  S                        31                                            -                                              S                        32                                            -                                              S                        41                                            +                                              S                        42                                                              )                                                                                1                    2                                                                          (                                                                  S                        33                                            -                                              S                        34                                            -                                              S                        43                                            +                                              S                        44                                                              )                                                                                1                    2                                                                          (                                                                  S                        31                                            +                                              S                        32                                            -                                              S                        41                                            -                                              S                        42                                                              )                                                                                1                    2                                                                          (                                                                  S                        33                                            +                                              S                        34                                            -                                              S                        43                                            -                                              S                        44                                                              )                                                                                1                    2                                                                          (                                                                  S                        11                                            -                                              S                        12                                            +                                              S                        21                                            -                                              S                        22                                                              )                                                                                1                    2                                                                          (                                                                  S                        13                                            -                                              S                        14                                            +                                              S                        23                                            -                                              S                        24                                                              )                                                                                1                    2                                                                          (                                                                  S                        11                                            +                                              S                        12                                            +                                              S                        21                                            +                                              S                        22                                                              )                                                                                1                    2                                                                          (                                                                  S                        13                                            +                                              S                        14                                            +                                              S                        23                                            +                                              S                        24                                                              )                                                                                1                    2                                                                          (                                                                  S                        31                                            -                                              S                        32                                            +                                              S                        41                                            -                                              S                        42                                                              )                                                                                1                    2                                                                          (                                                                  S                        33                                            -                                              S                        34                                            +                                              S                        43                                            -                                              S                        44                                                              )                                                                                1                    2                                                                          (                                                                  S                        31                                            +                                              S                        32                                            +                                              S                        41                                            +                                              S                        42                                                              )                                                                                1                    2                                                                          (                                                                  S                        33                                            +                                              S                        34                                            +                                              S                        43                                            +                                              S                        44                                                              )                                                                                )                                    EQUATION                                                  2
EQUATION 1 shows that a two port differential circuit can be analysed using a similar method to that employed for a two port single-ended circuit, except that for a two port differential circuit of there are four 2×2 matrices of s-parameters instead of one 2×2 matrix due to the fact that the circuit can be driven at port 1 by a differential mode stimulus or a common mode stimulus, and because the response at port 2 can be either a differential mode response or a common mode response.
Differential circuits can be adversely affected if an input signal of the circuit contains a high common mode component. In many cases a differential circuit will pass a common mode signal from the input of the circuit to the output of the circuit; this would be characterized by a large value of SCC21 for the circuit.
Differential circuits which are fed differential input signals sometimes introduce an unwanted common mode component in the output signals; this is referred to as mode conversion, and would be characterized by a large value of the term SCD21 for the circuit.
An ideal differential output circuit will produce output signals which have no common mode component at all; however, an acceptable performance level for most applications is that the common mode component of the output signal is at least 30 dB less than the differential mode component of the output. This performance level is usually only required within the operating band of the differential circuit.
Unfortunately it is often the case that differential circuits produce output signals with a higher ratio of common mode to differential mode than −30 dB.
FIG. 1 shows a block diagram of a differential circuit 10 comprising a pair of differential I/O ports P1, P2, where I/O port P1 comprises a pair of signal carrying terminals T1, T2 and where I/O port P2 comprises a pair of signal carrying terminals T3, T4. A circuit network 12 is connected between I/O port P1 and port and I/O port P2. The electronic circuit 10 is terminated at the I/O port P1 by a source termination 11, which is characterized by a differential mode impedance ZDS and a common mode impedance ZCS, and is terminated at the I/O port P2 by a load termination 13 which is characterized by a differential mode impedance ZDL and a common mode impedance ZCL.
If it is assumed that the differential circuit 10 of FIG. 1 is symmetric about the axis 15, then the following identities apply:S21=S12, S43=S34;S32=S41, S31=S41;S11=S22, S33=S44.
In this case the mixed mode s-matrix of EQUATION 2 can be simplified to that of EQUATION 3.
                              S          MM                =                                            (                                                                                                              Differential                                                                                Mode                                                                                Stimulous                                                                                Common                                                                                Mode                                                                                Stimulous                                                                                S                                                              DD                                                                                11                                                                                S                                                              DD                                                                                12                                                                                S                                                              DD                                                                                21                                                                                S                                                              DD                                                                                22                                                                                0                                                                                0                                                                                0                                                                                0                                                                                0                                                                                0                                                                                0                                                                                0                                                                                S                                                              CC                                                                                11                                                                                S                                                              CC                                                                                12                                                                                S                                                              CC                                                                                21                                                                                S                                                              CC                                                                                22                                                                                                            )                        _                                                                                Differential                                                                                Mode                                                                                Response                                                                                Common                                                                                Mode                                                                                Response                                                                                _                        _                                              EQUATION                                                  3
The differential circuit 10 of FIG. 1 presents a differential mode impedance and a common mode impedance at I/O port P1, and presents a differential mode impedance and a common mode impedance at I/O port P2. If the circuit is assumed to be symmetric as described by EQUATION 3, then the differential mode impedance at I/O port P1 which is represented by ZD1 and the common mode impedance at I/O port P1 which is represented by ZC1 can be defined in terms of the mixed mode s-parameters as follows:
                                          Z                          D                                                                                1                                =                                    Z              DS                        ×                          (                                                1                  +                                      S                                          DD                                                                                11                                                                                1                  -                                      S                                          DD                                                                                11                                                                                )                                                                                Z                          C                                                                                1                                =                                    Z              CS                        ×                          (                                                1                  +                                      S                                          CC                                                                                11                                                                                1                  -                                      S                                          CC                                                                                11                                                                                )                                                          EQUATION                                                  4                            where ZDS, ZCS are the respective differential mode and common mode impedances of the source 11.
Similarly the differential mode impedance at I/O port P2 ZD2 and the common mode impedance at I/O port P2 ZC2 are defined in terms of the mixed mode s-parameters as follows:
                                          Z                          D                                                                                2                                =                                    Z              DL                        ×                          (                                                1                  +                                      S                                          DD                                                                                22                                                                                1                  -                                      S                                          DD                                                                                22                                                                                )                                                                                Z                          C                                                                                2                                =                                    Z              CL                        ×                          (                                                1                  +                                      S                                          CC                                                                                22                                                                                1                  -                                      S                                          CC                                                                                22                                                                                )                                                          EQUATION                                                  5                            where ZDL, ZCL are the respective differential mode and common mode impedances of the load 13.
It can be seen from equations 4 and 5 that the differential mode impedance presented by I/O port P1 of the differential circuit 10 is matched to the differential mode impedance ZDS of the source 11 and that the differential mode impedance presented by I/O port P2 of the differential circuit 10 is matched to the differential mode impedance ZDL of the load 13 when the relationships of EQUATION 6 apply.SDD11=0→ZD1=ZDSSDD22=0→ZD2=ZDL  EQUATION 6
If EQUATION 6 applies, and if the circuit of FIG. 1 is lossless, differential mode signals which are incident on I/O port P1 will be passed without attenuation to I/O port P2 and differential mode signals which are incident on I/O port P2 will be passed without attenuation to I/O port P1.
The circuit of FIG. 1 will block common mode signals from being transmitted from I/O port P1 to I/O port P2 (and vice versa) when the common mode impedances at ports P1 and P2 are respectively zero Ω.
It can also be seen from equations 4 and 5, that the common mode impedances presented by I/O ports P1 and P2 of the differential circuit 10 become zero under the following conditions.SCC11=−1→ZC1=0SCC22=−1→ZC2=0  EQUATION 7
For a lossless device, the scalar product of any rows or columns of the s-matrix must be unity. Combining this property with EQUATION 3, EQUATION 6 and EQUATION 7 gives the following mixed mode s-matrix for a two port differential circuit which passes the differential mode component of a signal incident on an input port of the circuit to an output port of the circuit without attenuation, and which presents a common mode impedance of zero Ω to a signal incident on an input port of the circuit, thereby blocking the common mode component of the signal from an output port of the circuit.
                              S          MM                =                                            (                                                                                                              Differential                                                                                Mode                                                                                Stimulous                                                                                Common                                                                                Mode                                                                                Stimulous                                                                                0                                                                                1                                                                                1                                                                                0                                                                                0                                                                                0                                                                                0                                                                                0                                                                                0                                                                                0                                                                                0                                                                                0                                                                                -                              1                                                                                0                                                                                0                                                                                -                              1                                                                                                            )                        _                                                                                Differential                                                                                Mode                                                                                Response                                                                                Common                                                                                Mode                                                                                Response                                                                                _                        _                                              EQUATION                                                  8
From EQUATION 1, the corresponding single-ended S matrix can be derived.
                              S          SE                =                  (                                                                                -                        1                                            /                      2                                                                                -                        1                                            /                      2                                                                                +                        1                                            /                      2                                                                                -                        1                                            /                      2                                                                                -                        1                                            /                      2                                                                                -                        1                                            /                      2                                                                                -                        1                                            /                      2                                                                                +                        1                                            /                      2                                                                                +                        1                                            /                      2                                                                                -                        1                                            /                      2                                                                                -                        1                                            /                      2                                                                                -                        1                                            /                      2                                                                                -                        1                                            /                      2                                                                                +                        1                                            /                      2                                                                                -                        1                                            /                      2                                                                                -                        1                                            /                      2                                                                                _                        _                    )                                    EQUATION                                                  9
Thus the required properties of a two port differential circuit which passes a differential signal incident on an input port of the circuit without attenuation to an output port of the circuit and which blocks a common mode signal which is incident on an input port of the circuit thereby preventing the common mode signal from being passed to an output port of the circuit are given in EQUATIONS 6 and 7, and the corresponding s-matrices are given in EQUATION 8 and 9.
FIG. 2 shows a block diagram of an electronic circuit 20 comprising a first differential I/O port P1, and a second differential I/O port P2, where the first differential I/O port P1 comprises a pair of signal carrying terminals T1 and T2, and where the second differential I/O port P2 comprises a pair of signal carrying terminals T3 and T4. A transmission line element 24 is arranged so that a first end of the transmission line element 24 is connected to a first circuit node 23A, and so that a second end of the transmission line element 24 is connected to a second circuit node 23B. Signal carrying terminals T1 and T3 are connected to first circuit node 23A and signal carrying terminals T2 and T4 are connected to second circuit node 23B. The electronic circuit has a given operating band defined by a lower frequency limit FL and an upper frequency limit FU. The transmission line element has an electrical length E which is equal to 180° (one half wavelength) at the centre of the operating band of the electronic circuit
The same circuit is depicted in FIG. 7 of U.S. Pat. No. 6,900,705, Nakamura.
The circuit of FIG. 2 has the required electrical properties when the source impedance is equal to the load impedance, i.e. the differential mode component of an electrical signal incident on I/O port P1 is passed substantially without attenuation to I/O port P2 of the electronic circuit, and the common mode component of the impedance of I/O port P1 of the electronic circuit is zero Ω, so that the common mode component of an electrical signal incident on I/O port P1 is blocked from I/O port P2; similarly the differential mode component of an RF signal incident on I/O port P2 is passed substantially without attenuation to I/O port P1, and the common mode component of the impedance of I/O port P2 of the electronic circuit is zero Q, so that the common mode component of an RF signal incident on I/O port P2 is blocked from I/O port P1.
Despite having the required electrical properties, the circuit of FIG. 2 is impractical for use in miniaturized electronic appliances such as portable cellular handsets or W-LAN modules due to the very large physical dimensions of the half wavelength transmission line 24. For example, at an operating frequency of 2.45 GHz, the centre of the band specified in IEEE 802.11b/g for W-LAN applications, a half wavelength transmission line will have a length of 61.22 mm in air and will have an electrical length given by the expression below for a transmission line fabricated in a dielectric material.
                    λ        2                          f      =              2.45                                                  GHz              =            61.22                        ɛ          r                                            mm                  where εr is the relative dielectric constant of the material.
Nakamura describes a number of two port differential circuits for attenuating the common mode component of a signal incident on an input port of the circuit comprising multiple discrete components (FIGS. 8, 9 10, 11, 12, 13). However, each of the embodiments described in Nakamura suffer from two drawbacks.
The first drawback is that in order that each of the circuits have the required electrical properties, i.e. that the common mode impedance is zero within the operating band of the circuit, and that the differential mode impedance is matched to the termination at the source or the load of the component, two of the component values must become infinitely large. For example in FIG. 9, the values of capacitors Cg1 and Cg2 must approach infinity in order to reduce the common mode impedance of the circuit to zero, and moreover increasing the capacitance of capacitors Cg1 and Cg2 to sufficiently large values requires that the inductance of inductor Lb become impractically small.
Similarly in FIG. 10 of Nakamura the values of inductors Lg1 and Lg2 become infinitely large in order that the differential mode impedance presented by the circuit is matched to the termination at the source or the load. This reduced the required capacitance of capacitor Cb so that it becomes infinitesimally small.
FIG. 3 shows a two port differential circuit 30 for attenuating the common mode component of a signal incident on an I/O port P1 or P2 of the circuit where the circuit comprises a PI-type discrete circuit connected in parallel with the I/O port P1 and connected in parallel with the I/O port P2 of the circuit similar to the circuit of Nakamura FIG. 9. The PI-type discrete circuit comprises shunt capacitors 36A, 36B, and series inductor 38. FIG. 4A shows the differential mode reflection coefficient (SDD11) and the common mode reflection co-efficient (SCC11) of the circuit of FIG. 3 plotted on a Smith chart for the case where the capacitances of capacitors 36A and 36B are both 10 pF and for the case where the differential mode impedances of the source and load are both 100Ω. The resulting common mode impedance at 2.45 GHz is 25×(0.0166−j0.1278)Ω, and the required inductance of inductor 38 so that the differential mode impedance of the circuit 30 is matched to the source at I/O port P1 and is matched to the load at I/O port P2 is 0.422 nH at an operating frequency of 2.45 GHz.
FIG. 4B shows a plot of the differential mode response (SDD21) and the common mode response (SCC21) of the circuit of FIG. 3 for the case where the capacitances of capacitors 36A and 36B are both 10 pF as described above. The differential mode insertion loss in the frequency range from 2.4 GHz to 2.5 GHz is less than 0.2 dB which is a good result; however, the minimum common mode rejection of the circuit in the frequency range from 2.4 GHz to 2.5 GHz is 12 dB approximately; this is not sufficiently high for typical RF applications.
FIG. 4C shows a Smith chart plot of the differential mode reflection coefficient (SDD11) and the common mode reflection co-efficient (SCC11) of the circuit of FIG. 3 for the case where the capacitances of capacitors 36A and 36B are both 20 pF. The resulting common mode impedance at 2.45 GHz is 25×(0.0042−j0.0647)Ω, and the required inductance of inductor 38 so that the differential mode impedance is matched to the source at I/O port P1 and is matched to the load at I/O port P2 (100 Ohms) is 0.211 nH at an operating frequency of 2.45 GHz. Such a small inductance is very difficult to consistently realize in a mass production environment.
The second drawback of each of the circuits described in FIGS. 8, 9, 10, 11 and 12 of Nakamura is that they all require at least one inductive element. Unfortunately, if the circuit is to be fabricated using multilayer technology employing materials with a high dielectric constant, such as low temperature co-fired ceramic (LTCC), the realization of high Q inductors is difficult, and the insertion loss of the circuit becomes high.
For example multilayer LTCC substrates with a layer thickness of 40 μm and a dielectric constant of 75 are typical for RF applications at 2.45 GHz. The resulting capacitance between mutual windings of an inductor is sufficiently large to lower the self resonant frequency of the inductor to a frequency well below 2.45 GHz.
Other prior art solutions for attenuating a common mode component of an RF signal such as U.S. Pat. No. 6,940,369; "Surface acoustic wave device having excellent balancing characteristics between balanced terminals and a communication device using the same", Nakahashi, and U.S. Pat. No. 6,919,781: "Surface wave filter comprising reactance elements", Baier, deal with specific topologies for acoustic filters, and hence cannot be used in the general case where a circuit is required which has the function of passing a differential mode component of an RF signal and blocking a common mode component of the same signal.

Compact RF circuit with high common mode attenuation


A semiconductor device includes a semiconductor substrate having a first surface in which a light-receiving portion and electrodes are provided. The semiconductor substrate has a penetrating wiring layer connecting the first surface and the second surface. A light-transmissive protective member is disposed on the semiconductor substrate so as to cover the first surface. A gap is provided between the semiconductor substrate and the light-transmissive protective member. A protective film is formed at a surface of the light-transmissive protective member. The protective film has an opening provided at a region corresponding to the light-receiving portion.

1. Field of the Invention
The present invention relates to a semiconductor device and a manufacturing method of the same.
2. Description of the Related Art
Semiconductor devices such as a CCD, CMOS image sensor using semiconductor integrated circuit technology are widely used for a digital camera and a cellular phone with camera function. In the semiconductor device as stated above, it is proposed that sensor chips (semiconductor elements) are made to be a CSP (Chip Size Package) to correspond to small in size and light in weight of mounted parts. It is studied that a penetrating wiring layer (a penetrating electrode) connecting between front and rear both surfaces is applied for a semiconductor substrate on which a sensor device and so on are formed when the semiconductor element such as the sensor chip is made to be the CSP.
The penetrating wiring layers are formed by providing through holes joining between front and rear both surfaces at the semiconductor substrate, and filling conductor layers inside this through holes. An integrated circuit including a light-receiving portion provided at the front surface of the semiconductor substrate and external connection terminals provided at the rear surface are electrically connected via the penetrating wiring layers. The integrated circuits, the penetrating wiring layers, and so on are formed during a wafer process. A case with optical lens is attached to the semiconductor device in which a semiconductor wafer is cut to be a separated piece (an image sensor and so on). This is mounted on a module substrate in a state as stated above, and thereby, a camera module is constituted.
A light-transmissive protective member is disposed on the semiconductor substrate so as to cover a region including the light-receiving portion, to protect the light-receiving portion provided at the front surface of the semiconductor substrate from dust and garbage (refer to International Publication No. WO 2005/022631 A1). The light-transmissive protective members such as glass substrates are disposed in parallel with predetermined intervals on the semiconductor substrate where the integrated circuits including the light-receiving portions are formed. The glass substrates are adhered to the semiconductor substrate by an adhesive resin disposed so as to surround an outer edge of the light-receiving portions of the semiconductor substrate. The adhesive resin finally becomes to be a sealing member, and a gap sandwiched by the semiconductor substrate and the glass substrate is formed above the light-receiving portion.
The semiconductor device is manufactured as stated below. At first, the semiconductor substrate on which the integrated circuit including the light-receiving portion is formed and the glass substrate is adhered via the adhesive resin. Next, the through holes are formed by etching the semiconductor substrate from the rear surface side thereof until electrodes at the front surface side expose, after the semiconductor substrate is made thin from the rear surface side to be a predetermined thickness. Further, the penetrating wiring layers are formed from inside the through holes toward the rear surface of the semiconductor substrate after insulating films are formed on internal surfaces of the through holes and the rear surface of the semiconductor substrate except bottom portions of the through holes being closed by the electrodes. After that, the rear surface of the semiconductor substrate is covered with a protective layer, and the external connection terminals are formed at the penetrating wiring layers. The glass substrate plays a role as a supporting substrate mechanically reinforcing the semiconductor substrate during these manufacturing processes.
However, there is a problem that scratches and cracks are easy to occur on the glass substrate because the front surface of the glass substrate is directly touched when the semiconductor device is carried or placed on a stage of a processing equipment, in the conventional semiconductor device manufactured by the method as stated above. The scratches and cracks occurred on the glass substrate scatter incident light, and become a factor deteriorating sensitivity of the light-receiving portion and manufacturing yield of the semiconductor device. The light incident from a diagonal direction is refracted by the adhesive resin, and incident on the light-receiving portion, and thereby, image pickup characteristics and so on at a peripheral edge portion of image deteriorates, when the adhesive resin has light-transmission property.

Semiconductor device and method of manufacturing the same


‘Kakegawa S86’ is a new Calibrachoa cultivar particularly distinguished by having a yellow flower color and a compact growth habit.

The present invention comprises a new and distinct cultivar of Calibrachoa, botanically known as Calibrachoa sp., and hereinafter referred to by the cultivar name 'Kakegawa S86.' It is characterized by having yellow flower color and compact plant growth habit. The new cultivar originated from a hybridization made in 2002 in Kakegawa, Japan. The female parent was a proprietary hybrid Calibrachoa breeding line named 'S-24A-23' having a scarlet flower color and a semi-upright plant growth habit. The male parent was a proprietary hybrid Calibrachoa breeding line named '1B-69B' characterized by its yellow flower color and compact plant growth habit.
In 2002, 'S-24A-23' and '1B-69B' were crossed and 32 seeds were obtained in 2003, F2 seed was sown in the greenhouse and 78 plants were evaluated. F2 plants were segregated into scarlet and yellow flower color and all plants had a compact plant growth habit. Two single-plant selections were made based to their yellow flower color and compact plant growth habit and vegetatively propagated.
In 2004, plantlets of the two lines were transplanted to soilless media for greenhouse culture, vegetatively propagated with cuttings in Kakegawa and then re-evaluated. The line 'K4-162' was selected and grown in an open field trial to confirm the stability of the distinct characteristics of this line. The line was subsequently named 'Kakegawa S86' and its unique characteristics were found to reproduce true to type in successive generations of asexual propagation.
Plant Breeder's Rights for this cultivar were applied for in Canada in Mar. 31, 2006.