A semiconductor imager structure having a well region formed in a substrate layer. The well region being of a predetermined shape having a plurality of corners being non-right angles.

CMOS image sensors are attractive for use in, e.g., still and video imaging applications, due to their compatibility with VLSI circuit design and fabrication processing. For many applications, a CMOS imager can be preferred over a corresponding CCD imager. Specifically, low-cost, large-scale CMOS design and fabrication technologies that have been developed for large-volume VLSI circuits can be directly employed in the production of CMOS imagers. CMOS imagers are, in general, much more cost effective than imagers produced based on CCD technologies.
A CMOS imager sensor measures the magnitude of photo-current generated from photons falling onto the sensor. In CMOS imagers, imager pixels must hold, or maintain, image information produced by the pixels in the form of an electronic charge for a period of time that is typically on the order of about 10-100 milliseconds. Given this time scale, and due to the micron or submicron scale structure of CMOS pixels, any electronic leakage current generated at a pixel tends to substantially affect the image information maintained by the pixel, resulting in a distortion of the image produced by the imager.
A lower leakage current is essential for solid state image sensor arrays since leakage current causes excess "signal" even though no light is shining on the sensor. The leakage current is combined with the photo-current and introduces temporal and spatial noise to the desired photo-signal of the array. Unfortunately, there is no simple way to distinguish the leakage component from the overall signal.
Reduction of leakage current is also important for imaging at low light levels since the ratio of leakage component to the total signal is higher. Leakage current usually varies pixel-by-pixel, which causes fixed pattern noise on the image plane. Additionally, the temporal variation of leakage current is a source of pixel random noise. The statistical properties of leakage current variation dictate that a higher leakage current is associated with a wider distribution of leakage current, both spatially and temporally, degrading noise performance. Therefore, leakage current reduction becomes an important topic for sensor performance improvement.
This leakage current, also referred to as "dark current," is understood to be due to the generation of electron-hole pairs in a depletion region where pixel charge is held. Leakage current can be caused by thermally generated holes and electrons and/or by electron-hole pair generation at material defects in the semiconductor substrate in which the pixels are fabricated.
Thermally-produced leakage current is a fundamental phenomenon that sets the minimum leakage current which generally can be attained by state-of-the-art pixel design. Leakage current produced by material defects can, however, be addressed and is found to be design and process dependent.
Leakage current produced by material defects typically results from crystal dislocations in the silicon substrate in which the pixels are fabricated. Defects at the silicon substrate surface ("surface states") also can serve as generation centers for leakage current. Sites of crystal dislocations act as electron-hole pair generation centers that produce a corresponding current, known as a leakage current. As a result of the leakage current, a pixel can produce an output image signal even under dim or zero illumination conditions. Thus, for any input illumination, the leakage current contribution to the pixel output distorts the image, rendering the indicated illumination brighter than the true illumination.
At a very high leakage current, the pixel output can become saturated even under zero illumination conditions. In this situation, the pixel is completely unresponsive to varying scene illumination and produces only the saturation output level. In this case, the pixel is often termed "defective" and is effectively not operative for imaging applications.
It is understood that a reduction in pixel leakage current can be obtained by the reduction in the number of the dislocations in the crystal lattice of a silicon substrate in which a pixel is fabricated, or by a reduction in the surface states at the silicon surface. Such dislocations can be formed in the substrate, near to the substrate surface, at locations of steps between a region of thin silicon dioxide and a region of thicker silicon dioxide provided on the substrate surface. At the boundary of a thin-oxide/thick-oxide step, mechanical stress is imposed on the silicon substrate, causing crystal lattice dislocations to form in the substrate, relatively close to the substrate surface.
If a crystal lattice dislocation in the silicon substrate is formed at a substrate location that falls within the extent of a photogenerated charge sensing depletion region of a CCD or CMOS pixel, or at the location of pixel regions that are electrically connected to, and thus at the same electrical potential as the photodiode region, that dislocation can act as an electron-hole pair generation center, as explained above, producing a contribution to pixel output that is not representative of input illumination. This leakage of current distorts the electronic charge maintained by the pixel and at high current levels, renders the pixel defective.
A requirement for control of pixel leakage current has been addressed in general in conventional CCD imager fabrication technologies, with a range of design and fabrication remedies developed to reduce pixel leakage current. High performance CCD imager technologies can maintain pixel dark current to a level as low as on the order of 20-100 pA/cm2.
It is found, however, that in general, the minimum dark current obtainable by CMOS imager technologies is typically more than an order of magnitude greater than that obtainable by CCD imager technologies. In addition to being characterized by a larger average dark current than CCD imagers, CMOS imagers are in general found to be susceptible to a far larger number of defective pixels than CCD imagers. While CCD imager technologies have been able to address the challenge of average dark current minimization and a reduction in number of defective pixels through fabrication process modifications, these CCD imager technologies require design or fabrication process modifications that are not, in general, cost effective or practical for CMOS imager technologies.
This is due to the fact that VLSI circuits produced by standard CMOS manufacturing processes, which are also employed for CMOS imagers, are largely unaffected by current leakage, and the principal advantage of CMOS imager technology is its use of such standard CMOS VLSI processing techniques. Any CMOS process modifications employed to reduce leakage current are therefore costly and inefficient, benefiting imager but not VLSI circuit applications.
The various features of a CMOS pixel design layout that contribute to pixel leakage current can be illustrated with an example pixel design and corresponding fabrication layouts.
FIG. 12 shows the top view of a p-n junction diode typically used as a CMOS image sensor, and FIG. 13 shows the cross-section through line 12-12 of such a diode sensor structure. The operation of the sensor is the following.
During the sensor reset phase, the n-type region 310 is connected to a high voltage and p-type region 41 is tied to ground. Then the high voltage is disconnected from the n-type region 310 and the diode is floating.
At this point, the p-n junction diode can be treated as a charged capacitor. The depletion region 260 of the p-n junction is widened and the electric field inside the region facilitates the electron-hole pair separation as the carriers are generated by photon absorption. The separated carriers form photo-current, which discharges the junction capacitor and decreases the voltage across the junction. The reduction of junction voltage within a defined period of time represents the magnitude of the photo-signal.
However, besides the photo-charges, other charges may be generated within the depletion region 260 by other mechanisms, or a current path across the junction could also discharge the junction capacitor and causes some false signal when there is no illumination on the sensor. As noted above, the summation of the undesired current is generally called leakage current.
In another example as illustrated in FIG. 1, the operation of a CMOS active pixel 10 is described in more detail, using a schematic diagram of the pixel. This example pixel configuration employs a photodiode 11, but it is to be recognized that the pixel can include other light collecting configurations, embodied as, e.g., a phototransistor, a photogate, or other selected configuration.
As illustrated in FIG. 1, a photodiode 11 of the pixel produces a current of photo-generated electrical charge in response to light incident on the pixel. The resulting photocurrent is directed to a parasitic charge-sensing capacitor 13. The parasitic charge-sensing capacitor 13 is not an actual physical electrical element of a pixel, but the parasitic charge-sensing capacitor 13 represents the parasitic reverse-biased P-N junction capacitance and other parasitic capacitance associated with the photodiode 11 and sense node 40.
A MOS transistor 15 operates as a source follower transistor that buffers the voltage on the parasitic charge-sensing capacitor 13 nondestructively to a column line 23 for read out of the voltage. Specifically, a row select MOS switch 17 activates the source follower transistor 15 when the particular row is selected, thereby enabling the parasitic charge-sensing capacitor voltage measurement. When the row select MOS switch 17 of the row is turned ON, a current source 24 is connected to the source of the MOS transistor 15. The MOS transistor 15 and the current source 24 operate as a source-follower configuration to buffer the voltage on the parasitic charge-sensing capacitor 13 to the column line 23 for determining the parasitic charge-sensing capacitor voltage at the end of an exposure period, to in effect measure the photo-generated electronic charge held by the pixel. A sense node 40 is the point in the circuit at which the parasitic charge-sensing capacitor voltage is electrically contacted for producing an output voltage to the column line 23.
FIG. 2 illustrates a top view of a conventional CMOS fabrication process layout for the pixel configuration of FIG. 1. FIG. 3 is a cross-sectional view of the conventional CMOS fabrication process layout taken at the section 3 of FIG. 2.
As illustrated in FIG. 2, the photodiode 11 is constructed between an n+ doped area 30 and a p-type substrate 41. The n+ doped area 30 acts as the cathode and the p-type substrate 41 as anode of the photodiode 11. The n+ doped area 30 is doped, typically by ion implantation, simultaneously with the doping of source and the drain areas (generally denoted as 33, 35, 37, and 39) of the NMOS transistors of the pixel.
With this configuration, the n+ cathode region of the photodiode 11 is extended out to form an n+ source 39 of the reset transistor 21 of FIG. 1. As illustrated in FIG. 2, the sense node contact 400 of the pixel is provided at the source location 39. Electrically, the n+ cathode area of the photodiode 11 as well as the source area 39 of the reset transistor 21 together form the sense node 40 of FIG. 1. The gate of the source follower transistor 15 is connected to the sense node 40 of FIG. 1 at the sense node contact point 400. The drain of the row select transistor 17 is connected to the source of the transistor 15 through n+ doped area 35.
In accordance with conventional CMOS fabrication processing, the p-type substrate 41, surrounding doped active device regions like the photodiode region 30 and the source and drain regions (33, 35, 37, and 39), is typically provided with a relatively thick silicon dioxide layer, known as the field oxide. The silicon dioxide layer in the p-type substrate 41 is about 2000 Å-5000 Å in thickness.
The field silicon dioxide layer is provided with sufficient thickness to disable transistor action by polysilicon traces overlaying the oxide in their connection paths between various nodes of the transistors. In the areas forming the n+ source and drain areas, the gate areas, and the photodiode area, commonly referred to together as the "active area," the thick field silicon dioxide layer is inhibited and in place is provided a very thin oxide layer having a thickness corresponding to the prescribed gate oxide for the transistors.
As illustrated in FIG. 3, an example of CMOS process employing shallow trench isolation technology is shown. More specifically, as illustrated in FIG. 3, a step 43 in height between the field oxide layer 42 and the thinner oxide layer 44 overlaying the active area, including the n+ photodiode area 30, is shown in cross section. Under reverse bias conditions, a depletion region 50 is formed between the n+ photodiode area 30 and the p-type substrate 41, with the depletion region 50 extending deeper into the substrate than the photodiode area due to the lower doping level in the substrate relative to the photodiode area.
Dislocations 55 tend to form in the p-type substrate 41, near to the p-type substrate's surface, at a region near to where the step 43 in oxide height is located, due to mechanical stress imposed on the p-type substrate 41 by the step 43. Such dislocations, which will typically fall in the depletion region 50, act as electron-hole pair generation enters, producing a leakage current. The leakage current contribution to the pixel output is not based on pixel illumination, but instead on a dislocation generated current.
In the pixel layout of FIG. 2, the entire perimeter of the photodiode 30 and the region of the sense node contact 400; i.e., the entire perimeter of the photodiode area 30 as well as the reset transistor source area 39, where the sense node contact 400 is made, is characterized by a step in oxide layer thickness across the boundary of these regions.
As a result of this step in the oxide layer, the entire perimeter of the photodiode area 30 as well as the reset transistor source area 39 provides a region in which dislocations can form and excessive pixel leakage current can be produced. Thus, large average dark currents and a high density of defective pixels are typically found in CMOS imagers with this pixel layout.
FIG. 4 illustrates another conventional CMOS fabrication process layout for a pixel. In FIG. 4, the photodiode area 300 is not formed by the n+ doping implantation employed for the transistor source and drain regions 33, 35, 37, and 25. Instead, the photodiode 11 is formed simultaneously with the n-type doping of n-wells produced in the substrate for forming PMOS circuits. This n-well formation is a fabrication process step separate from the n+ source and drain formation, in a conventional manner. In the configuration illustrated in FIG. 4, the sense node contact 400 is provided at the reset transistor source region 25, and the photodiode 11 and the reset transistor source are connected by extending a portion of the reset transistor source region 25 of the transistor 21 into the n-well region 300 of the photodiode 11 by forming an n+ well in the n-well region 300 of the photodiode 11.
In an example process for fabricating the configuration illustrated in FIG. 4, the photodiode area 300 is doped with the n-well doping and is thereafter covered with a hick field oxide layer along with the field surrounding the areas defined for the transistors. The regions (33, 35, 37, and 25) for defining the pixel transistors are provided with a thin gate oxide layer. A step in oxide layer height also exists across the boundaries 70 and 72 of the reset transistor source region 25 in which the sense node contact 400 is provided. This height step across the boundaries 70 and 72 of the reset transistor source region 25, where the sense node contact 400 is formed, causes dislocations and a corresponding leakage current to be produced at the sense node 40.
The average dark current of a pixel having this layout is substantially reduced compared with the pixel design of FIG. 2 because there exists no thin-thick oxide boundary along the perimeter of the n-well photodiode area 300. However, since a thick-thin oxide step does exist at the perimeter of the reset transistor source region 25, where the sense node contact 400 is provided, dislocations do exist and hence excessive leakage current and defect pixel density are not completely eliminated.
As noted above, a typical mechanism for leakage current generation is the defect levels within silicon bandgap, especially inside the depletion region. The defect density determines how fast the dark-current charges can be generated at a specific temperature and the density of defects is strongly related with the processing technology used to build the sensors. Additionally, there could be some charged surface states residing near the silicon-silicon dioxide interface adjacent to layer junctions that were introduced during wafer processing (e.g. by plasma processes). The charged surface states could possibly form a depletion region or a weak channel between photodiode junctions along the junction surface and either increase generation current or cause a leakage current path.
Therefore, it is desirable to provide a pixel design and corresponding fabrication process that results in a CMOS pixel imager having substantially reduced leakage current.
As discussed above, since dislocations at step regions in the oxide layer are consistent by-products of the fabrication process, it is desirable to reduce the detrimental leakage current effect of these dislocations upon a CMOS pixel; namely, the effect upon the CMOS pixel's capability to convert illumination levels into a voltage properly; without removing or decreasing the number of dislocations.
It is further desirable to reduce the detrimental leakage current effect of the dislocations produced by the fabrication process without altering the standard fabrication process. It is desirable to reduce the detrimental leakage current effect of the dislocations produced by the fabrication process without requiring additional processing steps, additional backend processes, or non-standard process sequences.
Moreover, it is desirable to mask the detrimental leakage current effect of the dislocations produced by the fabrication process. Lastly, it is desirable to reduce the detrimental leakage current effect of the dislocations produced by the fabrication process by using a standard CMOS fabrication process that has not been modified with expensive fabrication steps.
Furthermore, it is desirable to provide a fabrication process that prevents any process damage to the p-n junction region from being introduced after poly silicon processing.
Lastly, it is desirable to provide a photodiode having its p-n junction physically shielded to prevent any process damage from being introduced after the poly silicon processing (including damages from processes such as dielectric deposition/pattern, metal deposition/pattern and via/contact hole etching) and/or provide a photodiode having its p-junction electrically shielded to prevent any possible trapped charges at higher levels of dielectric above the junctions to affect the surface potential and/or prevent the formation of conducting channels between the p-n regions, thereby reducing leakage current.


An integrated circuit (IC) with an oscillator and electrostatic discharge (ESD) protection in which the parasitic capacitance of the ESD protection circuitry is disassociated from the oscillator circuitry to minimize loading of the tank circuit thereby minimizing degradation of the tank circuit quality factor (Q).

1. Field of the Invention
The present invention relates to an integrated circuit (IC) with an oscillator, and in particular, to such a circuit which also includes electrostatic discharge (ESD) protection.
2. Description of the Related Art
Referring to FIG. 1, high frequency oscillators play a critical role in many circuits, particularly wireless communication circuits. With the increased use and complexities of wireless communication devices, such circuits have become increasingly sophisticated. Among others, one characteristic which is often critical is low phase noise performance. This requires the oscillator to have a resonant, or "tank", circuit with a high quality factor Q.
Referring to FIG. 1, one conventional implementation of an oscillator 10 within an IC includes an amplifier circuit with cross-coupled complementary metal oxide semiconductor field effect transistors (C-MOSFETs), such as P-type transistors P1 and P2 and N-type transistors N1 and N2, interconnected substantially as shown, and biased between upper (e.g., positive) VDD and lower (e.g., negative) VSS/GND power supply voltage terminals via a resistor R1. The output voltage Vout is a differential voltage which appears between signal electrodes 12a and 12b. The tank circuit is formed using shunt capacitors C1 and C2 and inductors L1 and L2 connected to signal electrodes 12a and 12b as shown. As is well known in the art, the capacitors C1, C2 can be variable, e.g., varactors, so that this oscillator circuit 10 can be operated as a voltage control oscillator (VCO). The inductors are connected together via a shared electrode B3 (discussed in more detail below).
As is well known in the art, modern ICs virtually always include on-chip ESD protection, and this circuit 10 is no different. To prevent an external ESD event from damaging the oscillator circuitry, ESD protection circuitry in the form of shunt diodes D1a, D1b, D2a and D2b are connected between the output signal electrodes 12a, 12b (which can also be electrically connected to on-chip bonding pads B1, B2) and the power supply rails VDD, VSS/GND as shown. (The operating principles of such ESD protection circuitry are well known in the art. Further, it will be appreciated by one of ordinary skill in the art that other forms of ESD protection circuitry can be used as well, with such other forms of ESD circuitry also being connected in a shunt arrangement at the output signal electrodes 12a, 12b.)
Referring to FIG. 2 in conjunction with FIG. 1, the inductors L1, L2 are typically implemented using bond wires 14a, 14b, with the shared electrode B3 being a bonding pad resident on a package leadframe 22 upon which the die 20 containing the IC is placed. At the high frequencies for which such integrated oscillator circuits are used, such bond wires 14a, 14b provide the inductance necessary for the tank circuit. As is well known in the art, the die 20 will include a number of other bonding pads 24, which are electrically connected to package leadframe bonding pads 26 via bond wires 28.
A problem with this conventional approach, however, is the loading presented to the signal electrodes 12a, 12b by the shunt ESD circuitry. Such loading is generally in the form of the shunt capacitance which is inherent to the ESD protection circuitry. This shunt capacitance generally has a low quality factor Q, and thereby causes the overall quality factor Q of the tank circuit to be significantly degraded, resulting, in turn, in increased phase noise in the output signal Vout of the oscillator circuit. Further, such additional capacitance of the ESD circuitry adds to the fixed capacitance of the tank circuit, thereby limiting the maximum oscillation frequency and decreasing the effective tuning range, e.g., when using varactors for the tank circuit capacitors C1, C2.

Integrated circuit with oscillator and electrostatic discharge protection


A method for storing a first data block, including evaluating the first data block comprising a first plurality of data, if the first plurality of data includes only zeros storing a first block pointer indicating that the first data block includes only zeros in a first indirect block, and if the first plurality of data does not include only zeros storing the first calculating a first data block checksum for the first data block, and storing the first block pointer comprising the first data block location and the first data block checksum in the first indirect block.

A typical operating system includes a file system. The file system provides a mechanism for the storage and retrieval of files and a hierarchical directory structure for the naming of multiple files. More specifically, the file system stores information provided by the user (i.e., data) and information describing the characteristics of the data (i.e., metadata). The file system also provides extensive programming interfaces to enable the creation and deletion of files, reading and writing of files, performing seeks within a file, creating and deleting directories, managing directory contents, etc. In addition, the file system also provides management interfaces to create and delete file systems. File systems are typically controlled and restricted by operating system parameters. For example, most operating systems limit the maximum number of file names that can be handled within their file system. Some operating systems also limit the size of files that can be managed under a file system.
An application, which may reside on the local system (i.e., computer) or may be located on a remote system, uses files as an abstraction to address data. Conventionally, this data is stored on a storage device, such as a disk.
To access a file, the operating system (via the file system), typically provides file manipulation interfaces to open, close, read, and write the data within each file. More specifically, the file system stores data on the storage device by managing the allocation of space within the storage device. Typically, the volume manager provides space, which is managed by the file system. Two common types of file system space allocation strategies are known as block-based allocation and extent-based allocation. Block-based allocation creates incremental disk space for each file each time the file is extended (i.e., modified via a write request to add information), whereas extent-based allocation creates a large series of contiguous blocks (i.e., extents) each time the file exhausts the space available in the file's last extent.
When allocating space, both block-based and extent-based allocations use space provided by the volume manager. The volume manager allows multiple physical disks to be used as a single volume (i.e., a virtual disk) to provide larger consolidated storage sizes and simpler management. The volume manager allows users to organize data along volume boundaries (i.e., each volume has physical disk space allocated to the volume such that the volume is tied only to that dedicated physical disk). The volume manager is typically implemented as a separate layer between the physical disks and the file system, and is presented to the user as a virtual disk device. In other words, volume managers organize the collections of physical devices (e.g., disks) into virtual devices. Additionally, the space allocated within the volume manager is handled by the file system. Consequently, the volume manager is not aware of which blocks within the available storage space are in use and which blocks are free for data to be stored.
Further, file systems may be mounted on the virtual disk devices. Thus, physical disks are partitioned and allocated to multiple virtual disk devices, and each virtual disk device is capable of having a file system that exclusively uses that particular virtual disk device. A request to access a file is typically performed by an application, via the file system, using a file name and logical offset. This file name and logical offset (i.e., the manner in which applications express file operation requests) corresponds to a location within the virtual disk device. Subsequently, the request is translated to physical disk space on the storage device by the volume manager, allowing the user of the application to access the data within a particular file.
Additionally, many file systems support sparse files, which are files that include regions that have never been written with data. Sparse files may not be completely blank; rather, in between data, regions may exist that do not contain any data. These regions are typically referred to as holes. Conventionally, if a user or application attempts to read from a hole, the file system detects that no underlying data exists and returns all zeros. Moreover, file systems may not allocate resources for holes in order to save physical disk space.
In some instances, data stored in files within a file system may be large blocks of data that do not include much content. In this case, the large amount of data stored by users may be compressed (i.e., reduced in size without loss of information). An extreme case of this would be when users store large blocks of data that include many contiguous zeros.

Automatic conversion of all-zero data storage blocks into file holes


An automated driving system and methods are disclosed. The automated driving system includes a perception system disposed on an autonomous vehicle. The automated driving system can detect, based on an audio recording captured by the perception system, an emergency vehicle operating in an emergency mode. After detection, an image of the environment surrounding the autonomous vehicle can be captured by the perception system. Based on at least one of the audio recording and the image of the environment surrounding the autonomous vehicle, a location of the emergency vehicle in respect to the autonomous vehicle can be determined. If the location of the emergency vehicle is such that the autonomous vehicle is required to comply with a traffic regulation, the automated driving system can send a command to one or more vehicle systems of the autonomous vehicle to implement one or more maneuvers to comply with the traffic regulation.

Fully or highly automated driving systems are designed to operate a vehicle on the road without driver interaction or other external control, for example, self-driving vehicles or autonomous vehicles. As part of safe operation in the autonomous mode, some autonomous vehicles are configured to detect nearby emergency vehicles within one or more images captured by a perception system. Other autonomous vehicles can infer that an emergency vehicle is nearby based on the behavior of surrounding vehicles responding to the emergency vehicle. However, the aforementioned examples of detection and response to an emergency vehicle are not sufficient in the case of an obstructed view of the emergency vehicle from the vantage point of the perception system of the autonomous vehicle or the lack of other vehicles surrounding the emergency vehicle.

Autonomous vehicle detection of and response to emergency vehicles

Toyota Motor Engineering & Manufacturing North America, Inc.


A method of partially oxidizing a feed gas comprises providing a reactor containing a catalyst, providing a gas distributor comprising a body having a plurality of channels therethrough and a plurality of outlets from said channels for distributing gas across the catalyst, feeding the feed gas and the oxygen-containing gas into the gas distributor and allowing the feed gas and the oxygen-containing gas to flow through the gas distributor and out through the outlets into contact with the catalyst. The gas distributor preferably comprises a micro-channel gas distributor, which can be assembled by providing a plurality of etched plates defining flow channels, and stacking and fusing the plates. The reactant gases can be mixed within the gas distributor or maintained separately until they have exited the gas distributor.

The quantities of methane, the main component of natural gas, are available in many areas of the world, and natural gas is predicted to outlast oil reserves by a significant margin. However, most natural gas is situated in areas that are geographically remote from population and industrial centers. The costs of compression, transportation, and storage make its use economically unattractive.
To improve the economics of natural gas use, much research has focused on methane as a starting material for the production of higher hydrocarbons and hydrocarbon liquids. The conversion of methane to hydrocarbons is typically carried out in two steps. In the first step, methane is reformed with water to produce carbon monoxide and hydrogen (i.e., synthesis gas or syngas). In a second step, the syngas intermediate is converted to higher hydrocarbon products by processes such as the Fischer-Tropsch Synthesis. For example, fuels with boiling points in the middle distillate range, such as kerosene and diesel fuel, and hydrocarbon waxes may be produced from the synthesis gas.
Current industrial use of methane as a chemical feedstock proceeds by the initial conversion of methane to carbon monoxide and hydrogen by either steam reforming, which is the most widespread process, or by dry reforming or by autothermal reforming. Steam reforming currently is the major process used commercially for the conversion of methane to synthesis gas, proceeding according to Equation 1.
Although steam reforming has been practiced for over five decades, efforts to improve the energy efficiency and reduce the capital investment required for this technology continue. For many industrial applications, the 3:1 ratio of H2:CO products is problematic, and the typically large steam reforming plants are not practical to set up at remote sites of natural gas formations.
Methane residence times in steam reforming are on the order of 0.5-1 second, whereas for heterogeneously catalyzed partial oxidation, the residence time is on the order of a few milliseconds. For the same production capacity, syngas facilities for the partial oxidation of methane can be far smaller, and less expensive, than facilities based on steam reforming. A recent report (M. Fichtner et al. Ind. Eng. Chem. Res. (2001) 40:3475–3483) states that for efficient syngas production, the use of elevated operation pressures of about 2.5 MPa is required. Those authors describe a partial oxidation process in which the exothermic complete oxidation of methane is coupled with the subsequent endothermic reforming reactions (water and CO2 decomposition). This type of process can also be referred to as autothermal reforming or ATR, especially when steam is co-fed with the methane. Certain microstructured rhodium honeycomb catalysts are employed which have the advantage of a smaller pressure drop than beds or porous solids (foams) and which resist the reaction heat of the total oxidation reaction taking place at the catalyst inlet. The honeycomb is made by welding together a stack of rhodium foils that have been microstructured by means of wire erosion or cutting.
The catalytic partial oxidation ("CPOX") or direct partial oxidation of hydrocarbons (e.g. natural gas or methane) to syngas has also been described in the literature. In catalytic partial oxidation, natural gas is mixed with air, oxygen-enriched air, or oxygen, and introduced to a catalyst at elevated temperature and pressure. The partial oxidation of methane yields a syngas mixture with a H2:CO ratio of 2:1, as shown in Equation 2.
This ratio is more useful than the H2:CO ratio from steam reforming for the downstream conversion of the syngas to chemicals such as methanol or to fuels. Furthermore, oxidation reactions are typically much faster than reforming reactions. This allows the use of much smaller reactors for catalytic partial oxidation processes than is possible in a conventional steam reforming process.
While its use is currently limited as an industrial process, the exothermic direct partial oxidation or CPOX of methane has recently attracted much attention due to its inherent advantages, such as the fact that due to the significant heat that is released during the process, there is no requirement for the continuous input of heat in order to maintain the reaction, in contrast to steam reforming processes.
The current interest in partial oxidation processes has resulted in various improvements in the technologies associated with that process, including catalyst composition, catalyst structure, reactor structure, and operating parameters. One aspect that has not received as much attention is the technology associated with the injection of feed gases into the partial oxidation reactor. In particular, it is necessary to feed methane and an oxygen-containing gas into the reactor under conditions of elevated temperature and pressure. The same feed conditions that are conducive to efficient operation of the partial oxidation process, however, are conducive to reactions that are less desirable, and possibly even hazardous, such as the ignition and combustion of the feedstock. At the same time, it is desirable to mix the feed gases as completely as possible, to as to maximize the efficiency of the catalytic reaction. It is particularly desirable to avoid pre-reaction and pre-ignition of the gases.
As described in U.S. Pat. No. 6,267,912, which is incorporated herein by reference, catalytic partial oxidation processes attempt to eliminate gas phase oxidation reactions entirely, so that all of the partial oxidation reactions take place on the catalyst surface. The reactants are contacted with the catalyst at a very high space velocity, so that gas phase reactions are minimized. Gas phase reactions are undesirable because they can increase the occurrence of undesired combustion reactions (producing steam and carbon dioxide), damage the catalyst, and accelerate its deactivation.
Hence, there is a need for a method and apparatus for mixing partial oxidation feed gases that achieves thorough mixing, and if necessary preheat, and provides an even distribution of the mixed gases across the catalyst surface, while minimizing or preventing undesired gas phase reactions.

Utilization of micro-channel gas distributor to distribute unreacted feed gas into reactors


An apparatus and method for communicating information within a network having one or more communication buses (5, 6, 7, 8), consisting of one or more elements (20, 30, 40) to maximise throughput and minimise CPU involvement by executing the following. Compare incoming message identifiers (14) against a set of predetermined identifiers (22). Transpose data sets (12) within the incoming message data frame and where necessary, save and/or transmit new frames as defined by operations dependent upon the incoming identifier. By utilising an optimal set of operands the memory requirement is satisfied by a minimal size of standard type.

Communication networks typically involve transferring information between nodes connected in the network by at least one communication bus. Information is transferred from one node to another node via the physical medium according to a communication protocol. Such a protocol is the Control Area Network (CAN) protocol used for example in automotive applications. Different protocols might be used on different buses within the same network to have the best match to a particular communication need.
Often, there are multiple, independent communication busses in such applications. The busses are connected to each other via an information controller interface or gateway device. Information is transferred from one bus to another bus (or back to the same bus) via the gateway in information units, usually referred to as message frames. Each frame consists of a data part containing the information to be transferred; a frame identifier and optional ancillary information. The ancillary information is used to attain complete error-free transmissions and requires the transfer of a fixed amount of extra information bits per frame, ie CRC, bit-stuffing etc. For example in CAN automotive networks, a frame comprises of a data part of between 0 and 8 bytes of information.
To minimise the overhead from identifiers and ancillary data, using the maximum data part per frame is required. This is achieved by a node, through the packing of several constituent pieces of data into one frame data part. Each one of these atomic data sets of is called a signal. For example, in the CAN protocol, a frame comprises of a data part of between 0 and 8 bytes of information. Each data set or signal within that data part may have differing lengths from 1 to 64 bits, upto a cumulative maximum of 64 bits. The frames are transmitted with pre-defined identifiers upon which when received at the gateway or a node, the identifier determines the position and size of all the signals within the frame. An issue of this method is that the data sets within a frame may start at any bit position and are often crossing byte boundaries. Extraction and further processing of this data must take this into account and provide the needed computation power. Consequently, when a gateway device has to transfer a data set from one bus to another, a repeating series of activities has to be performed. The typical steps involved are, establishing the size and positions of the data sets from the frame identifier; unpacking the frame into it's data sets; transposing the data sets as required; packing the data sets into another, new or already created frame; and finally transmitting the frames to their destination bus as required. Executing these operations has typically been accomplished with software requiring extensive memory for the software programs, and placing high demands on the central processor unit (CPU) and supporting hardware. As the number of signals increases the CPU processing power required increases and also results in increased message latency and more frequent CPU interrupts and loading. Attempts have been made, for example WO99/34560, to provide a message bridge to transfer complete frames between CAN busses, however, these systems are still memory intensive, and still demand CPU time.
Thus, there is a need for an information communication controller interface or gateway device and method that efficiently controls the communication and transfer of signal based messages for faster operations minimises at least message latency, memory requirements, or CPU interrupts and loading.

Information communication controller interface apparatus and method


A method of production of a chemically treated steel sheet using cathode electrolysis to form a chemically treated coating which stably resupplies Zr ions in a treatment solution and uses an insoluble anode to continuously and stably treat a steel strip by cathode electrolysis in a treatment solution containing Zr ions and fluorine ions, characterized by                using two or more types of zirconium compounds selected from predetermined Zr compounds to resupply zirconium ions in a plating solution consumed by the cathode electrolysis during the cathode electrolysis and        maintaining a content of ions in the plating solution at zirconium ions: 0.05 to 30 g/liter, fluorine ions: 0.5 to 10 times the content of the zirconium ions, and ions derived from said two or more types of zirconium compounds other than zirconium ions and fluorine ions: not more than 10 times the content of the zirconium ions in performing the cathode electrolysis.

Steel sheet products are treated to secure corrosion resistance, rustproofing, coating adhesion, and other characteristics by treating the surface of the steel sheet, or the surface of the steel sheet after being plated by Sn, Zn, Ni, etc., by cathode electrolysis in a treatment solution containing hexavalent Cr (electrolytic Cr acid treatment) so as to form a chromate coating comprised of Cr oxide or Cr metal and Cr oxide.
For example, the Sn-plated steel sheet (tinplate) used as steel sheet for containers and TFS (tin free steel) not using Sn are given corrosion resistance, coating adhesion, film adhesion, and discoloration resistance by giving their outermost surfaces a chromate coating.
In recent years, interest in the environment has been rising and restrictions on the use of hexavalent Cr are being considered. Therefore, the method of applying a chemically treated coating made of a Zr compound as a new coating to take the place of chromate coatings while using existing electrolytic Cr acid treatment facilities has been proposed.
For example, PLT 1 proposes "a method of surface treatment of tin-plated steel sheet and tin-plated cans", while PLT 2 proposes "a method of surface treatment of a tin- or tin-alloy plated steel material".
In these inventions, the method is disclosed of treatment by cathode electrolysis in a treatment solution containing Zr fluoride or a Zr compound using a Pt or other insoluble anode as a counter electrode so as to obtain a Zr-based chemically treated coating with superior performance.

Method of production of chemically treated steel sheet

NIPPON STEEL & SUMITOMO METAL CORPORATION


A source driving circuit includes a source driver circuit, an intermediate voltage generator, and a switching control unit. The source driver circuit receives display data and generates a source driving voltage corresponding to the received display data The intermediate voltage generator generates an intermediate source driving voltage. The switching control unit receives a plurality of control signals for selectively applying the source driving voltage and the intermediate source driving voltage to data lines of a display as a driving voltage and controls an order of transition to final levels of a common electrode voltage and the driving voltage. The common electrode voltage may be applied to a common electrode of a liquid crystal capacitor coupled to the data line of the display.

1. Technical Field
The present disclosure relates to circuits and methods for driving flat panel displays and, more particularly, to source driving circuits and methods, and a liquid crystal display apparatus capable of reducing power consumption for driving data lines of flat panel displays.
2. Discussion of Related Art
Various types of flat panel displays, such as a liquid crystal display (LCD), a plasma display panel (PDP), an electroluminescence display panel, and the like, have been developed to replace traditional cathode ray tube (CRT) displays. Such flat panel displays are suitable for devices and applications requiring small dimensions, light weight, and low power consumption. For example, LCDs can be operated using large-scale integration (LSI) drivers, because LCDs can be driven by a low-voltage power supply and have a low power consumption. Accordingly, LCDs have been widely implemented for laptop computers, cellular phones, pocket computers, automobiles, and color televisions. For features such as light weight, smaller dimensions, and low power consumption, LCD devices are widely used in portable devices.
FIG. 1 is a diagram illustrating a conventional display system.
Referring to FIG. 1, the display system 100 includes a display panel 110 (for example, LCD) and a plurality of components for driving/controlling the display panel 110 including a source driving IC 120, a gate driving IC 130, a controller 140 having a graphic random access memory (GRAM), and a power generator 150. The controller 140 generates control signals for controlling the power generator 150, the source driving IC 120 and the gate driving IC 130.
The display panel 110 includes a plurality of data lines D1 to Dm that are connected to the source driving IC 120 and a plurality of gate lines G1 to Gn that are connected to the gate driving IC 130. The display panel 110 includes a plurality of pixels/subpixels that are arrayed in a matrix of rows and columns. The pixels/subpixels in a given column are commonly connected to a data line. Assuming the display panel 110 is a TFT-LCD, the display panel 110 may include a thin-film transistor (TFT) board including a plurality of pixel/subpixel units arranged in matrix form. As illustrated in FIG. 1, each pixel/subpixel unit includes a TFT, a liquid crystal capacitor CL, which is connected between a drain electrode of the TFT and a common electrode VCOM, and a thin-film storage capacitor Cst, which is connected in parallel with the liquid crystal capacitor CL. The storage capacitor Cst stores an electric charge so that an image on the display is maintained during a non-selected period. The liquid crystal capacitor CL is formed by a common electrode VCOM of a color filter plate, a pixel electrode of the TFT, and liquid crystal material therebetween. A source electrode of the TFT is connected to a data line and a gate electrode of the TFT is connected to a gate line. The TFT acts as a switch that applies a source voltage on the data line to the pixel electrode when a gate driver signal on the gate line is applied to the gate of the TFT.
The power generator 150 generates a plurality of reference voltages, including, AVDD (source driver power supply), and GVDD (gamma reference voltage), which are applied to the source driving IC 120, VCOMH (high common electrode voltage) and VCOML (low common electrode voltage), which are applied to the common voltage electrode VCOM of the display panel 110, and VGON (gate driver turn-on voltage) and VGOFF (gate driver turn-off voltage), which are applied to the gate driver 1C 130 for driving selected gate lines.
The controller 140 receives as input a plurality of driving data signals and driving control signals (not shown) that are output from an image supply source for example, a main board of a computer (not shown). The driving data signals includes R, G, and B data for forming an image on the display panel 110. The driving control signals include vertical synchronous signals, horizontal synchronous signals, a data enable signal, and a clock signal. The controller 140 outputs to the source driving IC 120 a plurality of display data signals DDATA, which correspond to R, G, and B data, and source control signals. The controller 140 outputs gate control signals for controlling the gate driving IC 130. The controller 140 controls the timing for which data and control signals are output from the source driving IC 120 and gate driving IC 130. For example, in one mode of operation, the controller 140 generates the source and gate control signals such that the gate driving IC 130 transmits a gate driver output signal to each gate line G1 to Gn in a consecutive manner and data voltage is selectively applied to each pixel/subpixel in an activated row, one by one, in order. In another mode of operation, the pixels/subpixels can be charged by sequentially scanning pixels/subpixels in a first column and, thereafter, scanning pixels/subpixels in a next column.
The gate driving IC 130 includes a plurality of gate drivers (not shown) that drive gate lines G1 to Gn, respectively. The source driving IC 120 includes a plurality of source driver circuits 120a to 120m that drive data lines D1 to Dm, respectively.
FIG. 2 is a schematic diagram illustrating a conventional source driving circuit 200 in the system 100 of FIG. 1.
In general, as illustrated in FIG. 2, the source driving circuit 200 includes a source driver circuit 120i that drives a corresponding data line Di, and a grayscale voltage generator 230. The source driving circuit 200 of FIG. 2 illustrates a conventional architecture of the source driver IC 120 of FIG. 1 where there is one source driver circuit 120i for each data line (or RGB channel). The grayscale generator 230 may be included in the power generation circuit 150 of FIG. 1. The output of the gray scale generator 230 is commonly coupled to each source driver circuit 120_1 to 120—m of the source driving IC 120 in FIG. 1.
In general, the source driver circuit 120i includes a polarity inversion circuit 210, a latch circuit 220, a gamma decoder 240, and a driving buffer 250. The source driver 120i is controlled by a plurality of control signals that include a polarity control signal M, a latch control signal S_LATCH, and switching control signals. In addition, the source driver 120i receives as inputs grayscale reference voltages that are generated by the grayscale voltage generator 230.
The source driver circuit 120i receives input display data DDATA of an n-bits for R, G, or B data from the GRAM controller 140. The polarity inversion circuit 210 receives the display data DDATA and controls a polarity of the display data DDATA in response to the polarity control signal M. For example, when the polarity control signal M is logic "0", the polarity of the display data DDATA remains the same as the original display data (positive polarity). On the other hand, when the polarity control signal M is logic "1", the polarity of the display data DDATA is reversed to be inverted display data (negative polarity).
The latch circuit 220 latches the n-bit display data output from the polarity inversion circuit 210 in response to the latch control signal S_LATCH. The latch circuit 220 outputs the latched display data to the gamma decoder 240. The grayscale voltage generator 230 generates and outputs 2″ different grayscale voltages to the gamma decoder 240. The gamma decoder 240 decodes the n-bit display data output from the latch circuit 220, and selects and outputs a grayscale voltage to the driving buffer 250.
The driving buffer 250 buffers and amplifies the grayscale voltage output from the gamma decoder 240. The amplified grayscale voltage is selectively applied to the data line of the display panel 110 in response to the switching control signal.
An equivalent capacitance Ceq is present in the source driving signal Sm connected to the common voltage VCOM.
FIG. 3 is a diagram illustrating a conventional common voltage driver circuit 300, which may be included in the power generator 150 of FIG. 1, for driving the common electrode VCOM of the display panel 110.
Referring to FIG. 3, the common voltage driver circuit 300 includes first and second drivers 310 and 320, switches 330 and 340 and capacitors 350 and 360. The first driver 310 buffers and outputs VCOMH (high common voltage) fed thereto. The capacitor 350 is connected to the output of the first driver 310 for stabilizing the output voltage. The switch 330 is controlled by a control signal VCMH_ON for selectively connecting the output of the first driver 310 to the VCOM node N and thereby driving VCOM to VCOMH. The second driver 320 buffers and outputs VCOML (low common voltage) fed thereto. The capacitor 360 is connected to the output of the second driver 320 for stabilizing the output voltage. The switch 340 is controlled by control signal VCML_ON for selectively connecting the output of the second driver 320 to the VCOM node N and thereby driving VCOM to VCOML.
FIG. 4 is a timing diagram illustrating a source driving voltage Sm driven by the source driving circuit 200 of FIG. 2 and a common electrode voltage VCOM driven by the common voltage driver circuit 300 of FIG. 3.
In FIG. 4, a white pattern of a normal black panel is illustrated as an example of the worst case pattern in the display panel 110 of FIG. 1. Referring to FIG. 4, at time T1, the polarity control signal M and the control signal VCMH_ON are enabled and the control signal VCML_ON is disabled. As a result, the switch 330 is closed and the switch 340 is opened, so that common voltage VCOM is driven to VCOMH from VCOML by the first driver 310. At this time, the source output voltage Sm is changed to VL from VH contrary to VCOM. In this exemplary embodiment, VH is the highest gray scale voltage and VL is the lowest gray scale voltage, and T is a toggling period of VCOM.
When display systems such as LCD panels are implemented in small hand-held, portable devices, it is important to reduce the power consumption needed to drive such displays, so as to preserve battery power. In general, the primary sources of power consumption when driving flat panel devices include source drivers and VCOM drivers. More particularly, with source drivers, the voltages for driving the data lines are typically designed with relatively high levels in order to enhance the driving speed of the display, for example, quickly charge and discharge the liquid crystal capacitor CL. Power consumption of the display, however, is increased in proportion to the voltage increase of the driving voltage. Further, driving the common electrode, which faces the pixel electrodes is a significant source of power consumption because the polarity of the common voltage is reversed every cycle.
Generally, the source driving voltage and the VCOM driving voltage are internal voltages that are generated by voltage generators in which such driving voltages are generated by boosting voltage/power output from an intermediate reference voltage source. Thus, the conventional source and VCOM driver circuits increase power consumption, because they use boosted voltages for driving the data lines and providing VCOM.
The average load current consumption for VCOMH driven from the supply voltage AVDD is formulated by the following Equation 1.IVCOMH=(m(VCOMH−VCOML+VH−VL)Ceq)/2T,  [Equation 1]where m denotes a number of source channels, Ceq denotes an equivalent capacitance, and T denotes a toggling period of VCOM.
In addition, the average load current consumption for VCOML driven from VL is formulated by the following Equation 2.IVCOML=(m(VCOMH−VCOML+VH−VL)Ceq)/2T  [Equation 2]
Further, the average load current consumption for source driven from voltage AVDD is formulated by the following Equation 3.ISRC=(m(VCOMH−VCOML+VH−VL)Ceq)/2T  [Equation 3]When AVDD corresponds to an output voltage boosted by an amount a provided from an external input power supply voltage, and VCL corresponds to an output voltage boosted by an amount −b provided from the external input power supply voltage, the total average current consumption is formulated by the following Equation 4.ITOT=(2a+b)*(m(VCOMH−VCOML+VH−VL)Ceq)/2T  [Equation 4]

Source driving circuit and liquid crystal display apparatus including the same


A system that provides visual components generates a first display of selectable and hierarchical visual components, where each visual component has at least one associated attribute. The system receives a selection of one of the visual components and displays a second display of visual components at a next hierarchical level of the selected visual component. The system then generates and displays breadcrumbs that include a navigation path from the first display to the second display, and include the associated attribute for the selected visual component.

"Breadcrumbs" are a navigation aid that appear in user interfaces. It allows users to keep track of their locations within programs or documents. Breadcrumbs typically appear horizontally across the top of a web page, often below title bars or headers. It provide links back to each previous page the user navigated through to get to the current page or, for hierarchical web page structures, the parent pages of the current one. In general, breadcrumbs provide a trail for the user to follow back to the starting or entry point.


A first request may be received to update a first set of values. The first set of values may be stored at a first location within a first data page of a database. The first location may be read-only. In response to the receiving of the first request, a first set of records may be inserted into a second data page. The first set of records may include the update of the first set of values. In response to the inserting, a forward pointer may be stored in the first data page that points to the first set of records on the second data page. One or more committed values may be identified on the second data page. In response to the identifying, the one or more committed values may be merged from the second data page to a third data page.

This disclosure relates generally to database management systems, and more specifically, to reducing the cost of update delete, and append-only insert operations in a database.
Database manager modules may perform the two functions of accessing and modifying data from a database. Database managers may access data by selecting and delivering particular database records requested by a user based on a query statement. The query statement specifies the particular attributes (e.g., columns), table, and query conditions that a user desires. Database managers may modify data by inserting new database records (rows) in a table, updating values within the database records, or deleting particular database records from a table matching specified query conditions.
In a database management system, many users may access or modify the same data concurrently (i.e., in parallel). Unless some kind of restriction is imposed on the activity of user transactions, data in the system may be modified in some unintended way. For example, application A may update a value in a database, and application B may read that value before the value was committed (i.e., before the associated transaction was completed). If the value of A is not later committed, the calculations performed by B are based on uncommitted and presumably invalid data. Accordingly, database management systems may utilize concurrency control schemes to maintain database consistency and coordinate user transactions.

This patent is subject to a terminal disclaimer.

Reducing the cost of update, delete, and append-only insert operations in a database

International Business Machines Corporation


A container with a base (12) and lid (14), clearly indicates if the lid has been opened after a clerk loaded food into the base and closed the lid. The base and lid each has a respective lid tab and a base tab, with one tab forming a slot (26) and the tab other projecting through the slot, and with the base tab forming a barrier wall (80) that lies over the lid tab. One of the tabs has a weakened severable line (90, 92) that can be torn to allow the lid tab to be lifted to open the container.

Food is often placed in a transparent plastic container that includes a base with a large volume cavity that holds the food and with a cover or lid that closes the cavity. Buyers want to be assured that, after the food was placed in the container as by a clerk at the food store, that the container has not been opened. There is a possibility that another customer has secretly opened the container enough to taste a bit of the food before closing it, and may have left germs in the food. A container that allowed a clerk at the store or at a distribution facility to automatically activate a device that clearly indicated to a potential customer whether or not the container has been opened since it was first closed by a clerk, would be of value.


Coating compositions are disclosed that include an alkoxide and a silica sol that includes silica nanoparticles and a polymerizable (meth)acrylate binding agent. The polymerizable (meth)acrylate binding agent remains substantially uncrosslinked after the coating composition has been cured to form a hard coat. Also disclosed are articles at least partially coated with a hard coat deposited from such a coating composition, methods for depositing a hard coat on at least a portion of a plastic substrate, and methods for improving the adhesion and abrasion resistance of a coating composition.

Plastic substrates, including transparent plastic substrates, are desired for a number of applications, such as windshields, lenses, and consumer electronics, among other things. To minimize scratching, as well as other forms of degradation, clear "hard coats" are often applied as protective layers to the substrates. A primer is often used to enhance adhesion between the hardcoat and the substrate. Hard coats that adhere to these substrates without the use of a primer, while maintaining their abrasion resistance properties, are desired. In addition, hard coats that are rapidly curable upon exposure to actinic radiation are also desired for, among other reasons, productivity.

Abrasion resistant coating compositions and coated articles


A balloon catheter with a shaft having a balloon located proximate a distal end thereof, with the shaft having a lumen through which a balloon is supplied and a lumen through which a guide wire is passed. The shaft consists of a proximal area and a distal area, with the shaft being made of a stiffer material in the proximal shaft area than in the distal shaft area. In one embodiment of the proximal shaft area, the supply lumen and the guide lumen are coaxially disposed. In one embodiment of the distal shaft area, the supply lumen and the guide lumen are biaxially disposed. An /utlet opening for the guide wire is disposed in the shaft in the proximal area of the catheter wherein a guide wire passing through the opening can be advanced into the guide lumen and towards the balloon for passage through the distal end.

This invention relates to a balloon catheter with a shaft having at its distal end a balloon. The shaft has one lumen through which the balloon is supplied and another lumen through which a guide wire is passed. The guide wire functions to guide and control the catheter in use. The shaft consists of a proximal area and a distal area, with the shaft being made of a stiffer material in the proximal area. The lumen for the guide wire is coaxially located in the proximal area of the shaft so that the lumen for supplying the balloon surrounds the lumen for the guide wire like a ring. In the distal area the shaft is made of a more flexible material and the lumen for supplying the balloon and the lumen for the guide wire are arranged biaxially side by side.
A balloon catheter of this type is disclosed, for example, in German Utility Patent 9,106,499. The balloon catheter disclosed there is used together with a guide catheter and a guide wire for percutaneous transluminal coronary recanalization. The catheter is inserted into a blood vessel through a puncture in the skin and is advanced through the blood vessel to an arteriosclerotic occlusion in coronary vessels, for example. Then the occlusion is widened with the inflatable balloon at the end of the catheter.
The shaft of this known catheter is composed of two lengths. The proximal length on the operating end is made of an especially rigid material and is also arranged coaxially, i.e., according to the "tube-in-a-tube" system, which leads to an especially rigid shaft in this area.
The distal length of the shaft on the end remote from the manipulator is made of an especially flexible material and is designed so the two lumens in the shaft, namely the channel for supplying the balloon and the channel for receiving the guide 7ire, are arranged side by side in a joint shaft sheathing. This yields a more flexible design, so the two measures together, namely the flexible material and the more flexible design, yield a shaft that can adapt to all blood vessel shapes.
This arrangement should achieve the effect that, on the one hand, the distal end of the catheter with the balloon folded up can be inserted easily into the convoluted passages of the coronary vessels but, on the other hand, the shearing forces for advancing the catheter can be transmitted well in the proximal rigid section of the shaft at the same time.
If the proximal section is not rigid enough, the shaft will give to the side under the shearing forces as the catheter is advanced, and especially high frictional forces will develop between the catheter and the side wall in the areas where the catheter yields to the side. Some of the shearing force applied to the shaft is thus lost and is no longer available for pushing through a vascular occlusion, for example. This also means that some of the sensory perception is lost for the treating physician since some of the resistance perceived by the physician in advancing the catheter is due to uncontrolled frictional forces rather than resistance that should be taken into account by the physician in performing the treatment. This lateral yielding of the catheter shaft in advancing the catheter also means that the tip of the catheter, the balloon, does not cover the same distance as the proximal end. The safety and reliability with which the doctor can guide the catheter are then greatly impaired.
It is desirable that a catheter of this type can also be used according to the so-called monorail system. With this system which is described in European Patent 203,945, the guide wire which is guided from the tip inside the catheter does not come out of the shaft at the proximal end of the catheter but instead comes out of the shaft at a certain short distance from the balloon. This facilitates changing catheters while the guide wire is in the blood vessel with its end after the occlusion. Without this outlet opening a short distance from the balloon, i.e., without the monorail system, the guide wire would have to project out of the patient's body for a length at least equal to the total catheter length. With the monorail system the guide wire can be much shorter and changing catheters is easier and faster accordingly. Less effort in manipulation is required to keep the guide wire that projects out of the patient's body sterile, and the catheter need not be advanced over a guide wire approximately 3 meters long, for example.


An object of the present invention is to provide a lithium ion secondary battery enabling improvement of output characteristics at the time of charge and discharge at low temperature and at room temperature. A lithium ion secondary battery according to the present invention for achieving the above object includes a positive electrode plate (11) including a positive electrode mix layer, and a negative electrode plate (12) including a negative electrode mix layer (45). The negative electrode mix layer (45) contains a graphite-type material (42), metal oxide (44), and a conductive assistant (43). The conductive assistant (43) is a carbon material that does not dope or dedope lithium ions, and a mixing ratio of the conductive assistant (43) is 0.4 weight % or more and less than 1.2 weight % of weight of the negative electrode mix layer (45).

A lithium ion secondary battery has already been in common use as a battery for a mobile phone, a notebook computer, and the like, and application thereof to a middle or large battery such as batteries for an automobile, power storage, and load leveling is progressing.
As an electrode for use in a conventional lithium ion secondary battery, PTL 1 discloses an electrode including a graphitic material, a non-graphitic material, and a mixed material of metal materials such as iron oxide, tin, tin oxide, and silicon oxide enabling lithium to be doped and dedoped for the purpose of achieving high discharge capacity and improving output characteristics at the time of charge and discharge at low temperature.


In a library apparatus, a vertical rail is fixed on a cover member so that a storage medium input-output machine disposed inside the library apparatus moves in a vertical direction, and a horizontal rail moves along the vertical rail in the vertical direction so that the storage medium input-output machine moves in a horizontal direction. Thus, storage media can move between storage medium storing shelves and a drive. The horizontal rail is provided with a mounting section.

1. Field of the Invention
The present invention relates to a library apparatus for storing a plurality of storage media such as magnetic tapes and magneto-optical disks to perform at least information reproduction for those storage media.
2. Description of the Related Art
Hitherto, there is known a library apparatus in which a plurality of storage media such as magnetic tapes and magneto-optical disks is stored, and upon receipt of an instruction from an operator and another apparatus, a desired storage medium is mounted on a drive to record information onto the storage medium and to perform information reproduction for the storage medium. The library apparatus is a so-called back-up apparatus for saving information, providing against an emergency, in such a manner that for example, in a computer network, the library apparatus is connected to a host computer taking a leading part in a plurality of computer systems, the same information as that stored in the host computer is kept.
FIG. 17 is a perspective view of the conventional library apparatus, looking from the front.
A library apparatus 800 shown in FIG. 17 comprises a cover member 810 and a moving mechanism 820 having a horizontal rail 821 fixed on a bottom plate 810a inside the cover member 810 in a horizontal direction.
FIG. 18 is a perspective view of the moving mechanism shown in FIG. 17.
The moving mechanism 820 shown in FIG. 18 comprises: the horizontal rail 821 shown also in FIG. 17; a horizontal direction moving base 822 travelling along the horizontal rail 821 in a horizontal direction; a moving base driving motor 823 fixed on the horizontal direction moving base 822 for moving the horizontal direction moving base 822 in a horizontal direction; a vertical rail 824 fixed on the horizontal direction moving base 822 travelling together with the horizontal direction moving base 822 in a horizontal direction; a storage medium exchanging mechanism 825 travelling along the vertical rail 824 for deriving a desired storage medium from among the stored storage media (not illustrated) to mount the derived storage medium on a drive (not illustrated); and a storage medium exchanging mechanism driving motor 826 fixed on the horizontal direction moving base 822 for moving the storage medium exchanging mechanism 825 in a vertical direction.
Recently as computers have come into wide use, a large amount of information is dealt with routinely, and an amount of information stored in a computer system expands. Thus, there is increased a demand of a library apparatus capable of increasing the maximum storage capacity of the library apparatus serving as a back-up for information.
Hitherto, it is performed that the maximum storage capacity of a library apparatus is increased in such a manner that a plurality of library apparatuses is coupled to one another, and the coupled library apparatuses in its entirety (hereinafter, the coupled library apparatuses in its entirety are referred to as an expanded library apparatus) are regarded as one library apparatus and be used (cf. Japanese Patent Publication TokuKai. 1999-96628).
As types of the expanded library apparatus, there are known types, which will be explained hereinafter.
FIG. 19 is an explanatory view useful for understanding a first type of extended library apparatus of the conventional extended library apparatuses.
The first type of extended library apparatus shown in FIG. 19 is a library apparatus having the same structure as the library apparatus proposed in the referenced above Japanese Patent Publication TokuKai. 1999-96628. The first type of extended library apparatus is equivalent to one in which the library apparatus 800 having the same moving mechanism 820 as the moving mechanism 820 shown in FIG. 17 and FIG. 18 is combined with an extended library apparatus 800′. The horizontal rail 821 provided on the moving mechanism 820 is fixed on a bottom plate inside the cover member 810 in a horizontal direction. Inside the cover member 810, there are provided storage medium storage shelves 151 for storing therein a plurality of storage media 31. The extended library apparatus 800′ is provided with a horizontal rail 821′ fixed on a bottom plate inside a cover member 810′ of the extended library apparatus 800′ in a horizontal direction and storage medium storage shelves 151 for storing therein a plurality of storage media 31.
FIG. 20 is a flowchart useful for understanding a flow in which storage media are carried in the first type of extended library apparatus shown in FIG. 19.
First, there is derived a storage medium 31 stored in a storage medium storage shelf 151 provided in the cover member 810′ of the extending library apparatus 800′ (step S31).
Next, the storage medium 31 derived in the step S31 is carried in the cover member 810′ of the extended library apparatus 800′ and the cover member 810 of the library apparatus 800 (step S32).
Lastly, the storage medium 31 carried in the step S32 is inserted into a recording and reproduction apparatus (not illustrated) provided in the cover member 810 of the library apparatus 800 (step S33).
However, according to the first type of extended library apparatus shown in FIG. 19, when a plurality of library apparatuses is coupled to one another, there is a need to couple horizontal rails to one another, which are fixed on the bottom plates inside the cover members of the plurality of library apparatuses in the horizontal direction, respectively. As mentioned above, the storage medium exchanging mechanism travels along the vertical rail in the vertical direction together with the vertical rail travelling together with the horizontal direction moving base 822 in the horizontal direction. Thus, occurrence of a difference in level on the coupling portion of the horizontal rail makes it difficult that the storage medium exchanging mechanism smoothly travels, and in some case it would be impossible that the storage medium exchanging mechanism travels. Therefore, in some case of conditions of a set up surface for such a type of extended library apparatus, it is difficult to couple a plurality of library apparatuses to one another in such a manner that the coupling portion of the horizontal rail is coupled free from a difference in level, and it will require a great deal of time and labor to establish the extended library apparatus.
FIG. 21 is an explanatory view useful for understanding a second type of extended library apparatus of the conventional extended library apparatuses.
The second type of extended library apparatus shown in FIG. 21 is one in which two library apparatuses each having the same moving mechanism 820 as the moving mechanism 820 shown in FIG. 17 and FIG. 18 are coupled with each other. The horizontal rail 821 provided on the moving mechanism 820 is fixed on a bottom plate inside the cover member 810 of the library apparatus 800 in a horizontal direction. Inside the cover member 810, there are provided storage medium storage shelves 151 for storing therein a plurality of storage media 31. A coupling portion of the cover members 810 of two library apparatuses 800 is provided with a storage medium delivery mechanism 900 in which charging and discharging slot (not illustrated) for inputting or discharging storage media 31 is provided directed toward the inside direction of the cover member 810.
FIG. 22 is a flowchart useful for understanding a flow in which storage media are carried in the second type of extended library apparatus shown in FIG. 21.
In the explanation of the flowchart shown in FIG. 22, of two library apparatuses 800 shown in FIG. 21, the cover member 810 of a right side of library apparatus 800 is referred to as an R side cover member, and the cover member 810 of a left side of library apparatus 800 is referred to as an L side cover member.
First there is derived a storage medium 31 stored in a storage medium storage shelf 151 provided in the R side cover member (step S41).
Next, the storage medium 31 derived in the step S41 is conveyed in the R side cover member (step S42).
Next, the storage medium 31 conveyed in the step S42 is inserted from the charging and discharging slot into the storage medium delivery mechanism 900 (step S43).
Next, in the storage medium delivery mechanism 900 into which the storage medium 31 inserted in the step S43, the inserted storage medium 31 is transferred to the L side cover member side (step S44).
Next, the storage medium 31, which is transferred to the L side cover member side in the step S44, is delivered from the charging and discharging slot of the storage medium delivery mechanism 900 to the L side cover member side (step S45).
Next, the storage medium 31, which is delivered in the step S45, is conveyed in the L side cover member (step S46).
Lastly, the storage medium 31, which is conveyed in the step S46, is inserted into a recording and reproduction apparatus (not illustrated) provided in the L side cover member (step S47).
According to the second type of extended library apparatus show in FIG. 21, as in the first type of extended library apparatus show in FIG. 19, there is no need to couple the rails to one another, and thus it is easy in establishment. However, in the event that the storage medium is mounted through the storage medium delivery mechanism on the drive, a time (hereinafter, this time is referred to as a conveyance time) from deriving the storage medium from the storage shelf up to mounting it on the drive requires a time on the order of two times to three times as much as the conveyance time in the first type of extended library apparatus show in FIG. 19. This involves a problem that efficiency in conveyance per hour becomes worse.
Further, according to the second type of extended library apparatus show in FIG. 21, there are provided the same number of moving mechanisms as the number of coupled library apparatuses. Thus, as compared with the first type of extended library apparatus show in FIG. 19, which is capable of coping with coupling of a plurality of library apparatuses with one moving mechanism, it involves problems of high cost and increment of dissipation power.

Library apparatus including vertical rail fixed to remain stationary with respect to a cover member


A brewing unit includes a brewing chamber having at least two brewing chamber portions movable one with respect to the other, a water heater, a hot water duct for feeding hot water from the water heater to the brewing chamber, and a beverage dispensing duct from which a beverage is dispensed. The water heater has a cavity through which the beverage dispensing duct extends for connection to an outer beverage dispensing spout.

For producing hot drinks, such as for example coffee, tea, vegetable-based infusions and the like, single-dose packagings, in the form of so-called capsules, pods, cartridges or the like are often used. Here after the term "capsule" will be used to broadly designate such a single-dose packaging. It shall be understood that, unless specifically indicated, said term is to be understood as encompassing any kind of single-dose packaging suitable for preparing beverages or other edible products by extraction using hot and possibly pressurized water. A single-dose packaging can include sufficient ingredients to prepare more than just one portion of beverage, e.g. two portions.
Capsules usually contain the ingredients for producing the drink. Hot water is made to flow through the capsule at an adequate pressure to extract the flavours from the ingredients contained in the capsule. There are several types of devices for handling the capsules and for the infusion, which is the phase of extracting the flavours from the capsules through water passage.
Some coffee machines are designed for use of loose coffee powder or other loose products. In these machines a dosed quantity of loose product is charged in a brewing chamber. The chamber is closed in a water-tight manner and hot pressurized water is fed from a water heater through the product charged in the brewing chamber, to extract flavours from the ingredients.
U.S. Pat. No. 6,129,006 and EP-A-0931491 disclose a brewing unit specifically intended for brewing coffee from bulk coffee powder. This known brewing unit includes a brewing chamber and a water heater. The water heater is arranged near to the brewing chamber. The hot pressurized water produced by the water heater directly flows in the brewing chamber. The latter is in heat contact with the water heater such that power consumption is optimised. Arranging the water heater near the brewing chamber has the advantage of reducing heat dissipation from the heated water along the path from the water heater to the brewing chamber.
U.S. Pat. No. 5,657,683 discloses a hto beverage brewing apparatus wherein a brewing chamber is surrounded by a hot water reservoir containing a heating resistor arranged therein. The brewed beverage is dispensed by a pipe which extends across the water contained in said reservoir.


The furniture raising device described herein is collapsible, portable, stable, and easy to use. The device is designed to raise furniture to one or two preset increases in height. Preferably the device is used to raise the height of a chair. In one embodiment, the device contains a plurality of arms and a center base, where each arm is pivotably attached at a predetermined point in the base using a pin. The locations for attachment of the pins are selected to be spaced far enough apart from each other to allow the arms to rotate about the pins from a first position, where the arms align with the legs in the article of furniture, to a second position, where the arms are aligned in the same general direction (i.e. the “storage position”), and to maximize the ability of the device to be as compact as possible in the storage position. In a second embodiment, the device contains a plurality of arms and a center base, where each arm is pivotably and slidably attached to the base using a pin. In a third embodiment, the furniture raising device is designed to increase the device's strength and prevent breakage. In this embodiment, at least one portion of the center base either contacts the floor when the device is in use or hovers above the floor by at least approximately 1 mm.

Standard chairs are generally too short to allow for children to sit and reach a table during meal time without an aid, such as a cushion, book, or booster seat. Additionally, people who are suffering from arthritis generally have difficulty and experience pain when getting into an out of chairs. Such individuals could more easily and comfortably sit if the height of the chair was raised. However, such aids generally cause greater instability in the chair, often creating safety hazards. For example, when a booster seat is placed on a chair, the child in the booster seat is sitting in a chair that is less stable than that same chair without the booster seat. This is because the center of gravity of the chair has been raised and the chair has now become less stable. Also, frequently one or more of these aids are not available.
A number of different devices for raising the height of chairs have been described, however these devices are generally cumbersome to travel with and/or use.
WO 88/08682 to Hobbins discloses a system for raising a chair, which contains four separate leg extenders. Thus to use this system, a user must separately place each of the four extenders on a leg and separately adjust each extender so that all of the extenders are at the same height.
FR 2 794 628 to Clement discloses a device for raising the height of a chair that contains a plate with spikes, allowing for several plates to be piled upon each other, and holes for retaining straps to secure the plates together. U.S. Pat. No. 5,333,825 to Christensen discloses a device for raising the height of a chair that contains a plurality of adjustable arms, a top plate and a bottom plate. Both of these systems are large and difficult to travel with.
U.S. Pat. No. 3,952,983 to Crochet discloses a portable device of raising a chair. However, this device is cumbersome to travel with as it is quite long in its "collapsed" position. Additionally, this device can break easily if a force is applied to the center of the device, such as by being stepped on by an adult.
"BABY TALL" is the tradename for a chair boosting device currently sold in Europe, Israel and Australia. A similar device is also sold in Israel by Litaf under the tradename "HIGH LEG". Like the device described in U.S. Pat. No. 3,952,983 to Crochet, the BABY TALL and HIGH LEG devices are cumbersome to travel with as they are quite long in the "collapsed" position. Further, these devices break easily when stepped on.
Therefore there is a need for improved, portable devices for raising the height of legged furniture, particularly chairs.
It is an object of the invention to provide improved, portable devices for raising the height of legged furniture.
It is a further object of the invention to provide improved methods for raising the height of legged furniture.

Portable device and method for raising the height of furniture


A modified cellulose is provided. The modified cellulose is represented by the chemical formula (1):

Cellulose is the most abundant polymer in nature. In cellulose, each glucose unit includes three OH groups. Since most of OH groups may generate hydrogen bonds, cellulose forms stable crystal structure, and high bonding force may be formed between celluloses. Further, cellulose is a natural biomass material, and has a heat-resistant, high toughness and other advantages, so that it is widely used in composites.
However, general polyolefin polymers are oleophilic materials having low surface energy. The polyolefin polymers have low polarity, and the interface force between the polyolefin polymers and the hydrophilic plant fiber material are not easy to be formed. Therefore, it is not conducive to manufacturing the composite having cellulose for mechanical reinforcement.

Modified cellulose and composite material using the same

Abstract: wherein n is between 60 and 2500, at least one R is selected from one of the group consisting of

Abstract: R1 is C11 to C32 alkyl group or C11 to C32 alkenyl group, R2 is hydrogen, C3 to C29 alkyl group or C3 to C29 alkenyl group, R3 is C3 to C29 alkyl group or C3 to C29 alkenyl group, R4 is C4 to C8 cycloalkyl group or C4 to C8 cycloalkenyl group, n2 is between 15 and 33, n4 is between 20 and 40.

INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE


The present disclosure provides the sequence of a Paenibacillus polymyxa preproenzyme which is the precursor of a neutral protease, expression thereof in a transformed host organism, and methods for production of the neutral protease, by recombinant means. Further, use of the recombinantly produced neutral protease is disclosed in the field of cell biology, particularly for the purpose of tissue dissociation. The disclosure also includes blends with other proteases. Further disclosed are nucleotide sequences encoding the neutral protease.

From filtrates or supernatants of Paenibacillus polymyxa cultures (P. polymyxa; formerly also known as Bacillus polymyxa or B. polymyxa, all these taxonomic names are used synonymously herein), a neutral protease was isolated and characterized. In the more recent literature the neutral protease is often referred to as "DISPASE®", which is a registered trademark of Godo Shusei Co., Ltd., Tokyo, Japan. Owing to fibronectinase and type IV collagenase proteolytic activity, technical utility of DISPASE® is known particularly in the field of animal cell or tissue culture. Thus, dissociation of a tissue (including cell clumps or cell aggregates) into cell layers or even suspensions of single cells is frequently performed with the activity of this enzyme, either with DISPASE® alone or with DISPASE® as a component of blends, i.e. combined other proteolytic enzymes, specifically Collagenases, e.g. as disclosed in U.S. Pat. No. 5,830,741.
U.S. Pat. No. 3,930,954 discloses a neutral protease from B. polymyxa strain having the accession number ATCC 21993 (in the document also referred to as FERM-P No. 412). The document particularly describes culturing of the bacterial strain under aerobic conditions in a complex liquid medium (culture broth) containing a carbon source, a nitrogen source and inorganic salts. The proteolytic activity present in the culture broth was monitored during cultivation, indicating the amount of neutral protease secreted by the cells into the liquid supernatant. When the maximum activity was reached the culture was harvested and particulate components including bacterial cells were separated from the supernatant by gel filtration, followed by concentration of the filtrate under reduced pressure. Following a not further specified fractionation step with isopropanol, a preparation representing 70% of the total proteolytic activity detected in the culture broth was obtained. Other methods of protease enrichment taught in U.S. Pat. No. 3,930,954 include salting out with ammonium sulfate and precipitation with methanol, ethanol and acetone, each resulting in a crude preparation. Subsequently, further purification steps were applied, ultimately leading to a purified preparation. By way of ultracentrifugation analysis a molecular weight of 35,900 Daltons (Da) was determined, and a number of other biochemical and biophysical parameters were examined. However, no unequivocal data were supplied clarifying whether the disclosed preparation contained a homogeneously purified single protease or a mixture of different proteins.
Stenn, K. S., et al., J. Invest. Dermatol. 93 (1989) 287-290 disclose an analysis of the substrate specificity of a neutral protease (=DISPASE®). In addition, a further biochemical characterization of the neutral protease is presented, using purified material derived from the culture filtrate of B. polymyxa, and making reference to U.S. Pat. No. 3,930,954. Notably, an SDS PAGE gel representing a sample of 600 μg of protein of a commercially available DISPASE® preparation is shown in the document. The Coomassie Blue-stained gel presents a thin major band migrating at 41 kDa, but also at least two faint bands migrating between 30 and 20 kDa, and a further faint band migrating between 20 and 14.4 kDa.
Using B. polymyxa strain 72 of Murao, S., et al. (Agric. Biol. Chem. 47 (1979) 941-947) the authors of Takekawa, S., et al., J. Bacteriology 173 (1991) 6820-6825 describe the cloning in E. coli of a genomic B. polymyxa DNA (SEQ ID NO:1) comprising a nucleotide sequence with an open reading frame apparently encoding the preproenzyme with 590 amino acids (SEQ ID NO:2; primary translation product, precursor molecule prior to secretion) of a neutral protease. Based on the amino acid composition the molecular weight of the conceptual mature (processed) secreted protein comprising 304 amino acids was calculated to be 32,477 Da. Neutral protease expressed in E. coli from a genomic B. polymyxa fragment and analyzed from the supernatant of disrupted transformed E. coli cells was found to migrate at about 35 kDa in SDS PAGE gels.
For comparison, Takekawa, S., et al. (supra) also purified B. polymyxa extracellular neutral protease from culture fluid. The N-terminal amino acid sequence of the purified neutral protease was determined. Notably, the first three amino acid residues in the B. polymyxa N-terminal sequence of Ala Thr Gly Thr Gly Lys Gly Val Leu Gly Asp Xaa Lys Ser Phe (SEQ ID NO:4) differ from the predicted amino acid sequence comprised in SEQ ID NO:2 at the positions 287-301 which were found to be Asn Glu Ala Thr Gly Lys Gly Val Leu Gly Asp Ser Lys Ser Phe (SEQ ID NO:8). The reason for this discrepancy remained unclear and was not elucidated further.
The authors of the present disclosure set out to produce a transformed microbial host strain recombinantly expressing neutral protease from Paenibacillus polymyxa. Unexpectedly it turned out that the sequences disclosed by Takekawa, S., et al. (supra) were not suited to construct a suitable expression strain. Even more surprising, DNA isolated from B. polymyxa ATCC 21993 encoded an amino acid sequence of a primary translation product for a neutral protease which not only comprised 592 amino acids but also showed alterations at several position in the encoded polypeptide, when compared with previously published sequences. A further surprising effect was that Bacillus amyloliquefaciens is a particularly suited host organism for recombinant production of the neutral protease originating from Paenibacillus polymyxa.