An apparatus for implementing block matching for motion estimation in video image processing. The apparatus receives the pixel data of an original image block and the pixel data of a compared image block selected from a number of compared image blocks during video image processing. The selected image blocks are compared to determine a movement vector. The apparatus has a multi-stage pipelined tree-architecture that includes four stages. The first computational stage produces corresponding pairs of difference data and sign data. A second compression stage in the process pipeline includes a compression array that receives all the difference data and sign data, which are added together to produce compressed summation data and compressed sign data. The third summation stage in the pipeline receives the compressed summation and sign data and produces a mean absolute error for the original and compared image block pixels. A last minimization stage receives the mean absolute error for each of the compared image blocks and determines a minimum mean absolute error from among them. The compression array includes of a number of full and half adders arranged in a multi-level configuration in which none of the adder operand inputs and the carry-in inputs is left un-connected.

1. Field of the Invention
The invention relates in general to a processing hardware configuration for manipulating video image data for compression. In particular, the invention relates to a processing hardware configuration for efficiently implementing a fast search motion estimation algorithm in a semiconductor device that has reduced physical dimensions and complexity.
2. Description of the Related Art
Video signal compression is an important technique for successful video signal processing in video equipment such as high definition television, video telephone, and video conference systems. Because video imaging systems process vast amounts of digital data, maintaining a data bit rate that is extremely low in the signal processing flow by utilizing a data compression technique becomes an important factor for smooth video signal processing. To achieve a low data bit rate in the video signal processing flow, in other words, to obtain a very high data compression ratio, good codec (coding-decoding) schemes and corresponding hardware systems are essential. Such codec systems typically implement schemes including motion compensation, digital cosine transform, and quantization of the weight of visual characteristics, as well as Huffman coding, and others.
Essentially, motion compensation is a scheme which greatly affects the data compression ratio achieved in video image compression coding systems. This technique is used to manipulate the video signal data compression based on the specific time domain statistical characteristics of the subject video image signals. Unlike situations where successive still images are processed, a video image is characterized by the fact that two successive video images frequentely have relatively few differences when corresponding constituent blocks in successive video image frames are compared. This is an advantageous characteristic of video images that allows implementation of a motion compensation scheme to achieve a high data compression ratio.
Motion estimation provides the basis for a motion compensation technique. Good motion estimation results are determined by the precision, speed, and efficiency achieved by the motion estimation scheme. Various algorithms are available for implementing motion estimation. Block matching is an algorithm that is one of the easiest to implement from a hardware perspective, because of its simple steps and rules for implementation. Commonly used block matching algorithms include, for example, full search algorithms (FSA), three-step search algorithms (TSSA), two-dimensional logarithmic search algorithms (TDLSA), cross search algorithms (CSA), orthogonal search algorithms (OSA), and hierarchical search algorithms (HSA), among others.
Algorithms, of which TSSA is representative, that implement a video image block matching operation in a sequence of multiple procedural steps, involve greatly reduced amount of computation, since not all blocks that may have been displayed are compared. However, these algorithms require that subsequent process steps be performed in a defined procedural step sequence. This is a processing requirement that is not suitable for parallel processing. As a result, relatively very high throughput, low latency, and programmability are factors which must be considered if implementation of this category of motion estimation algorithms is to be sucessful.
Tree-architecture is an ideal hardware configuration for implementing such a motion estimation algorithm. However, conventional tree architectural configurations require the use of a large number of process elements for substantial implementation. High latencies are thus produced in the process pipelines, constaining the processing clock rate. For the purpose of outlining the characteristics of the invention, an example of such a conventional tree-architecture using four channels is briefly examined below, with reference to the accompanying drawings.
Block matching algorithms employ a scheme for computing the mean absolute errors (MAE) in the compared video image blocks as the basis for the measurement of the level of image matching. Blocks with a minimum MAE are considered to be matched blocks. In practice, an MAE for a compared image block is determined by first summing all the absolute values of the characteristic value differences between all picture pixels in the original image block and picture pixels in the corresponding compared image block, and then dividing the summed absolute value by the total number of pixels in the processed image block. The characteristic value of the picture pixels to be differentiated among the compared image blocks is normally the intensity value of the displayed pixel. By definition, an original block of a video image is the one currently being processed, while its corresponding compared block is the same video image block after it undergoes image motion alterations. It is assumed that both the original block and the compared block consist of the same number of image pixels arranged in the same matrix. Thus, a hardware configuration for implementing such a block matching scheme involving the computation of the MAE must at least include circuitry elements capable of performing addition, subtraction, absolute value operations, and determination of the minimum in a series of values.
FIG. 1 schematically depicts a conventional four-channel tree-architecture for implementing the computation of an MAE in a block matching algorithm. It is assumed that both the original block and the compared block consist of four pixels. Each of the pixels in the original block and the compared block is represented numerically by display characteristic values, designated by the data values X1, X2, X3, and X4 and Y1, Y2, Y3, and Y4, respectively, fetched to the input end of the tree-architecture for processing, as shown in the drawing. Each of the pixel data values may be multi-bit data containing, for example, n bits. Thus, pixel data for the original and compared blocks may be expressed as: EQU X={x.sub.n-1, x.sub.n-2, . . . , x.sub.0 } and EQU Y={y.sub.n-1, y.sub.n-2, . . . , y.sub.0 }
wherein the x.sub.n-1 and y.sub.n-1 bits are the sign bits for the pixel data of the original and compared blocks, respectively, and the X and Y data may thus all be positive values.
The four-channel tree-architecture shown in FIG. 1 consists of a total of five computational stages that are functionally organized into four sections. It is assumed that each of the five computational stages requires one clock cycle to implement a computational result for provision to the successive stage in the process pipeline. In other words, the tree-architecture of FIG. I takes at least five clock cycles to complete the block matching operation, utilizing the sets of input pixel data X and Y.
The first functional section in the tree-architecture structure is the absolute difference section 100, which consists of four parallel computational members 105. Each of the four computational members 105 is required to determine the value .vertline.X-Y.vertline., or, specifically, to determine the absolute value of the difference between the X and Y pixel data values for each of the four pixels of the processed image block.
The second functional section subsequent to the absolute difference section 100 is the summation section 110, which includes two successive computational stages 112 and 114. Two parallel adder members 118 are arranged in the first computational stage 112, while one adder member 119 is in the second stage 114. Each of the adder members 118 in the stage 112 adds the outputs of two of the parallel computational members 105 in the first section 100. The outputs of the two adder members 118 in the computational stage 112 are then added together in the subsequent stage 114 by the adder member 119. Thus, the output of the summation section 110 is the summation of the four absolute values of the difference between the original and compared image blocks obtained in the absolute difference section 100.
The third functional section is an accumulation section 120 that consists of at least a single accumulating adder member 125. This is an independent adder member that adds the output of the up-stream functional section 110 to the value it already holds. When the video image blocks to be processed consist of a pixel matrix having more than four pixels, this accumulation section 120 can be controlled under proper resetting and output enabling schemes to process four pixels at a time. However, the depicted conventional tree-architecture, which can easily process four pixels in a pipeline, would require more clock cycles when the processed image blocks are larger than one multiple of four pixels.
Finally, in the last functional section, a minimum determining member 135 constitutes the minimum determining section 130, which determines the minimum value from among the outputs of the accumulation section 120. Essentially, each of the outputs received from the accumulating adder member 125 is compared to the current minimum value memory content of the minimum determining member 135, and the smaller value is stored as the minimum value in the memory.
Thus, after all the pixels in the processed image block have been processed by the tree-architecture circuitry of FIG. 1, a motion vector 140 may be obtained as the output of the architecture, which is representative of a measure of the relative image movement between the original and compared blocks of the video image.
FIG. 2 shows a schematic diagram of the computational member 105 for the absolute difference section 100 of the tree-architecture of FIG. 1. As shown in the drawing, the computational member receives video block image pixel data inputs X and Y from the original and compared blocks, respectively, for generation of the absolute value difference .vertline.X-Y.vertline. by the depicted circuitry. Assuming the notation Z=X-Y, .vertline.Z.vertline.=.vertline.X-Y.vertline. is therefore determined.
The Y data is provided to the input of an exclusive-OR (XOR) gate 210, the other input of which is tied to a constant logical "1". This is equivalent to obtaining the one's complement 215 of the Y data which is provided to an adder 220 for addition with the X data. Thus, the adder 220 turns out the value X-Y at its S output, while the carry-out bit 224 at the CO output of the adder 220 signifies the sign bit of this effective subtraction performed by the adder. Notice that while the data X and the one's complement of the data Y are added together by the adder 220 to obtain the X-Y value, a carry-in bit (CI) having a constant logical value of "1" is also added into this summation operation, in order to perform subtraction by addition of the two's complement of the data Y.
The summation result of the adder 220, i.e., the X-Y value generally identified by the reference numeral 225, is exclusive-OR-ed by the XOR gate 230, utilizing the inverted version 226 of the carry-out bit 224 of the adder 220 as the conditioning bit. An inverter 222 is used to provide this inverted version of the carry-out bit 224. This allows the one's complement of the value X-Y to be provided to an input of another adder 240 if the inverted carry-out bit 226 of the adder 220 is a logical high. On the other hand, if the inverted carry-out bit 226 is a logical low, the output result of the adder 220 can be directly provided to the B input of the adder 240. The other, A, input of the adder 240 is tied to a constant logical "0". The carry-in input CI of the adder 240 is also driven by the inverted version of the carry-out output of the adder 220.
Such a double-adder arrangement as depicted in FIG. 2 provides the absolute value of the difference between the input X and Y data, which is held in the register 250 for further processing. However, this circuitry has at least the following obvious disadvantages for practical application in the block matching scheme used in video image processing.
First of all, since the absolute difference section 110 requires two cascaded stages of adders to obtain the absolute value result, time latency in the processing pipeline of the tree-architecture for computing the block matching MAE becomes tight. This directly translates into a constraint on the clock frequency that can be applied to the circuit utilizing this architecture.
Secondly, the total number of adders required in constructing the tree-architecture for implementing the computation of a block matching MAE is large and increases greatly with the number of pixels. The number of required process elements increases accordingly. This adds to the overall complexity of semiconductor fabrication.
Thirdly, as the channel number in the architecture is increased to simultaneously process more pixel data, the total number of processing stages in the process pipeline is also increased by one stage. This further increases the time latency in the tree-architecture.
Further evaluation of the second adder 240 of the computational member 105 shown in FIG. 2 for the absolute difference section 100 in FIG. 1 reveals that the adder 240 is used merely to add the logic value at the B input to a constant nil "0" at the A input. As a matter of fact, only the sign bit 226 is added to the carry-in input CI of adder 240. On the other hand, careful examination of the block diagram of FIG. 1 shows that each of the adder members 118 in the summation section 110 of the tree-architecture of FIG. 1 utilized to sum the outputs of two corresponding computational members 105 does not use its carry-in inputs. The second stage adder member 119, which adds the two adder member 118 outputs together, also has a carry-in input that is left unused.
A tree-architecture based on the concept of making use of these idle adder inputs in the process pipeline, known as the hierarchical search algorithm (HSA), as mentioned above, has been developed by the present inventors and is illustrated in the block diagram shown in FIG. 3. Such an architecture is disclosed in U.S. patent application Ser. No. 08/666,987, filed Jun. 19, 1996, which disclosure is incorporated herein by reference. Similar to the architecture of FIG. 1, this is another four-channel tree-architecture design having a total of five processing stages, also similarly categorized into four functional sections. This HSA block image processing circuitry is capable of an improved, smooth pipeline operation. After the initial five clock cycles, a resultant motion vector 140 is generated once every clock cycle.
As shown in the block diagram of FIG. 3, the first functional section, the absolute difference section 300, consists of four parallel computational members 305. An example of an implementation of the computational member 305 is illustrated in the schematic diagram of FIG. 4. Based on the concept of HSA architecture, the computational member 305 can be considered to be a simplification of the member 105 of FIG. 2. This simplification is possible, as mentioned above, by making use of the idle adder inputs in the process pipeline. When compared with the computational member 105 of FIG. 2, it is noted that the member 305 of FIG. 4 includes only one adder, rather than two.
Notice that for the purpose of smooth pipeline operation, registers are assigned to each output of each computational member 305, adder member 318 and 319, and to the accumulating adder member 325. These registers are used to hold the intermediate data and pass the data to the corresponding subsequent stage of elements synchronously, so that smooth pipeline operation can be achieved.
In the second functional section, subsequent to the absolute difference section 300, namely, the summation section 310, two successive computational stages 312 and 314 are included. As in the case of the conventional four-channel tree-architecture shown in FIG. 1, two parallel adder members 318 are arranged in the first computational stage 312, and one adder member 319 is included in the second stage 314. Each of the adder members 318 in the first computational stage 312 adds the outputs of two of the parallel computational members 305 from the first section 300. The outputs of the two adder members 318 in the first occupational stage 312 are then added together in the subsequent stage 314 by the adder member 319. Basically, this is a configurational arrangement equivalent to that of FIG. 1, except that the carry-in inputs of the adder members 318 and 319 are utilized for the summing manipulation required in the process for obtaining the MAE.
Next, the third functional section following the second is an accumulation section 320 that consists of at least a single accumulating adder member 325. This independent adder member 325 adds the output from the summation section 310 to the value it already holds. When the video image blocks to be processed consists of a pixel matrix of more than four pixels, the accumulation section 320 can be used to process four pixels at a time.
In the last functional section, a minimum determining member 335 constitutes the minimum determining section 330. This determines the minimum value from among the outputs of the accumulation section 320. Each successive output of the accumulating adder member 325 received is compared to the current minimum value memory content of the minimum determining member 335, and the smaller value is stored as the minimum in the memory.
In the HSA architecture of FIG. 3, the computational member 305 used in the absolute difference section 300 can be one that is electronically simple compared to its counterpart in the architecture of FIG. 1. As mentioned above, only one, rather than two, adder is require to construct a computational member 305. Approximately one-third of the hardware process elements of the design of FIG. 1 can be eliminated using the HSA design.
However, if the channel number is doubled, such HSA architecture still requires a tremendous increase in the total number of process stages in the pipeline. When the total channel number in the tree-architecture design is increased to a certain point due to practical applications in video image processing, the resulting time latency is increased to a level which greatly reduces the HSA pipeline processing efficiency.

Apparatus for implementing a block matching algorithm for motion estimation in video image processing


The invention relates to a process of forming a semiconductor structure. The process includes patterning a conductive layer with a top surface and opposing sides over an area of a semiconductor substrate, depositing a dielectric layer over the conductive layer, and etching the dielectric layer to form spacer portions adjacent the sides of the conductive layer and to expose the top surface and a portion of the conductive layer. The process may be used to form salicides wherein the thickness of the silicide layer of the conductive layer is greater than the thickness of the silicide layer in the diffusion region of a device. The invention also relates to a semiconductor device that includes a conductive layer with opposing side portions over an active area of a semiconductor substrate and a dielectric spacer adjacent to less than the entire portion of a side portion of the conductive layer. The semiconductor device may be used with a salicide process to yield a silicide layer over the conductive layer that is thicker than the silicide layer in the diffusion regions.

1. Field of the Invention
The invention relates to the fabrication of semiconductor devices, including integrated circuits, and more particularly, to a silicide structure and a process for forming silicides.
2. Description of Related Art
As integrated circuit geometries shrink, the forming of discreet devices on a semiconductor substrate becomes more specialized. Specialized deposition and etching techniques permit the density of semiconductor elements on a chip to greatly increase by minimizing the feature size of individual devices. The increased density translates into larger memory, faster operating speeds, and reduced production costs.
A typical metal oxide semiconductor (MOS) transistor generally includes source/drain diffusion regions in a substrate, and a gate electrode formed above the substrate between the diffusion regions and separated from the substrate by a relatively thin dielectric layer or gate oxide. Contact structures can be inserted to the diffusion regions and interlays can overly the contact structures and connect neighboring contact structures. These contact structures to the diffusion region are isolated from the adjacent gate by dielectric spacer or shoulder portions along the side portions of the gate. The dielectric spacer or shoulder portions also isolate the gate from the diffusion region.
FIG. 1 illustrates a planar side portion of a MOS integrated circuit. In FIG. 1, isolation areas or field oxides 160 separate active areas of semiconductor substrate 100. The active area includes a p- or n-type semiconductor substrate 100 underlying a gate 110 consisting of a polycrystalline silicon (polysilicon) line 130 overlying a gate oxide 120. Embedded in the substrate 100 are diffusion regions 150 (i.e., source/drain regions), that are heavily doped with the opposite dopant type of the substrate.
As the feature size of integrated circuits shrink to 0.5 .mu.m or less, the necessity of decreasing the resistance and capacitance associated with interconnection paths becomes more important. The higher the value of the interconnect resistance (R)x capacitance (C) product, the more likely it is the circuit operating speed will be limited by the RC delay. Thus, low resistivity interconnection paths are critical in order to fabricate dense, high performance devices. This is particularly true for MOS devices, in which the RC delay due to the interconnect paths can exceed the delays due to gate switching. Thus, efforts have been made to reduce the resistivity of the interconnect to less than the 15-300 ohm/sq typically exhibited by polysilicon.
The most common approach to reduce the resistivity of the interconnect to less than that exhibited by polysilicon alone is to form a multilayer structure, consisting of a low resistance material, e.g., a refractory metal silicide, on top of a doped polysilicon layer. Such a structure is termed a polycide. The advantages of the polycide gate/interconnect structure to replace polysilicon is that the known work function of polysilicon and the highly reliable polysilicon/SiO.sub.2 interface are preserved as polysilicon is still directly on top of the gate oxide.
As the dimensions of a device shrink, the contact resistance of the shallower junctions or diffusion regions also increases. To reduce these resistance values, while simultaneously reducing the interconnect resistance of the polysilicon lines, self-aligned or "silicide" technology is used. Salicide technology involves depositing metal over a MOS structure and reacting exposed silicon areas of the diffusion region as well as exposed polysilicon areas on the gate to form silicides.
A salicide structure is shown in FIGS. 1 and 2. FIG. 1 illustrates a planar side view of a portion of an integrated circuit. FIG. 2 illustrates a planar top view of a portion of the integrated circuit structure of FIG. 1. FIGS. 1 and 2 show active regions containing a silicided gate 110 and silicided diffusion regions 150. The gates 110 are separated from the diffusion regions by spacer portions 140.
The sidewall spacers 140 along the gate are used to prevent the gate 110 and diffusion regions 150 from being electrically connected by avoiding silicide formation on the spacer 140. The sidewall spacers 140 separate the diffusion regions 150 from the gate 110 by only about 500-3,000 .ANG.. Thus, any lateral formation of silicide can easily bridge this separation and cause the gate 110 to be shorted to the diffusion region 150.
The thickness of the silicide layer 135 in the gate 110 and the diffusion region 150 is approximately the same. This is because the thickness of the silicide layer 135 depends on the amount of as-deposited metal that reacts with exposed silicon. The general rule for improved sheet resistance is that the maximum thickness of the silicide layer is equal to one half of the junction depth of the diffusion region 150. Thus, for a diffusion junction 150 with a depth of 1,000 .ANG., the silicide depth in both the junction 150 and the gate 110 is approximately 500 .ANG.. As the devices become smaller, the line widths become narrower and the junctions become shallower. The shallower junctions limit the thickness of the silicide layer. However, the thickness of the silicide layer is inversely proportional to the sheet resistance. Thus, a thinner silicide layer means more resistance and a longer RC delay (i.e., a slower device).

Silicide for achieving low sheet resistance on poly-Si and low Si consumption in source/drain


An actual operating time indicator includes: a lifting motor for lifting a load up/down; a power detection unit for detecting an input power based on a current and a voltage supplied to the motor, and converting the input power into a first voltage proportional to the input power; a voltage-to-periodic pulse conversion unit connected to the power detection unit for receiving the first voltage and converting the first voltage into the periodic pulse proportional to the first voltage; a counter unit connected to the voltage-to-periodic pulse conversion unit for counting and integrating the periodic pulse to obtain an integrated power; and a display operatively connected to the counter unit for indicating the integrated power as an actual operating time of the motor.

1. Field of the Invention
The present invention relates to an actual operating time indicator, more particularly, it relates to an actual operating time indicator for indicating an actual operating time of a hoist apparatus on a digital display. The present invention is advantageously used for an electric hoist apparatus which lifts a load up/down by using a motor, for example, a three-phase induction motor.
2. Description of the Related Art
A hoist apparatus for lifting a load up/down is widely used in various fields, for example, in a factory, a warehouse, construction and the like. There are mainly three types of hoist apparatus from a viewpoint of a motive power source, i.e., a compressed air type, an electric type, and a manual type. Although these types have individual advantages, the electric type is the most popular because this type has various merits from a viewpoint of cost/performance. The present invention relates to the electric hoist apparatus.
In general, an electric hoist apparatus has two motors, i.e., one is a lifting motor for lifting a load up/down, and the other is a travelling motor for moving the hoist apparatus in a traverse direction on a beam. The lifting motor is usually formed by a three-phase induction motor because of a simple/firm structure, relatively low cost and high power.
The lifting motor is defined by at least a rating load indicating a weight of a load in normal use, output power at the rating load, rating time for indicating a range of continuous use time, and a test load for indicating a maximum load.
In the above mentioned various fields, the hoist apparatus may be temporarily used in an overload state or over-time state. Accordingly, it is necessary to obtain precise data which can be utilized for maintenance of the apparatus after use for a certain time period. For example, it is necessary to precisely measure a relationship between a load and an operating time from a start point of use.
There are two main methods for indicating the actual operating time in a conventional art. That is, the actual operating time of the hoist apparatus is displayed by either an integrating wattmeter or a counter. However, the former merely indicates a so-called "total power-on time" for a certain period of time, and the latter merely indicates a number of times the hoist apparatus is operated.
Accordingly, in the above conventional art, the influence of a load during actual use of the hoist apparatus is not considered, for example, in an overload state or over-time state, so that it is impossible to precisely measure the actual operating time while taking the load into consideration.
Further, although the life span of a mechanism varies depending on the load during use, in the conventional art, the relationship between the life span of the mechanism and the load when measuring the actual operating time of the hoist apparatus is not considered. Accordingly, in the conventional art, the data are insufficient for maintenance so that it is impossible to efficiently maintain the hoist apparatus.


An online payment method is disclosed which permits users to make realtime debit card payments over the Internet. The payor and payee pre-register with the system by sending their PAN, encrypted PIN and encryption key to the system database using a debit card reader, and then enter user names and secret IDs to be associated with the PAN and PIN numbers. When an online transaction is made the payor enters its user name and ID which is sent to the system along with the transaction amount and the payee user name. The system sends out a standard POS transaction using the stored PAN, encrypted PIN and encryption key. If approved it sends out a credit POS transaction to the payee in the same way.

In the existing Point of Sale (POS) PIN debit card system, the merchant swipes the customer's debit card, which captures the customer's card number (Primary Account Number (PAN)) and enters the amount of the transaction. The customer enters a secret Personal Identification Number (PIN) on a PIN pad, which encrypts the number and sends it with the PAN, the encryption key and the transaction amount to the bank for approval. Typically a different encryption key is used for each transaction. The bank decrypts the PIN, checks the PAN against the PIN and debits the customer's account by the amount of the transaction if the funds are available and sends a message back to the merchant approving or denying the transaction.
A second type of debit card is the signature debit card which is swiped at the merchant location and signed by the purchaser but no PIN number is entered. The system puts the transaction through the credit card system, but the amount of the transaction gets debited a few days later to the user's bank account and not the credit card account. The merchant pays the same commission as for a credit card transaction.
Currently on-line transactions are done by credit card but not PIN debit cards since the POS debit card equipment is not applicable for on-line merchants. However using credit cards for on-line sales causes the on-line merchant to incur the costs of the credit card commissions.
Various systems have been developed to facilitate on-line payments, such as electronic purses or wallets, but none of these have achieved wide acceptance due to a number of factors, including cumbersome procedures, unreasonable costs and unfair assignment of risk. Generally they involve setting up a trusted third party account. For example, United States patent application publication No. US 2002/0016749 discloses a system in which a user registers for an electronic cheque book service, acting as trusted third party in on-line transactions with merchants. The service maintains databases of IDs and passwords for both merchants and customers. United States patent application publication No. US 2003/0200184 A1, discloses a mobile account authentication service in which the customer enrolls with a trusted service which records PIN, PAN and other relevant data including passwords. The trusted service authenticates the customer's identity when he deals with on-line merchants in order to transact purchases.
United States patent application publication No. US 2001/0039535 discloses a method for a shopper to provide confidential payment information such as bank debit card numbers, PIN numbers, expiration dates, and similar data to a trusted third party ("TTP"). When the shopper conducts a transaction on an internet website, the TTP facilitates payment to the merchant without the user having access to the shopper's confidential information.
None of the existing systems provide a method whereby users can make PIN debit card transactions for online payments over the Internet as they would make credit card payments. In the following description, "debit card" will refer to PIN debit cards.
The foregoing examples of the related art and limitations related thereto are intended to be illustrative and not exclusive. Other limitations of the related art will become apparent to those of skill in the art upon a reading of the specification and a study of the drawings.

Method and system for real time online debit transactions


A device for supporting cut flowers. The device is in the form of a hollow tube with a longitudinal opening formed therein. The edges of the tube at the opening carry flanges, disposed at an angle with respect to one another of at least 30.degree. and flaring outwardly from the tube. The interior surface of the tube has longitudinal ridges, preferably three ridges, that engage the flower stem and add stiffening to the tube for better support. The ridges also define channels between the stem and the interior surface of the tube for air to circulate and the stem to breathe. The device is fitted to the stem of a cut flower, just below the base of the flower head, to prevent drooping and wilting. It can be installed on a variety of cut flowers without damaging the stem.

1. Field of the Invention
The present invention relates generally to floriculture. In particular, the present invention relates to a device and method for supporting the stems and heads of cut flowers.
2. Discussion of Background
The flower industry is a multi-billion dollar industry worldwide. In the U.S. alone, sales of cut roses exceed $300 million dollars per year. The most popular varieties of rose, including specialty roses such as the MADAME DELBARD, often retail for several dollars per rose. Sales of other cut flowers are also substantial.
Flowers start to wilt just a few hours after cutting unless they are supplied with water and nutrients. In retail florist shops, cut flowers are often stored under high humidity and carefully controlled temperatures to help preserve the blooms, extending their useful lives from one to two weeks. After purchase, however, the life span of cut flowers may be as little as a few days.
Many techniques are available for extending the useful life of cut flowers, including changing their water regularly, adding preservatives to the water, trimming the stems, keeping the flowers away from direct sunlight, and refrigerating them overnight. Even when such precautions are taken, cut flowers start to wilt after a few days.
The first indication of wilting is when the stem starts to bend just below the flower head. As the stem bends, the flower head droops and the flow of water up the stem is impeded. Soon afterwards, the flower petals start to discolor and the flower dies. Retail florists often use steel floral wire to support the fresh flower stem, thereby preventing drooping and facilitating continued water flow up the stem. This technique is often used to extend the useful life of arrangements of flowers such as roses and carnations.
When a cut flower is wired, one end of the wire is inserted into the flower hip and the wire is wrapped around the stem. In the process of applying the wire the flower hip is punctured and some of the foliage is damaged. The metal wire may interact with the plant fluids, creating acidic byproducts which shorten the life of the cut flower. In addition, the wire does not provide full support to the flower head. Floral wire is normally sold in fixed lengths, so that for short stems the wire must be cut and a portion discarded. Wiring is time-consuming and requires a considerable degree of skill. Even an experienced florist discards some flowers that are visibly damaged in the process of wiring.
In the case of a rose, the stem is stripped of thorns before the wire is applied. In addition to being time consuming, stripping frequently damages the outer skin of the stem. This results in reduced water intake and premature wilting, off-setting to some extent the beneficial effect of supporting the flower head to prevent drooping. A damaged stem also diminishes the natural beauty of the rose.
A number of devices are available for supporting cut flowers. For example, a spacing disc for a conical paper flower container has a plurality of spaced tear-shaped openings for holding flower stems (Bachman, et al., U.S. Pat. No. 3,767,104). Flowers can be fixed to a continuous strip, which is then rolled in such a fashion that the flowers are isolated from one another to facilitate storage and transport (Benoist, U.S. Pat. No. 3,657,840). Holders for cut flowers include a flexible paper cover for protecting the petals (Wallerstein, et al., U.S. Pat. No. 3,271,922), a cardboard sleeve for receiving the stems (Endres, U.S. Pat. No. 2,247,191), and a waterproof wrapper for corsage stems (Schloss, U.S. Pat. No. 1,044,260). None of these devices provides support for individual stems and flower heads.
A stem and head support for cut flowers is described by Court in U.S. Pat. No. 5,060,417. The device includes a tubular structure for gripping the stem and including an enlarged portion for holding the flower head. The Court device is produced by injection molding. An individual consumer might purchase several such devices for a flower arrangement, planning to salvage the devices and save them for re-use in another arrangements. When used by a retail florist on a one-time basis, the device can easily add 10%-20% to the price of a single rose, a significant increase to many customers. Furthermore, the edges of the opening of the device can damage a flower stem as it is inserted.
There is a need for a simple, easy-to-use support for cut flowers. The support should not damage the stem or flower head when installed. It should hold the stem firmly, allow air and water to contact the stem, and be simple and inexpensive to manufacture.


A display apparatus including a display; a holographic projector a fingerprint scanner to read a fingerprint from a user's finger spaced from the fingerprint scanner when placed in proximity to the holographic object; a camera to image the holographic object and the user's finger; a non-transitory storage medium that stores instructions; and a processor that executes the instructions including: responsive to the receipt of images from the camera, perform image analysis to identify a position of the user's finger with respect to the display surface and the holographic object, identify a position of the holographic object with respect to the display surface and identify the proximity of the user's finger with the holographic object; and responsive to the image analysis to identify the proximity of the user's finger with the holographic object, provide an input to the fingerprint scanner to read the fingerprint of the user's finger.

The present exemplary embodiments pertain to holographic displays in which the displayed object is a three dimensional holographic image and, more particularly, to authentication of a user so as to permit interaction of the user with the three dimensional holographic image.
Next generation computer systems may use holographic objects for various user interactions. The user may have the feeling of interacting with digital objects while performing any activity with the physical objects.

Fingerprint authentication during holographic object display

INTERNATIONAL BUSINESS MACHINES CORPORATION


An open bit line memory device and operational method are provided having performance characteristics commensurate with those of folded bit line architecture. The memory device includes a plurality of memory cells in open bit line configuration, at least some of which are interconnected by a bit line. A sense amplifier unit is coupled to the bit line for sensing a developing signal thereon during a predefined bit line signal development interval. The amplifier sets to one of two logical states during a subsequent setting interval. An electrical isolator is employed to decouple the bit line from the sense amplifier during the setting interval so that signal variations on the bit line do not effect the amplifier. Each bit line also has an associated reference voltage line, and the electrical isolator isolates both the bit line and the associated reference voltage line from the sense amplifier during amplifier's setting period.

1. Technical Field
This invention relates in general to semiconductor memory devices and to their operation, and more particularly, to dynamic random access memory (DRAM) devices configured with a novel open bit line architecture and to an operational method thereof.
2. Background Art
Architecture of semiconductor memories is roughly divided into two types, namely, open bit line architecture and folded bit line architecture. Both architecture types are well known in the art and detailed information on each type, along with numerous variations thereon, is readily available in the open literature. (The present invention comprises a novel variation on a conventional open bit line architecture.)
In comparison with folded bit line architecture, open bit line architecture is more suitable for very close packing of memory cell arrays. Notwithstanding this, product chips using conventional open bit line cell arrays are rarely implemented, primarily because common mode noise reduction inherent in folded bit line architecture is lacking in open bit line architecture, at least without significant additional process complexity, signal loss and/or performance degradation. In view of the continuing advancement in the art towards greater and greater circuit integration, the open bit line configuration is drawing significant attention throughout the memory industry, especially in relation to 16 Mbit, 64 Mbit, and beyond, memories. This is because an open bit line architecture provides a memory cell at every X,Y cross-point location of the array, which is not possible with folded bit line architecture.
Folded bit line architecture (commonly used in DRAMs of, for example, 256 Kbits or 1 Mbits) is inherently limited by the degree of integration obtainable within a defined area. Since a folded memory array cannot accommodate disposition of a memory cell at each bit line, word line intersection (i.e., cross-point), the configuration is by necessity less dense than an open bit line memory structure. By way of example, folded bit line architecture typically requires twenty-five percent, or more, area than open bit line architecture to implement the same size memory array. Thus, in terms of density of structure, an open bit line configuration clearly has the advantage. However, common mode noise difficulties inherent in conventional open bit line architectures have limited its commercial manufacture.
In addition to inherent common mode noise imbalance, another difficulty experienced with conventional open bit line architectures is the problem of dealing with the reference bit line. The reference bit line, which in a folded architecture supplies common-mode noise rejection, is for open bit line architecture either a parasitic capacitance liability or a source of additional noise.
Thus, a genuine need exists in the semiconductor memory art for a more stable, less complex memory device which has the performance characteristics of a conventional folded bit line memory device, but yet has the cell density of open bit line architecture.

Open bit line memory devices and operational method

International Business Machines Corporation


A fluid pump for pumping fluid. The fluid pump includes a driver having a substantially tubular shaped body defining a body axis and, a number of elements circumferentially spaced around the body. Each element is responsive to a signal to so as cause a corresponding portion of the body to expand or contract in a direction substantially parallel to the tube axis. The pump also includes an urging member positioned in a flow path. In use, the urging member is coupled to the driver such that selective expansion and/or contraction of the body causes the urging member to rotate, thereby urging fluid along the flow path.

1. Field of the Invention
The invention relates to a pump for pumping fluid, and in particular, to a piezoelectric axial pump suitable for use as a heart pump, or the like.
2. Description of the Related Art
The reference to any prior art in this specification is not, and should not be taken as, an acknowledgement or any form of suggestion that the prior art forms part of the common general knowledge.
Currently, tens of thousands of patients suffer from heart failure worldwide. For example, a patient in the U.S. has suffered with heart failure for most of her adult life. Diagnosed at age 25, doctors attribute her heart failure to a hereditary condition. Her father shared the same disease and died at age 32 more than 20 years ago. Development of a heart assist device that can be implanted into the body and help the heart to pump the blood is necessary in aiding patients with such conditions.
Conventionally heart pumps are implemented in the form of electromagnetic pumps. However, pumps of this form suffer from a number of problems, such as the fact that the apparatus is relatively heavy in weight, has a large size and can be affected by external magnetic fields. Furthermore, the operation of the pump can lead to the generation of vortices in the blood.
It is therefore necessary to develop a heart pump that can assist the heart to pump the blood to the whole body at heart failure. In particular, it is desirable that the pump is small, light-weight, has a low power consumption, does not generate vortices in the pumped blood and is minimally affected by the external factors, such as magnetic fields.
An example of a piezoelectric rotator is shown in U.S. Pat. No. 6,388,364. In this example, the rotator uses piezoelectric members that operate to expand and contract in a predetermine manner to cause rotation of a ring. However, the performance of such configurations is limited. In particular, the piezoelectric members extend across the ring, thereby restricting the usefulness of this form of motor in fluid pumping applications. Furthermore, rotators of this form tend to generate rotational torques, and are therefore generally unsuitable for fluid pumping applications.

Fluid pump with a tubular driver body capable of selective axial expansion and contraction


A golf system with wireless communication functions is applied to a handheld electric apparatus. The golf system includes at least a golf club apparatus and a golf bag apparatus. The golf club apparatus includes a golf club and a short distance communication identification tag. The short distance communication identification tag is attached to the golf club. The golf bag apparatus includes a golf bag and a wireless communication identification reader. The wireless communication identification reader is attached to the golf bag. The wireless communication identification reader is configured to identify the short distance communication identification tag wirelessly, and then inform the handheld electric apparatus wirelessly.

1. Field of the Invention
The present invention relates to a golf system, and especially relates to a golf system with wireless communication functions.
2. Description of the Related Art
Bluetooth uses a radio technology called frequency-hopping spread spectrum. Bluetooth provides a secure way to connect wireless transmission devices and exchange information therebetween. Radio frequency identification (RFID) is a technology for retrieving data from radio frequency identification tags. Radio frequency identification tags can be read on a short distance from a radio frequency identification reader. Near field communication (NFC) is a high frequency wireless communication method applied in wireless transmission devices that are spaced from each other within about a distance of 10 cm. The near field communication technology is an extension of the radio frequency identification technology.
Bluetooth, RFID, and NFC are common wireless communication technologies. However, it is a pity that Bluetooth, RFID, and NFC is not applied to a conventional golf club or golf bag for identification.

Golf system with wireless communication functions


A balancing device (11) has a first balance pulley (20) provided in a hoisting drum (3) and a second balance pulley (40) connected to a coil spring (31). These pulleys are connected through a tension wire (50). The first balance pulley has a main pulley portion (25) for taking-up the tension wire at the beginning of a feed-out process from a fully opened position, and a zero-point return pulley portion (26) for taking-up the tension wire from halfway. The zero-point return pulley portion has an outer circumferential shape in which the tension wire passes the pulley axial center at a fully shut position. The second balance pulley (40) has a cylindrical portion (46) for feeding-out the tension wire at the beginning of the feed-out process from the fully opened position, and a conical portion (47) for feeding-out the tension wire from halfway. The conical portion has a shape in which its diameter is smaller on the cylindrical portion side. There is provided an operation rope unit (11) having an operation rope (70) for operating the hoisting drum to rotate on the indoor side. Further, by decentering the rotation center of a large pulley (220), a mountain-shaped characteristic is given to balance torque every rotation.

A balanced steel shutter having a hoisting drum provided with a balancing device with a built-in coil spring has come into wide use as a shutter, particularly as a light-weight shutter, for opening/shutting an entrance, a window, etc. of a building. A balancing device (spread type balancing device) used in such a shutter is configured such that spring torque is accumulated corresponding to the quantity of rotations of a hoisting drum by twisting a coil spring included in the hoisting drum when a slat curtain is fed-out from the hoisting drum to thereby balance this spring torque with weight torque (hoisting drum torque) of the slat curtain fed-out as balance torque of the hoisting drum so as to reduce an operation force required for opening the shutter. Consequently, even a shutter with a considerably large opening can be operated manually.
JP-A-5-163880 discloses a technique in which spring torque of a balancing device is corrected so that the balance torque transmitted to a hoisting drum when the shutter is shut fully is made to be substantially zero. This balancing device is mainly used for a shutter with an air-slit type aluminum roll-formed slat (an air-slit type shutter). The balancing device has a balance pulley rotating synchronously with the hoisting drum, a tension wire one end of which is attached to the balance pulley, and a spring means for giving a spring force to this tension wire. The balance pulley has a main pulley portion for taking-up the tension wire when the slat curtain is shut, and a zero-point return pulley portion provided in one end of this main pulley portion continued to the main pulley portion to take up the tension wire. This zero-point return pulley portion has an outer circumferential shape by which the tension wire passes the axial center of the main pulley portion when the slat curtain is taken out to the position where the slat curtain is fully shut. Because of an outer circumferential shape of the zero-point return pulley portion, the line of action of the tension wire passes the axial center of the main pulley portion when the tension wire is wound around the zero-point return pulley portion. Therefore, though spring torque of the spring means acts on the tension wire, the force is not transmitted to the hoisting drum as torque, so that balance torque is not generated. Consequently, only the own weight of the slat curtain acts when the slat curtain is in its fully shut position with such an advantage that it is possible to shut the air slit in the fully shut position.

Balanced shutter and balancing device thereof


The present disclosure describes novel peptides, including peptides that inhibit the proteolytic activity of insulin-de-grading enzyme (IDE). Also described are cosmetic and pharmaceutical formulations including these peptides, as well as a treatment method aimed at improving the appearance and/or texture of skin and/or promoting wound healing and a method for treating diabetes. The disclosed peptides and formulations are particularly useful for addressing the problem of impaired wound healing in diabetes.

Twenty percent of the elderly population, particularly diabetics, have slow-healing or chronic wounds. Current solutions include antibiotic ointments, hyperbaric medicine, and surgeries. Current solutions do not promote the key processes underlying wound healing (e.g., collagen synthesis, keratinocyte mitogenesis and migration, etc.), which are known to be stimulated by peptide hormones such as insulin, insulin-like growth factors (IGFs) and transforming growth factors (TGFs).
In the U.S. alone, over $20 billion per year is spent on skin care products aimed at combatting the effects of aging (e.g., wrinkled skin). Numerous skin care products exist that rely on a variety of methods (hydration, delivery of essential oils and fats, promotion of exfoliation, etc.). Current solutions do not address key processes that maintain healthy skin (healthy levels of collagen synthesis and subcutaneous fat), which are mediated by insulin, IGFs and TGFs and other peptide hormones.
An estimated 384 million people suffer from diabetes mellitus worldwide, at a global economic cost of $619 billion/year. Diabetes also at least doubles the risk of death, causing up to 4.9 million deaths per year. Current solutions include insulin injection and a variety of oral medicaments, including secretagogues and PPAR-gamma activators. Current solutions, however, suffer from key limitations. Not all patients tolerate or comply with all available treatments and some of these drugs have undesirable side-effects including hypoglycemia, diarrhea, and in some instances liver damage.

Peptide inhibitors of insulin-degrading enzyme

The Regents of the University of California


A simulation method allowing an experimenter to model a real-world situation in order to learn something about it. The method permits interaction of concurrent experiments through interaction between different variables during a single simulation run on a computer having at least one central processing unit.

A simulation method is one that attempts to model a real-world situation in order to learn something about it. Each object and action in the real situation has its counterpart in the computer method. If the simulation is accurate, that is, if the computer method successfully mirrors the real world, then the result of the computer method should mirror the result of the actions being simulated. Thus it is possible to understand what occurs in the real-world situation without actually observing its occurrence.
Based on the power of the computer and on the ability to build adequate models of reality, the simulation of experiments has become an increasingly effective and often a superior substitute for physical experimentation. For example, the building and testing of engineering prototypes is an experimentation effort that is done more and more in terms of models and simulations rather than by conventional means, i.e. the actual building on scaled-down models.
Concurrent Simulation (CS) is the simultaneous, side-by-side simulation of related experiments using one computer run. CS is a method that runs on conventional computers, performing concurrent experiments without concurrent hardware. That is to say, that CS uses a computer containing at least one central processing unit (CPU) rather than multiple CPU's. It applies and is limited to systems simulated with discrete events. Typically 10 to 1,000 times faster than serial (one-at-a-time) simulation of single experiments, its speed is largely based on the number of and similarities between experiments. CS dates from about 1970 and was first developed for fault simulation of gate-level digital networks. Over the years it has increased in generality and, more recently, evolved into a simulation methodology. Whenever discrete event simulation is the method chosen to solve a particular problem, CS is usually better than serial simulation. CS has several advantages over serial simulation.
First, all experiments advance synchronously through the dimension of time, and CS is therefore analogous to a race in which the experiments are competitors. This constitutes a race methodology and a comparative style of simulation. This methodology and the speed of CS permit the solution of problems more difficult and larger than with serial simulation. A simulation strategy based on this methodology and comparative style is to simulate and observe related experiments which are initially the same but later become different.
Second, observation, which is awkward and costly for serial simulation, is handled easily and elegantly with CS. The experiments are observed comparatively, and can be compared in exact detail as well statistically. Statistical "signatures" are maintained and periodically analyzed for all experiments.
Next, CS offers speed in various forms. Relative to serial simulation, experiments are compressed into a single run. The idle time between serial simulations is avoided and a simulation project is strategically accelerated. Also, due to the number of concurrent experiments, due to their similarity, and the similarity between them and a reference experiment, the CPU time, as mentioned previously, is typically 10 to 1,000 times less than the equivalent serial simulations. Further, based on the analysis of signatures, the initial reference experiment may often be replaced with a more central one which reduces the average differences between reference and concurrent experiments and gains additional speed.
Lastly, CS provides accuracy and generality. In fields such as biology and chemistry, for example, it is desirable to perform related and similar physical experiments in parallel, but it is normally too costly due to labor, space, equipment, and the raw materials that are needed. CS is a parallel (and precisely time-synchronous) form of experimentation, and is therefore an alternative to parallel physical experimentation. It requires no resources except a conventional computer and modeling/simulation skills.

Method for multi-domain and multi-dimensional concurrent simulation using a digital computer


Disclosed is an optical package assembly. The optical package assembly includes a substrate (100), a light sensor chip (200), and a protection portion. The protection portion and the light sensor chip (200) both are fixed to the substrate (100), the light sensor chip (200) is packaged in the protection portion, a plane on which the light sensor chip (200) is located intersects with a plane of the substrate (100), and the protection portion includes a light entering region. Further disclosed is a mobile terminal.

Currently, there are various types of mobile terminals on the market, for example, a mobile phone, a wearable device, and a computer. As user demands increase, performance of a current mobile terminal is optimized continuously, and a demand for light sensor chips in mobile terminals is increasing. As the current mobile terminal develops towards a direction of large screen, space for installation of a light sensor chip in the mobile terminal is becoming more limited. Based on this, the current mobile terminal usually uses a ribbon-shaped light sensor chip, and a width of the light sensor chip is reduced as much as possible to reduce a black border of a screen of the mobile terminal.
The light sensor chip usually is attached to a substrate in the mobile terminal. Even if the width of the light sensor chip is reduced, the light sensor chip still occupies large space. This undoubtedly makes the black border of the screen of the mobile terminal wide and affects a further increase of a screen-to-body ratio of the mobile terminal. In addition, optical performance of the light sensor chip needs to be balanced with its size. When the size of the light sensor chip is reduced to a particular extent, a process technology hardly enables a further decrease. Obviously, it is difficult to solve, only by reducing a size of a light sensor chip, a problem that the screen-to-body ratio of the current mobile terminal can be hardly increased.
On such basis, a package assembly formed after the light sensor chip is packaged is still large and occupies a large width, eventually leading to a small screen-to-body ratio of the mobile terminal.

Optical package assembly and mobile terminal


A method for making a high-power fused collimator, and a fused collimator made thereby, are provided. A fused collimator is provided that includes an end of a stripped end portion of an optical fiber fused to a proximal face of a silica lens. In an embodiment, a joint formed by the fiber end and the silica lens proximal face is substantially surrounded with a solder glass in a melted form. A cross-sectional area of the solder glass decreases proximally from a distal edge adjacent the lens to a proximal edge located along the fiber's stripped end portion. The solder glass is permitted to harden, forming a fused collimator. In another embodiment, a ferrule surrounds the fiber stripped end portion, and an adhesive is applied to the ferrule's proximal face to surround the fiber. The lens-ferrule joint is surrounded with solder glass, which is then surrounded with a silica sleeve.

1. Field of the Invention
The present invention relates to optical systems, and, more particularly, to collimators wherein an optical fiber is fused directly to a lens.
2. Description of Related Art
The use of fiber lasers in industrial cutting and welding applications has grown, owing to the ever-increasing power output provided by laser manufacturers. This increase in power levels has created a need for collimators that can perform without performance degradation or failure under these conditions.
Standard collimator packages are limited in their power handling owing to the air space between the fiber and the lens. These collimator packages require both angle-polished fibers and lenses to prevent back-reflection to the source. Additionally, both these surfaces require anti-reflection coatings. While current technology provides low-reflection coatings (<0.25% per surface), at power levels approaching 100 W, there would still be 0.5 W reflected back into the system, owing to this interface.
This problem is further compounded by the fact that standard collimator packages use epoxy as the bonding mechanism for the fiber. Laser energy reflected back into the collimator from other sources such as the workpiece, aside from that owing to the air space, causes the epoxy to heat up. The high expansion of the epoxy can cause performance degradation as the epoxy expands and pulls the fiber with it. Additionally, even the highest-temperature epoxies can only handle less than 300° C. for any sustained period. Beyond that, the epoxy degrades and may burn off, causing catastrophic failure of the collimator.
The reflections caused at the air space interface can be eliminated through the use of a fused collimator. In a fused collimator the optical fiber is fused directly to a fused silica lens. This configuration eliminates the need to angle polish and coat the fiber and lens. The fusion allows the laser energy to pass from the fiber into the lens with less than −70 dB back-reflection.
For higher-power applications, however, the standard fused collimator package is insufficient. The fusion joint between the fiber and the pellet is strain-relieved using a high-temperature epoxy. As discussed above, reflections caused by the operating environment can heat the epoxy above its recommended use temperature, causing performance drift or catastrophic failure of the fusion joint.
Therefore, it would be desirable to provide a way of either eliminating or moving the epoxy strain relief away from the fusion joint.

This patent is subject to a terminal disclaimer.

High-power fused collimator and associated methods


An automatic toilet seat lift mechanism including torsional springs to retain the toilet seat in the vertical position, a rod inserted in a rubber bushing in a hole on the toilet bowl with its bottom end coupled to a gate in front of the water outlet of the flush pipe and its top end stopped against a stop plate on the toilet seat, whereby the rod stops against the stop plate at the bottom to hold the toilet seat in the horizontal position covered on the toilet bowl; flushing the toilet causes the rod to release the stop plate for permitting the toilet seat to be lifted to the vertical position by the torsional springs.

The present invention relates to a lift mechanism for a toilet which automatically lifts the toilet seat from the toilet bowl each time the toilet bowl is flushed.
The toilet seat must be lifted from the toilet bowl after each service so as to prevent contamination. However, people may forget or are unwilling to lift the toilet seat after each use. There are various automatic lift mechanisms manufactured for lifting the toilet seat automatically. However, these automatic toilet seat lift mechanisms are commonly expensive, and they are sold with toilet bowls together. Therefore, these automatic toilet seat lift mechanisms are not suitable for existing toilet bowls.

Fl. 5, No. 4, Lane 781, Sec. 2, Kuo Kuang Rd., Ta Li Hsiang


In one embodiment, a method of estimating location of a mobile beaconing device within a building includes steps: concurrently transmitting from the beaconing device at least first and second signals, which respectively indicates at least first and second transmit power levels thereof; receiving the at least first and second signals by a plurality of anchor devices at different known locations; estimating first distances between the beaconing device and each anchor device as a function of signal power levels of the first signal received by each anchor device, and second distances between the beaconing device and each anchor device as a function of signal power levels of the second signal received by each anchor devices; and calculating an estimated location of the beaconing device as a function of the estimated first distances and second distances.

In many situations, it is desirable to determine the location and movement of a person or object within a building or relatively well-defined space, such as a home, hospital, or prison. For example, elderly or infirm persons living alone or in a nursing home may need frequent or even relatively constant monitoring by caregivers, and firefighters in a risky building may also need to be tracked.
Some advanced techniques, such as radar, GPS, Time-of-Flight, and Time-Difference-of-Arrival may be used to determine the location and movement of persons or objects. For instance, radar may be used for tracking a person or object, in which an electromagnetic radiation is reflected off the person or object. GPS may also be used for tracking a person or object, in which the person or object may be equipped with a GPS transmitter for transmitting signals which can be received by GPS satellites. However, these techniques require relatively expensive equipment, and might not work effectively under certain circumstances. For example, both radar and GPS systems would not work effectively within a building, because the walls and ceilings of the building would block radar signals as well as block access to GPS satellites.
Relatively less expensive radio technique may also be used to determine the location and movement of a person or object by applying the property that the power level of a radio signal attenuates at a logarithmic rate over distance. Given the signal power level transmitted by a radio transmitter, a radio receiver can measure the received signal power level, and can calculate a distance estimate between the radio transmitter and the radio receiver. Using several radio transmitters at different known locations, a mobile radio receiver is able to determine its own location using trio metric or multilateration calculations. However, this approach based on signal power attenuation will produce an accurate location estimate only in a perfect world devoid of other radio interference or other physical objects absorbing or reflecting radio signals. Since radio signal power level attenuates at a logarithmic rate, the accuracy of distance calculation deteriorates exponentially as the signal power level decreases, thus the accuracy of the estimated location using this approach is significantly affected.

Method and apparatus for location estimation


A spring clip includes a first portion including a bridge connecting spaced elongate fingers adapted to straddle a body portion of the fuel injector and be receivable in a receiving portion of a fuel rail cup. The elongate fingers include a reverse bend at a midpoint therealong and terminate in a bridging portion. The bent elongate fingers define finger segments on each side of the reverse bend. The finger segments diverge from the reverse bend part way toward the bridge and bridging portions and converge thereafter to form generally diamond shaped spring elements. A second portion of a generally planar shape having spaced legs engages slots in the injector body. The second portion includes a wall portion extending generally perpendicular to the spaced legs and connects with the bridging portion. When the injector is mounted in the fuel rail cup, the legs are received in slots in the injector body and the elongate finger segments are compressed between the fuel rail cup and the injector body. The fuel injector is clamped between the legs and the fingers with a force toward the head of the engine by the compressive load of the finger segments. The clip is yieldable to avoid overloading the injector during installation in the engine.

It is known in the art relating to the assembly of a fuel injector in a fuel rail cup to use a spring clip as the connecting member. In current fuel injector fuel rail assemblies, the spring clip is used to retain the injector in the fuel rail cup urging the injector into the fuel rail cup.
In a high pressure injector application, the injector is required to be held against the engine head with a force adequate to prevent the injector from moving during a combustion event. Conventional spring clips, because they work to suspend the injector between the fuel rail cup and manifold, are not suitable to be used in high pressure injector applications.


A control system and method is provided for selecting one of first and second cylinder groups of an internal combustion engine when a frequency of air/fuel ratio oscillations in the selected cylinder group is to be adjusted. The method includes determining which of first and second frequencies of air/fuel ratio oscillations in the first and second cylinder groups, respectively, has a greater frequency. Further, the method includes selecting one of the first and second cylinder groups having the greater frequency of air/fuel ratio oscillations. The selection is made to reduce engine torque fluctuations when changing a frequency of air/fuel ratio oscillations in the selected cylinder group.

The invention relates to a control system and method for selecting one of first and second cylinder groups of an internal combustion engine when a frequency of air/fuel ratio oscillations in the selected cylinder group is to be adjusted.
Known internal combustion engines generally have first and second cylinder groups that are connected to either straight pipe exhaust systems or Y-pipe exhaust systems. Both types of exhaust systems further utilize catalytic converters to reduce automotive emissions.
Known engine control systems utilize a measurement of exhaust gases from the first and second cylinder groups to maintain a predetermined air/fuel ratio in each of the first and second cylinder groups. Generally, the predetermined air/fuel ratio is stoichiometric. Further, when two state exhaust gas oxygen sensors are utilized, a typical result is a fluctuation, or oscillation, of the exhaust air/fuel ratio about the predetermined air/fuel ratio.
With engines having Y-pipe exhaust systems, known control systems have attempted to phase shift air/fuel ratio oscillations in a first cylinder group out of phase with air/fuel ratio oscillations in a second cylinder group, to reduce emissions. The inventors herein have recognized that the first and second cylinder groups may have first and second air/fuel ratio oscillations, respectively, that are operating at substantially different frequencies. Thus, when this occurs, merely phase shifting one of the air/fuel ratio oscillations with respect to the other, may not result in the desired phase difference being reached and/or maintained. Thus, inventors herein have recognized that to maintain a desired phase offset between the first and second air/fuel ratio oscillations, the first and second frequencies should be matched.
It is also known that increasing a peak-to-peak amplitude of air/fuel ratio oscillations in a cylinder group results in increased engine torque fluctuations and associated engine vibrations. Known control systems attempt to maintain a predetermined peak-to-peak amplitude that provides a predetermined allowable amount of engine torque fluctuations while enabling downstream catalytic converters to reduce engine emissions.
The inventors herein have recognized that the first and second frequencies of the first and second air/fuel ratio oscillations, respectively, can be matched by (i) either decreasing the faster frequency or (ii) increasing the slower frequency. However, the inventors have recognized that attempting to increase the slower frequency of air/fuel ratio oscillations results in an increased peak-to-peak amplitude of the respective oscillations. Thus, by attempting to increase the slower frequency of air/fuel ratio oscillations, engine torque fluctuations are undesirably increased.
The inventors herein have recognized that the faster frequency of air/fuel ratio oscillations can be decreased while maintaining the desired peak-to-peak amplitude of the respective oscillations. Thus, the faster frequency can be decreased to match the slower frequency of air/fuel ratio oscillations, without generally increasing engine torque fluctuations. Thus, the inventors have recognized that the cylinder group having the faster frequency of air/fuel ratio oscillations should be selected when adjusting a frequency of air/fuel ratio oscillations to minimize engine torque fluctuations.
The invention relates to a control system and method for selecting one of first and second cylinder groups of an internal combustion engine when a frequency of air/fuel ratio oscillations in the selected cylinder group is to be adjusted.
The method for selecting one of first and second cylinder groups includes determining which of first and second frequencies of air/fuel ratio oscillations in the first and second cylinder groups, respectively, has a greater frequency. Further, the method includes selecting one of the first and second cylinder groups having the greater frequency of air/fuel ratio oscillations wherein the selection is made to reduce engine torque fluctuations while changing a frequency of air/fuel ratio oscillations in the selected cylinder group.
A control system for selecting one of first and second cylinder groups of an internal combustion engine is provided. The control system includes a first device for determining a first frequency of air/fuel ratio oscillations in the first cylinder group. The control system further includes a second device for determining a second frequency of air/fuel ratio oscillations in the second cylinder group. Finally, the control system includes a controller operatively connected to the first and second devices. The controller is configured to determine which of the first and second frequencies has a greater frequency. The controller is further configured to select one of the first and second cylinder groups having the greater frequency of air/fuel ratio oscillations.
The inventive control system and method provides several advantages over known control systems and methods. In particular, the system and method selects a cylinder group that minimizes engine torque fluctuations and vibrations when a frequency of air/fuel ratio oscillations therein is adjusted to match another frequency. Further, the system and method selects a cylinder group that minimizes engine emissions when a frequency of air/fuel ratio oscillations therein is adjusted to match another frequency.

Method for selecting a cylinder group when adjusting a frequency of air/fuel ratio oscillations


An alignment mechanism to align a microelectronic device to a socket, the device including an array of contact pads thereon. The mechanism includes a socket system having a socket and a device positioning mechanism disposed adjacent the socket and adapted to position the device in the socket. The mechanism also includes a control system adapted to receive alignment data on a position of the array of contact pads relative to two reference sides of the device, the control system further being adapted to control the device positioning mechanism as a function of alignment data to align the device in the socket.

The prior art offers a number of methods for aligning microelectronic devices (hereinafter "devices") to sockets, such as, for example, test sockets.
As shown in FIG. 1, according to a passive alignment method, a microelectronic device in the form of a package 100 is passively aligned with guide walls 102 on a socket 104. Such a passive alignment method relies on the clearance between socket guide walls 102 and edges 106 of package 100 in order to effect the alignment of contact pads 108 on the package 100 to contact pins 109 of the socket 104. However, disadvantageously, a reliance on the clearance mentioned above, in addition to a reliance on a control of manufacturing variations inherent in the dimensions of guide walls 102 and device edges 106 negatively impacts the alignment accuracy between contact pads 108 on the package 100 and contact pins 109 of the socket 104. In addition, disadvantageously, because of significant positional variations of contact pad arrays from device to device, the passive alignment method is not applicable to device contact pads smaller than about 12 mils.
Another known socket alignment method, such as shown for example in FIGS. 2a and 2b, uses a non-calibrated active alignment process to align package 200 to a socket 204. According to such a method, an alignment mechanism includes spring-loaded socket guides 202 (FIG. 2a) to push package 200 against socket datum 204 (FIG. 2b), and this in order to eliminate package positioning errors arising from the clearance gap between package edges and the socket walls, as described above with respect to FIG. 1. The above enhances alignment accuracy to about 10 mils, but is still largely inapplicable to the alignment of devices having contact pads smaller than about 10 mils.
Vision-based active alignment systems further exist as part of test handling equipments in order to allow a more precise alignment of a device to a corresponding socket. As seen in FIGS. 3a and 3b, a vision-based active alignment system 300 for each socket contactor or socket 310 includes a handling chuck 312 that is adapted to hold and move a device in the form of a package 314, the package having an array of contact pads 316 thereon. A camera 318 of the test handling equipment shown is positioned to acquire data in the form of an image of the array of contact pads 316 on the package 314. A control system 320 is then used to determine a positioning error between the array of contact pads 316 and the known position of an array of contact test pins 322 on the socket 310. The position of the array of contact test pins 322 may also be determined via camera imaging. The control system 320 then moves the handling chuck 312 as a function of the determined positioning error in order to align the array of contact pads 316 to the corresponding array of test contact pins 322 on the socket 310.
However, mechanical, calibration and other tolerances in the use of the above system disadvantageously limit positional accuracy to about 40 microns. The above leads to a socketing alignment accuracy of about 7 to about 8 mils.
The prior art fails to provide an alignment mechanism and method adapted to allow the alignment of a microelectronic device having contact pads measuring less than 7 mils, such as contact pads measuring about 5 mils.
For simplicity and clarity of illustration, elements in the drawings have not necessarily been drawn to scale. For example, the dimensions of some of the elements may be exaggerated relative to other elements for clarity. Where considered appropriate, reference numerals have been repeated among the drawings to indicate corresponding or analogous elements.

Socket alignment mechanism and method of using same


Disclosed is an ear microphone which includes: a microphone for converting a voice signal provided from the external auditory meatus of a user to an electric signal; a speaker for converting the electric signal provided from an external device to the voice signal; and a soundproof member having a microphone receiving groove for fixing and supporting the microphone to the inside of the housing and a speaker receiving groove for fixing and supporting the speaker to the inside of the housing.

In general, the ear microphone is used to be worn on ears of a user while the ear microphone is coupled with an external apparatus such as sound equipment or a mobile phone as is done in a general earphone.
FIG. 1 illustrates a schematic configuration of a conventional ear microphone.
Referring to FIG. 1, the ear microphone consists of a connector 10 to be coupled with an external apparatus 1, and a main body 20 to be worn on ears of the user. The main body 20 is shaped to be inserted into the ear of the user and includes a speaker 22 outputting a voice signal and a microphone 23 converting the voice signal delivered through the external auditory meatus of the user into an electric signal and outputting the electric signal to the connector 10 in a surface facing the ear of the user.
In the case of the ear microphone, an external noise is introduced into the ear microphone to cause the echo or howling phenomenon to occur.
The levels of the output voltage output from the output port of the mobile communication device such as a mobile phone or a smartphone to the ear microphone jack are different depending on the kind of the mobile phone or the smartphone.
In addition, the levels of the output voltage output from the output port of the mobile communication device to the ear microphone jack are different even when the kinds of the mobile phone or the smartphone are identical to one another. Accordingly, the echo and howling phenomena may occur due to the difference in output voltage level when the user has a conversation with his/her counterpart using the microphone implemented in the ear microphone. In particular, the phenomena become worse in the ear microphone in which the speaker and the microphone are integrally formed.

Ear microphone and voltage control device for ear microphone


A method for remotely visualizing an image on a client includes the steps of rendering a 2D image from image data on a server, applying a 2D wavelet transform to the 2D image on the server to generate a plurality of sub-bands, identifying code blocks of the sub-bands that correspond to a region of interest in the 2D image on the server, compressing a number of bit planes of each code block using one of a plurality of coding techniques on the server based on the number of bit planes to generate compressed codes, sending the compressed codes from the server to the client, and visualizing a new 2D image on the client using the received compressed codes.

1. Technical Field
The present disclosure relates generally to the field of image visualization, and more specifically to methods and systems of performing remote visualization of images.
2. Discussion of Related Art
With advances in medical imaging modalities, efficient representation and storage of digital imagery is necessary. Accordingly, schemes for smart data access are of interest. It is desirable to be able to access various resolutions, qualities, and spatial regions of an image locally. Further, remote visualization of images can be useful in the practice of telemedicine.
In one method of remote visualization, volumetric data is sent from a server to a client for local rendering and display by the client. However, volume rendering is a computationally intensive process and often requires dedicated hardware for real time visualization. Although a client can use software to emulate the functions performed by the needed hardware, the quality and frame rate of the rendered image is often inadequate. In another method of remote visualization, the rendering is performed by a server with dedicated hardware. The server receives viewpoint requests from a client and transmits corresponding 2D rendered images back to the client. However, the size of the rendered images and the limited bandwidth between the client and server can make it difficult to properly visualize the image on the client in a timely manner.
Thus, there is a need for more efficient methods and systems for providing remote visualization of images.

Methods and systems for remotely visualizing images

Arizona Board of Regents on Behalf of the University of Arizona


A rotation-preventing assembly for preventing rotation of a percussion musical instrument such as a cymbal mounted on a musical instrument stand comprising a fastening member, which is fastened to a holder main body of the stand, and a rotation-preventing member, which is attached to the fastening member. The upper end of the rotation-preventing member is inserted from below into a hole formed in, for instance, a cymbal held on the holder, thus preventing horizontal rotation of the cymbal about the holder.

1. Field of the Invention
The present invention relates to a holder for holding percussion musical instruments such as electronic cymbals, electronic drums, tom-toms, cow bells, etc.
2. Prior Art
Various types of musical instrument holders for holding percussion instruments such as electronic cymbals, electronic drums, etc., have been proposed in the past as described in, for example, Japanese Utility Model Application Publication (Kokoku) Nos. 63-7872 and 63-8949.
FIG. 2 illustrates a conventional cymbal holder shown partially in cross section.
This cymbal holder 1 includes an attachment pipe 2 which is attached to a musical instrument stand or the body of a bass drum during use, and a holder main body 4 consisting of a pipe is connected to the attachment pipe 2 via an angle adjustment mechanism 3. A seat 5 is attached via a cushion rubber 6, and a pair of felt washers 8 are positioned on the seat 5 so as to hold the electronic cymbal 7 in between. A butterfly nut 9 is screwed onto the upper end of the holder main body 4, thus pressing the upper felt washer 8 against the electronic cymbal 7. The electronic cymbal 7 consists of a cymbal main body 10, which is formed in the shape of a somewhat flat conical disk or fan from a synthetic resin, etc., and a rubber plate 11 is attached so as to cover the striking area of the cymbal main body 10. In addition, a pick-up device 12 such as a piezo-electric element, etc., which converts the vibration of the cymbal main body 10 into an electrical signal, is attached to the undersurface of the edge area of cymbal main body 10. The electronic cymbal 7 has an attachment hole 13 at the center so that the holder main body 4 passes through the center of the cymbal 7. The rubber plate 11 is used in order to restrict the percussion sound, and in order to suppress irregular vibrations.
However, the conventional cymbal holder 1 described above has some problems: although the electronic cymbal 7 is held by two felt washers 8, the cymbal main body 10 oscillates in the circumferential direction with the felt washers 8 as a supporting point when the rubber plate 11 is struck. As a result, gaps are generated between the felt washers 8 and the cymbal main body 10, resulting in that the cymbal main body 10 rotates in the circumferential direction in the horizontal plane.
In the case of an ordinary cymbal, the same problem would not occur since the entire surface of an ordinary cymbal forms the striking portion. In electronic cymbals, however, the striking portion is limited to a region where the rubber plate 11 is installed; accordingly, when the cymbal main body 10 rotates circumferentially, the striking portion is displaced, and playing of the cymbal becomes difficult. Thus, such rotation is undesirable.


A method and apparatus for a shallow sea-bottom walking experience in which a plurality of guests are permitted to take a walk in the shallow sea-bottom with safety. A diving helmet is connected to a connecting hose which is connected to an air supply unit of an air supply system. A diving instructor is positioned on an auxiliary deck positioned slightly above the sea level in a normal state. The instructor allows each guest to. enter the sea from the auxiliary deck by using a ladder hanging down from the auxiliary deck. The instructor places a diving helmet over the head of each guest as they enter the water. The instructor guides each of the guests down to the shallow sea-bottom by using the ladder extended down to a portion close to the sea-bottom; and the instructor guides the guest to walk on the sea-bottom while holding onto a drawbar. Air is provided by the air supply system while the guests are in the water. An auxiliary air source is provided in case the air supply system malfunctions.

This invention relates to a method and apparatus for a sea-bottom walking experience in which guests place a diving helmet over their head to rest on their shoulders to provide breathable air while taking a walk on the sea-bottom (seabed).
In recent years, scuba diving has been popularized. For such scuba diving, special training is generally required. In addition, a diver is required to fit a jacket onto the body and to carry a suitable breathable gas container on his back. For this reason, such a scuba diving system is not suitable for guests who desire to easily see the underwater surroundings.
In view of the above, it is desirable to provide a system such that guests having a diving helmet on can take a walk on the sea-bottom to observe the surroundings.

Method for a sea-bottom walking experience and apparatus for a sea-bottom walking experience