The present invention advantageously provides for, in different embodiments, low-cost deposition techniques to form high-quality, dense, well-adhering Group IBIIIAVIA compound thin films with macro-scale as well as micro-scale compositional uniformities. In one embodiment, there is provided a method of growing a Group IBIIIAVIA semiconductor layer on a base, and includes the steps of depositing on the base a film of Group IB material and at least one layer of Group IIIA material, intermixing the film of Group IB material and the at least one layer of Group IIIA material to form an intermixed layer, and forming over the intermixed layer a metallic film comprising at least one of a Group IIIA material sub-layer and a Group IB material sub-layer. Other embodiments are also described.

Solar cells are photovoltaic devices that convert sunlight directly into electrical power. The most common solar cell material is silicon, which is in the form of single or polycrystalline wafers. However, the cost of electricity generated using silicon-based solar cells is higher than the cost of electricity generated by the more traditional methods. Therefore, since early 1970's there has been an effort to reduce cost of solar cells for terrestrial use. One way of reducing the cost of solar cells is to develop low-cost thin film growth techniques that can deposit solar-cell-quality absorber materials on large area substrates and to fabricate these devices using high-throughput, low-cost methods.
Group IBIIIAVIA compound semiconductors comprising some of the Group IB (Cu, Ag, Au), Group IIIA (B, Al, Ga, In, Tl) and Group VIA (O, S, Se, Te, Po) materials or elements of the periodic table are excellent absorber materials for thin film solar cell structures. Especially, compounds of Cu, In, Ga, Se and S which are generally referred to as CIGS(S), or Cu(In,Ga)(S,Se)2 or CuIn1−xGax (SySe1−y)k, where 0≦x≦1, 0≦y≦1 and k is approximately 2, have already been employed in solar cell structures that yielded conversion efficiencies approaching 20%. Absorbers containing Group IIIA element Al and/or Group VIA element Te also showed promise. Therefore, in summary, compounds containing: i) Cu from Group IB, ii) at least one of In, Ga, and Al from Group IIIA, and iii) at least one of S, Se, and Te from Group VIA, are of great interest for solar cell applications.
The structure of a conventional Group IBIIIAVIA compound photovoltaic cell such as a Cu(In,Ga,Al)(S,Se,Te)2 thin film solar cell is shown in FIG. 1. The device 10 is fabricated on a substrate 11, such as a sheet of glass, a sheet of metal, an insulating foil or web, or a conductive foil or web. The absorber film 12, which comprises a material in the family of Cu(In,Ga,Al)(S,Se,Te)2, is grown over a conductive layer 13, which is previously deposited on the substrate 11 and which acts as the electrical contact to the device. Various conductive layers comprising Mo, Ta, W, Ti, and stainless steel etc. have been used in the solar cell structure of FIG. 1. If the substrate itself is a properly selected conductive material, it is possible not to use a conductive layer 13, since the substrate 11 may then be used as the ohmic contact to the device. After the absorber film 12 is grown, a transparent layer 14 such as a CdS, ZnO or CdS/ZnO stack is formed on the absorber film. Radiation 15 enters the device through the transparent layer 14. Metallic grids (not shown) may also be deposited over the transparent layer 14 to reduce the effective series resistance of the device. The preferred electrical type of the absorber film 12 is p-type, and the preferred electrical type of the transparent layer 14 is n-type. However, an n-type absorber and a p-type window layer can also be utilized. The preferred device structure of FIG. 1 is called a "substrate-type" structure. A "superstrate-type" structure can also be constructed by depositing a transparent conductive layer on a transparent superstrate such as glass or transparent polymeric foil, and then depositing the Cu(In,Ga,Al)(S,Se,Te)2 absorber film, and finally forming an ohmic contact to the device by a conductive layer. In this superstrate structure light enters the device from the transparent superstrate side. A variety of materials, deposited by a variety of methods, can be used to provide the various layers of the device shown in FIG. 1.
In a thin film solar cell employing a Group IBIIIAVIA compound absorber, the cell efficiency is a strong function of the molar ratio of IB/IIIA. If there are more than one Group IIIA materials in the composition, the relative amounts or molar ratios of these IIIA elements also affect the properties. For a Cu(In,Ga)(S,Se)2 absorber layer, for example, the efficiency of the device is a function of the molar ratio of Cu/(In+Ga). Furthermore, some of the important parameters of the cell, such as its open circuit voltage, short circuit current and fill factor vary with the molar ratio of the IIIA elements, i.e. the Ga/(Ga+In) molar ratio. In general, for good device performance Cu/(In+Ga) molar ratio is kept at around or below 1.0. As the Ga/(Ga+In) molar ratio increases, on the other hand, the optical bandgap of the absorber layer increases and therefore the open circuit voltage of the solar cell increases while the short circuit current typically may decrease. It is important for a thin film deposition process to have the capability of controlling both the molar ratio of IB/IIIA, and the molar ratios of the Group IIIA components in the composition. It should be noted that although the chemical formula is often written as Cu(In,Ga)(S,Se)2, a more accurate formula for the compound is Cu(In,Ga)(S,Se)k, where k is typically close to 2 but may not be exactly 2. For simplicity we will continue to use the value of k as 2. It should be further noted that the notation "Cu(X,Y)" in the chemical formula means all chemical compositions of X and Y from (X=0% and Y=100%) to (X=100% and Y=0%). For example, Cu(In,Ga) means all compositions from CuIn to CuGa. Similarly, Cu(In,Ga)(S,Se)2 means the whole family of compounds with Ga/(Ga+In) molar ratio varying from 0 to 1, and Se/(Se+S) molar ratio varying from 0 to 1.
The first technique that yielded high-quality Cu(In,Ga)Se2 films for solar cell fabrication was co-evaporation of Cu, In, Ga and Se onto a heated substrate in a vacuum chamber. However, low materials utilization, high cost of equipment, difficulties faced in large area deposition and relatively low throughput are some of the challenges faced in commercialization of the co-evaporation approach.
Another technique for growing Cu(In,Ga)(S,Se)2 type compound thin films for solar cell applications is a two-stage process where metallic components of the Cu(In,Ga)(S,Se)2 material are first deposited onto a substrate, and then reacted with S and/or Se in a high temperature annealing process. For example, for CuInSe2 growth, thin layers of Cu and In are first deposited on a substrate and then this stacked precursor layer is reacted with Se at elevated temperature. If the reaction atmosphere also contains sulfur, then a CuIn(S,Se)2 layer can be grown. Addition of Ga in the precursor layer, i.e. use of a Cu/n/Ga stacked film precursor, allows the growth of a Cu(In,Ga)(S,Se)2 absorber.
Sputtering and evaporation techniques have been used in prior art approaches to deposit the layers containing the Group IB and Group IIIA components of the precursor stacks. In the case of CuInSe2 growth, for example, Cu and In layers were sequentially sputter-deposited on a substrate and then the stacked film was heated in the presence of gas containing Se at elevated temperature for times typically longer than about 30 minutes, as described in U.S. Pat. No. 4,798,660. More recently U.S. Pat. No. 6,048,442 disclosed a method comprising sputter-depositing a stacked precursor film comprising a Cu—Ga alloy layer and an In layer to form a Cu—Ga/In stack on a metallic back electrode layer and then reacting this precursor stack film with one of Se and S to form the absorber layer. U.S. Pat. No. 6,092,669 described sputtering-based equipment for producing such absorber layers. Such techniques may yield good quality absorber layers and efficient solar cells, however, they suffer from the high cost of capital equipment, and relatively slow rate of production.
One prior art method described in U.S. Pat. No. 4,581,108 utilizes a low cost electrodeposition approach for metallic precursor preparation. In this method a Cu layer is first electrodeposited on a substrate. This is then followed by electrodeposition of an In layer and heating of the deposited Cu/In stack in a reactive atmosphere containing Se. Although low-cost in nature, this technique was found to yield CuInSe2 films with poor adhesion to the Mo contact layer. In a publication ("Low Cost Thin Film Chalcopyrite Solar Cells", Proceedings of 18th IEEE Photovoltaic Specialists Conf., 1985, p. 1429) electrodeposition and selenization of Cu/In and Cu/In/Ga layers were demonstrated for CIS and CIGS growth. One problem area was identified as peeling of the compound films during solar cell processing. Later, in another reference ("Low Cost Methods for the Production of Semiconductor Films for CIS/CdS Solar Cells", Solar Cells, vol. 21, p. 65, 1987) researchers studied the cross-section of Mo/CuInSe2 interface obtained by the above-mentioned method and found the CuInSe2 to have poor adhesion to the Mo contact layer.
Irrespective of the specific approach used in a two-stage process, growing for example a Cu(In,Ga)(S,Se)2 absorber film, individual thicknesses of the layers forming the metallic stacked structure need to be controlled so that the two molar ratios mentioned before, i.e. the Cu/(In+Ga) ratio and the Ga/(Ga+In) ratio, can be kept under control from run to run and on large area substrates. The molar ratios attained in the metallic stacked structures are generally preserved in macro scale during the reaction step, provided that the reaction temperature is kept below about 600° C. Therefore, the overall or average molar ratios in the compound film obtained after the reaction step is about the same as the average molar ratios in the metallic stacked structures before the reaction step. In prior art approaches all the Cu, In and/or Ga required for the final desired molar ratios are deposited on the substrate before the reaction step with S and/or Se. In other words, to grow a Cu0.8In0.8Ga0.2Sex, where x is close to 2, for example, the prior art techniques typically deposit a Cu/In/Ga stack, a In/Cu/Ga stack or a Cu—Ga/In stack, so that the Cu/(In+Ga) molar ratio of the stack is 0.8 and the Ga/(Ga+In) molar ratio of the stack is 0.2. This metallic stack is then selenized at high temperatures to form the compound. One problem associated with such approaches is that these precursors are relatively thick (500-1500 nm) and are typically rich in Group IIIB components of In and Ga, which have low melting points of about 156° C. and 30° C., respectively, and they cause micro-scale non-uniformities, as will be discussed next.
FIGS. 2a-2c demonstrate the problem of micro-scale non-uniformities which may be present in the metallic precursor layers, especially those with IB/IIIA molar ratios of less than or equal to 1. FIG. 2a schematically shows an exemplary Cu/In/Ga metallic stack with the exemplary overall molar ratios of Cu/(In+Ga)=0.8 and Ga/(Ga+In)=0.2 on a substrate. In this approach, a contact film 21 is first deposited onto a substrate 20, forming a base 22. A Cu layer 23 is then deposited over the contact film 21. The thickness of the Cu layer 23 may, for example, be about 200 nm. This Cu thickness and the desired molar ratios cited above require deposition of about 440 nm thick ID layer and about 80 nm thick Ga layer. These calculations can be made assuming densities of Cu, In and Ga to be 8.96 g/cc, 7.31 g/cc and 5.91 g/cc, respectively, and the atomic weights to be 63.54 g, 114.76 g and 69.72 g, respectively. Using a density value of 5.75 g/cc and a molar weight of 306.66 g for the selenized compound of Cu0.8In0.8Ga0.2Se1.9, it is also calculated that the metallic precursor of this example would yield approximately 1880 nm thick CIGS layer, assuming 100% density. The optimum thickness of CIGS layers for thin film solar cell applications is in the range of 500-5000 nm, preferably in the range of 700-2000 nm, smaller thicknesses being preferable because it reduces materials cost.
Referring back to FIG. 2a, deposition of about 200 nm thick Cu layer 23 is followed by the deposition of a nominally 440 nm thick In layer 24 and a nominally 80 nm thick Ga layer 25. The Cu layer 23 in the resulting metallic precursor stack 26 is shown as smooth and uniform, whereas, the In and Ga layer surfaces are depicted as non-planar. Although the surface morphologies of these layers depend strongly on the deposition techniques used, it is generally true that low-melting-temperature metals such as In and Ga tend to "ball" when deposited in thin film form, especially if they are deposited on top of each other. It should be noted that melting temperature of (Ga+In) mix is lower than the melting temperature of In which is around 156° C.
The metallic precursor layer 26 of FIG. 2a may have the desired Cu/(In+Ga) and Ga/(Ga+In) molar ratios in a global sense or in macro scale. However, in micro scale the situation is quite different as can be seen in FIG. 2b which shows a magnified view of the region 27 of FIG. 2a. Since the In layer thickness "t1" at and around point "A" is much larger than the In layer thickness "t2" at point B, the local Cu/(In+Ga) ratio is much smaller at and around point "A" than at and around point "B". Furthermore Ga/(Ga+In) ratio is also different at these two points, i.e. higher at point B compared to point A. It should be appreciated that after the reaction step with Se these micro-scale non-uniformities in the molar ratios of the metallic components are mostly transferred to the compound, yielding a CIGS layer that has in-plane compositional variations due to varying Cu/(In+Ga) and Ga/(Ga+In) ratios. This situation is schematically shown in FIG. 2c, which depicts a compound layer 29 obtained by reacting the precursor stack of FIG. 2b with Se. The region R1 in FIG. 2c corresponds approximately to the area around point A in FIG. 2b and the region R2 corresponds approximately to the area around point B in FIG. 2b. Accordingly, region R1 is an In-rich region and region R2 is a Cu-rich region. It should be noted that boundaries between these regions may not be as defined as suggested in FIG. 2c. Boundaries are shown as such just to demonstrate the point. In real films even the crystalline structures of these regions may be different. Cu-rich regions, after selenization, may contain large faceted grains of Cu-selenides, whereas, In or Ga-rich regions would be smoother with smaller grains. When a solar cell is fabricated on the compound layer 29 of FIG. 2c, the copper rich region R2 containing highly conductive Cu-selenide phases would increase the leakage current across the device and reduce its voltage output, whereas the In-rich region R1 would increase its series resistance. Both effects would deteriorate the solar cell efficiency if they are extreme. Since the non-uniform surface morphologies such as the one depicted in FIGS. 2a-2c vary from run to run and from substrate to substrate, repeatability of the manufacturing process of this solar cell would also be poor and the yield for high efficiency large area device fabrication would be low. For best solar cell efficiencies and high manufacturing yields compound layers with macro-scale as well as micro-scale compositional uniformity are needed.
It should be noted that the example given above explained the micro-scale non-uniformity problem for the case of non-uniform or rough Group IIIA layer deposited on a smooth Group IB layer. However, similar problems are observed even if the morphologies of In and Ga layers were smooth in their as-deposited state. The reason is that even if the starting morphologies of In and Ga were smooth, during the reaction step with the Group VIA material, such as Se, the metallic precursor is heated up, typically to temperatures above 350° C. As the heating step is performed, In and Ga start to melt at temperatures above about 30° C. before reacting with the Group VIA material and they de-wet the substrate they are deposited on such as the Cu surface. This de-wetting phenomenon forms "balls" giving rise to rough morphologies similar to the one shown in FIG. 2b. Furthermore, balling becomes more extensive as the amount of the low-melting phase (in and/or Ga) in the stack is increased or the thickness of In and/or Ga layers are increased.
FIG. 3a shows an exemplary metallic precursor stack 36 deposited over a base 22, wherein the base 22 comprises a substrate 20 and a contact film 21 as in FIG. 2a, and the metallic precursor stack 36 comprises a substantially smooth Cu layer 33, a substantially smooth In layer 34 and a substantially smooth Ga layer 35, which may be deposited onto the base 22 by various thin film deposition techniques such as evaporation, sputtering or electrodeposition by taking certain measures such as keeping the base at below room temperature by forced cooling during deposition. In this example, the individual Cu, In and Ga layers within the stack 36 have flat surface morphologies. FIG. 3b shows the morphology of this precursor stack after it is heated up to a temperature of for example 160° C., which is higher than the In melting temperature as well as the melting temperature of the (Ga+In) composition lying over the Cu layer 33. Since the (Ga+In) composition of our example is 20% Ga and 80% In, the melting temperature is in the range of 100-120° C. according to the In—Ga binary phase diagram. The surface morphology of the (In+Ga) layer of FIG. 3b is very non-uniform and would give rise to the micro-scale compositional non-uniformities in the compound layers fabricated using such precursors as described before with reference to FIGS. 2a, 2b and 2c. It should be noted that although the interface between the Cu layer 33 and the (In+Ga) layer 36a of FIG. 3b is shown to be sharp, this interface in practice may be diffused depending upon the temperature of the heat treatment step.
One approach to address the micro-scale non-uniformity problem is described in U.S. Pat. No. 5,567,469 awarded to Wada et al. In this approach a portion of the low-melting phase or component, e.g. indium, is introduced into the precursor layer in the form of a compound selected from the group consisting of oxides, selenides and sulfides. These compounds of In have very high melting points. Therefore, when the precursor is heated up to perform the reaction step with Group VIA component(s), melting and balling of In is reduced since at least some of the In is in the form of a high melting point compound.
The discussion above concentrated on the problem of micro-scale compositional non-uniformities in metallic precursor layers used in prior art two-stage process approaches. An additional important problem, namely adhesion, was also identified for metallic precursor layers obtained by the low cost electrodeposition technique. Although electrodeposition is attractive to use in terms of its lower cost, there are other limiting factors in using the prior art electroplating approaches for the preparation of metallic Group IB and Group IIIA elemental stacks for the fabrication of Group IBIIIAVIA compound films as will be described below.
Cu, In and Ga have very different plating potentials. The molar standard electrode potentials of Cu/Cu2+, In/In3+ and Ga/Ga3+ metal/ion couples in aqueous solutions are about +0.337 V, −0.342 V, and −0.52 V, respectively. This means that Cu can be plated out at low negative voltages. For In deposition, on the other hand, larger negative voltages are needed. For Ga deposition even larger negative voltages are required. Therefore, to form a stack containing Cu, In and Ga, Cu is typically electroplated first. This is then followed by deposition of In and then Ga. Otherwise, while electroplating one species, the other species on which deposition is carried out may partially dissolve into the electrolyte. For example, if a stack of Cu/Ga/In is electrodeposited, while depositing In over Ga, some Ga may be dissolving into the In deposition solution. This then would lead to poor control over Cu/(Ga+In) and Ga/(Ga+In) molar ratios in the precursor and the absorber layer after its formation. Similarly, deposition of a Cu layer over an In layer may result in loss of In from the In layer into the Cu plating electrolyte during processing. Therefore, prior-art methods have employed Cu/In/Ga stacks electroplated in that order. However, after selenization such stacks yielded compound layers with poor adhesion to the base or the substrate. Furthermore, compositional micro-scale non-uniformities such as those described with reference to FIGS. 3a and 3b did not allow formation of high quality Group IBIIIAVIA layers suitable for the fabrication of high efficiency solar cells. It should be appreciated that thin film deposition techniques with adhesion problems cannot be reliably scaled up for manufacturing of electronic devices, especially solar cells which are expected to have a lifetime of over 20 years.
As the brief review above demonstrates, there is still a need to develop low-cost deposition techniques to form high-quality, dense, well-adhering Group IBIIIAVIA compound thin films with macro-scale as well as micro-scale compositional uniformities.

Technique and apparatus for depositing thin layers of semiconductors for solar cell fabrication


A heat dissipation device includes a retention module surrounding a heat-generating component therein and a heat sink secured in the retention module. The retention module has a plurality of sidewalls. The heat sink includes a base positioned in the retention module for contacting with the heat-generating component. The base includes a plurality of first walls and a plurality of second walls. The sidewalls of the retention module enclose a periphery of the base, and the first walls and the second walls respectively abut against the sidewalls of the retention module when the base is located at a first position and a second position. A rotation of the base from the first position to the second position reduces an adhering force generated by a thermal grease located between the base and the heat-generating component.

1. Field of the Invention
The present invention relates to a heat dissipation device, more particularly to a heat dissipation device for cooling an electronic component.
2. Description of Related Art
As computer technology continues to advance, electronic components such as the central processing units (CPUs) of computers are being made to provide faster operational speeds and greater functional capabilities. When a CPU operates at high speed in a computer enclosure, its temperature usually increases enormously. It is therefore desirable to dissipate the generated heat of the CPU quickly before damage is caused.
A conventional heat dissipation device for this purpose generally includes a base for contacting with a CPU restricted in a retention module, and a plurality of upright fins mounted on the base. Heat originating from the CPU is first absorbed by the base, and then is conducted to the fins to be dissipated to ambient air.
However, the air or clearance existing between the base and the CPU, results in a large heat resistance therebetween, which unduly affects the heat dissipating efficiency of the conventional heat dissipation device. In order to reduce the heat resistance, the base is generally kept in contact with the CPU by thermal conductive grease.
As is well known, the thermal conductive grease generally has a high stickiness, and adherence is generated between the base and the CPU. When there is a need to remove the heat dissipation device from the CPU, the adherence between the heat dissipation device and the CPU may result in movement of the CPU with the heat dissipation device. More particularly, the heat dissipation device is usually positioned in the retention module, and the removal of the heat dissipation device is restricted by the retention module. In such a situation, the heat dissipation device is usually vertically pulled out of the retention module along a direction perpendicular to the CPU. The adherence is so large that the CPU may be actually pulled out of the retention module together with the heat dissipation device, resulting in a possible damage to the CPU.
What is needed, therefore, is a heat dissipation device, which can overcome the above-described disadvantages.

Fu Zhun Precision Industry (Shen Zhen) Co., Ltd.


A method for manufacturing a solid-state imaging device includes forming a transfer channel portion and a light-receiving portion in a silicon substrate; forming a silicon oxide film on the silicon substrate; forming a silicon nitride film on the silicon oxide film, the silicon nitride film acting as a gate insulating film together with the silicon oxide film above the transfer channel portion and acting as an anti-reflection film above the light-receiving portion; forming a protection film on the silicon nitride film; forming a polysilicon film above the silicon nitride film via the protection film at least above the light-receiving portion; and etching the polysilicon film so as to form a transfer electrode above the transfer channel portion. The etching of the polysilicon film is carried out so that the polysilicon film is removed above the light-receiving portion while the protection portion remains.

The present invention relates to a method for manufacturing a solid-state imaging device.
In recent years, it is common to provide solid-state imaging devices with chargecoupled devices (hereinafter xe2x80x9cCCDxe2x80x9d will be referred to) used for transferring charge. This solid-state imaging device has a configuration in which a plurality of light-receiving portions are arranged in a matrix, and a charge transfer portion is formed corresponding to each line of the matrix. The charge transfer portion is a CCD in which a transfer channel portion is formed in a silicon substrate and a transfer electrode is formed above the transfer channel portion via a gate insulating film. In such a solid-state imaging device, in order to improve the sensitivity by suppressing the reflection on the surface of the light-receiving portion, it has been proposed to form an anti-reflection film above the light-receiving portion.
FIGS. 5A to 5C are cross-sectional views to illustrate steps of a method for manufacturing a solid-state imaging device provided with an anti-reflection film. First, on the silicon substrate 50 provided with a light-receiving portion 52 and a transfer channel portion 51, a silicon oxide film 53, a silicon nitride film 54 and a silicon oxide film 55 are formed in this order, thereby forming a three-layered gate insulating film (see FIG. 5A). Then, a polysilicon film is formed, followed by patterning thereof by photolithography and etching, thereby forming a transfer electrode 56 above the transfer channel portion 51 (FIG. 5B). Next, the surface of the transfer electrode 56 is covered with a silicon oxide film 57 by thermal oxidization, followed by patterning of the silicon nitride film 54, thereby forming an anti-reflecting film 54a above the light-receiving portion 52 (FIG. 5C).
FIGS. 6A to 6E are cross-sectional views to illustrate steps of another method for manufacturing a conventional solid-state imaging device. Similar to FIGS. 5A to 5B, on a silicon substrate 60 provided with a light-receiving portion 62 and a transfer channel portion 61, a three-layered gate insulating film including a silicon oxide film 63, a silicon nitride film 64 and a silicon oxide film 65, and a transfer electrode 66 are formed (see FIG. 6A and FIG. 6B). Then, after a silicon oxide film 67 is formed on the surface of the transfer electrode 66, the silicon nitride film 64 above the light-receiving portion 62 is removed (see FIG. 6C). Thereafter, a new silicon nitride film 68 is formed (see FIG. 6D), followed by patterning thereof so as to form an anti-reflecting film 68a above the light-receiving portion 62 (see FIG. 6E).
FIGS. 6A to 6F are cross-sectional views to illustrate steps of another method for manufacturing a conventional solid-state imaging device. Similar to FIGS. 5A to 5B, on a silicon substrate 60 provided with a light-receiving portion 62 and a transfer channel portion 61, a three-layered gate insulating film including a silicon oxide film 63, a silicon nitride film 64 and a silicon oxide film 65, and a transfer electrode 66 are formed (see FIG. 6A and FIG. 6B). Then, after a silicon oxide film 67 is formed on the surface of the transfer electrode 66, the silicon nitride film 64 above the light-receiving portion 62 is removed (see FIG. 6C). Thereafter, a new silicon nitride film 68 is formed (see FIG. 6D), followed by patterning thereof so as to form an anti-reflecting film 68a above the light-receiving portion 62 (see FIG. 6E).
In general, as the etching for forming the transfer electrode, dry etching is carried out. However, in the manufacturing method shown in FIGS. 5A to 5C, when the dry etching is carried out, not only the polysilicon film but also the silicon oxide film 55 and the silicon nitride film 54 above the light-receiving portion 52 are etched (see FIG. 5B). As a result, the film thickness of the silicon nitride film, that is, the anti-reflection film 54a above the light-receiving portion 52 is reduced. Since the anti-reflecting effect is determined by the refractive index and film thickness of the anti-reflection film 54a, if the film thickness of the anti-reflection film 54a is reduced due to the dry etching, the anti-reflecting effect may be deteriorated.
On the other hand, in the manufacturing method shown in FIGS. 6A to 6E, after dry etching for forming the transfer electrode, the silicon nitride film 64 above the light-receiving portion 62 is removed and then the new silicon nitride film is formed as an anti-reflection film (see FIGS. 6C to 6E). Therefore, it is possible to avoid the reduction of the film thickness of the anti-reflection film and to achieve a sufficient anti-reflecting effect. However, since a step of removing the silicon nitride film 64 and a step of forming the new silicon nitride film 68 are required, the number of steps is increased, and the manufacturing efficiency is reduced.
With the foregoing in mind, it is an object of the present invention to provide a method capable of efficiently manufacturing a solid-state imaging device provided with an anti-reflection film and capable of suppressing the film thickness of the anti-reflection film from being reduced due to the etching.
In order to achieve the above-mentioned objects, a method for manufacturing a solid-state imaging device includes: forming a transfer channel portion and a light-receiving portion in a silicon substrate; forming a silicon oxide film on the silicon substrate; forming a silicon nitride film on the silicon oxide film, the silicon nitride film acting as a gate insulating film together with the silicon oxide film above the transfer channel portion and acting as an anti-reflection film above the light-receiving portion; forming a protection film on the silicon nitride film; forming a polysilicon film above the silicon nitride film via the protection film at least above the light-receiving portion; and etching the polysilicon film so as to form a transfer electrode above the transfer channel portion; wherein the etching of the polysilicon film is carried out so that the polysilicon film is removed above the light-receiving portion while the protection portion remains above the light-receiving portion.
According to such a manufacturing method, since the silicon nitride film constituting the gate insulating film and the silicon nitride film constituting the anti-reflecting film are formed in the same step, a solid-state imaging device provided with an anti-reflection film can be manufactured efficiently. Furthermore, in the etching for forming a transfer electrode, above the light-receiving portion, since the protection film is present on the silicon nitride film, it is possible to suppress the reduction of the film thickness of the silicon nitride film (i.e., anti-reflection film). Therefore, it is possible to form the anti-reflection film having a film thickness serving the anti-reflecting purpose, and to manufacture a solid-state imaging device that is excellent in sensitivity.
In the above-mentioned manufacturing method, it is preferable that the film thickness of the protection film is in the range from 5 nm to 100 nm at least above the light-receiving portion. It is preferable because it is possible to sufficiently suppress the reduction of the film thickness of the anti-reflection film due to the etching for forming the transfer electrode.
Furthermore, in the above-mentioned manufacturing method, it is preferable that the film thickness of the silicon nitride film is in the range from 5 nm to 100 nm at least above the light-receiving portion. It is preferable because a further excellent anti-reflecting effect can be achieved.
Furthermore, in the above-mentioned manufacturing method, it is preferable that the protection film is thinned or removed at least above the transfer channel portion before the polysilicon film is formed. It is preferable because a large transfer capacity can be secured in the charge transfer portion formed of the transfer channel portion and the transfer electrode.
With such a preferable embodiment, it is preferable that the protection film is thinned or removed above the transfer channel portion, and at least above a part between the transfer channel portion and the light-receiving portion. By thinning or removing the protection film in a region between the transfer channel portion and the light-receiving portion, the voltage for reading out the charge from the light-receiving portion to the transfer channel portion can be lowered.
Furthermore, with such a preferable embodiment, it is preferable that the film thickness of the thinned part of the protection film is 1 nm to 50 nm.
Furthermore, with such a preferable embodiment, it is preferable that a new insulating film is formed after the protection film is removed at least above the transfer channel portion before the polysilicon film is formed. In this case, it is preferable that the film thickness of the new insulating film is 1 nm to 50 nm.
In the above-mentioned manufacturing method, it is preferable that the film thickness of the silicon oxide film is allowed to be different between a part above the transfer channel portion and a part above the light-receiving portion before the silicon nitride film is formed. In this case, it is preferable that the film thickness of the silicon oxide film is 1 nm to 80 nm above the transfer channel portion and 1 nm to 100 nm above the light-receiving portion.
The film thickness of the silicon oxide film suitable for the gate insulating film is determined from the viewpoint of securing a sufficient withstand voltage and transfer capacity. On the other hand, from the viewpoint of anti-reflection, the suitable film thickness of the silicon oxide is determined by the relationship between the refractive index of the silicon substrate and the silicon oxide film and light entering the light-receiving portion. Therefore, both of the above-determined film thicknesses are not necessarily the same. However, with such a preferable embodiment, by adjusting the silicon oxide film so as to have the film thickness suitable for the gate insulating film above the transfer channel portion and to have the film thickness serving the anti-reflecting purpose above the light-receiving portion, it is possible to realize the improvement of sensitivity by the anti-reflection more sufficiently while securing a sufficient withstand voltage and transfer capacity in the charge transfer portion.
Furthermore, in the above-mentioned manufacturing method, it is preferable that the film thickness of the silicon nitride film is allowed to be different between a part above the transfer channel portion and a part above the light-receiving portion before the polysilicon film is formed. In this case, it is preferable that the film thickness of the silicon nitride film is 1 nm to 80 nm above the transfer channel portion and 5 nm to 100 nm above the light-receiving portion.
Similar to the above-mentioned silicon oxide film, in the silicon nitride film, the film thickness suitable for the gate insulating film and the film thickness suitable for the anti-reflection film are not necessarily the same. However, with such a preferable embodiment, the silicon nitride film can be adjusted so as to have the film thickness suitable for the gate insulating film above the transfer channel portion and to have the film thickness suitable for the anti-reflection film above the light receiving portion. Thus, it is possible to realize the improvement of the sensitivity by the anti-reflection more sufficiently while securing a sufficient withstand voltage and transfer capacity in the charge transfer portion.
Furthermore, in the above-mentioned manufacturing method, an additional insulating film is formed on the silicon nitride film at least above the light-receiving portion after the silicon nitride film is formed and before the protection film is formed. This additional insulating film works as an anti-reflection film together with the silicon nitride film. For example, a silicon nitride film can be used. Furthermore, the additional insulating film may be a multilayer film.
With such a preferable embodiment, it is easy to obtain the anti-reflection film having a film thickness serving the anti-reflecting purpose. Also, it is possible to realize the improvement of the sensitivity by the anti-reflection effect sufficiently.
In this case, it is preferable that the film thickness of the additional insulating film is allowed to be different between a part above the transfer channel portion and a part above the light-receiving portion before the polysilicon film is formed. At this time, it is preferable that the film thickness of the additional insulating film is 1 nm to 50 nm above the transfer channel portion and 1 nm to 100 nm above the light-receiving portion.
The total film thickness of the silicon nitride film and the additional insulating film formed on the silicon nitride film can be adjusted to the film thickness suitable for the gate insulating film above the transfer channel portion and to the film thickness suitable for the anti-reflection film. Thus, it is possible to realize the improvement of the sensitivity by the anti-reflection more sufficiently while securing a sufficient withstand voltage and transfer capacity in the charge transfer portion.

Method for manufacturing solid-state imaging device

Matsushita Electric Industrial Co., Ltd.


Solid state lighting components are provided with improved color rendering, improved color uniformity, and improved directional lighting, and that are suitable for use in high output lighting applications and can be used in place of CDMH bulb lighting. Exemplary solid state lighting components include a substrate comprising a light emitter surface and or more light emitters disposed on and/or over the light emitter surface. Exemplary components include a light directing optic and/or a diffusing optic for mixing light. The light directing optic may be disposed at least partially around a perimeter of the light emitter surface. The diffusing optic may be disposed between portions of the light directing optic and spaced apart from the light emitter surface.

Solid state light emitters are used in a variety of lighting components in, for example, commercial, automotive, and consumer lighting applications. Solid state emitters can comprise, for example, one or more unpackaged light emitting diode (LED) chips, and/or one or more packaged LED chips, wherein the chips can comprise inorganic and/or organic LED chips (OLEDs). Solid state emitters generate light via the recombination of electronic carriers (electrons and holes) in a light emitting layer or region of an LED chip. LED chips have significantly longer lifetimes and a greater luminous efficiency than conventional light sources. LED chips are also environmentally friendly unlike conventional metal halide bulbs. However, as LED chips are narrow-bandwidth light emitters, it can be challenging to simultaneously provide good color rendering and uniformity in combination with high luminous efficacy while maintaining and maximizing brightness and efficiency.
Lighting designers, manufacturers, and/or consumers have expressed the need for an alternative to and/or a replacement for costly and environmentally toxic ceramic discharge metal halide (CDMH) bulbs. CDMH bulbs also disadvantageously require a warm up time before emitting light, which is bothersome to consumers.
Challenges exist in incorporating solid state lighting sources into high output fixtures such as spot light, high-bay, and/or low-bay lighting applications, for example as found in retail locations where CDMH lighting has been used. Conventional solid state components utilize large form-factor diffusers that are placed either close in proximity to and/or directly on the light emitting chips, which results in color separation, color blotches, and/or color rings. Challenges exist in obtaining a uniform color and light output from solid state lighting fixtures.
Accordingly, room for improvement exists in providing solid state lighting components that exhibit improved color rendering, improved color uniformity, and improved directional lighting, and that are also suitable for use in high output lighting applications and can be used in place of CDMH bulb lighting.


A TV decoder. The decoder comprises a converter producing a plurality of first bits by sampling a base-band TV signal within a sampling period, and transmitting the first bits in groups, wherein the first bits in each one of the groups undergo parallel transmission through a plurality of first signals, and a demodulator receives the first bits and produces a plurality of second bits controlling the first signals, wherein the second bits are sequentially transmitted through a second signal input to the converter.

1. Field of the Invention
The present invention relates to a TV decoder, particularly to a TV decoder having a demodulator disposed in a graphic card and separated from an ADC.
2. Description of the Prior Art
FIG. 1 is a diagram showing a conventional TV decoder. A tuner 11 receives an RF-band TV signal RFTS and outputs a base-band TV signal BTS to a TV decoder chip 12. The TV decoder chip 12 has an analog-to-digital converter(ADC) 111 receiving the signal RFTS and produces image data bits by sampling the signal RFTS, and a demodulator 112. The image data bits are transmitted through signal DS to the demodulator 112. The demodulator 112 also producing control data bits transmitted through signal CS to the ADC 111. The signal CS carrying the control data bits controls a DC level and gain of the signal DS. Finally, the demodulator 112 produces a video signal VD to be processed by a graphic card 13.
In the previously described TV decoder 12, the ADC 111 and demodulator 112 are disposed on the same chip so that the TV decoder chip 12 is an external device connected to the graphic card 13 by a feature connector (not shown) and the transmission of the bits carried by the signals DS and CS is simply parallel.
However, it is costly to manufacture the TV decoder chip 12 having both of the ADC 111 and demodulator 112 since their manufacture processes are totally different. For the sake of cost, it is better to separate the demodulator 112 from the ADC 111, put it into the graphic card 13 and connect the ADC 111 to the graphic card 13 by the feature connector. Unfortunately, a large number of pins are needed between the ADC 111 and graphic card 13 due to the simply parallel transmission of the bits carried by the signals DS and CS, which is not compatible with the pin number of the feature connector.


A system for monitoring activities of a person. The system has a tethering device with a battery-powered transceiver and a securement device that is attachable to a person. The securement device is configured to prevent and detect tampering and attempts to remove the securement device from the person. The system further has a cellular telephone with a transceiver operable to establish a shorter range wireless connection with the tethering device transceiver, thereby permitting tethering device information to be transmitted to the cellular telephone.

Approximately 7 million people or 3.2% of all adults in North America are on probation, in jail or prison, or on parole. Billions of taxpayer dollars continue to be spent on prison construction each year, yet an estimated 3.8 million offenders are put on probation and another 400,000 individuals are released on parole from state and federal prisons and returned to the community each year. The enormous growth of the probation and parole population has outpaced available resources, and caseloads have expanded to unmanageable proportions. Many jurisdictions have instituted community-based alternatives to incarceration such as house arrest or electronic monitoring.
Electronic monitoring is an automated method of determining compliance with home confinement restrictions through the use of electronic devices. The most popular form of electronic monitoring uses a radio frequency ("RF") communication system; whereby a transmitter is attached to the offender's ankle and a corresponding receiver is placed in the offender's home. The receiver is attached to the offender's telephone line and sends information to a central computer station. The transmitter on the offender's ankle continuously signals the receiver and has a predetermined range. If the offender exceeds that range or tampers with the equipment, the receiver calls the central computer station; an alarm is generated; and the authorities are notified.
RF communication systems only monitor the presence or absence of the offender at their residence. Furthermore, the central computer can be programmed for scheduled away times or "leaves" to allow the offender to go to work, attend school or counseling, or run errands such as grocery shopping. During these away times, the offender is not being monitored. As probation and parole agencies are forced to accept higher risk offenders from the overburdened corrections system, there is a desire for electronic monitoring systems that provide more information and accountability to maintain public safety.
In the mid-1990's companies began developing and testing electronic monitoring equipment having global positioning system ("GPS") capability. As with any new technology application, early GPS units were cumbersome and unreliable. Today, three companies have emerged with viable GPS units; however, there are still shortcomings that have limited their acceptance.
Known GPS units often use a two-piece system consisting of an RF transmitter attached to the offender's ankle and a tracking unit that the offender must carry with them while away from home. The transmitter electronically tethers the offender to the tracking unit and generally has a range of between 10 and 30 feet. There are two types of GPS tracking units: active and passive. Active GPS tracking units automatically determine their location and call their location in to a central computer station at regular intervals. In addition, any violations such as tampering with the equipment or violating an inclusion or exclusion zone rule (Geo-fencing) are called in immediately; and the unit can also be polled to obtain up to the minute information. A cellular communications link is used by these units, which requires that the active GPS units be in an area with good cellular coverage. Passive GPS units store all the information they obtain, including any violations. When the offender returns home, the passive GPS unit is placed in a docking station connected to a telephone line and information from the passive GPS unit is downloaded to the central computer station.
Current active GPS units are expensive, require good cellular coverage and frequent battery charging, whereas passive units do not give real time information, which minimizes their effectiveness in providing offender accountability and appropriate public safety.
All of the currently available electronic monitoring products and services (including GPS-based) are proprietary systems. The ankle band transmitter, the receiver or tracking device, central monitoring computer and software have all been specially designed at great expense. This cost must be recouped in the price of the equipment and service. In addition, such proprietary systems limit the innovation and technological advances that may be later integrated. Any changes and improvements require a substantial development cost that must be amortized over a relatively long period of time. Therefore, much of the equipment currently in use is either very expensive, uses old technology or both.
Therefore, there is a need for an improved tracking system that does not have the above-described disadvantages.

Device and method for tethering a person wirelessly with a cellular telephone


A process for the sulfuric acid catalyzed alkylation of C3-C5 olefins with isobutane is disclosed wherein the requisite mixing is accomplished by the use of eductors within the reactor. In addition the alkylate product is subjected to primary and secondary coalescers for removal of entrained sulfuric acid. The vaporized unreacted C4's are recovered as liquid by absorption and desorption in an absorber oil.

1. Field of the Invention
This invention relates to a reactor/mixer design and process for an alkylation process wherein C3, C4 and C5 olefins are reacted with isobutane to produce alkylate in the presence of sulfuric acid catalyst. In one embodiment the invention more particularly relates to a process and apparatus wherein an eductor is used in lieu of mechanical mixer to mix the sulfuric acid and hydrocarbons. In another embodiment more particularly the invention relates to a process wherein new the C3/C4 vapors from the auto refrigeration may be used in lieu of refrigeration compression. Finally in a third embodiment successive coalescing devices are used to remove the acid from the hydrocarbon to ppm level.
2. Related Information
The conventional sulfuric acid catalyzed alkylation process has been practiced in the past using mechanical propeller mixers which require complex seals. The internal mixer and seals are subjected to a hostile environment (strong sulfuric acid which is used as catalyst for the process) which is demanding. To provide the mixing and tight emulsion required for the process considerable energy is necessary for each contactor/reactor. The impellers/seals used require considerable maintenance. To facilitate the mixing conventional processes are carried out at temperatures so as to keep the viscosity low, and these temperatures are not optimum temperatures to make high octane product with low acid consumption. The operating expense of the conventional process together with complicated mixing device which has been known to require higher maintenance can be reduced.
The alkylate product in the refinery economics of gasoline, normally has very good return on investment based on the conventional process, but still the units require high investment, maintenance and liquid waste disposal. The hydrofluoric acid (HF) alkylation does not require refrigeration and acid regeneration so it is marginally better in that respect, but due to the high corrosive nature of the HF acid, exotic materials of construction are required. The process is also much more hazardous due to the HF acid, and is not readily acceptable environmentally.
Mixing devices for mixing the hydrocarbons and acids have been variously disclosed in U.S. Pat. Nos. 5,443,799; 3,696,168; 3,133,128; 4,000,212; 3,758,613 and 5,220,094. All of these patents disclose mixing devices with spray nozzles/spargers/venturi which are all low efficiency mixing equipment options and in most cases have been applied to HF Alkylation which have better reaction kinetics than sulfuric acid alkylation. The art listed in the above referenced patents does not meet the hydrodynamic requirements of an eductor with divergent portion after the nozzle. The previous art is a mixture of spray nozzles/spargers and venturi devices that produce mild mixing and are not suitable for sulfuric acid alkylation high efficiency mixing requirements. Spray nozzles and spargers do mix the liquid but they doe not provide the high efficiency as provided by an eductor. As noted, most of these earlier patents have been for HF Alkylation, though some are broad in sense but as these are do not provide the same efficiency and hydrodynamics, they cannot be accept as equivalent to eductors due to major hydrodynamics differences.
The vapor from this flash drum can be sent to an absorption column or to a compressor intermediate stage, or if the flash is done at higher pressure it can be condensed separately and recycled to the reactor with olefin feed and isobutane
Due to the side reactions taking place in the process due to the impurities, acid soluble oils (ASO) which are conjunct polymers, are produced which reduce the acid concentration and fresh acid make up is needed to overcome this loss. The acid soluble oil is sent to the acid regeneration unit. The cost of acid regeneration for low acid consumption unit is about 20% of the operating cost of the alkylation unit.


In a print system, where whole processing to generate final print data is carried out at a server, concentrated requests from many and unspecified clients, being the feature of Web communication, will increase the load on the server.

1. Field of the Invention
The present invention relates to network print systems configured to generate print data, e.g., of a chit and print the chit via a network.
2. Related Background Art
With quick development of Internet and increase in the number of Web servers, business tasks are being directed toward processing on Web. When personal computers, connected to a network, are solely loaded with a Web browser capable of display of information and entry of information, it is feasible to handle business tasks by the Web browser and Web server, which is becoming widespread. In this case, information necessary for performance of the tasks is exchanged between the Web server and the Web browser.
The Web server receives input information from the Web browser, processes the information, and sends the processed information again to the Web browser. The Web server presents display of the thus processed information. These actions are repeated to carry out the tasks.
There was, however, an issue in the performance of tasks by the Web browser and Web server, concerning the print operation indispensable for the performance of tasks. In particular, it was impossible to make satisfactory prints according to a format, e.g., for chits.
The typical Web browsers provide the print function, but this function is to make a printer under the Web browser (or a printer under a computer on which the Web browser is active) print a hard copy of an image displayed on the Web browser. In this print method, there arises an issue of how to make a page break for an image over a sheet size or for an image across plural pages, and it is often the case that the resultant print does not meet a user's desire.

Information processing apparatus, information processing method and print systems

Abstract: For overcoming it, it is made feasible to distribute data necessary for generation of chit print data by overlay processing, from the server to a client or to a print server and execute the overlay processing at the client or at the print server to generate the chit print data.


A semiconductor device having a power switch (12) and a saturation detection diode (13) formed in an upper surface of a semiconductor drift region (11) is provided. The saturation detector diode (13) and the power switch (12) are electrically coupled by the drift region (11). An external signal applied to the detector diode (13) forward biases the detector diode (13) when the drift region (11) potential is below a predetermined voltage and the detector diode (13) becomes reverse biased when the drift region (11) potential is greater than the predetermined voltage.

The present invention relates, in general, to semiconductor switches, and more particularly, to semiconductor switches with integral on-state voltage detection capability.
Power transistors, including MOSFETs, bipolar transistors, and insulated gate bipolar transistors (IGBTs) are well known devices for switching high power loads. High power switches have two current carrying electrodes and a control electrode and are characteristically able to control high current, high voltage, or both. Because power switches are exposed to high currents and voltages, there exists a constant danger of overheating resulting in permanent damage to the semiconductor switch.
High power switches must support high voltage when the device is off and support high current when the device is on. When a power switch is off, little current flows between the current carrying electrodes and so large voltages across the current carrying electrodes dissipate little power in the device. When a power switch is on, voltage across the current carrying electrodes is normally quite low, thus large currents flow through the current carrying electrodes with high but manageable power dissipation.
Designers of power control circuits, power control modules, and power semiconductor devices are concerned with protection of power switches. Control circuits using many discrete components or integrated circuits are often used to detect dangerous conditions and turn the power switch off to limit power dissipation. These control circuits monitor device temperature with a temperature sensor located near the power switch, or monitor current through the device. One problem with temperature sensing circuits is they react slowly to a dangerous condition because thermal signals are transmitted much slower than electrical signals. Temperature sensing circuits also require elaborate and expensive packaging and assembly to place a temperature sensor sufficiently close to the power switch.
Current sensing circuits can limit power dissipation effectively, but at a great sacrifice in power switching capability. High currents are usually dangerous only when an excessive on-state voltage simultaneously appears across the current carrying electrodes. Current sensing and limiting circuits do not prevent the semiconductor switch from operating in an excessive on-state voltage condition, but instead prevent high currents which could cause damage only if the device did enter the high on-state voltage region. Current sensing circuits are thus more appropriate for preventing damage to external components which are driven by the power switch than for protecting the power switch itself.
Accordingly, it is desirable to have a high power semiconductor switch which detects an excessive on-state voltage condition, while not limiting the switch's current carrying or voltage switching capability.

High power semiconductor device with integral on-state voltage detection structure


The present invention relates to a photochromic fluorescent polymer and a preparation method thereof, and more particularly, to a photochromic fluorescent polymer having bonds between diarylethenes and aryethene-vinylene precursors with a weight average molecular weight of 500 to 1,000,000, which exhibits highly improved photochromic and fluorescent characteristics compared to conventional photochromic fluorescent materials and excellent solubility to organic solvents, thus being applicable for photofunctional materials and information processing device such as optical recording, optical switches, non-destructive optical recording materials.

Photochromic materials change colors reversibly with irradiation of light and suitable for various applications such as optical recordings, optical switches, modulators, and the like. Investigations have been performed to develop novel photochromic materials which are applicable for optical information recoding medium capable of reproducing information signals or recording and reproducing information signals by using light beams.
Irie et al. have reported processes for preparing photochromic diarylethene compounds, which have excellent photochromic property and durability, and their uses (Masahiro Irie, Chem. Rev., 2000, 100(5), 1685–1716). However, these photochromic diarylethene compounds have a drawback such as gradual erasing of the record due to poor fluorescent property.
In order to be free from the above problem, Lehn et al. have developed dithienylethene-tungsten compounds having fluorescent property (Fernandez Acebes A, Lehn J. M., Advanced Materials, V.10 N.18, 1519, 1998). However, it has another drawback that a short wavelength of 240 nm has to be irradiated to these compounds to exhibit fluorescence. In other words, it requires high energy.
Irie et al. have also developed fluorescent diarylethenes substituted with diporphyrin or triphenylimidazole (Journal of Organic Chemistry, V.66 N.16, 5419–5423; V.66 N. 11, 3913–3923, 2001). However, these compounds has poor photochromic property and low solubility, thus being inapplicable for manufacturing thin film thereof.

This patent is subject to a terminal disclaimer.

Photochromic fluorescent polymer and preparation method thereof

Korea Research Institute Of Chemical Technology


In a wireless communication system (106), base stations (118, 120) are connected to a backbone network (116) such as a wired LAN and act as access points and relays for remote stations (128, 132, 136). A remote station registers and performs bidirectional communication with one of the base stations designated as its home base station. Base stations have overlapping coverage areas where a remote station is within reception range of several base stations. Such communication system may for instance be a multicell radio LAN using frequency hopping signaling. The method allows reuse of a limited number of network resources such as frequency hopping patterns and assign the same resource to several active base stations. Upon request from a base station, a network controller (110) connected to the backbone network computes a distance index between the requesting base station and the other active base stations and assigns to the requesting base station the same network resource as the one assigned to another base station with the highest distance index. Information about cells overlaps is centralized in a control database (109) and used by the network controller to compute distance indexes.

In a wireless LAN network various configuration parameters or network resources have to be maintained and distributed as base stations and remote stations enter or leave the network. A typical wireless LAN topology is divided into cells. Associated with each cell is a base station connected to a backbone network which acts as an access point and relay for remote stations. To become part of the network, remote stations have to register with one of the base stations. All communications between the remote station and other entities are subsequently handled by the base station with which the remote station has registered. For instance a multicell radio LAN installation based on slow frequency hopping spread spectrum signaling may consist of a set of base stations with overlapping coverage areas. In a frequency hopping (FH) system, the carrier frequency of the transmitter changes at intervals of time, remaining constant between those instants. The period of constant frequency is called a hop and messages may be exchanged during these hops. Efficient methods for controlling and minimizing radio interference between overlapping cells are essential to the reliability and performance of such radio LAN installations. The transmission and reception of messages in a cell of a multicell network of the type that employs identical communication frequencies in different cells, requires control of interference between users. This interference may occur from several sources including transmission from remote stations that lie in overlapping areas between adjacent cells and transmissions from base stations if these overlapping cell areas contain one or more remote users. Assigning different frequency hopping sequences or patterns to base stations with overlapping coverage areas allows control and limit interferences.
The following U.S. Patents and European Patent applications teach various aspects of mobile communications using wireless transmission media.
U.S. Pat. No. 5,239,673 teaches a scheduling method for efficient frequency reuse in a multi-cell wireless network served by a wired local area network. One method of the invention circulates a high priority token among a plurality of header stations connected to the wired network. Reception of the token causes the receiving header station to perform wireless communications. When finished, the header station forwards the token to another header station.
The following two U.S. Patents show communication systems having overlapping coverage areas: U.S. Pat. No. 4,597,105, Jun. 24, 1986, entitled "Data Communications System having Overlapping Receiver coverage Zones" to Freeburg and U.S. Pat. No. 4,881,271 issued Nov. 14, 1989, entitled "Portable Wireless Communication Systems" to Yamauchi et al. provide for a hand-off of a subscriber station from one base station to another by the base station continually monitoring the signal strength of the subscriber station.
The following U.S. Patents teach various aspects of wireless communication networks.
In U.S. Pat. No. 4,792,942, issued Dec. 20, 1988 entitled "Wireless Local Area Network for Use in Neighborhoods" S. Mayo describes a local area network that includes transceiver stations serially coupled in a loop.
In U.S. Pat. No. 4,730,310 issued Mar. 8, 1988 entitled "Terrestrial Communications Systems" Acampora et al. describe a communications system that employs spot beams, TDMA and frequency reuse to provide communication between a base station and remote stations.
In U.S. Pat. No. 4,639,914, issued Jan. 27, 1987 entitled "Wireless PBX/LAN System with Optimum Combining" Winters discloses a wireless LAN system that employs adaptive signal processing to dynamically reassign a user from one channel to another.
In U.S. Pat. No. 4,926,495, issued May 15, 1990 entitled "Computer Aided Dispatch System" Comroe et al. disclose a computer aided dispatch system that includes a master file node and a plurality of user nodes. The master file node maintains a record for each subscriber and automatically transmits an updated record to each dispatcher attached to a subgroup in which the subscriber operates.
In U.S. Pat. No. 4,456,793, issued Jun. 26, 1984 W. E. Baker et al. describe a cordless telephone system having infrared wireless links between handsets and transponders. The transponders are wired to subsystem controllers that are in turn wired to a system controller. The central controller polls the cordless stations every 100 milliseconds to detect cordless station locations and to identify "missing" cordless stations.
In U.S. Pat. No. 4,807,222, issued Feb. 21, 1989 N. Amitay described a LAN in which users communicate with RF or IR signals with an assigned Regional Bus Interface Unit (RBIU). Protocols such as CSMA/CD and slotted ALOHA are employed in communicating with the RBIUs.
In U.S. Pat. No. 4,402,090 issued Aug. 30, 1983, F. Gfeller et al. describe an infrared communication system that operates between a plurality of satellite stations and a plurality of terminal stations. A host computer communicates with the terminal stations via a cluster controller and the satellite stations, which may be ceiling mounted. Communication with the terminal stations is not interrupted even during movement of the terminal stations.
In IBM Technical Disclosure Bulletin, vol. 24, No 8, page 4043, January 1982 F. Gfeller describes general control principles of an infrared wireless network incorporating multiple ceiling mounted transponders that couple a host/controller to multiple terminal stations. Access to the uplink channel is controlled by a Carrier Sense Multiple Access/Collision Detection (CSMA/CD) method.
What is not taught in the prior art is a method for reusing frequency hopping patterns thus allowing operation of frequency hopping wireless LAN's with a number of base stations greater than the number of existing frequency hopping patterns. More generally such method applies to the allocation of other kinds of network resources, such as a limited pool of remote stations addresses. In addition the method of the invention applies as well to wireless systems using different signalling techniques such as for instance direct sequence spread system radio frequency signalling or infrared and more generally to any communication system using a multiple access shared communication medium.

Allocation method and apparatus for reusing network resources in a wireless communication system

International Business Machines Corporation


Electro-impulse intracorporeal lithotripsy comprises bringing electrodes of a probe in immediate electrical contact with the calculus and supplying to the electrodes of very short high voltage impulses capable to ignite electrical spark discharge and establish a discharge channel within the bulk of the calculus. The channel goes through the calculus and creates tensile stresses, destroying the calculus.

Shock-wave lithotripsy stone fragmentation treatment employs high-energy shock waves to fragment and disintegrate calculi and it can be broadly categorized according to the pattern of energy transfer to the calculi. In this connection lithotripsy can be classified as extracorporeal and intracorporeal. The comprehensive overview of various lithotripsy methods can be found in various sources, e.g. in the Internet site http://www.bsci.com. In accordance with the acceptable definitions shock-wave extracorporeal lithotripsy is a process, which transfers energy needed for stone fragmentation in the form of shock waves from an outside source through body tissue to the calculi. Extracorporeal shock wave lithotripsy (ESWL) has proven effective in achieving stone fragmentation. However, since the energy wave transmission is indirect, and in order to carry out the treatment successfully it is required precise directional focusing of the energy at the stone through intervening body tissue. This might be associated with damaging of the intervening tissues and therefore additional treatments might be required to take care of the damage.
Intracorporeal lithotripsy utilizes a probe advanced with the aim of endoscope and positioned in proximity to the calculus. The energy, required for fragmentation is transferred through the probe to the calculus and the treatment process is visualized during fragmentation. The mode of energy transfer may be different and accordingly the intracorporeal lithotripsy techniques are divided into following groups: ultrasonic, laser, electro-hydraulic and mechanic/ballistic impact.
The last group comprises, for example, detonating an explosive near the stone and causing the shock wave generated by the explosion to act directly upon the stone and crush it into pieces. An example of such technique is disclosed in U.S. Pat. No. 4,605,003, referring to a lithotriptor comprising an inner tube inserted within an outer slender tube and provided with an explosive layer or a gas-generating layer. By the blasting of the explosive layer or the gas-generating layer, the outer slender tube or the inner tube is caused to collide with the stone and crush it.
An example of mechanical impact technique can be found in U.S. Pat. No. 5,448,363 in which is disclosed an endoscopic lithotriptor provided with a hammer element to periodically strike the stone. The hammer element is pneumatically driven by a linear jet of air causing it to swing through an arc about a pivot to impact an anvil.
There are known also many other patents, disclosing lithotriptors, which operation is based on mechanic/ballistic principle, e.g. U.S. Pat. Nos. 5,722,980, 6,261,298.
An example of laser technique is described in U.S. Pat. No. 4,308,905, concerning multi-purpose lithotriptor, equipped with laser light-conducting fibers, through which the energy required for crushing the stone is conducted.
Ultrasonic technique is relatively popular and because of its safety and usefulness is widely accepted. According to this principle ultrasound probe emits high-frequency ultrasonic energy that has a disruption effect upon direct exposure to the stone. Direct contact of the probe tip and stone is essential for effectiveness of ultrasonic lithotripsy. This technique is implemented in many lithotriptors, e.g. as described in U.S. Pat. No. 6,149,656.
The most relevant to the present invention is electro-hydraulic technique, which utilizes electric discharge, ignited between two electrodes disposed within the probe and producing shock wave, expanding towards the calculus through liquid phase, which surrounds the calculus. In the literature electro-hydraulic lithotripsy is defined as the oldest form of "power" lithotripsy. The electro-hydraulic lithotriptor releases high-energy impulse discharges from an electrode at the tip of a flexible probe, which is placed next to the stone. It is considered as highly effective means of bladder stone shattering and has become an accepted practice for this use. Since the generated during electro-hydraulic lithotripsy treatment shock waves are of sufficient force the probe must not be used 5 mm or closer to soft tissues otherwise severe damage will result.
Since the discharge takes place within liquid phase the calculus is destroyed by virtue of combination of energy of the shock wave, caused by the discharge, hydraulic pressure of the surrounding liquid and collision of fragments in the liquid flow. Below are listed some references, referring to intracorporeal lithotripting devices, utilizing the electro-hydraulic principle.
A typical electro-hydraulic lithotriptor is described in CA 2104414. This apparatus is intended for fracturing deposits such as urinary and biliary calculi as well as arteriosclerotic plaque in the body. The lithotriptor comprises a flexible elongated guide member adapted for insertion within the body, means for supplying a working fluid, a hollow tube mounted on the distal end of the probe, means for initiating an electric spark within the hollow tube from an external energy source, capable of generating pulsed shock waves in the working fluid for impinging the stone and a nozzle, which is made of shock and heat resistant material and mounted on the distal end of the guide member. The nozzle is capable of directing the shock waves to a focal point for impinging the stone. The lithotriptor is provided also with optical viewing system.
In U.S. Pat. No. 2,559,227 is disclosed an apparatus for generating shock. The apparatus comprises a truncated ellipsoidal reflector for reflecting the shock waves and a cavity constituting a chamber for reflecting said shock waves. The cavity has the same truncated ellipsoidal shape, while one of the two focal points of the ellipsoid being disposed in the cavity opposite the truncated part. The cavity is filled with a liquid for transmitting the shock waves, for example oil. The apparatus is provided with a shock wave generator device, conventionally comprising two electrodes disposed at least partly inside said cavity. The two electrodes are arranged to generate an electric arc discharge at the focal point located in the cavity opposite the truncated part. The apparatus has also means for selectively and instantaneously delivering an electric voltage to said two electrodes provoking electric arc discharge between said electrodes thus generating shock waves propagating through the liquid contained in the cavity. The electrodes are made of highly conductive material such as copper or brass and are mounted on an insulator with possibility for adjusting the spacing therebetween.
In DE 19609019 is described an impact probe, provided with at least one electrode guided in the tube. The electrode acts on the object when the probe is longitudinally moved in the direction of the object e.g. a stone. Electro-hydraulic pressure wave is produced at the free end of the probe.
It should be stressed that since the probe in conventional electro-hydraulic lithotriptors is not in physical contact with the calculus many efforts are undertaken to focus the maximum of discharge energy immediate on the calculus. An example of such an attempt is electro-hydraulic lithotriptor, known under the trade name THE AUTHOLITH and manufactured by Northgate Technologies. It should be noted, however, in this lithotriptor the energy of shock wave still is transferred via a layer of liquid, remaining between the discharge gap of the probe and the calculi.
The efficiency of electro-hydraulic lithotriptor in terms of its ability to fragment a calculus depends on voltage and duration of electrical pulses, required for achieving breakdown and initiating the spark discharge, since these parameters are interrelated with the amount of energy, which can be produced by the lithotriptor. Commercially available electro-hydraulic lithotriptors, e.g. lithotriptor RIVOLITH 2280 manufactured by Richard Wolf, are provided with pulse generators, capable to generate pulses with pulse rise time of about hundreds nanoseconds and pulse duration of about hundreds of microseconds.
It can be easily appreciated that since the energy is transferred not immediate to the calculus but via a liquid medium, the amount of energy required for fragmentation should be sufficient to overcome the strength of the calculi and to cause its failure after the energy has been delivered through the working liquid (water or urea or physiologic solution). Electric pulses having duration parameters of commercially available lithotriptors allow producing rather high energies of about 2.5-3 joule, which is sufficient for producing stresses capable to fragment various calculi, appearing in the human body.
Unfortunately, release of such high levels of energy by producing shock waves might be harmful to the adjacent tissues and therefore potentially dangerous for the patient.
The further disadvantage of the known in the art electro-hydraulic lithotriptors is associated with their inability to detect and monitor the onset of fragmentation. Since the pulse generator continues to generate pulses after the calculus has been already fragmented, unnecessary energy is produced and its release unnecessary endangers the patient.
Still further drawback of the electro-hydraulic lithotriptors is associated with the necessity to have numerous electric discharges when it is required to destroy especially large and dense calculus. Since the discharge takes place on the surface of the probe insulation, it deteriorates the insulation of the probe tip and may cause its failure even before the treatment session is completed.
Still another problem of almost all intracorporeal lithotriptors that are intended for destroying renal calculi by bringing mechanical energy of impact or shock wave is the fact that the stone is usually "displaced" with each pulse of energy, leaving the previous place and being "thrown" to another one. This renders the operation complicate and may cause mechanical damage to the surrounding tissue. Physical "anchoring" of the treated stone would be desirable here.
An attempt to solve this problem and to extend service life of the probe and at the same time to improve treatment efficiency without rise of harm to the patient is disclosed in DE 3927260. In this patent is described a probe for electro-hydraulic lithotripsy, which is provided with a head made of impact-resistant ceramic in the form of a round bass-rod. The rod has two longitudinal channels into which leads are inserted and anchored by a resin material, the ends of the leads being flush with the end face of the rod. Leads pass to a plug via a flexible hose, which extends over the head.
Nevertheless, this particular solution is not designed for immediate physical contact between the probe tip producing a shockwave and the calculus.
There are known lithotriptors, in which such "anchoring" is possible, e.g. a combined holding and lithotripsy instrument, disclosed in DE 19810696. This combined instrument consists of a highly elastic Ni Ti alloy and has at least three holding arms, which in their unflexed state are curved in a tulip-like manner. The end of each holding arm is toothed and bent towards the instrument axis. When the holding arms are drawn into the instrument tube or working channel they position themselves on the calculus and grasp it when they are drawn in even further. The holding device is configured around the instrument axis in such a way that the angle between directly adjacent holding arms is never equal to or greater than 180 DEG C. This ensures secure holding and grasping and thus prevents the grasped calculus from escaping sideways. The securely held calculus can then be fully fragmented to fragments of a predetermined size using the lithotriptor, i.e. either mechano-ballistically, or by ultrasound, cryogenically or thermally with laser light.
Unfortunately this construction is not suitable for electro-hydraulic mode of operation since the probe tip is not designed to carry electrodes provided with electric insulation and is not therefore capable of producing shock waves, caused by electrical discharge.
On the other hand there is known for some time a method of so-called high-power electro-impulse destruction of materials, which is based on the fact that applying of electrical impulses with the rise time of not more than 500 nanoseconds to two electrodes positioned on a solid mineral material immersed in water is associated with producing discharge, which does not propagate through the surrounding liquid medium, but rather through the bulk of the solid body. This technology was developed in late fifties in Russia and since then it has been successfully implemented in such fields like crushing and disintegration of hard rocks and ores in mining industry, destructing of concrete blocks in building industry, drilling of frozen ground and extremely hard rocks, crushing of various inorganic materials, etc.
A survey of this technology can be found in a monograph "Basics of electro impulse destroying of materials", by Semkin et al., Sanct-Petersburg, Nauka, 1993.
According to this technology two or more electrodes are placed immediate on the surface of a solid body (rock) and very short impulses of voltage U(t) are sent through them. Once an electrical breakdown between the electrodes is initiated, it occurs in the bulk of the solid body and is associated with producing of the breakdown discharge channel that extends within the bulk of the body. The body itself serves as a medium to promote propagation of the electrical breakdown rather than the surrounding medium. Extension of the discharge channel through the body is accompanied by mechanical stresses, which stretch the body and destroy it as soon as the tensile strength of the body is exceeded. In fact in the process of electro-impulse destroying the initiation and propagation of the discharge is similar to a micro explosion within the body. It can be readily appreciated that since tensile strength of a rock is at least an order of magnitude less than its compressive strength, the electro-impulse crushing is associated with consumption of much less energy, than conventional electro-hydraulic crushing.
It has been also empirically established, that the probability of propagation of the breakdown channel through the body is higher when a very short voltage impulses are applied to electrodes, positioned on a solid body immersed in a liquid medium, since the voltage required for the breakdown within the bulk of the body is less, than the voltage required for breakdown within the liquid medium outside of the body.
Unfortunately despite the fact that this technology exists for more than 40 years it still has been employed mainly in mining and building industry for destruction of very large objects like rocks or concrete blocks.
An example of this application is disclosed in WO 9710058, in which is described method of comminuting and crushing solids, for example, blocks of reinforced concrete. In accordance with this method the solid is exploded as a result of shock waves being produced therein.
Unfortunately the obvious benefits of this technology associated with more efficient destruction were never considered for employing in such completely new application, like medicine in general and intracorporeal lithotripsy in particular.
In conclusion it should be emphasized that despite the fact that numerous lithotriptors have been devised there is still a need for a new approach that will ensure efficient, reliable, easy and safe fragmentation of calculi during intracorporeal lithotripsy.

Method for intracorporeal lithotripsy fragmentation and apparatus for its implementation


Actual correlation data is stored at 38A. Such actual correlation data is data representation(s) of correlation(s) between or among distance(s) to object(s) intended to be detected and phase difference(s) of respective reflected wave(s) established with due consideration having been given to reflection of microwave(s) by object(s) (ceiling surface(s), wall surface(s), floor surface(s), etc.) other than object(s) intended to be detected which may be present within area(s) intended to be protected. Distance(s) to object(s) intended to be detected is or are measured, based on such actual correlation data, from phase difference(s) of respective reflected wave(s) that has or have been detected.

Conventionally known as one security device is an MW sensor wherein microwaves are transmitted toward protected area(s), and, in the event that person(s) is or are present within protected area(s), wave(s) reflected from such person(s) (microwave(s) modulated due to the Doppler effect) are received and person(s) (intruder(s)) is or are detected (e.g., Japanese Patent Application Publication Kokai No. H7-37176 (1995)).
Moreover, also known as one type of MW sensor is a device which employs a plurality of microwaves of different frequency and which is constituted so as to permit measurement of distance(s) to object(s). In this type of sensor, microwaves of, for example, two different frequencies are transmitted toward protected area(s), and phase difference(s) between two IF signals based on respective reflected waves is or are detected. Correlation(s) exist between or among such phase difference(s) and distance(s) to target(s) (person(s) and/or other such object(s) intended to be detected), phase difference(s) tending to increase with increasing distance(s) to target(s). In other words, distance(s) to target(s) can be measured by calculating such phase difference(s). Below, operations for detection of phase difference(s) between/among IF signals in this type of sensor are described. Taking the case where IF signals based on waves produced by reflection of microwaves of two different frequencies are sinusoidal waves IFout1, IFout2 (having a phase difference corresponding to distance to target) as shown at FIG. 3 (a), rectangular waves A, B derived from these IF signals might respectively be as shown at FIG. 3 (b). It will, moreover, be possible to measure the distance to the target by detecting the phase difference between these rectangular waves A, B (the phase difference Δt at the rising edge portion of the rectangular waves in the drawing).
However, where this type of sensor is installed indoors, measurement errors may occur due to the influence of microwaves reflected by ceiling surface(s), wall surface(s), and/or floor surface(s). More specifically, for targets present at the extreme near side of the sensor range (e.g., on the order of 0 to 2 m) or targets present at locations relatively distant from the sensor (e.g., locations 8 m or more from the sensor), such measurement errors are small. However, for targets present at locations other than the foregoing (e.g., locations on the order of 3 to 7 m from the sensor), it is possible that measurement error will be large. The reason this is the case is described below.
Referring to FIG. 4 (a), description is first made with respect to a situation where the target is present at the extreme near side of the sensor range. Receiving antenna(s) for this type of sensor "a" are chosen such that directionality with respect to reception of reflected waves received from the front (reflected waves in horizontal direction(s) which are directed toward the left in the drawing) is high; and conversely, such that directionality with respect to reception of reflected waves from the side(s) and from regions thereabove and therebelow (e.g., the reflected wave indicated by the alternating long and short chain line in the drawing) is low. For this reason, if target "b" is present at the extreme near side of the range of sensor "a", microwaves from sensor "a" will directly irradiate target "b", these will also be directly reflected therefrom onto sensor "a" (the irradiated wave and reflected wave indicated by solid lines in the drawing; reflected waves received in such fashion being hereinafter referred to as normally reflected waves), and the received reflected wave signal level will be high with respect thereto. In contrast thereto, the received signal level will be extremely low for signals received at sensor "a" after reflection by ceiling surface "c", floor surface "d", and so forth as indicated by alternating long and short chain lines in the drawing. For this reason, because the reflected waves forming the IF signal for measurement of distance to target "b" are for the most part made up of the normally reflected waves indicated by the solid lines in the drawing, there is almost no occurrence of measurement error.
Referring to FIG. 4 (b), description is next made with respect to a situation where target "b" is present at a location relatively distant from sensor "a". In such a situation, where irradiated waves are reflected by ceiling surface "c" or the like as indicated by the dashed line in the drawing, or where reflected waves are reflected by floor surface "d" or the like as indicated by the alternating long and short chain line in the drawing, the path taken by microwaves will be longer than the path taken by normally reflected waves (the path indicated by solid lines in the drawing). However, because the distance to target "b" is large, it is possible to hold the difference between the foregoing paths to a value at or below on the order of 10 percent as a fraction of the distance to this target "b". For example, taking a case where target "b" is present at a distance of 10 m from sensor "a", even if the difference between the foregoing paths is as much as 1 m it will still be possible to hold the error to values at or below 10 percent. For this reason, errors due to reflection of microwaves at ceiling surface "c" and floor surface "d" have almost no effect.
In contrast thereto, where, as shown at FIG. 4 (c), target "b" is located neither at the extreme near side of the range of sensor "a" nor at a far distance from sensor "a", reflected waves received at sensor "a" after reflection by floor surface "d" and so forth as indicated by alternating long and short chain lines in the drawing will be received from angles near the front of the antenna, and the received signal level of such signals will be relatively high. Furthermore, where irradiated waves are reflected by ceiling surface "c" or the like as indicated by the dashed line in the drawing or where reflected waves are reflected by floor surface "d" or the like as indicated by the alternating long and short chain line in the drawing, the path taken by microwaves is longer than the path taken by normally reflected waves. Because the distance from sensor "a" to target "b" is also relatively short it is possible that the difference between the foregoing paths could be large (e.g., on the order of 50 percent) as a fraction of the distance from this sensor "a" to target "b". In other words, reflected waves traveling via paths much longer than paths of normally reflected waves are received at sensor "a" with relatively high received signal levels. For this reason, IF signals being formed from waves representing superposition of the foregoing normally reflected waves and reflected waves traveling via paths longer than paths of such normally reflected waves, measurement errors arising due to the influence of the latter, i.e., reflected waves (reflected waves traveling via paths longer than paths of normally reflected waves) will increase, greatly impairing reliability of sensor "a".
Such problems are not limited to situations in which MW sensor(s) is or are installed indoors, but will also occur in similar fashion where MW sensor(s) is or are installed outdoors if object(s) constituting obstacle(s) is or are present within area(s) intended to be protected and microwaves are reflected by such object(s).


Electronic systems are described including semiconductor circuitry characterized by first signals and all-metal circuitry characterized by second signals and comprising a plurality of transpinnors. Each transpinnor includes a network of thin-film elements. At least one thin-film element in each transpinnor exhibits giant magnetoresistance. Each transpinnor includes a conductor inductively coupled to the at least one thin-film element for controlling operation of the transpinnor. Interface circuitry connects the semiconductor circuitry to the all-metal circuitry and converts between the first signals and the second signals.

The present invention relates to circuits and systems incorporating solid-state devices referred to herein as "transpinnors" and described in U.S. Pat. Nos. 5,929,636 and 6,031,273, the entire disclosures of which are incorporated herein by reference for all purposes. More specifically, the present application describes interface circuitry for transmitting signals between semiconductor circuitry and transpinnor-based circuitry.
The vast majority of electronic circuits and systems manufactured and sold today are based on semiconductor technology developed over the last half century. Semiconductor processing techniques and techniques for manufacturing integrated circuits have become increasingly sophisticated resulting in ever smaller device size while increasing yield and reliability. However, the precision of such techniques appears to be approaching its limit, making it unlikely that systems manufactured according to such technique will be able to continue their historical adherence to Moore's Law which postulates a monotonic increase in available data processing power over time.
In addition, as the techniques for manufacturing semiconductor integrated circuits have increased in sophistication, so have they correspondingly increased in cost. For example, current state-of-the-art integrated circuits require a large number of processing steps to integrate semiconductor circuitry, metal layers, and embedded circuits, an issue which is exacerbated by the varied nature of the materials being integrated. And the demand for higher levels of complexity and integration continue to grow. The technical difficulties facing the semiconductor industry are well summarized by P. Packan in the Sep. 24th, 1999, issue of Science magazine beginning at page 33, incorporated herein by reference in its entirety for all purposes.
Finally, there are some applications for which conventional semiconductor integrated circuit technology is simply not well suited. An example of such an application is spacecraft systems in which resistance to external radiation is extremely important. Electronic systems aboard spacecraft typically require elaborate shielding and safeguards to prevent loss of information and/or system failure due to exposure to any of the wide variety of forms of radiation commonly found outside earth's atmosphere. Not only are these measures costly in terms of dollars and weight, they are not always completely effective, an obvious drawback given the dangers of space travel.
In view of the foregoing, it is desirable to provide electronic systems which facilitate higher levels of integration, reduce manufacturing complexity, and provide a greater level of reliability in a wider variety of operating environments. As described in the aforementioned U.S. patents, such electronic systems are made possible by the advent of the all-metal, multi-purpose circuit element referred to as the "transpinnor." However, given the infancy of the transpinnor and transpinnor-based systems, and the still ubiquitous nature of semiconductor technology, it is desirable to provide interfaces for transmitting signals between these different domains.

Interfaces between semiconductor circuitry and transpinnor-based circuitry