A microelectromechanical (MEM) device includes a substrate, a structure, a travel stop, and a protective cap. The substrate has a surface, and the structure is coupled to, and movably suspended above, the substrate surface. The structure has at least an outer surface, and the travel stop coupled to the structure outer surface and movable therewith. The travel stop includes at least an inner peripheral surface that defines a cavity. The protective cap is coupled to the substrate and includes a stop section that is disposed at least partially within the travel stop cavity and is spaced apart from the travel stop inner peripheral surface. The travel stop and the protective cap stop section together limit movement of the structure in at least three orthogonal axes.

Many devices and systems include various numbers and types of sensors. The varied number and types of sensors are used to perform various monitoring and/or control functions. Advancements in micromachining and other microfabrication techniques and associated processes have enabled manufacture of a wide variety of microelectromechanical (MEM) devices, including various types of sensors. Thus, in recent years, many of the sensors that are used to perform monitoring and/or control functions are implemented using MEM sensors.
One particular type of MEM sensor that is used in various applications is an accelerometer. Typically, a MEM accelerometer includes, among other component parts, a proof mass that is resiliently suspended by one or more suspension springs. If the MEM accelerometer experiences an acceleration, the proof mass moves. The motion of the proof mass may then be converted into an electrical signal having a parameter magnitude (e.g., voltage, current, frequency, etc.) that is proportional to the acceleration.
If a MEM device, such as the above-described MEM accelerometer, experiences a relatively high acceleration, or is exposed to a relatively high force, the proof mass and/or other portions that make up the MEM device can move beyond a desired distance. In some instances, such movement can potentially damage the MEM device; Moreover, the MEM device can exhibit unstable behavior if the proof mass and/or other portions of the MEM device travel too far when a voltage is supplied to the MEM device. Thus, many MEM devices include one or more types of over travel stops or motion limiters that are configured to limit the movement of the proof mass and/or other portions of the MEM device. Such over travel stops include, for example, bumpers formed on the outer perimeter of the proof mass and/or other portions of the MEM device, and/or additional non-device structure.
Although presently-known devices and methods for limiting the travel of MEM device components are generally safe, reliably, and robust, these devices and methods do suffer certain drawbacks. For example, these devices and methods can be fairly complex and costly, and/or can consume an unwanted amount of surface area within the MEM device, and/or can only limit travel in one or two orthogonal axes.
Hence, there is a need for a MEM device, such as an accelerometer, and a method of making the same, that addresses one or more of the above-noted drawbacks. Namely, a device and method that limits over travel in a MEM device and that is less complex and/or costly as compared to present devices and methods, and/or consumes less surface area within the MEM device as compared to present devices and methods, and/or limits travel in at least three orthogonal axes. The present invention addresses one or more of these needs. Furthermore, other desirable features and characteristics of the present invention will become apparent from the subsequent detailed description and the appended claims, taken in conjunction with the accompanying drawings and the foregoing technical field and background.

Microelectromechanical (MEM) device with a protective cap that functions as a motion stop


Apparatuses and methods for stabilizing an outboard motor of a watercraft during transport by a towed vehicle include a body having an outer member secured to the towed vehicle and an inner member disposed within and telescopingly movable relative to the outer member, the inner member having a head usable to contact and stabilize the outboard motor. A biasing member urges the inner member toward a retracted position. The inner member includes a first portion pivotally movable relative to a second portion, between an angled and a straight position. Contact between the first portion and the outer member prevents movement of the inner member toward the retracted position.

A significant number of recreational and commercial watercraft utilize an outboard motor as a primary source of propulsion and/or steering. A typical outboard motor is a self-contained unit that includes an engine, gearbox, and propeller or jet drive, which is affixed to the transom (e.g., the back wall of the hull) of a boat. An outboard motor is normally secured over the transom in a manner that enables the motor to be pivoted and/or otherwise moved to change the direction of the thrust, thus steering the boat.
As a result, when a watercraft is out of the water, such as during transport (e.g., via trailer), the outboard motor thereof is inclined to move relative to the transom and/other portions of the watercraft or transport vehicle as the transport vehicle moves. This movement can cause the motor to undesirably impact the transom or other portions of the watercraft and/or the transport vehicle, which can damage or destroy the transom or other portions of the watercraft, the outboard motor, and/or the trailer or other transport/towed vehicle.
To prevent undesired movement of an outboard motor during transport of a watercraft, various "transom saver" apparatuses exist. Generally, conventional transom saver devices include an arm designed to be temporarily attached to and/or braced against a portion of a trailer at one end, while the other end includes a forked head, grippers, or a similar type of contact member designed to contact the outboard motor and prevent movement thereof by transferring at least a portion of the torque and/or other forces experienced by the motor to the trailer. The arm and/or head is typically adjustable in some manner to accommodate the specific placement of the apparatus within the trailer and the type and/or dimensions of the trailer or watercraft.
Conventional transom savers are somewhat cumbersome devices, which must be stored loose, within the trailer, towing vehicle, or watercraft when not in use. As such, these devices are prone to loss, theft, or damage. Additionally, when lowering a trailer and/or watercraft into a body of water to launch the watercraft, it is common for a transom saver to be lost in the water during this process. Further, an individual transom saver is often usable only with certain types and/or sizes of trailers, boats, and/or motors, while portions of the transom saver, or the entire device, must be interchanged to accommodate different products.
A need exists for apparatuses for stabilizing outboard motors and/or other portions of a watercraft, or other objects, during transport by a towed vehicle, that can be securely attached to the towed vehicle to prevent loss thereof, adjustable to accommodate any spacing between a towed vehicle and an outboard motor, and can be retractable or otherwise movable to a position underneath or otherwise in association with the towed vehicle to facilitate storage when not in use.
Embodiments usable within the scope of the present disclosure meet these needs.

Apparatus and methods for stabilizing watercraft during transport


Magnetic memory devices include a magnetoresistive cell including a free layer having a variable magnetization direction and a pinned layer having a fixed magnetization direction, a bit line on the magnetoresistive cell and including a spin Hall effect material layer exhibiting a spin Hall effect and contacting the free layer; and a lower electrode under the magnetoresistive cell. A voltage is applied between the bit line and the lower electrode so that current passes through the magnetoresistive cell.

1. Field
Example embodiments relate to magnetic memory devices and/or methods of writing data to the magnetic memory devices.
2. Description of the Related Art
A magnetic random access memory (MRAM) is a memory device that stores information by using a change in resistance of a magnetic tunneling junction (MTJ) element. The resistance of the MTJ varies depending on a magnetization direction of a free layer. When the magnetization direction in the free layer is the same as that of a pinned layer, the MTJ element has a low resistance value. Conversely, when the magnetization direction of the free layer is opposite to that of the pinned layer, the MTJ element has a high resistance value. A low resistance state and a high low resistance state of the MTJ element correspond to data '0' and '1', respectively. Due to its non-volatility, high speed, and high endurance, the MRAM has emerged as one of the most promising next-generation non-volatile memory devices.
Early stage magnetic memory devices employ Oersted fields to switch a MTJ device, and create an Oersted field by using a conducting wire in which current flows. For example, a magnetic field generated by current flowing through a bit line and a word line is used to switch the magnetization direction of a free layer. Furthermore, a switching method called toggle switching may significantly reduce writing errors. Toggle switching refers to a process in which current is applied to a bit line and a word line with a time delay therebetween according to a predetermined (or, set) order. In this process, to reverse the magnetization direction of the free layer, the order in which current is applied to two conducting wires may be reversed instead of changing the direction of current.
However, when the size of a unit cell is reduced to implement a high density memory device, a switching field increases with an increase of the coercivity of a free layer, thereby resulting in an increase in amplitude of applied current. Furthermore, in a memory cell array having a plurality of memory cells, switching may occur even in a free layer in an inappropriate cell. Thus, a magnetic memory device employing switching induced by Oersted fields may have difficulty in achieving selectivity and high density.
To overcome the above problems, a spin transfer torque magnetic random access memory (STT-MRAM) which switches the magnetization direction of a memory cell by using a current-induced STT is receiving much attention as a next-generation high density memory device. However, STT-MRAM does not allow toggle switching, and providing a margin for reducing writing errors becomes a key issue for the STT-MRAM.

Magnetic memory devices and methods of writing data to the same


An improved traction control system and method for an automotive vehicle are disclosed in which both deceleration slip brake control system (ABS) and acceleration slip brake control system (TCS) are mounted and a switching condition of control from the deceleration slip brake control to the acceleration slip brake control is different from a switching condition from the acceleration slip brake control to the deceleration slip brake control, the deceleration slip brake control having a higher priority that the acceleration slip brake control so as to prevent occurrence of control hunting.

1. Field of the Invention
The present invention relates generally to a traction control system for an automotive vehicle in which both deceleration slip braking system (so called, ABS control) and acceleration slip braking system (so called, TCS control) are mounted.
2. Description of the Background Art
A Japanese Patent Application First Publication No. Heisei 1-301420 published on Dec. 5, 1989 exemplifies a previously proposed traction control system in which both deceleration slip brake control system (anti-lock brake controlling (ABS control) means and acceleration slip brake controlling system (brake controlling means from among driving force controlling means) are mounted.
In the previously proposed traction control system, when a switching operation between the deceleration brake control system and acceleration slip brake control system in both systems of which a brake control actuator is commonly used is carried out with the same tire wheel speed information being served as a control information, an initial control condition after the switching operation is set according to a controlled state before the switching operation.
Then, in the previously proposed traction control system disclosed in the Japanese Patent Application Publication identified above, in a case where the request of operation for the acceleration slip brake control during the deceleration slip brake control is issued, the acceleration slip brake control is immediately switched to the deceleration slip brake control. In a similar case where the request of operation for the deceleration slip brake control during the acceleration slip brake control is issued, the deceleration slip brake control is immediately switched to the acceleration slip brake control.
In this way, due to the same switching control of the switching operation, a control hunting (interference) is generated due to repetition of both the deceleration slip control and acceleration slip control.
Particularly, a braking performance is reduced, mainly caused by the deceleration slip brake control.
For example, suppose a case where the braking operation is carried out during the run on a low friction coefficient road surface and the switching is made from the acceleration slip brake control to the deceleration slip brake control.
As shown in FIG. 9, when rotation speeds of non-driven tire wheels are reduced due to the control of deceleration slip, the traction control system erroneously determines that a difference in speed between the non-driven tire wheels and driven tire wheels is generated due to the acceleration slip so that the switching from the deceleration slip control to the acceleration slip control is immediately carried out. Thereafter, when the traction control system determines that the deceleration slip occurs during the acceleration slip brake control, both brake controls are sequentially repeated such as to be switched to the deceleration slip brake control.
In addition, for example, in a case where the request of operation to start the deceleration slip brake control is issued only for one of the right and left front tire wheels, the acceleration slip brake control is immediately halted and is switched to the deceleration slip brake control. At this time, the vehicular stability is conversely reduced. This result has a cause that why the operation request for the deceleration slip brake control for one of the left and right front tire wheels is issued is that the vehicle receives a disturbance on the road surface, receives a variation of tire wheel load, and/or runs on a road segment such that only one of the left and right front tire wheels runs on a low friction road.
Furthermore, in a case where the request of operation for the acceleration slip brake control is issued during the deceleration slip brake control, the previously proposed traction control system immediately switches the control to the acceleration slip brake control. Therefore, an incremental pressure from an accumulator is added to a remaining pressure in a wheel cylinder caused by the deceleration slip brake control so as to result in an excessive braking control and a generation of a deceleration feeling by a vehicular driver.
In addition, when the acceleration brake control is carried out after the switching of control, a brake remaining liquid during the deceleration slip brake control is left in a reservoir of the brake control actuator. Therefore, a sufficient pressure decrease control cannot be achieved, a tendency to result in a tire slippery rotation may occur, and consequently, a deceleration feeling by the vehicular driver may be brought out. The deceleration feeling is such that although the vehicular driver depresses an accelerator pedal to accelerate the vehicle, the vehicle does not give the acceleration feeling to the driver but, in turn, gives the driver to feel as if the vehicle were decelerated due to the slippery motion of the driven tire wheels toward which an engine torque is transmitted.

Traction control system for automotive vehicle and traction control method therefor


The present invention provides a gamma voltage supply circuit capable of stably supplying a gamma voltage in response to the change of external voltage and a power management IC including the same. The gamma voltage supply circuit generates a regulating voltage using an internal voltage which is not influenced by the variation in load of a source driver IC, and generates a gamma voltage using the regulating voltage.

Field of the Invention
The present invention relates to a power management integrated circuit (IC), and more particularly, to a gamma voltage supply circuit and method which is capable of stably supplying a gamma voltage in response to the change of external voltage, and a power management IC having the same.
Description of the Related Art
A display system includes a flat panel employing a display panel such as a liquid crystal display and a power management IC to supply power to internal parts thereof.
The power management IC may be implemented in the form of a chip, and configured to generate voltages required for operations of a source driver IC, a gate driver IC, a timing controller, and the display panel. In particular, the power management IC includes a gamma voltage supply circuit therein, and supplies a gamma voltage generated by the gamma voltage supply circuit to the source driver IC. The gamma voltage is used in the source driver IC so as to express an image using data.
Furthermore, the power management IC is configured to generate a variety of voltages, such as a source driving voltage for the source driver IC, gate high and low voltages for the gate driver IC, and a common voltage required for driving the liquid crystal display, as well as the gamma voltage. Furthermore, the power management IC commonly uses an external voltage to generate the above-described voltages. That is, the gamma voltage supply circuit commonly uses an external voltage to generate the gamma voltage.
In a power environment where the above-described external voltage is commonly used, a load may be suddenly changed. In this case, the gamma voltage may be destabilized by the influence of the sudden change of load.
For example, the source driver IC performs an operation of temporarily consuming a large amount of current so as to drive a large number of pixels corresponding to one line at the same time. That is, a sudden change of load may occur in the source driver IC. Thus, the level of the external voltage may be rapidly changed in response to the sudden change of load.
When the level of the external voltage applied to the power management IC is rapidly changed by the above-described load change, the gamma voltage supply circuit is influenced by the change in level of the external voltage. That is, the gamma voltage generated through the external voltage may significantly drop. Thus, when the gamma voltage is destabilized, an image quality may be degraded.
In order to prevent the gamma voltage from being destabilized, the gamma voltage supply circuit of the power management IC may have a filter mounted therein, the filter including a resistor and a capacitor. However, the filter may relieve the instability of the gamma voltage, but has difficulties in completely overcoming the instability. Furthermore, in order to sufficiently overcome the instability of the gamma voltage, a capacitor having a large capacity may be required. In this case, however, the size of the power management IC, that is, the chip size may be inevitably increased.

Gamma voltage supply circuit and method and power management IC


This magnetic head essentially has at least one excitation conductor located below two layers made of magnetic material constituting the magnetic poles of the head and separated by a gap. The positioning of the conductor is such that it forms an angle different from 0.degree. or 90.degree. with respect to the direction of the gap. Different embodiments of the invention are provided for, notably with several conductors to set up a matrix-type control. Application to write/read magnetic heads.

The invention relates to a magnetic write/read head and more particularly to a magnetic head with integrated winding conductors.
Various planar technologies have been proposed enabling the manufacture, on a surface, of magnetic heads with very large-scale integration.
Besides, multiplexing methods have been described enabling the addressing of a large number of magnetic heads with a small number of connections.
The drawback of these proposed structures with very large-scale integration is that the gaps are not aligned. This calls for the use of memories to take account of the spatial offset between tracks and restricts the implementation of 2D recording codes.
The structure makes it possible, on the contrary, to align the gaps of the magnetic heads and, to a certain extent, to make a continuous (non-discrete) head. This makes the head useful for writing on tapes having various formats.

Magnetic write/read head having at least two conductors crossing a gap at different portions thereof so that each conductor determines the width of an information element


A system and method for determining soft read data for a group of cells in a nonvolatile flash memory are disclosed. An expected value representative of a plurality of stored values in a group of cells is obtained. A measured value representative of the plurality of stored values in the group of cells is obtained, based on a single read to the group of cells. A soft read data for the group of cells is determined based at least in part on the expected value and the measured value. The expected and measured values may include at least one of a number of 0s, a number of 1s, a ratio of 0s to 1s or a ratio of 1s to 0s. A reliability for a bit i may be obtained using a one-step majority logic decoder, and a threshold reliability may be used when determining the soft read data.

Solid state storage systems (such as NAND Flash storage) do not natively return soft values when read. When a read is performed on NAND Flash storage, a read threshold is specified. Cells in a page having a voltage lower than the read threshold are reported as having a first hard read value (e.g., a 1) and cells in the page having a voltage higher than the read threshold are reported as having a second hard read value (e.g., a 0). Although techniques exist to generate soft read data from two or more reads, generating soft read data from a single read is more attractive (e.g., because it consumes less power and fewer input/output (I/O) resources). Better quality soft read data would, for example, improve various system performance measurements, such as bit error rate or sector failure rate.

Method and system for generating soft-information after a single read in NAND flash using expected and measured values


Methods and systems for conveniently and quickly checking-out/checking-in and replicating a document record from/to a server instance of a document database to/from a local replica of the document database are provided. One embodiment provides a computer-implemented method for accessing a document record stored in a server document database system from a client system, comprising: receiving user selection of a document record from a replica database in the client system; querying the server document database system for the document record; determining whether the document record is available for check-out from the server document database system; and if the document record is available for check-out, replicating the document record to the replica database in the client system.

1. Field of the Invention
The present invention generally relates to methods and systems for accessing document records in document databases. More particularly, the present invention relates methods and systems for replicating document records from a server instance of a document database to a local replica of the document database and updating document records from the local replica of the document database to the server instance of the document database.
2. Description of the Related Art
Databases are computerized information storage and retrieval systems. A document database is an organized collection of information in which related collections of documents are stored. A document database, such as Lotus Notes from IBM, comprises one or more databases which contain document records. A document record is defined as an object containing text, graphics, video, or audio objects or any other kind of "rich text" data. A document database may contain document records comprising semi-structured records created through forms and fields.
Forms are masks through which a user can view the data of a document record or create a document record and enter data. A field is an area on a form that contains a single type of information. The fields on a form define the type of information the documents can contain. The types of information may include: text, rich text, multiple choice lists or keywords, numbers, times or dates, and user names. Rich text includes voice, video, binary objects and multi-font text, tabular data, World Wide Web pages, and linked or embedded objects. The document records may be indexed and retrieved by any of the fields within the document records. Also, the document records may be indexed and retrieved by the actual contents of the document record.
Document records in a document database may be located and displayed by a user through views, folders and/or navigators. Views display document summary type fields in rows and columns for a user to find particularly interested document records. Views may be programmed to group the information according to specific criteria. Folders display lists of document records for user selection. Navigators provide a graphical way for a user to find documents or take actions without having to maneuver through views or find the commands on a pull-down menu.
Commonly, document databases are part of a distributed system comprising a plurality of servers and clients, as in the case of the client-server model. Typically, the clients and servers communicate via a local area network (LAN) or wide area network (WAN) using well-known protocols such as Transmission Control Protocol and Internet Protocol (TCP/IP). The clients typically make requests to the servers, which manage one or more databases. Once a response for the client's request is formulated, the response is provided to the client.
Databases on a server system are typically replicated to one or more client systems. Data replication refers to the copying of data (e.g., a database or a portion of a database) from a primary database to a user's local system. In one aspect, replication allows the user to retrieve updated data information pertinent to previous database requests as the data becomes available. Further, databases are often replicated to reduce contention or access to a primary database or provide stand alone work systems and spaces. Replicated databases provide work fields that allow users and clients to create or inspect data without limiting access by others to a primary database. For clients interested in only specific aspects of the primary database, replicas of particular regions or fragments can be provided to avoid absorbing excess resources. Replicated databases also provide a backup in the event of media failure.
To ensure that a replicated document record has the most current updates, a client must check-out the corresponding document record from the server database and replicate any changes to the client's database. Currently, the process for checking-out a document from a server instance of a document database (e.g., Lotus Notes Server) to a local replica of the document database (e.g., Lotus Notes Client) involves several manual steps that must be performed by a user on both the server instance of the document database and the local replica of the document database. First, a user must access the server and find the server instance of the document database containing the document record which the user wants to check-out. Second, the user selects the document record (e.g., highlighting the document record within a view through a document database application). Third, the user requests a check-out of the document record on the server (e.g., clicks on a "Check-Out" action button). After successfully checking-out the document record on the server instance of the document database, the user exits the server instance of the document database. Then, the user must locate and access a local replica instance of the document database which may be stored in a storage system connected to the user's computer system. For example, the local replica may be stored in a storage system belonging to a local area network. Lastly, the user forces a manual replication of the local replica with the server instance of the database.
The current document check-out process can be very time consuming because the process requires a user to enter/exit multiple instances (e.g., both the server instance and the local replica) of a document database. Furthermore, the process requires a user to force a manual replication. In addition to the manual steps performed by a user, accessing a database on a server may be time consuming. Depending on the state of the network at the time of the access, a user may have to wait a long time to connect to the server or make several attempts to access the server. The processes and repercussions are similar for the current process for checking-in a document record from the local replica to the server instance of the document database.
Therefore, there is a need for a method and a system for conveniently and quickly checking-out and replicating a document record from a server instance of a document database to a local replica of the document database. Also, there is a need for a method and a system for conveniently and quickly checking-in and updating a document record from the local replica to the server instance of the document database.

Method and system for automatically checking-out/in and replicating documents in databases

International Business Machines Corporation


Various embodiments for implementing circuits and systems with highly flexible interface circuitry that is capable of realizing programmable on-chip termination and DC level control. A number of techniques use existing I/O resources to implement programmable on-chip termination and DC level control that enable an integrated circuit to meet a variety of different high speed single-ended and differential I/O standards.

The present invention relates in general to integrated circuitry and in particular to method and circuitry for implementing programmable on-chip termination resistance with DC voltage level control.
When transmitting signals over distances appreciable with respect to the signal period, mismatches between the impedance of the transmission line and that of the receiver cause signal reflection. The reflected signal interferes with the transmitted signal and causes distortion and degrades the overall signal integrity. To minimize or eliminate the unwanted reflection, transmission lines are resistively terminated by a matching impedance. Conventionally, the input and output pins on an integrated circuit package are terminated by coupling an external termination resistor of, e.g., 50 Ohm value to the relevant pins. For many of today's high speed integrated circuits, and particularly those that have large I/O pin counts, external termination poses a number of problems. At high frequencies, for example, the effects of package parasitics cannot be ignored making the reduction of external terminals (package pins or stubs) desirable. Interconnect paths on a circuit board as well as inside the package contribute to the parasitics increasing the delay in signal propagation. It is desirable therefore to implement the termination resistance on-chip to eliminated some of the parasitics. On-chip termination also reduces the number of external components.
Depending on the circuit application, there are a number of other factors that need to be considered when designing the termination structure. For example, over time, various data signaling techniques have developed to facilitate low voltage high speed signal transmission. Low voltage differential signaling (LVDS), current mode logic (CML), and low voltage pseudo emitter coupled logic (LVPECL) are examples of fully differential signaling techniques, while GTL, SSTL, HSTL are examples of pseudo differential signaling. The signal levels at the interface have not been standardized for every type of signaling technique. For example, LVPECL is a widely used signaling technique that has not been standardized resulting in many different vendor definitions for the signal levels at the interface. An on-chip termination resistance that is optimized for a signaling interface defined by one vendor may not provide optimum termination for another.
Another consideration is the output DC level in systems that use AC coupling at the I/O interface. AC coupling techniques that are typical of high speed communication channels require a biasing network at the receiver to provide a proper DC level for the received signal. For an on-chip differential termination resistance, proper DC biasing is needed.
It is therefore desirable to provide an on-chip termination structure that not only reduces external components and enhances data rate, but that is flexible enough to interface with varying signaling techniques as well as providing appropriate DC biasing when needed.

Programmable termination with DC voltage level control


A cushioning device for protecting corners and edges of an article when packaged in a box is provided. The device comprises a panel member having a plurality of panel portions with each of the panel portions hingedly connected to at least one adjacent panel portion. Cushioning is secured to at least one of the panel portions for cushioning the article wherein the panel portions fold into a three-dimensional receptacle forming an open corner cushioning device for protecting the corners and sides of an article. A securing mechanism on the panel member secures for securing the panel member within the box wherein the article is securable within the box.

1. Field of the Invention
This invention relates generally to a foldable packaging device for protecting articles within a box and the like and, more particularly, it relates to a foldable packaging device for protecting the corners and edges of packed articles within a box and the like.
2. Description of the Prior Art
When articles are shipped from one location to another, it is necessary to safely pack or crate the articles to inhibit damage to the articles. In many cases, such articles consist of electronic instruments, cabinets, desks, appliances, furniture, and a wide variety of other similar articles which have substantially rectangular or square-shaped edges. In the past, articles such as those listed above, have been packaged in various different ways, but in most cases, such packaging devices and techniques have been unsatisfactory to inhibit damage.
One technique used by many companies and people to package various articles has been to utilize packing material formed from shredded or wadded paper. Prior to the article being place in the box or crate, the packing material is placed at the bottom of the box or crate. Once the article is placed in the carton or crate, the packing material is stuffed into the packing carton or crate about the sides, back, and top of the article. The box or crate is then closed and sealed. Clearly, to accomplish this packing technique, an excessive amount of packing material is required which is expensive, and once the article has arrived at its final destination, the user must then remove and dispose of all of this packing material. Furthermore, the described technique provides questionable protection of the articles since the packing material would tend to move and shift during transport of the article thereby compromising the ability of the packing material to protect the article.
Another technique which has been utilized to package articles such as electronic instruments or the like, has been to use pre-formed cushions of a resilient material, such as expanded polystyrene or rubber. The packing cushions are pre-formed in that the cushions are molded to conform to the contour of either the top or bottom, or both, of the article to be packaged. This technique permits the article to be positioned, for example, in a bottom pre-formed cushion after which a top pre-formed cushion is positioned on top the article. The article is then enclosed and sealed within the box or crate thereby effectively sandwiching the article between the packing cushions within the box.
Unfortunately, even though such packing material originally accompanies the article from the manufacture to the consumer, the packing material is either disposed with the original box due to the bulkiness of the packing material or otherwise misplaced or lost such that when the article is being prepared to be transported again, the original packing material is no longer available. Therefore, unless the user can acquire additional pre-formed cushions at a relatively high cost, the user is forced to employ the first technique list above by wadding paper or other material into the box or crate. Furthermore, such pre-formed cushions are molded to fit a particular article, such that the pre-formed cushions cannot be used for any other articles which are of a different size thereby limiting the interchangeability in utilizing such pre-formed cushions with other articles.
There have been attempts in the prior art to improve the shortcomings in packaging materials. The Schmid, U.S. Pat. No. 3,973,720, describes a protective cushioning pad formed from a single piece of substantially flat, resilient material formed into at least two discrete sections with each section being foldable with respect to another section along a full fold line therebetween. A metallic strip is mounted on the material and traverses each of the fold lines between adjacent sections permitting each of the sections to be folded with respect to the next adjacent section and retained in any preselected angularized folded position. Alternatively, the metallic strip permits the sections to be unfolded with respect to one another and positioned in a flat or unfolded posture.
Unfortunately, the cushioning pad of the Schmid patent has several deficiencies. First, while the metallic strips permit the sections to maintain their folded position, the addition of the metallic strips to the cushioning pad increases the costs of manufacturing the cushioning device which, in turn, increases the costs to the purchasing consumers. Second, the Schmid patent's cushioning device does not provide any means for securing the cushioning pad to the box or crate after insertion of the cushioning device. Upon shipping, the cushioning pads, and the articles packed within the box, will tend to move about the box thereby increasing the chances of the articles being damaged. Furthermore, the cushioning pads of the Schmid patent are not positionable anywhere within the box such that they lock the article within the box in place.
Accordingly, there exists a need for a foldable packaging device for protecting articles within a box and the like. Additionally, a need exists for a foldable packing device which maintains its predetermined shape when positioned about the corners of the articles within the box and the like. Furthermore, there exists a need for a foldable packaging device which maintains its predetermined position relative to the box and locks the article into place upon positioning of the foldable packing device within the box and the like.

Foldable packaging device for protecting articles within a box and the like


A merchandise display fixture for connection to an upright of a gondola display. The display fixture includes a cavity defined by a wall having front, rear, and side wall portions; and at least one mounting hook that extends from the rear portion of the wall. The display fixture is then mounted to a single upright of a gondola display such that the upright is located in a central location relative to the rear portion of the fixture.

1. Field of the Art
The present invention relates generally to a merchandiser display fixture, and more particularly, to a merchandiser display fixture designed to facilitate use of what is currently wasted space on a retail store gondola display.
2. Description of the Prior Art
Merchandiser displays in retail stores are designed to allow an unobstructed view of the goods, easy removal and replacement of goods on the display and the capability of storing an inventory of goods on the display to limit the frequency of display restocking. Because retail product display space is extremely expensive, and at a premium, merchandisers and displays have been designed to utilize as much of the retail display space as possible. A common, and one of the most popular displays for retail establishments is commonly referred to as a gondola display.
A conventional gondola display unit includes a base and a vertically extending display board. The display board includes a plurality of display panels, each of which may include a series of holes similar to conventional pegboard for mounting product display hangers and the like for displaying product. A conventional gondola display is also provided with a plurality of gondola posts or uprights at the ends of the gondola structure and at spaced intervals between the ends. Commonly, these uprights are spaced every four feet. These uprights may be relatively narrow (about one inch) or up to two inches or so in width and extend the entire height of the structure. The uprights are provided with a series of elongated slots or openings or pairs of slots or openings, to receive brackets for the purpose of mounting shelves, product hangers or other display racks to the gondola display, if desired. Some of these holes or slots in the upright have a width sufficient to accommodate two shelf brackets to that they can support adjacent shelves at the same vertical level, while others include a pair of adjacent slots to also support two adjacent shelves. Thus, the upright holes are not designed or intended to support a product merchandiser or display device to a single upright.
The shelves in a gondola display unit commonly have one end connected to one upright and the other end connected to a laterally spaced upright so that the shelves, etc. span the display panel between the uprights. Still further, while shelves or other display baskets or bins are sometimes mounted to the gondola display, many times they are not. When shelves or the like are not utilized, the product is often mounted only to the panels by using product display hangers or the like. In these cases, one to two inches or more of space taken up by the gondola uprights is not utilized for retail display and is thus wasted. Even if shelves are utilized, a significant amount of the area taken up by the gondola upright, such as that between the vertically spaced shelves, often remains unused.
Accordingly, there is a need in the art for a merchandiser display fixture which is usable with merchandiser displays such as gondola displays and which utilizes what is commonly considered wasted space in the gondola display.
The merchandiser fixture of the present invention utilizes what is commonly wasted space on a retail store display such as a gondola display. Further, one embodiment comprises a single row of hooks to be connected with the vertical row of holes in a single upright, while a further embodiment comprises a plurality of vertically spaced hooks which are laterally staggered to accommodate the width of wider upright holes or laterally spaced pairs of upright holes, and thus provide stability to the merchandiser.
In contrast to the present invention, the merchandiser fixture of the present invention utilizes what is commonly wasted space on a retail store display such as a gondola display. Further, one embodiment comprises a single row of hooks to be connected with the vertical row of holes in a single upright, while a further embodiment comprises a plurality of vertically spaced hooks which are laterally staggered to accommodate the width of wider upright holes or laterally spaced pairs of upright holes, and thus provide stability to the merchandiser.
In general, the merchandiser display fixture in accordance with the present invention provides a product containing fixture which includes a product containing cavity or portion, a rearward end or a rear wall portion and one or more mounting hooks extending rearwardly from the rearward end for insertion and retaining engagement with a slot in the gondola upright of a gondola display. Preferably, the rear wall of the fixture of the present invention approximates the width of the gondola uprights and thus provides a display fixture which fully utilizes the normally wasted gondola upright space on a gondola display. Further, one embodiment comprises a single row of hooks to be connected with the vertical row of holes in a single upright, while a further embodiment comprises a plurality of vertically spaced hooks which are laterally staggered to accommodate the width of wider upright holes or laterally spaced pairs of upright holes, and thus provide stability to the merchandiser.
The preferred embodiment can comprise a rigid structural fixture or can comprise a structure constructed of plastic or the like which is formed from a single sheet or blank of material. It is also desirable and preferred for the rearward end of the fixture to be provided with at least two or more hook members which are aligned vertically and linearly to mate with vertically spaced openings in the gondola upright. Although the display in accordance with the present invention can be constructed of a variety of materials and be painted or given a variety of colors, a preferred display is constructed from a clear plastic material and is provided with a front wall to display product and pricing information or the like. The structure may also be constructed of wire form or the like with hooks (either constructed of wire or otherwise) extending from the rearward end.
The present invention also relates to a method of making the display fixture in accordance with the present invention which includes providing a sheet of plastic or other material from which the fixture is to be made and cutting out a blank or pattern for the fixture. Preferably, this blank includes a plurality of bottom, front, rear and side wall portions which when folded in a desired manner, form a product receiving cavity and a front wall and rear wall, with the rear wall being provided with one or more connection hooks for engagement with the gondola upright. Preferably, the back wall is formed utilizing a pair of back wall sections. One of these sections is provided with one or more elongated slots, while the other is provided with a corresponding one or more hook portions which extend through the slots for engagement with the gondola uprights.
A still further aspect of the present invention relates to the provision of a fixture blank or the like which can be folded and formed in accordance with the above process to provide the fixture of the present invention.
Accordingly, it is an object of the present invention to provide an improved merchandiser display fixture for use with a gondola display to eliminate generally wasted display space of the gondola uprights.
Another object of the present invention is to provide a display fixture for use with a gondola display which includes a product display cavity, a rearward end or wall, and one or more hook portions extending outwardly from the rearward end or wall for connection with a display structure such as a gondola display.
A further object of the present invention is to provide an improved method of making a merchandiser display fixture for connection with a gondola display.
A still further object of the present invention is to provide a product blank from which a merchandiser display fixture in accordance with the present invention can be made.
These and other objects of the present invention will become apparent with reference to the drawings, the description of the preferred embodiment and the appended claims.


The disclosure provides an approach for measuring performance between a virtualized desktop infrastructure (VDI) client running on a client device and a remote computing device. Embodiments include generating, by a performance client on the client device, an event and storing a time associated with generating the event. Embodiments include transmitting, by the VDI client to the remote computing device, a message based on the OS event. Embodiments include determining, by a performance agent on the remote computing device, a time associated with receiving the message at the remote computing device and causing an indication of the time to be displayed in a virtual desktop screen. Embodiments include extracting, by the performance client, from the virtual desktop screen, the time, and determining a performance metric based on the extracted time and the time associated with receiving the message at the remote computing device.

In a virtual desktop infrastructure (VDI) environment, a local client device can access a remote virtual or physical desktop or remote application that is running on a remote device and displayed at the local client device. For instance, a virtual desktop may be hosted on a central infrastructure known as a VDI, and may be rendered on a client device using a remote display protocol. At the client device, a user may interact with the virtual desktop using peripheral devices (e.g., keyboard and mouse) associated with the client device, and operating system (OS) events generated based on the user's inputs are redirected from the client device to the remote device on which the virtual desktop is located.
Event redirection from a client device to a virtual desktop involves transmission over a network on an ongoing basis as the user interacts with the virtual desktop. As such, any network connection issues (e.g., if the network connection is throttled or otherwise operates at a reduced speed) may result in delayed event redirection and, consequently, lag between user inputs and corresponding responses within the virtual desktop. Such lag may significantly reduce the ability of a virtual desktop to function as intended.
Measuring performance between a client device and a virtual desktop is useful for determining whether any connection issues exist and, if so, taking actions to optimize the performance of the virtual desktop in view of the network connection issues. However, while there are existing techniques for determining certain network performance metrics in general, these techniques are not specifically tailored to detecting performance issues related to event redirection in the context of virtual desktops.
Accordingly, there is a need in the art for improved performance measurement techniques for virtual desktops.

Measuring performance of virtual desktop event redirection


Logic may reduce the size of runtime memory for deep neural network inference computations. Logic may determine, for two or more stages of a neural network, a count of shared block allocations, or shared memory block allocations, that concurrently exist during execution of the two or more stages. Logic may compare counts of the shared block allocations to determine a maximum count of the counts. Logic may reduce inference computation time for deep neural network inference computations. Logic may determine a size for each of the shared block allocations of the count of shared memory block allocations, to accommodate data to store in a shared memory during execution of the two or more stages of the cascaded neural network. Logic may determine a batch size per stage of the two or more stages of a cascaded neural network based on a lack interdependencies between input data.

Driven by the availability of massive data and the computational capability to process the data, deep learning is as a critical tool for solving complex problems across a wide range of domains such as image recognition, speech processing, natural language processing, language translation, and autonomous vehicles. Convolutional neural networks (CNNs) have become the most popular algorithmic approach for deep learning for many of these domains. High performance and extreme energy efficiency are critical for deployments of CNNs in a wide range of situations, especially mobile platforms such as autonomous vehicles, cameras, and electronic personal assistants.

Methods and arrangements to manage memory in cascaded neural networks


Systems and methods for analyzing boilerplate are described. In one described system, an indexer identifies a common element in a plurality of related articles. The indexer then classifies the common element as boilerplate. For example, the indexer may identify a copyright notice appearing in a plurality of related articles. The copyright notice in these articles is considered boilerplate.

Conventional search engines receive a search query from a user and execute a search against a global index. Such conventional search engines typically use one or more conventional methods for performing a search. For example, one known method, described in an article entitled "The Anatomy of a Large-Scale Hypertextual Search Engine," by Sergey Brin and Lawrence Page, assigns a degree of importance to a document, such as a web page, based on the link structure of the web. The search results are often presented in a list format, comprising article identifiers and brief snippets about the documents in a web page that can be resized.
Often, the user has access to other information stored on the user's local machine or on other storage media accessible via a network that is relevant to the user's current contextual state. For example, if a user is working on a document regarding a particular subject, information about the subject may be stored on the user's hard drive or in a global index accessible to the user. In order to access this information, the user issues an explicit search query in an application, such as a web search page. The information is provided to the user as a result set. Thus, the user shifts focus from the document that the user is working on to perform the search.
In many cases, the user may be unaware or may not remember that information is available regarding a particular subject. In such a case, the user may not perform an explicit search and thus, will not have access to the potentially relevant information.


Electric lamps are mounted by lamp arms to lamp pulleys that are, in turn, mounted to a rigid frame. A motor-driven belt synchronously rotates the lamps via frictional contact with the lamp pulleys to position the lamps to optimally illuminate a target surface. The lamps can be synchronously moved from a first location outside the periphery of the frame to a second location within the frame periphery by operation of the motor driving the belt. In either location, as well as in any other location, the apparatus provides an un-impeded, pass-through opening within the frame for an un-impeded line of sight to the target surface. Furthermore, the radial distance from each lamp to the geometric center of the frame remains the same, and the lamps remain spaced equally apart from each other.

Lamps have been used in the past to illuminate a Lambertian surface with accuracy and consistency for the purpose of calibrating sensors (e.g., optical devices). Lamps have also been used to illuminate targets or surfaces for thorough acquisition by cameras or to take measurements and readings by other optical devices, such as sensors. When the lamps are mounted to a frame, an open space between the lamps is required for central placement of optical devices. The existing illumination apparatus provides lamps that are mounted inside the frame. There are several disadvantages to this design. Firstly, although it is desirable to adjust the area being illuminated, the lamps cannot be moved, so there is no flexibility to change the area of the illuminated field. Secondly, the lamps themselves oftentimes block the line of sight for optical devices through the frame towards the target, or prevent the placement of larger devices that would otherwise fit within the frame.
Therefore, there is a need in the art for a frame and lamp system that can be adjusted to change the area of the illuminated field, which provides optical devices a line of sight through the frame to the target that is not blocked by the lamps, and which allows the use of larger devices that fit within the frame. The present invention fulfills the foregoing needs in the art.

Variable radius multi-lamp illumination system

THE UNITED STATES OF AMERICA AS REPRESENTED BY THE SECRETARY OF THE AIR FORCE


An ultrasonic imaging method is provided. A wideband acoustic pulse is fired at a wall. A wideband response signal is received. The wideband response signal is processed to select an impedance measurement frequency. A wavelet having a characteristic frequency approximately equal to the impedance measurement frequency is fired. A wavelet response signal is received. A reflection coefficient is determined from the wavelet response signal. An impedance measurement is calculated from the reflection coefficient. Related tools and systems are also disclosed.

It is often desirable to determine the thickness of a pipe in a well and the properties of materials that surround the pipe, or the well. For example, it may be desirable to determine whether the exterior of a pipe is in contact with fluids or solids, and if so, what type of fluids or solids. Thinning of a pipe due to corrosion may indicate a potential collapse of the pipe. In a downhole context, it may be desirable to determine whether the pipe is tightly bonded to surrounding cement. These are just some examples of when it may be desirable to measure (or even image) through a pipe, or solid tubing wall.
One method for performing such measurements employs an acoustic transducer. Unfortunately, existing technology is limited to pipes having walls less than 0.9 inches thick.


The acquisition and reproduction units of the system are interconnected by means of a network in order to survey and regenerate the outline of any kind of object and to reproduced it either virtually in a CAD 3D system or materially in plastic, composite or papery material.

1. Field of the Invention
The present invention relates to an electronic photo-optical system capable of surveying the external outline any kind of object and transform it into a set of Cartesian coordinates (x,y,z); transmitting the mathematical data of these geometries via networks both to a personal computer (to realize a three-dimensional graphical representation of the object and render possible the further processing of its geometry by means of three-dimensional, computer-assisted design, CAD 3D) and directly to an on-line device of the fax-reproducer type for the reproduction in plastic, composite or papery material of the volume of the surveyed object, in an automatic manner and in accordance with a predetermined logic, composite material being here understood as referring to a material obtained by the union of at least two components having chemical and physical characteristics such as to render them different, insoluble and capable of being separated from each other.
2. Prior Art
The prior art relating to the transformation in a personal computer of the outline of any kind of surveyed and digitalized object into the external surface of a three-dimensional (3D) virtual object consists principally of the use of lasers and feelers for determining the space coordinates of the object or three-dimensional reconstruction by means of the acquisition of images from video cameras and video projectors.
The prior art relating to the realization of an object in plastic material or other material by means of data obtained from a CAD 3D system comprises principally the use of lasers and milling cutters; rapid prototyping like stereolithography (SLA); laser sintering (SLS); the LOM method; the FDM method, the 3DP method; the SGC method. Furthermore, the prior art comprises the device for thermoforming, digitalizing and reproducing the external surface of an object in three-dimensions, virtually and/or in thermoformable plastic material, object of Italian Patent Application No. MI 2003 A 000177 and International Application No. PCT/EP 04/00855, in which an integrated module for the calculation and management of information technology (IT) data, a scanner module and a reproduction module are capable of thermoforming external surfaces of objects from panels (sheets) of thermoformable plastic material without having to rely on negative or positive moulds, carrying out 3D scannings of pre-existing objects taken as model, translating them into the external surfaces of virtual objects that can be processed by means of CAD 3D programs, carrying out operations of remote reproduction by means of 3D fax of previously digitalized surfaces or surfaces of objects designed by means of CAD 3D and conserved in a data base, in the form of surfaces of objects thermoformed in thermoplastic material.

Electronic photo-optical system for surveying, digitalizing and reproducing the external surface of a three-dimensional object, either virtually or in plastic, composite or papery material


A memory device compensates for delay time variations among multi-bit data. The device includes a first stage and a second stage of data storage units. The first stage of data storage units store first to nth data bits in response to a latch clock signal. The second stage of data storage units store the first to nth data contents output from the first stage of data storage units in response to a reference clock signal. The latch clock signal is obtained by delaying the reference clock signal. The latch clock signal includes first to nth sub latch signals. The sub latch signals are generated at different times according to propagation delay time periods of the corresponding first to nth data contents.

1. Technical Field
Embodiments of the present invention relate to a semiconductor memory device which stores data of various widths, which is capable of compensating for delay time variations between input data bits when processing multi-bit data.
2. Description of the Related Art
Semiconductor memory devices are capable of simultaneously processing multi-bit data using a single semiconductor chip. An example of this type of device is a YDRAM (Yellowstone Dynamic Random Access Memory). Processing multi-bit data means that a single semiconductor chip can simultaneously support X16, X8, X4, X2 and X1 data modes. Supporting an X16 mode means that a semiconductor memory device can receive and process 16 bits of data at a time. Likewise, supporting an X1 mode means that a semiconductor memory device can receive and process one bit of data at a time. In a semiconductor memory device capable of simultaneously processing multi-bit data, the propagation delay time of input data is longer when the semiconductor memory device operates in a X1 mode than when the device operates in a X16 mode. This deteriorates the timing margin of the flip-flops that receive the data.
FIGS. 1(a), (b), (c), (d) and (e) illustrate a semiconductor memory device operating in an X16 mode, X8 mode, X4 mode, X2 mode and X1 mode, respectively. The numerals shown in FIG. 1 denote pin numbers of the semiconductor memory device. If the semiconductor memory device operates in the X16 mode, as shown in FIG. 1(a), data is input into each of the 16 pins and the input data is applied to an internal circuit (not shown) from each pin.
In FIG. 1(a), td1 denotes the period of time required for data outputted from each pin of the semiconductor memory device to be delivered to an input buffer (not shown) of the internal circuit (not shown). If a semiconductor memory device operates in the X1 mode, as shown in FIG. 1(e), data is input to one of 16 pins of the semiconductor memory device (pin 0 in this case) and the input data is transmitted from the pin 0 to the internal circuit (not shown). Considering an internal circuit that is located the furthest distance from the pin 0, the period of time required for data output from the pin 0 of the semiconductor memory device operating in X1 mode to be transmitted to the input buffer (not shown) of the internal circuit (not shown) is represented by td2+td3.
As described above, the period of time required for data to be applied to the input buffer (not shown) (i.e. propagation time), largely depends on whether the semiconductor memory device operates in the X16 mode or the X1 mode. Since the frequency of a reference clock signal for operating the semiconductor memory device does not depend on whether the semiconductor memory device operates in the X16 mode or in the X1 mode, the margin of the input data may be poor, and the set-up and hold time characteristics of the input data may deteriorate due to a long propagation delay time. The propagation delay time may vary with the position of the internal circuit of the semiconductor memory device, even in the same operating mode. Referring to FIG. 1(e), the period of time required for the data to be input into the input buffer (not shown) of the internal circuit (not shown) located the furthest distance from the pin 0 is td2+td3. However, the period of time required for the data to be transmitted to the input buffer (not shown) of the internal circuit (not shown) having the shortest distance from the pin 0 is td4.
As described above, the time required for the data to be applied to the input buffer (not shown) of the internal circuit (not shown) (i.e., the propagation delay time), may vary according to the position of the internal circuit, even when the semiconductor memory device operates in the same operating mode. Because a reference clock signal for operating the semiconductor memory device has a specific frequency that does not vary in the same operating mode, the margin of the input data may become poor and the set-up and hold time characteristics of the input data may deteriorate due to a long propagation delay time.
FIG. 2 shows a portion of a semiconductor memory device for illustrating the propagation time difference, with reference to FIG. 1. FIG. 3 is a timing diagram illustrating the operation of the semiconductor memory device shown in FIG. 2.
Referring to FIG. 2, the semiconductor memory device 200 includes flip-flops FF11, FF21, FFn1, FF12, FF22, FFn2, FF13, FF23 and FFn3 that receive and store first to nth data bits D<1>, D<2>, . . . , D<n>. The flip-flips FF11, FF21, FFn1, FF12, FF22, FFn2, FF13, FF23 and FFn3 store the first to nth data bits D<1>, D<2>, . . . D<n> in response to a reference clock signal REFCK. D1_1, D2_1 and Dn_1 denote data contents that result from delay of the first to nth data D<1>, D<2>, . . . , D<n> for different periods of time. The data bits D1_1, D2_1 and Dn_1 are input into the flip-flops FF11, FF21 and FFn1, located at a first stage. Reference numerals—t1, t2 and tn respectively represent periods of time required for the first to nth data bits D<1>, D<2>, . . . , D<n> to be input into the flip-flops FF11, FF21 and FFn1 at the first stage.
The second data bit D<2> takes the shortest amount of time to arrive at the flip-flop FF21 and the nth data D<n> takes the longest amount of time to reach the flip-flop FFn1. The period of time required by the first data D<1> to be input into the flip-flop FF11 is in-between the time periods required for the second data D<2> and the nth data bit D<n>. The data bits D<1>, D<2>, . . . , D<n> require different time periods to be input into the flip-flops FF11, FF21 and FFn1, located at the first stage in the semiconductor memory device 200, because data input pins (not shown) have different distances from the flip-flops FF11, FF21 and FFn1, as illustrated in FIG. 1. The time periods required for the data bits D<1>, D<2>, . . . , D<n> to be input into the flip-flops FF11, FF21 and FFn1 may vary in different operating modes of the semiconductor memory device, such as the X16 mode and the X1 mode.
FIG. 3 shows delay time t1 of the first data bit D<1>, delay time t2 of the second data bit D<2>, and delay time tn of the nth data bit D<n>, corresponding to data waveforms. In FIG. 3, the uppermost waveform illustrates the first to nth data bits D<1>, D<2>, . . . , D<n> having the same delay time and being simultaneously applied to the first-stage flip-flops FF11, FF21 and FFn1. It can be seen from FIG. 3 that the nth data bit Dn_1 with the longest delay time has the shortest set-up time Sn, and the second data D2_1 with the shortest delay time has the longest set-up time S2. If there is a delay time difference among the data contents, data having long delay times will not be able to be stored in a corresponding flip-flop, in response to the reference clock signal REFCK. Likewise, data having short delay times may have no difficulty in being stored in a corresponding flip-flop, in response to the reference clock signal REFCK.
So, the propagation delay time of the data may become problematic in the front-stage flip-flops FF11, FF21 and FFn1 of the semiconductor memory device 200. That is, if the data is properly stored in the front flip-flops FF11, FF21 and FFn1 based on a single reference clock signal REFCK pulse, even though the data bits have different propagation delay time intervals, the data output from the flip-flops FF11, FF21 and FFn1 may then be stored in the flip-flops FF12, FF22 and FFn2 at the next stage, in response to a subsequent the reference clock signal REFCK pulse without any problem.
FIG. 4A is a timing diagram illustrating the case where there is a small propagation delay time difference between all data bits input to the semiconductor memory device of FIG. 2. FIG. 4B is a timing diagram illustrating a case where there is a large propagation delay time difference between at least some of the data bits input to the semiconductor memory device of FIG. 2.
Referring to FIG. 4A, when the first to nth data bits (D<1> to D<n>) all have small propagation delay time differences, all of the data bits can be stored in the flip-flops FF11, FF21 and FFn1 at the first stage, although they have different set-up and hold time characteristics. In contrast, as shown in FIG. 4B, however, when at least some of the first to nth data bits (D<1> to D<n>) have a large propagation delay time difference, even though the first and second data D<1> and D<2> are stored in the corresponding front flop-flops FF11 and FF21 in response to the reference clock signal REFCK, at least the nth data D<n> cannot be stored in the front flip-flop FFn1 in response to the reference clock signal REFCK because of its long propagation delay time.
As described above, all of data contents cannot be latched using a single reference clock signal REFCK when the propagation delay time of multi-bit data input into the semiconductor memory device 200 is increased and the propagation delay time difference among multi-bit data contents becomes large.
Accordingly, it would be desirable to provide a semiconductor memory device capable of compensating for delay time differences in multi-bit data input to a memory device. by adjusting the magnitude of delay of a reference clock signal for controlling flip-flops of a front stage.
According to one aspect of the present invention, a semiconductor memory device includes first and second data storage units. The first data storage unit stores first to nth data input into the first data storage unit, in response to a latch clock signal. The second data storage unit stores the first to nth data output from the first data storage unit, in response to a reference clock signal. The latch clock signal is obtained by delaying the reference clock signal. The latch clock signal includes first to nth sub latch clock signals. The first to nth sub latch clock signals are generated at different points in time, according to propagation delay time periods of the first to nth data contents that respectively correspond to the first to nth sub latch clock signals. The first data storage unit includes first to nth storage elements which store the first to nth data, in response to the respective first to nth sub latch clock signals.
The first to nth programmable delays delay the reference clock signal to generate the respective first to nth sub latch clock signal. The first to nth programmable delays determine the delay time of the reference clock signal, according to propagation delay time periods of the first to nth data applied to the first to nth programmable delays. In embodiments, the first to nth programmable delays determine degrees of delaying the reference clock signal for generating the first to nth sub latch clock signals, according to a fuse option. In embodiments, the first to nth programmable delays determine degrees of delaying the reference clock signal for generating the first to nth sub latch clock signals, according to MRS (Mode Register Set). The number of bits of data input into the semiconductor memory device may be selected according to the operation mode of the semiconductor memory device.
According to another aspect of the present invention, a semiconductor memory device is compensating delay time of multi-bit data, which has a plurality of data paths for receiving data. Each of the plurality of data paths include a plurality of data storage units for storing input data. The first data storage units of the plurality of data paths store the data in response to a latch clock signal. Data storage units (other than the first data storage units) store the data output from the first data storage units in response to a reference clock signal. The latch clock signal is obtained by delaying the reference clock signal. The latch clock signal may include as many sub latch clock signals as the number of data paths. The sub latch clock signals are generated at different points of time according to propagation delay time of the data input into the corresponding data paths.
The semiconductor memory device may include a plurality of programmable delays which delay the reference clock signal to generate the sub latch clock signals. The plurality of programmable delays determine delay time of the reference clock signal according to propagation delay time of the data input to a corresponding data path. In embodiments, the programmable delays determine degrees of delaying the reference clock signal for generating the sub latch clock signals, according to a fuse option. In embodiments, the programmable delays determine degrees of delaying the reference clock signal for generating the first to nth sub latch clock signals, according to a MRS (Mode Register Set). The number of data paths for receiving data can be selected according to the operation mode of the semiconductor memory device.
According to yet another aspect of the present invention, a semiconductor memory device compensates delay time of multi-bit data, which has a plurality of data paths for receiving data, in which each of the plurality of data paths includes a plurality of data storage units for storing input data. The first data storage units of the plurality of data paths operate asynchronously, while other data storage units operate synchronously. The first data storage units store the data in response to a latch clock signal. The other data storage units store the data output from the first data storage units in response to a reference clock signal. The sub latch clock signal is obtained by delaying the reference clock signal. The sub latch clock signals are generated at different of times according to propagation delay time of the data input into a corresponding data path.
The semiconductor memory device may include a plurality of programmable delays for delaying the reference clock signal to generate the sub latch clock signals. The plurality of programmable delays determine delay time of the reference clock signal according to propagation delay time of the data input into a corresponding data path. In embodiments, the programmable delays determine degrees of delaying the reference clock signal for generating the sub latch clock signals, according to a fuse option. In embodiments, the programmable delays determine degrees of delaying the reference clock signal for generating the first to nth sub latch clock signals, according to MRS (Mode Register Set). The number of data paths for receiving data may be selected according to the operation mode of the semiconductor memory device.

Semiconductor memory device which compensates for delay time variations of multi-bit data


An apparatus and method for providing dynamic tracking error detection and control in an optical recording system in which an incident beam records data on a medium in the form of marks. A diffraction-based mark formation effectiveness (MFE) signal is generated by monitoring a reflected write signal in part of the return beam aperture or in multiple zones of the return beam aperture and is indicative of a characteristic of the marks formed on the medium. A position signal is generated to provide an indication of cross-track movement of the incident beam relative to a tracking structure on the medium. The tracking structure may be a wobbled groove on an optical disk recording medium. Variations in the diffraction-based MFE and position signals are correlated to provide a dynamic tracking error signal (TES). The diffraction-based MFE and position signal variations may be correlated by, for example, multiplying the two signals together in a multiplier circuit, or using the position signal to control application of the diffraction-based MFE signal to particular inputs of a signal difference circuit. The dynamic TES may be utilized in a servo loop with or without a push-pull signal or other conventional tracking signal.

In optical data recording, an optical source, typically a laser or laser diode, generates an incident write signal in the form of a radiation beam. The beam is applied to an optical medium to record data thereon as optically-detectable marks. To facilitate proper application of the beam to the medium, certain types of media, such as compact disk recordable (CD-R) media, include a preformed spiral tracking structure typically referred to as a groove or pregroove. The spiral groove may be "wobbled" in a radial direction of the disk about an average groove centerline in order to provide rotational velocity and beam position information in a well-known manner. The dimensions and shape of the groove can vary depending upon the medium, but an exemplary groove width is on the order of 0.4 micron in the radial direction, with adjacent grooves in the spiral separated by about 1.6 microns in the radial direction. In CD-R media, the groove corresponds to a data track on which marks are recorded.
The quality of recorded data in many optical recording systems is generally very sensitive to the cross-track position of the recording spot on the medium. In a CD-R system, for example, data quality rapidly deteriorates when the recording spot deviates from the centerline of the disk groove. A commonly-used technique for maintaining a recording spot on-track is referred to as push-pull tracking. This technique involves measuring an interference pattern caused by the interaction of the recording spot with the groove or other suitable tracking structure on the recording medium to generate a push-pull tracking signal. A tracking servo adjusts the position of the recording spot to keep the push-pull signal at a predetermined optimum value generally referred to as a "tracking offset" or an on-track value. The tracking offset is intended to compensate for static errors such as detector misalignment and optical axis tilt. Prior art techniques typically determine the tracking offset during a calibration period before data recording. One common approach is to make a series of trial recordings.
U.S. Pat. No. 5,440,534, assigned to the present assignee and incorporated by reference herein, discloses a technique for determining the tracking offset in an optical recorder by correlating a mark formation effectiveness (MFE) signal generated during one or more trial recordings with a corresponding push-pull tracking signal. This technique recognizes and makes use of the fact that certain characteristics of the reflected write signal vary with cross-track position of the recording spot, thereby providing a number of advantages over other techniques. For example, the tracking offset can be determined in a single recording pass, as compared to separate record and read passes required by two-pass techniques. In addition, the resulting tracking offset is optimized for recording rather than for reading. With this method, "on-track" is defined as the cross-track position with the highest MFE signal.
The mark formation effectiveness signals described in U.S. Pat. No. 5,440,534 are hereafter termed "density-based" methods. These methods are based on a single reflected write signal which is generated from light received in substantially all of the return aperture. The above-referenced commonly-assigned U.S. patent application Ser. No. 08/666,172, U.S. patent application Ser. No. 60/035,109 and U.S. patent application Ser. No. 60/034,193 describe techniques for measuring mark formation effectiveness that are fundamentally different from prior art "density-based" methods. These new techniques, hereafter referred to as "diffraction-based" methods, are based on reflected write signals generated from light received in different zones of the return aperture. A mark formation effectiveness signal is derived by comparing these reflected write signals. Diffraction-based methods can also be combined with the prior art density-based techniques for improved measurement signal-to-noise and more accurate prediction of the resulting written mark quality.
The push-pull tracking method described above is referred to as a "single spot" technique in that the spot that records and reads data also generates the tracking signal. This reduces system cost and complexity when compared with multi-spot tracking techniques. However, push-pull tracking also suffers from a number of problems. For example, the tracking offset can vary with conditions such as media tilt, lens decenter, optical spot aberrations, and groove asymmetry. These conditions can change from disk to disk and from point to point on a given disk. The tracking offset determined during a calibration period may therefore be unable to keep the recording beam sufficiently on-track in the presence of the changing conditions that can arise during actual data recording. Although the push-pull technique is used as an example, it should be understood that other tracking methods, both "single spot" and "multiple spot" are vulnerable to tracking errors from these effects as well.
As is apparent from the above, a need exists for a dynamic tracking technique in which a recording beam is maintained on-track using mark formation effectiveness information generated during actual data recording.
U.S. Pat. No. 4,118,735 (Wilkinson) and 4,322,837 (Mickelson et. al.) describe a dynamic tracking technique in which a read-back beam is continuously moved back and forth or "dithered" in a cross-track direction. This repetitive cross-track motion is correlated with any resulting variation in the intensity of the light reflected by the medium. When there is no correlation between cross-track motion and reflected light variations, the read-back beam is considered to be "on-track". This cross-track position corresponds to a minimum of the reflected light intensity for a "burn dark" medium (burn dark being defined as a medium where written marks are less reflective than unwritten lands). When there is any correlation between cross-track motion and reflected light variation, the relative phase (positive or negative) of the two signals is an indication of which side of "on-track" the read-back beam is located.
U.S. Pat. No. 5,434,834 (Shinoda et. al.) describes a similar method to keep a light beam on-track. It differs from U.S. Pat. Nos. 4,118,735 and 4,322,837 in that repetitive cross track motion is no longer achieved by dithering the illuminating beam. Rather, it is produced by the periodic side-to-side wobble of a pre-groove, such as found in recordable compact disk (CD-R) media. This relative cross-track motion between illuminating beam and recording medium is detected using well known methods such as push-pull techniques described above. As with U.S. Pat. Nos. 4,118,735 and 4,322,837, a tracking signal is derived by correlating this cross-track motion with variations in the reflected light intensity. Also, as with U.S. Pat. Nos. 4,118,735 and 4,322,837, "on-track" is defined as a minimum in reflected light intensity.
Commonly-assigned U.S. Pat. No. 08/584,933 improves upon these prior art methods by using a mark formation effectiveness (MFE) signal instead of the reflected light intensity of the prior art. By correlating repetitive cross-track motion with variations in an MFE signal, commonly-assigned U.S. Pat. No. 5,646,919 effectively performs a continuous, dynamic version of the static tracking offset calibration described in U.S. Pat. No.5,440,534. Commonly-assigned U.S. Pat. No. 5,646,919 recognizes that an MFE signal, which is a measured characteristic of the reflected write signal, is superior to simply detecting reflected light intensity for this measurement. A number of density-based DRDW techniques are described in commonly-assigned U.S. Pat. No. 5,646,919 to generate an MFE signal.
Mark formation effectiveness measurement is preferable to detecting reflected light intensity for a number of reasons. For example, the reflected light intensity depends directly on the specific write pulse pattern being recorded. Such data dependent fluctuations reduce measurement signal-to-noise as compared with an MFE signal, which is a specific measured characteristic of reflected write pulses and is much less dependent on data pattern. Also, the maximum MFE signal may not occur at the same cross-track position as the minimum reflected light intensity. This can result in a different on-track position for the method of commonly-assigned U.S. Pat. No. 5,646,919 as compared with the method of U.S. Pat. Nos. 4,118,735; 4,322,837; and 5,434,834.
With certain recording systems, however, there is relatively little change is total reflected light intensity during mark formation. With these systems, density-based DRDW techniques will produce low signal-to-noise MFE signals. If such an MFE signal is then used in the method described in commonly-assigned U.S. Pat. No. 5,646,919, the resulting dynamic tracking signal will have reduced signal-to-noise and may be more susceptible to error. There is a need, therefore, for a dynamic tracking method which is more effective with these types of recording systems.

Dynamic tracking control in an optical recording system by diffraction-based mark formation detection


A phototransistor device to act as an artificial photonic synapse includes a substrate and a graphene source-drain channel patterned on the substrate. A perovskite quantum dot layer is formed on the graphene source-drain channel. The perovskite quantum dot layer is methylammonium lead bromide material. A method of operating the phototransistor device as an artificial photonic synapse includes applying a first fixed voltage to a gate of the phototransistor and a second fixed voltage across the graphene source-drain channel. A presynaptic signal is applied as stimuli across the graphene source-drain channel. The presynaptic signal includes one or more pulses of light or electrical voltage. A current across the graphene source-drain channel is measured to represent a postsynaptic signal.

The present application relates generally to neuromorphic computing and more specifically to an electronic device controlled by light to produce photonic synapses and neuromorphic computing.
Graphene emerged as a popular material for electronics and optoelectronics applications due to its broad spectral bandwidth, excellent carrier transport properties with very high mobility (electron mobility >15000, cm−2·V−1·s−1), exceptional stability in ambient conditions, and outstanding flexibility. A plethora of composites and devices have been developed for applications in energy harvesting and storage, photodetectors, and transistors. However, a single layer of graphene absorbs only 2.3% of incident visible light. Moreover, to date, the responsivity of graphene photodetectors has been limited to about 10−2 AW−1. These limitations critically impede the use of graphene in optoelectronic and photonic devices. On the other hand, organic-inorganic halide PQDs have risen as attractive materials for optoelectronic devices due to their bandgap tunability across the visible spectrum, high photoluminescence quantum yield, narrow emission spectrum, and high extinction coefficients. The drawback is that their charge transport is far inferior to that of graphene.

Photonic synapse based on graphene-perovskite quantum dot for neuromorphic computing


A method of manufacturing a semiconductor wafer device, including the steps of: (a) forming lower wiring patterns over a semiconductor wafer, the lower wiring patterns being connected to semiconductor elements in a circuit area; (b) forming an interlevel insulating film with a planarized surface over the semiconductor wafer, covering the lower wiring patterns and having a planarized surface; and (c) forming via conductors connected to the lower wiring patterns and wiring patterns disposed on the via conductors in the circuit area and conductor patterns corresponding to the wiring patterns in a peripheral area other than the circuit area, by embedding the via conductors, wiring patterns and conductor patterns in the interlevel insulating film, the conductive patterns being electrically isolated. The method can form a desired wiring structure and can prevent an increase of the percentage of defective devices in an effective wafer area.

A) Field of the Invention
The present invention relates to a semiconductor wafer device and its manufacture method, and more particularly to a semiconductor wafer device having a damascene wiring structure and its manufacture method.
In this specification, an etching stopper layer is intended to mean a layer having an etch rate of one fifth or smaller than an etch rate of another layer under etching, in order that even if the etching stopper layer is exposed during etching, this etching stopper layer is prevented from being etched excessively.
B) Description of the Related Art
A higher integration density of semiconductor devices is desired increasingly. Conventionally, a wiring pattern is formed by forming an Al wiring layer or a W wiring layer on an insulating layer, thereafter forming an etching mask made of a resist pattern or the like on the wiring layer, patterning the wiring layer and embedding it with another the insulating layer.
As the integration density becomes high, there is an increasing need to narrow a width of a wiring pattern and a pitch between wiring patterns. Such fine patterning is now confronted in some cases to a limit in the techniques of forming a wiring pattern by directly pattering a wiring layer. This process is gradually replaced by a damascene wiring process by which a wiring groove and a via hole are formed in an insulating layer, a wiring layer is deposited on the insulation film, being filled in these wiring groove and via hole, and an unnecessary wiring layer on the top surface of the insulating layer is removed by chemical mechanical polishing (CMP).
As the wiring material, Cu is used recently which has a lower resistivity and a higher electro migration resistance than Al, Al alloy, W and the like. Although Cu provides excellent performances as the wiring material, it is likely to be oxidized forming an oxide film thereon, the oxide being not as chemically stable as the oxide of Al. It is necessary therefore to pay attention to a wiring structure and a wiring forming process.
As a damascene process of connecting upper and lower wiring patterns by a via conductor, a single damascene process and a dual damascene process are known. In the single damascene process, a via hole is formed through a lower interlevel insulating film, a via conductor is filled in the via hole, thereafter an upper interlevel insulating film is formed, a wiring groove is formed, and then a wiring pattern is filled in the wiring groove. In the dual damascene process, after a via hole and a wiring groove are formed in an interlevel insulating film, wiring material is filled in the via hole and wiring groove at the same time.
As the dual damascene process, there are a first-via type that a via hole is first formed and then a wiring groove is formed and a last-via type that a via hole is formed after a wiring groove is formed.
As the wiring density becomes high, a capacitance between wiring patterns is likely to become high. As the capacitance of a wiring pattern becomes high, a signal transmission speed lowers. In order to reduce the capacitance of a wiring pattern, it is effective to lower the dielectric constant of an insulating layer. In addition to a conventional silicon oxide insulating layer, other insulating layers have been used recently, such as: an insulating layer made of silicon oxide doped with fluorine or carbon; an insulating layer made of coating type hydrocarbon-containing organic insulating material; an insulating layer made of coating type inorganic insulating material; and a porous insulating layer containing voids.
These wiring techniques have not been developed sufficiently. It may occur that if techniques are improved in one aspect, a problem at another point occurs and a percentage of defective devices increases.

This patent is subject to a terminal disclaimer.

Semiconductor wafer device having separated conductive patterns in peripheral area and its manufacture method


A portable navigation device (200) with an ergonomic user interface is described. It includes: a housing (210); a controller (220) coupled to the housing (210), the controller (220) configured to control the operations of a portable navigation device; memory (270), coupled to the controller (220), being operable to store a route; an integrated global positioning system (GPS) receiver (250) in the housing (210), coupled to the controller (220); a display (240) within the housing (210) and coupled to the controller (220), the display (240) viewable from a front (305) of the housing (210); and a paddle control module (310) coupled to a rear portion (315) of the housing (210), configured to control certain operations of the device. The ergonomic design allows a user ease of access, to operate a portable navigation device accurately, intuitively and with minimal distraction, during operation. This structure provides an enhanced user experience.

1. Field
The present disclosure is directed to a portable navigation device with an ergonomic user interface.
2. Introduction
Today's GPS devices when used in a vehicular environment, are often distracting and/or difficult to use, because the controls are located either on or near the front display or off on the sides, making them difficult to locate. Further, many portable navigation devices (PND) are mounted on adjustable cradles and when the controls are touched, the housing and display moves. Thus, the user is distracted and disadvantageously is required to concentrate on keeping the device still, rather than making the appropriate key inputs when navigating. Thus, the keys are not optimally placed or placed where not visible or on a front face causing the display to share valuable front face real estate, thereby causing the display to be smaller. Additionally, there is a need to allow users to program keys, for improved user experience. In addition, there is a need for ergonomically configured PNDs with keys behind the display for several reasons. For example, PNDs need to allow users more control when pressing desired functions when navigating. More specifically, PNDs need to be secure when keys are pressed, versus pushing keys on the front and causing undesirable, mis-adjustment, movement and rotation. Also, PND keys need to be customizable, programmable and reversible, to enhance a user's experience with regard to the user interface. Stated differently, PNDs need to be easily customized from default settings. And, there is a need to strategically locate controls at locations other then the front panel, to minimize clutter on a front panel, where the display is located. Accordingly, there is a need to solve these problems and shortcomings. There is a need, to improve a user's experience in connection with PNDs, by for example using a squeezing gesture, when making control adjustments. Thus, a multi-touch gesture, such as squeezing between a user's thumb and fingers, allows the user to make desired adjustments, settings and customizations, while holding the PND securely, minimizing the chances of mis-aligning the display when mounted in a vehicle. Also, there is a need for intuitive and ergonomic PNDs. Thus, there is a need for improved PNDs.

Ergonomic user interface for a portable navigation device


A lightweight lug nut including a grooved body for receiving a wrench, a nose on the body for bearing against a rim, a threaded portion within the body, an enlarged bore between the threaded portion and the end of the body remote from the nose, a chamfer on the end of the body remote from the nose, a chamfered shoulder between the grooves and the nose, a plurality of teats at the remote end extending inwardly toward the enlarged bore, and a cap for mounting at the remote end and including a groove for receiving the plurality of teats.

The present invention relates to an improved lug nut and more particularly to one which is lightweight.
By way of background, in the past lug nuts used on automotive wheels usually had a hexagonal body for receiving a wrench. However, prior lug nuts were relatively heavy, and they thus caused the unsprung weight of the wheels to be correspondingly high. It is desirable to reduce this unsprung weight by lightening lug nuts.