A method and apparatus for performing a system memory read initiated by a bus master. In the prior art, a memory controller monitored activity on a system memory bus to determine whether to close a page of memory. Therefore, if a stall occurred during a burst read, the system memory bus would be idle and the page of system memory would be closed. The present invention keeps the page of system memory open during the entire burst read, even if the system memory bus becomes idle. Thus, latencies involved in opening and closing the page of system memory can be avoided. The present invention opens a page of system memory when receiving a first command, indicating the initiation of a read operation, from a bus master. The page of memory is kept open during the read operation, and is closed when a second command indicating the termination of the read operation is received from the bus master.

One type of prior computer system comprises a microprocessor connected to an external cache memory, a system memory, and various peripheral devices residing on a system bus. The microprocessor communicates with the cache memory, system memory, and peripherals through a chip that acts as a memory controller and a bridge to the system bus. The memory controller portion of the chip coordinates data transfers to and from these memory components at the request of the microprocessor or the peripheral devices.
FIG. 1 illustrates a prior art computer system employing a memory controller chip. The microprocessor 110 is coupled to an external cache memory 120 and system memory 130 on a host bus 160. The host bus 160 is connected to a memory controller and bridge chip ("memory controller") 140. A second bus, system bus 170, is connected to the memory controller 140. The memory controller 140 functions as a bridge between microprocessor 110 and bus master 150. Bus master 150 represents a peripheral device that is coupled to the system bus 150. For example, bus master 150 may include devices such as a small computer system interconnect (SCSI) controller, a graphics accelerator, and add-in boards.
The memory controller 140 handles data transfer requests to and from both the microprocessor 110 and the bus master 150. The microprocessor 110 may access either the external cache memory 120 or the system memory 130. The bus master 150 may access the system memory device 130. The memory controller 140 receives a read or write request from either the microprocessor 110 or the bus master 150 and determines if one of the devices is the source or target. The microprocessor issues a read or write request using standard microprocessor timings and the bus master issues a read or write request as defined by the protocol rules for the system bus 170. For instance, the system bus 170 may employ the peripheral component interconnect (PCI) protocol, as described in the PCI Local Bus Specification, Rev. 2.1 (July 1995), available from the PCI Special Interest Group (SIG) in Hillsboro, Oreg.
One type of prior art memory controller 140 includes the following functional blocks: a microprocessor interface 142 for communicating with the microprocessor 110, a cache controller 141 for communicating with the external cache memory 120, a system memory controller 143 for communicating with the system memory 130, and a bus controller 144 for communicating with the system bus 170. These functional components of the memory controller are typically included within one integrated circuit chip. Alternatively, some manufacturers split the functions among more than one chip.
For a typical data read, the memory controller 140 receives read commands from the microprocessor 110 or the bus master 150. The memory controller 140 determines (1) the "source", i.e. the device containing the requested data, and (2) the address within the device at which the data is to be found. When the source is determined to be the system memory 130, the memory controller 140 asserts signals to control the data transfer on the memory bus 180.
Typically, the system memory 130 comprises dynamic random access memory (DRAM). For instance, the system memory 130 may comprise synchronous or asynchronous DRAM. Synchronous DRAMs improve system performance over asynchronous DRAMs, but are typically more expensive. Recently another type of DRAM has been used for computer system platforms. The extended data out (EDO) DRAM theoretically improves system performance at a relatively low cost in comparison to page mode DRAM devices.
Two signals on the memory bus 180 are used to enable the system memory 130 in preparation for a data read. The DRAM is therefore addressed in two stages. First a particular row is addressed, and then a column within the row. A row is accessed by latching an address on the memory bus 180 along with the row address strobe (RAS#) signal. Then, an address within the row is accessed by latching a column address on the memory bus 180 with a column address strobe (CAS#) signal. The row of memory that is accessed by the address latched on the RAS# assertion is often referred to as a "page" of memory. The page is considered open for as long as the RAS# signal is asserted. Depending upon the particular DRAM device used, the page may be of any size. For instance, a typical page may be 2 or 4 Kilobytes.
Computer systems often incur a big performance hit whenever accessing system memory. There is a latency in system memory access time due to assertion and deassertion of the RAS# signal. This is because every time the RAS# signal is asserted, it takes a certain number of clocks for the DRAM page to become available thereafter. Moreover, after the RAS# signal has been deasserted, the RAS# signal must be precharged for a predetermined amount of time before being asserted once again. Therefore, each time the RAS# signal is deasserted, a latency occurs before the RAS# signal may be reasserted.
One type of prior art memory controller attempts to decrease system memory access time by monitoring the activity on the memory bus 180 and correspondingly deasserting the RAS# signal when the memory bus 180 is inactive. Thus, the memory controller pro-actively starts the precharge for a later memory access. However, this method may cause a performance hit when the memory bus 180 becomes inactive in the midst of a burst memory read.
For instance, there are times when the memory bus 180 becomes idle because the system bus 170 is not receiving data fast enough. The memory bus is twice as fast as the system bus 170, since the memory bus is 64 bits wide and the system bus is 32 bits wide. Data must therefore be read from the system memory 130 and stored in a buffer within the memory controller 140. The memory controller 140 then dispatches the data from the buffer to the system bus 170. The memory bus 180 becomes idle when the buffer in the memory controller 140 is full. The page in system memory 130 is then closed in the middle of a read operation.
Another instance wherein the memory bus 180 becomes inactive is when a cache hit occurs and a writeback is performed. The memory controller 140 performs cache snoops in parallel with a read from system memory 130. An internal cache within the microprocessor 110 is snooped, and the external cache memory 120 is snooped. If the snoop determines that a writeback to system memory 130 is necessary, data is written to both the system memory 130 and the system bus 170. The writeback to system memory 130 may occur much faster than the writeback to the system bus 170, causing the memory bus 180 to become idle. The page in system memory 130 is once again closed in the middle of a read operation.
It is therefore desirable to provide a memory controller and method of performing system memory reads that will increase the performance of system memory read operations. It is further desirable to provide a method of keeping a memory page open during burst reads from a bus master. Moreover, it is desirable to provide a memory controller that determines whether to keep a page in system memory open based on activity on the system bus, rather than the memory bus.

Memory controller and method of closing a page of system memory


A method is provided for forming an integrated circuit with an n-region including n-type FinFETs and a p-region including p-type FinFETs. Initially, a silicon-germanium (SiGe) layer consisting essentially of silicon (Si) and germanium (Ge) is formed. The SiGe layer is recessed to form a recessed SiGe layer in the n-type region while leaving an intact SiGe layer in the p-region. A Si layer consisting essentially of Si is formed on the recessed SiGe layer. The Si layer and recessed SiGe layer are patterned to form a Si/SiGe fin comprising a Si fin portion disposed on a recessed SiGe fin portion. The intact SiGe layer in the p-region is patterned to form an intact SiGe fin. The recessed SiGe fin portion in the n-region is selectively oxidized utilizing an oxidation process having an oxidation rate in the recessed SiGe fin portion faster than an oxidation rate in the Si fin portion.

The present invention relates to the electrical, electronic, and computer arts, and, more particularly, to methods for forming FinFETs.
Multi-gate field-effect transistors (FETs) are of considerable interest because of their superior electrostatic integrity, as well as their promise of lower supply voltages, reduced threshold voltages, and extended scalability. FinFETs are one form of such multi-gate device. In a FinFET, a narrow channel feature (i.e., fin) is raised above the substrate and passes under a gate, which effectively wraps around the fin. The gate is thereby capacitively coupled to the top as well as the sides of the fin. So structured, very little leakage current passes through channel portions of the fin when the device is in the off state. This allows the use of lower threshold voltages and higher switching speeds.
The inclusion of strained channels in modern FinFETs holds the promise of increased charge carrier mobilities and transistor device currents. Unfortunately, however, electron mobility and hole mobility benefit from different strain characteristics. The performance of an n-type FinFET is typically improved if its channel is tensily strained. In contrast, the performance of a p-type FinFET is typically improved if its channel is compressively strained. The two types of FinFETs thereby benefit from opposite strain conditions, adding complexity to any fabrication methodologies that wish to take advantage of strain characteristics.

Selective oxidation of buried silicon-germanium to form tensile strained silicon FinFETs

International Business Machines Corporation


A new and distinct cultivar of Petunia plant named ‘Kerminiblue’, characterized by its outwardly spreading to trailing growth habit; freely branching habit; early and freely flowering habit; dark violet blue-colored flowers; and good garden performance.

The present invention relates to a new and distinct cultivar of Petunia, botanically known as Petunia×hybrida and hereinafter referred to by the name 'Kerminiblue'.
The new Petunia plant is a product of a planned breeding program conducted by the Inventors in Over, Cambridge, United Kingdom. The objective of the breeding program is to create new trailing Petunia cultivars with dark violet blue-colored flowers.
The new Petunia plant originated from a cross-pollination made by the Inventors in August, 2005 in Over, Cambridge, United Kingdom of a proprietary selection of Petunia×hybrida identified as code number 05-227-1, not patented, as the female, or seed, parent with a proprietary selection of Petunia×hybrida identified as code number 05-227-3, not patented, as the male, or pollen, parent. The new Petunia was discovered and selected by the Inventors as a single flowering plant within the progeny of the stated cross-pollination in a controlled greenhouse environment in Over, Cambridge, United Kingdom in May, 2006.
Asexual reproduction of the new Petunia plant by terminal cuttings in a controlled greenhouse environment in Over, Cambridge, United Kingdom since September, 2006, has shown that the unique features of this new Petunia plant are stable and reproduced true to type in successive generations.


Non-masonry building block components, including a standard hollow-bodied block component with horizontal and vertical locking capabilities which removes the need for bonding material such as glue, mortar or other adhesives. Modified dovetails on the upper and lower surface of the building components prevent vertical movement while resistance locks on each end of the block prevent horizontal movement. Typically, use of the non-masonry building components would allow for constructing permanent or temporary structures having vertical and horizontal channels in which to allow plumbing or electrical conduit. The incorporation of materials, such as sand or similar substance, would form a bullet-resistant barrier for use in military operations. Additionally, structures formed from the block components could easily be assembled or disassembled on site without the need for skilled labor, specialized tools, demolition and clean up.

The innovative building block components were designed to address problems that exist in current masonry and non-masonry block systems. Presently, a vast majority of blocks used for construction are made of concrete, terra cotta or similar substance and are joined using mortar or other bonding agent. In other prior art the weight and friction of the blocks represents the sole means of staying the individual components. Non-masonry building components that have been previously developed in a polymer form often require additional rebar or adhesives which permanently affix the components to one another. This practice limits the life of the building components to a single use that requires demolition and cleanup when the structure is no longer viable, producing waste materials for disposal.
In the prior art a single fault in the bonding material results in a loss of structural integrity for the structure as a whole. Unlike bonded masonry blocks the material of the present invention and secure dual locking connection means resists compromise from extraneous variables due to weather, earthquakes, poor construction knowledge or the stress on the materials due to the construction process.
Additionally, the proposed building block system can be used to address a long felt need in the area of military construction. By filling the hollow-bodied embodiment of the present invention with sand or similar on-site materials, the blocks create an effective insulated and bullet resistant shelter while maintaining the mobility and ease of installation necessary in wartime situations. The building components of the present invention can also be mobilized over rough terrain without risk of structural compromise.

Unbonded non-masonry building block components


The present pool filtering system provides an elongated fine mesh filter with a large surface area; which can be removed and inserted through a standard filter access port found on pool decks. Because the filter assembly length is at least twice the diameter measurement, a large surface area is possible while remaining compact. The filter assembly includes a cylindrical porous filter basket that is completely lined with a filter bag. The filter bag can filter particulate matter as fine as three hundred microns or less. The present filtering system can provide preliminary filtering before water is delivered for further conditioning by secondary filters, heater, or the like. The present filter permits fine filtering without constant clogging or maintenance. When maintenance is required, there is easy access for cleaning and replacement. The elongated weir housing and weir door allows for a greater operating range of pool water level.

Residential and commercial pool filtration systems are known in the art. Typically these systems comprise a skimmer intake with a basket-like trap for retaining large debris such as leaves that flout on the surface of a pool, and a drain intake for pulling water from the bottom of the pool where sediment and other non-floating debris collects. Occasionally, the lines for the skimmer and drain intake merge into a single line which passes through a main pool filter, usually comprising a fine mesh, caked with a filtering media such as diatomaceous earth or cellulose fiber.
Small particulate debris taken in by the drain, and to a lesser extent having passed through the skimmer and trap, is collected by the filter and filtering media, which must be cleaned periodically. Cleaning the pool filter is a labor intensive, messy and water wasting task as it involves rinsing debris from the filter, possibly backwashing the filter, replacing the filter media and rinsing away the debris removed from the filter. In areas where deciduous trees and shrubs are near a pool, the trap must also be frequently emptied, since due to its small size it quickly fills with leaves. By pre-filtering the water with a fine mesh filter, trapping particles as small as 300 microns, before they reach the main pool filter, the main filter can remain in operation for a much longer period of time, clearing the water of even smaller particles. However, fine mesh filters require a large surface area to operate without requiring frequent maintenance due to clogging. Further, since filter/skimmer access portals are preferably small, such that they are inconspicuous and less of a pool-side trip hazard, large-area fine mesh filters cannot be easily fitted or removed through the small access portal.
For these reasons, a filtering apparatus is needed, which provides a more robust skimmer trap or filter and an easily accessible drain line filter adjacent the skimmer, both capable of retaining very small particles. There is also a need for large-sized filters which require only minimal space for access and removal on a pool patio. There is also a need for a filter apparatus incorporating a fill water inlet and an overflow line into the apparatus, and which is also adaptable for incorporating ozone or other purification systems into the skimmer and drain lines. Finally, there is a need for a modular filter apparatus allowing a skimmer pre-filter to be installed by itself, or with a drain line pre-filter as desired.

Enlarged pool filtering system with skimmer and pre-filter


A lamp ballast circuit for driving, e.g. four flourescent lamps with a ballast control IC such as the IR2167 Ballast Control IC. The circuit includes a lamp replacement detection circuit for detecting insertion of a lamp, and in response, controlling the ballast control IC to initiate automatic restart for of the control IC for proper firing of the lamps, including the newly inserted lamp.

1. Field of the Invention
The present invention relates to a lamp ballast circuit for driving multiple parallel lamps, and more particularly to a ballast circuit including a circuit for detection of when a lamp is inserted.
2. Related Art
There are several ways to drive four (for example) fluorescent lamps with an electronic ballast, including series configuration, parallel configuration and combined series and parallel configuration. But driving the four lamps in parallel has the advantage of lower voltage stress on the ballast output stage components, the wiring and the fixture sockets, as compared to the others. In addition, the resonant inductors and capacitors associated with the lamps will be less sensitive to component tolerances because running lamp voltage is lower. Further, even when one or more lamps is removed, the others can continue to run. For these reasons, the parallel configuration is more popular nowadays.
An excellent fluorescent lamp driver IC is the IR2167 manufactured by the International Rectifier Corporation. The IR2167 allows setting the various parameters such as preheat time and frequency, ignition ramp characteristics, running frequency and power through external programmable components. And comprehensive protection features of the IR2167 protect the overall circuitry from failure conditions such as lamp strike failures, lamp failures, low DC BUS and thermal overload. Also, the IR2167 controls its PFC circuitry with the critical conduction mode, which provides high power factor, low THD and DC Bus regulation. Thus, the IR2167 will be a suitable example, although not the only possible example, of a chip for use with the circuits to be described herein.

Lamp ballast for circuit driving multiple parallel lamps


A turbine shroud adapted for use in a gas turbine engine includes a plurality of metallic carrier segments and a plurality of blade track segments mounted to corresponding metallic carrier segments. Impingement tubes direct cooling air onto the blade track segments to cool the blade track segments when exposed to high temperatures in a gas turbine engine.

Gas turbine engines are used to power aircraft, watercraft, power generators, and the like. Gas turbine engines typically include a compressor, a combustor, and a turbine. The compressor compresses air drawn into the engine and delivers high pressure air to the combustor. In the combustor, fuel is mixed with the high pressure air and is ignited. Products of the combustion reaction in the combustor are directed into the turbine where work is extracted to drive the compressor and, sometimes, an output shaft, fan, or propeller. Left-over products of the combustion are exhausted out of the turbine and may provide thrust in some applications.
Compressors and turbines typically include alternating stages of static vane assemblies and rotating wheel assemblies. The rotating wheel assemblies include disks carrying blades around their outer edges. When the rotating wheel assemblies turn, tips of the blades move along blade tracks included in static shrouds that are arranged around the rotating wheel assemblies. Such static shrouds may be coupled to an engine case that surrounds the compressor, the combustor, and the turbine.
Some shrouds are made up of a number of segments arranged circumferentially adjacent to one another to form a ring. Such shrouds are sometimes positioned in a turbine section of the engine. Thus, the shrouds contact high temperature products discharged from the combustor and may require cooling.

This patent is subject to a terminal disclaimer.

Impingement tubes for gas turbine engine assemblies with ceramic matrix composite components

Rolls-Royce North American Technologies Inc.


The present invention provides processes for removing nitrogen species from fresh water or high salinity water recirculated aquaculture systems. The processes are based on physico-chemical treatments which are performed at ambient temperatures and at low p H values thus keeping the total ammonia nitrogen concentrations below a value which is considered detrimental for the growth or survival rate of cultured fish/shrimp.

Aquaculture, also known as the farming of aquatic organisms, provides nearly one third of all seafood consumed in the world at present. It constitutes an alternative to fishing and is expected to expand with the increase of consumers' demand for seafood and the decrease in wild supplies (Timmons, Ebeling, Wheaton, Summerfelt, and Vinci, 2002, Recirculating Aquaculture Systems, 2nd Edition, 760, Cayuga Aqua Ventures, Ithaca, N.Y.).
Aquaculture systems can be extensive, semi-extensive, or intensive, depending on the number of organisms grown per volume of water. An exemplary extensive aquaculture system is a pond culture. Cage culture is considered semi-intensive outside the cage and intensive inside the cage. The main disadvantage associated with these aquaculture systems is their high water consumption (typically 3-5 m3 per kg fish produced). These systems also tend to be environmentally unfriendly.
Recirculated Aquaculture Systems (RAS) are intensive aquaculture systems which were developed and refined over the past thirty years. These systems provide a controlled environment in which fish grow. Consequently, fish can be stocked at high to very high densities, depending on the fish species. In these systems fish are raised in tanks, sometimes within closed buildings, while water is recycled throughout the system and various treatment units enable maintenance of adequate water quality. In this manner only a small percentage of the water is exchanged daily. Failure of any one of the treatment units can cause the entire system to fail, usually killing the fish population. RAS have relatively low water consumption and thus can be built at favorable locations, with less dependency on the water source. RAS further provide year-round production, mitigation of environmental risks (e.g. diseases) and pollution. RAS are species-adaptable, allowing operators to follow market trends for seafood preference. Moreover, RAS constitute a "point source" of pollution, which enable efficient solids waste treatment and nutrient removal and are thus considered environmentally friendly.
The high fish densities in RAS require efficient gas-transfer systems which dissolve oxygen and remove carbon dioxide from the culture water. Additionally, nonionized ammonia (NH3) is toxic to many fish species at concentrations as low as 0.0125 mg NH3—N L−1. In order to avoid the accumulation of ammonia, a nitrification unit is employed to reduce the total ammonia nitrogen (TAN) to concentrations typically below 3 mg L−1 (warm-water fish; Timmons et al., 2002). One equivalent of alkalinity is generated for each equivalent of ammonia (NH3) excreted by the fish gills when converted to the ammonium ion (NH4+) at pH close to neutral, at which the pond is typically operated. Nitrification consumes approximately two equivalents of alkalinity per mole of oxidized ammonium. Thus, in RAS with a nitrification unit, only one equivalent of alkalinity is lost per mole nitrogen excreted by the fish. In high-density cultures, this alkalinity loss can lead to the elimination of the water buffer capacity, which may result in a pH drop, which in turn hinders nitrification, causes ammonia to accumulate, and may finally result in fish death. In order to avoid this scenario, a strong base such as sodium hydroxide (NaOH) or a weak base such as sodium bicarbonate (NaHCO3) is usually added to the system. Alternatively, the make-up water flow rate can be increased or the effluents of a denitrification reactor can be recycled back into the pond.
Treatment of aquaculture farm effluents can amount to 2%-10% of the total production costs (Cripps and Bergheim, 2000, Aquacultural Engineering, 22, 33-56) which is a major disadvantage as compared to the less sophisticated aquaculture facilities, such as earthen ponds and fish cages. Profitability of recirculating systems depends in part on the ability to manage nutrient wastes (Van Rijn, Tal and Schreier, 2006, Aquacultural Engineering 34, 364-376).
Currently, most RAS configurations do not include a nitrate removal unit, and hence nitrate concentration in the effluents is set only by the make-up water exchange rate. Intensive nitrate removal is feasible only if a denitrification reactor is employed (e.g. in zero discharge systems). Typically, only ammonia (which is immediately toxic to the fish) is removed, while nitrate and dissolved phosphorus species (which constitute an environmental problem but are not considered toxic at reasonable concentrations) accumulate in the water and are disposed of with the discharge from the pond. The removal of all the nutrients is employed in several RAS technologies by applying a closed loop nitrification-denitrification sequence. The removal of phosphorous species is usually performed by the addition of chemicals. The conventional technique for N species removal consists of biological ammonia removal by nitrifying bacteria. However, nitrifying bacteria are autotrophic organisms with a long doubling time and low biomass yield. Therefore, these systems suffer from long start-up periods and when failure occurs, the recovery of the bacterial population is slow. Moreover, when a denitrification system is employed and its effluent is recycled back into the system, turbidity may develop in the pond which increases the potential for the outbreak of disease. The reduction of make-up water and the recycle of the water through the denitrification reactor have also been associated with the development of off-flavor in the fish.
US 2003/0052062 discloses a nitrogen treating method wherein a nitrogen compound in for-treatment water is treated according to an electrochemical technique with hypohalogenous acid, or ozone or active oxygen.
US 2009/0317308 discloses catalysts for converting ammonia in an aqueous solution directly to nitrogen gas at about or above ambient temperature.
US 2009/0317308 further provides a method for water treatment to lower its ammonia content by converting the ammonia to nitrogen directly in aqueous phase.
U.S. Pat. No. 4,522,727 discloses a continuous process for removal of ammoniacal nitrogen from water with a particulate zeolitic ion exchange material that is continuously regenerated by heating in the presence of an oxygen-containing gas.
U.S. Pat. No. 5,512,182 discloses a method for removing trace amounts of ammonia and ammonia-containing compounds from process water involving the destruction of the ammonia by oxidative procedures.
US 2004/0134796 discloses an apparatus for diminishing the concentration of ammonium in wastewater, and for disposing of the ammonium as nitrogen gas, the apparatus includes an ammonium-extraction-and-transfer station which is operable to transfer the ammonium extracted from the stream of wastewater into solution, and an electrolysis station to electrolyze the secondary-water and to oxidize the ammonium dissolved therein to nitrogen gas. The apparatus further includes a nitrogen-discharge port, for discharging the resulting nitrogen gas from the electrolysis station.
Seed et al. (www.enpar-tech.com/documents/AmmEL_WEAO_2003.pdf) discloses an ion-exchange/electrochemical technology to treat ammonia in wastewater streams which uses electrochemistry to convert ammonia to nitrogen gas.
There is an unmet need for economical and reliable technique for removal of nitrogen and phosphorus species which are excreted by the fish in a recirculated aquaculture system without the use of hazardous chemicals.

Physico-chemical process for removal of nitrogen species from recirculated aquaculture systems

TECHNION RESEARCH AND DEVELOPMENT FOUNDATION LTD.


A ceiling fan that incorporates into its blades both a system for air purification by removing dust and other particulate pollutants from the air in a room through ionization of the air stream passing over an ionizer grid and also a system for heating and cooling the air stream passing over the blades. The device provides a room conditioner for efficiently heating or cooling and maintaining a room at a temperature comfortable to the user. The device also provides negative ion generation through the use of the ionizer.

1. Field of the Invention
The present invention relates generally to fans and, more specifically, to a ceiling fan that incorporates into its blades both a system for air purification through ionization of the air stream passing over the ionizer grid and also a system for heating and cooling the air stream passing over the blades. The device provides a room conditioner for efficiently heating or cooling and maintaining a room at a temperature comfortable to the user. The device also removes dust and other particulate pollutants from the air in a room.
2. Description of the Prior Art
There are other devices designed for removing particulate matter from the air by means of ionization. There are no known fans having blades comprising spaced apart members having a space therein providing means applying a voltage and thereby ionizing the air stream.
Therefore, while these other devices may be suitable for the purposes for which they were designed, they would not be as suitable for the purposes of the present invention, as hereinafter described.

Fan having blade members that heat and cool and has an ionizing grid for air purification


The present invention is a device to restrict the sampling of analyte ions and neutral molecules from surfaces with mass spectrometry and thereby sample from a defined area or volume. In various embodiments of the present invention, a tube is used to sample ions formed with a defined spatial resolution from desorption ionization at or near atmospheric pressures. In an embodiment of the present invention, electrostatic fields are used to direct ions to either individual tubes or a plurality of tubes positioned in close proximity to the surface of the sample being analyzed. In an embodiment of the present invention, wide diameter sampling tubes can be used in combination with a vacuum inlet to draw ions and neutrals into the spectrometer for analysis. In an embodiment of the present invention, wide diameter sampling tubes in combination with electrostatic fields improve the efficiency of ion collection.

A desorption ionization source allowing desorption and ionization of molecules from surfaces, ionization direct from liquids and ionization of molecules in vapor was recently developed by Cody et al. as described in "Atmospheric Pressure Ionization Source" U.S. Pat. No. 6,949,741 which is expressly incorporated by reference in its entirety. Cody et al. allows for the Direct Analysis in Real Time (DART®) of analyte samples. This method utilizes low mass atoms or molecules including Helium, Nitrogen and other gases that can be present as long lived metastables as a carrier gas. These carrier gas species are present in high abundance at atmospheric pressure where the ionization occurs. This ionization method offers a number of advantages for rapid analysis of analyte samples.

Flexible open tube sampling system for use with surface ionization technology


A suspension arm mounting structure comprises: an arm body section (14) which is disposed between a wheel and a vehicle body and which is configured from a plate-shaped member; a rubber elastic body (46) which is provided between the arm body section (14) and the vehicle body; and a shaft section (16) which is extended from the arm body section (14) in the front-rear direction of the vehicle, is press-fitted or fitted in the through-hole (48) of the rubber elastic body (46), and has a tube-like shape or a closed cross-sectional shape. The shaft section (16) has a pressing section (52) which causes both end surfaces of the plate-shaped member to face each other and press against each other so that the opposing end surfaces are in contact with each other so as to press against each other.

Conventionally, suspension arms which connect the vehicle body side and the wheel side through a bush are used in the vehicle suspension. As a structure of such a type of suspension arms, for example, Patent Literature 1 discloses a control arm 1 constituted by a main body 2 and a plurality of support portions 3 as illustrated in FIG. 12A. In the disclosed control arm 1, one of the plurality of support portions is a bearing journal 4 which is formed integrally with the main body 2 by bending a metal plate.
The bearing journal 4 is formed to have an approximately cylindrical shape by arranging a transition portion 5 between the main body 2 and the bearing journal 4, where the transition portion 5 extends from the main body 2 (which has an approximately U-shaped cross section) and has a funnel-like shape with the diameter gradually decreasing toward the bearing journal 4.


Systems and methods for the implementation of a remote test access feature using virtual connection points and sub-network connections by the merge-and-split of flexible permanent virtual circuits. A sub-network connection is created between a remote test set and a connection termination point of a circuit of interest through the provision of two endpoints of interest. Subsequently, monitoring and management capabilities are established and operation, administration, and maintenance functions are performed at a centralized location using a network management system. The remote tap used may employ any protection scheme and mesh restore, as necessary, either manually or automatically, in the event of signal degrade or failure scenarios. The endpoint of the remote tap may be selectively changed, and the remote tap re-groomed for a different circuit of interest via a simple point-and-click.

Providing a test capability in the network elements (NEs) of a transport network involves offering transport network operators a mechanism with which to observe, diagnose, isolate, and fix problems with the individual circuits associated with the transport network. A key attribute of this test capability is that it must enable access to a given end-to-end circuit without requiring the customer premises equipment (CPE) devices to be disconnected from their respective NE ports for the purpose of connecting test devices. In order to provide this test capability, digital cross-connect system (DCS) NEs include ports known as test access ports (TAPs). These TAPs are used to mirror the data flows at the various network interfaces. Thus, the DCSs integrate digital test access unit (DTAU) functions into the NEs themselves. The TAPs are connected to test units (TUs) for the purpose of monitoring the data flows, and may be used to inject traffic either towards an end-user or towards interior NEs within the transport network.
Various standards specify two distinct types of TAPs: (1) local TAPs and (2) remote TAPs. The local TAPs are used for connecting test devices to a NE and diagnosing circuits on that same NE. The remote TAPs, on the other hand, are connected to remote test units (RTUs). These RTUs are termed "remote" only because they are physically separated from the test operations systems (TOSs) that are used for testing. In all other aspects, local TAPs and remote TAPs are functionally equivalent. The TOSs communicate with a test system controller (TSC)/RTU via a control link to initiate test access. The standards do not specify the type of connection between the TSC and the RTU.
Disadvantageously, conventional remote test access features require manual cross-connects to be set up at every node that is needed to complete the network connection between the remote test set and the circuit of interest. This requires the transport network operator to login to every node and set up the cross-connect. If there is any traffic degradation or failure at any of the connection termination points (CTPs), there is no protection mechanism for the remote tap, and, as a result, the remote tap is not able to reach the circuit of interest. If it is desired to use the same remote tap to reach different circuits of interest using the same remote test set, all of the cross-connects that are set up must be torn down, and set up again. If the circuit of interest is modified, as in the case of protecting it or making it drop-and-continue, the remote tap is lost. Finally, the remote tap is inherently bidirectional. As a result, monitor modes are not supported.
Thus, what are needed are systems and methods for the implementation of a remote test access feature using VCPs and SNCs by the merge-and-split of flexible cross-connects, thereby addressing the disadvantages described above.


The invention relates to a reactor assembly for the production of polymers including a fluidized bed reactor (1) comprising a bottom zone (5), a middle zone (6) and an upper zone (7), an inlet (8) for the fluidization gas located in the bottom zone (5), an outlet (9) for the fluidization gas located in the upper zone (7); the outlet (9) for the fluidization gas being coupled with the fluidized bed reactor (1) via inlet (8); the equivalent cross-sectional diameter of the bottom zone (5) being monotonically increasing with respect to the flow direction of the fluidization gas through the fluidized bed reactor; the middle zone (6) having an essentially constant equivalent cross-sectional diameter with respect to the flow direction of the fluidization gas through the fluidized bed reactor; the equivalent cross-sectional diameter of the upper zone (7) being monotonically decreasing with respect to the flow direction of the fluidization gas through the fluidized bed reactor; wherein that the ratio of the height of the fluidized bed reactor to the equivalent cross-sectional diameter of the middle zone of the fluidized bed reactor is from 2 to 10; and wherein there is an unobstructed passageway in the direction of flow of the fluidization gas through the fluidized bed reactor from the bottom zone (5) to the upper zone (7).

Gas phase reactors are commonly used for the polymerization of olefins such as ethylene and propylene as they allow relative high flexibility in polymer design and the use of various catalyst systems. A common gas phase reactor variant is the fluidized bed reactor. In polyolefin production, olefins are polymerized in the presence of a polymerization catalyst in an upwards moving gas stream. The fluidization gas is removed from the top of the reactor, cooled in a cooler, typically a heat exchanger, re-pressured and fed back into the bottom part of the reactor. The reactor typically contains a fluidized bed comprising the growing polymer particles containing the active catalyst located above a distribution plate separating the bottom and the middle zone of the reactor. The velocity of the fluidization gas is adjusted such that a quasi-stationary situation is maintained, i.e. the bed is maintained at fluidized conditions. In such a quasi-stationary situation, the gas and particle flows are highly dynamic. The required gas velocity mainly depends on the particle characteristics and is well predictable within a certain scale range. Care has to be taken that the gas stream does not discharge too much polymeric material from the reactor. This is usually accomplished by a so called disengagement zone. This part in the upper zone of the reactor is characterized by a diameter increase, reducing the gas velocity. Thereby the particles that are carried over from the bed with the fluidization gas for the most part settle back to the bed. Yet another fundamental problem with traditional fluidized bed reactors are the limitations as to the cooling capacity and entrainment due to the formation of huge bubbles. It should be mentioned that the presence of bubbles as such is desirable, since mixing is intensified thereby. However, bubble size should be much smaller than the diameter of the reactor. Increasing the bed level in conventional fluidized bed reactors for increasing the space-time yield leads to an increase of the bubble size and to an unwanted entrainment of material from the reactor. In conventional reactors there are no means for breaking up the bubbles.
Various modified gas phase reactor designs have been proposed. For example, WO-A-01/87989 has proposed a fluidized bed reactor without a distribution plate and an asymmetric supply of the reaction components to the reaction chamber.
M. Olazar has reported a spouted bed reactor in Chem. Eng. Technol., 26 (2003), 8, p. 845-852. In this reactor, a jet of fluids is introduced in a cylindrical or conical vessel containing solid. Under proper conditions, the jet penetrates the particles upwards through the spout. Recirculation takes place in the outer phase neighbouring the spout.
Dual reactor assemblies comprising two reactors are also known. WO 97/04015 discloses two coupled vertical cylindrical reactors, the first reactor being operated under fast fluidization conditions. The first reactor having a frustoconical bottom zone and a hemispherical upper zone is coupled with the second reactor being a settled bed reactor. The operation under fast fluidization conditions is done in a reactor having a ratio of length/equivalent cross-sectional diameter of about 5 or more.
WO-A-01/79306 discloses a gas phase reactor assembly comprising a reactor including a distribution grid coupled with a cyclone separating solids and gaseous material. The separated solids are recycled back to the reactor.
WO-A-2009/080660 reports the use of a gas phase reactor assembly as described in WO-A-97/04015 comprising two interconnected reactors and a separation unit, the first reactor being a so called riser and the second reactor being a so called downcomer. The first reactor is operated under fast fluidization conditions.
However, the fluidized bed reactors and the dual reactor assemblies comprising a fluidized bed reactor described in the prior art still have several disadvantages.
A first problem concerns the plugging of the underside of the distribution plates due to entrainment of fines carried over with the circulation gas. This effect lowers operational stability and stability of the quality of the polymer. This problem partially can be overcome by lower fluidization gas velocity. However, a relatively low fluidization gas velocity limits the production rate and can lead to the formation of sheets, chunks and lumps in the production of polyolefins. This conflict of aims usually has been countered by the incorporation of a disengagement zone. However, disengagement zones again limit the production rate of a gas phase reactor of fixed size, as there is the need for additional top space above the top level of the fluidized bed during operation. In industrial dimensions, the height of the disengagement zone often amounts to more than 40% of the total volume of the reactor and insofar requires the construction of unnecessary huge reactors.
A second problem concerns the bubbling. Conventional fluidized bed reactors typically operate in a bubbling regime. A part of the fluidization gas passes the bed in the emulsion phase where the gas and the solids are in contact with each other. The remaining part of the fluidization gas passes the bed in the form of bubbles. The velocity of the gas in the bubbles is higher than the velocity of the gas in the emulsion phase. Further, the mass and heat transfer between the emulsion phase and the bubbles is limited, especially for large bubbles having a high ratio of volume to surface area. Despite the fact that the bubbles positively contribute to powder mixing, formation of too large bubbles is undesired because the gas passing through the bed in the form of bubbles does not contribute to the heat removal from the bed in the same way as the gas in the emulsion phase and the volume occupied by the bubbles does not contribute to the polymerization reaction.
Yet a further problem concerns the elimination of sheets, chunks and lumps. Complete absence of sheets, chunks and lumps is rather difficult to achieve in standard reactors. Typically the sheets, chunks and lumps are removed above the distribution plate by additional outlets and receiver units which can get plugged and anyway do not allow a full removal of the sheets, chunks and lumps.
Thus there is still the need for improved reactor design. The present invention aims to overcome the disadvantages of the reactor designs known in the prior art and particularly aims to avoid the segregation of fines at a high production rate. The present invention further aims at avoiding low productivity zones in the reactor. Moreover, the present invention concerns the provision of a reactor, allowing high operational stability and at the same time production of polymer having highest quality. In yet another aspect, the present invention aims at a reactor assembly minimizing the formation of sheets, chunks and lumps.

Flexible reactor assembly for polymerization of olefins


A new Osteospermum plant particularly distinguished by a compact plant with good branching, flowers composed of ray florets having a purple base and a white and purple stripe towards the tips with white-grey disc florets, and flowers open pale colored and flower color increases in intensity over the next 2 to 3 flowering days, is disclosed.

The present invention comprises a new and distinct variety of Osteospermum, botanically known as Osteospermum hybrida, and hereinafter referred to by the variety name 'SAKOST8340'. 'SAKOST8340' originated from a hybridization in May-June 2008 in Marslev, Denmark of the proprietary female Osteospermum variety '206156' (unpatented) and the commercial male Osteospermum variety 'SAKOST8201' (U.S. Publication No. 2012/0278960). The goal of this breeding program was to create a plant having white and purple ray florets and white-grey disc florets.
In May-June 2008, the two Osteospermum lines '206156' and 'SAKOST8201' were crossed and seeds were obtained. The seeds were sown and plants were grown in pots for evaluation. In winter 2008-2009, a line was selected.
In February 2009, the line was first vegetatively propagated by cuttings and re-evaluated in an open field and a greenhouse in May 2009. In June 2009 and autumn 2010, the line was selected for further trialing and the stability of the distinct characteristics of this variety was confirmed.
The line was subsequently designated 'SAKOST8340' and was found to reproduce true to type in successive generations of asexual propagation via vegetative cuttings.


A sewing machine cover 2 includes a cover main body 7 and an extension cover portion 8. The cover main body 7 houses a left-right embroidery-frame drive mechanism 60 for driving an embroidery frame 50 in leftward and rightward directions. The extension cover portion 8 houses a front-rear embroidery-frame drive mechanism 80 for driving the embroidery frame 50 in front and rear directions. An opening 35 for engaging with an engagement portion 11 of a bed portion 3 is formed in a wall 31 of the cover main portion 7. When the sewing machine cover 2 is used as a cover of a sewing machine M, a bed surface 12 and an upper surface of the wall 31 form a substantially continuous work surface.

1. Field of the Invention
The present invention relates to a sewing machine having a bed portion, an arm portion extending parallel with the bed portion, and a cover capable of at least partially covering a space between the bed portion and the arm portion.
2. Description of the Related Art
A variety of sewing machines are known in the art. Sewing machines have a frame with a bed portion, a column portion extending upright from the bed portion, and an arm portion extending from the column portion in a horizontal direction over the bed portion in parallel with the bed portion.
In some sewing machines, the bed portion includes a free arm portion at the end not connected to the column portion. The free arm portion enables the user to easily sew patterns on or stitches in bags or cylindrical-shaped objects, such as shirt sleeves and cuffs of pants.
Japanese Utility-Model-Application Publication No. SHO-63-21265 discloses a sewing machine with a cover capable of at least partially covering the bed portion and the arm portion of the sewing machine and also capable of serving as a supplementary table for increasing work surface of the bed portion during the sewing.
There are also a variety of embroidery sewing machines capable of performing embroidery sewing operations in addition to normal sewing operations. Such embroidery sewing machines include: an embroidery frame in which a workpiece cloth is supported; and left-right and front-rear embroidery-frame drive mechanisms for independently driving movement of the embroidery frame leftward, rightward, frontward, and rearward across the work surface of the bed.
Embroidery sewing machines can be divided into two major types: internal embroidery-frame drive mechanism types, wherein the embroidery-frame drive mechanism for driving the embroidery frame is accommodated in the bed portion of the embroidery sewing machine; and detachable embroidery-frame drive mechanism types, wherein the embroidery-frame drive mechanism of the embroidery frame is detachable provided to the bed portion.
Japanese Patent-Application Publication No. HEI-7-328274 describes an internal embroidery-frame drive mechanism type embroidery sewing machine, wherein one end of the bed portion is formed with a free arm and wherein the left-right embroidery-frame drive mechanism and the front-rear embroidery-frame drive mechanism are housed in a base of the sewing machine under the bed portion.
U.S. Pat. No. 5,231,941 describes a detachable embroidery-frame drive mechanism type embroidery sewing machine having an embroidery device detachably provided to a free arm portion of the bed. The embroidery device houses a left-right embroidery-frame drive mechanism and a front-rear embroidery-frame drive mechanism for driving movement of an embroidery frame over the upper surface of the bed portion via a movement body provided to the upper surface of the embroidery device.


A buffer layer with a composition of AlaGabIncN (a+b+c=1, a, b, cxe2x89xa70) and a multilayered thin films with a composition of AlxGayInzN (x+y+z=1, x, y, zxe2x89xa70) are formed in turn on a substrate. The Al component of the Al component-minimum portion of the buffer layer is set to be larger than that of at least the thickest layer of the multilayered thin films. The Al component of the buffer layer is decreased continuously or stepwise from the side of the substrate to the side of the multilayered thin films therein.

(1) Field of the Invention:
This invention relates to a photonic device such as a light-emitting device and a photodetector, and a substrate for fabricating such a photonic device, in which multilayered thin films made of III-V nitride semiconductor are epitaxially grown.
(2) Background of the Invention
A III-V nitride semiconductor material is commercially used for a photonic device such as a light-emitting device and a photodetector. As the above III-V nitride semiconductor material, an AlxGayInzN (x+y+z=1, x, y, zxe2x89xa70) material is widely available, that is, each layer of the photonic device is composed of the AlxGayInzN film that is epitaxially grown by a MOCVD method. In this basic case, TMA (trimethyl aluminum) is employed as the Al raw material and TMG (trimethyl gallium) is employed as the Ga law material, and TMI (trimethyl indium) is employed as the In law material. Moreover, NH3 is employed as the nitrogen raw material. N2 gas and/or H2 gas is used as a carrier gas.
Then, various control of the above raw materials in flow rate can change the composition of the AlxGayInzN film. An AlN film has its bandgap Eg of 6.2 eV, and a GaN film has its bandgap Eg of 3.4 eV. Therefore, in the case of forming an AlxGal-xN film using TMA and TMG, the AlxGal-xN film has substantially its bandgap of 6.2x+3.4(1xe2x88x92x)eV, and has substantially its emission wavelength xcex=1240/{6.2x+3.4(1xe2x88x92x)} from an equation xcex=1240/Eg. Given x=0.3, the emission wavelength xcex is 292 nm. In this case, the detection wavelength is below 292 nm.
In the case of fabricating a light-emitting diode from the AlxGayInzN (x+y+z=1, x, y, zxe2x89xa70) multilayered thin films, when the AlxGayInzN film is epitaxially grown on a C-faced sapphire substrate by a MOCVD method, it includes large amount of defect, resulting in the deterioration of its crystallinity and thus the deterioration of its light-emitting efficiency.
From this point of view, it is proposed that the AlxGayInzN (x+y+z=1, x, y, zxe2x89xa70) multilayered thin films is formed on the sapphire substrate via a buffer layer made of a GaN film which is epitaxially grown by a CVD at low temperature. The GaN buffer layer supplements the lattice constant of 10% and over between the sapphire substrate and the multilayered thin films, and provides a favorable crystallinity to the multilayered thin films. Instead of the GaN buffer layer, an AlN buffer layer may be employed.
A conventional light-emitting device as mentioned above can emit a light having only 400 nm or over. Therefore, the AlxGayInzN multilayered thin films are required to have a relatively large amount of the Al component in order to emit a short wavelength blue light or a short wavelength ultraviolet light. Moreover, for emitting a green to blue light, all the AlxGayInzN films except a light-emitting layer are required to have a relatively large amount of the Al components, respectively, in order to confine energy in the light-emitting layer effectively. However, if the Al-rich AlxGayInzN tin film is formed on the buffer layer, made of e.g. the GaN film or the AlN film, epitaxially grown by the CVD at low temperature, it may bring about cracks in the Al-rich AlxGayInzN thin film and deteriorate the crystallinity thereof.
The reason is that since the Al-rich AlxGayInzN thin film has a smaller lattice constant, a large tensile stress may be brought about in the thin film due to the large difference in the lattice constants between the thin film and the buffer layer if the thin film is formed on the buffer layer. Moreover, the lateral growth speed of the Al-rich AlxGayInzN thin film is very small, and thus, the enhancement of the crystallinity of the thin film is hindered by the poor crystalline buffer layer due to the low temperature epitaxial growth. Moreover, in a photodetector such as a UV photodetector, its detecting sensitivity is degraded due to the poor crystallinity of the buffer layer.
In order to iron out the above matters, such a light-emitting device having a Al-rich AlxGayInzN multilayered thin films on a buffer layer made of an AlxGal-xN (1xe2x89xa7x greater than 0) film is disclosed and proposed in the publication of unexamined patent application, Tokukai Hei 9-64477 (JP A 9-64477).
Moreover, such a light-emitting device is disclosed in the publication of unexamined patent application, Tokukai Hei 5-291628 that plural Gal-x-yInxAlyN (1xe2x89xa7xxe2x89xa70, 1xe2x89xa7xxe2x89xa70) thin films having their various x- and/or y-components are formed on a sapphire substrate to obtain a predetermined Gal-a-bInaAlbN (1xe2x89xa7axe2x89xa70, 1xe2x89xa7bxe2x89xa70) buffer layer, and then, the Gal-a-bInaAlbN (1xe2x89xa7axe2x89xa70, 1xe2x89xa7bxe2x89xa70) multilayered thin films are formed on the buffer layer.
In Tokukai Hei 9-64477, since the AlGaN buffer layer is formed at a relatively high temperature, the Al-rich AlxGayInzN multilayered thin films epitaxially grown on the buffer layer can have relatively favorable crystallinity and does not have cracks therein.
However, the AlGaN buffer layer requires to be formed at a high temperature of 1300xc2x0 C. or over, and annealed at a high temperature of about 1500xc2x0 C. after the formation of the buffer layer. Such a high temperature treatment overloads a heater in a MOCVD apparatus, resulting in the complication of the maintenance and the increase of the manufacturing cost.
Particularly, in realizing a photonic device to emit or detect an above-mentioned short wavelength light, since the required Al-rich AlxGayInzN multilayered thin films has its respective small vertical and lateral growth speed, its high film-forming temperature must be held for a long time, thus overloading a heater and so on of a MOCVD apparatus.
When the above AlGaN buffer layer having a thickness of 0.3 xcexcm is formed at about 1200xc2x0 C., many cracks come into being in the buffer layer and the crystallinity of the buffer layer is deteriorated. As a result, the entire crystallinity of the Al-rich AlxGayInzN multilayered thin films is deteriorated.
In Tokukai Hei 5-291618, since the Gal-a-bInaAlbN (1xe2x89xa7axe2x89xa70, 1xe2x89xa7bxe2x89xa70) multilayered thin films is formed on the Gal-a-bInaAlbN (1xe2x89xa7axe2x89xa70, 1xe2x89xa7bxe2x89xa70) buffer layer composed of the laminated plural Gal -x-yInxAlyN (1xe2x89xa7xxe2x89xa70, 1xe2x89xa7xxe2x89xa70) thin films having their various x- and/or y-components, it can have its favorable crystallinity and almost never have cracks therein. Moreover, since the buffer layer is formed at a low temperature of about 700xc2x0 C., a heater in a MOCVD apparatus is not overloaded.
However, in the above conventional fabricating method, the multilayered thin films and the buffer layer have the same component and composition, so that they are continued though their boundaries. In this case, a leak current is flown to the buffer layer from the multilayered thin films, resulting in the reduction of the light-emitting efficiency of the light-emitting device having the multilayered thin films due to the resistance loss.
It is an object of the present invention to provide a photonic device having an AlaGabIncN (a+b+c=1, a, b, cxe2x89xa70) buffer layer and an AlxGayInzN (x+y+z=1, x, y, zxe2x89xa70) multilayered thin films without cracks epitaxially grown on the buffer layer which have their favorable crystallinities, and a substrate for fabricating the photonic device.
It is another object of the present invention to provide a method for fabricating the photonic device and a method for manufacturing the photonic device-fabricating substrate.
For achieving the above objects, this invention relates to a photonic device comprising a substrate, a buffer layer with a composition of AlaGabIncN a+b+c=1, a, b, cxe2x89xa70) formed on the substrate and a multilayered thin films with a composition of AlxGaylnzN (x+y+z=1, x, y, zxe2x89xa70) epitaxially grown on the buffer layer, the Al component of the Al component-minimum portion of the buffer layer being set to be larger than that of at least the thickest layer of the multilayered thin films, the Al component of the buffer layer being decreased continuously or stepwise from the side of the substrate to the side of the multilayered thin films therein.
Moreover, this invention also relates to a substrate for fabricating a photonic device comprising a substrate, a buffer layer with a composition of AlaGabIncN a+b+c=1, a, b, cxe2x89xa70) formed on the substrate, the Al component of the Al component-minimum portion of the buffer layer being set to be larger than that of at least the thickest layer of the multilayered thin films to constitute the photonic device, the Al component of the buffer layer being decreased continuously or stepwise from the side of the substrate to the side of the multilayered thin films therein.
In the present invention, the Al component of the Al component-minimum portion of the buffer layer is set to be larger than that of at least the thickest layer of the multilayered thin films. This requisite is for preventing cracks in the multilayered thin films. The largest tensile stress may occur in the thickest layer of the multilayered thin films, so that cracks may be also likely to occur in the thickest layer. Therefore, a compressive stress is brought about according to the above requisite for preventing the occurrence of the cracks.
Moreover, in the present invention, the Al component of the buffer layer is decreased continuously or stepwise from the side of the substrate to the side of the multilayered thin films.
If the buffer layer is formed at a low temperature of about 1200xc2x0 C., it requires to be formed thick, e.g. 1 xcexcm to 2 xcexcm to obtain its good crystallinity. However, such a thick buffer layer has a large tensile stress therein because the lattice constant of the buffer layer is increased, so that cracks may come into being in the buffer layer.
FIGS. 1 and 2 are graphs explaining the above phenomenon. In FIG. 1, the horizontal axis designates the thickness of the AlN portion adjacent to the substrate of the buffer layer, and the longitudinal axis designates the FWHM of X-ray rocking curve at (002) peak of the AlN portion to evaluate the crystallinity of the AlN portion. As is apparent from FIG. 1, as the thickness of the AlN portion is increased, the FWHM is decreased and thus, the crystallinity of the AlN portion is be developed.
In FIGS. 2A and 2B, the horizontal axis designates the thickness of the AlN portion of the buffer layer, and the longitudinal axes designate the lattice constants xe2x80x9caxe2x80x9d and xe2x80x9ccxe2x80x9d of the bottom surface of the hexagonal columnar crystal of the AlN portion shown in FIG. 3, respectively. The heavy line designates ideal lattice constants xe2x80x9caxe2x80x9d and xe2x80x9ccxe2x80x9d of an AlN film having a hexagonal columnar crystal, respectively. As is apparent from FIG. 2, as the thickness of the AlN portion is increased, the lattice constant xe2x80x9caxe2x80x9d is elongated and the lattice constant xe2x80x9cbxe2x80x9d is shrunk.
Therefore, as the thickness of the AlN portion adjacent to the substrate of the buffer layer is increased, the crystallinity of the AlN portion is enhanced and the bottom surface lattice constant xe2x80x9caxe2x80x9d is increased. As a result, as the thickness of the buffer layer made of the AlaGabIncN (a+b+c=1, x, y, zxe2x89xa70) is increased, a tensile stress occur in the buffer layer horizontally and thus, cracks are likely to come into being.
In order to prevent the cracks, it is considered that the upper side of the buffer layer is made of a large lattice constant material before the some cracks come into being in the buffer layer. As the Al component of the AlaGabIncN (a+b+=1, a, b, cxe2x89xa70) is decreased, the lattice constant thereof is increased. Therefore, according to the present invention, if the Al component of the AlaGabIncN constituting the buffer layer is decreased continuously or stepwise from the side of the substrate to the side of the multilayered thin film to constitute the photonic device, the lattice constant of the upper side of the buffer layer is increased, so that the tensile stress does not occur and thus, the cracks are prevented even though the buffer is formed thick at a low temperature of about 1200xc2x0 C.
Moreover, if the buffer layer includes the Ga component from the AlaGabIncN (a+b+c=1, a, b, cxe2x89xa70), the lateral growth speed of the buffer layer can be developed, so that the amount of dislocation in the buffer layer can be reduced.
In a preferred embodiment of the photonic device according to the present invention, the Al component-maximum layer of the multilayered thin films is made of AlxGayInzN (x+y+z=1, 1.0xe2x89xa7Xxe2x89xa70.3) suitable for a short wavelength light-emitting device or a short wavelength photodetector.
In another preferred embodiment of the present invention, the Al component-minimum portion is made of AlaGabIncN (a+b+c=1, 1.0xe2x89xa7axe2x89xa70.5), preferably AlaGabIncN (a+b+c=1, 1.0xe2x89xa7axe2x89xa70.7).
In still another preferred embodiment of the present invention, the adjacent portion to the substrate of the buffer layer has a composition of AlN. In this case, since the buffer layer can have a large degree of freedom for the Al component therein, the above requirement of the present invention can be easily satisfied. As a result, a photonic device having the multilayered thin films without cracks having their favorable crystallinities can be provided efficiently.
In a further preferred embodiment of the present invention, an interface to divide the buffer layer upward and downward by 10 atomic % or more of Al component is formed in the buffer layer. Particularly, in the photonic device of the present invention, it is desired that an interface to divide the buffer layer and the multilayered thin films by 10 atomic % or more of Al component is formed. If the buffer layer or the photonic device has such a large Al component step therein, dislocations can not travel upward through the large Al component step. As a result, dislocations in the upper side from the above interface, that is, the large Al-component step, can be reduced and thus, the crystallinity of the multilayered thin films can be enhanced.
Furthermore, this invention relates to a method for fabricating a photonic device comprising the steps of preparing a substrate, forming a buffer layer with a composition of AlaGabIncN (a+b+c=1, a, b, cxe2x89xa70) by a MOCVD method, and epitaxially growing a multilayered thin films with a composition of AlxGayInzN (x+y+z=1, x, y, zxe2x89xa70) by a MOCVD method, on condition that the Al component of the Al component-minimum portion of the buffer layer is set to be larger than that of at least the thickest layer of the multilayered thin films, and the Al component of the buffer layer is decreased continuously or stepwise from the side of the substrate to the side of the multilayered thin films therein.
Moreover, this invention relates to a method for manufacturing a photonic device-fabricating substrate comprising the steps of preparing a substrate, and forming a buffer layer with a composition of AlaGabIncN (a+b+c=1, a, b, cxe2x89xa70) by a MOCVD method, on condition that the Al component of the Al component-minimum portion of the buffer layer is set to be larger than that of at least the thickest layer of the multilayered thin films to constitute the photonic device, and the Al component of the buffer layer being decreased continuously or stepwise from the side of the substrate to the side of the multilayered thin films therein.
In a preferred embodiment of the present invention related to the method for fabricating a photonic device and the method for manufacturing a photonic device-fabricating substrate, the buffer layer is formed at a higher film-forming temperature than that of the multilayered thin films to constitute the photonic device. Thereby, the crystallinity of the buffer layer including a larger amount of Al component than that of the multilayered thin films can be enhanced effectively.
Concretely, the buffer layer is formed at 1100xc2x0 C. or over. Moreover, the buffer layer is preferably formed at a temperature less than 1300xc2x0 C., as mentioned above, for mitigating load to some components such as a heater in a MOCVD apparatus. From this point of view, the buffer layer of the present invention may be called as a xe2x80x9chigh temperature buffer layerxe2x80x9d, compared with the above conventional buffer layer epitaxially grown at a low temperature of about 700xc2x0 C.
Moreover, it is desired that carrier gas flow rate ratio (H2 carrier gas flow rate/N2 carrier gas flow rate) in forming the buffer layer is set to be larger than the one in forming the multilayered thin films.
Furthermore, it is desired that raw material gas flow rate ratio (V raw material gas flow rate/III raw material gas flow rate) in forming the buffer layer is set to be larger than the one in forming the multilayered thin films. Herein, the flow rate of the III raw material gas is calculated from its saturated vapor pressure, provided that the III raw material gas is not polymerized, for example, dimerized.
In addition, in using a III raw material gas including Al component, an average gas flow rate including the above raw material gases and the above carrier gas above the substrate in the reactor of a MOCVD apparatus is preferably set to be 1 m/sec or over. The average gas flow rate is obtained from the following equation (1):
xe2x80x83{Summation of gas flow rates converted at 0xc2x0 C. (L/min)/60xc3x97103xc3x97cross sectional area above the substrate in the reactor of a MOCVD apparatus (m2)}xc3x97{760/pressure inside the reactor (Torr)}xe2x80x83xe2x80x83(1)
That is, as the summation of the gas flow rates is increased, and/or the cross sectional area of the reactor is decreased, and/or the pressure inside the reactor is decreased, the average gas flow rate is increased. When the average gas flow rate is set to be 1 m/sec or over, the raw material gases do not almost react one another in a vapor phase in the reactor of the MOCVD apparatus, so that the crystallinity of the buffer layer can be developed effectively.
Moreover, in the method for fabricating a photonic device and the method for manufacturing a photonic device-fabricating substrate of the present invention, preferably, an interface to divide the buffer layer upward and downward by 10 atomic % or more of Al component is formed in the buffer layer. Particularly, in the method for fabricating a photonic device of the present invention, preferably, an interface to divide the buffer layer and the multilayered thin films by 10 atomic % or more of Al component is formed. Thereby, the crystallinity of the multilayered thin films can be developed through the reduction of dislocations in the multilayered thin films.

Photonic device, a substrate for fabricating a photonic device, a method for fabricating the photonic device and a method for manufacturing the photonic device-fabricating substrate


A headrest apparatus for a vehicle seat. The seat has a seat cushion and a seat-back to support the back of a user of the seat. The headrest apparatus has a holder on a top portion of the seat-back; a stay having first and second supporting portions in parallel, the holder holding the stay so that the stay can slide relative to the seat back along the direction of the seat back; and a headrest body attached to the stay. The first stay includes a plurality of first notches for maintaining the position of the headrest body, the plurality of first notches defining an adjusting area of the headrest body. The second stay includes at least one second notch, the second notch defining a storage area of the headrest body different from the adjusting area. The operator can lower the headrest into the storage area even if the vehicle seat is a rear seat. This improves the operator's field of vision when necessary.

1. Field of the Invention
The present invention generally relates to a headrest apparatus for a vehicle seat.
2. Discussion of the Related Art
A headrest apparatus for a vehicle seat is disclosed in Japanese Utility Model laid-open publication No. 3 (1991)-76734.
The headrest apparatus includes a holder, a stay, and a headrest body. The holder is mounted on the top portion of a seat-back. The stay has a pair of supporting portions. The supporting portions of the stay are slidably supported by the holder. The headrest body is attached to the stay. A plurality of notches are formed in one of the supporting portions of the stay. A slidable lock plate, mounted on the holder, engages and disengages the notches.
When the lock plate slides, the lock plate disengages from the notches. The headrest body moves downward, thus placing it in a stored position. However, in this case, the stored position corresponds to the uppermost portion of an adjusting area, which is defined by the plurality of notches. Therefore, when the headrest body is in the stored position, the headrest body stands out from the upper portion of the seat-back.
The projecting headrest may block the vision of the vehicle operator even though the headrest is in the stored position. This problem is more likely to occur if the headrest is mounted on a seat other than the operator's seat and is particularly likely to occur if the headrest apparatus is mounted on a seat behind the operator.
Further, many vehicles are now equipped with seats that fold into storage positions or seats that fold so that they may be moved within the vehicle or removed from the vehicle. For such seats, it is advantageous to have the headrest retract as far as possible so that the stored seat occupies the smallest possible volume.


A method for configuring a computing system having a processing unit and at least one application subsystem for enabling the processing unit to perform system functions, includes packaging the system processing unit in a first housing, and at least one subsystem of the computing system in a second housing separate from and external to the first housing. The second housing is configured to visibly identify the subsystem contained within. The processing unit and the subsystem are connected with a communication link.

Computer or processor systems are typically packaged in a single box, or housing, including the CPU and the memory and the key subsystems such as a storage device and a graphics system (see FIG. 6). PCs, for example, have a graphics card plugged directly into a motherboard slot buried deep in the system chassis. A display in the form of a monitor, or data input devices such as a keyboard and a mouse are provided as separate units from the box housing the CPU and the key subsystems. Replacement of any of the subsystems requires opening the box containing these components. Most consumers or users are not qualified or knowledgeable enough to replace any of the components within the box.
Also, there is no easily recognizable difference between product (subsystem) families, within product families, or between product family members included in known computer systems. Customers would have to read point-of-sale material to understand the different components used in the system.
Some manufacturers of these systems use a logo or a sticker containing a phrase to indicate the kind of components that are inside the box. Examples are an "Intel Inside®" logo or the nVidia® "The way its meant to be Played™" sticker. These methods are not immediately obvious, especially to the retail consumer. The consumer must find the logo or sticker on the unit and read it to understand the capabilities of the PC.
A concept of a "Three Second Sales Pitch" means that within three seconds of seeing the product, the consumer will realize the advantages of this product over competitive products. On the point-of-sale material that accompany the product, the difference in wording might be only a model number. For example, the customer would read "9600XT" and "9800" and must realize that "9600XT" is better than "9800". Unless the customer is familiar with both types of models, he or she would not be able to distinguish between the two models.

Method for configurating a computing system

Hewlett-Packard Development Company, L.P.


A semiconductor card is made by a disclosed method which, in one molding step, forms a plastic body on a substrate attached to a surrounding frame by narrow connecting segments spanning a peripheral opening. The connecting segments are motivated downward by pins outside of the card periphery, holding the substrate against a lower level of the mold cavity during molding. Molded wings extending laterally from the card periphery are also formed. Following molding and curing, the casting is removed and the card singulated by excising the wings from the card. The resulting card has smooth edge surfaces and precise dimensions. Separate glob top encapsulation is avoided.

1. Field of the Invention
This invention relates generally to semiconductor manufacture. More particularly, the invention pertains to an improved semiconductor card, and to improved methods and systems for fabricating the card.
2. State of the Art
One type of electronic assembly containing semiconductor components is generally referred to as a "card." Examples of such "cards" include multimedia cards such as used in digital cameras and the like, memory cards, smart cards, and personal computer memory card international association (PCMCIA) cards. The instant patent application refers to these types of cards as "semiconductor cards." These cards are sometimes referred to as "daughter boards."
Typically, a semiconductor card comprises a substrate which may be a thin printed circuit board (PCB) upon which electronic components are mounted. Such components may include, for example, at least one semiconductor die and/or die package as well as resistors, capacitors, inductors and the like to form a desired circuitry. The substrate includes conductors for providing power supply and interconnection of the various components. Typically, the components are mounted on one side, i.e., "circuit" side of the substrate, and are electrically interconnected to external contacts on the opposing side by interlevel conductors. The external contacts are arranged for electrical contact with a next level package, i.e., mother board. In use in an exemplary electronic apparatus, such as a digital camera, the card may be inserted into a slot or other receiver for interconnection with a motherboard, and provide for example, flash memory for digitally recording images.
Semiconductor cards are typically intended for repeated handling by the public, necessitating protection of the components from mechanical forces, moisture, radiation and stray electrical currents. In the industry, the semiconductor components and interconnecting conductors on the circuit side of a card substrate have typically been encapsulated by first applying "glob top" encapsulant. Then, a separately formed protective cover produced by injection molding is adhesively attached over the circuit side of the substrate to form the semiconductor card. However, use of a separately formed cover not only adds undesirable thickness to the card, it requires additional process steps, and is subject to deleterious detachment of the cover from the substrate. In addition, any variation in mounted component height and overlying glob top material will result in card thickness variation.
For most applications, it is desirable to make the card as thin as possible. The use of thin cards saves space within the equipment in which the card is used, as well as storage space, and a saving in encapsulation material is also realized.
A further requirement for semiconductor cards is that the peripheral outlines and card dimensions be as uniform as possible, so that proper effective insertion into a card receiver is assured. Specifications on the peripheral outline and dimensions of semiconductor cards have been set by various industry standard setting bodies, e.g., PCMCIA.
In present methods of manufacture, components for several semiconductor cards are fabricated and wire bonded on a strip of e.g., circuit board. The strip may be viewed as equivalent to the lead frame in die manufacture. The individual cards are then separated from the strip using a singulation process such as sawing. Often the singulation step produces slivers, and forms substrate edges which are rough or sharp. These defects can adversely affect the peripheral outline, dimensions, appearance and use of the card.
The need exists for a method to encapsulate a semiconductor card whereby the card has reduced thickness as well as less variation thereof. In addition, the desired method will produce a card with improved precision in peripheral outline, dimensions and appearance, and at lower cost.

Alternative method used to package multimedia card by transfer molding


A method for encoding characters includes identifying one or more sequences of the character codes that are likely to be generated due a segmentation error in application of a pattern recognition process, and associating a respective extension character code with each of the sequences. The area of an image containing characters is divided into segments, such that each segment contains approximately one character. The pattern recognition process is applied to each of the segments in order to generate an input string of character codes. At least one of the identified sequences of the character codes in the input string is replaced with the respective extension character code so as to generate a modified string. The output string is determined by comparing the modified string to a directory of known strings.

OCR is a computerized method for converting printed or handwritten text from a scanned document into corresponding strings of character codes, such as ASCII codes. The OCR process typically includes several stages: First the text on the scanned document is segmented into individual characters. A pattern recognition algorithm is then applied to each character in order to find the likeliest match among the possible character codes. Because these steps are error-prone, they are typically followed by an error-correction step. For example, the computer may look up each OCR-generated word in a dictionary. The computer may automatically correct words that are not found in the dictionary by substituting the nearest match from the dictionary.
Dictionary-based OCR error correction typically uses an approximate string-matching algorithm to find the nearest match. Many of these algorithms are based on the notion of edit distance, as described, for example, by Damerau in "A Technique for Computer Detection and Correction of Spelling Errors," Communications of the Association for Computing Machinery 7 (March, 1964), pages 171-176, which is incorporated herein by reference. The distance between two strings is determined by the number of edit operations that are needed to transform one string into another. This distance is commonly referred to as the "Levenshtein distance," based on the work described by Levenshtein in "Binary Codes Capable of Correcting Deletions, Insertions and Reversals," Soviet Physics Doklady 8 (1966), pages 707-710, which is incorporated herein by reference.
Wagner and Fischer describe a dynamic-programming approach for efficient computation of edit distance in "The String-to-String Correction Problem," Journal of the Association for Computing Machinery 21 (January, 1974), pages 168-173, which is incorporated herein by reference. This approach is widely used in string matching engines. The permitted edit operations for the purpose of edit distance computation include changing one symbol into another single symbol, deleting a symbol from a string, and inserting a symbol into a string. A non-negative cost γ is assigned to each such edit operation, wherein the cost of changing one symbol into another is typically inversely proportional to the likelihood of confusion between the symbols. (For example, in OCR, characters that are similar in appearance, such as O and Q, have a high likelihood of confusion and therefore a low cost.) The edit distance between two strings is given by the sum of the costs of the successive edit operations that are required to transform one string into the other. Since there may be more than one possible trace (defined as a sequence of edit operations) that can transform one string into the other, the minimum cost is taken over all the possible traces between the two strings.
Formally, the distance D(i,j) between strings A and B of respective lengths i and j may be determined using the algorithm defined in Table I below. In accordance with the notation defined by Wagner and Fischer, A<i> is the ith character in A; |A| is the length of A; Λ is the null string; and γ(a→b) is the cost of transforming character a into character b.
TABLE IMINIMUM EDIT DISTANCE COMPUTATION1.D(0,0) := 0;2.for i := 1 to |A| do D(i,0) := D(i–1,0) + γ(A<i>→Λ) ;3.for j := 1 to |B| do D(0,j) := D(0,j–1) + γ(Λ→B<j>) ;4.for i := 1 to |A| do5.for j := 1 to |B| do begin6.m1 := D(i–1,j–1) + γ(A<i>→B<j>);7.m2 := D(i–1,j) + γ(A<i>→Λ);8.m3 := D(i,j–1) + γ(Λ→B<j>);9.D(i,j) := min(m1, m2, m3);10.end
The method described by Wagner and Fischer determines edit distance in terms of single-character errors, i.e., substitution of one character for another or insertion or deletion of a single character. In OCR, however, dual-character errors are common due, for example, to incorrect segmentation. Thus, for example, the handwritten character "m" may be split into "r" and "n", or "B" may be split into "1" and "3". Other errors of this sort are well known in the art. To correct such an error using a single-character error model involves two editing steps: a substitution and a deletion. As a consequence, the computed edit cost of transforming the incorrectly-split characters (r and n, for example) back into the correct original character (m) will be high, and the computer may be unsuccessful in correcting this OCR error.
Seni et al. propose a solution to this problem in "Generalizing Edit Distance to Incorporate Domain Information: Handwritten Text Recognition as a Case Study," Pattern Recognition 29 (1996), pages 405-414, which is incorporated herein by reference. They extend the basic dynamic-programming method for computing string differences to allow for merges, splits and pair substitutions (wherein one pair of letters is substituted for another pair due to incorrect segmentation). The extension is achieved by adding three new operations in the distance computation shown in Table I, corresponding to the incremental cost of a merge, split or pair substitution at each iteration. Implementing this approach requires modifications to string matching engines that are based on the algorithm of Wagner and Fischer, as well as development of a rationale for decisions about the relative costs to associate with the new operations:


A power supply system for use with a component comprises at least three phases of power supply, with each of said three phases passing through a solid state power controller having an on/off switch. Each of the phases of power pass through a current sense transformer. A ground fault circuit receives an outlet from the current sense transformer. The ground fault circuit includes an analog filter connected into a digital processor. An output of the digital processor is operable to control the switches on the solid state power controllers. The three phases distribute power to the component when the switch on their associated solid state power converter is on.

This application relates to a ground fault interrupt that is subject to fewer nuisance trips than existing circuits.
Ground fault interrupt circuits are provided to stop the flow of current if an undesirable condition is sensed. They are typically utilized in applications where there is a likelihood that a human can be injured if the undesirable current condition is allowed to occur. When utilized in most common electrical applications, the provision is relatively straightforward. There are challenges to providing ground fault interrupt above 1 kHz, as with such frequencies, there is a significant current that is not returned to a neutral wire through a ground fault isolator, but instead returns to ground structures. These frequencies need to be excluded from the ground fault measurement, as they might otherwise cause unnecessary shutdowns. On most ground-based systems, the fundamental frequency of AC power is fairly low, and on the order of 50 or 60 Hz. Thus, it is easy to implement a filter that has no significant attenuation for the fundamental frequency (50 or 60 Hz) but good attenuation for harmonics that are greater than 1 kHz.
However, on aircraft, AC power sources run typically at 400 Hz, with a maximum range up to 800 Hz and even higher. Therefore, implementing a filter with no attenuation at the fundamental frequency, 800 Hz for example, and sufficient attenuation at frequencies above 1 kHz is much more challenging.
This becomes particularly difficult when the system that is provided with the ground fault interrupt is one that might have human contact. As an example, the power supply for an entertainment system in an aircraft passenger seat raises challenges. The necessary low ground fault threshold (which may be as low as 20 mA) adds to the problem. Harmonics from such loads (e.g. switch mode power supplies) can be higher than the ground fault detection threshold.
Present ground fault protectors do not provide enough sensitivity to distinguish between fundamental and harmonic frequency content, and therefore result in nuisance trips, especially when configured for the low current level thresholds associated with systems to which humans may be exposed. Nuisance trips will often require that an operator manually reset a breaker or other switch. This can be time consuming and potentially dangerous if an actual ground fault condition does exist. Thus, reducing the number of nuisance trips would be beneficial.

Precision ground fault detection for aircraft human body protection


A vinyl chloride resin composition comprises: a mixture composed of 10 to 97 wt % vinyl chloride resin and 3 to 90 wt % thermoplastic polyester elastomer; and 10 to 200 parts by weight of a plasticizer with respect to 100 parts by weight of said mixture, the molecular weight of said plasticizer being 500 to 5000. This vinyl chloride resin composition can be easily melt bonded to polycarbonate resins which conventionally cannot be readily melt bonded. Therefore, the composition can be widely used in extrusion molding and injection molding. Furthermore, as a high molecular weight plasticizer is employed as the plasticizing agent, the problem of cracks can be overcome. In addition, since the necessity of using the adhesive agent in the manufacturing process can be eliminated, the overall cost can be significantly reduced.

1. Field of the Invention
The present invention relates to a vinyl chloride resin composition, and, more particularly, to a vinyl chloride composition having an improved ability to melt bond to a polycarbonate resin.
2. Discussion of the Background
Since vinyl chloride resins are inexpensive, have excellent physical and chemical properties and satisfactory workability, it is widely used in, for example, manufacturing films and molding products. However, a variety of improvements in the characteristics of these resins have been desired because they are used in many fields for a variety of purposes and formed in a variety of manners. In order to achieve these improvements, blending of resins have usually been employed. For example, methods have been disclosed in Japanese Patent Laid-Open Nos. 50-36454 and 51-48169 and U.S. Pat. Reissue No. 28,982 among which elastic polyesters are blended in in order to improve the impact resistance and abrasion resistance of the vinyl chloride resin.
On the other hand, although co-extrusion molding, insert extrusion molding, co-injection molding and insert injection molding are available for improving the characteristics by combining, for example, a plurality of resins, affinity is required in such cases, between the resins to be combined in order to prepare a combined material having satisfactory characteristics.
However, in cases where a laminated film or sheet composed of a vinyl chloride resin and another resin is manufactured by such molding methods, there are very few types of resins which can be melt bonded to the vinyl chloride resin. Only resins having compatibility with respect to the vinyl chloride resin, for example, styrene-acrylonitrile-butadiene copolymer resins (ABS resins) or polymethyl methacrylate resins (PMMA resins) can be employed.
In a case where a laminated film or a sheet composed of vinyl chloride and polycarbonate resin which has no compatibility with respect to the vinyl chloride resin is manufactured, an adhesive agent must be used in the extrusion or the injection process because the above-described elements cannot be melt bonded together. In this case, there arises a problem in that the adhesive agent employed will raise the overall cost. Furthermore, there is also a problem with cracks generated in the polycarbonate resin if a vinyl chloride resin, with which a conventional plasticizer, for example dioctyl phthalate, is blended and then melt bonded with the polycarbonate resin.
An object of the present invention is to overcome the above-described problems. That is, an object of the present invention is to provide a vinyl chloride resin composition which can be melt bonded to a polycarbonate resin.


Systems, apparatus and methods are provided for loopback testing techniques for memory controllers. A memory controller that may comprise loopback testing circuitry that may comprise a first multiplexer having a first input coupled to an output of an input buffer and a second input coupled to a first data output from the memory controller, an inverter coupled to the output of the input buffer, and a second multiplexer having a first input coupled to an output of the inverter and a second input coupled to a second data output from the memory controller.

The rapid growth in data center, cloud computing and artificial intelligence applications have spurred increasing demand for memory bandwidth and double data rate (DDR) interface speed in recent years. In 2018, the first generation of commercial double data rate type six synchronous graphics random-access memory (GDDR6) devices for computer-based systems increased the speed of memory devices to 10˜14 Gb/s from 8 Gb/s. The introduction of DDR5 specifications in late 2019 has revolutionized the computation world with faster, higher-capacity and more powerful DDR5 DRAM devices. In order to support the higher speed of DDR5 DRAM devices at up to 6400 MT/s, a set of new features have been introduced including the decision feedback equalizer (DFE) and internal VREFCA.
Although the new loopback testing capability are only mandatory for the DDR5 DRAM device, some DDR5 controllers have also taken advantage of the new protocol and implemented a similar loopback feature in the DDR5 controller Phy. However, the existing DDR5 loopback feature is purposely designed and curtailed for the DRAM device with maximum simplification and friendly implementation, but is not optimized for the DDR5 controller Phy in terms of performance and reliability. First, the output testing signals are single-ended signals which greatly reduces the speed performance and reliability of high-speed transmission through a testing channel. As a result, the testing speed is reduced to a half or a quarter of the incoming traffic and only a portion of the received data signal is looped back for comparison. Second, the existing loopback scheme can only test the receiver circuit and the DFE circuit, but not the Read FIFO circuit and the entire transmitter circuit of the DDR5 controller Phy. Therefore, there is a need in the art for a better scheme that provides maximum speed performance and reliability and also achieves a more complete coverage including the Read FIFO and the transmitter circuits.

Memory controller physical interface with differential loopback testing