A cache memory circuit 36 is described which has a separate read bus 90 and write bus 98. When a given cache row is selected, then simultaneous read and write operations can take place to different words (W#0, W#1, W#2, W#3) within the cache row using the read bus and the write bus. The cache memory circuit 38 having this configuration is particularly suited for use as a write back cache. When a cache miss occurs causing the need for a cache row to be replaced, then the words are replaced starting with the word to which an attempted access triggered the cache miss and proceeding in ascending address order.

1. Field of the Invention
This invention relates to the field of data processing. More particularly, this invention relates to cache memory circuits of the type that are typically used to provide short term, high speed storage for instruction words or data words.
2. Description of the Prior Art
FIG. 1 of the accompanying drawings illustrates a data processing system utilizing a cache memory circuit. An integrated circuit 2 is formed bearing a central processing unit core 4, a cache memory circuit 6 and a write buffer 8 among other components. The integrated circuit 2 is coupled to a random access memory 10 that provides the bulk of the storage capacity for the system.
In operation, when required by the central processing unit core 4, words representing instructions or data to be manipulated are read from the random access memory 10 and stored in the cache memory circuit 6. Subsequently, when the central processing unit core 4 needs to access one of these words, it first checks to see if it is present in the cache memory circuit 6. If the word is so present, then it may be accessed at high speed from this on-chip cache memory circuit 6 without having to make recourse to a slower off-chip access to the random access memory 10. There are various strategies for selecting which words should be held within the cache memory circuit 6 and how consistency should be maintained between the words stored within the cache memory circuit 6 (that may be subject to manipulation) and the corresponding words stored within the random access memory 10. With one strategy for maintaining consistency, the cache memory circuit is configured as a so called "write back cache".
In operation of such an arrangement, when the central processing unit core 4 wishes to access a particular word, a check is made within the cache memory circuit 6 to determine whether this word is stored there. If the word is stored in the cache memory circuit 6, then a cache hit has occurred. Following a cache hit, a high speed read or write operation to that word may be made. It is significant that if a write operation is made to the word, then this write operation is not at this stage made to the corresponding word stored within the random access memory 10. Accordingly, the instance of that word stored within the random access memory 10 becomes out of date and invalid.
The updating of out of date words within the random access memory 10 occurs when the corresponding words within the cache memory circuit 6 are being replaced to make way for other words to which it is more desirable to have high speed access. When words stored within the cache memory circuit 6 are so replaced, then they are written back to the random access memory 10 so updating the instances of the words stored within the random access memory 10. FIG. 2 of the accompanying drawings illustrates this process in more detail.
At step 12, when a cache miss occurs, then the write back process is entered. The first stage is to identify the cache row to be replaced at step 14. Various strategies may be employed to determine which cache row (a cache is typically organised in rows, each cache row storing a plurality of words) is to be replaced. A common strategy is to replace the cache row that was least recently accessed (used).
A so called "dirty flag" for the cache row indicates whether any of the words stored therein have been changed since they were read from the random access memory 10. If the dirty flag is set, then at steps 16 to 22 the four words currently stored within the selected cache row are written to the write buffer 8 during successive clock cycles (fclk) of the integrated circuit 2. The example of FIG. 2 assumes that such a change has occurred.
Once the old words have been safely written to the write buffer 8 for subsequent storage back to the random access memory 10, the clock signal of the integrated circuit 2 is synchronised to the external, slower memory clock signal (mclk) that drives the random access memory 10 at step 24. This switch of clock signals could be made earlier, but this would slow down the overall operation as it is best to keep using the faster clock signal (fclk) for as long as possible.
In steps 26, 28, 30 and 32 the new words from the random access memory 10 are read into the cache row on successive external clock cycles.
It will be seen from FIG. 2 that the writing back of the old words and the reading in of the new words takes in excess of (4.times.fclk)+(4.times.mclk). The writing back and reading in of the words of a cache row is controlled by cache control logic 34 within the cache memory circuit 6. This example assumes a different and faster fclk signal from the mclk signal. These signals could be the same.
FIG. 3 of the accompanying drawings illustrates the process shown in FIG. 2. The top four schematics illustrate the saving of successive words from the selected cache row to the write buffer. The bottom four illustrations illustrate the subsequent reading of four successive words from the random access memory 10.
The performance of a cache has a large impact upon the overall performance of a data processing system within which the cache is incorporated. Measures which improve the performance of a cache (e.g. its speed of operation) are highly advantageous.


A system and method for compensating for DC offset and/or clock drift on a wireless-enabled device is described. One embodiment includes a radio module, an A/D converter connected to the radio module, a DC tracking loop connected to the A/D converter, and a multi-hypothesis bit synchronizer.

Wireless communications and wireless communication devices are at the center of many important technological advancements. As the proliferation of these wireless devices increases, the efficiency and accuracy of the communications therebetween becomes vital to the commercial success of particular devices and particular communication protocols. One protocol that is showing great promise is Bluetooth, (The Specification of the Bluetooth System, v1.0 B, Dec. 1, 1999 is incorporated herein by reference) which is a wireless protocol that describes how mobile phones, computers, PDAs, peripherals and other devices can interconnect using short-range wireless connections.
To implement Bluetooth and other such wireless protocols, a device receiving a transmitted signal is required to recover bit patterns carried by the transmitted signal. This recovery process involves waveform demodulation, DC compensation, bit synchronization and bit detection. Waveform demodulation usually is implemented in a radio module and is wireless protocol dependent.
DC compensation typically involves correcting for a DC offset arising during the signal recovery process. This DC offset comprises a variation in the intended DC voltage of the recovered baseline signal caused, for example, by frequency drift in the received Bluetooth signal. Present devices compensate for DC-related imperfections in incoming signals using a variety of means, none of which are completely satisfactory. For example, certain electronic devices use analog components to calculate and track DC offset, while others use digital components. In this regard analog "DC trackers" usually are implemented as lowpass RC filters, while conventional digital approaches generally require a select number of bits to be buffered before any DC offset can be calculated.
The accuracy of the DC tracking performed by both conventional analog and digital circuits is affected by characteristics of the incoming bit patterns. For instance, when a string of high values, e.g., "1s," is received, the computed DC offset will be adjusted to a higher value even though the actual DC offset has not changed. This is because most approaches to DC tracking automatically assume an even distribution of high and low values in the received signal. In addition, in analog approaches the accuracy of DC tracking and of the associated estimated variance are sensitive to the selected time constants of the analog filters employed. In conventional digital DC tracking techniques, the accuracy of DC tracking and of the associated estimated variance are functions of the selected buffer size.
Present technology suffers drawbacks in addition to those described above. For example, wireless devices generally must also compensate for clock variances and relative transmitter-receiver clock drift that case data frames to be out of synchronization. Present systems for synchronizing frames are slow, require significant hardware, and are not entirely accurate. Accordingly, present systems can waste valuable time and unnecessarily drop frames.
Although present analog and digital approaches to computing DC offsets and synchronizing frames for wireless communications are functional, they are not sufficiently accurate or otherwise satisfactory. Accordingly, a system and method are needed to address the shortfalls of present technology and to provide other new and innovative features.

This patent is subject to a terminal disclaimer.

System and method for DC offset compensation and bit synchronization


A vehicle, including: a brake pedal arranged at a right step side, a rotating shaft of the brake pedal being disposed on a transmission case; a clutch pedal arranged at a left step side, a rotating shaft of the clutch pedal being disposed on the transmission case; a right fuel tank disposed below a right step, and at a right side of the transmission case; and a left fuel tank disposed below a left step, and at a left side of the transmission case, wherein a pedal arm of the brake pedal is, in plane view, arranged between the transmission case and the right fuel tank, and a pedal arm of the clutch pedal is, in plane view, arranged between the transmission case and the left fuel tank.

1. Field of the Invention
The present invention relates to a vehicle like an agricultural vehicle such as a tractor and the like.
2. Related Art of the Invention
In a vehicle like an agricultural vehicle such as a tractor and the like, by the motive force which is transmitted from the engine that uses the fuel of the fuel tank so as to generate the driving force, the rear wheels are driven.
And, the braking of the rear wheels is performed according to the pedal operation of the operator to the brake pedal, and the ON/OFF of the transmission of the motive force is performed according to the pedal operation of the operator to the clutch pedal.
In relation to a vehicle like this, known is one possessing a configuration such that the fuel tank is arranged inside the bonnet (for example, see Japanese Patent Application Publication No. 2011-168237) and that a variety of pedals like the brake pedal and the clutch pedal is hung from the dashboard (for example, see Japanese Patent Application Publication No. 62-88623).
However, the present inventors have noticed that, in a conventional vehicle, the fuel quantity of the fuel tank is not sufficiently large and the vehicle price is not sufficiently low.
Additionally, the present inventors think that why the fuel quantity of the fuel tank is not sufficiently large is that the fuel tank is arranged inside the bonnet.
Moreover, the present inventors think that why the vehicle price is not sufficiently low is that, because a variety of pedals is hung from the dashboard, the number of components increases according to the link number of the variety of pedals so that the vehicle configuration gets complicated.


Method for restoring drilling fluid circulation to a borehole having strata being invaded by the drilling fluid, by circulating a non-conventional cementitious slurry such as drilling fluid-blast furnace slag mixture into the strata, and allowing the mixture to solidify in situ.

1. Field of the Invention
This invention relates to a method of restoring lost circulation of drilling fluid in a well.
2. State of the Art
Rotary drilling of a borehole is accomplished by rotating a drill string having a drill bit at its lower end. Weight is applied to the drill string while rotating to create a borehole into the earth. The borehole may pass through numerous different strata before the borehole reaches the desired depth. The drill string is usually hollow for reasons which become apparent later. Sections are added to the drill string to increase its length as the borehole is deepened.
This drilling process creates significant amounts of friction which produces heat along with fragments of the strata being penetrated. The fragments of strata must be removed from the borehole and the drill bit must be cooled to extend its usable life. Both of these necessities are accomplished by the circulation of a drilling fluid down through the drill string and up the annulus between the drill string and borehole wall to the surface. Cooling of the drill bit is accomplished by a steady flow of cool fluid from the surface and cutting fragments are carried up the annulus to the surface where they are separated from the drilling fluid.
Drilling fluids typically include water and a complicated mixture of clays, polymeric thickeners and dispersants, and weighting agents. The properties of the drilling fluid are dictated primarily by the physical nature of the geologic formation through which the borehole will be created. The hardness, fluid content, type of fluid, porosity, permeability, in-situ stresses, compressive and tensile strength, and chemical composition are all important characteristics of a geologic formation which impact the formulation of the drilling fluid.
In addition to providing cooling, lubrication and cuttings removal from the borehole, the drilling fluid also provides pressure control for the well. A hydrostatic pressure is produced by the column of drilling fluid in the borehole. The density of the drilling fluid may be varied to produce a hydrostatic pressure at specific points along the borehole which is equivalent to or slightly in excess of the pressure of the exposed geologic formations.
In some cases, the hydrostatic pressure of the drilling fluid column required to control a formation pressure in part of the borehole may exceed the tensile or compressive strength of other exposed formations. If this happens, a fracture may be initiated and propagated in the weaker strata. This causes an alteration in the drilling fluid circulation circuit. Instead of returning to the surface up the annulus, some or all of the drilling fluid will exit the borehole through the created fracture or fractures. This is commonly referred to in drilling practice as "lost circulation".
Lost circulation may be caused by created fractures due to excessive mechanical or hydrostatic pressures applied to exposed strata, natural fractures existing in the strata, or simply by high porosity and permeability within a strata. In all cases, it is important to the drilling process to restore the circulation back to the surface within the borehole. Many materials are used for this purpose and most are bridging additives which can be added to the drilling fluid to block the leak path of the exiting fluid.
Materials such as cottonseed hulls, ground mica, graded sand, walnut or other nut hulls ground to different sizes, diatomaceous earth, gilsonite, ground coal, charcoal, cellophane flakes, and shredded paper are common materials used as lost circulation additives added to drilling fluids. These materials are simply bridging agents and do not form a high strength solid material to seal the leak path.
Portland cement mixtures are often used to provide a more permanent seal than the non-hydraulic drilling fluid additives described earlier. One of the limitations of Portland cement formulations is their susceptibility to drilling fluid contamination. Contamination of the cement slurry with drilling fluid often reduces the compressive strength of the set cement, may greatly extend the setting time of the slurry, and may affect the bonding of the cement to the formation. This is particularly true if the drilling fluid contains significant concentrations of lignosulfonate thinners, carboxylate/hydroxide polymers such as starch, hydroxyethyl cellulose, carboxymethyl cellulose, carboxymethyl hydroxyethyl cellulose, or polyalcohols.
Another limitation of Portland cement mixtures is density. As discussed supra, the cause of the lost circulation problem may be use of a heavy mud which causes fracture initiation or propagation in strata surrounding the borehole. Portland cement mixtures are relatively dense and may simply aggravate this problem. Diluting the Portland cement to reduce its density is not an acceptable solution to this problem since the dilution weakens the Portland cement (i.e. Portland cement is very sensitive to its water/cement ratio).
Yet another limitation of Portland cement is the adverse effect of brine which causes severe strength loss.
Accordingly, the present invention is directed to overcoming the above noted problems in the art, and in particular to problems experienced with effective sealing of strata in oil and gas wells which are causing lost circulation.


Transmission control improves the performance in a communications system relating to transferring large data objects between domains or applications. This reduces or eliminates data movement between domains by transferring ownership of the "container" containing the data as opposed to moving the contents of the container from one domain to another domain resulting in copying the large data object. Thus, transmission control provides for control of the transmission of relatively large data objects between domains in a communications system which otherwise only allows efficient transmission of relatively small data objects between domains in a communications system. Tokens are assigned and associated with buffers containing the data to be shared. The token is not an address, but rather an identifier for the buffer which can be transferred from one domain to a second domain without requiring the copying of the data. The domain which originally requests the buffer is assigned a primary token and secondary tokens are assigned to each subsequent domain which also requests access to the buffer.

A communications system or network may be generally defined as a collection of computers or computing systems which interact and transmit data from one computer (i.e., node) on the network to another. The functional capabilities of the nodes may range from terminals with minimal local processing capability to complex multiprocessors capable of high speed local processing. A node incorporates a set of control functions required to ensure that network interfaces comply with networking standards or architectures. These control functions may be grouped into sets based on function. For example, in the Systems Network Architecture ("SNA") developed by International Business Machines Corporation ("IBM"), the assignee of the present invention, SNA defines a Physical Unit ("PU"), which controls operation of real network resources such as links, and a Logical Unit ("LU") which controls logical software based entities such as applications. Other networking architectures define similar functional groupings.
The communications facilities which interconnect the nodes also may vary, ranging from high speed input/output ("I/O") channels to low speed, point-to-point telephone lines. By way of example, the media used to implement the communications facilities may include satellite links or wide band optical fibers.
Referring to FIG. 1, a high level block diagram illustrating the components of an application-to-application communications network with two nodes, in this case, host computers, in a direct-attach environment is illustrated at 10. This type of view of the application-to-application communications network is sometimes referred to as an "end-to-end" view. The two host computers are illustrated at 12 and 14, respectively. The host computers, for example, may be IBM 390 Mainframe computers manufactured by International Business Machines Corporation ("IBM"), the assignee of the present invention. Each host computer has an "outbound" side 16 for sending data across the network and an "inbound" side 18 for receiving data transmitted across the network. In addition, applications execute on the host computers as illustrated at 20 and 22. Once an application has processed data and requests that data is to be sent to another node on the network, the data to be transmitted is then processed in the communications stacks 24 and 26 at the node on which the application is executing and transmitted via the system input/output ("I/O") interface 28. System I/O interface 28 also serves to assist in the receiving of data transmitted across the network.
By way of example, the present invention may also function in the communications network environment similar to that illustrated at 10' in FIG. 2. In the communications network illustrated in FIG. 2, two host computers are illustrated at 50 and 52. Host computer 50 as illustrated has the capability for managing relatively large data objects in a communications stack in accordance with the present invention. Computer 54 is a controller which simply is used as a route in the network for routing data which has been processed for transmission by host computer 50 across network 60. Applications execute on host computer 50 as illustrated at 62. Once an application has processed data and requests the data to be sent to another node on the network, the data to be transmitted is then processed in the communications stack 64.
Communications across a communications system such as that illustrated in FIG. 1 or 2 may be controlled by a network architecture. One network architecture which may be implemented on a communications system such as that illustrated in FIG. 1 or 2 is the Systems Network Architecture ("SNA") developed by IBM, the assignee of the present invention. SNA is a network architecture intended to allow users to construct their own private network on a communications system. An SNA network may be defined as a collection of machines or computers (i.e., nodes). There are several different types of nodes in an SNA network, including terminals, controllers that supervise the behavior of terminals and other peripherals, front-end processors which relieve the main central processing unit of the work and interrupt handling associated with data communications, and the main host computers. In essence, SNA specifies how nodes connect and communicate with one another. Moreover, SNA enables the system to share network resources by avoiding the necessity to install separate communication links for different types of workstations or dissimilar applications, and reducing the number of programs and devices.
The functions of the communications stack in an SNA network may be organized into several layers. Referring to FIG. 3, one manner of illustrating the hierarchial layers of SNA at a given node on a communications system implementing the SNA architecture (i.e., the communications stack) is shown generally at 100. Each node in the communications network operating under the SNA architecture generally has the same hierarchial software structure so as to enable communications between the nodes. In the illustration shown in FIG. 3, these layers of the communications stack include the physical control layer 102 which connects adjacent nodes physically and electrically for physically transporting bits from one machine to another, the data link control layer 104 which constructs frames from the raw bit stream for transmitting data between adjacent nodes and detecting and recovering from transmission errors in a way transparent to higher layers, the path control layer 106 (sometimes referred to as the network layer) which routes data between source and destination nodes and controls data traffic in the network, and the transmission control layer 108 (sometimes referred to as the transport layer) which creates, manages and deletes transport connections (i.e., sessions). The SNA layers also include the data flow control layer 110 (sometimes referred to as the session layer) which synchronizes data flow between end points of a session so as to establish and control a session between two end users for conversation purposes, the presentation services layer 112 which formats data for different presentation media and coordinates the sharing of resources, the transaction services layer 114 which provides application services such as distributed database access and document interchange, and finally, the network user or application layer 116 which relates to the conversation per se between two end users.
The physical control 102, data link control 104, path control 106 and transmission control 108 layers may be referred to as the "lower" layers 120 of the SNA model as it relates to the Open Systems Interface Reference Model ("OSI"). The data flow control 110, presentation services 112 and transaction services 114 layers may be referred to as the "upper" layers 122 of the architecture. Finally, the combination of the upper layers 122 and the lower layers 120 may be viewed as the communications stack 124.
The access methods which reside on the host processors provide a source of control for an SNA network. One such access method is the Virtual Telecommunications Access Method ("VTAM") which provides the interface between applications programs and a host processor and other resources in an SNA network. In essence, VTAM is a program that controls communication between terminals and application programs, and between applications, within the same or different SNA nodes. Communication between VTAM applications programs and the host and network terminals can generally occur only through VTAM. VTAM also monitors the performance of a network, identifies locations for potential problems, and assists in recovery from network failures. VTAM runs under the control of a virtual operating system such as the Multiple Virtual Storage ("MVS"), Virtual Machine/System Product ("VM/SP"), and Virtual Storage Extended ("VSE") operating systems. When operating in the MVS environment, VTAM enables independent SNA networks to communicate with each other.
VTAM application programs run under control of the operating system similar to any other programs. However, a VTAM applications program is generally connected to VTAM before it communicates with terminals or other applications in the network. A VTAM applications program uses VTAM macro instructions to communicate with terminals. An applications program within a host processor can be used at any location in the network without the program having any awareness of the organization of the network. VTAM provides the following major functions: starting and stopping the network; dynamically changing the configuration of the network; allocation of network resources; and control of input/output processing.
Referring to FIG. 4, the major components of a communications system 200 operating under VTAM including the host computer 202 containing VTAM 206 and VTAM applications programs 204 are illustrated. The host computer 202 is connected to secondary storage (i.e., auxiliary storage) 208 as well as the telecommunications network 210. The telecommunications network 210 may be divided into the SNA Terminal Environment 212 and Local 3270, BSC and Start/Stop Terminal Environment 214. In particular, the host computer is connected to the local computers and terminals such as a Local 3790 terminal 216 and a Local 3270 terminal 218. In addition, VTAM is also connected to the local communications controller 220 which may be referred to as NCP which in turn is connected to remote communications controllers 222, terminals on switched lines 224 and terminals on nonswitched lines 226.
The SNA network architecture and VTAM are described in detail in "Systems Network Architecture," Concepts and Products, IBM, GC30-3072-3, "-JTAM Concepts," Independent Study Program, IBM, 1982; and Chapter 1 of the textbook entitled "Computer Networks" by Tanenbaum, Prentice Hall, Inc. (2d ed., 1988), all of which are incorporated herein by reference. VTAM also is described in detail in U.S. Pat. No. 4,586,134 entitled "Computer Network Systems and Its Use for Information Unit Transmission" and U.S. Pat. No. 5,027,269 entitled "Method and Apparatus for Providing Continuous Availability of Applications in a Computer Network," both of which are also incorporated herein by reference.
The movement of data in most communications systems can have a severe impact on the efficiency of the system. As the number and frequency of data transmissions increase, the utilization of components, such as a memory bus and central processing unit, of a processor significantly increase. The total throughput supported by the communications system may be severely limited when the inefficient use of a component causes the utilization of that component to reach maximum capacity.
Notwithstanding the effect of data transmissions on system performance, the current trend is towards transmission of large data objects. This occurs particularly in applications relating to multimedia, image and large file applications processing. In multimedia applications, the large data objects are broadcasted, and as a result are replicated many times. The large number of replications generally requires making multiple copies of the data which in turn generally requires numerous movements of the data between domains of storage ownership in a communications stack. As a result, the numerous movements of data may severely impact the performance in communications networks. In order to improve communications systems performance for applications such as multimedia applications which process and transmit large data objects, data movement in the data transfer execution path between domains on the same node should be eliminated, or at least significantly reduced. This amounts to addressing several problems in a communications protocol implementation, the problems including storage ownership, resource sharing and header management.

Systems and methods for controlling the transmission of relatively large data objects in a communications system


In order to obtain a logic circuit capable of performing a high-speed operation, respective gates of a P-channel MOSFET (1) and an N-channel MOSFET (2) are connected to an input node (6) in common, and ends of resistors (12, 13) are connected to respective drains thereof. Respective emitters of an NPN transistor (3) and a PNP transistor (4) are connected to an output node (9) with an end of a resistor (5) in common, and ends of the resistors (12, 13) are connected to respective bases thereof. A source of the P-channel MOSFET (1) and a collector of the NPN transistor (3) are connected to a high potential point (8) in common while a source of the N-channel MOSFET (2) and a collector of the PNP transistor (4) are connected to a low potential point (40) in common respectively. Respective other ends of the resistors (5, 12, 13) are connected at a node (7) in common. Thus, the potential of an output terminal quickly fluctuates when a bipolar transistor is in an ON state.

1. Field of the Invention
The present invention relates to a semiconductor device and a logic circuit, and more particularly, it relates to a logic gate by BiCMOS.
2. Description of the Background Art
FIG. 12 is a circuit diagram showing a conventional BiCMOS inverter. A P-channel MOSFET 1 has a drain which is connected to a node 7, a gate which is connected to an input node 6, and a source which is connected to a high potential point 8 respectively. An N-channel MOSFET 2 has a drain which is connected to the node 7, a gate which is connected to the input node 6, and a source which is connected to a low potential point 40 (ground in this case) respectively. Therefore, the P-channel MOSFET 1 and the N-channel MOSFET 2 form a CMOS inverter, which inverts a logic (hereinafter referred to as "input logic") inputted in the input node 6 and supplies the same to the node 7.
An NPN transistor 3 has a collector which is connected to the high potential point 8, a base which is connected to the node 7, and an emitter which is connected to an output node 9 respectively. A PNP transistor 4 has a collector which is connected to the low potential point 40, a base which is connected to the node 7, and an emitter which is connected to the output node 9 respectively. A resistor 5 is connected between the output node 9 and the node 7. The structure of such an inverter is described in Denshi Joho Tsushin Gakkai Ronbun-shi Vol. J73-C-II, No. 12, 1990, p. 869, for example.
The operation of the inverter having the aforementioned structure is now described. It is assumed that the high potential point 8 is supplied with a potential of 5 V, while a high level of the input logic is 5 V and a low level thereof is 0 V.
When the input logic is at a high level (5 V), the P-channel MOSFET 1 enters an OFF state and the N-channel MOSFET 2 enters an ON state, whereby the potential at the node 7 is 0 V. When a transient state as described below is completed and the circuit enters a stationary state with no current flowing to the resistor 5, the potential of the output node 9 becomes equal to that of the node 7. Namely, the output node 9 outputs 0 V (low level), to provide an output obtained by inverting the input logic.
When the input logic is converted from the high level to a low level after such a stationary state, the P-channel MOSFET 1 first enters an ON state and then the N-channel MOSFET 2 enters an OFF state. Therefore, a current flows from the high potential point 8 to the node 7 through the P-channel MOSFET 1, to raise up the potential of the node 7. Since the potential of such a node 7 is generally changed at an extremely high speed (less than 1 ns), it is possible to raise up the same before the potential of the output node 9 is increased by setting the resistor 5 at a high resistance value to some degree. Thus, the potential of the node 7 is increased with respect to the output node 9.
Assuming that each of the NPN transistor 3 and the PNP transistor 4 has a base-to-emitter forward junction voltage V.sub.BE of 0.7 V, the NPN transistor 3 enters an ON state when potential difference between the node 7 and the output node 9 exceeds 0.7 V. Then, the potential of the output node 9 is rapidly raised up by a current which flows from the high potential point 8 to the output node 9 through the NPN transistor 3. However, the potential of the node 7 being increased only up to 5 V, that of the node 9 is merely raised to: EQU 5(V)-0.7(V)=4.3(V) (1)
by the current flowing through the NPN transistor 3. Thereafter the potential of the output node 9 is increased from 4.3 V to 5 V by a current which flows to the output node 9 through the P-channel MOSFET 1 and the resistor 5, and then the circuit enters a stationary state. The NPN transistor 3 is in an OFF state at this time.
As the resistance value of the resistor 5 is reduced, the current flowing to the output node 9 through the resistor 5 is increased to quickly raise up the potential of the output node 9. However, the value of the resistor 5 cannot be excessively reduced, since the base-to-emitter voltage V.sub.BE of the NPN transistor 3 must be maintained at 0.7 V. Therefore, the potential of the output node 9 is changed from 4.3 V to 5 V at a lower speed as compared with that for the increase from 0 V to 4.3 V.
While the potential of the output node 9 is raised up from the low level (0 V) to the high level (5 V), the PNP transistor 4 is regularly maintained in an OFF state and exerts no influence on the potential of the output node 9 since the potential of its base, i.e., the potential of the node 7 is higher than the potential (0 V) of its emitter.
When the input logic is converted from a low level (0 V) to a high level (5 V) in a stationary state, on the other hand, the N-channel MOSFET 2 and the PNP transistor 4 perform operations corresponding to the aforementioned operations of the P-channel MOSFET 1 and the NPN transistor 3 respectively, whereby the potential of the output node 9 is reduced from 5 V to 0.7 V and then loosely reduced further to 0 V.
Thus, it is understood that the BiCMOS inverter shown in FIG. 12 is the so-called full-swing inverter, which swings over the full range of 0 V to 5 V.
In such a structure, however, a load carrying capacitance which is caused by base capacitances of the NPN transistor 3 and the PNP transistor 4 is large enough to reduce the speed of the potential change of the node 7, since the node 7 is connected to the bases of the transistors 3 and 4. The potential of the output node 9 follows potential increase (or decrease) of the node 7 when the same is raised from 0 V up to 4.3 V (or reduced from 5 V to 0.7 V), and hence the change, i.e., the change of the outputted logic level, is also reduced in speed.


According to an aspect of the disclosure, the present invention provides methods and arrangements for using the internet and an internet access appliance to share images, wherein the images are captured, downloaded, and sent to a server. At the server, the images are parsed and posted to a web page. Subsequent communication is automatically sent to individuals selected by the sender to notify them of the posting of new images. The present invention provides an effective and efficient manner in which to share images for business, marketing, and home use.

Devices for video and image capturing have evolved into common and affordable household tools. Such devices include digital cameras and videophones. The advancing technology is continually making such devices cheaper, easier to use, and more versatile.
Another advancing technology, the internet, has evolved into a common household tool used for fast and efficient communication of endless types of information. The methods of communication have been evolving rapidly and are growing in number. The communication of such information includes the display of fixed and video images. These images have been used both privately and commercially for purposes such as image sharing. Applications include the posting of images to a web page or BBS, and direct electronic delivery of the images to selected recipients.
Notwithstanding the existence of the foregoing advancements, endeavors such as photo developing businesses and real estate businesses have not yet realized the advantages, including the use of rapid image transfer, associated with these advancing technologies. Photo developing businesses continue to use archaic communication methods to submit photos to be processed, such as hand delivery or conventional mail. In addition, the sharing of images for selection for photo processing, such as between family members and friends, continues to be carried out through outdated methods, such as by the physical sharing or mailing of such images.
Real estate businesses also continue to use archaic communication methods. Physical presence at a real estate site and hand delivery of real estate pictures or videos to potential purchasers are common. Such photos or videos are not interactive, meaning the potential purchasers must search elsewhere, contact the realtor via other means, or travel to the real estate site in order to obtain further information. In addition, realtors continue to use manual communication to reach potential purchasers, such as by conventional newspaper advertisements, phone calls, or physical visits.

Arrangement and method for displaying and sharing images


A power prediction system includes a battery removably mounted on an electric power device using electric power, a charging device configured to charge the battery, and a power prediction device configured to predict an amount of electric power capable of being supplied by the charging device to outside of the charging device through machine learning on the basis of usage information indicating at least one of the usage state and the usage environment of the charging device.

A demand response in which electric power companies request customers to limit power consumption for a time period of power supply/demand tightness is known. In relation to this, technology for predicting an amount of electric power of a limited power consumption request as a demand response from an electric power company on the next day from forecasts such as temperature and weather on the next day is known (see, for example, Patent Document 1). On the other hand, technology for promoting the shared use of batteries including processes of extracting a battery mounted on a movable object such as an electric scooter and mounting the extracted battery on a charging device such as a charging station to cause the extracted battery to be charged and extracting another battery which has already been charged from the charging device and mounting the extracted battery on the movable object is known (see, for example, Patent Document 2). Also, as another example of a movable object in which a battery can be removably mounted, a portable power charging/supplying device including a battery and a power charging/supplying unit in which a storage chamber for storing the battery is formed is described (see, for example, Patent Document 3).

Power prediction system, power prediction device, power prediction method, program, and storage medium


Cooling means for a heated surface comprising an enclosure for enclosing the heated surface and two oppositely charged interleaved radial arrays of microelectrodes positioned on the surface within the enclosure. The combined arrays have a closely spaced end and a periphery end. A volatile cooling liquid is contained in a reservoir within the enclosure but separate from the array. A slit-type restrictor is positioned between the reservoir and the array to restrict liquid flow from the reservoir toward the array. A portion of the closely spaced end of the array is positioned within the slit whereby the pumping action of the array draws only the amount of volatile liquid along the electrodes needed to form a thin evaporating film over the array area. The vapor from the thin film evaporator flows to a condenser where it is cooled, condensed to a liquid and returned to the liquid reservoir.

Integrated circuits (IC) utilize micro-components such as transistors, capacitors and resistors that use and control electrical energy, frequently in digital form for controllers and computers. Larger macro sized solid state components are employed as power controllers such as switches, rectifiers, and alternators. Neither the micro nor the macro sized components or conductors are 100 percent efficient. Especially the micro-digital assemblies used in computers convert most of the electrical energy used in their computations into heat.
In the early versions of these integrated circuits having relatively few components per unit area, natural convection cooling proved adequate to limit the operating temperatures to safe values. As technology allowed packing more components into an integrated package the heat generated required motor driven fans mounted directly on the integrated circuit packages, thereby providing forced convection cooling, to control the package temperature. In order to accommodate higher and higher component densities and higher operating speeds requiring more and more power, more and more vigorous efforts have been made to remove heat effectively from the integrated circuit packages to keep the operating temperatures of the integrated circuit at safe levels.
These include more powerful fans, specialized venturis to direct the fan output onto the external surface of the integrated circuit package at higher velocities, plastic fins molded directly into the integrated circuit package and metal fins mounted on the package with heat conducting paste to better foster heat flow from the package to the fins to the fan forced air stream. All of these heat dissipation schemes have employed macro-cooling methods to cool micro components.
The increases in component density and accompanying heat dissipation rates have acted to raise operating temperatures of the IC packages to such levels that, with the best heat dissipating systems, their operating life can be endangered. To cope with this problem, temperature sensing thermistors have been placed in the micro-circuits to reduce their performance and thereby their heat dissipation and temperature under high ambient conditions or when the heat dissipating mechanisms lose efficacy, as when fouled with room dust. These mechanisms keep the computer operating but at reduced capability. This may be tolerable in household computing situations, but is intolerable in military or commercial systems where human lives and great fortunes can be endangered.
The current invention is directed to means for sharply improving the coefficients of heat transfer between the integrated circuit package and the coolant by improving the flow rate of cooling fluid dispersed over the IC package for evaporative cooling and to means for controlling cooling flow for temperature control.

Slit-type restrictor for controlling flow delivery to electrohydrodynamic thin film evaporator

Atec Advanced Thermal and Environmental Concepts


An apparatus for nuclear magnetic resonance measurement includes a measurement portion having a magnet for applying a magnetic field to a sample, a bore within the magnet, a nuclear magnetic resonance probe disposed in the bore, and a container for retaining the sample therein; a mixing filter portion for mixing a small molecule solution with a sample solution; a separating filter portion; a small molecule concentration controlling portion; a transmitter/receiver system; a unit for carrying out circulation solution transfer; a unit for injecting the small molecule solution; a unit for controlling the small molecule concentration; a unit for injecting the sample solution; a unit for holding the sample solution in the measurement portion; a unit for discharging the sample solution; and a unit for carrying out nuclear magnetic resonance measurement of the sample solution.

(1) Field of the Invention
The present invention relates to an NMR (nuclear magnetic resonance) apparatus, in particular, to an apparatus of nuclear magnetic resonance measurement by using circulation flow for sample condition control which apparatus is for carrying out measurement repeatedly while changing the measuring conditions of a sample in the NMR apparatus.
(2) Description of the Related Arts
Molecules such as proteins having certain functions within a living body have a larger molecular weight than that of compounds used for medicines or the like and have properties as a large molecule.
Large molecules typified by proteins have a molecular function in a solution thereof and this function is inhibited or accelerated when they bind to a certain small molecule. There are many methods for detecting binding of a large molecule to a certain small molecule or interaction therebetween. In particular, in measurement (which will hereinafter be called "NMR measurement") utilizing nuclear magnetic resonance permitting direct observation of the information of a molecular structure of the large molecule or small molecule, it is possible to analyze, from a change in the measurement spectrum of the concentration of the molecule, not only a dissociation constant between the large molecule and low molecule or reaction rate of them but also interaction of them based on the structure of the molecules. Refer to, for example, the description in International Publication No. WO01/023889 (Japanese Patent Application No. 2001-527224) with regard to a method of measuring the interaction between a protein and a low molecule by means of NMR.
Of large molecules to be used for NMR measurement, proteins are produced, for example, by extraction from naturally occurring living organisms, extraction from an abundant expression system making use of Escherichia coli or the like having, incorporated therein, a gene related to the formation of a protein, or by a method utilizing a non-cell expression system causing abundant expression of a protein without using a living cell. Labeling of hydrogen, carbon and nitrogen, which are main elements constituting a protein, with a radioisotope is sometimes carried out. This labeling includes labeling of a combination of three elements, that is, hydrogen, carbon and nitrogen constituting a protein, comprehensive labeling method for labeling all them, and selective labeling method of labeling only atoms belonging to a specific amino acid residue. In any method, a labeling cost is high.
A nuclear magnetic resonance spectrometer (which will hereinafter be called NMR apparatus) has typically a magnet for causing a magnetostatic field B0 and a nuclear magnetic resonance probe located at a bore portion inside of this magnet. This nuclear magnetic resonance probe includes at least one coil for applying an RF magnetic field B1 to a sample of interest and detecting reaction (response) of the sample to the magnetic field thus applied.
Conventional nuclear magnetic resonance probes include probes for the static setting sample and flow through probes. In probes for the static setting sample, the sample is put in a glass tube or ampoule (which will hereinafter be called "sample tube") and measurement is started after setting this sample tube at a predetermined position of the NMR apparatus.
In conventional probes for the static setting sample, a change in the NMR spectrum due to an increase in the concentration can be observed by carrying out NMR measurement while titrating a small molecule in a sample tube having an opening portion.
Conventional flow through probes each has a sample inlet, a sample outlet, and an internal tubular portion extending between the inlet and outlet. The internal tubular portion includes a cell for retaining a sample therein. The sample is put in this probe from the sample inlet, flows in the internal tubular portion, and enters the cell. After measurement, it flows in the tubular portion and is discharged out of the probe.
A combination of the conventional flow through probe and a robot-using sample transfer system has been used. Various sample transfer systems are employed for this combination and one of them is commercially available from Gilson, Inc. In such a system, samples adjusted for a plurality of measurement conditions must be prepared and put in a plurality of containers in advance, respectively. The samples are each fed to a predetermined flow through probe after passing through an apparatus capable of taking it out from the container. Each sample is discharged out of the probe after completion of the NMR measurement. Refer to International Publication No. WO2003/007009 (Japanese Unexamined Patent Application Publication No. 2004-534958) with regard to a preferred conventional system for transferring the sample to the probe.

Apparatus of nuclear magnetic resonance measurement by using circulation flow for sample condition control


A foam composite material comprising a first isocyanate-based polymer foam comprising at least one uncontoured surface and a second, molded isocyanate-based polymer foam, the first isocyanate-based polymer foam and the second isocyanate-based polymer foam being: (i) of different composition, and (ii) fixed with respect to one another. A process for producing the foam composite material also disclosed. The foam composite material is useful in another of vehicular and non-vehicular applications.

1. Field of the Invention
In one of its aspects, the present invention relates to a foam composite material, preferably in the form of a seat. In another of its aspects, the present invention relates to a process for producing a foam composite material, preferably in the form of a seat.
2. Description of the Prior Art
Passenger seats in vehicles, such as automobiles, are typically fabricated from a foam (usually polyurethane) material which is molded into the desired shape and covered with an appropriate trim cover. The foamed material is selected to provide passenger comfort by providing a resilient seat and the trim cover is selected to provide the desired aesthetic properties.
To meet desired safety standards, passenger seats in vehicles such as automobiles now often provide anti-"submarine" properties. Submarining is the term used to describe the tendency of the pelvis of a seated passenger to move forward and down during a collision. When the passenger is wearing a shoulder harness or lap type seatbelt, this tendency can result in the seatbelt strangling the passenger with potentially fatal consequences. Accordingly, it is known in the art to design passenger seats with anti-submarine properties. These properties may be provided by rigid or semi-rigid members embedded in the seat and which provide additional pelvic support to the passenger during a collision. To function properly, these members cannot move and thus, must be fixed (directly or indirectly) to the vehicle.
It is also known in the art that, while the resiliency of the foamed material in the seat provides passenger comfort, it does not provide the necessary structural strength for the seat. This necessitates additional reinforcement of the seat to provide the degree of structural strength required to ensure proper mounting of the seat within the vehicle and proper support of anti-submarine elements. Accordingly, prior art vehicular seats typically include a perimeter frame of metal which strengthens the seat. Further, support rails are typically mounted across the metal frame to stiffen the frame and to provide a suitable attachment point for the means used to anchor the seat to the vehicle. Conventionally, the metal frame and/or support rails are substantially completely embedded in the foam material when the seat is molded. In many cases, the metal frame will further comprise a plurality of apertures or other means for attaching a trim cover to the seat.
Of course, the requirement for such a perimeter metal frame and for support rails adds to the cost of manufacturing the seat and, more importantly, adds to the weight of the seat and the overall weight of the vehicle in which it is installed. This added weight increases both the cost of shipping the seat to the vehicle manufacturer and the eventual lifetime operating expense for the vehicle. Finally, the presence of metal frame and support rails or other components in the seat hampers the eventual recycling of the seat materials which is becoming increasingly important in today's environmentally concerned marketplace.
U.S. Pat. Nos. 5,400,490 [Burchi] and 5,542,747 [Burchi], issued Mar. 28, 1995 and Aug. 6, 1996, respectively, the contents of each of which are hereby incorporated by reference, describe a passenger seat comprising a frame element molded from relatively high density, rigid foam; vehicle anchorage means connected to the frame element; and a seat body comprising a resilient material fixed with respect to the frame element. The provision of a frame element molded from relatively high density, rigid foam obviates the need for a conventional metal frame. The '490 and '747 patents also teach application of a trim cover to passenger seat. The trim cover may be attached using push pins or a combination of bottom flaps (see FIGS. 3 and 9 in the '490 and '747 patents) with conventional mechanical attachment means (e.g., Velcro.TM., J-retainers or push pins).
While the invention taught in the '490 and '747 patents represents a significant advance in the art, there is still room for improvement. One such area is in the attachment of the trim cover to the passenger seat. Specifically, in certain cases, for a number of reasons, it can be advantageous to avoid the use of push pins to attach the trim cover as taught in the '490 and '747 patents. First, the trim cover may have to be pre-drilled or otherwise pretreated to permit penetration of the push pins, involving additional manufacturing cost (this is especially true for trim covers made of an impermeable material such as vinyl or leather). Second, a large number of push pins is required to adequately secure the trim cover to the relatively high density, rigid foam frame, involving additional manufacturing cost, both in materials and labour. Third, the trim cover must be correctly positioned over the resilient material and the relatively high density, rigid foam frame independently of placement of the push pins, increasing the likelihood for improper placement and attachment of the trim cover.
One area of improvement is disclosed in copending U.S. patent application Ser. Nos. 08/706,427, 08/706,431, 08/706,432 and 08/706,433 (each naming Burchi et al. as applicants), each filed on Aug. 30, 1996 and the contents of each of which is hereby incorporated by reference. Specifically, these copending applications set forth an improved system for connecting the trim cover to the rigid foam frame element, and a mold and process for production of an improved seat system.
One area where further improvement would be desirable in this art is in the capital requirements needed and efficiency possible in producing the seat specifically illustrated in the '490 and '747 patents. In particular, both the rigid foam frame element and the resilient foam are molded in the specific embodiment illustrated in the '490 and '747 patents. As will be appreciated by those of skill in the art, if one were to produce this seat on a commercial scale, two molds would be required for each seat--i.e., one mold to produce the rigid foam frame element and one mold in which: (i) the rigid foam frame element is placed, and (ii) the resilient foam is expanded, to produce the final foam product. This requirement results in a significant increase in the capital requirements need two purchase additional molds. Further, the need to conduct two independent molding operations results in a 50% reduction in manufacturing efficiency (i.e., compared to a single molding operation in which a metal frame is embedded in the foam).
Thus, notwithstanding the above-mentioned advances in the art, there continues to remain room for improvement.
Therefore, it would be desirable to have a process for producing a foam composite material, such as the seat specifically illustrated in the '490 and '747 patents which overcomes the need for the use of two molds to produce the final foam product.

Foam composite material comprising a first foam having an uncontoured surface, and a second, different foam fixed to the first foam at its uncontoured surface