Systems and methods for Virtual Network Function (VNF) service chain optimization include, responsive to a request, determining placement for one or more VNFs in a VNF service chain based on a lowest cost determination; configuring at least one programmable region of acceleration hardware for at least one VNF of the one or more VNFs; and activating the VNF service chain. The lowest cost determination can be based on a service chain cost model that assigns costs based on connectivity between switching elements and between hops between sites. The activating can include a Make-Before-Break (MBB) operation in a network to minimize service interruption of the VNF service chain.

Network Functions Virtualization (NFV) is a network architecture concept that uses virtualization to virtualize entire classes of network node functions into building blocks that may connect, or chain together, to create network services. A Virtualized Network Function (VNF) may include one or more Virtual Machines (VMs) running different software and processes, on top of standard high-volume servers, switches and storage, or even cloud computing infrastructure, instead of having custom hardware appliances for each network function. For example, a virtual session border controller could be deployed to protect a network without the typical cost and complexity of obtaining and installing physical units. Other examples of NFV include virtualized load balancers, firewalls, Domain Name Servers (DNS), intrusion detection devices and Wide Area Network (WAN) accelerators. The NFV framework can be conceptualized with three components generally, namely VNFs, Network Functions Virtualization Infrastructure (NFVI), and Network Functions Virtualization Management and Orchestration Architectural framework (NFV-MANO). Again, VNFs are software implementations of network functions that can be deployed on the NFVI. The NFVI is the totality of all hardware and software components that build the environment where VNFs are deployed. The NFVI can span several locations and the network providing connectivity between these locations is considered as part of the NFVI. The NFV-MANO is the collection of all functional blocks, data repositories used by these blocks, and reference points and interfaces through which these functional blocks exchange information for the purpose of managing and orchestrating NFVI and VNFs.
Conventionally, a firmware configuration would be static with respect to VNF placement, i.e., a static equipment or network resource. Some recent work in NFV has looked into hardware acceleration and in some recent work, hybrid scenarios have been considered. However, the area of dynamic service chaining has not been addressed. Service chaining is used to build more complex network services where multiple VNFs are used in sequence to deliver a network service. As such, conventional approaches treat firmware installation on computing equipment such as Field Programmable Gate Arrays (FPGAs) as part of an equipment configured and once installed, it is advertised as a static resource. Conventional approaches do not address the orchestration and optimization of combined NFV and programmable hardware accelerator/Programmable Region (PR) service chains. Conventional approaches do not optimize hardware acceleration placement relative to other elements in the service chain in a dynamic manner. Accordingly, the conventional approaches are less optimal with respect to resource usage and latency, i.e., they just make do with the static equipment resources, and will potentially suffer worse latency and throughput. Thus, conventional approaches do not provide an ability to migrate from VM-based NFV to Hardware Acceleration (HA)-based NFV with minimal service disruption. Usually, a service downtime is expected with service chain reconfiguration, even more-so when HA elements change.

Optimized virtual network function service chaining with hardware acceleration


A granulation method may include feeding a graded powder into a granulator. The powder may have a particle size distribution (PSD) of at least 98% −115 mesh and at most 50% −200 mesh. The powder may have a PSD of at least 98% less than or equal to 4.2% of a median product particle size and at most 50% less than or equal to 2.5% of the median product particle size. The powder may have a PSD of between 40% and 80% between 3% and 6% of the median product particle size, between 5% and 30% between 2% and 4% of the median product particle size, and between 10% and 40% between 1% and 3% of the median product particle size. A liquid binder may be fed into the granulator. Wet granules may be discharged from the granulator and may have a moisture content of between 7% and 12%.

Granulation typically involves combining multiple smaller particles with one another to form a larger particle, or granule. This process may be referred to as particle size enlargement or agglomeration. Granulation may be used to form particles having improved bulk density and/or hardness or to form particles having a modified shape. The smaller particles may be bonded to one another during the granulation process to form the granule. The smaller particles may be bonded by compression and/or using a bonding agent.
When different materials having dissimilar particle sizes are blended with one another, there may be a tendency for segregation of the mixture. For example, the smaller and/or more dense particles may tend to move toward the bottom of the container or vessel, while the larger and/or less dense particles may tend to move toward the top of the container or vessel. The particle size of one or more of the materials may be adjusted by granulation so that the particle sizes of the different materials become similar. Upon blending the different materials with similar particle sizes, the tendency for the mixture to segregate may be reduced.
Materials having particularly small particle sizes and/or irregular shaped particles may not flow well, which may make it difficult to transport and/or store the materials. Using granulation, the particle size of the materials may be increased and/or the shape of the particles may be modified to simplify transportation and/or storage of the materials.


Circuits and methods for protecting polarity-sensitive components, such as light emitting diodes, electrolytic capacitors or integrated circuits, operating from a DC current source including a DC motor, an inductor or relay having a positive terminal and a negative terminal for receiving current from the current source, a protection diode connected parallel with the positive and negative terminals of the motor in a reverse bias configuration, at least one polarity-sensitive component connected in parallel with the protection diode and the DC motor, and a polarity protection transistor connected either between the nominally positive current source terminal and the positive motor terminal, or between the nominally negative current source terminal and the negative motor terminal.

Power circuitry for driving DC (direct current) electric motors is also typically connected to other electronic circuitry including polarity sensitive devices, such as light emitting diodes (LEDs), integrated circuits, electrolytic capacitors and the like.
In simple motorized devices, such as electric fans and shavers, the motor is driven from a source of electrical power. The type of electrical power source selected depends upon the type of motor. The type of motor of concern herein is a DC motor. Such motors typically have a permanent magnet in the stator and brushes to transfer current to the winding on the rotor. A typical power source for such motors may be one or more DC batteries or an alternating current (AC) adapter which converts higher AC voltage to a lower DC voltage utilized by the DC motor.
For economy reasons, ancillary electrical or electronic circuits may also receive electrical power from the same voltage supply as the motor. Such ancillary circuits may include a lamp (incandescent or, more typically, LEDs), a radio, a clock, other motors, a negative ion generator, or the like. Many of these ancillary circuits are polarity sensitive, that is, the positive terminal must be at a higher voltage than the negative terminal to prevent potentially catastrophic damage. For example, LEDs and electrolytic capacitors are two common polarity-sensitive components. Such components tolerate very little reverse polarization without incurring permanent damage.
Problems may occur when these polarity-sensitive components (PSCs) are connected in parallel with the terminals of the DC motor, such as when the current supply is removed from the motor by a mechanical switch or other means of disconnection. The motor windings are inductors and energy is stored in the windings in the form of the associated magnetic fields. Further, the rotor and any flywheel attached to the motor shaft have kinetic energy related to the angular momentum of the rotor and flywheel. When the external power supply is removed from the motor, the motor briefly acts as a generator, which creates a reverse voltage across its electric terminals. Thus, this reverse polarity voltage is then applied to any circuitry, including polarity-sensitive components, connected across the motor terminals.
There are two typical ways to provide reverse-polarity protection in circuits which combine electric motors with ancillary electrical components. The first way is to provide a diode which is ordinarily reverse biased across the motor terminals. This is shown in FIG. 1A. When the power supply is removed, as shown in FIG. 1B, the current flows from the negative motor terminal through the (now forward biased) protection diode back into the motor. Resistance in the motor windings eventually dissipates the energy stored in the magnetic field of the windings and the kinetic energy of the motor rotor along with fan blades, other mechanical loads or a flywheel. A flywheel is a device which may be used for storing energy in the form of angular momentum.
The second method to provide reverse-polarity protection in circuits is to place a non-electrolytic capacitor across the motor terminals, as shown in FIG. 2A. When the external power supply is removed, as shown in FIG. 2B, the current produced by the motor (now acting as a generator with a flywheel) serves to reverse charge the capacitor. The capacitor will, then, discharge through the motor and dissipate energy in the windings of the armature. Of course, the capacitance value must be sufficiently high to absorb the stored energy in the motor, and the kinetic energy of the rotor and flywheel, without raising the voltage across the capacitor and motor to levels which would result in damage to any polarity-sensitive components.
It should be clear then that a reverse polarity condition is always created when the motor current is removed or otherwise interrupted. However, in the case of the protection diode, the voltage may be much lower; such as limited to the forward bias voltage drop of the diode, which is typically 0.7 Volts in the case of a silicon diode. The capacitor could create much higher voltages, especially if its capacitance is low relative to the amount of energy stored in the motor and flywheel. Thus, protection diodes are commonly used to protect ancillary circuitry (or power supply or power control circuitry) from damage from the voltage reversing effects of motors and relays.
This arrangement works well as long as the polarity of the power supply is fixed. However, if the polarity of the power supply is reversed, then all the circuits in FIGS. 1A and 1B will encounter a reverse polarity. In addition to the motor and the polarity-sensitive components, the protection diode may also encounter high reverse voltages. Without any resistance in series with the protection diode, it, too, may fail because of excessive forward current.
One method of protecting the protection diode from excessively high current levels is to ensure that only a proper polarity supply voltage is presented to the motor terminals. This can be achieved by using a full-wave bridge rectifier. Then, irrespective of the polarity of the applied input voltage, the output always has the correct polarization. However, such devices are relatively expensive and increase the amount of energy dissipated even when correct polarity voltage is applied. This is because two diodes in the bridge are always in conduction, thereby causing two voltage drops across the conducting diodes instead of one, as compared to using a single reverse polarity diode.
A general object of the present invention is therefore to provide improved protection for polarity-sensitive components which are connected in parallel with motors or other inductive components.
Another object of the present invention is to provide reverse polarity protection for light emitting diodes, electrolytic capacitors or integrated circuits.
A further object of the present invention is to provide a protection transistor in series with a motor to protect polarity-sensitive components.
Yet another object of the present invention is to provide reverse polarity protection in circuits which include inductors, relays, or the like.
A still further object of the present invention is to provide methods for protecting polarity-sensitive components which are connected in parallel with motors or other inductive components.

Protection of polarity-sensitive components connected in parallel with a direct current motor or inductor


An electronic mail system and method in which a message receiver creates an envelope containing envelope media data that is hidden with an embedding-and-extracting key. The message sender acquires the message receiver's envelope and, using an embedding-and-extracting key, embeds a secret message in the acquired envelope media data. The embedded envelope is sent to the message receiver, who extracts the secret message from the received embedded envelope using the same embedding-and-extracting key used to embed the data. As a result a secret message can be sent from the sender to the receiver without being eavesdropped on during the communication.

With the advent of the information age, it has become quite common for people to use electronic mail for message exchange; even in a case the message is very secret. In the meantime current electronic mailing systems are far from being safe because one engaged in a computer networking operation can easily eavesdrop on the communication by intercepting the messages. The only method to make an electronic mailing message secure is to use a cryptography method, i.e., the sender encrypts the sending message and the receiver decrypts the received message.
However, introducing an encryption-and-decryption method to an electronic mailing system creates the two important difficulties. Firstly, in the case where a symmetric key is used, it is necessary for the message sender and the message receiver to negotiate about the key they use before they start mailing. Such negotiation must be done in a very secret manner. This process, however, takes a significantly long time and needs considerable effort. Especially, when the sender and the receiver are not acquainted beforehand, the confidential negotiation is almost impossible.
Secondly, in the case where an asymmetric key is used, a message sender primarily needs to consult an authentication bureau to obtain the legitimate public key of the message receiver. This procedure also requires not only some time and effort, but also incurs some cost on the message sender's side, even if such a bureau is operated publicly.
Therefore there is a need for an electronic mailing system wherein a message sender can send a message anonymously and covertly, and in a symmetric key system a message sender and a message receiver need not negotiate about a key they use before they start mailing thereby negating the need for significant lengths of time and considerable effort, and in an asymmetric key system a message sender need not consult an authentication bureau to obtain the legitimate public key of the message receiver.


A method includes identifying a plurality of data items responsive to a first query. A presentation value associated with each of the plurality of data items is determined, the presentation value of a respective data item being a value associated with the respective data item by a first user in exchange for the presentation of the data item by a publication system. The plurality of data items are ranked for presentation to a second user, the ranking being performed using the respective presentation values associated with the plurality of data items.

Publication systems, such as online advertiser Google, Inc. and an online marketplace eBay Inc., deploy technology to selectively publish data items (e.g., online advertisements, marketplace listings etc.). Depending on various criteria, which include relevancy, these online publishers are continually faced with the technical challenge regarding which data items from the body of data items available for publication, to select for publication. For example, considering an online advertiser, the online advertiser typically has a body of advertisements that are available for publication. One popular method of selecting which advertisements to publish is to utilize keywords, selected from content being presented to a user (e.g., a news story or content at a website) to select advertisements to present to a user, on the assumption the user is more likely to click through (or perform some other action responsive to) advertisements that are contextually relevant to content that the user is presently viewing. For example, Google, Inc. utilizes its AdSense technology to identify high-value keywords associated with content or search results that are currently being presented to a user. Various advertisements are associated with such keywords, and these advertisements are selected for presentation to a user depending on what an advertiser may have bid in order to have advertisements associated with the relevant keyword. To this end, Google has deployed a technology known as "AdWords", which enables users to specify keywords that should trigger their advertisements, and also a maximum amount they are willing to pay "per click" (i.e., what they are willing to pay should a user click through the relevant advertisement).
Turning now to the online marketplace operated by eBay Inc., the presentation of listings within the context of the electronic marketplace is typically driven by user search criteria (e.g., a category selection, keywords, and various attribute filters etc.). eBay also has a contextual advertising tool, named eBay AdContext, which automatically scans the content of a website, and returns relevant eBay advertisement content. For example, where a website relates to sport, eBay AdContext may display advertisements for sporting good listings, or eBay search results for memorabilia related to a specific sports team. When the user clicks on the eBay advertisement, the user is lead directly to the eBay site, for example either directly to a listing, a category page, or a search result page.
Various online publishers may also offer programs whereby certain data items, presented to a user, may be highlighted or "featured" in certain way. For example, eBay Inc. offers certain promotional tools that enable users to differentiate their listings from other listings on the site. Such promotional tools may include the option to include an image of an item being sold within a virtual online image "gallery". Other promotional tools include the ability to bold text of a listing when the listing is presented as part of search results, and also to employ highlight color bands emphasizing a particular listing within a search result. Similarly, Yahoo!, Inc., within its "local" or "Yellow Pages" section, allows business owners to sign up as "sponsored" businesses, which provides premium placement for listings of such businesses above standard business listings.


A joint system for use with a plurality of bows in an uplift of a tarpaulin system having a joint and a base insert with, a body component with a first base end and a second base end, a third coupling member extending from the first base end, the third coupling member adapted to releasably engage with a free end of one of the plurality of bows, a fourth coupling member fixed to the second base end, the fourth coupling member adapted to be securable to a component of the uplift, and a third support extending from the first base end proximate the third coupling member for engaging with the bow releasably secured with the third coupling member.

Trucks having trailers with flat beds, which are well known in the transportation industry, are commonly used for shipping goods, either locally, regionally or internationally. In order to protect goods loaded on the flat bed from exposure to the elements, vandalism or theft, the goods are typically covered with tarpaulins, or tarps, whose shape are maintained by a system of bars or bows. Such systems are typically referred to as uplifts.
The bars, or bows are often rigid tubes, which may be shaped or otherwise formed into the desired skeleton of the uplift. While effective, such assemblies may twist or bend when large external pressures are applied, such as when snow, ice and/or rain loads apply downward forces to the roof of the rolling tarp system. As well, the corners of the uplifts are particularly susceptible to warping and deformation when external pressures are applied thereto.


A sink extender has a sink comprising a removable drain pan that may be connected to a conduit. An attachment mechanism connects the sink to a support. At least one tool holder supports an elongated handle of a janitorial tool over the sink. A method of using a sink extender comprises mounting the sink extender comprising a sink that drains into a flexible hose and at least one tool holder to a support surface; running the hose to a traditional sink such that water may drain from the sink to the traditional sink by gravity; securing a wet tool to the at least one tool holder such that the tool drains into the sink.

Janitorial closets are found in public and private buildings and are used to store cleaning tools such as mops, brushes brooms and the like, cleaning supplies, carts, mop buckets and other equipment. The typical janitorial closet also includes a sink that may be mounted at floor level to facilitate the filling of mop buckets and the cleaning of mops brooms and other tools. The sink may also be mounted at a standard height above the floor. The mops, brushes, brooms and other tools are typically left in the sink after use to drain and dry off making access to the sink difficult and creating disorganization and a hazard due to falling tools.


When an instruction to start copying is provided, a CPU estimates heat time required until the temperature of a heater of a printer reaches an operating temperature. The CPU also estimates read time required for reading an original document by a scanner. Then, the CPU subtracts the read time from the heat time to obtain standby time and causes the scanner to start reading the original document when the standby time elapses from when the instruction to start copying is provided.

1. Field of the Invention
The present invention relates to a copying machine comprising a printer having a heater, such as an electrophotographic printer, which copies an original document using the printer, and a control method for the copying machine, and a multi-function peripheral (MFP).
2. Description of the Related Art
In an MFP mounted with a printer having a heater such as an electrophotographic printer, the temperature of the heater needs to be maintained at a given operating temperature in order to do printing. A large amount of power is therefore consumed for the printing.
In most cases, a power save mode is prepared for the MFP. In the power save mode, the heater is turned off or its temperature is maintained at a standby temperature that is lower than the operating temperature. Accordingly, power consumption is reduced.
The power save mode is released as the need for executing a job arises. If the power save mode is released, the heater is heated. When the temperature of the heater reaches the operating temperature, the MFP enters a ready state to allow the job to be executed.
If a copy needs to be made when the MFP is set in the power save mode, the power save mode is released first as described above. After the MFP enters a ready state, it reads an original document. After the MFP completes reading the original document, it prints an image obtained by reading the original document.
While the MFP is reading an original document, no printing is performed though it is in a state of readiness to print. Consequently, time required until the completion of copying is lengthened more than necessary.
An object of the present invention is to provide a copying machine that is capable of making a copy speedily.
According to one aspect of the present invention, the following copying machine is provided.
The copying machine comprises a scanner which reads an original document and generates image data corresponding to the original document, a printer having a heater, which prints based on the image data when a temperature of the heater is set at a given temperature, a first estimation section which estimates heat time required until the temperature of the heater reaches the given temperature, when an instruction to start copying is provided, a second estimation section which estimates read time required for reading the original document by the scanner, and a read control section which subtracts the read time from the heat time to obtain standby time and causes the scanner to start reading when the standby time elapses from when the instruction to start copying is provided.
According to another aspect of the present invention, the following control method is provided.
The control method for controlling a copying machine comprising a scanner which reads an original document and generates image data corresponding to the original document and a printer having a heater, which prints based on the image data when a temperature of the heater is set at a given temperature, comprises estimating heat time required until the temperature of the heater reaches the given temperature, when an instruction to start copying is provided, estimating read time required for reading the original document by the scanner, and subtracting the read time from the heat time to obtain standby time and causing the scanner to start reading when the standby time elapses from when the instruction to start copying is provided.
According to still another aspect of the present invention, the following multi-function peripheral is provided.
The multi-function peripheral which allows a plurality of varieties of jobs including copying of an original document, comprises an image storage used to store image data by the plurality of jobs including the copying, a scanner which reads the original document and generates image data corresponding to the original document, a storage control section which stores the image data generated by the scanner in the image storage, a printer having a heater, which prints based on the image data when a temperature of the heater is set at a given temperature, a first estimation section which estimates heat time required until the temperature of the heater reaches the given temperature, when an instruction to start copying is provided, a second estimation section which estimates read time required for reading the original document by the scanner, and a read control section which subtracts the read time from the heat time to obtain standby time and causes the scanner to start reading when the standby time elapses from when the instruction to start copying is provided.
Additional objects and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. The objects and advantages of the invention may be realized and obtained by means of the instrumentalities and combinations particularly pointed out hereinafter.

Copying machine, control method therefor, and multi function peripheral


A magnetic-resonance imaging apparatus has superconducting magnets for generating a large uniform magnetic field within a predetermined volume. Within that volume, coils for generating magnetic field gradients are supported on a bobbin, enabling an object within the bobbin to be investigated. The coils on the bobbin are subject to forces but are rigidly connected to the bobbin. Therefore, energy is transmitted to the bobbin which can cause the bobbin to vibrate and so generate noise. To dissipate that energy, the coils are attached to tubes, or other hollow members, on the bobbin, which tubes or hollow members contain movable bodies such as particulate material. The energy due to the forces on the coils cause the movable bodies to move and collide, so dissipating the energy and reducing the noise.

1. Field of the Invention
The present invention relates to a magnetic-resonance imaging apparatus.
2. Summary of the Prior Art
In a magnetic-resonance imaging apparatus, a strong uniform magnetic field is generated in a predetermined volume, and then a magnetic field gradient is generated within that volume to induce magnetic resonance in an object to be investigated. The resonance is then analyzed to determine the properties of the object. Such a magnetic-resonance imaging apparatus finds particular applicability for medical purposes as it represents a non-invasive method for investigating the interior of a human body.
In order to generate the magnetic field gradients, appropriate coils are supported within the volume in which the strong uniform magnetic field is created, and it is normal to support those coils by a support known as a bobbin, which is in the form of a hollow cylinder, so that the coils may be secured to the inner or outer cylindrical surface thereof. The bobbin is usually made of epoxy resin having a very high elastic modulus. Examples of such magnetic-resonance imaging apparatuses are disclosed in, for example, JP-A-62-261105, JP-A-62-229906, JP-A-62-239503 and JP-A-63-158047.
In order to generate suitable magnetic gradients for magnetic resonance imaging, current pulses are applied to the coils supported on the bobbin. Hence those coils are current carriers in the uniform magnetic field, and forces are generated on the coils, the directions of which forces are determined by Fleming's left hand rule. Thus, one part of each of the coils will experience a force in one direction and another part will experience force in the opposite direction. Therefore, a pulsating load is applied to the bobbin. When the uniform magnetic field is large, the forces can set up oscillations of the bobbin and so generate noise. For medical magnetic resonance imaging, part of the human body to be investigated must be located within the bobbin and, the noise can produce discomfort.
Therefore, JP-A-61-279238 proposed that a rubber pad be interposed between the bobbin and each coil which generated the magnetic field gradient. When the current in a coil generated forces, the coil could move relative to the bobbin, due to deformation of the pad and the vibrations thus generated were damped by the rubber pad.

Vibration reduction system for magnetic-resonance imaging apparatus


A system and method for displaying, searching, manipulating and modifying of hierarchically linked genealogy data in a relational database on a computer system. A graphic representation of the data in the database is displayed on a computer display device. The system uses zooming, a common function used in computer systems, to show more or less information in the database in readable form. Using the computer pointer devices, the data in the database can be manipulated, added, deleted, or moved. The system allows for changing of the root node individual thereby giving a different view of the database, to zoom in or zoom out and save that view of the database for future reference. The system displays all relationships of the data in the hierarchical structure by use of various sizes and type of lines and positions in the structure and shows for example data further away from the root node individual as a progressively smaller graphical image.

Genealogy or the gathering of family information concerning ancestors and descendants has become an extremely popular pastime. Searching out ancestor relationships and histories has spawned many industries, one of which is a prolific software community. Software is used to store and view family histories, relationships, individual data such as birth and death dates and places, religious affiliations and rites, personal histories etc.
The genealogy software presently available uses the fundamental formats of a sheet called a "family group sheet" and a sheet called a "pedigree chart" for their basic display formats. Pedigree charts are used in many other areas including animal pedigrees and genetic pedigrees. Pedigrees are based on a common data structure known as "tree logic", where one piece of datum is connected to another piece of datum with graphical lines. These fundamental concepts and drawings representing pedigrees have been around for hundreds of years.
However, current genealogy software programs have essentially digitized the existing concepts of the "family group sheet" and the "pedigree chart" using pre-windows technology. The programs use DOS based concepts to manipulate and manage the genealogy data. Because these computer software programs use this limiting concept, it can be difficult to see relationships and lineages, manipulate data, add data into correct positions, see relationships and see different views of the data. Present software programs are also limited in their ability to identify and display unlinked data in the database. Once an individual is unlinked, the individual and the connected nodes "disappear" from the user's view and it is difficult for the user to see and understand what has been unlinked in the database.
Further, sharing of information between genealogy users is very common. One major problem in present genealogy programs is the data export selection process. If a user wants to give part of his genealogy to a relative, he must go through a tedious selection process. Even then, it is not clear what he has selected and transferred without another tedious audit of the new information. Likewise, when receiving information from someone else, importing that information into a user's database can cause horrendous problems and weeks of work to unravel the conflicts created by the import.
Accordingly, a need exists for a software program that gives the user a graphical view of his database which he can then easily manipulate using the graphical interface. Such a device is disclosed herein.

System and method for displaying and manipulating hierarchically linked data in a genealogy database using a graphical interface


A method and system for detection of bone fractures using image processing of a digitized x-ray image.

Many people suffer from fractures of the bone, particularly elderly people. According to the findings of the International Osteoporosis Foundation, the lifetime risk for osteoporotic fractures in women is 30%-40% worldwide, and 13% in men. The number of hip fractures could rise from 1.7 million worldwide in 1990 to 6.3 million by 2050. Most dramatic increase is expected to occur in Asia during the next few decades. According to World Health Organization, osteoporosis is second only to cardiovascular disease as a leading health care problem.
In clinical practice, doctors and radiologists in large hospitals rely mainly on x-ray images to determine the occurrence and the precise nature of the fractures. Visual inspection of x-rays for fractures is a tedious and time-consuming process. Typically, the number of images containing fractures constitutes a small percentage of the total number of images that the radiologists have to inspect. For example, in a sample of x-ray images of femurs collected, only about 10% of them are fractured. After looking through many images containing healthy femurs, a tired radiologist has been found to miss a fractured case among the many healthy ones.
Some methods of bone fracture detection utilize non-visual techniques to detect fractures. This includes using acoustic pulses, mechanical vibration and electrical conductivity.
Furthermore, existing methods of bone fracture detection mostly fail to consider that the shapes and sizes of the bones are not identical. Even among healthy bones, there are still differences in the appearance because they are naturally-occurring objects. Age and gender also contribute to the difference in the appearance of the bones. One standard method of dealing with size variation is to normalize the size of the bones in the captured x-ray images for visual inspection. This method is, however, unsatisfactory because it can either remove important texture information (if the image is shrunken) or introduce noise and artifacts (if the image is enlarged).

Method and system for detection of bone fractures


The present invention provides a semiconductor device having a multilayer wiring structure including a lower Cu buried-wiring layer, a SiC film, a SiOC film of 400 nm in thickness functioning as an interlayer insulating film, and an upper Cu buried-wiring layer electrically connected to the lower buried-wiring layer through contact plugs passing through the interlayer insulating film. The contact plugs and the upper Cu buried wiring layer are formed a single burying step of the dual damascene process. The SiOC film has a carbon content of about 12 atomic % and a relative dielectric constant of about 3.0. The upper Cu buried wiring layer is formed by burying a Cu film, through a barrier metal, in wiring grooves which are provided in the inter-wiring insulating film including a laminated film of an organic film, e.g., a PAE film of 200 nm in thickness, and a SiOC film of 150 nm in thickness.

1. Field of the Invention
The present invention relates to a method for manufacturing a semiconductor device comprising a low-dielectric-constant interlayer insulating film having a dual damascene multi-layer wiring structure, and particularly a method for manufacturing a semiconductor device having a dual damascene wiring structure excellent in shape.
2. Description of the Related Art
An electric signal delay due to the time constant of wiring has became a serious problem with the miniaturization and higher integration of semiconductor devices. Therefore, instead of aluminum (Al) alloy wiring, copper (Cu) wiring having low electric resistance has been introduced into an electrically conductive layer used in a multi-layer wiring structure.
Unlike metal materials such as Al and the like used for conventional multi-layer wiring structures, Cu has a difficulty in patterning by dry etching, and thus a damascene method is generally applied to a Cu multilayer wiring structure, in which a Cu film is buried in a wring groove formed in an insulating film to form a wiring pattern.
Particularly, the dual damascene method disclosed in Japanese Unexamined Patent Application Publication No. 10-143914 comprises forming connecting holes and wiring grooves and then simultaneously burying Cu in the holes and grooves, and this method attracts attention because it is effective in decreasing the number of the steps.
In a high-integrated semiconductor device, an increase in inter-wiring capacity decreases the operation speed of the semiconductor device, and thus micro multi-layer wiring using a low-dielectric constant film as an interlayer insulating film is indispensable for suppressing an increase in inter-wiring capacity.
In addition to fluorine-containing silicon oxide (FSG) having a relative dielectric constant of about 3.5 and conventionally proven by actual use, low dielectric constant films having a relative dielectric constant of about 2.7 and made of organic silicone polymers such as polyaryl ether (PAE), inorganic materials such as hydrogen silsequioxane (HSQ), methyl silsesquioxane (MSQ), and the like can be used as materials for a low dielectric constant interlayer insulating film. Furthermore, attempts have recently been made to make these materials porous and use as low dielectric constant materials having a relative dielectric constant of about 2.2.
When the dual damascene method is applied to the low dielectric constant interlayer insulating film, the technical restrictions described below must be resolved.
First, the low dielectric constant film has a composition close to the composition of a resist used for patterning, and thus the low dielectric constant film is also easily damaged in a resist removing process. Specifically, inhibition of damage to the low dielectric constant film is indispensable in peeling the resist after etching using a resist mask and in regenerating the resist when the treated resist pattern does not satisfy product specifications.
Second, attention must be paid to the application of the dual damascene method to a borderless structure with no margin between wiring and connecting holes.
Multi-layer wiring after the 0.18 μm generation of micro semiconductor devices is based on the major premise that a process adaptable to a borderless structure is used. Therefore, it is important to use a process causing little variation in via resistance due to misalignment even when a wiring groove and a connecting hole are simultaneously formed in an interlayer insulating film including a low dielectric constant film by the dual damascene method.
Third, in order to form the wiring grooves with high controllability of depth, an anti-etching film is preferably disposed near the bottoms of the wiring grooves. However, when the anti-etching film having a relatively high relative dielectric constant is disposed in an interlayer insulating film, the interlayer capacity is undesirably increased.
Therefore, a dual damascene process capable of controlling the formation of the wiring grooves while suppressing an increase in capacity is required for a low dielectric constant interlayer film structure.
An example of a dual damascene process capable of resolving the above-described technical restrictions is the technique disclosed in Japanese Unexamined Patent Application Publication No. 2000-150519 or 2001-44189.
An example of application of the dual damascene process to a low dielectric constant interlayer film disclosed in Japanese Unexamined Patent Application Publication No. 2001-44189 will be described below with reference to FIGS. 11 to 13. FIGS. 11A and 11B, FIGS. 12C to 12E, and FIGS. 13F and 13G are sectional views showing respective steps for forming a dual damascene structure by the method disclosed in Japanese Unexamined Patent Application Publication No. 2001-44189.
First, as shown in FIG. 11A, a laminated film including an organic insulating film 52 and a silicon oxide (SiO2) film 53 is deposited as an inter-wring insulating film on an underlying insulating film 51 deposited on a substrate not shown in the drawing, and then copper (Cu) film buried wiring 54 is formed in the inter-wiring insulating film.
Then, a silicon carbide (SiC) film 55 functioning as an antioxidative layer for the Cu film, a carbon-containing silicon oxide (SiOC) film 56 such as a methyl silsesquioxane (MSQ) film, and a polyaryl ether (PAE) film 57 as an organic insulating film are successively deposited on the Cu buried wiring 54.
Then, a silicon oxide (SiO2) film 58 functioning as a first mask forming layer and a silicon nitride (SiN) film 59 functioning as a second mask forming layer are successively deposited. Furthermore, a resist mask 60 having a wiring groove pattern is formed on the SiN film 59.
Next, as shown in FIG. 11B, the SiN film 59 is etched by a dry etching method using the resist mask 60 to form a second mask 59′ (SiN film 59) having the wiring groove pattern, and then the resist mask 60 is removed.
Then, a resist mask 61 having a connecting hole pattern is formed on the second mask 59′ and the SiO2 film 58 so that at least a portion of the resist pattern for the connecting hole pattern overlaps with the second mask 59′ (SiN film 59) having the wiring groove pattern.
As shown in FIG. 12C, the second mask 59′ comprising the SiN film and the SiO2 film 58 functioning as the first mask forming layer are etched by a dry etching method using the resist mask 61 having the connecting hole pattern to form apertures, and then the PAE film 57 is etched to form connecting holes 62 in which the SiOC film 56 is exposed. The resist mask 61 can be removed at the same time as etching of the PAE film 57.
Although the resist mask 61 is gradually thinned during the formation of the holes in the PAW film 57, the connecting holes 62 having a good open shape can be formed through a first mask 58′ because of the presence of the first mask 58′ comprising the SiO2 film 58.
Next, as shown in FIG. 12D, the SiOC film 56 is further etched to dig down the connecting holes 62 to the SiC film 55 and form connecting holes 63. At the same time as the formation of the connecting holes 63, the SiO2 film 58 constituting the first mask 58′ and remaining in the wiring groove formation region is etched through the second mask 59′ (SiN film 59) having the wiring groove pattern to form a wiring groove pattern 64.
As shown in FIG. 12E, the PAE film 57 remaining at the bottom of the wiring groove pattern 64 is etched to form wiring grooves 66, and the SiC film 55 remaining at the bottoms of the connecting holes 63 is etched to communicate the connecting holes 63 with the Cu buried wiring 54, thereby completing the predetermined dual damascene process for forming the connecting holes 65 and the wiring grooves 66.
The second mask 59′ (SiN film 59) remaining out of the wiring groove region is removed in the process for etching the SiC film 55 remaining at the bottoms of the connecting holes 63.
Then, the extraneous matters remaining after etching on the side walls of the connecting holes 65 and the wiring grooves 66 are removed by a post-treatment with a chemical and RF sputtering to normalize Cu affected layers at the bottoms of the connecting holes 65. Then, as shown in FIG. 13F, a Ta film 67 is deposited as a barrier metal by sputtering, and a Cu film 68 is deposited by an electrolytic plating or sputtering method to bury an electrically conductive film in the connecting holes 65 and the wiring grooves 66.
Next, as shown in FIG. 13G, portions of the deposited Ta film 67 and Cu film 68, which are unnecessary for the wiring pattern, are removed by a chemical mechanical polishing (CMP) method. A dual damascene multi-layer wiring structure can be formed through the above-described steps.
Furthermore, for example, a SiC film 69 is deposited as an antioxidative layer on the dual damascene wiring 68 in the same manner as the lower Cu buried wiring 54.
The application of the above-described conventional dual damascene process to multi-layer wiring after the 0.1 μm generation of micro devices has the following problem.
Since the second mask 59′ is used for forming the connecting holes 63 by etching the SiOC film (MSQ film) 56 used as a connecting hole interlayer film, and for forming the wiring pattern 64 in the wiring groove formation region of the SiO2 film 58, the second mask 59′ requires a certain thickness. For example, when the SiOC film 56 functioning as the connecting hole interlayer film and having a thickness of 400 nm is etched by using the SiN film 59 as the second mask 59′, from the viewpoint of etching electivity, the SiN film 59 having a thickness of 100 nm to 150 nm is required for suppressing widening of the upper portions or scraping of the shoulders of the wiring grooves.
However, when the second mask forming layer, i.e., the SiN film 59, becomes thick, the second mask 59′ is inevitably formed on steps by etching the SiN film 59, thereby causing difficulties in accurately forming a micro pattern of the second mask 59′ on the steps.
The inventor proposes a dual damascene process using three-layer masks in Japanese Unexamined Patent Application Publication No. 2002-221069 in which a SiO2 film of 150 nm in thickness used as a first mask forming layer, a silicon nitride (SiN) film of 100 nm in thickness used as a second mask forming layer, and a SiO2 film of 50 nm in thickness used as a third mask forming layer are deposited on the PAE film 57.
The dual damascene process using the three-layer mask structure proposed in Japanese Unexamined Patent Application Publication No. 2002-221069 (referred to as "prior application" hereinafter) will be described below with reference to FIGS. 14 and 15. FIGS. 14A to 14C and FIGS. 15D to 15F are sectional views showing respective steps for forming a dual damascene structure by the method disclosed in the prior application. In FIGS. 14 and 15, the same portions as those shown in FIGS. 11 to 13 are denoted by the same reference numerals.
First, as shown in FIG. 14A, a laminated film including an organic insulating film 52 and a silicon oxide (SiO2) film 53 is deposited as an inter-wiring insulating film on an underlying insulating film 51 by the same method as in the above-described publication, and then copper (Cu) film buried wiring 54 is formed in the inter-wiring insulating film. Then, a silicon carbide (SiC) film 55, a carbon-containing silicon oxide (SiOC) film 56, and a PAE film 57 are successively deposited on the Cu buried wiring 54.
Then, a SiO2 film 58 of 150 nm in thickness used as a first mask forming layer, a silicon nitride (SiN) film 59 of 100 nm in thickness used as a second mask forming layer, and a SiO2 film 70 of 50 nm in thickness used as a third mask forming layer are successively deposited on the PAE film 57.
Next, a resist mask 60 having a wiring groove pattern as a resist pattern is formed on the SiO2 film 70.
Next, as shown in FIG. 14B, the SiO2 film 70 used as the third mask forming layer is etched through the resist mask 60 by a dry etching method to form a third mask 70′ having a wiring groove intermediate pattern.
Then, as shown in FIG. 14B, a resist mask 61 having a connecting hole pattern is formed on the remaining SiO2 film 70 and SiN film 59 so that at least a portion of the connecting hole pattern overlaps with the third mask 70′ (SiO2 film 70) having the wiring groove intermediate pattern.
Next, the SiO2 film 70 remaining in the connecting hole formation region, the SiN film 59 functioning as the second mask forming layer, and the SiO2 film 58 functioning as the first mask forming layer are etched by a dry etching method using the resist mask 61 having the connecting hole pattern. Then, as shown in FIG. 14C, the PAE film 57 is etched by using the remaining SiN film 59 as a second mask 59′ to form connecting holes 62 for exposing the SiOC film 56. The remaining SiO2 film 70 constitutes the third mask 70′ having a wiring groove pattern.
The resist mask 61 can be removed at the same time as etching of the PAE film 57.
Next, as shown in FIG. 15D, the SiN film 59 is etched by a dry etching method using the third mask 70′ (SiO2 film 70) having the wiring groove pattern to form the second mask 59′ having a wiring groove pattern 64. At the same time, the SiOC film 56 is etched to an intermediate portion to form connecting holes 71.
Next, as shown in FIG. 15E, the lower portion of the SiOC film 56 is etched by using the first mask 58′ comprising the SiO2 film 58 as a mask to form connecting holes 63 for exposing the SiC film 55.
At the same time, the SiO2 film 58 remaining in the wiring groove region is removed by using the second mask 59′ comprising the SiN film 59 having the wiring groove pattern to form the first mask 58′ having the wiring groove pattern.
Next, as shown in FIG. 15F, the PAE film 57 remaining at the bottoms of the wiring grooves is etched by using the first mask 58′ (SiO2 film 58) to form wiring grooves 66, and the SiC film 55 remaining at the bottoms of the connecting holes is etched to form connecting holes 65 communicating with the Cu buried layer 54, thereby completing the predetermined dual damascene process.
Then, the same process as the above-described conventional method is performed to form upper buried wiring 68.
In the dual damascene structure multilayer wiring formed as described above, when the resist mask 61 having the connecting hole pattern is formed, the step difference of the under layer can be suppressed to about 50 nm equal to the thickness of the remaining SiO2 film 70, and thus the resist mask having the high-precision connecting hole pattern can be formed. By using the resist pattern having the high-precision connecting hole pattern, the connecting holes having micro dimensions can be stably formed without deteriorating the shape of the wiring grooves.
Therefore, excellent via contact characteristics can be obtained. By applying the method of this embodiment, a semiconductor device comprising a low dielectric constant interlayer insulating film having a dual damascene structure with a good wiring shape can be manufactured in high yield.
In order to decrease the inter-wiring capacity, the inventor further attempted to use a carbon-containing silicon oxide film (SiOC: relative dielectric constant 3.0) instead of the SiO2 film 53 (relative dielectric constant 4.1) deposited on the organic insulating film 52 and constituting the inter-wiring insulating film of the lower wiring, and the SiO2 film 58 (relative dielectric constant 4.1) constituting the inter-wiring insulating film of the upper wiring and functioning as the first mask forming layer.
The configuration and problem of a modification attempted by the inventor will be described below with reference to FIGS. 16 to 20. FIGS. 16A and 16B, FIGS. 17C and 17D, FIGS. 18E and 18F, FIGS. 19G and 19H, and FIGS. 20I and 20J are sectional views showing the respective steps of the modification. In FIGS. 16 to 20, the same portions as those shown in FIGS. 1 to 10 are denoted by the same reference numerals.
As shown in FIG. 16A, a laminated insulating film including an organic insulating film, for example, a PAE film 2, and a carbon-containing silicon oxide (SiOC) film 3 having a relative dielectric constant of about 3.0 is first deposited on an underlying insulating film 1 deposited on a substrate not shown in the drawing. Then, wiring grooves are formed in the laminated insulating film, and copper (Cu) film buried wiring 4 is formed in the wiring grooves. The SiOC film 3 is deposited by a parallel plate plasma CVD apparatus using methylsilane as a silicon source of raw material gases.
Then, a silicon carbide (SiC) film 5 functioning as an antioxidative layer for the Cu film, a carbon-containing silicon oxide (SiOC) film 6 and a polyaryl ether (PAE) film 7 as an organic insulating film are successively deposited on the Cu-buried wiring 4.
Then, a SiOC film 8 having a relative dielectric constant of about 3.0 and functioning as a first mask forming layer, a silicon nitride (SiN) film 9 functioning as a second mask forming layer, and a SiO2 film 10 functioning as a third mask forming layer and having a thickness of 50 nm are successively deposited on the PAE film 7.
Then, a resist mask 11 having a wiring groove pattern as a resist pattern is formed on the SiO2 film 10.
Next, as shown in FIG. 16B, the SiO2 film 10 functioning as the third mask forming layer is etched by dry etching through the resist mask 11 to form a third mask 10′ having a wiring groove pattern 13 on the SiN film 9.
After etching of the SiO2 film 10, the resist mask 11 and the extraneous matters remaining after etching are completely removed by an appropriate post-treatment.
Then, as shown in FIG. 17C, a resist mask 12 having a connecting hole pattern is formed on the remaining SiO2 film 10 and SiN film 9 so that at least a portion of the connecting hole pattern overlaps with the third mask 10′ (SiO2 film 10) having the wiring groove pattern 13.
Then, the third mask 10′ (SiO2 film 10), the SiN film 9 functioning as the second mask forming layer, and the SiOC film 8 functioning as the first mask forming layer are etched by dry etching through the resist mask 12, and the PAE film 7 is further etched by using the remaining SiN film 9 as a second mask to form connecting holes 14 for exposing the SiOC film 6, as shown in FIG. 17D. The remaining SiO2 film 10 forms the mask 10′ having the wiring groove pattern 13.
The resist mask 12 can be removed at the same time as etching of the PAE film 7.
Next, as shown in FIG. 18E, the SiN film 9 is etched by a dry etching method using the third mask 10′ (SiO2 film 10) having the wiring groove pattern 13 to form the second mask 9′ having a wiring groove pattern 15.
In the step of etching the SiN film 9 functioning as the second mask forming layer through the third mask 10′, the SiOC film 6 exposed at the bottoms of the connecting holes 14 is etched to an intermediate position to dig down the connecting holes 14 and form connecting holes 16.
Under these etching conditions, the etching selectivity (SiN/SiOC) to the SiOC film can be set to be slightly smaller than 1, and thus when the SiN film 9 of 100 nm in thickness is etched, the connecting holes 16 can be dug down in the SiOC film 6 to a depth of 150 to 200 nm including a necessary amount of over etching.
Next, the remaining lower layer of the SiOC film 6 is etched by using a first mask 8′ (SiO2 film 8) as a mask to form connecting holes 17 for exposing the SiC film 5, as shown in FIG. 18F. At the same time, the first mask 8′ (SiOC film 8) remaining in the wiring groove region is removed by using the second mask 9′ (SiN film 9) having the wiring grove pattern 15 to form the apertures 18 of wiring grooves.
However, as shown in FIG. 19G, it was confirmed that a region 19 including the remaining SiOC film 8 occurs in the aperture 18A of a wide wiring groove during the formation of the connecting holes 17 and the wiring grooves 18.
This is a phenomenon characteristic of etching of the SiOC film 8 based on the processing selectivity of the SiOC film to be processed to the SiN film 9 used as the etching mask. Namely, while the SiOC film 6 in which the connecting holes 17 are formed, and the SiOC film 8 remaining in apertures narrower than a certain wiring groove can be easily removed to form apertures, carbon is excessively supplied from the SiOC film 8 into the etching atmosphere in such an aperture of a wide wiring groove as the aperture 18A to possibly stop etching of the SiOC film.
It was also found that when the etching conditions are changed for preventing the phenomenon and easily forming the apertures in the SiOC film, the selectivity to the SiN film used as the etching mask is decreased to increase a conversion difference. The "conversion difference" means a difference between the open dimension of the first mask 8′ (SiOC film 8) and the open dimension of the second mask 9′ (SiN film 9).
Then, the PAE film 7 remaining at the bottoms of the wiring grooves 18 is etched to form wiring grooves 20, and the SiC film 5 exposed at the bottoms of the connecting holes 17 is etched to complete the predetermined dual damascene process.
The second mask 9′ (SiN film 9) remaining outside the wiring groove region is removed at the same time as etching of the SiC film 5 exposed at the bottoms of the connecting holes 17.
However, etching of the PAE film 7 and the SiC film 5 has the problem of causing three problems with the shape.
The first problem is that the aperture pattern for a wide wiring groove has the region 19 in which the SiOC film 8 remains, and thus the wiring groove 20 having a predetermined shape cannot be formed by etching a region 21 of the PAE 7, as shown in FIG. 19H.
The second problem is that misalignment between the connecting holes 17 and the lower wiring 4 causes slit-shaped trenches 22 in the inter-wiring insulating film of the lower wiring 4 immediately below the connecting holes 17.
The third problem is that in the first mask 8′ (SiOC film 8) remaining below the second mask 9′ (SiN film 9), the aperture shoulders of the wiring grooves 20 are significantly scraped off.
The second and third problems are due to the fact that in etching the SiC film 5 and the SiN film 9, only a selectivity (SiC/SiOC or SiN/SiOC) of about 1 to the SiOC film 8 can be secured.
Then, the extraneous materials remaining after etching on the wide walls of the wiring grooves 20 and the connecting holes 17, and Cu altered layers at the bottoms of the connecting holes 17 are cleaned off by a post-treatment with a chemical and hydrogen annealing. Then, as shown in FIG. 20I, for example, a Ta film 23 is deposited as a barrier metal by sputtering, and a Cu film 24 is deposited by electrolytic plating or sputtering to bury a conductive film in the connecting holes 17 and the wiring grooves 20.
However, in a region where misalignment occurs between a connecting hole 17 and the lower wiring 14, the slit-shaped trench 22 is produced to locally increase the aspect ratio, thereby causing the problem of producing a burying defect 25.
Then, as shown in FIG. 20J, in the deposited Ta film 23 and Cu film 24, unnecessary portions for the wiring pattern are removed by a chemical mechanical polishing (CMP) method to form a dual damascene multi-layer wiring structure. Like in the lower wiring pattern, for example, a SiC film 27 is deposited as an antioxidative layer on the dual damascene wiring 23/24.
However, in an aperture 26 for wide wiring, the SiOC film 8 remains in the region 19, and the PAE film 7 remains in the region 21, thereby causing the problem of locally thinning the wiring layer in the aperture 26.
The multi-layer wiring formed by the above-described dual damascene process has the problem of locally increasing the resistance of the connecting holes and wiring due to the occurrence of the burying defect 25 of the Cu film in the connecting holes and the locally thinned region 26 of the wiring film.
Also, the condition of the SiOC film 8 remaining in the region 19 varies. In an extreme case, wide wiring is completely broken, leading to a conduction defect.
Furthermore, even when wiring is electrically connected to the connecting holes within the operation range of a semiconductor device, a current and thermal stress are concentrated in the thin local region of the Cu wiring, and the growth of the burying defect 25 occurring in a connecting hole 17 is highly likely to induce reliability defects such as electromigration and stress migration in the operating environment.

Semiconductor device and method for manufacturing the same


The invention relates to an orally administrable chewable composition in unit dosage form comprising an oil-in-water emulsion in which the aqueous phase is gelled and in which the oil phase comprises a physiologically tolerable unsaturated fatty acid ester.

The term unsaturated fatty acid ester oil is used herein to relate to acyl glycerides and phospholipids, i.e. compounds comprising an unsaturated fatty acid side chain linked by an ester group to an "alcohol" (e.g. polyol) residue. Such compounds are important dietary sources of fatty acids, in particular polyunsaturated fatty acids (PUFAs) and more especially the essential fatty acids. They may also serve as sources for dietary replacements of essential fatty acids, e.g. of conjugated linoleic acid (CLA) which may be used in a weight reduction diet. Particularly important essential fatty acids include the ω-3, ω-6 and ω-9 acids such as eicosapentaenoic acid (EPA) and docosahexaenoic acid (DHA). Other fatty acids commonly used in nutraceuticals and pharmaceuticals include arachidonic acid (AA), alpha linolenic acid (ALA), conjugated linolenic acid (CLN), dihomo-gamma linolenic acid (DGLA) and gamma linolenic acid (GLA). Such fatty acids typically will contain 12 to 26 carbons, more typically 16 to 22 carbons, and will have a saturated or mono- or poly-ethylenically-unsaturated hydrocarbyl chain.
Typical dietary sources of such fatty acid ester oils include lipids such as animal, fish, plant or microorganism triglycerides and phospholipids, especially the triglycerides. Mono or diglycerides however can equally be used as can other esters, e.g. lower alkyl (e.g. C1-6 alkyl, for example ethyl) esters as well as free fatty acids or physiologically acceptable salts thereof and fatty acid ester waxes. Particularly important sources are fish oils, in particular oily fish oils such as cod-liver oil, halibut-liver oil, etc. as these are rich in ω-3, ω-6 and ω-9 fatty acids.
However, as anyone who, in childhood, has been on the receiving end of fish oils will recall, the taste, mouthfeel and smell can be vile. In part this is due to the sensitivity to oxidation of the fish oil. As a result fatty acid ester oils tend to be administered in capsule form, containing liquid oil within a soft gel casing. Such capsule casings are usually made from mammalian gelatin, typically of porcine or bovine origin. In order to deliver a reasonable dose of the oil, the capsules tend to be rather large, sufficiently large indeed to cause problems swallowing them for the young and the elderly. As a result, ingestion often involves the capsule being chewed and bursting in the mouth releasing the unpleasantly tasting oil contents.
There is thus a continuing need for improved oral administration forms for unsaturated fatty acid ester oils.
We have now surprisingly found that chewable set emulsions of unsaturated fatty acid esters remain sufficiently free of bad odour and taste.


A method of extracting an information bearing signal .omega.(n) from a base-band signal in the form of an inverse function with a digital signal processor. The processor includes memory and utilizes a minimum number of instructions stored in the memory. The base-band waveform comprises a plurality of complex-valued samples having respective I and Q components. The method includes the steps of receiving a first sample at an instant n having respective I(n) and Q(n) components and defining an interval for evaluating potential values for the I(n) and Q(n) components. Next, a step of transforming said I(n) and Q(n) components is performed to have respective threshold values residing in the predefined interval. Then, a step of estimating the transformed components with a series of non-inverted polynomial functions is carried out over the predefined interval. The method proceeds by extracting the information-bearing signal with the digital signal processor according to the instructions to evaluate the series of non-inverted polynomial functions.

A popular technique for demodulating FM signals in a telecommunications receiver involves employing a discriminator to extract the signal of interest. Typically, once received, a modulated FM signal is converted to base band by extracting the in-phase (I) and quadrature-phase (Q) components where:
I(t)=a(t) cos .phi.(t); PA1 Q(t)=a(t) sin .phi.(t); PA1 .phi.(t)=.intg..omega.(.tau.)d.tau.; and PA1 .omega.(.tau.) is the information bearing signal.
Once the I and Q components are determined, the discriminator operation evaluates the quantity: EQU I(t)Q'(t)-Q(t)I'(t)=.alpha..sup.2 (t).phi.'(t)=.alpha..sup.2 (t).omega.(t)
where ' denotes the derivative. In cases where the envelope a(t) is constant, the discriminator produces an output proportional to the information bearing signal .omega.(t).
In data communications applications, .omega.(t) is typically a multilevel pulse-amplitude modulation (PAM) signal. Many applications for such signals include more than two signal levels to achieve greater information processing capacity. However, in establishing multiple signal levels, the probabilities of decisional errors increase substantially. To combat this problem, a set of thresholds for classifying the signals can be optimally determined to achieve the lowest possible decision error probabilities.
Optimally selecting sets of thresholds theoretically presents an acceptable solution to the problems involved in multi-level demodulation of signals within a relatively constant envelope. Realistically however, the envelope a(t) always changes, together with the output levels of the discriminator. When this occurs, the predetermined thresholds are no longer optimum and performance degradations in terms of error bit rate increase.
To minimize fluctuations in the envelope, conventional analog discriminators employ additional automatic gain control AGC circuitry to maintain a(t) within an acceptable band of values. Unfortunately, conventional analog AGC circuits have been found to reduce performance degradations only to a limited extent. Moreover, typical wireless channels often exhibit frequency fadings where a(t) has sudden and dramatic changes for which the AGC cannot adapt at all.
In the digital domain, an information-bearing signal may be explicitly extracted without any dependency on the envelope by employing a digital signal processor (DSP) to evaluate the relation: ##EQU1##
The relationship above represents a digital discriminator including a special type of AGC that eliminates the adverse effect of the envelope fluctuation. While this relationship works well to solve the problem of gain fluctuation, evaluation of the inverse function embedded therein typically requires an undesirably high number of instruction cycles. For example, implementation of the inverse function 1/x in the instruction language of the DSP16000 processor available from Lucent Technologies, requires 55 cycles. This is mainly attributeable to the multiplicative and additive nature of most DSP's.
DSP architectures are typically designed to maximize processing speed with a finite number of processor instructions. With each instruction taking a certain amount of time to carry out, eliminating unnecessary instructions substantially increases a DSPs' performance. One common performance or efficiency benchmark utilized in the industry takes into account the number of MIPs, or millions of instructions per second, that the DSP is capable of carrying out. The greater the number, the more efficient the architecture is considered.
One approach to evaluate an inverse function utilizing a DSP assumes that the squared components of I and Q remain constant over several samples. Unfortunately, this technique fails to solve the problem associated with the unacceptably high number of cycles required to carry out the inversion operation.
Therefore, the need exists for an FM digital discriminator and method utilizing automatic gain control to extract signals defined by an inverse function from demodulated signals with a minimum number of instruction cycles on the part of the DSP. The discriminator and method of the present invention satisfy these needs.
The discriminator and method of the present invention allow digital signal processors to extract signals characterized by an inverse function from FM demodulated waveforms with a minimum number of instruction cycles. By minimizing instruction cycles, the DSP's limited instruction resources may be conserved to carry out additional functions and improve processor efficiency.
To realize the advantages above, the invention in one form comprises a method for use with a digital signal processor to extract an information bearing signal .omega.(n) from a base-band signal in the form of an inverse function. The processor includes memory and utilizes a minimum number of instructions stored in the memory. The base-band waveform comprises a plurality of complex-valued samples having respective I and Q components. The method includes the steps of receiving a first sample at an instant n having respective I(n) and Q(n) components and defining an interval for evaluating potential values for the I(n) and Q(n) components. Next, said I(n) and Q(n) components are transformed so as to have respective threshold values residing in the predefined interval. Then, a step of estimating the transformed components with a series of non-inverted polynomial functions is carried out over the predefined interval. The method proceeds by extracting the information-bearing signal with the digital signal processor operating according to the instructions to evaluate the series of non-inverted polynomial functions.
In another form, the invention comprises an FM discriminator for use in a digital signal processor to extract an information-bearing signal from a base-band signal. The base-band signal is in the form of an inverse function and comprises a plurality of complex-valued samples having respective I and Q components. The discriminator includes an input for receiving a first sample at an instant n having respective I(n) and Q(n) components, a memory, and logic disposed in communication with said input and the memory. The logic defines an interval for evaluating potential values for said I(n) and Q(n) components, then transforms the I(n) and Q(n) components to have respective threshold values residing in the predefined interval. The logic also estimates the transformed components with a series of non-inverted polynomial functions over the predefined interval, and extracts the information-bearing signal by means of the digital signal processor, to evaluate the series of non-inverted polynomial functions. The logic then stores the extracted signal in the memory.

FM discriminator with automatic gain control for digital signal processors


A method for anodizing valve metal structures to a target formation voltage is described. The valve metal structures are placed in an anodizing electrolyte and connected to a power supply that generates a source voltage to at least one current limiting device. If at least two current limiting devices are used, they are in series with the valve metal structures with the one current limiting device connected to at least one structure. The valve metal structures are then subjected to a current that decreases over time, a formation voltage that increases over time to a level below the voltage from the power supply and a power level that is self-adjusted to a level that decreases excessive heating in the structure. The invention also includes the components for the method.

In general, electrolytic capacitors comprise anodes and cathodes that are separated by a porous separator material impregnated with an ionically conductive electrolyte. The electrolyte is typically composed of water, solvent(s), salt(s) of weak inorganic or/and organic acids. The anodes are of a valve metal having its exterior surface coated with a film of the corresponding oxide serving as a dielectric. Valve metals include and are not limited to aluminum, tantalum, niobium, titanium, zirconium, hafnium, and alloys thereof. The valve metals can be in any conventional form. Examples include etched foil, sintered powders, or other porous structures.
Anodizing the valve metals in an appropriate anodizing electrolyte forms the oxide film. The film thickness increases with the anodizing voltage. The desired oxide film thickness is determined by a capacitor working voltage, operation temperature and other performance requirements.
Maximum anodizing voltage and quality of the oxide formed strongly depends on the valve metal, the anodizing electrolyte composition, and the anodizing protocol. The anodizing protocol refers to a series of voltage/current "on" and "off" sequences.
It is believed that locally excessive temperatures and insufficient material transport in porous valve metal bodies during anodizing (especially for anodization of high voltage, large, pressed and sintered tantalum powder anodes) causes breakdown during anodization or poor anode electrical properties. There have been numerous attempts to solve these problems by improving the heat and electrolyte transport between the anodes and the bulk electrolytes. Some of the prior art methods include: controlling the anodizing current density; mechanical, sonic, or ultrasonic agitation of the electrolyte; anodizing by combining control of voltage/current and controlled rest steps (U.S. Pat. No. 6,231,993 to Stephenson et al.); and controlled pulses of the voltage/current (U.S. Pat. No. 6,802,951 to Hossick-Schott). These methods require sophisticated electronics for current/voltage/power control and frequent on/off switches that increase anodizing time. Additionally, it is believed that the eruptive increase in current/voltage in the case of pulsed anodizing may cause early breakdown and poor oxide quality.
A pressed tantalum powder pellet is a porous structure. During the prior art anodization process based on controlling the current density, the tantalum pellet is oxidized to a desired formation voltage by applying a current to the pellet. An example of this prior art protocol is illustrated in FIG. 1 where the current is maintained (line 2) and the power and voltage increases (line 4) over time. Such a simple anodizing protocol may be adequate for low voltage anodization where the breakdown voltage is intended to be less than about 100 volts. For high voltage anodization, i.e., greater than about 100 volts, as the anodizing voltage increases, the temperature in the porous valve metal anode increases. The locally excessive temperature in the anode promotes oxide defects, gray-out, and early anodizing breakdown. This traditional method has been confirmed in U.S. Pat. No. 6,802,951 to Hossick-Schott.
In the '951 patent, Hossick-Schott writes, "Traditional methods of forming the oxide layers are described in the prior art, e.g., in U.S. Pat. Nos. 6,231,993, 5,837,121, 6,267,861 and in the patents and articles referenced therein. Typically, a power source capable of delivering a constant current and/or a constant potential is connected to the anode slug that is immersed in the electrolyte. The potential is then ramped up to a desired final potential while a constant current flows through the anode-electrolyte system."
An obvious variation of FIG. 1 was disclosed in the '951 patent. Hossick-Schott disclosed and claimed an anodization protocol having (1) the voltage rise to a predetermined level; (2) when the voltage rises the current remains constant, (3) when the voltage reaches the predetermined level, the current decreases; and (4) when the current and/or voltage are rising, being maintained or decreasing, the electrolyte composition is agitated.
An alternative anodization (formation) protocol for high voltage sintered tantalum anodes is disclosed by Stephenson et al. in U.S. Pat. No. 6,231,993. The '993 patent is assigned to Wilson Greatbatch Ltd., the assignee for this application. Stephenson et al. disclose (bracketed material added for clarity) the following anodization protocol, which is partially illustrated in FIG. 2:
An exemplary formation protocol for a sodium reduced tantalum powder pellet is as follows. Exemplary sodium reduction tantalum pellets are available from H. C. Starck Inc., Newton, Mass. under the "NH" family designation. In this exemplary protocol, the pellet has a weight of about eight grams and the desired target formation voltage is 231 volts. The formation electrolyte is of polyethylene glycol, de-ionized water and H3PO4 having a conductivity of about 2,500 μS[/cm] to about 2,600 μS[/cm] at 40° C. The formation protocol is as follows:
1. The power supply is turned on at an initial current [line 2] of 80 mA until the voltage reached 75 volts. The power supply is then turned off for about three hours.
2. The power supply is turned back on at 80 mA, 75 volts and to 115 volts. The power supply is then turned off for about three hours.
3. The power supply is turned back on at 49 mA, 115 volts and to 145. The power supply is then turned off for about three hours.
4. The power supply is turned back on at 49 mA, 145 volts and to 175. The power supply is then turned off for about three hours.
5. The power supply is turned back on at 40 mA, 175 volts and to 205. The power supply is then turned off for about three hours.
6. The power supply is turned back on at 36 mA, 205 volts and to 225. The power supply is then turned off for three hours.
7. The power supply is turned back on at 36 mA, at 205 volts and to 231. The pellet is held at 231 volts for about one hour to complete the formation process. The anodized pellet is then rinsed and dried.
If desired, the formation process is periodically interrupted and the anodized pellet is subjected to a heat treatment step. This consists of removing the anode pellet from the anodization electrolyte bath. The anode pellet is then rinsed and dried followed by heat treatment according to the procedure described by D. M. Smyth et al., "Heat-Treatment of Anodic Oxide Films on Tantalum", Journal of the Electrochemical Society, vol. 110, No. 12, pp. 1264-1271, December 1963.
The anodization protocol illustrated in FIG. 2 controls the current and decreases the heat generated in comparison to the protocol illustrated in FIG. 1. By decreasing the temperature rise, the FIG. 2 anodization protocol obtains an anode having decreased DC leakage. However, as with any protocol there is a desire to further improve the quality of the anodized valve metal. One way to measure the improved quality of an anodized valve metal is to determine if the DC leakage decreases. A decreased DC leakage indicates a better oxide formation on the valve metal and more stable performance of the subsequently built capacitor. Better oxide formation, in turn, is obtained by better heat dissipation in the valve metal during anodization.
In that respect, the present invention teaches a method of anodization that simplifies the equipment and process, reduces anodization time, and provides a better quality oxide. Although this invention is, in principle, applicable to all valve metal anodes, it is particularly useful for anodizing a high voltage sintered tantalum structure.

Anodizing valve metals by self-adjusted current and power


Inverters connected in parallel each include a power converter that carries out a direct current to alternating current conversion and supplies voltage to a motor, and a control unit, where one of the inverters is a master inverter and the control unit computes a voltage command value for the power converter in the one inverter, while the other inverter is a slave inverter and the power converter in the slave inverter is driven by the voltage command value, a transmission means transmits the voltage command value, and the control unit of the master inverter includes a delay device that delays the voltage command value by a transmission time needed when transmitting a computed voltage command value to the slave inverter, and provides the voltage command value delayed by the delay device to the power converter of the master inverter.

1. Technical Field
The present invention relates to a parallel inverter device that drives a load such as an alternating current motor using a plurality of inverters connected in parallel.
2. Related Art
In general, an inverter is configured of a power converter and a control device that controls the power converter. When driving an alternating current motor with the inverter, a torque command value or voltage command value sent from the control device is transmitted to a plurality of power converters, and an operating of each power converter is carried out.
For example, heretofore known technology whereby each of a plurality of inverters includes an output current control system, and each inverter individually drives an alternating current motor, is described in JP-A-3-159596 (Page 3, top left column, Line 8 to bottom left column, Line 13, FIG. 2, and the like).
FIG. 4 is a configuration diagram of the heretofore known technology described in JP-A-3-159596 (Page 3, top left column, Line 8 to bottom left column, Line 13, FIG. 2, and the like), wherein reference numerals 201a and 201b are inverters, 202a and 202b are alternating current motors individually driven by the inverters 201a and 201b respectively, 203 is a controller, 204 is a master station, 205a, 205b, 206a, and 206b are remote stations, 207a is a speed sensor, 208a is a speed controller, 209a and 209b are current controllers, 210a and 210b are current sensors, 211a and 211b are power converters (inverter portions) that carry out a direct current to alternating current conversion by an action of a semiconductor switching element, and 220 is a transmission line.
This heretofore known technology is such that information can be serially transmitted between the controller 203 and the inverters 201a and 201b. Further, the controller 203 is configured so that the motors 202a and 202b are individually driven by calculated torque command values being distributed, the distributed torque command values being transmitted individually to the inverters 201a and 201b by serial transmission, and each of the inverters 201a and 201b acting in accordance with its own torque command value.
In FIG. 4, N* is a speed command value, Ia* and Ib* are current command values of the inverters 201a and 201b, and Ia and Ib are current detection values of the inverters 201a and 201b.
Meanwhile, a parallel inverter device wherein increased capacity is enabled by connecting the output sides of a plurality of inverters in parallel, in order to drive a high-capacity alternating current motor, is described in, for example, JP-A-2008-228548 (Paragraphs [0031] to [0040], FIG. 4, FIG. 5, and the like).
FIG. 5 is a configuration diagram of the heretofore known technology described in JP-A-2008-228548 (Paragraphs [0031] to [0040], FIG. 4, FIG. 5, and the like), wherein reference numeral 100 is a parallel inverter device, 101 is an alternating current power source, 102 is an alternating current motor, 103 is a speed sensor, 110-1 and 110-2 are converters, 120-1 and 120-2 are smoothing capacitors, 130-1 and 130-2 are inverters, 131-1 and 131-2 are communication circuits, 132-1 and 132-2 are PWM generating circuits, 133-1 and 133-2 are condition monitoring circuits, 134-1 and 134-2 are power converters (PWM inverter portions), 140-1 and 140-2 are current sensors, and 150 is a control circuit.
This heretofore known technology is such that the two inverters 130-1 and 130-2 are connected in parallel between the alternating current power source 101 and the motor 102, a synchronization signal and a voltage command value are transmitted using a serial transmission means from the control circuit 150 to the communication circuits 131-1 and 131-2 in the inverters 130-1 and 130-2 and, by the inverters 130-1 and 130-2 acting based on the synchronization signal and the voltage command value, the outputs of the two inverters 130-1 and 130-2 are totaled, and supplied to the single motor 102.
The heretofore known technology according to JP-A-3-159596 (Page 3, top left column, Line 8 to bottom left column, Line 13, FIG. 2, and the like) is such that the inverters 201a and 201b respectively include the current controllers 209a and 209b, which control the output current, and as a result of the current controllers 209a and 209b responding individually, there is a danger of variation occurring in the voltage command values acting as the outputs of the current controllers 209a and 209b. Because of this, it may happen that an error occurs between the output voltages of the inverters 201a and 201b, and a cross-current or circulating current (hereafter, these will be referred to collectively as a cross-current) flows between the inverters.
As a countermeasure, it is necessary to secure a surplus equivalent to the amount of cross-current as a current capacity margin of the power converters 211a and 211b, and a problem occurs in that when the current value thereof is large, the capacity of the power converters increases, and the cost increases.
Also, it is necessary to install an AC reactor or interphase reactor in order to suppress instantaneous cross-current, which leads to an overall increase in the size and weight of the device, and to an increase in cost.
As the heretofore known technology described in JP-A-2008-228548 (Paragraphs [0031] to [0040], FIG. 4, FIG. 5, and the like) is such that a voltage command value is sent using the serial transmission means from the control circuit 150 to the communication circuits 131-1 and 131-2 of the inverters 130-1 and 130-2 respectively, and the inverters 130-1 and 130-2 drive the power converters 134-1 and 134-2 in accordance with the received voltage command value, it is necessary to configure the connection form (topology) of the inverters 130-1 and 130-2 so that the delays in transmission time from the control circuit 150 to the communication circuits 131-1 and 131-2 are identical.
Types of connection include, for example, a ring type connection wherein a plurality of inverters have no master-slave relationship, and a master-slave type connection wherein the control unit of one inverter is a master inverter that computes a voltage command value by itself and directly drives its own power converter, and the remaining inverters are slave inverters, each of which drives its own power converter based on the voltage command value received via the transmission means.
However, even in the event that these types of connection are adopted, it may happen, due to a delay in transmitting a control signal, that not all the inverter voltage command values coincide temporally, and it may happen that errors occur between the inverter output voltages. In this case, there is a problem in that excess cross-current flows between power converters through the wiring inductance of the output cables of power converters connected in parallel, and the semiconductor switching element is damaged, or the like.

Parallel inverter device and method for control thereof


A composition for the antifireeze liquid or the coolant includes a cyclo hexane dicarboxylic acid, an azole- or thiazole-based inhibitor, and a metal from an element of group 2, group 5, group 6, or group 7. The composition of the present invention has increased corrosion resistance at a lower density by not containing organic additives, and has a better pH buffering property due to enhanced thermal oxidation stability at a high temperature. Even after a long-term operation for over 200000 km, the composition of the present invention maintains a metal corrosion resistance capability, the appearance of a water pump impeller and the inside of a radiator tube including aluminum remains decent, and the composition has a superior corrosion resistance effect with respect to internal metal parts even after an operational test, thereby allowing use of the composition for the antifreeze liquid or the coolant having a long life.

1. Technical Field
The present invention relates to a composition for an antifreeze or a coolant, containing (a) cyclohexane dicarboxylic acid; (b) an azole- or thiazole-based inhibitor; and (c) a metal of group II, V, VI, or VII element.
2. Background Art
Generally, a composition for an antifreeze or a coolant contains, as a main material, ethylene glycol or propylene glycol. The composition contains, as main components, a carboxylic additive and an organic material in order to prevent corrosion of aluminum- and iron-based parts. Aliphatic polybasic acid type surfactants (Japanese Patent Publication No. 2002-38137), dicarboxylic or tricarboxylic acid having C10-C20 alkyl group (Japanese Patent Publication No. 2000-219981), flavone derivatives (Japanese Patent Publication No. 2001-98258), polymaleic acid, polyacrylic acid, or copolymers of their monomers (Japanese Patent Publication No. 2001-279235), lithium compounds (Japanese Patent Publication No. Hei 9-263976), and the like have been reported as anti-corrosive agents for the aluminum- and iron-based parts.
On the other hand, since only the combination of carboxylic and organic additives cannot have anti-corrosive durability at low concentrations of 30% or less, a phosphate or silicate additive (U.S. Pat. Nos. 4,873,011, 5,422,026, 4,598,205, 4,657,689, 4,647,392, and 5,064,552) is used as a supplement agent. However the phosphate and silicate additives have faults of a fast depletion rate and bad stability. The phosphate additive reacts with calcium or magnesium ions, which may be contained in the antifreeze or coolant dilution water, to form calcium phosphate and magnesium phosphate which are insoluble in water, thereby causing blockage and corrosion due to scale and hindering the long-term anti-corrosion for aluminum- and iron-based parts. Silicate may be easily gelled due to its poor stability, may generate abrasive SiO2 particles, resulting in a loss of anti-corrosive capability, thereby accelerating abrasion of mechanical seals of the water pump to cause a liquid to leak, or may block the core of the radiator by precipitation, causing an overheating phenomenon.
Throughout the entire specification, many patent documents are referenced and their citations are represented. The disclosures of cited patent documents are entirely incorporated by reference into the present specification, and the level of the technical field within which the present invention falls and details of the present invention are explained more clearly.

Composition having enhanced corrosion resistance and pH buffering property for antifreeze liquid or coolant


A condition or detecting a change in the condition of an optical element of a laser arrangement is detected. An ultrasonic signal is coupled into an optical element such that the ultrasonic signal travels along a path within the optical element, and a transit time or a change in transit time for the ultrasonic signal to travel along the path within the optical element is detected.

Among other aspects, a laser cutting process depends on the quality and temporal behaviour of a focussed laser beam used in the laser cutting process. Lenses and/or mirrors are used to guide and form the laser beam. Thus, the lenses and/or mirrors influence the resulting cut. Wear on the lenses (or on other optical elements in the beam path) can increase the absorption of the laser beam by the lenses or other optical elements, which results in heating of the lenses or other optical elements. The heating can cause changes in the optical properties of the lenses or other optical elements, such as, for example, a greater focal shift.
Because a change in the temperature of the optical element frequently causes a change in the condition of the optical element, various techniques have been proposed to detect the temperature of an optical element or a parameter describing this. For example, a resistance measurement is disclosed in European Patent No. EP 1 310 782 A1. A change in a physical parameter of an optical element such as, for example, the temperature, due to the absorbed radiation is sensed and used as a source of information of the condition of the optical element. In this method the temperature is determined by measuring an electrical resistance. In German Utility Patent No. 203 14 918 U1, a device for monitoring a protective glass in a system of laser optics for breakage and/or contamination is disclosed. In German Patent Application No. 10 2004 006 565 A1, a change in length of an optical element is measured. A temperature change that is due to a change in the optical properties is determined based on the measured change in length.
In German Patent Application No. 197 094 73 A1, a degree of wear of a lens arrangement is determined during the machining of a workpiece with a laser beam. The workpiece is cut with the laser beam, and a cut-in time required to cut through the workpiece is measured and compared with a predetermined reference cut-in time to generate, for example, a warning signal if both cut-in times deviate from each other by more than a given tolerance value. A trace on the workpiece is generated with the laser beam, and at different times the radiation coming from the workpiece is measured, in order to deduce the wear condition of the lens arrangement by comparing the measured radiation values taken at different times. In International Patent Application Publication No. WO 98/33059, a photodetector detects scattered light generated by contamination.

Method and apparatus for detecting a condition of an optical element