A technique is described to change the codec or MAC (message authentication code) size in a packet security unit for PacketCable communications during realtime voice transmissions is described. An algorithm that provides fast RC4 key advancing to prevent MIPS (millions of instruction cycles per second) overflow is used to perform codec or MAC size changes. The invention is performed without changing the keying material, where the sender and receiver must continue the RC4 encryption process from its state prior to the codec or MAC size change. A sender needs to preserve continuity of the timestamp across a codec change, since the timestamp reflects realtime. Changing the codec or MAC size is likely to change the frame parameters. To preserve continuity of the RC4 state and the timestamp across the codec/MAC size change, the sender TX and receiver RX generates a new frame number. The new frame number is applied to the first frame generated by the new codec or MAC size.

PacketCable is a project conducted by Cable Television Laboratories and its member companies whose goal is to identify, qualify, and support packet-based voice and video products over cable systems. PacketCable is a set of protocols and associated element functional requirements developed to deliver Quality-of-Service enhanced secure communications services using packetized data transmission technology to a consumer's home over the cable television hybrid fiber-coaxial data network. The PacketCable Security Specification is hereby incorporated by reference; and interim PacketCable Security Specification document PKT-SP-SEC-I01-991201, released Dec. 1, 1999 is specifically referenced.
The RC4 (Rivest Cipher 4) algorithm is a stream cipher designed by Rivest for RSA Data Security and is a variable key-size stream cipher with byte-oriented operations. The algorithm is based on the use of a random permutation. It is commonly used to protect Internet traffic using the SSL (Secure Sockets Layer) protocol. RC4 is a variable-key-size cipher developed in 1987 by Ron Rivest for RSA Data Security, Inc. RC4 is used to encrypt media flows for voice and video over packet cable. The algorithm used variable length keys. For PacketCable the key length is set to 128 bits. RC4 is a pseudo-random number generator in output feedback mode. The key-stream is independent of the plaintext. The output stream is generated from the key and stored with the plaintext. There is no integrity protections on the data. RC4 uses a 256 entry substitution box which must be initialized. The entries are a permutation of the number 0 through 255, and the permutation is a function of the variable-length key.
Referring to FIG. 1, an example of a voice encryption system for using RC4 is illustrated. A packet security unit ("PSU") implements a single channel functionality for encryption/decryption and authentication of voice payload. A PSU is implemented as an independent module, but it is highly correlated to Packetized Voice Protocol Unit ("PVP") 10 and PVP uses PSU functions through a function pointer. PSU also supports Real Time Protocol ("RTP") with voice payload only. PSU can be configured to support authentication or encryption with or without authentication. RC4 algorithm is used in encryption, while authentication is based on Multi-linear Modula Hash Message Authentication Code ("MMH-MAC") algorithm. The MMH-Message Authentication Code ("MAC") is the message authentication code option for media flows. The MMH-MAC is computed over the RTP header and the payload generated by the codec 22.
A message authentication code ("MAC") provides security to each packet of a media stream. A MAC ensures the receiver that the packet came from the legitimate sender and that it has not been tampered with en route. A MAC defends against a variety of potential known attacks, such as replay and clogging. It also may defend against as-yet-undiscovered attacks. Typically, a MAC consists of eight or more octets appended to the message being protected. A two or four byte MAC can be chosen during configuration for PacketCable. The encryption keys and keys lengths are configurable, for example the RC4 key can require 128 bits. A MAC key and key length are configurable as well. The maximum MAC key length should be the maximum RTP packet length plus the number of MAC digits. An exemplary voice payload size is 240 bytes (30 ms*80 PCM samples/10 ms). The maximum RTP header length should be 12 bytes plus the maximum contributing source identifiers (CSRC) length of 64 bytes, or 72 bytes. The MAC key length should then be at least 316 bytes. The RC4 and MAC keys are initialized by loading key messages from MIC.
In FIG. 1, in the PVP transmit side (TX) 12, the PSU receives packets from the codec 22, encrypts one frame of voice payload, and performs the message authentication on one RTP packet. Packets are sent to and received from a network driver unit (NDU)20. At the PVP receive end (RX) 14, the PSU performs the message authentication on the receive packets first, then decrypts the voice payload. After the receiving packets through PSU RX 14, packets are sent to a voice playout unit (VPU) 16, after which they are sent back to the codec 22. According to the RC4 algorithm, RC4 states must be synchronized with an RTP packet timestamp and the RC4 state adjustments are involved in both PVP TX 12 and RX 14 directions. Because of network packet delay jittering and voice activity detection operations, PVP 10 may not receive any packets for a long period of time. The next received packet will require a large amount of RC4 states adjustments in that case. In order to avoid interrupting a conversation by adjusting the RC4 states during voice transmissions, RC4 decryption states are adjusted during a no packet arrival period. A 2.5 ms local clock is used in the RC4 decryption states advance function.
The RC4 algorithm has been specified for use in an RTP (Real Time Protocol) stream in PacketCable. The algorithm applies only to the RTP payload, not the header, and does not add any additional bytes to the voice packets. The algorithm assumes that voice payload packets are part of one large data stream. The state must be maintained over packet boundaries, however, and even over codec 22 changes. The timestamp field in the RTP header is used to keep the sender and receiver RC4 states synchronized. The state of the RC4 encryption process is preserved between frame encodings. The RC4 process operates as if the payload of each frame is padded up to length (Ne+Nm) octets, where Ne is the maximum size of the payload of an event packet (the value of Ne is at least as large as Nc which is the number of octets in one frame of compressed audio; Nc is a consent value that depends on the voice codec and on the audio frame size; the payload of a voice packet contains the Nc octets making up one frame of compressed audio), and Nm is the number of MAC octets; with a value of zero if the optional MAC is not selected, or two or four which represents the MAC size if the optional MAC is selected. The payloads of all packets are concatenated into a single stream. The stream is encrypted by a single RC4 encryption process.
RC4 encryption state Nk is the number of keystream octets that have been previously generated by the RC4 encryption process, whether used or discarded. Nk has value 0 immediately after the RC4 process is initialized with a new key and increments with each generated octet of keystream. Nk is used both in RC4 encryption and MAC process. For each frame, the RC4 encryption state Nk should be set to the value Nf(Ne+Nm), where Nf is the codec frame number, and Ne is the maximum size of the payload of an event packet; and Nm is the number of MAC octets. This value is 0, if the optional MAC is not selected, or 1 or 2 which represents the MAC size if the optional MAC is selected. The octets of the packet's payload are encrypted using the RC4 encryption process and inserted into the payload field. If there are B octets to be encrypted, then they are encrypted using octets Nk+Nm to Nk+Nm+B−1, inclusive and in order in the RC4 key-stream. The Nm octets from Nk to Nk+Nm−1 are used in MAC digit calculation. Not all of the key-stream octets generated by the RC4 process are necessarily used. The RC4 encryption process is advanced for silent codec frames that are not actually transmitted, since the value of Nf increments even for silent frames. Since the codec calls operates continuously at codec frame rate during conversation, TX RC4 encryption state synchronization involves updating Nk to Nf (Ne+Nm) according to the current frame number Nf The next expected frame number Nf_next (16 bits) is used to represent the RC4 state.
Prior to decrypting the packet's payload or verifying its Mac digits, RC4 decryption state at the receiver side, RX, must match the RC4 encryption state of sender side TX. The RC4 decryption state Nk should be set to the value Nf*(Ne+Nm) as well, where the maximum payload size Ne and the number of MAC octets Nm should be the same as the transmit side TX during the channel setup. The frame number Nf is computed from the value of timestamp field in the packet header. The timestamp field is a 32-bit value that reflects the sampling instant of the first uncompressed speech sample encoded in the packet. The timestamp field is used by the receiver to synchronize its decryption process to the encryption process of the sender. The starting times of two communicating parties are independent and their time difference is arbitrary. The starting time differences could be beyond the timestamp threshold in timestamp check. A MIPS based RC4 state adjustment algorithm is used for RC4 states adjustment in the first receive packet.
Therefore, the timestamp value is very crucial for RC4 decryption state synchronization, the receiver should perform a check on the timestamp value in the RTP header. A timestamp check state is used to check if the timestamp of the current packet is in a reasonable range of the value expected based on the receiver's local clock. The packet will be rejected if the time stamp is invalid. When no packets are sent during silence periods or during packet losses, the RC4 states are advanced using a local clock. RC4 state synchronization will advance RC4 state forwards or backwards in order to make RC4 states Nk equal to Nf_next (Ne+Nm). An authentication check is performed on a MAC key and one random pad from RC4. The states transitions are controlled by the system configuration parameters and received packet timestamps.
Although the PacketCable Security Specification provides guidance for security measures in its implementation, the standard will not operate correctly when a codec or MAC change occurs during a call transmission. The lack of a proper timestamp for transitioned packets prevents the receiver from synchronizing with the transmitter. Therefore, what is needed is a way to adjust the RC4 state to synchronize between the transmitter and the receiving when changing a codec or MAC during PacketCable communications.

Changing a codec or MAC size without affecting the encryption key in PacketCable communication


An expandable safe room (ESR) defining a protected space therein is provided and comprises a main upright frame, a pair of side walls hingedly connected to the main upright frame, and a front wall parallel to the main upright frame and hingedly connected to the side walls, wherein deploying the ESR in an expanding direction moves the front wall in a forward direction and away from the main upright frame. Floor and roof are also provided wherein the deployment of the ESR can be automatically or manually.

Protective structures are known. Typically, the protective structures are made of steel and are capable of protecting humans and equipment.
U.S. Pat. No. 3,889,432 to Geihl discloses a foldable and expandable modular shelter unit for a transportation vehicle. The support of the shelter unit limits it to be used on a vehicle only. U.S. Pat. No. 8,978,318 to Klein teaches an erectable indoor shelter having at least one metal frame attached to internal wall of an apartment. Five protective walls are attached to the frame for forming the shelter.
There is a need to provide a foldable and extendible safe room that can be used indoor as well as outdoor and is totally independent of other supporting structures such as apartments, buildings, or vehicles.


A method for forming an oxide on the surface of a semiconductor substrate. The method includes the steps of: placing the semiconductor substrate in an atmosphere containing an atmosphere of an oxide growth inhibiting compound; applying laser energy to at least a first portion of the substrate; and forming the oxide on the surface of the substrate by heating the substrate. In a further aspect of the invention, the method comprises applying laser energy through a patterned, reflective reticle. Alternatively, prior to the step of placing, a reflective mask layer may be applied to the surface of the semiconductor substrate. In addition, the invention comprises an EEPROM memory cell having a program junction region in a semiconductor substrate. The cell comprises at least a first program junction provided in the silicon substrate and a floating gate having a portion positioned over the program junction. In addition, an oxide layer is positioned between the program junction and the floating gate, the gate oxide formed by a single thermal oxidation step to have at least a first oxide thickness and a second oxide thickness due to gas immersion laser doped nitrogen underlying a region of the oxide having said at least first oxide thickness.

1. Field of the Invention
The invention relates to the process for providing nitrogen in a semiconductor substrate, particularly for forming an oxide region using differential oxide growth.
2. Description of the Related Art
A prevalent trend in the semiconductor industry is to increase the density of semiconductor devices formed on silicon substrates.
Programmable logic devices (PLD) are circuits which can be configured by a user to perform logic functions or serve as memory arrays. Generally, PLDs include a programmable array of cells and array control circuitry which is utilized to program the array with the desired implementation. The programmable array comprises a series of low-voltage, short channel floating gate transistors which store charge to reflect whether a particular cell is programmed with a bit of data. The programmed array reflects in a particular user's individual configuration for the programmable device, allowing users to customize the programmable logic device for a number of different applications.
One type of programmable logic device which has become popular due to its performance and cost characteristics are electrically erasable (E.sup.2) CMOS programmable devices.
Erasable CMOS technology is based on the concept of a stored charge on a floating gate. Electrons are transferred to the gate through a physical mechanism known as Fowler-Nordheim tunneling. For an electrically erasable cell, a tunnel oxide is present between the source and drain regions and the floating gate that is about one-third of the thickness of a traditional transistor gate oxide. Fowler-Nordheim tunneling involves placing a potential across the tunnel oxide which distorts the electric field and allows electrons to traverse the tunnel oxide upon which they become trapped on a floating gate.
The control circuitry of the cell--the program transistors--essentially comprise high voltage transistors capable of sustaining high electric fields. So called read transistors, which operate at low voltage, include a first junction, second junction and gate (defined by the word line of the device). A program junction is separated from the floating gate by an oxide layer having a thickness of approximately 180 .ANG.. The program transistor includes a first junction, second junction and a gate which also rests on the oxide layer. The memory cell will also include a floating gate, separated from the program junction by a tunnel oxide which may be activated by the control gate. The thickness of tunnel oxide is in a range of approximately 80-100 .ANG..
When programming or erasing the device, a voltage is applied between the program and control gate nodes. The direction of the voltage determines whether the cell is erased or programmed. When erasing, the control gate is given a positive voltage and the program node is grounded. When programming, the program node voltage is elevated and the control gate is grounded.
Several alternative designs of memory cells are utilized. Characteristically, in an E.sup.2 CMOS PLD, four types of transistors are required: high voltage P channel, high voltage N channel, low voltage P channel, and low voltage N channel. Techniques for saving mask steps during the formation of these cells are advantageous as each mask savings reduces the cost of the overall device.
The trend of E.sup.2 PLD devices has been toward lower and lower supply voltages. Consequently, this has required a corresponding scaling down of the gate oxide and two different oxide thicknesses for the gate and tunnel oxides. As the gate oxide thicknesses have been scaled down, they have reached and become even thinner than the tunnel oxide on lightly or undoped silicon.
Traditionally, the manufacturing process for implementing all four types of cells requires a large number of sequential process steps. The reduction in processing steps, and specifically masking steps, is an objective of nearly every process engineer. Each savings of a masking step may result in a significant saving in the cost of manufacture of the particular device.
Generally, four separate masking steps were required to complete the formation of the tunnel regions and overlying oxides for the four different types of devices.
U.S. patent application Ser. No. 08/699,401, entitled OXIDE FORMATION PROCESS FOR MANUFACTURING PROGRAMMABLE LOGIC DEVICE, discloses a scheme for reducing the number of masks required for forming the transistors from four to three. The benefit of this is the savings of a mask step, but the process contemplates that the thickness of the tunnel region mask and either the n-channel or p-channel high voltage transistor will be the same. In addition, U.S. patent applications entitled AN INTEGRATED CIRCUIT HAVING, AND PROCESS PROVIDING, DIFFERENT OXIDE LAYER THICKNESSES ON A SUBSTRATE and MULTIPLE GATE OXIDE THICKNESSES ON A WAFER SUBSTRATE referenced above disclose methods for forming different oxide thicknesses on a semiconductor substrate. In particular, these applications disclose a method for forming a write transistor with a first oxide thickness, a read transistor with a second oxide thickness and a tunnel oxide with a third oxide thickness.
Typically, in forming a the tunnel and gate oxide regions, a separate mask, etch and growth step is required for the tunnel oxide region. Each of these steps adds to the ultimate cost of the device.
In formation of oxides in general, it is generally known that the provision of nitrogen into the silicon substrate prior to forming the oxide by thermal formation in an oxygen atmosphere results in a different growth of oxide between the region overlying the nitrogen deposited region and the region of the substrate where no nitrogen has been deposited. However, where the oxide thicknesses are relatively small, care must be taken not to damage the surface of the silicon substrate, as growth of the oxide will be impaired.
Conventionally, nitrogen may be implanted at a relatively low energy into the substrate. However, implantation can cause a substrate damage which is difficult to anneal out using conventional annealing methods, and compromise the quality of the oxide for small thicknesses.

Method and apparatus incorporating nitrogen selectively for differential oxide growth


A predictive driver intention to stop (DITS) system for a vehicle having an engine includes one or more sensors configured to measure a set of operating parameters of the vehicle including at least (i) vehicle speed and (ii) vehicle deceleration rate. A controller is configured to identify no-stop braking events and complete stop braking events, and reference a generated baseline probability table indicating a probability of a driver braking to bring the vehicle to a stop, based on at least the vehicle speed and vehicle deceleration rate measured during at least one of the identified no-stop braking events and complete stop braking events. The controller is further configured to predict a DITS event based on the generated baseline probability table, and control operation of the engine based on the predicted DITS event to facilitate reducing vehicle fuel consumption and/or tailpipe emissions.

Some vehicles include systems with internal combustion engine strategies such as fuel shut-off (FSO), engine start-stop (ESS), and cylinder deactivation to save fuel and reduce tailpipe emissions. Drivability, fuel economy, emissions, and technical practicalities are the primary considerations for these systems. However, it can be difficult to determine when such engine control strategies should be employed. Moreover, customer satisfaction can potentially be reduced if the engine control strategy is executed when the driver does not intend or desire the operation. Accordingly, while such vehicle systems work well for their intended purpose, there remains a need for improvement in the relevant art.

Prediction of driver's intention to stop for engine start/stop


A system for monitoring the location of persons or objects using a wireless device, comprising at least one tag unit capable of transmitting data signals of a first type identifying said at least one tag; a wireless device capable of receiving data signals of a second type; and a converter unit, that receives the data signals of the first type from said at least one tag unit, converts the data signals of the first type to data signals of a second type, and transmits said data signals of a second type to the wireless device.

There is a need to monitor the location of objects and people, especially children. The most common scenario occurs where a parent or a supervising person is located with his children or supervised persons in a crowded site such as a mall, amusement park, airport, museum, or beach. In such event, the parent/supervisor faces a significant difficulty in keeping the children/supervised persons in his vicinity while allowing other children or persons in his supervision to wander in the proximate vicinity. For example, a supervising adult may find it difficult to supervise each of three children wishing to view different pictures in a museum or wishing to enter different stores in a mall. One of the common scenarios is a parent being occupied and concentrated in a mobile phone call, loosing contact with one or more children during the phone call.
There are existing solutions to the need to keep track of children or other objects location, such as the commercially known "ionkids" system. "ionKids" allows parents to monitor the locations of up to four kids via splash- and tamper-resistant wrist tags that transmit a radio signal to a base unit by which their proximity is determined. See www.ionkids.com.
However, existing solutions are limited in practicality due to the fact that they make use of a dedicated control and monitoring device that is both expensive and relatively heavy and large in size.
There is therefore a need for a monitoring system that communicates with common mobile devices and particularly with personal digital assistant devices (PDA) typically mobile or wireless phones and preferably responsive to a child or object getting farther during a phone call session.
There is a need for a monitoring system that exploits the capabilities of existing wireless devices such as mobile phone and other PDA or handheld devices.

System and method for monitoring objects and people using a mobile device


A multi level bakery tray comprising a generally rectangular bottom, and generally rectangular opposed side and end walls extending upwardly from the bottom. Two pairs of feet are disposed along a lower edge of the end walls while a pair of deep pockets and a pair of shallow pockets are disposed along an upper edge of the end walls. When multiple trays are stacked in a like orientation the shallow pockets receive the feet in a high position. When trays are oriented 180.degree. the deep pockets receive the feet in a low position. Blind stacking and unstacking is accomplished by cooperation between sloped surfaces of the feet and pockets, between the feet and the upper edges of the end walls, and between a drag rail formed beneath the end walls and a shoulder formed on the side walls. Cross nesting is also accomplished by rotating a tray 90.degree. and placing it on a lower tray in a third position lower than the high and low positions.

Multi level bakery trays which provide the capability of stacking trays at one position in a like orientation, and in a second position when in a 180.degree. orientation, are known in the industry. Stacking trays at multiple heights allows the proper clearance for different products such as bread loaves and buns stored in the trays. It is advantageous for such trays to have the capability of cross nesting when rotated in a 90.degree. orientation to reduce the space required when storing and transporting the trays. Additionally, it is desirable for the trays to be blind stacked and unstacked. Blind stacking refers to the ability to stack a tray on top of a stack of trays, typically when the top of the stack is overhead. The tray to be stacked is generally lifted overhead and the rear of the tray is placed on the front of the stack. The tray is then pushed back along the stack until it is properly positioned on the topmost tray in the stack. Blind unstacking refers to removing the topmost tray from a stack of trays overhead. The front of the desired tray is grasped, lifted slightly, and pulled forward until it is clear of the stack at which point the tray is brought down off of the stack.
Such a multi level bakery tray is disclosed in U.S. Pat. No. 4,960,207 to Tabler et al. The Tabler patent discloses a multi level bakery tray with a pattern of feet along the lower edge of one end wall and corresponding recesses on the upper edge of the same end wall. A different configuration of feet and corresponding recesses are formed on the other end wall. When the trays of Tabler are stacked in a like orientation, the recesses receive the feet such that the trays are stacked in a first, low position. When the trays are in a 180.degree. orientation, the feet and recesses are misaligned and the feet are supported within a channel, providing a second, high position. In this high position, the feet are not positively engaged within recesses as they are in the low position. Blind unstacking the trays of Tabler from the low position can be problematic. As the feet are relatively long and the recesses are relatively deep, it can be difficult to free the feet at the rear of the tray from their corresponding recesses when the front of a tray is lifted in an attempt to remove the tray from the stack. One embodiment of Tabler dealing with the issue of blind unstacking discloses projections extending outwardly from the end walls which engage corresponding slots when the trays are stacked. To blind unstack a tray it is grasped in front and lifted to a point where the projections clear the slots, and then pulled forward slightly. To allow this forward movement, the recesses must be sized larger than the feet that are received therein. The tray is then tilted back to a level position using the projection as a fulcrum about which the tray is rotated. Blind unstacking in this fashion is complex since the handler must raise the tray a sufficient distance for the projections to clear the slots but without any visual or tactile indication as to when this distance has been achieved. The construction of the tray is complex as well in order to facilitate blind unstacking in this manner.
It is an object of the present invention to provide a multi level bakery tray which reduces or wholly overcomes some or all of the aforesaid difficulties inherent in prior known devices. Particular objects and advantages of the invention will be apparent to those skilled in the art, that is, those who are knowledgeable and experienced in this field of technology, in view of the following disclosure of the invention and detailed description of certain preferred embodiments.


A method and apparatus is provided for controlling the speed of a slave drive roller in a coating machine. Speed of the slave drive roller at a second coater is regulated by an adaptive gain allowing greater tolerances when not at run speed. That is, in addition to normal speed correction, the system accommodates greater web speed fluctuation during threadup, acceleration, and deceleration. This accommodation may be based on the sensed position of the float roller or, alternatively, on the sensed rate of acceleration/deceleration of the master drive roller.

This invention relates to a method and apparatus for controlling the speed of a slave drive roller conveying a web by adjusting the range of allowable speed variability of the slave drive roller to different operating conditions. More particularly, the invention relates to such a method and apparatus used for conveying a substrate for photographic film or paper and coating it with photosensitive coatings.
In conveying a web through a coating machine, web speed influences how thick a coating will be applied at a coating station. That is, given a constant flow rate of coating fluid at a coating station, the higher the web speed the thinner the coating on the web. Likewise, the lower the web speed, the thicker the coating. Thus, coating thickness is an inverse function of web speed. If coating thickness uniformity is critical, then web speed uniformity at the coating station is also critical.
In conveying and coating a web for photographic applications, coating thickness is indeed critical. Hence, web speed must be closely controlled.
In a typical method of web conveyance, one drive roller is selected as the master drive roller; the speed of any other drive roller is slaved or controlled with reference to the master drive signal. The controlled speed of the slave drive roller nevertheless varies, within a certain tolerance, from the actual speed of the master drive roller to maintain operating tension in that portion of the machine. Thus, the rotational speed of the slave drive roller is increased or decreased depending on how much web material is stored in a float roller controlling the slave drive roller. Such typical control methods and equipment are described in, for example, W. Boice, "Controlling Speed in Multidrive Systems", in Machine Design Jan. 22, 1970; D. Satas, "Web Handling" in Web Processing and Converting Technology and Equipment, 1984; H. Weiss, "Tension Transducers" pages 78-97 in Control Systems for Web-Fed Machines, 1983; and Machine Drive Systems pages 136-143.
In considering certain requirements for a proposed new product, it was appreciated that conventional methods of controlling slave drive roller speed had disadvantages. For example, in applications requiring narrow tolerances between the speed of the master roller and speed of the slave roller, this narrow tolerance is disadvantageous during periods of acceleration or deceleration, for example, during startup or shutdown of the web conveyance operations. This is because excessive time is consumed in acceleration and deceleration of the web when the slave roller is controlled with a small tolerance.
Accordingly, it is one object of the invention to provide a method and apparatus for controlling the speed of the slave drive roller within a small tolerance at times when coating operations are being performed, without sacrificing excessive time during times of acceleration up to running speed and deceleration from running speed. In other words, it is an object of the present invention to provide high gain during times when the coating machine is unstable, to avoid slack or tight web conditions; and to provide low gain during times of normal steady run conditions, to minimize speed deviations at any critical secondary follower or slave drive, such as a second coater in a coating machine; and to change automatically. A higher gain indicates that the control system adjusts the speed of the slave drive roller more quickly and/or by a greater amount in response to changes in control inputs.
It is further an object of the invention to provide a method and apparatus wherein gain is a function of acceleration/deceleration rate such that low gain is used at steady run speed, and higher gain is used during acceleration/deceleration (for example, where gain is proportional to acceleration/deceleration rate).
It is further an object of the invention to provide a method and apparatus wherein gain is a function of float roller position (that is, deviation from a predetermined normal position) such that low gain is used at or near the normal position, and higher gain is used when the float roller is displaced from the normal position (for example, gain may be proportional to deviation, or gain may be proportional to the square (or some other power) of deviation).
Additional objects and advantages of the invention will be set forth in part in the description which follows, and in part will be evident from the description, or may be learned by practice of the invention. The objects and advantages of the invention may be obtained by means of the instrumentalities and combinations particularly pointed out in the appended claims.

Method for variably controlling the speed of a slave drive roller in a web coating machine


An explosive composition comprising a high density hydrocarbon compound selected from the group consisting of xylitol, sucrose, mannitol, and mixtures thereof and at least one energetic material. The high density hydrocarbon compound and the at least one energetic material form a substantially homogeneous explosive composition. A method of producing an explosive composition that is insensitive to impact is also disclosed.

Conventional energetic materials, which are used as fill material in ordinances, are typically sensitive to shock or impact. As such, an ordnance is sometimes unintentionally detonated by impact with bullets, fragments, or shaped charge jets ("SCJ"), causing injury or death to personnel or damage to life, equipment, facilities, or infrastructure. Moreover, unintentional detonation often occurs during storage, handling, or transportation of the ordnance. To avoid these problems, insensitive munitions ("IM") are being researched and developed. An IM should minimize the probability of being inadvertently initiated and should provide reduced severity of collateral damage to facilities and personnel when subjected to unintentional stimuli.
A trinitrotoluene ("TNT")-based explosive is commonly used as a high explosive fill in bombs, artillery rounds, and various munitions. Energetic solids, such as cyclo-1,3,5-trimethylene-2,4,6-trinitramine ("RDX," also known as hexogen or cyclonite), cyclotetramethylene tetranitramine ("HMX," also known as octogen), or aluminum, have been used with TNT to modify its performance properties. Composition B ("Comp B") is a TNT-based explosive and is one of the most commonly used explosives in the world because it has good performance characteristics and is relatively inexpensive to produce. Comp B includes TNT (39.5% by weight ("wt %")), RDX (59.5 wt %), and wax (1.0 wt %). However, Comp B often reacts violently when unintentionally exposed to stimuli. High performance replacements for Comp B have been developed that have reduced hazard sensitivity and are produced using low cost and commercially available ingredients, preferably non-toxic or non-carcinogenic. One such replacement is Picatinny Arsenal Explosive 21 ("PAX-21"), which includes 34.0% by weight ("wt %") dinitroanisole ("DNAN"), 30 wt % ammonium perchlorate ("AP"), 35.75 wt % RDX, and 0.25 wt % n-methyl-4-nitroaniline ("MNA"). Other replacements are PAX-25, which includes 59.75 wt % DNAN, 0.25 wt % MNA, 20 wt % AP, and 20.0 wt % RDX, and PAX-28 which includes 39.75 wt % DNAN, 0.25 wt % MNA, 20 wt % AP, 20 wt % RDX, and 20 wt % aluminum.
"Phenomenal Aspects of Blast Output from the Heterogenous Detonation of Energetic Compositions" Tulis et al., p. 40-1 through 40-13, (1995), discloses a heterogeneous energetic composition that includes a fuel, an oxidizer, and lactose or starch. For instance, the energetic composition includes RDX, aluminum, ammonium perchlorate, and lactose.
"Shock-Dispersed-Fuel Charges-Combustion in Chambers and Tunnels," Neuwald et al., 34th International ICT-Conference, Karlsruhe (2003) discloses an explosive composition that includes pentaerythritol tetranitrate ("PETN"), TNT, aluminum, and a hydrocarbon powder, such as polyethylene, sucrose, carbon fibers, or mixtures thereof. The hydrocarbon powder is packed around a core of the PETN.
U.S. Pat. No. 4,231,822 to Roth discloses an organic explosive material desensitized with an organic reductant, such as glucose. U.S. Pat. No. 4,248,644 to Healy discloses an emulsion of a melt explosive composition that includes a fuel, ammonium nitrate, an emulsifying agent, and a compound that forms a melt with the ammonium nitrate upon heating. The latter compound is a carbohydrate, such as a sugar, starch, or dextrin. The ammonium nitrate provides a discontinuous phase and the fuel provides a continuous phase. U.S. Pat. No. 4,507,161 to Sujansky et al. discloses a nitrate ester explosive composition that includes a solid additive. The solid additive is an oxidizing salt, a filler, or a carbonaceous material, such as a sugar. The explosive composition is a melt-in-oil type explosive composition and includes a continuous phase and a discontinuous phase. U.S. Pat. No. 4,722,757 to Cooper et al. discloses a melt-in-fuel explosive composition. A continuous phase of the explosive composition includes a water immiscible fuel and an emulsifier and a discontinuous phase of the explosive composition includes an oxidizer salt. The continuous phase and the discontinuous phase are substantially immiscible.
It would be desirable to prevent unintentional detonation of an ordnance by providing an explosive composition that is relatively insensitive to external stimuli, such as impact, without substantially affecting the energetic performance of the explosive composition.


The method of the present invention generally involves a typical casino or cardroom game modified to include a progressive jackpot component. During the play of a Twenty-One game, for example, in addition to this normal wager, a player will have the option of making an additional wager that becomes part of, and makes the player eligible to win, the progressive jackpot. If the player""s Twenty-One hand comprises a particular, predetermined arrangement of cards, the player will win all, or part of, the amount showing on the progressive jackpot. This progressive jackpot feature is also adaptable to any other casino or cardroom game such as Draw Poker, Stud Poker, Lo-Ball Poker or Caribbean Stud(trademark) Poker. The apparatus used to practice the present invention comprises a gaming table, such as those used for Twenty-One or poker, modified with the addition of a coin acceptor that is electronically connected to a progressive jackpot meter. When a player drops a coin into the coin acceptor, a light is activated at the player""s location indicating that he is participating in the progressive jackpot component of the game during that hand. At the same time, a signal from the coin acceptor is sent to the progressive meter to increment the amount shown on the progressive meter. At the conclusion of the play of each hand, the coin acceptor is reset for the next hand. When a player wins all or part of the progressive jackpot, the amount showing on the progressive jackpot meter is reduced by the amount won by the player. Any number of gaming tables can be connected to a single progressive jackpot meter.

This invention relates generally to casino or cardroom gaming involving a progressive jackpot. More particularly, it relates to a progressive jackpot that is available to be played by participants in various casino or cardroom table games.
It has become common practice in gaming establishments to provide a progressive jackpot component in connection with electronic or mechanical gaming devices, such as slot machines, video poker machines or keno machines. Typically a plurality or xe2x80x9cbankxe2x80x9d of machines are electronically interconnected to a common progressive jackpot meter. As gaming tokens are fed into each machine, the amount shown on the jackpot meter progresses incrementally until some lucky player lines up the winning combination, such as three or four 7""s on the same row of a slot machine. In video poker, a Royal Flush normally wins the jackpot, although in some variations, a player must achieve a Royal Flush in an exact order, such as A-K-Q-J-10 from left to right, or in a particular suit, such as Spades. In video keno, a player typically must match 15 out of 15 numbers to win the progressive jackpot.
It is an object of the present invention to provide a progressive jackpot component to typical casino or cardroom table games such as poker or Twenty-One.
It is a feature of the present invention to have each participant in the progressive jackpot component win all or part of the amount shown on the progressive jackpot meter if the participant achieves a particular predetermined playing hand.
It is an advantage of the present invention that when the progressive jackpot component is added to typical table games such as poker or Twenty-One that the players will enjoy these games more and that the amount of play will increase.
It is a further object of the present invention to provide apparatus useful in providing the progressive jackpot component to casino or cardroom table games such as poker or Twenty-One.
It is a further feature of the present invention to have a progressive jackpot meter electronically interconnected to one or more gaming tables to allow each player at his playing location to participate in the progressive jackpot component by wagering a gaming token which automatically activates an indicator showing the player""s participation and also automatically increments the progressive jackpot meter.
It is an advantage of the present invention that the apparatus makes it easy for each player to participate in the progressive jackpot component of the game.
The method of the present invention generally involves a typical casino or cardroom game modified to include a progressive jackpot component. During the play of a Twenty-One game, for example, in addition to this normal wager, a player will have the option of making an additional wager that becomes part of, and makes the player eligible to win, the progressive jackpot. If the player""s Twenty-One hand comprises a particular, predetermined arrangement of cards, the player will win all, or part of, the amount showing on the progressive jackpot. This progressive jackpot feature is also adaptable to any other casino or cardroom game such as Draw Poker, Stud Poker, Lo-Ball Poker or Caribbean Stud(trademark) Poker.
The apparatus used to practice the present invention comprises a gaming table, such as those used for Twenty-One or poker, modified with the addition of a coin acceptor that is electronically connected to a progressive jackpot meter. When a player drops a coin into the coin acceptor, a light is activated at the player""s location indicating that he is participating in the progressive jackpot component of the game during that hand. AT the same time, a signal from the coin acceptor is sent to the progressive meter to increment the amount shown on the progressive meter. At the conclusion of the play of each hand, the coin acceptor is reset for the next hand. When a player wins all or part of the progressive jackpot, the amount showing on the progressive jackpot meter is reduced by the amount won by the player. Any number of gaming tables can be connected to a single progressive jackpot meter.


A method for forming shallow trench isolation in a semiconductor device. The method includes forming a trench in a predetermined depth on a semiconductor substrate, filling the trench with a first filing oxide, injecting an impurity into a portion of the first filling oxide inside the trench, removing the portion of the first filling oxide by wet etching, and filling the trench with a second filling oxide.

1. Field of the Invention
The present invention relates generally to a semiconductor device manufacturing technology, and particularly to a method for forming shallow trench isolation in a semiconductor device.
2. Description of the Related Art
Manufacturing processes for making a highly integrated semiconductor device requires forming a variety of components, such as a transistor, capacitor, metal wiring, etc., in very restricted regions, and forming highly insulated regions to prevent parasitic current leakage between the components.
Conventionally, a local oxidation of silicon (LOCOS) field oxide, formed by oxidizing a silicon substrate, has been widely used for electrically isolating the components of the semiconductor device. However, according to the increase of the integration density, a LOCOS field oxide has become disadvantageous to the formation of integrated circuits, because it generally includes a "bird's beak," which may invade an active device region. Accordingly, a lot of alternative isolation technologies, more advantageous to the higher integration of devices, have been developed. As a typical example of such alternative isolation technologies, shallow trench isolation (STI) having a superior insulating performance and a relatively small formation area has been widely used for isolating transistors in metal oxide semiconductor field effect transistor (MOSFET) and bipolar junction transistor devices, since approximately the 0.5 micrometer (μm) technology node.
Hereinafter, a conventional STI process will be described with reference to FIG. 1.
First, a pad oxide 22 and a pad nitride 24 are formed on a silicon substrate 10 in successive order, then a moat pattern is formed thereon by photolithography and etching processes. The pad nitride 24 and the pad oxide 22 are partially etched in successive order, using the moat pattern as an etching mask. Subsequently, exposed portions of the substrate 10 are etched in a predetermined depth so that trenches 20 are formed around an active device area.
After the trench etch, a liner oxide (not shown) can be formed in each trench 20 to protect a trench sidewall, i.e., an inside surface of the silicon substrate 10 exposed by trench 20. Then, trenches 20 are filled with a filling oxide 20a. Here, the filling oxide 20a can be deposited by chemical vapor deposition (CVD) using O3-TEOS (Tetra Ethyl Ortho Silicate) oxidation film or high-density plasma chemical vapor deposition (HDP-CVD). Next, the substrate 10 is planarized via chemical and mechanical polishing (CMP) so that the filling oxide covering the active device area is selectively removed for device processing to continue. Finally, the pad nitride 24 and pad oxide 22 are removed by wet etching, thus resulting in a highly planar substrate with isolated device regions.
Referring to FIG. 1, even though O3-TEOS CVD or HDP-CVD having a relatively superior gap-filling ability is used, the filling oxide 20a inside trenches 20 can include voids 21a or seams 21b. The voids 21a and seams 21b can produce or result in problems such as a gate line bridge, etc., because they can emerge during CMP and wet etching processes. As a result, the voids 21a and seams 21b may deteriorate the insulating performance of the STI. In order to solve such problems, it can be considered to decrease a slope of the trench 20 or remove the pad nitride 24 in a predetermined width before formation of the filling oxide.
However, in case the width of the trench 20 is considerably narrow, especially in the sub-90 nanometer (nm) technologies, there is the limit of decreasing the slope of the trench 20. Excessive decreasing of the slope of trench 20 may result in defects (e.g., dislocations) in the silicon substrate 10, thus deteriorating the yield of semiconductor devices. In addition, the widening of the width of the trench entrance by removing a portion of the pad nitride 24 may result in problems where the active device region is decreased and a remaining portion of the pad nitride 24 peels off during the wet etching.

Method for forming shallow trench isolation utilizing two filling oxide layers


A plurality of data streams, which are coded by a convolution code and where coding rates and modulation systems are set respectively, and multiplexed in time division so that multiplex data are composed. A signal-to-noise ratio monitor measures the strength of the noise included in the multiplex data. A comparator outputs a post signal when a comparison indicates that the measured noise strength is equal to greater than a preset value. A multiplex control signal generator inputs an initialization signal into a Viterbi decoder at a timing at which decoding of individual data streams is started based on the received post signal. The Viterbi decoder initializes the calculated path metric upon receipt of the initialization signal.

Recently, as integrated circuits and coding techniques, which can process digital data at a high speed, are becoming available. Therefore, analog-system techniques are now replaced by such digital techniques. Particularly, growth television broadcasting service, satellite broadcasting service and the like are being converted to digital broadcasting.
The digital satellite broadcasting adopts a radio communication system in which a carrier signal is transmitted via an artificial satellite and is received directly by a receiver installed in a house or the like. However, since this digital satellite broadcasting utilizes the atmosphere as a transmission space, it is easily influenced by weather and the other factors. When the weather is bad the reception becomes worse. As a result, in a transmitter and a receiver which are terminal sections of the digital satellite broadcasting system, the transmission/receiving process with high stability and high reliability is required in comparison with the conventional cable and ground wave television service.
In radio communication of a digital-modulated signal like the digital satellite broadcasting, digital data to be digital-modulated are composed of bit strings (data stream) which undergo a so-called coding process in which redundancy is added to actual data so that the stability and reliability of the transmission/receiving process is heightened.
As the redundancy of the data stream is higher, error correction ability of the data stream is improved further in the decoding process in the receiver. In other words, even if the data stream with high redundancy include a lot of error bits upon receiving, the error bits can be corrected and the data stream can be reproduced correctly upon transmission. Meanwhile, such data stream with high redundancy has a disadvantage that a number of structure bits increases and transmission efficiency is lowered.
When image or sound information is received as data stream including a little error, for example, the information as a whole can be accepted. Therefore, the redundant may be comparatively lowered and the transmission efficiency heightened so that a lot of information can be transmitted. On the other hand, for a data stream which represents computer programs where even one bit error is not allowed, generally the redundancy is set to comparatively higher value because upon receiving the information is required to be securely restored.
FIG. 1 is a block diagram showing a schematic structure of a conventional transmitter and particularly shows a portion of the transmitter used in digital satellite broadcasting. This transmitter is composed of a coder 100 and a modulator 150. The coder 100 multiplexes and codes data from a plurality of information sources 1, 2, . . . , n. The modulator 150 modulates the coded signals according to a predetermined modulation system. The information sources here are digital data strings (transport stream) which are compressed by MPEG2 (Motion Picture Expert Group 2) as one of the motion picture compressing systems.
Further, the coder 100 is composed of a multiplexer 110, a convolution coder 120, a punctured module 130 and a multiplex control signal generator 140. Although not shown in the figure, the multiplexer 110 is composed of, for example, a Reed-Solomon coding circuit, a frame structure circuit, an energy dispersion circuit and an interleaver and multiplexes and codes the input information sources. Operation of the transmitter is explained below.
The multiplex control signal generator 140 generates a multiplex control signal which represents multiplexed information of the information sources. The multiplexed information is the information which represents positions (timing) of information source data multiplexed on one carrier and transmission systems (redundancy, modulation systems, etc).
The information sources are input into the Reed-Solomon coding circuit of the multiplexer 110. The Reed-Solomon coding circuit adds a Reed-Solomon code which, can correct an error of a byte unit in the receiver based on the multiplex information represented by the multiplex control signal output from the multiplex control signal generator 140, to the bit strings of the information sources so as to output the coded strings of the respective information sources.
The code strings output from the Reed-Solomon coding circuit are input into the frame structure circuit. The frame structure circuit multiplexes the code strings based on the multiplex information represented by the multiplex control signal output from the multiplex control signal generator 140 so as to structure a frame to be a unit of the multiplexed data.
A signal output in the frame unit from the frame structure circuit is input into the energy dispersion circuit. The energy dispersion circuit adds (scramble) a pseudo random signal (energy dispersion signal) to the digital data. As a result, the digital data composing the input frames, namely, bit strings are not transmitted as enumeration of bit "0" or bit "1" for long period.
The aim is to prevent misconception of reception such as error detection or non-detection of a digital signal on the receiving side due to reception of the long-period continuous same bits. The pseudo random signal should be removed on the receiving side. For this reason, also in the energy dispersion circuit, a position of the digital data, where information representing a generating condition of the pseudo random signal such as a random initial value and the like is shown, is determined by referring to the multiplex information.
The signal scrambled in the energy dispersion circuit is input into the interleaver. The interleaver rearranges the digital data represented by the input signal in byte unit so as to improve resistance to a burst error (long-period continuous error) appearing intensively in time.
As a result, even if burst errors occur in the rearranged digital signals, the errors which occur intensively can be dispersed because the process for restoring the rearrangement of the digital signals (the process by the interleaver) is executed on the receiving side. As a result, improvement of the error correction and a correct recognition rate of the transmitted information can be heightened. The information about the rearrangement can be obtained also from the multiplex information.
The signals arranged by the interleaver are the outputs of the multiplexer 110 and are input into the convolution coder 120. The convolution coder 120 executes the convolution coding process with respect to the input signals. As a result, random errors such as errors of irregular bit units such as a thermal noise which are generated in a transmission line or the receiver can be corrected.
FIG. 2 is a block diagram showing a schematic structure of the convolution coder 120. The convolution coder 120 is composed of a shift register comprising D latches 121 and 122, two EXOR circuits 124 and 125, and a parallel-serial converter 128. The convolution coder 120 executes the coding in such a manner that one-bit input data are output as 2-bit data. When the coding rate is defined as (Original information content)/(coded information content), the coding rate in the convolution coder 120 is 1/2.
In the convolution coder 120 shown in FIG. 2, two-bit serial data are held by the D latches 121 and 122 in the order of input. Three-bit serial data are converted into parallel data by the two-bit data and one-bit data further input. Newly input data and the data held in the D latches 121 and 122 are input into the EXOR circuit 124 so as to undergo exclusive OR. Moreover, the newly input data and the data held in the D latch 122 are input into the EXOR circuit 125 so as to undergo exclusive OR.
The calculated results of the two exclusive OR are again converted into serial data in the parallel-serial converter 128. As a result, three-bit input serial data are output as six-bit serial data, for example, and this output result becomes a convolution code.
In order to improve the transmission efficiency, four-bit data, which are obtained by thinning out two bits from six-bit data output from the convolution coder 120, are used as output data. In this method, the coding rate is 3/4, and in comparison with the coding rate 1/2 in the case of the convolution coder 120, redundancy can be made lower and the transmission efficiency can be heightened.
Furthermore, this method simultaneously reduces the error correction ability. As a result, the redundancy can be controlled by changing a degree of the thinning-out of data. This data thinning-out process is called as puncturing. The punctured module 130 shown in FIG. 1 executes such puncturing.
FIG. 3 is an explanatory diagram showing an example of the coding rate obtained by puncturing. FIG. 3 shows puncturing of the coding rates 2/3, 3/4, 5/6 and 7/8 which is generated by thinning out a convolution code of the coding rate 1/2. Explanation is provided below for the puncturing of the coding rate 3/4.
It is assumed that data "x0, y0, x1, y1, x2, y2" are obtained from data constituted by "d0, d1, d2" by the convolution coder 120. In such a case, the punctured module 130 deletes a bit in a position corresponding to "0" with reference to a previously prepared bit deletion map "1, 1, 0, 1, 1, 0". Undeleted bit after the deleted one is shifted to the position of the deleted bit. In other wards, this bit deletion map shows that two bits are thinned out from six bits. As a result, only four-bit data of "x0, y0, y1, x2" are output.
Thus, the punctured module 130 enables changes of various kinds in the coding rates as shown in FIG. 3. When a various kinds of bit deletion maps are prepared, the transmission efficiency can be selected according to a signal transmission line or a signal characteristic.
The code strings output from the punctured module 130 in such a manner become a data stream which is obtained by coding and multiplexing data of a plurality of information sources with the coding rates determined in the respective information source. The data stream is output from the coder 100. The data stream is input into the modulator 150 shown in FIG. 1 and is digital-modulated according to a modulation system which is suitable to the carrier so as to be output as a transmission signal.
As the digital modulation executed in the modulator 150, modulations like amplitude modulation (ASK), frequency modulation (FSK), phase modulation (PSK) may be considered. An explanation is provided below for the digital phase modulation.
The digital phase modulation is a system where the bit structures composed of "0" or "1" of the digital data are made to have correspondence to phases, and the phases are changed for the carrier so that information is transmitted. The digital phase modulation system further includes BPSK, QPSK (or 4PSK), 8PSK and the like according to a number of phases to be used.
As for the transmission signal which is digital-phase modulated, one phase state (transmission symbol) of the carrier is checked in the receiver so that one-bit information can be transmitted in BPSK and two-bit information in QPSK and three-bit information in 8PSK. This shows that the transmission efficiency varies with the respective phase modulation systems. However, as the transmission efficiency becomes higher, adjacent transmission symbols are closer to each other so that clear distinction between the phases becomes difficult. As a result, error can be easily generated in the information. For this reason, the phase modulation using these three systems is selected according to a characteristic of information to be transmitted.
In other words, as for the data of the information sources multiplexed as the data stream, in addition to the selection of the coding rates by means of the coder 100, the modulation system by means of the modulator 150 can be selected.
FIG. 4 is an explanatory diagram showing a structure of the data stream output from the coder 100. The data stream shown in FIG. 4 is generated by the frame structure circuit. A data stream 1, a data stream 2, and a data stream 3 which represent three information source data are multiplexed and arranged in a frame identified by a synchronous code. For example, the data stream 1, the data stream 2, and the data stream 3 can be allocated in this order to a QPSK modulation stream of the coding rate 3/4, a QPSK modulation stream of the coding rate 1/2 and a BPSK modulation stream of the coding rate 1/2.
In addition, some frames can be processed as one collective information (hereinafter, referred to as "super frame"). In this case, in the super frame composed of eight frames, for example, the synchronous code is arranged at the head of each frame, and a parity signal corresponding to the Reed-Solomon code is arranged in the last two frames so that the error correction ability is heightened.
An explanation is provided below for a conventional receiver which receives a transmission signal transmitted from the transmitter and demodulates and decodes the signal. FIG. 5 is a block diagram showing a schematic structure of such a conventional receiver. FIG. 5 shows one example of the receiver of the digital satellite broadcasting which is suitable to the transmitter in FIG. 1. This receiver is composed of a demodulator 190 further having a digital phase modulation circuit and a decoder 200.
The decoder 200 is composed of a depuncture module 210, a Viterbi decoder 220, a synchronizer 230, a data stream decoder 240, a multiplex control signal generator 250, and a multiplex information storage section 260. The data stream decoder 240 is composed of, for example, a deinterleaver, an energy dispersion signal removal circuit and a Reed-Solomon code error correcting circuit correspondingly to the similar structure in the multiplexer 110 shown in FIG. 1. The data stream decoder 240 decodes the multiplexed data stream. Operation of this receiver is explained below.
Similarly to the multiplex control signal generator 140 shown in FIG. 1, a multiplex control signal is generated in the multiplex control signal generator 250 of the decoder 200. Multiplex information represented by the multiplex control signal is previously stored in the multiplex information storage section 260. The multiplex control signal generator 250 generates a multiplex control signal based on the multiplex information.
The demodulator 190 demodulates the received signal in accordance with acquisition timing of the information source data represented by the multiplex control signal and the modulation system. Precisely, the demodulator 190 extracts a code string in the state before the received signal is modulated in the modulator 150 of the transmitter, and digital phase demodulation is executed in this example.
The signal demodulated by the demodulator 190 is input into the depuncture module 210 of the decoder 200. The depuncture module 210 inserts the bit which is deleted in the punctured module 130 into the input signal based on the coding rate represented by the multiplex control signal (depuncturing).
The code string which is depunctured by the depuncture module 210 is input into the Viterbi decoder 220 so that the convolutional code coded in the convolution coder 120 of the transmitter is decoded. That is, the Viterbi decoder 220 calculates a Hamming distance between the code represented by the input code string and a code on a trellis chart as path metric and leaves path metric of short Hamming distance as survival path. Further, the Viterbi decoder 220 decodes a code string corresponding to a path metric of the shortest Hamming distance as a maximum code.
The code string decoded by the Viterbi decoder 220 is input into the synchronizer 230. The synchronizer 230 detects a synchronous code in the frame shown in FIG. 4 from the data stream and generates a control signal for acquiring the decoding timing of the multiplexed code strings.
FIG. 6 is a block diagram showing a schematic structure of the synchronizer 230. As shown in FIG. 6, the received code string is input into a sync word detection circuit 231 and a buffer 235. The sync word detection circuit 231 detects the synchronous code from the input code string and generates a detection signal. The synchronous acquisition control circuit 232 outputs a signal representing synchronous timing according to the received the detection signal and a predetermined synchronous clock.
A control signal generation circuit 233 inputs the signal output from the synchronous acquisition control circuit 232 so as to output a control signal representing that current time is positioned at the head of the frame. Meanwhile, the code string input into the buffer 235 is delayed until output of the control signal is completed so as to be output as data stream at predetermined timing. The control signal output from the synchronizer 230 is input into the multiplex control signal generator 250 shown in FIG. 5 so as to be utilized for obtaining output timing of the multiplex control signal.
The data stream output from the synchronizer 230 is input into the data stream decoder 240. The data stream then undergoes the decoding processes corresponding to the coding processes in the interleaver, the energy dispersion circuit and the Reed-Solomon coding circuit composing the multiplexer 110 shown in FIG. 1.
The decoded data bit string output from the data stream decoder 240 becomes an output of the decoder 200 and is input into a not shown MPEG reproduction apparatus or the like, which is connected in the later stage. This MPEG reproduction apparatus extracts corresponding data from the data bit string by selecting an information source, and displays the extracted data as a motion picture.
However, as mentioned above, the transmission-reception system composed of the convolution coder 120 and the Viterbi decoder 220, coding and decoding are executed by the calculation methods based on superposing of past bit strings continuously transmitted. For this reason, a data stream having coding rate of high error correction ability is influenced by the case that error cannot be corrected in a data stream having coding rate of low error correction ability. As a result, the whole error correction ability of the multiplexed data stream is lowered.
For example, consider a case in which two or more kinds of coding rates are used between the data streams composing the multiplexed data stream, and comparatively big noise is mixed on the transmission line. In this case, although error can be sufficiently corrected in the data stream having coding rate of high error correction ability in the multiplexed data streams, error is still included in a decoded result of the data stream having coding rate of low error correction ability. In this state, the Viterbi decoder decodes the data stream having coding rate of high error correction ability which is next input continuously according to calculation of path metric using the data stream including the error. For this reason, the data stream having coding rate of high error correction ability cannot be decoded correctly.
In order to solve such a problem, Japanese Patent Application Laid-Open No. 9-247003 discloses "information receiver". This information receiver inserts a known "end bit" into a plurality of multiplexed data streams by means of the convolution coder just before the coding rate changes. The Viterbi decoder initializes path metric at timing that the "end bit" is detected.
As a result, in the state that the path metric is initialized per data stream, namely in the state that a storage device of a Hamming distance calculated in the Viterbi decoder is initialized, Viterbi decoding can be started. This prevents the data streams having different coding rates from being influenced by the decoding.
However, the "information receiver" cannot solve the above problem when the "end bit" cannot be inserted into the data streams from the viewpoint of the standard of data transmission in digital satellite broadcasting or the like. If the "end bit" is not inserted and not detected and the path metric is initialized at a change point of the coding rate, namely, a point that transmission of next data stream is started, there arises a new problem that a convolutional code fails and the error correction ability is lowered.
For example, in a data stream which is obtained by multiplexing a code of low error correction ability and a code of high error correction ability, an error of a code having low error correction ability which can be corrected sufficiently occurs on a transmission line. In this case, when the path metric is initialized at the change point of the data stream, a vicinity of the head of the data stream cannot be decoded. As a result, more errors occur than the case that the initialization is not executed.

Method and apparatus for decoding received data in a communications system


The invention encompasses nanoparticle assemblies and methods for preparing nanoparticle and compositions comprising such nanoparticles for use in topical or skin applications. The invention further encompasses methods of complexing various molecular and cellular entities to the nanoparticles using the resulting nanoparticles of the invention as delivery devices. The nanoparticles can be used for a variety of applications, such as treating cancer, targeting tumors, reducing the toxicity of a drug in vivo, increasing the efficacy of a complexed agent in vivo, protecting a complexed agent against degradation, increasing skin penetration and retention of drugs, and enhancing the water solubility/dispersibility of a drug or other agent.

Zein, a plant protein that can be isolated from corn or maize, belongs to a family of prolamines that are composed of high amounts of non-polar amino acids, such as proline, glutamine and asparagine. Zein is odorless, non-toxic, biodegradable and water-insoluble, and is therefore an attractive component for many applications.
Zein has been investigated or used as a polymer in the pharmaceutical, medical, food, cosmetic, adhesive and packaging industries. In the food and pharmaceutical industries, zein has been used, for example, to film-coat materials and to form particulate systems such as microparticles or nanoparticles (U.S. Pat. No. 5,679,377 (Bernstein et al.), herein incorporated by reference in its entirety; Liu et al., Biomaterials 26 (2005) 109-115; Lopez and Murdan, J Microencapsulation 23 (2006) 303-314; Zhong et al., Food Biophysics 3 (2008) 186-190; Parris et al., J Agric Food Chemistry 53 (2005) 4788-4792).
Various methods of forming zein particles have been proposed. For example, U.S. Pat. No. 5,330,778 (Stark; herein incorporated by reference in its entirety) describes a method for preparing microparticles using zein using pH alteration to form the zein microparticles. The method, however, produces zein particles with larger micron sizes and with a wide particle size distribution, which has significant drawbacks, for example, for in vivo use. A biomaterial used for human or animal applications needs to be safe and non-immunogenic. In general, upon in vivo administration (e.g., introduction into the body) of particles, phagocytic cells in the blood and tissues, which are responsible for immunological recognition and removal of foreign particles, can initiate an immune response depending on the physicochemical characteristics of the particles. The uptake by phagocytic cells is dependent upon both particle size and surface hydrophobicity of the foreign particle. Particles greater than about 500 nm in diameter are highly prone to phagocytosis. Additionally, particles with a hydrophobic surface are easily recognized by the phagocytic cells. For example, Lopez and Murdan reported that zein microspheres having a diameter of 1.36±0.036 μm are immunogenic and, consequently, are not suitable as a drug, vaccine or other therapeutic carrier (Lopez and Murdan, J Pharm Pharmacol 58 (2006) 769-774)
Accordingly, new methods are needed for preparing zein particles to render the particles useful for therapeutic and cosmetic applications. Also needed are new therapeutic carriers for the delivery of important therapeutic and cosmetic agents in a safe and effective manner, so as to overcome challenges associated with skin penetration, retention, stability, skin irritation, and follicular targeting.

This patent is subject to a terminal disclaimer.

Protein nanocarriers for topical delivery


An apparatus of testing a semiconductor element applies pulsed voltages synchronized with each other, respectively, to a gate and a drain of a semiconductor element being tested and measures current flowing through the semiconductor element in response to the pulsed voltages thus applied. The testing apparatus produces pulsed I-V characteristics considering the influences of self heating and surface energy levels of the semiconductor element and RF swing along a load line during large signal operation.

FIG. 36 is a circuit diagram illustrating a prior art I-V measurement circuit, a kind of apparatus for testing a semiconductor element. In the figure, reference numeral 1 designates a semiconductor element, such as a GaAs FET and an Si FET, as a target of testing. A source of the semiconductor element 1 is connected to a ground 6 of this measurement circuit. Reference numeral 23 designates a DC power source, and the negative pole of the DC power source 23 is connected to the source of the semiconductor element 1. Reference numeral 30 designates a DC power source, and the negative pole of the DC power source 30 is connected to the source of the semiconductor element 1. Reference numeral 31 designates a current measuring apparatus, such as an ammeter, which is connected between a drain of the semiconductor element 1 and the positive pole of the DC power source 23. Reference numeral 32 designates a current measuring apparatus, such as an ammeter, which is connected between a gate of the semiconductor element 1 and the positive pole of the DC power source 30.
Bias voltages from the DC power sources 30 and 23 are respectively applied to the gate and the drain of the semiconductor element 1 as the target of testing. The current flowing through the gate is measured with the current measuring apparatus 32. Then, a change in the drain current flowing through the semiconductor element 1 due to a change in the bias voltage applied to the gate is measured with the current measuring apparatus 31. Consequently, I-V measurements of the target of testing by inputting a continuous wave (hereinafter referred to as CW) are performed.
By measuring I-V characteristics with the CW input, it is possible to measure the current-voltage characteristics of the semiconductor element (FET) in a stable state from the power that is obtained from the product of current flowing through the semiconductor element, and voltage, i.e., the condition in which the current decreases due to heat generation, and in a state in which electronic charges are stable in a depleted layer in the channel and a surface-depleted layer.
The prior art I-V measurement circuit is arranged as shown in FIG. 36 and the I-V measurements are performed with the CW input operation, so that the input is continuously applied to this circuit. Therefore, the I-V characteristics vary because of self-heating, failing to produce accurate I-V measurements.
In addition, in a recess of a GaAs FET, surface energy levels that adversely affect FET characteristics are produced. In the case of pulsed operation, there is a difference between the speed of electrons flowing through the channel and the speed of electrons at the surface, whereby the characteristics vary. In CW operation, however, since the surface charges are in a stable state, the surface levels do not vary, and no influence of the surface levels is produced. As a result, the I-V characteristics cannot be measured, taking into account the influence of the surface levels.
Further, it is impossible to obtain the I-V characteristics considering an RF swing along a load line in large signal operation of a high-power output FET.

Method for testing semiconductor element


An apparatus for analyzing a permission of an application for a mobile device, the apparatus comprising: an executable file acquisition unit; a file extraction module; and an execution permission analyzing module configured to detect a security risk which can be caused by the permission on the basis of the permission described in the extracted file, wherein the information related to the permission of the application includes information on permission that is declared in the application, permission that the application uses and a function that uses the permission of the application.

Recently, the number of users that use an Android operating system in smart mobile devices (hereinafter, referred to as mobile devices) is increasing continuously, and thus the growth rate of an android market becomes faster. In particular, studies have reported that the growth rate of the Android market is about three times raster than the growth rate of the app Store of Apple Inc.
The rapid growth of the Android market is based on the explosive increase of the number of applications for Android, and thus, the security associated with personal information that are handled by the applications has emerged as an important issue. More specifically, the possibility that the personal information is flowing out through the applications is becoming increasing.
In connection with the issue of the security, the Android operating system allows each application to run through a sandbox independently, but gives execution permission to the application so as to control its access and sharing of device resources. That is, since the application runs in a process that is protected in the sandbox, it is possible to block a direct access from other external system or applications. If an access of the external system or applications to the device resources or the like is required, it is necessary to grant the access by requesting permission through an androidmanifest.xml file of the application that runs on the device.
However, a security problem may occur even in this security mechanism. Specifically, in a case where a developer of the application assigns permission that does not need to run the application, for example, if the permission to get location information of individual applications is declared to an application which is required to access only to the Internet, a user of the application is in risk of leaking personal information helplessly. In addition, as will be described herein below, there may also occur many cases that permission is set to allow a privilege escalation attack by mistake of the application developer.
To solve the above problem, the app store of Apple Inc. performs a formal screening procedure for applications that are uploaded to the app store, thereby preventing the problem in advance. However, for the Android market, the screening procedure is not adopted at present.
Therefore, in order to solve the problem, there is a need to provide an apparatus and method which are capable of analyzing a permission of applications that are uploaded to the Android market to report it to an administrator of the Android market.

Apparatus and method for analyzing permission of application for mobile devices and detecting risk

Electronics and Telecommunications Research Institute


A distributed storage system and a data synchronization method are used with a network. The system includes a first network host and a second network host. A first file system directly writes data generated by the first network host into a first software-simulated persistent memory. The data in the first software-simulated persistent memory is stored into a first remote block device and cached, respectively. The cached data is stored into a first persistent storage by asynchronous writeback mechanisms. The first remote block device transmits the received data to the second software-simulated persistent memory through the network. The data transmitted to the second software-simulated persistent memory is cached, and the cached data is stored into a second persistent storage by asynchronous writeback mechanisms. The second network host replaces the first network host to provide services when the first network host is out of service.

With the development of the Internet, many services are provided on remote network hosts. For providing uninterrupted service, a remote backup network host should be activated to take the work immediately after a network host in use is out of order. To ensure that the remote backup network host has the latest data upon replacing the failed network host, data synchronization between the network hosts is necessary. A common data synchronization technology is distributed replicated block device (DRBD).
Please refer to FIG. 1, which is a block diagram illustrating that the distributed replicated block device is used in dual-node high availability (HA) clusters. In the system, a first persistent storage 110 is provided for the first network host 11 to store data generated or received by the network host 11. Similarly, a second persistent storage 120 is provided for the second network host 12 to store data generated or received by the network host 12. Each of the first persistent storage 110 and the second persistent storage 120 is implemented by a hard disk drive (HDD), a solid-state drive (SSD), other type of non-volatile memory device or a virtual device created in the physical memory device(s).
For explaining the remote backup service, suppose that the second network host 12 serves as the remote backup network host of the first network host 11. To keep data synchronization between the two network hosts 11 and 12, once the application program 111 executed in the first network host 11 generates a record of data and the data is transmitted to the first distributed replicated block device 113 through the file system 112, the first distributed replicated block device 113 transmits the data to both the first persistent storage 110 and a first remote block device 114 constructed by software. Therefore, the first persistent storage 110 gets the data. The first remote block device 114 further transmits the data to the second network host 12 through a data transmission path along a first network stack & driver 115 (constructed by software), a first network interface device 116 and a second network interface device 126. Then, the data is further transmitted to and stored in the second persistent storage 120 through a second network stack & driver 125 and a second distributed replicated block device 123 of the second network host 12 to update the stored data. After that, both the first persistent storage 110 and the second persistent storage 120 obtain the record of data, and data synchronization between the first persistent storage 110 and the second persistent storage 120 is achieved. The functions of the application program 121, the file system 122 and the second remote block device 124 in the second network host 12 may refer to similar components in the first network host 11.
A memory cache mechanism is used in the present operating system to increase the read and write speed of the file system, and such mechanism results in new problem unfortunately. For example, it is a common design in the present operation system to provide a first page cache module 117 and a second page cache module 127 implemented by random access memories (RAM). Such design can decrease the access frequency to the traditional hard disk drives having lower data read/write speed so as to raise the efficiency of data access. The file system 112 first writes the data generated by the application program 111 into the first page cache module 117. Then, the data is temporarily stored for rapid access as required by the application program 111. After a period of time, the file system 112 takes the data from the first page cache module 117 and writes the data into the first distributed replicated block device 113, and the data is transferred to the first persistent storage 110 and the second persistent storage 120 to finish the update. If the first network host 11 stops working (e.g. power failure or system crash) during the caching period, the data has not been written into the first distributed replicated block device 113 yet so that the data in the persistent storages 110 and 120 are not updated to the latest data, and thus causes data loss. In this situation, the second network host 12 does not obtain the complete data from the first network host 11 because the cache data is not stored in the second persistent storage 120 in time. Even though the first network host 11 for the services is rapidly replaced with the second network host 12, the second network host 12 might not provide complete services.
It is desired to overcome the problem of data loss without affecting the access efficiency of the system.

Distributed storage system and data synchronization method applied thereto


Further compression of data allowing economical storage of data for extended periods of time in high-speed access memory is performed in reduced time by performing further compression during transcoding in the transform domain and without restoring image data to its original image data form. The reduction in processing time is achieved by exploiting the large number of zero-valued quantization transform coefficients and not changing quantized transform coefficients at zig-zag scan positions where non-zero coefficients are rare during range reduction of the entropy decoded quantized transformed data. The range can be restored by computation or estimation of an altered quantization table which is stored with the further compressed a quantization values. Further advantages accrue from use of JPEG packed format for the data during transcoding.

1. Field of the Invention
The present invention generally relates to compression of image data while applying corrections to enhance image quality and, more particularly, to the decoding and re-encoding of documents for additional and more extreme data compression to allow economically acceptable long-term storage in rapid access memory and performing such decoding and re-encoding in reduced processing time.
2. Description of the Prior Art
Pictorial and graphics images contain extremely large amounts of data and, if digitized to allow transmission or processing by digital data processors, often requires many millions of byte to represent respective pixels of the pictorial or graphics image with good fidelity. The purpose of image compression is to represent images with less data in order to salve storage costs or transmission time and costs. The most effective compression is achieved by approximating the original image, rather than reproducing it exactly. The JPEG (Joint Photographic Experts Group) standard, discussed in detail in "JPEG Still Image Data Compression Standard" by Pennebaker and Mitchell, published by Van Nostrand Reinhold, 1993, which in hereby fully incorporated by reference, allows the interchange of images between diverse applications and open up the capability to provide digital continuous-tone color ac images in anti-media applications.
JPEG is primarily concerned with images that have two spatial dimensions, contain gray scale or color information, and possess no temporal dependence, as distinguished from the MPEG (Moving Picture Experts Group) standard. JPEG compression can reduce the storage requirements by more than an order of magnitude and improve system response time in the process. A primary goal of the JPEG standard is to provide the maximum image fidelity for a given volume of data and/or available transmission or processing time and any arbitrary degree of data compression is accommodated. It is often the case that data compression by a factor of twenty or more (and reduction of transmission time and storage size by a comparable factor) will not produce artifacts or image degradation which are noticeable to the average viewer.
Of course, other data compression techniques are possible and may produce greater degrees of image compression for certain classes of images or graphics having certain known characteristics. The JPEG standard bas been fully generalized to perform substantially equally regardless of image content and to accommodate a wide variety of data compression demands. Therefore, encoders and decoders employing the JPEG standard in one or more of several versions have come into relatively widespread use and allow wide access to imager for a wide variety of purposes. Standardization has also allowed reduction of costs, particularly of decoders, to permit high quality image access to be widely available. Therefore, utilization of the JPEG standard is generally preferable to other data compression techniques even though some marginal increase of efficiency might be obtained thereby, especially for particular and well-defined classes of images.
Even though such large reductions in data volume are possible, particularly using techniques in accordance with the JPEG standard, some applications require severe trade-offs between image quality and costs of data storage or transmission time. For example, there may be a need to store an image for a period of time which is a significant fraction of the useful lifetime of the storage medium or device as well as requiring a significant amount of its storage capacity. Therefore, the cost of storing an image for a given period of time can be considered as a fraction of the cost of the storage medium or device and supporting data processor installation, notwithstanding the fact that the image data could potentially be overwritten an arbitrarily large number of times. The cost of such storage is, of use, multiplied by the number of images which must be stored.
Another way to consider the storage cost versus image quality trade-off is to determine the maximum cost in storage that is acceptable and then determine, for a given amount of quality, how long the desired number of images can be saved in the available storage. This is a function of the compressed size of the images which generally relates directly to the complexity of the images and inversely with the desired reconstructed image quality.
An example of such a demanding application is the storage of legal documents which must be stored for an extended period of time, if not archivally, especially negotiable instruments such as personal checks which are generated in large numbers amounting to tens of millions daily. While the initial clearing of personal checks and transfer of funds is currently performed using automated equipment and is facilitated by the use of machine readable indicia printed on the cheek, errors remain possible and it may be necessary to document a particular transaction for correction of an error long after the transaction of which the check foamed a part.
Personal checks, in particular, present some image data compression complexities. For example, to guard against fraudulent transactions, a background pattern of greater or lesser complexity and having a range of image values is invariably provided. Some information will be printed in a highly contrasting ink, possibly of multiple colors, while other security information will be included at relatively low contrast. Decorations including a wide range of image values may be included. Additionally, hand-written or printed indicia (e.g. check amounts and signature) will be provided with image values which are not readily predictable.
Even much simpler documents may include a variety of image values such as color and shadings in letterhead, high contrast print, a watermark on the paper and a plurality of signatures. This range of image values that may be included in a document may limit the degree to which image data may be compressed when accurate image reconstruction is necessary. Therefore that cost of storage in such a form from which image reconstruction is possible with high fidelity to the original document is relatively large and such costs, limit the period for which such storage is economically feasible, regardless of the desirability of maintaining such storage and the possibility of rapid electronic access for longer periods.
Since such image values must be accurately reproducible and utilization of the JPEG standard is desirable in order to accommodate widespread access and system intercompatibility, substantially the only technique for further reduction of data volume consistent with reproduction with good image fidelity it to reduce the spatial frequency of sampling of the original image. However, sampling inevitably reduces legibility of small indicia, especially at low contrast. Currently, sampling at 100 dots per inch (dpi) or pixels per inch (about reduction of one-third to one-sixth from the 300 dpi or 600 dpi resolutions of printers currently in common use) is considered to be the limit for adequate legibility of low-contrast indicia an personal checks. The American National Standards Institute (ANSI) standards committee for image interchange recommends 100 dpi as a minimum resolution. Most check application use either 100 dpi or 120 dpi grayscale images when they are compressed with more than one bit per pixel.
As a practical matter, the needed quality of the image data also changes ever time in such an application. For example, within a few months of the date of the document or its processing, questions of authenticity often arise, requiring image quality sufficient to, for example, authenticate a signature, while at a much later date, it may only be necessary for the image quality to be sufficient to confirm basic information about the content of the document. Therefore, the image data may be additionally compressed for longer term storage when reduced image quality becomes more tolerable, particularly in comparison with the costs of storage. At the present time, personal check images are immediately stored for business use on DASD for about 90 days and transferred to tape for archival purposes and saved, or legal reasons, for seven years. Thus, data is available for only a few months in "on-line", rapid-access storage and some significant processing time is required for transfer to tape.
In this regard, the number of personal checks and other documents produced on a daily basis, itself, presents several problems. The processing required for encoding and/or decoding an image is substantial and may require significant amounts of time even when performed at extremely high speed on general purpose or special purpose processors. Even when an encoding or decoding process may be performed in a fraction of a second (e.g. 1/10 second or less), the sheer number of documents may occupy the entire processing capacity of a large number of processor on a continual basis. To reduce storage costs as reduced image quality becomes increasingly tolerable over time, as discussed above, even more processing has been required. That is, to increase compression of an image from data which has already been compressed, as discussed in the above-incorporated patent application Ser. No. 09/760,383, it is necessary to first decode the image from compressed data and then encode the image again using different quantization tables in order to further reduce the volume of data. This processing time represents a substantial cost which effectively increases the cost of storage over the cost of the reduced amount of storage medium occupied. Conversely, if the cost of processing for further data reduction can be reduced, the data may be stored for a longer period of time and/or in memory having shorter access or retrieval time at an economically acceptable cost.

Enhancing compression while transcoding JPEG images

International Business Machines Corporation