A recording apparatus includes a supporting stage that supports a recording medium; a recording processing unit, which includes a recording unit that opposes the recording medium that is supported by the supporting stage, and bridges an X axis direction so as to cross the supporting stage; and a Y axis movement unit causes the recording processing unit to move in relation to the supporting stage in a Y axis direction that is perpendicular to the X axis direction and is parallel to a supporting surface of the supporting stage, in which the Y axis movement unit includes a drive mechanism, which causes the recording processing unit to move in the Y axis direction in relation to the supporting stage, and a linear guide mechanism, which is disposed on a rear surface side of the supporting stage, and supports the recording processing unit to be free sliding in the Y axis direction in relation to the supporting stage.

1. Technical Field
The present invention relates to a so-called flatbed type recording apparatus, in which a recording unit moves, and performs recording on a recording medium that is positioned on a stage.
2. Related Art
In the related art, a known example of this type of recording apparatus includes a base member, and a flatbed which is disposed on the base member and supports a recording paper (refer to JP-A-2002-2054). This known example further includes an ink head that is disposed to face the flatbed, a carriage on which the ink head is mounted, and a supporting member which supports the carriage to be freely movable in a horizontal direction (i.e., a Y axis direction). The known example further includes a pair of left and right rails which extend in a horizontal X axis direction (perpendicular to the horizontal Y axis direction in the perpendicular plane) on a base member. The known example also includes a pair of left and right movable blocks which are fixed to the supporting member and are capable of moving on the rails. In other words, in this recording apparatus, a linear guide mechanism (such as a pair of rails and a pair of movable blocks) is disposed on the upper surface side of the base member in a manner in which the linear guide mechanism supports the carriage to be freely movable in the X axis direction via the supporting member.
However, in this configuration, since the linear guide mechanism is disposed on the upper surface side of the base member (i.e., on the surface side of the flatbed), the positions of the supporting member and the carriage become higher by an amount of the dimensions of the linear guide mechanism. As a result, there is a problem in that the height dimension (i.e., the dimension in which the ink head and the flatbed face one another) of the entire recording apparatus becomes larger. Furthermore, since the linear guide mechanism is disposed to avoid the placement region in which the recording paper is placed, there is a problem in that a planar dimension (a horizontal dimension perpendicular to the height direction) of the entire recording apparatus become larger by the amount of the dimensions of the linear guide mechanism.
It is also conceivable to dispose the linear guide mechanism on the surfaces on the left and right lateral sides of the base member; however, even in this case, the planar dimensions of the entire recording apparatus become larger by the amount of the dimensions of the linear guide mechanism.


The instruction code including an instruction code stored in the area where the encrypted instruction code is stored in a non-rewritable format is authenticated using a specific key which is specific to the core where the instruction code is executed or an authenticated key by a specific key to perform an encryption processing for the input and output data between the core and the outside.

1. Field of the Invention
The present invention relates to a system of assuring security for information processing systems such as computers. More precisely, it relates to a secure processor and a program for the secure processor, which are capable of preventing operation of malicious execution codes as in computers and various kinds of equipment with a built-in processor.
2. Description of the Related Art
In the systems using a processor, operations can be described by a program so that those operations showing high flexibility and multiple functions can be easily mounted when compared to systems configured entirely by hardware. Because of these features, processors have been used in numerous systems such as personal computers, PDAs, cellular phones, and information household appliances and with the increased popularity of these systems, processing requiring higher levels of security as in e-commerce has been performed widely. Although a variety of kinds of system-based measures such as encryption for line data and user authentication have been taken in order to tighten security, software-level or processor-level security has become an issue when coping with the spread of computer viruses and illegal accessing as well as dealing with system-level security in recent years.
For example, as a variety of kinds of equipment with a built-in processor including cellular phones and information household appliances are connected to networks, there is a high likelihood that this equipment is also exposed to external threats similar to those of personal computers. When precisely analyzing problems such as illegal access, the main cause is the fact that the malicious execution codes operate within the terminals. It is important to prevent the malicious codes or undesirable codes from operating on a processor, but the measures taken traditionally at the processor side to prevent the operation of the malicious codes are not adequate at all. As a result, the problem remains that a secure software execution environment has not been provided.
Next, traditionally a processing is executed as follows: when storing data and execution codes for instructions in the main memory device or in the secondary memory device, encryption is performed for assuring security, and the encrypted data are then decrypted prior to the actual execution of instructions and are stored in the cache memory within the processor, and the processing is executed. In this case, the hardware for executing the encryption processing is loaded externally on another chip which is different from the processor chip. Therefore, there was the problem that encryption processing performance such as processing speed tends to become inferior.
Also, in such encryption processing, the encryption key used for encryption of data is determined at the side of encryption processing on the external chip so that there are no relationships with the kinds of instructions to be executed at the processor side, supervisor/user mode or the access addresses for fetching the data or instructions. In addition, the problem remained that an appropriate encryption key can not be selected in response to the instructions to be executed since the execution unit at the processor side can not specify a key to be used for encryption and decryption.
The following literature is available as the prior art regarding the security of this software execution environment.    Patent Reference 1: Japanese Patent Application Disclosure 2002-353960, "code Execution Apparatus and Code Distributing Method"
This document discloses a code execution apparatus wherein the encrypted execution code is authenticated to confirm effectiveness of the encrypted code, and the secure processor fetches instructions corresponding to the encrypted code in order to execute them as a secure task.
However, in this code execution apparatus, there are no relationships between the process corresponding to the execution code and the key used for authentication. For example, a problem could not be solved such that if a malicious operation is performed in the operating system (OS) and then if another authentication key is allocated in the program, the malicious code must be operated.

Secure processor and a program for a secure processor


A device in the form of a conversion adapter for reducing an internal lumen of a catheter so as to accommodate a guidewire having a diameter substantially smaller than the internal lumen of the catheter as well as a catheter system including such a conversion adapter is provided. The adapter is positionable within the internal lumen of the catheter. The adapter has an external diameter which is substantially equal to the internal lumen of the catheter and further includes a smaller internal lumen which is substantially equal in diameter to the guidewire and is therefore capable of accommodating the smaller diameter guidewire therethrough. Preferably, the adapter extends within the internal lumen of the catheter along the entire length thereof, and preferably extends beyond the length of the catheter, including a flexible tapered tip at the end portion. In alternate embodiments, the adapter is slidably positionable and removable within the internal lumen of the catheter, thus providing a catheter system which is capable of effectively accommodating guidewires of two different diameters, without creating a drastic transition between the catheter tip and the guidewire and without compromising strength of the delivery system.

Catheters are well known for use with the human body as part of diagnostic or treatment procedures. Such devices are typically introduced through body lumens such as blood vessels and are advanced to the sight designated for diagnosis or treatment, which sight may be a particular vessel or organ. For example, it is well known in percutaneous transluminal coronary angioplasty (PTCA) procedures to introduce a small diameter catheter into a stenosis portion of a blood vessel caused by arteriosclerosis or the like. The PTCA procedure typically includes inserting such a catheter equipped with a dilator such as a balloon at its tip into the stenosis portion of the blood vessel and inflating the dilator so as to dilate the stenosis portion of the blood vessel, thereby improving blood flow at the distal side thereof.
During such PTCA procedures, a guidewire is typically first introduced into the blood vessel and positioned within the blood vessel at the area of the stenosis portion. The catheter equipped with the dilator is then inserted over the guidewire and advanced through the blood vessel to the area of treatment, for carrying out the necessary procedure. After dilation of the stenosis portion of the blood vessel, often times a vascular stent is implanted into the blood vessel in order to maintain the blood vessel in an open position.
Catheters and guidewires are supplied in a variety of sizes and diameters. Specific applications and procedures typically involve use of specific size catheters and guidewires. For example, due to the tortuous path of blood vessels in cardiology procedures, cardiologists typically prefer smaller diameter guidewires such as a 0.018 inch diameter catheter, since they include features which are amenable to such uses, including flexibility. On the other hand, radiologists may prefer to use a larger diameter catheter, such as a 0.035 inch catheter, for cost and ease of use for a particular application.
It is common place for end users such as physicians carrying out catheterization procedures to become accustomed to using one particular size guidewire in such procedures. Such a physician would therefore be reluctant to incorporate catheter systems which require use of a different size guidewire. For example, while a physician typically may prefer to use a 0.018 inch guidewire due to specific characteristics including tip transition, column strength, pushability, trackability and tensile strength, catheters systems which are designed for use with a different size guidewire, such as a 0.035 inch guidewire, are becoming more common place, for example, in percutaneous catheterization procedures, and specifically for those procedures involving delivery and employment of peripheral stents.
Accordingly, it is desirable to provide for the use of a smaller diameter guidewire with a larger diameter dilatation catheter.

This patent is subject to a terminal disclaimer.

Adjustable length conversion adapter for dilatation catheters


Method and apparatus for facilitating real-time searching of non-public data using a single search query are provided. Method includes facilitating reporting of availability of companion application of remote source unit to auto discovery module to enable client device to automatically discover remote source unit and to enable client device to search, in real-time, non-public data on remote source unit using single search query. Companion application is non-public application. Single search query comprises a search term. Method includes enabling automatic access to non-public data on remote source unit, by single search query. Method includes facilitating receipt, at remote source unit, of single search query with search term. Method includes, in response to single search query, searching, in real-time, non-public data on remote source unit using search term; retrieving, in real-time, non-public search result comprising one or more file names or folder names; and transmitting non-public search result in real-time.

A web crawler can browse and search a large number of web sites that contain publicly available data and then create a copy of the public web pages for later processing by a search engine to index the copied web pages. When a user makes a request to search the web, the web search engine does not search the real web sites, but, rather searches the indexed copies of the web pages and returns the search hits from the indexed copies. A web search is not a real-time search and only provides publicly available data on the web.

Method and apparatus for searching non-public data using a single search query


The present invention provides a hydrogen peroxide solution for sterilization which has a hydrogen peroxide concentration of 30 to 45% by weight, an Fe concentration of 2 ppb or less and an Al concentration of at least 15 ppb and in which a concentration of a stabilizer comprising orthophosphoric acid is 40 ppm at the most. The above hydrogen peroxide solution for sterilization is used for sterilizing vessels filled with beverages and foods and packaging materials in an aseptic filling equipment. The above hydrogen peroxide solution for sterilization has less evaporation residue, does not clog a narrow piping part such as a spray nozzle and therefore makes it possible to stably operate an aseptic filling equipment. Further, an austenite base stainless material can be used as a material for the transporting facilities and the tanks.

The present invention relates to a hydrogen peroxide solution for sterilization which is heated and evaporated and in which hydrogen peroxide evaporated is used as a bactericide. More specifically, it relates to a hydrogen peroxide solution for sterilization which contains less amount of a stabilizer added to the hydrogen peroxide solution and is reduced in an amount of impurities to the utmost and which contains a specific additive component.

Aqueous hydrogen peroxide for sterilization


A battery holder for securing a battery to a vehicle and for mechanically isolating the battery from the vehicle is provided. The battery holder includes a vehicle mounting plate, a battery containment plate, and a number of shock absorbing elements. The battery containment plate includes a number of open-topped cells for retaining leaking battery liquid therein. The shock absorbing elements prevent vibrations and shocks from being transferred from the vehicle to the battery.

Vehicles such as cars and boats typically include one or more batteries for storing and providing electrical power. These batteries often fail or have reduced performance due to excessive vibrations and shocks generated or transmitted by the vehicles. This is especially true for batteries used in boats, personal watercraft, all-terrain vehicles, and other vehicles that operate in rough water or uneven terrain. All types of batteries, and particularly high performance batteries used in marine applications, are expensive, difficult to replace, and difficult to safely dispose. Thus, prolonging their useful lives is highly desired.
Conventional battery holders such as battery cases secure their batteries to the vehicles but do not absorb vibrations and shocks transmitted or generated by the vehicles. Shock absorbing pads have been developed for placement under the batteries, but the batteries are no longer secured to the vehicles. Strapping the batteries to the vehicles or otherwise securing the batteries to the vehicles while they are on the shock absorbing pads results in the shock absorbing pads being ineffective because vibrations and shocks travel through the securing straps to the batteries.


A method and system relate to use of an alignment plate in electrical assemblies having terminal blades or other features. The alignment plate includes features for suspending the plate relative to the terminal blades for protecting the blades during assembly, transport, and other operations.

1. Field of the Invention
The present invention relates to assemblies having a printed circuit board (PCB) or other feature with terminal blades to which a connector is connected.
2. Background Art
Junction boxes and other electrical assemblies typically include a housing and a printed circuit board (PCB) or other electrically conducting unit stored therein. A connector or other feature may be received within an opening of the housing to connect to the PCB. The connector may connect to any number of features of the PCB, including terminal blades projecting from a topside of the PCB.
The terminal blades typically connect to terminals of the connector. In some cases, the positioning of the terminals relative to the terminal blades is dependent upon positioning of the connector within the opening of the housing. The opening is typically proximate the terminal blades and includes raised side walls to assist in receiving and positioning the connector.
Once positioned within the opening, the connector may be moved in a downward direction to electrically connect the terminals therein to the terminal blades on the PCB. In some situations, the junction box may be assembled separately from the connector whereby the connector is subsequently positioned within the opening of the housing in an assembly process. Accordingly, the junction box may be transferred separately from the connector for subsequent assembly therewith. During this period, the terminal blades may be exposed through the opening of the housing.
In order to easily assembly the connector, the connector should align with the terminals blades within a predefined tolerance range. The exposure of the terminal blades prior to connector assembly can cause the blades to shift or otherwise exceed this tolerance range.


A system and method for enabling a user to query availability, roaming history and/or modem statistics of a wireless device that can roam between at least two different wireless networks, without assistance from network service provider personnel.

1. Field of the Invention
The present invention relates generally to a system and method of enabling a user to query a device when the device is within a home network and/or a secondary network. More particularly, in embodiments of the invention, the present invention relates to a system and method of enabling a user to, independently and without having to interact with primary and/or secondary network personnel, determine device availability, functionality and/or status, access device roaming history, and/or obtain device modem statistics when the device is within a home network and/or a secondary/complementary network.
2. Background Description
FIGS. 1–2 show a prior art method and apparatus for discovering devices on a network, as disclosed in U.S. Pat. No. 5,835,720, incorporated herein by reference. FIG. 1 shows a network 110 which includes first, second and third subnets S1, S2 and S3. The subnets S1, S2 and S3 can have the same topology or different topologies (e.g., Token ring, Ethernet, X.25 and FDDI). Devices 112, 114 and 116 are connected to the first subnet S1; devices 118, 120, 122 and 124 are connected to the second subnet S2; and devices 126, 128, 130, 132 and 134 are connected to the third subnet S3. The devices 112–134 can be workstations, personal computers, hubs, printers, etc. Additional devices on the network 110 include a first router 136 for interconnecting the first, second and third subnets S1, S2 and S3; and a second router 138 for connecting the second subnet S2 to other networks. The network 110 is scalable, which allows computing resources to be added as needed. Although only several devices 112–138 are shown, the network 110 can encompass up to tens of thousands of addressable devices.
TCP/IP is used to regulate how data is packeted into IP packets and transported between the devices 112–138. Each device 112–138 has a physical address and a unique Internet protocol (IP) address. The IP address includes a network number and a host number. The host number is broken down into a subnet part and a host part.
IP packets are sent from a source device on the first subnet S1 (device 12, for example) to a destination device on the first subnet S1 (device 114, for example). The IP packets contain the IP address of the destination device 114. The subnet part of the destination IP address indicates that the destination device 114 is local, so the source device 112 retrieves its local ARP (Address Resolution Protocol) table from its ARP cache. The ARP table is used for mapping the IP address onto a physical address. If the destination IP address is found on the ARP table, the source device 112 reads the physical address off the local ARP table, adds appropriate headers (including the physical address of the destination device 114) to the IP packets, and sends the resulting frame over the first subnet S1.
If the destination device 114 is not on the ARP table, the source device 112 issues an ARP request to locate the destination device 114. The ARP request includes the IP and physical addresses of the source device 112 and the IP address of the destination device 114. All devices receiving the ARP request check to see if their IP address matches the destination IP address in the ARP request. The destination device 114 makes a match and responds by returning its physical address to the source device 112. The source device 112 makes an entry for the destination device 114 in its ARP table (the entry including the physical address of the destination device 114), adds the physical address of the destination device 114 to the IP packets, and transmits the resulting frames over the first subnet S3.
IP packets are sent from the source device 112 to a destination device on the third subnet S3 (device 130). The subnet part of the destination IP address indicates that the destination device 130 is not local, so the source device 112 retrieves its local routing table from the ARP cache.
The local routing table contains information needed to route the IP packets to next-hop gateways. The information includes entries that indicate the next-hop routers by their IP addresses. At a minimum, the local routing table contains an entry for a default router. In this example, the default router is the first router 136. The routing table may also contain many other entries for other gateways on the network 110. The source device 112 forwards the IP packets to the first router 136.
The first router 136 receives the IP packets and retrieves an IP address table from its ARP cache. The IP address table includes an address for each interface. The IP address table includes IP address 126.96.36.199 for the first subnet S1, IP address 220.127.116.11 for the second subnet S2, and IP address 22.214.171.124 for the third subnet S3. By masking the destination IP address to obtain its subnet part (a mask from the IP address table is used) and comparing the masked IP address to the addresses in the IP address table, the first router 36 determines that the IP packets should be sent to the third subnet S3. The first router 136 looks at its ARP table (which was retrieved with the IP address table) for the physical address of the destination device 130. The first router 36 maintains an ARP table of the devices that have been active (i.e., communicating) over an interval (e.g., five minutes). If the destination IP address is not on its ARP table, the first router 136 issues an ARP request. After the destination device 130 is found, the first router 136 adds the destination physical address to the IP packets and transmits the resulting frames over the third subnet S3 to the destination device 130.
Had the destination IP address not fit in one of the subnets on the IP address table, the first router 136 would have checked its routing table (which was also retrieved with the IP address table) and forwarded the IP packets to the next-hop router (i.e., the second router 38).
The network 110 additionally includes a network manager 140, which is connected to the first subnet S1. Simple Network Management Protocol (SNMP) is used by the network manager 140 for managing the devices 112–138 that support SNMP. The devices 112–138 that do not support SNMP can be managed by a protocol such as ICMP. Each SNMP-manageable device stores in its memory a Management Information Base (MIB). The MIB is a collection of objects or variables representing different aspects of the device (e.g., configuration, statistics, status, control). Each device is associated with an agent, which is a software program that may or may not be resident in the device. The agents allow the network manager 40 to access the MIB of each SNMP-manageable device. Such accessibility allows the network manager 140 to perform its management tasks. For a general description of network management, see W. Stallings, "Data and Computer Communications", MacMillan (4th ed., 1994) pp. 701–24, which is incorporated herein by reference.
FIG. 2 shows the network manager 140 in greater detail. The network manager 140 includes a workstation 142 such as a SPARCstation™ or SPARCserver™.
Both of these models use a RISC-based high-performance "SPARC" microprocessor 43. The SPARCstation™, SPARCserver™ and "SPARC" microprocessor are all commercially available from Sun Microsystems, Inc. The workstation 242 is configured with a color display monitor 244 and a CD ROM drive 246 for distribution media. It is also configured with volatile memory 248 such as DRAM and non-volatile memory 250 such as a hard drive.
The Network Manager 110 includes a "UNIX"-based operating system 252. The operating system 252 is stored on the network manager's hard drive 250.
Also stored on the hard drive 250 is software for directing the network manager 240 to perform its many tasks. The software includes a Graphical User Interface (GUI) 254, a network topology database 256 and a Discover program 258. Running the Discover program 258, the network manager 240 seeks out IP and SNMP-addressable devices on the network 110, and adds instances of discovered devices to the network topology database 256.
The Discover program 258 can be distributed on a portable computer memory medium, such as a CD ROM. Distributed as such, the CD ROM is inserted into the CD ROM drive 246 and the Discover program 258 is installed onto the hard drive 250. Instead of installing the Discover program 258 onto the hard drive 250, however, it can be accessed directly from the CD ROM drive 246.
The Discover program 258 can be run directly from the operating system 252. The location and name of the Discover program's executable file are typed in at the command line. Specifiers can also be typed in at the command line, or they can be provided in a configuration file. If no specifiers are typed in at the command line, default specifiers are used. The specifiers, which provide options for running and configuring the program, will be discussed below.
In the alternative, the Discover program 258 can be run from the GUI 254. A Discover program icon is double clicked, causing a Discover Properties dialog box to appear. The Discover Properties dialog box shows the current configuration of the Discover program, provides an option that allows the Discover program to be reconfigured with new specifiers, and a button for running the Discover program 58 as currently configured.
Reference is now made to FIG. 3, which shows the steps performed by the network manger 140 under the direction of the Discover program 258. The Discover program 258 offers a choice of searches: an ARP/Ping search, an ARP-only search, and a Ping search (step 300). One is selected. The ARP/Ping search is selected by default. If it is desired to perform either the ARP-only search or the Ping search, a specifier (e.g., -A or -P) is typed in at the command line or button (e.g., ARP-only button or Ping button) is clicked on in the Discover Properties dialog box.
The network manager 240 begins with the steps of building a hierarchical data structure of the network topology. The hierarchical data structure indicates networks, subnets for each network, and gateways, hosts and links (physical and logical) for each subnet. The data structure is stored in non-volatile memory 250. To build the hierarchical data structure, the network manager 240 accesses its IP address table and local routing table in its ARP cache (step 302). IP addresses in the IP address table, which are used to identify the subnets, are added to the hierarchical data structure (step 304). The local routing table is used to identify a default router. The local routing table might also identify additional gateways. IP addresses of the default router and any other gateways are added to the hierarchical data structure (step 306).
The IP addresses of the routers are also added to a Gateway list, which can be stored in computer memory (not shown). Before a gateway is saved in the Gateway list, however, the network manager 240 performs a traceroutes operation to determine the number of hops to that gateway (step 308). Each gateway that a packet must traverse is counted as a hop. The traceroutes operation also identifies physical and logical links, which are added to the hierarchical data structure (step 310). If a gateway is within a "Maximum Hops" threshold, its IP address is appended to the Gateway list (step 312). By default, the Maximum Hops threshold is set to zero so that only the local ARP cache is accessed.
If the Maximum Hops threshold is greater than zero (step 314), the network manager 40 retrieves the routing table, IP address table and ARP table of the default router using a series of SNMP Get_Next messages (step 316). The default router's IP address table indicates the IP addresses of the subnets S2 and S2 and any other interfaces. IP addresses of the interfaces are added to the hierarchical data structure (step 318). The default router's routing table identifies other gateways, which are added to the hierarchical data structure. Only IP addresses of those gateways within the Maximum Hops threshold are appended to the Gateway list (step 320).
If the default router does not support SNMP, the network manager 240 can use the traceroutes operation to find additional gateways. If additional gateways are found, their IP address tables, routing tables and ARP tables are retrieved. Gateways within the Maximum Hops threshold are appended to the Gateway list.
The network manager 240 then proceeds down the Gateway list. Routing tables, IP address tables and ARP tables of the next entry on the Gateway list are retrieved (step 322). Newly-discovered networks, subnets and gateways are added to the hierarchical data structure (step 324), and newly-discovered gateways within the Maximum Hops threshold are appended to the Gateway list (step 326). By appending newly discovered gateways to the Gateway list and advancing down the Gateway list, the network manager 240 leapfrogs from gateway to gateway, identifying even more routers, subnets and networks. Once the network manager 240 has reached the end of the Gateway list (step 328), it has completed the construction of the hierarchical data structure.
The steps 302–328 of building the hierarchical data structure can be skipped or modified if a Search file containing specific gateways is made accessible to the Discover program 258. The gateways in the Search file are identified by their IP addresses. If a specifier (e.g., "ONLY") is provided in the Search file, the search is limited only to those gateways specified in the Search file. If the specifier is omitted, the search begins with those gateways specified in the Search file and then continues with the search above, accessing routing tables and IP address tables from all gateways within the Maximum Hops threshold. Any gateway that is unreachable is ignored. The name of the Search file can be entered on the command line of the operating system or through the Discover Properties dialog box of the GUI 254.
After the hierarchical data structure has been built, the network manager 240 performs a search. If the Ping search is selected (step 330), the network manager 240 sends ICMP echo request messages over the network 10 (step 332). The network manager 240 can be programmed to send out the ICMP echo request messages to all addresses on the network in a conventional manner.
If either the ARP/Ping or the ARP-only search is selected, the network manager 240 retrieves its local ARP, IP address and routing tables using UNIX system calls (step 334). Then, using SNMP requests, the network manager 240 retrieves the ARP tables from all gateways listed in the Gateway list (step 336). For example, the network manager 240 might find the following ARP table from the first router 136:
De-viceIP addressIP NameMaskPhys Addr1618.104.22.168udmpk-255.255.255.25500:40:0b:40:76:1d16c-7412220.127.116.11dakota-74255.255.255.25500:40:0b:40:f6:4514188.8.131.52cicada-74255.255.255.25500:40:0b:40:f6:432022.214.171.124certo255.255.255.25508:00:20:76:a3:9f2218.104.22.168emp255.255.255.25508:00:20:10:2c:e724126.96.36.199measures-255.255.255.25508:00:20:76:78:3774
The network manager 240 immediately saves the IP addresses from the ARP table in the hierarchical data structure (step 338). The network manager 240 can also ping each device that it finds in the ARP table (step 340). This step is performed for IP address verification purposes.
The network manager 240 also immediately classifies the devices (step 342) and updates the network topology database 256 with the classified devices (step 344).
Classification can be performed by reading the device's SNMP system description (e.g., sysobject ID) and mapping the system description to a particular device class. The network topology database 256 is essentially an internal hierarchy of data structure files and instance files. The data structure files include structures of devices, views (collections of devices), buses (e.g., a Token Ring Local Area Network (LAN) segment) and connections (e.g., an RS-232 link). The network manager 240 polls the MIB of each discovered device for system information. The system information is passed to an Applications Program Interface (API) which, using basic API calls, creates instance files of the data structures and adds the instance files to the network topology database 256.
If the ARP-only search was selected (step 346), the network manager 240 might try to identify hosts (step 348). If the ARP/Ping search is selected, the network manager 240 performs a more exhaustive search on the network, sending ICMP echo request messages to the remaining addresses of the subnets listed in the Hierarchy file (step 350). The ICMP echo request messages can be sent in a conventional manner.
Thus, U.S. Pat. No. 6,137,791 is directed to voice communication between a first data packet network using a MIM and a second data packet network utilizing a Personal Digital Cellular Mobility Method (PMM). We have determined that there is a need for a mechanism that enables users to independently, optionally without assistance from primary and/or secondary wireless network personnel, determine availability, functionality and/or status of a wireless device, access device roaming history and/or obtain device modem statistics when the queried device is operating within a home network or a secondary/complementary network. Accordingly, there is also a need for a system and method that enables a user to query a wireless device in such a manner.

System and method of querying a device, checking device roaming history and/or obtaining device modem statistics when device is within a home network and/or a complementary network


A temperature measuring device includes a temperature sensor and at least two printed circuit boards connected together and extending transversely to one another for establishing an electrical connection between the temperature sensor and a connecting cable.

1. Technical Field
The present invention relates to a temperature measuring device, in particular, a temperature measuring device with an infrared measuring head for the non-contact measuring of temperatures.
2. Related Art
In the non-contact measuring of the temperature of an object, the heat radiation emitted by the object is detected by a detector, converted into an electrical signal and supplied over a cable to an evaluating unit. It can happen that during rapid changes of the ambient temperature, the cable registers these temperature gradients in the temperature measuring head and a undesired heat flow occurs from the cable to the detector located in the temperature measuring head. This undesired heat input leads to measuring errors when there are large gradients in the ambient temperature.
From the state of the art it is already known to arrange a circuit board between the detector and the connecting cable parallel to the detector and to configure the conductor pathways in a meandering structure on the board in order to obtain an extended conduction path or a larger surface on which more heat can be emitted to the environment by means of heat transfer whereby the risk of measuring errors is to be reduced.
The disadvantage of such embodiments is that only a narrow restricted space is available for applying such meandering structures and that a satisfactory discharge of heat cannot be realized. This has an effect, among other things, on the measuring function of the detector with strong temperature fluctuations of the ambient temperature.


For PMR (Perpendicular Magnetic Recording) design, one of the major technology problems is the use of CMP to fabricate the pole structure. If the device is under-polished there is a danger of leaving behind a magnetic shorting layer while if it is over-polished there may be damage to the main pole. This problem has been overcome by surrounding the main pole, write gap, stitched write head pillar with a layer of CMP etch stop material which, using optical inspection alone, allows CMP (performed under a first set of conditions) to be terminated just as the stitched write head gets exposed. This is followed by a second CMP step (performed under a second set of conditions) for further fine trimming of the stitched head, as needed.

During PMR (Perpendicular Magnetic Recording) manufacture it becomes necessary to polish all the magnetic materials away after PPT (partial pole trim) on top of the yoke area. The CMP (chemical mechanical polishing) process must be well controlled in such cases since a magnetic shorting path will be present if under-polish occurs while, on the other hand, the main pole will be damaged if excessive over-polish takes place.
Typically, before polish, one is faced with a stack of metal films covered by a full film of alumina. In this context, the goal of properly executed CMP (Chemical Mechanical Polishing) is to stop at a particular layer that is in the middle of whole stack of other layers so it becomes a critical and challenging task to monitor and control the CMP process in order to make a PMR head successfully.
Referring now to FIG. 1 we show there an example of a magnetic write head that includes a main pole 16, a non-magnetic write gap 15, and a stitched write shield 14, which together surround the coil area 17. Located atop 14 are first and second write shields 12 and 13 respectively. All subsequent figures will be ABS (air bearing surface) views i.e. in the direction shown by arrow 18.
For PMR design, one of the major technology problems is the use of CMP to fabricate the pole structure. Since plated magnetic materials are part of the structure, they must be removed completely at he conclusion of CMP. The prior art CMP process is shown as below, but, as will be seen, one encounters several unique difficulties when doing so.
As seen in FIG. 2, the PMR structure before polishing includes metal stack 14/15/16, which was formed inside photoresist mold 22, as well as field area 21 (made pf magnetic material). The CMP final target is to be stopped at a desired metal interface. If under-polish occurs, a magnetic shorting path will be present. On the other hand, the main pole will be damaged if over-polish occurs. Thus to maintain high yields of functional devices, CMP must be well controlled both in terms of uniformity as well as precise termination when some desired metal layer is reached.
As seen in FIG. 3, once the device and field areas have been formed, photoresist mold 22 is removed and replaced with photoresist layer 32 which extends outwards from the device so as to partially cover field area 21 as well. In this way, device pedestal 14/15/16 is all that remains.
It follows from the above that a monitoring scheme must be provided in order to control the CMP process tightly. However, requiring the CMP process to stop at a middle layer is completely contrary to traditional magnetic head CMP practice. FIB (focused ion beam) is commonly utilized in wafer processing to cut devices and to check where CMP stopped. This has several disadvantages: (1) very expensive due to long off-line cycle time and possible permanent damage the device (2) limited sample size (3) a high quality FIB image is obtained only if the stopping layer shows high contrast relative to other materials under removal by the ion beam which, for most applications, is not the case.
In other words, monitoring and controlling a CMP process in order to make PMR head successfully is a critical and a challenging task.
A routine search of the prior art was performed with the following references of interest being found:
In U.S. Pat. No. 6,063,306, Kaufman et al. disclose two slurries having different selectivities for copper and tantalum. In U.S. Pat. No. 6,554,878, Dill, Jr. et al. show different slurries to polish different materials, including alumina. Boggs et al. describe indicator areas on a wafer to check CMP results in U.S. Pat. No. 5,972,787 and in U.S. Pat. No. 6,226,149, Dill, Jr. et al. disclose the use of CMP in forming a pole while in U.S. Pat. No. 6,024,886, Han et al. teach a CMP process using a polish stop layer.

Process of manufacturing a perpendicular magnetic pole structure


A phase change memory device, and method of making the same, that includes a trench formed in insulation material having opposing sidewalls that are inwardly sloping with trench depth. A first electrode is formed in the trench. Phase change memory material is formed in electrical contact with the first electrode. A second electrode is formed in electrical contact with the phase change memory material. Voids are formed in the insulation material to impede heat from the phase change memory material from conducting away therefrom. The voids are formed in pairs, with either a portion of the phase change memory material or the second electrode disposed between the voids.

There are many types of computer memory technologies that are presently used to store computer programs and data, including dynamic random access memory (DRAM), static random access memory (SRAM), erasable programmable read-only memory (EPROM), and electrically erasable programmable read only memory (EEPROM), etc. Some memory technologies require electrical power to maintain the stored data (i.e. volatile memory), while others do not (i.e. non-volatile memory). Memory technologies can be read only, write once only, or repeatedly read/write.
There is an increasing demand for repeatedly read/write, non-volatile memory. The primary non-volatile memory technology presently used is EEPROM, which utilizes floating gate field effect transistor devices each holding a charge on an insulated "floating gate". Each memory cell can be electrically programmed with a "1" or a "0" by injecting or removing electrons onto or from the floating gate. However, EEPROM memory cells are getting more difficult to scale down to smaller sizes, are relatively slow to read and program, and can consume a relatively large amount of power.
Phase change memory devices have also been known for some time. These devices use materials that can be electrically switched (programmed) between different structured states that exhibit different electrical read-out properties. For example, memory devices made of a chalcogenide material are known, where the chalcogenide material is programmed between a generally amorphous state that exhibits a relatively high resistivity, and a generally crystalline state that exhibits a relatively low resistivity. The chalcogenide material is programmed by heating the material, whereby the amplitude and duration of the heating dictates whether the chalcogenide is left in an amorphous or crystallized state. The high and low resistivities represent programmed "1" and "0" values, which can be sensed by then measuring the resistivity of the chalcogenide material.
FIG. 1A illustrates a conventional memory cell employing chalcogenide phase change memory material. The memory cell includes a layer of chalcogenide 2 disposed between a pair of electrodes 4/6, and over thermal insulator material 8. One of the electrodes (in this case the lower electrode 4) has an increased resistivity making it a thermal heater that heats the chalcogenide layer 2 when an electrical current is passed through the electrodes 4/6 (and through the chalcogenide layer 2). FIG. 1A, for example, shows the chalcogenide 2 in its crystallized form in which the material is highly conductive, and provides a low resistance between electrodes 4/6. When heated by electrode 4 by an amorphousizing thermal pulse, at least a portion 10 of the chalcogenide layer 2 is amorphousized, as shown in FIG. 1B, which increases the electrical resistance of the chalcogenide material. The chalcogenide 2 can by crystallized back to its lower electrical resistance state by applying a crystallization thermal pulse. The electrical resistance of this memory cell can be read using a small electrical current that does not generate enough heat to reprogram the chalcogenide material.
Phase change memory devices have a high program speed (e.g. 200 ns), and exhibit great endurance and program retention. It is even possible to program the phase change memory material with varying degrees of amorphousization and thus varying degrees of resistivity, for selecting from three or more values to store in a single memory cell (multi-bit storage).
There is a constant need to shrink down the size of the memory cells, including reducing the volume of programmed memory material. The power needed to program such memory cells is generally proportional to the cross-sectional area and volume of the memory material being amorphousized/crystallized. Thus, reducing the size and volume of the memory material used in each cell reduces the electrical current and power consumption of the memory device. Smaller sized memory cells also means smaller memory arrays, and more space between memory cells for thermal isolation.
Phase change memory devices are typically made by forming blocks of the memory material in holes etched into silicon materials. Thus, the resolution of the lithographic process used to make such holes dictates the dimensions of the memory material blocks in the memory cell. To shrink the cross-sectional area of the memory material blocks even further, it is known to form spacers inside the holes before the memory material blocks are formed. See for example U.S. Pat. No. 6,511,862, which teaches forming spacers over the heating electrode, and then filling the remaining space with a block of the memory material. While this technique reduces the width of the memory material block immediately adjacent the heating electrode, it also results in the formation of the memory material block over just part of the heating electrode, which inefficiently transfers heat to the block of memory material using only part of the electrode's upper surface. This technique also fails to reduce the overall width of the memory cell, as well as effectively reduce the depth of memory material being programmed.
Shrinking the size of phase change memory cell arrays can also produce undesirable "program disturb" affects, which results when heat generated by one phase change memory cell affects the programming of phase change memory material in an adjacent memory cell. The program temperature of chalcogenide material can be as high as approximately 350° C. Well known insulators used in most CMOS fabs (e.g. silicon oxide, silicon nitride, ILD, etc.) do not provide sufficient thermal isolation in some applications to prevent the programming of one memory cell from inadvertently affecting the resistance of phase change memory material in an adjacent memory cell.
There is a need for a method and memory cell design that increases the heating efficiency of the memory cell, increases the thermal isolation between memory cells, while reducing the size of the memory cells and the amount of memory material "programmed" by the heating process.

Phase change memory device employing thermally insulating voids and sloped trench, and a method of making same


A document processing system may include at least one document processing device for performing document processing jobs, and a controller connected to the at least one document processing device. The controller may be for determining whether to restrict document processing jobs from being performed by the at least one document processing device with a job attribute based upon a job attribute control parameter. If a document processing job is to be restricted based upon the job attribute control parameter, the controller may also be for determining whether to override the restriction based upon a job attribute override parameter different than the job attribute control parameter.

With the advancement in document printing devices over the past several years, users now have access to advanced printing options that formerly were available only through specialized print shops. For example, multi-function devices (MFDs) with optical scanning and printing capabilities are now available that can be connected to a computer network to not only allow printing of documents generated by computers connected to the network, but also printing of documents that are scanned on the scanner. Moreover, such MFDs may also allow for advanced job attributes to be selected for print jobs, such as color printing, binding, and different paper sizes from different paper trays or a manual feed point.
However, with this increased functionality also comes increased costs. Color copies can be significantly more expensive that traditional black and white copies, particularly in the case of color laser copiers. Thus, it may not always be desirable for an organization to give its employees or system users unfettered access to relatively expensive job attributes, as this may impose a significant increase in printing costs from unessential use of the enhanced attributes. Yet, different users within an organization may have a legitimate need for use of the enhanced job attributes, but individually authorizing the use of such resources on a case-by-case basis may be particularly burdensome and likely untenable in larger organizations where numerous print jobs are performed.
As such, certain attempts have been made to provide some flexibility as to when enhanced job attributes, such as color copying, are permitted, to reduce unessential or unauthorized resource use. By way of example, in a brochure entitled "HP color access control features" by the Hewlett-Packard Development Company, L.P., Nov. 22, 2005, color access control features that may be used in conjunction with certain HP printers are discussed. Color printing on the select printers may be enabled or disabled by individual users or groups, as well as by specific applications like Web browsers to help prevent users from wasting color on jobs that should be output in black and white. Pre-configured monochrome-only print drivers may also be deployed on the printers, enforced limits may be set on how many pages each user can print and copy for a given job, and color printing may also be limited based on workgroup and departmental needs.
While such color access control capabilities may be helpful, much of this control capability in the above-described approach rests with the individual printers. That is, the device stores a limited number of users or applications for which color is enabled/disabled, for example. Yet, further flexibility and functionality may be desirable for enabling/disabling color printing or other enhanced job attribute features in some applications. Moreover, it may also be desirable to control the use of such attribute with respect to scanning and/or other document processing operations.

Document processing system providing job attribute control and override features and related methods


An ink jet recording method and an ink jet recording apparatus permitting image formation with a high degree of color reproducibility while alleviating the influences of the ink-absorbency of the recording medium and the base color is to be provided. A transfer drum is applied a reaction liquid, and inks of different colors are applied by recording heads to the area applied the reaction liquid to form a coagulated ink image on the transfer drum. Ahead of the step to transfer this coagulated ink image to the recording medium, white ink is applied to at least the area of the transfer drum to which ink dots are to be applied or at least the area to which ink dots are to be applied out of the area of the recording medium to which the coagulated ink image is to be transferred.

1. Field of the Invention
The present invention relates to an ink jet recording method and an ink jet recording apparatus, and more particularly to an ink jet recording method and an ink jet recording apparatus by which an ink image is formed on an intermediate transfer body having an ink-repellent surface layer and that ink image is transferred to a recording medium to achieve recording.
2. Description of the Related Art
Recording systems for image recording apparatuses in current use for recording and outputting computer-drawn images, copied images from printed matters, facsimile images and the like as required by the user include ink jet, electron-photographic, thermal head and dot impact systems.
Of these systems, the ink jet recording system, by virtue of its relatively simple hardware configuration, has many advantages including a low running cost, the ease of reducing the hardware size and color recording/printing, and adaptability to many different recording medium dimensions from card size to large poster size. Because of these advantages, ink jet recording apparatuses are now attracting keen interest. In particular, ink jet printers, which are available in the market at relatively low prices, are found highly suitable for use with personal computers, digital cameras and so forth. The ink jet recording system is used not only in printers but also in output devices for office automation equipment including facsimile machines and copying machines.
Such an ink jet recording method provides low-noise printing systems, among which the main stream consists of a system whereby which ink is directly ejected onto a material to print as a recording medium, which may be a paper, cloth, plastic sheet or the like, according to image signals to print characters, images and so forth (also known as a direct ejection system). Also, the ink jet recording method, which requires no plate in the printing process, can efficiently print even a small number of copies, and is expected also for industrial use, which requires capability of forming images on a wide variety of recording media. However, the direct ejection system, which constitutes the main stream today, cannot satisfy this requirement. Thus, ink jet recording by the direct discharge system is subject to strict constraints on the choice of the recording medium.
One of its specific constraints is the effect of the ink-absorbency of the recording medium.
The predominant constituent of ink used for ink jet recording is liquid. Therefore, differences in ink-absorbency and permeability of the recording medium affect the reproducibility of the image. Especially a recording medium absorbing no liquid (non-ink-absorbent medium) is subject to a phenomenon in which ink droplets printed adjacently become mixed (bleeding) or another phenomenon of earlier impacting ink droplets being drawn by later impacting ones (beading). Therefore image formation is extremely difficult. Even an ink-permeable recording medium, if its liquid-absorbency (ink-absorbency) is low, would be subject to not only beading and/or bleeding but also a phenomenon known as feathering, in which ink permeates along fibers within the recording medium and accordingly oozes along the fibers, resulting in a poor image. Increasing the ink-absorbency of the recording medium would alleviate these problems, but this could invite penetration of ink (to the rear face of the recording medium).
Many attempts to solve these problems have been proposed by what is known as a transfer system, by which an ink image is temporarily formed on an intermediate transfer body by ink jet recording, the viscosity of that ink image on the intermediate transfer body is increased along with the drying of the ink, or the solvent of the ink image is removed, to concentrate the ink, and then the ink image is transferred from the intermediate transfer body to a recording medium (see U.S. Pat. Nos. 4,438,156 and 5,099,256 and Japanese Patent Application Laid-Open No. 62-92849 (1987)). These proposed methods differ from conventional ink jet recording by which an image is formed by printing directly on a recording medium and causing the moisture of the ink to permeate the recording medium. Therefore, they can be effective against feathering.
Incidentally, not only recording paper specifically intended for ink jet recording use but also plain paper commonly used for electrophotographic copying machines is often used as the recording medium for the formation of color images by ink jet recording. Plain paper is produced by many manufacturers, and the quality and hue of even white paper subtly differ from one manufacturer to another. Moreover, recycled paper is in expanding use today, a circumstance that contributes to further increasing hue differences among recording media. In addition, ink jet recording on a wide variety of recording media, including those on which a color and/or a pattern are printed in advance and those having transparent base, has come to be required.
An image formed on one of these diverse recording media is considerably influenced by the color and pattern of that particular recording medium. In view of this problem, it is proposed to use white ink for recording on any non-white recording medium (see Japanese Patent Application Laid-Open No. 2001-253065). More specifically, Japanese Patent Application Laid-Open No. 2001-253065 discloses a technique by which inks of a plurality of colors including white are made ready for use, the level of whiteness of the recording medium is determined, and white ink in addition to color inks (cyan, magenta, yellow and black) is used for image formation on a medium whose level of whiteness is below a specified level (i.e. a non-white medium).
However, the system disclosed by this Japanese Patent Application Laid-Open No. 2001-253065 uses no intermediate transfer body but directly applies color inks for image formation to a recording medium. Therefore it is unsuitable for recording media which are poor in ink absorbency as discussed above. If the method of Japanese Patent Application Laid-Open No. 2001-253065 is applied to, for instance, a low ink-absorbency recording medium, the white ink and color inks will become mixed on the recording medium, and the white portion, which should be an undercoat, will be distorted, hardly serving as an undercoat.
Considering these factors, it is desirable to work out an image formation system that permits white undercoating while using an intermediate transfer body. Such an image formation system is realized by a technique disclosed in Japanese Patent Application Laid-Open No. 2003-25554.
According to this Japanese Patent Application Laid-Open No. 2003-25554, high molecular granules which can be dissolved in, or inflated by the moisture of, ink are formed in advanced on an intermediate transfer body, and droplets of color inks (cyan, magenta, yellow and black) are jetted from an ink jet recording head onto the intermediate transfer body on which the granules are formed to generate a visible image. After forming along with that a white background is formed by jetting white ink onto the non-image portion where this visible image is not generated, the image and the white background are transferred to the recording medium.
However, the technique according to Japanese Patent Application Laid-Open No. 2003-25554, as no white ink is applied to the portion where no visible image is formed, involves a problem that the influences of the color and pattern of the recording medium in the undercoat portion for the visible image cannot be sufficiently alleviated.
As is evident from the foregoing description, no proposal has been made as yet of a technique by which, while making it possible to form an image on a low ink-absorbency recording medium, the influences of the color and pattern of the recording medium in the undercoat portion for the formed image can be sufficiently alleviated. As a consequence, the advantages of the ink jet recording system including printing ease and adaptability to small number of copies printing are not yet fully utilized in industrial applications.

Ink jet recording method and ink jet recording apparatus


A physical identification data (PID) addressing method using a wobble signal, a wobble address encoding circuit, a method and circuit for detecting the wobble address and a recording medium therefor. Groove tracks are classified into odd groove tracks and even groove tracks. Address information indicating physical identification information is phase modulated using wobble signals having a predetermined phase difference between two adjacent groove tracks, and recorded in each groove track so that address information modulated using the wobble signals having the phase difference of 90° between adjacent two groove tracks can be a quadrature phase shift keying (QPSK) signal. Accordingly, a larger amount of data can be recorded on the recording medium, and since an interval in which a wobble signal disappears is not caused, recovery of a wobble clock signal can be advantageously performed.

1. Field of the Invention
The present invention relates to optical recording/playback, and more particularly, to a physical identification data (PID) addressing method using a wobble signal, a wobble address encoding circuit, a method and circuit for detecting the wobble address, and a recording medium in a high density optical recording and reproducing system.
2. Description of the Related Art
Information used for physical location recognition to determine a location to which data is written on a disc in an optical recording and reproducing system is referred to as physical identification data (PID). Generally, PID is address information of a physical sector in a recording and reproducing medium on which data is recorded in units of sectors. This is essential information for recording data at a certain location on a disc and finding the location at a later time.
In other words, PID indicates address information for finding a specified sector to record/reproduce data to/from a certain location, particularly in a recording and reproducing disc, and indicates address information of a sector which is pre-mastered during manufacture of a disc regardless of existence or non-existence of user data. Accordingly, PID is supposed to be resistant to errors and have a structure allowing fast detection in order to exactly and quickly find the location of a sector which data will be recorded on or reproduced from.
Various methods of recording PID on a disc can be largely classified into two methods. One method is recording physical location information on a disc by forming embossed pits as used in a read-only optical disc to allow a certain location on the disc to be detected based on the embossed pits. The other method uses a wobble signal which can be obtained by giving some changes to recording tracks on a disc at a predetermined time interval.
An area, which is provided for performing PID addressing using the former method, that is, using embossed pre-pits, is referred to as a header field, as shown in FIG. 1. According to a digital versatile disc (DVD) specification for rewritable disc (2.6 or 4.7 gigabytes (GB) DVD-random access memory (RAM)) version 1.0, physical location information is recorded at the location of the so called header field, which comprises pre-pits, during manufacture of a substrate. The header field includes a variable frequency oscillator (VFO) area for a phase locked loop (PLL), a PID area to which a sector number is assigned, an ID error detection (IED) area for storing ID error detection information and a postamble (PA) area for setting up an initial state for modulation of data recorded following the header field. In a PID addressing method using pre-pits, such a header field comprising embossed pre-pits is appropriately disposed at the start of a sector to allow a pickup to easily find and move to a desired location using this information. A sector number, sector type and a land track/groove track can be recognized from the addressed information, and even servo control is possible.
In such a PID addressing method using conventional embossed pre-pits, data cannot be recorded in areas in which pits are formed. Therefore, a problem of a decrease in recording density in proportion to the areas where the pits are formed occurs.
To store a large amount of data with a high density, it is necessary to increase a recordable area (a user data area) by decreasing a track pitch and minimizing a non-recordable area (overhead). For this purpose, it is effective to use a wobble signal.
When forming a substrate for a recording disc, grooves are formed along recording tracks on the substrate to allow a certain track to be exactly tracked by a pickup even if data is not recorded on the track. The portions other than the grooves are referred to as lands. Recording methods can be classified into a method of recording data on either a land or a groove and a method of recording data on both the land and the groove. It is more advantageous to use the land and the groove recording method in which data is recorded on both the land and the groove as the density of data increases.
In addition, a method of generating a signal of a specified frequency by varying both walls of a groove to use it as an auxiliary clock signal during recording is used. This signal is referred to as a wobble signal. A wobble signal having a single frequency is also recorded in the substrate of a DVD-RAM disc.
In a PID addressing method using a wobble signal, overhead information such as a PID signal can be recorded by varying a wobble signal having a single frequency, for example, periodically varying the phase or frequency of the wobble signal, during recording. Here, the PID signal embedded in the wobble signal is generally referred to as a wobble address.
Since the conventional PID addressing method using a wobble signal uses the variation of both walls of a groove track in which a wobble will be recorded, as shown in FIG. 2, the method can be used only in discs employing a land recording method in which information is not recorded in groove tracks. In other words, when using changes in both walls of each groove track, address information of two groove tracks at both sides of a land track can be mixed with each other, so that exact information cannot be obtained from the land track. Accordingly, both the addresses of a land track and a groove track cannot be indicated just by using a wobble address formed in the groove track. Therefore, it is difficult to use the conventional method in discs employing a land and groove recording method in which information is recorded in both land and groove tracks.
Although a wobble address is recorded in the side wall of a groove track at the boundary between a land track and the groove track, information of wobbles formed in both walls of the land and groove tracks is simultaneously read when the land and groove recording method of recording information in land and groove tracks is used. Accordingly, a PID signal cannot be exactly recorded or detected when using the wobble addressing method shown in FIG. 2.
To solve this problem, a method of recording a wobble address in only one wall of each groove track is proposed, as shown in FIG. 3. In this wobble addressing method, however, since a wobble signal is generated from only one sidewall of a groove track, the strength of the signal decreases. In addition, since the same signal is read from the groove track and an adjacent land track, additional information for discriminating a land track from a groove track is required.

Physical identification data addressing method using wobble signal, wobble address encoding circuit, method and circuit for detecting wobble address, and recording medium therefor


A method for fabricating a semiconductor device including a contact window formed in an interlevel insulator so as to connect electrodes to an interconnection and to connect impurity diffusion regions to the interconnection is provided. After forming an insulating film whose thickness on a contact region of at least one of the plurality of electrodes, which is to be electrically connected to the interconnection, is smaller than that on at least another one of the plurality of electrodes, which is not to be electrically connected to the interconnection. The interlevel insulator formed on part of the plurality of impurity diffusion regions is etched until a surface of the semiconductor substrate is exposed, and the interlevel insulator on the contact region of at least one of the plurality of electrodes is etched until a surface of the electrode is exposed.

1. Field of the Invention:
The present invention relates to a method for fabricating a semiconductor device, and more particularly to a method for forming a contact window over an impurity diffusion region and an electrode formed on a semiconductor substrate.
2. Description of the Prior Art:
A conventional method for fabricating a semiconductor device is described. A memory cell circuit of a static random access memory (SRAM) of CMOS type, which is one kind of a memory device, is constituted by a plurality of nMOS transistors and pMOS transistors. In a certain transistor among these transistors, it is necessary that an impurity diffusion region thereof is connected to a gate electrode of an adjacent transistor through interconnection. FIG. 4 is a plan view showing part of an example of a memory cell circuit as mentioned above. As shown in FIG. 4, a transistor has a gate electrode 6a and an impurity diffusion region 10. The impurity diffusion region 10 of this transistor is connected to a part of a gate electrode 6b of an adjacent transistor (not shown) through interconnection. Since the interconnection is made on an interlevel insulator, a contact window 15 is formed over the impurity diffusion region 10 and part of the gate electrode 6b. FIGS. 3A to 3C show a method for fabricating the contact window 15 by conventional technique. As shown in FIG. 3A, an isolation region 2 is formed on a silicon substrate 1, and an interlevel insulator 16 including insulating layers 7 and 13 is formed so as to cover the gate electrodes 6a and 6b and the impurity diffusion region 10. The thickness (m) of the interlevel insulator 16 on the impurity diffusion region 10, which should be removed so as to form the contact window 15, is different from that (1) on the gate electrodes 6a and 6b. Thus, when the contact window 15 is formed, it is necessary to etch the interlevel insulator 16 by a thickness of (1) or more. However, when the etched thickness is made (1) or more, the surface of the gate electrode 6b is partially exposed. Therefore, when an interconnection is formed after etching, the gate electrode 6b and the impurity diffusion region 10 are electrically connected to each other. Thus, the formation of the contact window 15 should be made as follows: i.e., in an opening 15a (FIG. 3B), the etched thickness should be (1) or more, and in an opening 15b (FIG. 3C), the etched thickness should be (m) or more and less than (1).
Detailed process will be described as follows. As shown in FIG. 3B, first, a resist pattern 14a having the opening 15a is formed, and the interlevel insulator 16 is etched until the surface of the gate electrode 6b is exposed. Because of this, a first contact window is formed on the gate electrode 6b. Then, as shown in FIG. 3C, a resist pattern 14b having an opening 15b is formed, and the interlevel insulator 16 is etched until the surface of the substrate 1 is exposed. Accordingly, a second contact window is formed on the impurity diffusion region 10.
As described above, according to conventional technique, the contact window 15 is formed in two steps, complicating the process.
Moreover, since an opening is formed in two steps by using different photoresists, it is necessary for the openings 15a and 15b to be designed so as to overlap each other in the region 15c in view of registration error of the lithography technique. In the case where the interlevel insulator 16 is etched using a pattern of the opening 15b after the etching using a pattern of the opening 15a, since the interlevel insulator 16 of the region 15c had already been removed, there is a problem in that the impurity diffusion region 10 of the region 15c will be subjected to significant etching damage.
Moreover, the insulating layers 7 and 13 with a total thickness of (1) are formed on the gate electrodes 6a and 6b. On the inpurity diffusion region 10, the insulating layer 13 alone is formed with a thickness of (m). When the opening 15a is formed and the etching of the interlevel insulator 16 is commenced, the interlevel insulator 16 formed on the impurity diffusion region 10 is removed before the completion of the etching of the interlevel insulator 16 on the gate electrode 6b. Thus, the isolation region 2 is also partially etched until the etching of the interlevel insulator 16 on the gate electrode 6b is completed. Because of this, there is a problem in that the thickness of the isolation region 2 is made partially thin.

Method for producing a semiconductor device


A battery cartridge and kiosk apparatus, system and method, which enables consumers to conveniently exchange depleted rechargeable batteries for fully-charged batteries, and to recycle used primary batteries. The system includes a self-contained, typically automated kiosk designed for high volume battery exchange at low cost, and also includes re-usable battery trays for convenient, safe, and standardized handling and transport of rechargeable consumer batteries. A kiosk of the invented system may also be configured to utilize renewable-energy mechanisms to provide power for operation and/or recharging. Rechargeable batteries are stored and managed in a high-density, simple yet reliable storage rack wherein they are recharged in parallel while preserving long battery life. Batteries may be “keyed” to prevent recharging via third-party charging devices, enabling operating efficiencies and cost reductions.

The U.S. Environmental Protection Agency estimates that consumers in the United States purchase three (3) billion Primary batteries per year. Today, an estimated 80%-90% of these batteries end up discarded in landfills. The website ESHO.com reports that in 1989, over 600 tons of consumer dry-cell batteries were discarded into landfills. These batteries contain zinc, lead, nickel, alkalines, manganese, cadmium, silver, and mercury—heavy metals and other materials which can pose environmental and health hazards. One key reason these batteries are discarded into the standard consumer waste-stream is because of a lack of widely distributed, convenient recycle drop-off stations and the lack of municipal "curbside" recycling support for batteries. Consumers generally do not know where to recycle batteries, or are required to make special "out of the way" trips to central recycling centers—an inconvenient process that faces strong customer resistance.
Today, the standard consumer "retail-available" Primary batteries (e.g., including form factors such as AAA, AA, C, D and 9-volt, etc.) use alkaline chemistry, (http://en.wikipedia.org/wiki/Alkaline_battery). Because these types of batteries are mass produced and the product of continued improvements, consumers have grown to expect a high level of performance, in particular, high energy density (battery capacity). In addition, the batteries are inexpensive, convenient (fully charged when purchased), and readily available world-wide. However, as noted above, single-use are environmentally damaging, and as compared to Secondary batteries, are much more expensive over a typical lifetime of battery use.
Historically, consumer experience with and perception of Secondary batteries has largely been poor. The most common Secondary battery type until recently has been Nickel-cadmium ("NiCad") batteries, (http://en.wikipedia.org/wiki/Nickel-cadmium_battery). These batteries, produced in volumes as high as 1.5 Billion units per year, suffer from numerous major problems—limited energy density, expense, overly-fast self-discharge rate, and "memory." While these batteries have been extensively "embedded" in consumer devices, they are losing ground significantly to new technologies due to such problems. Likewise, consumers have largely abandoned using NiCad batteries as direct replacements for "retail-available" Primary batteries such as AAA, A, C, D and 9-volt batteries. Today, consumers maintain a very poor opinion of Secondary batteries. Manufacturers have all but stopped offering them in retail outlets due to poor consumer acceptance, so consumers have had few convenient options to purchase Secondary batteries.
However, in 2005, Sanyo Corp of Japan introduced consumer/retail oriented Secondary batteries based on new "Low Self Discharge" Nickel-metal Hydride ("NiMH") battery technology (http://en.wikipedia.org/wiki/Nickel-metal_hydride——battery). The capacity, price and usability of this new type of Secondary battery has improved to the point that they are usable and acceptable as a replacement for Primary batteries in the "retail" application, and in some ways outperform Primary batteries. In addition to having similar energy density to alkaline batteries, the new NiMH batteries maintain their charge well on-the-shelf (enabling them to be pre-charged at the factory) and they do not have the "memory" effects that plagued NiCad batteries. These properties solve two of the key problems associated in consumer's minds with Secondary batteries. Additionally, NiMH batteries have somewhat less environmental impact than NiCad or other battery types that contain Cadmium.
However, these new NiMH batteries still have several key problems when compared to retail alkaline Primary batteries. Firstly, they cost more than alkaline batteries on an up-front basis. While the are tens or hundreds of times less expensive over the long-term, because they can be recharged up to 1,500 times, the up-front cost to the consumer for each battery is currently two or three times (or more) higher than that of standard alkaline batteries. In addition, consumers must buy recharging systems to take advantage of the rechargeable nature of the batteries, which imposes an additional up-front cost.
In addition, Secondary batteries require consumers to remove discharged batteries from their appliances/toys, place them into the recharging station, and wait several hours for full recharge cycles. Consumers must create a small battery charging area in their houses, and must buy additional "backup" batteries to have on hand if they want continuous usage of their battery-powered appliances.
U.S. Pat. Nos. 5,544,784, 5,694,019, 6,154,006 and 5,618,644 describe existing battery recharging kiosks and/or recharging circuitry. However, in our opinion, these existing concepts do not provide ease-of-use, mechanical reliability, capacity, safety, tracking and protection mechanisms sufficient to create a viable, reliable, cost-effective solution that meets the needs of consumers. In particular, existing kiosk patents and designs suffer from a number of problems, making them unsuitable to meet consumer needs and not economically viable. As a result, no company has built or deployed such kiosks on a broad scale.
One key problem that must be solved is the lack of capacity in existing kiosks. Kiosks must be able to dispense, recharge, and house a large number of batteries in a small space—to reduce personnel servicing costs and to adequately serve high-volume retails outlets (e.g., Walmart, Costco, etc.). Some current designs using linear storage arrays suffer from mechanical complexity and poor utilization of space. Other designs using gravity-fed or stacking mechanisms have insufficient ability to charge enough batteries quickly enough to consistently serve large volumes of customers—making the systems economically non-viable.
Another key problem is that previous, existing kiosk designs include intake and dispensing of batteries "one at a time." Not only does this approach lengthen the throughput time for a transaction, but it also requires the mechanisms inside a kiosk to directly and individually handle, identify and properly disposition multiple battery form-factors. This in turn requires generically-configured transport mechanisms and/or grasping mechanisms that are unreliable and prone to failure and jamming, and that are too slow in operation to service large numbers of customers.
Another key problem is that household batteries in the AA, AAA, C, D and 9-volt form factors are standardized, and as such, customers of vending machines can easily purchase the batteries and then recharge them at home, using home rechargers. Without a device to prohibit such home recharging, or to make use of a kiosk more advantageous to consumers than is home recharging, kiosk makers cannot recoup the investment in the engineering and manufacturing of automated recharging kiosks. As yet, no kiosks having such advantageous characteristics have been reduced to practice and/or built.
Additionally, due to design limitations, numerous prior art battery charging systems require fast-charging of batteries—dramatically reducing battery life.
Still another deficiency observed in the prior art systems is the ability to place battery recharging kiosks in locations having no access, or unreliable/inconsistent access to public utility power, or where such access is present but the cost of which is prohibitively high. These conditions may restrict the locations where kiosks may be placed to only areas with convenient, reliable, and affordable AC/utility power, and/or alternatively may require previous designs to contain an expensive, heavy, maintenance-prone backup and storage battery.

Battery exchange, recharge and recycle apparatus, system and method


There is provided a multilayer ceramic electronic component including: a ceramic body in which internal electrodes and dielectric layers containing a barium titanate-based compound containing calcium (Ca) are alternately stacked; and external electrodes disposed on outer surfaces of the ceramic body and electrically connected to the internal electrodes. The dielectric layer includes interfacial portions adjacent to the internal electrodes and a central portion disposed between the interfacial portions, the interfacial portion having a calcium (Ca) concentration higher than that of the central portion.

The present disclosure relates to a multilayer ceramic electronic component and a method of manufacturing the same.
Electronic components using a ceramic material, such as a capacitor, an inductor, a piezoelectric element, a varistor, a thermistor, or the like, include a ceramic body formed of the ceramic material, internal electrodes formed in the ceramic body, and external electrodes mounted on surfaces of the ceramic body so as to be connected to the internal electrodes.
Among such electronic components, a multilayer ceramic capacitor is manufactured by stacking cut sheets of paste for forming an internal electrode on which layers of a paste for forming a dielectric layer are disposed in a sheet method, a printing method, or the like, and sintering the stacked cut sheets of paste.
According to the related art, as a dielectric material used in a multilayer ceramic capacitor, or the like, a barium titanate (BaTiO3)-based dielectric material has been commonly used.
As various functions of devices used in fields requiring high degrees of reliability are digitalized and demand therefor is increased, high degrees of reliability are also required in multilayer ceramic electronic components.
Meanwhile, in accordance with the development of multilayer ceramic electronic components, methods of implementing high degrees of capacitance and high degrees of reliability characteristics is emerging as a significant consideration.

Multilayer ceramic electronic component and method of manufacturing the same