A circuit board module has a circuit board, a component mounted to the circuit board, and a heat sink assembly. The heat sink assembly includes a base member having a first edge and a second edge. The base member is configured to operate as a thermal conduit between a first location proximate to the component and a second location distal to the component. The heat sink assembly further includes a first rail member coupled to the base member along the first edge of the base member, a second rail member coupled to the base member along the second edge of the base member, and an actuation mechanism coupled to the base member. The actuation mechanism is configured to move portions of the members toward each other when the base member resides at the first location to fasten the base member to the component.

In general, a heat sink is metallic device that conveys heat from one or more circuit board components (e.g., high speed processors, Field Programmable Gate Arrays, optical transceivers, etc.) into the surrounding air. An air stream generated by a fan assembly then carries the heat away. Such operation enables the circuit board components to operate in a lower temperature range without increasing the likelihood of operating incorrectly and/or sustaining damage.
There are a variety of approaches for a circuit board manufacturer (or supplier) to mount a heat sink to a circuit board component. One conventional approach (hereinafter referred to as the "conventional standoff approach") involves the manufacturer providing mounting holes in circuit board locations surrounding the circuit board component. Under this approach, the manufacturer then installs standoffs (i.e., threaded metallic posts, nuts, and perhaps other loose hardware) on the circuit board through the mounting holes, and places the heat sink over the top of the component, perhaps with thermal transfer material disposed between the top of the component package and the heat sink to facilitate heat transfer therebetween. Next, the manufacturer rigidly secures the heat sink to the standoffs. As a result, when the component is in operation, the heat sink, which is held rigidly in place by the standoffs, conducts heat from the component and dissipates that heat into a neighboring air stream.
Another conventional approach for mounting a heat sink to a circuit board component (hereinafter referred to as the "conventional adhesive approach") involves the manufacturer essentially affixing the heat sink directly to the component package using an adhesive (e.g., tape, glue, combinations thereof, etc.) having a high thermal transfer coefficient. In this approach, the manufacturer applies a pressure sensitive adhesive (PSA) between the circuit board component and the heat sink. The manufacturer then applies pressure to between the component and the heat sink to secure them together. For some adhesives, the manufacturer further applies heat to cure glue-like material within the adhesive and thus more-rigidly secure the heat sink to the component. Accordingly, when the component is in operation, the heat sink, which is held firmly in place by the adhesive, dissipates heat from the component into the surrounding air.

Techniques for attaching a heat sink assembly to a circuit board component


A thin film transistor substrate with an adhesive strength between a semiconductor layer and a source electrode, and between a semiconductor layer and a drain electrode; and an LCD device using the thin film transistor substrate. The thin film transistor substrate includes a substrate, a gate electrode on the substrate, a gate insulating film on the gate electrode, an active layer on the gate insulating film, an ohmic contact layer on the active layer, a barrier layer on the ohmic contact layer. The barrier layer is formed of a material layer containing Ge. A source electrode and a drain electrode are on the barrier layer. The source and drain electrodes are provided at a predetermined interval from each other.

1. Field of the Invention
The present invention relates to a thin film transistor substrate, and more particularly, to a thin film transistor substrate with an invert-staggered structure.
2. Discussion of the Related Art
A thin film transistor is widely used as a switching device of a display device such as a liquid crystal display (LCD) device or an organic light emitting device (OLED).
The thin film transistor comprises a gate electrode, a semiconductor layer, a source electrode and a drain electrode. Based on an arrangement of the electrodes, the thin film transistor may be classified into a staggered structure and a coplanar structure.
In the staggered structure, the gate electrode and the source and drain electrodes are arranged in the upper and lower portions with respect to a semiconductor layer. Meanwhile, the coplanar structure is provided with the gate electrode and the source and drain electrodes arranged in the same plane. Also, the staggered structure may be classified into a normal staggered structure and an invert-staggered structure. In case of the invert-staggered structure, the gate electrode is arranged in the lower portion, and the source and drain electrodes are arranged in the upper portion. In case of the normal staggered structure, the gate electrode is arranged in the upper portion, and the source and drain electrodes are arranged in the lower portion. Generally, the staggered structure, especially the invert-staggered structure allows a decrease in the number of processes and improved interfacial properties, whereby the invert-staggered structure is generally used for the mass production.
Hereinafter, a related art thin film transistor substrate with invert-staggered structure (hereinafter, abbreviated as 'thin film transistor substrate') will be described with reference to the accompanying drawings.
FIG. 1 is a cross section view illustrating a related art thin film transistor substrate.
As shown in FIG. 1, the related art thin film transistor substrate comprises a substrate 10, a gate electrode 20, a gate insulating film 25, a semiconductor layer 30, a source electrode 40a, and a drain electrode 40b.
The gate electrode 20 is patterned on the substrate 10, and the gate insulating film 25 is formed on an entire surface of the substrate 10 including the gate electrode 20.
The semiconductor layer 30 is patterned on the gate insulating film 25. The semiconductor layer 30 comprises an active layer 32 which is not doped with impurity ions, and an ohmic contact layer 34 which is doped with impurity ions. The active layer 32 is formed on the gate insulating film 25, whereby the active layer 32 functions as a charge drift channel. The ohmic contact layer 34 is formed in an interfacial region between the source electrode 40a and the drain electrode 40b, to thereby lower a charge drift barrier.
The source and drain electrodes 40a and 40b are formed on the semiconductor layer 30 while being provided at a predetermined interval from each other.
However, the related art thin film transistor substrate has a problem of low adhesive strength between the semiconductor layer 30 and the source electrode 40a, and between the semiconductor layer 30 and the drain electrode 40b. That is, because the ohmic contact layer 34 of the semiconductor layer 30 is generally formed of amorphous silicon, and the source and drain electrodes 40a and 40b are formed of metal such as copper Cu, the low adhesive strength between the semiconductor layer 30 and the source and drain electrodes 40 and 40b causes deterioration of the thin film transistor.

Thin film transistor substrate and liquid crystal display device using the same


A bottom lead semiconductor package includes a plurality of outer leads, wherein an outer portion of each of the outer leads is downwardly bent, and inner leads extend from a corresponding one of the outer leads respectively and are bent at least once upwardly and folded over onto a corresponding upper surface of the outer leads. A semiconductor chip is attached to an upper surface of each of the inner leads by a nonconductive adhesive, and a plurality of conductive wires or bumps electrically couples the chip to the inner leads. A molding compound seals a portion of the package including the chip, the inner leads and the wires, but externally exposes a downwardly bent portion of each of the outer leads.

1. Field of the Invention
The present invention relates to a chip package, and more particularly, to an improved bottom lead semiconductor package.
2. Background of the Related Art
FIG. 1 illustrates a cross-sectional view of a bottom lead semiconductor package which is disclosed in U.S. Pat. No. 5,428,248, commonly assigned to the same assignee of the present application. The package includes a plurality of leads 2, each including a substrate mounting lead portion 2a, which is mounted at a lower surface of each thereof to a substrate (not shown), and a chip connection lead portion 2b respectively bent upwardly extending from the corresponding substrate mounting lead portion 2a. A semiconductor chip 1 is fixedly attached to respective upper surfaces of the substrate mounting lead portions 2a by an adhesive 3. A plurality of conductive wires 4 electrically connects chip pads 1a on the chip 1 to the chip mounting lead portions 2b. A molded resin compound covering a certain area of the package including the conductive wires 4, the chip 1 and the lead portions 2a, 2b of the leads 2 to form a complete package body 5.
The respective lower surfaces of the substrate connection lead portions 2a are molded but exposed through the lower surface of the package body 5 so that a solder 6 (not shown) may be formed on each of the lower surfaces of the substrate connection lead portions 2a. A substrate connection lead portions 2a are so low so as to be even with the lower surface of the package body 5, which causes various disadvantages. When the lower surface of the package body is fixedly attached to an upper surface of a printed circuit board, heat emission poses a problem. Further, a difference in thermal expansion coefficient between the substrate connection lead portions and the substrate may cause a rupture of the adhered portions. Moreover, when mounted on a printed circuit board, it is very difficult to carry out an external detection for checking a failure, such as a mounting defect.
The above references are incorporated by reference herein where appropriate for appropriate teachings of additional or alternative details, features and/or technical background.

Bottom lead semiconductor package having folded leads


A nozzle and an ear cleaning device are disclosed. The nozzle includes: a main body, where the main body is provided with a first hole portion penetrating in a front-rear direction; and a housing, where the housing is connected to the main body and surrounding a periphery of the main body, the housing is provided with a guide portion and a plurality of drainage portions, the guide portion has an outer diameter gradually increasing from a front end of the main body to a rear end of the main body, the plurality of drainage portions are arranged at intervals in a circumferential direction of the housing, and each of the drainage portions is communicated with the front end of the main body and extends from the front end of the main body toward the rear end of the main body.

Earwax is generated in human ears. If it is not removed in time, it will cause hearing damage. In the past, people usually used cotton swabs or the like to remove earwax. However, the earwax cannot be completely removed using cotton swabs or the like. In view of this, a cleaning spray gun for removing earwax is produced. The known spray guns for ear cleaning usually include a bottle for containing cleaning liquid, a pump for sucking the liquid, a nozzle for being inserted into the human ear and injecting the liquid, and a conduit that connects the pump to the nozzle.
To enable the liquid injected into the ear to flow out, the nozzle of the known cleaning spray gun is generally elongated. However, if the elongated nozzle is operated incorrectly, the nozzle may touch the eardrum, which may cause ear injury.


The invention provides methods and systems for catalytic reforming of a hydrocarbon fuel to produce hydrogen, which may be used as a power source for a fuel cell. In some embodiments, hydrogen is produced by partial oxidation or autothermal reforming of fuel in an oxygen containing gas stream that is rich the majority of the time, with periodic conversion to a lean gas stream for short periods of time to maintain catalytic activity. In one embodiment, hydrogen peroxide is used as the oxidant in an autothermal reforming process. In some embodiments, hydrogen is produced by steam reforming at a low steam to carbon ratio, with a periodic increase in the steam to carbon ratio for short periods of time to maintain catalytic activity.

One common approach to convert a liquid hydrocarbon fuel into hydrogen for use in a fuel cell or other processes is to use autothermal reforming of the hydrocarbon. In this process, the hydrocarbon fuel is reacted with oxygen or air and water vapor at high temperature. The oxygen is combusted with the fuel to supply the energy needed to reach the required temperature and to supply the heat required by the endothermic reforming reaction. The water is added to provide the high steam-to-carbon ratio required by the reforming process. As the molecular weight of the hydrocarbon increases, for example from methane to a liquid hydrocarbon such as gasoline or diesel fuel, the level of steam required to maintain good catalyst activity also increases. Steam reforming of a hydrocarbon produces a mixture of CO and H2 as well as byproducts of CO2 and un-reacted H2O. Usually the CO level is high, requiring conversion to H2 by the water gas shift reaction, equation 1, which typically reduces the CO to about 1% due to the equilibrium limitation at the temperatures employed.CO+H2O═CO2+H2  eq. 1
The remaining CO must then be removed by a selective oxidation reaction with added O2. The level of CO must be reduced to below 10 ppm for use of the product stream containing H2 in a proton exchange membrane ("PEM") fuel cell.
Typical operating temperatures for an autothermal reformer are in the range of 600 to 800° C. With these high operating temperatures, the product gases from the reforming reaction can also exit the reforming section at a temperature of 600 to 800° C. Achieving and maintaining this high temperature represents a sizable portion of the input energy, and effective use of this energy is needed to maintain good fuel processor efficiency. The overall system requirements, including an autothermal reformer reactor, water gas shift reactor, selective CO oxidation reactor, and multiple heat exchangers, results in a system that is large, heavy and difficult to operate.
In general, it is difficult to catalytically reform liquid hydrocarbons to produce CO and H2. Typically, this requires a high steam to carbon ratio to prevent the formation of coke or carbon on the catalyst surface, which will deactivate the catalyst and slow or stop the reforming reaction. While high levels of steam can be introduced into the catalytic reactor, this is not always desirable since it increases cost and for portable systems requires transportation of the extra liquid. The ability to reform liquid fuels becomes even more difficult when the liquid fuel contains sulfur, since the sulfur further deactivates the catalyst and requires even more steam to ameliorate this effect.
There is a need for a more compact and efficient autothermal reforming system for production of hydrogen gas from a hydrocarbon fuel. There is a need in a number of applications for a light and compact system for converting liquid fuels into hydrogen for use in a PEM fuel cell and for other devices and processes requiring hydrogen gas.

Reformer and reforming process for production of hydrogen from hydrocarbon fuel


An intradermal injection device is described which is placed against the skin of a patient and uses a reciprocating needle to inject ink, dye or similar fluid under the patient's skin, usually in a predetermined visible pattern. Unlike prior art devices of this type, however, the present device is readily disassembleable for rapid and thorough cleaning, since it is formed of a plurality of components which fit together through easily separable and cleanable couplings such as overlapping sealed (O-ring interference) fits or by threads. It also has a unique structure which avoids potential contamination of the drive components by having the drive mechanism offset at a substantial angle from the axis of the reciprocating needle and needle drive shaft and also by preferentially including internal fluid passage barriers such as fluid knock-out spaces. The device is preferably formed of metal such as aluminum or stainless steel, and may be electrically or fluid driven.

1. Field of the Invention
The invention herein relates to intradermal injection devices, sometimes referred to as tattooing devices.
2. Description of the Prior Art
There have been intradermal injection or surgical devices for many years. They are commonly used to create decorative tattoos on a person's skin or to form permanent eyelid liners to replace paint-on cosmetic eyelid liners. The devices inject ink, dye or other marking fluid (referred to hereafter collectively as "ink" for brevity) just under the skin surface, so that the ink is retained within the skin and the color of the ink and the design formed by the ink injection pattern is visible.
The devices normally comprise a skin-penetrating needle which has the capacity to retain some quantity of ink or dye, a mechanism to reciprocate the needle for repeated punctures of the skin to implant the ink under the skin in the desired pattern, and a pen-like housing for the device which the operator holds and uses to guide the device. There are also some sort of off-on switch and power source for the reciprocating drive mechanism. With some devices the operator repeatedly dips the needle into an ink pool to coat the needle, while other devices have built-in reservoirs for the ink from which the ink is fed continuous to the needle.
A number of different devices, particularly with different types of reciprocating needle drives, have been disclosed over the years, and many of them have become commercial products. Typical of well-known devices are those described in U.S. Pat. Nos. 2,840,076 (Robbins: 1976); 4,508,106 (Angres: 1985); 4,644,952 (Patipa et al.: 1987) and 4,798,582 (Sarath et al.: 1989).
All of these devices have one or more disadvantages, however. One of the most significant is their inability to be readily and easily cleaned after use. While cleaning has always been recognized as important, in the past it was not uncommon for some operators to perform relatively low-level cleaning between consecutive uses, with full and thorough cleaning performed only periodically, such as overnight. This was because thorough cleaning required complex and time-consuming disassembly, including removal and retention of small parts, and/or lengthy immersion of the device in cleaning solvents such as acetone or in ultrasonic cleaning devices. Alternatively, a practitioner would have a number of devices, and would use each one only once before disassembling it for a thorough cleaning. Commonly the used devices were collected during the day and then at the end of the day all were disassembled and subjected to overnight cleaning.
Past devices also were structured so that some parts could only be cleaned with difficulty, particularly the drive mechanism. In the prior art devices the drive mechanism was in a direct line with the needle, and the rapid reciprocation of the needle would cause ink, sweat and skin fluids to be drawn into the drive mechanism, from which they could be removed only with great difficulty. Autoclaving was not feasible, because of the thermal degradation of the electrical components of the drive mechanism and the fact that an autoclave sterilizes but does not clean objects, so the time-consuming and difficult disassembly and subsequent ultrasonic or solvent cleaning was normally required.
Contaminated ink pools and ink residue within the devices also posed cleaning problems. Because disassembly was difficult and often incomplete prior to cleaning, inks and ink residues could accumulate in cavities within the device and serve as sources of contamination and disease.
Transmittal of diseases from one patient to another has always been the most important concern about use of the intradermal injection devices. In the past various infections of the skin could be transmitted. Serious as these were, however, they were normally curable if treated promptly. More recently, however, the appearance of the AIDS virus and its tendency to be transmitted primarily through openings and lesions in the skin or other bodily surfaces have transformed the context in which intradermal injection devices are used. Now transmittal of the infectious AIDS virus will result not just in an illness or minor skin infection, but rather with the inevitable death of the infected person. No longer can devices of the prior art type, with their inability to be easily and thoroughly cleaned after even a single use, be tolerated.
In order to accomplish this, however, it will be necessary to make fundamental changes in the basic design of such devices, such that a unit can be readily disassembled, quickly and thoroughly cleaned, and readily reassembled. It is to this end that the present invention is directed.


A bending support having a planar bracing member with a length (L) that is substantially equal to that of the inner diameter (I.D.) of the manifold header that the bending support is ultimately inserted in. Extending perpendicularly from a surface of the bracing member is a pair of bracketing members. The pair of bracketing member and the portion of the planar bracing member therebetween defines a refrigerant conduit clip. The interior surface of the refrigerant conduit clip includes a skived pattern defining a plurality of teeth or protrusions that aids in the attachment of the refrigerant conduit clip onto an internal refrigerant conduit. An aperture located on the planar bracing member between the pair of bracketing member provides an unobstructed path for refrigerant flow to the refrigerant conduit.

Due to their high heat transfer efficiency, automotive style brazed heat exchangers have been modified for residential and commercial air conditioning and heat pump applications. A typical modified automotive heat exchanger includes a pair of manifold headers having a plurality of flat tubes in hydraulic connection therebetween for refrigerant flow from one manifold header to the other. Having uniform refrigerant distribution through the plurality of flat tubes is important for optimal heat transfer. To provide for uniform refrigerant distribution through the core of flat tubes, larger diameter manifold headers are used in conjunction with internal refrigerant distribution and collection conduits in the inlet and outlet manifold headers, respectively.
In order to meet packaging constraints for residential and commercial applications, the larger diameter manifold headers of the modified automotive heat exchanger may be bent about an axis on a mandrel. With larger diameter manifold headers, the bending process has a tendency to deform the wall of the manifold header into a substantially egg-shaped cross sectional profile.
It is desirable to have a bending support adapted for use in the bending of a manifold header of a heat exchanger, in which the bending support prevents stress concentrations from deforming the inner radius of the bend. It is further desirable to have a bending support adapted to hold and maintain the internal refrigerant conduit in a predetermined position within the manifold header during the bending process and which assists in the bending of the internal refrigerant conduit to conform to the bend contour of the manifold.


The subject invention provides microbe-based products, as well as their use to improve oil production and refining efficiency by, for example, remediating the disposable layers in oil tanks and other oil storage units. In preferred embodiments, the microbe-based products comprise biochemical-producing yeast and growth by-products thereof, such as, e.g., biosurfactants. The subject invention can be used to remediate rag layer and/or other dissolved solid layers that form in water-oil emulsions. Furthermore, the subject invention can be used for remediating solid impurities, such as sand, scale, rust and clay, in produced water, flow-back, brine, and/or fracking fluids.

Crude petroleum contains impurities, including water, salts, and solid particulate matter or sediment, that may corrode and/or build up solid deposits in, for example, refinery units. Additionally, oil storage tanks inevitably take in water due to venting and leakage, or through entrained water in the crude oil product itself. Water and other impurities must be removed from the crude oil before it can be processed in a refinery.
Prior to refining, impurities can be removed from crude oil by a process known as "desalting," where hot crude oil is mixed with water and a suitable agent to form a water-in-oil emulsion. The water-in-oil emulsion provides contact between the oil and water so that the salts pass into solution in the water. Another process for reducing the basic sediment and water of crude oil is known as dehydration, which uses, for example, mechanical separation and/or chemical demulsifiers.
Various oil recovery and refining operations generate both oil/water and water/oil emulsions, which are present in drainage water, spills, separator skimmings, tank bottoms and oil recovery traps. Water-in-oil emulsions are viscous, concentrated substances formed when oil comes into contact with water and solids. Metal particles and other solids may be coated with surfactants in such a manner that they are preferentially wetted by the oil rather than the water. When agitation occurs, the water becomes dispersed in the oil as a fine emulsion, and these small water droplets, together with the oil-coated solids, maintain the stability of the emulsion.
The tendency of heavy oils to contain water-in-oil emulsions can be attributed to the presence of certain hydrocarbon molecules found in heavy crudes. Particularly, asphaltenes and high naphthenic acids in heavy crudes tend to form stable, water-in-oil emulsions. The polar naphthenic acids and asphaltenes, along with sub-micron size solids, such as silica, clay, and other minerals, undesirably stabilize heavy crude petroleum emulsions.
During desalting, emulsions are passed into a high voltage electrostatic field inside a closed separator vessel. The electrostatic field coalesces and breaks the emulsion into an oil continuous phase and a water continuous phase. The oil continuous phase rises to the top of the solution to form the upper layer in the desalter. From there, the oil phase is continuously drawn off while the water continuous phase (or "brine") sinks to the bottom and is continuously removed therefrom. In addition, solids present in the crude will accumulate in the bottom of the desalter vessel, sometimes in the form of a sandy sludge layer.
During operation of desalting units, an emulsion phase of variable composition and thickness often forms at the oil-water interface. This emulsion phase may become stable and persist in the desalting vessel. If this emulsion phase (commonly known as the "rag layer") does stabilize and become too thick, the oil continuous phase will contain too much brine and the lower brine phase will contain unacceptable amounts of oil.
In extreme cases, this can result in the emulsion being withdrawn from the top or bottom of the unit. Oil entrainment in the water phase is a serious problem, as it is expensive to remedy outside the unit. When an excessive stable emulsion layer builds up, it becomes necessary to withdraw the rag layer and process it for reintroduction into the refinery.
Emulsion layers are best kept at a consistent amount in the separator in order to maximize the separation capacity and reduce the contamination of the outgoing oil and water. For example, if the emulsion layer becomes too thick, excessive electrical loading, erratic voltage readings, or carryover of water into the oil or loss of oil into the water layer may result.
Traditional remedies include adding chemical emulsion breakers, reducing processing rates, shutting down the desalter to remove the emulsion and increasing the size of the separator tank. Shutdown or reduction of feed rate is uneconomical, while the use of chemical demulsifiers may cause problems in downstream catalytic units sensitive to deactivation by the chemicals. Thus, formation of a stable emulsion rag layer can be detrimental when it leads to early shutdown of the desalting processes and disruption of refinery operation, deactivation of catalysts, and the fouling and/or plugging of process equipment.
In some cases, processes for the separation of water from heavy oil, or dehydration, result in an emulsion rag layer as well. Further processing of the rag layer can be useful to recover the crude oil and discharge the water. Some methods of processing crude oil fluids comprising water and oil emulsions employ the use of mechanical separators and/or gravitation. However, if a thick rag layer has formed in the crude oil fluids, the use of storage tanks and mechanical separators may become difficult and expensive. This is particularly true with emulsions of heavy oil and water produced from a reservoir formation, as such crude oil fluids can contain as much as about 60% water by volume.
Chemical separation methods are also known for dehydrating crude oil. Dehydration chemicals, or demulsifiers, counteract emulsifying agents, allowing the dispersed droplets of the emulsion to coalesce into larger droplets and settle out of the matrix. However, the effectiveness of demulsifiers on heavy crude oils, particularly those containing asphaltenes, naphthenic acids and inorganic solids, can be limited, and supplemental methods of dehydration may be required.
Efficient production of oil depends upon the proper functioning of equipment and the ability of processing operations to extract the maximum amount of usable hydrocarbons from crude oil fluids. Thus, there is a continuing need for effective separation of water, impurities and solid particles from crude oil in areas such as oil production, storage, transportation, and refining. Even further needed are simple, cost-effective methods of removing the rag layer from oil storage tanks and vessels.

Remediation of rag layer and other disposable layers in oil tanks and storage equipment


The present invention provides a high speed, all CMOS comparator utilizing positive feedback and DC voltage clamping. The circuit comprises two source-coupled PMOS transistors with their sources coupled to a current source or a supply voltage. A third PMOS transistor is coupled between the source of the first PMOS transistor and a terminal of a current mirror. The gate of this third PMOS transistor is coupled to the output node in such a way as to provide positive feedback to the circuit. As the negative input voltage becomes lower than the positive input voltage, the current passing through the second PMOS transistor increases and the current passing through the first PMOS transistor decreases. As the output node increases in voltage, the equivalent resistance of the third PMOS transistor increases, thus decreasing the current through the first PMOS transistor. This acts to increase the current being provided to the output node and increases the drive characteristics of the circuit. As a further improvement to the circuit, a voltage-clamping device is included in the design.

1. Field of the Invention
This invention relates to the field of high-speed comparator circuits.
2. Background Art
In data recovery circuits, phase lock loops are utilized to lock onto timing pulses encoded in the data to be recovered to facilitate synchronized data extraction. An integral part of the phase lock loop is a voltage-controlled oscillator (VCO). The linear response of the VCO is a requirement for a stable phase lock loop.
In an all-CMOS VCO implementation, it is difficult to achieve a linear response at high frequency operation. The non-linearity at high frequency is caused by intrinsic delays within the circuit. An all-CMOS VCO is described in the copending U.S. patent application Ser. No. 07/960,534, filed Oct. 13, 1992, assigned to the present assignee, entitled "Linearized and Delay Compensated All-CMOS VCO." A block diagram of an all-CMOS VCO is illustrated in FIG. 1.
Transconductance converter block 101 receives control voltage Vin 100 and provides control currents 113 and 130. These currents are proportional to the control voltage Vin. Control current (I) 130 is provided to VCO core block 202. VCO core block 202 has two output nodes, 217 and 218, that are coupled to a positive voltage supply through capacitors 203 and 204, respectively. Nodes 217 and 218 alternate between two operational states with one node being in a first state while the other node is in the second state. In the first operational state, the output node is charged to the positive voltage supply value and maintains that value until the operational state has changed. In the second operational state, the output node ramps down from the positive voltage supply value at a rate determined by control current 130 (I), until a change of state is triggered. VCO core 202 receives clk+input 215 and clk-input 216 to control the state switching of the output nodes 217 and 218. Output nodes 217 and 218 are coupled to the negative input of comparators 205 and 206, respectively. A trip voltage is provided to the positive inputs of comparators 205 and 206 on line 225. Comparators 205 and 206 are coupled to the "set" and "reset" inputs, respectively, of set/reset flip-flop 207. S-R flip-flop (latch) 207 provides Q and Q* outputs which represent clk+215 and clk-216 output signals, respectively. Signals 215 and 216 represent the oscillating output of the voltage-controlled oscillator system.
When node 217 is in the ramp down state and reaches the trip voltage value, comparator 205 outputs a high pulse to the set input of latch 207. This causes the output of latch 207 (Q, Q*), to change states from (0, 1) to (1, 0). The clk+ and clk- signals then cause the VCO core 202 to switch the operational states of output nodes 217 and 218. When node 218 ramps down past the trip voltage value, comparator 206 triggers the reset input of latch 207 and causes the output to change state from (1, 0) to (0, 1) causing clk+ and clk- to trigger another cycle.
The half cycle of this VCO block is ideally the time it takes for the ramp voltage to drop from the positive voltage supply value to the trip voltage value. However, once the ramp voltage crosses the trip voltage value, the ramp voltage continues to drop until the comparator and latch can switch the VCO core. Thus, the half cycle of the VCO is the sum of the ramp down time plus the comparator/latch delay. Therefore, the frequency response of this VCO circuit (without the compensation loop) is: ##EQU1## where V is the potential difference between the supply voltage and the trip voltage values, C is the capacitance of capacitors 203 and 204, I is control current 130, and delv is the comparator/latch delay. Thus, the delay of the comparator and latch introduce non-linearity to the frequency-versus-voltage response at high frequencies where the ideal half cycle term CV/I is of the same order of magnitude as the comparator/latch delay delv.
A graph illustrating the frequency versus voltage characteristics of the VCO is illustrated in FIG. 2. The solid line represents the ideal frequency response of the VCO in which the frequency is only a function of the ramp down time of the VCO core (F.sub.OUT =1/(2T.sub.H)). The dashed curve is the uncompensated output of the VCO, which flattens out toward the dashed limit line that is equivalent to F.sub.OUT =1/(2 delv). A phase lock loop, utilizing a VCO with the frequency response described by the dashed curve, cannot be analyzed and may be unstable and/or unable to lock in phase to i this reason, it is desired to minimize the effect of the comparator/latch delay in the VCO circuit.
A prior art CMOS comparator is disclosed in "A 30 MHz Low-Jitter, High-Linearity CMOS Voltage-Controlled Oscillator," by Wakayama and Abidi in the IEEE Journal of Solid State Electronics, Vol. SC-22, No. 6, December, 1987, pp. 1074-1080. The comparator of Wakayama, et al., is illustrated in FIG. 3.
A PMOS transistor M5 is coupled between a positive voltage supply and node 300, with its gate coupled to a negative voltage supply. PMOS transistor M1 is coupled between node 300 and the negative voltage supply, with its gate acting as the positive input terminal 304. PMOS transistor M2 is coupled between node 300 and output node 303, with its gate acting as negative input terminal 306. NMOS transistor M4 is coupled between output node 303 and the negative supply voltage, with its gate coupled to high-impedance node HIZ 302. NMOS transistor M3 is coupled between high impedance node 302 and the negative voltage supply, with its gate coupled to output node 303. NMOS transistor M6 is coupled between output node 303 and the negative voltage supply, with its gate acting as a reset RST input 301.
The comparator of FIG. 3 is referred to as a "positive feedback" comparator. Transistors M3 and M4 are cross-coupled, and therefore transistor M4 should not be strongly turned on. HIZ 302 should have enough voltage to allow transistor M4 to sink one-half the current flowing through transistor M1 when transistor M2 is off. As IN- voltage crosses the IN+ voltage, the current passing through transistor M2 becomes larger than the current passing through transistor M4, the voltage at output node OUT 303 begins to rise and transistor M3 turns on. HIZ node 302 is pulled low via transistor M3, and transistor M4 begins to shut down. The positive feedback takes over and OUT 303 node latches high. The voltage vs. time characteristics of this circuit are shown in FIG. 4.
Lines 410 and 411 on FIG. 4(A) illustrate voltage vs. time characteristics of IN+ and IN- as would occur if this comparator were used in the VCO described above. IN+ represents a stable reference voltage and IN- represents the ramping voltage. IN+ is constant at a voltage VTRIP. Prior to time T1, IN- is stable at a voltage VPOS. At time T1, IN- begins to ramp downwards at a constant rate. At time T2, IN- crosses IN+. At time T6, IN- is charged back up to voltage VPOS.
Lines 412 and 413 of FIG. 4(B) illustrate the voltage vs. time characteristics for HIZ input node 302 and output node 303. Prior to time T3, HIZ node 302 maintains a constant voltage VBIAS generated by external circuitry, and OUT node 303 maintains a voltage consistent with the negative voltage supply value. At time T3, triggered by the crossing of IN- under IN+, OUT begins to rise toward VPOS and transistor M3 begins to turn on pulling HIZ 302 toward the negative voltage supply value. At time T4, HIZ input 302 has been pulled to the negative voltage supply value and transistor M4 has been turned off, causing the output voltage at OUT node 303 to charge rapidly up to VPOS, which it reaches at time T5. At time T6, when IN- crosses back over IN+, the voltage at output node 303 remains at the voltage VPOS because the positive feedback maintains transistor M4 in a high impedance state. At time T7, reset signal RST 301 is asserted by external circuitry (line 414 of FIG. 4(C)). With signal RST asserted, transistor M6 becomes a low impedance path between the output node 303 and the negative voltage supply, thus discharging output node 303. As the output voltage drops toward the negative voltage supply, the impedance of transistor M3 begins to increase, allowing the voltage at HIZ node 302 to increase toward VBIAS. At time T8, reset signal RST achieves its maximum amplitude and output node 303 is completely discharged to the negative voltage supply. This causes transistor M3 to shut off completely, increasing the rate at which HIZ node 302 rises toward VBIAS. At time T9, HIZ node 302 achieves the voltage VBIAS.
There are disadvantages of the comparator design of FIG. 3. For example, VBIAS for high impedance node HIZ 302, must have just enough voltage to enable transistor M4 to sink one-half the current flowing through transistor M1 when transistor M2 is off. Otherwise, if the voltage at HIZ is too large, transistor M4 conducts more current and the circuit will be unbalanced. In other words, for transistor M2 to conduct enough current to begin charging up the output node, IN- will have to be higher than IN+ by an offset voltage determined by the VBIAS offset. If the voltage at HIZ is too low, then the current conducted through transistor M4 will be less and the comparator will begin to switch states when IN- is at a voltage higher than IN+ by a voltage offset determined by the voltage error at HIZ. The comparator is unbalanced if the proper voltage is not maintained.
Secondly, HIZ must be a very high impedance. In fact, to transistor M3, node HIZ must appear to be an open circuit. However, the voltage on HIZ must not drift while transistor M3 is off.
Thirdly, HIZ must have a low capacitance. If the capacitance at node HIZ is high, transistor M3 will take longer to pull HIZ low, thus reducing the effectiveness of the positive feedback in the circuit to shorten the rise time of the comparator output.
Further, the HIZ node must be isolated from signal noise. Since HIZ is a high impedance node, its susceptibility to noise pick-up is very high. Noise on HIZ also affects the offset of this comparator.
Generating the proper HIZ voltage (VBIAS) with a high output impedance and low capacitance, requires a significant amount of circuitry and consumes a significant amount of area on the integrated circuit chip. The HIZ node must also be isolated from noisy signals, thus adding additional constraints on the design.
One technique to minimize the effect of the comparator/latch delay is described in co-pending U.S. patent application Ser. No. 07/960,534, entitled "Linearized and Delay-Compensated All-CMOS VCO", and assigned to the present assignee. This technique utilizes the compensation loop illustrated in FIG. 1.
VCO core block 208 receives control current I on line 113 and clk+ and clk- signals. Outputs 229 and 230 of VCO core 208 are coupled to the positive voltage supply through capacitors 227 and 228. VCO core 208 operates in a similar manner to VCO core 202, thus generating voltage signals at output nodes 229 and 230, which mirror the voltages at nodes 217 and 218, respectively. Track-and-hold circuits 219 and 220 are coupled to output nodes 229 and 230 and also receive, as control signals, clk+ and clk- signals, respectively. These track-and-hold circuits track the voltage at the respective input nodes during the "track" operational state, and then hold the peak voltage value (ramp down minimum value), supplying this peak value to node 212 for the duration of the "hold" operational state. Due to switching circuitry within the track-and-hold circuits, circuits 219 and 220 are only coupled to node 212 while they are in their respective "hold" states. Node 212 provides the held peak value to the negative input of difference amplifier 211 through low-pass filter 210. The difference amplifier 211 compares the filtered peak values with an externally provided reference voltage 224 to generate the trip voltage signal on wire 225. Thus, a compensation loop is formed. The compensation loop alters the trip voltage in such a way that the voltage difference V between the positive voltage supply value and the trip voltage is decreased as the operating frequency increases. Thus, the voltage overshoot of the VCO core caused by the comparator/latch delay is compensated with a corresponding change in the trip voltage. The frequency response of this compensated circuit is: ##EQU2## where N is the gain of difference amplifier 211 and V' is the difference between the supply voltage value and the reference voltage. For a gain of N=10, the linear region of the compensated circuit can be increased by as much as a factor of 11 (depending on method of measurement). This greatly increases the range of the VCO. However, as the altered trip voltage rises closer to the voltage supply value, the noise immunity of the circuit is diminished. Thus, for higher frequency operation, this compensated circuit may experience phase jitter generated by noise from the voltage supply.

High speed threshold crossing detector with reset


In an automatic hitch control system wherein a hitch is raised or lowered in response to operation of a valve, and the valve is controlled by solenoids which are selectively energized by connecting them to ground through switch drivers, a safety disconnect relay is provided for preventing uncommanded motion of the hitch such as might occur if the lead between a solenoid and its driver should be grounded or if the driver should fail in an "on" state. The relay has contacts connected between the solenoids and the positive voltage for operating them. A microprocessor senses hitch position, the position of a quadrant lever and the speed of the tractor carrying the hitch. From the conditions sensed, the microprocessor determines if the tractor is moving, if the hitch is captured, if the hitch is moving and whether the hitch control system is in an open-loop control mode in which manual switches may be used to control hitch movement. If the hitch is not captured, or the hitch control system is in the open-loop mode, and uncommanded downward hitch motion is detected, the microprocessor energizes the safety disconnect relay to disable the hitch valve thereby preventing uncommanded downward motion of the hitch. When the hitch is captured and the control system is in a closed-loop control mode, feedback signals from the hitch act through a closed-loop to maintain the hitch at the position specified by the quadrant lever.

The aforementioned technical paper describes a microprocessor-based automatic draft control system for a three-point hitch. A tillage implement is attached to the hitch and the hitch is mounted at the rear of a tractor having pneumatic tires. A single quadrant lever, located in the tractor cab, is manually moved by the operator to generate position/draft commands which cause raising or lowering of the hitch. Draft sensors sense the draft on the hitch and a position sensor senses the position of the hitch, the sensors producing feedback signals to the microprocessor. The microprocessor responds to the position/draft commands and the feedback signals from the sensors by generating output signals for adjusting the hitch to the position commanded by the quadrant lever. The microprocessor output signals are applied to a solenoid of a closed-center valve, the valve in turn controlling hydraulic flow applied to a lift-cylinder which raises the hitch.
While systems of the type described by Macqueene et al. work quite well, uncommanded movement of the hitch may occur if a valve solenoid is energized through use of a low side driver. That is, if one end of the solenoid is connected to a positive voltage and the solenoid is energized by selectively connecting the other end of the solenoid to ground through a switch (driver) any inadvertent grounding of the wire lead connecting the switch to the solenoid or driver failure in an "on" state causes the solenoid to be energized. This, in turn, causes uncommanded movement of the hitch.
If the system is operating in a closed-loop mode, the feedback signals resulting from the uncommanded movement act through the feedback loop so that the hitch position commanded by the quadrant lever is maintained. However, the closed-loop mode may be aborted so that the operator may use fender mounted switches to control raising or lowering the hitch in an open-loop mode thereby facilitating attachment or removal of an implement from the hitch. Also, at start-up the hitch may not be under closed-loop control because the hitch is not "captured", i.e. at the position commanded by the quadrant lever. If the lead between the valve solenoid and its driver switch should be shorted to ground while the system is in an open-loop mode, uncommanded movement of the hitch will take place. Such movement, of course, could be dangerous.

Draft control system with safety disconnect


A cover for camouflage against electromagnetic radiation. According to the invention, the cover includes a random set of puckered features in relief, these being formed by a camouflage net associated with a flexible dielectric mesh.

Such camouflage blankets are described, for example, in the documents U.S. Pat. No. 4,479,994, U.S. Pat. No. 4,659,602, WO 2004/020931 and WO 1988/01363.
These known camouflage blankets are generally effective against radar detection, but conversely they provide only very low protection against detection by an observation device operating in infrared radiation bands I, II and III.
To solve this problem, it is conceivable to provide, in said known camouflage blankets, a layer treated for infrared concealment, positioned on the side intended to be directed outward from the equipment to be protected. However, the effectiveness of such a layer treated for infrared concealment is very limited for infrared bands I and II when there is sun during the day. This is because, even if the emissivity of said layer is low, the layers behind end up radiating by progressively storing up heat.
In addition, in the case in which (as in the document U.S. Pat. No. 4,479,994) such a camouflage blanket comprises a plurality of superposed layers, at least one of which consists of a flexible panel of a radar absorber able to absorb microwave radar frequencies at least partly, experience has shown that such a layer treated for infrared concealment causes the performance of the radar absorber positioned behind to deteriorate. This phenomenon is probably due to the fact that the infrared treatment requires the use of low emissivity pigments which are at least partly electrically conductive. This protective layer must locally cause a abrupt variation in impedance which is detrimental to the functioning of the radar absorber. This problem is all the more marked, if a lower emissivity complex is desired.

Cover for camouflage against electromagnetic radiation


Z buffer traffic experienced during graphics processing is reduced by using a compression mechanism to reduce the amount of information stored in the z buffer. The compression mechanism may be a delta-based z compression mechanism, which stores deltas in the z buffer rather than actual z values. These deltas may be used at a later time to compute the z values. By storing deltas instead of actual z values, the compression mechanism makes it possible to store significantly less information in the z buffer. By reducing the amount of information stored in the z buffer, less information will be read from and written to the z buffer, which in turn, reduces z buffer traffic. To further reduce z buffer traffic, selected deltas may be stored not in the z buffer but rather in a storage local to a graphics processing mechanism (GPM). Storing selected deltas in local storage obviates the need to read from or write to the z buffer for those deltas. As a result, z buffer traffic is even further reduced.

In three-dimensional graphics processing, a z value is typically maintained for each pixel of a display screen. This z value provides an indication of how "deep" into the display screen the item represented by a pixel resides. For example, suppose that a pixel representing a current item (e.g. a portion of a tree) that is currently being displayed has a z value of Z0. Suppose further that a new item (e.g. a portion of a car) moves into the same pixel space as the current item, and that the new item has a z value of Z1 for that pixel. Since both items are rasterized to the same pixel, it is not possible for the pixel to display both items; thus, a choice has to be made. To make the choice, the z values of the two items are compared. If Z1 is less than Z0 (thereby indicating that the new item is less deep, and hence, is in front of the current item), then the pixel displays the new item, and the z value of the pixel is updated to Z1. On the other hand, if Z1 is greater than Z0 (thereby indicating that the new item is deeper, and hence, is behind the current item), then the pixel displays the current item, and the z value of the pixel is maintained at Z0. Implemented in this manner, the z value associated with a pixel is the z value of the item rasterized to that pixel that has the least depth.
The z values for the various pixels of a display are typically stored in a z buffer. Since there is a z value associated with each pixel, if a display has X horizontal pixels and Y vertical pixels, there will be an X times Y number of z values stored in the z buffer. For high-resolution displays, this can be a very large amount of information. Typically, the z buffer is read from and written to whenever a new display screen is generated. Given the large amount of information stored in the z buffer, these read and write operations can lead to enormous amounts of traffic between the z buffer and a graphics processing unit (GPU) which uses the information in the z buffer to generate display screens. It has been observed that this high traffic volume leads to slower processing performance. Consequently, to improve system performance, it is desirable to reduce z buffer traffic.
Some prior attempts have been made to reduce z buffer traffic. These efforts have led to the development of such methodologies as hierarchical z, two-pass rendering, and image-based z compression. Due to various reasons, however, such as low compression ratios, low efficiency, and limited application (e.g. application only to buffer reads and not writes), these methodologies have failed to yield satisfactory results. As a result, a mechanism, which reduces z buffer traffic more effectively, is needed.

Mechanism for reducing Z buffer traffic in three-dimensional graphics processing


An integrated image reject mixer (150) generates precise quadrature components using highly matched local-oscillator (LO) path and intermediate frequency (IF) path resistor-capacitor (RC) phase shifting networks (131, 138). Because the LO signal from a local oscillator (127) has a constant amplitude, a phase detector (136) feedback loop easily maintains an accurate ninety-degree phase difference between the quadrature LO signals (122, 124) from the LO path phase shifting network (131). Because the two phase shifting networks are matched, the feedback control signal (137) from the phase detector (136) can also be used to maintain an accurate ninety-degree phase difference between the quadrature IF signals (123, 128) from the IF path phase shifting network (138) despite the dynamically-varying amplitude of the IF signal. Thus, this image reject mixer uses only components that may be easily integrated into an integrated circuit.

Conventional radio receivers implement a mixer for frequency conversion of a signal from a desired frequency to an intermediate frequency. The intermediate frequency is the difference between an incoming carrier frequency and the local-oscillator frequency. These radio receivers, however, have to attenuate an undesired spurious response due to the fact that the mixer will convert two frequencies, the desired frequency and its image frequency, to the intermediate frequency. Generally, tuned filtering and careful selection of the intermediate frequency are used to reduce this undesired response.
An alternate way to reduce the spurious image response uses an image reject mixer. Image reject mixer frequency converters usually generate two signals, each with a desired signal component and an image signal component. The two desired signal components are in phase and the two image signal components are 180 degrees out of phase. When the two signals are summed together, the desired signal components add and the image signal components cancel. Generation of these phase-shifted image signals is typically accomplished with balanced-to-unbalanced transformers (baluns), tuned circuits, hybrid couplers, or surface acoustic wave (SAW) technology, none of which can be easily implemented on an integrated circuit (IC) without using an expensive trim process.
The inability to integrate an image reject mixer on an IC increases the number of components in the receiver, increases the size of the receiver and its production costs, and restricts the overall design of the printed circuit board used for the device. Thus, there is a need for a frequency conversion mixer that rejects the spurious image response yet can be integrated in an IC.


Methods and apparatus allowing a choice of Least Frequently Used (LFU) or Most Frequently Used (MFU) cache line replacement are disclosed. The methods and apparatus determine new state information for at least two given cache lines of a number of cache lines in a cache, the new state information based at least in part on prior state information for the at least two given cache lines. Additionally, when an access miss occurs in one of the at least two given lines, the methods and apparatus (1) select either LFU or MFU replacement criteria, and (2) replace one of the at least two given cache lines based on the new state information and the selected replacement criteria. Additionally, a cache for replacing MFU cache lines is disclosed. The cache additionally comprises MFU circuitry (1) adapted to produce new state information for the at least two given cache lines in response to an access to one of the at least two given cache lines, and (2) when a cache miss occurs in one of the at least two given cache lines, adapted to determine, based on the new state information, which of the at least two given cache lines is the most frequently used cache line.

Caches are used to speed up accesses to recently accessed information. During a read from main memory, a copy of the read information will also be stored in the cache. When the processor next accesses the information, the cache will generally supply the information (assuming that the information is still in the cache), instead of having a read performed of main memory to determine the information. This speeds access time to the information, as the memory used in a cache will typically be on the order of ten to hundreds of times faster than the memory used in the main memory of a computer system. With increased speed generally also comes increased cost, area, complexity, and power demands. Consequently, caches are highly optimized to work efficiently in the intended computer environment.
Caches are generally organized into two portions, namely a cache data array and a directory. The cache data array stores information from main memory, while the directory contains items such as the main memory addresses to which the information belongs.
A "hit" in the cache occurs when the information being addressed from main memory already exists in the cache. A hit means that the information can be read from the cache and no read is performed to main memory. A "miss" occurs when the information being addressed from main memory is not in the cache. A read is performed to main memory to obtain the information, and a copy of the information is also stored in the cache.
The cache memory generally contains "lines" of information. Each line typically contains information from more than one memory address in main memory. Caches are created this way because it is commonly assumed that if information at one main memory address is used, information at addresses near the original address will also be used. Therefore, lines in the cache contain information from multiple main memory addresses.
Caches generally use some cache line replacement technique to lessen the likelihood that main memory will be accessed. A common cache line replacement technique is called a Least Recently Used (LRU) technique. The LRU cache line replacement technique attempts to determine which line in a cache is the least recently used and to replace the least recently used information with information being read from main memory. The directory typically contains data which is used to determine which lines in the cache are the least recently used.
Although LRU cache line replacement techniques are beneficial in order to update lines in a cache, a need still exists for additional cache line replacement techniques.

Cache with selective least frequently used or most frequently used cache line replacement

International Business Machines Corporation


A method for tracing an instrumented program on a system during booting, including loading object code defining enabling information into a property file associated with a tracing framework, rebooting the system, processing the property file to enable the tracing framework, wherein enabling the tracing framework comprises creating an anonymous consumer state, and tracing the instrumented program using the enabled tracing framework.

Analyzing the dynamic behavior and performance of a complex software system is difficult. Typically, analysis of a software system is achieved by gathering data at each system call and post-processing the data. The following is a brief description of conventional tracing frameworks.
Conventional tracing frameworks are typically composed of various independent software modules. The primary source of information accessed by the conventional tracing frameworks is the kernel. The conventional tracing frameworks typically include a trace facility, a trace module, a daemon, and an offline data analysis and processing component. The trace facility gathers information from various components of the kernel and forwards events to the trace module. The trace module subsequently logs the events in its buffer. Periodically, the trace daemon reads the events from the trace module buffer and commits the recorded events into a user-provided file.
The trace facility is an extension to the core kernel facilities. The trace facility provides a unique entry point to all of the other kernel facilities requesting or requiring that an event be traced. Such events are not logged, but instead, the trace request is forwarded to the trace module. If the trace module is compiled as part of the kernel, then the trace module achieves this functionality by registering itself with the trace facility upon system startup. Otherwise, if the trace module is compiled and loaded as a separate module, then the registration takes place when the trace module is loaded.
During the registration process, the trace module provides the trace facility with a call-back function that is called whenever an event occurs. If no trace module is registered, then the traced events are ignored. Furthermore, the registration process provides the trace module with the ability to configure the manner in which the instruction pointer values are recorded upon the occurrence of a system call. Once configured, the kernel browses the stack to find an instruction pointer matching the desired constraints whenever a system call occurs. In summary, the kernel trace facility acts as a link between the trace module and the different kernel facilities.
The trace module stores the incoming event descriptions and delivers them efficiently to the daemon. More specifically, the trace module retrieves additional information for each event occurring in the kernel. This additional information includes the time at which the event occurred and the CPU identifier for the event.
The primary function of the daemon is to retrieve and store the information accumulated by the trace module, typically in a file. The daemon provides the user with a number of options to control the tracing process. In addition to giving the user access to the options available from the trace module, the daemon allows the user to specify the tracing duration. Once the daemon is launched, the daemon opens and configures the trace module, and sets a timer if a time duration was specified. Otherwise, the user terminates the daemon process manually to stop the trace.
During normal operation, the daemon typically sleeps, awaiting a signal to read from the trace module, or timer/terminate events to end tracing. Similar to the trace module, the daemon uses double buffering. When the daemon receives a signal from the trace module, the daemon reads the content of the buffer denoted as the read buffer and appends the content to the content in an associated internal buffer (not shown). Once the internal buffer is full, the contents of the internal buffer is committed to a file and, during this process, a second internal buffer is used to record the incoming data.
To enable processing of the event data, conventional tracing frameworks typically require the state information for the software system state prior to performing the trace. Specifically, the daemon reviews one or more system directories and records the following characteristics for each process: 1) process ID; 2) name; and 3) parent's process ID. The state information is typically retrieved after the configuration of the trace module and prior to the start of the trace. The information retrieved is stored in a file that is later used by the analysis software. Unlike the aforementioned components of the conventional tracing framework described above, the data analysis and presentation software is typically run off-line. The software uses both the initial process state and the trace data files created by the daemon to recreate the dynamic behavior of the system in a particular, observed time interval. Collating and sorting utilities with the software are used to display the stored information at the user-level.
Typically, kernel-level tracing frameworks, such as the one described above, are directed by a user-level program. That is, a user-level program communicates to the kernel-level tracing framework when tracing should be started, what should be traced, how tracing should be enabled, etc. Thus, to perform a tracing activity the system must be booted (or least be running programs) prior to initiating any tracing activity directed by the user-level program.


A dual track handling assembly is provided for refuse collection equipment having a hopper for receiving refuse, which hopper is defined in part by a pair of oppositely disposed sidewalls. The assembly includes a pair of lower tracks, each of which is mounted on a sidewall in a generally parallel disposition to the other. The assembly also includes a pair of upper tracks each of which is mounted on a sidewall in a generally parallel disposition to the other. The pair of lower tracks define a plane that is substantially parallel to a plane defined by the pair of upper tracks. The assembly also includes a pair of lower track shoes which move in the lower tracks and a pair of upper track shoes which move in the upper tracks. The assembly also includes a carrier having a lower track end that is attached to a lower track shoe, an upper track end that is attached to an upper track shoe, and a lower side that is substantially parallel to the tracks within which said lower and upper track shoes are received. The assembly also includes a blade that pivots between an open position and a closed position, a blade actuator, and a packer actuator that moves the upper track shoes in the upper tracks. The assembly also includes a deflector that is substantially parallel to the plane defined by the pair of lower tracks. The lower side of the carrier is adapted to substantially bear against at least a portion of the deflector.

This invention relates generally to devices for moving refuse in refuse collection equipment. More particularly, this invention relates to an improved assembly for moving and packing refuse in an item of refuse collection equipment such as a rear-loading truck.
Many different devices have been used to move refuse from a hopper that is adapted to receive refuse to a storage compartment of a refuse collection truck. Typically, these assemblies comprise a blade for packing refuse, a carrier for moving the blade from an extended to a retracted position, and hydraulic cylinders for moving the carrier and the blade. These conventional assemblies, however, all suffer from a variety of disadvantages. For example, several conventional assemblies use a complicated system of links or links and tracks to move the blade from an open position to a closed position or from an extended to a retracted position. See, e.g., U.S. Pat. Nos. 2,619,216; 3,402,837; 3,681,336; 3,696,951; 3,899,091; and 5,478,188. These assemblies, however, are complicated, costly, and difficult to assemble and disassemble.
Other assemblies have used a pair of single straight tracks to guide the movement of the carrier and the blade. See, e.g., U.S. Pat. Nos. 3,143,230; 3,615,029; and 3,797,680. These assemblies, however, increase the horizontal displacement of the assembly (e.g., the length of the overhang on a refuse truck) and the frictional forces and stress exerted on the track. Also, the single straight track assemblies do not provide the sidewalls of the refuse collection equipment with an optimal amount of structural integrity. In addition, the packer actuator and the track of the single straight track assemblies are not in substantial alignment. As a result, these assemblies tend to direct refuse towards the roof of the storage compartment, and they do not efficiently utilize the force exerted by the packer actuator. Finally, the single straight track assemblies limit the span between the lower shoe of the carrier and the upper shoe of the carrier, thereby increasing the localized stress experienced by the track and the shoes.
Still other assemblies have hydraulic actuators that are mounted outside the sidewall of the refuse collection equipment. See, e.g., U.S. Pat. No. 3,899,091. These assemblies also suffer from disadvantages. Most notably, these assemblies require a slot in the sidewall of the refuse collection equipment in order to connect the hydraulic actuating cylinders to the carrier. The slots in the sidewalls of the equipment allow refuse to pass from the hopper or the storage compartment to the assembly components. This results in damage to the assembly components and may result in the unintentional discharge of refuse through the sidewalls.
Other assemblies have a reciprocating deflector for deflecting refuse from the assemblies. See, e.g., U.S. Pat. No. 3,696,951. These assemblies also suffer from disadvantages. First, these deflectors require complicated and costly reciprocating devices. Often, these deflectors require additional bracing or reinforcement. In addition, these reciprocating deflectors are not adapted to cooperate with the carrier to provide resistance against the forces exerted by packed refuse.
It would be desirable, therefore, if a refuse handling assembly for refuse collection equipment could be provided to pack refuse more efficiently and inexpensively. It would also be desirable if such an assembly could be provided that would reduce the frictional forces and stress experienced by components of the assembly while increasing the structural integrity of the refuse collection equipment. It would also be desirable if such an assembly could be provided that minimizes the exposure of the components of the assembly to refuse and minimizes the unintentional release of refuse from the equipment. It would also be desirable if such an assembly could be provided whereby the hydraulic actuators of the assembly are arranged such that they extend during the packing process. It would also be desirable if such an assembly could be provided that would permit the use of smaller, lighter, less expensive hydraulic actuators to obtain the same packing force as larger, heavier, more expensive actuators used in conventional assemblies. It would also be desirable if such an assembly could be provided to reduce the cycle time of the refuse packing procedure. It would also be desirable if such an assembly could be provided to reduce the horizontal displacement or overhang of the assembly. It would also be desirable if such an assembly could be provided with an increased span between its upper and lower shoe in order to reduce the stress experienced by the components of the assembly. It would also be desirable if such an assembly could be provided that would be easier to assemble, disassemble, maintain and repair.
Accordingly, it is an advantage of the invention to provide a dual track assembly for refuse collection equipment that may pack refuse more efficiently and inexpensively. It also an advantage of the invention to provide an assembly that reduces the frictional forces and stress experienced by the components of the assembly while increasing the structural integrity of the refuse collection equipment. It is also an advantage of the invention to provide an assembly that minimizes the exposure of the components of the assembly to refuse and minimizes the unintentional release of refuse from the equipment. It is another advantage of a preferred embodiment of the invention to provide an assembly having hydraulic actuators that are arranged such that they extend during the packing process. It is still another advantage of the invention to provide an assembly that would permit the use of smaller, lighter, less expensive hydraulic actuators to obtain the same packing force as larger, heavier, more expensive actuators used in conventional assemblies. It yet another advantage of the invention to provide an assembly that reduces the cycle time of the refuse packing procedure. It is another advantage of the invention to provide an assembly that reduces the horizontal displacement of the assembly. It is also an advantage of the invention to provide an assembly having an increased span between its upper and lower shoe in order to reduce the stress experienced by the components of the assembly. It is yet another advantage of the invention to provide an assembly that is easier to assemble, disassemble, maintain and repair.
Additional objects and advantages of this invention will become apparent from an examination of the drawings and the ensuing description.
As used herein, the term xe2x80x9chopperxe2x80x9d refers to that portion of a refuse collection device into which refuse may be deposited.
As used herein, the term xe2x80x9cstorage compartmentxe2x80x9d refers to that portion of a refuse collection device into which refuse may be pushed by a blade from the hopper.
As used herein, the term xe2x80x9cfrontxe2x80x9d, when used in reference to a vehicle, refers to the end of the vehicle where the cab is located.
As used herein, the term xe2x80x9crearxe2x80x9d, when used in reference to a vehicle, refers to the end of the vehicle opposite the front end.
As used herein, the term xe2x80x9csidewallxe2x80x9d, when used in reference to a refuse collection device, refers to a side of the storage compartment and/or hopper that is generally parallel to the direction of movement of the blade. The xe2x80x9csidewallsxe2x80x9d of a storage compartment may be contiguous with side walls of an adjacent hopper.
As used herein, the term xe2x80x9cshoexe2x80x9d, when used in reference to the invention, refers to a wheel mounted on an axle or a shoe or slide that is adapted to move with minimal resistance along the tracks.
The invention comprises a dual track handling assembly for refuse collection equipment having a hopper for receiving refuse. The hopper is defined in part by a first sidewall and an oppositely disposed second sidewall. The assembly comprises a first lower track and a second lower track. Each of the lower tracks has a first end, a second end and a longitudinal axis. The first lower track is mounted on the first sidewall of the hopper, and the second lower track is mounted on the second sidewall of the hopper. The lower tracks are mounted so that the longitudinal axis of the first lower track is generally parallel to the longitudinal axis of the second lower track. The assembly also comprises a first upper track and a second upper track. Each of the upper tracks has a first end, a second end and a longitudinal axis. The first upper track is mounted on the first sidewall of the hopper, and the second upper track is mounted on the second sidewall of the hopper. The upper tracks are mounted so that the longitudinal axis of the first upper track is generally parallel to the longitudinal axis of the second upper track. The longitudinal axes of the first and second lower tracks define a plane that is substantially parallel to a plane defined by the longitudinal axes of the first and second upper tracks.
The assembly also comprises a first lower track shoe which is adapted to be received in the first lower track and to move between the first end and the second end of the first lower track, and a second lower track shoe which is adapted to be received in the second lower track and to move between the first end and the second end of the second lower track. In addition, the assembly comprises a first upper track shoe which is adapted to be received in the first upper track and to move between the first end and the second end of the first upper track, and a second upper track shoe which is adapted to be received in the second upper track and to move between the first end and the second end of the second upper track.
The assembly also comprises a carrier having a lower track end that is attached to a lower track shoe, an upper track end that is attached to an upper track shoe, and a lower side that is substantially parallel to the longitudinal axes of the lower and upper tracks within which the lower and upper track shoes are received. The carrier is adapted to maintain a fixed spaced relationship between the upper track shoe and the lower track shoe as the shoes move in their respective tracks. A blade is pivotally connected to the carrier. The blade is adapted to pivot between an open position and a closed position. A packer actuator is adapted to move the upper track shoes between the first and second ends of their respective upper tracks. A blade actuator is connected to the blade and adapted to pivot the blade between the open position and the closed position. A deflector is mounted between the sidewalls of the hopper so as to be substantially parallel to the plane defined by the longitudinal axes of the first and second lower tracks. The lower side of the carrier is adapted to substantially bear against at least a portion of the deflector when the lower track shoe that is attached to the lower track end moves from the first end of the lower track within which said lower track shoe is received to the second end of the lower track.
In order to facilitate an understanding of the invention, the preferred embodiments of the invention are illustrated in the drawings, and a detailed description thereof follows. It is not intended, however, that the invention be limited to the particular embodiments described or to use in connection with the apparatus illustrated herein. Various modifications and alternative embodiments such as would ordinarily occur to one skilled in the art to which the invention relates are also contemplated and included within the scope of the invention described and claimed herein.

Dual track assembly for refuse collection equipment


An operations architecture for a netcentric computing system including a server connected with a client. The preferred operations architecture includes a software distribution tool, a configuration and asset management tool, a fault management and recovery management tool, a capacity planning tool, a performance management tool, a license management tool, a remote management tool, a event management tool, a systems monitoring and tuning tool, a security tool, a user administration tool, a production control application set and a help desk tool that support the server and the client in the netcentric computing system.

Computer-based business solutions have existed for various different types of transactions since the mid-to-late 1960s. During this time period, the technology focused on the use of batch technology. In batch processing, the business user would present a file of transactions to the application. The computer system would then run through the transactions, processing each one, essentially without user intervention. The system would provide reporting at some point in the batch processing. Typically, the reports would be batch-printed, which, in turn, would be used by the business user to correct the input transactions that were resubmitted along with the next batch of transactions.
In the 1970s, businesses began a transition to on-line, interactive transactions. At a conceptual level, this processing opened up the file of transactions found in batch transactions and allowed the user to submit them one at a time, receiving either immediate confirmation of the success of the transaction or else feedback on the nature of the transaction error. The conceptually simple change of having the user interact with the computer on a transaction-at-a-time basis caused huge changes in the nature of business computing. More important, users saw huge changes in what they could do on a day-to-day basis. Customers were no longer forced to wait for a batch run to process the particular application. In essence, the computer had an impact on the entire work flow of the business user.
Along with the advent of on-line interactive systems, it was equally significant that the systems provided a means for the business user to communicate with others in the business as the day-to-day business went along. This capability was provided on the backbone of a wide area network (WAN). The WAN was in itself a demanding technology during this time period and, because of these demands, telecommunications groups emerged within organizations, charged with the responsibility to maintain, evolve and manage the network over a period of time.
The theme of the 1980s was database management systems (DBMSs). Organizations used and applied database technology in the 1970s, but in the 1980s, they grew more confident in the application of DBMS technology. Because of the advances in network technology, the focus was now on the sharing of data across organizational and application boundaries. Curiously, database technology did not change the fundamental way in which business processing was done. DBMS made it more convenient to access the data and to ensure that it could be updated while maintaining the integrity of the data.
In the 1990s, technology began to shift toward client/server computing. Client/server computing is a style of computing involving multiple processors, one of which is typically a workstation, and across which a single business transaction is completed. Using the workstation, the transaction entered by the user could now be processed on a keystroke-by-keystroke basis.
Furthermore, there was a change in the communications. With client/server, users could communicate with others in the work group via a local area network (LAN). The LAN permitted workstation-to-workstation communications at speeds of 100 to 1,000 times what was typically available on a WAN. The LAN was a technology that could be grown and evolved in a local office with little need for direct interaction from the telecommunications group.
During the late 1990s, the Internet began to receive widespread use by consumers and businesses. In the business world, the Internet has caused the concept of business users to expand greatly because of the way in which computers are now capable of being interconnected. In addition, the cost of computers has dropped to the point that it is affordable for almost every household to own a computer if so desired. As such, a need to expand the reach of computing both within and outside the enterprise, and that enables the sharing of data and content between individuals and applications has developed.
In the mainframe environment, operations tasks are performed by those in the data center who constantly watch monitor, and react to problems with the host or network. Keeping a mission-critical client/server application system available and under control, while providing a high level of service to the end user, is more complex and difficult than in a mainframe environment. Unfortunately, not all organizations are aware of this complexity, as they should be.
When client/server computing first emerged, organizations expected the cost and complexity of operations to be reduced because of reduced administration and because of common operating systems on workstations and servers. Time has shown that client/server environments tend instead to add rather than reduce complexity, therefore increasing operations costs.
More recently, netcentric computing has emerged as the next technology generation which will coexist with host and client/server environments. Again, while the initial hype around netcentric suggested that it would significantly simplify operations, experience is beginning to indicate that netcentric only adds an additional level of complexity through additional processes, tools, and support services, thus creating an environment even more potentially difficult and expensive to manage. The operations architecture now needs not only to keep an organization's internal production systems up and running, but also to maintain production systems that extend to business partners and customers.
The complexity and cost of operations architecture keeps increasing, which suggests a strong need for a structured and disciplined approach to implementation of tools and technologies to support eased operations.

Operations architectures for netcentric computing systems


A magnetic sensor includes a plurality of groups, each group comprising a plurality of magnetic tunnel junction (MTJ) devices having a plurality of conductors configured to couple the MTJ devices within one group in parallel and the groups in series enabling independent optimization of the material resistance area (RA) of the MTJ and setting total device resistance so that the total bridge resistance is not so high that Johnson noise becomes a signal limiting concern, and yet not so low that CMOS elements may diminish the read signal. Alternatively, the magnetic tunnel junction devices within each of at least two groups in series and the at least two groups in parallel resulting in the individual configuration of the electrical connection path and the magnetic reference direction of the reference layer, leading to independent optimization of both functions, and more freedom in device design and layout. The X and Y pitch of the sense elements are arranged such that the line segment that stabilizes, for example, the right side of one sense element; also stabilizes the left side of the adjacent sense element.

Sensors are widely used in modern systems to measure or detect physical parameters, such as position, motion, force, acceleration, temperature, pressure, etc. While a variety of different sensor types exist for measuring these and other parameters, they all suffer from various limitations. For example, inexpensive low field sensors, such as those used in an electronic compass and other similar magnetic sensing applications, generally are Hall effect devices with flux concentrators or anisotropic magnetoresistance (AMR) based devices. In order to arrive at the required sensitivity and reasonable resistances that mesh well with CMOS, the sensing units of AMR sensors are generally on the order of square millimeters in size, while the auxiliary CMOS associated with hall effect sensors can similarly become large and expensive. For mobile applications, such AMR sensor configurations are too costly, in terms of expense, circuit area, and power consumption.
Other types of sensors, such as magnetic tunnel junction (MTJ) sensors and giant magnetoresistance (GMR) sensors, have been used to provide smaller profile sensors, but such sensors have their own concerns, such as inadequate sensitivity and being effected by temperature changes. To address these concerns, MTJ, GMR, and AMR sensors have been employed in a Wheatstone bridge structure to increase sensitivity and to eliminate temperature dependent resistance changes. For minimal sensor size and cost, MTJ or GMR elements are preferred. Typically, a Wheatstone bridge structure uses magnetic shields to suppress the response of reference elements within the bridge so that only the sense elements (and hence the bridge) respond in a predetermined manner. However, the magnetic shields are thick and their fabrication requires carefully tuned NiFe seed and plating steps. Another drawback associated with magnetic shields arises when the shield retains a remnant field when exposed to a strong (˜5 kOe) magnetic field, since this remnant field can impair the low field measuring capabilities of the bridge structure. To prevent the use of magnetic shields, a Wheatstone bridge structure may include two opposite anti-ferromagnetic pinning directions for each sense axis, resulting in four different pinning directions which must be individually set for each wafer, very often requiring complex and unwieldy magnetization techniques.
Increasing the number of sensor elements in an array provides a desired higher signal to noise ratio. However, the sensor elements must be resettable into a known orientation in the event that they should be scrambled by exposure to an external magnetic field. A reset line may create the resetting magnetic field by providing a reset current pulse of short duration. The resistance of the reset line limits the line run length while allowing pulses of sufficient reset current from a fixed voltage overhead and therefore limits the array size. Increasing the density of the sensor elements within an array through processing or optimal sensor layout improves the signal to noise ratio without any additional complication.
Accordingly, it is desirable to provide a magnetoelectronic sensor fabrication method and layout having a high signal to noise ratio for measuring various physical parameters. There is also a need for a simple, rugged and reliable sensor that can be efficiently and inexpensively constructed as an integrated circuit structure for use in mobile applications. There is also a need for an improved magnetic field sensor and method to overcome the problems in the art, such as outlined above. Furthermore, other desirable features and characteristics of the exemplary embodiments will become apparent from the subsequent detailed description and the appended claims, taken in conjunction with the accompanying drawings and the foregoing technical field and background.

Fabrication process and layout for magnetic sensor arrays


A method, computer program, and computer system is provided for asynchronous Network-Based Media Processing (NBMP) request processing. A first function call corresponding to a CreateWorkflow request to an NBMP workflow manager is received. A hypertext transfer protocol (HTTP) status code and a delay value retrieved from a database are returned based on receiving the first function call, and the CreateWorkflow request is performed at a later time after the delay has elapsed, whereby a response to the request is performed asynchronously according to the retrieved delay value. A second function call corresponding to an UpdateWorkflow request to the NBMP workflow manager is received after performing the CreateWorkflow request, and results of performing the CreateWorkflow request are returned based on receiving the second function call, wherein a response to the CreateWorkflow request is provided asynchronously according to the retrieved delay value.

The Network-based Media Processing (NBMP) standard was developed to address fragmentation and offer a unified way to perform media processing on top of any cloud platform and on any IP network. NBMP defines interfaces, media and metadata formats to facilitate instantiating any type of media processing in the network/cloud. NBMP relies on a Workflow Manager, an entity that will typically be virtualized, to start and control media processing. The Workflow Manager receives a Workflow Description from the NBMP Source, which instructs the Workflow Manager about the desired processing and the input and output formats to be taken and produced, respectively.

Asynchronous workflow and task api for cloud based processing