A superconducting cable joint structure is a structure used to joint together superconducting cables used at cryogenic temperature or to joint together a terminal of the superconducting cable and a normal conducting cable, and it includes a joint insulation layer arranged radially outer than a portion connecting the superconducting cables' respective conductors together or the superconducting cable's conductor and the normal conducting cable's conductor together, and at least one coolant path provided at the joint insulation layer to cool the portion connecting the conductors together. The cable cores can have their connection prevented from generating heat to have an increased temperature.

1. Field of the Invention
The present invention relates generally to superconducting cable joint structures and more specifically to effectively preventing a conductor connection from overheating in jointing and thus connecting an end of a core of a superconducting cable to a counterpart conductor.
2. Description of the Background Art
Currently, cities and the like have a tendency to consume increasing amounts of power, and accordingly require larger underground power transmission capacities. Accordingly, a superconducting cable allowing as large a current density as approximately 100 times that of a conventional cable is being developed. This superconducting cable is, as disclosed for example in Japanese Patent Laying-Open No. 2002-140943, structured such that a plurality of cable cores having a superconductor pass through an external casing's internal space having liquid nitrogen or the like flowing therethrough to serve as a coolant layer.
To lay the aforementioned superconducting cable underground, it is necessary to connect together such superconducting cables of a prescribed length. Currently, however, there has not been a method proposed to suitably joint a superconducting cable currently being studied. Japanese Patent Laying-Open No. 7-335358 discloses jointing and thus connecting together a conventional, non-superconducting power cable and a counterpart power cable. More specifically, as shown in FIG. 11, power cables 1 have their respective ends with their respective, exposed conductors 2 abutting against each other and connected together by a conductor connection sleeve 3 externally fitted thereon and furthermore they are externally, circumferentially surrounded by an oil impregnated paper.
However, if the method of jointing conventional power cables 1 together, as shown in FIG. 11, is employed to joint and thus connect together cores of superconducting cables, respectively, conductor connection sleeve 3, which is a normal conductor, and a superconductor will be connected together. This provides an increased value in resistance at a portion connecting the normal conductor and the superconductor together. As a result, an increased quantity of heat is generated and a coolant surrounding the cable cores may bubble and as a result destroy a coolant impregnated paper, and to maintain the cable's superconducting property a refrigerator having a large capacity is required. Furthermore, the increased resistance at the portion connecting the conductor connection sleeve of the normal conductor and the superconductor together, contributes to a reduced current capacity of the superconducting cable in its entirety.

The Tokyo Electric Power Company, Incorporated


A device typically adapted for association with an air diffuser of a ventilation system of a dwelling. The device redirects an air stream from a forced air column received through the diffuser. A novelty item is disposed to depend from structure associated with the base for rotation of the novelty item by the air stream. An operable suspension system includes a magnet assembly and a magnetically attracted bearing element. Desirably, a safety catch is included to maintain the novelty item in proximity to the base in the event of decoupling between the magnet assembly and the bearing element. One preferred base is adapted to form a slip-on fit to a diffuser register of a dwelling's ventilation system. Certain novelty items are sized to provide a self-packaging capability for commercial display. An alternative base is structured to look like furniture, and may include a plurality of internal passageways through which air may selectively be directed. Certain bases may contain a scent source to impart a fragrance to the air discharged therefrom.

1. Field of the Invention
The present invention relates to structures adapted to cause motion in an object to promote visual interest toward that object in an observer. The invention is particularly directed toward structures and object suspension systems adapted to cause motion in a device under the impetus of a forced air stream. Certain preferred embodiments are directed to apparatus that are operated by air transported in forced air heating and/or cooling systems of the type typically installed in dwellings.
2. State of the Art
Commercially available forced air heating and/or cooling systems typically move a stream of air to a plurality of air diffusers to introduce warm or cool air into a dwelling at distributed locations. Such diffusers typically are disposed on the floor at one or more locations around the perimeter of rooms within the dwelling. In certain cases, such as may be found in dwellings with older construction, diffusers may alternatively be disposed on lower portions of certain walls. Diffusers can also be located in ceilings.
In some cases, the location of one or more air diffusers may conflict with a desired arrangement of a room's furnishings. For example, the discharge air stream from an air diffuser disposed in a corner of a floor may substantially be blocked by a desired furniture grouping. The furniture may interfere with a flow of air from the diffuser, resulting in a decrease in heating or cooling efficiency and efficacy.
Air deflectors are commercially available as add-on components; typically being adapted for positioning over a floor diffuser and shaped to direct air towards the center of a room. Such diffuser add-ons may be formed from a clear plastic to decrease their unsightly visual impact. Deflectors of this type may inadvertently be moved from an operable position by a passersby who trip over them. Other causes of mispositioning such deflectors include cleaning, such as vacuuming or mopping, which can dislodge the deflector. Furthermore, the functionality of such deflectors may be compromised by placement of furniture which obstructs the deflector opening, or otherwise interrupts the discharged air stream.
It would be an improvement to provide an add-on air diffuser which may present the pleasing and functional appearance of furniture, and provide an enhanced air path for warm or cool air from the original air diffuser. An additional improvement would optionally scent the discharged air stream. It would also be an improvement to provide a diffuser which can subtly indicate the presence of a discharge air stream. Certain improved diffusers desirably could be arranged to provide variable amounts of air power to drive a flow-indicating curio suspended on a low-friction mounting arrangement. A desirable such curio may use rotation to attract attention, as for use in advertising. A still further improvement would provide an air-driven novelty item having constituent structure operable as a portion of a display package for commercial sale of the novelty item.


The invention provides a method for controlling the width of a plurality of extruded filaments comprising providing a polymer supply and an extrusion die comprising a plurality of extrusion capillaries and a plurality of counterbores allowing fluid communication between the extrusion capillaries and polymer supply, providing an adjustable insert for interrupting fluid communication between the polymer supply and at least one extrusion capillary, providing at least one fluidized polymer, conveying the polymer through the polymer supply, counterbores and extrusion capillaries to extrude a plurality of filaments, and interrupting the fluid communication between the polymer supply and at least one extrusion capillary by adjusting the insert. An apparatus for extruding filaments is also provided, comprising an extrusion die, polymer supply, extrusion capillaries, counterbores allowing fluid communication between the capillaries and polymer supply, and an adjustable insert for interrupting fluid communication between the polymer supply and at least one extrusion capillary.

Many of the medical care garments and products, protective wear garments, mortuary and veterinary products, and personal care products in use today are partially or wholly constructed of extruded filamentary web materials such as nonwoven web materials. Examples of such products include, but are not limited to, medical and health care products such as surgical drapes, gowns and bandages, protective workwear garments such as coveralls and lab coats, and infant, child and adult personal care absorbent articles such as diapers, training pants, disposable swimwear, incontinence garments and pads, sanitary napkins, wipes and the like. Other uses for extruded filamentary web materials include geotextiles and house wrap materials. For these applications extruded filament web materials provide functional, tactile, comfort and/or aesthetic properties that can approach or even exceed those of traditional woven textiles or knitted cloth materials, yet these products must be manufactured at a cost that is consistent with single- or limited-use disposability.
Various types of equipment for making extruded filament web materials by extruding a plurality or curtain of filaments are well known in the art, and are available in a variety of widths such as 1 meter and 2 meter wide filament extrusion dies and as large as 5 meter wide filament extrusion dies. However, where it is desired that the extruded web of filaments produced by such apparatus be less wide than the full extrusion width of the apparatus or extrusion die, the extra width of the thus-produced filamentary web must be trimmed off and either discarded or somehow recycled back into the filament extrusion process. It would be highly desirable to be able to control the extruded width of the filamentary curtain in-process in order to avoid or decrease the waste associated with trimming substantial portions of the width of the product.
Therefore, there is a continuing need for efficient and controllable filament extrusion apparatus and methods for extruding filaments.

Apparatus and method for controlled width extrusion of filamentary curtain


Electrical circuit control devices are affixed to the front of an electronic image display screen, within the image displaying area, to provide instantly changeable labels and other graphics which convey information pertaining to operation of the controls. The control devices may be of any of a variety of types that are variously operated by depressing switch buttons, turning a knob, flexing or tilting a joystick or exerting force against an immovable knob. The control devices have compact and durable constructions which enable the devices to be wholly at the front of the display screen as opposed to extending through openings in a screen. Operator manipulation of the control devices is variously sensed by radio frequency sensors, Hall effect sensors, strain gauge sensors, touch sensitive circuits or electromechanical contacts. A remote control unit controls any of variety of different electronic devices and displays different switch button labels and other graphics during controlling of different ones of the devices. A pivotable earpiece enables the same remote control unit to function as a cellular telephone and a cordless telephone.

Many electrical systems require input of a plurality of different operator initiated control signals each of which controls a different aspect of the operation of the system. Traditionally a separate manually operated control device, such as a switch for example, has been provided for each such aspect. This can result in an undesirably complicated, bulky and costly grouping of control devices and can cause operator error.
More recently this problem has been addressed by providing multi-function control devices. A single control device of this kind is used to control a plurality of different operations of the controlled apparatus and/or to control a plurality of different electrical circuits. Switches which respond to keystrokes at a computer keyboard or to key operations at certain handheld calculators are examples of multi-function controls of this kind. Remote controls which control both a television set and a video cassette recorder are another.
Circuit control devices typically require visible graphics such as labels and/or calibration markings that identify the function of the control, the settings of the control or which provide other information pertinent to operation of the control device. Permanently imprinted graphics situated adjacent to an operator manipulated component of a control device, such as a switch button or a rotary or slidable knob, can cause problems if the control has different functions during different modes of operation. Labels or other graphics that are appropriate for one function of the control device may not be applicable to another. Only a limited number of different imprinted graphics can be fitted into the immediate vicinity of the operator manipulated component and plural graphics at that location can be confusing to an operator.
Electronic image display screens have been situated in the vicinity of circuit controls to provide graphics that can change instantly when the function or setting of a control is changed. Most prior control systems of this kind can display graphics only at a limited portion of the area around a switch button or turnable or slidable knob as the display screen is situated at one side or above or below the button or knob. The display screen has a sizable marginal region which extends around the image display area of the screen that contains structural framing, seals and electrical conductors. Consequently, the graphics cannot be displayed at locations immediately adjacent to the button or knob as would be desirable to assure that an operator associates the graphics with the particular controls to which they relate and to enable precise setting of controls.
In a limited number of instances, switch buttons have been situated within the actual image display area of an electronic image display screen thereby enabling changeable graphics to be displayed in close proximity to the switch buttons. This has heretofore required complication of the internal construction of the screen itself as the switch buttons extend through holes in the screen or are built into the screen itself. Prior controls of this kind have been limited to use of display screens of the segmented electrode type. A screen of that type can present only a very limited range of different graphics.
Locating of circuit controls at the actual image display area of an electronic image display screen has heretofore been confined to the above described construction in which small switch buttons extend within the screen. The advantages of changeable graphics at any desired location around the perimeter of an operator manipulated control member have not been available with other forms of circuit controls.
With regard to a particular type of circuit control device, remote controls which enable control of electrical apparatus from a spaced apart location were originally limited to controlling of a single type of apparatus such as a television receiver for example. Additional remote controls were needed to control other types of electrical apparatus such as a video cassette recorder. More recent remote controls are adapted to control both a television receiver and a video cassette recorder in two different modes of operation of the single remote control. Multiple purpose remote controls of this kind have heretofore required substantially more switch buttons than a single purpose remote control and are bulkier and more confusing to operate. The prior multiple purpose remote controls are limited to control of a small number of different types of apparatus and useful only for remote control operations.
The present invention is directed to overcoming one or more of the problems discussed above.

Multiple purpose controls for electrical systems


Apparatus for controlling the operation of an underground mining system including a continuous miner, a roof bolting machine, a tramming conveyor and a control cab operatively connected to the tramming conveyor. The apparatus includes a master computer processor on the continuous miner and at least one slave computer processor under the direction of the master computer processor for controlling elements of the mining system other than the continuous miner. A pair of parallel data communication highways connect the master computer processor and the slave computer processor and the functional status of the data communication highways is monitored. A radio communication path is provided between the master computer processor and the mining system. The master computer processor operates the mining system in an automatic mining mode of operation when both data communication highways are functional and operates the mining system in a reverse mode of operation if either data communication highway fails to function. In the reverse mode, all mining operations stop and the mining system can be reversed out of a mine hole. The master computer processor operates the mining system in a manual, radio controlled mode of operation if both data communication highways cease to function.

1. Field of the Invention
The invention relates generally to a system for continuously mining coal underground and, more particularly, to such a system having a substantially automatic sequential control for a continuous miner, a combination articulated haulage/tramming conveyor and a roof bolting machine therebetween.
2. Description of the Prior Art
Coal is typically found in substantially horizontal seams extending through rock strata such as limestone, sandstone or shale. Surface mining and underground mining are the primary methods used to mine coal. Surface mining may be strip mining which involves the removal of the overburden by means of a drag line or other earth moving equipment to fully expose the coal seam for recovery. However, strip mining is limited by the depth of the overburden, which eventually makes strip mining impractical. When the depth of the overburden makes strip mining impractical, a large quantity of coal may remain in a seam. Recovery of this coal is accomplished by highwall mining wherein an entry or a hole is initiated at the exposed face of the seam at the highwall, and mining follows the seam inwardly from the highwall. A method and apparatus of mining a highwall are disclosed in U.S. Pat. Nos. 5,364,171; 5,232,269; 5,261,729 and 5,112,111, respectively entitled "Apparatus and Method for Continuous Mining"; "Launch Vehicle for Continuous Mining Apparatus"; "Apparatus for Continuous Mining"; and "Apparatus and Method for Continuous Mining", which are owned by Mining Technologies, Inc. Early highwall mining technology included mobile conveyors such as disclosed in U.S. Pat. No. 4,957,405, entitled "Apparatus for Mining". A control for a continuous miner and a trailing conveyor which may be used in highwall mining is disclosed in U.S. Pat. No. 5,185,935, entitled "Method and Apparatus for Separation Measurement and Alignment System". A combination haulage and tramming conveyor is disclosed in United Kingdom Patent No. 1,373,170, entitled "Plate Conveyor".
When a coal seam is sufficiently deep, underground mining is utilized which often requires a bolter car to insert roof bolts to provide a stable roof above the workers.

Electrical control system for apparatus and method for continuous underground mining


An aircraft structure having properties of an electromagnetic cavity is used to enhance wireless transmission for at least one of wireless data communication and wireless power transmission.

Copper wires are used in aircraft for data communications and power transmission. They are used by aircraft systems such as engine computers and flight controls.
However, copper wires add weight to an aircraft. Adding weight to an aircraft increases fuel consumption, which can increase aircraft operating costs. Adding weight to an aircraft also increases emissions.
Copper wires have other drawbacks. Installing copper wires throughout an aircraft adds a huge burden in terms of installation time and maintenance. In addition, reliability of electrical interconnects is an electromagnetic compatibility (EMC) concern. Over time, as interconnects degrade, they sometimes provide a source of unwanted radiation or a point of susceptibility. This can sacrifice system performance and become a source of electromagnetic interference (EMI).

Wireless data communication and power transmission using aircraft structures having properties of an electromagnetic cavity


A substrate processing apparatus includes a reaction chamber with a structure allowing pressure reduction, a shower head for supplying a processing gas into the reaction chamber including a gas diffusion plate in which through holes are formed, and a substrate support for placing a substrate. Each ones of through holes provided in a peripheral region of the gas diffusion plate is formed so that an area of an inlet thereof is larger than an area of an outlet thereof. With use of the substrate processing apparatus, a processing gas can be supplied uniformly in the gas diffusion plate. Therefore, substrate processing such as film deposition and film etching can be uniformly performed.

1. Field of the Invention
The present invention relates to substrate processing such as film formation performed using a chemical vapor deposition apparatus and fine processing performed using a dry etching apparatus, and more particularly relates to a technique for improving uniformity of processing.
2. Prior Art
In recent years, there has been a trend where the degree of integration of semiconductor integrated circuit devices is further increased whereas the power consumption thereof is further reduced. Meanwhile, costs in semiconductor integrated circuit device fabrication have been reduced by increase in the diameter of semiconductor substrates and the like. In order to reduce pattern dimensions of an element in such a semiconductor integrated circuit device while increasing the diameter of a semiconductor substrate, it is necessary to suppress variation in the thickness of an insulation film which is a member of the semiconductor integrated circuit device in fabrication process steps and to uniformly perform dry etching to an entire surface of the substrate.
FIG. 6 is a cross-sectional view illustrating an exemplary known chemical vapor deposition (CVD) apparatus for forming a thin film such as a silicon oxide film and polysilicon on a semiconductor substrate. With the recent trend of increase in the diameter of semiconductor substrates, the use of such a single-wafer-processing apparatus as the CVD apparatus of FIG. 6 is the mainstream. FIG. 6 shows a thermal reaction type CVD apparatus.
The known chemical vapor deposition apparatus of FIG. 6 includes a reaction chamber 111 for forming a film on a semiconductor substrate 107, a shower head 102 for supplying a source gas 101 used in film formation, a gas inlet 105, connected to upper part of the shower head 102, for introducing the source gas 101 to the shower head 102, a substrate support 104, disposed in the reaction chamber 111, for placing the semiconductor substrate 107, and an outlet 106 connected to the reaction chamber 111 and a pump (not shown) for exhausting gas in the reaction chamber 111.
A gas diffusion plate 108 in which a large number of small through holes 103 for discharging the source gas 101 to the inside of the reaction chamber 111 are provided is attached to a (lower) side of the shower head 102 facing the substrate support 104. The gas diffusion plate 108 forms a hollow portion together with a main body of the shower head 102. The substrate support 104 includes a heater for adjusting a temperature of the semiconductor substrate 107 therein and the semiconductor substrate 107 is disposed on the substrate support 104 so as to face the gas diffusion plate 108.
The gas diffusion plate 108 can be also formed as a united body with the shower head 102. In such a case, however, processing and maintenance of the gas diffusion plate 108 would become complicated. Therefore, the gas diffusion plate 108 is usually a removable separate member.
When a thin film is formed using the known chemical vapor deposition apparatus having the above-described structure, first, the semiconductor substrate 107 is placed on the substrate support 104 in the reaction chamber 11I and is heated to a predetermined temperature. Then, while exhausting the reaction chamber 111 through the outlet 106 using the pump, the source gas 101 which is necessary for forming a film is introduced into the reaction chamber 111 through the gas inlet 105, thereby forming a thin film on the semiconductor substrate 107 in the form of a wafer.
The gas diffusion plate 108 has a disc shape and, in the gas diffusion plate 108, the small through holes 103 with a diameter of about 0.5 mm are formed so as to spread uniformly throughout substantially a whole surface of the diffusion plate 108. As shown in an enlarged view of FIG. 6, the longitudinal section of each of the through holes 103 have the same shape at any point from the gas inlet to the outlet. With the gas diffusion plate 108, the source gas 101 introduced into the hollow portion from substantially center part of the shower head 102 through the gas inlet 105 can be discharged into the reaction chamber 111 so as to be diffused uniformly in the horizontal direction. Therefore, the thickness of a thin film deposited on the semiconductor substrate 107 can be made uniform. A chemical vapor deposition apparatus using the gas diffusion plate is disclosed, for example, in Japanese Laid-Open Publication No. 2000-273638. Moreover, for dry etching apparatuses, a structure of an etching gas diffusion plate formed with improved etching uniformity is disclosed in Japanese Laid-Open Publication No. 6-204181.
However, as the size of elements in the semiconductor integrated circuit devices is further reduced in future and more precise process control is required, it becomes difficult to deposit, using the shower head 102 in the known chemical vapor deposition apparatus of FIG. 6, a film with sufficiently high uniformity of film thickness for fabricating a semiconductor integrated circuit device with high yield.
The through holes 103 are formed substantially throughout a whole surface of the gas diffusion plate 108 with a substantially uniform density. In this case, the source gas 101 is supplied more around inlets of ones of the through holes 103 located in the center part of the gas diffusion plate 108 and less around inlets of some other ones of the through holes 103 located at greater distance from the gas inlet 105 in peripheral part of the gas diffusion plate 108. Thus, it is assumed that the flow rate of a source gas discharged into the reaction chamber 111 varies depending on the locations of the through holes 103 and a nonuniform distribution of the thickness of a thin film is caused depending on the location of the semiconductor substrate 107 placed so as to face the gas diffusion plate 108.
It is desirable that during film formation using the chemical vapor deposition apparatus of FIG. 6, the pressure of the source gas 101 ideally becomes uniform at the whole surface of the gas diffusion plate and the flow rate of gas flowing through the through holes located around the center part of the shower head 102 and the flow rate of gas flowing through the through holes located in the peripheral part are the same. However, in actual fact, the pressure of the source gas 101 in the shower head 102 is lower in the peripheral part than in the center part for the above-described reason and thus the flow rate of gas flowing through the through holes located in the peripheral part becomes lower than the flow rate of gas flowing through the through holes located around the center part. As a result, gas is supplied less in peripheral part of the semiconductor substrate 107 and more around center part of the semiconductor substrate 107 and thus the thickness of a thin film formed on the semiconductor substrate 107 becomes small in the peripheral part of the semiconductor substrate 107.
The technique for improving nonuniformity in a single-wafer-processing apparatus for processing a substrate is disclosed in Japanese Laid-Open Publication No. 6-204181. The disclosed technique is for use in a dry-etching apparatus. According to the disclosed technique, in order to achieve uniform density for a reaction gas flowing from an entire surface of an electrode plate, small through holes are formed in center part of the electrode plate and large through holes are formed in peripheral part of the electrode plate. That is, through holes are formed so that a distribution of the size of the through holes becomes nonuniform. According to the method disclosed in Japanese Laid-Open Publication No. 6-204181, by properly setting a distribution of size of the through holes, etching uniformity can be improved to 3.3%. In general, a maximum etching rate and a minimum etching rate in a wafer are compared to each other and etching uniformity is obtained by using 100×((variation in etching rate)/(average etching rate))/2 (%), i.e., 100×((maximum etching rate−minimum etching rate)/(average etching rate for measurement points))/2 (%). However, to fabricate a fine semiconductor integrated circuit having a dimension of ¼ μm or less, the above-described etching uniformity is not sufficient, and higher uniformity is required. Moreover, it can be assumed that if the technique is used for a gas diffusion plate in a chemical vapor deposition apparatus, uniformity of flow rate distribution of a source gas can not reach a sufficiently high level for fabricating a semiconductor integrated circuit.
In addition, when through holes and the distribution of the through holes are adjusted to improve uniformity of substrate processing by the above-described method, as disclosed in Japanese Laid-Open Publication No. 6-204181, uniformity of substrate processing might be deteriorated to be 10% or more even in the case of fine adjustment. That is, according to the known method, uniformity sensitively varies with respect to adjustment of the through holes and the distribution of the through holes and therefore it is very difficult to achieve uniformity of 3% on an average or higher uniformity.

Substrate processing apparatus and substrate processing method

Matsushita Electric Industrial Co., Ltd.


The present invention provides an anti-diacetylspermine specific monoclonal antibody which satisfies a specific measuring condition in an immunoreaction system between a solid-phased diacetylspermine and the anti-diacetylspermine specific monoclonal antibody, wherein the immunoreaction system comprises a sample diacetylspermine or sample N1-acetylspermidine to inhibit the immunoreaction; and the specific measuring condition is that the 50% inhibition activity against the immunoreaction by the diacetylspermine in the sample is at least 1,000 times as much as the 50% inhibition activity against the immunoreaction by the N1-acetylspermidine in the sample.

Polyamine is a general term for those alkylamines with two or more amino groups. There are four types of polyamines [putrescine (H2N(CH2)4NH2), cadaverine (H2N(CH2)5NH2), spermidine (H2N(CH2)4NH(CH2)3NH2) and spermine (H2N(CH2)3NH(CH2)4NH(CH2)3NH2)] and acetylated forms thereof in the human body.
Relatively recently, it was found that two types of diacetylpolyamines [N1,N8-diacetylspermidine (hereinafter expressed as "DiAcSpd") and N1,N12-diacetylspermine (hereinafter expressed as "DiAcSpm")] are excreted in urine though very small in quantities. While these components occupy only 1.4% and 0.6% of the total polyamine, respectively, in the urine of healthy persons, the ratios of these components remarkably increase in the urine of cancer patients as compared to other polyamine components. Further, it has been shown that these components also have other characteristics of tumor markers (Sugimoto, M. et al., J. Cancer Res. Clin. Oncol., 121, 317-319 (1995); Hiramatsu, K. et al., J. Cancer Res. Clin. Oncol., 123, 539-545 (1997)).
Initially, DiAcSpd and DiAcSpm were quantitatively determined by a method which is a combination of a fractionation measuring system by HPLC and a detection system using enzyme (Hiramatsu, K. et al., J. Biochem., 117, 107-112 (1995)). However, more simple measuring methods have been developed. In particular, with respect to the measurement of DiAcSpm, an ELISA method using a specific antibody was developed recently (Hiramatsu, K. et al., J. Biochem., 124, 231-236 (1998)).
Recently, Fujiwara et al. prepared monoclonal antibodies to DiAcSpm (Japanese Unexamined Patent Publication No. H11-75839). With these antibodies, 50% binding inhibition activity against immunoreaction with DiAcSpm is only about 100 times as much as 50% binding inhibition activity against immunoreaction with N1-acetylspermidine (hereinafter expressed as "N1-AcSpd") and is only about 20 times as much as 50% binding inhibition activity against immunoreaction with N1-acetylspermine (hereinafter expressed as "N1-AcSpm") which is a monoacetylated form of spermine. Since the amount of N1-AcSpd in the urine of healthy persons is about 25 times as much as the amount of DiAcSpm therein, the crossreactivity of the above antibody with N1-AcSpd in the urine of healthy persons is 25 when the crossreactivity of the antibody with DiAcSpm therein is taken as 100. Therefore, the antibody may yield false-positive results. Accordingly, in order to enhance the measuring sensitivity for DiAcSpm, a DiAcSpm-specific monoclonal antibody whose crossreactivities with N1-AcSpd and N8-acetylspermidine (hereinafter expressed as "N8-AcSpd") are still lower is required.


An AC-to-DC power converter that is capable of generating a regulated, isolated DC voltage output from a power factor corrected AC voltage input with improved efficiency. The AC-to-DC power converter is a two-stage power converter including a PFC stage connected in series to a power conversion stage. The PFC stage performs power factor correction using a zero current switching technique, and the power conversion stage includes a zero voltage switched half-bridge converter. The power conversion stage includes a transformer for providing the isolated DC voltage output. The AC-to-DC power converter includes a single feedback control loop for transferring error information from the DC voltage output to the PFC stage, thereby obtaining regulation of the DC voltage output.

The present invention relates generally to AC-to-DC power conversion techniques, and more specifically to a technique for providing a regulated, isolated DC output voltage from a power factor corrected AC input voltage with increased efficiency.
AC-to-DC power converters are known that employ power factor correction techniques to assure low input harmonic current content. For example, a conventional two-stage AC-to-DC power converter comprises a first voltage regulator stage connected in series to a second voltage regulator stage. The first voltage regulator stage includes a power factor corrected front end operative to receive an AC power input, and to convert an AC voltage to a high level regulated DC voltage. The second voltage regulator stage comprises a DC-to-DC power supply section operative to receive the high level regulated DC voltage generated by the first voltage regulator stage, to convert the high level DC voltage to a lower level regulated DC voltage, and to provide the lower level DC voltage as an isolated DC voltage output. To regulate the DC voltages generated by the first and second stages, each stage includes a feedback control loop operative to transfer amplitude (error) information from the voltage output to the respective stage for use in adjusting the regulated DC voltages to the desired amplitude. The conventional two-stage AC-to-DC power converter described above has drawbacks, however, in that the multiple control loops associated with the first and second stages significantly increase the complexity of the power converter, thereby increasing both the size and cost of manufacture of the overall circuit.
It would therefore be desirable to have an AC-to-DC power converter that is capable of generating a regulated, isolated DC voltage output using a simpler control loop configuration. Such an AC-to-DC power converter would have a reduced size and reduced power requirements. It would also be desirable to have an AC-to-DC power converter with improved efficiency.

Highly efficient isolated AC/DC power conversion technique


A display device includes a substrate, light-emitting elements formed on the substrate, a reflective layer disposed between the substrate and the light-emitting elements and reflecting the light emitted from the light-emitting elements. The light-emitting elements each include a transparent layer that contact the reflective layer, a light-emitting layer disposed on the upper surface of the transparent layer, and an electrode layer with transparency disposed on a side of the light-emitting layer. The distance between the reflective layer and the electrode layer in each of the light-emitting elements is set such that a light component of a specific color in the light emitted from the corresponding light-emitting layer is enhanced by interference and emitted from the electrode layer. The light-emitting elements include light-emitting elements in which blue and red light components in the light emitted from the light-emitting layers are simultaneously enhanced and emitted from the electrode layers.

1. Technical Field
The present invention relates to display devices and electronic apparatuses including the display devices.
2. Related Art
To date, devices and methods of extracting light components of a plurality of colors from a single light-emitting layer using optical resonance have been proposed (for example, see Japanese Patent No. 2,797,883). Japanese Patent No. 2,797,883 describes a color display device with a simple structure. However, the thicknesses of transparent electrodes need to be changed in accordance with the emission colors of the pixels, and additional production processes such as etching are required. This leads to an increase in cost.
JP-A-2004-111398 describes a technology using a resonant structure and adjusting of resonant optical path lengths to the least common multiples of the central wavelengths of colors of light-emitting elements. This technology is intended to achieve improvements in chromatic purity and extraction efficiency of light components, which are effects of the resonant structure. Since layers that constitute the resonant structure can be used in common with the light-emitting elements of any color in this technology, the production process can be simplified.
However, the structure described in JP-A-2004-111398 is predicated on the bottom emission type. In the bottom emission structure, the brightness of the emitted light tends to be reduced since the light is emitted through the substrate. Moreover, a large aperture ratio cannot be ensured as compared with the top emission structure since thin-film transistors or wiring lines for driving the light-emitting elements are disposed between the substrate and the light-emitting elements.
Moreover, a translucent half-reflecting film formed of a thin metallic film is disposed between the light-emitting layer and the substrate such that the chromatic purity of light is enhanced by the reciprocation of the light between a cathode layer and the translucent half-reflecting film in this structure. However, it is difficult to produce the translucent half-reflecting film having desired transparency and reflectivity in a uniform manner, and the characteristics of actual products can be unstable when the improvement in the chromatic purity depends only on the translucent half-reflecting film.

Display device for improving chromatic purity


Various semiconductor chip solder bump and underbump metallization (UBM) structures and methods of making the same are disclosed. In one aspect, a method is provided that includes forming a first underbump metallization layer on a semiconductor chip is provided. The first underbump metallization layer has a hub, a first portion extending laterally from the hub, and a spoke connecting the hub to the first portion. A polymer layer is applied to the first underbump metallization layer. The polymer layer includes a first opening in alignment with the hub and a second opening in alignment with the spoke. A portion of the spoke is removed via the second opening to sever the connection between the hub and the first portion.

1. Field of the Invention
This invention relates generally to semiconductor processing, and more particularly to semiconductor chip solder bump structures and methods of making the same.
2. Description of the Related Art
Flip-chip mounting schemes have been used for decades to mount semiconductor chips to circuit boards, such as semiconductor chip package substrates. In many conventional flip-chip variants, a plurality of solder joints are established between input/output (I/O) sites of a semiconductor chip and corresponding I/O sites of a circuit board. In one conventional process, a solder bump is metallurgically bonded to a given I/O site or pad of the semiconductor chip and a so-called pre-solder is metallurgically bonded to a corresponding I/O site of the circuit board. Thereafter the solder bump and the pre-solder are brought into proximity and subjected to a heating process that reflows one or both of the solder bump and the pre-solder to establish the requisite solder joint.
In one conventional process, the connection of the solder bump to a particular I/O site of a semiconductor chip entails forming an opening in a top-level dielectric layer of a semiconductor chip proximate the I/O site and thereafter depositing metal to establish an underbump metallization (UBM) structure. The solder bump is then metallurgically bonded to the UBM by reflow. In a conventional process for forming a UBM, a titanium layer is blanket deposited on a passivation structure. Thereafter a copper plating layer is deposited on the titanium layer. A polyimide layer is next patterned on the copper plating layer. The polyimide layer is patterned in a doughnut shape with a central opening. A solder barrier layer is next plated in the opening. The uncovered copper and titanium layers are etched to leave a round metal shape beneath the doughnut polyimide. The doughnut polyimide can subsequently delaminate.
The present invention is directed to overcoming or reducing the effects of one or more of the foregoing disadvantages.

Semiconductor chip with patterned underbump metallization and polymer film


An arbiter device arbitrating resource requests received at a plurality of input ports is proposed, which comprises an arbiter circuit that selects an input port to which a resource request is to be granted and successively grants a number of resource requests received at the selected input port.

Arbiter devices and arbitration methods are usually employed in situations in which several devices are in competition for a shared resource. Typical examples for such situations, in which arbiter devices are employed, include processor bus systems which connect on chip one or several masters, such as different processors, to one or several slaves, such as internal or external memories or memory controllers, registers, coprocessors or similar, programmable electronic devices in which several applications performed by a processor or several processors attempt to simultaneously access the same resource, or routing data received at several data inputs to one data output, e.g., in a router or data switch. FIG. 1 shows an exemplary arbiter device 1, in which resource requests received at three inputs 2-4 compete with each other for accessing a bus 5. If only a single resource request is received at a time, there is no conflict and the resource request is granted. However, if several requests are simultaneously received or are simultaneously pending at the inputs 2-4, the arbiter device 1 has to select in a fair manner which of the resource requests is to be granted. For this purpose, an arbiter circuit 6 comprised by the arbiter device 1 performs an arbitration method.
Conventionally, the arbitration method performed by the arbiter circuit comprises methods such as First Come First Served (FCFS), Round Robin (RR), or Last Come First Served (LCFS). These methods may further be combined with preemption, i.e., a resource request currently granted is interrupted when another resource request having higher priority is received. The arbitration method employed may be selected as appropriate for the contemplated use of the arbiter device. In Round Robin arbitration, one resource request is successively granted to each of the inputs at which resource requests are received in an alternating or Round Robin fashion. Turning to the exemplary arbiter device of FIG. 1 and assuming that resource requests are received at each of inputs 2, 3 and 4, one resource request received at input 2 will be granted first, then one resource request received at input port 3 will be granted, and subsequently one resource request received at input 4 will be granted. Thereafter, the method is repeated starting at input 2. As may be seen in this example, the Round Robin arbitration may involve frequent changes of an active input, i.e., of the input to which resource requests are granted. The changes of the active input may, in turn, result in an increased latency if the bus 5 is coupled to a device having increasing latency times associated with a change of the master accessing the device.


An aspect of the present invention relates to optical glass, which is oxide glass including cation components in the form of 10 to 40 cation % of P5+, equal to or more than 50 cation % of a combined quantity of Ti4+, Nb5+, W6+, Bi3+, and Te4+, with a cation ratio of a combined content of Ti4+ and Nb5+ to a combined content of W6+ and Bi3+ being equal to or less than 1.3, a combined quantity of B3+, Li+, Na+, K+, Rb+, Cs+, Mg2+, Ca2+, Sr2+, Ba2+, and Zn2+ which amounts to equal to or less than ⅓ of a combined content of Ti4+, Nb5+, W6+, Bi3+, and Te4+, and more than 0 % of Li+, Na+, K+, Rb+, and Cs+ combined, and which has a refractive index of equal to or higher than 2.02.

For achieving a high degree of functionality and compactness in optical imaging systems and optical projection systems, an optical element comprised of optical glass of high refractive index, such as the optical glass described in Japanese Unexamined Patent Publication (KOKAI) No. 2012-91989 and English language family member U.S.2012/142516A1, which are expressly incorporated herein by reference in their entirety, is effective.


A power supply system is provided that can reduce the maximum value of the amount of power per unit time supplied to a load and a power storage portion and that can increase the amount of power stored in the power storage portion. The power supply system (1) includes the power storage portion (11) and a charge-discharge control portion (51) that controls the charge and discharge of the power storage portion (11). The power supply system (1) supplies power to an EV charge portion (311) that is one of power storage portions (31). The charge-discharge control portion (51) charges the power storage portion (11) when a power or a current consumed by the EV charge portion (311) is equal to or less than a predetermined magnitude.

In recent years, the capacity of storage batteries has been greatly increased, and the utilization of storage batteries, for example, for driving electric vehicles such as electric automobiles and electric motor bikes and for storing power consumed in homes, stores, buildings and the like has been examined; it is expected that storage batteries will be wildly used in the future.
Although storage batteries supply power by discharge, it is necessary to perform charge before discharge. Hence, when a storage battery often performs discharge to supply power, it is necessary to often charge the storage battery. For example, in patent document 1, a power supply system is proposed that includes a solar battery and a storage battery which is charged with power generated by the solar battery. In the power supply system described above, when the storage battery is fully charged, the charge is stopped, and the power that has been so far utilized for the charge and generated by the solar battery is instead utilized for cooling the storage battery. In this way, it is possible to decrease the temperature of the storage battery immediately after the full charge and to bring, in a short time, the storage battery into the state where it can be charged, without the waste of the power generated by the solar battery.

Power supply system with controlled power storage

Panasonic Intellectual Property Management Co., Ltd.


Packaged integrated devices and methods of forming the same are provided. In one embodiment, a packaged integrated device includes a package substrate, a package lid, and an integrated circuit or microelectromechanical systems (MEMS) device. The package lid is mounted to a first surface of the package substrate using an epoxy, and the package lid and the package substrate define a package interior. The package lid includes an interior coating suited to good adhesion with the epoxy, and an exterior coating suited to RF shielding, where the materials of the interior and exterior coatings are different. In one example, the interior lid coating is nickel whereas the exterior lid coating is tin.

1. Field of the Invention
The present application relates to integrated device packages and methods for packaging the same.
2. Description of the Related Art
Integrated devices, such as integrated circuit (IC) devices or microelectromechanical systems (MEMS) devices, are often secured within a package for a variety of reasons, including, for example, protection from the environment, radio frequency (RF) shielding, and/or to aid in connecting the devices to a larger circuit. The packaged integrated devices can include a package lid mounted to a package substrate. Depending upon the environment of use, the package should also be durable and withstand impact.
There is a need for improved packaging of integrated devices, including improved RF shielding.


If an exclusive OR circuit itself, a component of a signal delay detecting circuit, has failed to operate properly, a signal delay cannot be detected accurately. A malfunction pre-detecting circuit 12 includes a delay circuit DL to delay input data that is input in parallel to a data input terminal of a flip-flop FF1 provided in a subsequent stage of a flip-flop FF0, a flip-flop FFT that receives output of the delay circuit DL, and a comparator CMP that compares output of the flip-flop FF1 and output of the flip-flop FFT. Test data tv1 and test data tv2 are input to the malfunction pre-detecting circuit 12 in an operation test mode for testing operation of the malfunction pre-detecting circuit 12. The test data tv2 is input to the delay circuit DL. The comparator CMP compares the test data tv1 and output of the flip-flop FFT in the operation test mode.

The present invention relates to semiconductor devices, in particular, a semiconductor device having a function of detecting a malfunction risk caused by, e.g., a signal delay due to temperature rise.
Occasionally, any malfunction may occur in a circuit within a semiconductor device, causing a low resistive short circuit between power supply and ground. In consequence, temperature rises, causing delay in signal transfer in internal circuits.
In order to detect such a signal delay, a signal delay detecting circuit described in, e.g., Patent Document 1 (Japanese Published Unexamined Patent Application No. 2008-256491) includes one or more delay detecting units, each having at least one signal propagation delay circuit (1) and an exclusive OR circuit (C) that receives a signal (B) output from the signal propagation delay circuit (1) and a signal C passed through a signal transfer path branching off from an input section of the signal propagation delay circuit (1) and outputs a signal. Using a digital signal that is output from the exclusive OR circuit (C), a determination is made as to whether or not the signal propagation delay circuit (1) behaves abnormally.


A high-rate Reed-Solomon erasure resilient codes (ERC) system and method for generating and implementing Reed-Solomon erasure-resilient codes for use in high-rate applications. High-rate applications are applications where the number of coded messages is significantly higher (such as an order of magnitude) than the number of original messages. The Reed-Solomon ERC system uses a scalar vector multiplication and addition technique and a direct inversion technique. The direct inversion technique uses specific generator matrices, including a modified Vandermonde Matrix and a Cauchy Matrix, to directly calculate an inverse of the sub-generator matrix of receiving ERC-coded messages. The scalar vector multiplication and addition technique generates high-rate Reed-Solomon codes and performs scalar vector multiplication and addition on the Galois Field for the Reed-Solomon erasure encoding/decoding operations. In effect, the Reed-Solomon codes are “tuned” for use in the high-rate environment.

Erasure-resilient codes enable lossless data recovery notwithstanding loss of information during storage or transmission. Erasure-resilient codes, which are derived from error correction codes, are designed to be tolerant of data loss. Erasure-resilient codes add redundant information to the stored or transmitted data. Thus, erasure-resilient codes take an original message and generate redundant data (or coded messages) from the original message. These coded messages are a mathematical combination of the original message. The original message is encoded into a plurality of encoded messages. If one or more of the encoded messages is lost, it is possible to recover the original message in a lossless manner. In general, adding more coded messages allows lossless recovery of the original message at higher error or data loss rates. However, this also reduces the transmission or storage efficiency of the associated system.
High-rate erasure-resilient codes are block error correction codes with a large coded message space. In other words, high rate means that the number of coded messages is much larger than the number original messages. This allows the high-rate erasure-resilient codes to be used for high error or data loss applications, especially content distribution and backup applications. By way of example, one application is the digital fountain paradigm, where a server multicasts or broadcasts erasure coded messages non-stop to a plurality of clients. Each client may tune in from time to time to receive the coded messages that are being sent at that moment. Another application is the distributed backup, where a file is erasure encoded and stored in a large number of storage units, either locally or in a distributed fashion. During the recovery process, the client attempts to restore the file from the accessible storage units. Yet another application is the distributed content hosting, streaming, or both. In this application, a file or media is distributed to a number of hosting servers, each of which may elect to host a portion of the file or media in the erasure coded form. During the retrieval process, the client locates the hosting servers that are willing to serve and retrieves the erasure coded file or media simultaneously from those servers. In each of the above applications, a file, media, or both are encoded into a large number of distinctive coded messages. During retrieval, the client attempts to use a minimum number of the coded messages that are equal to or slightly larger than the original messages to recover the file or media. The client usually does not have control over what coded messages are available. As a result, the process of distributed content broadcast, backup, hosting, or streaming can be considered as passing the coded messages through an erasure channel with heavy loss, and recovering the messages afterwards.
A number of error correction codes can serve as high-rate error-resilient codes. These codes include the random generation of linear codes (RLC), the low-density parity check (LDPC) codes, turbo codes, LT codes, and Reed-Solomon codes. Among the error correction codes, the Reed-Solomon codes stand out with a number of unique properties. For instance, Reed-Solomon codes are maximum distance separable (MDS) codes. They achieve the maximum channel coding efficiency, and are able to decode the original messages with the exact number of received coded messages. Because the generator matrix of the Reed-Solomon codes are structured, the Reed-Solomon coded message can be identified by the row index, which reduces the overhead needed to identify the coded message. Reed-Solomon codes can be applied to messages with small access granularity (short message and small number of original messages), and are suitable for on demand distributed content hosting/streaming applications.
Reed-Solomon erasure resilient codes are typically used in low-rate applications (such as satellite communications). These codes are not designed to operate in high-rate environments. Although the implementation of the Reed-Solomon error correction codes has been extensively investigated, there are relatively few works on the efficient implementation of the Reed-Solomon codes for high rate error resilient coding application, which bears unique characteristics. For example, in a high-rate erasure resilient coding scenario, the coded messages are generated on demand, just prior to message distribution. This is different from the error correction coding application, where all coded messages are generated at the same time. Another difference is that much more parity messages are generated and received in high-rate erasure resilient coding. Another difference is that low-rate applications have a much larger k number of original messages than the number of encoded messages (n−k). Also, low-rate applications typically do not have a long string of symbols/vectors per original/coded messages. In contrast, in high-rate applications described above, each original/coded message is usually consisted of a long string of symbols that is approximately an order of magnitude larger than k. Thus, existing implementations of Reed-Solomon error correction codes may not work efficiently and quickly in high-rate erasure resilient encoding/decoding operations.
Both the low-rate and high-rate Reed-Solomon codes include a generator matrix that uses the Galois field. However, the low-rate generator matrix has a much different composition than in the high-rate case. For example, when used in a low-rate application (such as in satellite communications), the generator matrix has a large identity matrix on the top part of the matrix. So the generator matrix for low-rate applications is not nearly as full as the generator matrix for high-rate applications. Many technologies used in low-rate applications for fast Reed-Solomon encoding/decoding (such as Fourier transform) do not apply and cannot be used in the high-rate applications.
Therefore, what is needed is system and method that generates and implements Reed-Solomon erasure-resilient codes in high-rate applications in an efficient manner. What is also needed is a system and method that provides tuning of high-rate Reed-Solomon erasure-resilient codes such that they are designed to operate and be used in high-rate applications.

Efficient implementation of reed-solomon erasure resilient codes in high-rate applications


A frame for bracing a gate includes a first and second upright brace having respective outboard edges positioned flush to opposite vertical edges of the gate. First upper and lower cross braces have respective opposite ends received within upper and lower ends of the first and second upright braces. Second upper and lower cross braces respectively have opposite ends abutting upper and lower ends of the first and second upright braces. First and second upper mounting members respectively have outboard ends abutting upper ends of the first and second upright brace member and inboard ends secured to the first and second upper cross braces. First and second lower mounting members respectively have bases abutting lower ends of the first and second upright braces and inboard ends secured to the first and second bottom cross braces. The structure enables mounting of a gate on a non-level surface.

1. Field of the Invention
This invention relates, generally, to gates. More particularly, it relates to gate frame that enables mounting of a gate on a slope.
2. Description of the Prior Art
Conventional gates are designed to be mounted on level ground. Problems appear when the terrain requires that a gate be mounted on a slope.
The standard way of mounting a gate on a slope is to use a gate made of a plurality of vertically oriented slats that may slide at least to some extent with respect to one another and to deform the gate until it fits the slope. For example, the free, swinging end of such a gate may be elevated relative to the hinged end thereof so that the hinged end may be mounted to a gate post at a first level and so that the free end is free to swing at a second level that is elevated with respect to the first level. In the alternative, the free end may be positioned at a lower elevation than that of the first end.
When this method is used, a way must be found to maintain the free end of the gate at its raised or lowered elevation relative to the hinged end. Typically, a board or two is nailed to the gate in an effort to maintain the gate in its distorted configuration. This is a haphazard technique, however, and provides inconsistent results.
What is needed, then, is a structure that consistently maintains the structure of a gate where a second, free end thereof is elevated above or below a first, hingedly mounted end thereof. The needed structure should be easy to use and should provide consistent results.
However, in view of the prior art considered as a whole at the time the present invention was made, it was not obvious to those of ordinary skill in the pertinent art how such a structure could be provided.


The disclosure describes an apparatus for measuring the static and kinetic friction properties of sheet materials. The apparatus comprises a sled, moving table, means for creating and measuring the friction force between sled and table, and lift mechanism which places sled on table, and removes sled from the table. Novel aspects include a lift design which causes the sled to be maintained in positive contact with the force measuring means, friction force creating means which integrate a small displacement static forcing means with a mechanically stiff kinetic drive, and sled construction which securely clamps a flat test-piece on a flat plate.

The measurement of friction force between two flat surfaces is routinely performed using an object of known weight having a flat bottom surface (a "sled"), and a larger, flat, horizontal surface (the "table"). The sled rests on the table with the friction surfaces to be evaluated in contact. A shear force is applied which tends to cause sled and table to slide with respect to one another. The force required to initiate sliding is called the static friction force, the force required to sustain sliding, the kinetic friction force.
While elementary in concept, the actual test is often problematic. It is not uncommon to find that when friction force is evaluated by different test technicians, or on different instruments, significantly different results are obtained. Recent research has shown that friction force can be changed by what appear to be minor differences in the way in which the test is performed, and by inadvertent contamination of the test-pieces by the operator. These findings place stringent new demands on test standards, procedures and instruments to control relevant variables and to prevent the operator from influencing the test results.

Apparatus for measuring static and kinetic friction properties


Techniques to process packets for a wireless network are described. Such techniques may include determining whether a packet received by a radio network controller (RNC) includes control information or payload information. If the packet includes control information, it is sent to a slow path processing module (SPPM). However, if the packet includes payload information, it is sent to a fast path processing module (FPPM).

Next generation wireless networks are moving to packet-based technology to facilitate communication of multimedia information. Although more robust in terms of the type of information carried by the network, the packet processing requirements may in some cases slow down system performance. This may be undesirable, particularly with respect to those applications having a high Quality of Service (QoS) requirement, such as voice communications. Consequently, there may be a need for improved techniques to process packets in a wireless network to communicate multimedia information.


Methods and apparatus are provided for an interconnect system for coupling radio frequency signals from one component to another in a RF system. The interconnect system acts as a coaxial connection. The apparatus comprises an interconnect, a dielectric sleeve, and a conductive elastomeric gasket. The interconnect has a first major surface and second major surface for providing an electrical connection. A through hole is formed in a first component. The dielectric sleeve is placed in the through hole. The interconnect is placed in the dielectric sleeve. The conductive elastomeric gasket is placed in proximity to the through hole contacting the first component and a second component. The RF system is assembled compressing the elastomeric gasket to have intimate contact with the first and second component. The intimate contact electrically connects the first and second component and an electric shield is formed around the interconnect thereby suppressing the reception and transmission of RF signals.

The means in which to interconnect components of a system is often as critical as the components themselves. One such situation is in the connection of components carrying radio frequency signals. The connections themselves can become transmitters and receivers of the radio frequency signals. The problem is exacerbated when the interconnections are in close proximity to one another where the integrity of the information being received could be jeopardized. Other issues such as the number of interconnect, connection reliability over a wide range of environmental factors or the complexity of the components being interconnected are factors that must be weighed in the design of a system.
One application, which has an abundance of these issues, is a communications satellite. A communications satellite operates at extremely high frequencies, for example, 5–20 gigahertz thus making radio frequency coupling a critical issue. Moreover, a communications satellite handles a large number of signals simultaneously yet must be made in the smallest package possible. Along with reducing package size there is a need to reduce the weight of each component that comprises the satellite. From an interconnect perspective; the focus is on increasing connector density, simplification of assembly, part reduction, and improved reliability.
Microwave Integrated Circuits (MIC's) and Monolithic Microwave Integrated Circuits (MMIC's) are modules often used in communication satellites and other devices operating at radio frequencies. Many of the MIC's and MMIC's are custom-built module assemblies composed of microstrip substrates supported by machined Kovar and aluminum parts. These individual module assemblies are grouped together in a machined aluminum chassis to perform more complex functions. The machined aluminum chassis is a complex array of radio frequency circuit cavities, DC wiring channels and precision mounting bosses, typically custom designed for each application. The resulting assembly is complex, expensive, and capable of achieving only those functions, which are designed into it.
Accordingly, it is desirable to provide an interconnect that is suitable for carrying radio frequency signals. In addition, it is desirable to eliminate difficult assembly processes such as soldering in confined areas. Also, it is extremely beneficial to increase interconnect density while reducing radio frequency coupling between interconnect. Furthermore, other desirable features and characteristics of the present invention will become apparent from the subsequent detailed description and the appended claims, taken in conjunction with the accompanying drawings and the foregoing technical field and background.

High frequency and low noise interconnect system


A method for fabricating crown-shaped a capacitor is provided. The method is comprised of the following steps. First, a dielectric layer is formed on a substrate having a pre-formed field effect transistor, then a contact hole which exposes one of the source/drain regions of the field effect transistor is defined and formed. Then a first conductive layer is formed in the contact hole and on the dielectric layer, a crown-shaped photoresist layer is formed by employing a mask comprising a transmission layer, a partial transmission layer, and a non-transmission layer. Next, the pattern on the photoresist layer is transferred onto the first conductive layer to form a crown-shaped conductive layer. Then, a dielectric film is formed on the top of the crown-shaped conductive layer, and a second conductive layer on the top of the dielectric film.

1. Field of the Invention
This invention relates to a method for fabricating capacitors, and more particularly, to a method for fabricating crown-shape capacitors by using partial transmission masks. The method begins by using a partial transmission mask, which contains a partial transmission layer, to form a crown-shaped photoresist, then transfers the pattern of the photoresist onto the crown-shaped lower electrode in a capacitor. The method is designed to fabricate crown-shaped capacitors which have larger surface areas than those of stacked capacitors, in order to improve the capacitance of a capacitor.
2. Description of Related Art
Recently, industry has attempted to raise the storage densities of integrated-circuit memories, in order to increase the amount of data that can be saved in a single chip. The cost of every bit of data stored in high-density memory, which is more integrated, is less than the cost of saving the same data in the lower density memory of prior art, which is less integrated. High-density memory provides a higher storage density, which improves efficiency. A conventional method for improving the integration of an integrated circuit is to downsize part of the circuit structure, such as wiring lines, and transistor gates, and shorten the separation between devices. Downsizing part of the circuit structure normally indicates downsizing the design rules for fabricating integrated circuit devices.
A conventional data storage method for DRAM is to selectively charge and discharge each of a series of capacitors formed on the surface of the semiconductor substrate, wherein the charging state corresponds to logic 1 and the discharging state corresponds to logic 0, or vice versa. The amount of charges stored in a capacitor depends on the surface area of the electrodes of the capacitor. The reading and writing operations of a memory cell are processed by selectively connecting the capacitor to a bit line by using a field effect transistor (FET), and then having charges transferred into or retrieved from the capacitor. A contact is placed between the bit line and the FET to link one of the source/drain electrodes of the FET and the bit line while the capacitor makes contact with the other electrode of the FET. The gate of the FET provides the signal in the word line. Connecting the FET and the lower electrode of the capacitor facilitates the transfer of charges between the bit line and the capacitor.
Applying the downsized design rules to DRAM decreases the substrate surface area provided for forming capacitor surfaces of a DRAM. Furthermore, applying the downsized design rules to the conventional, 2-dimentional design of the capacitor reduces the number of charges that can be stored in a capacitor, i.e. static permittivity. Reducing the permittivity leads to several problems including loss of stored information, because the capacitor is very sensitive to decay mechanisms and charge leakage. Sensitivity to charge leakage results in a DRAM needing a faster refresh rate, which causes another problem in that the memory cell cannot store or retrieve information while the memory cell is being refreshed. Therefore, reducing the permittivity requires either a more complicated design for reading and retrieving information or more sensitive signal amplifiers. Furthermore, the newest DRAM designs require higher permittivity from the tiny surface of a DRAM cell.
Conventionally, the DRAM fabrication process for a capacity less than 1 MB (10.sup.6 bytes) normally uses 2-dimensional capacitors or so-called planar-type capacitors. Since the planar-type capacitor requires a relatively large area on the substrate for storing charges, it is not suitable for a more highly integrated design. For a more highly integrated DRAM having a capacity of 4 MB or greater, a 3-dimensional capacitor such as a stacked-type capacitor is required.
Compared with the planar-type capacitor, a stacked-type capacitor has a relatively high permittivity because the size of the memory cell has been further reduced. However, as the integration of a DRAM towards a DRAM with a capacity of 64 MB, a simple 3-dimensional capacitor can no longer meet the demands placed on it.
One solution is to horizontally extend and stack the electrodes and the dielectric layer of a capacitor to form a fin-type stacked capacitor that increases permittivity by increasing the surface of the capacitor. Information related to forming a fin-type capacity can be found in "3-Dimensional Stacked Capacitor Cell for 16M and 64M DRAMs" [International Electron Devices Meeting, pp592-595, December 1988] by Ema, U.S. Pat. Nos. 5071783, 5126810, and 5206787.
Another solution is to vertically extend the electrodes and dielectric layer of a capacitor to form a so-called crown-shaped capacitor that increases permittivity by increasing the surface area of the capacitor.
A conventional method for fabricating crown-shape capacitor is shown in FIGS. 1A through 1H.
Referring to FIG. 1A, first a FET 102 is formed on the substrate 100, wherein the FET includes a gate 104 and source/drain regions 106 which are formed on the active area of the substrate, and are isolated by field oxide 101. Then, a dielectric layer 108, an etching stop layer 110 and a dielectric layer 118 are formed in sequence on the substrate 100. Chemical vapor deposition (CVD) or borophosphosilicate glass (BPSG) can be employed to deposit a SiO2 layer on the tops of the substrate 100 and etching stop layer 110 with the result that dielectric layers 108 and 118 both include SiO.sub.2 layers. Etching stop layer 110 includes silicon nitride, which can be formed by employing CVD to deposit a silicon nitride layer on the top of the dielectric layer 108. Then, a photoresist layer 120 is coated on top of dielectric layer 118, and shaped into a defined photoresist layer by employing a photolithography process, wherein the defined photoresist 120 is used to define an area in which the deep pattern is formed.
Referring next to FIG. 1B, the dielectric layer 118a, etching stop layer 110a, and dielectric layer 108a are etched through in sequence by utilizing the photoresist layer 120 as a mask. Because oxide and nitride have nearly identical etching rates, a low selectivity etching process on oxide and nitride is used. A deep opening 121 is formed in the dielectric layer 108a, the etching stop layer 110a, and the dielectric layer 118a in order to expose one of the source/drain regions 106 underneath. Since the high aspect ratio is high, deviation is likely to happen in the etching process, and the etching depth is difficult to control. Furthermore, although a prolonged etching period is necessary in order to etch through the thick dielectric layer, serious damage to photoresist layer 120 results, which decreases the latter's efficiency as an etching stop. This decreases device yield.
Referring to FIG. 1C, another photoresist layer 130 is formed to define the desired shallow patterns after the photoresist layer is removed, wherein the photoresist layer 130 exposes the previously formed deep opening 121, and the shallow pattern has a larger horizontal dimension than that of the deep pattern.
Referring next to FIG. 1D, an opening 121b with a large horizontal dimension is formed on the dielectric layer 118b above the etching stop layer 110a by performing a dry etching process with a high etching selectivity process on oxide and nitride, and using the photoresist layer 130 as the etching mask. During the shallow etching process, the previously formed deep opening 121 is also etched, as a result, the opening 121a is over-etched, furthermore, the conductivity of the device is impaired by the damage to the source/drain regions 106 due to etching.
Referring to FIG. 1E, the photoresist 130 is then removed.
Referring next to FIG. 1F, a conductive layer 122 is formed on the substrate 100. The opening 121a is filled up with the same conductive material forming the conductive layer 122, the surface 127 of the larger opening 121b is covered by the conductive material as well. The conductive material used in this step includes polysilicon. Generally, dopants are implanted into polysilicon for increasing the conductivity.
Referring to FIG. 1G, a planarization process is performed using, for example, chemical-mechanical polishing on the conductive layer 122 to expose the surface of the dielectric layer 118b. Then, the dielectric layer 118b is removed to expose the profile of a lower electrode 122a of a capacitor.
Referring next to FIG. 1H, a dielectric film 124 is formed on the surface of the lower electrode 122a, thereafter, the dielectric film 124 is covered by a conductive layer 132 in order to construct an upper electrode of a capacitor.
Because the conventional method for fabricating the crown-shaped capacitors of a DRAM is very complicated, it is both time-consuming and costly.

Method for fabricating a crown-shaped capacitor


An apparatus comprising a device having calibration data associated therewith, and a calibration tag placed on the device, the calibration tag having encoded thereon the calibration data or a locator identifying where the calibration data can be found. A process comprising calibrating a device to obtain a set of calibration data, generating a calibration tag, the calibration tag having encoded thereon the calibration data or a locator identifying where the calibration data can be found, and placing the calibration tag on the device. Other embodiments are also described and claimed.

Many devices such as electronic instruments, lasers, etc, require a calibration before they can operate properly. Calibration involves correlating the device's input to its output; in other words, for each desired output calibration establishes the input values that produce that output. At its simplest, for example in a device having a single input, calibrating the device is a relatively simple matter of correlating output to input. In more complex devices having multiple inputs, however, there may be multiple combinations of inputs that produce the same output; in these cases, some form of optimization can be performed to determine which combination of inputs best produces the desired output based on some figure of merit. For instance, one may want the combination of inputs that produces the desired output using the minimum amount of power. Using a tunable laser as an example, proper tuning of the laser requires that various components within the laser be maintained at specified temperature. In most devices the temperature is not controlled directly. Instead, the temperature is the result of applying some other characteristic, such as an electrical current, to the component. A calibration must be performed to determine what electrical current and/or voltage will correspond to a given temperature, and what wavelength results from a given temperature.
In most cases—especially those where there is some optimization in the calibration—the calibration can be expensive and time consuming, and may require very specialized and expensive equipment. The result of a calibration is usually a set of calibration data, also known as a "calibration table" or a "calibration matrix." The calibration table or matrix usually tabulates or otherwise sets forth the desired outputs along with the inputs that produce those outputs. The data can be presented in the table or matrix in raw form or in some alternative presentation, such as a polynomial, spline, or other representation of the output as a function of the input variables. For simple devices the calibration data can comprise only a small amount of data, but for more complex devices such as a tunable laser the set of calibration data will be substantially larger.
Some devices require a unique set of calibration data for each unit. For example, the performance of some devices, such as tunable lasers, is extremely sensitive to manufacturing tolerances; in such cases, no single calibration will work properly for every single unit of the device, because every unit will be different due to differences caused by the buildup of manufacturing tolerances. For such devices, an individual and unique calibration must be performed for every single unit produced.
In many, if not most, devices, the calibration data is stored not in the device itself, but rather is stored electronically in a controller. In some devices, the controller is part of the device itself, but in others-particularly in miniaturized devices that have no space for an internal controller-the controller is a separate unit. When the calibration data is stored in a controller separate from the device the calibration data becomes associated with the controller, rather than with the device. This presents a pair of problems: first, in some cases the device may be sold without an attached controller, so that the customer may choose a controller that best meets their particular use of the device. Second, whether or not the controller is sold with the device, if the controller is ever damaged or replaced, the calibration data specific to the device to which the controller was coupled will disappear. For example, if the controller is damaged by a power surge, the user could simply swap in a new controller. The new controller, however, would not have the calibration data stored on it and, because the original controller was damaged, the calibration data could not be recovered from it. Thus, the user would have to re-calibrate the device each time a new controller is installed. A user may not want to invest the substantial amount of time necessary for calibration, and may also not want to invest in the expensive and sometimes extensive instrumentation needed. In this case, the user's only recourse would be to return the device to the manufacturer for recalibration, which would result in significant downtime for the user as well as significant expense for both the user and the manufacturer.

Apparatus and method for management of calibration data


A battery management system includes one or more fiber optic sensors configured to be disposed within an electrochemical battery. Each fiber optic sensor is capable of receiving input light and providing output light that varies based on the input light and an amount of free or dissolved gas present within the battery. A detector detects the output light and generates an electrical detector signal in response to the output light. Battery management circuitry determines the state of the battery based at least in part on the detector signal.

Battery management systems that rely on external cell performance parameters to determine state-of-charge (SOC) and/or state-of-health (SOH) result in conservative overdesign to manage the uncertainty in battery state-of-charge and battery degradation with aging. This reliance on conservative overdesign of batteries has affected the widespread adoption of clean technologies such as electric vehicles and power grid storage. Conservative overdesign of batteries arises in part because the battery state cannot be fully understood from external parameters alone.

Battery management based on internal optical sensing


The present invention describes a pharmaceutical, veterinary or alimentary composition comprising one or more bacterial strains capable of lowering the concentration of intestinal pathogenic peptides by means of peptidases of probiotic strains. The invention also relates to the use of such compositions, and a method for selection of probiotic strains. Also, the invention relates to novel bacterial strains.

The etiology and pathogenesis of schizophrenia, autism and the major mood disorders is still unclear. Genetic factors certainly play an important role in the development and pathogenesis of these disorders. However, environmental factors contribute, and a combination of the two most probably operates, as is often seen.
A typical example of such a combined genetic and dietary based disease is Føllings disease, in which a genetic defect in the metabolism of phenylalanine results in severe maldevelopment of the brain. Dietary reduction of phenylalanine intake, however, prevents the disease development provided it is started shortly after birth. Therefore, an intensive search for environmental factors is going on, the discovery of which could strongly improve therapy of these devastating diseases. Such environmental factors could be infectious or dietary, or even both.
About 20 ago F. C. Dohan (Dohan, F. C (1983), More on celiac disease as a model for schizophrenia, Biological psychiatry, 18; 561-564; and Dohan, F. C (1988), Genetic hypothesis of idiopathic schizophrenia: its exorphin connection, Schizophrenia Bull, 14:489-494) discussed a possible relation between celiac disease and schizophrenia. Celiac disease is an inflammatory bowel disorder due to intolerance to peptides derived from gluten proteins. This condition is occasionally accompanied by psychiatric and neurological symptoms. A relation between celiac diseases and psychiatric and neurological disease is further supported by several recent investigations (KnivsBerg, Ann-Mari, Wiig, Kirsti, Lind, G. Nødland, M., Reichelt, K. L (1990), Dietary Intervention in Autistic Syndromes Brain Dysfunct, 3, 315-327; KnivsBerg, A. M. Reichelt, K. L, G. Nødland, M., Høyen, T (1990), Autistic Syndromes and Diet: a follow-up study, Scandinavian Journal of Educational Research; 39, 223-236; Whitley, P., Rodgers, J., Savery, D. and Shattock, p. (1999), An gluten-free diet as an intervention for autism and associated disorders: perliminary findings., Autism; 3: 45-65; Hadjivassilou, M., Grunewald, R. A, Chattopadhyay, A. K et al (1998), Clinical, radiological, neurophysiological, and neuropathological characteristics of gluten ataxia. The Lancet: 352, 1582-1586).
In 1979, Panksepp (Panksepp, J. A neurochemical theory of autism Trends in Neuroscience 1979; 2: 174-177) proposed the opioid excess theory in which he suggested that disturbance of endogenous opioid is part of the pathogenesis in autism. At the same time K. L. Reichelt et al (Hole, K., Bergslien, A. A, Jørgensen, H. et al (1979) A peptide containing fraction in the urine of schizophrenic patients which stimulates opiate receptors and inhibits dopamine uptake. Neuroscience; 4:1883-1893) isolated biologically active peptides from the urine from schizophrenic patients. Drysdale (Drysdale, A. Deacon, R., Lewis, R. et al (1982) A peptide containing fraction of plasma of schizophrenic patients which binds to opiate receptors and induces hyperactivity in rats Neuroscience; 7: 1567-1574) found a peptide-containing fraction in plasma from schizophrenic patients that were found to bind to opiate receptors, which induced hyperactivity in rats. Both groups showed that the principles they isolated had opioid and dopaminergic activity. At the present time, the best-characterized peptides found to be elevated in psychiatric patients, are exorphins derived from gluten and bovine caseins.
Several studies show elevated peptide levels in the urine of autistic persons (Reichelt, K. L and Teigland-Gjerstad, B (1995) Decreased urinary peptide excretion in schizophrenic patients after neuroleptic treatment sychiatry Research, 58; 171-176; Shattock, P. and Savery, D. (1997) Evaluation of Urinary Profiles obtained from people with autism and associated disorderes. Part 1:Classification of subgroups http://osiris.ac.uk/autism/ps97.htm) The inventors of the present invention have confirmed the urinary peptide pattern in normal and autistic individuals, and found higher levels in the autistic children.
Gluten Derived Exorphins
During the last year it has become clear that exorphins, a class of biologically active short peptides are produced enzymatically from gluten proteins in the gut during digestion. (Fukodome et al 1993, 1996, Froetshel 1996). These peptides, which are 4-5 amino acids long, have opioid activity and are relatively specific for δ-receptors.
Some representative gluten exorphins have the following amino acid sequence:                Exorphin A5: Gly-Tyr-Tyr-Pro-Thr (SEQ. ID. No. 1)        Exorphin A4: Gly-Tyr-Tyr-Pro (SEQ. ID. No. 2)        Exorphin B5: Tyr-Gly-Gly-Trp-Leu (SEQ. ID. No. 3)        Exorphin B4: Tyr-Gly-Gly-Trp (SEQ. ID. No. 4)        Exorphin C: Tyr-Pro-Ile-Ser-Leu (SEQ. ID. No. 5)
DeSantis et al (1997) (DeSantis, A. et al (1997) Schizophrenic symptoms and SPECT abnormalities in a coeliac patient: regression after a gluten-free diet, Journal of internal medicine 242:421-423) has shown regression of schizophrenic symptoms and SPECT (Single Photon Computer Tomography) abnormalities in a celiac patient after a gluten-free diet. An involvement of gluten peptides in neurological diseases has recently been shown in celiac ataxia further supporting neuropathological effects of such substances (Hadjuvassilou et al 1998) (Hadjivassilou, M., Grunewald, R. A, Chattopadhyay, A. K et al (1998) Clinical, radiological, neurophysiological, and neuropathological characteristics of gluten ataxia. The Lancet:352, 1582-1586).
Furthermore, Wakefield 1998 (Wakefield, A. J., Murch, S H, Anthony, A. (1998) Ileal-lymphoid-nodular hyperplasia, non-specific colitis, and pervasive developmental disorder in children The Lancet 351: 637-641 and 2000) (Wakefield, A. J. Anthony A, Murch S H. (2000) Enterocolitis in Children With Developmental Disorders The American Journal of Gastroenerology 95: 2285-2295) has recently found a relation between ileal-lymphoid-nodular hyperplasia, non-specific colitis, and pervasive developmental disorder in a group of children. Reichelt et al, 1998, (Reichelt, W. H, Ek, J. Stensrud, M and Reichelt, K. L Peptide excretion in celiac disease. Journal of Pediatric gastroenterology and Nutrition, 1998; 26: 305-309) have demonstrated increased peptide excretion in celiac disease. Accordingly, the findings of gluten derived exorphins in the urine of patients with schizophrenia; autism and mood disorders strongly suggest a causal relation, further supported by dietary experiments.
The present invention is based on these findings, i.e. that some specific peptides are found at concentrations above normal, and that this is correlated to various disorders or symptoms. In order to prevent or treat such diseases it is thus anticipated that compositions capable of lowering this elevated peptide concentration should have an effect on the disease state.
Casomorphins
During the last decade it has also been demonstrated that peptide sequences derived from incomplete catabolism of milk proteins have opioid activity (Teschemacher, H., Koch, G., and Brantl, V. (1997) Milk Protein-Derived Opoid Receptor Ligands Biopol. 43: 99-117). Caseins degrade to peptides with 3-20 amino acids, some of which have opioid activity and are termed casomorphins.
Representative examples of the amino acid sequence of some casomorphins:
β-casomorphin 1-8: Tyr-Pro-Phe-Pro-Gly-Pro-Ile-Pro (SEQ. ID. No. 6);
β-casomorphin 1-7: Tyr-Pro-Phe-Pro-Gly-Pro-Ile (SEQ. ID. No. 7);
β-casomorphin 1-5: Tyr-Pro-Phe-Pro-Gly (SEQ. ID. No. 8);
β-casomorphin 1-4: Tyr-Pro-Phe-Pro (SEQ. ID. No. 9);
β-casomorphin 1-4 amide: Tyr-Pro-Phe-Pro-NH2 (SEQ. ID. No. 9).
Recently, Sun et al (1999) (Sun, Z., Cade, J. R, Fregly, M. J. and Privette, R. M. (1999) β-casomorphin induces Fos-like immunoreactivity in discrete brain regions relevant to schizophrenia and autism., Autism; 3: 67-83) showed that β-casomorphin 1-7, which is one of the peptides isolated from the urine from patients with schizophrenia and autism that cause behavioral changes in rats. This peptide also induces Fos-like immunoreactivity in discrete brain regions relevant to schizophrenia and autism (Sun et al 1999).
Intact peptides can be absorbed from the small bowel. In humans it was demonstrated that bovine casein releases peptides that can pass to the blood during digestion of milk or yogurt (Chabance et al, 1998) (Chabance, B. Et al (1998) Casein peptide release and passage to the blood in humans during digestion of milk or yogurt, Biochimie, 80:155-165). In normal individuals, however, it appears that the peptidases in the gut and in the blood degrades such peptides rapidly (Teschemacher, H., Koch, G., and Brantl, V. (1997) Milk Protein-Derived Opoid Receptor Ligands Biopol. 43: 99-117). However, this seem not to be the case for patients suffering of the medical conditions described above, where it is believed that such an insufficient degradation or catabolism of these specific food derived peptides contribute to the development and severity of such diseases.
Clinical improvement in autistic children has been demonstrated in clinical trials following exclusion of either gluten or milk and milk products form the diet. (Reichelt, et al, 1990, Lucarelli 1995, Knivsberg et al, 1997, Whitley et al, 1999). In addition several causistic reports support the effect of gluten free and casein free diets in these patients.
Further, Singh and Kay reported in 1976 that wheat gluten could be a pathogenic factor in schizophrenia, and Reichelt et al (1990) have shown that a gluten-free diet effects the urinary peptide secretion and clinical state in schizophrenic patients.
Hyperpeptiduria, i.e. increased concentration of peptides in the urine, is regularly found in autism, schizophrenia and major depressive disorders (Reichelt, W. H, Knivsberg, A. M., Nødland, M., Stensrud, M. and Reichelt, K. L. (1997), Urinary peptide level and patterns in autistic children from seven countries, and the effect of dietary intervention after 4 years., Dev. Brain Dysfunct; 10: 44-55; Whitley, P., Rodgers, J., Savery, D. and Shattock, p. (1999), An gluten-free diet as an intervention for autism and associated disorders: perliminary findings. Autism; 3: 45-65; Reichelt, K. L., Sagedal, E, Landmark, J., Sangvik, B. T., Eggen, O., and Scott, H. (1990), The effect of gluten-free diet on urinary peptide secretion and clinical state in schizophrenia., Journal of Orthomolecular medicine, 5: 223; Reichelt, K. L., Ekrem, J. and Scott, H. (1990), Gluten, milk proteins and autism: dietary intervention effects on behavior and peptide secretion., Journal of applied nutrition; 42: 1-11; Sun, Z. And Cade, J. R (1999), A peptide found in schizophrenia and autism cause behavioral changes in rats. Autism; 3: 85-95; Wakefield, A. J. et al. (1998), Ileal-lymphoid-nodular hyperplasia, non-specific colitis, and pervasive developmental disorder in children, The Lancet 351: 637-641; Reichelt, K. L and Stensrud, M (1998) Increase in urinary peptides prior to the diagnosis of schizophrenia, Schizophrenia Research; 1998; 34: 211-213). The peptide pattern varies considerably between patients, which may be due to the presence of dietary peptides without biological effect, and not related to enzyme defects in the psychiatric diseases. However, even peptides without biological activity may act as peptidase inhibitors. During dietary treatment and after use of neuroleptic agents, urinary peptide patterns are normalized. Other gut-derived substances may also be involved, as Shattock has found that indoly-acryloylglycin (IAG) is present in the urine of autistic children, and Friedman discloses the presence of the nonhuman peptide dermorphin.
These findings indicate that there is a correlation between a concentration above normal for some specific peptides and the development of certain diseases, especially neurological disorders. Further, it is clearly established that some of these "pathogenic peptides" are derived from food proteins, e.g. caseins and gluten.
Further, there is evidence for genetic alterations in plasma dipeptidyl peptidase IV enzyme activity in depression and schizophrenia (Maes et al, 1994, 1996) (Maes, M., Goossens, F., Scharpe, S. et al (1994) Lower serum prolyl endopeptidase enzyme acivity in major depression: Further evidence that peptidases play allmenn role in the pathophysiology of depression. Biol. Psychiat.; 35: 545-552 Maes, M., Goossens, F., Scharpe, S. et al (1994) Lower serum prolyl endopeptidase enzyme acivity in major depression: Further evidence that peptidases play allmenn role in the pathophysiology of depression. Biol. Psychiat.; 35: 545-552), which may also affect intestinal enzyme activity. Defective metabolism of gut-derived peptides is reflected in the excretion pattern of such substances.
In conclusion, these investigations strongly support the idea that symptoms in such psychiatric disorders as schizophrenia, ADHD, autism and depressions, at least partly, result from incomplete breakdown and/or increased uptake of gut-derived peptides.

Composition for lowering the concentration of intestinal pathogenic peptides