A number of booster circuits to be operated out of a plurality of booster circuits are selected in accordance with a level of the boosted voltage to be provided at a common voltage output terminal of the plurality of booster circuits. With such an arrangement, fluctuations in the output voltage that can appear when a light load is applied to the voltage output terminal of the booster circuits can be effectively reduced to make the semiconductor memory device driven by the power supply circuit operate reliably. Further, one of the output terminals of intermediate voltage booster circuits is connected to the output terminal of a high voltage booster circuit. Then, a desired voltage can be obtained from the booster circuits that are implemented without using costly transistors to reduce the chip cost.

The present invention relates to a power supply circuit and a semiconductor memory device having such a power supply circuit, and more particularly to a single-source type power supply circuit including a booster circuit and a non-volatile semiconductor memory device having such a power supply circuit.
FIG. 1 is a schematic circuit diagram of a typical booster circuit to be used for a power supply circuit.
The booster circuit includes diodes D1 through D6, capacitors C1 through C5 and capacitor Ca, and inverters G1, G2.
The anode of the diode D1 is supplied with external supply voltage Vcc. The cathodes of the diodes D1 through D5 are respectively connected to the anodes of the diodes D2 through D6 and the anodes of the diodes D2 through D6 are also connected to the first terminals of the capacitors C1 through C5 respectively. The other ends of the capacitors C1, C3 and C5 are connected to the output terminal of inverter G1 whose input terminal is fed with clock signal OSC generated by an oscillator. The input terminal of the inverter G1 operates as the signal input terminal of the booster circuit. The other ends of the capacitors C2 and C4 are fed with clock signal OSC. The cathode of the diode D6 outputs voltage Vccint. A stabilizing capacitor Ca is connected between the cathode of the diode D6 and ground.
Electric charges are transferred from diode to diode in an alternating manner in the booster circuit in accordance with clock signal OSC fed from an oscillator. As a result, it generates voltage Vccint that is higher than external supply voltage Vcc.
FIG. 2 is a schematic circuit diagram of a typical oscillator to be used for a power supply circuit.
The first input terminal of NAND-gate 1 is fed with signal CPE for enabling the booster circuit. The output terminal of the NAND-gate 1 is connected to, for example, a 4-stage inverter 2 including four serially connected inverters. The output signal of the 4-stage inverter 2 is fed to the second input terminal of the NAND-gate 1. For example, an inverted signal of the output signal of the inverter 2 is used as clock signal OSC.
When signal CPE rises to a high level, the oscillator outputs a clock signal OSC that alternately rises to a high level and falls to a low level. When signal CPE goes to a low level, the oscillator stops oscillating and outputs a low level signal.
FIG. 3 is a circuit diagram of a known power supply circuit including a booster circuit as shown in FIG. 1 and an oscillator as shown in FIG. 2. The power supply circuit provides a booster circuit system typically used for a non-volatile semiconductor memory device.
The oscillator 12 and the booster circuit 13 have respective circuit configurations identical with those illustrated in FIGS. 2 and 1. The output voltage Vccint of the booster circuit 13 is divided by resistor 17 and supplied to the inverted input terminal of a differential amplifier 11. The non-inverted input terminal of the differential amplifier 11 is supplied with reference voltage Vref. The differential amplifier 11 supplies signal CPE to the oscillator 12.
The differential amplifier 11 compares the reference Voltage Vref and the voltage obtained by regulating the voltage Vccint and turns on/off the booster circuit 13 in accordance with the outcome of the comparison. In this way, the output voltage (boosted voltage) Vccint of the booster circuit 13 is held to a desired level that may be, for example, equal to 10V.
As shown in FIG. 3, the output voltage Vccint of the booster circuit 13 is supplied to regulator circuit 14 and Y-selector 16.
For example, the regulator circuit 14 may generate a voltage of 6.5V in the write (program) verify mode of operation, and a voltage of 10V which is equal to the output voltage Vccint in the write (program) mode. Likewise, it may generate a voltage of 2.5V in the erase mode, and a voltage of 3.5V in the erase verify mode.
The output voltage Vout of the regulator circuit 14 is supplied to row decoder 15. The row decoder 15 selects a word line of a memory cell array (not shown) in accordance with a row select signal.
The Y-selector 16 selects a bit line of the memory cell array (not shown) in accordance with a column select signal.
The output voltage Vccint of the booster circuit 13 is subjected to a variety of loads.
Firstly, the capacitance of the Y-selector 16 itself provides a load.
Additionally, in the write (program) mode, the regulator circuit 14 directly applies the obtained voltage Vccint to the row decoder 15. Accordingly, the capacitance 18 of the word line (which is selected by the row decoder 15 and to which the output voltage Vccint of the booster circuit 13 is directly supplied) makes a load for the voltage output terminal of the booster circuit 13. On the other hand, in the erase mode, the write verify mode or the erase verify mode, the output voltage Vccint of the booster circuit 13 is shifted to a lower voltage by the regulator circuit 14 and, therefore, the capacitance 18 of the word line does not make any load. Therefore, the load to be added to the voltage Vccint varies depending on the mode of operation.
FIGS. 4A and 4B show operating waveforms of the power supply circuit, or waveforms of the output voltage Vccint that may appear when the booster circuit 13 of the power supply circuit in FIG. 3 starts operating and the output voltage Vccint rises from 0V to 10V.
FIG. 4A shows a waveform of the output voltage Vccint that may be observed when there is a heavy load typically in the write (program) mode, whereas FIG. 4B shows a waveform of the output voltage Vccint that may appear when there is only a light load typically in the erase mode.
In the case of a light load as shown in FIG. 4B, the voltage Vccint overshoots to show a zig-zag waveform because of the light load and makes it difficult to output a well controlled stable voltage Vccint. When an overshot voltage Vccint is supplied from the power supply circuit to a device the circuit drives, it may exceed the withstand voltage level of the device and hence can degrade the performance of the device and damage its reliability.
In view of these problems, therefore, it is highly desirable to reduce the fluctuations in the output voltage of a power supply circuit that appear when a light load is applied to the voltage output terminal of the booster circuit and make it possible to provide a well controlled voltage from the booster circuit. Thus, there is a strong demand for a power supply circuit that can improve the reliability of any device it drives and also for a semiconductor memory device having such a power supply circuit.
Meanwhile, known non-volatile semiconductor memory devices include flash EEPROMs. A flash EEPROM includes stacked transistors having a floating gate and a control gate as memory cells. Such a memory cell changes its threshold voltage for data writing/erasing operations as electrons are charged into and discharged from it through the floating gate.
Flash memories adapted to be charged with hot electrons for data writing are currently driven either by a two-source type power supply circuit that uses a power supply of Vcc=5V for data writing and another power supply of Vpp=12V for data erasing, or by a single-source type power supply circuit that uses only a power supply of Vcc=5V. When a single-source type power supply circuit is used, power supply voltage Vpp for data erasing is obtained by means of a booster circuit.
The trend in recent years is in favor of power saving low voltage power supply circuits and 3V is typically used as power supply voltage. From the viewpoint of convenience, a single-source type power supply circuit may be superior to a two-source type power supply circuit.
Now, when the power supply voltage of a known power supply circuit adapted to supply the voltage directly to the control gate in the read mode is reduced from 5V to 3V, then the voltage supplied to the control gate also falls to 3V, resulting in reduction of the current flowing to the memory cells. A reduced cell current gives rise to a reduced reading speed and a reduced margin relative to the power supply voltage. In other words, with such a circuit, the voltage for data reading and the voltage for data writing and erasing have to be generated internally.
However, when a power supply voltage is used, a plurality of booster circuits may have to be employed to generate a voltage required within the chip and a number of different voltage levels have to be selectively used by means of a switching circuit to provide voltages necessary for reading, writing and erasing data respectively. Then, such a switching circuit is required to supply the generated voltage to the destination such as a control gate of memory cells without lowering it. Known control circuits of the type under consideration typically include depletion type transistors to prevent the generated voltage from falling by the threshold voltage of the transistors. However, the use of depletion type transistors is accompanied by a problem of an increased number of manufacturing steps and a high chip cost.
In view of the above circumstances, there is a strong demand for a power supply circuit that can provide any desired voltage from its booster circuit to reduce the chip cost and also for a semiconductor memory device having such a power supply circuit.
Accordingly, it is an object of the present invention to provide a power supply circuit adapted to supply a desired voltage from its booster circuits in a highly controlled manner by reducing fluctuations in the output voltage that can appear when a light load is applied to the voltage output terminal of its booster circuits in order to improve the reliability of the device driven by the circuit and also a semiconductor memory device having such a power supply circuit.
It is another object of the present invention to provide a power supply circuit adapted to supply a desired voltage from its booster circuits 13 without using costly transistors in order to reduce the chip cost and also a semiconductor memory device having such a power supply circuit.
According to one aspect of the present invention, there is provided a power supply circuit comprising: a plurality of booster circuits, each being adapted to generate a boosted voltage in accordance with a clock signal and supply it to a common voltage output terminal; and a control circuit for selecting a number of booster circuits to be operated out of the plurality of booster circuits in accordance with a level of the boosted voltage to be provided at the common voltage output terminal.
According to another aspect of the present invention, there is provided a non-volatile semiconductor memory device comprising: a memory cell array having a plurality of non-volatile memory cells; and a power supply circuit for preparing a predetermined boosted voltage to be used for generating at least one of various voltages supplied to the non-volatile memory cells in write and erase modes, the power supply circuit including: a plurality of booster circuits, each being adapted to generate the boosted voltage in accordance with a clock signal and supply it to a common voltage output terminal, and a control circuit for selecting a number of booster circuits to be operated out of the plurality of booster circuits in accordance with a level of the boosted voltage to be provided at the common voltage output terminal.
According to another aspect of the present invention, there is provided a non-volatile semiconductor memory device comprising: a memory cell array having a plurality of non-volatile memory cells; a write/erase circuit for the plurality of non-volatile memory cells; and a circuit for generating desired voltages which are different from an external power supply voltage and applied to the plurality of non-volatile memory cells, the circuit including a booster circuit for generating a boosted voltage, wherein a power of the booster circuit is set higher in a write mode and is set lower in an erase mode when the boosted voltage of the booster circuit falls below a predetermined voltage.
According to a further aspect of the present invention, there is provided a semiconductor memory device comprising: a first booster circuit having first and second output terminals, for outputting a first voltage obtained by boosting a power supply voltage from the first and second output terminals; and a second booster circuit having an output terminal connected to the second output terminal of the first booster circuit, for outputting a second voltage higher than the first voltage by boosting the power supply voltage, the first voltage being supplied to the output terminal of the second booster circuit even when the second booster circuit stops its voltage boosting operation.
According to another aspect of the present invention, there is provided a semiconductor memory device comprising: a first booster circuit for outputting a first boosted voltage obtained by boosting a power supply voltage; a second booster circuit for outputting a second boosted voltage higher than the first boosted voltage by boosting the power supply voltage; a regulator circuit for regulating the second boosted voltage output from the second booster circuit to generate a regulated voltage; a transistor having a current path with an end applied with a voltage from the first booster circuit in a write or erase mode and the other end connected to an end of a current path of a memory cell; and a circuit for shifting a level of a signal to a gate of the transistor supplied to a level of the regulated voltage output from the regulator circuit.
Additional objects and advantages of the present invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the present invention. The objects and advantages of the present invention may be realized and obtained by means of the instrumentalities and combinations particularly pointed out in the appended claims.

Power supply circuit and semiconductor memory device having the same


A method and a system indicate to a wireless device user that an incoming call has been received by the wireless device. The user can, for example, configure the wireless device to “shuffle” or select a different incoming call indicator, such as a ring tone, from a defined group of incoming call indicators, with each call received.

A telephone rings. A telephone for the hearing impaired flashes a bright light. In these examples, the audible ring or visual flash of light indicate to the telephone user that a call has been received. To communicate with the caller, the telephone user must answer the phone, perhaps by picking up the handset. Without the audible ring, the visual flash of light, or some other indication that a call has been received, the telephone user would not know to answer the call and the opportunity for communication with the caller would be lost. Consequently, an indication that an incoming call has been received is a necessary element in telephonic and other types of communications.
Mobile telephones and other wireless devices generally arrive in the hands of users preconfigured with a particular means of indicating an incoming call. A typical device will produce an audible ring tone. Many of these devices also provide the user with the ability to select an alternate means of indicating that an incoming call has been received. The user may be able to select from a variety of ring tones, inaudible indicators such as vibrations or visual indicators, or other indicators. Some users may be able to purchase and download additional ring tones and other indicators for use with their devices. These downloaded call indicators can typically be stored on the device, allowing the user to reconfigure the device to use the downloaded ring tone or other incoming call indicator at a later time.
Some wireless devices are configurable to select a particular ring tone or other incoming call indicator for a particular incoming caller. For example, an incoming call from Caller A may be announced with Ring Tone A, an incoming call from Caller B may be announced with Ring Tone B, while an incoming call from an unknown caller may be announced with Ring Tone C. In this example, once the user configures the device to indicate an incoming call from Caller A with Ring Tone A, Ring Tone A will always announce Caller A until the user reconfigures the device to provide a different incoming call indicator for Caller A.

Method and system for indicating reception of an incoming call by a wireless device


A rapidly dissolving comestible solid is disclosed that includes a fondant formed from a super saturated solution having a bulk sweetener, a hydrocolloid, a texturizing agent, and water. Other ingredients may also be added, and in embodiments in which the solid is provided as a breath freshener, flavoring agents, cooling agents and/or other ingredients useful in conventional breath freshening products may be used. A method for making the comestible solid is also disclosed.

Mints and chewing gum are commonly used by consumers to freshen breath after meals, before personal interactions, and in other social situations. While these products are generally effective, there are many situations in which a consumer desires fresh breath but doesn't have time for a traditional tablet mint to dissolve or to chew gum long enough to achieve the desired level of freshness.
Mouthwash is a quick and effective way to freshen one's breath, but is generally not a suitable alternative in most cases for a variety of reasons. Another manner of providing a quicker way in which to achieve freshness has been the use of products generally known as breath strips, which are dissolvable films containing breath freshening ingredients. Breath strips have their own attendant drawbacks, including a propensity to stick to the roof of one's mouth and a mouthfeel that some consumers find unpleasant. Breath strips can sometimes also start to become sticky and/or dissolve on contact with the skin when removed from their container, particularly in humid weather.
These and other drawbacks are found in current breath fresheners and other products.


Channel regions and gate electrodes are also disposed continuously with transistor cells below a gate pad electrode. The transistor cells are formed in a stripe pattern and allowed to contact a source electrode. In this way, the channel regions and the gate electrodes, which are positioned below the gate pad electrode, are kept at a predetermined potential. Thus, a predetermined drain-source reverse breakdown voltage can be secured without providing a p+ type impurity region on the entire surface below the gate pad electrode.

1. Field of the Invention
The present invention relates to an insulated gate semiconductor device, and more particularly relates to an insulated gate semiconductor device which can maintain a high reverse breakdown voltage by securing a sufficient operation region area.
2. Description of the Related Art
In a conventional insulated gate semiconductor device, no transistor cell is disposed below a gate pad electrode. This technique is described for instance in Japanese Patent Application Laid-open Publication No. 2002-368218.
In addition, a protection diode having a plurality of series-connected pn junctions, for example, may be disposed below a gate pad electrode. Otherwise, a diffusion region of high-concentration impurities may also be formed in a substrate below a gate pad electrode, in order to secure a drain-source reverse breakdown voltage.
FIGS. 7A and 7B show an example of an n channel MOSFET having a p+ type impurity region provided below a gate pad electrode, as the conventional insulated gate semiconductor device.
FIG. 7A is a plan view of the MOSFET. Note that, in FIG. 7A, interlayer insulating films on a surface of a substrate is omitted, and a metal electrode layer (a source electrode 47, a gate pad electrode 48 and a gate wiring 48a) is indicated by a broken line.
Gate electrodes 43 are provided in a stripe pattern on a surface of a semiconductor substrate 31 with gate oxide films 41 interposed therebetween. The gate electrodes 43 are provided by depositing and patterning polysilicon, and a resistance thereof is reduced by introducing impurities thereinto. Source regions 45 are provided in a stripe pattern on the surface of the substrate 31 along the gate electrodes 43.
The source electrode 47 is provided on an operation region 51 in which a transistor cell is disposed, and the gate pad electrode 48 is disposed at an end of a chip. Around the chip, the gate wiring 48a connected to the gate pad electrode 48 is provided.
A gate extraction electrode 43a is provided in a pattern approximately overlapping with the gate pad electrode 48 and the gate wiring 48a. Moreover, in an n− type semiconductor layer (an n− type epitaxial layer) 31b below the gate extraction electrode 43a, a p+ type impurity region 49 is provided in a pattern approximately overlapping with the gate extraction electrode 43a.
FIG. 7B is a cross-sectional view taken along the line e-e in FIG. 7A.
In the semiconductor substrate 31, a drain region is provided by placing the n− type semiconductor layer (the n− type epitaxial layer) 31b on an n+ type silicon semiconductor substrate 31a, and the like. On the surface of the substrate 31, a plurality of p type channel regions 34 are provided in a stripe pattern. On the surface of the substrate 31 between the channel regions 34, a plurality of the gate electrodes 43 are disposed in the stripe pattern with gate insulating films 41 interposed therebetween. On the surfaces of the channel regions 34 adjacent to the gate electrodes 43, n+ type source regions 45 are formed. The gate electrodes 43 are covered with interlayer insulating films 46, and the source electrode 47 is provided thereon, which contacts the source regions 45. A region surrounded by the gate electrodes 43 becomes one transistor cell, and a number of the transistor cells are arranged to form the operation region 51.
The gate pad electrode 48 is provided on the surface of the n− type semiconductor layer 31b outside the operation region 51, and contacts the gate extraction electrode 43a connected to the gate electrode 43 in the operation region 51. The p+ type impurity region 49 is provided in a pattern similar to that of the gate extraction electrode 43a.
The p+ type impurity region 49 is connected to the channel region 34 and secures a source-drain reverse breakdown voltage by relieving electric field concentration at the end of the chip.
Specifically, the p+ type impurity region 49 is required to be provided in a pattern similar to that of the gate extraction electrode 43a, the pattern approximately overlapping with the gate extraction electrode 43a. Therefore, for example, in the case of the pattern in which the gate extraction electrode 43a is disposed on the entire surface below the gate pad electrode 48 as shown in FIGS. 7A and 7B, the p+ type impurity region 49 is also required to have a large area corresponding thereto.
FIGS. 8A and 8B are views for explaining the p+ type impurity region 49. FIG. 8A is a perspective view of the p+ type impurity region 49 in a circled portion shown in FIG. 7A, when seen from the operation region 51 in which the transistor cell (MOSFET) is disposed. FIG. 8B is a plan view showing another p+ type impurity region 49, with interlayer insulating films on a surface omitted, and with a metal electrode layer indicated by a broken line.
The p+ type impurity region 49 is a diffusion region and has a spherical curvature at the edge (a junction surface with the n− type epitaxial layer 31b) indicated by the circle in FIG. 7A (FIG. 8A). Here, in the pattern shown in FIGS. 7A and 7B, when a higher drain-source reverse breakdown voltage (for example, several hundred V) is required, a strong electric field is concentrated in the portion having the spherical curvature (the portion indicated by the arrows in FIG. 8A). Accordingly, there is a problem that a desired drain-source reverse breakdown voltage cannot be obtained.
Moreover, in order to reduce an on-resistance of the insulated gate semiconductor device, it is necessary to reduce a specific resistance of the n− type epitaxial layer 31b, for example. In such a case, the pattern of the p+ type impurity region 49 shown in FIGS. 7A and 7B also has a problem that the drain-source reverse breakdown voltage is deteriorated.
Specifically, when characteristics required for the operation region 51 are changed, it is necessary to change the pattern of the p+ type impurity region 49 separately from the operation region 51, in order to obtain a predetermined drain-source reverse breakdown voltage.
To be more specific, by reducing the spherical curvature, a sufficient drain-source reverse breakdown voltage can be secured. In other words, as shown in FIG. 8B, by reducing a curvature in a planar pattern of a corner portion of the p+ type impurity region 49, the spherical curvature shown in FIG. 8A can accordingly be reduced. Thus, the predetermined reverse breakdown voltage can be secured.
However, when the gate extraction electrode 43a is provided in the pattern approximately overlapping with the gate pad electrode 48 therebelow, the curvature radius of the corner portion of the p+ type impurity region 49 having the same pattern as that of the gate extraction electrode 43a is increased. Because of this, in the pattern shown in FIGS. 7A and 7B, some of the transistor cells near the gate pad electrode 48 cannot be disposed. Consequently, there is a problem that the operation region (a disposition area of the transistor cells) has to be reduced.


A leg-wheeled traveling mechanism is provided with a seat portion, two follow-up legs, each having an end portion that is freely rotatably connected to the seat portion, with a distance between the end portion and a tip portion having a foot-rest portion being retractable, two or more support legs, each having an end portion that is freely rotatably connected to the seat portion, with a distance between the end portion and a tip portion having a wheel portion being retractable, a foot-position measuring unit that measures relative positional changes of the foot-rest portions and foot portions of a rider, and a control device that controls operations of the follow-up legs and the support legs, based upon the relative positional changes measured by the foot-position measuring unit so as to allow the foot-rest portions to move virtually in the same directions as those of the foot portions.

Along with an increase in the population of old people, there have been increasing demands for a small-size traveling mechanism for personal use, and its typical example includes a small-size traveling mechanism with wheels, such as an electric motor cart and an electric motor chair. However, within a range where such a small-size traveling mechanism is allowed to run, various step differences exist, thereby forming obstacles against its movements. In a case of a normal wheel-type small-size traveling mechanism, since the positions of the wheels relative to a seat are set to be virtually constant, the height of a step difference that the mechanism can cross over is dependent on a wheel base that corresponds to the wheel diameter and the gap between the front wheel and the rear wheel, and it becomes difficult to cross over such a step difference exceeding 10 cm.
Here, as the small-size traveling mechanism that is suitable for this step difference, a leg-type small traveling mechanism has been proposed (for example, see Non-Patent Document 1). By adopting a leg-type structure, it becomes possible to be applied to a big step difference with which the wheel-type small-size traveling mechanism fails to deal.
However, since the leg-type small-size traveling mechanism is inferior to the wheel-type small-size traveling mechanism in its mobility on plane places other than a step difference, a leg-wheeled small-size traveling mechanism, made by combining the two mechanisms with each other, has been proposed (for example, see Patent Documents 1 and 2).
Patent Document 1: Japanese Unexamined Patent Publication No. 11-128278
Patent Document 2: Japanese Unexamined Patent Publication No. 2006-055972
Non-Patent Document 1: Preprints 1G24 for the 23rd Annual Conference of the Robotics Society of Japan


An optical disk comprising a substrate in which information to be picked up by a light beam radiated thereto through an objective lens are recorded as pit arrays formed at a predetermined track pitch, and a reflective layer formed on the substrate, the track pitch is set within a range of

This invention relates to an optical disk on which information is recorded in pits with high density and an optical disk apparatus containing the optical disk and a reproduction optical system.
With the recent advances in image digital signal processing techniques and moving-picture compression techniques, the latter of which have been developed by such a standardizing organization as the MPEG (Moving Picture Image Coding Experts Group), there is a growing expectation of the advent of an optical disk capable of reproducing moving-picture information such as a movie for two hours and being the same size as a CD (compact disk) in place of a VTR or laser disk. The recording capacity required to record two hours of moving-picture information in the form of analog video signals by a standard TV system such as NTSC as on the laser disk, amounts to 80 Gbyte including sound. Use of moving-picture compression techniques prescribed by a standardized method called MPEG-2, for example, requires as small a capacity as nearly 4 Gbyte even for a picture quality as good as a high picture-quality VTR such as S-VHS. The 4-Gbyte disk has been put into practical use in the form of a 300-mm diameter write-once read-many optical disk. As more and more optical disks will be used in homes in the future, it is needed to achieve an easy-to-use 120-mm diameter disk which has the same size and almost the same capacity as the CD.
The capacity of the CD format presently available as the music CD or the CD-ROM is 790 Mbyte at the maximum (when the linear velocity is 1.2 m/s). The capacity of this order can store only 24 minutes of compressed moving-picture information by MPEG-2. Thus, to store two hours of compressed moving-picture information by MPEG-2 with the CD size, the recording density must be made five times as high as that of the CD. In the current CD format, the substrate thickness is 1.2 mm, the track pitch is 1.6 xcexcm, the pit pitch is 1.66 xcexcm when the linear velocity (relative velocity between light beam and disk=disk""s circumferential velocity) is 1.2 m/s, the bit length is 0.59 xcexcm, and the modulation method is EFM (eight to fourteen modulation). In the reproduction optical system, the reproduction semiconductor laser, or the laser diode (LD) has a wavelength of 780 nm, the object lens has an NA (numerical aperture) of 0.45, and the beam spot has a diameter of 1.4 xcexcm. The beam spot diameter is selected mainly from the standpoint of avoiding the effect of cross talk between adjacent tracks.
To increase the recording density of the optical disk requires techniques for forming small pits in the disk and those for making the beam spot size small on the optical disk in the reproduction optical system. Concerning techniques for forming pits, for example, an optical disk matrix recording technique using Kr ion laser light (ultraviolet rays) with a wavelength of 351 nm has been proposed (The 1993 Autumn National Convention of the Applied Physics Society, 28-SF-2). This technique makes it possible to form smaller pits than a conventional Ar ion laser. In the reproduction optical system, by making the wavelength of the reproduction laser beam shorter and increasing the NA, the beam spot diameter can be made smaller. Actually, however, with conventional techniques used in CD players, even if a short wavelength light source such as a red laser diode were used, the capacity would be increased by 1.5 times at most. With such an increase in the capacity, it cannot be expected to increase the capacity by five times that of an ordinary CD, which is what is required to record two hours of compressed moving-picture information.
As described above, with the conventional optical disk techniques, to avoid the problem of cross talk between adjacent tracks, the track pitch and pit pitch are set larger than the beam spot diameter of the reproduction light beam. As a result, only by making the wavelength of reproduction light beam shorter and increasing the NA of the object lens, the recording density cannot be raised to the extent that the capacity required to store two hours of compressed moving-picture information by MPEG-2 with the CD size, for example.
It is an object of the present invention to provide an optical disk and an optical disk apparatus which can lessen cross talk between adjacent tracks to the extent that there is no problem in practical use, even if the track pitch and pit pitch are smaller than the beam spot diameter of the reproduction light beam, and which achieves a higher density and a greater capacity than in the prior art.
It is another object of the present invention to provide a optical disk and an optical disk apparatus which enable a high density recording in a tilt angle of the optical disk which is less than 10 mrad.
According to the present invention, there is provided an optical disk comprising: a substrate in which information to be picked up by a light beam radiated thereto through an objective lens are recorded as pit arrays formed at a predetermined track pitch; and a reflective layer formed on the substrate, the track pitch being set within a range of
(0.72 to 0.8)xcex1xc3x97(xcex/NA)/1.14 xcexcm,
when the light beam has a wavelength of xcex nm and the objective lens has a numerical aperture of NA, the xcex1 being represented by:
xcex1=3.617xc3x9710xe2x88x9214xc3x97(xcex8A ds/xcex)3+1.248xc3x9710xe2x88x929xc3x97(xcex8A ds/xcex)2+0.865
when the optical disk has a thickness of ds xcexcm, and an allowable tilt angle of xcex8A, and the allowable tilt angle xcex8A being not more than 7 mrad.
According to the present invention, there is provided an optical disk apparatus comprising: an optical disk including a substrate in which information are recorded as pit arrays formed at a predetermined track pitch, and a reflective layer formed on the substrate; an objective lens arranged to face the optical disk; a light beam generator which radiates a light beam onto the optical disk through the objective lens; and a reproduction unit which detects a reflected beam of the light beam radiated onto the optical disk by the light beam generator so as to reproduce the information recorded in the optical disk, the track pitch being set within a range of
(0.72 to 0.8)xcex1xc3x97(xcex/NA)/1.14 xcexcm,
when the light beam has a wavelength of xcex nm and the objective lens has a numerical aperture of NA, the xcex1 being represented by:
xcex1=3.617xc3x9710xe2x88x9214xc3x97(xcex8A ds/xcex)3+1.248xc3x9710xe2x88x929xc3x97(xcex8A ds/xcex)2+0.865
when the optical disk has a thickness of ds xcexcm, and an allowable tilt angle of xcex8A, and the allowable tilt angle xcex8A being not more than 7 mrad.
According to the present invention, there is provided an optical disk comprising: a pair of transparent substrates which face each other and in which information to be reproduced in response to a light beam radiated thereto through an objective lens are recorded as pit arrays formed at a predetermined track pitch; and a pair of reflective layers formed on those sides of the transparent substrates which face each other, the track pitch being set within a range of
(0.72 to 0.8)xcex1xc3x97(xcex/NA)/1.14 xcexcm,
when the light beam has a wavelength of xcex nm and the objective lens has a numerical aperture of NA, the xcex1 being represented by:
xe2x80x83xcex1=3.617xc3x9710xe2x88x9214xc3x97(xcex8A ds/xcex)3+1.248xc3x9710xe2x88x929xc3x97(xcex8A ds/xcex)2+0.865
when the optical disk has a thickness of ds xcexcm, and an allowable tilt angle of xcex8A, and the allowable tilt angle xcex8A being not more than 7 mrad.
According to the present invention, there is provided an optical disk comprising: a substrate in which information to be reproduced in response to a light beam radiated thereto through an objective lens are recorded as pit arrays formed at a predetermined track pitch; and a reflective layer formed on the substrate, the track pitch being set within a range of
(0.72 to 0.8)xcex1xc3x97(xcex/NA)/1.14 xcexcm,
when the light beam has a wavelength of xcex nm and the objective lens has a numerical aperture of NA, each of pits of the pit arrays being a trapezoidal-section pit which has an upper-region width within a range of (0.3 to 0.50)xcex1xc3x97(xcex/NA)/1.14 xcexcm and a lower-region width within a range of (0.2 to 0.32)xcex1xc3x97(xcex/NA)/1.14 xcexcm, and the xcex1 being represented by:
xcex1=3.617xc3x9710xe2x88x9214xc3x97(xcex8A ds/xcex)3+1.248xc3x9710xe2x88x929xc3x97(xcex8A ds/xcex)2+0.865
when the optical disk has a thickness of ds xcexcm, and an allowable tilt angle of xcex8A.
According to the present invention, there is provided an optical disk apparatus comprising: an optical disk including a substrate in which information are recorded as pit arrays formed at a predetermined track pitch, and a reflective layer formed on the substrate; an objective lens arranged to face the optical disk; means for radiating a light beam onto the optical disk through the objective lens; and means for detecting a reflected beam of the light beam radiated onto the optical disk by the radiating means so as to reproduce the information recorded in the optical disk, the track pitch being set within a range of
(0.72 to 0.8)xcex1xc3x97(xcex/NA)/1.14 xcexcm,
when the light beam has a wavelength of xcex nm and the objective lens has a numerical aperture of NA, each of pits of the pit arrays being a trapezoidal-section pit which has an upper-region width within a range of (0.3 to 0.50)xcex1xc3x97(xcex/NA)/1.14 xcexcm and a lower-region width within a range of (0.2 to 0.32)xcex1xc3x97(xcex/NA)/1.14 xcexcm, and the xcex1 being a multiplication ratio that ensures an allowable disk tilt angle when the wavelength is 0.65 xcexcm, and being represented by:
xcex1=3.617xc3x9710xe2x88x9214xc3x97(xcex8A ds/xcex)3+1.248xc3x9710xe2x88x929xc3x97(xcex8A ds/xcex)2+0.865.
According to the present invention, there is provided an optical disk comprising: a substrate in which information to be reproduced in response to a light beam radiated thereto through an objective lens are recorded as pit arrays formed at a predetermined track pitch; and a reflective layer formed on the substrate, the track pitch being set within a range of
(0.72 to 0.8)xcex1xc3x97(xcex/NA)/1.14 xcexcm,
when the light beam has a wavelength of xcex nm and the objective lens has a numerical aperture of NA, each of pits of the pit arrays being a trapezoidal-section pit which has an upper-region width within a range of (0.3 to 0.50)xc3x97( xcex/NA)/1.14 xcexcm and a lower-region width within a range of (0.2 to 0.32)xc3x97(xcex/NA)/1.14 xcexcm, and the xcex1 being a multiplication ratio that ensures an allowable disk tilt angle when the wavelength is 0.65 xcexcm, and being represented by:
xcex1=3.617xc3x9710xe2x88x9214xc3x97(xcex8A ds/xcex)3+1.248xc3x9710xe2x88x929xc3x97(xcex8A ds/xcex)2+0.865.
According to the present invention, there is provided an optical disk apparatus comprising: an optical disk including a substrate in which information are recorded as pit arrays formed at a predetermined track pitch, and a reflective layer formed on the substrate; an objective lens arranged to face the optical disk; a light beam generator which radiates a light beam onto the optical disk through the objective lens; and a reproduction head which detects a reflected beam of the light beam radiated onto the optical disk by the light beam generator so as to reproduce the information recorded in the optical disk, the track pitch being set within a range of
(0.72 to 0.8)xcex1xc3x97(xcex/NA)/1.14 xcexcm,
when the light beam has a wavelength of xcex nm and the objective lens has a numerical aperture of NA, each of pits of the pit arrays being a trapezoidal-section pit which has an upper-region width within a range of (0.3 to 0.50)xc3x97(xcex/NA)/1.14 xcexcm and a lower-region width within a range of (0.2 to 0.32)xc3x97(xcex/NA)/1.14 xcexcm, and the xcex1 being a multiplication ratio that ensures an allowable disk tilt angle when the wavelength is 0.65 xcexcm, and being represented by:
xcex1=3.617xc3x9710xe2x88x9214xc3x97(xcex8A ds/xcex)3+1.248xc3x9710xe2x88x929xc3x97(xcex8A ds/xcex)2+0.865.
By setting various parameters of the pit shape at the above-described values, the amount of cross talk between adjacent tracks is suppressed to less than xe2x88x9220 dB, which must be met to restore the original information from the reproduced signal, and the reproduced signal level and the level of the push-pull signal for tracking are maintained sufficiently.
Additional objects and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. The objects and advantages of the invention may be realized and obtained by means of the instrumentalities and combinations particularly pointed out hereinafter.

Abstract: when a wavelength of the light beam is xcexnm and the objective lens has a numerical aperture of NA,

Abstract: the xcex1 is represented by:

Abstract: when a thickness of the optical disk is ds xcexcm, and an allowable tilt angle of xcex8A, and the allowable tilt angle xcex8A is not more than 7 mrad.


A cold cathode tube lighting device is provided which is capable of obtaining stable luminance when a cold cathode tube is driven by applying voltages to input terminals on both ends of the cold cathode tube. A first current flowing through each of transformer secondary sides of transformers is detected by a tube current detecting circuit from a low-voltage side of each of the transformer secondary sides and a second current flowing through each of resonance capacitors is detected by the tube current detecting circuit and a difference between the first current and the second current is calculated for every separately-excited inverter and, based on the difference, a tube current of the cold cathode tube is obtained and frequencies of driving pulse voltages are changed by a voltage controlling oscillator for setting so that the tube current maintains a predetermined value.

1. Field of the Invention
The present invention relates to a cold cathode tube lighting device and a driving method and an integrated circuit to be employed in the cold cathode tube lighting device and more particularly to the cold cathode tube lighting device being suitably used when the cold cathode tube being used as a backlight of a liquid crystal display device is driven by applying voltages to input terminals on both ends of the cold cathode tube using separately-excited inverters and to the driving method and the integrated circuit to be used in the cold cathode tube lighting device.
The present application claims priority of Japanese Patent Application No. 2005-054698 filed on Feb. 28, 2005, which is hereby incorporated by reference.
2. Description of the Related Art
In recent years, a liquid crystal display device is used not only for monitors of personal computers, but also for various display devices such as a liquid crystal display television set. In the case of liquid crystal display television sets or a like in particular, upsizing of a liquid crystal panel progresses. As a result, backlights used in liquid crystal display devices are becoming larger in size and cold cathode tubes used in the backlights are also becoming longer. When the cold cathode tube as above is lit, in the case of shorter cold cathode tubes, its one input terminal is used as a low-voltage side and another input terminal is used as a high-voltage side and a driving pulse voltage is input to the high-voltage side. However, in the case of the longer cold cathode tubes or the cold cathode tubes having a small diameter, since impedance of the cold cathode tubes is made higher, when a driving pulse voltage is input from one input terminal (high-voltage side) of the cold cathode tubes, a display area in a region near the input terminal on the high-voltage side becomes brighter and the display area in a region near to the input terminal on the low-voltage side becomes darker, causing a luminance gradient (uneven lighting) to occur. To prevent the occurrence of the luminance gradient (uneven lighting), a both-side high-voltage driving method is employed in which the cold cathode tubes are made to light by applying driving pulse voltages which are 180° out of phase with each other to the input terminals on both ends of the cold cathode tubes. Moreover, in order to improve the efficiency of the backlight, even in the case where the cold cathode tubes are of "U"-shaped or "C"-shaped, the both-side high-voltage driving method is also used in some cases.
A conventional cold cathode tube lighting device of this type, as shown in FIG. 11, includes an oscillator 1, driving sections 2 and 3, transformers 4 and 5, and resonance capacitors 6 and 7. To output sides of the transformers 4 and 5 is connected a cold cathode tube 8. In the cold cathode tube lighting device, an oscillation frequency of the oscillator 1 is set at a frequency close to a resonant frequency of a resonant circuit made up of an inductance on each of transformer secondary sides 4b and 5b of the transformers 4 and 5 and by each of the resonance capacitors 6 and 7. High-frequency voltages having a frequency set by the oscillator 1 are generated and input to each of the transformer primary sides 4a and 5a of the transformers 4 and 5 and driving pulse voltages "e1" and "e2", which are 180° out of phase with each other, output from the transformer secondary sides 4b and 5b of the transformers 4 and 5, respectively. Each of the driving pulse voltages "e1" and "e2" is applied to each of input terminals on both ends of the cold cathode tube 8 which lights the cold cathode tube 8.
Other conventional technologies of this type, besides the cold cathode tube lighting device as described above, are disclosed in following references. That is, a conventional piezoelectric transformer driving device disclosed in Patent Reference 1 (Japanese Patent Application Laid-open No. 2002-017090, Abstract, FIG. 1), as shown in FIG. 12, includes a power source 11, a driving circuit 12, a variable oscillating circuit 13, an oscillation controlling circuit 14, a piezoelectric transformer 15, a voltage detecting circuit 16, a current detecting circuit 17, a phase difference detecting circuit 18, and an active current detecting circuit 19. Between the piezoelectric transformer 15 and the current detecting circuit 17 is connected a cold cathode tube 20. In the vicinity of the cold cathode tube 20 is provided a reflecting plate 21 being grounded and floating capacitance Cx is formed between the cold cathode tube 20 and the reflecting plate 21. In the conventional piezoelectric transformer driving device, a tube current (a current output from the piezoelectric transformer 15) flowing through the cold cathode tube 20 is detected by the current detecting circuit 17 and a phase difference between output voltage and output current from the piezoelectric transformer 15 is detected by the phase difference detecting circuit 18. Based on the phase difference, an active current flowing through the cold cathode tube 20 is detected by the active current detecting circuit 19 and the piezoelectric transformer 15 is so controlled as to be driven via the oscillation controlling circuit 14, variable oscillating circuit 13, and driving circuit 12 so that the active current becomes a predetermined value.
A conventional piezoelectric transformer driving circuit disclosed in Patent Reference 2 (Japanese Patent Application Laid-open No. 2003-324962, Abstract, FIG. 1), as shown in FIG. 13, includes a piezoelectric transformer driving section 31, piezoelectric transformers 32 and 33, and a cold cathode tube 34 is connected to output sides of the piezoelectric transformer 32 and 33. The piezoelectric transformer driving circuit also has a current transformer 35, a resistor R, capacitors C1 and C2, a differential amplifying section 36, and a rectifying section 37. In the piezoelectric transformer driving circuit, a tube current flowing through a load (cold cathode tube 34) is detected by the current transformer 35 and an output from a resonant circuit formed by a secondary side component of the current transformer 35 and of each of capacitors C1 and C2 is fed back to the piezoelectric transformer driving section 31 through the differential amplifying section 36 and the rectifying section 37 so that an output from the piezoelectric transformer driving section 31 is controlled.
In an inverter circuit of a discharge lamp lighting device disclosed in Patent Reference 3 (Japanese Patent Application Laid-open No. 2003-168584, Abstract, FIG. 1), an output frequency is controlled according to a dimming ratio indicated by a dimming signal. A change in the output frequency causes a voltage applied to a discharge lamp to be changed. A filament voltage detecting circuit detects a voltage across a filament of the discharge lamp. A judging circuit, when judging that the discharge lamp operates abnormally at time of a rise in the output voltage in the filament voltage detecting circuit, stops operations of the inverter circuit. This enables an exact detection of such an abnormality as may occur at an end of a life of the discharge lamp.
In a discharge lamp lighting device disclosed in Patent Reference 4 (Japanese Patent Application Laid-open No. Hei 11-204277, Abstract, FIG. 1), a change in impedance of each filament of a plurality of discharge lamps is detected. When an abnormal change is detected in impedance of at least one filament at time of pre-heating, sufficient preheating power is supplied to remaining filaments and, after being preheated, a stable operation of the corresponding discharge lamp is started.
However, the conventional cold cathode tube lighting devices described above have the following problems. That is, luminance in a cold cathode tube is determined by a tube current flowing through the cold cathode tube. In the one-side high-voltage driving method in which a driving pulse voltage is input from an input terminal on one side of the cold cathode tube, in many cases, a current detecting circuit made up of a resistor or a like is provided on a low-voltage side where no driving pulse voltage is input and control is exerted to keep luminance in the cold cathode tube constant based on a current detected by the current detecting circuit. However, in the both-side high-voltage driving method using separately-excited inverters as shown in FIG. 11, driving pulse voltages "e1" and "e2" are applied to both input terminals of the cold cathode tube 8 and a current detecting circuit such as a resistor cannot be inserted, which presents a problem that detection of a tube current flowing through the cold cathode tube 8 is made difficult, causing keeping the luminance of the cold cathode tube 8 constant to be impossible. Moreover, in the case where the cold cathode tube 8 is driven by using the separately-excited inverters, as shown in FIG. 14, a current flowing through transformer secondary sides 4b and 5b of the transformers 4 and 5 contains a tube current flowing through the cold cathode tube 8 and a current flowing through the resonance capacitors 6 and 7, which presents a problem that, even if control is exerted so that current values on the transformer secondary sides 4b and 5b of the transformers 4 and 5 become constant, a ratio of the current flowing through the resonance capacitors 6 and 7 to the tube current flowing through the cold cathode tube 8 changes due to secular changes in characteristics of the cold cathode tube 8, also resulting in the luminance of the cold cathode tube 8 to deteriorate.
Moreover, the conventional piezoelectric transformer driving device disclosed in the Patent Reference 1 has a problem that, since a voltage output from its piezoelectric transformer 15 is high, as a component to which the high voltage is applied, the use of a high voltage tolerant component is required, which causes a rise in costs of the driving device. Furthermore, another problem is that, since a tube current is detected only on one side of the cold cathode tube 20, due to terminal-to-terminal variations of the piezoelectric transformer 15 and/or the cold cathode tube 20, exact detection of the tube current is impossible.
Also, the conventional piezoelectric driving device disclosed in the Patent Reference 2 has also a similar problem that, since voltages output from its piezoelectric transformers 32 and 33 are high, as a component to which the high voltages are applied, the use of a high voltage tolerant component is required, which causes a rise in costs of the driving device. Furthermore, another problem is that, since a tube current is detected only on one side of the cold cathode tube 34, due to terminal-to-terminal variations of the piezoelectric transformers 32 and 33 and/or the cold cathode tube 34, exact detection of the tube current is impossible.
In the discharge lamp lighting device disclosed in Patent Reference 3, though it is possible to exactly detect such an abnormality as may occur at an end of a life of the discharge lamp, it is impossible to keep its luminance constant.
In the discharge lamp lighting device disclosed in Patent Reference 4, though a stable operation of the discharge lamp other than the discharge lamps in which an abnormal change in impedance is detected is started, it is impossible to keep its luminance constant.

Cold cathode tube lighting device and driving method and integrated circuit to be used in same


A fan includes an impeller and a housing. The housing includes a base portion and a sidewall portion disposed around and connected with the base portion. A plurality of first recesses are disposed at a connection between the base portion and the sidewall portion, and a rib is disposed between every two adjacent first recesses. The impeller includes a hub having a base portion and a wall portion disposed around and connected with the base portion, and a plurality of blades disposed on a circumference of an outer wall of the wall portion. A plurality of third recesses are disposed at a connection between the base portion of the hub and the wall portion, and a rib is disposed between every two adjacent third recesses. The recesses can prevent the impeller and the housing from the defects and shape deformation caused by injection molding during manufacturing processes, and enhance the structural strength.

1. Field of Invention
The present invention relates to a fan and its impeller and housing, and in particular, to a fan and its impeller and housing with enhanced structural strength.
2. Related Art
As shown in FIG. 1, a conventional fan housing 1, severing as a base of a fan, includes a base portion 11 and a sidewall portion 12. The sidewall portion 12 is perpendicularly disposed around and connected to the base portion 11.
Generally, the fan housing 1 is made by injection molding. As shown in FIGS. 2 and 2A, the thickness D1 of the base portion 11, the thickness D2 of the sidewall portion 12, and the thickness D3 of the connection between the base portion 11 and the sidewall portion 12 are not the same. As the results, there are defects, such as protrusions and bubbles, which are easily formed at the connection due to non-uniform thickness. Further, non-uniform thickness will cause deformation of the whole shape.
In order to keep the thicknesses D1, D2 and D3 to be uniform and prevent from the shape deformation after injection molding, a conventional solving method is forming, an arc (as shown in FIG. 3) or a groove (not shown) at the connection between the base portion 11 and the sidewall portion 12. However, that weakens the structural strength of the fan housing 1.
Except for the fan housing 1, the impeller of the fan can be also made by injection molding. The same disadvantages, such as the defects and shape deformation, exist caused by injection molding during manufacturing processes.
It is thus imperative to provide a fan and its impeller and housing to solve the above-mentioned problems.


A ratchet device is disclosed which includes a body, a ratchet wheel rotatably supported by the body, a feed pawl having an engaging portion engageable with teeth of the ratchet wheel, a support member for holding the feed pawl, a member for biasing the feed pawl toward the wheel teeth, and a drive device for moving reciprocating the support member between two positions to place the feed pawl alternately in its fully advanced and retracted positions, so as to rotate the ratchet wheel a predetermined angle in one direction. The ratchet device further includes a stopper member for contact with the feed pawl when the pawl is placed in the fully retracted position, to thereby prevent the engaging portion of the pawl from disengaging from the teeth of the ratchet wheel. Further, the engaging portion of the feed pawl is shaped so that it engages mutually opposed faces of the ratchet wheel when the feed pawl is in contact with the stopper member, to thereby lock the ratchet wheel against clockwise and counterclockwise rotations thereof. Also disclosed is a tape feeding apparatus which utilizes the ratchet device.

1. Field of the Invention
The present invention relates to a ratchet device for effecting intermittent rotation of a ratchet wheel, and more particularly to such a ratchet device which is capable of controlling a rotating angle of the wheel with improved angular positioning accuracy. The present invention is also concerned with a tape feeding apparatus which includes such a ratchet device.
2. Discussion of the Prior Art
The ratchet device as described above generally includes: (a) a body; (b) a ratchet wheel rotatably supported by the body and having teeth; (c) a feed pawl having an engaging portion engageable with the teeth of the ratchet wheel; (d) a support member movably supported by the body, for movably holding the feed pawl such that the engaging portion is movable in a direction toward and away from the teeth of the ratchet wheel; (e) biasing means for biasing the feed pawl toward the teeth of the ratchet wheel for engagement of the engaging portion with the teeth; and (f) drive means for moving the support member between a first position for placing the feed pawl in a fully advanced position, and a second position for placing the feed pawl in a fully retracted position. In the thus constructed ratchet device, when the support member is moved from the second position to the first position, the feed pawl is advanced so that its engaging position passes or clicks past at least one of the teeth of the ratchet wheel. When the support member is moved from the first position to the second position, the feed pawl is retracted while engaging the last one of the above-indicated at least one tooth which the engaging portion has passed last, so as to rotate the ratchet wheel a predetermined angle corresponding to the number of the above-indicated at least one tooth. The number of the teeth the engaging portion of the feed pawl passes during one stroke of the support member is determined by the distance of the movement of the support member, which in turn is determined depending upon a desired rotating angle of the ratchet wheel.
The ratchet device constructed as described above may be used for intermittently rotating a rotary member about an axis thereof by a predetermined incremental angle at a time, or intermittently moving a linearly movable member by a predetermined incremental distance at a time. For example, the ratchet device is used for intermittently feeding a carrier tape which has a substrate having pockets receiving electronic components, and a covering film for covering the substrate so as to close the pockets. In this case, the ratchet device serves to intermittently rotate a sprocket wheel whose teeth are adapted to engage feed holes or perforations formed through the carrier tape.
In the known ratchet device as described above, however, the ratchet wheel tends to be excessively rotated due to the inertia thereof or that of the movable member connected to the ratchet wheel when the support member is moved from the first position to the second position to rotate the ratchet wheel. Consequently, the movable member is moved more than the predetermined or nominal distance.

Ratchet device having a stopper member for preventing excessive rotation of ratchet wheel, and tape feeding apparatus using the ratchet device


A system for automatically controlling the quantity and quality of steam to a plurality of constant demand customers has a steam generating source, and pressure regulator means and steam mass flow measurement means between each constant demand customer and the steam generating source.

1. The Field of the Invention
The present invention pertains to a system allowing wet steam to be allocated between multiple constant demand users and, in particular, to system which will measure the mass rate and quality of wet steam delivered to each user to facilitate proper charging for steam usage.
2. The Prior Art
There are many instances when wet steam supplied from a single generating source is divided among multiple users of the steam for whatever their purpose. Thus it is important to be able to divide steam between multiple users and to allocate the steam to each user according to a scheme which is defined by the arrangement of a custody transfer system within an overall steam distribution piping system.
It can be appreciated that wet steam will normally leave the steam generator or source at a known quality, pressure and mass flow rate. It is important, therefore, as a matter of economic practicality that a means be instituted to control distribution of the steam. It is desirable that this be automatic to allocate steam between a multiplicity of user according to predetermined allocation schemes, such as distribution to multiple constant demand users. The purpose of such a custody transfer system would be to monitor each user's consumption of steam such that the user will be charged only for the amount of steam it actually consumes.
The measurement or monitoring of steam quality is important to determine steam usage for proper billing. Steam quality is a direct measurement of the heat contained in the steam and therefore represents the amount of fuel used to generate the steam and thus its cost.
In brief, it is desirable that the quality of steam, that is the mass of the steam vapor divided by the total mass, and that the mass flow rate be known and that the amount of steam consumed by each user likewise be known.

Method and apparatus for automatically transferring and measuring wet steam between multiple constant demand users


In a multi-cylinder internal combustion engine, a hydraulic valve rest mechanism is mounted on a valve operating device, which performs open-close driving of an engine valve which is arranged in a cylinder head of an engine body having a plurality of cylinders in an openable-and-closable manner. The hydraulic valve rest mechanism is operated with an oil pressure that is controlled by a hydraulic control device so as to close and rest engine valves of a plurality of cylinders for bringing the cylinders into a rest state Therefore, the miniaturization of the multi-cylinder internal combustion engine along an axis of a crankshaft and can shorten a length of an oil passage which connects a hydraulic valve rest mechanism and a hydraulic control device. A hydraulic control device is arranged on an engine body directly above a portion thereof corresponding to a cylinder that is expected to assume a cylinder rest state.

1. Field of the Invention
The present invention relates to a multi-cylinder internal combustion engine in which a hydraulic valve rest mechanism is mounted on a valve operating device that performs open-close driving of an engine valve. The engine valve is arranged in an openable-and-closable manner in a cylinder head of an engine body having a plurality of cylinders. The hydraulic valve rest mechanism is operated by an oil pressure that is controlled by a hydraulic control device so as to close and rest the engine valves of one or more of the plurality of cylinders for bringing the cylinders into a rest state.
2. Background of the Invention
Such a multi-cylinder internal combustion engine has already been known in JP-A-2004-293379 or the like, for example. However, in the multi-cylinder internal combustion engine that is disclosed in the above-mentioned JP-A-2004-293379, a hydraulic control device is arranged on a side of a head cover in the direction along an axis of a crankshaft. Hence, the entire internal combustion engine becomes large in size in the direction along the axis of the crankshaft and an oil passage that connects a hydraulic valve rest mechanism and a hydraulic control device is elongated.

Multi-cylinder internal combustion engine


A blood pump includes an impeller assembly housing; and an impeller assembly disposed within the impeller assembly housing. The impeller assembly includes an impeller having a main body, at least one impeller blade extending outwardly therefrom, and a skirt disposed around at least a portion of the main body. At least a portion of the at least one impeller blade is disposed between the main body and an inner surface of the skirt.

Percutaneous circulatory support devices such as blood pumps typically provide circulatory support for up to approximately three weeks of continuous use. Wear at bearing surfaces can limit the lifetime of the devices. Additionally, heat generation and mechanical interactions with the blood at the bearing and impeller-blade surface can lead to hemolysis, which can further lead to health complications such as anemia, requiring blood transfusions. Additionally, increased friction at the blood-surface interface may require higher motor power to maintain the pump output, which may warrant a bigger motor size.


A transformer including an insulating housing, a first bobbin, a primary coil, a second bobbin, a secondary coil, a first core and a second core is provided. The insulating housing has a first chamber and a second chamber separated from the first chamber, wherein two apertures of the first chamber and the second chamber are respectively disposed on two opposite side-walls of the insulating housing. The first bobbin has a first through hole disposed in the first chamber. The primary coil is surrounded on the first bobbin. The second bobbin has a second through hole disposed in the second chamber. The secondary coil is surrounded on the second bobbin. The first core is inserted to the first through hole and the second through hole. The first core and the second core are coupled together to form a magnetic loop.

1. Field of the Invention
The invention relates in general to a light tube driving device, and more particularly to a transformer of a light tube driving device.
2. Description of the Related Art
With the popularity of multi-media products, the application of liquid crystal display (LCD) in computer and TV is also becoming more and more popular. Generally speaking, the liquid crystal display uses a compact and high-efficient discharging light tube as the light source of a backlight module, and features thin thickness, high resolution and steady display quality.
The backlight module of a liquid crystal display is mainly composed of a discharging light tube such as a cold cathode fluorescent lamp (CCFL) and a transformer used for driving the cold cathode fluorescent lamp. Referring to FIG. 1, an exploded diagram of a conventional transformer is shown. The transformer 10 has a bobbin 11, a first core 13, a second core 15, a primary coil set 17 and a secondary coil set 19. After the transformer 10 is supplied with an electric current, a magnetic flux flows from a first end 15a of the second core 15 to a second end 15b, and flows through the first core 13 and returns to the second core 15.
However, since the voltage difference between the primary coil set and the secondary coil set is large, spark would easily occur between the coil on the primary coil set and the coil on the secondary coil set. Moreover, the stray capacitance effect easily occurs between the housing of the cold cathode fluorescent lamp and housing of the liquid crystal display. The stray capacitance effect will cause different CCFLs of an LCD to have different currents, hence affecting the stability of currents. When the currents flowing through a CCFL differs from one another, different CCFLs would have different luminance levels. Consequently, the luminance of the backlight module is non-uniformed. Moreover, a CCFL with higher luminance will have shorter lifespan. In order to achieve the stability of currents, a high voltage capacitor is disposed between each of the CCFLs and the secondary coil to reduce stray capacitance effect, such that the current difference between different CCFLs is reduced. However, the use of several high voltage capacitors is costive.

Transformer of light tube driving device and method for adjusting light tube using thereof


Some of the embodiments of the present disclosure provide a method comprising receiving an input from a touch input device. The input corresponds to a gesture produced by a user swiping a pattern on a surface of the touch input device. The method further comprises decomposing the gesture into segments, using a look-up table to determine alphanumeric elements that correspond to each of the segments, and assembling the alphanumeric elements into an encryption password.

Unless otherwise indicated herein, the approaches described in this section are not prior art to the claims in the present disclosure and are not admitted to be prior art by inclusion in this section.
The rate of documents and electronic files transmitted via the Internet continues to increase, as does the importance of security of private information often included in the transmitted documents and electronic files. Encrypting private documents with a textual password, for example, allows two or more parties to share private electronic documents, like pictures or an archive, over an insecure channel, such as email or posting to a public file sharing website. In the case of encrypting private documents with a textual password for transmission over a channel, one party can share the textual password to another party over another channel. Such sharing can be verbal (e.g., telephone channel or VoIP channel), for example. Assuming the channel for transmitting the textual password is secure, the effectiveness of the security thus relies on the difficulty of guessing the textual password. Easy to guess textual passwords, such as "password", are considered insecure and textual passwords that add a number, such as "baloney1", are considered more secure. Textual passwords, such as "Is8i!br0tw", are very secure, but difficult to remember. Thus, there is a general inverse relationship between ease of remembering (and communicating to another party) a textual password and the level of security of the textual password.


The contact or via hole etch pattern photomask used in fabrication of integrated circuits is modified to provide a series of grooves or trenches to be etched in the silicon oxide layer simultaneously with the contact or via holes. These trenches, after deposition and planarization of tungsten metal layer, afford regenerated alignment marks with sharply-defined edges even after deposition of a second conductive layer.

(1) Field of the Invention
The invention relates to a method for regeneration of photolithographic alignment marks under tungsten layers used in the fabrication of semiconductor integrated circuits, and more particularly to a method for regenerating alignment marks which is retained after such tungsten layers have been smoothed by the practice of chemical-mechanical polishing, which tends to eliminate such alignment marks. This practice allows subsequent precision alignment of photomask patterns required for successful circuit fabrication.
(2) Description of the Prior Art
In the fabrication of semiconductor integrated circuits, patterns of the desired configurations of conductors, insulators, and various and sundry other components of the circuit are formed by photolithographic techniques. These techniques employ stencils, known as photomasks, of the patterns which are transferred in a particular order to the circuit under manufacture. A typical integrated circuit may require that as many as a dozen or more such photomasks be employed in its manufacture. It is necessary that the successive photomask pattern applications be accurately aligned to the previous patterns already laid down on the integrated circuit substrate. For the purpose of such alignments of the patterns, a series of alignment marks are provided in each photomask to allow successive photomask patterns to be conveniently and accurately aligned to already-formed circuit patterns present. As successive layers are built up, it may become more difficult to locate and use alignment marks already present in the circuit patterns, due to the presence of intervening thicknesses of layers on the substrate surface. Additionally, the alignment marks present may be affected by subsequent processing of the pattern layer in such a fashion as to be deleterious to their function by rendering them more difficult to be observed clearly and sharply, or by obliterating them altogether. Thus, the alignment capability available for the metallization layer used for via interconnection such as, for example, tungsten relies on the replication of the sharply-defined edges of an alignment mark produced by the etching of a trench in the silicon oxide layer during the etching of contact via holes in the oxide. In this case, the photomask pattern used for the via hole etch pattern also includes the pattern for the oxide alignment mark trench pattern. The deposition of the tungsten follows the etching of the patterns in the oxide. In the conventional processing of integrated circuits, the deposition of tungsten is followed by a chemical-mechanical planarizing of the surface. This process results in a smooth planar surface which eliminates the sharply-defined edges of the alignment marks and renders subsequent pattern alignment difficult if not impossible. In order to restore a means of subsequent alignment of photomask patterns, additional photolithographic steps involving additional photomasking operations, processing, or both would be required. For example, a method of Cyrix involves removing the smoothed tungsten selectively from the alignment mark area by etching back the tungsten chemically. Both an additional photolithographic step and a chemical etch step are required. Another method employed by Advanced Micro Devices involves pre-alignment prior to tungsten metal deposition in a dedicated system with the possibility of generation of particles. Other solutions are covered in various references such as U.S. Pat. No. 5,401,691 to Caldwell, which teaches planarized alignment marks but does not cover chemical-mechanical polishing of metal layers, and in U.S. Pat. No. 5,369,050 (to Kawai), U.S. Pat. No. 4,992,394 (to Kostelak), U.S. Pat. No. 5,157,003 (to Tsuji), and U.S. Pat No. 5,314,837 (to Barber), which all show alignment marks formation, but not by chemical-mechanical polishing. Likewise, the regeneration of previous alignment marks after chemical-mechanical polishing of tungsten layers is not specifically addressed.

Taiwan Semiconductor Manufacturing Company, Ltd.


The subject invention relates to monoclonal antibodies which react with antigenic determinants which are present of the stratus corneum of human epidermis. Furthermore, the invention also relates to methods of using such monoclonal antibodies in immunoassays. One monoclonal antibody of the present invention which is particularly useful is BC 21.

1. Field of the Invention
The subject invention relates to monoclonal antibodies reactive with antigenic determinants present on the stratum corneum of human epidermis and uses thereof.
In particular, the invention relates to a monoclonal antibody, referred to as BC 21, which is useful as reagent in the treatment and diagnosis of dermatological diseases and diseases of the internal epithelia.
2. Background Information
It is known that the epidermis contains a basal membrane on which rest a layer of proliferative basal cells and layers of suprabasal cells, comprising the stratum spinosum and the stratum granulosum. These are layers of cells undergoing differentiation which become gradually keratinized and ultimately form, on the skin surface, a corneous layer (stratum corneum) composed of dead, completely keratinized cells, i.e., corneocytes. Corneocytes are formed mainly from keratin filaments which are enclosed by a very strong membrane called the corneous sheath. This corneous sheath is formed by precursor proteins linked by covalent bonds when acted upon by a specific enzyme called transglutaminase.
To study skin diseases, for example, psoriasis, acne, warts, papillomas and cancers, differentiation of the normal cells of the epidermis called keratinocytes must be better understood. As defined in the present invention, the term "normal" signifies "non-pathological." In order to undertake these studies, various markers of the terminal differentiation of the keratinocytes must be made available. A need exists in the field to identify terminal differentiation markers of the epidermis with antibodies specific for these determinants.
The present invention discloses the preparation and characterization of antibodies capable of recognizing antigenic determinants found on stratum corneum of normal human epidermis origin. Antibodies of this type are capable of reacting specifically with the stratum corneum on a non-pathological section of human epidermis. These new antibodies are potentially useful for the treatment and diagnosis of many forms of keratinization disorders such as ichthyosis, psoriasis and eczema.

Hybridoma producing a monoclonal antibody specific for an antigen of the stratum corneum of human epidermis

Centre International de Recherches Dermatologiques Galderma (Cird Galderma)


An HVAC system for work vehicle having an operator compartment for an operator is disclosed. The HVAC system includes a pressurizer blower and an air-conditioning system coupled to an electronic circuit. The electronic circuit is configured to reduce the output of the pressurizer blower when the operator selects a high output from the air-conditioning system. The HVAC system is also configured to provide defog operation in both a manual mode and an automatic mode of operation. The HVAC system is configured to reset the defog operation when the vehicle ignition is turned off or turned back on. The HVAC system is also configured not to reset the defog operation when the operator switches rapidly between the automatic mode and the manual mode of operation.

Operator compartments for modern work vehicles are often enclosed with large glass or plastic panels that extend substantially the entire way around the operator. The large panels enclose the operator and protect the operator from the elements. The panels define operator compartments that are significantly larger than the compartments of automobiles.
This large internal volume and expanse of transparent panels makes the operator compartment (or "cabin") function like a greenhouse. When a work vehicle is turned off and left in bright sunlight, even for a short time, the compartment can heat to over 50 degrees C. This solar heating is compounded by engine and transmission heat, which can be substantial as well.
The first thing most operators do on entering a work vehicle on a hot summer's day is to turn the air conditioner on full blast until the operator compartment temperature is bearable. Given the size of the operator compartment and heat loading from the sun, this can take a while.
Work vehicles may have a pressurizer blower, which can make them even more difficult to cool. Vehicles such as tractors or combines have two blowers, one blower for pressurizing the operator compartment with outside air and the other blower for recirculating air within the operator compartment.
The purpose of the pressurizer blower is to provide a slight positive pressure in the operator compartment. This ensures that no air is sucked into the operator compartment through cracks are gaps in the ceiling, walls, or floor of the operator compartment. This positive pressure is about 6 to 25 mm of water, which is enough to prevent dirty, dusty air from infiltrating into the compartment, dirtying seats and possibly fouling operator controls.
Since an older vehicle may have many small air leaks located around the compartment, a pressurizer blower may blow a significant amount of hot outside air into the operator compartment to maintain a slight positive pressure inside the compartment.
Therefore, when the operator mounts the vehicle and turns the air conditioner on, he is not only cooling down the heated interior of the operator compartment, he is also cooling down all the hot air introduced by the pressurizer blower. This delays the initial cool-down of the vehicle.
Reviewing this problem, the applicants discovered that even with the pressurizer blower disabled, a slight positive pressure can be maintained in the operator compartment by running the cabin recirculation blower at its maximum speed. At this speed, the recirculation blower draws sufficient amount of fresh air into the cab to provide minimum cab pressurization of 6 mm of water needed to protect the cab from dust ingress. Thus, it was possible to turn the pressurizer blower off, thereby reducing the amount of hot air drawn into the operator compartment during initial cool-down of the operator compartment or during extreme conditions when the vehicle is exposed to high heat loads.
What is needed, therefore, is an HVAC system for work vehicle that prevents the pressurizer blower from blowing hot air into the operator compartment during initial cool-down or extreme conditions. What is also needed is a system for reducing the output of the pressurizer blower when the operator selects high output from the air-conditioning system. What is further needed is an HVAC system that automatically senses when the operator wants high output from the vehicle air-conditioning system and automatically reduces the output of the pressurizer blower. These and other objects are satisfied by the invention described below.


A method of communicating over a network of nodes is disclosed. According to the method, it is determined whether a first node forms part of an interconnected sub-network within the network. Broadcast slots are assigned to the first node if the first node is part of the sub-network. The first node is permitted to use the assigned broadcast slots to broadcast data to other nodes. Nodes within one hop of the first node but not forming part of the sub-network are permitted to use an assigned broadcast slot if the first node is not using the broadcast slot.

Wireless communications networks have found great utility in many commercial and military applications. However, some types of wireless networks become less efficient in transmitting information when a large number of nodes are attempting to communicate thereon.
Previous efforts to increase the efficiency of a wireless network have included the following, all of which are assigned to the same entity as the present application and which are incorporated by reference herein in their entirety:
U.S. Pat. No. 5,949,760, entitled "Simultaneous Channel Access Transmission Method and a Multi-Hop Communications Radio Network";
U.S. Pat. No. 5,719,868, titled "Dynamic Distributed, Multi-Channel Time Division Multiple Access Slot Assignment Method for a Network of Nodes";
U.S. Pat. No. 6,487,186, titled "A Method and Apparatus for Managing Communication Resources Using Bootstrap Slots";
U.S. Pat. No. 6,504,829, titled "A Method and Apparatus for Managing Communication Resources Using Channelized Neighborhoods";
U.S. Pat. No. 6,628,636, titled "A Method and Apparatus for Managing Communication Resources Using Neighbor Segregation";
U.S. Pat. No. 6,317,436, titled "A Method and Apparatus for Managing Communication Resources Using an Adaptive Broadcast Cycle (ABC)";
U.S. Pat. No. 6,331,973, titled "Unifying Slot Assignment Protocol Multiple Access System";
U.S. Pat. No. 6,574,206, titled "A Method and Apparatus for Managing Communication Resources Using Speculation Slots";
U.S. Pat. No. 6,600,754, titled "A Method and Apparatus for Managing Communication Resources Using Standby Slots";
U.S. Pat. No. 6,574,199, titled "Unifying Slot Assignment Protocol Logical Neighborhooding"; and
U.S. application Ser. No. 10/689,448, filed Oct. 20, 2003, titled "Heuristics for Combining Inter-Channel and Intra-Channel Communications in a Wireless Communications Environment".
One challenge faced in communications networks is the scheduling of communications slots for each node in the network. In networks with small numbers of nodes it may be efficient to permanently assign a recurring communication slot to each node according to a predetermined schedule. Where large numbers of nodes are involved, however, the permanent pre-assignment of slots may create an unacceptably long communication cycle as each node waits its turn to communicate according to the predetermined schedule. The addition of multiple frequencies or channels may reduce delays by creating more communication slots, but fielded transceivers may not be equipped to communicate on the number of channels required for a large-scale, multi channel, low delay network. One possible solution is to use known Minimum Connected Dominating Set (MCDS) algorithms, but known MCDS solutions have not been used for scheduling communication slots in a network.
It is therefore an object of the invention to provide a communications network that efficiently manages a large number of nodes.
It is another object of the invention to provide a communications network that efficiently schedules communication slots for a plurality of nodes.
A feature of the invention is the formation of an interconnected, arterial sub-network within a communications network, where the nodes in the arterial sub-network assign communication slots to neighboring nodes.
An advantage of the invention is an increase in stability and accessibility to communication slots by nodes in a communications network.


An anechoic chamber and test system that is adapted for installation in or to a vehicle. The chamber includes an outer structure that is durable enough to withstand the effects of transportation. The anechoic chamber and test system may also include an inner faraday shield, a transmission antenna, and a controller that can introduce GNSS, alternative navigation signals, jamming, or spoofing signals into the anechoic chamber along with vehicle sensor signals. The controller is adapted to monitor a GNSS system's ability to resist the jamming or spoofing signals using, at least in part, the vehicle sensor signals.

Global navigation satellite signals (GNSS), e.g., Global Positioning System (GPS) signals, are commonly used to locate and/or guide vehicles or other devices to a destination. In particular, GNSS signals are used by the military to enable precise location and guidance to vehicles and ordinance.
More specifically, GNSS signals, e.g., GPS signals, are used to determine a current location of a device having GNSS receivers, e.g., latitude, longitude, and altitude. Additionally, the current location information provided by GNSS signals when compared to a desired location can be used to provide direction or control to allow a vehicle (or human) to traverse the distance from an initial location to the desired location. A GNSS receiver receives signals from a plurality of GNSS transmitters, e.g., GPS satellite transmitters, that use transmitted frequency and timing data to determine the distance from each satellite to the GNSS receiver. The GNSS receiver then calculates its current location using several of these signals.
Opponents faced by a military using GNSS technology often try to jam or otherwise render the location information provided by a GNSS system ineffective. Thus, to interfere with the ability of the GNSS to determine its location, jamming and spoofing techniques may be used. Jamming refers to the use of "noise signals" (often random transmission data) transmitted on the frequencies used by the GNSS receiver such that the noise signals mask the signals transmitted by the GNSS satellites. Spoofing is similar to jamming except that instead of noise signals, erroneous data is transmitted that can be received and interpreted by the GNSS receiver. Thus, when spoofed, a GNSS receiver may determine that it is present at a location or time when, in fact, it is not actually there or at that time. Either of these techniques can result in the GNSS receiver returning inaccurate location or time data with potentially disastrous results. For example, on 5 Dec. 2011, an American Lockheed Martin RQ-170 Sentinel unmanned aerial vehicle (UAV) was captured by Iranian forces near the city of Kashmar in northeastern Iran supposedly after both jamming and spoofing signals were transmitted to the UAV to confound the UAV navigation systems.
Various technologies and techniques are employed by the designers of GNSS receivers to resist jamming and spoofing. For example, GNSS receivers may be configured to receive vehicle status and other information from a vehicle or device upon which they are deployed. If the position indicated by the GNSS signal doesn't correspond to a position estimated by the use of vehicle data, the GNSS receiver may alert an operator, make corrections, or disregard a position determined from potentially spoofed or jammed satellite signals received by the GNSS.
However, testing the effectiveness of such technologies and techniques is quite costly (e.g., on the order of tens of millions of dollars), requiring an elaborate wide-scale set-up (e.g., a wide open area), extensive manpower (e.g., dozens of personnel), and time-consuming government clearance (one may not legally transmit RF jamming and spoofing signals in the open without formal permission to do so).


A magnetic resonance (MR) system comprising multiple radio-frequency (RP) coils (303) configured to apply an MR pulse sequence (100) including at least a preparation segment (PRP) and an acquisition segment (ACQ), wherein the preparation segment (PRP) and the acquisition segment (ACQ) each comprise one or more excitation pulses, is disclosed herein. The MR system further comprises a first control unit (308) configured to apply the one or more excitation pulses of the preparation segment (PRP) by activating the multiple radio-frequency coils in a first excitation pattern, and a second control unit configured to apply the one or more excitation pulses of the acquisition segment (ACQ) by activating the multiple radio-frequency coils in a second excitation pattern, thereby providing dynamic rf shimming.

U.S. Pat. No. 6,961,455 B1 discusses a fully automated coil selection technique that facilitates image reconstruction with an increased signal-to-noise ratio and reduced artifact presence. Through automatic selection of RF coils from an RF coil array, their invention discriminates between coils in an imaging field-of-view (FOV) based on an index gauge. However, their technique offers only limited possibilities to adjust the excitation uniformity of the RF coil array according to a physiological phase—for example a respiratory phase or a cardiac phase—of the patient. Thus, it is desirable to have an improved method of adjusting the excitation uniformity of an RF coil array in accordance with a physiological phase of the patient. It is also desirable to have an RF coil array with an improved capability of adjusting the coil excitation uniformity according to a physiological phase of the patient. Furthermore, it is also desirable to have an MR system capable of utilizing such an RF coil array, as well as a computer program capable of controlling such an RF coil array.

Multi-channel magnetic resonance imaging and spectroscopy


A seat structure is comprised of a support frame having an elastic fabric sheet secured to the frame along opposed lateral sides of the frame and extends across a top seating portion or front part of a backrest thereof. In one embodiment of the invention one or two extensor members are displaceably positioned between the frame and the elastic fabric sheet to a permanent tensioning position where the elastic fabric sheet undergoes an upward displacement and stretching sufficient to support an intended load, herein a user person, thereon or thereagainst in a flexible suspension in the seating or backrest portion and free from contact with any hard surfaces.

In the prior art, U.S. Pat. No. 5,393,126 describes a chair tubular frame which has a seating portion and a backrest portion connected thereto and wherein a sleeve of fabric material is slipped over the frames from an end thereof. The frames are tapered in order to slip the fabric sleeve thereover and the tension in the frame causes the sleeve to be held taut thereabout. The tapered frame is essential and therefore restricts the shape of the chair seat or backrest fabricated thereby. The chair is also difficult to fabricate as the sleeve needs to be pulled over a tensioning frame and positioned at a precise location thereon. This seating structure requires a rigid bridge support under the tensioning frame and a plate to connect to a central support post.
Another commonly known prior art seating construction is, where the seating structure, seat or backrest, is covered directly with a foam material. This foam material eventually compresses under a user's weight and the user person will eventually feel the hard seating structure underneath the foam.
U.S. Pat. No. 6,361,117 also teaches an elastic suspension for a seat structure wherein a web of elastic fabric is held in a stretched form within the seat frame to add comfort to a person sitting on a seat formed with the assembly. Further examples of stretch fabric frames are taught in U.S. Pat. Nos. 5,338,091 and 6,623,079.


A one-chip clock synchronized memory device comprises a memory constituted by an ordinary data storage area and a sequence storage area. The sequence storage area sequentially stores logic sequence data including control signals, data signals and address signals. A data area control circuit controls reading and writing of data to and from the ordinary data storage area. Logic sequence data storage means receives logic sequence data and writes the received data to the sequence storage area. The memory device is characterized by its ability to accommodate input data sequentially as logic sequence data while performing ordinary data storage operations.

1. Field of the Invention
The present invention relates to a one-chip clock synchronized memory device having a memory with a built-in logic analyzer function capable of accurately analyzing operations of a memory inside a system in operation.
2. Background Art
A presumably failed clock synchronized memory device of the above type held in systems has been analyzed by a logic analyzer for operation, with probes attached to the memory pins for control signals, address signals and data signals. The timings of these signals are observed so that suspected signals may be detected by the logic analyzer. A minimum of 30 to 40 probes would be needed optimally to carry out such verifications, except that functional and physical constraints of the logic analyzer often limit the number of probes to less than 20. The 10-odd probes thus selected are used conventionally to check and analyze the signals of the memory in question.
Recently introduced systems, for example, personal computers (PC), are noted for their complicated functionality, combined with a large-scale memory. Such as a 168-pin module memory. To analyze operations of such a memory accurately would require setting up nearly 160 probes for attachment to memory pins. In cases where two 168-pin modules are installed in a system, the need has been recognized to prepare as many as 320 pins for analyzing operations of the incorporated memories. That need is acutely felt during attempts to analyze a failure that is detectable only when an application program is run on the system.
As outlined above, memory failures in systems are analyzed conventionally by the logic analyzer with probes attached to memory pins. However, setting up a large number of probes needed for the check has often turned out to be impractical, as well as costly.
Furthermore, there has been a growing need to efficiently and accurately analyze for the failure of systems containing clock synchronized memory chips that are higher in operating speed and more complex than ever in structure.

One-chip clock synchronized memory device