A message authentication code, MAC, is generated in an electronic circuit, wherein the MAC integrity protects a data value, PD. A random challenge word, RND, is received from a source that is external to the electronic circuit. A first function G(RND,K) is evaluated that generates a first encrypted value, K′, from RND and K, wherein K is a secret key value that is stored on the electronic circuit. A second function F(RND,K) is evaluated that generates a second encrypted value, K″, from RND and K. The MAC is then generated in accordance withMAC=K″+m1K′+m2K′2+ . . . +MlK′l,wherein m1, m2, . . . , ml are derived by representing the data value, PD, as an l-tuple of elements in a field, GF(2n), wherein n is an integer greater than zero. A hardware-efficient arrangement is also disclosed for generating this and other MACs.

The present invention relates to providing integrity protection for data in an efficient manner.
For many types of programmable electronic equipment, there is a need to protect the equipment from illegal reprogramming. This is the case, for example, with mobile communications equipment (e.g., cellular telecommunications equipment), in which there is a need not only to ensure that only type approved software is running on the equipment, but also to provide secure locking mechanisms for sensitive information stored in the equipment (e.g., a secure Subscriber Information Module (SIM) Lock mechanism). One important ingredient in a system solution for protection against unauthorized reprogramming is the use of One Time Programmable (OTP) memory. As its name expresses, OTP memory is a type of memory device that permits a single recording of information into a memory area. OTP memories are nonvolatile (i.e., they retain their information even when powered off). Initially, an OTP is in an unprogrammed state. Then, there is a programming phase in which the memory bits are programmed (e.g., one by one or as an entire block in a single operation, the particular implementation being irrelevant to this discussion). Following the recording of the information (hereinafter referred to as "OTP data"), the OTP memory is locked by any one of several techniques that prevents any information from being written in that portion of memory. Often, the information cannot be erased once the OTP enters its "locked" state. In some implementations, erasing is permitted but only when applied to the entire block of memory bits; erasing cannot be selectively applied to individual memory locations.
OTP memory is useful in many types of applications. As just one of many possible examples, before mobile equipment is customized, it must be possible to store the equipment software into a nonvolatile memory (e.g., a flash memory device). Hence, there exists a vulnerable "virgin state" that allows new software and parameters to be programmed into the equipment. It is, therefore, important to make sure that once the equipment has left the factory, it is not be possible to bring the equipment back to this "virgin" state in any uncontrolled manner as this would allow illegal reprogramming. An OTP memory is very useful for this purpose because its contents can be used to hold information that distinguishes equipment that has left the factory from equipment that has not. One can, for example, set a so-called production flag in the OTP memory once the equipment's customization is finalized. This flag then informs the equipment boot and loader software that the equipment is customized and that any reprogramming needs special authorization.
The software utilizing the OTP information is typically executed on the main processor of the equipment (e.g., the main baseband processor of mobile communication equipment e.g., a mobile phone). This implies that the most secure OTP-based solution is a solution in which the OTP memory resides on the same integrated circuit—"chip"—(e.g., a baseband processor in a mobile phone) as the main processor, since this will make tampering of the OTP read functionality much more difficult. Unfortunately, it is not always possible to offer on-chip OTP memory due to a number of technical and cost limitations. Consequently the OTP memory must often be realized in an external hardware component. In such an arrangement, there is of necessity a communications link for conveying the OTP readout from the external hardware component to the main processor. This communications link exposes the OTP reading function to manipulations of the data transfer between the OTP memory and the baseband chip. Manipulated data can cause the equipment to appear to be back in its "virgin" state, and therefore susceptible to unauthorized reprogramming.
The situation described thus far with respect to OTP memory is but one example of the more general problem that arises when data stored on a peripheral device (henceforth referred to as "peripheral data" or "PD") is exposed to unauthorized manipulation when read by a "main" processor.
This threat can be considerably reduced by protecting the PD read operations by cryptographic means. More specifically, the main processor can determine whether the data that it receives from the communications link between itself and the peripheral memory (e.g., OTP memory) is authentic by issuing a random (or pseudorandom) challenge word (RND) to the external hardware component at or about the time that it initiates a read operation from the peripheral memory. The external hardware component reads the data from the peripheral memory and uses an encryption procedure to derive a "Message Authentication Code" (MAC) from the peripheral data, a previously stored secret key (K), and the random challenge word (RND). The generated MAC is then returned to the main processor along with the peripheral data. The main processor, which also maintains a copy of the secret key K, uses the secret key K, the received peripheral data, and the issued random challenge word (RND) to calculate a reference MAC′ value. If MAC′ equals the received MAC value, then the received peripheral data is regarded as valid (i.e., it has not been tampered with).
The most common way to construct a MAC for this and other purposes is to base it on so-called one-way hash functions, such as SHA-1 and MD5. The interested reader can refer to J. Menezes, P. C. van Oorschot and S. A. Vanstone, Handbook of Applied Cryptography, Chapter 9.4, pp. 338-351 (1997) for more details. One of the most widely used MAC functions is the HMAC function that actually is based on a one-way hash function. The interested reader can refer to "HMAC Keyed-Hashing for Message Authentication," IETF RFC 2104.
If a MAC is to be generated in a peripheral unit, for example for the purpose of providing a mechanism for protecting the integrity of data supplied by that peripheral unit (e.g., the OTP data discussed above), it is desirable that the MAC calculation hardware be implemented using the smallest possible components. Unfortunately, a MAC implementation based on a one-way hash function or a block cipher is rather complex, and therefore does not satisfy this criterion. For example, an optimized SHA-1 hardware implementation alone typically has a size of around 14K gates.
It is therefore desirable to provide high security data integrity apparatuses and methods that can be implemented in a component-efficient manner.


The invention relates to managing registers during a binary translation mode in a virtual computing system. A set of registers is saved to memory before beginning to execute a series of blocks of translated code, and the contents of the set of registers are restored from memory later. A status register is maintained for tracking the status of each register within the set, the status indicating whether the contents are valid and whether the contents are saved in memory. Before the execution of each block, a determination is made as to whether the actions taken within the block relative to the registers are compatible with the current status of the registers. If the actions are not compatible, additional registers are saved to memory or restored from memory, so that the translation block can be executed.

1. Field of the Invention
This invention relates to the field of virtual machines for computer systems.
2. Description of the Related Art
The preferred embodiment of the invention is described relative to a binary translator for a virtual computer system. Consequently, this description begins with an introduction to virtual computing.
Virtualization has brought many advantages to the world of computers. As is well known in the art, a virtual machine (VM) is a software abstraction—a "virtualization"—of an actual physical computer system that runs as a "guest" on an underlying "host" hardware platform. As long as a suitable interface is provided between the VM and the host platform, one advantage is that the operating system (OS) in the guest need not be the same as the OS at the system level in the host. For example, applications that presuppose a Microsoft Windows OS can be run in the VM even though the OS used to handle actual I/O, memory management, etc., on the host might be Linux.
It usually requires less than 10% of the processing capacity of a CPU to run a typical application, although usage may peak briefly for certain operations. Virtualization can more efficiently use processing capacity by allowing more than one VM to run on a single host, effectively multiplying the number of "computers" per "box." Depending on the implementation, the reduction in performance is negligible, or at least not enough to justify separate, dedicated hardware "boxes" for each user.
Still another advantage is that different VMs can be isolated from and completely transparent to one another. Indeed, the user of a single VM will normally be unaware that he is not using a "real" computer, that is, a system with hardware dedicated exclusively to his use. The existence of the underlying host will also be transparent to the VM software itself. The products of VMware, Inc., of Palo Alto, Calif. provide all of these advantages in that they allow multiple, isolated VMs, which may (but need not) have OSs different from each other's, to run on a common hardware platform.
Example of a Virtualized System
FIG. 1 illustrates the main components of a system that supports a virtual machine as implemented in the Workstation product of VMware, Inc. As in conventional computer systems, both system hardware 100 and system software 200 are included. The system hardware 100 includes CPU(s) 102, which may be a single processor, or two or more cooperating processors in a known multiprocessor arrangement. The system hardware also includes system memory 104, one or more disks 106, and some form of memory management unit (MMU) 108. As is well understood in the field of computer engineering, the system hardware also includes, or is connected to, conventional registers, interrupt-handling circuitry, a clock, etc., which, for the sake of simplicity, are not shown in the figure.
The system software 200 either is or at least includes an operating system OS 220, which has drivers 240 as needed for controlling and communicating with various devices 110, and usually with the disk 106 as well. Conventional applications 260, if included, may be installed to run on the hardware 100 via the system software 200 and any drivers needed to enable communication with devices.
As mentioned above, the virtual machine (VM) 300—also known as a "virtual computer"—is a software implementation of a complete computer system. In the VM, the physical system components of a "real" computer are emulated in software, that is, they are virtualized. Thus, the VM 300 will typically include virtualized ("guest") system hardware 301, which in turn includes one or more virtual CPUs 302 (VCPU), virtual system memory 304 (VMEM), one or more virtual disks 306 (VDISK), and one or more virtual devices 310 (VDEVICE), all of which are implemented in software to emulate the corresponding components of an actual computer.
The VM's system software 312 includes a guest operating system 320, which may, but need not, simply be a copy of a conventional, commodity OS, as well as drivers 340 (DRVS) as needed, for example, to control the virtual device(s) 310. Of course, most computers are intended to run various applications, and a VM is usually no exception. Consequently, by way of example, FIG. 1 illustrates one or more applications 360 installed to run on the guest OS 320; any number of applications, including none at all, may be loaded for running on the guest OS, limited only by the requirements of the VM.
Note that although the hardware "layer" 301 will be a software abstraction of physical components, the VM's system software 312 may be the same as would be loaded into a hardware computer. The modifier "guest" is used here to indicate that the VM, although it acts as a "real" computer from the perspective of a user, is actually just computer code that is executed on the underlying "host" hardware and software platform 100, 200. Thus, for example, I/O to the virtual device 310 will actually be carried out by I/O to the hardware device 110, but in a manner transparent to the VM.
If the VM is properly designed, then the applications (or the user of the applications) will not "know" that they are not running directly on "real" hardware. Of course, all of the applications and the components of the VM are instructions and data stored in memory, just as any other software. The concept, design and operation of virtual machines are well known in the field of computer science. FIG. 1 illustrates a single VM 300 merely for the sake of simplicity; in many installations, there will be more than one VM installed to run on the common hardware platform; all will have essentially the same general structure, although the individual components need not be identical.
Some interface is usually required between the VM 300 and the underlying "host" hardware 100, which is responsible for actually executing or having executed VM-related instructions and transferring data to and from the actual, physical memory 104. One advantageous interface between the VM and the underlying host system is often referred to as a virtual machine monitor (VMM), also known as a virtual machine "manager." Virtual machine monitors have a long history, dating back to mainframe computer systems in the 1960s. See, for example, Robert P. Goldberg, "Survey of Virtual Machine Research," IEEE Computer, June 1974, p. 54-45.
A VMM is usually a relatively thin layer of software that runs directly on top of a host, such as the system software 200, or directly on the hardware, and virtualizes the resources of the (or some) hardware platform. The VMM will typically include at least one device emulator 410, which may also form the implementation of the virtual device 310. The interface exported to the respective VM is usually such that the guest OS 320 cannot determine the presence of the VMM. The VMM also usually tracks and either forwards (to the host OS 220) or itself schedules and handles all requests by its VM for machine resources, as well as various faults and interrupts. FIG. 1 therefore illustrates an interrupt (including fault) handler 450 within the VMM. The general features of VMMs are well known and are therefore not discussed in further detail here.
In FIG. 1, a single VMM 400 is shown acting as the interface for the single VM 300. It would also be possible to include the VMM as part of its respective VM, that is, in each virtual system. Although the VMM is usually completely transparent to the VM, the VM and VMM may be viewed as a single module that virtualizes a computer system. The VM and VMM are shown as separate software entities in the figures for the sake of clarity. Moreover, it would also be possible to use a single VMM to act as the interface for more than one VM, although it will in many cases be more difficult to switch between the different contexts of the various VMs (for example, if different VMs use different guest operating systems) than it is simply to include a separate VMM for each VM. This invention works with all such VM/VMM configurations.
In some configurations, the VMM 400 runs as a software layer between the host system software 200 and the VM 300. In other configurations, such as the one illustrated in FIG. 1, the VMM runs directly on the hardware platform 100 at the same system level as the host OS. In such case, the VMM may use the host OS to perform certain functions, including I/O, by calling (usually through a host API—application program interface) the host drivers 240. In this situation, it is still possible to view the VMM as an additional software layer inserted between the hardware 100 and the guest OS 320. Furthermore, it may in some cases be beneficial to deploy VMMs on top of a thin software layer, a "kernel," constructed specifically for this purpose.
FIG. 2 illustrates yet another implementation, in which the kernel 700 takes the place of and performs the conventional functions of the host OS. Compared with a system in which VMMs run directly on the hardware platform, use of a kernel offers greater modularity and facilitates provision of services that extend across multiple virtual machines (for example, resource management). Compared with the hosted deployment, a kernel may offer greater performance because it can be co-developed with the VMM and be optimized for the characteristics of a workload consisting of VMMs.
As used herein, the "host" OS therefore means either the native OS 220 of the underlying physical computer, or whatever system-level software handles actual I/O operations, takes faults and interrupts, etc. for the VM. The invention may be used in all the different configurations described above.
Speed is a critical issue in virtualization—a VM that perfectly emulates the functions of a given computer but that is too slow to perform needed tasks is obviously of little good to a user. Ideally, a VM should operate at the native speed of the underlying host system. In practice, even where only a single VM is installed on the host, it is impossible to run a VM at native speed, if for no other reason than that the instructions that define the VMM must also be executed. Near native speed, is possible, however, in many common applications.
The highest speed for a VM is found in the special case where every VM instruction executes directly on the hardware processor. This would in general not be a good idea, however, because the VM should not be allowed to operate at the greatest privilege level; otherwise, it might alter the instructions or data of the host OS or the VMM itself and cause unpredictable behavior. Moreover, in cross-architectural systems, one or more instructions issued by the VM may not be included in the instruction set of the host processor. Instructions that cannot (or must not) execute directly on the host are typically converted into an instruction stream that can. This conversion process is commonly known as "binary translation."
U.S. Pat. No. 6,397,242 (Devine, et al., "Virtualization system including a virtual machine monitor for a computer with a segmented architecture"), which is incorporated herein by reference, describes a system in which the VMM includes a mechanism that allows VM instructions to execute directly on the hardware platform whenever possible, but that switches to binary translation when necessary. This allows for the speed of direct execution combined with the security of binary translation.
A virtualization system of course involves more than executing VM instructions—the VMM itself is also a software mechanism defined by instructions and data of its own. For example, the VMM might be a program written in C, compiled to execute on the system hardware platform. At the same time, an application 360 written in a language such as Visual Basic might be running in the VM, whose guest OS may be compiled from a different language.
There must also be some way for the VM to access hardware devices, albeit in a manner transparent to the VM itself. One solution would of course be to include in the VMM all the required drivers and functionality normally found in the host OS 220 to accomplish I/O tasks. Two disadvantages of this solution are increased VMM complexity and duplicated effort—if a new device is added, then its driver would need to be loaded into both the host OS and the VMM. In systems that include a host OS (as opposed to a dedicated kernel such as shown in FIG. 2), a much more efficient method has been implemented by VMware, Inc., in its Workstation product. This method is also illustrated in FIG. 1.
In the system illustrated in FIG. 1, both the host OS and the VMM are installed at system level, meaning that they both run at the greatest privilege level and can therefore independently modify the state of the hardware processor(s). For I/O to at least some devices, however, the VMM may issue requests via the host OS 220. To make this possible, a special driver VMdrv 242 is installed as any other driver within the host OS 220 and exposes a standard API to a user-level application VMapp 500. When the system is in the VMM context, meaning that the VMM is taking exceptions, handling interrupts, etc., but the VMM wishes to use the existing I/O facilities of the host OS, the VMM calls the driver VMdrv 242, which then issues calls to the application VMapp 500, which then carries out the I/O request by calling the appropriate routine in the host OS.
In FIG. 1, the vertical line 600 symbolizes the boundary between the virtualized (VM/VMM) and non-virtualized (host software) "worlds" or "contexts." The driver VMdrv 242 and application VMapp 500 thus enable communication between the worlds even though the virtualized world is essentially transparent to the host system software 200.
Execution Modes: Direct Execution, Binary Translation and Interpretation
As described above, the VM 300 is a software implementation of a complete computer system. The guest system software 312, including the guest OS 320, and the applications 360 may be loaded onto the VM 300 and executed, just as if the VM 300 were a "real", physical computer system. In supporting the VM 300, the VMM 400 must enable the execution of VM instructions or emulate the execution of VM instructions (also referred to as guest instructions), including instructions from the guest system software 312 and the applications 360. The methods by which guest instructions are executed or emulated are referred to as execution modes of the VMM 400. The system described herein includes three distinct execution modes.
One mode—the direct execution mode—is described above and is well known in the art of virtualization: In the direct execution mode, VM instructions are executed directly on the host hardware processor, since they cannot affect any sub-system or access any memory, register, etc., that is off-limits to the VM. Direct execution is fast, because there is no need for intermediate processing in the VMM. The VMM therefore includes any known direct execution engine 460 to perform this function.
Binary translation is also mentioned above: A VM instruction (or instruction stream) cannot be allowed to execute as is for any of several reasons, for example, it attempts to access the VMM, or assumes a privilege level higher than the user level the VM runs at. Although possible, the VMM preferably detects the need for binary translation not by examining each VM instruction before it is to be executed, but rather by detecting exceptions, interrupts, etc., that arise from attempted execution of instructions that cannot be directly executed. The VMM itself establishes many of the mechanisms used to generate these exceptions, for example, using memory tracing; other interrupts will be raised by the underlying system software.
In the binary translation mode, a binary translation engine 462 in the VMM checks a translation cache 463 to determine whether there is an existing translation of the instruction (or instruction stream) into a form that is "safe" to pass to the hardware processor for execution. If there is such a translation, then the translation is executed. If there is not yet a translation, for example, the first time the instruction is encountered, the first time it traps, etc., then the binary translation engine generates one.
Alternatively, the VM instruction (or stream) under consideration can be passed to a conventional interpreter 464, which emulates the execution of the VM instruction(s) in software. Note that interpretation is usually cheaper than binary translation in terms of processing cycles required, but that binary translation will be much faster if a translation already exists in the cache 463—the translation can be used more than once.
CPU Registers and Binary Translation
This invention relates to the use of registers within the CPU 102 during the binary translation mode. As described above, binary translation involves translating one or more guest instructions into one or more target instructions that are safe for execution on the system hardware 100. The target instructions will generally use many of the same registers as the guest instructions. For example, if a guest instruction loads a value from a memory location addressed by the contents of a first register R1 into a second register R2, the target instructions resulting from a binary translation will typically use the same registers for the same purposes. The target instructions will typically expect to find the address for the operand in the register R1 and will typically be expected to load the operand into the register R2. The target instructions may also use additional registers, which are not used by the guest instructions, for intermediate values and for other purposes. These registers are referred to as scratch registers. Typically, a scratch register is used for a short period of time for temporary storage of an intermediate value. In some embodiments of the invention, a scratch register is used only within a single block of translated instructions, so that there will be no dependence on the value in the scratch register outside of that block of translated instructions.
As an example of the use of scratch registers, suppose the guest software includes the following instruction:                (qp) mov r1=cr3The VMM 400 emulates the function of the control register cr3, using a location in memory to store the current value of the register, as seen within the VM 300. Thus, the VMM writes a value to the selected memory location when the register cr3 is to be loaded with a value and reads a value from the selected memory location when the register cr3 is to be read. Suppose further that a base address for the VMM has already been loaded into a scratch register sr0. The base address may be retained in the register sr0 throughout the execution of the block of translated code. Under these circumstances, the above instruction may be translated into the following sequence of instructions:        movl sr1=addr;;        add sr1=sr0,sr1 ;;        ld8 r1=[sr1]The variable "addr" is the virtual address for the memory location that holds the value of the virtual guest register cr3, or the offset from the VMM base address to the virtual guest register cr3. The registers sr0 and sr1 are used as scratch registers. The contents of the scratch register sr1 typically would not be used outside this sequence of instructions.
A binary translator must be careful in its use of scratch registers, however. In the virtual computing system described herein, the VMM 400 switches back and forth between direct execution mode and binary translation mode. Suppose the VMM executes a first set of guest instructions in direct execution mode. Suppose next that an exception occurs that causes the VMM to switch to binary translation mode, just before a second set of guest instructions was to be executed. Suppose that the second set of guest instructions is translated, using binary translation, into a first set of target instructions, so that the first set of target instructions is executed next. Suppose that, after executing the first set of target instructions, the VMM switches back to direct execution mode for execution of a third set of guest instructions.
Now suppose that the first set of guest instructions writes a first value into the first register R1. Suppose further that an instruction in the third set of guest instructions relies on the first value being loaded into the first register when the third set of guest instructions is executed. Now, when the binary translator generates the first set of target instructions, based on the second set of guest instructions, the translator must ensure that the first register contains the first value after execution of the target instructions. Suppose that the translator needs to use a scratch register for some purpose within the second set of target instructions. If the translator were to use the register R1, without any remedial actions, the contents of the register R1 would typically be overwritten when the target instructions are executed, and the first value would not be available to the third set of guest instructions.
Of course, the translator could choose to use a different register, instead of the register R1. This implies, however, that the translator can determine another register that is available for use as a scratch register. First, there may not be a register that is available for use, and, even if there is a register available for use, it may not be easy for the translator to determine which register(s) are currently available.
Another possible remedial action would be to add instructions to the set of target instructions that save the contents of the first register R1 to memory before using the register as a scratch register, and return the first value from memory to the first register R1 before returning to direct execution mode for execution of the third set of guest instructions.
In some architectures, however, saving the first register R1 to memory in the first place may be problematic. Some architectures permit only indirect memory addressing, instead of allowing immediate addresses to be used to specify a memory location. This means that a second register must be used to save the first register R1 to memory. Now, the same dilemma arises as to which register, if any, can be used for the indirect memory addressing.
Also, as indicated above, speed is a critical issue in virtualization. Of course, it takes time to store register values into memory before executing target instructions that emulate the corresponding guest instructions, and restoring the values into the registers after the target instructions have been executed. In some situations, the string of target instructions required to emulate a set of guest instructions may be small relative to the instructions required to save and restore register values. In addition, such target instructions may be executed frequently. Consequently, saving and restoring register values during the binary translation mode may be relatively expensive in terms of execution time. Also, methods for determining which registers are available for use as scratch registers can also differ substantially in terms of consuming processing resources.
What is needed therefore is an efficient method and apparatus for managing registers in a binary translator, enabling one or more of the registers to be used as scratch registers by target instructions, while maintaining the integrity of the contents of each of the registers during and after the execution of the target instructions. Such a method and apparatus is needed, in particular, for an architecture that permits only indirect memory addressing. This invention provides such a method and apparatus.

Method and apparatus for managing registers in a binary translator


A robot system for taking out workpieces from a box using a robot having a floating hand and a workpiece recognition apparatus. The workpiece recognition apparatus detects the position and inclination of a selected workpiece, and calculates a target position and a desired inclined posture of the hand. The posture is so decided that a line of intersection of the floating plane of the hand with a vertical plane containing the longitudinal axis of the workpiece, becomes parallel to a horizontal direction, and the center axis of the wrist portion becomes perpendicular to the line of intersection. Data indicating the target position and the desired inclined posture are transmitted to the robot controller of the system, so that the controller drives the servomotors of the robot in such a way that the hand moves toward the target position with a desired inclined posture. With this operation, the hand contacts with the selected workpiece at a predetermined position to pick up the workpiece.

1. Field of the Invention
The present invention relates to a method and an apparatus for controlling a robot which has a floating hand for picking up a workpiece.
2. Discussion of the Prior Art
A robot having a floating hand is used to pick up workpieces which are piled up in a box. An example of such robot is disclosed in the Japanese utility model publication 59-173591. The robot is provided with a hand having an electric magnet, and the hand is attached to the wrist portion of the arm through a floating mechanism which allows the hand to swing in three dimensions. Using the floating hand, the workpieces can be picked up even if the postures of the workpieces are different from each other.
Such robot is also combined with a vision system to pick up workpieces. FIG. 1 (a) shows a method of picking up workpieces 22 from a box 21. During such picking up operation, the hand 62 interferes with a side wall of a box 21 when the robot picks up a workpiece 22 located near to the side wall of the box 21 by a downward movement of the hand 62 along a vertical direction A. Although this problem can be overcome by moving the hand 62 along an inclined direction B, the hand 62 may swing down from its center position, as indicated by a solid line in FIG. 1 (b), if the posture of the hand 62 is controlled taking no account of the direction of the floating plane FLP of the hand 62. This causes a position difference between a target holding position P1 and actual holding position P2 at which the workpiece is held. The position error then produces weight imbalance by which the workpiece may fall off from the hand 62.

Method and apparatus for controlling a robot having a floating hand


A dipole permanent magnet structure for use in a sputtering magnetron in which a central magnet structure having a magnetic field orientation parallel to a base plate, and upon which the central magnet is mounted, is placed adjacent to a first salient magnet having a magnetic field orientation orthogonal to the magnetic field orientation of the central magnet. A second salient magnet, located adjacent to the central magnet structure, has a magnetic field orientation orthogonal to the magnetic field orientation of the central magnet, but opposite polarity of the first salient magnet. The structure provides increased magnetic field strength and intensity along the working face of the sputtering magnetron to saturate and penetrate a target material inserted into the vacuum chamber of a sputtering system to facilitate the sputtering process.

1. Field of the Invention
The present invention relates to the field of permanent magnets. More specifically, the present invention relates to the field of a permanent magnet structure as may be embodied in a sputtering magnetron for generating an external magnetic field capable of saturating and penetrating a target material used in a sputtering process.
2. Description of the Related Art
Introduction
Sputtering is a process in which atoms of a target material are deposited on a substrate. In general, the sputtering process involves loading clean substrates into a vacuum chamber, evacuating the chamber to a low pressure to remove contaminants, filling the chamber with an inert gas, (such as argon), to a particular operating pressure, initiating and sustaining a glow discharge, or plasma, by application of a high negative electrostatic voltage to a cathode/target assembly, and sputter depositing of the target material onto the substrates.
When a sufficiently large DC voltage is applied to the sputtering system, electrons are pulled from the target material towards the substrates. As the target electrons move from the target material toward the substrates, many such electrons strike argon gas atoms. This strips electrons from the argon atoms, leaving positively charged argon ions and liberating additional electrons. The positively charged argon ions accelerate toward the surface of the negative target and gain kinetic energy. Energy is transferred to the target surface upon impact and neutral atoms of the target material are ejected as a result. Target atoms expend energy as they travel from the target surface, so the substrates are generally located nearby, where bombardment energy causes the target atoms to deposit on, and diffuse into, the substrate surface. Electrons are also freed from the target surface and accelerate into the plasma where they strike argon gas atoms to create more ions and free electrons to sustain the process.
In an improvement to the sputtering system, the external magnetic field of a magnet assembly, called a magnetron, is superimposed upon the electric field to speed up the sputtering process. The external magnetic field traps electrons liberated from the target by applying a magnetomotive force to direct the electrons back to the surface of the negative target where they are repelled. The resulting path of the electrons becomes convoluted, i.e., a spiral path through the argon gas. This increases the frequency of strikes with argon atoms which creates more argon ions to strike the target surface and transfer target material from the target to the substrates at a faster rate. The arrangement of magnetic and electric fields in the sputtering system is known to those of ordinary skill in the art as a cross field device.
It should be noted that ion strikes on the target are distributed around the center line of the charged particle path. This causes a characteristic gaussian erosion pattern normal to the path of the charged particle. The center of the erosion pattern, i.e., the greatest erosion depth, occurs where the magnetic neutral zone is found. It is at this point that the magnetic field vector component parallel to the target surface is at a maximum.
If the strength of the magnetic field vector component parallel to the target surface is increased, the sputter rate increases up to an asymptotic level. Thus, there is a limit to the useful intensity of the applied magnetic field, depending on particle velocity due to electrostatic field strength, sputter system pressure, and other well known physical parameters of the sputtering system.
If the external magnetic field generated by the sputtering magnetron can be spread so the magnetic field vector component parallel to the target surface (normal to the electric field) covers a larger width, or area, then the erosion pattern on the target surface will spread providing more of the available target material for use in the sputtering system. This is relevant to the economy of the sputtering system operation. Such a result can be accomplished by spreading the effective magnetic poles and/or superimposing the magnetic fields of several dipole magnets so their external magnetic field components add, or buck, and shape the external magnetic field. However, the magnetic field vector component parallel to the target surface will generally be greatest close at the midpoint between magnetic poles, but to a lesser degree.
Where the target material in a sputtering system is magnetically permeable, magnetron influenced sputtering occurs if, and when an external magnetic field saturates and passes through the target material. The external magnetic field will pass through the target material if the target material offers a low reluctance path, and in a manner inversely proportional to the reluctance of available magnetic flux paths, or if the magnetron supplies sufficient magnetic flux to saturate the target. Generally, permanent magnets with high residual induction are utilized to provide sufficient magnetic flux.
Permeable magnetic materials have a characteristic "S" shaped permeability versus magnetization curve. Since reluctance is proportional to permeability, the lowest reluctance will occur when the magnetic material is pushed into saturation. However, there may be favorable low reluctance flux paths in that portion of the ferrous target material operating in its initial permeability range. Permeable materials also produce induction, i.e., a magnetic field of their own, when their magnetic domains are aligned by an external magnetic field, e.g., the dipole field of a magnetron.
Thus, the magnetic field of the magnetron is attracted to, shunted and shaped by the location, geometry, and magnetic properties of ferrous target materials. This causes problems when attempting to shape the vector components of the magnetic field contributing to the aforementioned cross field device.

Permanent magnet strucure for use in a sputtering magnetron


A solar cell module comprising a cell block sealed by a sealing resin, said cell block comprising a plurality of solar cells electrically connected with each other by an electrically conductive connection material, characterized in that a sliding material having a property of not bonding to said electrically conductive connection material but bonding to said sealing resin is interposed between said electrically conductive connection material and said sealing resin.

1. Field of the Invention
The present invention relates to a solar cell module having an improved reliability against folding. More particularly, the present invention relates to a highly reliable solar cell module which excels in flexibility and has good exterior appearance and which can be freely bent and can be used as a building material such as a roofing material.
2. Related Background Art
There have been proposed a variety of so-called roof-integral type solar cell modules capable for use as a roofing material of a building by integration with other roofing materials. These solar cell modules are usually produced in a manner of electrically connecting a plurality of solar cells with each other in series connection by an electrically conductive connection material into a cell block comprising the solar cells integrated in series connection, sealing said cell block on a reinforcing member using a sealing resin into a module, and bending the reinforcing member of the module as desired.
For instance, Japanese Unexamined Patent Publication No.302924/1995 (hereinafter referred to as Japanese document '924) discloses a roof-integral type solar cell module shaped in a plate-like form which can be provided at a reasonable cost on the market for the following reasons. This solar cell module has good compatibility with ordinary roofing material, and it can be readily installed by way of ordinary roofing work where hanging tools and the like used in ordinary roofing work can be used. In addition, the solar cell module can be readily processed into an appropriate roof-shaped solar cell module by means of a roll former making machine without using extra instruments.
In Japanese document '924, there is described a roof-integral type solar cell module processed by way of forming using a roll former making machine to have a shape suitable for crosswise roofing. The solar cells in this solar cell module are arranged in a flat area of the module so as to prevent them from suffering from stress upon the forming treatment and the like. Particularly, this solar cell module shaped suitable for crosswise roofing comprises a flat portion having the solar cells arranged therein, a solar cell-free ridge side meshing portion and a solar cell-free eaves side meshing portion, wherein the ridge side meshing portion and the eaves side meshing portion function as fixing means when the solar cell module is installed.
Now, for the configuration for a solar cell module used as a roofing material, there are known a roll-like configuration, a roof tile-like configuration, a flat configuration, and the like.
Recently, there is a demand on the market for providing a solar cell module having a curved configuration such as a corrugated configuration which is usable as a roofing material.
Besides, there is also a demand on the market for providing a solar cell module having no reinforcing member and which can be freely bent.
In the case of a conventional solar cell module in which a plurality of solar cell modules integrated in series connection by means of an electrically conductive connection material are held on a reinforcing member while being sealed by a sealing resin, when the solar cell module is bent into a desired shape, a problem is likely to occur in that the electrically conductive connection material cracks because it is difficult to bend.
FIG. 14 is a schematic cross-sectional view illustrating the constitution of an example of such a conventional solar cell module.
The solar cell module shown in FIG. 14 comprises a cell block comprising a plurality of solar cells 1402 electrically connected with each other by an electrically conductive connection material 1405 and which is sealed by a resin filler material 1403 on a reinforcing member 1401 while covering a front side of the cell block by a surface protective film 1404. The solar cell module shown in FIG. 14 has a curved shape formed by bending the reinforcing member 1401.
In the following, description will be made of a stress caused at a bent portion in the solar cell module when the reinforcing member 1401 is bent.
Corrugation of the solar cell module as shown in FIG. 14 is conducted by bending the reinforcing member 1401. In bending the reinforcing member 1401 in this case, a neutral line 1410 of the reinforcing member 1401 is engaged in the bending as a processing neutral line. Because of this, a portion of the sealed area having a radius of curvature which is smaller than that of the processing neutral line 1410 suffers from a shrinkage force. Particularly, the solar cell 1402 or the electrically conductive connection material 1405 situated in a recessed portion suffers from a shrinkage force to deform. Similarly, the solar cell 1402 or the electrically conductive connection material 1405 situated in a portion of the sealed area having a radius of curvature which is smaller than that of the processing neutral line 1410 suffers from an extension force to extendedly deform.
In view of this situation, in the case where the solar cell module is subjected to bending treatment using the foregoing roll former making machine, the bending treatment is conducted with due care so that pressure is not applied on the solar cell-bearing portions. However, in the case where the solar cell module is processed to have a corrugated shape as shown in FIG. 14 by way of press working, the solar cell-bearing portions unavoidably suffer from pressure, where such deformation due to the extension or shrinkage as described in the above occurs.
Separately, based on the description of the Japanese document '924, the present inventors prepared a solar cell module having the configuration shown in FIG. 14. Particularly, there was first prepared a solar cell module which comprises a cell block comprising a plurality of solar cells 1402 electrically connected with each other by an electrically conductive connection material 1405 and which is sealed by a resin filler material 1403 on a reinforcing member 1401 while covering a front side of the cell block by a surface protective film 1404. The solar cell module was processed to have such a corrugated shape as shown in FIG. 14.
For the resultant solar cell module, evaluation was conducted. As a result, the solar cell module was not problematic at the beginning stage. But in a weathering test, the solar cell module was found to have such problems as will be described in the following. The electrically conductive connection materials 1405 (which connect the solar cells 1402 in series connection) situated in the recessed and protruded portions of the corrugated shaped and which are curved along the recessed and protruded portions tend to partially separate from the resin filler material 1403 covering the electrically conductive connection materials 1405 due to a difference of curvature R between their inside diameter and their outside diameter, where cracking is likely to occur at the electrically conductive connection materials 1405.
By the way, in the case of a solar cell module which is not provided with a reinforcing member, it is necessary that its power outputting terminals be sufficiently flexible and highly reliable.

Solar cell module having improved flexibility


A method fixes an optical fiber (15) in a connector (10) for an optical plug-in connection. The connector (10) includes a location body (11) having a bore hole (12) to receive the optical fiber (15). In accordance with the method, the optical fiber (15) is inserted into the bore hole (12) of the location body (11) and is fixed therein by bonding with an adhesive (19). Easy and stable bonding is achieved by using a solid chemically reactive adhesive (19) which is reacted when brought into a liquid state and which enables a temperature-resistant connection.

1. Technical Field
The present invention relates to the area of light wave guide technology. It relates to a procedure for attaching a light wave guide in a connector for an optical plug-in connection according to the introductory clause of claim 1.
Such a procedure is known from publication U.S. Pat. No. 4,790,622, for example.
The application also relates to an adhesive for use in such a procedure.
2. Prior Art
Two-component epoxy adhesives are generally used to bond optical light wave guides, in particular light wave guide cables, with corresponding connectors. Depending on the type of manufacture, use is made of adhesives of this kind with a long xe2x80x9cpot lifexe2x80x9d. To achieve a reasonable cycle time under these preconditions while manufacturing the adhesive bond, post-curing with the application of heat must take place. However, it is also conceivable to use two-component adhesives with a short pot life, which reach the desired strength at room temperature within 10-20 minutes. However these two-component adhesives must be prepared several times a day, i.e., mixed together out of several separately prepared components.
In addition to these epoxy adhesives, recent times have seen the development of acrylate-based adhesives, and their increasing use in xe2x80x9con sitexe2x80x9d packaging, meaning outside the manufacturing facility, i.e., at the assembly site. These acrylate adhesives are easier to handle. Even though they also consist of two components, they offer the advantage of very short reaction times. However, the storage stability of the products is very limited at temperatures exceeding 40xc2x0 C. Since temperatures of up to 60xc2x0 C. are easily reached in the unit load under the tarpaulin during transport by truck in the summer after 2 hours of exposure to direct sunlight, the application of such highly reactive adhesive systems is clearly limited.
For example, another patent of the applicant (CH-A5687621) describes bonding a light wave guide into the ferrule of an optical plug-in connection by means of an adhesive consisting of two components. One of the two components, which each consist of unsaturated compounds dissolved in mono- and/or multifunctional acrylates, is accommodated in the bore hole of the ferrule for this purpose. The light wave guide is wetted with the other component before introduced into the bore hole. During insertion, a boundary layer reaction gives rise to polymerization within a few minutes. The prefilled ferrules require special facilities, however. In addition, the component in the ferrule might in some circumstances become unusable under unfavorable storage conditions, as a result of which the ferule itself, which is the most valuable component of the plug-in connector due to the highly precise ceramics used, becomes unusable.
Also known are connectors/plugs that are filled with a hot-melt-type adhesive. These connectors are heated on site in a heater, and the light wave guide is introduced in a hot state. Work can then continue after cooling. The disadvantage to this adhesive system is that the adhesive, which is solid in a cold state, softens again at elevated temperatures, and cannot be used everywhere given this limited temperature resistance.
A similar solution, in which a solid, multi-component reaction adhesive is used instead of a melt adhesive, in which the adhesive is liquefied via heating, thereby initiating a hardening reaction, is known from the U.S. Pat. No. 4,790,622 mentioned at the outset. The disadvantage here is that the connector as a whole becomes no longer useable once the reaction adhesive therein has exceeded its shelf life or has been degraded by external factors.
A composite adhesive for optical and optoelectronic applications is described in DE-A1-195 12 427. The adhesive is present as a liquid dispersion, and is therefore less suitable for outside use.
Another solution that does completely without adhesives would be mechanical fixation, in which mechanical means are used to laterally press on the fibers lying in the connector. Since a high lateral pressure would be necessary to immovably fix the fibers, the fibers could deform after a longer period of time. Such a deformation would result in the diminished performance or complete failure of the light guide.
Therefore, the object of the invention is to indicate a procedure for attaching a light wave guide in a connector that avoids the disadvantages of known procedures, and in particular can be performed easily and simply at the assembly site, and that is distinguished by a very good storability and low temperature sensitivity on the part of the means used.
The object is achieved via the totality of features in claim 1.
The use of a solid reaction adhesive as described in the invention, which only reacts when transformed into a liquid state (melted or dissolved), and then goes over into a thermoset state, eliminates the mixing of the adhesive, and makes the completely hardened (cured) adhesive compound comparatively insensitive to later temperature increases. However, it is particularly advantageous that the solid reaction adhesive can be stored especially well and long prior to its use without loosing its adhesive power. The powdery adhesive has the special property of being free-flowing and very easily moveable, as long as the adhesive is fully functional, but that it is baked or sintered together into a solid mass once it has lost its adhesive power. The use of a powdery adhesive also has the particular advantage that simply shaking the adhesive container makes it possible to determine whether the adhesive is still usable, which is not possible for other adhesive systems.
A first preferred embodiment of the procedure described in the invention is characterized by the fact that the receptacle is brought to and maintained at a temperature greater than or equal to the melting point of the adhesive, and that the light wave guide is introduced into the bore hole of the heated receptacle with the adhering particles. The special advantage to this is that no other additional chemical agents must be prepared for performing the bonding process. Rather, the adhesive reaction is initiated through a simple (controlled) temperature increase.
The adhesion of the powdery adhesive to the light wave guide, which can probably be attributed to electrostatic forces of attraction or surface forces, surprisingly causes precisely the correctly metered amount of adhesive (a few mg) to be transferred into the bore hole, and hence to the bonding location. This automatically and easily avoids disrupting excess amounts of adhesive at the bonding location.
Another preferred embodiment of the procedure according to the invention is characterized by the fact that the adhesive is transformed into the liquid state by adding a solvent, that the light wave guide is first immersed into the solvent with its one end, and that the light wave guide is subsequently immersed in the powdery adhesive with its one end. The solvent dissolves the reactive components in the reaction adhesive, causes them to start reacting with each other. A special metering of the solvent is here not necessary. While the solvent must be kept additionally available and applied in this case, a heater need not be used.
One particularly good and stable bond arises when using a receptacle with a bore hole whose inside diameter is only slightly, preferably 0.002 to 0.008 mm, larger than the outside diameter of the light wave guide according to another preferred embodiment of the procedure described in the invention. If the adhesive is transformed into the liquid state through heating, the adhering powdery adhesive is stripped from the light wave guide during insertion of the light wave guide into the bore hole due to the slight diameter tolerances, comes into contact with the heated receptacle, melts open, and is then drawn into the gap between the light wave guide and receptacle as a (relatively low-viscosity) liquid, to subsequently be hardened. At the same time, the light wave guide is effectively guided into the bore hole before hardening. In this case, excessive stripped particles of adhesive can accumulate in the funnel-shaped opening of the borehole without the danger of falling off, and form a melt bath enveloping the light wave guide, from which enough liquid adhesive can always be drawn into the gap when introducing the light wave guide into the bore hole.
The adhesive according to the invention intended for use in the procedure described in the invention is characterized by the fact that the adhesive is a two-component reaction adhesive, and that the adhesive essentially consists of a solid, preferably a crystalline, resin, to which is added a solid aid for curing purposes.
One preferred embodiment of the adhesive is characterized by the fact that the solid resin is selected from among the group of unsaturated polyester resins, the solid acrylate resins, the methacrylate solid resins and epoxy solid resins, and that a peroxide, e.g., an amine adduct for the epoxy resins, is used as the curing aid for the polyester, acrylate and methacrylate resins.
One preferred further development of this embodiment is characterized by the fact that a (1.1-di(tert.butylperoxide)3.3.5-trimethylcyclohexane 40% on chalk) is used as the peroxide, that the adhesive is present in powder form, that a separating agent is added to the powdery adhesive, preferably in the form of a colloidal silica, and that a pigment, preferably a red iron oxide, is mixed in with the powdery adhesive, for better monitoring the bonding process. The separating agent receives the free-flowing properties, and prevents a reaction between the components before melting takes place. The pigment makes it possible to easily track the melting and reaction process visually.
In a first further development, a polyester resin based on terephthalic acid is used as the unsaturated polymer resin, and the adhesive is composed of 89% polyester resin, 6% 1.1-di(tert.butylperoxide) 3,3,5-trimethylchclohexane 40% on chalk, 3.5% colloidal silica and approx. 1.5% iron oxide.
In a second alternative further development, the solid resin is a mixture of methacrylamide and bisphenol A-dimethacrylate, and the adhesive consists of 80% methacrylate, approx. 9% bisphenol A-dimethacrylate, approx. 6% 1.1-di(tert.butylperoxide) 3.3.5-trimethylcyclohexane 40% on chalk, approx. 1.5% iron oxide.
In a third alternative further development, the solid resin is an epoxy resin, and the adhesive consists of 50-70% epoxy resin, 20-40% epoxy adduct, 5-10% colloidal silica and approx. 1.5% iron oxide.
Additional embodiments are derived from the subordinate claims.

Method for fixing an optical fiber cable in a connector for a connectable optical fiber connection and adhesive use in said method


A method and apparatus is provided that measures end-user perceived performance in a computer having a windowed graphic display. The method and apparatus provides for a performance survey application which allows for detecting whether performance of the computer system has degraded. An indication is provided on the display. Also provided on the display is a button that when clicked by the user generates a record indicating that performance is poor. The status of the system is updated in response to user clicks. This in turn causes appropriate updates in the display. Finally, the record associated with the user's click is written to the appropriate memory location. In so doing, a system is provided that allows for continuous indication of the performance of the computer system.

Computer systems sometimes fail to deliver the expected level of performance. There are many reasons for the performance level not being at the expected level. Some reasons for the performance problems are changes in workload, the occurrence of hardware or software errors, under-configuration (e.g., too little memory), configuration errors, lack of tuning, and over-commitment of resources. Addressing these problems requires first that they be detected (or anticipated, if possible); then that the reasons for their occurrence be identified; next, steps are taken to remedy the situation; and finally, the fix must be verified.
Detection of performance problems is difficult. The relevant data is not centrally available in many computer systems such as UNIX systems or the like. Further, the interpretation of that data often requires expertise not commonly associated with system administration. However, identifying performance problems is important, for their presence diminishes a customer's investment in a computer system by robbing the customer of purchased resources.
A key concern in managing a computer installation is developing metrics that adequately quantify performance. For mainframe systems, internal measures of performance are commonly used (e.g., response time for CPU transactions). Unfortunately, such metrics often bear only an indirect relationship to performance as it is perceived by end-users, and hence these metrics are often ineffective at detecting performance problems.
Detecting performance problems is even more difficult for window-based workstations (e.g., workstations running X-Windows, Microsoft Windows, or the OS/2 Presentation Manager) in that having a long response time for an action initiated in one window does not mean that the end-user is delayed since the user can still have useful interactions in other windows. Accordingly, what is needed is a system for measuring performance in a window based environment. The system should be one in which the user can quickly and easily indicate that a problem is occurring in the computer. The present invention addresses such a need.

Method and apparatus for detecting performance problems in a windows-based computer system

International Business Machines Corporation


A system and method to compensate for ghost appearances on a print due to a previous job, the method comprising defining areas in which ghosting is expected or detected and recording the image on a photoreceptor by selectively changing the parameters of the system as a function of position, to compensate for the effects of ghosting in ex-image and ex-nonimage areas.

The method of electro-photographic printing is well known in the art. In this method, a photoconductive surface, typically on a drum, is charged to a uniform potential. The charged photoreceptor and/or photoconductive surface are exposed to a light image from, for example, a writing head laser that discharges specific areas on the photoconductive surface. This records an electrostatic latent image on the photoconductive surface. After the photoconductive image is recorded, the latent image is developed. The developed image is then transferred to an intermediate transfer member such as a blanket and subsequently transferred to a substrate, such as paper.
Often, printing the same image repeatedly at the same position causes ghost appearances on subsequent prints due to memory of the previous image. Memory of the previous image may cause variations in the change in potential obtained from exposure to the light image. Such fluctuation may lead to a fluctuation in the development of the latent image. Ghost may occur due to change of surface properties of blanket or photoconductor, like surface energy or roughness, by foreign coating in the image area or background; by deterioration of mechanical properties, like resilience, etc. Typically, developing differences occur between ex-image areas and ex-nonimage areas of the photoconductive surface and/or blanket leading to undesired ghost appearances.
The appearances of ghosts may prompt early replacement of the photoconductive surface and/or the intermediate transfer drum or blanket and thereby increase the print cost.
A known solution that may be implemented for some electro-photography printing devices is use of a seamless drum with a perimeter which is not equal to the print length. In this model, every subsequent image may be shifted on the drum relatively to previous images so that repeated development in the same area may be avoided. This solution may be difficult to implement in large electro-photographic printing, e.g. liquid electro-photographic printing devices that typically use drums with seams or drums on which photoreceptor sheets are mounted.
A similar solution for overcoming ghosts on intermediate transfer members is described in PCT Publication No. WO2007018500 to Hewlett Packard Development Co., entitled "Apparatus And Method For Life Enhancement Of A Print Blanket In Electrostatic Printing", the disclosure of which is incorporated herein by reference. PCT Publication No. WO2007018500 describes an apparatus and method for reducing degradation of a print blanket used in electro-photographic printing by changing an image location and/or orientation during the printing process on the print blanket.
U.S. Patent Application Publication No. 20020044189 to Kenichiro Kitajima et al, entitled "Color Image Forming Apparatus" describes an image forming apparatus including a look-up table for gradational correction of exposure amount to correct for ghost images. When switching from a normal mode to exposure amount reduction mode, the exposure amount is reduced according to the pre-saved data on the look-up table. The exposure amount is reduced on a global basis and is not specific to ex-image and ex-nonimage areas on the latent image.

Method and system for active decrease of ghost appearance


A method and apparatus for providing real time updates of a database describing the features of individual terminals of a shared plan telecommunications group for communication sessions from and to that individual terminal. The characteristics (numbering plan, incoming and outgoing screening, alternate routing, types of service provided) of each of the individual stations of the shared communication plan are stored in a database accessed through a server. The database can be updated in real time by a designated one of the stations in the shared group. The designated station can also handle appeals for an exception to the restrictions stored in the database. The designated station can receive immediate or periodic information on activity of individual stations, or can receive such information on request. Advantageously, updates of the database can be implemented immediately and economically without requiring assistance of the personnel of the carrier, and the designated station can control communications for the group.

In the prior art there are many arrangements wherein a telecommunications network controls groups of telecommunications terminals in order to provide the members of the group with the kinds of features that are otherwise provided from private branch exchanges and/or key telephone systems. For example, commonly available Centrex® systems allows the individual callers of the group to reach each other by dialing a much smaller number of digits (typically 3–6 digits) while still allowing the members of the group to reach the outside world by dialing an access code (typically "9") followed by a regular (POTS—plain old telephone service) telephone number. Virtual Centrex service can also be provided by having an intelligent network with a service control point (SCP) having a database to supply the data necessary for providing the individual telephone stations with services including those of a Centrex system. Intelligent network systems frequently provide outgoing or incoming call screening, i.e., selective blocking of calls based on the calling or called number. Such systems can also be used for serving mobile stations.
A problem of the prior art is that in order to make any kind of change such as removing a call restriction from a particular station it is necessary to go through an administrative procedure in the common carrier serving the members of the group. Changes therefore can typically be made only in a matter of days. This is undesirable, for example, to modify a restriction on the number of minutes of use allowed to a particular group member.

Real time administration of shared communication plan arrangements


A method for equalizing an average throughput of a plurality of wireless communication network access points is provided. Each access point having a respective average throughput value and at least one control parameter, the at least one control parameter controlling wireless connectivity at the access point. An average throughput value received from each of the plurality of access points is determined. A first wireless communication network access point for configuration is determined based on the average throughput values received from each of the plurality of access points. The at least one control parameter of the determined first wireless communication network access point is set to at least one threshold value to effect equalization of the average throughput values among the wireless communication network access points.

As the demand for Wi-Fi services increases, Wi-Fi service providers have continued to deploy new products and services to meet this demand. Some service providers often sell bandwidth service level agreements to wireless end-users in the Wi-Fi access system. In these current Wi-Fi access systems, the wireless station (STA) connects to Wi-Fi Access Points (APs) based on the Institute of Electrical and Electronic Engineers (IEEE) 802.11 MAC protocol. The wireless station often associates to a Wi-Fi AP having the strongest Receive Signal Strength (RSSI) in a co-located Wi-Fi cell coverage area. However, even though the 802.11 MAC protocol may connect wireless STAs to the AP having the strongest RSSI, the Wi-Fi Access Point may still fail to offer best average user bandwidth to the wireless station, thereby possibly failing to meet the service level agreement.
Failure to meet these SLAs is not acceptable to service providers or users. Therefore, in order to mitigate issues of capacity constraint and capacity degradation that negatively affect the ability of service providers to meet SLAs, Wi-Fi service providers commonly deploy multiple access points in a co-located fashion in a particular area with the aim of improving reliability and capacity for Wi-Fi services to a large number of wireless stations in the area, and to control capacity degradation from interference and noise.
This over-provisioning model is widely employed in an effort to help ensure bandwidth for user service level agreements. Nevertheless, this model cannot guarantee the user bandwidth, and incurs drawbacks in terms of cost, efficiency, and effective use of channel bandwidth. In particular, this and other deployments of co-located AP systems that try to provide additional capacity to their respective areas do not employ any scheme to maintain optimal performance levels at the co-located APs.
For example, some systems with co-located APs employ a general and simplified scheme of equally dividing the wireless station (STAs) among the APs in the co-located system. In other words, an incoming wireless station (STA) is assigned to the AP that has the least number of connected wireless stations in the co-located system of Access Points. However, this scheme of dividing the number of wireless stations equally among the Access Points of a co-located system disadvantageously results in non-optimum performance levels for wireless STAs connecting or that are connected to the system of co-located Access Points. For example, the scheme of dividing the number of wireless stations equally among the Access Points of a co-located system ignores various factors such as connected wireless stations activity, Wi-Fi link rates for connected wireless stations, interference levels at various Access Points, etc., thereby leading to non-optimum performance.

Dynamically adjusting wireless station connections in a co-located access point system


A surgical instrument having a locking throttle mechanism. The throttle is pivotally mounted to a wand-type housing by a hinge, and the housing includes a tool tip and a connecting mechanism. The throttle fits in an indented portion of the housing when it is in an ON position. An actuating switch is placed under the throttle and is controlled by a sliding grip/safety switch located on the throttle. A slidable locking mechanism is placed within a cavity of the throttle and may be moved between a locked position and an unlocked position. In the locked position, a portion of the slidable locking mechanism communicates with a locking cavity proximate to the lip of the housing. A spring is located between the throttle and the housing and urges the throttle into an OFF position and is compressed when the throttle is advanced downward towards the housing.

There are countless medical devices that are currently being used by medical professionals, such as surgeons, dentists, etc. These medical devices include, amongst others, saws, drills, screw drivers and other tools (collectively referred to as "surgical instruments"). These surgical instruments typically operate using electrical or pneumatic motors which are activated by a trigger or throttle mechanism.
In order to use these surgical instruments, a medical professional must activate the motor by actuating the trigger or throttle or other activating mechanism. The activation of the trigger or throttle is performed by placing pressure on the activating mechanism such that when a maximum amount of pressure is placed on the activating mechanism, the electrical or pneumatic motor is "running" at full speed. Thus, for the surgical instrument to properly operate during a medical procedure the medical professional must constantly place pressure on the activating mechanism, such as the trigger, which depending on the surgical procedure, may last for an extended period of time (e.g., minutes to hours).
Placing constant pressure on the activating mechanism of the surgical instrument poses several problems for the medical professional, not the least of which is fatigue to the medical professional's hand. Of course, present activating mechanisms also pose other problems which need to be addressed by designers of surgical tools. Specifically, it may be difficult for the medical professional at times to both manipulate the surgical instrument and simultaneously apply pressure to the activating mechanism during use thereof. This not only poses a problem to the medical professional, but it also may pose a danger to the patient. For example, when using a wand-style surgical instrument, the medical professional may have to position the surgical instrument in such a position that constant pressure cannot be applied to the activating mechanism at a critical time during the medical procedure, thus leading to unacceptable results.
What is needed is a locking system that is easy to use and provides safeguards for both the medical professional using the medical device and the patient. Such a system would provide safety features so that the locking mechanism cannot be accidently deactivated by the medical professional. This locking mechanism would also provide a safety switch so that when the trigger is inadvertently activated, the driving motor will not engage therein.

Wand-style surgical instrument with lockable throttle


The non-driving end of the cutterbar is provided with a specialized integral end guard section having a single guard and a body portion defining a slot for enclosing the reciprocating end knife section. The body portion is also provided with a rearwardly extending mounting portion.

1. Field of the Invention:
The invention is directed to an improved end guard section for a cutterbar.
2. Description of the Prior Art:
A typical harvesting platform is provided with an elongated cutterbar assembly for cutting a standing crop. The cutterbar comprises a steel angle support bar, a series of sickle guards, a knifeback, a series of knives and a series of holddown clips. The sickle guards are mounted to the support bar. Each of the guards are provided with a channel in which the knifeback is slideably positioned. In addition, each guard is provided with a slot having ledger plates into which the knives are slideably positioned. A series of triangular knives are bolted to the knifeback. The holdown clips are bolted to the angle bar and extend forward over the knifeback into contact with the knives for holding the knives against the ledge plates of the sickle guards. The cutting edges of the knives and the ledger plates cooperate to shear the standing crop.
Traditionally the knife sections are secured to the knifeback by rivets. To facilitate field replacement of the knife sections, bolts are now used to secured the knives to the knifeback, as illustrated in U.S. Pat. No. 5,040,363. The knifeback is provided with a series of round holes through which the mounting rivets or bolts are inserted. The assembler needs full access to both sides of the knifeback to secure the knife sections to the knifeback. Strength of the hardware used in wider and wider platforms is becoming a problem due to the increased loads.
It should be noted that round headed square necked bolts, also known as carriage bolts, is known hardware.
Sickle guards are provided with a slot into which the knife sections are slideably received. The slot is provided with ledger plates which cooperate with the knife sections to cut the standing crop, see U.S. Pat. No. 3,844,095. Traditionally holdown clips are positioned between the sickle guards and are mounted to the support bar. An adjustment mechanism at the rear of the of the holdown clip controls the vertical position of the clip relative to the knife sections, see U.S. Pat. Nos. 4,012,891 and 4,644,738. U.S. Pat. No. 3,721,079 discloses a cutterbar having a holdown washer located directly behind the sickle guard. U.S. Pat. No. 5,617,712 discloses a sickle guard having a slot defined by an upper lip which is provided with a holdown screw for directly contacting the knife sections to hold them against the ledger plates.
Traditionally the left end of the knifeback is the drive end of the knifeback and is coupled to a wobble box which reciprocates the knifeback back and forth. The right end is the non-drive end and extends past the end of the machine.

Cutterbar assembly for a reciprocating mower


A system for controlling delivery of a physiological fluid internally to a patient from a balloon catheter. The system includes a controller, an inflation-fluid pressurizer for maintaining inflation fluid in an inflation-fluid conduit under pressure, and a physiological-fluid pressurizer for maintaining physiological fluid in a physiological-fluid conduit under pressure. The inflation-fluid pressurizer is connected to receive signals from the controller to cycle pressure in the inflation-fluid conduit between a balloon inflating pressure and a balloon deflating pressure. The physiological-fluid pressurizer is connected to receive signals from the controller to cycle pressure in the physiological-fluid conduit between a fluid delivery pressure and a resting pressure. The controller is programmed to synchronize signals to the inflation-fluid pressurizer with signals to the physiological-fluid pressurizer. Thus, periods of balloon inflating pressure in the inflation-fluid conduit generally overlap with periods of fluid delivery pressure in the physiological-fluid conduit, and periods of balloon deflating pressure in the inflation-fluid conduit generally overlap with periods of resting pressure in the physiological-fluid conduit.

This application relates to a system for controlling delivery of a physiological fluid internally to a patient from a balloon catheter.
Balloon catheters may be used to deliver drugs to tissue at a desired location of a patient""s body, such as a blood vessel. Typically, the balloon catheter is positioned at the desired location for drug delivery from one or more distal drug delivery outlets, e.g., on the surface of the balloon or on the catheter shaft. The balloon is inflated through a balloon inflation conduit to block the flow of blood in the vessel, thereby enhancing local drug delivery. A stepper motor may be connected to an infusion syringe containing the drug to provide a continuous flow of drug during the procedure.
One aspect of the invention generally features a system for controlling delivery of a physiological fluid internally to a patient from a balloon catheter. The balloon catheter includes a distal balloon connected to a catheter shaft, an inflation-fluid conduit connecting the balloon to a proximal source of pressurized balloon inflation fluid, and a physiological-fluid conduit connecting a fluid-delivery outlet of the balloon catheter to a proximal source of pressurized physiological fluid.
The system includes a controller, an inflation-fluid pressurizer for maintaining inflation fluid in the inflation-fluid conduit under pressure, and a physiological-fluid pressurizer for maintaining physiological fluid in the physiological-fluid conduit under pressure. The inflation-fluid pressurizer is connected to receive signals from the controller to cycle pressure in the inflation-fluid conduit between a balloon inflating pressure and a balloon deflating pressure. The physiological-fluid pressurizer is connected to receive signals from the controller to cycle pressure in the physiological-fluid conduit between a fluid delivery pressure and a resting pressure.
The controller is programmed to synchronize signals to the inflation-fluid pressurizer with signals to the physiological-fluid pressurizer. Thus, periods of balloon inflating pressure in the inflation-fluid conduit generally overlap with periods of fluid delivery pressure in the physiological-fluid conduit, and periods of balloon deflating pressure in the inflation-fluid conduit generally overlap with periods of resting pressure in the physiological-fluid conduit.
In preferred embodiments, the system also includes a holder sized and shaped to hold both an inflation fluid delivery chamber having a first moveable wall and a physiological fluid delivery chamber having a second moveable wall. Movement of the first moveable wall changes the volume of the inflation fluid delivery chamber, and movement of the second moveable wall changes the volume of the physiological fluid delivery chamber.
The inflation-fluid pressurizer may have a first driver and a first connector sized and shaped for connection of the first driver to a first movable wall of an inflation fluid delivery chamber. The physiological-fluid pressurizer may have a second driver and a second connector sized and shaped for connection of the second driver to a second movable wall of a physiological fluid delivery chamber. The first driver may be connected to the controller via a first circuit, and the second driver is connected to the controller via a second circuit.
The first connector may be a push-pull coupling, so that the first driver can push the first moveable wall to decrease the volume of the inflation fluid delivery chamber and pull the first moveable wall to increase the volume of the inflation fluid delivery chamber. The second connector may be a push-only coupling, so that the second driver can push the second moveable wall to decrease the volume of the physiological fluid delivery chamber. The second driver cannot pull the second moveable wall to increase the volume of the physiological fluid delivery chamber, thus reducing the opportunity for undesired retrograde movement of bodily fluids into the physiological-fluid conduit.
The holder accommodates a first syringe with a plunger that moves the first movable wall. The push-pull coupling may include a flattened region of the plunger at least partially enveloped by a mating structure of the first driver. The movement of the first driver toward the inflation fluid delivery chamber thus pushes the plunger and moves the first moveable wall to decrease the volume of the inflation fluid delivery chamber, thereby increasing the pressure in the inflation-fluid conduit. The movement of the first driver away from the inflation fluid delivery chamber engages the plunger and moves the first moveable wall to increase the volume of the inflation fluid delivery chamber.
The holder may also accommodate a second syringe with a plunger that moves the second movable wall. The push-only coupling includes a flattened region of the plunger which mates with a flattened member of the second driver. The movement of the second driver toward the physiological fluid delivery chamber pushes the plunger and moves the second moveable wall to decrease the volume of the physiological fluid delivery chamber, thereby increasing the pressure in the physiological fluid delivery chamber. The movement of the second driver away from the physiological fluid delivery chamber disengages the flattened region of the plunger from the flattened structure of the second driver without changing the volume of the physiological fluid delivery chamber.
The first driver may include a first pneumatic cylinder that is independently controlled by a first solenoid relay. The first solenoid relay may be controlled by the controller. The second driver may include a second pneumatic cylinder that is independently controlled by a second solenoid relay. The second solenoid relay may be controlled by the controller, which includes a timer. The system may also include a housing that surrounds the holder.
Another aspect of the invention generally features a method for delivering a physiological fluid internally to a patient from a balloon catheter. The balloon catheter includes a distal balloon connected to a catheter shaft, an inflation-fluid conduit connecting the balloon to a proximal source of pressurized balloon inflation fluid, and a physiological-fluid conduit connecting a fluid-delivery outlet of the balloon catheter to a proximal source of pressurized physiological fluid.
The method uses a system comprising a controller, an inflation-fluid pressurizer for maintaining inflation fluid in the inflation-fluid conduit under pressure, and a physiological-fluid pressurizer for maintaining physiological fluid in the physiological-fluid conduit under pressure. The balloon is positioned at the internal location, and alternately inflated and deflated by cycling pressure in the inflation-fluid conduit between a balloon inflating pressure and a balloon deflating pressure. Physiological fluid is delivered to the internal location by cycling pressure in the physiological-fluid conduit between a fluid delivery pressure and a resting pressure. Pressure cycles in the inflation-fluid conduit are synchronized with pressure cycles in the physiological-fluid conduit. Thus, periods of balloon inflating pressure in the inflation-fluid conduit generally overlap with periods of fluid delivery pressure in the physiological-fluid conduit, and periods of balloon deflating pressure in the inflation-fluid conduit generally overlap with periods of resting pressure in the physiological-fluid conduit.
The physiological fluid may be a drug, such as thrombin, hirudin, hirulog, urokinase, low molecular weight heparin or other modified heparins, TPA, PPACK, 7E3, or any other antiplatelet, antiproliferative or antioxidant drug. The physiological fluid also may be any drug used in chemotherapy or any gene or gene construct used in gene therapy. The invention may be used to deliver drugs to locations in the vasculature, such as blood vessels or the heart. The invention also may be used to deliver drugs to body lumens, such as the alimentary tract, the reproductive system, the urinary tract or the biliary tree.
The invention increases the efficiency of irrigation of the tissue with the drug and, in some cases, may reduce the amount of time the flow of bodily fluid is interrupted. The invention also helps to eliminate the need for manual control of the balloon inflation and drug infusion so that the doctor may be free to monitor the procedure.
Other features and advantages will be apparent from the following drawings, description of the preferred embodiments and claims.


Methods are provided for significantly reducing electron trapping in semiconductor devices having a floating gate and an overlying dielectric layer. The methods form a nitrogen-rich region within the floating gate near the interface to an overlying dielectric layer. The methods include selectively introducing nitrogen into the floating gate prior to forming the overlying dielectric layer. This forms an initial nitrogen concentration profile within the floating gate. An initial portion of the overlying dielectric layer is then formed of a high temperature oxide (HTO). The temperature within the floating gate is purposely raised to an adequately high temperature to cause the initial nitrogen concentration profile to change due to the migration of the majority of the nitrogen towards the interface with the overlying dielectric layer and an interface with an underlying layer. Consequently, the floating gate is left with a first nitrogen-rich region near the interface to the overlying dielectric layer and a second nitrogen-rich region near the interface to the underlying layer. The first nitrogen-rich region has been found to reduce electron trapping within the floating gate, which could lead to false programming of the floating gate. Unlike a conventional thermally grown oxide film, the high temperature oxide film within the interpoly dielectric layer advantageously prevents the surface of the floating gate from becoming too granular. As such, the resulting interpoly dielectric layer, which typically includes several films, can be formed more evenly.

A continuing trend in semiconductor technology is to build integrated circuits with more and/or faster semiconductor devices. The drive toward this ultra large-scale integration (ULSI) has resulted in continued shrinking of device and circuit features. As the devices and features shrink, new problems are discovered that require new methods of fabrication and/or new arrangements.
A flash or block erase Electrically Erasable Programmable Read Only Memory (flash EEPROM) semiconductor memory includes an array of memory cells that can be independently programmed and read. The size of each memory cell, and therefore the memory array, is made small by omitting select transistors that would enable the cells to be erased independently. The array of memory cells is typically aligned along a bit line and a word line and erased together as a block. An example of a memory of this type includes individual metal oxide semiconductor (MOS) memory cells, each of which includes a source, drain, floating gate, and control gate to which various voltages are applied to program the cell with a binary 1 or 0. Each memory cell can be read by addressing it via the appropriate word and bit lines.
An exemplary memory cell 8 is depicted in FIG. 1a. As shown, memory cell 8 is viewed in a cross-section through the bit line. Memory cell 8 includes a doped substrate 12 having a top surface 11, and within which a source 13a and a drain 13b have been formed by selectively doping regions of substrate 12. A tunnel oxide 15 separates a floating gate 16 from substrate 12. An interpoly dielectric 24 separates floating gate 16 from a control gate 26. Floating gate 16 and control gate 26 are each electrically conductive and typically formed of polysilicon.
On top of control gate 26 is a silicide layer 28, which acts to increase the electrical conductivity of control gate 26. Silicide layer 28 is typically a tungsten silicide (e.g., WSi.sub.2), that is formed on top of control gate 26 prior to patterning, using conventional deposition and annealing processes.
As known to those skilled in the art, memory cell 8 can be programmed, for example, by applying an appropriate programming voltage to control gate 26. Similarly, memory cell 8 can be erased, for example, by applying an appropriate erasure voltage to source 13a. When programmed, floating gate 16 will have a charge corresponding to either a binary 1 or 0. By way of example, floating gate 16 can be programmed to a binary 1 by applying a programming voltage to control gate 26, which causes an electrical charge to build up on floating gate 16. If floating gate 16 does not contain a threshold level of electrical charge, then floating gate 16 represents a binary 0. During erasure, the charge needs to be removed from floating gate 16 by way of an erasure voltage applied to source 13a.
FIG. 1b depicts a cross-section of several adjacent memory cells from the perspective of a cross-section through the word line (i.e., from perspective A, as referenced in FIG. 1a). In FIG. 1b, the cross-section reveals that individual memory cells are separated by isolating regions of silicon dioxide formed on substrate 12. For example, FIG. 1b shows a portion of a floating gate 16a associated with a first memory cell, a floating gate 16b associated with a second memory cell, and a floating gate 16c associated with a third memory cell. Floating gate 16a is physically separated and electrically isolated from floating gate 16b by a field oxide (FOX) 14a. Floating gate 16b is separated from floating gate 16c by a field oxide 14b. Floating gates 16a, 16b, and 16c are typically formed by selectively patterning a single conformal layer of polysilicon that was deposited over the exposed portions of substrate 12, tunnel oxide 15, and field oxides 14a-b. Interpoly dielectric layer 24 has been conformally deposited over the exposed portions of floating gates 16a-c and field oxides 14a-b. Interpoly dielectric layer 24 isolates floating gates 16a-c from the next conformal layer which is typically a polysilicon layer that is patterned (e.g., along the bit line) to form control gate 26. Interpoly dielectric layer 24 typically includes a plurality of films, such as, for example, a bottom film of silicon dioxide, a middle film of silicon nitride, and a top film of silicon dioxide. This type of interpoly dielectric layer is commonly referred to as an oxide-nitride-oxide (ONO) layer. The thickness and physical properties of interpoly dielectric layer 24 affect the data retention capabilities of memory cell 8.
The continued shrinking of the memory cells, for example, as depicted in the memory cells of FIGS. 1a-b, requires that floating gates 16a-c be reduced in size (e.g., reduced width, length and/or height). The resulting reduced-size memory cell is typically operated with an attendant reduction in the threshold level of electrical charge that is required to program floating gate 16 to a binary 1 state. By way of example, in certain reduced-size memory cells, a binary 1 state can be represented by the electrical charge provided by as few as 5,000 electrons stored within floating gate 16. Consequently, there is a potential for false programming of the memory cell if an appropriate number of unwanted free electrons are allowed to migrate into, or otherwise charge, floating gate 16. In particular, it has been found that in certain memory cells electrons can be trapped near the interface between the floating gate 16 and the overlying interpoly dielectric layer 24 during fabrication. In certain instances, these trapped electrons can escape from the trapping mechanism, for example, due to subsequent thermal changes and/or the passage of time. Once released, these unwanted electrons can falsely program floating gate 16 (e.g., to a binary 1 state). Thus, there is need for methods for fabricating semiconductor devices that effectively reduce the potential for electron trapping, and/or false programming as a result thereof, at or near the interface between floating gate 16 and interpoly dielectric layer 24.

Methods for forming nitrogen-rich regions in a floating gate and interpoly dielectric layer in a non-volatile semiconductor memory device