A system and method for inductance testing a planar magnetic circuit in a board having a pair of contacts that may include a core; a pair of leads; a controller for contacting the pair of leads with the pair of contacts, registering the core with the planar magnet circuit, and delivering an electrical current through the planar magnetic circuit while the core enhances inductance in said planar magnetic circuit; and an inductance measuring tool. In another aspect, a system and method for high potential testing a planar magnetic circuit that may include providing an electrically isolated bed, loading the board on the bed, providing a pair of leads, contacting the pair of leads with the pair of contacts using a controller, delivering an electric current having a predetermined voltage between about 1,000 and about 30,000 volts through the planar magnetic circuit; and determining whether the board withstands the predetermined voltage. In another aspect, a plurality of beds may register a plurality of planar magnetic circuits.

1. Field of the Invention
The present invention relates to the testing of printed circuit boards, and more specifically the testing of circuit boards by administering one or more electrical tests under automated control and distinguishing between passed and failed circuit boards.
2. Background of the Invention
Circuit boards, i.e., printed circuit boards or PCBs, in general may be tested by administering electrical tests during manufacturing. For example, U.S. Pat. No. 6,396,295 teaches a method of administering a test to an integrated circuit and determining whether the integrated circuit passes or fails the test.
The evolution and advancement of circuit board and electronic technology has brought about the need for new or additional tests that may be difficult, or impossible, with existing testing equipment. Many tests may be conducted by human operators because no existing automated equipment may be able to conduct the required tests.
For example, technologies such as planar magnetics may require inductance testing using ferrite cores and high voltage potentials, e.g., 2,000 volts or more. Existing automated testing equipment, e.g., flying probe testers and bed-of-nails testers, may not be capable of testing at high potentials and with cores. In addition, existing testing equipment may not be fully automated and may require human operators to perform one or more steps for each circuit test, which may lower overall manufacturing and testing efficiency. For example, a human operator may be able to test only 1,000 to 2,000 planar magnetic circuit boards per day for inductance and high potential while production needs may be 100,000 to 300,000 circuit boards per day.
Existing testing methods may be so time consuming and expensive so that, in order to be cost effective, only samples of lots and not each individual circuit board may be tested. One to three hundred defective circuit boards may be missed for every million defective circuit boards that are identified. Since, for example, a single circuit board design may be produced, currently at global levels, in quantities of 100 million or more per year, 10,000 or more defective circuit boards may be allowed to pass though quality review and then further processed, used, or sold to manufactures and end-users.
Each defective circuit board allowed though testing, processing, and eventually sold may require hours of the end-manufacturer's or end-user's time identifying and repairing the problem, potentially costing much more in lost productivity than the production cost of the original defective board.
What is needed is a system for more effectively and more economically testing circuit boards.

Method and apparatus for testing circuit boards


A software product, computer implemented method, and system provide an integrated user interface having three simultaneously displayed items of information, including a list of transaction instructions, a list of uncleared transactions, and a list of cleared transactions. The simultaneous display, and interaction between the lists, provides for integration of various tasks separately associated with personal finance software products and with online banking products. Two account balances are also simultaneously displayed, a balance for cleared transactions, and a separate balance based on both cleared and uncleared transactions. The two balances provide the user with a complete view of the status of their account and available funds. The software product and system supports online bill payment, electronic funds transfer, and checkbook transactions, without requiring navigation through multiple, separate user interfaces for different modules of the product.

1. Field of Invention
The present invention relates to systems, methods, and software products for online banking, and more particularly, to systems, methods, and software products for online banking that integrates end user checkbook activities directly with bank statement transactions.
2. Background of Invention
Online banking systems have been repeatedly promised, but rarely delivered in recent years. A lengthy summary of some of the problems the banking industry has faced in delivering online banking is found in Lawlor et al., U.S. Pat. No. 5,220,501.
One of the key issues in delivering online banking is ease of use. Ease of use is predicated on many factors, including the ability of the user to identify the banking information of interest and execute desired banking tasks without error or difficulty. Generally, users perform four main tasks in checkbook and online banking applications:
Account Management--This activity includes viewing bank account data from the bank, such as cleared transactions and account balances, initiating requests to bank to generate fund transfers between accounts, and supporting tasks such as requesting information from the bank on certain accounts or transactions.
Bill payment--Initiating requests to the bank to pay a vendor a certain amount by a certain date. Related tasks such as making payment inquiries may also be performed.
Checkbook transactions--Accounting for checks, withdrawals, debit card purchases, and the like, that the user does on a regular basis. These transactions must be accounted for and integrated with the account data from the bank for an accurate reflection of the user's account.
Current balance calculation--Determining how much money the user really has available in their account, based on cleared and uncleared transactions (including other checkbook transactions). The current balance is calculated, typically by the user or sometimes by the application, by taking the latest account balance given by the bank and adding/subtracting any uncleared transactions in the user's own checkbook.
Extensive consumer and usability research indicates two key areas of usability concerns with these various tasks. First, customers view banking, bill payment and the determination of their current balance as interrelated tasks. Accordingly, they want related banking task and banking information to operate together in an online banking product. In fact banking tasks, such as obtaining balance information, cleared transactions, and so forth, are often used to provide information to support the bill payment tasks.
Second, customers have difficulty using an online banking system when it is necessary to navigate from one user interface to another user interface in order to complete some task. Navigation difficulties increase both the time required by the user to complete the task, and the likelihood of error in completing the task.
An example of a typical user task makes clear the need for integration of banking tasks and banking information. A typical scenario is payment of bills, which may include a large credit card bill. The user will typically decide how much of the credit card bill to pay based on currently available funds, taking into account cleared transactions, and uncleared transactions, such as other bills being paid. To complete this task with an online banking software product, the user needs to perform the following steps:
Determine current balance in the account based for cleared transactions. PA1 Review in the checkbook to determine actual current balance, based on the uncleared transactions, and cleared balance. PA1 Determine if they need to transfer money from another account to pay the bills. PA1 Enter the bill payment requests including, calculating how much of the credit card to pay from the actual balance. PA1 Use the requests to pay the bills. PA1 Send the request to transfer funds.
From the user's perspective, this banking activity is clearly an integrated one, since the user must integrate three tasks--writing checks to pay other bills, obtaining cleared transactions and current balance from the bank, and determining a combined current balance based on this information--before writing the credit card bill. Accordingly, there is a need to provide an online banking software product and system that supports the integration of these tasks and their underlying information components.
There have been various approaches, as summarized in Lawlor et al., to making online banking easy for consumers to use for bill payment and checkbook maintenance. These approaches fall mainly into two categories, typically tightly associated with the type of company that is delivering the online banking software and system. Generally, there are personal finance products from personal finance software companies, and banking products from banks and other financial institutions. Products in both of these categories are generally deficient at integrating banking tasks and banking information in support of user's actual needs.
First, online banking software products from personal finance software companies are typically "checkbook-centric." Most personal finance software products employ the checkbook as the underlying user model. As a result, all transactions, such as paying bills, writing checking, depositing or transferring funds, are done through a checkbook-like user interface, even if the checkbook metaphor is not particularly appropriate for the task. For example, Quicken.RTM. 5.0, provides a checkbook metaphor for users. In FIG. 1, there is shown a user interface 100 of the main entry screen for a personal finance software product. The entry screen has a number of icons that are invoked to perform different functions, such as the checkbook register 101, online banking 103, and online bill payment 105. FIG. 2 illustrates the user interface for the checkbook register 107.
Prior to the availability of online banking, the user would enter all of their various transactions into the checkbook register 107, and then manually reconcile the checkbook register 107 against a printed bank statement. In the checkbook register type user interface the user sees all of their transactions, including both cleared and uncleared transactions mixed together. This is seen in FIG. 2, where the first transaction is indicated as cleared (the "R" in the column labeled "Clr"), and the other transactions are not cleared. Further, the balance 109 here is of all transactions that have been entered by the user, whether cleared or not. The user has no separate balance information for just the cleared transactions immediately available, which as noted above, was the first item of information the user typically needs during bill payment.
Once online banking became available, this type functionality was added as an additional feature in many checkbook products, to both automate reconciliation of uncleared transactions in the checkbook against the bank's own records of cleared transactions, and to provide electronic, online payment of bills. Typically, an online banking module is provided in which the user can view the bank's current account balance in a user interface display separate from the checkbook register 107. As shown in FIG. 1, there are separate icons for checkbook register 101 and the online banking module 103. Selecting the online banking icon for the online banking module 103 causes the display of the online banking user interface 111, as shown in FIG. 3. In this interface, the user only sees the cleared transactions which have been downloaded from the bank with the Get Online Data button 113. The balance 115 here is based only on the cleared transactions, the bank having no information about the user's recently entered, and uncleared, checkbook transactions.
To use the online information for bill payment, the user must download certain transactions to first reconcile their account. Once the transactions are downloaded, the checkbook register 107 merely reflects which transactions have cleared. The only difference that appears to the user is the indication in the checkbook register 107 of which transactions have been cleared. This is shown in FIG. 2 as the letter "R" in the "Clr" column. To use both sets of the data, the user would have to switch back and forth between the different user interfaces.
Electronic bill paying, which is often touted as a desirable feature of online banking systems, is typically enabled, but often as an extension of the user's checkbook. That is, bill payments are treated as checks, and entered in a separate user interface. FIG. 4 illustrates a typical example of an online bill payment interface 117. This interface 117, which is invoked from its own icon 105 in the main user interface 100, is completely separate from the user interfaces for the online banking module 111 or the checkbook 103. This separation of function hinders the integration of bill payment, account management, and checkbook tasks.
For these reasons, in these types of software products, there is no persistent view of the bank's online statement, as such. The online banking module, as illustrated, is essentially a staging area where the user views transactions before using them to reconcile their checkbook or pay bills. In this user model the checkbook is persistent and the online statement is temporary, since it is only viewed by downloading the information from the bank. Further, in checkbook-centric products, the balance that is visible throughout the software product is the ending balance based on the transactions in the user's checkbook, as shown in FIG. 2, including both cleared and uncleared transactions. The latest balance of cleared transactions from the bank is typically visible only within the separate user interface display for the online banking module and is not used anywhere else in the product.
The problem with this approach is that it assumes the primacy of the user's checkbook in the user model and system design, and demotes the fact that the bank's own records of the user's account are a necessary component for an overall accurate reflection of account activity. That is, while the bank's own records show that user's actual balance and cleared transactions, that information is never presented to the user in single user interface consolidated with the existing information in the checkbook. Rather, the information identifying cleared transactions is merely propagated into the user's checkbook, as shown in the "Clr" column in FIG. 2. Further, while bill payment is dependent on both the checkbook and online statement information, that activity and related information is presented in a completely separate user interface.
As a result of this user model and design, there is a lack of integration in the product of the actual tasks the user wants to perform. The software product separates checkbook functions, bill payment, and viewing/downloading transactions from the bank into discrete operations, with their own user interfaces. The user must perform four separate tasks, and navigate multiple user interface screens to achieve what they consider to be the single task of paying bills based on currently available funds.
In the second category of online banking systems are software products and systems provided by banks or their affiliates. Not surprisingly, these software products are "bank-statement centric" and take the bank's statement as the primary user model and interface. These software products typically display only transactions that have actually been cleared by the bank. An example of this type of user interface is shown in FIG. 5, which illustrates a portion of Wells Fargo's Online.TM. Banking web-site. In this account history screen (one of a number of user interfaces to be navigated, including an account summary screen, a fund transfer screen, and a download screen). Along with only showing cleared transactions, there is only provided the balance information for cleared transactions.
Because of this limitation, these products typically do not let the user incorporate transactions that have not been posted or cleared by the bank, for example, checks that the user has recently written, or withdrawals or deposits recently made but not posted, transactions which are a fundamental component of the user's overall account. Thus, the user does not get a complete view of the actual status of his account as the user considers it, but only the information about cleared transactions that the bank has. This information is insufficient to serve the user's needs since the actual amount of funds the user has available is based on both the cleared and uncleared transactions.
Another particular limitation of online banking systems such as Wells Fargo's is that they do not contain information fully identifying the cleared transactions. As shown in FIG. 5, there is no information identifying the payee for checks, debits, and point of sale transactions. This absence of information makes it difficult for the user to determine which transaction is associated with which payee, and thus which transactions have cleared. The user must correlate check numbers instead, which in some cases my be incorrectly recorded or even not recorded at all by the user, who instead may easily remember the payee. Identification of point of sale transactions is even harder, since only the date and amount are available from the financial institution. Thus these types of online systems make integration of the various banking information and tasks very difficult and time consuming.
Further, many of these bank-based software products are specifically intended to show merely the user's current cleared balance and the cleared transactions on which it is based. However, the user cannot typically see the impact of these activities on their accounts until they actually clear the bank. That is, the effect of transactions on the balance of the user's account is not reflected in the user interface of the product. The user also cannot typically enter into the online system other transactions such as hand-written checks or calculate a running balance based on both clear and uncleared transactions. To do these latter activities, the user typically needs to download the cleared transaction data from the online banking product and import it into another personal finance product. An example of this limitation is shown in FIG. 6, which is a view of another user interface screen of the Well Fargo Online.TM. Banking product. Here, the user can download cleared transactions into a specific file format. The user must then use a separate personal finance application or spreadsheet to actually integrate the cleared transaction data with their checkbook of uncleared transactions. This process is time-consuming and difficult for many users, and requires using two different software products, and understanding how to interrelate them.
As the foregoing discussion indicates, users of these various types of online banking products have to navigate between multiple different user interfaces to perform a single task. Usability research on users working with these types of products has shown that at each navigation step, there was high potential for error and confusion. Users are not always sure how information in one user interface screen is related to information in another screen, or when it is necessary to switch to another part of the product to proceed through a task.
The need for easy-to-use and efficient online banking software products and systems becomes even more pronounced when considering that different users have different needs, expectations, and abilities. Research has shown that there are two types of users of financial software products: Organizers and Transactors. Organizers specifically intend to use their financial software products to organize, categorize, and track their finances with precision and detailed accuracy. For these types of users, conventional software products that provide the ability to categorize transactions, produce complex reports of income and expenses, and the like are seen as useful tools.
In sharp contrast, Transactors mainly want to pay bills and avoid overdrafts of their accounts. Transactors are typically not interested in categorizing transactions, tracking all income and expenses, or obtaining complex reports and summaries. To date, conventional software products have been designed almost exclusively with Organizers as the intended users, and as such do not provide the types of information Transactors desire most. Specifically, because Transactors are concerned with avoiding overdrafts, existing products and systems that do not provide an integrated view of both cleared transactions from the bank and uncleared transactions in the user's account, along with a current balance, do not meet the Transactor's need for an easy-to-use financial software product.
In summary, existing software products and systems do not provide for an integration of all of the relevant information about a user's account--the checkbook of uncleared transactions, cleared transactions, pending bill payments, fund transfers, and other transactions--in a single user interface display. Accordingly, it is desirable to provide on an online banking software product and system that tightly integrates bill payment, account management, and determination of current balances, into a single user interface display.

Personal online banking with integrated online statement and checkbook user interface


An image forming apparatus for forming a color image of CMK color plates by electrophotography system in which a K color plate having highest visibility among CMYK colors is composed of a rational number mesh. Profile of halftone dots (201Kh) becomes constant substantially and the factor for generating streak and unevenness is suppressed. Furthermore, C color plate and M color plate are formed of super cells and the K color plate, C color plate and M color plate are formed at an interval of 30°. Consequently, a Rosetta formed of halftone dots (201Ch, 201Mh, 201Kh) of CMK is optimized and the factor for generating moiré component is suppressed.

According to a halftoning process used in color electrophotography, it is customary to form a halftone threshold matrix (referred to simply as a threshold matrix) with a rational screen having a small halftone cell size (see Japanese Laid-Open Patent Publication No. 2002-112047, paragraph [0015]).
In the art of AM screens, assuming there are 8×8 or 16×16 pixels that can be blackened (colored), then the halftone cell size refers to the size 8×8 or 16×16. Assuming the screen angle is 0°, then the size of a threshold matrix, made up of thresholds corresponding to respective pixels, is equal to the halftone cell size. In the halftone cell, blackened (colored) areas are referred to as halftone dots.
In rational screens, (sizes of) halftone cells are identical to each other. When halftone dots are generated by comparing a continuous tone image with the threshold matrix, then the halftone dots of each halftone cell have identical sizes and shapes. In the present specification, the rational screen refers to a screen wherein, if a screen angle θ is expressed as θ=arctan(m/n) using a trigonometric arctangent where m and n are natural numbers, then the size of the threshold matrix satisfies a positive integral multiple of m2+n2.
However, since the halftone cell size (and the halftone matrix size) of rational screens is small, a rosetta pattern optimization, which has been taken into account for offset printing, cannot be performed. That is, the C, M, K plates cannot be set accurately to angles at 30° intervals, e.g., 15°, 45°, 75°, and hence moiré patterns are generated.
In order to angularly space the C, M, K plates exactly at 30° intervals, it could be possible to generate halftone dots with a supercell having a large threshold matrix size, rather than using a rational screen.

Image forming method, screen set and image forming apparatus


During operation of a pipelined data processing system, an interruptible instruction table is used to store target identifiers associated with instructions which may result in speculative execution. During operation of the interruptible instruction table, a pointer, referred to as a completing instruction buffer entry pointer, points to a bottom of the interruptible instruction table if that table includes any instruction. An entry at the bottom of the interruptible instruction table is a next instruction to complete. This entry includes a target identifier, referred to as a non-speculative-non-interruptible TID, may be used to release resources held for all prior executed instructions. The data processing system determines the value of the non-speculative-non-interruptible TID to ensure that order determination is preserved and provides a true speculative execution point.

As data processing systems have evolved over time, the need for faster performance has increased. Today, to improve performance, many data processing systems include pipelined processors. A pipelined processor executes multiple instructions in a simultaneous and overlapping manner. By using such a technique, the pipelined processor is able to process a greater number of instructions within a given time, even though there is a slight increase in the execution time of an individual instruction due to the added pipeline control. Typically, a pipelined processor includes six stages for executing an instruction. The six stages include instruction fetching, instruction decoding, data memory addresses generation, processor resident operand fetching, instruction execution, and results writing.
Traditionally, all stages in a pipeline must proceed at a same time. As a result, the time required to move an instruction one step down the pipeline was determined by a slowest pipe stage. Therefore, in such traditional pipeline processors, throughput of the processor is determined and limited by the slowest pipe stage. To compensate for this limitation, current implementations of pipelined processor either used faster pipe stages or allowed functional units to execute independently at their own pace.
However, by allowing the functional units to proceed independently at their own pace, various pipeline hazards are introduced. When hazards are encountered, the offending instructions and following instructions are flushed and refetched. An example of a pipelined processor which utilizes such out of order execution is the PentiumPro.TM. processor available from Intel Corporation. It should be noted that PentiumPro.TM. is a trademark of Intel Corporation. The PentiumPro.TM. microprocessor allows memory read operations to be reordered ahead of some write operations. To perform this reordering operation, a central processing unit of the PentiumPro.TM. processor reorders read operations around the write operations, but such reordering is not observable from a program point of view. For information regarding the PentiumPro.TM., refer to "Intel's . . . ," Byte Magazine, by Tom R. Halfell, April 1995, pp. 42-58.
Additionally, the PowerPC.TM. 604 RISC microprocessor available from IBM Microelectronics also performs out of order instruction execution. While dispatching an instruction, dispatch logic within the PowerPC.TM. 604 allocates instruction to an appropriate execution unit. It should be noted that PowerPC is a trademark of IBM Corporation. A reorder entry in a special completion buffer is allocated for each instruction and dependency checking is performed between the instructions in a dispatch queue. Executed instructions are retired in the completion unit. In addition to storing the dispatched instructions, the completion unit updates register files and control registers in an appropriate manner. Furthermore, the completion unit guarantees sequential programming and only retires an instruction from the completion buffer when all instructions ahead of it have been completed and the instruction itself has finished execution. Thus, the completion unit, together with the reorder or completion buffer, ensure that instructions that execute in an out-of-order manner are retired in the same order as they were originally provided. While both the PowerPC.TM. 604 and PentiumPro.TM. microprocessor solutions provide significant advantages over more traditional pipelining implementations, the use of the completion buffer in the PowerPC.TM. 604 and a reorder buffer in the Intel PentiumPro.TM. require a specific table or memory storage location to keep track of an original program order and require results to be completed in order. Such strict ordering is required to ensure that instructions which access the same resource of a data processor are correctly executed in an original ordering so that a correct result is obtained. Thus, these implementations require the use of an extra table for performing such reordering operations and are limited to completing instructions in order, as well. The use of the extra table requires additional circuit area overhead and, therefore, increases the costs associated with the data processor.
In addition to using the completion buffer to track an original program order, completion buffers typically have a completion pointer which indicates which resources should be released when an instruction is complete. As has been previously discussed, a dispatched instruction may not execute for a significant amount of time. In the interim, instructions which are found later in the program sequence may be executed. Since the completion buffer tracks all instructions which have been dispatched and since instructions are executed out-of-order, the completion buffer may have to store many instructions. The design of such a large completion buffer to meet cycle time and area requirements is difficult, at best.
Therefore, a need exists for a mechanism which reduces the complexity associated with large completion buffers so that there is greater flexibility and better use of resources within a data processing system.

Data processing system and method for completing out-of-order instructions

International Business Machines Corporation


A method for producing a powdered metal compact for a cutting head to be used in a metal cutting tool uses a punch and die assembly. The resulting cutting head has apertures communicating between a coolant channel and recesses.

In many metal working chip forming operations it is desirable to deliver a coolant directly to the working edge. The purpose of the coolant is not only to cool the working edge but also to assist in chip removal. The most straightforward and easiest to manufacture coolant channels are axially directed. This can be done by simply drilling a central bore, or two parallel axially directed bores in the tool. In drills, twisted or helical channels are also used. In drills with replaceable cutting inserts spaced at different radial distances from the axis of rotation it is desirable to direct the exit opening towards the cutting inserts. U.S. Pat. No. 5,676,499 there is described a process wherein straight holes are drilled at different radial distances in a cylindrical blank. The middle portion of the blank is then heated and twisted giving rise to spirally formed channels. At the end of the process exit channels are drilled at an angle to the centerline of the drill resulting in exit openings that are spaced at different radial distances from the centerline, in the vicinity of the cutting inserts.
Another method for obtaining complex shaped coolant channels is to use a core such as copper or wax in a powder body and then sinter. The core can be of any desired shape. During the sintering operation, the core disappears into the pores of the powdered body by infiltration leaving a cavity of configuration corresponding to the shape of the core.

This patent is subject to a terminal disclaimer.


A double processing technique for device manufacture includes performing a first patterning step to form apertures in a resist layer which apertures are filled before the first resist layer is stripped and replaced by a second resist layer to be used in the second exposure.

A lithographic apparatus is a machine that applies a desired pattern onto a substrate, usually onto a target portion of the substrate. A lithographic apparatus can be used, for example, in the manufacture of integrated circuits (ICs). In that instance, a patterning device, which is alternatively referred to as a mask or a reticle, may be used to generate a circuit pattern to be formed on an individual layer of the IC. This pattern can be transferred onto a target portion (e.g. comprising part of, one, or several dies) on a substrate (e.g. a silicon wafer). Transfer of the pattern is typically via imaging onto a layer of radiation-sensitive material (resist) provided on the substrate. In general, a single substrate will contain a network of adjacent target portions that are successively patterned. Known lithographic apparatus include so-called steppers, in which each target portion is irradiated by exposing an entire pattern onto the target portion at one time, and so-called scanners, in which each target portion is irradiated by scanning the pattern through a radiation beam in a given direction (the "scanning"—direction) while synchronously scanning the substrate parallel or anti-parallel to this direction. It is also possible to transfer the pattern from the patterning device to the substrate by imprinting the pattern onto the substrate.
In a device manufacturing method using projection lithographic apparatus, the minimum feature size, often referred to as critical dimension (CD), is determined by the wavelength (λ) of the exposure radiation and the numeric aperture (NA) of the projection system. Various techniques have been developed to reduce CD and these are commonly combined into a factor known as k1 so that CD=k1·λ/NA. With current technology, it may not be possible to image a feature smaller than determined by a k1 factor of about 0.25 in a single exposure-develop-process cycle. However a smaller feature may be imaged with a double exposure and double process technique.
In a double exposure technique, a single layer of resist is exposed twice—either with two different patterns or with the same pattern but with a positional offset—before being developed. In a double process technique, a first layer of resist is exposed and developed and then the substrate is etched, transferring the pattern to the substrate, then a second layer of resist is applied to the substrate. The second layer is then exposed, developed and the substrate etched so that the final pattern in the substrate is produced by the combination of the two etch steps. A double process technique may be used to create a wide variety of useful structures but may be slow, taking one or two days because of the etch steps and the need to remove the substrate from the lithocell—comprising a lithographic apparatus and process apparatus such as a spin coater, developer and bake & chill plates—to perform the etch steps. Although a double exposure technique may be performed much more quickly, the range of structures it may be used for is more limited.

Lithographic processing cell and device manufacturing method


Provided is a data processing device including a trajectory calculating unit configured to calculate a trajectory of a mobile body that moves in a measurement section, based on measurement data acquired by the mobile body, a virtual level difference detecting unit configured to detect a virtual level difference occurring in the trajectory, a trajectory smoothing unit configured to smooth the trajectory in a section before and after the virtual level difference according to a magnitude of the virtual level difference, and a point group data generating unit configured to generate synthetic point group data by synthesizing the smoothed trajectory and point group data included in the measurement data.

Conventionally, an MMS is known as a system that includes a GNSS (Global Navigation Satellite System) antenna, an IMU (Inertial Measuring Unit), a camera, and a laser scanner, etc., equipped in a mobile body such as a vehicle and acquires three-dimensional positional information of the peripheries of a road, such as building and road shapes, signs, and guardrails, etc., highly accurately and efficiently while moving (refer to Patent Literature 1, for example). Three-dimensional positional information acquired by the MMS has been used for city planning, civil engineering works, and disaster prevention planning, etc.
An MMS is a measurement system intended to execute post-processing of data. For example, when acquiring three-dimensional positional information by using the MMS disclosed in Patent Literature 1, first, while traveling in a measurement section on a target road by vehicle, the MMS acquires data on its own position based on a GNSS navigation signal (hereinafter, referred to as "satellite positioning data"), three-dimensional acceleration and angular velocity data obtained by the IMU (hereinafter, referred to as "inertial positioning data"), and measurement data at each point of scanning light by the laser scanner (hereinafter, referred to as "measurement point group data").
Next, a trajectory of the vehicle is calculated on the basis of the satellite positioning data and the inertial positioning data, and the calculated trajectory of the vehicle and the point group data are synthesized to generate three-dimensional point group data. At this time, to improve the accuracy of measurement, a round trip is made in the measurement section by the vehicle, point group data is generated for each of a forward route and a return route, and by matching these, highly accurate three-dimensional point group data is generated.

Data processing device, data processing method, and data processing program


An optical tissue imaging system includes a probe for insertion into a transparent cylindrical capillary. The capillary includes an internal cylindrical channel that extends along a central axis. The capillary is inserted into tissue of a subject, and the probe may rotate and translate within the capillary. The probe may include a mirror configured to reflect light to the tissue outside of the cylindrical capillary.

In vivo cellular resolution function (e.g. calcium) imaging and (e.g. optogenetics) has revolutionized examination of neuronal networks. Neurophotonics has emerged as an important tool for study and interface with the brain. Despite these advances, present approaches to deep tissue access leaves much of the subject's brain region inaccessible. A major limitation of neurophotonics is the tissue access depth. Due to the spatially and temporally random light scattering, cellular resolution optical access has been fundamentally limited to ˜1 mm in mammalian brain tissue even with the help of multiphoton excitation, leaving large portions of brain regions inaccessible. Miniature optical components provide access to greater depths, but traditional approaches still provide limited viewing. In many traditional approaches, the viewable region is provided at the tip of the inserted device (akin viewing through a tunnel) leaving a large portion of the accessed tissue unviewable.

System and methods for clear optimally matched panoramic channel technique for deep brain photonic interface


A passive-matrix display of the disclosure includes a first electrode disposed over a substrate, a second electrode disposed over the first electrode and three-dimensionally intersecting the first electrode, a first auxiliary electrode disposed between the substrate and the first electrode, three-dimensionally intersecting the first electrode and being parallel to the second electrode, and a second auxiliary electrode parallel to the first auxiliary electrode and to the second electrode, the first electrode and the first auxiliary electrode being electrically connected by a first connection portion, and the second electrode and the second auxiliary electrode being connected by a plurality of second connection portions each disposed with at least one of the first electrodes therebetween. The passive-matrix display enables voltage drop and variation in brightness to be reduced by lowering the wiring resistance of the second electrode.

In recent years, tiling displays have been developed in which a plurality of passive-matrix displays are combined for use in large-scale digital signage, and such displays are spreading.
Organic electroluminescence display 800 is an example of a conventional passive-matrix display for use in a tiling display. FIG. 9A shows a plan view and FIG. 9B shows a cross-sectional view taken along line A-A. The conventional organic electroluminescence display 800 includes a plurality of first electrodes 802 disposed as stripes over the first substrate 801 and a plurality of second electrodes 804 disposed as stripes that three-dimensionally intersect the first electrodes 802. An organic electroluminescence layer 806 is provided at each intersection between the first electrodes 802 and the second electrodes 804, and an insulating layer 803 is provided in remaining areas. A protective layer 805 is also provided over the second electrode 804. A signal retrieval unit that includes a mounting area for a signal input driver is provided at the ends 802a of the first electrodes 802 in the X-direction, and at the ends 804a of the second electrodes 804 in the Y-direction.
This configuration for the tiling display using the organic electroluminescence display 800 shown in FIGS. 9A and 9B has the signal retrieval unit on two sides. The areas where the signal retrieval units are located is a non-display region. Thus, the surface area of the contour is increased, which poses a problem in that the whole is not perceived as a single display.
The organic electroluminescence display 900 of Patent Literature 1 uses a unidirectional wiring method to reduce the surface area of the contour.
Specifically, as shown in FIG. 10, the display includes a plurality of first electrodes 902 disposed as stripes over a first substrate 901 and a plurality of second electrodes 904 disposed as stripes that three-dimensionally intersect the first electrodes 902. An organic electroluminescence layer 905 is provided at each intersection between the first electrodes 902 and the second electrodes 904. Below the second electrodes 904, a plurality of second auxiliary electrodes 903 are disposed in portions where the organic electroluminescence layer 905 is not located. The second auxiliary electrodes 903 three-dimensionally intersect the second electrodes 904 and are parallel to the first electrodes 902. Also, contact holes 906 acting as connection portions for electrical connection are provided at each position where the second electrodes 904 and the second auxiliary electrodes 903 three-dimensionally intersect. Accordingly, the passive-matrix organic electroluminescence display 900 of Patent Literature 1 realizes the unidirectional wiring to have the signal retrieval unit on only one side in the X-direction.

Passive-matrix display and tiling display


A plurality of essentially round wheel shaped magnets on an axle transverse to a handle. The magnets are polarized axially and positioned with like poles adjacent. The roller rake is rolled over a surface and sweeps a swathe clean of magnetically attractable debris. The roller rake is particularly suited for cleaning nails from grassy areas such as commonly found in re-roofing and other construction projects, and for sweeping large areas such as factory floors. The magnets are arranged to project a magnetic field before, under, and behind the operating head.

1. Field of the Invention
Magnetic broom, brush, or rake for sweeping an area clear of magnetically attractive debris, particularly for picking up nails and the like from a construction site.
2. Description of the Prior Art
Magnetic sweeping devices are known in the prior art and have been used in a variety of situations involving collection of ferro-materials. Certain activities in construction or repair of buildings scatter nails over the work site. Most notably, re-roofing of dwellings releases thousands of nails, many of which fall to the attic floor insulation and ground around the building. In most cases, these are grass lawns, driveways, flower beds, and other places where loose nails are considered a hazard. The present invention is specifically designed to retrieve nails, nail parts, and staples from just such difficult and varied surfaces as well as indoor surfaces such as a factory floor.
Most previous inventions for picking up magnetic debris from surfaces rely on fixed magnets, with or without pole pieces, supported a fixed distance over the surface. Most use bar or rod magnets oriented transversely to the preferred direction of motion.
MAGNETIC SWEEPER CONSTRUCTION, U.S. Pat. No. 5,285,904, Feb. 15, 1994, by Gerald A. Hasse, and his U.S. Pat. No. 4,407,038, Oct. 4, 1983, are typical of this genus. The support spacing is provided by wheels. The spacing away from the floor necessarily reduces the attracting field at the floor. The debris is collected in the space between the magnet and floor. Haase discloses that his magnets are spaced apart, but does not disclose the direction of magnetization or orientation of the poles. Haase's invention should operate most effectively with the magnet polarization N-S in the direction of the motion, i.e., transverse to the axle. Haase has spacing in other embodiments clearly to provide means to have lateral flexibility in his magnet assembly. In all embodiments, the spacing is the result of end walls on the magnet holding chambers. With the polarization suggested above, spacing has no affect on the effectiveness of the invention.
MAGNETIC RAKE, U.S. Pat. No. 5,395,148, by G. Jameson, et al, Mar. 7, 1995, is a variation of the spaced above the surface design, where bar or rod magnets are enclosed in a non-magnetic tube which is slid over the surface being cleaned. This puts the magnets very close to the floor, preserving the strength of the magnetic field. Debris is often trapped between the tube and floor, causing the likelihood of scratching the floor. When used in grass, Jameson's invention bends the grass stems over, trapping the nails under the grass, preventing the magnet from lifting them out of the grass mat, Jameson's second embodiment is a flat plate design which exaggerates the problems described for the tubular embodiment.
Many patents are on file where similar magnet systems are mounted on various pieces of housekeeping, yard, or farm equipment, especially household vacuum cleaners, including two others by Gerald Haase earlier than the citations above.
The wheel supported genus of magnetic sweeper rakes does not mechanically penetrate the surface being cleaned, and do not have sufficient magnetic reach to get into rough or grassy surfaces; thus, they are generally unsatisfactory for use in grass, loose dirt, and the like.
SHAG RUG FLUFFING AND OBJECT RETRIEVING DEVICE, U.S. Pat. No. 4,155,298, by Forrest Spence, May 29, 1979 and his earlier version, U.S. Pat. No. 4,087,879, have a series of combing tines on a rotating body. The primary purpose of the invention is to comb out tangles and fluff shag rugs. Small rod magnets are within the tines, thus reach into the rug, but the action of the primary utility, combing the rug, tends to clear the debris from the tines, putting it back onto the rug. Mr. Spence's later improvement is in part to overcome this by providing a means to transfer the debris from the tines to a storage magnet.
Spence's tines are of non-magnetic material, which spaces the enclosed magnets from the work surface and reduces the force of attraction for pickup and/or retention to remove the debris from the rug.
3. Objects of the Invention
The present invention is designed to overcome the objections and limitations of the prior art as the following objects, descriptions, and claims will illustrate.
It is an object of the present invention to generate a strong magnetic field to pick up ferrous debris along a swathe over an indistinct surface and having entanglements such as is found in grassy areas.
It is a further object of the invention to have the magnets in contact with, and rolling over, the surface being cleaned.
It is a further object of the invention to have the magnets loosely mounted on a bearing shaft so that transverse motion is permitted for working around small obstructions such as clumps of grass, clods of dirt, or rocks.
It is a further object of the invention to provide a handle so the magnetic rake invention is used in the manner of a push-broom.
It is a further object of the invention to provide a place for tying a hoisting rope to the invention for lifting onto a high place such as a building roof. The tying place may also be a gripping handle for easy manipulation of the tool.
It is a further object of the invention to focus the magnetic field to reach before, under, and behind the axis of the magnet assembly.
It is a further object of the invention to provide magnetic field that tends to direct debris away from the rolling surface to a storage zone.
The foregoing and other objects and advantages of this invention will appear from the following descriptions taken in connection with the accompanying drawings of the preferred embodiment.

Rolling magnetic rake for collecting nails and other debris from a surface


The surface of a golf ball 2 is divided by four comparting great circles CG into six spherical quadrangles Ss and eight spherical triangles St. The eight spherical triangles St are composed of four first spherical triangles St1 and four second spherical triangles St2. Dimple patterns of the six spherical quadrangles Ss are the same. Dimple patterns of the four first spherical triangles St1 are the same. Dimple patterns of the four second spherical triangles St2 are the same. The dimple pattern of each first spherical triangle St1 is different from the dimple pattern of each second spherical triangle St2. The comparting great circles CG are obtained by projecting the 24 sides of a cuboctahedron inscribed in a phantom sphere of the golf ball 2 on the surface of the phantom sphere.

1. Field of the Invention
The present invention relates to golf balls. Specifically, the present invention relates to improvement of dimples of golf balls.
2. Description of the Related Art
Golf balls have a large number of dimples on the surfaces thereof. The dimples disturb the airflow around the golf ball during flight to cause turbulent flow separation. This phenomenon is referred to as "turbulization". Due to the turbulization, separation points of the air from the golf ball shift backwards leading to a reduction of drag. The turbulization promotes the displacement between the separation point on the upper side and the separation point on the lower side of the golf ball, which results from the backspin, thereby enhancing the lift force that acts upon the golf ball. Excellent dimples efficiently disturb the air flow. The excellent dimples produce a long flight distance.
In designing a dimple pattern, the surface of a golf ball is divided into a plurality of units. Dimples are located in each unit. For the purpose of obtaining the units, a regular polyhedron or quasi-regular polyhedron inscribed in a phantom sphere of the golf ball may be used. By projecting the sides of these polyhedrons on the phantom sphere, comparting lines are obtained. By the comparting lines, the units are obtained. Examples of the regular polyhedron include a regular hexahedron, a regular octahedron, a regular dodecahedron, and a regular icosahedron. Examples, of the quasi-regular polyhedron include a cuboctahedron and an icosidodecahedron.
In a dimple pattern based on a cuboctahedron, the surface of a golf ball is divided into spherical quadrangles and spherical triangles. The dimple pattern based on the cuboctahedron is varied. In a golf ball having this pattern, turbulization can be prompted. Documents disclosing a dimple pattern based on a cuboctahedron are, for example, JPS63-186670, JPH1-221182, JPH2-211181, and JP2002-331044.
The greatest interest of golf players concerning golf balls is flight distance. In light of flight performance, there is room for further improvement in the dimple pattern based on the cuboctahedron. An object of the present invention is to provide a golf ball having excellent flight performance.


Devices and methods are described for determining position information without broadcast ephemeris data for extended time periods. A server or client device receives or collects historical state data of satellites of a satellite-based positioning system and generates predictions of future satellite trajectories for future time periods. When a server generates the predictions, the predictions are subsequently transferred to a client device. The client device selects predictions appropriate to time of interest. The time can be any time during a period of at least seven calendar days. The client device reconstructs satellite states using information on the predictions and uses the reconstructed satellite states to acquire satellite signals as appropriate to the current location and time of the client device. The client device determines and/or tracks its position using information of the satellite states and timing information of the satellite signals.

Satellite-based positioning systems include constellations of earth orbiting satellites that constantly transmit orbit information and ranging signals to receivers. An example of a satellite-based positioning system is the Global Positioning System (GPS), which includes a constellation of earth orbiting satellites, also referred to as GPS satellites, satellite vehicles, or space vehicles. The GPS satellites circle the earth twice a day in a very precise orbit and transmit signal information to the earth. The satellite signal information is received by GPS receivers which can be in portable or mobile units, or in fixed positions on base stations and/or servers.
The GPS receiver uses the satellite signal information to calculate the receiver's precise location. Generally the GPS receiver compares the time GPS signals or satellite signals were transmitted by a satellite with the time of receipt of that signal at the receiver. This time difference between satellite signal reception and transmission provides the receiver with information as to the range of the receiver from the transmitting satellite. Using pseudo-range measurements (pseudo because the range information is offset by an amount proportional to the offset between GPS satellite clock and receiver clock) from a number of additional satellites, the receiver can determine its position. The GPS receiver uses received signals from at least four satellites to calculate three-dimensional position (latitude, longitude, and altitude), or at least three satellites to calculate two-dimensional position (if altitude is known).
As GPS technology becomes more economical and compact it is becoming ever more common in consumer applications. For example, GPS systems are used for navigation in general aviation and commercial aircraft as well as by professional and recreational boaters. Other popular consumer uses of GPS include use in automobile navigation systems, construction equipment, and farm machinery as well as use by hikers, mountain bikers, and skiers, to name a few. Further, many location-based services are now available, such as asset tracking, turn-by-turn routing, and friend finding. Because GPS technology has so many consumer applications, it is finding increased popularity as an additional application hosted by a variety of portable electronic devices like personal digital assistants (PDAs), cellular telephones, and personal computers (PCs), to name a few. The popularity of GPS technology with consumers has resulted in an increased reliance on the position information provided to the consumer by GPS which, in turn, has resulted in a desire for GPS systems that provide reliable position information even when the GPS system is operating under less-than-ideal conditions.
The GPS satellite signals travel by line of sight, meaning they will pass through clouds, glass and plastic but will not get through most solid objects such as buildings and mountains. Generally, then, GPS receivers are usable everywhere except where it is impossible to receive an adequate satellite signal such as inside some buildings, in caves and other subterranean locations, and underwater. A GPS receiver, when determining position information, typically relies on information from the satellite signal, the absence of which makes position determination impossible. This satellite signal information includes a pseudorandom code along with ephemeris and almanac data to the receivers. The pseudorandom code is a code that identifies the satellite that is transmitting the corresponding signal and also helps the receiver to make ranging measurements. The almanac data tells the GPS receiver where each GPS satellite of the constellation should be at any time over a wide time interval that spans a few days or weeks. The ephemeris data does the same thing but much more accurately though over a much shorter time interval of a few hours.
The broadcast ephemeris data, which is continuously transmitted by each satellite, contains important information about the orbit of the satellite, and time of validity of this orbit information. In particular, the broadcast ephemeris data of a GPS satellite predicts the satellite's state over a future interval of approximately four hours. The state prediction includes predictions of satellite position, velocity, clock bias, and clock drift. More particularly, the broadcast ephemeris data describe a Keplerian element ellipse with additional corrections that then allow the satellite's position to be calculated in an Earth-centered, Earth-fixed (ECEF) set of rectangular coordinates at any time during the period of validity of the broadcast ephemeris data. Typically, the broadcast ephemeris data is essential for determining a position.
Considering that the broadcast ephemeris data is only valid for a four hour interval and is essential for position determination, a GPS receiver is required to collect new broadcast ephemeris data at such time as the receiver needs to compute the satellite state when the validity time for the previously-collected broadcast ephemeris data has expired. The new broadcast ephemeris data can be collected either as direct broadcast from a GPS satellite or re-transmitted from a server. However, there are situations under which it is not possible to collect new broadcast ephemeris data from GPS satellites or from a server. As an example of situations in which new broadcast ephemeris data cannot be collected, a low signal strength of the satellite signals can prevent decoding/demodulating of the ephemeris data from the received satellite signal, the client can be out of coverage range of the server, and/or the server can be unavailable for a number of reasons, to name a few. When new broadcast ephemeris data is not available, the GPS receiver is typically unable to provide position information.
Furthermore, even when the GPS receiver is in a position from which it can receive the broadcast ephemeris information from a GPS satellite and/or server and properly decode the signal, the process of receiving and decoding adds substantially to the processing time. This additional processing time directly increases the time-to-first-fix (TTFF) while increasing the power usage of the receiver. Both an increase in the TTFF and the power usage can be unacceptable to a user depending on the use being made of the receiver and power capabilities of the receiver (for example, a GPS receiver hosted on a client device like a cellular telephone would have stricter power use constraints). As a result of the increased use of GPS in consumer devices, and the increased reliance on the information provided by such devices, it is desirable to reduce the number of situations in which the GPS receiver cannot provide position information and/or cannot provide position in a time and power efficient manner.

Determining position without use of broadcast ephemeris information


An automatic washing apparatus and method for washing an inner part of a drink mixing part of an automatic beverage vending machine is disclosed. The apparatus and method enables the drink mixing part to be automatically washed depending on the pollution level in the part. Thus, a purchaser of goods from the machine can use a clean vending machine. The automatic washing apparatus has a pollution detecting part for detecting the pollution level in the drink mixing part. If it is determined that the drink mixing part has a pollution level higher than desired, a control part generates a signal to supply hot water to wash the drink mixing part.

1. Field of the Invention
This invention relates, in general, to an automatic vending machine, and more particularly to an automatic washing apparatus and method for washing an inner part of a drink mixing part. The timing of the washing is dependent on the level of pollution in the inner part.
2. Description of the Prior Art
Automatic vending machines have been widely used in many countries for keeping and dispensing various goods such as coffee, cigarettes, cakes, and candy. The vending machines generally have a transparent chamber for holding the goods, so that users can view the available goods.
FIG. 1 is an inner constructive view of a typical automatic vending machine used for vending beverages such as coffee and tea. As shown in the drawing, the typical automatic vending machine includes a housing 10 that is the external most portion of the vending machine. A source vessel 12 for storing various beverage source materials, such as coffee and tea, is mounted inside the housing 10. A source supply part 5 supplies the beverage source material stored inside the source vessel 12. A source shoot 14 is mounted at a lower side of the source supply part 5, for guiding the movement of the beverage source material from the source supply part 5. A hot water supply part 6 supplies hot water. A drink mixing part 7 mixes the beverage source material guided through the source shoot 14 and the hot water supplied from the hot water supply part 6.
FIG. 2 is a schematic block diagram of a typical automatic beverage vending machine. As shown in the drawing, the automatic vending machine includes a coin detecting mechanism 1 that provides a signal according to the amount of the coins inserted in the vending machine. The automatic vending machine further includes a goods selecting part 2 for selecting an article from the available goods, and a control part 3 for generating a control signal to display the status of the goods related to the amount of the coins inserted, as detected by the coin detecting mechanism 1. The control part 3 further controls the supply of the beverage source material and hot water needed for the goods as selected from the goods selecting part 2. A display part 4 is included for displaying the total amount of coins inserted and the status of the automatic vending machine. Also included is a source supply part 5 for supplying the beverage source according to a signal from the control part 3, a hot water supply part 6 for supplying the hot water, and a drink mixing part 7 for mixing the beverage source material supplied from the source supply part 5 and the hot water supplied from the hot water supply part 6. The mixed beverage is extracted through a nozzle that is part of mixing part 7.
Additional details regarding the goods selecting process and operating process of conventional automatic vending machines will be explained hereinafter.
When currency, such as coins and bills, is inserted through a inserting slot (not shown), the condition of the coins or bill and the value of coins or bill is detected by a plurality of sensors (not shown) of the coin detecting mechanism 1, and a signal is provided to the control part 3. The control part 3 generates a signal for display part 4 to display the total inserted amount according to the signal from the coin detecting mechanism 1. The display part 4 displays the selection possibilities according to the control part 3, such as when the total inserted amount of coins exceeds the price of the goods available from the automatic vending machine.
After the selection availability shown in the display part 4 has been displayed, a selecting button is pushed by the user, which causes the selected goods to be extracted from the automatic vending machine. A signal corresponding to the goods selected is provided to the control part 3. At this time, control part 3 generates a control signal to supply the beverage source material and hot water corresponding to the goods selected by the user, and to mix the beverage source material and the hot water.
Accordingly, after the beverage source material has been supplied from the source vessel 12 through the source supply part 5 by a signal from the control part 3, the beverage source material is supplied to the drink mixing part 7 through the source shoot 14. Simultaneously, hot water is supplied from the hot water supply part 6 to the drink mixing part 7 according to a signal from the control part 3.
Subsequently, after the beverage source material from the source vessel 12 and the hot water from the hot water supply part 6 has been mixed in the drink mixing part 7, the mixed beverage is extracted through the nozzle and presented to the user.
However, a problem exists in the above automatic vending machine in that all of the beverage mixed in drink mixing part 7 is not extracted from drink extracting part 8. A portion of the beverage remains in the drink mixing part 7, resulting in an inner part of the drink mixing part 7 being polluted, thereby causing a unsanitary state of the automatic vending machine. Further, maintenance of the vending machine is inconvenient because it requires manually washing the inner part of the drink mixing part.

Automatic washing apparatus and method of washing automatic vending machines


A low-noise buffer circuit stabilizing the output voltage and current to prevent noise, includes current sources connected between the CMOS circuit and power supply sources providing a power supply for the CMOS circuit, a resistor element connected to the current sources and in parallel with the CMOS circuit, the resistor element bypassing current between the current sources to prevent current fluctuation.

1. Field of the Invention
The present invention relates to a low-noise buffer circuit, and more particularly, to a low-noise buffer circuit which reduces noise, stabilizes output voltage and reduces variation of current flowing through itself.
2. Description of Related Art
Conventionally, as such low-noise buffer circuit, an output buffer for impedance matching in a transmission path, a CMOS circuit having a transistor serving as a high resistor connected to an inverter are known. These buffer circuits are provided for suppressing a peak current (the maximum current upon occurrence of a change in input). These buffer circuits are grouped into two types. One type is circuits to feed a short circuit current through a CMOS circuit and the other type is circuits without short circuit current.
The former type circuits include a circuit using a termination resistor and a circuit in a sense amplifier driving circuit of semiconductor memory as disclosed in Japanese Kokai No. Hei 4-30389 where a gate of a driving transistor is provided with voltage lower than a threshold voltage of the transistor so that the transistor is gradually turned on. Besides, a circuit in an output driver circuit as disclosed in Japanese Kokai No. Hei 1-165225 has a transistor to function as a high resistor or week current power supply connected to an inverter.
On the other hand, the latter circuits include an output driver as disclosed in Japanese Kokai No. Hei 134016 having a circuit where the occurrence of short circuit current is completely prevented by first operating a transistor which takes an off state from an on state, and a circuit where the short circuit current is eliminated by shifting operation timing of charged/discharged transistor to reduce the peak current. Besides, a circuit as disclosed in Japanese Kokai No. Hei 2-220294 has a precharge circuit that is controlled by a signal corresponding to an output signal level and prevents occurrence of short circuit current, so as to enable high-speed reading or to reduce the peak current, and a circuit as disclosed in Japanese Kokai No. Hei 1185022 eliminates the short circuit current by controlling the operation timing with inverters having different logical thresholds.
In any case, the conventional buffer circuits feed or eliminate the short circuit current to suppress the peak current. In a CMOS inverter, if noise due to operation switching is to be reduced, the short circuit current is fed while sacrificing current consumption to a degree. On the other hand, if reduction of the current consumption occupies a higher priority than the reduction of the noise, the short circuit current is eliminated while sacrificing occurrence of noise due to impedance mismatch in a transmission path or switching noise.
FIG. 5 is a diagram of a prior art buffer circuit where an output side is terminated. As shown in FIG. 5, the buffer circuit has a CMOS inverter circuit 2 comprising a PMOS transistor 21 and an NMOS transistor 22 with respective gates connected to an input terminal 11. A source of the PMOS transistor 21 is connected to a power supply VDD, and a source of the NMOS transistor 22 is connected to the ground GND. Both drains are connected to an output terminal 12. The output terminal 12 supplies a predetermined voltage VDD/2 via a transmission line 5 and a termination resistor R.
In this case, a current is constantly flowed through the transmission path 5 and the termination resistor R via the PMOS transistor 21 or the NMOS transistor 22 of the CMOS circuit 2, and reflection noise is suppressed by obtaining impedance matching in the transmission path while sacrificing such constant current.
FIG. 6 is a diagram of AC operation characteristics representing respective levels of input/output voltages and currents in the CMOS circuit in FIG. 5. The vertical axis represents potential and current, and the horizontal axis represents time. In FIG. 6, VIN denotes an input voltage applied to the input terminal 11; VOUT, an output voltage which appears in the output terminal 12 upon application of the input voltage VIN; IV, a current which flows from the power supply VDD via the PMOS transistor 21 and via the output terminal 12 and the NMOS transistor 22 through the VDD/2; IG, a current which flows from the output terminal 12 via the NMOS transistor 22 and from the power supply VDD/2 via the PMOS transistor 21 through the GND.
Accordingly, a whisker-like variation occurs in the currents IV and IG when the power supply is turned on (time: 0.0 nS) and upon inversion of the CMOS circuit 2 (approximately 22.0 nS). Further, in case of output buffer having a termination resistor, the maximum current variation (p-p) is 17.5 mA, and the through rate of output waveform is 1.0 V/nS.
In the above-described Japanese Kokai No. Hei 1-165225, a high resistor and a weak current power supply are connected between the CMOS circuit 2 and the power supply VDD and the GND to suppress such noise and short circuit current upon inversion of the inverter.
As above-described, the related low-noise buffer circuits suppresses reflection noise by sacrificing constantly-flowing current and switching noise by connecting high-resistor to a weak current power supply.
That is, in interface techniques in recent years represented by an output buffer having a termination resistor, a low-amplitude signal is obtained by divided voltage by the termination resistor. For this purpose, such interface has a high power-supply voltage in consideration of divided voltage. That is, the interface increases a voltage to a high voltage and then reduces the voltage (to a low-amplitude). However, such repetition of voltage increase/decrease lowers circuit efficiency. Further, in acquisition of high-speed operation in a buffer which forms an interface in recent years, to reduce noise due to impedance mismatch in a transmission path, the buffer usually has a termination resistor. In such case, a large constant current by the termination resistor occurs, and the current greatly varies upon switching.
More particularly, in recent interface techniques, a bus width increases and the number of operations increases. Accordingly, in high-speed operation, simultaneous operation timings are further concentrated, so that simultaneous operation noise increases. Further, a large constant current which occurs by a termination resistor connected to an output terminal varies upon switching operation, and noise caused by the current increases.
Accordingly, in the related buffer circuits, as a countermeasure for the increase in simultaneous operation noise and delay variation due to the simultaneous operation noise, or in use of termination resistor, a large constant current varies upon switching, which increases radiation noise.
An object of the present invention is to provide a low-noise buffer circuit which suppress such noises as described above.
Another object of the present invention is to provide a low-noise buffer circuit which suppresses a variation of current, whereby noise can be reduced.
A low-noise buffer circuit according to the present invention includes a first circuit having an input terminal provided with an input signal, an output terminal supplying an output signal, and first and second terminals; a first current source connected between a first potential source and the first terminal; a the current source connected between a second potential source and the second; and a first component serving as a resistor and connected between the first and second current sources in parallel to the first circuit.
These and other objects of the present invention will be apparent to those of skill in the art from the appended claims when read in light of the following specification and accompanying figures.

Low-noise buffer circuit that suppresses current variation


A fourth port of a first WDM-type optical coupler and a fifth port of a second WDM-type optical coupler are optically connected, and a second port of the first WDM-type optical coupler and an eighth port of the second WDM-type optical coupler are optically connected. A light source for emitting excitation light is connected to a first port of the first WDM-type optical coupler, and a light-receiving section (light detector) is connected to a sixth port of the second WDM-type optical coupler. Excitation light is emitted through a seventh port of the second WDM-type optical coupler toward an observed subject, fluorescence from the observed subject is acquired through the seventh port of the second WDM-type optical coupler, and input fluorescence is detected by the light-receiving section.

As a passive optical device which branches and combines light, an optical coupler (optical fiber coupler) is used. An optical coupler is utilized not only for fiber-optic communication, but also in a confocal endoscope system, etc., in recent years. For example, as a confocal endoscope system which uses excitation light, a configuration using a 2×2 WDM (wavelength division multiplexing) type optical coupler is provided with a first port and second port on the input side (output side) and a third port and fourth port on the output side (input side) is known (PLT 1). In this confocal endoscope system, the excitation light, which is emitted from the laser light source, enters the first port and is emitted from the third port. The fluorescence of the subject due to the emitted excitation light enters the third port and is guided through the second port to a light-receiving section. Further, this optical coupler ideally is designed so that excitation light with a wavelength of 488 nm enters from the first port and branches out to the third port and fourth port at a 90:10 ratio, while fluorescent light with a peak wavelength of 515 nm enters from the third port and branches out to the first port and second port at a 0:100 ratio.

Optical coupler device and confocal observation system


Examples relate to manipulating web pages. In one example, a computing device may: receive a web page that includes application instructions for modifying objects included in the web page; execute the application instructions; record, in an ordered list of changes, change data for each application object that is modified, created, or destroyed during execution of the application instructions; record, in the ordered list of changes, change data for each web page object that is modified, created, or destroyed during execution of the application instructions; identify, in the ordered list of changes, a transition point between recorded changes; receive a request to change a state of the web page to the transition point; and apply, in reverse order, an inverse of each change specified in the ordered list of changes from a current point in time until the transition point.

Web pages often include application instructions, such as scripts, for performing a variety of actions. Some web pages, such as those referred to as single page applications (SPAs), often use application instructions for implementing many features on a single web page. For example, an HTML page may include application script for displaying interactive content that can change the structure of the HTML and/or the state of the displayed content.


A modular LED light bulb is presented. The bulb comprises a bulb envelope and a removable screw base. A power supply within the bulb envelope connects to an electrolytic capacitor within the screw base. When the electrolytic capacitor in the screw base requires replacement, the screw base is detached from the bulb envelope, the depleted electrolytic capacitor is discarded, and a new electrolytic capacitor is connected to the power supply. The various embodiments increase the useful life of the LED light bulb. In another aspect, the screw base may be adapted to accept swappable modules to provide the light bulb with additional functionality. The swappable modules may provide the light bulb with wireless control and motion sensing.

A light-emitting diode (LED) light bulb has one or more light-emitting diodes mounted on a printed circuit board housed inside a bulb envelope. A standard LED light bulb also includes a power supply, a heat sink, and electrical insulators to isolate the electrical components. The LEDs on the circuit board have a very long life, and the life of the LED bulb is restricted mainly by the life of the electrical components other than the LEDs. Electrolytic capacitors have a relatively short life span compared to other bulb components. If the bulb is constructed of high-quality parts rated for long life, the electrolytic capacitor in the power supply is generally one of the first components to fail.

Modular LED bulb with user replaceable components


In a vehicle driving assist system, an obstacle detection device detects an obstacle present in each of two obstacle detection directions with respect to a subject vehicle; and a TTC calculation device calculates a TTC between the subject vehicle and each of obstacles based on detection results of the obstacle detection device. A lateral reaction force control device controls a reaction force generated at a vehicle operation equipment for drive operation in a lateral direction of the subject vehicle based on a first TTC which is smaller in the TTCs calculated in the TTC calculation device; and a longitudinal reaction force control device controls a reaction force generated at a vehicle operation equipment for drive operation in a longitudinal direction based on a second TTC which is larger in the TTCs.

1. Field of the Invention
The present invention relates to a technology for assisting driver operations, and more specifically, it relates to a driving assist system for a vehicle that assists operations performed by the driver.
2. Description of Related Art
Systems employed to assist driver operations in the related art include the system disclosed in Japanese Laid Open Patent Publication No. H10-211886. This system detects obstacles present around the vehicle and determines any latent risk potential that may exist. Then, the system inhibits a steering operation that would lead to an undesirable situation by controlling the steering assist torque based upon the calculated risk potential.


A capacitance coupled to a memory node and a word line of an SRAM cell provides an electrostatic capacitance between the memory node and the word line. The capacitance has a first electrostatic capacitance when the word line is in a nonselective state (usually a LOW level) and the memory node retains a HIGH level; the capacitance has a second electrostatic capacitance which is smaller than the first electrostatic capacitance when the word line is in the nonselective state (usually the LOW level) and the memory node retains the LOW level.

The present invention relates to a semiconductor device, in particular to a semiconductor memory device having SRAM (Static Random Access Memory) cells.
Patent Literature 1 discloses a technology for, when something is written to some of plural SRAM cells coupled to an identical word line, attaining simultaneously both the stabilization of write operation to the relevant SRAM cells and the speed-up of read operation and the prevention of malfunction in SRAM cells not subjected to writing (namely SRAM cells subjected to reading). FIG. 20 shows the configuration of an SRAM cell disclosed in Patent Literature 1 for attaining the above objects. An SRAM cell 900 shown in FIG. 20 has a pair of inverters constituting a flip-flop circuit. The inverter pair includes a first complementary metal oxide semiconductor (CMOS) inverter having transistors NM1 and PM1 and a second CMOS inverter having transistors NM2 and PM2.
Further, the SRAM cell 900 shown in FIG. 20 has a feed control switch P3 and a capacitive element C1. The feed control switch P3 is arranged between a feed node NDD of the inverter pair and a high reference voltage VDD. The feed control switch P3 is turned off when a word line WL is in a selective state (namely a HIGH potential) and disconnects the feed node NDD from the high reference voltage VDD. Meanwhile, the capacitive element C1 is arranged so as to have an electrostatic capacitance between the feed node and the word line WL. The capacitive element C1 raises the voltage of the feed node NDD disconnected from the high reference voltage VDD by the switch P3.
Data write operation to the SRAM cell 900 shown in FIG. 20 is as follows. That is, in a cell where rewriting is performed, the potential of the feed node NDD comes to be a level lower than the high reference voltage VDD when the word line WL is selected and the potential of the word line WL shifts from a LOW level to a HIGH level. As a result, bit inversion of the cell where the rewriting is performed is facilitated and the write margin improves. Meanwhile, in a cell, where rewriting is not performed, coupled to the word line WL identical to the cell subjected to rewriting, the potential of the feed node NDD is retained at a level higher than the high reference voltage VDD when the potential of the word line WL shifts from the LOW level to the HIGH level. As a result, bit inversion (namely data destruction) hardly occurs in the cell not subjected to rewriting.
Meanwhile, data read operation from the SRAM cell 900 shown in FIG. 20 is as follows. That is, in a cell where reading is performed, the potential of the feed node NDD of the inverter pair rises to a level higher than the high reference voltage VDD when the word line WL is selected and the potential of the word line WL shifts from the LOW level to the HIGH level. As a result, the voltage of a first memory node (here a memory node NA) retaining the HIGH level comes to be a level higher than the high reference voltage VDD and the drivability of a second drive transistor (NM2) to drive a second memory node (NB) retaining the LOW level improves. Consequently, the electricity charged in a bit line (BL_B) is discharged rapidly through a second transfer transistor (NM4) and the second drive transistor (NM2) and the potential rise of the second memory node (NB) of the LOW potential is suppressed. As a result, the SRAM cell 900 shown in FIG. 20 can improve an SNM (Static Noise Margin) during reading and can contribute to the increase of a read speed. In a non-read cell coupled to the word line WL identical to the cell subjected to reading too, the potential of the feed node NDD is retained at a level higher than the high reference voltage VDD. As a result, bit inversion (namely data destruction) of the non-read cell hardly occurs.
Patent Literature 2 discloses a configuration in which a MOS transistor operating as a capacitive element is coupled to a memory node of an SRAM cell. Specifically, the gate of the MOS transistor operating as a capacitive element is coupled to the memory node. Further, the source and drain of the MOS transistor operating as a capacitive element are coupled to a high reference voltage VDD, a low reference voltage (ground voltage GND), or the memory node. By such a configuration, the SRAM cell disclosed in Patent Literature 2 can add the electrostatic capacitance corresponding to the gate capacitance of the MOS transistor operating as a capacitive element to the memory node. As a result, the SRAM cell of Patent Literature 2 can contribute to the improvement of soft error resistance.    Patent Literature 1: Japanese Unexamined Patent Application Publication No. 2007-200520    Patent Literature 2: Japanese Unexamined Patent Application Publication No. 2002-050183

Semiconductor device having memory cell with electrostatic capacitance circuit


Cyclic di-GMP or cyclic dinucleotides thereof can be used to inhibit cancer cell proliferation or to increase cancer cell apoptosis in vitro as well as in vivo in a patient.

1. Field of the Invention
The present invention relates to the use of cyclic dinucleotides, such as c-di-GMP and its analogues, to inhibit and treat cancer. The cyclic dinucleotides in particular inhibit basal and growth factor-induced human cancer cell proliferation.
2. Description of the Related Art
Experimental data indicate that most colon cancers arise as a consequence of progression from normal colonic mucosa to adenomatous polyp to cancer, associated with the accumulation of somatic genetic alterations that affect the regulation of apoptosis and DNA repair (Kinzler et al., 1996; and Jass et al., 2002). These alterations include mutations and methylation of oncogenes, tumor suppressor and mismatch repair genes (Kinzler et al., 1996; and Jass et al., 2002). Environmental factors (e.g., fecal bile acid concentrations) play an important promoting role in this process (Hill et al., 1975; Reddy et al., 1977; Hill, 1991; and Lichtenstein et al., 2000).
The American Cancer Society estimates that 106,370 cases of colon cancer will be diagnosed in 2004 (cancer.org). In the United States, colon cancer is the second most frequent cause of cancer death and the leading gastrointestinal cause of death (Russo et al., 2004). The outcome is strongly correlated with cancer stage at the time of diagnosis (Bresalier, 2002). Patients with Stage 0 disease (limited to the mucosa) have a more than 90% survival (Bresalier, 2002). In contrast, those with Stage III disease that has spread outside the colon to one or more lymph nodes have a 5-year survival approximating only 55% (Bresalier, 2002). Adjuvant chemotherapy for patients with Stage II or III disease with 5-fluorouracil (5-FU) plus levamisole or leucovorin may reduce colon cancer recurrence and mortality by 42 and 33%, respectively (Bresalier, 2002). Although the use of 5-FU in combination with topoisomerase inhibitors, such as irinotecan, thymidylate synthase inhibitors, and other agents shows promise, treatment for advanced disease (Stages III and IV) remains only marginally effective (Bresalier, 2002). Recently, based on efficacy in clinical trials, a synthetic chimeric monoclonal antibody, cetuximab (Erbitux), that is specific for EGFR was FDA-approved, in combination with irinotecan, for treatment of metastatic colorectal cancer in patients who are refractory to irinotecan-based chemotherapy. Cetuximab is also approved as a single agent to treat patients with EGFR-expressing, metastatic colorectal cancer who are intolerant to irinotecan-based chemotherapy.
The development of cancer requires that the cell overcome normal restrictions placed on cell growth. Normal cell growth is ultimately regulated by the cell cycle. The cell cycle comprises the events that occur in the nucleus between two cell divisions. The cycle is divided into 4 phases called G1 (first gap), S (DNA synthesis), G2 (second gap), and M (mitosis). The RNA and proteins needed for DNA replication are synthesized during the G1 phase. In S phase, DNA replication takes place and the cell's DNA content doubles from the diploid value of 2n to the fully replicated, tetraploid value of 4n. The tetraploid cell prepares for the upcoming mitotic division in G2 phase. Finally, in M phase the cell divides into two daughter cells, each containing a diploid (2n) complement of DNA. Cells may also withdraw from the cell cycle to enter a quiescent state termed G0. Under certain conditions, cells can be stimulated to leave the G0 phase and reenter the cell cycle. The major regulatory point controlling entry from G1 into S phase of the cell cycle occurs late in G1 and is termed the restriction (R) point. Growth of cancer cells may by stimulated by a number of growth factors, including epidermal growth factor (EGF) and acetylcholine, that interact with specific growth factor receptors on cancer cells.
Post-receptor signaling cascades are crucial for ligand-receptor interaction to result in changes in cell function. The muscarinic cholinergic family of G protein-coupled receptors (GPCRs) includes five muscarinic receptor subtypes desgignated M1-M5 (Bonner et al., 1987; and Brann et al., 1993). Peripheral M3 receptors, are very common in the gastrointestinal tract are coupled to a G protein. It is apparent that some cancer cells express M3 muscarinic receptors and activation of these receptors results in stimulation of cancer cell proliferation; however, the cellular pathways underlying these events have not been elucidated. In contrast to GPCRs, epidermal growth factor receptor (EGFR) is a member of the growth factor receptor family and activation of these receptors leads to proliferation of cancer cells (Murphy et al., 2001). EGFR is commonly overexpressed in a number of epithelial malignancies and is often associated with an aggressive phenotype and EGFR is present in over 50% of cases of lung cancer, head and neck squamous cell carcinomas and colon cancer (Janmaat et al., 2003). Recently, it has been found that activation of GPCRs may result in transctivation of receptors such as EGFR (Zhang et al., 1999).
Cyclic nucleotides, such as cAMP and cGMP, are well recognized as important low-molecular weight signaling molecules in eukaryotes. In bacteria, while cAMP has a role in alleviating glucose catabolite repression (Jackson et al., 2002; Notley-McRobb et al., 1997), cGMP has not been shown to act as a signaling molecule. However, another guanosine nucleotide, the cyclic dinucleotide c-di-GMP (also known as 3′,5′-cyclic diguanylic acid, cyclic diguanylate, cyclic diguanosine monophosphate, cyclic bis (3′→15′) diguanylic acid, cyclic diguanylic acid, cGpGp, and c-GpGp)

where G in the above structure is guanine, has been reported to be an intracellular bacterial signaling molecule in a few species and whose structure is known and consists of two cGMP molecules bound head-to-tail (Jenal, 2004 and Ross et al., 1991). c-di-GMP was first identified in Acetobacter xylinum (renamed Gluconacetobacter xylinum) and shown to regulate cellulose production in this species (Amikam et al., 1989; Mayer et al., 1991; Ross et al., 1990 and 1991). The exact molecular mechanism remains unclear but regulation in G. xylinum appears to involve c-di-GMP binding to a membrane protein that activates gene expression. Cellulose production appears to be modulated by the opposing effects of two proteins with GGDEF domains, diguanylate cyclase (Dgc) and c-di-GMP phosphodiesterase (PdeA), each controlling the level of c-di-GMP in the cell. Thus, c-di-GMP is thought to be a signaling molecule. Proteins containing GGDEF domains are very widespread in microbial cells suggesting that they are naturally produced by many microorganisms, while they appear to be much less prevalent in human proteins.
The use of unmethylated oligonucleotides in the treatment or prevention of cancer has been previously reported. Synthetic oligonucleotides containing CpG with appropriate flanking regions (CpG motif) have been found to activate macrophages, dendritic cells and B cells to secrete a variety of immunomodulatory cytokines such as IL-6, IL-12, IL-18 and gamma interferon (Krieg, 2002). CpG DNA has also been shown to activate costimulatory molecules such as CD80 and CD86 and to induce strong innate immunity at mucosal surfaces. The immunostimulatory property of CpG DNA produces long-term vaccine-like effects due to its adjuvant properties. CpG oligonucleotides influence both antibody and cell-mediated immunity and applications include vaccine adjuvants, taming allergic reactions and potentiating monoclonal antibodies and cytotoxic immune cells. They also enhance the antitumor effects of chemotherapeutic agents and improve survival after surgical section of a solid tumor (Weigel et al., 2003). For CpG oligonucleotides, the anti-tumor effect is mediated via activation of the host immune system, not through direct anti-tumor effects. Based on their immunotherapeutic properties, CpG oligonucleotides have been used to treat and prevent various cancers and used in cancer vaccines (U.S. Pat. Nos. 6,653,292; 6,429,199; 6,406,705; and 6,194,388). These CpG oligonucleotides however are not cyclic.
Cyclic dinucleotides are reported to cause cell cycle arrest (Steinberger et al., 1999). However, their application to the treatment of cancer has not been proposed or studied. Approximately 60,000 Americans die from colon cancer each year (Steinberger et al., 1999; and Winawer et al., 2003). Although surgical treatment is effective for early lesions, treatment for advanced metastatic disease is not very effective with very low survival rates for patients with invasive and metastatic colon cancer. Hence, a safe therapeutic (anti-cancer) agent that inhibits colon cancer progression, and cause cancer involution and regression would be extremely beneficial.
Citation of any document herein is not intended as an admission that such document is pertinent prior art, or considered material to the patentability of any claim of the present application. Any statement as to content or a date of any document is based on the information available to applicant at the time of filing and does not constitute an admission as to the correctness of such a statement.

Method for inhibiting cancer cell proliferation or increasing cancer cell apoptosis


Methods, apparatus, and articles of manufacture to measure geographical features using an image of a geographical location are disclosed. An example method includes dividing an image of a geographic area of interest into geographical zones, the geographical zones being representative of different physical geographical areas; modifying boundaries of a first one of the geographical zones to more closely conform to an observable landmark or a geographical location observable by a person located in the first one of the geographical zones; storing descriptions for the geographical zones in a computer memory based on the modified boundaries of the first one of the geographical zones; and storing a value representative of a geographical feature represented in the image for the first one of the geographical zones.

Manufacturers of goods sometimes wish to measure the market presence of their goods in particular markets to determine markets in which they are under-represented and/or over-represented. Smaller, growing markets are often desirable targets for such studies. As these markets grow larger and/or mature, previous market research becomes obsolete and may be updated and/or performed again.