A converting processing block (4B/5B CONVERTER and ARB. SIGNAL CONVERTER) functions as a 4 bit/5 bit converting unit for performing 4 bit/5 bit conversion of data and as an arbitration signal converting unit for allocating 5-bit symbols other than 5-bit symbols allocated to data to arbitration signals to enable the sending/reception of the arbitration signals and packet data as 5-bit code data. There are also provided scrambling blocks (SCRAMBLE 1, SCRAMBLE 2) 4A, 4B and descramble blocks (DESCRAMBLE 1, DESCRAMBLE 2) 5A, 5B between the 4 bit/5 bit converting unit and the arbitration signal converting unit on one hand and the input/output port on the other hand to inhibit unneeded radiations in a transmission channel.

This invention relates to a method and apparatus for transmitting digital data.
As an interfacing standard supporting high-speed data transfer and real-time transfer, with a view to interfacing for data transfer, there is known the IEEE 1394 high-Performance Serial Bus Standard (IEEE 1394 standard).
This IEEE 1394 standard provides data transfer speeds at 100 Mbps (98.304 Mbps), 200 Mbps (196.608 Mbps) and 400 Mbps (393.216 Mbps). The 1394 port, having an upper order transfer speed, is prescribed to maintain compatibility with respect to its lower order transfer speed. Thus, the data transfer speeds of 100 Mbps, 200 Mbps and 400 Mbps can co-exist on the same network. Also, in the IEEE 1394 standard, a transfer format of the DS-LINK (DATA/STROBE LINK) encoding system is used, in which transfer data are converted into data signals and strobe signals supplementing the data signals, as shown in FIG. 1, and in which clock signals are generated by taking an exclusive OR of the two signals. Referring to the cable structure shown in a cross-sectional view of FIG. 2, there is prescribed a cable 200 of a structure in which a cable obtained on bundling two sets of twist pair lines (signal lines) 202 shielded by first shield layers 201 and power source lines 203 is further shielded by a second shield layer 204.
In the connection system of the IEEE 1394 standard, two types of systems, namely a daisy chain system and a node branched system, may be used. With the daisy chain system, up to a maximum of 16 nodes (an equipment having the 1394 port) can be connected, with the maximum length between the nodes being 4.5 m. By using node branching in combination, as shown in FIG. 3, it is possible to connect up to 63 nodes possible with the standard (physical node addresses).
With the IEEE 1394 standard, connection or disconnection of the above-described cable can be performed with the equipment remaining in operation, that is in the power up state, so that the 1394 network can be re-constructed automatically at a time point of node addition or deletion. The equipment of the node connected at this time can be recognized automatically. The ID or layout of the connected equipments can be managed on the interface.
The constituent elements of the interface conforming to the IEEE 1394 standard as well as the protocol architecture are shown in FIG. 4. The interface of the IEEE 1394 can be classified into the hardware and the firmware.
The hardware is made up of a physical layer (PHY) and a linked layer (link layer).
In the physical layer, signals of the IEEE 1394 standard are driven directly. The link layer has the host interface and the physical layer.
The firmware includes a transaction layer, made up of a management driver for performing actual operations for the interface conforming to the IEEE 1394 standard, and a management layer, made up of a driver for network management conforming to the IEEE 1394 standard, termed Serial Bus management (SBM).
The application layer includes a software used by the user and a management software for interfacing the management layer or the transaction layer.
In the IEEE 1394 standard, the operation of transfer performed in the network is termed a sub-action, for which the following two sorts of the sub-action are prescribed. That is, as the two sub-actions, an asynchronous transmission mode, termed xe2x80x9casynchronousxe2x80x9d, and a synchronous transfer mode guaranteeing a transfer area, termed xe2x80x9cisochronousxe2x80x9d, are defined. Each sub-action is divided into three parts, and assumes the transfer states termed xe2x80x9carbitrationxe2x80x9d,xe2x80x9cpacket transmissionxe2x80x9d and xe2x80x9cacknowledgmentxe2x80x9d.
In the asynchronous sub-action, asynchronous transfer is used. In FIG. 5, showing the temporal transition state in the transfer mode, the first sub-action gap specifies the idle state of the bus. By monitoring the sub-action gap time, the directly previous transfer comes to a close and judgment is given as to whether or not new transfer is possible.
If the idle state continues for longer than a preset time duration, a decision is given that a node desiring the transfer can use a bus, and arbitration is executed in order to acquire a bus control right. A decision to stop a bus actually is given by a node B positioned at a root, as shown in FIGS. 6a and 6b. The node which has acquired the bus control right by this arbitration then executes data transfer, that is packet transmission. After the data transfer, a node which has received data returns a code ack (code returned to acknowledge the reception) responsive to the received result for the transferred data to execute response acknowledgement. By executing this acknowledgement, both the transmission and receiving nodes can confirm by the ack contents that transfer has been completed regularly.
The sub-action gap, that is the bus idle state, is then resumed to repeat the above transfer operation.
In the isochronous sub-action, transfer of a structure basically similar to the asynchronous transfer is executed. This transfer is executed in preference to the asynchronous transfer in the asynchronous sub-action, as shown in FIG. 7. This isochronous transfer in the isochronous sub-action is executed in preference to asynchronous transfer in the asynchronous sub-action approximately every 8 kHz to set a transfer mode which guarantees a transfer area. This realizes transfer of real-time data.
If isochronous transfer of real-time data is to be executed simultaneously in plural nodes, a channel ID for distinguishing the contents (transmission node) is set in the transfer data in order to receive only the required real-time data.
The physical layer in the above-described IEEE 1394 standard is made up of a physical layer logical block (PHY LOGIC) 102, a selector block (RXCLOCK/DATA SELECTOR) 103, port logic blocks (PORT LOGIC 1, PORT LOGIC 2, PORT LOGIC 3), 104, 105, 106, cable ports (CABLE PORT 1, CABLE PORT 2, CABLE PORT 3) 107, 108, 109 and a clock generating block (PLL) 110, as shown in FIG.8.
The physical layer logical block 102 performs I/O control and arbitration control with the link layer in the IEEE 1394 standard and is connected not only to a link layer controller 100 but also to the selector block 103 and to the port logic ports 104, 105, 106.
The selector block 103 selects data (DATA 1, DATA 2, DATA 3) received via logical blocks 104, 105, 106, connected to the cable ports 107, 108, 109, and reception clocks (RXCLK 1, RXCLK 2, RXCLK 3), and is connected to the physical layer logical block 102 and to the port logic ports 104, 105, 106.
For reception, each set of packet data DATA 1, DATA 2, DATA 3 received via the port logic ports 104, 105, 106 and the reception clocks (RXCLK 1, RXCLK 2, RXCLK 3) is selected to send the received packet data and the reception clocks via cable ports 107, 108, 109 to the physical layer logical block 102. If, for example, the packet data DATA 1 received via the port logical block 104 via cable port 107 and the reception clock RXCLK 1 are selected, the received packet data (DATA 1) and its reception clock RXCLK 1 are sent by the port logical block 104 to the physical layer logical block 102. The packet data selected by the selector block 103 is written by the reception clock in a FIFO memory in the physical layer logical block 102. The packet data written in the FIFO memory is read out by a system clock SYSCLK provided by a clock generating block 110.
The port logical block 104 sends/receives an arbitration signal (ARB.SIGNAL) and data (DATA 1) via cable port 107 and has the function of generating reception clocks (RXCLK 1) from the data signals sent via cable port 107 and its strobe signals. This port logical block 104 is fed during arbitration with an arbitration signal (ARB. SIGNAL) from the physical layer logical block 102.
During data transmission time, the port logical block 104 converts the packet data DATA 1 sent via selector block 103 from the physical layer logical block 102 with transmission clocks TXCLK provided by the clock generating block 110 into serial data which is sent over the cable port 107.
During data reception, the port logical block 104 sends the packet data DATA 1 received over the cable port 107 to the physical layer logical block 102 over the selector block 103 along with the reception clocks (RXCLK 1). If the port logical block 104 is selected by the selector block 103, the packet data (DATA 1) is written in the FIFO memory in the physical layer logical block 102.
The port logical block 105 sends/receives the arbitration signal(ARB. SIGNAL) and data (DATA 2) over a cable port 108 and has the function of generating reception clocks (RXCLK 2) from the data signals sent via cable port 108 and its strobe signals. This port logical block 105 is fed during arbitration with an arbitration signal (ARB. SIGNAL) from the physical layer logical block 102.
During the data transmission time, the port logical block 105 converts the packet data (DATA 2) sent from the physical layer logical block 102 via the selector block 103 by the transmission clocks (TXCLK) provided by the clock generating block 110 into serial data which is sent via cable port 108.
During data reception time, this port logical block 105 sends the packet data (DATA 2) sent from the physical layer logical block 102 over the cable port 108 via selector block 103 to the physical layer logical block 102 along with the reception clocks (RXCLK 2). If this physical layer logical block 102 has been selected by the selector block 103, the packet data (DATA 2) is written by the reception clocks (RXCLK 2) in the FIFO memory in the physical layer logical block 102.
The port logical block 106 sends/receives the arbitration signal (ARB. SIGNAL) and data (DATA 3) over a cable port 108 and has the function of generating reception clocks (RXCLK 3) from the data signals sent via cable port 109 and its strobe signals. This port logical block 106 is fed during arbitration with an arbitration signal (ARB. SIGNAL) from the physical layer logical block 102.
During the data transmission time, the port logical block 106 converts the packet data (DATA 3) sent from the physical layer logical block 102 via the selector block 103 by the transmission clocks (TXCLK) provided by the clock generating block 110 into serial data which is sent via cable port 109.
During data reception time, this port logical block 106 sends the packet data (DATA 3) received via the cable port 109 and via selector block 103 to the physical layer logical block 102 along with the reception clocks (RXCLK 2). If this port logical block 104 has been selected by the selector block 103, the packet data (DATA 1) is written by the reception clocks (RXCLK 1) in the FIFO memory in the physical layer logical block 102.
The cable port 107 drives a twisted paired cable with a signal sent from the port logical block 104, while converting level of the signal sent over the twisted paired cable to send the converted signal to the port logical block 104.
The cable port 108 drives the twisted paired cable with a signal sent from the port logical block 105, while converting level of the signal sent over the twisted paired cable to send the converted signal to the port logical block 105.
The cable port 109 drives the twisted paired cable with a signal sent from the port logical block 106, while converting level of the signal sent over the twisted paired cable to send the converted signal to the port logical block 106.
The clock generating block 110 generates system clocks (SYSCLK) of 49.152 MHz and transmission clocks (TXCLK) of 98.304 MHz from clocks of 24.576 MHz provide by a quartz oscillator 111.
The logical values of the arbitration signal in the physical layer are three values of xe2x80x9c1xe2x80x9d, xe2x80x9c0xe2x80x9d and xe2x80x9cZxe2x80x9d, and are generated in accordance with the rule shown in Tables 1 and 2, while being decoded in accordance with the rule shown in Table 3. The value xe2x80x9cZxe2x80x9d denotes an inoperative state of a driver.
Of the two sets of the twist pair lines 202, one set of the twist pair lines TPA/TPA* sends a strobe signal (STRB_TX), while receiving the strobe signal (STRB_RX). The signals STRB_TX, DATA_TX, STRB_ENABLE and DATA_ENABLE are used for generating arbitration signals (ARB_A_RX, ARB_B_RX).
Also, in the physical layer, two transmission arbitration signals (ABR_A_TX, ARB_B_TX) are encoded to the line states, using the rule shown in Table 4. These states have different meanings depending on whether signals are sent to a parent node or to the child node, as shown in Table 4.
The parent-child relation in the IEEE 1394 standard is explained. Of the plural nodes connected to the network, there exist several nodes present at an end (leaf). Directly after resetting, each node checks whether or not it itself is a leaf. Whether each node is a leaf is checked by recognition of how many cables are connected to the node itself. Specifically, a node having a sole port or a node having plural ports only one of which is connected is a node. Each leaf makes an inquiry to a node to which it is connected (parent node). The node receiving the inquiry accepts the inquiring node to which it is connected as being a child. A further inquiry is made to a destination of connection from a node for which the parent-child relation has not been set. In this manner, the parent-child relation in the network is set. Finally, the node whose ports in their entirety serve as parent serves as a root.
In the physical layer, the interpolation arbitration signals (ARB_A, ARB_B) are decoded to the line states in accordance with the rule shown in Table 5 below.
The above-defined IEEE 1394 standard provides necessary conditions for an interface for connecting an image-handling domestic equipment to a computer, so that a variety of equipments, such as audio or visual equipments or personal computers, can be easily connected over a sole cable in a home to construct a household network to permit it facilitated operation of the various equipments.
However, since the IEEE 1394 standard provides that the distance between the interconnected equipments, that is the inter-node cable length, is 4.5 m at the maximum, so that, if a network is to be constructed in a household across plural rooms, it is necessary to provide a large number of nodes only for cable relaying.
Also, if it is desired to elongate the cable without modifying the system of a physical layer in the IEEE 1394 standard, the cable needs to be increased in diameter, thus lowering workability in cable laying for the network, while the cable itself is expensive.
It is therefore an object of the present invention to provide a method and apparatus for transmission of digital serial data in which the inter-node cable length in a digital serial data interface, in which a bus using correct arbitration performed prior to data transfer as in the case of the IEEE 1394 standard, is elongated to enable long-distance transmission.
According to the present invention, there is provided a data transmission apparatus sending and receiving data and control codes including an input/output port, data conversion means for converting data for transmission from a n-bit code to a m-bit code and for converting the received data from the m-bit code to the n-bit code, control signal converting means for converting a transmission control signal for acquisition of use right of a transmission channel connected to the input/output port into a control code composed of a m-bit code other than a m-bit code allocated to data and for converting the received m-bit code into the control signal, scrambling means for performing scrambling on the m-bit control code received from the control signal converting means for reducing unneeded radiations to output the scrambled control code to the input/output port, and descrambling means for descrambling the scrambled signals received via the input/output port to output descrambled signals to the control signal converting means.
According to the present invention, there is also provided a data transmission method including a sending data conversion step for converting data for transmission from a n-bit code to a m-bit code, a reception data converting step for converting the received data from the m-bit code to the n-bit code, a transmission control signal converting step for converting a transmission control signal for acquisition of use right of a transmission channel connected to the input/output port into a control code composed of a m-bit code other than a m-bit code allocated to data and for converting the received m-bit code into the control signal, a scrambling step for performing scrambling on the m-bit control code received from the transmission control signal converting step for reducing unneeded radiations to output the scrambled control code to an input/output port and a descrambling step for descrambling the scrambled signals received via the input/output port.

Digital data transfer apparatus and method


According to the present disclosure, it is possible to prevent particles from being generated and to improve substrate processing quality. A substrate processing apparatus includes cassette mounting unit on which process substrate cassette and dummy substrate cassette are mounted, the process substrate cassette being configured to accommodate a plurality of process substrates, and the dummy substrate cassette being configured to accommodate a plurality of dummy substrates, process chamber configured to process the process substrates and the dummy substrates, substrate support unit installed within the process chamber and provided with a plurality of substrate mounting portions where the process substrates and the dummy substrates are mounted, transfer unit configured to transfer the process substrates and the dummy substrates between the cassette mounting unit and the process chamber, and control unit configured to control substrate processing and to transfer processing of the process substrates and the dummy substrates.

In the related art, a substrate processing step for forming a thin film on a substrate has been performed as a step of a manufacturing process of a semiconductor device, e.g., a DRAM. The substrate processing step is performed by a substrate processing apparatus that includes a cassette mounting unit configured to mount a process substrate cassette for accommodating a plurality of process substrates therein and a dummy substrate cassette for accommodating a plurality of dummy substrates therein, a process chamber in which at least one of the process substrate or the dummy substrate is processed, a gas supply unit configured to supply a process gas into the process chamber, an exhaust unit configured to exhaust an inside of the process chamber, and a transfer unit configured to transfer the substrates between the cassette mounting unit and the process chamber.
In this case, a dummy substrate may be repeatedly reused in a subsequent substrate processing. That is, for example, when the substrate processing involving a film forming process is performed, residues are generated during the film forming process and form a deposited film. Each time the dummy substrate is reused, the deposited film is accumulated on the dummy substrate. Accordingly, in order to prevent film separation caused by an increase of a cumulative thickness of the deposited film or to prevent warp or deformation of the dummy substrate caused by a stress of the deposited film, the dummy substrate is replaced once the dummy substrate is used more than a predetermined number of use (e.g., use frequency) or if the thickness of the deposited film becomes greater than a predetermined value (e.g., cumulative thickness value). In a manufacturing line of a factory, if a cumulative thickness of a deposited film of at least one of dummy substrates accommodated in a dummy substrate cassette exceeds a predetermined cumulative thickness value, the entire dummy substrate cassette is replaced (e.g., all dummy substrates are either discarded or reused). Thus, it is advisable that the dummy substrates are used in such a way that each dummy substrate has the similar use frequency or the cumulative thickness. Accordingly, for example, the dummy substrates are selected and used based on the cumulative thickness value of the dummy substrates or the like so as to effectively use the whole dummy substrates accommodated in the dummy substrate cassette.
Sometimes, a management error may occur, e.g., an error of not timely replacing a dummy substrate cassette when the dummy substrate cassette needs to be replaced because a predetermined number of dummy substrates have a thickness greater than a predetermined cumulative thickness value. Due to the management error, the substrate processing may continuously be performed using the dummy substrates whose thickness exceeds a predetermined cumulative thickness value. In such a case, a film separation may be caused by an increase of a cumulative thickness value, and particles may be generated within a process chamber, thereby deteriorating a substrate processing quality.
Therefore, it is an objective of the present disclosure to provide a substrate processing apparatus, a semiconductor device manufacturing method and a substrate processing method, which can prevent the generation of particles and improve the quality of the substrate processing.

Substrate processing apparatus, semiconductor device manufacturing method, substrate processing method, and recording medium


The electric dust collector has an oblong holding unit provided on the air channel of an air conditioner or the like; a high-voltage applying device provided at an end of the holding unit; a front-open contact protector of substantially inverted U-shape that contains a high-voltage power feeding terminal connected to the high-voltage applying device; a filter unit attached to the holding unit; and a slide projection provided on the filter unit. The slide projection has a high-voltage power receiving terminal removably fitted into the contact protector, allowing the filter unit to be removably attached to the holding unit. The high-voltage power feeding terminal covered with the contact protector is free from dust collection. The structure can prevent contact failure or electrical leak.

Electric air purifiers arranged in air channels of conditioners are known.
A conventional electric air purifier disclosed in Japanese Patent Laid-Open Publication No. 2003-106552 will be described with reference to FIGS. 53 to 55. The air purifier includes holding frame 101, high-voltage power supply 102 provided at an end of holding frame 101, high-voltage terminal 103 and ground terminal 104 provided from high-voltage power supply 102, and removable filter body 106 having contact point 105 between high-voltage terminal 103 and ground terminal 104. Coil spring 107 or flat spring 108 is provided at least one of high-voltage terminal 103 and ground terminal 104. High-voltage power supply 102 is provided on holding frame 101 in a manner that each elastic tip of terminals 103 and 104 projects from partition wall 109 provided between high-voltage power supply 102 and a part through which filter body 106 is inserted.
Holding wall 110 provided at an end of holding frame 101 on the opposite side of high-voltage power supply 102 to hold filter body 106 fitted into holding frame 101. Filter body 106 is fixed between partition wall 109 and holding wall 110 in a manner that projection 111 provided on the side surface on the opposite side of contact point 105 has engagement with pit 112 provided on holding wall 110 of holding frame 101.
In the conventional air purifier, high-voltage terminal 103 connected to high-voltage power supply 102 easily collects dust, and the air purifier also has a part exposed from the structure.
Filter body 106 is, as described above, fixed between partition wall 109 and holding wall 110. When attached to or removed from the place, filter body 106 tends to have torsion due to the oblong shape, and therefore the installation work has often involved a difficulty.
Here will be described another electric dust collector having a synthetic resin-made holding frame, which is disclosed in Japanese Patent Unexamined Publication No. 2003-10731, with reference to FIGS. 56 to 58. Needle-shaped discharge electrode 1103 is provided on the side of water inlet 1102 of resin-made holding frame 1101, and then air-permeable ground electrode 1104 is provided so as to face discharge electrode 1103, furthermore, filter 1105 is located on the leeward side of ground electrode 1104. Filter unit 1106 is thus formed. When filter unit 1106 is mounted on the dust collector, high-voltage applying section 1107 applies negative high voltage to discharge electrode 1103, and ground electrode 1104 provides ground connection. Such formed high-voltage applying device 1108 is provided on the air channel in an air conditioner and the like.
In the conventional dust-collecting unit, holding frame 1101 is made of commonly used synthetic resin, which easily collects dust due to charged static electricity.
As another conventional electric dust-collecting unit, Japanese Patent Laid-Open Publication No. 2003-103196 discloses another electric dust collector. The dust collector includes, in addition to the device that applies high voltage to a dust collecting section, a sound-wave generator that enhances dust collection efficiency. The dust collector will be described with reference to FIG. 59. Dust-collecting unit 2101 contains housing 2102, discharge electrode 2103, counter-electrode 2104, and dust-collecting filter 2105. In addition, controller 2107 and switch 2108 are provided so that direct current power supply 2106 provided outside dust-collecting unit 2101 applies voltage to discharge electrode 2103 and counter-electrode 2104. Furthermore, the dust collector has sound-wave generator 2110 on side section 2109 of housing 2102, and sound-wave controller 2111 for controlling sound-wave generator 2110. With the structure above, sound wave is applied to a corona discharge area so as to enhance dust collection efficiency. Air flows in direction 2201.
In the conventional electric dust collector, direct current power supply 2106 for applying direct current to dust-collecting unit 2101, controller 2107, and switch 2108 are provided outside the dust collector. Sound-wave generator 2110 is provided on side section 2109 of housing 2102 of the dust-collecting unit and is controlled by sound-wave controller 2111. That is, direct current power supply 2106, controller 2107, switch 2108, sound-wave generator 2110, and sound-wave controller 2111 can suffer mutual noise interference. The installation of these components away from dust-collecting unit housing 2102 not only increases the wiring in length for connecting these components, but also complicates measures against dust collection on each component.
As still another electric dust collection unit, Japanese Patent No. 2856580 discloses an air purifier. Changing the shape of an elastic portion provided on a filter opens or closes a power circuit for a high-voltage power supply unit. The air purifier will be described with reference to FIGS. 60 and 61. The air purifier includes body 3102 having removable front panel 3101, removable pre-filter 3103 provided on body 3102, high-voltage ionizier 3104 for removing dust in the air passing through pre-filter 3103, elastic portion 3105 provided on pre-filter 3103, and detecting switch 3106 for detecting altered elastic portion 3105. Elastic portion 3105 provided at pre-filter 3103 bends by being pushed by front panel 3101 when pre-filter 3103 is mounted on body 3102. Detecting switch 3106 detects the deformation of elastic portion 3105. Detecting switch 3106 does not detect the deformation, a power supply to high-voltage ionizer 3104 is turned off.
In this conventional air purifier, elastic portion 3105 provided on pre-filter 3103 bends toward detecting switch 3106 by being pushed by front panel 3101 when front panel 3101 is fixed to the body. If front panel 3101, pre-filter 3103, and detecting switch 3106 have positional variations, detecting switch 3106 cannot be activated accurately.
Besides, exposed detecting switch 3106 easily collects dust, which can cause faulty connections.
As yet another electric dust-collecting unit, Japanese Patent Laid-Open Publication No. 2003-106552 discloses an electric air purifier for an air conditioner. The electric air purifier will be described with reference to FIG. 62. The air purifier includes holding frame 4101, high-voltage power supply 4102 provided at an end of holding frame 4101, high-voltage terminal 4103 and ground terminal 4104 provided from high-voltage power supply 4102, contact point 4105 of high-voltage terminal 4103 and ground terminal 4104, and filter body 4106 removably provided to holding frame 4101.
In this conventional electric air purifier, high-voltage power supply 4102 is provided on holding frame 4101, which is seen on the left side in the drawing, and filter body 4106 is fixed on the right side of high-voltage power supply 4102. Due to positional constraint in mounting on an air conditioner, high-voltage power supply 4102 cannot be provided on the right side of holding frame 4101.
High-voltage terminal 4103 and ground terminal 4104 are provided on only one side of the right and left sides of filter body 4106 to be mounted on holding frame 4101. Therefore, when filter body 4106 is removed from holding frame 4101, filter body 4106 tends to have torsion, due to resistance of high-voltage terminal 4103 and ground terminal 4104, so that the removing work has often involved a difficulty.

Matsushita Electric Industrial Co., Ltd.


A driver IC (integrated circuit) for a display device allowing simple designing and production and yet capable of obviating display quality difference is provided. The driver IC includes a plurality of drive signal output terminals arrange to have variable drive capacities which vary depending on loads of respective signal electrodes of the display device to which the output terminals are connected so as to supply the respective signal electrodes of the display device with drive signal waveforms having identical time constant. The driver IC preferably includes a number of juxtaposed transistors corresponding to but larger in number than the drive signal output terminals, wherein the respective drive signal output terminals are connected to prescribed numbers of transistors so as to have different drive capacities depending on loads of the signal electrodes of the display device to which the output terminals are connected.

The present invention relates to a display device driver IC (i.e., an integrated circuit for driving a display device) for applying drive signals to electrodes of a display device, and particularly a liquid crystal device driver IC having drive signal output terminals having improved drive performances.
Hitherto, for driving a liquid crystal device having electrodes arranged in a matrix form, a driver IC for supplying drive signals to the electrodes is designed to have a plurality of terminals having equal drive capacities.
Incidentally, the drive of a liquid crystal panel comprising matrix electrodes as an example of conventional liquid crystal device along a signal electrode (a scanning electrode or a data electrode) constituting the matrix electrodes is electrically equivalently represented by a ladder circuit as shown in FIG. 16. Now, if the resistance and capacitance per unit length of the matrix electrode or signal electrode are denoted by r and c, respectively, and the overall resistance and capacitance along the matrix electrode are denoted by R and C, respectively, a voltage waveform V appearing at a point B in response to a voltage input V0 applied to a point A of the ladder circuit is given as a solution of the following partial differential formula:                     ∂        2                  V              ∂              x        2              =      rc                                ∂                      V            0                                    ∂          t                    .
The solution is expressed as follows.                               V                      V            0                          =                  xe2x80x83                                              -                          xe2x80x83                                                  4              π                                                                    ∑                              n                =                0                            ∞                                                                                (                                          -                      1                                        )                                    n                                                                      2                                                              xe2x80x83                                                            π                                    +                  1                                                          exp                                            xe2x80x83                                                          (                                                      -                                                                  (                                                                              (                                                                                2                                                                n                                                            +                              1                                                        )                                                                                xe2x80x83                                                                                π                            /                            2                                                                          )                                            2                                                                                t                    /                    CR                                                  )                                                                            =                  xe2x80x83                                  1          -                      xe2x80x83                                                        4              π                                                  (                              (                                                      exp                                                              xe2x80x83                                                                                (                                              -                                                  xe2x80x83                                                                                π                              2                                                                                t                                                                                4                                                        CR                                                                                )                                                        -                                                            1                      3                                                            exp                                                              xe2x80x83                                                                                (                                              xe2x80x83                                                                                3                                                                                π                            2                                                                              t                                                                          4                                                    CR                                                                    )                                                        +                  …
The above formula provides plots of relative voltage V/V0 versus time (on a scale of time constant CR) as shown in FIG. 17.
Now, in a region of t greater than CR, the second term and so on can be negligible as sufficiently small, so that a time t0 in which voltage response reaches 90% of the input (V/V0=0.9) can be approximately represented by the following equation:       V          V      0        =      0.9    =          1      -              xe2x80x83                                    4          π                                  xe2x80x83                        exp                          xe2x80x83                                  (                      -                          xe2x80x83                                                                                π                  2                                                                  t                  0                                                            4                                CR                                              )
The above equation can be converted as follows:
0.1=(4/xcfx80)xc2x7exp(xe2x88x92xcfx802t0/4CR)
xcfx80/40=exp(xe2x88x92xcfx802t0/4CR).
By taking natural logarithm of both sides,
ln(xcfx80/40)=xe2x88x92xcfx802t0/4CR
t0=xe2x88x92(4/xcfx802)ln(xcfx80/40)xc2x7CR.
As
xe2x88x92(4/xcfx802)=ca. xe2x88x9241,
and
xe2x80x83ln(xcfx80/40)=ca. xe2x88x922.5,
the above equation is reduced to
t0=ca. CR.
Thus, a time t0 in which a voltage output at the remotest point rises up to 90% of the input voltage, i.e., a 0-90% time constant can be expressed by a product of the wiring resistance (R) and the capacitance (C).
The above calculation is based on an assumption that the drive capacity of a driver IC is infinitely large, but the drive capacity of an actual driver IC is limited, so that the time constant, i.e., a rise time, depends on the capacity.
A driver IC has an on-resistance which varies depending on operation points so that the drive capacity exhibits a non-linear characteristic. However, in order to obtain a time constant of drive waveform, the drive capacity is generally approximated as a linear characteristic based on a constant on-resistance Ron.
Accordingly, a 0-90% time constant t0-90 when a panel represented by the equivalent circuit shown in FIG. 16 is driven by a diver IC having an on-resistance Ron is calculated as follows.
t0-90=C(R+Ron).
Incidentally, a driver IC is designed to have an on-resistance Ron so that the 0-90% time constant t0-90 satisfies a required standard.
Conventionally, driver ICs 40 for driving a panel having matrix electrodes including data signal electrodes S and scanning signal electrodes C as shown in FIG. 18 have been designed to have equal on-resistances Ron at the respective drive signal output terminals. This is because loads determined by a combination of capacitances along data signal electrodes S or scanning signal electrodes C with wiring resistances are equal for the respective data signal electrodes and for the respective scanning signal electrodes.
Further, as the capacitances and wiring resistances of the data signal electrodes S and the scanning signal electrodes C, respectively, vary depending on pixel arrangements and sizes of respective panels, the driver ICs 40 have been designed and produced for each pixel having a different pixel arrangement.
On the other hand, in the case of a liquid crystal device including electrodes of different widths for realizing areal gradational display as shown in FIG. 19, electrodes S1 and S2 having different widths have mutually different capacitances and wiring resistances (and also electrodes C1 and C2 do).
Now, drive voltage responses are considered when such electrodes having different widths are supplied with drive signals from driver ICs 40 having equal capacities. For example, when a scanning electrode C1 of a narrower width having a capacitance CS and a resistance RS is driven by a driver IC 40 having an on-resistance Ron as shown in FIG. 20, the response at the remotest point from the IC 40 results in a waveform as shown in FIG. 21. On the other hand, when a scanning electrode of a broader width having a capacitance 4CS and a resistance RS/4 is driven by a driver IC 40 having also an on-resistance Ron as shown in FIG. 22, the response at the remotest point from the IC 40 results in a waveform as shown in FIG. 23.
The 0-90% time constant Ta0-90 and Tb0-90 in the drive waveforms shown in FIGS. 21 and 23, respectively, approximately calculated as follows:
Ta0-90=CSxc3x97(Ron+RS)=CSxc2x7Ron+CSxc2x7RS
Tb0-90=4CSxc3x97(Ron+RS/4)=4CSxc2x7Ron+CSxc2x7RS
∴Tbxe2x88x92Ta=3CSxc2x7Ron
Thus, the drive of a broader electrode C2 requires a response time (rise time or fall time) which is longer by 3CSxc2x7Ron than the drive of a narrower electrode C1.
As a result, the energies applied to the liquid crystal via a broader electrode and a narrower electrode can be different from each other, resulting in a substantial difference in picture display quality.
On the other hand, as picture display quality can also be degraded in the case where less energy is applied to a liquid crystal, the on-resistance of driver ICs for driving electrodes of different widths is set to be suitable for driving electrodes of broader widths. When using driver ICs having an on-resistance Ron suitable for a broader electrode, however, these driver ICs are liable to cause difficulties driving a narrower electrode, such as a larger current flow through the narrower electrodes resulting in fluctuation of power supply potential or ground potential for the liquid crystal device, occurrence of radiation noise, heat generation, and increase in current consumption.
Further, in designing and production of driver ICs, an additional area is required for output transistors and is liable to occupy the largest area on a chip, so that a larger semiconductor chip is required to incur a cost increase.
In order to obviate difficulties, such as a lowering in picture display quality, fluctuation of power supply potential or ground potential, occurrence of radiation noise, heat generation and an electric current consumption, the drive capacities of driver ICs have to be optimized, so that development of driver ICs has been effected for each panel size.
As a result, designing and development of a diversity of driver ICs have been required so as to comply with a diversity of display panels requiring special driver ICs exclusively designed and developed therefor, thus having incurred increases in period and cost for development.
In view of the above-mentioned problems of the prior art, a principal object of the present invention is to provide a display device driver IC allowing simple designing and development and yet capable of preventing an occurrence of fluctuation in display quality.
According to the present invention, there is provided a driver IC (integrated circuit) for supplying drive signals to a plurality of signal electrodes of a display device for driving the display device, wherein said driver IC comprises a plurality of drive signal output terminals having drive capacities which vary depending on loads of respective signal electrodes of the display device to which the output terminals are connected so as to supply the respective signal electrodes of the display device with drive signal waveforms having identical time constant.
According to another aspect of the present invention, there is provided a driver IC for supplying drive signals to a plurality of signal electrodes of a display device for driving the display device, wherein said driver IC comprises a plurality of drive signal output terminals arrange to have variable drive capacities which vary depending on loads of respective signal electrodes of the display device to which the output terminals are connected so as to supply the respective signal electrodes of the display device with drive signal waveforms having identical time constant.
Preferably, the driver IC are designed to include a number of juxtaposed transistors corresponding to but larger in number than the drive signal output terminals, and the respective drive signal output terminals are connected to prescribed numbers of transistors so as to have different drive capacities depending on loads of the signal electrodes of the display device to which the output terminals are connected.
These and other objects, features and advantages of the present invention will become more apparent upon a consideration of the following description of the preferred embodiments of the present invention taken in conjunction with the accompanying drawings.


An electronic money holding device has a first storage unit for storing a uniquely assigned identification number and an amount of held electronic money, a processor for controlling the reference to and the updating of the amount of held electronic money and the transfer of electronic money between the electronic money holding device and another electronic money holding device, and a second storage unit for storing information of service providers concluding sales contracts with a possessor of the electronic money holding device and payment information of each sales contract.

1. Field of the Invention
The present invention relates to an electronic money holding system, and more particularly to an electronic money holding device which makes it possible to automatically perform a payment having an amount payable and a due date both known from a contract beforehand, and an electronic money automatic payment method which uses such a device.
2. Description of the Related Art
As a method in which a so-called xe2x80x9celectronic moneyxe2x80x9d is held in an IC chip on an IC card and is transferred through a network, there is known a method based on MONDEX money as disclosed by, for example, xe2x80x9cShukan Diamond (combined number in the New Year of Heisei 8)xe2x80x9d published on Jan. 1996.
In this conventional payment method using the IC card, the IC card is set into a dedicated reader/writer (or IC card reader/writer). Thereafter, for example, a payer manually operates a dedicated telephone or a personal computer (PC).
On the other hand, as a method in which an amount of money prescribed by a contract is paid to a service provider on a date prescribed by the same contract, there is a method for an automatic transfer through a bank account. This payment by automatic transfer through a bank account is realized by an accounting system which manages a ledger database and processes a payment transaction. In the accounting system, the process is performed in accordance with the same procedure irrespective of the amount of money to be paid.
In the payment by automatic transfer through a bank account, the automatic transfer is set or released by the accounting system in accordance with an instruction from a payee. The accounting system is concentrically managed at a computer center.
The above-mentioned prior art is based on, for example, the manual operation of a dedicated telephone or a personal computer by a payer. Therefore, for example, the payment of a premium involves a problem that the payer has to perform a manual operation similarly each time, notwithstanding that an amount payable and a due date are known from a contract beforehand.
An object of the present invention made in light of the above circumstances is to solve the above problem in the prior art as mentioned above, thereby realizing a system which makes it possible to automatically perform a payment having an amount payable and a due date both known from a contract beforehand.
More particularly, the object of the present invention is to provide an electronic money automatic payment method which makes it possible to automatically perform a payment having an amount payable and a due date both known from a contract beforehand, thereby reducing the complexity of payment, and surely performing the payment and the present invention further relates to an electronic money holding device which is suitable for the use in such a method.
The present invention provides an electronic money holding device comprising first storage means for storing an identification number of a personal electronic money holding device and the balance of electronic money held therein. A central processing unit has a procedure for performing the reference to and the updating of said balance of electronic money, and a procedure for controlling the transfer of electronic money between said the personal electronic money holding device and another electronic money holding device, in which there is provided second storage means for storing information for each of one or more contracts concluded between a service provider and a payer of a counter value for a provided service (or a service buyer). The stored information includes an amount payable from the service buyer to the service provider, a due date for payment of that amount, an identification number of an electronic money holding device of the service provider, and information for making access to an electronic money holding device of the service buyer in a network to which the electronic money holding device of the service provider and the electronic money holding device of the service buyer are connected.
Also, the present invention provides an electronic money payment method for performing the payment from the service buyer to the service provider by use of the above-mentioned electronic money holding device. Such method comprises a step of acquiring a date, a step of reading the amount payable from the service buyer to the service provider and the due date prescribed by the contract from the second storage means of the above-mentioned electronic money holding device, and a step of remitting, in the case where the acquired date is the read due date, electronic money from the service buyer to the service provider.
Further, the present invention provides a method and a device for writing information into the second storage means of the above-mentioned electronic money holding device.

Electronic money holding device and electronic money automatic payment method


A lightweight and compact plasma cutting system includes a power source having an inverter and a non-adjustable regulator enclosed within the power source. The inverter is configured to generate a power signal suitable for a plasma arc process and the non-adjustable regulator is preconfigured to deliver a fixed gas flow to a plasma torch for the plasma arc process.

The present invention relates generally to plasma cutting systems and, more particularly, to an inverter powered plasma cutting system with automatic gas flow control.
Plasma cutting is a process in which an electric arc and plasma gas are used to cut or gouge a workpiece. Plasma cutters typically include a power source, a gas supply, such as compressed air, and a torch. The torch is constructed to create and maintain the plasma arc. To generate the plasma cutting power, a power source receives an input voltage from a transmission power receptacle or generator and provides output power to a pair of output terminals. One of the output terminals is connected to an electrode and the other is connected to the workpiece. An air supply is used with most plasma cutters to carry and propel the arc to the workpiece and assist in cooling the torch.
Prior to operation of the plasma cutting system, an operator must manually set a regulator of the air flow system such that a desired air flow is provided during operation of the plasma cutting system. The air flow is set by the operator to correlate with the intended plasma cutting process. That is, the rate of air flow delivered to the plasma torch during a plasma arc process varies depending on the type of plasma processing. For example, the air flow required for plasma cutting may differ from that needed for plasma gouging. Although such in-field adjustment of the air flow provides an operator with more precision control of the air flow rate, such a construction is not without its drawbacks.
Operator control of the air flow invariably presents the opportunity for improper setting of the air flow control, especially by inexperienced operators. For example, in a dynamic work environment, an operator may be required to perform gouging and cutting operations in a relatively continuous manner. It may not be practical for the operator to sequentially perform all of the desired cutting processes and then all of the desired gouging process, or vice verse. The operator may be required to sequentially mix a plurality of cutting processes and a plurality of gouging processes. Suspending one process to reconfigure the power source for another process is time consuming and results in overall process inefficiency. In addition to configuring the air flow for the intended process, the operator must also configure the power source to deliver a desired power signal suitable for the intended process.
In addition to the inefficiency associated with the repetitive reconfiguring of the power source to deliver the appropriate power signal/air flow as dictated by the intended plasma process, the means for allowing operator control of the air flow complicates power source construction and expense. Generally, an adjustable air flow control must be made readily accessible to the operator. This is frequently achieved by passing a control dial of a regulator through an opening formed in the housing. Not only does the operator variable flow control occupy space in the interior of the power source thereby increasing the overall size of the plasma cutting device, the control must be placed on the front panel, thereby further limiting the internal configuration options. Alternatively, the such regulators have been located external to the power source. Obviously, there are drawbacks to these systems such as enabling the possibility of unregulated air to the power source if the regulator is bypassed, and simply requiring one more apparatus to the overall system.
In conjunction with the operator variable flow control, a gauge is also required to provide the operator with feedback as to the air flow setting. The pressure gauge must also be fluidly connected to the gas system and also requires another opening formed preferably in the front panel of the power source.
Further complicating construction of the plasma arc power sources, the gas must be allowed to flow without plasma arc power to allow the operator to accurately set the adjustable gas flow. Such operation requires that the power source have an operating mode wherein the plasma forming gas is allowed to flow but the power supply is disabled thereby preventing inadvertent formation of a plasma arc when the operator is setting the desired plasma gas flow. Providing such an operating mode further complicates the construction of the power source and increases the complexity of the device and the operation thereof.
It would, therefore, be desirable to design a plasma cutting system with simplified construction, operation, and control of the gas system.

inverter powered plasma cutting system with fixed gas flow control


The present invention relates to semiconductor devices, including multi-chip semiconductor devices, and methods of coupling semiconductor devices. In a particular embodiment, the semiconductor device is a multi-chip semiconductor that comprises a first semiconductor device and a second semiconductor device. The first semiconductor device has a first surface. The first surface contains a first ridge alignment member and a second ridge alignment member, the first and second ridge alignment members forming a receiving area between the first and second ridge alignment members. The second semiconductor device has a second surface, the second surface containing a third ridge alignment member, the second semiconductor device positioned such that at least a portion of the third ridge alignment member is located within the receiving area of the first semiconductor device.

1. Field of the Invention
The present invention relates to semiconductor devices, including multi-chip semiconductor devices, and a method of coupling semiconductor devices.
2. Description of the Related Art
For integrated circuits (IC), there is a need for additional input, output, and power connections. More specifically, where two semiconductor devices are positioned face to face with the I/O pads on the two devices aligned in the x and y directions and as near as possible in the z direction, a technical problem arises when aligning the two devices constructed using typical IC planar fabrication techniques so that critical features (the I/O signal and power pads) of the two chips are in proximity to each other. It is desirable for the alignment to be reliable, inexpensive, and accurate. In addition, the alignment should be maintainable during long-term operation. Improved accuracy in the pad alignment and reduced pad separation in the z direction would allow for a reduction in the size and pitch of pads and an increase in the total number of chip pads. Accordingly, there is a need for an improved multi-chip semiconductor device and method of coupling semiconductors.
The present invention relates to semiconductor devices, including multi-chip semiconductor devices, and methods of coupling semiconductor devices. In a particular embodiment, the semiconductor device is a multi-chip semiconductor that comprises a first semiconductor device and a second semiconductor device. The first semiconductor device has a first surface. The first surface contains a first ridge alignment member and a second ridge alignment member, the first and second ridge alignment members forming a receiving area between the first and second ridge alignment members. The second semiconductor device has a second surface, the second surface containing a third ridge alignment member, the second semiconductor device positioned such that at least a portion of the third ridge alignment member is located within the receiving area of the first semiconductor device.
In another embodiment, the multi-chip semiconductor device comprises a first semiconductor device, a second semiconductor device, and a third semiconductor device. The first semiconductor device has a first surface, the first surface containing a first plurality of pads, the first surface forming a first alignment pattern. The second semiconductor device has a second surface, the second surface containing a second plurality of pads and forming a second alignment pattern. The third semiconductor device has a third surface forming a third alignment pattern. The third alignment pattern complements the first and second alignment patterns of the first and second semiconductor devices.
In another embodiment, a method of coupling a first semiconductor device and a second semiconductor device is described. The method comprises providing the first and the second semiconductor device, the first semiconductor device including a first patterned surface, the first patterned surface supporting a first plurality of circuit pads, the second semiconductor device including a second patterned surface, the second patterned surface supporting a second plurality of circuit pads; aligning the second semiconductor device with respect to the first semiconductor device such that the first patterned surface opposes the second patterned surface, wherein the first patterned surface is substantially parallel to the second patterned surface and the first patterned surface is oriented such that the first plurality of circuit pads are proximate to corresponding pads of the second plurality of circuit pads; and positioning the second semiconductor device and the first semiconductor device closer together such that the first plurality of circuit pads are capacitively coupled to the second plurality of circuit pads.
In another embodiment, the multi-chip semiconductor device comprises a first semiconductor device having a first surface, the first surface containing a first alignment region on a portion of the first surface, the first alignment region including a first ridge alignment member and a second ridge alignment member, the first and second ridge alignment members forming a receiving area between the first and second ridge alignment members; and a second semiconductor device having a second surface, the second surface containing a second alignment region on a portion of the second surface, the second alignment region including a third ridge alignment member, the second semiconductor device positioned such that the second alignment region opposes the first alignment region and such that at least a portion of the third ridge alignment member is located within the receiving area of the first semiconductor device.
In another embodiment, the semiconductor device comprises an integrated circuit device having a first surface supporting a plurality of pad elements and a plurality of circuit elements, the first surface containing a first ridge alignment member and a second ridge alignment member, the first and second ridge alignment members forming a receiving area between the first and second ridge alignment members, the receiving area formed to receive a third alignment member of a second integrated circuit device when the second integrated circuit device opposes and is substantially aligned with the integrated circuit device.

Method of coupling and aligning semiconductor devices including multi-chip semiconductor devices


A method for a geometry of a lateral comb drive for an in-plane, electrostatic force feedback, closed-loop, micromachined accelerometer or closed-loop Coriolis rate gyroscope device, or closed-loop capacitive pressure or force measuring device. When vibration is applied to the device, the error in the time-average output, which is vibration rectification error, due to this input vibration is minimized or eliminated. The geometry resulting from practice of the present invention is space-efficient because drive force is maximized while vibration rectification is minimized or eliminated.

Microelectromechanical system (MEMS) capacitive electrostatic comb-drive, closed-loop, in-plane, micromachined, capacitive pick-off accelerometer devices, closed-loop Coriolis rate gyroscope devices, and closed-loop capacitive pressure and force measuring devices are generally well-known. In particular, silicon-based, micromachined accelerometers are displacing accelerometers of more mature architectures in current applications, and are creating new markets where the advantages of small size and low cost are enabling qualities. One critical area of performance that poses a major challenge for MEMS capacitive accelerometers is vibration rectification. Vibration rectification is the change in the time-average accelerometer output due to input vibration. Vibration rectification manifests as an apparent change in the DC acceleration when none is being experienced.
Current MEMS capacitive accelerometers, Coriolis rate gyroscope devices, and closed-loop capacitive force measuring devices have very poor vibration rectification performance. For example, an input vibration of 10 Grms along the input axis of a known electrostatic comb-drive MEMS capacitive pick-off accelerometer is able to change the average output by as much as 0.1 g's. This large vibration rectification makes these accelerometers unsuitable for current tactical and navigation-grade applications.
In a closed-loop capacitive pick-off accelerometer, rectification error is driven by several sources. For example, rebalance force is not linear relative to the voltage applied to the electrostatic comb-drive. The rebalancing force is proportional to the square of the applied voltage difference between sets of interacting moveable and fixed comb teeth. There are several well-known ways to accomplish linearization of the applied voltage. For example, a square root function can be placed in the feedback loop. The various methods of linearizing this relationship, however, are not relevant to the present invention.
Scale factor may have asymmetry in a closed-loop capacitive pick-off accelerometer. That is, the scale factor in the positive input direction may not equal the scale factor in the negative direction. The scale factors in the two directions must match to avoid rectification. This is also well-known, can be corrected for, but is not relevant to the present invention.
A third source of rectification in a closed-loop capacitive pick-off accelerometer is a dependence of rebalance force on proof mass position. In current art, closed-loop MEMS capacitive pick-off accelerometers with electrostatic feedback use one of two configuration options.
FIG. 1 illustrates a parallel-plate drive configuration which is widely utilized in the prior art. A closed-loop capacitive pick-off accelerometer 1 of the prior art utilizes a series of parallel plate pairs 3. In each pair 3, one tooth 5 is fixed relative to a supporting frame 7, and the other tooth 9 is movable and part of a movably suspended proof mass 11. With in-plane proof mass motion, a gap 13 between the two plates 5, 9 varies, as indicated by the arrow. For a given voltage differential across the two plates 5, 9, the force is proportional to 1/gap2, and so is highly nonlinear with the proof mass motion that results from vibration. Because of this relationship, for a constant applied voltage, vibration raises the time-average force and a rectification error results. This parallel plate drive configuration provides a large nominal force, but very poor rectification performance.
FIG. 2 illustrates a lateral comb drive configuration which is also known in the prior art. The lateral comb drive concept is taken from non-accelerometer applications where a constant force is desired that is independent of the comb engagement or overlap. In a lateral comb drive device 15, a "constant" force drive is achieved by making both the overlap 17 of the fixed and movable comb teeth 19, 21 and the end-gap 23, 25 between the movable teeth 19 and the fixed frame 27 and between the fixed teeth 21 and the movable proof mass 29, large relative to both the tooth side spacing 31 and the allowed relative lateral motion 33. In applications where space is not at a premium, and only a low-g operating range is required, the lateral comb drive maybe an acceptable solution to the vibration rectification problem in MEMS closed-loop accelerometers. However, lateral drives of this type consume a large amount of space, add mass, and do not provide a large nominal force. Therefore, if low rectification is desired, force must be sacrificed. These lateral comb drives also result in a relatively large nominal capacitance between the sets of fixed and movable comb teeth 19, 21, which is potentially undesirable from an electronics viewpoint. For these reasons, this method is rarely used.
A fourth source of rectification is a force that a damping fluid exerts on the proof mass during vibration. Typically, MEMS accelerometers rely on gas damping to achieve acceptable dynamic performance. Gas-spring damping effects, however, often produce a non-zero time average force on the proof mass as it travels through a cycle of vibration. Many variables affect this rectification error which is a function of the detailed geometry of the damping gaps, the gas type, pressure and temperature, and the magnitude and frequency of the input vibration. The result is a highly complex fluid dynamics problem. Furthermore, the magnitude of this rectification error is potentially extremely large.
Therefore, devices and methods for overcoming these and other limitations of typical state of the art MEMS accelerometers are desirable.

Low vibration rectification in a closed-loop, in-plane MEMS device


A knee prosthesis includes a femoral prosthetic part which forms a pair of condylar gliding surfaces, a tibial part that has tibial gliding surfaces cooperating with the condylar gliding surfaces and a coupling part that connects the femoral and tibial parts so that they can rotate about a rotational axis that is approximately parallel to the axis of the tibia. If the femoral and tibial parts have the same anteroposterior alignment, an applied load is borne by a central region of the tibial gliding surfaces. The tibial gliding surface slopes upwardly relative to the prosthesis both in front of and behind the central region of the tibial gliding surface so that when the femoral and tibial parts rotate against one another, each of the condylar gliding surfaces remains in contact with its corresponding tibial gliding surface.

To replace the human knee joint, prosthesis types are used whose femoral and tibial parts, depending on the state of preservation of the ligament apparatus, are guided relative to one another with a greater or lesser degree of constraint. This concerns the main degrees of freedom of movement of the knee, namely the flexion movement about a transverse axis, the rotation movement about a rotation axis running approximately parallel to the direction of the tibia, and a translation movement in the anteroposterior direction. The least degree of mutual constrained guidance is to be found in what are called uncoupled prostheses, which are made up simply of a pair of femoral condyles and of a tibial sliding surface. They are used in cases where the ligament apparatus is well preserved. The other extreme is constituted by hinge prostheses, which are used in cases of poorly preserved ligament apparatus and which restrict the possible movements of the knee to the flexion movement (EP-A-42 04 60, DE-OS-29 01 009). Between these extremes there are varying degrees of partially coupled systems comprising, between the femoral part and the tibial part, an intermediate part which, by forming a rotation bearing, takes over the guidance functions for the rotation movement.
Among the partially coupled prostheses which permit a rotation movement, two types are to be distinguished. In the first type, the entire load is transmitted via the intermediate joint component which, in relation to the tibial part, forms a rotation bearing, and, in relation to the femoral part, forms a flexion hinge joint (DE-C-26 60 623). Since in this case the condylar sliding surfaces are intended only for a flexion movement, they can be designed congruent with the opposite surfaces. The opposite surfaces are therefore made concave with the same radius of curvature. The second type of partially coupled prostheses transmits the load not via the intermediate joint component, but directly from the condylar sliding surfaces to tibial sliding surfaces cooperating with these (EP-A-174 531). In this case, not only does a flexion movement take place between the condylar sliding surfaces and the tibial sliding surfaces, but also the rotation movement. For this reason, the tibial sliding surfaces should not be made congruent with the condylar sliding surfaces. If they are to permit a free rotation movement, the tibial sliding surfaces have to be flat. In general, however, they are allowed to slope slightly upward in front of the area in which they cooperate with the condylar surfaces when the femoral part and the tibial part have the same anteroposterior alignment (area of normal contact). This has the effect that, in the event of rotation, the condylar sliding surface displaced forward in relation to the tibial sliding surface during the rotation is lifted. This generates, under the load transmitted from the joint, a restoring torque which ensures that the prosthesis parts, as soon as is possible, return to their normal position of having the same anteroposterior alignment. During the rotation relative to the tibial part and the thereby obtained lifting of the femoral part, the rearwardly migrating condylar surface loses its contact with the tibial sliding surface. The entire load then has to be transmitted on the other side, which leads not just to increased wear, but also to an undesired bending moment in the area of the rotation bearing. It is from this prior art that the invention starts out.
In a known publication (DE-A-41 02 509), a partially coupled prosthesis is discussed in which both the flexion movement and also the rotation movement takes place between the femoral and tibial sliding surfaces. The femoral sliding surfaces are rounded convexly in the sagittal and frontal plane. From the view of the tibial sliding surfaces, it can be concluded that they are identical to and complement the shape of the femoral sliding surfaces. This permits a rotation movement of the knee components relative to one another about the flexion axis, but provides high resistance to a rotation moment about the axis parallel to the direction of the tibia. The known prosthesis is therefore not suitable for such a rotation movement. Were such a rotation to take place, however, the femoral sliding surfaces would spring out of the tibial slide depressions and there would no longer be any stability of the prosthesis against further rotation. In addition, the femoral sliding surfaces would lie only on the edges of the tibial slide depressions and deform these under load. The publication provides no information on how the sliding surfaces have to be configured so that they ensure both the possibility of rotation and also stability upon rotation and so that, in the event of rotation, force can be transmitted in a way that does not damage the prosthesis.


A limousine funeral coach 10 is provided with an extended chassis 12. The extended chassis 12 is provided to accommodate a motor compartment 44 and a driver's compartment 50 behind the motor compartment 50. A seat 56 for a driver and a plurality of passengers thereon is provided in the drivers compartment. A passenger compartment 60 is located behind the driver's compartment 50 having a first seat 62 for seating a first plurality of passengers and a second seat 64 for seating a second plurality of passengers thereon. The second seat 64 is aligned and spaced from the first seat 62 so that the passengers in the seat 62 will face the passengers in the seat 64 when seated on the seats. A storage compartment 70 is also provided directly behind the passenger compartment 60. The storage compartment 70 which is provided for carrying flowers in a front portion thereof and a casket containing the remains of the deceased in other portions thereof occupies a space on the chassis substantially equal to the space occupied by both the driver and passenger compartments 50 and 60 respectively. Side access doors 58 and 66 are provided for the driver and passenger compartments 50 and 60, respectively to allow passenger access. Side access doors 78 are provided, allowing for access to the front 80 of the storage compartment 70. A rear access door 86 is provided so that the casket containing the remains of the deceased can be put in and taken out of the funeral coach 10 as desired.

Attempts have been made to provide funeral vehicles that provide transportation for the remains of the deceased and passengers. One such vehicle is disclosed in U.S. Pat. No. 4,537,438. This vehicle is provided with a funeral passenger compartment on one side and an axially extending storage compartment on its other side. This vehicle although it transports passengers as well as the deceased is more of a truck or van like vehicle rather than a funeral coach such as those currently used to transport the deceased remains. Accordingly a funeral coach along the lines of the modern day limousine like vehicle which also has the capacity to transport a predetermined number of passengers as well as the deceased remains is needed.


An apparatus for reading from or writing to holographic storage media, and more specifically a common aperture type apparatus for reading from or writing to holographic storage media with multiple reference beams having a reduced noise. In a common aperture type apparatus for reading from or writing to a holographic storage medium using shift-multiplexing, with a coaxial arrangement of two or more reference beams and an object beam or a reconstructed object beam, the reference beams being arranged around the object beam or the reconstructed object beam in a storage layer of the holographic storage medium. Each of the reference beams is located essentially halfway between two adjacent central peaks of shift-multiplexed holograms.

In holographic data storage digital data are stored by recording the interference pattern produced by the superposition of two coherent laser beams, where one beam, the so-called 'object beam', is modulated by a spatial light modulator and carries the information to be recorded. The second beam serves as a reference beam. The interference pattern leads to modifications of specific properties of the storage material, which depend on the local intensity of the interference pattern. Reading of a recorded hologram is performed by illuminating the hologram with the reference beam using the same conditions as during recording. This results in the reconstruction of the recorded object beam.
One advantage of holographic data storage is an increased data capacity. Contrary to conventional optical storage media, the volume of the holographic storage medium is used for storing information, not just a few layers. One further advantage of holographic data storage is the possibility to store multiple data in the same volume, e.g. by changing the angle between the two beams or by using shift multiplexing, etc. Furthermore, instead of storing single bits, data are stored as data pages. Typically a data page consists of a matrix of light-dark-patterns, i.e. a two dimensional binary array or an array of grey values, which code multiple bits. This allows to achieve increased data rates in addition to the increased storage density. The data page is imprinted onto the object beam by the spatial light modulator (SLM) and detected with a detector array.
In WO2006/003077 a 12f reflection type coaxial holographic storage system with three confocally arranged Fourier planes is shown. In this arrangement the object beam and the reference beams are coupled in and out at the first and third Fourier planes, respectively. The reference beams are small spots in these planes. More precisely, they form diffraction patterns, similar to the Airy pattern. This arrangement is a so-called common aperture arrangement, because at the object plane and the image plane the object beam and the reference beams fill out the same area of the aperture. The beams fill out the entire aperture of the objectives. The disclosed arrangement allows to apply shift multiplexing, reference scanning multiplexing, phase coded multiplexing, or a combination of these multiplexing schemes. The reference beams are a pair (or pairs of) half cone shaped beams. The tips of the pair or pairs of half cone shaped reference beams form two lines along a diameter at the Fourier planes of the object beam.
In EP1918914 a holographic storage system using multiple reference beams has been proposed. Two or more spherical reference beams are arranged equally around of the low pass filtered Fourier plane of the spatial light modulator. The reference beams are spots, or more precisely Airy distributions, at the Fourier plane. In the storage material the reference beams act as cones with parallel axes, shifted relative to each other by the diameter of the Fourier filter. In order to avoid phase conjugated read out in reflection type arrangements half-cone reference beams are used instead of full cones.
Holographic storage systems suffer from a plurality of different noise sources. The main sources are the inter-pixel and inter-hologram cross talk, material scattering, detector noise, vibration and other environmental disturbances, servo misalignments, etc. In order to achieve a high data density and high data rates it is necessary to eliminate as many noise sources as possible.

Common aperture holographic storage system with reduced noise


A control system operates a power train of a work vehicle. The system includes a transmission arrangement which transfers power from an engine to an output shaft of the vehicle to drive the vehicle in a first or second direction according to at least one forward or reverse modes. The arrangement includes a forward directional clutch and a reverse directional clutch, and a controller. The controller is configured to determine if one of the clutches is engaged; evaluate a speed of the engine; and provide a torque command to engage the other of the clutches to slow the speed of the engine when a shuttle shift is initiated, or when the speed of the engine exceeds a predetermined speed threshold.

In a common mode of operation referred to as a shuttle shift, the direction of movement of the work vehicle is changed, often under load, a common example of which being when a tractor loader moves in one direction to pick or scoop up a load, then lifts the load and reverses direction, often involving a turning movement, and unloads the load. This sequence is then reversed, and is often repeated many times. As the transmission slows to implement the shuttle shift, excess energy in the form of negative torque may be applied to the engine. A similar situation may occur when the vehicle is travelling down an incline in that, although gravity is urging the vehicle to speed up, drive strategies may attempt to maintain a particular speed, thereby resulting in the transmission applying a negative torque and further resulting in excess energy at the engine. During shuttle shifts and other such dynamic events, it is desirable to dissipate any excess energy within the vehicle or power train, and it is desirable to perform this function in an efficient manner with respect to cost and energy.

Transmission clutch braking control system


Growth of multilayer films is carried out in a manner which allows close control of the strain in the grown layers and complete release of the grown films to allow mounting of the released multilayer structures on selected substrates. A layer of material, such as silicon-germanium, is grown onto a template layer, such as silicon, of a substrate having a sacrificial layer on which the template layer is formed. The grown layer has a lattice mismatch with the template layer so that it is strained as deposited. A top layer of crystalline material, such as silicon, is grown on the alloy layer to form a multilayer structure with the grown layer and the template layer. The sacrificial layer is preferentially etched away to release the multilayer structure from the sacrificial layer, relaxing the grown layer and straining the crystalline layers interfaced with it.

Controlling the strain and the number and type of defects in heteroepitaxial semiconductor structures is crucial for obtaining high-quality semiconductor materials with the desired properties for forming high-performance devices. In the silicon/silicon-germanium hetero-system, appropriate control of the strain in the semiconductor layers provides control over band offsets and carrier mobility. Typically, it is desirable to be able to obtain a strain-relaxed SiGe virtual substrate on which a thin strained Si film is formed. The main obstacle to obtaining high-quality strained silicon is initially in obtaining a perfect strain-relaxed SiGe film. The typical approach for relaxing a SiGe film is to grow thick strain-graded SiGe on bulk silicon substrates. In such structures, relaxation occurs by the movement of dislocations through the SiGe film. Misfit dislocations at the interfaces between the layers relax the strain in the strained layers. The difficulty with dislocation-driven relaxation is that every misfit dislocation has two threading arms associated with the dislocation. The threading arms extend through the entire film system, including the strained-Si layer, degrading the carrier mobility. The density of dislocations in a carefully engineering graded SiGe substrate is low enough to create strained-Si devices, but it would nonetheless be preferable to be able to provide a SiGe substrate with no or very few dislocations. A further limitation with the use of graded SiGe substrates is that to achieve few dislocations in the Si layer, it is necessary to grow very thick graded SiGe films. However, the relatively thick films make it difficult to have adjacent devices that are in different strain states. Another consequence of growing a relaxed buffer layer is that the relaxation process generates steps through the opening of dislocation loops on the surface. These steps have a tendency to bunch together, creating a rough growth front. A polishing and cleaning step must be carried out before growing the silicon layer, adding cost to the processing. Thermal conductivity is also poor through the graded layers.
In one approach to overcoming the limitations of dislocation-based relaxation, compliant substrates have been proposed as a way to achieve strain control with no dislocations. A compliant substrate is composed of a very thin strained-layer system supported by a thick rigid substrate. The strained system is intended to distribute the strain based on thicknesses of the different layers by sliding on a compliant substrate. In a compliant system, all of the layers would have the same in-plane lattice constant but would be in different strain states. The problem with the compliant-substrate approach is that it is very difficult to achieve a truly compliant substrate, since doing so requires a large-scale slipping between the strained system and the compliant layer.
Another approach to obtaining the effect of a highly compliant substrate is to form patterned mesas that are undercut to leave each mesa supported by a center pedestal. The mesas can then act as free-standing substrates for SiGe growth. P. N. Mooney, et al; "Elastic Strain Relaxation in Free-Standing SiGe Structures," Applied Physics Letters, Vol. 84, No. 7, 16 Feb. 2004, pp. 1093–1095. The supported mesas formed in this manner are fixed in location and are limited in the surface area available for device formation.

Fabrication of strained heterojunction structures


A method for stimulating production from wells drilled into natural gas reservoirs characterized by lenticular deposits. The reservoir thickness through which the wells are drilled is divided into multi-stage zones that are further divided into single-stage zones. Each single-stage zone is perforated and then fractured. The fracturing is conducted in multiple stages to sequentially fracture each of the single-stage zones within a multi-stage zone; the fracturing stages being separated by ball sealers. Well spacing may also be controlled to match fracture drainage and size of the lenticular deposits.

Hydraulic fracturing is a well-known technique for stimulating production from subterranean hydrocarbon-bearing formations. In a typical operation, an interval of a wellbore adjacent to a formation is perforated and fracturing fluid is pumped into the formation at a pressure sufficient to fracture the formation both laterally, away from the wellbore, and vertically, along the length of the wellbore. Propping agents such as sand or bauxite are usually mixed in with the fracturing fluid in order to enter the fractures and maintain them open once the pressure is reduced. This treatment enhances the productivity of the formation and thereby increases hydrocarbon production rates.
Hydraulic fracturing has been successfully employed in many types of hydrocarbon formations, particularly low permeability reservoirs which require stimulation to accelerate production to flow rates which make the reservoir economic to develop. Occasionally, conventional fracturing techniques have to be modified to stimulate a reservoir. For example, some reservoirs have many hydrocarbon bearing formations that are vertically stacked along the length of the wellbore and which are separated by essentially impermeable, non-hydrocarbon bearing formations. Techniques have been developed which permit successive fracturing of each of the formations. Temporary means are used to seal off the perforations adjacent to one formation that has been fractured while a subsequent fracture treatment is conducted at a different depth in the same formation or in another formation. Mechanical devices such as bridge plugs and packers have been used to separate treatment zones, and more recently, multi-zone fracturing using inexpensive ball sealers has been employed.
Although hydraulic fracturing technology has progressed to where many low permeability hydrocarbon formations can be economically produced, there are certain types of natural gas reservoirs which continue to defy economic fracturing exploitation; specifically, reservoirs which are characterized by discontinuous lenticular gas-bearing sand deposits of limited areal extent. These lenticular sands are also frequently "tight" which means they are characterized by low or very low permeability. Prime examples of such tight gas reservoirs are the various basins in the Rocky Mountain region of the western United States (Greater Green River, Piceance, Wind River and Uinta) which contain numerous lenticular, tight gas sandstones within thick formations. These four basins have been judged to be the largest undeveloped gas resource in the United States, containing as much as 227 trillion cubic meters (8,000 TCF) of recoverable gas. These enormous gas reserves remain substantially undeveloped because no economic method for developing these reserves has heretofore been developed.
Much attention has been directed at fracturing techniques for developing formations having tight, lenticular gas deposits. Because of the enormous reserve base of potentially recoverable gas, a significant amount of research has been performed by the U.S. Department of Energy, government and private research laboratories, universities and the private sector in an attempt to develop fracturing technology to economically exploit lenticular formations. To date, these efforts have been largely unsuccessful.
The approach initially attempted to access tight lenticular formations was nuclear stimulation. Under this program nuclear explosive devices were detonated within large diameter wellbores to generate a large zone of dendritic fractures in the zone surrounding the detonation. The largest such experiment was the nuclear detonation in a lenticular gas formation near Rio Blanco, Colo., equivalent to 90 kilotons of dynamite. In addition to the obvious environmental, health and safety concerns associated with nuclear stimulation, such experiments were not successful in releasing significant volumes of gas reserves. The lack of control over the explosive fracturing and the subsequent closure of the dendritic fractures caused the nuclear stimulation projects to fall far short of expected gas stimulation results.
In the early 1970's the next approach chosen to stimulate tight gas lenticular formations was a new process, termed massive hydraulic fracturing (MHF), which envisioned creating very long fractures up to 1.6 kilometers (one mile) or more in length using very large volumes of fracturing fluid and proppant. Under the sponsorship of the Department of Energy, a joint industry consortium tested MHF treatments in the Rio Blanco region. To illustrate this project, one fracture treatment injected 398,250 kg (878,000 lbs) of sand proppant into one 28 m (91 ft) section of the formation during an MHF experiment. Even though this MHF generated a dynamic fracture length of about 564 m (1,850 ft) and a propped fracture length of about 267 m (875 ft), the resulting stimulated gas rate was only 3,880 standard cubic meters/d (137 kscf/d) after 30 days of production. (As used herein the term dynamic fracture length means the length of one wing of a bi-winged fracture from the wellbore to one of the tips created by the fracturing fluid while the terms propped fracture length or simply fracture length is that distance from the wellbore reached by the proppant.) Five zones were stimulated during the Rio Blanco experiment with various sizes of MHFs. Stimulated production levels were disappointingly low, usually less than 5,600 m.sup.3 /d (200 kscf/d), with the highest observed post fracture production rate being about 6,230 m.sup.3 /d (220 kscf/d); well below the desired flow rate of about 42,500 m.sup.3 /d (1,500 kscf/d) after one year of production, which is needed to achieve economic production for the wells in question.
Unrelated to the Rio Blanco project, in the late 1970's enhancements in multi-stage fracturing were achieved in stimulating lenticular heavy oil formations Stimulation of Asphaltic Deep Wells and Shallow Wells in Lake Maracaibo, Venezuela, World Petroleum Conference 1979, Bucharest, Romania, P.D. 7(1)(the "WPC paper")!. These enhancements were achieved using ball sealer diverters. The WPC paper teaches that completing the wells with limited perforation intervals enables each stage of fracturing to open an independent fracture which is in communication with only one set of perforations. It was found that each stage of fracture treatment opened about 30 vertical meters (100 ft) of zone. Using low perforation shot densities of about three shots per meter (1 shot per foot) over 3 m (10 ft) combined with proper time release of the ball sealers permits stimulation of all of the oil sands penetrated by a given well. Although the WPC paper discusses multi-stage fracturing of heavy oil lenticular formations, it does not address methods or techniques for controlling fracture propagation in relationship to the size, distribution and placement of the oil sands. Because these oil sands have high permeabilities in the 1-100 mD range, their stimulation does not closely correspond to stimulating production from tight gas reservoirs characterized by lenticular deposits such as sand lenses. In fact, the WPC paper suggests that greater stimulation of the oil sands could be gained from longer fractures if an inexpensive, highly permeable proppant was used as an alternative to sand. However, as noted above, very long MHF fractures failed to achieve desired results in lenticular sand, tight gas reservoirs.
The failure of the Rio Blanco project led to the Multi-Well Experiment project (MWX) in the 1980's that explicitly studied hydraulic fracture shapes and flow capacities in an attempt to enhance gas stimulation benefits. MWX consisted of three wellbores placed about 46 m (150 ft) apart at total depth so that two of the wellbores could be used for close observation and monitoring of fracturing treatments done in the first wellbore. Most of the fracturing injections into the MWX wells were small to moderate in size so that the monitoring wells could sense signals from the entire fractured region. (For example, in one experiment the propped fracture length was only about 65 m (214 ft).) This work led to the conclusion that there was nothing inherently wrong with the hydraulic fractures formed in these tight gas sands, i.e., fracture lengths, widths, and heights were the expected size.
The MWX project was followed at the same site by the M-Site project that continued the measurement of hydraulic fracture parameters until the end of 1996. During this entire time, efforts have been directed at advancing existing technology to more economically exploit the Rocky Mountain lenticular sands. As described in SPE Paper 35,630 Advanced Technologies for Producing Massively Stacked Lenticular Sands, Apr. 28, 1996!, advanced stimulation techniques and the intersection of natural fractures, coupled with intensive infill well development, can enhance the prospects of commercial production from tight lenticular sands. This paper suggests separating the lenticular sands encountered by a well into a series of packages of 91 to 152 m (300 to 500 ft) of gross interval. In 610.sup.+ m (2000.sup.+ ft) of saturated gas zone for a typical well there would be four to seven such packages. The analysis in this paper concludes that completing wells in multiple zones correlates strongly with increases in production.
As to infill well development SPE 35,630 suggests that closer well spacing will increase total gas recovery, noting, for example, that at 40 acres per well 12 out of 16 wells would still penetrate separate sand bodies, i.e., no or limited interference or communication with the sands of an adjacent well. This limited interference occurs because the average areal extent of the lenticular sands in communication with the wells reviewed in SPE 35,630 is only about 22 acres. However, even with multiple zone fracturing and infill drilling, wells drilled with 40 acre spacing still would have a recovery efficiency of gas in place of only about 26%. Thus nearly three fourths of the original gas in place would remain unrecovered using the approach suggested in SPE 35,630. Although the SPE paper suggests well spacing down to 20 acres might further enhance recovery, it fails to disclose methods for controlling the stimulation techniques to capture larger quantities of the original gas in place or the relationship between the stimulation technique and the spacing of the wells. Therefore, what is needed is a well stimulation method for substantially enhancing production from reservoirs characterized by tight gas, lenticular deposits such that they become commercially exploitable gas fields.

Method for stimulation of lenticular natural gas formations