A method and apparatus for aligning discontinuous fibers (F 101, 212) is described. A feeder apparatus (20, 120, 220, 220A) is used to align the fibers in a horizontal plane for feeding to the aligning apparatus (40, 140, 240, 240A) providing an electrical (E) field to orient the fibers in one preselected direction. A support or conveyor (70, 170, 270) receives the aligned fibers. The method and apparatus provides composite products having improved physical properties because of the alignment. The fibers can be of different lengths and a mixture of different types to make composites with controlled microstructure and properties. The composite materials can be in the form of non-woven, discontinuous fiber reinforced thermoplastic stampable sheets with controlled fiber orientation distribution. The composites are useful for a variety of goods.

(1) Field of the Invention
The present invention relates to an improved method and apparatus for aligning discontinuous fibers using spaced apart plates having an electrical field between them and a feeder apparatus for aligning the fibers for movement between the plates. The feeder apparatus is characterized by preferably having an elongated slot or slots which align the long axis of fibers in a horizontal plane for subsequent perpendicular alignment between the plates, thereby preventing the fibers from moving with the long axis in the vertical plane and essentially falling in an uncontrolled manner. Further, the invention relates to the manufacture of a non-woven, discontinuous fiber reinforced thermoplastic sheet with controlled fiber orientation distribution.
(2) Description of Related Art
Micro-mechanics models for composite materials predict that in discontinuous fiber composites, modulus and strength values approach that of the unidirectional continuous fiber composites, when the length of the fibers far exceed the critical fiber length and when the fibers are aligned in the direction of the load (Agarwal, B. D., et al., Analysis and Performance of Fiber Composites, John Wiley & Sons, 121-131 (1990); and Piggott, M., "Load Bearing Fibre Composites", Permagon Press, 72-79 and 83-89 (1980)). Aligned discontinuous fiber polymer composites have a clear advantage over other composite material systems with respect to overall performance and processability and are potentially well suited for lightweight structural applications. Several techniques using hydraulic, electrical, magnetic or pneumatic means have been tried in the past to orient fibers in a preferred direction while processing discontinuous fiber composites. However, these methods of making aligned discontinuous fiber composites have met with limited success because the methodologies that were developed did not bring about any significant reductions in fabrication times or costs.
There is a need for an improved method that can manufacture discontinuous fiber composites with the fibers preferentially aligned in one direction using electric fields. There is a need for a method amenable to high degree of automation and high speeds of operation, thereby reducing the cycle time needed to fabricate an oriented discontinuous fiber composite sheet or part.
Controlling the orientation of short/discontinuous fibers has been a challenge in the processing of composite materials be it in glass fiber sheet molding compound (SMC) processing, resin injection molding (RIM) preform manufacture or injection molding. With increased realization of the performance payoffs of aligned discontinuous composites, several attempts have been made to control fiber orientation. A review of literature relating to fiber alignment techniques that can be used in the fabrication of aligned discontinuous fiber composites is presented where the techniques are broadly classified into two categories viz. wet/slurry methods and dry methods. This categorization lends itself to the general conclusion that wet/slurry methods are typically slower and less flexible in controlling fiber orientation as compared to the dry methods.
In the wet methods (Kacir, L., et al., Polymer Engineering and Science, Vol. 15, p. 525, 532 (1975); Vol. 17, p. 234 (1977); Vol 18, p. 45 (1978); and Soh, S. K., Proc. 10th. Annual ASM/ESD Advanced Composites Conference & Exposition, Dearborn (1994)), the fibers are usually in a well agitated liquid suspension and a fiber mat is created by either draining the liquid or raising a filter bed through the suspension. Control of fiber orientation is limited, but can be achieved to some degree by guiding vanes or other means like electric fields when the liquid is dielectric (Knoblach, G. M., U.S. Pat. No. 5,057,253). The drawbacks in these processes is the introduction of an additional step of drying the wet mat which reduces the speed of manufacturing drastically, and secondly the fact that fiber mat preform has to be further processed by reaction injection molding or polymer sheet impregnation to result in a composite part. The mechanical performance of the final part may also be sometimes lowered due to the presence of voids entrapped during the drying of the wet fiber mat.
Dry methods ((Talbot, J. W., et al., U.S. Pat. Nos. 4,664,856 (1987); 4,113,812 (1978); and Peters, T. E., et al., U.S. Pat. No. 5,017,312 (1991)) usually rely on electric fields or pneumatic means ((Ericson, M. L., et al., Composites Science and Technology 49:121-130 (1993)) to control fiber orientation and are generally faster than the wet processes. Peters et al (U.S. Pat. No. 5,017,312) had developed the technology to manufacture oriented chopped glass fiber mats where a complicated array of electrodes are embedded at the bottom of the mat that is being formed and also above the mat to force orientation of the fibers as they descend. Lack of proper understanding of the fiber electro-dynamics resulted in a complicated orientation technique. Besides, the end product is a fiber preform which needs additional processing of liquid resin molding, before it can become a final composite part. Other patents of interest are U.S. Pat. Nos. 2,686,141 to Sawyer, 4,111,294 to Carpenter et al, 4,347,202 to Henckel et al, 4,707,231 to Berger and 5,017,312 to Peters et al. DuPont (Chang, I. Y., et al., J. Thermoplastic Composite Materials, Vol. 4, p 227-252 (1991)) introduced a long discontinuous fiber (LDF) thermoplastic composite prepreg for aerospace applications that has fibers several inches long which makes it less flexible in molding complex shapes. Moreover, the starting material is a continuous fiber impregnated prepreg. Another approach for making oriented preformed glass mat reinforced thermoplastics is by using spray-up techniques (Jander, M., Proc. 7th Annual ASM/ESD Advanced Composites Conference, Detroit (1991)). Although these techniques are fast, only stiff and long fiber bundles (1"-2") can be oriented by this technique which generally results in poor matrix impregnation and inflexible fiber preforms.
The problem in the prior art is that the fibers are randomly introduced between the E-field plates. In general, this tends to result in a large fraction of fibers which are not oriented by the electrical field, particularly when the fibers have a longitudinal long axis which is essentially vertical. There is also a problem with rebound of the fibers on the surface where they are to be deposited. The result is fibers which are not properly aligned, regardless of the method used to overcome distortions of the plate adjacent electrical field to the mat.
The widespread use of high performance continuous fiber composites is limited to a great extent due to expensive fabrication costs, while discontinuous or short fiber composites form a major share of the fiber reinforced composites for non-structural applications, due to ease in processability. To optimize the balance between performance and processability in polymer composite material systems, a novel high speed method was developed which produces aligned discontinuous fiber composites (ADF) using electric fields.

Method and apparatus for aligning discontinuous fibers

Board of Trustees operating Michigan State University


An inlet construction is provided which is particularly useful in a spray arm for a dishwasher. The inlet is formed of a circular opening in a bottom wall of the spray arm and a flat plate positioned within the hollow arm, above the opening and generally perpendicular to the direction of the liquid jet directed at the underside of the arm. The plate is held in place by being pressed against a plurality of spacers formed on the bottom wall of the arm by resilient fingers positioned adjacent to each of the spacers. The liquid jet strikes the plate and the liquid is forced radially outwardly into the arms of the spray arm to be ejected from openings in the spray arm.

The present invention relates to dishwashers and more particularly to an inlet for a spray arm used with an automatic dishwasher.
Automatic dishwashers generally comprise an enclosure for receiving dishes, utensils and other items to be washed. Usually there are one or more racks of a wire frame type which support the various articles to be washed. Wash liquid is directed against the articles in the form of a pressurized spray through spray orifices generally carried on rotating arms which assure wide coverage by the spray.
Where multiple levels of racks are utilized, it is known to use a separate spray arm for each rack in order to provide complete coverage by the wash liquid. However, since in domestic dishwashers the individual dish racks move independently, a physical connection from the source of pressurized wash liquid to the upper spray arms is not feasible. In the past, the upper spray arm has been provided with a horizontally loose funnel shaped member opening downwardly and the lower spray rack has been provided with a tower having an open upper end such that wash liquid under pressure is ejected from the tower upwardly into the funnel inlet in the upper arm causing the upper arm to fill with wash liquid with the wash liquid then exiting through various spray orifices in the upper arm.
While such an arrangement has achieved a certain degree of effectiveness, there is a certain amount of splash back when using such a structure, particularly when the top rack is not positioned precisely with respect to the lower spray post.


The present disclosure relates to a radar apparatus including a circuit board provided inside a housing having an upper side open, and on which an RF element is mounted on an upper surface, and a cavity having an open lower side and coupled to the upper surface of the circuit board for accommodating the RF element, wherein the cavity includes a coupling portion extending downwardly in a region of a surface coupled to the circuit board, and the coupling portion is inserted into a coupling hole formed in the circuit board to contact a ground plane of the circuit board.

A radar apparatus is a sensor for detecting a surrounding target, and is widely used in various fields such as the civilian field and the military field. Such a radar apparatus is mounted on a vehicle, an aircraft, etc., and may be used by fusion with various application technologies.
For example, in the case that a radar device is mounted on a vehicle, the radar device detects a nearby obstacle, such as a vehicle in front of the vehicle, a pedestrian, and the like, and the control system of the vehicle may utilize the detection result of the radar device to control the vehicle to avoid the obstacle. Alternatively, the vehicle-mounted radar device may detect the preceding vehicle, and the vehicle control system may control the vehicle to follow the preceding vehicle by using the detection result of the radar device.
To this end, the radar device detects the distance between the vehicle and the surrounding object by emitting electromagnetic waves and receiving the reflected electromagnetic waves.
The radar device includes an RF element and an antenna, and electromagnetic waves may be transmitted/received through the antenna. In this case, there may be provided a cavity covering the RF element in order to prevent noise from being generated due to electromagnetic waves being transmitted to the RF element. However, due to an electrostatic discharge (ESD) phenomenon occurring outside the radar device, there may occur a case in which the charge passing through the cavity is conducted to the RF element which is a conductor.
Accordingly, there is increasing the need for a method for solving the degradation of the performance of the radar device due to the discharge phenomenon occurring outside the radar device.


A medical control device includes: a light source controller configured to modulate pulsed light by changing a crest value of a pulsed current and emit the pulsed light a plurality of times from the light source in one frame; an imaging controller configured to cause an image sensor to sequentially generate a pixel signal at a specific frame rate; and an image processor configured to use a pixel signal obtained by multiplying the pixel signal for specific one frame from each pixel of a specific horizontal line by a ratio of an amount of exposure of specific pulsed light made in the specific one frame to a total exposure amount obtained by adding each exposure amount of all of the pulsed lights exposing the specific horizontal line within the specific one frame including an illumination period of the specific pulsed light.

The present disclosure relates to a medical control device and an endoscope system.
In a medical field, known in the related art is an endoscope system for observing vocal cords by sequentially emitting pulsed light toward the vocal cords in synchronization with a vibration frequency of the vocal cords and imaging the pulsed light reflected from the vocal cords with an image sensor (see, for example, JP 5948512 B2).
In an endoscope system described in JP 5948512 B2, in order to reduce brightness variations within one frame or between successive frames due to a difference between a frame period of an image sensor and a light emission period of pulsed light and generate an image suitable for observation, processing described below is executed.
Specifically, in the endoscope system, a pixel signal output from an image sensor is operated with a specific arithmetic expression, thereby generating a pseudo pixel signal (pixel signal during illumination) corresponding to a pixel signal when all pixels of the image sensor are exposed during an illumination period of pulsed light.

Medical control device and endoscope system


Disclosed are semiconductor devices and methods of fabricating the same. The method comprises sequentially stacking a lower sacrificial layer and an upper sacrificial layer on a substrate, patterning the upper sacrificial layer to form a first upper sacrificial pattern and a second upper sacrificial pattern, forming a first upper spacer and a second upper spacer on sidewalls of the first upper sacrificial pattern and a second upper sacrificial pattern, respectively, using the first and second upper spacers as an etching mask to pattern the lower sacrificial layer to form a plurality of lower sacrificial patterns, forming a plurality of lower spacers on sidewalls of the lower sacrificial patterns, and using the lower spacers as an etching mask to pattern the substrate. The first and second upper spacers are connected to each other.

The present inventive concepts relate to a semiconductor device and a method of fabricating the same, and more particularly, to a semiconductor device and a method of fabricating the same with reduced fabrication cost and time.
Semiconductor devices have been increasingly required for high integration with the advanced development of electronic industry. For example, semiconductor devices have been increasingly requested for high reliability, high speed, and/or multi-functionality. Semiconductor devices have gradually become more complicated and integrated to meet these requested characteristics.

Semiconductor device and method of fabricating the same


A container having the function of absorbing blood and water of fresh food includes a lower box body, an opening, a lower latch member at the periphery of the opening, a recessed surface at an internal bottom an absorbent material flatly disposed in the recessed surface, and an upper box body corresponding to a lower box body. The lower box body includes an opening, an upper latch member at the periphery of the opening, a plurality of through holes disposed at the bottom corresponding to the absorbent material, and the upper box body is sheathed into the lower box body, and the upper latch member is latched onto the lower latch member, so that the upper and lower box bodies are combined into a double-layer box and the absorbent material is included inside. Further, the lower box body includes a plurality of longitudinal ribs on its internal side wall and perpendicularly contacted with a plurality of transversal ribs on the external sidewall of the upper box body. The invention can prevent filthy water or blood from flowing into the tray or damaging the freshness of the food.

1. Field of the Invention
The invention relates to a packaging container having the function of absorbing blood and water of fresh food, and more particularly to a packaging container capable of preventing the blood or filthy water of beef, fresh fish, chicken or the like from remaining in the packaging container that may affect the appearance and sanitation of the packaged food due to the decomposition of the meat products.
2. Description of the Related Art
In general, most fresh food including beef, fresh fish, seafood, chicken and the like displayed in fresh produce supermarkets, hypermarkets and large malls for user's choice are wrapped by stretch wrapping. The fresh food contained in a tray made of Styrofoam and then wrapped by stretch wrapping are displayed in the stores for consumers to buy, but the fresh food may have water or the meat products may have blood remaining from the decomposition of the food, and the water and blood will remain in the tray and mix with the fresh food. Such arrangement not only causes the meat products or other fresh food to get rotten easily, but also gives a bad image to the packaged food.
Referring to FIGS. 1 and 2 for a prior art fresh food packaging container, an absorbent pad 42 is placed on a tray 41, and the fresh food is placed on the absorbent pad 42. Although the absorbent pad 42 can absorb the blood or water of the fresh food, excessive blood or water will remain in the tray 41 if the absorbent pad 42 is saturated. As a result, the blood or filthy water will be mixed with the fresh food, and such packaging container is definitely not a good one.
Further, high-price meat products or fishes such as Japanese Matsuka beef or blue fin tuna (Toro) should be packaged with a package container unlike the traditional packaging in order to attract consumers to buy. At present, a transparent freshness maintaining box is usually used to package these high-price meat products and fishes, and a plastic blade or a bamboo or wooden slice is put at the inner bottom of the container for decoration, but such arrangement cannot prevent blood or water from coming out from the meat products and fishes. The blood or water may flow to the tray and mix with the fresh food. Such arrangement not only causes meat products and fishes to get rotten easily, but also affects the appearance and the sanitation of the food. As a result, these high-price fresh foods no longer look so good and thus affecting the consumer's willingness for its purchase.
In view of the foregoing shortcomings of the prior art, the inventor of the present invention conducted extensive experiments and tests to overcome the shortcomings and improve the function of the packaging container.

Container having the function of absorbing blood and water of fresh food


Embodiments of the present invention can phase in image adaptations for display devices by determining a next incremental step among a plurality of incremental steps from an initial image state of a display device to a target image state, and then implementing the next incremental step.

There are a variety of "backlight-and-panel" displays. These displays often include one or more backlights behind a panel of tiny, electrically-controllable "shutters." These shutters can be implemented in a number of different ways using a variety of technologies. The shutters can form dots, or pixels, of light on a panel by passing light from the backlight(s). The amount of light passed by each dot can be controlled by "opening or closing" the respective shutter to varying degrees. Depending on the technology being used, the shutters may not mechanically open and close in a literal sense, but the shutters can nevertheless be electrically controlled to provide that effect. A panel may include many thousands of these shutters that can be individually controlled to collectively form images. The data that indicates which shutters to open and close, and to what extent, is referred to herein as "image data."
In a color display, each pixel in a panel usually includes a group of at least three shutters, and the backlight often provides a wide spectrum of light. Each shutter in a group of three may be filtered to pass a different color of light from the backlight. For example, one shutter may pass red light, one shutter may pass green light, and one shutter may pass blue light. In which case, by individually controlling the three shutters in a pixel, different amounts of red, blue, and green light can be mixed to provide a wide variety of colors.
Backlight-and-panel displays are commonly used in a variety of mobile electronic devices, such as notebook computers, personal data assistants, cell phones, and the like. Unfortunately, backlights tend to consume a relatively large amount of power and can substantially shorten the battery life of a typical mobile device. A number of techniques have been developed to dim backlights under various circumstances to save power and extend battery life. One of these techniques is sometimes referred to as backlight modulation (BLM) or backlight image adaptation (BIA), but will be referred to as display power saving technology (DPST) for purposes of this patent.
The image data for a display panel is usually generated based on the backlight brightness level, also called the backlight setting. For a particular set of image data and a particular backlight setting, a vast majority of the shutters in a panel may be less than fully open. DPST technology can take advantage of this situation to save power by reducing the backlight setting and adjusting the image data to maintain or approximate the same perceived brightness level. That is, DPST technology can turn down the backlight to save power and compensate for much of the reduction in the backlight setting by opening shutters to a greater extent. DPST can analyze various characteristics of an image on a display, such as color, contrast, brightness, etc., to determine how much to adjust the image data and how much to adjust the backlight setting.


A straddle seat type vehicle with a two-cycle internal combustion engine with a crankcase fuel injector. The crankcase fuel injector is mounted through a wall of the crankcase and injects fuel in a jet directed at incoming air entering into the crankcase. The engine may also include a transfer passage fuel injector that injects fuel in a jet directed generally transverse to the direction of airflow through the transfer passage.

Two-cycle engines are utilized in a variety of applications. Because their power to weight ratios are substantially greater than their four-cycle counterparts, and because they can operate regardless of orientation, they are especially useful for straddle seat type vehicle applications, such as snowmobiles, all-terrain vehicles (ATVs), personal watercrafts (PWCs), and motorcycles. Unfortunately, many currently available two-cycle engines are fuel inefficient, emit an undesirable amount of pollution, and/or exhibit poor running quality. Part of these undesirable characteristics may be attributed to the placement of fuel injectors within the engine.

Fuel injection system and method for two-cycle engines


A cab of an agricultural vehicle has having a seat for an operator and a console unit arranged forward of the seat for housing an instrument display. The cab is fitted with an HVAC system comprising a heat exchanger unit located within the console unit and a blower located on the floor of the cab beneath or adjacent the seat and serving to blow air by way of a floor-level duct to the heat exchanger unit.

As is known, the essential components of a vehicle HVAC system include an air inlet, a filter for removing dust and dirt particles from the intake air, a blower, a heat exchanger unit which may include at least one of an evaporator through which flows the refrigerant of a refrigeration circuit and a radiator through which flows a heated liquid (usually that circulating in the engine cooling system), and air vents for discharging air into the cab after it has been filtered and blown through the heat exchanger unit by the blower.
The design and location of the HVAC system of an off-highway vehicle, requires careful consideration on account of the limited space available within the cab. Because off-highway vehicles often operate in a dirty environment, it is preferable for the air intake to be located at rooftop level and a compact configuration that is sometimes adopted is to place all the components of the HVAC system in a roof mounted unit. However, this is sometimes not possible, for example if the cab has an opening roof or if the HVAC unit would restrict visibility unacceptably.
An alternative solution that has been proposed is to place the blower and the heat exchanger unit beneath the seat of the operator but that too is not always practicable. In particular, in some vehicles the clearance between the seat and the floor of the cab is not large enough to accommodate the heat exchanger unit and the blower. Furthermore, in such a configuration the air in the duct may be heated while flowing from the heat exchanger unit to vents in the console unit or dashboard.
Another solution would be to have the HVAC located partly within the cabin and partly in the engine bay but this would expose the components of the HVAC system to a dirt environment and to higher temperatures and would take up valuable packaging space within the engine bay.

Agricultural vehicle cab fitted with an HVAC system


A method for packaging an integrated circuit device includes forming a dielectric support layer on the surface of a substrate wherein the dielectric support layer includes an opening therein exposing at least a portion of an active region of the substrate. A protective layer is provided on the dielectric support layer opposite the substrate wherein the protective layer covers the exposed portion of the active region of the substrate thereby defining a cavity between the protective layer and the active region. More particularly, the step of forming the dielectric support layer can include forming a continuous dielectric layer on the surface of the substrate including the active region, and removing portions of the continuous dielectric layer from the active region to provide the opening of the dielectric support layer. Related structures are also discussed.

Integrated circuit devices are used in radio communications devices such as cellular radio telephones. In particular, integrated circuit (IC) devices including radio frequency (RF) circuitry fabricated using high speed semiconductor materials such as gallium arsenide (GaAs) and/or indium phosphide (InP) are commonly used.
These RF-IC devices are conventionally encapsulated in plastic packages with the RF circuitry being covered with plastic. The conventional plastic package, however, may add parasitic capacitance reducing the performance of the RF circuitry. In particular, the plastics used in these conventional packages may have dielectric constants of 4 or higher.
Accordingly, packages for RF-IC devices have been developed to remove the plastic from the RF circuitry. In particular, a package including a pre-molded support and a lid which are attached to the RF-IC device have been proposed. The pre-molded support is attached to the surface of the RF-IC device, and an opening in the pre-molded support exposes the RF circuitry. The lid is attached to the pre-molded support to cover this opening.
This package, however, may be undesirably complicated and expensive because the pre-molded support and lid are separately formed and then attached to individual RF-IC devices. Moreover, the pre-molded support and lid may add undesired height to the RF-IC device.
Accordingly, there continues to exist a need in the art for improved integrated circuit packages and methods.

Methods for packaging integrated circuit devices including cavities adjacent active regions


In accordance with the present invention, a tactile sensor capable of detecting shear force comprises an anisotropically conductive material disposed between a conductive cursor and an array of contacts. In one preferred embodiment, the anisotropic material is affixed to the contact array, and the cursor is affixed to an elastomeric skin overlying the material. Movement of the cursor is detected by interconnection of the contacts underlying the cursor. In a second embodiment, the anisotropic material is affixed to the cursor but is free to move over the contact array in response to shear force. Movement of the cursor is detected by interconnection of the underlying contacts. Such arrangements can also detect pressure and temperature.

Tactile sensors are useful in a wide variety of applications for robotics and computer hardware. In robotics tactile sensors provide several types of useful information about the state of contact between a robot hand and an object in prehension. Sensors can indicate the presence of an object, its location in the hand, the force of contact and, in addition, can provide information concerning the shape of the object. Unfortunately, most robotic sensors can measure only compressive force without regard for shear movement. Shear sensors would be useful, for example, in detecting the movement of a grasped object.
Most controls for computer-related products are pressure sensitive devices such as keys. Controllers such as the computer "mouse" or the computer "joy-stick" are responsive to movement in two dimensions but are relatively bulky, complex to manufacture and subject to mechanical failure. Accordingly, there exists a need for simple, compact tactile shear sensors for robotic and computer applications.

Tactile shear sensor using anisotropically conductive material


A thin film EL element capable of emitting light of different colors desired even at a low applied voltage owing to its high luminescent efficiency and freedom from crystal defects. The thin film EL element is of the dual dielectric structure having a transparent substrate (1), and a transparent conducting film (2), a first dielectric layer (3), a luminescent layer (4), and a second dielectric layer (5), which are formed on top of the other on the substrate, the transparent conducting film and the second dielectric layer being provided with respective electrodes (6a, 6b). It is characterized in that the luminescent layer has a superlattice structure represented by (luminscent host material)/(luminescent host material):(luminescent center impurity). The luminescent layer permits the doping of various luminscent center impurities while keeping its electrical neutrality without a need for the addition of charge compensating elements.

A thin film EL element usually has a structure as shown in FIG. 1. It is made up of a transparent substrate 1, and a transparent conducting film 2, a first dielectric layer 3, a luminescent layer 4, and a second dielectric layer 5, which are formed on top of the other on the substrate. The transparent conducting film and the second dielectric layer 5 are provided with electrodes 6a and 6b, respectively. Upon application of a strong electric field across the terminals 6a and 6b, the luminescent layer 4 emits light which emanates through the transparent substrate 1.
In the foregoing thin film EL element having two dielectric layers, the luminescent layer 4 is made of a luminescent host material doped with an impurity for the luminescent center. A strong electric field applied to the luminescent layer 4 excites the electron energy level of the luminescent center. When the excited state returns to the ground state, the conversion of energy into light takes place. The result is electroluminescence. The light emitted by electroluminescence has a specific wavelength which depends on the luminescent center.
For electroluminescence to take place, it is necessary that a strong electric field be applied to the luminescent layer and the luminescent host material have a broad band gap. A luminescent host material having a narrow band gap does not withstand the strong electric field applied to the luminescent layer 4, but permits an electric current to flow through it. This prevents the application of a strong electric field to the luminescent layer. This is the reason why the conventional luminescent host material was selected from the II-VI compounds, such as ZnS, SrS, CaS, and ZnSe, which have a broad band gap, and the luminescent center was Mn or Eu. Mn-containing ZnS (ZnS:Mn) emits yellowish-orange light and Eu-containing CaS (CaS:Eu) emits red light.
The ZnS:Mn used for the above-mentioned luminescent layer 4 takes on a crystalline structure, with the impurity present as shown in FIG. 2. That is, the Mn atom (of a divalent transition metal) takes the lattice point where the divalent Zn atom of ZnS (II-VI compound) should be. This results in a stable EL element with high luminance.
For the emission of light of different colors, attempts have been made to use a variety of elements as the impurity for the luminescent center. They include, for example, Tb, Tm, Sm, and Ce. When ZnS is doped with Tb, Tm, or Sm, the resulting ZnS:Tb, ZnS:Tm, or ZnS:Sm emits green light, blue light, or reddish-orange light, respectively. When SrS is doped with Ce, the resulting SrS:Ce emits bluish-green light.
The II-VI compound as the luminescent host material is electrically neutral and hence remains stable in its compound form, because the II Group element has a valence of 2 and the VI Group element has a valence of -2. When the luminescent host material is doped with an impurity for the luminescent center, the atoms of the former are partly replaced by the atoms of the latter. In the case where the impurity is a divalent element such as Mn and Eu, the luminescent layer remains electrically neutral and hence stable. This is not true of the case in which the impurity for the luminescent center is a trivalent element such as Tb and Tm. In such a case, the luminescent layer loses the electrical neutrality, giving rise to the vacant lattice point, crystal transition, and crystal strain. Such crystal imperfections prevent the energy applied to the luminescent layer to be effectively transmitted to the impurity for the luminescent center, and hence prevents the light emission with high luminance at a low voltage.
In the case where the luminescent layer 4 is made of ZnS:Tb, the impurity (Tb) exists in the crystal as shown in FIG. 3. Since Tb is trivalent, ZnS:Tb as a whole is not electrically neutral and hence does not glow with sufficient luminance. In order to overcome this disadvantage due to a trivalent impurity, it has been proposed to use Tb together with a charge compensating element such as F, thereby forming ZnS:Tb,F.sub.x (x=1 to 3), which glows brightly. The ZnS:Tb,F.sub.x takes on the crystalline structure in which the impurity exists as shown in FIGS. 4 and 5. The existence of F atoms in the crystal makes the luminescent layer unstable and hence poses a problem associated with its reliability (operational life).
A possible alternative is to use a III-V compound, with the trivalent element therein partly replaced by a trivalent impurity for the luminescent center. A disadvantage of this doped compound is that it is necessary to apply a strong electric field (about 1 MV/cm) to excite the luminescent center. Any material to withstand such a strong electric field should have a band gap greater than about 3 eV. However, ordinary III-V compounds (such as InP, GaP, and GaAs) lack such a great band gap and hence are unsuitable for the fluorescent layer.
In addition, the conventional thin film EL element mentioned above has a luminescence efficiency as low as about 0.1%. One reason for the low luminescent efficiency is an insufficiency of excitons. It is considered that excitons take part in luminescence of the luminescent layer 4. It is also considered that luminescence of the conventional EL element is caused by excitons present within or near the impurity for the luminescent center.


Provided are an apparatus and method for providing safe driving information. The method includes building a database including group information obtained by grouping driving environment information and driving situation information according to attributes of the driving environment information and the driving situation information, and provision forms and provision timings of safe driving information determined according to conditions in groups; collecting driving environment information, driving situation information, obstacle information, and information on a driver's line of sight in real time; determining a provision form and a provision timing of safe driving information based on the collected information and the database; and providing the safe driving information according to the determined provision form and timing.

1. Field of the Invention
The present invention relates to an apparatus and method for providing safe driving information, and more particularly, to an apparatus and method for providing safe driving information using a head-up display (HUD) of a vehicle.
2. Discussion of Related Art
With the development of vehicle electronic systems, an HUD technology for additionally displaying vehicle information on the windshield of a vehicle has emerged lately. At home and abroad, development is underway of a HUD system that enables a vehicle driver to be provided with information while looking ahead.
An existing HUD system only displays simple information, such as a vehicle speed, on the windshield of a vehicle. However, during an actual travel, it is most important to provide a driver with warning information of collision accidents among many pieces of information provided for safe driving. Here, an HUD system should provide information on an obstacle in front of a vehicle according to the driver's line of sight such that the driver's load of recognition can be reduced. The reduction in the load of recognition facilitates the driver's understanding of the information on the obstacle in front of the vehicle.
For this reason, an augmented reality HUD (AR-HUD) system that provides information according to a driver's line of sight is recently under vigorous development. Information provided by such an AR-HUD system should be displayed according to a driver's line of sight while the driver looks ahead. In addition, it is important to lead to safe driving while minimizing a driver's load of driving such as the load of recognition.
In particular, there is a need for a technology for providing communication information in a form that can be easily recognized by a driver and adjusting provision-related times (e.g., a provision time point, a provision interval, and a provision duration) according to an actual driving environment or situation.

Apparatus and method for providing safe driving information

ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE


A method and apparatus for continuously producing preselected lengths of coiled tubing are disclosed. According to the method, plastic tubing is continuously wound onto a rotating main tube shaft (24). Downstream from the point where the tubing begins to wind about the shaft, a heat source (46) is directed toward the coiled tubing, softening it as it traverses thereby. Further downstream, a cool-air source (48) directed at the softened tubing sets the tubing into its coiled form. Subsequently, the coiled tubing is cut into preselected lengths by a cutter (50) downstream from the cool-air source.

1. Field of the Invention
The present invention relates to plastic tubing and, more particularly, to a method for forming plastic tubing into coils and to a coiling system for practicing the method.
2. Description of the Prior Art
In the prior art, plastic tubing, such as tubing made from polyvinyl chloride (PVC), has been placed into coiled form by wrapping or coiling the tubing onto a mandrel, which may either be made of ultra-high molecular weight (UHMW) polyethylene, or have a sleeve or covering of that material, and by placing the mandrel into an oven for a suitable length of time to heat-form the tubing into a coil. Not only is this prior-art method inefficient, but it is also very labor-intensive and prohibitively expensive.
As a consequence, there has long been sought a more economical and straightforward method for producing a coil from a length of plastic tubing. Such a method is made possible with the use of the coiling system of the present invention.


A program-verify circuit for an electrically re-writable memory cell which has a floating gate and a control gate and permits storage of a ternary or higher multi-valued data, the program-verify circuit comprising (1) a variable threshold voltage field-effect transistor having a plurality of input gate electrodes, and (2) a latch circuit, wherein the latch circuit is connected to one source/drain region of the variable threshold voltage field-effect transistor and is to be connected to the memory cell through a bit line, one of the input gate electrodes of the variable threshold voltage field-effect transistor is to be connected to the memory cell through the bit line, and a potential for controlling the conduction/non-conduction state of the variable threshold voltage field-effect transistor is to be applied to the rest of the input gate electrodes.

The present invention relates to a program-verify circuit for an electrically re-writable memory cell which has a floating gate and a control gate and permits storage of a multi-valued (multi-bit or multilevel) data such as ternary or higher data, and a program-verify method using the above program-verify circuit.
In recent years, developments have been aggressively made on a memory cell having a floating gate and a control gate and being electrically re-writable. The above memory cell will be simply abbreviated as "memory cell" hereinafter. The memory cell is constituted of one memory element or composed of a plurality of memory elements depending upon types. As a technique for materializing a large capacity and a low cost of a memory cell, the technique of multi-bit (multilevel) storage for storing data of 2 bits or more, i.e., a ternary or multi-valued data in one memory element is attracting attention. In specific methods of multi-bit storage, which methods are applied to a memory element, various methods are proposed concerning data readout methods, program-verify methods (data writing methods), and so forth, depending upon differences in types such as a NOR type nonvolatile semiconductor memory cell (to be referred to as "NOR type memory cell" hereinafter), a NAND type nonvolatile semiconductor memory cell (to be referred to as "NAND type memory cell" hereinafter) and the like.
The performance method of a NOR type memory cell proposed by Intel Corp. will be outlined below. For details, see "NIKKEI MICRODEVICE", November issue of 1997, pages 126 to 130 (to be referred to as "Literature" hereinafter).
FIG. 4A shows the cell-array structure of the above NOR type memory cell. FIG. 4B shows a schematic partial cross-sectional view of a memory element constituting the NOR type memory cell. The structures of the cell-array and the memory element are the same as those of a conventional NOR type memory cell. In writing of data into the memory cell, when a positive high voltage is applied to a word line and a positive high voltage is applied to a bit line, hot electrons generated in a drain region of the memory element are injected into a floating gate (also called a floating electrode or a charge storage electrode) to set a threshold voltage V.sub.th of the memory element at a desired value. The value of the threshold voltage V.sub.th of the memory element, i.e., the injection amount of electrons into the floating gate is controlled by accurately controlling the voltage to be applied to a control gate (also called a control electrode) and the drain region. When data is erased, electrons are extracted from the floating gate to a source region by applying a high voltage to the source region, to set the threshold voltage V.sub.th of the memory element at a lowest voltage.
FIG. 5 schematically shows a distribution of the memory elements with regard to reference points (P.sub.0, P.sub.2, P.sub.3) and reference voltages (R.sub.1, R.sub.2, R.sub.3) when 2 bits are stored in one memory element. The threshold voltages V.sub.th of the memory elements storing data (1,1), (1,0), (0,1) and (0,0) and the reference voltages V.sub.R1, V.sub.R2 and V.sub.R3 have relationships as shown in the following Table 1.
TABLE 1 ______________________________________ Data (1,1) V.sub.th <V.sub.R1 Data (1,0) V.sub.R1 <V.sub.th <V.sub.R3 Data (0,1) V.sub.R2 <V.sub.th <V.sub.R3 Data (0,0) V.sub.R3 /V.sub.th ______________________________________
In data readout performance, as schematically shown in FIG. 15, a current is flowed in a selected bit line, and the current flowing in the bit line is compared through three sensing amplifiers. A bias condition to the memory element is determined such that the current I.sub.cell flowing in the bit line is in proportion to the threshold voltage V.sub.th. Outputs from the three sensing amplifiers are inputted to a logic circuit, which converts the above outputs to two parallel outputs D.sub.0 and D.sub.1. When data stored in the memory element is (1,1), I.sub.R1ref <I.sub.cell, and all the sensing amplifiers output "1", the logic circuit outputs "11". When data stored in the memory element is (1,0), I.sub.R2ref <I.sub.cell <I.sub.R1ref, and the sensing amplifier 1 outputs "0" and the sensing amplifiers 2 and 3 output "1", so that the logic circuit outputs "10". When data stored in the memory element is (0,1), I.sub.R3ref <I.sub.cell <I.sub.R2ref, the sensing amplifiers 1 and 2 output "0" and the sensing amplifier 3 outputs "1", so that the logic circuit outputs "01". When data stored in the memory element is (0,0), I.sub.cell <I.sub.R3ref, all the sensing amplifiers output "0", so that the logic circuit outputs "00".
The program-verify is performed on a similar mechanism.
Several configuration examples of a multi-bit NAND type memory cell have been also reported. For example, as a method of reading multi-valued data, one example is a method in which a word line potential is changed to compare an output potential of a bit line with a reference potential, and another example is a method in which a potential level which appears in a bit line is directly read out when a predetermined potential is applied to a common source line while a word line potential is fixed. The latter method is disclosed, e.g., in JP-A-7-307091.
In the NOR type memory cell shown in the above Literature, multi-valued data can be converted to binary data at once, and there is an advantage that there is almost no difference in the readout rate in a multi-valued method and that in a binary method. However, as shown in FIG. 15, three sensing amplifiers are required per bit line, and further, a reference cell-array is also required, so that there are problems that a circuit configuration is complicated and that a layout area is increased. The nonvolatile semiconductor storage device disclosed in JP-A-7-307094 has similar problems that its circuit configuration is complicated and a layout area is increased.

Program-verify circuit and program-verify method


According to this invention, a computer includes a register use information detecting unit for extracting pieces of information of registers, use of which is started and ended by executing instructions of a program, a register use information storing unit for storing information of a register whose value need be stored to execute an instruction in the program, a register use information referring unit for referring to register use information of the register use information storing unit, an instruction executing unit for executing predetermined processing for a desired register in accordance with a reference result of the register use information referring unit, and a register use information updating means for updating use information of a register stored in the register use information storing unit in accordance with outputs from the register use information detecting unit and the instruction executing unit.

1. Field of the Invention
The present invention relates to a computer capable of effectively using a register by recognizing a use state of the register in interruption processing or the like caused by executing a program.
2. Description of the Related Art
In a computer, the following processing is generally performed during execution of a program. For example, when the program is discontinued by procedure calling or interruption processing, a register is saved. In contrast to this, when control is returned from a procedure, or the program which has been interrupted by the interruption processing is continuously executed, the register is returned.
However, the conventional machine has no means for recognizing a register supposed to store values for normally operating a program during execution of the procedure calling or interruption processing.
As a result, in the conventional machine, when the procedure calling or interruption processing is to be performed, it is not recognized which register is required after the program is continued. Therefore, in a conventional machine, all registers including registers which need not be saved are saved, and, as in a returning operation, all the registers including registers which need not be returned are returned. This operation is an important factor for prolonging an execution time of the program.
In the procedure calling, for example, a case wherein a new procedure B is called from a procedure A will be described below. In this case, a register may be used after control is returned from the procedure B to the procedure A, and the value of the register changed by the procedure B must often be saved.
There are two methods for saving a register. The first method is a method of saving a register on a caller side, i.e., on the procedure A (to be referred to as caller saved convention). The second method is a method of saving a register on a callee side, i.e., the procedure B (to be referred to as callee saved convention).
According to the first method, in order to perform a saving operation in the procedure A, it is not recognized which register can be changed in the procedure B. Therefore, all registers which may be used after control is returned from the procedure B must be saved regardless of whether the registers are changed in the procedure B. In contrast to this, according to the second method, it is not recognized which register is used in the procedure A after control is returned from the procedure B. Therefore, all registers which are to be changed in the procedure B must be saved regardless of whether these registers are used in the procedure A after control is returned from the procedure B. For this reason, in both the first and second methods, an operation for saving registers which need not be saved is performed.
In the interruption processing, a case wherein a currently executed program is interrupted by interruption processing such as a trap or interruption will be described below. In this case, a register used during the interruption processing must be saved to continue the program. However, since it is not recognized which register is required after the program is continued, an operation for saving all registers, i.e., an operation for saving registers which need not be saved, is performed.
In returning registers, as in the saving of registers, an operation for returning registers which need not be returned is performed in each of the procedure calling and the interruption processing.
As described above, when the conventional procedure calling and interruption processing are to be performed, it is not recognized which register is a register whose value is required to normally operate an execution program. As described above, in all the procedure or interruption processing, all registers are saved/returned. Therefore, since saving/returning operations of the registers are redundant, an execution speed of the program is decreased.
A program generally consists of several procedures. In order to minimize saving/returning operations of registers, different registers are preferably used on a callee side and a caller side with respect to calling of the procedures. In this case, a procedure calling relation is checked in a compiling or linking operation, and registers are assigned such that the registers used on the caller and callee sides do not overlap each other. However, the register assignment can be performed only when very severe conditions are satisfied, e.g., when a target procedure is called from only one portion or when the calling does not depend on the input series of a program. For this reason, in many cases, since assignment must be performed without recognizing the use state of the registers when a procedure is called, assignment means is not used effectively.
As described above, in a conventional computer, register assignment cannot be performed sufficiently using hardware resources. Although there is an empty register, a register in use may be assigned without assigning the empty register. Therefore, in the conventional machine, registers which need not be saved/returned must be saved/returned.
The following method is known. Registers which are returned in procedure calling and registers which are not returned are permanently classified, and the number of registers subjected to saving/returning operations in the procedure calling is decreased, thereby decreasing the load of the saving/returning operations. However, according to this method, when registers of one type are short, since registers of the other type cannot be used as the registers of one type, the registers cannot be effectively used.
In addition, in a computer program, after the value of a register is defined, the value is to be referred to. However, when the program has an error, the value may be referred to without defining the value. The program must be detected before the program is executed or during execution of the program. However, in a conventional technique, even when a program is analyzed by software before the program is executed, a relation between the definition and reference of the value is not always detected. In addition, since there is no analyzing means during execution of the program, reference of an undefined register cannot be easily checked.
With the above arrangement, in a conventional computer, it is not realized which register is generally required after a program is continued. Therefore, all registers including registers which need not be saved are saved. On the other hand, as in returning registers, all registers which need not be returned are returned. This is an important factor of prolonging an execution time of the program.
Related arts of the present invention are U.S. Pat. No. 5,021,993 and U.S. Pat. No. 4,945, 510.


A fully-interconnected ATM switching apparatus comprising a plurality of line interface circuits, each of the line interface circuits including an input port driver for extracting an SDH transmission frame containing cell data with a fixed length and a connection identifier from an input signal, appending a routing tag to the extracted SDH transmission frame and outputting the resultant SDH transmission frame through an input dedicated bus and an output port driver for receiving a cell stream from an output dedicated bus, removing the routing tag from the received cell stream, translating a channel identifier in the connection identifier and transferring the resultant SDH transmission frame to an adjacent node, a system clock distributor for generating a clock signal, an initialization controller for controlling system initialization and restart operations, a switch maintenance controller for performing a switch maintenance control operation in response to a network managing cell, a switch call processing controller for performing a call processing operation, a switch module controller for controlling a switching operation, and a plurality of switch output multiplexers for switching cells from the input port drivers to the output port drivers under the control of the switch module controller.

1. Field of the invention
The present invention relates in general to fully-interconnected asynchronous transfer mode (referred to hereinafter as ATM) switching apparatus, and more particularly to a fully-interconnected ATM switching apparatus for providing individual interconnections between all input ports and all output ports and processing a burst traffic by performing two-stage buffering, speed gain control, buffer flow control and statistical multiplexing operations.
2. Description of the Prior Art
The users have required various services of good quality according to the growth of communication techniques. In order to fulfill the requirements of the users, an ATM broadband integrated service digital network (B-ISDN) has been proposed to provide a consecutive service such as a voice service, a high-speed data service such as a file transmission service and a burst data service such as a variable bit rate (VBR) real-time video service on the same transmission link. Under such an environment, multiplexing and switching processing means is the kernel of a communication system and it does not require a time division multiplexing (TDM) method based on a synchronous transfer mode (STM) but a fixed length cell switching method based on an ATM. A construction for embodying such a switching method is shown in FIG. 1.
FIG. 1 is a block diagram illustrating the general construction of a switching apparatus. As shown in this drawing, the switching apparatus comprises a plurality of subdivided line interface circuits 1, a switching function unit 2 and a system manager 3.
Each line interface circuit 1 includes means for performing an interfacing operation to a unit transmission frame. The input line interface circuit 1 performs clock recovery from received signal clock restoration, cell recovery and cell processing operations and then applies a cell destination information (routing tag) to the switching function unit 2 on the basis of a connection identifier and the associated information which is written in a table manager. The switching function unit 2 routs a cell to the associated destination in response to the cell destination information from the input line interface 1. The output line interface circuit 1 receives the cell routed from the switching function unit 2 and changes a channel identifier in the received cell. Then, the output line interface circuit 1 transmits the resultant cell to a subscriber line. In this manner, the cell switching operation is performed.
Constructions of such a switching apparatus are generally classified into the shared memory type, shared bus type, space division type and fully-interconnected type according to embodied architectures. Such switching constructions have their inherent advantages and disadvantages such as cell delay, cell loss, interconnection network complexity, scale extensibility and implementation complexity. For this reason, it is important that the switching apparatus has an optimized construction according to its application and position.
A space division switch such as the Batcher Banyan switch is desirable to readily provide the scale extensibility and reduce the number of interconnections, but has a disadvantage in that it can not provide individual interconnections of one input port to all output ports. For this reason, it is impossible to avoid a cell collision in the switching network. Such an internal blocking phenomenon results in a reduction in performance.
Many efforts such as increasing the number of internal interconnections or the internal processing speed have been made to overcome the above problem with the space division switch. However, such efforts make the switch construction more complex. Noticeably, the number of interconnections is an important factor in the large scale switching construction but it is not an obstacle to an ATM local area network (referred to hereinafter as LAN) hub switch and a small scale ATM switch for a private campus network. Also, switches require a point-to-multipoint switching function for the provision of a multicasting service as well as a simple point-to-point switching function.
Many fully-interconnected switches have been used. The fully-interconnected switches have excellent performance because they can perform a multicasting function without cell copy function. Examples of the fully-interconnected switches will hereinafter be described with reference to FIGS. 2A to 2D.
FIG. 2A is a block diagram illustrating the construction of a conventional cell switching apparatus of the output buffer type employing broadcasting dedicated buses. As shown in this drawing, each of the line interface circuits LI comprises an input driver which is fully coupled to all switch output function units SOFU through an input connector and a broadcasting dedicated bus. Each of the switch output function units SOFU is connected one-to-one to an output driver of each of the line interface circuits LI.
In the case where the system has N input connectors, each switch output function unit SOFU is basically provided with an N-input/l-output multiplexer for receiving the maximum N ATM information cells at a time and outputting the received cells one by one according to an internal service manner.
Each switch output function unit SOFU compares a destination address of the information cell received through the input bus with an inherent address thereof. If the two addresses are the same as a result of the comparison, the switch output function unit SOFU accepts the received information cell. However, in the case where the two addresses are not the same as a result of the comparison, the switch output function unit SOFU discards the received information cell.
The representative switches with the above-mentioned construction are shown in FIGS. 2B to 2D.
FIG. 2B is a block diagram illustrating the construction of a knockout switch employing a knockout concentrator, which is disclosed in U.S. Pat. No. 4,754,451. In the knockout switch, the output addresses of input cells to be routed are classified according to log.sub.2 N bits. Also, the input driver of the line interface circuit LI previously translates an output channel identifier. For this reason, separate function circuits must be added in performing the multicasting switching operation. Further, although the output shared buffer has a redundancy, a cell loss is inevitable when an output cell collision occurs. As a result, the performance may significantly be reduced in the case where a burst traffic is applied.
FIG. 2C is a block diagram illustrating the construction of a switch routing module (SRM) of a multi-stage self-routing switch (MSSR), proposed by Fujitsu in Japan. A VCI controller (VCC) at the input stage of the line interface circuit LI analyzes an input cell and outputs cell data with desired output routing information and a translated channel identifier in accordance with the analyzed result. As a result, copied cells cannot have different channel identifiers for the multicasting operation. Also, switch output buffers are multiplexed in a simple hub-polling mechanism manner at the same speed as that of the output driver of the line interface circuit LI, resulting in a reduction in performance in the case where a burst traffic is applied.
FIG. 2D is a block diagram illustrating the construction of a cylinder switch, proposed by Colombia University in U.S.A. The cylinder switch employs ring buffer multiplexing means. For this reason, the cylinder switch has a complex slotted ring mechanism and priority control and cell order maintenance functions for the output control, resulting in a complexity in construction. Also, additional bytes must be appended to cell data to perform such control functions. As a result, the transmission efficiency may be reduced.

Fully-interconnected asynchronous transfer mode switching apparatus

Electronics and Telecommunications Research Institute


A frequency synthesizer consists of a voltage-controlled oscillator and a frequency division and distribution section. The frequency division and distribution section, which splits an oscillation signal of the voltage-controlled oscillator into a transmission modulation local oscillation signal and a reception second local oscillation signal while frequency-dividing the oscillation signal of the voltage-controlled oscillator, includes two pairs of frequency dividers and two switches. The frequency division numbers of the two pairs of frequency dividers are so set as to accommodate all the combinations of mobile communications systems and the transmission modulation local oscillation signal/reception second local oscillation signal. The two switches are switched in accordance with a mobile communications system for which a mobile transceiver is operating. The two local oscillation signals are input to a quadrature modulator and a quadrature demodulator, respectively.

1. Field of the Invention
The present invention relates to a multiple-band mobile transceiver which operates for a plurality of mobile communications systems using different radio frequency bands by switching between transmission and reception radio frequencies.
2. Description of the Related Art
FIG. 3 shows the configuration of a conceivable mobile transceiver which operates for a plurality of mobile communications systems using different radio frequency bands. Reference numeral 1 denotes an antenna; 2 and 3, duplexers corresponding to two respective radio frequency bands; 4 and 5, isolators corresponding to two respective transmission frequency bands; 6 and 7, power amplifiers corresponding to the respective transmission frequency bands; 8, a high-frequency switch; 9, a variable gain amplifier; 10, a transmission mixer; 11, a lowpass filter; 12, a variable gain amplifier; 13, a quadrature modulator; 14 and 15, lowpass filters for I and Q modulation input signals; 16 and 17, I and Q modulation input terminals; and 18, a first local oscillator. Further, reference numerals 19 and 20 denote low-noise amplifiers corresponding to two respective reception frequency bands; 21 and 22, reception mixers corresponding to the respective reception frequency bands; 23 and 24, intermediate frequency filters corresponding to two respective reception intermediate frequencies; 25, an intermediate frequency switch; 26, a variable gain amplifier; 27, a quadrature demodulator; 28 and 29, lowpass filters for I and Q demodulation outputs; 30 and 31, I and Q demodulation output terminals; 34, a local oscillator for transmission modulation; and 35, a second local oscillator for reception.
Signals that are input from the I and Q modulation input terminals 16 and 17 are modulated by the quadrature modulator 13, and then up-converted into a radio frequency by the transmission mixer 10. A resulting signal is subjected to a gain adjustment by the variable gain amplifier 9, and then input to the power amplifiers 6 or 7 selected by the high-frequency switch 8 for the transmission frequency band concerned. An output of the power amplifier 6 or 7 is passed through the isolator 4 or 5, and then input to the duplexer 2 or 3 corresponding to the radio frequency band concerned. Finally, the signal is transmitted from an antenna 1 to a radio base station as radio waves.
On the other hand, a signal transmitted from a radio base station is separated from transmission waves of the mobile transceiver by the duplexer 2 or 3 corresponding to the radio frequency band concerned, amplified by the low-noise amplifier 19 or 20 corresponding to the reception frequency band concerned, and then converted into a signal of the reception intermediate frequency concerned by the reception mixer 21 or 22. An output of the reception mixer 21 or 22 is passed through the intermediate frequency filters 23 or 24 corresponding to the reception intermediate frequency concerned, and then selected by the intermediate frequency switch 25. An output of the intermediate frequency switch 25 is subjected to a gain adjustment by the variable gain amplifier 26, and then converted into I and Q demodulation signals by the quadrature demodulator 27.
However, in the above-configured mobile transceiver, the local oscillator for transmission modulation and the second local oscillator for reception need to be provided as separate frequency synthesizers. This is disadvantageous in terms of the cost and the number of parts.
It is noted that a mobile transceiver is known in which the duplexer 3, isolator 5, power amplifier 7, high-frequency switch 8, low-noise amplifier 20, reception mixer 22, intermediate frequency filter 24, and intermediate frequency switch 25 are omitted from the multiple-band mobile transceiver of FIG. 3.

Multiple-band mobile transceiver having a smaller number of local oscillators

Matsushita Electric Industrial Co., Ltd.


A method for patterning an integrated circuit workpiece comprises depositing a layer of non-photoactive material on the wafer. A reagent is deposited onto the entire surface of the material. A pattern is then created by exposing the surface with an energy source which produces a reaction within the reagent and/or between the reagent and the resin. The unreacted reagent is then removed by either physical or chemical means. Finally, the unexposed material is removed by means of an etch.

There is currently a need to fabricate integrated circuits with extremely small (less than one micron) dimensions. In cases where the wafer topography is uneven or nonplanar, optical imaging problems limit the dimensions possible. Additional problems are caused by the nature of wet etch or development methods. For example, sloped sidewalls of the resist image cause lower image contrast and critical dimension (CD) control in image transfer to an underlying layer.
To meet this problem, trilayer microlithographic processes have been developed. One example is disclosed by P. S. Burggraaf ("Multilayer-Resist Lithography", Semiconductor International (June 1983)) who describes a method for patterning an integrated circuit by first forming a planarization layer of organic material with a depth sufficient to allow a substantially planar outer surface. A second, masking resist layer is spin-deposited on the first layer followed by the deposition of a third imaging layer. The imaging layer is selectively patterned and the pattern is transferred to the masking layer which is then developed. This is followed by an oxygen-based reactive ion etch (RIE) etch to transfer the pattern to the surface of the workpiece.
Several problems are present with the trilayer approach. It is often difficult to remove the second masking layer due to its hardened nature. Also, the creation of undesired particulate matter lowers throughput yields. In addition, although the imaging layer will reduce the depth of field by as much as a factor of two, the technique does not utilize the limits of the optical imaging tool.
Another approach, described by B. Roland et al. is the DESIRE.TM. process. Here a thick, planarizing layer of resist is deposited on the wafer. Silicon is then selectively incorporated from the gas phase into the photo-exposed areas after coating and photo-exposure of the resist. In an oxygen plasma, the incorporated silicon will form an oxide mask that stops etching in the photo-exposed areas.
One problem occurs because a production-worthy deep ultraviolet (UV) resist has yet to be developed. A significant problem with current experimental resists is related to the exposure sensitivity. The light doses, in units of millijoules per centimeter, required to create an image are currently unacceptably high. Low sensitivity results in low throughput and poor image contrast. Moreover, irrespective of the light dosage, resultantly developed image profiles are not acceptable. Also, with this method, the process latitude is not sufficient to meet fabrication process latitude requirements.

Photolithographic method using non-photoactive resins


A motorized wheel spinner having a spinning wheel cover that is attached to a bushing on a shaft of an electric motor. The axis of the wheel, and thus also of the wheel axle, is coincident with the axis of the motor shaft and spinning cover. The motor can be disposed within a tubular axle, within the end of a solid axle, or, alternately, the case of the motor can comprise a surface upon which the wheel itself rotates. The motorized wheel spinner can be selectively rotated or stopped via a remote control.

Automotive wheels have long been adorned with devices that provide an aesthetically-pleasing appearance. For instance, stamped, forged or cast steel wheels (sometimes called wheel rims, rims and/or hubs), wheel covers, or hubcaps, are utilized to enhance the wheel appearance, and may be plated with chromium to provide a bright, non-corroding, aesthetically-pleasing surface, or otherwise may be painted.
More advanced automotive wheel technology has provided wheels cast from aluminum or magnesium; thereby, providing a non-corroding bright polished finish that does not require further surface treatment. Additionally various creative styles of cast wheels, rims or hubs, in the shape of spokes or arms are available, and are popularly utilized to differentiate one owner's vehicle from that of another. Further, rotation of such spokes or arms provides a desired visual appearance of the wheel rotation.
Still even more complex wheel designs are available, most notably wheel spinners. Wheel spinners may resemble the spokes of the wheel/rim or other designs, but instead of being fixed like the actual spokes or arms, the spinner structure rotates on a bearing device, typically attached to the wheel via the existing wheel mounting studs and nuts. Thus, the wheel spinner is free to rotate, even if the underlying wheel is stationary. In use, due to low frictional forces within the bearings, rotation of the wheels during driving conditions causes rotation of the wheel spinner. Additionally, because the bearings have low friction, the wheel spinner continues with briefly-extended rotation once the wheel itself has come to a halt; thereby, providing a visually-pleasing appearance of continued wheel motion.
Unfortunately, available wheel spinners lack a means for continuous rotation during periods when the vehicle wheels are stationary; thus, when such wheel spinners eventually come to a halt, they no longer provide the desired "spinning" appearance. Even manually spinning the wheel spinner will result in only briefly-extended rotation due to the friction of the bearings on which the spinner is carried.
Moreover, although vehicles in motion may have active spinners, vehicles that are displayed at shows usually have stationary wheels and thus no rotation is imparted to the wheel spinner, rendering the spinner an undesirable non-moving wheel modification. Similarly, stationary model/toy vehicles may have spinners that can be briefly rotated, but again, frictional forces rapidly bring the rotating spinner to a halt.
Accordingly, various devices have be utilized in an attempt to overcome the lack of spinner rotation when a vehicle is stationary. These include remote control devices to activate rotation of the motorized wheels of display models, wherein the wheel is not in contact with a surface and thus can be otherwise freely rotated. Such motorized wheels thus cause rotation of the spinner via friction from the rotation of the wheels. However, the spinner cannot be selectively rotated independently from the wheel rotation.
In addition to the desired ability to rotate the spinner, it is further desirable that the spinner not add visual bulk to the wheel. That is, the spinner should lie as flat against the surface of the wheel as is possible to provide a relatively clean, flush appearance.
Therefore, it is readily apparent that there is a need for a motorized wheel spinner that can be remotely controlled by the vehicle owner and operated during periods of wheel rotation (such as when driving) and while the wheels are stationary.


An alkoxide compound of formula (I) suitable as a material for thin film formation used in thin film formation involving vaporization of a material such as CVD, a material for thin film formation including the alkoxide compound, and a process for thin film formation using the material. The process includes vaporizing the material for thin film formation, introducing the resulting vapor containing the alkoxide compound, onto a substrate, and causing the vapor to decompose and/or chemically react to form a thin film on the substrate.

A thin film containing silicon or hafnium is chiefly used as a member of electronic components, such as high dielectric constant capacitors, ferroelectric capacitors, gate insulators, and barrier films.
Processes for forming the above-described thin film include flame hydrolysis deposition, sputtering, ion plating, MOD techniques including dipping-pyrolysis process and sol-gel process, and chemical vapor deposition (hereinafter sometimes abbreviated as CVD). Chemical vapor deposition processes inclusive of ALD (atomic layer deposition) are the most suitable for many advantages, such as compositional controllability, excellent step coverage, suitability to large volume production, and capability of hybrid integration.
MOD and CVD processes use a compound having an organic ligand as a precursor supplying a metal to a thin film. Reported organic ligands include an alcohol having an ether group or a dialkylamino group at the terminal which provides a relatively high vapor pressure and is suited to thin film formation by CVD. As for silicon, a silicon alkoxide compound having an alkoxy-terminated alcohol as a ligand is described in Patent Document 1. Patent Document 2 and Patent Document 3 disclose a titanium compound and a zirconium compound as a metal compound having, as a ligand, an alcohol terminated with an amino group that is a donor group capable of coordinating to a metal atom. A lanthanide compound is reported in Non Patent Document 1
Patent Document 4 discloses an alkoxide compound having a primary amino alcohol as a ligand.

Alkoxide compound, material for thin film formation, and process for thin film formation

Abstract: wherein one of R1 and R2 represents an alkyl group having 1-4 carbon atoms, the other representing a hydrogen atom or an alkyl group having 1-4 carbon atoms; R3 and R4 each represent an alkyl group having 1-4 carbon atoms; A represents an alkanediyl group having 1-8 carbon atoms; M represents a silicon atom or a hafnium atom; and n represents 4.


A control apparatus that controls a control target is provided. The control apparatus includes: a time manager configured to manage time; a counter configured to synchronize with at least one device; a control computation unit configured to execute control computation according to timing indicated by the counter; and a record generator configured to generate a record that includes an observation value that is available to the control computation unit and is related to the control target, time that is indicated by the time manager and is associated with the observation value, and a counter value that is indicated by the counter and is associated with the observation value.

FA (Factory Automation) technology that involves a control apparatus such as a PLC (programmable controller) is commonly used in various fields of production. There is demand for ex-post analysis of data handled by such a control apparatus.
Due to development of ICT (Information and Communication Technology), the amount of data that can be collected and stored by control apparatuses is also increasing. In such a situation, JP 2015-219616A discloses technology for reducing the amount of communication data that is transmitted between a controller and a host data processing apparatus, to avoid increasing the capacities of the network and devices, or avoid providing the network and devices with unnecessarily increased functionality. More specifically, JP 2015-219616A discloses a configuration for transmitting, to a data processing apparatus: time counter synchronization information that includes reference time information and a reference time counter that corresponds to the reference time information; and time counter-added plant device status data, which is plant device status data to which a time counter incremented at intervals of an execution unit time has been added.
JP 2015-219616A is an example of background art.

Control apparatus, data structure, and information processing method


A device (1) for cooling and lubricating components of a vehicle (2) includes at least one housing (3), a coolant sump (4), a first coolant pump (5.1) configured for delivering coolant (6) from a first housing section (A) for accommodating a transmission (12) into the coolant sump (4), a second coolant pump (5.2) configured for delivering coolant (6) from the coolant sump (4) into a coolant line system (8), and a heat exchanger (7) configured for cooling the coolant (6) delivered by the second coolant pump (5.2). The coolant line system (8) fluidically connects at least the second coolant pump (5.2) to the heat exchanger (7) and, at least indirectly, fluidically connects the heat exchanger (7) to multiple coolant outlets (11.1, 11.2, 11.3, 11.4, 11.5) for spraying coolant (6) onto components in the housing (3) that require cooling and lubrication.

An effective cooling of the electric machine is necessary so that an electric machine for driving a vehicle can be operated at high power levels. The waste heat of the electric machine arising at high power levels can be power-limiting for certain applications, for example, electrically driven axles. As soon as the electric machine exceeds a limiting temperature, a control unit of the electric machine typically reduces the power.
For example, DE 10 2017 203 527 A1 discloses a device for cooling and lubricating a transmission for a vehicle, including a transmission housing and at least one input pinion in the transmission housing, which is rotatable about a first axis of rotation, and an output gearwheel, which is rotatable about a second axis of rotation, which is arranged in parallel to the first axis of rotation, and a collection element. The collection element is mounted at the transmission housing in the area of an opening, which is located at the transmission housing, wherein the output gearwheel is brought into contact with a fluid for cooling and lubrication. The collection element includes a projection, wherein the projection is directed toward an outer circumference of the output gearwheel. During a rotation of the output gearwheel, the outflowing fluid is directed into the collection element by the projection.

Device for cooling and lubricating components of a vehicle and drive device having a device of this type


A basement emergency exit assembly has a ladder for exiting from a basement window. The window is held within tracks mounted at the interior of the window frame. By moving the bottom of the ladder away from the wall, the window is permitted to slide down the track out of its frame and the ladder is positioned at an angle for easy egress. The window can either fall directly into a pocket within a wall, or, the tracks can be swung out as the ladder is moved thereby pulling the window out of frame and causing it to slide along the tracks until it is clear of the window opening.

Various designs of emergency exits exist to allow occupants to escape from upper floors of buildings when an emergency, such as a fire, arises. These known emergency exits include crash doors, exterior staircases and extensible ladders. Generally, fire doors and exits are both clearly marked by signs and contain crash handles to allow a simple, understandable escape from a building. They provide security from intruders and a one step release to eliminate confusion or complicated hardware to unlock and open.
While the emergency exits described above are sufficient for escape from the upper and main floors of a building, they are not capable of providing a safe exit from a basement, or below grade, dwelling. Basement apartments, or living areas, have enjoyed a strong increase in most large urban centers in recent years. Typically, basement apartments are built within previously existing houses. Generally, access to the apartment is from an upper floor, by way of an interior staircase. Most apartments, especially those crated within a pre-existing basement, tend to have relatively small windows located high on the wall, nearly at the ceiling.
As is known, exposure to smoke caused by a fire is the most common cause of death and injury to occupants and firefighters. Standard fire safety necessitates that a person stay as low to the floor as possible in a fire to avoid being overcome by the smoke. It is also generally accepted that fire and smoke are disorienting and panic-inducing. Therefore, emergency exits need to be as simple as possible to operate and find. Basement apartments do not, generally, include an emergency exit. It is necessary for occupants faced with a fire, or other emergency, to either exit the building by ascending the staircase to an upper floor, or to access a basement window, unlock, remove or otherwise open the window and then crawl upwards out of the small opening provided. As is apparent, such prior art basement emergency exits expose an occupant to life threatening and unnecessary risks. The occupant must stand at the window to unlock and open the existing windows thereby exposing themselves to high heat and choking smoke conditions which would quickly disable and disorient the occupant and thus endanger their opportunity for escape.
The present inventors are not currently aware of any device which permits an occupant of a basement apartment to easily and reliably open a basement window area from the floor level where the occupant's best conditions for survival exist. Canadian Patent No. 1,116,571, entitled Basement Emergency Exit, provides a set of steps folded flat against a wall. To operate the exit, a tread is grabbed, thereby unfolding the steps. A complicated hinge mechanism simultaneously unlatches a window above the steps, and opens it outwards. The drawbacks of this device include the complexity of the mechanism automatically opening the window, the necessity to ensure that the window is in good operating condition, for example, ensuring that it has not been painted shut, the provision of a number of steps flush against the wall, which can be more difficult to climb than a sloped ladder or regular staircase, and the possibility that the window opening outwardly will be obstructed by snow or some object placed outside the window, thus blocking the exit.


Character recognition is described. In one embodiment, it may use matched sequences rather than character shape to determine a computer-legible result.

A lot of the work that we do today is about information. We do research to gather information, we experiment to create information, and we communicate to share this information. As such, information comes in many forms. Unfortunately, these forms of information are not always accessible to each other. Information on paper is often seen as portable, and easy to interface with. Computers, on the other hand, are able to store much larger amounts of information and to search this faster than a person with paper, in many cases.
Many computers cannot access the vast quantities of printed information, however. One solution to is have a paperless workplace. The idea is that all information is electronic, to which computers will always have access. Paper is still a very useful way of storing and communicating data for people, though, and as such it thrives in modern workplaces. Another approach is Optical Character Recognition (OCR), in which computers are programmed to read from a paper document.
U.S. Pat. No. 5,684,891 exemplifies this approach. OCR systems often image or scan a printed document to create an electronic image of the document. Many systems start by separating the image into meaningful parts, such as text, words, or characters. Some systems, such as U.S. Pat. No. 5,212,739, are able to process a word using specialized techniques (e.g. micro-features of the represented characters). Most OCR systems, however, examine each character individually. Techniques such as matrix matching and feature extraction are used to create a representation of the character from the image. These techniques generally attempt to determine which pixels are unnecessary, or group representative pixels with concepts such as a vector, or center of mass. Often, these representations are compared to known templates, such as in matrix matching. In this way, a computer is effectively able to ask "Does this look more like an 'a' or a 'b' ?" Sometimes, these representations are characterized to determine a most likely match, e.g. "Which character is thin with a dot on top?"
Recently, some techniques have employed substitution ciphers, such as U.S. Pat. No. 6,658,151. These methods are often used for document matching or language identification. This may be because these results are probabilistic estimates and not definitive results. Such a technique may associate each identifier with a character one at a time.
Some of these approaches often require a large amount of image processing, a compute intensive task. Some of these approaches are often unable to identify characters in a font that is very different from those that this system has been programmed to interpret. Many of these approaches are unable to learn about a document as they scan it, e.g. if a scanner doesn't recognize an 'e' the first time, it will not be able to recognize any 'e'.
Thus, there is a need for an approach to character recognition that is more computationally efficient, and is able to make use of information beyond pre-programmed representations of characters. There is also a need for character recognition that may determine multiple characters at a time or to more accurately associate identifiers with characters.

Method and system for character recognition


A voltage-to-current conversion circuit includes an error amplifier (12A) which amplifies a voltage difference between the drains of the first (6) and second (7) transistors of a first current mirror, wherein drain current of the first transistor is proportional to an input voltage (Vin). The output of the error amplifier is connected to the gates of the first and second transistors. A compensation capacitor is coupled between the gate and drain of the first transistor. The drain current of the second transistor flows through a cascode transistor (16) to an input of a second current mirror, an output transistor (31) of which provides a current (Ibias) which is proportional to the input voltage (Vin) as a bias current for the error amplifier, to provide stable operation.

The present invention relates generally to current mirror circuits, and more particularly to precision current mirror circuitry for use in voltage-to-current conversion applications with low power supply voltages.
FIG. 1 shows a conventional voltage-to-current conversion circuit 1 including a voltage-to-current converter 14 that includes an operational amplifier 2, a resistor 4, an N-channel transistor 3, and a conventional P-channel current mirror including P-channel current mirror transistors 6 and 7. The voltage Vin applied to the (+) input of operational amplifier 2 is reproduced across resistor 4, producing a current Iin that flows through transistors 3 and 6 and is equal to Vin divided by the resistance of resistor 4. The current through transistor 6, scaled by the channel-with-to-channel-length ratio of transistor 7 to that of transistor 6, is produced as Iout through the drain of transistor 7. However, this prior art voltage-to-current converter 1 circuit has a lack of voltage "headroom". That is, if VDD becomes too low (e.g., approximately 1.8 volts for a threshold voltage VT of transistors 6 and 7 of approximately 1.0 volts), transistor 3 begins to "saturate". In this case, the gate-to-source voltage, and hence also the drain-to source voltage, of transistor 6, is approximately 0.8 volts. If, for example, Vin is at approximately 1.0 volts, the source of transistor 3 is also equal to 800 millivolts, so the drain-source voltage of transistor 3 is "squeezed" to nearly 0 volts. Under these conditions transistor 3 therefore has very little voltage "headroom" in which to operate properly. As VDD is further reduced, the amplitude range of Vin becomes even further limited.
FIG. 2 shows a known voltage-to-current converter circuit 10 having increased voltage headroom. Voltage-to-converter circuit 14 is the same in FIG. 2 as in FIG. 1. Conductor 5 in FIG. 2 is not connected to the gates of current mirror transistors 6 and 7 as in FIG. 1, but instead is connected to the (+) input of an error amplifier 12, the output of which is connected by conductor 9 to the gates of current mirror transistors 6 and 7. The (−) input of error amplifier 12 is connected by conductor 8 to the drain of current mirror output transistor 7 and to the source of a P-channel cascode transistor 16. The output current Iout flows through current mirror output transistor 7, cascode transistor 16, and output conductor 17. A bias voltage Vbias is applied to the gate of cascode transistor 16. Vbias can be chosen so that the drain-source voltage of transistor 3 can operate without saturating, whereby voltage-to-current converter circuit 10 can operate with much less voltage headroom than the standard voltage-to-current converter circuit 1 of FIG. 1. Specifically, Vbias is set to equal a VGS (gate-to-source) voltage of transistor 3 plus a few hundred millivolts, so that conductor 8 is a few hundred millivolts below VDD.
Error amplifier 12 in FIG. 2 operates to balance the drain-source voltages of current mirror control transistor 6 and current mirror output transistor 7 and creates the gate voltage on conductor 9 needed to produce the correct amount of current in current mirror transistors 6 and 7. Specifically, error amplifier 12 servos the feedback loop so the voltage of conductor 5 is close to the voltage of conductor 8. Therefore, current mirror transistor 6 takes up only a few hundred millivolts of voltage headroom. This is a large improvement over the approximately 1 volt of voltage headroom required by current mirror transistor 6 in FIG. 1. That leaves plenty of voltage headroom for transistor 3 to operate.
The foregoing circuit resembles a two-stage amplifier including a feedback loop with error amplifier 12 as a first stage and current mirror transistor 6 and voltage-to-current converter 14 as a second stage, wherein a compensation capacitor 50 is coupled between the gate and drain of transistor 6, as proper compensation is required in the feedback loop to provide stable amplifier operation. As the magnitude of the current Iin changes from a very high value to a very low value, the transconductance gm of transistors 6 and 7 also decreases roughly proportionately to Iin, but the transconductance of error amplifier 12 remains relatively constant because its bias current remains constant. (Typically, error amplifier 12 has a fixed tail current and therefore a fixed gm.) As is well known to those skilled in the art, the larger the ratio of the gm of the current mirror (which can be considered to be amplifier stage) to the gm of error amplifier stage 12, the more stable the two-stage amplifier circuit is. Therefore, the circuit shown in FIG. 2 can become unstable for the very low values of Iin. Typically, Vin and Iin can vary by a factor of as much as one or two decades (i.e., 10 to 100). When the current level in current mirror input transistor 6 volts falls to a low enough value, the circuit can become unstable.
FIG. 3 shows a prior art voltage-to-current conversion circuit 20 circuit that provides circuit stability over a wide range of values of Iin. In FIG. 3, transistors 22 and 26 and current sources 24 and 28 constitute a common gate amplifier in which the sources of transistors 22 and 26 receive a differential input signal from conductors 5 and 8. Conductor 9 is a high impedance node that needs to be stabilized by compensation capacitor 50. Since conductor 9 is the only high impedance node in the control loop, it can be stabilized over a wide range of current levels. The currents through current sources 24 and 28 flow through current mirror transistors 6 and 7, respectively. A mismatch in the current sources 24 and 28 causes errors in the current flowing through current mirror output transistor 7. The mismatches between current sources 24 and 28 are due to ordinary semiconductor processing techniques, and reduce the voltage-to-current conversion accuracy of voltage-to-current converter 20, especially at low levels of Iin, wherein a particular mismatch can cause a large percentage error in the ratio between Iin and Iout and hence between Vin and Iout.
Thus, each of the prior art circuits shown in FIGS. 1–3 has particular benefits, but each also has its own shortcomings.
Thus, there is an unmet need for an improved, stable voltage-to-current conversion circuit that provides high precision with low power supply voltage.
There also is an unmet need for an improved, stable voltage-to-current conversion circuit that provides high precision at low power supply voltages and avoids inaccuracies due to mismatches in internal current sources caused by semiconductor processing variations.
There also is an unmet need for an improved, stable voltage-to-current conversion circuit that provides high precision with low supply voltages over a wide range of input voltage values and corresponding internal current levels.

Precision current mirror and method for voltage to current conversion in low voltage applications