The present invention provides a method of fabricating a doped semiconductor region comprising selectively implanting a first impurity to form a shallow heavily doped region. The method further comprises selectively implanting the first impurity to also form a deep more heavily doped region, disposed laterally within the shallow heavily doped region and vertically within and below the shallow heavily doped region. In an optional feature of the present invention, the method further comprises selectively implanting a second impurity, wherein the doping profile of the deep more heavily doped region is graded.

Referring to FIG. 1, a flow diagram of a method of manufacturing a doped region of a transistor according to the conventional art is shown. As depicted in FIG. 1, the process begins with various initial steps performed on a wafer, at step 105. The initial steps may include processes such as cleaning, etching, deposition, and the like.
Next at step 110, an oxide layer is formed on the substrate. Typically, the oxide can be formed by any well-known oxidation, deposition, or the like process. Next, at step 115 a polysilicon layer is deposited on the oxide layer. The polysilicon layer can be formed by any well-known deposition process, such as chemical vapor deposition (CVD), or the like.
Next, at step 120, a resist layer is formed on the polysilicon layer. The resist can be any well-known light-sensitive polymer. Next, at step 125, the resist layer is patterned. The resist can be patterned utilizing any well-known lithography process.
Next at step 130, the polysilicon layer is selectively etched to expose portions of the substrate. The polysilicon layer may be patterned by any well-known method, such as dry etching, ion etching, or the like.
Next at step 135, the patterned resist is then removed by applying a resist stripper, which causes the resist to swell and lose adhesion to the surface upon which it is applied.
Next, at step 140, the present embodiment selectively dopes the exposed portions of the substrate. The doping can be performed by any well-known diffusion, implant, or the like process. For example, source and drain regions are defined by openings in the patterned polysilicon layer. An impurity is then introduced into the exposed portions of the substrate utilizing a particle accelerator. In a N-channel implementation, the donor impurity may be phosphorus, arsenic, or the like, having an implanted concentration of approximately 5×1014-5×1015 atoms per cubic centimeter. In an P-channel implementation, the acceptor impurity may be boron, or the like, having an implanted concentration of approximately 5×1014-5×1015 atoms per cubic centimeter. Optionally, the doping may also be utilized to selectively dope the patterned polysilicon layer (e.g., gate and the like).
Finally, at step 145, fabrication proceeds with various subsequent processing steps. The subsequent steps may include processes such as deposition, etching, annealing, cleaning, polishing, metalization, passivation, and/or the like.
Referring now to FIG. 2, a section view of a partially fabricated transistor 200 according to the conventional art is shown. As depicted in FIG. 2, the transistor is fabricated in and about a substrate 205. The substrate may either be p-type or n-type semiconductor material, for n-channel or p-channel respectively.
A thin oxide layer 210 is formed upon the surface of the substrate 205. The oxide layer 210 is typically formed by oxidizing the surface of the substrate. For example, if the substrate material is silicon (Si) and the oxidizing agent is oxygen (O), an oxide layer of silicon dioxide (SiO2) is formed
A polysilicon layer 215 is then formed upon the thin oxide layer 210. The polysilicon layer can be formed by any well-known deposition process. The polysilicon layer is then patterned to form one or more structures, such as a gate, or the like. The patterned polysilicon layer can be formed by any well-known method, such as potolithography and selective etching.
One or more sources 220 and/or drains 225 are then formed by implanting an impurity 230 into the substrate that is left exposed by the patterned polysilicon layer 215. Typically the impurity implant results in a source 220 and/or drain 225 having a substantially uniform doping profile with a depth of approximately 0.1 μm. In a p-type substrate implementation, the doping of the source 220 and/or drain 225 is provided by an impurity 230 such as phosphorus, arsenic, or the like, having an implanted concentration of approximately 5×1014-5×1015 atoms per cubic centimeter. In an n-type substrate implementation, the doping of the source 220 and/or drain 225 is provided by an impurity 230 such as boron, or the like, having an implanted concentration of approximately 5×1014-5×1015 atoms per cubic centimeter.
The doping levels of the source and/or drain regions affect device resistances and capacitances. To reduce the resistance of the source, drain, bitline and/or contact between such, the doping level should be as high as practical. However, high doping levels result in degraded performance of short channel transistors. For example, heavily doped source and/or drain regions result in depletion regions at the source/substrate and/or drain/substrate junctions, which extend primarily into the lightly doped channel region of the substrate. Punch through occurs when the depletion regions of the source/substrate and the drain/substrate junctions meet. Punch through results in a relatively high source to drain leakage current. In the convention art, to avoid punch through the channel length is maintained at a longer length than current fabrication techniques make possible, which inhibits further scaling. Alternatively, the source and/or drain region doping is reduced. However, reducing the doping level results in a higher resistance of the source, drain, and/or bitline. In addition, the diffusion region of each source/substrate and/or drain/substrate junction also comprises a capacitance. The greater that doping level the larger the depletion region of the source/substrate and/or drain/substrate junction. Hence, the high doping concentration results in a high junction capacitance.
As described above, the convention art is problematic in that increasing the doping concentration, to decrease resistance, increases short channel effects. The conventional art is also problematic in that increasing the doping concentration, to decrease resistance, also increases junction capacitance. Thus, there is a need for an improved source and/or drain region providing for reduced short channel effects, reduced source and/or drain region resistance, and/or reduced depletion region capacitance.

Method for manufacturing a double bitline implant


A bag/bed assembly comprising a first layer, which first layer receives and stores a second layer, and a third layer housed entirely within the second layer. Said first layer, when storing said second layer, serves as a seating apparatus. When you remove the second layer from the first layer, the second layer, is spaced out in a fully open position, having a substantially rectangular configuration that serves as a portable bed.

1. Field of the Invention
This invention relates to a bag/bed assembly, that is a portable bedding, that when stored according to the methods of the present invention, is a seating apparatus.
2. Background Information
Various forms and designs of seating devices are readily available. As is various forms and designs of beds. Further, and becoming more popular, are various forms of beds which are marketed as portable bedding. One such form of portable bedding is an air mattress often comprising of a plastic or vinyl cover, and a mechanical means for delivering air to the cover, before the apparatus is suitable for sleeping upon. This is not convenient, and is relatively cumbersome. Further, the mechanical means often requires a source for electricity which may not be available.
The bag/bed assembly according to the present invention departs from the conventional portable bedding concepts and designs, and in doing so, provides an assembly primarily developed for the purpose of providing a portable seating and bedding apparatus without the requirement of either mechanical means or power source. It should be appreciated that there exists a continuing need for a new and improved assembly that is a portable seating and bedding apparatus. In this regard, the present invention substantially fulfills this need.


A deformable mirror includes a reflecting surface disposed on a diaphragm and a diaphragm carrier that supports the diaphragm. The diaphragm carrier defines a non-circular, pressurizable rear surface of the diaphragm.

Reflecting mirrors can have different shapes in order to achieve different focal lengths, and some mirrors have deformable shapes to achieve a variable focal length.
German Patent No. DE 100 01 900 A1 discloses a deformable mirror with a mirror disk and an actuator that engages concentrically on the rear side of the mirror surface. The actuator acts on a ring that is disposed behind the mirror disk and is preferably formed integrally with the mirror disk. The sphere of the mirror surface can be influenced by the cross-sectional geometrical shape of the ring and also by a centrally symmetrical weakening of the mirror disk and by static overpressure of a fluid-filled chamber behind the mirror disk.
According to the technical teaching of German Patent No. DE 39 00 467 A1, the rear side of a mirror can have a cavity and this cavity is pressurized with a larger or smaller pressure to change the geometrical shape of the mirror thereby.
In a deformable mirror according to the teaching of German Patent No. DE 100 52 249 A1, the deformable mirror element is coolable by a medium when used as a laser beam guiding component with a housing with associated mirror element.
Spherical optical elements, such as lenses or mirrors, can only focus beams close to the optical axis with a small imaging error because increasing axial separation increases imaging errors due to spherical aberration. Moreover, increasing separation and enlargement of the angle to the optical axis produces astigmatism.
One known possibility to reduce these imaging errors is to use an additional deflection mirror. As shown in FIG. 5, a generated laser beam 17 can reflect off of a circular reflecting surface of a mirror 18 that can be deformed by pressurization. An additional deflection mirror 19 is required to guide the laser beam 17 at a small angle to the adaptive mirror 18. Two mirrors are required to obtain adjustable focusing of the laser beam in the processing head of the laser-processing machine.
An imaging mirror requires aspherical deformations of the reflecting surface of the mirror for large beam deflecting angles (from the optical axis), in particular 90° deflections, in contrast to spherical mirrors, wherein the aspherical deformations can be generated (e.g., by adaptive mirrors having an elliptical or oval reflecting surface which can be loaded with pressure). Mirrors of this type are demanding to realize.


This invention relates to plant LPAATs, means to identify such proteins, amino acid and nucleic acid sequences associated with such protein, and methods to obtain, make and/or use such plant LPAATs. Purification, especially the removal of plant membranes and the substantial separation away from other plant proteins, and use of the plant LPAAT is provided, including the use of the protein as a tool in gene isolation for biotechnological applications. In addition, nucleic acid sequences encoding LPAAT protein regions are provided, and uses of such sequences for isolation of LPAAT genes from plants and for modification of plant triglyceride compositions are described.

There is a need for improved means to obtain or manipulate fatty acid compositions, from biosynthetic or natural plant sources. For example, novel oil products, improved sources of synthetic triacylglycerols (triglycerides), alternative sources of commercial oils, such as tropical oils (i.e., palm kernel and coconut oils), and plant oils found in trace amounts from natural sources are desired for a variety of industrial and food uses.
To this end, the triacylglycerol (TAG) biosynthesis system in plants and bacteria has been studied. In the cytoplasmic membranes of plant seed tissues which accumulate storage triglycerides ("oil"), fatty acyl groups at the sn-2 position of the triglyceride molecules are incorporated via action of the enzyme 1-acylglycerol-3-phosphate acyltransferase (E.C. 220.127.116.11), also known as lysophosphatidic acid acyltransferase, or LPAAT.
By inspection of the LPAAT activities in isolated membranes from seed tissues, it has been shown that LPAAT specificities vary from species to species in accordance with the kinds of fatty acyl groups found in the sn-2 positions of the respective storage oils. For example, in the seeds of Cuphea species, which accumulate oils containing medium-chain fatty acids, it is possible to demonstrate an LPAAT activity which will utilize medium-chain acyl-CoA and lysophosphatidic acid (LPA) substrates. In contrast, LPAAT activity from the membranes of rapeseed embryos, in which the oil contains fatty acids of longer chain length, uses these medium-chain substrates much less readily, and predominantly uses long-chain unsaturated fatty acids. Similarly the meadowfoam plant (Limnanthes alba) accumulates an oil containing erucic acid (22:1) in all three sn positions and has a seed LPAAT activity able to use 22:1-CoA and 22:1-LPA, whereas rapeseed, which does not accumulate these fatty acids, has little or no such 22:1-utilizing LPAAT.
Similar studies with the enzymes responsible for the sn-1 and sn-3 acylations show that they are much less selective with respect to the substrate chain lengths. Thus, for a specific storage triglyceride in a given plant, the types of fatty acyl groups found in the sn2 position of the oil are determined primarily by the specificity of LPAAT with respect to its acyl-donor substrates, i.e. acyl-CoAs. In addition, the selectivity of the LPAAT towards the acyl-CoAs is also influenced by the nature of the acyl group already attached in the sn-1 position of the acceptor substrates, i.e. the 1-acylglycerol-3-phosphate or lysophosphatidic acid (LPA) molecules.
The characterization of lysophosphatidic acid acyltransferase (also known as LPAAT) is useful for the further study of plant FAS systems and for the development of novel and/or alternative oils sources. Studies of plant mechanisms may provide means to further enhance, control, modify or otherwise alter the total fatty acyl composition of triglycerides and oils. Furthermore, the elucidation of the factor(s) critical to the natural production of triglycerides in plants is desired, including the purification of such factors and the characterization of element(s) and/or co-factors which enhance the efficiency of the system. Of special interest are the nucleic acid sequences of genes encoding proteins which may be useful for applications in genetic engineering.

Plant lysophosphatidic acid acyltransferases


A vehicle door has a door trim panel to conceal a door inner panel. A rod is mounted on the inner panel and associated with the door latch to unlatch the door latch when the rod is pulled. A handle is pivotally mounted on the trim panel and has an arm projecting toward the inner panel. A plurality of door mounting hooks are provided on the lower edge portion of the trim panel for insertion into mating holes provided on the inner panel so that the trim panel is supported on the door in readiness and alignment for tilting of the trim panel into overlying relationship with the inner panel. A molded plastic guide track is mounted on the door inner panel, and a slider connected with the rod is slidably mounted on the guide track. The slider has an open-faced receptacle which opens toward the trim panel so that tilting of the trim panel into overlying relationship with the inner panel causes the arm of the handle to automatically seat within the receptacle and thereby achieve interconnection between the handle and slider. The open-faced receptacle is defined by angled walls which converge toward the bottom of the receptacle so that any misalignment between the arm of the handle and the slider will cause the arm to engage with the angled wall during the tilting movement of the door trim panel into overlying relationship with the door panel to thereby induce sliding movement and self-alignment of the slider with the handle. The guide track has integral snap tab features to attach the guide track to the door inner panel.

It is well known that a motor vehicle door includes a sheet metal door inner panel which mounts a rod connected with the door latch so that pulling on the rod will unlatch the door latch. A conventional door also includes a door trim panel for mounting on the inside of the door inner panel to conceal the inner panel. The prior art has also suggested that the door trim panel carry mounting hooks on the lower edge thereof which fit into mating holes in the door inner panel to support the door trim panel on the door in readiness for tilting of the trim panel into overlying relationship with the inner panel.
It would be desirable to provide an improved vehicle door in which the door handle would be preassembled onto the door trim panel and, upon tilting of the trim panel onto the door inner panel, the handle would be reliably connected with the latch operating rod without any required manipulation by the assembly worker.


The invention concerns a process for the operation of a vehicle unit comprising a motor vehicle to which a trailer is coupled, wherein the motor vehicle is equipped with electronic systems for controlling and/or regulating the operating conditions of the vehicle unit. To improve the maneuverability of such a vehicle unit, it is proposed that the operating conditions attained by the vehicle unit and/or desired by the driver are automatically controlled and/or regulated through the cooperation of the electronic braking system (EBS) and/or the electronic engine output control system and/or the electronic drive-train control (ASS) and/or the electronic steering system (ELS).

The invention relates to a process for the operation of a vehicle unit that consists of a motor vehicle to which a trailer is coupled, wherein the motor vehicle is equipped with electronic systems for the control and/or regulation of operating conditions of the vehicle unit.
Modern motor vehicles are today equipped with a plurality electronic systems. These systems include, among others, an electronic braking system (EBS) within the functional scope of which may belong, for example, an anti-lock braking system (ABS), a drive-slip regulating system (ASR), a drive-dynamic regulating system (FDR), as well as an electronic park-brake system (EPB); an electronic engine output control system (EMS); an electronic drive-train control system (ASS); or an electronic steering system (ELS). Such electronic systems encompass, in known manner, an electronic control unit that detects parameter values relating to the operating conditions of the motor vehicle by electronic sensor devices. In this way, for example, in the case of ABS—the slip of the motor vehicles wheels, in the case of EMS—the rotational speed (rpm) of the vehicle engine, or in the case of ELS—the impact of the steering mechanism is thereby detected. On the basis of the detected parameters, the electronic control unit controls and/or regulates operating conditions of the motor vehicle via corresponding electrical control equipment in order, for example, in the case of ABS—to prevent the locking of the vehicle wheels, in the case of EMS—to modulate the power output of the motor vehicle engine, or in the case of ELS—to adjust the impact of the steering mechanism. So that the individual electronic systems are able to exchange data with each other, the electronic control units are linked with each other via an electronic communication system, such as CAN-Bus.
With modern motor vehicles, in particular so-called SUV's (abbreviation for Sport Utility Vehicles), it is today increasingly the trend that these are employed as towing vehicles for trailers. The so-provided vehicle unit lends itself in various ways to tasks in both practical-fields as well as leisure-fields, as the case may be, whether that relates to, for example, a transport trailer for goods, boats, motorcycles or the like, or for example, to a trailer-home.
Disadvantageous with such a vehicle unit is its reduced maneuverability, which arises as result of the trailer coupled to the motor vehicle.


A first section, a second section, and a third section are provided. A plurality of NAS head substrates are mounted in the first section, arranged along the height direction, and each oriented horizontally. A plurality of logical substrates are mounted in the second section, arranged along the width direction. And power supplies are mounted in the third section. First through third fans are provided respectively corresponding to the first through the third sections, and the flow conduit for the air blown by each of the fans is independent from the flow conduits for the air blown by other fans.

1. Field of the Invention
The present invention relates to a technique for cooling various subjects for cooling within a storage control device.
2. Description of the Related Art
As storage control devices equipped with cooling mechanisms there are, for example, the storage control devices disclosed in Japanese Patent Laid-Open Publication 2002-232177, Japanese Patent Laid-Open Publication 2001-307474, and Japanese Patent Laid-Open Publication Heisei 8-273345.


The present invention provides an aluminum oxide-titanium nitride sintered body having good resistance to electrostatic damage and small variation in volume resistivity. The aluminum oxide-titanium nitride sintered body is mainly composed of 65 to 85% by weight of aluminum oxide and titanium nitride constituting the rest. The average of the sum of the crystal grain sizes of the aluminum oxide and the titanium nitride is 0.4 to 2.0 μm. The aluminum oxide has a mean crystal grain size of 0.5 to 2.2 μm and the titanium nitride has a mean crystal grain size of 0.2 to 1.6 μm.

1. Field of the Invention
The present invention relates to an aluminum oxide-titanium nitride sintered body, a manufacturing method thereof, and magnetic head substrates for hard disk drive (hereinafter, referred to as HDD), ultrasonic motors and dynamic pressure bearings using the same.
2. Description of Related Art
Conventionally, composite ceramics consisting of a combination of aluminum oxide and various metal or non-metal carbides, nitrides or the like has been proposed. For example, materials consisting of a combination of aluminum oxide and titanium carbide, or aluminum oxide and titanium nitride have been used for wear resistant members or slide members due to large hardness, and also used for antistatic members due to conductivity.
Specific applications of the above-mentioned include a magnetic head substrate for HDD. FIG. 5(a) is a perspective view showing a general substrate for a magnetic head and FIG. 5(b) is a perspective view showing a magnetic head. As shown in FIG. 5(a), a magnetic head substrate 50 for HDD consists of a composite ceramics mainly composed of aluminum oxide and titanium carbide or aluminum oxide and titanium nitride. Through film forming processes, a number of magnetic head elements 51 are formed on the surface of the magnetic head substrate 50. Subsequently, through individual cutting in slicing process, a magnetic head shown in FIG. 5(b) is obtained.
Since a magnetic head slider 20 that slides on a recording disk (not shown in the drawings) is formed in the magnetic head 52, the magnetic head substrate 50 needs high resistance to wear. Conductivity is also needed to prevent electrostatic damage to the magnetic head element 51. Furthermore, since the magnetic head slider 20 generally flies about several nm high from a recording disk, it is important to highly precisely process a flying surface 20a through ion milling etc. In FIG. 5(b), 20b represents a groove (rail). However, the rail is not limited to groove-like shape and can be convex.
Another application is the pressure member of an ultrasonic motor or the contact surface of a movable member. An ultrasonic motor is a friction drive motor whose drive source is the vibration of piezoelectric elements. Unlike general magnetic drive motors, an ultrasonic motor is not influenced by magnetism and has a high-resolution positioning capability, small size and large driving force, and therefore it is used in zoom mechanism for cameras and magnetic resonance imaging system for medical use. Since the ultrasonic motor is friction-driven, ceramics excellent in resistance to wear and heat has been used as a material for a pressure member which transfers driving force or a contact surface.
FIG. 6 shows an example of an ultrasonic motor. FIG. 6(a) is a schematic illustration showing one principal surface of a general ultrasonic motor and FIG. 6(b) is a schematic illustration showing the other principal surface. As shown in FIG. 6(a), an ultrasonic motor 60 has four divided electrode films 60b on one principal surface of a piezoelectric ceramic plate 60c with wires connected cater-cornered. As shown in FIG. 6(b), an electrode film 60d is formed throughout the other principal surface, thereby preparing a vibrating body 60e. By applying voltages having different phases to the electrode films 60b and 60d, longitudinal vibration and lateral vibration are generated in the piezoelectric ceramic plate 60c. The combination of these vibrations generates elliptic motion in the pressure member 60a. The elliptic motion in the pressure member 60a is transferred to the contact surface of a movable member so as to move the movable member.
For example, an ultrasonic motor is used for guide apparatus. FIG. 7 is a schematic illustration showing guide apparatus in which the ultrasonic motor shown in FIG. 6 is employed. As shown in FIG. 7, guide apparatus 70 has such a structure that a stage 72 is provided on guide members 71 and that the ultrasonic motor 60 is disposed on the contact surface 72a which is the side surface of the stage 72. The ultrasonic motor 60 transfers driving force from the pressure member 60a to the contact surface 72a, thereby moving the stage 72 from side to side.
Such composite ceramics containing aluminum oxide and titanium nitride as used for the above-mentioned applications has been disclosed, for example, in Patent documents 1 to 4. Some conventional materials for magnetic head substrates have been described in Patent documents 5 and 6. In addition, composite ceramics used for the pressure part of an ultrasonic motor has been described in Patent document 7.
Patent document 1 discloses anti-static ceramics which contains one or more of conductive compounds selected from nitrides and carbides of Ti, Zr, Hf, Nb or Ta in a matrix mainly composed of aluminum oxide, and whose surface resistivity is in the range of 106 to 1010 Ω·cm2. It is disclosed that 4 to 23% by volume of conductive compounds are contained and aluminum oxide substantially constitutes the rest, having a mean grain size of not more than 5 μm. In the field of industrial application, the ceramics is proposed as anti-static ceramics for electronic parts to prevent damages caused by rapid discharge when handling charged electronic parts.
Patent document 2 discloses a magnetic head slider wherein one or more selected from SiC, ZrC, TaC, TiC, NbC or TiN are contained in a composite sintered body of Al2O3-10 mole % MgO, Al2O310 mole % SiO2, MgO-2.5 mole % Nb2O5, Al2O3-5 mole % Nb2O5 and Al2O3-10 mole % TiO2, or any oxide of Nb2O5. It discloses that the magnetic head slider can inhibit the wear of a protection film containing carbon or mainly containing carbon in a magnetic disk. That means, since a protection film containing carbon or mainly containing carbon wears off due to the oxidation of the carbon, it is proposed that the magnetic head slider is formed by using materials whose catalysis is small in accelerating the oxidation of the carbon.
Patent document 3 discloses a substrate for manufacturing a thin-film magnetic head wherein a main component consists of Al2O3, TiO2 or Y2O3, stabilizing ZrO2 and wherein the main component contains 2 to 10% by weight of Er in terms of Er2O3. It also discloses a substrate for manufacturing a thin-film magnetic head, wherein the above main component contains not more than 40% by weight of any one or more selected from SiC, ZrC, NbC, TaC, TiC or TiN. In the substrate for manufacturing a thin-film magnetic head, 2 to 10% by weight of Er2O3 is added to the main component. The reason for this is not clear, but as well as the effect of inhibiting the wear of a protection film containing carbon or mainly containing carbon in Patent document 2, a decrease in chipping during machining process or voids during surface polishing is disclosed.
Patent document 4 discloses conductive ceramics obtained by sintering a composition which consists of a mixture of 5 to 70 parts by weight of Al2O3 ceramics containing Al2O3 only or containing not less than 95% by weight of Al2O3 and as conductive material, 30 to 95 parts by weight of at least one or more selected from ZrB2, ZrC, ZrN, TaB2, TaC, TaN, TiB2, TiC and TiN. It also discloses that the since conductive ceramics have a plus figure in resistance temperature characteristic, it does not cause meltdown by a flush of electric current when applying current and heating and it is suitable for heaters or electric igniters.
Patent document 5 discloses a ceramic sintered body (hereinafter, referred to as AlTiC) wherein a main component consists of 60 to 80% by weight of aluminum oxide and 20 to 40% by weight of titanium carbide and the main component contains zirconium oxide, magnesium oxide, yttrium oxide and calcium oxide. It discloses that the ceramic sintered body has better resistance to chipping during slicing process and that it is a magnetic head substrate having low resistance to cutting during machining process.
Patent document 6 discloses a magnetic head substrate that is composed of a sintered body having not less than 99% by weight of silicon carbide, not more than 0.3% by weight of free carbon content and a relative density of not less than 99%. It also discloses that the magnetic head substrate has a heat conductivity of not less than 100 W/m·K, a Young's modulus of not less than 400 GPa, a mean crystal grain size of not more than 10.0 μm and a volume resistivity of 106 to 109 Ω·cm. It discloses that the magnetic head substrate made of silicon carbide has better heat radiating property while maintaining mechanical strength and milling property equivalent to the magnetic head substrate made of AlTiC disclosed in Patent document 5;
Patent document 7 discloses an ultrasonic motor which comprises a vibrating body and a pressure member to transfer the vibration of the vibrating body to a movable member and wherein the pressure member is composed of a composite material of aluminum oxide and titanium carbide. It discloses that the pressure member composed of this composite material makes it possible to inhibit the wear of the pressure member and stabilize the condition of contact. It further discloses that titanium carbide reacts with oxygen in the atmosphere by frictional heat during sliding and turns into titanium oxide having larger coefficient of friction than aluminum oxide or titanium carbide, making it possible to lessen the slip between the pressure member and the movable member side and to transfer driving force without loss.                [Patent document 1] Japanese Unexamined Patent Publication No. 4-230904        [Patent document 2] Japanese Unexamined Patent Publication No. 5-2730        [Patent document 3] Japanese Unexamined Patent Publication No. 6-28632        [Patent document 4] Japanese Unexamined Patent Publication No. 59-78973        [Patent document 5] Japanese Unexamined Patent Publication No. 1-219059        [Patent document 6] Japanese Unexamined Patent Publication No. 2001-56919        [Patent document 7] Japanese Unexamined Patent Publication No. 2003-18870

Aluminum oxide-titanium nitride sintered body, manufacturing method thereof, and magnetic head substrate, ultrasonic motor and dynamic pressure bearing using the same


Method system and apparatus, including computer programs encoded on a storage device, for integrating a display device with a connected-home monitoring system. The method including receiving, by the source programming interrupt unit and from a monitoring unit of a property monitoring system, a source programming interrupt message that was (i) generated by the monitoring unit and (ii) includes instructions for the source programming interrupt unit to modify source programming received by a source programming unit, obtaining, by the source programming interrupt unit, image data that depicts a portion of the property that is associated an event detected by the monitoring unit, modifying, by the source programming interrupt unit, source programming received by the source programming unit to include the image data, and providing, by the source programming interrupt unit, the modified source programming to the display device for output on the display of the display device.

A variety of different types of events can occur at a property. Some events may result in theft of, or damage to, personal property and real property. Such events may include a fire, a flood, a home invasion, or the like. Other types of events may occur that do not involve theft or damage of personal property or real property. Such events may include, for example, the ringing of a doorbell, a garage door left open, or receipt of a message on a user device.

System and method for integration of a television into a connected-home monitoring system


A virtual first in first out (FIFO) direct memory access (DMA) device applied in an electronic device having a processor, a UART unit and a virtual FIFO unit is provided. In the virtual FIFO DMA device, a DMA unit is for transferring data between the UART unit and the virtual FIFO unit. A virtual FIFO controller, which has a read pointer and a write pointer, is electrically connected with the DMA unit. When the DMA unit reads data from or writes data into the virtual FIFO unit, the virtual FIFO controller correspondingly changes the value of the read pointer or the write pointer. A virtual port is electrically connected to the DMA unit and the processor. A processor reads data from or writes data into the virtual FIFO unit via the virtual port and the DMA unit.

1. Field of the Invention
The invention relates to a direct memory access (DMA) device, and more particularly to a virtual first in first out (FIFO) DMA device.
2. Description of the Related Art
Referring to FIG. 1, a block diagram of a conventional electronic device during UART transmission. To transmit a first data through a UART unit 110, the higher layer software task 102 firstly calls a UART driver and makes the UART driver fill the first data into a buffer 104, which can be a ring buffer or a double buffer. When the first data has been completely filled into the buffer 104, the UART driver updates a buffer pointer set by the UART driver to a next address. Through the DMA unit 106, the first data stored in the buffer 104 is transferred to and stored in the UART first in first out (FIFO) unit, wherein the UART unit 110 serially outputs the first data. Here, the data transfer between the buffer 104 and the UART FIFO unit 108 can be performed by either the DMA unit 106 or a processor. Normally, the DMA unit 106 is more efficient in transferring data.
In a complicated electronic device, however, it is possible that multiple higher software layer tasks 102A and interrupt service routines (ISR) 112 might use the same UART unit 110 to transmit data, as shown in FIG. 2. Under such circumstance, the data stored in the buffer 104 might be overwritten, resulting in data error. If the ISR 112 has a second data that needs to be transmitted by the UART unit 110 when the first data of the higher layer software task 102A is being filled into the buffer 104, the ISR 112 calls the UART driver to store the second data into the buffer 104. Not until the first data of the higher layer software task 102A has been completely filled into the buffer 104 does the UART driver start to update the buffer pointer. Consequently, the second data is written into the buffer 104 according to original buffer pointer, and therefore the first data, which has been written in the buffer 104, is overwritten. After the UART driver has written the second data of the ISR 112 into the buffer 104, the higher layer software task 102A continues to write the first data into the buffer 104 and therefore will overwrite part of the second data. Accordingly, data loss between the first data and the second data, written in the buffer 104, will result in data error.
There are two conventional methods of solving the data error in the buffer 104. The first method is disabling the ISR 112 to prevent the occurrence of data error before the higher layer software task 102A starts to call the UART driver. However, since the ISR 112 might need to be executed in real-time, if the system fails to process the ISR 112 promptly, it will cause a system error.
The second method involves the use of two buffers. Referring to FIG. 3, a block diagram of using two buffers for UART transmission is shown. The second data of the ISR 112 is written in the buffer 104A, while the first data of the higher layer software task 102A is written in the buffer 104B. By controlling the multiplexer 114, the first data and the second data are alternately transferred to the UART FIFO unit 108 and are further transmitted out by the UART unit 110. However, this method requires more memory space for the buffer and the control of the UART driver is more complicated.
Apart from data loss and data error that might occur during UART transmission, the conventional electronic device also has several problems during UART reception. Referring to FIG. 4, a block diagram of a conventional electronic device during UART reception. After a UART unit 410 receives a third data, the third data is temporarily stored in a UART FIFO unit 408, and then a DMA unit 406 will transfer the third data to a buffer 404. After the DMA unit 406 has transmitted the data of a pre-set length to the buffer 404, the DMA unit 406 notifies a processor 416 to read the data stored in the buffer 404. For example, whenever the DMA unit 406 transmits data of 500 bytes to the buffer 404, the DMA unit 406 notifies the processor 416 to read the data stored in the buffer 404.
However, since the length of the third data received by the UART unit 410 is unpredictable, the DMA unit 406 is unable to determine whether the third data has been completely received. For example, assume the length of the third data is 700 bytes. After the DMA unit 406 transmits the first 500 bytes of the third data, the DMA unit 406 notifies the processor 416 to read the data stored in the buffer 404. However, after the DMA unit 406 transmits the other 200 bytes of the third data, the DMA unit 406 will not notify the processor 416 to read the data stored in the buffer 404 because the length of received data (200 bytes of the third data) does not reach the pre-set length and the DMA unit 406 can not determine that the third data has been completely received. Therefore, the processor 416 has to periodically detect the status of the UART FIFO unit 408 so as to determine whether the UART FIFO unit 408 is empty (because the data has been moved to buffer 404). Besides, the processor 416 further determines whether the UART FIFO unit 408 has been in the empty status for a predetermined period. If so, it represents that the data has been received completely. At this time, the processor 406 reads the data stored in the buffer 404 to process the data.
Before the processor 416 detects the status of the UART FIFO unit 408, the processor 416 has to disable the DAM unit 406 first to prevent incorrect detection due to the movement of data by the DAM unit 406. Before disabling the DAM unit 406, the UART unit 410 has to be disabled first and sends a signal to notify the transmitting end to cease the transmission of data.
However, if data happens to be transmitted to the UART unit 410 when the DMA unit 406 is being disabled, the DMA unit 406 is unable to transfer data from the UART FIFO unit 408 to the buffer 404. Under this circumstance, the data stored in the UART FIFO unit 408 might overflow, causing data loss. To prevent data loss, a buffer of at least 16 bytes must be reserved for the UART FIFO unit 418.
On the other hand, if the processor 416 is used to transfer data from the UART FIFO unit 408 to the buffer 404, the UART FIFO unit 408 must be enlarged lest the processor 416 might be frequently interrupted in order to process data transferring because the UART FIFO unit 408 is easily filled up. However, this will further increase the cost.
To summarize, during UART transmission, the UART driver of a conventional electronic device might be unable to update the buffer pointer promptly, resulting in data error as parts of data are overwritten. During UART transmission, (1) the processor 416 must periodically detect the status of the buffer 404 and the UART FIFO unit 408, hence reducing the efficiency of the processor 416; (2) when the DMA unit 406 is disabled, an extra buffer of 16 bytes must be reserved for the UART FIFO unit 408 to prevent the UART FIFO unit 408 from data overflow. It will consequently increase the cost and the chip size of the UART FIFO unit 408.

Virtual first in first out (FIFO) direct memory access (DMA) device, electronic device and memory access method using the same


A method and resulting device for reducing an electrical field at an isolation gap in a capacitive actuator includes providing a bottom electrode layer and forming a pattern in the bottom electrode layer having an isolation gap between center and outer electrode components of the patterned electrode. A spacing material is deposited in the isolation gap, the spacing material having a greater height than a remainder of the patterned electrode, and a sacrificial material is deposited conformably on a surface of the patterned electrode and spacing material. The method also includes applying a deformable electrode to a surface of the sacrificial material, whereby removal of the sacrificial and spacing materials results in a greater spacing between the deformable electrode and the electrode layer at a region of the isolation gap than over a remainder of the spacing between the patterned electrode layer and deformable surface.

In the field of electrostatic actuators, a device can be formed of repeating layers of structural, sacrificial, and dielectric materials which are patterned and stacked to form complex three dimensional structures. Electrostatic actuators can typically include a lower electrode opposed by a deformable upper electrode. In order to arrive at such a structure, the lower electrode can be patterned to include isolation gaps between adjacent electrode structures. A sacrificial material can be layered on the lower patterned electrode prior to depositing the upper deformable electrode.
It is a problem in the art, however, that the sacrificial material flows into and conforms to a surface variation of the isolation gaps or "cuts" in the electrode. When the upper electrode is deposited, the surface variation mimics that of the sacrificial material and in some instances can even become exaggerated. The flowing of the sacrificial material into the isolation gaps therefore causes a gap between the spaced electrodes to have a smaller distance therebetween at the location of the isolation gap. This coupled with a known field concentration at the corner of the cut in the electrode, combine to make the location a very likely target for air breakdown, killing the device, or at least changing its behavior over time. In addition, the corners can cause problems in subsequent depositions. For example, a lip can form in a subsequent layer on a high end of the cut, the lip increasing in size over multiple depositions. When the top electrode is deposited, it fills these cracks and results in very sharp protrusions, which resemble stalactites. It is these "stalactites" which can short the device, causing premature breakdown or at least changing device behavior over time.
Current solutions to the problem include chemically mechanically polishing (CMP) any excess of the deposited sacrificial material, thereby filling holes in the bottom film and eliminating the topography of the sacrificial material. However, CMP is an expensive and potentially dirty process. Accordingly, alternatives to CMP are sought.
Thus, there is a need to overcome these and other problems of the prior art and to provide a method and apparatus for minimizing electric field concentration in MEMS devices, particularly at an edge of an isolation gap of a patterned electrode.

Electric field concentration minimization for MEMS


A stepping motor type instrument 6 has driving circuits 3, 4 for driving a stepping motor based on a digital signal corresponding to a measurement quantity and a needle 9 fixed to a driving shaft end of this stepping motor indicates the measurement quantity by pointing out a graduation 8 on a character panel 7 corresponding to the measurement quantity. Further this stepping motor type instrument contains processing means 3 in which a digital signal corresponding to the measurement quantity is input and converted to an indication angle data at a predetermined frequency, and delay means 4 in which a difference between continuous indication angle data front and back output by the processing means 3 at the conversion frequency is obtained and if the difference is larger than a predetermined value, the signal is converted so that its change is less than the predetermined value and continuous indication angle data is output, thereby preventing a step-out and carrying out operation securely following a change in the measurement quantity.

Generally, in this type of the instrument, a needle fixed to a driving end of an instrument movement is rotated corresponding to an input signal and a measurement value is indicated by a correspondence to an indicator panel marked with a numeral or graduation indicating a quantity to be measured.
Particularly in the stepping motor, stepping operation of its magnet rotor is determined depending on the number of teeth of a comb tooth yoke and its formation pitch. To ensure a smooth rotary operation, the number of teeth is increased so as to make fine comb tooth pitch or so-called micro step driving is executed by driving signals. These styles are selected by an allowable size of the stepping motor depending on use condition or cost including the driving circuit.
Further, such a stepping motor is desired to be of small size regardless of any application purpose. Because a so-called PM type stepping motor is simply structured, the stepping motor has been easy to use because of improvement of the rotor magnet and comb tooth yoke.
Against digitalization (microcomputer control) of a processing circuit, a stepping motor in which pulse signal control is carried out has attracted public attention as a movement of an indication instrument in which an indicated value is read out by a needle by correspondence to a graduation on the character panel. For example, this is applicable for a traveling speed indicator or engine rotation meter of a vehicle and further by A/D processing on detection signals, it can be used also for a fuel gauge and thermometer. Currently, various proposals have been made for practical application as disclosed in Unexamined Published Japanese Patent Application No. 61-129575, Unexamined Published Japanese Patent Application No. 1-223312.
In a case when the stepping motor is used as a movement of an instrument like this one, unlike a vector follow-up type in which a rotary magnet follows in a direction of synthesis vector of a coil magnetic field like a cross coil type instrument, in many cases, a change amount of each predetermined frequency of input signal is obtained and a stepping drive is executed by each change amount. Because the magnetic pole of the rotary magnet is driven for each pitch of the comb tooth yoke or by micro step processing between the pitches, and therefore a general structure employed is that a position of the rotary magnet when power switch is ON is assumed to be an initial value (in an indication instrument, start point initialization processing is carried out by forcibly returning to a zero position on the character panel) and then the stepping drive is executed by each incremental or decremental amount of the input signal from this start point.
Therefore, due to mechanical influences upon the rotary magnet by external vibration on an instrument device, the angular position is deviated from that controlled by stepping drive from a start point, namely deviated from a proper positional relation between the comb tooth yoke and magnetic pole of the rotary magnet, so that the angle may deviate by one pitch. If such an angular deviation or so-called step-out occurs, the proper angular position is never indicated until start point is initialized by turning on the power, so that an angle including an error due to the step-out is indicated.
This kind of step-out phenomenon occurs when the rotary magnet does not follow up a change in input signal as well as due to mechanical deflection by external vibration or the like. That is, if a stepping drive torque relative to the rotary magnet of the stepping motor cannot be secured because of structural reason, driving current limitation or the like or if a change in input signal relative to a limit of such a driving torque or angular speed is too large, the rotary magnet cannot follow up so that step-out occurs repeatedly and finally a large angular error is caused.
Particularly in the stepping motor, the stepping motion corresponding to tooth pitch of the comb tooth yoke is basically employed and smoothness is obtained by correcting the waveform of the drive signals. However, such a smoothing processing is only smoothing between the tooth pitches of the comb tooth yoke, and therefore the step-out due to pitch-over still occurs. Thus, when the measurement quantity changes rapidly so that an accompanying change in input signal is rapid, exceeding a follow-up limit of the rotary magnet, the rotary magnet of the stepping motor cannot follow up so that an accurate indication characteristic as an indication instrument cannot be obtained.
Accordingly, it is an object of the present invention to execute securely follow-up of the rotary magnet and make it difficult to induce step-out by delaying the updating signal of the stepping motor if, with respect to indication angle data obtained by a processing means which calculates measurement data and converts to indication angle signal, a change in the data corresponding to a change in measurement quantity is large.

Driving apparatus for stepping motor type instrument


A Japanese character processing system containing an on-screen keyboard which includes an array of base Japanese kana characters of a first kana character set. The first selection of a character key causes the display of the character in base kana form. A second consecutive selection of the same key causes the display of the character in a first variant form. Subsequent consecutive selections of the character cause the display of the character in further variant forms. Variant forms may include voiced, aspirated, or subscripted versions of the base character. A further variant form may include the display of the character in an alternate kana character set.

The Japanese written language contains three separate character sets. Simple Japanese characters representing phonetic syllables are represented by the hiragana and katakana character sets (together referred to as "kana"). Hiragana characters, which are characterized by a cursive style, are typically used for words native to Japan. Katakana characters, which are characterized by a more angular style, are typically used for words borrowed from other cultures, or for emphasis and sound effects. The third character set in Japanese is kanji. Kanji are the complex Japanese characters borrowed from the Chinese language. There are over 9000 kanji characters in the Japanese language. Approximately 4000 kanji are used on a semi-regular basis, while knowledge of 2000 kanji is generally required to read a newspaper or get around in Japan. One additional representation of written Japanese is the roman character or "romaji" character set. Romaji are romanized representations of Japanese words based on the sound of a character, and are typically used only to facilitate electronic input of Japanese characters in a computer, or to aid foreign students in the study of Japanese. The complexity of the Japanese written language poses several challenges for efficient text entry in computers, word processors, and other electronic devices.
Common methods of Japanese text entry for computers and like devices typically require the use of a standard Japanese character keyboard or a roman character keyboard which has been adapted for Japanese use. Both approaches, however, have several disadvantages. A disadvantage of the roman character keyboard approach is that often complex keystroke combinations must be mastered in order to generate the proper Japanese character, since an alphabetical arrangement of roman letters is not a natural order for entering Japanese text. A second disadvantage of this method is that the input romaji text must be converted to Japanese, thus imposing a processing overhead. A disadvantage of standard Japanese character keyboards is the high number of keys required to represent the basic Japanese character set.
The hiragana and katakana character sets each contain 46 base characters. Both sets of kana have identical pronunciations and rules of construction, only the shape of the characters are different to emphasize the different usage of the words. Some base kana characters are used in certain combinations and in conjunction with special symbols (called "nigori" and "maru") to produce voiced and aspirated variations of the basic syllables, thus resulting in a full character set for representing the approximately 120 different Japanese phonetic sounds. If a Japanese keyboard included separate keys for all of the voiced and aspirated variants of the basic syllables, the keyboard would need to contain at least 80 character keys. Such a large number of keys creates a crowded keyboard with keys which are often not easily discernible. If the nigori and maru symbol keys are included separately, the number of character keys can be reduced to 57 keys. However, to generate voiced or aspirated versions of a base character requires the user to enter two or more keystrokes for a single character. Another disadvantage of existing kana keyboards is that typically only one kana set (usually hiragana) may be input directly from the keyboard. Conversion to the other kana set requires a separate conversion operation, thus increasing processing overhead and user interaction. Thus, present methods of text entry through existing Japanese character keyboards involve keyboards which are overly complex and/or require a high degree of user interaction.
Many electronic devices are making increased use of on-screen or "virtual" keyboards to facilitate text entry. This is especially true with devices such as Personal Digital Assistants (PDA's), or computer or communications devices which feature minimal keyboards or keypads for text entry. On-screen keyboards are also used in computer-based communications systems in which a standard computer monitor and keyboard are not utilized. Examples of such systems include the Network Computer (NC) and similar dedicated network server systems. An on-screen keyboard is a picture of a keyboard with each key represented as a separate selectable graphic object. A cursor control device, such as an arrow button or similar directional control, is used to move a cursor or similar on-screen indicator to select a particular character. In a typical text entry situation, the cursor is moved to a desired key with the direction controls, and that key is then selected or entered using a separate button on the device. This process is then repeated for each letter in the word.
Existing systems which use a full Japanese character arrangement for on-screen keyboard implementations pose special problems because of the inherent display and text entry constraints of on-screen keyboards. For example, the implementation of a standard Japanese on-screen keyboard would may produce a crowded display of character keys which would be difficult to distinguish in a low-resolution or limited screen area.
It is therefore desirable to provide a system which allows the entry of Japanese kana characters into an electronic device with a keyboard which features a minimum number of Japanese characters, thereby reducing the display area occupied by the keyboard, minimizing required user input, and speeding the text entry process.

Japanese text input method using a keyboard with only base kana characters


Solid electrolyte antiperovskite compositions for batteries, capacitors, and other electrochemical devices have chemical formula Li3OA, Li(3-x)Mx/2OA, Li(3-x)Nx/3OA, or LiCOXzY(1-z), wherein M and N are divalent and trivalent metals respectively and wherein A is a halide or mixture of halides, and X and Y are halides.

Gel-liquid chemical systems are the electrolytes present in lithium batteries and other electrochemical devices. Gel-liquid chemical systems may include solvents, and the systems utilize solvated lithium ions for ion conduction. To deliver energy at a high rate, these electrolytes must sustain a high capacity for rapid transport of lithium ions to and from the electrodes of the batteries over a broad range of temperatures.
Solvents in lithium batteries promote rapid lithium transport but have certain drawbacks, namely that they can limit the applied voltage, they can allow the formation of lithium dendrites that can short the electronics, they do not allow for operation at high temperatures, and they can leak out of the battery. Improvements in lithium ion transport in solid electrolytes to reach a super-ionic state would allow the application of a lithium metal anode to improve battery performance in terms of high energy density, high temperature function, no electronics shorting, and no fluid leakage. Enhanced lithium transfer rates would boost ionic conduction and thus improve the battery performance in terms of high power capacity. Accordingly, there is a long-felt need in the art for improved electrolytes.

Anti-perovskite solid electrolyte compositions


Systems and methods for controlling congestion of a data network are provided. An engine round-trip time (RTT) and a fabric RTT for a network flow are determined. An engine-based congestion window size for the flow is determined based on the engine RTT and a target engine RTT. A fabric-based congestion window size for the flow is determined based on the fabric RTT and a target fabric RTT. The smaller of the engine-based congestion window size and the fabric-based window size is selected for use in transmitting a future packet associated with the flow. The target engine RTT is determined based in part on the current congestion window used to transmit packets for the flow and/or the target fabric RTT is determined based on a number of hops packets associated with the flow traverse from a source to a destination associated with the flow.

Datacenter networks may include network devices that direct the transmission of data in the form of packets from a source (e.g., a computer, a server, a datacenter, a router, etc.) to a destination (e.g., another computer, another server, another datacenter, another router, etc.). The network devices determine how the data is transmitted from the source to the destination. Typically, the management of packet transmission is carried out on a per flow basis. A network flow refers to a unique stream of data packets that make up a distinct communication stream between two end points. A flow is typically identified by a 5-tuple of information. For example, for TCP flows, the 5-tuple of information for a flow typically includes a source internet protocol (IP) address, source port number, destination IP address, destination port number, and a protocol identifier. For other types of flows, other header data fields can be used to define the 5-tuple. For example, for some protocols, instead of source and destination port numbers, the 5-tuple may include source and destination MAC addresses.
One aspect of packet transmission management common to several network protocols is the setting of a congestion window size. The congestion window size governs how many data packets can be transmitted for a given flow before some of the packets are acknowledged as having been received by the destination network device. Generally, the network devices tend to reduce the size of the congestion windows of flows they are handling as congestion increases, and to increase the size of the congestion windows as congestion decreases. Typical congestion window management techniques, however, fail to adequately distinguish between different sources of congestion, particularly in the context of cloud computing.

Congestion control for low latency datacenter networks


A device for evaluating periodic signals from inductive pick-ups compensates for the lag of the pick-up signal. This lag increases with increasing frequency as a consequence of the inductance of the pick-up, with respect to the position of a movable part that is to be scanned by the said pick-up. The relative time shift in the evaluation edge of the pick-up signal, which is phase-compensated via the frequency, is compensated for via changes in the amplitude of the pick-up signal.

The present invention proceeds from a device for evaluating periodic signals from inductive pick-ups which has a peak detector. The pick-up signal can be applied from the output of the inductive pick-up in order, as a function of the pick-up signal amplitude, to influence the transition from a first to a second logic state at the output of a downstream pulse former stage having two inputs. It is possible to feed the first input with a variable reference signal and the second input with the pick-up signal.
German Patent 2,235,056 discloses a circuit arrangement for an inductive pick-up. Variation in the external magnetic conditions due to parts that are moved past periodically induces an AC voltage in this pick-up. The circuit has a trigger circuit which then converts this AC voltage into a pulse train of the same frequency. For this purpose, the AC voltage is applied to the input of a peak detector which forms from the peak value a proportional direct voltage which is fed to the trigger circuit in order to influence its turn-on level such that the peak value of the AC voltage still just causes the trigger circuit to change state. A fundamental disadvantage of this circuit arrangement is that it does not eliminate the phase error which is caused by the frequency-dependent inductive reactive component of the internal impedance of the pick-up and is speed-dependent, which generally means frequency-dependent.
The printed publication "Motor-Elektronik", 1983 published by Robert Bosch GmbH, discloses a device for evaluating periodic signals from inductive pick-ups. An example of such a pick-up described there is a crankshaft angle pick-up which transmits a speed-analog AC voltage. In order to be able to process this AC voltage in an electronic control unit, the AC voltage is converted by means of a Schmitt trigger into square-wave current pulses; the fixed hysteresis of the Schmitt trigger simultaneously increases in this arrangement the insensitivity with respect to specific disturbances. Disturbances which reach beyond the hysteresis threshold of the Schmitt trigger lead, however, to missing pulses at the output of the Schmitt trigger.
German Offenlegungsschrift 3,433,777 describes an improvement in this regard in which a trigger threshold of the Schmitt trigger is shifted as a function of the signal of a peak detector. The result is an adaptive pulse shaping which depends on different pick-up amplitudes and is intended to offer an improved interference immunity. Furthermore, it is proposed in the case of a desirable phase-accurate detection of the pick-up signal permanently to set a trigger threshold of the Schmitt trigger, in particular at the zero crossing of the pickup voltage.
A disadvantage of this known device is that it does not eliminate the frequency-dependent phase error mentioned above. In this device, a "phase-accurate detection" is possible respectively at a specific speed of a rotation element to be monitored or at a fixed frequency of the pick-up signal only to the extent that this is taken to mean an unambiguous coordination between the instantaneous voltage and position of the rotation element whose rotary position is to be scanned.
It is an object of the invention to provide a device for evaluating periodic signals from inductive pick-ups which have a substantially reduced phase error in the overall nominal frequency range of periodic input signals.
This and other objects are achieved by the present invention which provides a device for evaluating periodic signals from inductive pick-ups. This device has a peak detector to which a pick-up signal can be applied from an output of the inductive pick-up in order to influence, as a function of the pick-up signal amplitude, a transition from a first to a second logic state at an output of a downstream pulse former stage having first and second inputs. The first input is provideable with a variable reference signal and the second input with the pick-up signal. A pulse generator stage receives the pick-up signal as an input and generates at an output pulses at a repetition frequency which corresponds to the frequency of the pick-up signal. A weighting stage combines the signals from the output of the peak detector and from the output of the pulse generator to form a variable reference signal in a predetermined fashion.
An important advantage of the device according to the present invention is that the lagging of the periodic signal of an inductive pick-up in the case of increasing frequency, for example in the case of increasing speed of a part that is to be continuously scanned, is compensated for. As a result, for example, the absolute reference error between the actual position of the part to be scanned and the instantaneous value, characterizing this position, of the pick-up signal is reduced. An integral part of this process, which further increases the reference accuracy, is an exertion of influence, on a signal edge provided for further processing, as a function of the amplitude of the pick-up signal.
Other objects, advantages and novel features of the present invention will become apparent from the following detailed description of the invention when considered in conjunction with the accompanying drawings.

Device for evaluating periodic signals from inductive pick-ups having a pulse former stage influenced as a function of the pick-up signal amplitude


A floating body memory includes a semiconductor substrate having a cell region and a peripheral circuit region. A floating body cell is located in the cell region and a first floating body is located in the peripheral circuit region of the semiconductor substrate. A peripheral gate pattern is positioned on the first floating body. First source and drain regions are positioned at both sides of the peripheral gate pattern. First leakage shielding patterns are positioned between the first floating body and the first source and drain regions, the first source and drain regions contacting the first floating body. The first leakage shielding patterns may be positioned outside outer edges of the peripheral gate pattern.

1. Field of the Invention
The present invention relates to a semiconductor device and a method of fabricating the same, and more particularly, to a floating body memory having leakage shield patterns and a method of fabricating the same.
2. Description of the Related Art
In general, a semiconductor memory includes a cell region and a peripheral circuit region. Memory cells are located in the cell region, and driving devices necessary to operate the memory cells, such as transistors, are located in the peripheral circuit region.
Dynamic random access memory (DRAM) cells, which is a type nonvolatile memory device, are widely used as the memory cells. Typically, DRAM cells include one capacitor, one transistor and interconnections. However, the trend toward lightweight, thin, short and small electric appliances has created a demand for more highly integrated DRAM cells. In other words, a great number of DRAM cells must be formed in a restricted space. However, highly integrating the DRAM cells presents a number of difficulties.
For example, the capacitor of a DRAM cell includes an upper electrode, a lower electrode and a capacitor dielectric layer. The upper and lower electrodes have an overlapping region. The capacitor dielectric layer is interposed between the upper electrode and the lower electrode. The capacitance of the capacitor is directly proportional to the size of the overlapping region, and inversely proportional to the thickness of the capacitor dielectric layer. Therefore, the capacitor requires a minimum area based on capacitance requirements.
To address this limitation, single transistor floating body DRAM cells have been researched. A single transistor floating body DRAM cell stores data in a floating body, and does not use the capacitor. Therefore, the single transistor floating body DRAM cell has a more advantageous structure for high integration than the capacitor DRAM cell.
The single transistor floating body DRAM cell includes a buried insulating layer on a semiconductor substrate. An isolation layer, a floating body, and source and drain regions are positioned on the buried insulating layer. A gate dielectric layer and a gate electrode are sequentially stacked on the floating body. The floating body is electrically isolated by the isolation layer, the buried insulating layer, the gate dielectric layer, and the source and drain regions.
The single transistor floating body DRAM cell stores and reads data using a floating body effect. Excess holes produced due to impact ionization are accumulated in the floating body. The excess holes accumulated in the floating body change a threshold voltage (Vt). Accordingly, the amount of current flowing between the source and drain regions depends on the amount of accumulated excess holes.
However, the excess holes accumulated in the floating body are erased in time through the source and drain regions. Delay in erasing the excess holes is favorable for extending the data retention time of the single transistor floating body DRAM cell. Therefore, extending the time before which the excess holes are erased can improve the data retention characteristics of the single transistor floating body DRAM cell.
Meanwhile, the transistor in the peripheral circuit region requires high-speed operation characteristics. When the source and drain regions of the transistor have large junction areas, a junction capacitance of the source and drain regions increases, which leads to a decrease in the operating speed of the transistor. Therefore, reducing the junction capacitance of the source and drain regions can improve the operating speed characteristics of the single transistor floating body DRAM cell.
An example of a floating body memory is disclosed in U.S. Patent Application Publication No. 2006/0046408 to OHSAWA, entitled "Semiconductor Integrated Device." According to OHSAWA, an NMOSFET, a PMOSFET and a floating body cell (FBC) are provided on a silicon-on-insulator (SOI) substrate.

Floating body memory and method of fabricating the same


Provided is a selectively filtered vision protection system for defense against aircraft laser threats. The system comprises a viewing device having a frame supporting a transparent viewing surface. The frame is configured to be positioned on the face of a user such that the user may see through the viewing surface. A selective filter is positioned adjacent to the viewing surface such that the angle of the field of view of the user is regulated in at least one orthogonal plane. The viewing angle is selected to prevent light transmitted from a light source, located outside of the viewing angle, from being viewed by the user. The selective filter is configured to operate in a first mode for transmitting light unrestricted through the viewing surface, and a second mode to regulate the angle of the field of view of the user in at least one orthogonal plane.

Widespread availability of low-power light sources (e.g., laser pointers, spotlights, searchlights) and other sources of concentrated light led to many recent attacks on aircraft, particularly near airports and high air traffic areas. These attacks may cause harm to pilots and, in some cases to, aircraft. The most likely scenario is when a bright visible laser light causes distraction or temporary flash blindness to a pilot, during a critical phase of flight such as landing or takeoff. Such risk is greatest when the exposure comes during critical phases of flight with high workload: takeoff, approach, landing, and critical or emergency maneuvers. It is also possible that a visible or invisible beam could cause permanent harm to a pilot's eyes. Most attacks happen when aircraft are at low altitudes. Light sources are typically positioned on the ground.
While existing legal mechanisms are designed to heavily penalize laser attackers and other similar attackers, these mechanisms have not been effective in discouraging these individuals, and unfortunately the frequency and severity of attacks continue to rise. Other regulatory measures and restrictions are difficult to implement and have not proved effective against intentional, as well as accidental, shining of lights towards aircraft.
Thus, there exists a need for improved systems and apparatuses for minimizing the harmful effects of lights sources aimed at an aircraft to the pilots of such aircraft.

Viewing protection system for laser threats against aircraft


A listing and locating application is shown and described. The listing and locating application will allow for products to be listed within a listing function. The application will be able to share lists among allowed users. The application will have a GPS system that will allow for the application to display localized maps. The localized maps will display the exact locations of products on the list. The products on the list will be correlated with coupons form the merchant shop. The application further will be enabled to display a direction to locate a specific area or the most direct route through a localized area.

The present invention relates to a listing and location application. More particularly, the present invention provides a listing application that can direct a user to the exact location of an item within a store.
The number of individuals shopping in brick and mortar stores has taken a tremendous dip in view of the rise of internet based companies. These companies have made it extremely easy to locate and purchase products. Many times, the products arrive within only a few days span. These online shops do have the drawback of having to ship items back to the store for a return.
Further, many individuals have difficulty navigating spaces, such as indoor spaces of markets, hospitals, office buildings, and other structures, and may also struggle navigating outdoor spaces such as transportation terminals. These individuals may rely on computing devices, such as mobile phones, to navigate to the space, but once they reach the space, they may become disoriented or otherwise have difficulty finding what they are looking for, such as particular items within the space, as may occur during a shopping trip. In such scenarios, it may be desirable to be able to navigate these spaces through assistance of the mobile phone.
While online shops have the ability to track shopping trends, merchandise sold, and various website metrics, physical store lack many of these same capabilities. This makes it even more difficult for physical location merchants to compete with online marketing and sales forces due to this lack of information. It can be extremely difficult to run the proper ads and have proper product placement without metrics to help ensure that the target audience is being hit.
Consequently, there is a need for an improvement in the art of in person shopping or small area navigation. The present invention substantially diverges in design elements from the known art while at the same time solves a problem many people face when shopping or attempting to find a location. In this regard the present invention substantially fulfills these needs.


A semiconductor device comprising a MOS transistor made at the surface of a p-type silicon substrate with a ridge on the surface of it and covered with an insulating film. The gate electrode of the MOS transistor has a configuration of the ridge covered with the insulating film. The semiconductor further comprises a TFT build under the utilization of the ridge. The channel region of the TFT is formed only on the side face(s) of the gate electrode. The source and drain regions extending across the ridge are disposed on the opposite sides of, and connect to, the channel region. Thus the channel region of the TFT is perpendicular to the surface of the silicon substrate, and the channel current flows parallel to the surface of the silicon substrate. The channel width of the TFT is determined substantially by the height of the gate electrode of MOS transistor, and hence becomes narrower than the minimum processible size. This TFT therefore is capable of size reduction. It has further advantages of reduced short channel effect and less leak current particularly when turned off.

1. Field of the Invention
This invention relates to a semiconductor device, and more particularly to the structure of a thin film transistor (referred to as TFT hereinafter) as active element for high-density integrated circuits.
2. Description of the Prior Art
A MOS transistor of which channel region is of a semiconductor film formed over a substrate is called thin film transistor (TFT). TFT has being developed, for example, as switching matrix element for driving the liquid crystal display. Further with high-level integration of semiconductor device, TFT been becoming noticed because the overlay of a TFT on a transistor previously made at the surface of the semiconductor substrate enables high-level integration of semiconductor device. In particular, for SRAM, it is being in progress to use p-channel TFT as load element instead of conventional load element of polycrystalline silicon (referred to as polysilicon).
The TFT used in conventional semiconductor device has, for instance, such a structure that an insulating film is formed over the surface of a semiconductor substrate, a gate electrode is formed on the insulating film and coated with a gate-insulating film, a semiconductor film is deposited over the gate insulating film, and then source, drain, and channel regions are formed in the semiconductor film. A TFT like this made in such a way that the gate electrode underlies semiconductor film is called "bottom gate type TFT". On the other hand, a TFT where the gate electrode overlies the semiconductor film is called "top gate type TFT". In many cases the channel region is disposed parallel to the surface of the semiconductor substrate. The width and length of the channel is limited to the minimum processible size.
For the purpose of remitting the above-mentioned defect, for example, a TFT of the structure that the channel region made of a semiconductor film formed on the side face(s) of the gate electrode is reported in the 1984's Symposium on VLSI Technology, Digest of Technical Papers, pp. 8-9. It is of bottom gate type. The semiconductor device provided with the TFT is constructed as follows: At the surface of a p-type silicon substrate is made a n-channel MOS transistor which consists of n.sup.+ -type source and drain regions formed at the surface of the p-type silicon substrate, the first gate oxide film formed on the p-type silicon substrate, and a gate electrode formed on the first gate oxide film. The gate electrode is formed from n.sup.+ -type polysilicon.
The TFT is built over the n-channel MOS transistor, and the gate electrode of the latter is used as one common to both transistors. The second gate oxide film formed over the surfaces of the gate electrode, and n.sup.+ -type source and drain regions also constitutes the gate insulating film of the TFT. Over the second gate oxide film is formed a polysilicon film in which the p.sup.+ -type source and drain regions and the channel region of the TFT are formed by ion implantation of p-type impurity perpendicular to the silicon substrate. The channel region is formed on the opposite surface of the second gate oxide film to the side face of the gate electrode. The p.sup.+ -type source region is formed on the opposite surface of the second gate oxide film to the n.sup.+ -type source and drain regions. The p.sup.+ -type drain region is formed on the opposite surface of the second gate oxide film to the gate electrode. The surface of the channel region of the TFT is covered with a silicon oxide film used for side wall, and the remaining surface with silicon oxide film.
In this TFT, channel current flows perpendicularly to the surface of the silicon substrate. The channel length of the TFT depends substantially on the height (film thickness) of the gate electrode, and hence is possible to be smaller than the minimum processible size. The TFT therefore is capable of further size reduction. In the TFT of such structure however, though the channel length is short, the interface between the drain and channel regions is on the second gate oxide film because they are formed on the film. This reflects a great electric field at the drain region end which may be a cause of lowering the characteristics, for example, increasing in leak current.
A proposition for remitting this defect is made in Japanese Patent Laid-Open Application No. Hei. 2-30147. Over a silicon substrate is formed the first insulating film on which a TFT is made. The gate electrode of this TFT is made from polysilicon and formed on the first insulating film. A gate insulating film is formed on the side face of the gate electrode of the TFT, and the second insulating film as sufficiently thick as about 200 nm on the top. Besides a polysilicon film is formed to cover the gate insulating film and the first and second insulating films, and then subjected to ion implantation of p-type impurity perpendicularly to the silicon substrate, in the same way as in the aforesaid report, to form p.sup.+ -type source and drain regions, and channel region of the TFT. In the thus-obtained TFT, the p.sup.+ -type drain region is of offset structure with respect to the gate electrode because of the presence of the second insulating film, which brings a reduced electric field at the end of the p.sup.+ -type drain. This TFT therefore can contribute to improvement in characteristics over the TFT of the aforesaid report.
As an example of applying the TFT described in the aforesaid patent application to a high density integrated circuit, a p-type load element for SRAM is given below. The TFT in which polysilicon film is used as semiconductor film as described above, because of the channel region of polysilicon, is inferior in characteristics to the MOS transistor built at the surface of the single crystal silicon. Since polysilicon has a greater diffusion constant of impurity than single crystal silicon, characteristics of the TFT are poor if it is built to have a short channel length. For building p-channel TFT, ion implantation of B or BF.sub.2 is carried out to form source and drain regions. In this case if ion implantations for source and drain regions are carried out at a distance (referred to as implantation distance hereinafter) of up to 0.8 .mu.m, the off-current of the TFT increases because of the short channel effect. When the end part of the drain region is not of offset structure with respect to the gate electrode, the relationship of off-leak current per channel width to implantation distance along the channel are, assuming drain voltage=-3.3 V, 1 pA/.mu.m, to 0.8 .mu.m, and 10 to 100 pA/um to 0.7 .mu.m. Further 0.1 .mu.m shorter implantation distance causes two or more figures greater off-leak current. In brief, the implantation distances of up to 0.8 .mu.m has little offset-structure effect on off-leak current, and the turn-off will not be caused even at 0 V of gate voltage. On the other hand, at longer implantation distances the short channel effect becomes less, resulting in decrease of off-leak current. Off-leak current therefore tends to be smaller in the TFT having a drain region of off-set structure. Accordingly the TFT described in the aforesaid patent specification is considered to be little practical advantage as far as the actual characteristics are not remarkably improved. It can not meet strict requirement for off-leak current, which the p-type load element of SRAM makes.
Besides in the case, for example, of SRAM, where high-speed operation is required, for example, parasitic capacity is necessary to be as small as possible. In the TFT of the aforesaid report, the coupling capacities between n.sup.+ -type source and drain regions and p.sup.+ -type source region, and coupling capacity between the p.sup.+ -type drain region and the gate electrode are so great as to stand in the way of high-speed operation. In addition in the TFT described in the aforesaid patent specification, the gate electrode of it is used also as the gate electrode of the n-channel drive transistor in the SRAM, and not the first insulating film but the gate insulating film of the drive transistor is formed just beneath the p.sup.+ -type source region of the TFT, and in turn beneath it the source or drain region of the drive transistor is formed, so that the coupling capacity between these and the p.sup.+ -type source region of the TFT is great and stands in the way of high speed operation.

Semiconductor device having improved thin film transistors


A new and distinct cultivar of Ajuga reptans plant named ‘ASAAJ3’ is disclosed, characterized striking green and white variegated foliage with dark green edges and a lighter green pattern in the middle of the leaf. Plants are low growing and compact, having a groundcover habit. This is a low maintenance plant with violet blue flowers. The new variety is a Ajuga, plants are useful for a variety of ornamental purposes, including outdoor containers and landscape.

The new Ajuga cultivar is the product of chance discovery. The new variety was discovered as a naturally occurring whole plant mutation of the parent variety, Ajuga reptans 'White Variegata', unpatented.
The discovery was made in the inventor's garden in Aichi-prefecture, Japan, during Spring of 2015.
Asexual reproduction of the new cultivar 'ASAAJ3' was first performed in Aichi-prefecture, Japan by terminal vegetative cuttings in February of 2016. 'ASAAJ3' has since produced multiple generations and has shown that the unique features of this cultivar are stable and reproduced true to type.


In a method and apparatus for treating an organic liquid waste with a biofilm, the organic liquid waste is dissolved with oxygen under a first pressure higher than an atmospheric pressure to prepare a pressurized oxygen-dissolved organic liquid waste. The pressurized oxygen-dissolved organic liquid waste is depressurized to prepare a depressurized oxygen-dissolved organic liquid waste. The depressurized oxygen-dissolved organic liquid waste contacts the biofilm to prepare a treated organic liquid waste.

1. Field of the Invention
The present invention generally relates to a method and an apparatus for treating organic liquid waste. More specifically, the present invention relates to a method and an apparatus for treating organic liquid waste using a biofilm.
2. Background Information
All of patents, patent applications, patent publications, scientific articles, and the like, which will hereinafter be cited or identified in the present application, will hereby be incorporated by references in their entirety in order to describe more fully the state of the art to which the present invention pertains.
Organic-based liquid waste (hereinafter referred to as an organic liquid waste) is usually treated by an available method so that the treated liquid waste satisfies predetermined emission regulations before the treated liquid waste is then emitted from a factory. The term "organic liquid waste" is defined to be a liquid-state waste including at least one organic-based matter. A typical example of the organic liquid waste may include, but is not limited to, organic wastewater. The predetermined emission regulations include Biochemical Oxygen Demand (hereinafter referred to as BOD). BOD is a measure of the quantity of oxygen consumed by microorganisms such as aerobic bacteria during decomposition of organic matter in water. BOD may also be an index of water pollution. A higher level of BOD represents higher level of pollution in the water. A BOD component is a substance or matter that is subject to oxidation and decomposition by microorganisms, and is included in the organic liquid waste.
The BOD component in the organic liquid waste such as isopropyl alcohol (IPA) and tetramethyl ammonium hydroxide (TMAH) emitted in semiconductor manufacturing processes is oxidized and decomposed by a biofilm method and then discharged from the factory. In accordance with the biofilm method, the BOD component is oxidized and decomposed by a film of aerobic microorganisms that are adhered on a surface of a fixed bed in a reactor. The aerobic microorganisms consume oxygen to decompose the organic matter in the waste. It has been known that air-distribution manifolds are provided in the reactor for supplying oxygen to the aerobic microorganisms.
Japanese Laid-Open Patent Publication No. 5-261394 discloses a conventional method for treating the organic liquid waste. The conventional method utilizes a reservoir vessel, a wet catalyst tower for oxidation, a neutralization vessel, and a high pressure biofiltration vessel for treatment of the organic liquid waste.
The organic liquid waste is introduced into the reservoir vessel. The waste is then fed by a pump to the wet catalyst tower through a first feeding pipe, which connects the reservoir vessel to the wet catalyst tower. The pipe has a half-way connecting portion which is connected with a supplying pipe for supplying an oxygen-containing gas which has been pressurized by a compressor. The waste on the feeding through the pipe is mixed with the pressurized oxygen-containing gas at the half-way connecting portion. The wet catalyst tower has a catalyst bed which is formed by filling a catalyst into a high pressure container. The waste flows through the catalyst bed at a high temperature and under a high pressure, whereby the waste is oxidized. The oxidized waste is then subjected to pH-adjustment in the neutralization vessel. The pH-adjusted waste is then fed to the biofiltration vessel. The biofiltration vessel has a second feeding pipe for feeding the oxidized waste. The biofiltration vessel also has air-distribution manifolds. The biofiltration vessel further has a holder for holding particle-carriers that support microorganisms.
The oxidized waste is introduced through the second feeding pipe into the high pressure biofiltration vessel. The oxidized waste flows in proximity to the particle-carriers with a flow of the air supplied through the air-distribution manifolds. The oxidized waste is treated and filtrated with aerobic microorganisms in the form of a biofilm adhered on a surface particle-carriers, thereby removing the BOD component and CODCr component from the waste. COD means Chemical Oxygen Demand. The biofilm method feeds an organic matter to aerobic microorganisms for growth and multiplication thereof. The activity of microorganisms depends on oxygen, humidity, and nutrition. This means that the capacity of the organic liquid waste treatment apparatus depends on oxygen, humidity, and nutrition. Under atmospheric pressure, 8.8 mg/L of oxygen, which is fed to aerobic microorganisms, is dissolved in pure water. 8.8 mg/L is a maximum concentration at 20° C. A preferable temperature range for aerobic microorganisms to exhibit highest biological activity depends on the types or species of microorganisms. For example, 30-40° C. is preferable. Nitrogen and phosphorous as nutrition are supplied to the aerobic microorganisms at weight ratios of BOD:N:P=100:5:1.
The conditions for oxidation-decomposition reactions by the aerobic microorganisms include an amount of oxygen, humidity, and nutrition. The three conditions are important for the aerobic microorganisms to exhibit higher biological activity. In the conventional biofilm method, oxygen is dissolved in the organic liquid waste under atmospheric pressure. However, just 5-6% of oxygen can be dissolved in the organic liquid waste. Lower concentrations of oxygen dissolved in the organic liquid waste cause the aerobic microorganisms to exhibit lower biological activity.
In accordance with the conventional biofilm method, 1 m3 of the biofilm decomposes approximately 1-2 kg of the BOD component per day even if the temperature and the nutrition are optimized. No higher efficiency of the decomposition can be obtained using a conventional biofilm method. A large scale biofilm reactor is required for containing a large amount of microorganisms. A large space is thus required for installing the reactor.
The conventional method disclosed in the above-mentioned Japanese publication is to oxidize the organic liquid waste with a wet catalyst at a high temperature under a high pressure before the biofilm reactor decomposes the BOD component, which mainly includes a residual organic acid having a low molecular weight. Not only the biofiltration chamber but the wet catalyst tower is required, which shares a large area and requires a high cost.
Air is introduced into the biofilm reactor through the air-distribution manifolds. A uniform supply of oxygen throughout an inner space of the biofilm reactor requires a number of the air-distribution manifolds provided in the biofilm reactor. Each of the air-distribution manifolds has plural oxygen-injection holes that are aligned along an air stream direction. This makes it difficult to realize a desired uniform injection of oxygen from the plural oxygen-injection holes.
Further, sludge of dead microorganisms may block some of the oxygen-injection holes, resulting in a non-uniform oxygen supply to the reactor. This causes a variation in biological activity of microorganisms with a position in the inner space of the reactor. The variation drops the total efficiency of oxidation-decomposition by the biofilm.
In view of the above, it will be apparent to those skilled in the art from this disclosure that there exists a need for an improved a method and an apparatus for treating an organic liquid waste. This invention addresses this need in the art as well as other needs, which will become apparent to those skilled in the art from this disclosure.

Method and apparatus for treating organic liquid waste