A D/A converter for converting a given digital signal into an analog signal includes a plurality of capacitors (C1, C2 . . . , Ci) for storing an electric charge corresponding to a predetermined reference voltage (Vr+or Vr-). The reference voltage is selected depending on the digital signal during a period when a clock .phi.1 is at a high level. A switch selection (SUG1-SUGi, SB) is used to connect each of the plurality of capacitors between an input terminal and an output terminal of an operational amplifier 100 during a period when a clock +2 is at a high level.

1. Field of the Invention
The present invention relates to a digital-to-analog ("D/A") converter, used in signal processing and possibly with audio reproduction technology, for converting a digital signal into an analog signal. The DIA converter may additionally relate to a switched-capacitor D/A converter having low power consumption, and may further relate to a delta-sigma D/A converter using the same.
2. Description of the Related Art
In the manufacture of semiconductor integrated circuits, it is generally easier to produce capacitors than other circuit elements such as resistors, diodes, and the like. A switched-capacitor D/A converter is frequently used to perform D/A conversion, wherein the switched-capacitor D/A converter generates a desired analog signal by controlling the sampling and transfer of electric charge. The electric charge is temporarily placed on a plurality of capacitors using a digital signal, wherein the values of those capacitors are generally set at a predetermined capacitance ratio.
FIG. 1 is a circuit diagram of a conventional switched-capacitor D/A converter. The switched-capacitor D/A converter includes an operational amplifier 10. Amplifier 10 is coupled to have a voltage follower function such that an output terminal of the amplifier is connected to an inverting input terminal. The non-inverting input terminal is operably coupled to a plurality of capacitors C1 to Ci. Each of a plurality of switches SW1 to SWi is coupled to opposite ends of corresponding capacitors C1 to Ci. A plurality of switches SWG1 to SWGi are connected selectively to one of two dissimilar reference voltages Vr+ and Vr-, and also to a clock signal supply section 20 for supplying two kinds of clocks +1 and .phi.2.
As shown in FIG. 3, the two kinds of clocks .phi.1 and .phi.2 supplied from the clock supply section 20 each repeat at high and low voltage levels at a predetermined interval. When one of the clocks is at the high level, the other is at the low level, so that the high levels of the two clocks do not overlap.
The switches SW1 to SWi respectively enter a closed state when the clock .phi.1 is at the high level and otherwise enter an open state. The closed state occurs during a high level of clock .phi.1. Furthermore, the switches SWG1 to SWGi are connected to either of two reference voltage sources Vr+ or Vr-, depending on a polarity (+1 or -1) of digital data S1 to Si. Thus, when the clock .phi.2 is at a high level and the polarity of the digital data Si is "+1", the switches SWG1 to SWGi are respectively connected to the reference voltage source Vr+ (shown by labeling "Si.multidot..phi.2"). On the other hand, when the clock .phi.2 is at a high level and the polarity of the digital data Si is "-1", the switches SWG1 to SWGi are respectively connected to the reference voltage source Vr- (shown by labeling "Sib .phi.2"). Hereinafter, the suffix b represents a logical inversion.
The operation of the circuit shown in FIG. 1 depends on the status of the clocking signals .phi.1 and .phi.2. When the clock 41 is at a high level, the switches SW1 to SWi enter a closed state, and opposite (or both) terminals of all the capacitors C1 to Ci are connected to ground. When the clock .phi.2 is at a high level subsequent to (or before) .phi.1 being high, the switches SW1 to SWi enter an open state. At the same time, due to the operation of the switches SWG1 to SWGi, and depending on the polarity (+1 or -1) of the digital data S1 to Si, the left-hand terminals of the capacitors C1 to Ci are connected to the reference voltage source of either Vr+ or Vr-.
As a result, the distribution of electric charges occur among the capacitors, and since the total sum of the charges at a node Va (at a non-inverting input terminal position of the operational amplifier 10) becomes zero according to the law of charge conservation, the following equation (1) is given: EQU Va-Si.multidot.Vr).multidot.Ci+(Va-Si-1.multidot.Vr).multidot.Ci-1+ . . . +(Va-S1.multidot.Vr).multidot.C1=0 (1)
where Vr is the absolute value of Vr+ or the absolute value of Vr-, and Ci is the capacitance of a orresponding capacitor.
In equation (1), if the capacitance values of the capacitors C1 to Ci are in the binary ratio (i.e., Ci=2.multidot.Ci-1, . . . , C2=2-C1), then the following equation (2) will result: EQU (Va-Si.multidot.Vr).multidot.Ci.multidot.2.sup.i-1 +(Va-Si-1.multidot.Vr).multidot.Ci.multidot.2.sup.i-2 + . . . +(Va-S1.multidot.Vr).multidot.C1=0 (2)
Since the output (OUT) of D/A conversion becomes equal to Va due to the follower operation of the operational amplifier 10, the voltage OUT is given by the following equation (3): EQU OUT=Vr.multidot.(Si.multidot.2.sup.i-1 +Si-1.multidot.2.sup.i- + . . . +S1)/(2.sup.i -1) (3)
As explained above, according to equation (3), the switched-capacitor circuit shown in FIG. 1 performs D/A conversion of i number of bits.
Typically, a parasitic capacitance Cp is present at node Va. Parasitic capacitance is inherent in the manufacture and operation of the switching node, and is shown by the dotted line in FIG. 1. Capacitance Cp induces a term "Va.multidot.Cp" at the left side of equation (2), and a D/A conversion error will result. In practice, parasitic capacitance such as an input capacitance of the operational amplifier 10 will certainly exist. In the prior art shown in FIG. 1, the parasitic capacitance Cp adversely affects the operational accuracy of the D/A converter.
Reference documents which describe the switched capacitor D/A converter of this kind include Van de Plassche, "Integrated Analog-to-Digital and Digital-to-Analog Converters", Kiuwer Academic Publishers, 1994, pp. 229; and, Tsividis, "A Segmented u-255 Law PCM voice Encode Utilizing NMOS Technology", IEEE J, Of Solid-State Circuits, Vol. SC-11, pp. 740-747, December. 1976.
In order to solve the problems arising in the circuit of FIG. 1, a switched-capacitor D/A converter as shown in FIG. 2 may be used. The switched-capacitor D/A converter of FIG. 2 includes an operational amplifier 11 having a capacitor Ctot and a switch SA2 connected between an output terminal and an inverting input terminal of the amplifier. A switch SA1 is connected between the capacitors C1 through Ci and the inverting terminal of the operational amplifier 11. A plurality of switches SR1 through SRi are connected to opposite ends of corresponding capacitors C1 to Ci, and a plurality of switches SRG1 to SRGi are each connected to one of two kinds of reference voltage sources Vr+ and Vr-. A clock supply section 21 is used for supplying two kinds of clocks .phi.1 and .phi.2.
Clocks .phi.1 and .phi.2 supplied from the clock supply section 21 do not differ from those supplied from the clock supply section 20 shown in FIG. 1. Each of the switches SR1 through SRi includes a subswitch (labeled .phi.1) which is connected to a right-hand terminal of the corresponding one of capacitors C1 through Ci. Subswitch .phi.1 enters a closed state when clock .phi.1 is at a high level, and otherwise remains open. Switches SR1 and SRi also include a subswitch (labeled .phi.2) which is connected to a left-hand terminal of the corresponding one of the capacitors C1 to Ci. Subswitch .phi.2 enters a closed state when clock .phi.2 is at a high level, and otherwise remains open.
The switches SRG1 to SRGi are respectively connected to one of the reference voltage sources Vr+ and Vr- depending an the polarity (+1 or -1) of digital data Si. When the clock .phi.1 is at a high level and the polarity of digital data Si is "+1", a respective switch SRGi is connected to the voltage source Vr+ (this situation is indicated by labeling Si.multidot..phi.1). Conversely, when the lock .phi.1 is at the high level and the polarity of digital data Si is "-1", switch SRGi is connected to the voltage source Vr- (this situation is indicated by labeling Sib.multidot..phi.1).
Switches SA1 and SA2 enter a closed state when the clocks .phi.2 and .phi.1, respectively, are at a high level, and otherwise enter an open state. During operation of the circuit in FIG. 2, when the clock .phi.1 is at the high level, switch SA2 and the right-hand subswitches of switches SR1 to SRi enter the closed state, and the right-hand terminals of all the capacitors C1 to Ci are connected to ground. Furthermore, due to the operation of the switches SRG1 to SRGi, the left-hand terminal of the capacitors C1 to Ci are connected to the reference voltage source Vr+ or Vr- depending an the polarity (+1 or -1) of digital data Si through S1. An electric charge is stored (or "sampled") on the capacitors C1 to Ci in accordance with the reference voltage source.
During closure of switch SA2 the output terminal (OUT) and the inverting input terminal of the operational amplifier 11 are short-circuited. Shorting the input and output terminals causes the electric charge on the feedback capacitor Ctot to becomes zero. Next, when the clock .phi.2 traverses to a high level, the left-hand terminals of the capacitors C1 to Ci connect to ground. At the same time, switch SA1 enters the closed state and the right-hand terminals of capacitors C2 to Ci connect to the inverting terminal of operational amplifier 11.
The inverting terminal of the operational amplifier 11 is in a virtually grounded condition. Due to the negative feedback operation of the operational amplifier 11, once clock .phi.1 traverses to a high level, the electric charge stored on capacitors C1 through Ci are transferred to the capacitor Ctot. This operation results in the following equation (4): EQU Vr.multidot.(Si.multidot.Ci+Si-1.multidot.Ci-1+ . . . +S1.multidot.C1)=OUT.multidot.Ctot (4)
In equation (4), if the capacitance values of capacitors C1 to Ci are in a binary ratio, and also if Ctot=Ci.multidot.(2.sup.i -1), the following equation (5) is introduced: EQU Vr.multidot.(Si-Ci.multidot.2.sup.i-1 +Si-1.multidot.Ci.multidot.2.sup.i-2 + . . . + S1.multidot.C1)=OUT.multidot.Ci.multidot.(2.sup.i -1)(5)
Furthermore, from equation (5), the following equation (6) results: EQU OUT=Vr.multidot.(Si.multidot.2.sup.i-1 +Si-1.multidot.2.sup.i-2 + . . . + S1)/(2.sup.i -1) (6)
As described in equation (6), it will be seen that the switched-capacitor circuit shown in FIG. 2 performs a D/A conversion function of i bits. However, since the inverting input terminal is always in the virtually grounded condition, the charge stored in the parasitic capacitor when .phi.1 is at the high level is equal to that stored in the parasitic capacitor when .phi.2 is at the high level. The overall result is there is no parasitic capacitance added to the inverting input.
Equation (5) is true, however, only in instances of an ideal capacitance ratio. However, it is difficult to manufacture capacitors having an ideal value or capacitors with an ideal capacitance ratio. As a result, the relative inaccuracy (e.g., mismatch of the capacitance ratio) will cause a D/A conversion error. It is further known that in semiconductor circuits, the relative inaccuracy of the capacitance ratio is inversely proportional to the square root of the capacitance value. The greater the capacitance value, therefore, the smaller becomes the mismatch and the D/A conversion error.
In the switched-capacitor D/A converter shown in FIG. 2, the charges stored in capacitors C1 through Ci are transferred to the capacitor Ctot through the virtually grounded input of amplifier 11. More specifically, the charge on capacitors C1 to Ci must be transferred in substantial entirely to Ctot while ensuring the inverting input of amplifier 11 remains at ground. This assumes a substantial amount of time is needed to perform the transfer and, more specifically, for amplifier 11 to supply the transferred charge to Ctot. Accordingly, if the capacitance of capacitor Ctot is increased in order to reduce the D/A conversion error, the amount of charge to be supplied by the operational amplifier 11 will be increased. Since the current and/or power consumption of the operational 11 is determined by this electric charge to be supplied, it is difficult to realize a D/A converter (such as that shown in FIG. 2) having low power consumption and satisfactory accuracy.
Reference documents depicting the preceding arrangements include, for example, U.S. Pat. Nos. 5,162,801; 5,008,674; 4,616,212; and 4,384,277, as well as Gregorian et. al., "Switched-Capacitor Circuit Design", Proc. IEEE, Vol. 71, pp. 941-966, August. 1983.
Turning to FIG. 4, a conventional low power consumption, delta-sigma D/A converter is shown. The converter of FIG. 4 includes a digital interpolation filter 400, a digital delta-sigma modulator 410, a dynamic element matching 420, a current mode D/A converter 430, and an adder 440 capable of adding "dither" thereto.
When 18 bit data, at an Fs rate (sampling rate FS is normally 44.1 kHz) is input as the digital input signal (Din), interpolation is carried out so that a digital signal at an Fos rate (oversampling rate Fos is normally at about 64 fs) is output absent the occurrence of aliasing. Next, the 18 bit data at the Fos rate is subjected to noise-shaping by the digital delta-sigma modulator 410 and is quantized into data having a higher frequency than the sampling rate, as well as a lower resolution (about 4 bits). If the digital interpolation filter 400 and the delta-sigma modulator 410 are ideally manufactured, it will be only necessary to convert the quantized signal into an analog signal by a 4-bit D/A converter. However, since it nearly impossible to maintain the accuracy of 18 bits due to mismatch caused during manufacture of the analog elements, noise is generated due to a D/A conversion error.
For this reason, it is necessary to perform digital processing in order to shift the noise generated by the mismatch of the analog elements to an area outside the pass band of the original digital input which is usually DC to 20 kHz. This will improve the signal-to-noise ratio ("S/N ratio") within the passband. A processing section which performs such digital processing is called dynamic element matching ("DEM"). Data output from the DEM is converted into an analog signal by a 4-bit D/A converter provided at the last stage. In the example shown in FIG. 4, the output data from DEM 420 is fed to the current mode D/A converter 430. The structure of conventional DEM units are well known. For sake of brevity and so as not to detract from a better understanding of the present disclosure, explanation of DEM and the principles behind DEM is unnecessary.
In order to achieve lower power consumption, current mode D/A converter 430 has been implemented with a 4-bit D/A converter using resistors and/or current sources and avoids an operational amplifier. The mismatch of circuit elements such as resistors which construct the current mode D/A converter 430 is potentially as large as 10 times the mismatch of capacitors which occupy about the same area.
DEM 420 controls the current mode D/A converter 430 connected at the later stage by a periodic control sequence. When the mismatch of the circuit elements is large, the periodic control sequence will generate undesirable tones in the analog signal. Here, the periodic control sequence means, for example, when the current mode D/A converter 430 is provided with a plurality of segments which are combinations of current sources and or resistors. Each segment is used with predetermined periodic sequence in order to use all the segments uniformly.
As described above, although power consumption may be reduced in a conventional delta-sigma D/A converter, the S/N ratio will deteriorate as a result of the tones. In order to reduce the tones, it is proposed to add dither to the output of the delta-sigma modulator 410. Dither is a essentially quasi-random signal such as an maximum period sequence signal which is added via adder 440 so that the signal having the periodicity is randomized.
Since addition of dither is equivalent to adding noise, a problem arises in that although the tone is eliminated, the S/N ratio will be deteriorated. Also, addition of dither will increase the manufacturing cost. Thus, a conventional delta-sigma D/A converter employing the current mode D/A converter may fail to achieve both low power consumption and high S/N ratio.
Reference documents related to the above-mentioned delta sigma D/A converters include: Baird et. al., "Linearity Enhancement of Multi-Bit Delta-Sigma A/D and D/A Converters Using Data Weighted Averaging", IEEE Trans. On Cir. and Sys., 11 Vol. 42, No.12, pp. 753-762. December. 1995; and, Hamasaki et. al., "A 3 V, 22 mW Multi-Bit Current Mode Delta Sigma DAC with 100 dB Dynamic Range", IEEE Jr. of Solid-State Circuits, Vol. 31., No.12, pp. 1888-1894, December. 1996.
As set forth above, and shown in FIG. 1, D/A conversion error becomes large due to the influence of the parasitic capacitance. Even if the effect of parasitic capacitance can be eliminated as taught in FIG. 2, unacceptably large power or current consumption may result.
The circuit shown in FIG. 4 is proposed to solve the above-mentioned problems. However, the addition of dither increases manufacturing costs and is equivalent to the addition of noise. Thus, even though tones are eliminated, S/N ratio suffers.
A further problem remains in that the current mode D/A converter, which constitutes the delta-sigma D/A converter, is generally sensitive to jitter of the control clock.

D/A converter and delta-sigma D/A converter


A small semiconductor display device of low power consumption and with high definition/high resolution/high image quality is provided. The semiconductor display device according to the present invention includes a pixel matrix circuit, a data line driver circuit and scanning line driver circuits, and these components are formed on the same substrate using a polycrystalline TFT. The fabricating method of the device which includes a process for promoting crystallization by a catalytic element and a process for gettering the catalytic element provides the semiconductor display device with high definition/high resolution/high image quality while it is small in size.

1. Field of the Invention
The present invention relates to a semiconductor display device of active matrix type. More particularly, the present invention relates to a liquid crystal display device of active matrix type which employs liquid crystal as a display medium. Note that in the semiconductor display device according to the present invention, any other display medium (an electroluminescence device, for example) may be used as long as the optical characteristic of the medium is modulated in correspondence with applied voltage.
2. Description of the Related Art
Recently a technique has been rapidly developed which relates to the manufacture of a semiconductor device, such as a thin film transistor (TFT), having a semiconductor-thin film formed on an inexpensive glass substrate. Behind this lies an increasing demand for a liquid crystal display device (liquid crystal panel) of active matrix type.
A liquid crystal panel of active matrix type has a pixel TFT arranged for each of pixel regions consisting of several hundred thousands to several millions of pixels and are arranged in a matrix, (this circuit is called an active matrix circuit), and the TFT controls by means of its switching function an electrical charge that runs in and out of each pixel electrode.
The active matrix circuit is made up of thin film transistors utilizing amorphous silicon formed on a glass substrate.
Also there has been realized recently a liquid crystal display device of active matrix type in which a quartz substrate is utilized and a thin film transistor is formed of polycrystal silicon film. In this case, a peripheral driver circuit for driving the pixel TFT may also be formed on the same substrate on which an active matrix circuit is formed.
In addition, a technique is known in which a thin film transistor using a crystalline silicon film is formed on a glass substrate by utilization of laser annealing technique or the like. Utilization of this technique makes it possible to integrate on a glass substrate an active matrix circuit with a peripheral circuit.
A large number of notebook type computers in recent years employ liquid crystal display devices of active matrix type. In a personal computer, a liquid crystal display device of multi-gradation is required in cases such as a plurality of software are activated at the same time, and an image from a digital camera is inputted to be processed.
Further, a demand for a liquid crystal display device of active matrix type with small dimensions and high definition/high resolution/high image quality follows on recent growing popularity of portable information terminals, mobile computers, vehicle navigation systems and the like.
When providing a liquid crystal display device of active matrix type with small dimensions and high definition/high resolution/high image quality, it is a matter of significance that the pitch between pixels is made small and how minute the display gradation is made. In order to decrease the pitch between pixels, a pixel TFT has to be reduced in size while meeting difficulties. To carry out fine gradational display, on the other hand, it needs to use a driver circuit of excellent performance, which has not been realized by any circuit in prior art with the sole exception of an external IC circuit.

Semiconductor Energy Laboratory Co., Ltd.


A method of production of peeling layer paste used for producing a multilayer electronic device, having a step of preparing a primary slurry containing a ceramic powder having an average particle size of 0.1 pm or less, a binder, and a dispersion agent and having a nonvolatile concentration of 30 wt % or more, a step of adding to the primary slurry a binder-lacquer solution to dilute the primary slurry to prepare a secondary slurry having a nonvolatile concentration of 15 wt % or less and a content of the binder of 12 parts by weight or more with respect to 100 parts by weight of the ceramic powder, and a high pressure dispersion treatment step of running the secondary slurry through a wet jet mill to apply to the secondary slurry a shear rate of 1.5×106 to 1.3×107 (1/s).

1. Field of the Invention
The present invention relates to a method of production of peeling layer paste used for production of a multilayer ceramic capacitor or other multilayer electronic device and a method of production of a multilayer type electronic device using the peeling layer paste.
2. Description of the Related Art
In recent years, due to the increasingly smaller sizes of electronic apparatuses, multilayer ceramic capacitors and other multilayer electronic devices have become increasingly compact in size and sophisticated in performance. The thicknesses of the interlayer dielectric layers of multilayer electronic devices (dielectric layers sandwiched between pairs of internal electrodes) have become 1 μm or less—enabling over 800 stacked layers. In the process of production of such electronic devices, the thicknesses of the green sheets able to form the dielectric layers after firing have become extremely thin (usually 1.5 μm or less), so at the time of formation of the electrode layers by the printing method, the solvent of the electrode layer paste causes the green sheets to dissolve, that is, the so-called "sheet attack" phenomenon becomes a problem. This sheet attack phenomenon leads directly to defects of the green sheets and short-circuit defects, so is a problem which absolutely must be solved for making the layers thinner.
To eliminate this sheet attack, Japanese Patent Publication (A) No. 63-51616, Japanese Patent Publication (A) No. 3-250612, and Japanese Patent Publication (A) No. 7-312326 propose forming an electrode layer paste on a support film in a predetermined pattern, then drying it so as to separately prepare a dry electrode layer, then transferring this dry electrode layer to the surface of a green sheet or the surface of a laminate of green sheets so as to transfer the predetermined pattern of the electrode layer.
However, the technology of Japanese Patent Publication (A) No. 63-51616, Japanese Patent Publication (A) No. 3-250612, and Japanese Patent Publication (A) No. 7-312326 had the problem of a difficulty of peeling off the predetermined pattern of the electrode layer from the support film. Therefore, the inventors proposed technology for forming a peeling layer between a support film and a predetermined pattern of an electrode layer so as to improve the peelability of the electrode layer (see Japanese Patent Publication (A) No. 2003-197457).
However, generally, this type of peeling layer has to be formed extremely thin. Specifically, it is preferably formed to a thickness of 0.2 μm or less. This type of peeling layer is not provided for the purpose of functioning as a dielectric layer after firing and is only provided for the purpose of facilitating formation and peeling of the predetermined pattern of the electrode layer. When forming the peeling layer thick, the active thickness of the interlayer dielectric layer after firing ends up being reduced, so this is disadvantageous for raising the capacity. To make the peeling layer extremely thin, it is necessary to cause ceramic powder having a particle size smaller than the thickness of the peeling layer to homogeneously disperse in the paste for formation of the peeling layer.
However, when using extremely fine ceramic powder to prepare a peeling layer paste by the conventional method, during preparation of the paste, the ceramic powder sometimes partially coagulates. If using peeling layer paste containing partially coagulated ceramic powder to form a peeling layer, the thickness of the peeling layer tends to become thick in parts and therefore a uniform peeling layer becomes hard to form. Even if forming this peeling layer with a predetermined pattern of an electrode layer, the density and surface conditions of the electrode coating deteriorate, so it is difficult to make full use of the merits of a dry electrode.
The peeling layer is formed by coating or drying a peeling layer paste using a bar coater, microgravure coater, extrusion coater, or other device, but to reduce the coated thickness of the peeling layer paste so that the thickness of the final peeling layer becomes 0.2 μm or less, the amount of paste supplied to the coating device has to be made smaller and the nonvolatile concentration of the paste has to be made lower. Further, as the nonvolatile ingredients of the peeling layer paste, the ingredients other than the dispersion medium (solvent) may be considered. Specifically, it is necessary to use a paste with a nonvolatile concentration of 15 wt % or less, but a paste (or slurry) with such an extremely low nonvolatile concentration is hard to stably produce by a single dispersion process. Therefore, it is necessary to repeatedly perform the process of dispersion and dilution of slurry to gradually lower the nonvolatile concentration.
However, at the stage of diluting the slurry, the coagulation phenomenon called "solvent shock" sometimes occurs. There was a problem in high pressure dispersion of a slurry with an extremely low nonvolatile concentration.
Further, Japanese Patent No. 3387455 proposes a method of high pressure dispersion of a green sheet paste used for forming a green sheet for forming a dielectric layer after firing. Specifically, it proposes combining the medium-type dispersion method using pebbles, beads, or another dispersion medium and the high pressure dispersion method of dispersion at a pressure of 100 kg/cm2 or more to cause the ceramic powder to disperse in the paste. Japanese Patent No. 3387455 deals with paste for forming a green sheet of several μm at the thinest, so the content of the binder contained in the paste is set small. This is because if the amount of binder in the green sheet paste becomes large, the content of the ceramic powder becomes smaller relative to this and cracks and other problems occur at the time of molding or removal of the binder.
As opposed to this, if the amount of binder ends up becoming smaller in a peeling layer paste not for a green sheet, but for forming a peeling layer, the printability to a PET film etc. falls and during printing or after drying, the peeling layer easily sheds ceramic powder and the effect of forming the peeling layer tends strongly to be impaired. Therefore, it was difficult to apply the technology of Japanese Patent No. 3367455 to a peeling layer paste for forming a peeling layer. On the other hand, if increasing the amount of binder to raise the concentration in the dispersion process, the dispersion overly rises in viscosity, so good dispersion is difficult. Therefore, it is necessary to provide a later dilution process, cause good dispersion in the state with a small amount of binder, and in the later dilution process add a binder to adjust the amount of the binder.

Method of production of peeling layer paste and method of production of multilayer type electronic device


A pressure-limiting valve is proposed, in particular for a common rail system. The pressure-limiting valve comprises a valve support (10), a valve insert (12) which is connected to the valve support (10), a valve piston (14) which is mounted such that it can slide in the valve insert (12), and a closing spring (16) which acts on the valve piston (14) with a closing force in the closing direction. By means of the closing force, the valve piston (14) acts on a valve seat (18) which produces a hydraulic connection via a valve chamber (40) between a high-pressure space (33) and a low-pressure space (36), as soon as the hydraulic force which acts on the valve piston (14) in the opening direction exceeds the closing force of the closing spring (16). When the valve seat (18) is closed, a leakage gap (50) is formed between the valve chamber (40) and the low-pressure space (36), which leakage gap (50) makes it possible for the leakage to be discharged out of the valve chamber (40) into the low-pressure space (36).

The invention relates to a pressure limiting valve, in particular for common rail systems.
Pressure-limiting valves for common rail systems are used to limit the pressure in a high-pressure reservoir or a common rail injection device. The pressure-limiting valve performs the task of limiting the maximum rail pressure in the system in order to protect the system components in the event of a malfunction. The pressure-limiting valve has further the task of providing a minimum pressure in the high-pressure reservoir (common rail) for an emergency operation of a motor vehicle; thus enabling the motor vehicle to reach the repair shop under its own propulsion.
Such a pressure-limiting valve is known from the WIPO patent application WO 2004/083695 A1. This pressure-limiting valve has a valve support and a valve insert which is connected to the valve support, a valve piston being mounted such that it can slide in the valve insert. The valve piston acts with a valve seat face on a valve seat on the valve insert, the valve seat face being seated on the valve seat in the closed state of the pressure-limiting valve. The closing force of the valve piston is produced by a compression spring which is accommodated in the valve support. The pressure-limiting valve is inserted into a housing which comprises a high-pressure connection to a high-pressure reservoir (common rail) and a low-pressure connection for a return line. In so doing, the valve piston in the valve insert separates a high-pressure valve chamber, into which the high-pressure connection opens out, from a low-pressure chamber, the low-pressure connection leading out of said low-pressure chamber.


An electronic device and method of assembling an electronic device, said device including an electronic component; an electrically insulating protective layer overlaying and in contact with at least a portion of the electronic component; and injection molded material overlaying at least the portion of the component and the overlaying protective layer.

In recent years there has been a trend to reduce the thickness of electronic devices. Problems arise during the formation of the covers of thin electronic devices. The covers are commonly formed by injection molding and the conditions required for injection molding, i.e. the high temperature of the material and the force with which the injection molded material enters the mold, may damage sensitive electronic components.
Therefore it is advantageous to produce a way of assembling an electronic device without damaging the electronic components and without increasing the thickness of the device.

Electronic device and method of assembling an electronic device


This invention provides a recombinant herpesvirus of turkeys comprising a herpesvirus of turkeys viral genome which contains a foreign DNA sequence inserted within the EcoR1 #9 fragment of the herpesvirus of turkeys viral genome, and the foreign DNA sequence is capable of being expressed in a host cell infected with the herpesvirus of turkeys.. This invention provides a recombinant herpesvirus of turkeys-Marek's disease virus chimera comprising a herpesvirus of turkeys unique long viral genome region and a Marek's disease virus unique short region.. Lastly, this invention provides homology vectors for producing a recombinant herpesvirus of turkeys, host cells, and vaccines and methods for immunization.

The ability to isolate DNA and clone such isolated DNA into bacterial plasmids has greatly expanded the approaches available to make viral vaccines. The methods used to make the present invention involve modifying cloned DNA sequences from various viral pathogens of animals, by insertions, deletions, single or multiple base changes, and subsequent insertions of these modified sequences into the genome of the virus. One utility of the addition of a foreign sequence is achieved when the foreign sequence encodes a foreign protein that is expressed during viral infection of the animal. The resulting live virus may then be used in a vaccine to elicit an immune response in a host animal and provide protection to the animal against disease. A virus with these characteristics is referred to as a viral vector, because it becomes a living vector that will carry and express the foreign protein in the host animal. In effect it becomes an elaborate delivery system for the foreign protein(s).
More specifically, the present invention relates to the use of herpesvirus of turkeys (HVT) as a viral vector for vaccination of birds against disease. The group of herpesviruses comprise various pathogenic agents that infect and cause disease in a number of target species: swine, cattle, chickens, horses, dogs, cats, etc. Each herpesvirus is specific for its host species, but they are all related in the structure of their genomes, their mode of replication, and to some extent in the pathology they cause in the host animal and in the mechanism of the host immune response to the virus infection.
The application of recombinant DNA techniques to animal viruses has a relatively recent history. The first viruses to be engineered have been those with the smallest genomes. In the case of the papovaviruses, because these viruses are so small and cannot accommodate much extra DNA, their use in genetic engineering has been as defective replicons. Foreign gene expression from these viruses requires a wild-type helper virus and is limited to cell culture systems. For adenoviruses, there is a small amount of nonessential DNA that can be replaced by foreign sequences. The only foreign DNA that seems to have been expressed in adenoviruses are the T-antigen genes from papovaviruses (Mansour, et al., Proc. Natl. Acad. Sci. US, 1985; Thummel, et al., Cell, 1983; Scolnick, et al., Cell, 1981; Thummel, et al., Cell, 1981), and the herpes simplex virus (HSV) thymidine kinase gene (Haj-Ahmed and Graham, J. of Virology, 1986). These publications do not identify the nonessential regions in HVT wherein foreign DNA may be inserted, nor do they teach how to achieve the expression of foreign genes in HVT, e.g., which promoter sequence and termination sequence to use.
Another group of viruses that have been engineered are the poxviruses. One member of this group, vaccinia, has been the subject of much research on foreign gene expression. Poxviruses are large DNA-containing viruses that replicate in the cytoplasm of the infected cell. They have a structure that is unique in that they do not contain any capsid that is based upon icosahedral symmetry or helical symmetry. The poxviruses are most likely to have evolved from bacterial-like microorganisms through the loss of function and degeneration. In part due to this uniqueness, the advances made in the genetic engineering of poxviruses cannot be directly extrapolated to other viral systems, including herpesviruses and HVT. Vaccinia recombinant virus constructs have been made in a number of laboratories that express the following inserted foreign genes: HSV thymidine kinase gene (Mackett, et al., Proc. Natl. Acad. Sci. USA, 1982; Panicali and Paoletti, Proc. Natl. Acad. Sci. USA, 1982, hepatitis B surface antigen (Paoletti, et al., Proc. Natl. Acad. Sci. USA, 1984; Smith et al., Nature, 1983), HSV glycoprotein D gene, influenzae hemagglutinin gene (Panicali, et al., Proc. Natl. Acad. Sci. USA, 1983; Smith, et al., Proc. Natl. Acad. Sci. USA, 1983), malaria antigen gene (Smith, et al., Science, 1984, and vesicular stomatitis glycoprotein G gent (Mackett, et al., Science, 1986). The general overall features of vaccinia recombinant DNA work are similar to the techniques used for all the viruses, especially as they relate to the techniques in reference (Maniatis, et al., Molecular Cloning, 1982). However in detail, the vaccinia techniques are not applicable to herpesviruses and HVT. The utility of vaccinia as a vaccine vector is in question because of its close relationship to human smallpox and its known pathogenicity to humans. Thus, the use of the host-specific herpesvirus HVT is a better solution to vaccination of poultry.
Among the primate herpesviruses, only HSV of humans and, to a limited extent, herpes saimiri of monkeys have been engineered to contain foreign DNA sequences. The first use of recombinant DNA to manipulate HSV involved cloning a piece of DNA from the L-S junction region into the unique long region of HSV DNA, specifically into the thymidine kinase gene (Moccarski, et al., Cell, 1980). This insert was not a foreign piece of DNA, rather it was a naturally occurring piece of herpesvirus DNA that was duplicated at another place in the genome. This piece of DNA was not engineered to specifically express a protein, and thus this work does not involve expression of protein in herpesviruses. The next manipulation of HSV involved the creation of deletions in the virus genome by a combination of recombinant DNA techniques and thymidine kinase selection. Using this approach, the HSV alpha-22 gene has been deleted (Post, et al., Cell, 1981), and a 15,000 basepair sequence of DNA has been deleted from the internal repeat of HSV (Poffenberger, et al., Proc. Natl. Acad. Sci. USA, 1981).
The following cases involve insertion of genes that encode protein into herpesviruses: the insertion of HSV glycoprotein C into a naturally occurring deletion mutant of this gene in HSV (Gibson and Spear, J. of Virology, 1983); the insertion of glycoprotein D of HSV type 2 into HSV type 1 (Lee, et al., Proc. Natl. Acad. Sci. USA, 1982), with no manipulation of promoter sequences since the gene is not `foreign`; the insertion of hepatitis B surface antigen into HSV under the control of the HSV ICP4 promoter (Shih, et al., Proc. Natl. Acad. Sci. USA, 1984); and the insertion of bovine growth hormone into herpes saimiri virus with an SV40 promoter (the promoter did not work in this system and an endogenous upstream promoter served to transcribe the gene) (Desrosiers, et al., 1984). Two additional foreign genes (chicken ovalbumin gene and Epstein-Barr virus nuclear antigen) have been inserted into HSV (Arsenakis and Roizman, 1984), and glycoprotein X of pseudorabies virus has been inserted into HSV (Post, et al., 1985).
These cases of deletion or insertion of genes into herpesviruses demonstrate that it is possible to genetically engineer herpesvirus genomes by recombinant DNA techniques. The methods that have been used to insert genes involve homologous recombination between the viral DNA cloned in plasmids and purified viral DNA transfected into the same animal cell. However, the extent to which one can generalize the location of the deletion and the sites for insertion of foreign genes is not known from these previous studies.
One object of the present invention is a vaccine for Marek's disease. Marek's disease virus (MDV) is the causative agent of Marek's disease which encompasses fowl paralysis, a common lymphoproliferative disease of chickens. The disease occurs most commonly in young chickens between 2 and 5 months of age. The prominent clinical signs are progressive paralysis of one or more of the extremities, incoordination due to paralysis of legs, drooping of the limb due to wing involvement, and a lowered head position due to involvement of the neck muscles. In acute cases, severe depression may result. In the case of highly oncogenic strains, there is characteristic bursal and thymic atrophy. In addition, there are lymphoid tumors affecting the gonads, lungs, liver, spleen, kidney and thymus (Mohanty and Dutta, 1981).
Most chickens are vaccinated against MDV at one day of age to protect the bird against MDV for life. Prior to the present invention, the principal vaccination method for MDV involved using naturally occurring strains of turkey herpesvirus (HVT). It would be advantageous to incorporate other antigens into this vaccination at one day of age, but efforts to combine conventional vaccines have not proven satisfactory to date due to competition and immunosuppression between pathogens. The multivalent HVT-based vaccines engineered in this invention represent a novel way to simultaneously vaccinate against a number of different pathogens. For the first time, a recombinant HVT with a foreign gene inserted into a non-essential region of the HVT genome is disclosed.
The types of genetic engineering that have been performed on these herpesviruses consist of cloning parts of the virus DNA into plasmids in bacteria, reconstructuring the virus DNA while in the cloned state so that the DNA contains deletions of certain sequences, and furthermore adding foreign DNA sequences either in place of the deletions or at sites removed from the deletions.
A foreign gene of interest targeted for insertion into the genome of HVT may be obtained from any pathogenic organism of interest. Typically, the gene of interest will be derived from pathogens that in poultry cause diseases that have an economic impact on the poultry industry. The genes may be derived from organisms for which there are existing vaccines, and because of the novel advantages of the vectoring technology the HVT derived vaccines will be superior. Also, the gene of interest may be derived from pathogens for which there is currently no vaccine but where there is a requirement for control of the disease. Typically, the gene of interest encodes immunogenic polypeptides of the pathogen, and may represent surface proteins, secreted proteins and structural proteins.
A relevant avian pathogen that is a target for HVT vectoring is Infectious Laryngotracheitis virus (ILTV). ILTV is a member of the herpesviridiae family, and this pathogen causes an acute disease of chickens which is characterized by respiratory depression, gasping and expectoration of bloody exudate. Viral replication is limited to cells of the respiratory tract, where in the trachea the infection gives rise to tissue erosion and hemorrhage. In chickens, no drug has been effective in reducing the degree of lesion formation or in decreasing clinical signs. Vaccination of birds with various modified forms of the ILT virus derived by cell passage and/or tedious regimes of administration have conferred acceptable protection in susceptible chickens. Because of the degree of attenuation of current ILT vaccines care must be taken to assure that the correct level of virus is maintained; enough to provide protection, but not enough to cause disease in the flock.
An additional target for the HVT vectoring approach is Newcastle disease, an infectious, highly contagious and debilitating disease that is caused by the Newcastle disease virus (NDV). NDV is a single-stranded RNA virus of the paramyxovirus family. The various pathotypes of NDV (velogenic, mesogenic, lentogenic) differ with regard to the severity of the disease, the specificity and symptoms, but most types seem to infect the respiratory system and the nervous system. NDV primarily infects chickens, turkeys and other avian species. Historically vaccination has been used to prevent disease, but because of maternal antibody interferences, life-span of the bird and route of administration, the producer needs to adapt immunization protocols to fit specific needs.
The therapeutic agent that is delivered by a viral vector of the present invention must be a biological molecule that is a by-product of swinepox virus replication. This limits the therapeutic agent in the first analysis to either DNA, RNA, or protein. There are examples of therapeutic agents from each of these classes of compounds in the form of anti-sense DNA, anti-sense RNA (S. Joshi, et al., J. of Virology, 1991), ribozymes (M. Wachsman, et al., J. of General Virology, 1989), suppressor tRNAs (R. A. Bhat, et al., Nucleic Acids Research, 1989), interferon-inducing double stranded RNA and numerous examples of protein therapeutics, from hormones, e.g., insulin, to lymphokines, e.g., interferons and interleukins, to naturals opiates. The discovery of these therapeutic agents and the elucidation of their structure and function does not make obvious the ability to use them in a viral vector delivery system.

Recombinant chimeric virus and uses thereof


Embodiments described herein relate to real-time streaming of large quantities of time critical data over multiple distinct networks from a communications device. More specifically, embodiments described herein may address challenges and problems of maintaining consistent data reception quality when faced with the anomalies of a moving sender that is sending data using a relatively unstable method. This may be achieved by converting single source data into multiple data streams, placing them in transport buffers and storing them for forwarding.

Delivery of large quantities of continuous real-time data from a mobile transmitter to a receiver is a complex problem. The receiver may be located anywhere and connected thereto via one or more connected wireless networks. The data stream may be compressed and transmitted over one or more wireless links before arriving at a server where the operation is reversed, and the data stream recreated. Delivery of large quantities of continuous real-time data may be apparent in the field of live news gathering, for example, where timely delivery of a story to the studio in a broadcast quality format may be critical for success.
Existing technologies such as satellite or microwave fixed link may return a (live) video stream to a studio, but may have shortcomings. For example, satellite or microwave fixed link may take extra time to set up, may be expensive, and once set up may be difficult to be mobile. These solutions may have dedicated channels and a fixed bandwidth that prevents stream failure; however, sporadic drop-outs due to weather/catastrophic failure are still possible, but may be infrequent.
Cellular data is a possible alternate mechanism to satellite or microwave for sending data from a mobile transmitter. Cellular data is generally available, available while mobile, and relatively inexpensive. Cellular data may also be relatively low bandwidth, prone to transmission errors and lag due to resource contention, and may be subject to increased interference while moving.
A live audio/video stream has certain characteristics that make it unique, especially when compared with general data (e.g. web browsing data), stored audio/video data (e.g. content stored on a site such as a YouTube™ or Netflix™).
Stored audio/video solutions typically have the ability to buffer data at the start of stream playback, or at any time during playback if the required frames have not yet arrived. Initially, the player stores enough frames from the stream in a buffer to prevent video loss. If the stream is interrupted, the player is able to continue playing from the buffer, assuming that when the stream is restored, the frames will catch up and the buffer will be refilled. If the buffer empties, the player stops and displays the 'buffering' message while waiting for more data. In some circumstances, particularly where the available bandwidth is not sufficient to maintain the stream the result is a 'stutter' effect where the output repeatedly stops and starts.
For some industries such as broadcast, stopping to refill a buffer in the middle of a live audio/video stream may not be acceptable. If the receiver pauses to refill the buffer, the glass-to-glass latency, as defined herein, increases.
Professional live broadcast video is real-time with a requirement for fixed glass-to-glass latency. This is required because the producer of the live broadcast will typically have the sequence of events choreographed, so any change in the glass-to-glass latency would affect the timing of all other events. A fixed glass-to-glass latency means that the response to a video frame that is not delivered on time is to skip it rather than pause the stream to wait for it to arrive. Due to the way video compression works, the loss of even a single video frame may significantly impact the ability of a system to decompress the stream. This is because the most efficient video compression implementations only encode the differences between video frames to minimize the volume of data. As a result, the loss of a single frame of video at the receiver can have significant effects on the reconstructed stream, ranging from persistent video artifacts, black screen, to even complete decompression failure until the next Group of Pictures ("GOP", defined herein) begin.
One solution to the loss of frames may be to choose a glass-to-glass latency that is large enough to absorb any expected network interruptions. For example, a 30 second glass-to-glass latency means there would be close to 30 seconds available to retransmit missing or incomplete frames. For situations requiring a shorter glass-to-glass latency, such as a live interview, this solution may not be feasible. Crucially, in some industries, even delays of seconds can make a video stream unusable or irrelevant. Adding an extended delay to the beginning of a stream, which may still have output errors due to transmission delay, is not feasible for these industries.
Transmitting broadcast quality live video in real time over cellular wireless networks is difficult. There are many wireless capable devices, even some using the latest network technologies (such as Long Term Evolution or LTE for example), that are physically capable of transmitting at the bitrates required for video for short periods. However, the devices may fail when required to reliably transmit a live video stream in real time. The failure may be caused by many uncontrolled variables, such as from physical objects causing interference, the weather, the contention that occurs when multiple devices share the same limited network resources, and so on.
In the world of large quantity time critical data, some solutions are focused on delivery of data transmissions to wireless receivers, but not from wireless transmitters. Cellular network technology implementations may be configured to prioritize delivery of data to a mobile device. As a result, the down channel (e.g. from the wireless network to the mobile device) typically has far more available bandwidth than the up channel (from the mobile device to the wireless network). This may be a worst case scenario for a mobile device that is generating and attempting to transmit the volume of audio/video data required to send broadcast video.
In the field of data communications, multiple data channels may be used to augment data throughput and solve some problem of delivering reliable, high quality data transmissions, such as video data. The paper "Distributed Video Streaming with Forward Error Correction", by Thinh Nguyen and Avideh Zakhor proposes one such method. An approach known in this field includes opening multiple paths and adjusting data rates based on the throughput actually reaching the receiver. This approach typically focuses on extremely specific calculations to maximize efficiency and Forward Error Correction (FEC) through a control channel to adjust the data rates per channel. These types of solutions generally fail over wireless network topologies as a result of the many anomalies that abound in a wireless medium, which may cause sudden and dramatic changes in latency and throughput. Moving wireless transmitters experience problems such as dynamic fading, dead zones, dramatic latency differences, echo effects, the ability to receive but not transmit data, RF interference, immediate channel loss, and channel re-allocation to voice cell phone users.
There exists a need for improved systems and methods for transmitting or streaming large volume audio/video data transmission (from a mobile device) over one or more wireless networks in real time.
There exists a need for systems and methods that address at least some of the challenges and problems associated with maintaining consistent data reception quality when faced with the anomalies of delivering audio/video data stream from a stationary or moving mobile wireless transmitter in real time or near real time.

This patent is subject to a terminal disclaimer.

Multipath data streaming over multiple networks


A method and a system for selecting items one by one from a set of items in an associative memory array includes determining a density of the set, if the density is sparse, repeatedly performing an extreme item select (EIS) method to select a next one of the elected items from the set and removing the next one from the set to create a next set, and if the density is not sparse, performing a next index select (NIS) method to create a linked list of the elected items and to repeatedly select a next elected item from the set. An associative memory array includes a plurality of associative memory cells arranged in rows and columns where each first cell in a first row and in a first column has access to a content of a second cell in a second row in an adjacent column.

Applications often need to pick or retrieve several elected items, one by one, from a large dataset of items. A set of elected items may be created in one of the following ways: manually selected by a user; created by an algorithm; or as a result of a search or any other procedure that produces a set of items needed by the application.
In the dataset, items belonging to the set are explicitly identified as being part of the set. The items in the set may be retrieved one after the other, such that, in each retrieval step, a single item from the set is retrieved. After its retrieval, the retrieved item may be removed from the set, so as not to be retrieved again. A method for choosing which item to retrieve in each specific step is referred herein as "item select". It may be appreciated that the application may repeat the retrieval step until all items in the set have been retrieved and the set is emptied.
It is assumed that the order of retrieving items from the set has no implicit importance, as long as all the items in the set are eventually retrieved. The naive "item select" method may be used to select an item by its location in the dataset. In each retrieve operation, the entire dataset may be scanned, starting from the first item until an item belonging to the set is found. Once read, a "read" indication may be assigned to the read item, and the application may perform the next retrieve operation.
It may be appreciated that the complexity of a single retrieve operation that scans the entire dataset is O(N), where N is the size of the dataset, and the complexity of reading an entire set having P items is O(P*N).


A random-bit sequence generator includes a biasing circuit, a source of a noisy voltage signal biased by the biasing circuit, an amplification stage generating an amplified signal representative of the sole non-zero-frequency (AC) component of the noisy voltage signal and an output stage electrically in cascade to the amplification stage that generates a random bit sequence in function of the amplified signal. The generator also filters the undesired low-frequency disturbance components because the amplification stage comprises an input low-pass filter that feeds the zero- (DC) component of the noisy voltage signal to one of the inputs of a differential amplifier, to another input of which is fed the non-filtered noisy voltage signal.

Random number generators (RNG) are used in many technical fields, such as for example, cryptography, for generating cryptographic keys and for setting in a random manner certain variables in cryptographic protocols, video-games, and for realizing games strictly based on chance.
RNGs may be generated via software or via hardware. Software-based RNGs implement an algorithm that, iterated from a certain start value called the "seed" of the algorithm, generates a sequence of numbers uniformly distributed in a certain interval. Clearly, any sequence of number produced by them is periodical and may be predicted by knowing the algorithm and the seed of the algorithm. These software generators are also called Pseudo-RNGs because the sequences of numbers produced by these generators are predictable, and thus they are not true random sequences. Notwithstanding that their realization is easy, Pseudo-RNGs are unsuitable in applications, such as cryptography, in which it is absolutely necessary to generate unpredictable cryptographic keys.
Hardware-based RNGs are devices that generate random number sequences by exploiting physical phenomena. These generators may be deterministic systems with a very complex dynamic or systems, also called True-RNGs, that exploit chaotic or noisy physical phenomena, such as for instance the thermal noise of a resistor or a diode. One characteristic of this kind of RNG is that the generated sequence of numbers is practically unpredictable, which makes them particularly suited to be used in cryptography.
There are many examples of RNGs based on chaotic physical phenomena, three of which are disclosed herein.
U.S. Pat. No. 6,061,702 describes a True-RNG that uses a voltage controlled oscillator (VCO) driven by the signal obtained by amplifying the thermal noise of a pair of resistors. The VCO generates a signal that has a frequency that varies in a random manner and that is used to sample the signal produced by a plurality of stable oscillators whose frequency is greater than that of the signal produced by the VCO.
U.S. Pat. No. 5,961,577 describes a True-RNG comprising an oscillator, composed of a plurality of ring amplifiers having noise sensitive circuits, and a comparator that generates a random logic signal by comparing the output of one of the amplifiers with a pre-established threshold.
The architecture of the above mentioned circuits is relatively complex because they require a VCO or a plurality of ring amplifiers.
U.S. Pat. No. 6,195,669 describes a True-RNG in which a noisy signal, produced by a noise generator, is input to a high gain amplifier that, having blocking capacitors for the DC component (offset of the signal), amplifies only the AC component of the signal. This amplified AC component is converted to a random bit sequence by an analog-to-digital converter. This circuit needs blocking capacitors for preventing the DC component of the noisy signal (offset of the signal) from saturating the high gain amplifier. Therefore, an implied drawback of this circuit is that it operates with a signal that sometimes has an inverted polarity, and thus the circuit that processes this signal must be supplied with a positive and a negative supply voltage.


A WDM system includes a plurality of P to P WDM systems connected for wavelength-multiplexing optical signals of a plurality of wavelengths, transmitting them to a transmission path, transmitting wavelength-division multiplexed light while performing amplification by using optical AMP in the transmission path, and subjecting the wavelength-division multiplexed light to wavelength isolation at the reception side. An OSC which is a monitoring control signal such as a normal optical signal is used closely within one P to P WDM system. However, by transmitting and receiving the OSC between a plurality of P to P WDM systems, it is possible to solve a problem at the system rise. Moreover, since accumulative OSNR data is transmitted up to the P to P WDM system of the final stage, it is possible to detect an accurate OSNR value and a leak ASE light quantity at the end side.

1. Field of the Invention
The present invention relates to a WDM system.
2. Description of the Related Arts
Recently, with an increasing amount of traffic, wavelength-division multiplexing (WDM) system devices have been widely adopted, and a P to P WDM system including a amplifier/repeater (AMP) of several spans as a basic configuration is used.
In addition to the conventional configuration, a long distance transmission, an optical add/drop function, and an optical cross-connect system are requested as new functions. To realize these requests, a compensation node (CN) in which a combination of a demultiplexing unit and a multiplexing unit is provided in a plurality of P to P WDM systems.
FIG. 1 shows a conventional P to P WDM system.
In FIG. 1, "VAT" is short for "variable attenuator", "SAU" is short for "spectrum analyzer", "TA" is short for "transmission amplifier", "LA" is short for "in-line amplifier", "RA" is short for "reception amplifier", "OSC" is short for "optical supervisory channel", "MUX" is short for "multiplexer", "DMUX" is short for "demultiplexer", "E/O" is short for "electro-optic transducer", "O/E" is short for "opto-electronic transducer", "TERM" is short for "terminal station", and "ILA" is short for "inline amplifier".
The transmission terminal station TERM 1 is first described below. When the optical signals of the wavelengths 1 through n are output from the E/O, the optical level of the optical signal of each wavelength is adjusted by the variable attenuator VAT, and input to a multiplexer MUX 1. The multiplexer MUX 1 wavelength-multiplexes the optical signal of each wavelength, generates wavelength-division multiplexed light, and inputs the wavelength-division multiplexed light to a transmission amplifier TA 1. The wavelength-division multiplexed light amplified by the transmission amplifier TA 1 is transmitted to the transmission path. A part of the light is branched and input to a spectrum analyzer SAU. Then, the spectrum analyzer performs feedback controls on the variable attenuator VAT based on the result of the detection of the optical level of the optical signal of each wavelength, and the optical signal of each wavelength is transmitted at the same optical level.
A transmission path is provided with in-line amplifiers ILA 1, 2, and 3 at predetermined intervals, and a wavelength-division multiplexed light attenuated by the transmission through the transmission path is amplified, thereby realizing a long-distance transmission.
In a reception terminal station TERM 2, a reception amplifier RA 11 amplifies received wavelength-division multiplexed light, a demultiplexer wavelength-demultiplexes the light into optical signals of the respective wavelengths, and an opto-electronic transducer O/E transforms the signals into electric signals and receives them. The spectrum analyzer SAU analyzes the wavelength-division multiplexed light amplified by the reception amplifier RA 11, and the result is transmitted to the transmission side along an optical supervisory channel OSC.
With the configuration shown at the lower portion of FIG. 1, the transmission and reception sides are inverted as compared with the upper configuration, and the explanation is omitted here.
The E/O of each terminal station has the wavelengths of 1 through N available in the WDM system. The signal light of the E/O is wavelength-multiplexed by the MUX1 through the VAT prepared for each wavelength of the TERM1. A multiplexed optical signal is amplified by the transmission AMP (TA11). The output signal of the TA11 is monitored by the SAU, and the SAU issues a control signal to the VAT to allow the peak level of each wavelength to match a target level. Thus, the VAT controls the peak power of each wavelength.
The repeater AMPs (LA11, LA12, SA13) of the ILA1, ILA2, ILA3 amplify the signal light degraded in the transmission path are amplified.
The reception AMP (RA11) of TERM2 as a reception unit amplifies the signal light degraded in the transmission path. The amplified signal light is wavelength-demultiplexed by the DMUX1, and input to the O/E of each terminal station. The SAU in the TERM2 has the function of monitoring the output light of the reception AMP (RA11).
The OSC (optical supervisory channel) is used as a control signal among the WDM stations in the WDM system shown in FIG. 1. The control signal and a multiplexed signal have different wavelengths, and the control signal is multiplexed with a signal light wavelength-multiplexed by a coupler, and demultiplexed. In the transmission AMP (TA11), the signal is multiplexed with a WDM signal and transmitted downstream. In each repeater AMP (LA11, LA12, LA13), the signal is demultiplexed from the WDM signal, and terminated. The OSC signal is multiplexed with a WDM signal with necessary information added, and transmitted downstream. In the reception AMP (RA11), the signal is demultiplexed from the WDM signal, and terminated.
The system control data communicated with each WDM station in the OSC can be the setting information, status information and fault information about each wavelength of the TERM1, the status information and fault information about each AMP, and the status information about the OSC. According to the information, the rise of the system, the increase and decrease of a wavelength, the system during the fault of the system is controlled.
When a long-distance transmission is realized, and the number of spans is increased by increasing in-line amplifiers with the configuration shown in FIG. 1, the transmission degradation occurs by the accumulation of ASE light (natural noise light) generated by the AMP connected to a plurality of stages, the accumulation of tilt (wavelength dependence relating to the loss characteristic) among the wavelengths, etc. As a method of avoiding the transmission degradation due to those described above, there is a method of waveform-regenerating each wavelength light DMUXed by the P to P WDM system by a regenerator (REG) unit.
FIG. 2 shows the configuration of the WDM system using the REG unit.
In FIG. 2, only the difference from FIG. 1 is explained below.
Since the degradation by the ASE light accumulation, tilt accumulation, etc. can be all cancelled by adding the REG unit, the characteristic is not degraded and the long-distance transmission can be performed. However, since it is necessary to prepare a REG unit for each wavelength, a high cost is required.
As a method for simultaneously realizing the cancellation of the accumulation of the ASE light and the accumulation of the tilt and the deletion of the REG unit, a compensation node system for directly connecting the MUX and DEMUX sides of the P to P WDM system opposite to each other is adopted.
FIG. 3 shows the configuration of the compensation node system.
In FIG. 3, the compensation node is formed by the CN-T1, CN-R2, CN-T2, and CN-R1.
The long-distance WDM transmission system with the configuration of the compensation node shown in FIG. 3 has the following advantage when it is compared with the configuration of increasing the number of repeater AMPs (in-line AMP) shown in FIG. 1.
One is that the ASE light accumulated in each AMP at the left side of the compensation node is not transmitted to the right of the downstream compensation node by cutting off the ASE light out of the filter band width by the filter characteristic of the DMUX1 in the CN-R1 shown in FIG. 3.
By the control of the VAT unit of the CN-T1 shown in FIG. 3, the output of each wavelength in the output unit of the transmission AMP (TA21) of the CN-T1 is controlled to be kept at a constant level. Thus, the tilt accumulation generated in each AMP in the left WDM system of the compensation node can be canceled.
From the viewpoint of device control, the CN-R1 and CN-T1 shown in FIG. 3 do not communicate the OSC control information, and do not perform cooperative control between the compensation nodes in the left and right sections.
There are several problems about the long-distance WDM transmission using a compensation node by not communicating device management control information and the optical characteristic information between the devices spanning the compensation nodes.
First problem is that when a plurality of P to P WDM systems are connected using a compensation node, the fluctuation of the level of an upstream unit at the system rise and the addition of a wavelength is transmitted to a downstream unit because each channel of the upstream DMUX unit is directly connected to each channel of the downstream MUX unit. At the system rise and the addition of a wavelength from the upstream unit, there can be the case where an unstable status in which a downstream unit starts a rising operation occurs while the optical level of the upstream unit is gradually enhanced.
The second problem is that the OSNR value indicating the optical characteristic for use in discriminating the transmission path degradation in the WDM transmission path includes an error from a true OSNR value each time a compensation node is passed when a spectrum analyzer (SAU) in the device performs a monitoring process.
FIG. 4 is an explanatory view of the deviation of the OSNR value monitored by spanning compensation nodes from the true OSNR value.
Assume that the OSNR measured by the RA13 of the CN-R1 shown in FIG. 4 is S13, and a total value of the ASE light noise of the TA11, LA12, and Ra13 at the left side of the compensation node is N13. Then, assuming that the line width at the prescription of the OSNR is Δλ1, the ASE light out of the band width is removed, but the ASE light immediately below the signal light passes the DEMUX1 as is, and is accumulated as is in the wavelength of the right system of the compensation node. Assume that the OSNR read value when the SAU measures the OSNR in the right RA23 of the compensation node is S23, and the total value of the ASE light generated in the TA21, LA21, and RA21 to the right of the compensation node is N23. The apparent OSNR value read by the RA23 is S23, but actually the ASE light of N13 accumulated in the left system of the compensation node is also included in the signal light. Therefore, it is necessary to determine that the true OSNR value in the R23 is S23 or N13.
The third problem is that, when a plurality of P to P WDM systems are connected through compensation nodes, the ASE is independently corrected in the upstream WDM unit and the downstream WDM unit, but there arises an error in the amount of ASE correction of the downstream WDM unit by the ASE in the filter band passing as is after the passage through the filter of the upstream DMUX unit.
FIG. 5 is an explanatory view of the outline of the leakage ASE in a compensation node.
Assume that the OSNR measured by the RA13 of the CN-R1 shown in FIG. 5 is S13, and a total value of the ASE light noise of the TA11, LA12, and Ral3 at the left side of the compensation node is N13. Then, assume that the line width at the prescription of the OSNR is Δλ1, and the filter band width of the DMUX1 of the CN-R1 is Δλ2. The filter of the DMUX1 cuts off the ASE light out of the band of the Δλ2 in the wavelength demultiplexed by the DMUX1 of the CN-R1, but cannot cut off the ASE light in the band width, and it is transmitted as is to the MUX2 side of the right system of the compensation node.
In the left and right WDM sections of the compensation node, the ASE is corrected in order to keep constant signal light power per wavelength contained in the output signal of each AMP independent of the number of wavelengths. Refer to the patent document 1 for the detailed principle of the ASE correction.
In the long-distance WDM system with the configuration of the conventional compensation node shown in FIG. 3, it is considered that the ASE correction has been completed for each WDM section. However, the ASE light leaking through the CN-R1 is not actually corrected, thereby resulting in insufficient ASE correction.
The present invention aims at solving the above-mentioned problems, and improves the system performance by the long-distance WDM transmission system with the CN configuration by performing:                stabilizing the operation of system rise by mutual communication of device setting information in the CN section (between the CN-R and the CN-T) in the long-distance WDM system in a compensation node;        displaying an OSNR true value in each WDM section by transmitting the OSNR information for each wavelength in the CN section, and discriminating the waveform degradation in the WDM device in the long-distance WDM system in a compensation node; and        optimizing the amount of ASE correction by calculating the amount of leakage ASE light for each wavelength in the CN section, and performing correction in the long-distance WDM system with the CN configuration.Patent Document 1
Japanese Patent Application Publication No. 2000-232433


A method for controlling a word line signal for a memory device during a power down process, comprising: pulling the word line signal down to a low logic state; disconnecting a current path from an external power supply to an internal power supply after the word line signal has been pulled down to the low logic state; and disconnecting a current path from an external ground voltage to an internal ground voltage after a current path from an external power supply to an internal power supply has been completely disconnected.

The present invention relates generally to integrated circuit (IC) designs, and more particularly to a power up/down sequence scheme for memory devices.
A memory device is usually implemented with a power down scheme that cuts off power supply to certain circuit modules when certain modes, such as the sleep mode or the standby mode, are activated in order to reduce the power consumption. A typical power down scheme utilizes an internal power control circuit, a power supply switch (VDD switch), and a ground voltage switch (VSS switch). FIG. 1 schematically illustrates the internal power control circuit 100, the VSS switch 130 and the VDD switch 160 that are needed for a typical power down scheme. The internal power control circuit 100 is comprised of an inverter 102 with its output terminal coupled to an input terminal of an inverter 104 and to an input terminal of an inverter 106. The inverter 102 is connected to an external power supply VDD, an external ground voltage VSS, and an internal ground voltage VSSI. The inverter 104 is connected to an external power supply VDD, an internal power supply VDDI, and the external ground voltage VSS. The inverter 106 is also connected to an external power supply VDD, an internal power supply VDDI, and the external ground voltage VSS. The output terminals of the inverters 104 and 106 are coupled to word lines WLR and WL, respectively. A PMOS transistor 108 is connected to the external power supply VDD at its source, and to a node 110, which is coupled to the output terminal of the inverter 102 and the input terminals of the inverters 104 and 106, at its drain. The gate of the PMOS transistor 108 is controlled by a power down signal (PD).
The VDD switch 160 is comprised of PMOS transistors 162 and 164 coupled between the external power supply VDD and the internal power supply VDDI. The gate of the PMOS transistor 162 is controlled by the first power supply switch control signal PDL, and the gate of the PMOS transistor 164 is controlled by the second power supply switch control signal PDR. The VSS switch 130 contains an NMOS transistor 132 coupled between the external ground voltage VSS and the internal ground voltage VSSI. The gate of the NMOS transistor 132 is controlled by the power down signal PD.
When a power down process is activated, the power down signal PD is pulled down to turn on the PMOS transistor 108 to pass the external power supply VDD to the input terminals of the inverters 104 and 106. As a result, the voltages on word lines WL and WLR are kept at a low level, and therefore maintain the data stored in a memory array (not shown in the figure) undisturbed by the power changes in peripheral circuits. The low power down signal PD turns off the NMOS transistor 132, and therefore isolating the external ground voltage VSS from the internal ground voltage VSSI. During the power down process, the first power supply switch control signal PDL and the second power supply switch control signal PDR are pulled to a high level to turn off the PMOS transistors 162 and 164, such that the external power supply VDD and the internal power supply VDDI are isolated from each other.
One drawback of the conventional power down scheme is the data glitch caused by the inappropriate timing of controlling the PMOS transistor 108, the VDD switch 160, and the VSS switch 130. During the power down process, the power down signal PD is pulled low, and the power supply switch control signals PDL and PDR are pulled high at the same time. The current path between the external power supply VDD and VDDI may be completely cut off before the PMOS transistor 108 is fully turn on. As a result, the VDDI line connected to the inverters 104 and 106 may be floating. This may cause the signals on the word lines WL and WLR to glitch, and therefore disturb the data stored in the memory array.
What is needed is power up/down scheme for peripheral circuits that does not disturb the data stored in memory arrays.

Power up/down sequence scheme for memory devices

Taiwan Semiconductor Manufacturing Co., Ltd.


A system and method to facilitate interactive selection of groupings of clusters and presentation of related datasets are described. An interactive data interface is presented to a user in a display window, the interactive data interface configured to display multiple alternate groupings of clusters associated with at least one dataset of records targeted by the user. Selection of a grouping of clusters from the plurality of selectable groupings is further facilitated based on one or more predetermined parameters associated with each grouping of clusters and the individual clusters within a respective grouping, such as, for example, a target ratio value and a target count value corresponding to each cluster of records.

Marketing is the art of reaching the right customer or consumer, with the right message at the right time. Since marketers cannot afford to craft unique messages for each targeted individual, they always deal with large segments of their target market at any given time.
Data clustering is often used to help such marketers target the appropriate segments of individuals. However, it is often difficult to determine the best clustering of a dataset. The number of possible groupings of records into clusters is extremely large. The possibilities range between all records being in a single cluster to each record being its own cluster. As a result, a comparison among alternate possible groupings of clusters belonging to the same dataset is difficult to efficiently determine. Heuristics are often used to determine which of the possible groupings of clusters is superior to alternate groupings for a particular dataset. Thus, what is needed is a system and method to help marketers in identifying the ideal number of clusters for their dataset.

System and method for facilitating interactive selection of clusters and presentation of related datasets


Homologs of the E. coli proteins orf353, bacterial lg-like domain (group 1) protein (orf405), flu antigen 43 (orf1 364), NodT-family outer-membrane-factor-lipoprotein efflux transporter (orf1 767), gspK (orf3515), gspJ (orf3516), toriB-dependent siderophore receptor (orO597), fibrial protein (orf3613), upec-948, upec-1232. A chain precursor of the type-1 fimbria! protein (upec-1875), yapH homolog (upec-2820), hemolysin A (recp-3768), and Sel 1 repeat-containing protein (upec-521 1) from several pathogenic strains of E. coli have been identified with regions within the proteins that are conserved across all E. coli. Fragments corresponding to the conserved regions, especially immunogenic fragments such a linear B-epitopes, are provided. In addition, variants of the bacterial lg-like domain (group 1) protein (orf405), yapH homolog (upec2820) and two different fragments of hemolysin A (recp3768) are provided herein that have increased solubility as compared to the native protein where the variants still raise a substantially similar immune response in a subject as the corresponding native protein.

E. coli strains have traditionally been classified as either commensal or pathogenic, and pathogenic strains are then sub-classified as intestinal or extraintestinal strains. Pathogenic E. coli are discussed in more detail in reference 1, and fall into a number of different pathotypes i.e. a group of E. coli strains that cause a common disease using a common set of virulence factors. Pathotyping of strains is a routine technique that can be performed genotypically or phenotypically. One recent genotype-based pathotyping method [2] uses a DNA microarray.
Among intestinal strains at least six well-described pathotypes are known: enteropathogenic (EPEC), enterohaemorrhagic (EHEC), enteroaggregative (EAEC), enteroinvasive (EIEC), enterotoxigenic (ETEC) and diffusely adherent (DAEC).
The extraintestinal pathogenic strains (or 'ExPEC' strains [3,4]) of E. coli include uropathogenic (UPEC) strains, neonatal meningitis (NMEC) strains, and septicemia-associated strains (SEPEC). ExPEC is the most common cause of urinary tract infections and one of the leading causes of neonatal meningitis and neonatal sepsis in humans, which can lead to serious complications and death. Other types of extraintestinal infections include osteomyelitis, pulmonary, intra-abdominal, soft tissue, and intravascular device-associated infections. Another ExPEC pathotype outside humans is avian pathogenic (APEC), causing extraintestinal infections in poultry.
Most previous ExPEC vaccines have been based on cell lysates or on cellular structures. SOLCOUROVAC™ includes ten different heat-killed bacteria including six ExPEC strains. URO-VAXOM™ is an oral tablet vaccine containing lyophilised bacterial lysates of 18 selected E. coli strains. Baxter Vaccines developed a UTI vaccine based on pili from 6 to 10 different strains. MedImmune developed a product called MEDI 516 based on the FimH adhesin complex. In contrast, references 5 and 6 disclose specific immunogens from ExPEC strains that can be used as the basis of defined vaccines against both NMEC and UPEC strains.
However, there remains a need for providing a vaccine that protects against a broad spectrum of intestinal and extraintestinal E. coli strains. E. coli is a versatile microorganism with an improved ability to adapt to new niches and to cause a broad spectrum of disease. Fitness, virulence and colonization factors can change in order to allow the microorganism to adapt to different tissues and hosts. Therefore, potential antigens are subject to high selective pressure and, as a result, may have sequence variability among different strains.
The database of genomes available at ncbi.nlm.nih.gov under genomes listed twenty one pathogenic and non-pathogenic E. coli genomes with as few as 4,126 proteins to as many as 5,339 proteins. However, such listings do not identify which are conserved across a significant fraction of the pathogenic E. coli, what are the conserved regions in the proteins that are so conserved, or which proteins among the thousands of potential proteins can be used in a vaccine to produce a sufficient immune response to protect against pathogenic E. coli which requires screening large numbers of proteins to identify the best candidates.
It is an object of the invention to provide further and better antigens for use in immunisation against pathogenic E. coli strains, and more particularly against intestinal pathotypes (e.g. EAEC, EIEC, EPEC and ETEC strains) as well as ExPEC pathotypes.


We present a method for parallel axial imaging, or z-microscopy, utilizing an array of tilted micro mirrors arranged along the axial direction. Image signals emitted from different axial positions can be orthogonally reflected by the corresponding micro mirrors and spatially separated for parallel detection, essentially converting the more challenging axial imaging to a lateral imaging problem. Each micro mirror also provides optical sectioning capability due to its finite dimension.

There exists a conspicuous disparity in the lateral (i.e., x, y) and axial (i.e., z) imaging speed in conventional optical microscopy. While an image at the x-y plane can be routinely acquired in parallel or at high speed, slow mechanical scanning of the objective lens or the specimen itself is typically required in the z direction for axial imaging. This hinders the ability to image fast processes in the axial direction.
Laser scanning optical microscopy, such as multi-photon and confocal microscopy, has become a widely used imaging modality due to its unique optical sectioning capability. However, slow scanning, particularly in the axial (or z) direction remains a hindrance. This typically requires mechanical axial scanning of the specimen or the excitation objective lens, limiting the z-imaging speed and hence the ability to visualize fast dynamic processes in the axial slice plane and overall in the three dimensions.
In an effort to address this challenge, multi-focal imaging has been investigated in wide-field microscopy by using multiple cameras with each placed at a different distance to image a different conjugate plane. Holography has also been applied to fluorescence microscopy to achieve three-dimensional imaging. However, these techniques lack optical sectioning capability.
Methods to achieve multi-focal imaging in scanning microscopy include time and wavelength division multiplexing. In a one-time division multiplexing technique, two sequences of excitation pulses with different wave-front divergence (thereby to focus on two different depth positions) are interleaved in time. The fluorescence signal generated at the two depth positions can then be de-multiplexed in time to realize bi-focal imaging. In epi-reflection chromatic confocal microscopy different wavelengths of a broadband source are focused onto different axial positions inside a specimen through purposely-introduced chromatic aberration. Light reflected from different axial positions has different wavelengths and can therefore be detected in parallel by using a spectrometer.
This method has also been extended to second harmonic microscopy, in which different fundamental wavelengths of a pump pulse are focused to different axial positions to produce second harmonic signals of different center wavelengths that can be simultaneously detected. However, parallel z-imaging has yet to be realized using wavelength division multiplexing in scanning fluorescence microscopy, one of the most widely used imaging modalities. Although chromatic scanning can be utilized to accomplish effective axial scanning, the fluorescence signals excited at different axial positions exhibit similar emission spectra, preventing the use of parallel spectroscopic detection.


A cutter apparatus of a milling machine includes: a transmitting means in an X-axis direction provided with a spindle and a motor delivering rotation power to the spindle; a milling cutter rotatably arranged at one side of the transmitting means so as to cut a work piece; and a tool holder interposed between the spindle and the milling cutter and connecting the milling cutter to be able to eccentrically rotate in a Y-axis direction. Since the necessity of a transmitting means in a Y-axis direction can be eliminated, a mechanical structure can be simplified and a problem of restriction of addition of a model and modification of a work piece can be solved.

(a) Technical Field
The present invention relates to a cutter apparatus of a milling machine having a simplified mechanical structure.
(b) Description of the Related Art
A milling machine is a machine tool used to cut a fixed work piece in a desired shape by a cutter blade operatively linked with a spindle of an electric motion part.
A cutter apparatus of a conventional milling machine needs both a transmitting means in an X-axis (front and rear) direction and that in a Y-axis (up and down) direction for forming a work piece in various dimensions.
As an example, in forming slots of two different types of metal bearings of 149.6 mm with a distance of 152 mm between centers, if only a transmitting means in an X-axis direction is provided, deviation of 2.4 mm can be caused.
Accordingly, the apparatus becomes mechanically complicated and installation cost is also increased.


A multi-ply business form includes at least a lower ply and an upper ply wherein the upper ply overlies only a portion of the lower ply, leaving a first portion of the lower ply exposed in adjacent relationship to the upper ply. The upper ply has a two part label thereon including a release layer on a relatively small part of the upper ply, and an adhesive label overlying the release layer. The release layer and the adhesive label have information impact printed thereon, while the exposed portion of the lower ply has information non-impact printed thereon. The upper ply is also temporarily adhesively secured to the lower ply along at least two edges of the upper ply.

There are circumstances where business forms customers desire to have the option or capability to both impact and non-impact print different kinds of information on a single form. This is particularly true since the advent of bar code technology, the latter being applied via non-impact printing techniques. Bar codes are increasingly found not only on articles themselves, but also on inventory records, labels, receipts and other forms. Oftentimes, however, it is desirable to provide additional variable information such as the names and addresses of senders and recipients on forms by means of impact printers.
In accordance with the present invention, a business form construction capable of receiving both impact and non-impact printing is provided, which form is nevertheless able to be fed continuously through an impact printer without damage or degradation. In the exemplary embodiment, the form generally includes three plies or layers including a lower or base ply in the form of a release sheet. The intermediate ply has an adhesive back overlying the release sheet so that the adhesive back is covered and protected by the release sheet until the form is put into use. The third or top ply overlies only a portion of the intermediate ply. In the exemplary embodiment, which is composed as a waybill, the upper ply comprises a flap which overlies about half of the underlying intermediate ply.
The exposed portion of the intermediate ply accepts non-impact printing. Included on this portion of the intermediate ply is a bar code, as well as other information including, for example, tracking number, telephone (information) number and the like. That portion of the intermediate ply which underlies the top ply or flap is pre-printed by non-impact printing techniques on its upper surface to indicate designated areas for variable information such as the sender's and recipient's addresses, date, amount, tracking number, special instructions and the like. Included on the upper surface of the top ply or flap is a two-part label construction. It is this label assembly which receives variable information via an impact printer. In this regard, the form in accordance with this invention incorporates a conventional carbonless image transfer system well understood by those skilled in the art. Such systems include coatings on the front and/or back of the involved sheets or plies, typically referred to as CF (coated front), CB (coated back) and CF/CB (coated front and back) coatings. The latter is also pre-printed to indicate designated areas for variable information similar to the underlying portion of the intermediate ply. The label assembly includes a label lower part coated on the intermediate ply. More specifically, the lower label part comprises a first coating or film of polyethylene overlaid with a silicone coating and a CF coating. The label upper part comprises a die-cut face stock with adhesive on its underside, along with a silicone coating and a polyethylene film or coating. A CB coating is also applied over the silicone. That portion of the upper surface of the intermediate ply which underlies the top ply or flap is also provided with a CF coating. With this arrangement, when impact printing is applied to the label, the information is transferred not only to the lower label part but also to the intermediate ply.
It will be appreciated that it is necessary to maintain the top flap or ply in a flat orientation while the form is passed through a dot matrix or other impact printer. The flap also needs to withstand the rigors of shipping and handling of the form or forms. At the same time, however, it is necessary to be able to remove the upper ply of the form easily without damaging the flap itself. These three goals are accomplished by the incorporation of glue spots along the transverse edges of the upper flap portion, temporarily adhering the flap portion to the intermediate ply. In addition, a solid glue line extends parallel to the margin of the form, along the left-hand side of the upper flap portion, but to the right of a separation line which defines a marginal stub. This additional use of non-permanent adhesive is temporary in nature, serving only to hold the upper flap in place during processing, but permitting easy removal of the upper flap or ply.
Accordingly, in its broadest aspects, the present invention relates to a multi-ply business form comprising at least a lower ply and an upper ply wherein the upper ply overlies only a portion of the lower ply, leaving a first portion of the lower ply exposed in adjacent relationship to the upper ply; the upper ply having a two part label thereon including a release layer on a relatively small part of the upper ply, and an adhesive label overlying the release layer; the release layer and the adhesive label having information impact printed thereon; wherein the exposed portion of the lower ply has information non-impact printed thereon; and wherein the upper ply is temporarily adhesively secured to the lower ply along at least two edges of the upper ply.
In another aspect, the invention relates to a business form construction in a continuous web wherein plural forms are connected by perforation lines extending in a direction transverse to a feeding direction of the web, each form within the web comprising a base ply having a release coating on an upper surface thereof; an intermediate ply temporarily adhesively secured to the base ply and having non-impact printing at least on an exposed portion of an upper surface thereof; and an upper ply partially overlying the upper surface of the intermediate ply, the upper ply configured to be impact printed in an area adjacent the exposed portion of the intermediate ply.
Other objects and advantages of the subject invention will become apparent from the detailed description which follows.