A differential oscillation circuit according to the present invention is a differential oscillation circuit including a feedback loop circuit. The differential oscillation circuit includes: delay, circuits, cascade-connected one after another on the feedback loop circuit, each delay circuit configured to delay paired differential input signals which the delay circuit receives, and to output the delayed differential signals as paired differential output signals; and an oscillation activation detector circuit configured to detect whether the oscillation circuit is in an oscillation activation state or in a stable state, and to output a detection signal indicating a result of the detection. Furthermore, on the basis of the detection signal outputted from the oscillation activation detector circuit, each of the delay circuits controls output current values of the differential output signals. This circuit configuration enables the speeding up of the oscillation frequency of the circuit.

1. Field of the Invention
The present invention relates to an oscillation circuit, particularly to speeding-up of an oscillation circuit.
2. Description of Related Art
In recent years, the operating speed of CPUs and memory I/Fs in semiconductor integrated circuits has been progressively increased. Oscillation circuits capable of operating at high speed are used in a wide range of fields, including generation of clock signals for microprocessors and generation of carriers for mobile phones and the like. In this manner, high-speed operable oscillation circuits are essential for large-scale and high-speed data transfer and data processing. Nevertheless, the high-speed operation of the oscillation circuits is hindered by some factors such as an influence of currents which flow while oscillation of oscillation circuits is activated. In addition, it is very difficult to control currents flowing in the oscillation circuits. This being the case, a technology capable of easily controlling the currents flowing in oscillation circuits is demanded in order to enable the oscillation circuits to operate at high speed.
FIG. 7 shows an oscillation circuit described in Japanese Patent Application Publication No. 2001-358565 (JP 2001-358565 A). FIG. 8 shows a circuit configuration of a delay circuit constituting the oscillation circuit shown in FIG. 7. The delay circuit 18 includes: an amplifier (N-channel MOS transistor) 26 and an amplifier (N-channel MOS transistor) 27 which share a transistor (P-channel MOS transistor) 25; an amplifier (N-channel MOS transistor) 29 and an amplifier (N-channel MOS transistor) 30 which share a transistor (P-channel MOS transistor) 28; and a variable current generator (P-channel MOS transistor) 31 and a variable current generator (N-channel MOS transistor) 32 for controlling the amounts of currents flowing in the amplifiers 26, 27, 29, 30. In FIG. 8, reference signs Cs1 (33) and Cs2 (34) denote parasitic capacitances between the output terminals of the delay circuit 18 and the input terminals of another delay circuit at the following stage.
By use of signals inputted through the terminals Vin1, Vin2, the amplifiers 26, 30 and the transistors 25, 28 charge and discharge the parasitic capacitances Cs1, Cs2, and output signals, whose phases are reversed from those of these input signals, to terminals Vout1, Vout2. A positive feedback circuit including the amplifiers 27, 29 is provided to connect the output signals to each other. The gate of the amplifier 27 is connected to an output node where the drain of the transistor 28 and the drain of the amplifier 30 are connected together. The gate of the amplifier 29 is connected to an output node where the drain of the transistor 25 and the drain of the amplifier 26 are connected together.
Thereby, in this positive feedback circuit, the amplifier 27 amplifies a minute potential difference in the signal outputted from the amplifier 30, and outputs the amplified potential difference to an output terminal of the amplifier 26. Similarly, the amplifier 29 amplifies a minute potential difference in the signal outputted from the amplifier 26, and outputs the amplified potential difference to an output terminal of the amplifier 30. In addition, the variable current generator 31 is connected between the power supply voltage VDD, and the sources of the transistors 25, 28. The variable current generator 32 is connected between the ground voltage GND and the transistors 26, 27, 29, 30. In this respect, a current flowing through the variable current generator 31 is controlled on the basis of a voltage of a terminal Vcontp. Furthermore, a current flowing through the variable current generator 32 is controlled on the basis of a voltage of a terminal Vcontn. Thereby, the delay circuit 18 is capable of controlling a delay value of the signal output relative to the signal input.
As described above, even when the potential difference between the signals inputted from the terminals Vin1, Vin2 is minute, the amplifiers 27, 29 detect the signal difference and thus amplify its signal amplitude. Hence, the amplifiers 27, 29 forcedly operate differential pair outputs (voltages of the respective terminals Vout1, Vout2) at a voltage value of the power supply voltage or the ground voltage. In this manner, each delay circuit is capable of increasing its gain. For instance, even if the differential pair inputs to the terminals Vin1, Vin2 are both at the ground level, the amplifiers 27, 29 amplify a minute potential difference which occurs between the differential pair outputs due to device noise and the like. In addition, the amplifiers 27, 29 operate so that the differential pair outputs can be reverse-phase outputs. Furthermore, the amplifiers 26, 27 share the transistor 25, whereas the amplifiers 29, 30 share the load transistor 28. With this configuration, four amplifiers can be formed by use of the 6 transistors.
Next, descriptions will be provided for a configuration shown in FIG. 7. In FIG. 7, delay circuits 18-d, 18-e, 18-f, 18-g each with the configuration shown in FIG. 8 are cascade-connected one after another. An output terminal Vout1 of the delay circuit 18-g in the last stage is connected to an input terminal Vin2 of the delay circuit 18-d. In addition, an output terminal Vout2 of the delay circuit 18-g is connected to an input terminal Vin1 of the delay circuit 18-d.
Next, descriptions will be provided for an operation of the oscillation circuit shown in FIG. 7. For instance, when signals of an input terminals Vin1 and Vin2 of the delay circuit 18-d are at high level and at low level, respectively, signals of output terminals Vout1 and Vout2 of each of the delay circuits 18-d, 18-e, 18-f, 18-g are also at high level and at low level, respectively. Then, the output signals from the delay circuit 18-g are crossed over, and are thus fed back into the input terminals of the delay circuit 18-d. Specifically, the output terminal Vout1 of the delay circuit 18-g is connected to the input terminal Vin2 of the delay circuit 18-d, whereas the output terminal Vout2 of the delay circuit 18-g is connected to the input terminal Vin1 of the delay circuit 18-d. Consequently, the signal of the input terminal Vin1 of the delay circuit 18-d changes from high level to low level, whereas the signal of the input terminal Vin2 of the delay circuit 18-d changes from low level to high level.
Thereby, signals of the output terminals Vout1 of the delay circuits 18-d, 18-e, 18-f, 18-g sequentially change to the low level, whereas signals of the output terminals Vout2 of the delay circuits 18-d, 18-e, 18-f, 18-g sequentially change to high level. In addition, the feedback changes the signal of the terminal Vin1 of the delay circuit 18-d from low level to high level, and the signal of the terminal Vin2 of the delay circuit 18-d from high level to low level. The oscillation circuit oscillates by repeating this sequence. In this respect, by changing voltages of the terminals Vcontp, Vcontn, a current of each variable current generator in each delay circuit can be controlled, and thereby a delay value of each delay circuit can be controlled. In other words, the oscillation frequency of the oscillation circuit can be controlled.
Here, assume a case where, for instance, signals of the respective output terminals Vout1, Vout2 of the delay circuit 18-d are both at low level in the oscillation circuit according to JP 2001-358565 A shown in FIG. 7. In this case, signals of the output terminals Vout1, Vout2 of the delay circuit 18-e are both at high level; signals of the output terminals Vout1, Vout2 of the delay circuit 18-f are both at low level; and signals of the output terminals Vout1, Vout2 of the delay circuit 18-g are both at high level. In other words, this results in an activation state where the oscillation circuit does not oscillate (an oscillation stop state).
By use of the delay circuit shown in FIG. 8, descriptions will be hereinbelow provided for a setting to avoid the oscillation stop state. When signals of the input terminals Vin1, Vin2 are both at low level, the transistors 25, 28 are turned on. By this, a high-level signal is supplied to the gate of each of the transistors 27, 29. Thereby, the transistors 27, 29 are turned on. In this case, the delay circuit needs to have a circuit configuration in which the output terminals Vout1, Vout2 output signals whose phases are reverse to each other. Specifically, in order to activate oscillation of the oscillation circuit which is currently in the oscillation stop state, the transistor 27 constituting the third amplifier and the transistor 29 constituting the fourth amplifier each need to have a large differential gain. In other words, the transistors 27, 29 need to have a transistor configuration which is capable of sensitively responding to even a minute signal potential difference. In this case, the transistors 27, 29 need to be configured in a large transistor size so as to have a sufficiently large current capability.
Thus, the transistors 27, 29 constitute the differential amplifier for activating the oscillation of the oscillation circuit from the oscillation stop state, and continuously operate even when the oscillation circuit stably oscillates after the oscillation activation. However, the transistors 27, 29 hinder the oscillation circuit from oscillating at high-speed, because the transistors 27, 29 each have the sufficiently large current capability, as described above.
Hereinbelow, descriptions will be provided for a mechanism which causes the foregoing problem by use of FIG. 9. FIG. 9 shows how currents flow in a delay circuit constituting the oscillation circuit described in JP 2001-358565 A. Reference sign Is1 denotes a current flowing through the transistor 25; Is2, a current flowing through the transistor 27; and Iout, an output current flowing to the output terminal Vout2. In addition, reference signs Vin1, Vin2 denote the input terminals of the delay circuit; and reference sings Vout1, Vout2 denote the output terminals of the delay circuit. The transistors 31, 32 shown in FIG. 8 have no influence on the operation, and thus descriptions thereof will be omitted here. Furthermore, for the sake of explanatory convenience, a terminal connected to the sources of the transistors 25, 28 is denoted by reference sign Vpp, and a terminal connected to the sources of the transistors 26, 27, 29, 30 is denoted by reference sign GND.
While the transistor 27 is on, the current Is2 flows through the transistor 27. During this time, the output current Iout flowing to the output terminal Vout2 decreases. In other words, the output current Iout can be expressed with the current Is1 minus the current Is2. In the example shown in FIG. 9, the output current Iout decreases due to the current Is2 flowing when a signal of the output terminal Vout2 changes from low level to high level, that is, when a signal of the output terminal Vout1 changes from high level to low level.
In this respect, as publicly known, the oscillation frequency of the oscillation circuit 1 is proportional to the output current Iout and inversely proportional to the capacitance Cs1. For this reason, as the current Is2 becomes larger, the upper limit of the oscillation frequency becomes lower. In other words, as the current Is2 becomes larger, the speeding-up of the oscillation frequency of the oscillation circuit 1 is more limited. To address this, the current Is2 may be decreased by reducing a channel width W of the transistor 27. Once the current capacity of the transistor 27 is reduced, however, the oscillation circuit would have a difficulty in avoiding the oscillation stop state when activating its oscillation.
In the delay circuit shown in FIG. 8, as described above, a large amount of a current flows through each of the transistors 27, 29 even while the oscillation is stable. This hinders the oscillation circuit from oscillating at high-speed. On the other hand, reduction of the current capacity of each of the transistors 27, 29 by reduction in their transistor size is conceivable as a measure to achieve the speeding up of the oscillation of the oscillation circuit. However, this makes it difficult for the oscillation circuit to avoid the oscillation stop state when activating its oscillation.
As described above, the conventional oscillation circuit has a problem that the speeding up of the oscillation frequency is limited by some factors such as an influence of currents for amplifying oscillation signals.


A lighting assembly includes a light source to emit on-axis light rays at smaller angles relative to an optical axis of the light source, and off-axis light rays at larger angles relative to the optical axis and spectrally different from the on-axis light rays. The lighting assembly additionally includes a light guide having a light input edge adjacent the light source and opposed major surfaces between which light from the light source propagates by total internal reflection. The light input edge has an edge feature aligned with the light source to receive light therefrom. The edge feature specularly redirects the on-axis light rays and the off-axis light rays differently to increase overlap between the on-axis light rays and the off-axis light rays within the light guide. The increased overlap reduces spatial color variation of light extracted from the light guide between locations at different angles from the optical axis.

Energy efficiency has become an area of interest for energy consuming devices. One class of energy consuming devices is lighting devices. Solid-state light sources, such as light-emitting diodes (LEDs), show promise as energy efficient light sources for lighting devices. But there remains room for improvement in how to couple light from the solid-state light sources into other components of the lighting devices.

Lighting assembly with a light guide having light-redirecting edge features


A drive transformer isolated-adaptive drive-circuit includes a power supply, a first MOSFET and a second MOSFET, the drain electrode of the first MOSFET coupled with the positive electrode of the power supply, and the source electrode of the first MOSFET coupled with the drain electrode of second MOSFET; the source of the second MOSFET coupled with the negative electrode of the power supply; a drive transformer having a first winding and a second winding; a first fast drive circuit, one end coupled with the first winding, the other end coupled with the first MOSFET; a second fast drive circuit, one end coupled with the second winding, the other end coupled with the second MOSFET; a first adaptive-dead-time control sub-circuit; and a second adaptive-dead-time control sub-circuit.

With the intensification of the world energy crisis, reducing energy consumption and protecting environment have become a consensus. In order to improve the efficiency of AC/DC and DC/DC power converters, half bridge, full bridge and LLC resonant converters have been widely used. But the operating frequency of the resonant converter varies with the dynamic changes of the load. The impedance of the gate, and the body-diode reverse recovery time (Trr) may impact on the dead-time control and even change the drive-signal waveform. Up to now, due to the fixed dead-time control, the zero-voltage switch (ZVS) may not be achieved if the dead-time is too long; the short-circuit may take place on one arm of the bridge if the dead-time is too short, less than a body-diode Trr, which may led to the failure of the resonant converter.

Drive transformer isolation adaptive drive circuit


An MN counter with analog interpolation (“MNA counter”) includes an MN counter, a multiplier, a delay generator, and a current generator. The MN counter receives an input clock signal and M and N values, accumulates M for each input clock cycle using a modulo-N accumulator, and provides an accumulator value and a counter signal with the desired frequency. The multiplier multiplies the accumulator value with an inverse of M and provides an L-bit control signal. The current generator implements a current locked loop that provides a reference current for the delay generator. The delay generator is implemented with a differential design, receives the counter signal and the L-bit control signal, compares a differential signal generated based on the counter and control signals, and provides the output clock signal. The leading edges of the output clock signal have variable delay determined by the L-bit control signal and the reference current.

1. Field
The present invention relates generally to electronics circuits, and more specifically to a direct digital synthesizer (DDS).
2. Background
In a modem communication device, multiple clock signals with frequencies that are unrelated may be needed for various functions. For example, a clock signal with a first frequency may be needed for a digital signal processing subsystem, another clock signal with a second frequency may be needed for a sampled analog subsystem, and so on.
Multiple clock signals with unrelated frequencies may be generated in various manners. In one conventional design, a clock generator with a single phase locked loop (PLL) is operated at a high frequency. The clock signal from this generator is divided in frequency by different integer values to obtain multiple output clock signals with different frequencies. This design places stringent requirements on the PLL in terms of performance and power consumption. In another conventional design, a separate PLL is provided for each subsystem requiring a clock signal with a different frequency. This design is undesirable because multiple PLLs for multiple clock signals normally consume a large amount of power and occupy a large area.
In yet another conventional design, an MN counter is used to divide an input clock signal (e.g., from a PLL) by a divider value to obtain an output clock signal with the desired frequency. The divider value is a ratio of two integer values M and N (i.e., N/M), where M<2·N for proper operation of the MN counter and N/M may be an integer or non-integer value. If the N/M divider value is not an integer, which is often the case, then the desired frequency is obtained by dividing the input clock signal in frequency by └N/M┘ for some of the time and by ┌N/M┐ for the remainder of the time, where └x┘ is a floor operator that provides the nearest lower integer value for x and ┌x┐ is a ceiling operator that provides the nearest higher integer value for x. This division with two integer values of └N/M┘ and ┌N/M┐ results in the output clock signal having inherent jitter that can be as large as one period of the input clock signal. For example, if the input clock frequency is 100 MHz, then the worst-case jitter for the output clock signal from the MN counter is 10 nsec.
Various methods for reducing jitter in the output clock signal from an MN counter have been proposed. For example, some methods reduce jitter by estimating the amount of phase shift needed in each output clock cycle to eliminate the jitter and then adjusting the output clock phase accordingly. In any case, most of these methods rely on absolute (voltage and/or current) reference levels to perform the phase shift estimation and/or adjustment and are thus prone to performance degradation due to circuit component mismatches and integrated circuit (IC) process variations.
There is therefore a need in the art for techniques to generate a clock signal having less jitter.

Low-power direct digital synthesizer with analog interpolation


An I/O address translation method for specifying relaxed ordering for I/O accesses are provided. With the apparatus and method, storage ordering (SO) bits are provided in an I/O address translation data structure, such as a page table or segment table. These SO bits define the order in which reads and/or writes initiated by an I/O device may be performed. These SO bits are combined with an ordering bit, e.g., the Relaxed Ordering Attribute bit of PCI Express, on the I/O interface. The weaker ordering indicated either in the I/O address translation data structure or in the I/O interface relaxed ordering bit is used to control the order in which I/O operations may be performed.

1. Technical Field
The present invention relates generally to an improved data processing system. More specifically, the present invention is directed to an improved apparatus and method for I/O address translation in order to specify a relaxed ordering for I/O accesses.
2. Description of Related Art
Operating systems are responsible for managing the virtual memory of a computer system. Virtual memory is addressable memory that extends beyond the limits of the available physical memory and is thus, "virtual." The principal benefit of using virtual memory is that a user can run more applications at once and work with larger amounts of data than would be possible if the logical address space were limited to the available physical memory. Instead of equipping a computer with amounts of physical memory large enough to handle all possible needs, the user can install only enough physical memory to meet average needs. During those occasional times when more memory is needed for large tasks or many applications, the user can take advantage of virtual memory.
The operating system uses a Virtual Memory Manager (VMM) to perform virtual memory management. Virtual memory management involves the establishment of virtual address translations to real physical memory locations and the generation of data structures, referred to as "page frame tables" or simply "page tables," which may be used to perform virtual to real address translations. The VMM also provides a number of routines that software can use to modify or obtain information about the software operations. For example, the VMM may be used to hold portions of the logical address space in physical memory, lock portions of the logical address space in their physical memory locations, determine whether a particular portion of the logical address space is currently in physical memory, and determine, from a logical address, the physical address of a block of memory.
The VMM extends the logical address space by using part of an available secondary storage, e.g., a hard disk, to hold portions of applications and data that are not currently in use in physical memory. When an application needs to operate on portions of memory that have been transferred to disk, the VMM loads those portions back into physical memory by making them trade places with other, unused segments of memory. This process of moving portions, or pages, of memory between physical RAM and the hard disk is called "paging."
When a software component tries to access data in a page of memory that does not currently have a valid virtual to physical translation resident in the translation hardware, the CPU issues a special kind of bus error known as a "page fault." Translation hardware is platform specific, but usually includes translation lookaside buffers (TLBs), which are caches used to hold the most recently used page table entries, and a hardware page frame table. A similar translation mechanism is also used for I/O access of memory.
The VMM intercepts page faults and tries to load the necessary translation into the hardware page frame table. In some cases not only does the referenced page not have a valid translation in the hardware page frame table, but is also not resident in physical memory. In this case, not only does the VMM have to load a valid translation into the hardware page table, but it must also load the affected page or pages into physical memory. The VMM does so by executing its own internal page-fault handler. This loading of the valid translation and affected pages takes additional processor cycles to perform and thus, is a source of latency in the operation of the processor of the computer system.
The handling of page faults is not the only source of latency in virtual memory computer systems. Congestion also results in latency in the computer system that causes the processor to execute instructions at a slower rate. That is, when there are read/write instructions accessing the same portions of memory as other read/write instructions, congestion occurs in that many accesses, from multiple processors or input/output (I/O) devices for example, to the same portion of memory are pending and must be executed in an ordered manner. Thus, because of congestion, a specific access may take more time to complete than accesses of a portion of memory that is less congested. If subsequent accesses to portions of memory with less congestion are unnecessarily delayed, such as because of the need to perform an access to a congested portion of memory first, overall performance of the computer system suffers. This is because various buffers and resources in the I/O subsystem are tied up longer than necessary and are, therefore, unavailable for use by subsequent I/O reads and writes.
In order to avoid such problems due to congestion, many processors include the capability to perform I/O reads and writes out-of-order whenever possible, i.e. the reads and writes are performed in the main memory in a different order from which an I/O device initiates the accesses. This is referred to as weak ordering of the reads and writes.
However, in some ordering schemes, the order in which reads and/or writes occur is essential to an underlying communication scheme. For example, in a producer-consumer protocol, one block of writes may convey data that was requested as part of an I/O operation request, such as a disk read. A subsequent write may indicate that the I/O operation has completed. For this protocol, it is essential that this last write be performed after all previous writes. This ordering is referred to as strong or strict ordering.
While weak ordering provides flexibility with the execution of reads and writes, there are times when such weak ordering may result in errors in the processing of reads and writes, i.e. when the order in which reads and/or writes are performed is important to proper operation of the system. While strong or strict ordering ensures proper operation of the system, such strong or strict ordering for all I/O operations may result in congestion, thereby reducing the speed at which I/O reads and writes may be performed.

I/O address translation method for specifying a relaxed ordering for I/O accesses

International Business Machines Corporation


The present invention provides a manipulator on a sliver can transport carriage which can travel along the spinning positions of a spinning machine to enable the manipulator to take up a leading end of sliver at a defined position on a sliver container and guide the sliver end to a sliver supply location of a spinning position. The manipulator comprises a suction jet on its free end for receiving and holding the leading end of the sliver, an actuation member for engaging and opening the sliver supply location, and a compressed air supply line for blowing the sliver end into the open sliver supply location

The present invention relates to a method for supplying a sliver from a filled sliver container to a spinning position of a spinning machine by introducing the leading end of the sliver by a manipulator into a sliver supply location of the spinning position and to an apparatus for carrying out the method.
In textile spinning plants wherein the supply of sliver cans from a drawing frame to a spinning machine already takes place automatically with can transport carriages, it is desirable that the leading end of the sliver should also, in a natural further extension of the automation, be introduced automatically from the full can into the spinning box of the spinning machine.
A device is already known from European patent EP 0,348,678 A1 in which the leading end of a sliver is brought to the spinning position by means of a manipulator assembly. The start of the sliver is obtained in that, during the filling of the sliver from a large can into the can standing at the spinning position, the sliver is torn and the end of the sliver filled into the can at the spinning position is brought in front of the sliver entrance location into the spinning position, e.g., in front of the entrance of the condenser, during which the sliver is mechanically clamped. Compressed air is blown at the spinning position above the sliver intake opening into the condenser through an opening provided especially for this purpose in a canal or conduit of the condenser. The compressed air should, on the one hand, produce an injector action for drawing in the leading end of sliver by suction and on the other hand should blow the leading end of the incoming sliver under the condenser roller. There is the danger in this device and this method that the injector action of the compressed air either is too weak to suction in the presented sliver end, which is no longer held, or the compressed air can be so strong that the sliver is blown in an uncontrolled manner into the opening device.

Method and apparatus for supplying a sliver to a spinning position of a spinning machine


A method of seamless processing for merging 3D color images is disclosed. By transferring the images to a different color space, it separates the brightness from the color information. The seams are smoothed according to the brightness, and the result is transferred back to the RGB color space. It keeps the colors of the images and does not destroy the original textures.

1. Field of Invention
The invention relates to a method of seamless processing for merging 3D color images and, in particular, to a color processing method that achieves seamless effect using the brightness information and maintains the original colors without destroying its textures.
2. Related Art
When making three-dimensional (3D) images, seams are generated when combining two or more images due to the light source effect. This is particularly apparent for color images. Usually, we do not want to destroy the original textures and colors in the images. However, the different display coordinates make it very hard to use the usual planar image processing methods to solve the color difference problem occurring to the seams.
In order to achieve seamless image processing, many methods were proposed. For example, in "Correction for an Image Sequence" (Binh Pham, Glen Pringle, 1995 IEEE), some representative colors are selected in the overlapped area for obtaining a correction matrix to make the color consistent. Nevertheless, in addition to being only applicable to the overlap of two images, the method also has the following drawbacks:
(1) The selected representative colors will affect the correction result. The selection method cannot be widely applied.
(2) When the color difference between two regions is large, the effect will be worse.
(3) Since the colors of two regions are forced to be the same, the real color of the whole image is lost.
(4) Different reference colors have been chosen for different images. They cannot be applied to all images to effectively solve the discontinuity problem.
In "Computing Consistent Normals and Colors from Photometric Data" (H. Rushmeier and F. Bernardini), five light sources are put at different positions. The images are taken for an angle of an object using different light source individually. The five images are then synthesized into a single image with different weights, thereby solving the inhomogeneous problem caused by the light effect. The synthesized image is then merged with other similarly processed images. Thus the discontinuous phenomena around seams have diminished. Additionally, the neighborhood average method is used to solve the remaining discontinuity problem. The method is performed by directly averaging the color information RGB in the overlapped regions. Its shortcomings are:
(1) The seams processed using the proposed method still have lightly discontinuous phenomena.
(2) It is limited by the hardware setup and has a higher cost.
(3) While making a 3D display image, one has to repeatedly take images for five light sources individually for each angle of an object. It is thus very time-consuming.
(4) It still requires software corrections. Moreover, using the neighborhood average method to process the colors is likely to blur the image and loses the reality.
Besides the hardware solution, common technique such as linear or nonlinear weighted averaging performed by software is used to deal with seams at image boundaries. However, they all will blur the images at the edges and lose the detailed textures. Therefore, they are not ideal for the merges of several images or 3D images. The U.S. Pat. No. 6,271,847 warps the images and then blends the warped images using a weighted pyramid feathering scheme. The method works well and makes it possible to create seamless texture maps. However, it is likely to distort the color because it processes images within the RGB color space.

Method of seamless processing for merging 3D color images

Industrial Technology Research Institute


Venous therapy methods and apparatus improve arterial or venous blood flow, for example in the legs. Venous therapy can reduce venous backflow and can improve arterial therapy such as that provided by intermittent pneumatic compression therapy.

Field
This relates to arterial and/or venous therapy methods and apparatus, systems and procedures for improving arterial or venous blood flow, for example in the legs, and methods and apparatus for reducing venous backflow, for example in the legs and for example during therapy.
Related Art
Patients with obstructions of the arteries in the extremities or limbs, for example the leg (peripheral artery disease, or PAD) may experience reduced arterial blood flow, and possible additional complications as a result. Arterial blood flow may be improved by surgically bypassing the occluded arteries, or by removing obstructions with devices that are inserted into the blood vessel. The deterioration of arterial blood flow can lead to severe pain, tissue loss (arterial ulcers), or toe loss despite use of vascular procedures. When the arteries cannot be repaired anymore, the reduced arterial blood flow may require amputation.
Non-invasive techniques can be used to increase vascular blood flow without surgery. Devices may be used that apply a cycled compressive force to various designated areas of an extremity or limb, for example the foot or leg. This cycled compressive force is designed to increase the amount of blood returning to the heart through the veins, thereby enabling increased arterial blood flow to the limb.
More specifically, peripheral arterial disease of the lower limbs is treated medically and non-invasively using external intermittent pneumatic compression (IPC) devices that apply rapid, high-pressure pulses to the lower extremity, which may include areas of the foot, ankle, calf and thigh. Another well accepted medical treatment for the same disease is walking therapy where the patients are encouraged to walk; often using a treadmill. These two treatment modalities, IPC and walking have certain commonalities. Both are performed with the patients heart located above the affected lower limbs. Both involve rapid compression of the limb's veins: IPC by external compression and walking by muscle contraction. IPC typically applies a high pressure of short duration of several seconds followed by a much lower pressure of longer duration. Walking, consistent with the various phases of gait, applies a high pressure of short duration during muscle contraction followed by a relatively longer duration of lower pressure due to muscle relaxation. In both cases, vein compression is sufficient to completely collapse the vein and therefore empty the vein of its blood. The expelled venous blood within the foot, ankle, calf and thigh regions is typically moved toward the heart and one way check valves distributed along the lower extremity's veins prevent the reverse flow of that blood away from the heart and therefore, distally toward the foot.
When the patient is upright, either sitting or standing while at rest and without IPC, the veins are full and the pressure in those veins is the hydrostatic pressure equal to the height from that point of the vein to the heart multiplied by the density of the blood, multiplied by the acceleration of gravity (9.8 m/sec2). Since the acceleration of gravity and blood density do not change, the venous pressure can be considered to be proportional to the height of the fluid in the vein below the heart. When the veins are emptied, either from walking, exercise or from IPC, the column of blood to the heart is interrupted and the venous pressure drops to close to zero. Herein, arterial compression from walking, exercise or IPC or from other forms of arterial compression also will be termed arterial therapeutic compression, or ATC. The time-averaged pressure in the arteries is the sum of mean arterial pressure created by the pumping heart and the hydrostatic pressure calculated similarly to venous pressure. Neither walking nor therapeutic IPC apply enough pressure to collapse the arteries so their pressure is not reduced as in the veins.
Flow through the capillaries from the arteries to the veins is therefore increased when the venous pressure is reduced and the arterial pressure is unchanged since flow is proportional to the pressure difference divided by the resistance to flow. This physiological mechanism is the most recognized cause of increased flow when using IPC in the treatment of PAD and also takes place during walking. This mechanism remains in place until the veins refill and reestablish higher venous pressures. In patients with properly functioning venous valves, the veins refill slowly from arterial inflow passing through the capillaries and into the veins. However, in patients with incompetent venous valves, blood falls rapidly backward through the limb's veins and rapidly creates the column of blood that rapidly reestablishes higher venous pressure. The physiological mechanism described above for increasing blood flow to the extremity is therefore lessened in its duration.
All of the veins in the legs have venous valves. The valves have two leaflets that allow blood to flow only in one direction. Venous blood normally moves along the veins toward the heart. The venous valves prevent the blood from falling back to a lower part of the leg, for example when the individual is standing, sitting or whenever the heart is above the limb. Normal valves thus prevent venous reflux, and therefore help to maintain the normal pressure difference between arterial blood and venous blood, and keeps venous blood from accumulating in the legs.
If the venous valves become damaged or do not function properly, blood can flow down the veins or away from the heart and accumulate in lower parts of the leg. The accumulated blood can produce vein enlargement, swelling in the leg with accompanying pain and other complications. Some surgical procedures can be used to improve venous blood flow, such as by removing superficial veins having the incompetent valves, but deep veins are not removed because of their importance to adequate flow of blood from the leg back to the heart. Other surgical procedures can also be used, but they require surgical access to the inside or the outside of the vein.
Accumulated blood due to incompetent venous valves reduces arterial blood flow from normal due to the presence of the venous blood, its associated column of pressure, and the reduced removal of the venous blood back to the heart. Therefore, the efficacy of any therapy for arterial disease or deficiencies in the legs is reduced in those patients with incompetent venous valves. Use of arterial pumps or other means for intermittent compression therapy in such patients may be ineffective or less effective. For example, it has been shown that patients with venous reflux in the leg obtain less physiological effect of increased arterial blood flow during IPC. Patients using IPC or walking to treat their PAD will therefore receive less effective treatment if they also have incompetent venous valves that allow venous reflux.


Disclosed is a light emitting apparatus including: first and second substrates having light transmissive property and flexibility arranged to face each other; a plurality of light emitting element groups arranged along a predetermined straight line between the first and second substrates and each of the light emitting element groups includes a first light emitting element and a second light emitting element; and a conductor pattern formed on the first substrate and including respective individual line patterns individually connected to the first and second light emitting elements and a common line pattern commonly connected to the first and second light emitting elements. The individual line patterns are routed to one side and the other side of the straight line centered on at least a part of the common line pattern.

In recent years, emphasis has been placed on efforts to reduce energy consumption. From such a background, light emitting diodes (LEDs) are attracting attention as a next-generation light source due to having relatively low power consumption. LEDs have a small size, generate less heat, and have excellent responsiveness. For this reason, LEDs are widely used in various optical devices. For example, a light emitting apparatus has recently been proposed, in which LEDs arranged on a substrate having flexibility and light transmissive property are used as a light source. In such types of light emitting apparatus, finding a method of supplying power to LEDs is an issue.
In particular, in a light emitting apparatus having a plurality of LEDs as a light source, wiring on the substrate where the LEDs are mounted is limited from the viewpoint of securing transmissive property.


A method of indirect bonding used in orthodontic treatment includes the steps of placing a first component of an adhesive on base structure of an orthodontic appliance and a second component of the adhesive on portions of a patient's tooth. The appliance is connected to a transfer tray, and the transfer tray is placed over the tooth such that the first component and the second component contact each other and react to provide a bond for securing the appliance to the tooth. The bond has sufficient strength within two minutes and preferably within 1.5 minutes of the time that the first component contacts the second component to enable removal of the tray from the tooth without significantly changing the position of the appliance on the tooth.

1. Field of the Invention
This invention relates to a method and adhesive for bonding orthodontic appliances such as brackets to a patient's teeth. More specifically, the present invention relates to an indirect bonding method wherein the ultimate position of the appliance on the teeth is determined in part by use of a stone model and transfer tray, and wherein the adhesive provides specific advantages for carrying out the method.
2. Description of the Related Art
Orthodontic treatment involves movement of malpositioned teeth to orthodontically correct locations. During treatment, tiny appliances known as brackets are often fixed to the patient's teeth, and an arch wire is placed in a slot of each bracket. The arch wire forms a track to guide movement of the teeth to desired locations. Ends of the arch wire are often connected to buccal tubes that are in turn secured to the patient's molar teeth. The brackets, buccal tubes and arch wires are commonly referred to as "braces".
Orthodontic brackets are often bonded directly to the patient's teeth by an adhesive. In one technique, a small quantity of adhesive is placed or "buttered" on the base of each bracket and the bracket is then placed on a selected tooth. Next, the bracket is shifted slightly on the tooth as may be needed to bring the bracket to a desired location on the tooth. Once the adhesive has hardened, the bracket is bonded to the tooth with sufficient strength to withstand subsequent forces as orthodontic treatment progresses.
Many practitioners use adhesives known as chemical curing adhesives in the direct bonding technique described above. Chemical curing adhesives are often supplied in two initially separate components that, once mixed together, react and harden to adhere the bracket to the tooth. Typically, the components are mixed together and a small quantity of the mixture is placed on the back of the bracket prior to placing the bracket on the tooth.
However, the direct bonding method as described above when carried out using a chemical curing adhesive is often considered unsatisfactory because the adhesive may unduly harden before the practitioner has had an opportunity to shift the bracket to its precise, intended location on the patient's tooth. For example, if the procedure is interrupted after the components are mixed together, the adhesive may become too stiff to permit the bracket to be shifted across the surface of the tooth. Such an occurrence is preferably avoided, since the ultimate position of the tooth in the oral cavity as treatment progresses is determined to a significant extent by the precise location of the bracket on the tooth. Moreover, the practitioner must take care not to disturb the bracket during the time the adhesive hardens, which may be on the order of 1.5 minutes.
The development of light-curable adhesives for orthodontic treatment has provided many advantages when used in the direct bonding technique described above. Light-curable adhesives include a photoinitiator that initiates the curing reaction once the adhesive is exposed to a sufficient amount of light. Moreover, light-curable adhesives are premixed by the manufacturer and need not be mixed in the orthodontist's office before use.
A common method of using light-curable adhesives for direct bonding includes the steps of placing a small quantity of the adhesive on the base of the bracket and then placing the bracket on the patient's tooth. The practitioner then shifts the bracket on the tooth as may be needed to move the bracket to its intended location. Once the bracket is in its precise, intended location, light from a dental curing unit is directed toward the adhesive for a time period sufficient to satisfactorily cure the adhesive. As can be appreciated, light-curable adhesives are an advantage in that the adhesive does not normally unduly harden until the practitioner has had an opportunity to move the bracket to its intended location and then direct light from the curing unit toward the adhesive.
While the direct bonding techniques described above are in widespread use and are considered satisfactory by many, there are shortcomings that are inherent with such techniques. For example, access to the surfaces of malposed teeth may be difficult. In some instances, and particularly in connection with posterior teeth, the practitioner may have difficulty seeing the precise position of the bracket relative to the tooth surface. Another problem with the above described techniques concerns the significant length of time needed to carry out the procedure of bonding a bracket to each individual tooth, which is a nuisance both to the patient as well as to the practitioner. The risk of moisture contamination from the patient's saliva also increases as the time increases that the patient is occupying the chair. The above factors may also unduly impair the accuracy of placement of the brackets on the teeth and/or increase the chances that the ultimate adhesive bond will not have sufficient strength to retain the brackets on the teeth during the course of orthodontic treatment.
Indirect bonding techniques avoid many of the problems noted above. In general, indirect bonding techniques in the past have involved the use of a transfer tray having a shape that matches the configuration of at least part of one of the patient's dental arches. A set of brackets are releasably connected to the tray at certain, predetermined locations. Once adhesive is applied to the base of each bracket, the tray is placed over the patient's teeth until such time as the adhesive hardens. Next, the tray is detached from the teeth as well as from the brackets, with the result that all of the brackets previously connected to the tray are now bonded to their respective teeth at their intended, predetermined locations.
In more detail, one method of indirect bonding includes the steps of taking an impression of each of the patient's dental arches and then making a replica plaster or "stone" model from each impression. A sealing solution (such as Liquid Foil brand sealing solution, from 3M) is applied to the stone model and allowed to dry. If desired, the teeth of the model can be marked with a pencil to assist in placing the brackets in ideal positions.
Next, the brackets are bonded to the sealed stone models. Optionally, the bonding adhesive can be a chemical curing adhesive (such as Concise brand adhesive from 3M) or a light-curable adhesive (such as Transbond XT or Transbond LR adhesive, from 3M). Optionally, the brackets may be adhesive precoated brackets such as described in U.S. Pat. Nos. 5,015,180, 5,172,809, 5,354,199 and 5,429,299.
A transfer tray is then made by placing matrix material over the model as well as over the brackets on the model. For example, a plastic sheet matrix material may be placed over the model and brackets and then heated in an oven under vacuum. As the plastic sheet material softens and as air in the oven is evacuated, the plastic sheet material assumes a configuration that precisely matches the shape of the replica teeth of the stone model and adjacent brackets.
The plastic material is then allowed to cool and harden to form a tray. The tray and the brackets (which are embedded in an interior wall of the tray) are then detached from the stone model and sides of the tray are trimmed as may be desired. Once the patient has returned to the office, a quantity of adhesive is placed on the base of each bracket and the tray with the embedded brackets is then placed over matching portions of the patient's dental arches. Since the configuration of the interior channel in the tray closely matches the respective portions of the patient's dental arches, each bracket is ultimately positioned on the patient's teeth at precisely the same location that corresponds to the previous location of the same bracket on the stone model.
Both light-curable adhesives and chemical curing adhesives have been used in indirect bonding techniques to secure the brackets to the patient's teeth. If a light-curable adhesive is used, the tray is preferably transparent or translucent. If a two-component chemical curing adhesive is used, the components can be mixed before application to the brackets, or one component may be placed on each bracket base and the other component may be placed on the tooth surface. In either case, placement of the tray with the embedded brackets on corresponding portions of the patient's dental arches enables the brackets to be bonded to the teeth as a group using only a relatively short amount of time that the patient is occupying the chair in the operatory. With such a technique, individual placement and positioning of each bracket in seriation fashion on the teeth is avoided.
While it is apparent that the use of indirect bonding techniques can greatly facilitate precise placement of brackets on the patient's teeth and shorten the amount of time that the patient is in the operatory, there is a need in the art to improve current indirect bonding techniques in order to optimize use of the practitioner's time. For example, conventional techniques using commercially available chemical curing orthodontic adhesives are somewhat time consuming in that the practitioner is often required to firmly press the transfer tray with the embedded brackets against the patient's teeth for at least two minutes and then wait an additional five minutes before removing the tray from the mouth to ensure that the adhesive has cured to a degree sufficient to hold the brackets firmly on the tooth as the tray is released from the brackets and the teeth. Some conventional light-curable adhesives cure somewhat sooner, but require the use of a dental light curing unit and the use of subsequent disinfection and/or sterilization procedures before using the light curing unit with another patient.

Indirect bonding method and adhesive for orthodontic treatment


An integrated circuit designed to control grain growth induced roughening in a conductive stack is disclosed herein. The conductive stack includes an interconnect metallization layer formed at a low diffusivity temperature of less than 200xc2x0 C. The interconnect metallization layer includes aluminum doped with copper. The conductive stack further includes subsequent depositions and/or processing involving interconnect metallization layer to be carried out at the low diffusivity temperatures.

The present invention relates to conductive stacks for interconnects and methods of manufacturing conductive stacks. More particularly, the present invention relates to a conductive stack, such as a metal stack, resistant to grain growth roughening.
Device sizes and geometries associated with integrated circuits have become increasingly smaller. Smaller device sizes and geometries allow integrated circuits to achieve greater densities, faster speeds, and lower power consumption. Reducing device sizes and geometries necessitates the use of more precisely dimensioned circuit interconnects. Circuit interconnects or conductive lines are generally utilized to connect semiconductive or conductive structures within the integrated circuit. Presently, interconnects for integrated circuits include multiple layers to create conductive (e.g., metal) stacks.
A conductive stack (e.g., a metal one layer, a metal two layer, a metal three layer, or a metal four layer) including aluminum (Al) or aluminum alloys, also referred to as an aluminum stack, is generally comprised of an aluminum metallization layer sandwiched between conductive underlayers and overlayers. Conductive underlayers include a titanium (Ti) underlayer and a titanium nitride (TiN) underlayer. Conductive overlayers include a titanium (Ti) overlayer and a titanium nitride (TiN) overlayer. The aluminum metallization layer includes aluminum material doped with copper (Cu). The TiN underlayer is disposed over the Ti underlayer, and the aluminum metallization layer (e.g., aluminum line) is disposed over the TiN underlayer. The Ti overlayer is disposed over the aluminum metallization layer, and the TiN overlayer is disposed over the Ti overlayer. This conductive stack is then masked and etched to form a plurality of interconnects, each interconnect configured to be an electrically isolated aluminum line for carrying a unique current.
In conventional conductive stack fabrication, it is extremely difficult to achieve perfect grain structure or crystallographic texture of the aluminum alloy deposited to form the aluminum metallization layer. Generally, the aluminum metallization layer will include various crystalline imperfections or defects such as grain boundaries. Grain boundaries make the aluminum lines more susceptible to electromigration.
To reduce the electromigration problem, conductive underlayers, such as the Ti and TiN underlayers, and copper doping of aluminum are implemented. The conductive underlayers reduce electromigration by improving the grain structure and grain size, i.e., the crystalline structure, of the aluminum metallization layer such that less grain boundaries are formed. The copper doping of aluminum reduces electromigration when copper undergoes theta (xcex8) phase precipitation to form CuAl2, a sub-stoichiometric alloy, along the grain boundaries instead of being uniformly distributed throughout the aluminum alloy. These copper precipitates retard grain boundary diffusion, thereby decreasing total mass transport to reduce electromigration.
Although copper precipitates can reduce electromigration, it can also cause micromasking, leading to uneven etching and even shorting of two or more aluminum lines. Aluminum alloys with copper levels above one percent in weight are difficult to etch. The etch chemistry used to etch aluminum alloys essentially cannot etch pure copper or even a high concentration (e.g., two percent) of copper (such as is found at the grain boundaries). Thus, when the aluminum alloy is being etched, high copper concentration sites are seen as micromasks such that nothing will be etched below it or will only partially etch below it. Undesirable residues at the high copper concentration sites can make the etched surface rough. Furthermore, these residues can inadvertently bridge two or more aluminum lines causing interconnects to short circuit (e.g., be inadvertently connected).
Thus, there is a need for an integrated circuit including a conductive stack that is resistant to grain growth induced roughening and micromasking. Further still, there is a need for a method of manufacturing a conductive stack that is resistant to grain growth induced roughening and micromasking. Even further still, there is a need for an aluminum line interconnect that is resistant to copper precipitation and lithography problems associated therewith.
One exemplary embodiment relates to an integrated circuit including a conductive stack. The conductive stack includes an interconnect metallization layer comprising an aluminum-copper alloy, wherein the interconnect metallization layer is formed at a low diffusivity temperature of the aluminum-copper alloy to minimize undesirable copper precipitation.
Another exemplary embodiment relates to an integrated circuit. The integrated circuit includes a device, an interlevel dielectric layer, and a conductive stack. The interlevel dielectric layer is disposed over the device and the conductive stack is disposed over the interlevel dielectric layer to form an interconnect line of the device. The conductive stack is partially formed at a processing temperature less than 200xc2x0 C. to provide resistance to grain growth induced roughening and interconnect line bridging.
Still another exemplary embodiment relates to a method of manufacturing an integrated circuit. The method includes providing an interconnect metallization layer over an interlevel dielectric layer at a low diffusivity temperature to form a conductive stack. The method further includes providing an overlayer over the interconnect metallization layer at the low diffusivity temperature to further form the conductive stack. The method still further includes processing the conductive stack after providing an overlayer step at the low diffusivity temperature when the interconnect metallization layer would otherwise be thermally affected, to minimize residue formation.

Method and apparatus for controlling grain growth roughening in conductive stacks


Thermal recovery methods for recovering viscous hydrocarbons from a subterranean formation. The thermal recovery methods include performing a plurality of injection cycles. Each injection cycle in the plurality of injection cycles includes injecting a heated solvent vapor stream into a heated chamber that extends within the subterranean formation and fluidly contacting the viscous hydrocarbons with the heated solvent vapor stream to generate mobilized viscous hydrocarbons. Each injection cycle also includes injecting a steam stream into the heated chamber. The thermal recovery methods further include producing a chamber liquid and/or mobilized viscous hydrocarbons from the subterranean formation.

Hydrocarbons often are utilized as fuels and/or as chemical feedstocks for manufacturing industries. Hydrocarbons naturally may be present within subterranean formations, which also may be referred to herein as reservoirs and/or as hydrocarbon reservoirs. Such hydrocarbons may occur in a variety of forms, which broadly may be categorized herein as conventional hydrocarbons and unconventional hydrocarbons. A process utilized to remove a given hydrocarbon from a corresponding subterranean formation may be selected based upon one or more properties of the hydrocarbon and/or of the subterranean formation.
Examples of hydrocarbon production techniques that may be utilized to produce viscous hydrocarbons from a subterranean formation include thermal recovery processes. Thermal recovery processes generally inject a thermal recovery stream, at an elevated temperature, into the subterranean formation. The thermal recovery stream contacts the viscous hydrocarbons, within the subterranean formation, and heats, dissolves, and/or dilutes the viscous hydrocarbons, thereby generating mobilized viscous hydrocarbons. The mobilized viscous hydrocarbons generally have a lower viscosity than a viscosity of the naturally occurring viscous hydrocarbons at the native temperature and pressure of the subterranean formation and may be pumped and/or flowed from the subterranean formation. A variety of different thermal recovery processes have been utilized, including cyclic steam stimulation processes, solvent-assisted cyclic steam stimulation processes, steam flooding processes, solvent-assisted steam flooding processes, steam-assisted gravity drainage processes, solvent-assisted steam-assisted gravity drainage processes, heated vapor extraction processes, liquid addition to steam to enhance recovery processes, and/or near-azeotropic gravity drainage processes.
Thermal recovery processes may differ in the mode of operation and/or in the composition of the thermal recovery stream. However, all thermal recovery processes rely on injection of the thermal recovery stream into the subterranean formation, at the elevated temperature, and thermal contact between the thermal recovery stream and the subterranean formation heats the subterranean formation.
In thermal recovery processes, such as heated vapor extraction, that utilize a solvent, or a hydrocarbon solvent, as the thermal recovery stream, solvent loss to the subterranean formation may increase production costs and/or limit production economies. As an example, a decrease in an amount of solvent needed to produce viscous hydrocarbons from the subterranean formation may cause a corresponding decrease in production costs as long as the savings associated with the decrease in solvent utilization is not offset by a corresponding increase in energy consumption.
In addition, recovered solvent generally is separated from the viscous hydrocarbons and re-injected into the subterranean formation, and increases in a volume of the solvent recycled also may increase production costs and/or limit production economies. As another example, a decrease in the volume of solvent produced from the subterranean formation may permit a corresponding decrease in surface facility size required for solvent separation, recovery, and re-injection, also decreasing production costs.
Historically, thermal recovery processes may utilize solvent inefficiently within the subterranean formation, leading to increased solvent loss to the subterranean formation and/or increased production of solvent from the subterranean formation. Thus, there exists a need for improved thermal recovery methods for recovering viscous hydrocarbons from a subterranean formation.


A nickel-free white gold alloy composition having selectively reversible hardness characteristics between its annealed- and aged-hardness values, consists essentially of: about 55–60% gold; about 6.0–10.0% palladium; about 5.0–12.0% copper; about 0.1–2.0% zinc; and about 20–30% silver. A 14-karat nickel-free white gold alloy composition, consists essentially of: about 58.5% gold; about 25.0–27.15% silver; about 6.0% palladium; about 5.0–12.0% copper; about 0–2.0% zinc; about 0–0.2% cobalt; about 0–0.005% iridium; and about 0–0.01% lithium.

Gold-based alloys have been used for centuries in the manufacture of jewelry. The most common of these are 14-karat compositions, having a traditional yellow color. However, for certain applications, such as diamond settings, a white gold alloy composition is preferred. Traditionally, white jewelry alloys were platinum-based. However, during World War II, platinum was considered to be a strategic industrial metal, and its usage in jewelry items was therefore limited.
A number of elements have been tried to bleach the color of such gold alloy compositions, but, upon information and belief, only alloys containing palladium and nickel have been practical and successful. The main drawbacks of palladium-containing gold alloys are their high cost and high melting temperature. Additionally, these alloys become very soft when exposed to a soldering operation. Nickel, on the other hand, can produce an allergic reaction. Moreover, nickel-containing alloys appear to be prone to stress-corrosion cracking, which may, for example, lead to a prong failure in a diamond setting.
U.S. Pat. No. 3,981,723 discloses a white gold alloy composition consisting essentially of about 50–54% gold, about 27–21% palladium, about 11–16% silver, about 4.5–8% indium and tin, and about 0.5–2.5% iridium or ruthenium. These alloys are largely intended for use in dental applications, have unsuitably high melting temperatures, are costly, and require excessive amounts of palladium.
U.S. Pat. No. 5,372,779 discloses nickel-free white gold alloy compositions containing about 35–50% gold, about 35–63% silver, about 0.0–7% zinc and/or germanium, and less than about 9% palladium. These alloys are apparently intended for 10-karat gold alloy composition applications, and do not appear to provide reversible hardness characteristics.
U.S. Pat. No. 5,635,131 discloses palladium-containing white gold alloy compositions containing about 58.33% gold, about 29% silver and about 2.67% zinc. These alloys do not appear to have the reversible hardness characteristics of the present invention.
U.S. Pat. No. 5,180,551, which is assigned to the assignee of the present application, discloses a number of yellow gold alloy compositions capable of reversible hardness. These alloys contain not less than about 58.03% gold, not less than about 10% silver, not less than about 2% zinc, not less than about 0.02% cobalt, and copper in a weight percent equal to about 100 less the sum total of the weight percent of the gold, silver, zinc and cobalt. The ratio of the copper amount to the silver amount is between about 2.0 to about 3.8. The ratio of the copper amount to the sum total of the silver amount plus twice the zinc amount is between about 1.3 and about 2.5. These compositions have a desirable gold color having a yellow component in the range of about 17.7 to about 20.5 CIE units, and a red component in the range of about 2.6 to about 4.0 CIE units. These compositions are also capable of being selectively hardened to at least 150% of their annealed-hardness values.
Finally, U.S. Pat. No. 5,919,320, which is also assigned to the assignee of the present application, discloses a plurality of nickel-free white gold alloy compositions having reversible hardness characteristics. These compositions consist essentially of about 55–60% gold, about 12–20% silver, about 8–15% copper, 8–18% palladium, about 0.0–1.0% tin, zinc, iridium, or cobalt and, optionally, about 0.005–0.02% iridium and/or ruthenium. The composition may also have about 0.01–0.03% lithium.
Each of foregoing patents is hereby incorporated by reference.
White gold alloy compositions enjoy a fairly large and stable demand in the jewelry industry as less-expensive alternatives to platinum alloys. The most common and inexpensive whitening element that is used in gold alloy compositions is nickel. In a 14-karat alloy, the amount of nickel may vary up to about 15%. Nickel-containing white gold alloy compositions are susceptible to stress corrosion that often leads to failure of the jewelry article. Nickel is also known to cause an allergic reaction when brought into contact with the skin. That is why "nickel-free" has become a requirement for many white gold alloy compositions that are used to make various jewelry articles. Palladium is the only other practical whitening material that can be used in white gold alloy compositions. The concentration of palladium in commercial 14-karat gold alloy compositions may vary up to about 15%. Palladium-containing white gold alloy compositions are typically more expensive than nickel-containing white gold alloy compositions. More over, the palladium-containing compositions typically have a higher melting temperature and are relatively soft.
Most white gold jewelry is plated with rhodium. When so plated, the requirements for white color become more flexible. The Manufacturing Jewelers and Suppliers of America (MJSA), together with the World Gold Counsel (WGC) have developed and adopted three grades of color for white gold alloy compositions based on the yellowness index ("YI"). These are also governed by ASTM D1925. These three grades are as follows:
GradeColor DescriptionYI1PremiumYI < 19.02Standard19.0 < YI < 24.53Off-White14.5 < YI < 32.0
Alloys having a yellowness index of YI>32.0 are considered to be non-white. Jewelry made with grade one or grade two alloys may be used with or without rhodium plating. However, jewelry made with Grade 3 alloys requires rhodium plating.
Accordingly, it would be generally desirable to provide a series of more economical nickel-free white gold alloy compositions, preferably having reversible hardness characteristics.

Nickel-free white gold alloy compositions with reversible hardness characteristics


The present invention relates to a system and method for spinal disc replacement surgery via a lateral approach. The invention also relates to a spinal disc replacement device that is designed to be inserted via the lateral approach disc replacement surgery. The invention further relates to tools used for the spinal disc replacement surgery via the lateral approach.

Disorders of the spine occur when one or more of the individual vertebras and/or the intervertebral discs become abnormal either as a result of disease or injury. In cases where an intervertebral disc becomes abnormal, the degenerated intervertebral disc is usually surgically removed and replaced with an intervertebral implant device.
The common approach to the removal of a diseased intervertebral disc and replacement with an intervertebral implant is usually via a posterior or an anterior approach. Disc replacement surgery usually includes posterior laminectomy to first decompress the posterior neural elements and to gain access either through a direct posterior approach, or through a transpedicular approach, or through a posterior-lateral or transforaminal approach. After posterior exposure, the intervertebral disc is removed and replaced with an implant device inserted through a posterior-lateral approach or through a lateral transforaminal approach. Although open laminectomy provides exposure of the disc space, the large size of current implant devices often makes it technically challenging to avoid injury to the dura and nerve roots during insertion of the implant devices. The large exposure also puts the neural elements and spinal cord at risk from direct mechanical injury during insertion or scarring from overlying soft tissues postoperatively. Scarring is considered a major cause for failed back syndrome in which patients continue to have back and leg pain after spinal surgery. In order to avoid neural injuries with posterior implant devices some surgeons elect to approach the spine anteriorly, which allows for direct removal of intervertebral discs and vertebras without exposing the neural tissues. Vertebral bodies and intervertebral discs can also be removed anteriorly through a peritoneal or retro-peritoneal approach. Anterior approaches are now more popular and are becoming the standard approach for implanting intervertebral disc replacement devices but still require major surgery.
There is increasing consensus among surgeons that there is a need to develop devices, instruments, and methods to limit the size of the incision, extensive muscle stripping, prolonged retraction of muscles for visualization, avoidance of neural tissue retraction and injury, and denervation and devascularization that are known to contribute to poorer patient outcome after traditional open surgeries to treat pathologies deep within the body. In many cases these complications lead to permanent scarring and pain that can be more severe than the pain from the initial ailment. Limiting these complications in addition to the operative, general anesthesia, and recovery times are among the goals of this invention and that of percutaneous or minimally invasive surgeries.
This invention addresses the need for spinal disc replacement surgery that adheres to the principals of the less exposure surgery (LES) of outpatient surgery, which include minimizing the size of the incision, minimizing extensive muscle stripping, minimizing prolonged retraction of muscles for visualization, and preventing neural tissue retraction and injury.
Current disc replacement devices are fixed in size and shape and although techniques are now being developed to insert these devices percutaneously, for example U.S. Pat. Nos. 5,792,044 and 5,902,231 attributed to Foley et al., the fixed size and shapes of these interbody devices still require distraction instrumentation and techniques to access the intervertebral disc space which necessitates open surgery for anterior placements and limited open exposures for posterior procedures. The majority of these disc replacement devices are designed based on a ball-and-socket articulating principle with variable degrees of motion in different planes from a constrained device limiting some motion to a fully unconstrained device with motion in all planes. However, these devices do not permit percutaneous access primarily because they are fixed in shape and size, need to be inserted as separate articulating components, require distraction instrumentation and techniques to open the disc space, and they need to be anchored to the vertebral endplate.
Accordingly, there is a need for an intervertebral implant device that can be inserted via minimally invasive surgery (MIS) and can maintain spinal mobility.

System and method for spinal disc replacement surgery via a lateral approach


A connector includes conductive pins inserted into apertures in a housing. The pins may include a single groove or a pair of opposing grooves in which ribs of the housing are disposed. The ribs may conform to the shape of the grooves to retain the pins in the housing apertures. The apertures may includes an extended side opening that opens onto an upper surface of the housing to enable a contact beam and shielding bar to be inserted from the top. Solder balls may be disposed on an underside of the connector.

Connectors having a two-dimensional array of conductive pins in an insulative housing often include solder balls disposed on an underside of the housing. The solder balls are connected to or disposed on ends of the pins to enable electrical connection to a printed wiring board.
Often, pins are held in place in the array by press fitting them into openings in the connector housing. A planar shield is often disposed between rows of pins to inhibit crosstalk and like drawbacks. Shields are especially useful in tightly packed or high speed connectors but may be employed in other circumstances. In some arrays of pins, such as pins retained by press fitting, residual stresses can build up such that stress and/or strain is transmitted from one portion of the housing (proximate a pin) to an adjacent portion. In this way, stresses can build up or accumulate, which diminish the planarity of the contacts and/or solder balls or having other drawbacks.


The present invention, in one set of embodiments, provides methods and systems for integrating conducting diamond electrodes into a high power acoustic resonator. More specifically, but not by way of limitation, in certain embodiments of the present invention, diamond electrodes may be integrated into a high power acoustic resonator to provide a robust sensing device that may provide for acoustic cleaning of the electrodes and increasing the rate of mass transport to the diamond electrodes. The diamond electrodes may be used as working, reference or counter electrodes or a combination of two or more of such electrodes. In certain aspects, the high power acoustic resonator may include an acoustic horn for focusing acoustic energy and the diamond electrodes may be coupled with the acoustic horn.

Combining high power ultrasound and electrochemical analysis functions and properties has most often previously been achieved by configuring a high power acoustic resonator and separate electrode system in a face-on geometry. In such an arrangement, the spacing between the electrode and acoustic resonator can be varied to vary the effect of the separated acoustic and electrode systems. However, it should be noted, that the spacing between the acoustic resonator and the electrode system in the face-on geometry will result in a decrease in the electrode cleaning capabilities of the acoustic resonator and the mass transfer rate associated with the electrode when operated contemporaneously with the acoustic resonator. Furthermore, investigations with regard to performance of such face-on configurations identified the existence of wear and erosion issues associated with the systems
In another arrangement configured to provide for combined ultrasound and electrochemical analysis functions and properties, an acoustic horn of a high power acoustic resonator has itself been used as an electrode. In these configurations, the acoustic horn itself is used as the working electrode in an electrochemical circuit. J. Reisse et al. in an article entitled "SONOELECTROCHEMISTRY IN AQUEOUS ELECTROLYTE: A NEW TYPE OF SONOELECTROREACTOR", Electrochim. Acta, 39, 37-39 (1994), disclose using a titanium ultrasonic horn as a working electrode to provide for depositing copper from a solution of copper sulphate in the presence of high power ultrasound at a frequency of 20 kHz. Durant et al. describe using a titanium horn as the working electrode to study the effects of high power ultrasound on the electrochemical reduction of benzaldehyde and benzoquinone. (Durant, A., François, H., Reisse, J. and Kirsch-de Mesmaeker, A., "SONOELECTROCHEMISTRY: THE EFFECTS OF ULTRASOUND ON ORGANIC ELECTROCHEMICAL REDUCTION", Electrochim. Acta, 41, 277-284 (1996).
Other arrangements provide for attaching the electrode to an acoustic horn. Such an arrangement may be termed a sonotrode and such a device is available commercially from Windsor Scientific. The Windsor Scientific sonotrode consists of a glassy carbon disk electrode set in the end of a quartz rod, wherein the quartz rod is screwed into the end of an ultrasonic horn. Although the sonotrode is a combined system with the acoustic resonator and electrode combined, the electrode is still disposed distally from the acoustic horn; so as with the face-on geometry, the separation will result in a decrease in the electrode cleaning capabilities of the acoustic resonator and the mass transfer rate associated with the electrode when operated contemporaneously with the acoustic resonator. Further, the Windsor Scientific sonotrode does not provide a rugged and wear/erosion resistant design and may not be capable of operating at high acoustic powers and/or may experience degradation of the glassy carbon disk electrode under acoustic functions. In another sonotrode-type device, A. O., Simm et al. "SONICALLY ASSISTED ELECTROANALYTICAL DETECTION OF ULTRATRACE ARSENIC", Anal. Chem., 76, 5051-5055 (2004), an electrode may be attached to a small permanent magnet that may be made to vibrate by passing current through an adjacent electric coil.
In a further acoustic resonator and electrode arrangement, modifying the idea of using the acoustic horn as the electrode, a platinum electrode is disclosed that is bonded into a hole drilled in the titanium tip of an acoustic horn using an adhesive. (R. G. Compton, et al., "ELECTRODE PROCESSES AT THE SURFACE OF SONOTRODES", Electrochim. Acta, 41, 315-320 (1996)). In such an arrangement, as with arrangements wherein the acoustic horn acts as an electrode, the distance between the electrode and the acoustic horn does not become an issue. In the electro-acoustic system disclosed by Compton, electrical connections to the platinum electrode are provided by wire connections passing through the side of the acoustic horn to the platinum electrode. While the reference provides a sonotrode that effectively addresses issues regarding separation of the acoustic resonator and the electrode it does not address using acoustic energy to clean the electrode or provide for effectively configuring the acoustic resonator and electrode system for combined operation. Furthermore, the reference does not disclose a sonotrode that may be suited for remote operation, operation in harsh environments—including high temperatures or pressures—or that can be effectively used repeatedly at high acoustic energy levels.

Erosion and wear resistant sonoelectrochemical probe


An optical module has a first light source which emits a first light beam from a first light emission point in a predetermined direction, a second light source which emits a second light beam from a second light emission point in the predetermined direction, and an optical element. The optical element includes a plurality of reflection surfaces for reflecting the first and second light beams, and finally outputting the first and second light beams in the predetermined direction with a separation between the first and second light beams smaller than a distance between the first and second light emission points.

This application claims the benefit of Japanese Patent Applications No. 2001-083606 filed Mar. 22, 2001, No. 2001-170357 filed Jun. 6, 2001, No. 2001-206358 filed Jul. 6, 2001, No. 2001-282328 filed Sep. 17, 2001, and No. 2002-030147 filed Feb. 6, 2002, in the Japanese Patent Office, the disclosures of which are hereby incorporated by reference.
1. Field of the Invention
The present invention generally relates to optical modules and optical recording and/or reproducing apparatuses, and more particularly to an optical module which is usable as a light source for generating light beams, and an optical recording and/or reproducing apparatus which records information on and/or reproduces information from a recording medium using the light beams generated from such an optical module.
An optical module of an optical pickup generates a light beam from a semiconductor laser. The light beam is used to record information on and/or reproduce information from optical recording media which include optical disks such as a compact disk (CD) and high-density optical disks such as a digital versatile disk (DVD).
2. Description of the Related Art
Recently, various kinds of optical recording media, including optical disks and high-density optical disks, have been proposed. The optical disks include the CD, CD-R and CD-RW. On the other hand, the high-density optical disks include the DVD and S-DVD. Ideally, it is desirable for a single optical recording and/or reproducing apparatus to be able to recording information on and/or reproduce information from a plurality of kinds of optical disks.
However, an optical pickup which is used for the recording and/or reproduction of information using the optical disk such as the CD, CD-R and CD-RW generates a light beam having a wavelength of 780 nm. A beam spot of this light beam cannot be converged to the size of a pit formed on the high-density optical disk such as the DVD and-S-DVD.
On the other hand, an optical pickup which is used for the recording and/or reproduction of information using the high-density optical disk such as the DVD and S-DVD generates a light beam having a wavelength of 650 nm. But a pigment used in the optical disk such as the CD-R cannot reflect this light beam and thus light beam will be transmitted through the optical disk such as the CD-R, thereby making it impossible to reproduce the information from the optical disk such as the CD-R.
Therefore, in order to record information on and/or reproduce information from the optical disk such as the CD-R and the high-density optical disk such as the DVD using a single optical recording and/or reproducing apparatus, it is-necessary to provide two semiconductor lasers in the light source part of the optical pickup to respectively generate the light beams having the wavelengths of 780 nm and 650 nm.
But in order to use a common optical system for the two light beams which have the wavelengths of 780 nm and 650 nm and are generated from the two semiconductor lasers, it is necessary to set the two light emission points close together as much as possible. Accordingly, a semiconductor laser unit has been proposed, in which a semiconductor laser chip for generating the light beam having the wavelength of 650 nm and a semiconductor laser chip for generating the light beam having the wavelength of 780 nm are arranged horizontally on a single package. However, according to this proposed semiconductor laser unit, the location of the light emission points are affected by the width of each semiconductor laser chip and the width of a sub-mounting member, and an interval of the light emission points of the two semiconductor laser chips becomes approximately 300 μm to 400 μm and large. As a result, it becomes extremely difficult to design the optical system of the optical pickup.
Hence, a method of artificially reducing the interval between the two light emission points using reflection surfaces has been proposed in a Japanese Laid-Open Patent Application No. 11-39684, for example. FIG. 1 is a diagram showing an optical module employing this proposed method, and-corresponds to FIG. 2 of the Japanese Laid-Open Patent Application No. 11-39684. In FIG. 1, a part surrounded by a dotted line is shown on an enlarged scale on the right portion of this figure. A detailed description of FIG. 1 will be omitted in this specification, because it is described in the Japanese Laid-Open Patent Application No. 11-39684.
As shown in FIG. 1, a sub-mounting member 32A has a triangular cross section with reflection surfaces 32B and 32C. A laser beam B1 output from a semiconductor laser 34 is reflected by the reflection surface 32B, and a laser beam B2 output from a semiconductor laser 36 is reflected by the reflection surface 32C. Because the laser beams B1 and B2 are reflected and bent by the reflection surfaces 32B and 32C, it is possible to artificially reduce the interval between the two light emission points. In FIG. 1, a reference numeral 30 denotes a support plate, a reference numeral 32 denotes a support body, and a reference numeral 38 denotes a cap.
In order to realize the method proposed in the Japanese Laid-Open Patent Application No. 11-39684, it is necessary to provide the sub-mounting member 32A having the triangular cross section. However, it is difficult to accurately form the sloping surfaces of the sub-mounting member 32A having the triangular cross section, particularly when the inclination angle of the sloping surfaces is 45 degrees. Because the sloping surfaces determine the reflection surfaces 32B and 32C, inaccurate sloping surfaces cause inaccurate reflections at the reflection surfaces 32B and 32C.
Although several techniques have been proposed to make a member having a triangular cross section with sloping surfaces having an inclination of 45 degrees, none are actually capable of stably mass-producing the member with a high accuracy. Alternatively, it is conceivable to use microprisms to realize a member having the triangular cross section, but it would be extremely difficult to accurately mount the microprisms. Furthermore, since the use of the microprisms will make the member expensive, the use of such a member in the optical pickup will make the optical pickup too expensive from the practical point of view.
Accordingly, the proposed method of artificially reducing the interval between the two light emission points using the reflection surfaces require parts which are both expensive and unsuited for mass-production.