A laminating method for forming a laminated layer in the form of a transparent film on a surface of an image on a printed object includes the steps of transferring a laminate having a laminated layer and a heat resistive base material layer to the surface of the printed object for laminating to form a laminated printed object, and a rear edge peeling step of peeling off the heat resistive base material layer from a rear edge portion of the laminated printed object by exerting an active force on the rear edge of the printed object in the carrying direction. Subsequently to the rear edge peeling step, a front edge peeling step peels off the heat resistive base material layer from a front edge of the laminated printed object.

1. Field of the Invention
The present invention relates to a method for laminating a transparent film layer on the surface of images formed on a recording medium, and a laminating apparatus used for such method.
2. Related Background Art
There have been known the recording mediums having various compositions which are used for image formation by use of ink jet recording method. Then, along with the application range that has been made wider, and the performance that has been made higher for a recording apparatus (a printer) that uses ink jet method to output the electronic image information obtainable by a computer or through a network or to output the image information fetched by use of a digital camera, a digital video, a scanner, or the like, the performance of such recording media is required to be varied more in many more ways or to be made higher still.
For example, there has been known a method for forming an ink receiving layer by use of the ink jet recording method that adopts a recording medium provided with an ink receiving layer formed on a base material having porous inorganic particles of silica or alumina, and a binder such as water soluble resin as the main component thereof. With the composition thus arranged, it becomes possible to enhance the ink absorption and the fixation of coloring materials of ink.
Meanwhile, with an anticipation that the unit cost of image formation is reduced significantly if the ink jet recording method is made applicable to obtaining images whose quality is comparable to a color photography using silver salt or a multi-colored print using various printing methods, demands are also on the increase for the materialization of the technologies and techniques that make such ink jet printing possible.
As the technology and technique developed for the purpose to form a multi-colored image comparable to a silver salt photography or the one formed by the multi-color printing, there has been known those ones whereby to make the image quality higher by increasing the lustrous degree or smoothness of the image surface by laminating a transparent film layer on the surface of the ink receiving layer after images are formed by use of ink jet recording, and a recording medium composed on a base material together with white porous fine particles, such as silica, provided for the ink receiving layer thereof.
As an apparatus used for laminating the image surface, there is known the one disclosed in the specification of Japanese Patent Application Laid-Open No. 58-224779. For this apparatus, both the laminating material (member for laminating use) and a recording medium are supplied to the interior of the apparatus from a continuous sheet roller. Images are formed on a specific portion of the recording medium by use of ink jet method, and the member for laminating use is overlapped therewith and heated under pressure. Thus, after the transparent film layer is laminated on the recording medium, it is cut into a desired size to obtain the printed object which is made with the transparent film laminated on the image surface.
For the structure of the apparatus described above where both a member for laminating use and a recording medium are supplied into a laminating apparatus from a roller as the continuous sheets, there is an advantage that no positioning is needed when at least one of them is cut as sheet to be supplied. However, a cutting process is required to out put a specific portion after the laminating process, and for that matter, unwanted cut pieces inevitably occur as discarded substance.
Further, with the conventional apparatus structured as described above, if a wide interval exists between adjacent two images formed on a recording medium, the area that requires no lamination is also laminated unnecessarily by the member for laminating use to be supplied as a continuous sheet. The use efficiency of the member for laminating use is made unfavorable in some cases.
As the structural example of a laminating apparatus that does not invite the creation of wasteful cut pieces due to the cutting process or the unfavorable use efficiency of the members used for laminating, Japanese Patent Application Laid-Open No. 06-91767 has been filed. In the specification of this Laid-Open Application, the surface protection layer of a leaf of a sheet having images formed on it, which is being laminated, is supported by a supporting member, and the surface protection layer is laminated when such lead of the sheet is carried into the apparatus. After that, the supporting member that has supported the laminating sheet is peeled off. In this way, only the leaf of the sheet having the lamination processed on it is obtained. The peel off of a supporting member from the leaf of a sheet is effectuated by the utilization of the leaf of the sheet itself whose "firmness" than the supporting member. After the laminating process, the carrying direction of the supporting member is changed at an acute angle to that of the leaf of the sheet. As a result, the leaf of the sheet does not follow the supporting member in its carrying direction so the front edge of the leaf of the sheet is peeled off from the supporting member. Then, the carrying process advances, the leaf of the sheet is caused to be peeled off from the supporting member.
Even by the adoption of this method, however, the peel off of the surface protection layer on the rear edge of the leaf of the sheet is not effectuated in good condition. The surface protection layer tends to remain like "fins" on the rear edge of the leaf of the sheet (that is, the surface protection layer remains irregularly), and appearance looks as if stained in some cases. The surface protection layer which remains irregularly spoils appearance, thus reducing the value of finished product. In order to eliminate this, there is a further need for a process to cut off such portion that may look like "fins" as a post process.

Laminating method and laminating apparatus


A valve free oxygen concentrator includes first and second nitrogen filters. Air is pumped into and through the first filter while the second filter is simultaneously evacuated. Alternately, air is pumped into and through the second filter while the first filter is simultaneously evacuated. The filters extract nitrogen from the air pumped therethrough to produce concentrated oxygen. The extracted nitrogen is subsequently exhausted from the filters. The concentrated oxygen is directed from the filters to a patient or other destination that requires concentrated oxygen.

Oxygen concentrators have long been used to provide highly concentrated oxygen to medical patients and for other applications. These devices normally employ a pair of molecular sieve filter tanks that remove nitrogen from the air and produce a highly concentrated oxygen supply for the patient. For example, see the concentrator and accompanying sieve tanks disclosed in U.S. Pat. No. 5,166,563. Conventional concentrators typically require either a pair of 3-way valves or a single 4-way valve to integrate the concentrator pump with the molecular sieve tanks. These valves require a fairly complicated construction, which includes numerous hoses, clamps and fittings. This adds considerably to the cost, bulk and weight of the system. Moreover, such valves tend to exhibit leaks, which can render the entire concentrator useless. As a result, most concentrators experience considerable "down time" in order to undergo necessary repairs.
The valves used in conventional oxygen concentrators are typically timer driven. The required timing mechanisms further increase the cost and complexity of most concentrators. Moreover, known concentrators are often far less than optimally efficient.


A microtome for cutting thin sample sections utilizes an electrical contact or sole plate for guiding the section cutting knife during sectioning. The sole plate floats across the surface of the sample thereby ensuring that uniformly thin sections are cut regardless of movement of the sample or expansion or contraction thereof. An electrical contact may be used to detect and reference contact between the sample surface and the section cutting knife. After contact between the sample surface and section cutting knife is referenced, the relative position between the sample surface and section cutting knife may be adjusted to achieve a desired section thinness.

For many applications in the fields of biology, medicine, and pharmacology, very thin sections of tissue from living animals are necessary, e.g., for microscopic examinations. To cut such sections, specialized precision cutting apparatuses called microtomes are employed.
Specimens from which tissue sections are to be cut are prepared by various techniques, e.g., by embedding the specimen in paraffin wax, plastic, or other suitable solid matrix which has the proper degree of hardness for sectioning with a glass knife. A further known method for specimen preparation is the so-called cryostat method in which the specimen is frozen and sectioned in the frozen state.
In preparing biological specimens for electron microscopes, it is essential that very thin sections of tissue be cut in order to properly examine the specimen. It is often desirable that ultra-thin sections of a thickness on the order of 200 to 300 Angstrom units or less be cut from biological tissue. Ultra-thin sections must be cut without distorting the specimen through compression of the tissue or scoring of the tissue by the cutting tool edge.
In preparing specimens for an electron microscope, a microtome having a knife formed from plate or window glass (or diamond) is utilized to section the specimen into very thin pieces. To form the knife, the plate or window glass is fractured to expose a sharp edge.
After the biological specimen has been prepared for sectioning, the embedded specimen is secured to the specimen holder of a microtome. The microtome causes the knife edge to contact the specimen so that very thin sections of the specimen are sliced therefrom.
Advances in microtomes involve the mechanical structure which produces the relative movement between the specimen and knife to section the specimen, and the manner in which the specimen is supported.
U.S. Pat. No. 664,118 discloses a microtome wherein a horizontally movable slicing knife (B) is clamped to a supporting bar (C). The bar is pivotally connected to horizontally-swinging arm (D and D'). Movement is actuated by a horizontally-swinging hand lever (F). The specimen is frozen on the supporting block (G) and the support can be raised or lowered toward the knife by a screw.
U.S. Pat. No. 2,292,973 discloses a microtome mounted on supports such that when handle (19) is moved back and forth, swinging arms (14 and 15) for the knife and swinging arms (12 and 13) from the support, join together to form a parallelogram so that the object to be sliced always remains in the same position. The sections are also uniform in thickness as the set screw is automatically turned for raising the supporting block after each cut by the hatch and pawl mechanism on the support (6).
U.S. Pat. No. 2,680,992 discloses an apparatus for slicing organic tissue wherein a blade (4) is placed in a reciprocating frame (5) so that a slice of tissue is made with each downward stroke. The tissue is placed in a cylindrical chamber (26) and pressed against a specimen support (3) after first being placed in a chamber and cooled. A slot (27) is formed between the chamber and specimen holder (3) through which the knife passes.
U.S. Pat. No. 3,420,130 shows a microtome with synchronized cutting and feeding operations. The motor revolves a screw shaft (53 and 71) which revolves to advance a carriage (21) carrying the specimen. Simultaneously, the cam shaft (39) rotates and with it the cam follower (86) carrying the knife lever (82). The knife lever carries the blade (103) and cyclically oscillates in an arc. The cam follower is held in close relationship by spring (87) engaging a pin (88), projecting from the knife lever, and by one adjusting screw (89). Whenever a cut is made on the block the carriage containing the specimen is stationary.
U.S. Pat. No. 3,440,913 teaches using a reciprocating knife for making cuts on a specimen wherein the knife edge moves transversely with respect to the specimen. Within casings (2 and 2') are a pair of leaf springs (4 and 4') attached by screws (5) to the inner wall of the casings. A shaft (3) is fixed on the springs and carries the blade holder (17). The shaft oscillates along its longitudinal axis by virtue of the transverse flexure of springs. The speed, frequency and amplitude of operation can be varied. The specimen is moved into the vibrating blade and after this operation the specimen carriage is returned and the knife stopped so that the section will float clear of the specimen.
U.S. Pat. No. 3,496,819 is another example of an oscillating knife for sectioning tissues mounted on an intermittently moving stage. The apparatus is similar to that of U.S. Pat. No. 3,420,130 above. The thickness of sections cut by knife (136) is controlled by a knob (216) (FIG. 2) which sets into play a series of motions which determines the transverse distance of the disc (226) upon which the specimen is resting.
U.S. Pat. No. 3,799,029 teaches reciprocating a knife along a slanted table for trimming a specimen prior to microtoming. A carriage assembly is mounted to a base and the reciprocating knife is attached to the assembly (19) to reciprocate therewith. The specimen is mounted in a vertical shaft (43) which can be turned to make different cuts by a goniometer. The carriage assembly is supported from two guide rails (53a and 53b) on two parallel arrays of bearings (57).
U.S. Pat. No. 3,975,977 teaches a crank (13) for downward movement of knife (7) and frame (79) and guides (11 and 12). The knife is set for automatic downward movement at a predetermined distance corresponding to the desired thickness to be taken from the object (3) upon movement of carriage (1) to the right.
Russian Patent No. 638,862 discloses the use of piezo-electric effects for fine adjustment of a specimen holder.
The publication "A Cantilever Microtome for Precision Sectioning in Electron and Light Microscopy", The Review of Scientific Instruments, Vol. 23, No. 11 (November 1952), pages 615-618, discloses a cantilever microtome wherein either the specimen or the knife may be mounted on the cantilever while the other is rigidly attached to the frame supporting the cantilever.
Despite advances in the art of microtomes, an existing problem associated with microtomes is that specimen blocks may often expand or contract unpredictably between cuts, especially in the case of thermal expansion due to thermal inputs to the specimen block. As a result of unpredictable expansion or contraction of the specimen, section thickness will not be accurate, and can in fact be unsuitable for desired examination procedures.
Accordingly, there exists a need for microtomes which produce accurate sectioning thickness regardless of unpredictable expansion or contraction of the specimen.

Microtome with micro-plane and electric contact reference

The Government of the United States of America as represented by the Secretary of the Dept. of Health & Human Services


An automatic paper shredder is capable of sequentially cutting up to 20 sheets of 20-lb bond paper, up to 9 inches wide. The device has adjustable holders for attachment to conventional wastebaskets of varying shapes. A feed tray holds the stack of paper. Upon selection of either manual (ON) or automatic (AUTO) operation of the machine, a single sheet of paper is fed into the machine by a roller as are subsequent sheets, if any. With the three-way switch set to AUTO, any sheets on the tray are detected by a sensor and are automatically fed into the machine for shredding. A plug-in motor contained in the housing of the machine drives a plurality of shafts for the feed roller and knife rollers. The knife rollers are configured to either shred the paper into about 3/8-inch wide strips or to cross-cut the paper into a plurality of smaller pieces.

The present invention relates generally to paper shredding machines, and, in particular, to a paper shredding device capable of sequentially cutting up to 20 sheets of paper.
Paper shredding devices are used to aid in paper recycling or to prevent dissemination of the information on the paper. The paper shredding devices heretofore available have either been large, expensive devices for use with large quantities of paper, or smaller devices for single sheet feeding by the user. Some smaller devices allow the user to manually insert a document having up to about 8 pages, and the device is mounted to a top of a trash can. Often, the trash can must be one specially designed for secure attachment of the device.
The smaller devices typically have limited cutting ability and require manual insertion of a document into the top of the device. Thus, when these smaller devices are used in the home or office, the user is required to spend time feeding individual sheets of paper into the machine.


A decoder checks a table within its received input signal and tunes to at least one of the listed frequencies to determine its associated service group within a subscriber television system. The associated service group associates the decoder with the modulators, transport streams, and other components providing services and programming to that particular decoder. The decoder transmits its associated service group to the subscriber television system headend. The subscriber television system then knows the services and programming available on that particular decoder. The decoder can periodically verify its associated service group and, if the service group is changed, notify the headend. By establishing decoders for auditing the system, the definition of the service groups can be established or updated when components or configurations are introduced or changed.

In a subscriber television system, television services have traditionally included little more than an analog broadcast video source. Recently, however, digital programming has become a reality and the digital home communication terminal ("HCT"), otherwise known as the set-top box, has become a powerful computing device for accessing video services and allowing a user to navigate through the maze of available services. In addition to supporting traditional analog broadcast video and functionality, HCTs now also support an increasing number of services that are digital. These services include two-way interactive services such as video-on-demand, e-mail, and web browsers. These are all in addition to the host of other television services that are increasingly available to subscribers, examples of which include audio and audio/visual programming, advanced navigation controls, impulse pay-per-view technology, and online commerce to name but a few. In the digital world, there is a dramatic increase in the number of services that are available to subscribers.
With the increase in two-way interactive services, identifying an individual HCT becomes an important function for the subscriber television system. Messages, data, programming, and other information need to be identified as coming from and as being correctly sent to a desired HCT. With the concerns over privacy, improper identification or sending a message to the wrong HCT could lead to a lawsuit or the loss of business opportunities.
In addition, in any subscriber television system there is a limited amount of bandwidth available and therefore a limited number of transmission frequencies that can be delivered to a particular HCT. In a typical subscriber television environment, this limitation determines the number of services that system operators may offer to their subscribers.
One class of services envisioned for the subscriber television system employs a high-speed connection from the headend to the HCT. This connection allocates an exclusive portion of the bandwidth to the subscriber of that service. This type of service is used to support applications such as Video on Demand (VOD) where the connection is used to transport an MPEG-2 (Motion Picture Experts Group second standard) stream to the HCT under control of the subscriber. The bandwidth used by this service is dedicated exclusively to that HCT for the time that the service is being used.
Since there is a limited amount of bandwidth available in the subscriber television system, the system can not support a sufficient number of these exclusive services if the entire bandwidth is available to every HCT. The more advanced system designs allow different services and programming to be available to different locations within the system. This allows different exclusive services to use the same portion of the spectrum in different parts of the system. At the same time, services that are common to all HCTs may be delivered throughout the network.
This system design provides the system operator a large degree of flexibility in designing a system that will deliver a mix of services that satisfy their marketing requirements. With this flexibility however, comes complexity. Because the system may be changed over time to support a different mix of services, it becomes very difficult to keep up with which services are available to a given HCT at any given time. With traditional analog broadcast services, the subscriber television system typically had one headend with a main transmission trunk and smaller transmission branches distributing the programming to the service coverage areas and the individual settops. The programming on the analog system was typically one-way and uniform (i.e., the same programming) to each subscriber. Newer subscriber television systems can include combinations of multiple headends, mini-headends, hubs, and nodes. The new system structures allow two-way communications and the introduction of different services and programming to different areas within a subscriber television system. Subscribers living in adjacent subdivisions may have different programs on channel 7 of their respective HCTs. One subscriber may have access to video-on-demand (VOD) services while his neighbor may not. The control mechanism for the entire subscriber television system needs to know which programming and which services are available to which HCT. In the case of advanced system architecture, the subscriber television system has to determine how to route a service to a particular HCT. In order to make this decision, the system controller needs to know the services available on every HCT.
Thus, there is a need for an efficient method, apparatus, and system that will allow the easy and dynamic identification of the services and programming available to an HCT in a subscriber television system.

System and method for automatically determining service groups in a subscriber network


An anisotropically electroconductive adhesive to be used for establishing electric connection between terminals of, for example, an IC chip and of a circuit pattern, at a low cost with high reliabilities both in the establishment of electric connection and in the insulation upon the connection without suffering from short-circuiting between circuit lines in the circuit and without causing any obstruction on the circuit, even when the terminals or the circuit lines are disposed at close intervals, which adhesive comprises an electrically insulating adhesive matrix and electroconductive particles dispersed in the matrix, wherein the electroconductive particles comprise at least two electroconductive particulate products of different average particle sizes and wherein each particle of both the particulate products is coated with an electrically insulating resin insoluble in the insulating adhesive matrix.

Under the recent trend in the art to making electronic elements and parts in a thin geometry and in light weighing, so-called "bear-chip mounting" and "flip-chip bonding" for directly mounting IC chips on electronic elements and parts have found applications to the assemblage of such electronic elements and parts.
For direct assemblage of IC chips on substrate of circuit pattern, there have hitherto been practised, for example, 1) the "wire-bonding" technique in which the terminal electrodes of the IC chip are connected using gold microwires with corresponding terminals in the circuit pattern formed on the substrate, 2) the "face-down" technique in which the terminal electrodes of the IC chip and the corresponding terminals in the circuit pattern formed on the substrate are connected by means of "reflowing" of solder and 3) the anisotropic connection technique in which the terminal electrodes in a form of microbumps on the IC chip and the corresponding terminals in the circuit pattern formed on the substrate are connected by press-fixation of the IC chip and the circuit pattern-carrying substrate together under interposition of a layer of an anisotropically electroconductive adhesive therebetween. Among them, the anisotropic connection technique using an electroconductive adhesive (including an anisotropically electroconductive adhesive film prepared by forming a layer of an anisotropically electroconductive adhesive on an exfoliative film, namely, a film easily peeled off therefrom, with subsequent heating and drying of the layer) has recently attained wide uses, since it provides many profits, such as convenience in the practical operation, high reliability of establishment of electric connection and unnecessity of sealing of the assembly with simultaneous permission of a high density assembly at a minimum cost.
In accompaniment with the decrease in the size of the IC bumps (projecting terminal electrodes) and with the trend to designing the circuit pattern in a finer pitch, however, it becomes necessary to use electroconductive particles of smaller particle size in the anisotropically electroconductive adhesive and, in addition, there is a common trend to the use of higher content of the electroconductive particles in the adhesive for increasing the reliability of establishment of an assured electric connection.
Under these circumstances, there occurred problems in that fluctuation of condition for building up the electric connection by the adhesive is brought about due to the secondary agglomeration of the conductor particles and short-circuiting between electric lines in the circuit pattern on the substrate may occur, when electroconductive particles of smaller particle size is employed, and in that short-circuiting between electric lines in the circuit pattern on the substrate may also happen, when the content of the electroconductive particles is increased.
As countermeasures therefor, attempts have been proposed, such as those in which insulator-coated conductor particles having each particle coated with a layer of insulator is used and in which a plurality of anisotropically electroconductive films are used under lamination in order to prevent dislodging or exilation of the conductor particles away from the region of the terminal electrode during the course of building up of the electric connection by the press-fixation.
Use of such insulator-coated conductor particles may give birth to some fear of reduction in the long term reliability for assured electric connection due to the hardness and elasticity thereof. When the blending proportion of the insulator-coated conductor particles, which are constituted, in general, mainly of a particulate product having an average particle size of about 5 .mu.m, is increased to a value of, for example, 40,000 particles/mm.sup.2 -film, a reliable insulation or exclusion of occurrence of short-circuiting may difficultly be maintained for binding an IC chip of a bump pitch of 10 .mu.m or less.
While, on the other hand, use of multilayered anisotropically electroconductive film may permit increase in the blending proportion of the conductor particles up to, for example, about 80,000 particles/mm.sup.2 -film for smaller size conductor particles having an average particle size of about 3 .mu.m, it is necessary in this case to form bumps in a higher accuracy with simultaneous requirement of rigorous administration of precision of the pressing condition upon establishment of the electric connection, resulting in a high production cost.
In Japanese Patent Application Kokai Hei 4-174980 A, an electrically connecting composition for connecting lines of electric circuit is disclosed, which comprises, on the one hand, an insulator-coated particulate product in which each particle of an electric conductor deformable upon being heated is coated with a layer of a thermoplastic insulator and, on the other hand, a particulate thickness-regulating product having a hardness higher than that of the insulator-coated particulate product, wherein both particualte products are dispersed in a matrix of an adhesive material of insulating nature capable of exhibiting a plastic flow when heated.
This electrically connecting composition is, however, difficult to acquire a high reliability for establishing an electric connection when the thickness-regulating product is made of an electric insulator, since this product does not participate in the establishment of an electric connection. When the thickness-regulating product is made of an electric conductor, a higher blending proportion thereof may permit occurrence of short-circuiting, obstructing thus the reliability of insulation or exclusion of occurrence of short-circuiting. Moreover, when the thickness-regulating product consists of particles having uneven particle sizes, the thickness of the resulting assembly is determined by the largermost particle in this product, as the thickness-regulating particles have high hardness, so that particles having sizes smaller than the largermost one cannot participate in the establishment of an electric connection, resulting also in a defective reliability in the establishment of electric connection.
In Japanese Patent Application Kokai Hei 9-102661 A, a method for providing electric connection between terminal electrodes using an electroconductive microparticulate product having a certain compressive hardness (K-value) and a specific restorability from deformation.
Use of such an electroconductive micro-particulate product as above may, however, difficultly result in attainment of high reliabilities both in the establishment of electric connection and in the insulation upon connection of an IC chip of a fine pitch circuit pattern.

Anisotropically electroconductive adhesive and adhesive film


A forearm mounted wrist position training device for signaling a golfer when his or her wrists bend improperly during a golf swing. A housing is secured to a forearm with a sensor pad engaging the back of the hand. The pad position can be varied to fit the forearm and wrist position when the golfer addresses the ball. The pad is mounted on one end of a sensor lever with an attachment device attached to the other. An actuator lever is fastened to the attachment device, with the other end pivotally mounted in the housing adjacent to a switch. When the golfer bends his or her wrist beyond a selected limit, the actuator lever will close the switch which will then activate a battery powered circuit to produce a signal such as an audible beep. The training device can be placed on either wrist and is useful with putters and other clubs. The golfer will learn to hold his wrists in the proper position by avoiding causing the signal to sound.

In playing golf, it has long been known that the wrists should hinge in a specific direction parallel to the forearm during the backswing, downswing and until just after the ball is struck. In addition, when putting and chipping, the wrists should remain firm and locked through the back swing and follow through.
When putting and when chipping the ball from near the green, failure to maintain both wrists locked during the backswing and throughout the stroke leads to stubbed putts and misdirection. Putts and chips should be accomplished with a pendulum motion, using the forearms.
When making a full swing during a longer shot, if the wrists hinge in any other direction other than parallel to the forearm during the back swing the player is said to have either opened or closed the club face. This will cause the ball to hook or slice.
A number of different devices have been developed in an attempt to maintain a golfer's hands in the proper golf grip during the golf swing. In U.S. Pat. No. 5,324,038, Sasser describes a device with a sensor mounted on the forearm of the leading arm that has a sensor arm for engaging the back of the hand to signal the direction and degree of any errant hand movement. Osborn, in U.S. Pat. No. 3,508,280 shows a pair of golf gloves which lock together with a tape fastener material. Skouron in U.S. Pat. No. 3,559,212 discloses a single glove with an attachment that holds the last three fingers of the lead hand in place. Washburn in U.S. Pat. No. 4,017,086 describes a complex mechanical device attached to a forearm for holding the wrist in the proper bent or "cocked" position during a swing. position Freyer in U.S. Pat. No. 5,028,050 and Suttle in U.S. Pat. No. 5,184,827 both teach a pair of golf gloves which lock together with hook-and-loop material which produces a tearing sound when separated. Multiple attachments that secure the last two fingers of the gloved lead hand in place are described by Myers in U.S. Pat. No. 5,033,120. While each of these patents attempts to forcibly overcome the grip release or relaxation problem by preventing, at least up to a point, such relaxation or release, none actually teaches the golfer to use his or her natural ability to overcome the problem by maintaining a proper grip and wrist position throughout the golf swing.
Thus, there is a continuing need for improved methods and means for detecting wrist breaking during the different types of golf swings, for signaling proper or improper wrist movement, for teaching a golfer to maintain proper wrist position without rigidly forcing the hands into a particular position throughout a golf swing and which are comfortable and convenient to use.

Electronic golf wrist movement training device


A Permanent Pacemaker and Implantable Cardioverter-Defibrillator with a rechargeable battery with recharging facility

(1) The battery of the pacemaker/ICD decides its life and change causes multiple problems such as:                It requires an invasive (surgical) procedure and thus causes complications associated with it.        Should infection develop it becomes a major problem as lead/leads/pocket etc will have to be sacrificed.
(2) The follow-up of the patient is a problem, due to lack of a programmer and skilled manpower in remote areas.

Vipul's lifetime lifeline permanent pacemaker and implantable cardioverter-defibrillator

Abstract: This PPM/ICD has systems which can be programmed or serviced from a distant center.


A method for fabricating an integrated circuit includes providing a conductive material overlying a semiconductor substrate and a dielectric material overlying the conductive material, wherein an opening exposes a surface of the conductive material and sidewalls of the dielectric material and selectively depositing a first layer of a first barrier material on the surface of the conductive material with the sidewalls of the dielectric material remaining exposed, the first barrier material being such that, if annealed in an annealing process, the first barrier material would diffuse into the conductive material. The method further includes modifying the first barrier material on the exposed surface to form a second barrier material, the second barrier material being such that, during an annealing process, the second barrier material does not diffuse into the conductive material and depositing a second layer of the first barrier material along the sidewalls of the opening. Still further, the method includes annealing the semiconductor substrate. Integrated circuits fabricated in accordance with the foregoing method are also disclosed.

The majority of present day integrated circuits are implemented by using a plurality of interconnected field effect transistors (FETs), also called metal oxide semiconductor field effect transistors (MOSFETs), or simply MOS transistors. An MOS transistor includes a gate electrode as a control electrode formed over a semiconductive substrate, and spaced apart source and drain electrodes within the substrate between which a current can flow. A control voltage applied to the gate electrode controls the flow of current through a channel in the semiconductive substrate between the source and drain electrodes. Dielectric materials, such as silicon dioxide, are commonly employed to electrically separate the various gate electrodes in the integrated circuit.
Due to the large number of circuit elements and the required complex layout of advanced integrated circuits, the electrical connections of the individual circuit elements are generally not established within the same level on which the circuit elements are manufactured. Such electrical connections are formed in one or more additional "wiring" layers, also referred to as metallization layers. These metallization layers generally include metal-containing lines, providing the intra-level electrical connection, and a plurality of inter-level connections, also referred to as vias, which provide the electrical connection between two neighboring stacked metallization layers. The metal-containing lines and vias may also be commonly referred to as interconnect structures.
Due to the ongoing demand for shrinking the feature sizes of highly sophisticated semiconductor devices, highly conductive metals, such as copper and alloys thereof, in combination with low-k dielectric materials, have become frequently used alternatives in the formation of metallization layers. A plurality of metallization layers stacked on top of each other is employed to realize the connections between all internal circuit elements and I/O (input/output), power and ground pads of the circuit design under consideration. For extremely scaled integrated circuits, such as the 32 nm scale and smaller, the signal propagation delay, and thus the operating speed, of the integrated circuit may no longer be limited by the field effect transistors but may be restricted, owing to the increased density of circuit elements requiring an even more increased number of electrical connections, by the close proximity of the metal lines, since the line-to-line capacitance is increased, which is accompanied by the fact that the metal lines have a reduced conductivity due to a reduced cross-sectional area.
During the formation of copper-based metallization layers, a so-called damascene or inlaid technique may be used, due to copper's characteristic resistance to forming volatile etch products when being exposed to well-established anisotropic etch ambients. In addition, copper also may not be deposited with high deposition rates on the basis of well-established deposition techniques usually used for aluminum, such as chemical vapor deposition (CVD). Thus, in the inlaid technique, the dielectric material, such as a silicon oxide, is patterned to receive trenches and/or vias, which are subsequently filled with the copper by an electrochemical deposition technique. Moreover, a barrier layer may be formed on exposed surface portions of the dielectric material prior to filling in the metal, which provides the desired adhesion of the copper to the surrounding dielectric material and also suppresses copper diffusion into sensitive device areas, as copper may readily diffuse in a plurality of dielectric materials, in particular in porous low-k dielectrics.
Manganese has found substantial utility as the barrier layer to be formed prior to filling in the metal. Manganese formed on the exposed surface portions of the silicon oxide dielectric material will form a manganese silicate material during subsequent annealing processes, consuming some space of the silicon oxide dielectric material and thus leaving more volume for the copper to increase the aforementioned copper line conductivity. However, at the bottom of the trenches, where the underlying metallization (copper) layer is exposed, manganese is unable to perform its desired barrier function as the manganese readily diffuses into the copper during the subsequent annealing process. The lack of a barrier material at the underlying metallization layer may result in conductivity problems between the inter-level connection structures and the underlying metallization layer.
As an alternative to a manganese barrier layer, a manganese nitride (MnNx) barrier layer has been proposed. Manganese nitride has a benefit in that it will not diffuse into the underlying metallization layer upon application (and annealing) thereover. However, manganese nitride will not form the manganese silicate material along the exposed surface portions of the silicon oxide dielectric material, thus leaving less room for the metal inter-level connection and consequently a lower conductivity and increased line resistance.
Accordingly, it is desirable to provide improved methods for fabricating integrated circuits using damascene process flows. Additionally, it is desirable to provide such methods that provide increased volume for inter-level metal connection structures while simultaneously preventing electrical conductivity problems between the inter-level connection structures and the underlying metallization layer. Furthermore, other desirable features and characteristics of the present disclosure will become apparent from the subsequent detailed description and the appended claims, taken in conjunction with the accompanying drawings and the foregoing technical field and background.

Hybrid manganese and manganese nitride barriers for back-end-of-line metallization and methods for fabricating the same


Cladding attachment system is disclosed having a base and an attachment member. The base has an engaging wall extending from a back plate. A base gusset plate extends between the engaging wall and the back plate. The engaging wall has a plurality of base teeth. The back plate is configured to attach to a support wall. The attachment member has a receiving wall extending from a mounting plate. The receiving wall has a receiving channel configured to receive the engaging wall. The receiving wall has two interior walls and a gusset channel. Each interior wall comprises one or more receiving teeth extending into the receiving opening to engage one or more of the base teeth to releasably join the attachment member to the base. The mounting plate comprises a surface for supporting cladding.

The use of continuous insulation is mandated for some climates in the United States by newer energy codes. The purpose of continuous insulation is to eliminate thermal breaks that reduce thermal efficiency of insulation placed between framing members such as wall studs.
Cladding can be placed over rigid insulation boards or foam that are placed outside of an air barrier (AB)/weather-resistive barrier (WRB). The use of continuous insulation with cladding requires the cladding to be connected to the support or back-up wall behind the AB/WRB. In many applications, the cladding system will require a continuous attachment mechanism that bridges the thickness of the insulation and provides a flange for attachment of the cladding. Such attachment strips typically consist of a "Z" shaped metal device which poses a continuous line of thermal bridging through the insulation.
The present inventor recognized the need for a cladding attachment system that reduces thermal bridging where the continuous insulation is traversed. The present inventor recognized the need for a cladding attachment system that is less susceptible to deterioration by moisture and weather conditions.
When installing continuous insulation panels, the panels are often installed in complete contact with the AB/WRB on the back-up surface. This prevents proper drainage of water on the exterior face of the AB/WRB. Water can be trapped in the minute gap between the continuous insulation and AB/WRB due to capillary action. This trapped water can cause accelerated deterioration of ties and other components.
The present inventor recognized the need for a cladding attachment system that creates a gap between the continuous insulation panels and AB/WRB. This gap facilitates drainage.
Continuous insulation panels are often installed with adhesive backing to ensure they stay in place. This adhesive backing can impede drainage of water on the drainage plane and can degrade and fail over time under certain circumstances. This adhesive backing will also results in additional labor and material costs.
The present inventor recognized the need for a cladding attachment system that can retain the continuous insulation panels in place and eliminate the need to rely on adhesive backing.
The present inventor recognized the need to transfer some compressive force from the cladding attachment system onto the insulation to reduce or eliminate the possibility of buckling under compressive loads and to reduce the effective span within the cavity.
The present inventor recognized the need for a cladding attachment system that can support increased vertical load when oriented horizontally.


A device for cleaning a surface of a photosensitive drum used in electrocopying machines utilizing a xerography, laser printers, and facsimiles using normal sheets. The cleaning device includes a filter unit having a suction fan and a duct connected to the suction fan at its one end, for sucking waste toner powder, the filter unit being disposed between the discharge plate and the blade, in place of a conventional separation pole, a roller disposed between the filter unit and the blade and adapted to be supplied with a cleaning agent via a cleaning agent supplying member, the roller having, at its circumferential portion, radially extending removal fibers with a predetermined length, a contact portion provided at the other end of the duct to have the same width as the duct and adapted to separate a copied sheet from the photosensitive drum, so that a double cleaning for the drum surface is carried out.

1. Field of the Invention
The present invention relates to a device for cleaning a surface of a photosensitive drum used in electrocopying machines utilizing a xerography, laser printers, and facsimiles using normal sheets.
2. Description of the Prior Art
As a conventional device for cleaning a photosensitive drum, a construction has been known, which comprises a blade disposed in contact with a surface of the photosensitive drum and a roller type brush, so as to remove foreign materials attached to the drum surface. Such a construction is disclosed in Japanese Patent Laid-open Publication No. 90-304475.
By using this cleaning device, it is impossible to remove talcum powder separated from a surface or cut portion of a copied sheet and then attached to the drum surface. Where talcum powder is interposed between the blade and the drum, it scratches a photosensitive layer on the drum surface, since a friction occurs between the drum surface and the blade. The scratch may generate black lines upon copying. In more severe cases, the drum surface may be partially broken off, thereby resulting in a poor picture quality. As mentioned above, the conventional photosensitive drum cleaning device serves only to remove toner powder from the drum.

Photosensitive drum surface cleaning device for electrocopying machine

Hyundai Electronics Industries Co., Ltd.


The present disclosure provides compositions comprising ephedrine sulfate ready for immediate use in a clinical setting, and methods of making and using same.

Ephedrine sulfate ((1R,2S)-(−)-2-methylamine-1-phenylpropan-1-ol sulfate) is an alpha- and beta-adrenergic agonist and a norepinephrine-releasing agent that is FDA-approved for the treatment of clinically important hypotension occurring in the setting of anesthesia. However, all FDA-approved formulations must be diluted ten-fold before administration to a patient. Requiring dilution steps is inconvenient, delays administration of needed therapeutic intervention, and introduces a significant and dangerous source of potential error in the clinical setting. Dilution just before administration also introduces a significant risk of contamination to an otherwise sterile composition. For example, a recent study by the Institute for Safe Medicine Practices revealed that nearly 1 in 10 drug products are prepared incorrectly before dispensing to a patient. A 2009 survey reported that 30% of hospitals reported a patient event involving a compounding error in the previous 5-year period.
Shelf-stable ready-to-use formulations commonly include excipients, such as preservatives and/or chelating agents. The use of such agents, while advantageous from a stability perspective, prevents broad use of prediluted compositions due to risks of allergic reactions, patient sensitivities, and undesirable cross-reactivities with other medications. These risks are significant in certain settings, such as the emergency room, where quick action is required, often in the absence of complete patient records.
Typically, ephedrine sulfate compositions are prepared using aseptic compounding techniques, whether by a compounding lab or on-site by a medical professional. While generally considered to be safe, aseptic compounding still results in frequent (circa 1/1,000) contamination by biological materials. For example, Sandoz, US Compounding, Pharmakon Pharmaceuticals, Allergy Laboratories, Cantrell Drug Company, SCA Pharmaceuticals, Banner Pharmaceuticals and PherMEDium have recalled dozens of lots of compounded ephedrine sulfate, representing several million doses, for lack of sterility assurance since 2012. Current methods of administering ephedrine sulfate compositions therefore carry a serious infection risk to patients.
Ephedrine sulfate compositions are known to be susceptible to light, pH changes, and humidity. FDA-approved formulations have short shelf lives, typically about 24 months. Ready-to-use (e.g., prediluted) preparations of ephedrine sulfate are not known to be stable for more than 60 days; ready-to-use formulations of other ephedrine salts are not known to be stable for more than 12 months.
In view of these clinically relevant shortcomings, a need exists for improved formulations of ephedrine sulfate.

This patent is subject to a terminal disclaimer.

Compositions comprising ephedrine or an ephedrine salt and methods of making and using same


An abrasive construction for modifying a surface of a workpiece, such as a semiconductor wafer. The abrasive construction comprises: a three-dimensional, textured, fixed abrasive element; at least one resilient element generally coextensive with the fixed abrasive element; and at least one rigid element generally coextensive with and interposed between the resilient element and the fixed abrasive element, wherein the rigid element has a Young's Modulus greater than that of the resilient element.

1. Field of Invention
This invention relates to an abrasive construction having abrasive, rigid, and resilient elements for modifying an exposed surface of a semiconductor wafer.
2. Description of the Related Art
In the course of integrated circuit manufacture, a semiconductor wafer typically undergoes numerous processing steps, including deposition, patterning, and etching steps. Additional details on how semiconductor wafers are processed can be found in the article "Abrasive Machining of Silicon" by Tonshoff, H. K.; Scheiden, W. V.; Inasaki, I.; Koning, W.; Spur, G. published in the Annals of the International Institution for Production Engineering Research, Volume 39/2/1990, pages 621 to 635. At each step in the process, it is often desirable to achieve a pre-determined level of surface "planarity" and/or "uniformity." It is also desirable to minimize surface defects such as pits and scratches. Such surface irregularities may affect the performance of a final patterned semiconductor device.
One accepted method of reducing surface irregularities is to treat the wafer surface with a slurry containing a plurality of loose abrasive particles using a polishing pad. An example of a polishing pad for use with a slurry is described in U.S. Pat. No. 5,287,663 (Pierce et al.). This pad includes a polishing layer, a rigid layer adjacent the polishing layer, and a resilient layer adjacent the rigid layer. The polishing layer is material such as urethane or composites of urethane.

Abrasive construction for semiconductor wafer modification

Minnesota Mining and Manufacturing Company


A magnetic tape cartridge, a recording system, and a magnetic tape drive are configured to, for example, guard against tampering with a write once overwrite protection pointer which allows a rewritable magnetic tape to be treated as write once. In one embodiment, the magnetic tape cartridge comprises a magnetic tape and a cartridge memory. The magnetic tape is configured to provide at least one overwrite protection pointer, the overwrite protection pointer identifying data to be protected from being overwritten; and the cartridge memory is configured to provide the at least one overwrite protection pointer, the overwrite protection pointer identifying magnetic tape data to be protected from being overwritten.

Magnetic tape is typically a rewritable recording media, but may be rendered as write once media by limiting overwrite of the media. For example, copending and coassigned U.S. Pat. No. 6,339,810, Basham et al., discusses treating data storage media as WORM by automatically advancing a write append limiter as data is written, and preventing changes to data occurring before the write append limiter.

Magnetic tape write once overwrite protection

International Business Machines Corporation


A streak camera having improved time resolving capacity in the femtosecond regime. The streak camera uses magnetic and/or electric fields in such a way as to minimize the adverse effects of angular distribution and energy distribution of photoelectrons simultaneously emitted from a photocathode in response to the impinging of light thereon. In one embodiment, the streak camera comprises a streak camera tube including a housing, the housing having disposed therein a photocathode, an aperture sized to selectively permit the passage therethrough of substantially on-axis photoelectrons, an accelerating mesh, a pair of focusing electrodes or a cylindrical focusing electrode for focusing the photoelectrons into a beam, a pair of isolation plates or an isolation cylindrical, means for creating an electric field and/or a magnetic field, whereby the beam of photoelectrons passing therethrough is caused to be dispersed into a plurality of trajectories in accordance with the distribution of velocities of the photoelectrons, an aperture sized to selectively permit the passage therethrough of photoelectrons traveling along a narrow band of trajectories, i.e. photoelectrons within a narrow velocity range, a pair of sweep electrodes, a microchannel plate, and a phosphor screen. The streak camera also includes an input slit disposed in front of the photocathode and optics for imaging the input slit on the photocathode. To minimize dispersion of the optical pulse as it is focused onto the photocathode, the optics preferably include a mirror arrangement instead of a lens system.

The present invention relates generally to streak cameras and more particularly to a novel streak camera having improved time resolution in the femtosecond time domain.
Streak cameras, which are about fifteen years old in the art, are used primarily to directly measure the time dynamics of luminous events, i.e., to directly time resolve a light signal. A typical streak camera includes a rectangular entrance slit, input relay optics, a streak camera tube including a housing having disposed therein a photocathode, an accelerating mesh, a pair of sweeping electrodes, a microchannel plate, and a phosphor screen, and output relay optics for imaging the streak image formed on the phosphor screen onto an external focal plane. The image at the external focal plane is then either photographed by a conventional still camera or by a video camera.
In use, photons of an incident light pulse pass through the entrance slit and are collected and focused by the input relay optics onto the photocathode of the streak tube to produce emissions of electrons proportional to the intensity of the incident light pulse. The electrons are then accelerated into the streak tube via the accelerating mesh and are electrostatically swept at a known rate over a known distance, thereby converting temporal information into spatial information. These electrons then strike the microchannel plate, which produces electron multiplication through secondary emission. The secondary electrons then impinge upon a phosphor screen to form a streak image. The streak image thus serves as a luminescent "fingerprint" of the time resolved characteristics of the incident light pulse.
An illustrative example of a streak camera is disclosed in U.S. Pat. No. 4,467,189 to Y. Tsuchiya, wherein there is disclosed a framing tube (i.e., streak camera tube) which includes a cylindrical airtight vacuum tube, a shutter plate, and a ramp generator. The container has a photocathode at one end thereof and a fluorescent screen at the other end thereof which is opposite to the photocathode. The shutter plate is disposed between and parallel to the surface of the photocathode and fluorescent screen and has a multiplicity of through holes perforated perpendicular to its surface. The shutter plate also carries at least three electrodes that are disposed perpendicular to the axis of the through holes and spaced parallel to each other. The electrodes divide the surface of the shutter plate into a plurality of sections. The ramp generator is connected to the electrodes. The ramp voltage generated changes in such a manner as to reverse its polarity, producing a time lag between the individual electrode. Developing an electric field across the axis of the through holes in the shutter screen, the ramp voltage controls the passage of the electron beams from the photocathode through the through holes. A framing camera includes the above-described framing tube and an optical system. The optical system includes a semitransparent mirror that breaks up the light from the object under observation into a plurality of light components and a focusing lens disposed in the path through which each of the light components travels. Each of the light components corresponds to each of the sections on the shutter plate. The images of a rapidly changing object are reproduced, at extremely short time intervals, on different parts of the fluorescent screen.
Other U.S. patents relating to streak cameras include U.S. Pat. No. 4,714,825 to Oba; U.S. Pat. No. 4,682,020 to Alfano; U.S. Pat. No. 4,661,694 to Corcoran; U.S. Pat. No. 4,659,921 to Alfano; U.S. Pat. No. 4,645,918 to Tsuchiya et al.; U.S. Pat. No. 4,630,925 to Schiller et al.; U.S. Pat. No. 4,435,727 to Schiller et al.; U.S. Pat. No. 4,413,178 to Mourou et al.; U.S. Pat. No. 4,327,285 to Bradley; U.S. Pat. No. 4,323,811 to Garfield;
Additionally, articles relating to streak cameras include N. H. Schiller et al., "An Ultrafast Streak Camera System: Temporaldisperser and Analyzer," Optical Spectra (June 1980); N. H. Schiller et al., "Picosecond Characteristics of a Spectrograph Measured by a Streak Camera/Video Readout System," Optical Communications, Vol. 35, No. 3, pp. 451-454 (December 1980); and C. W. Robinson et al., "Coupling an Ultraviolet Spectrograph to a Schloma for Three Dimensional Picosecond Fluorescent Measurements," Multichannel Image Detectors, pp. 199-213, ACS Symposium Series 102, American Chemical Society.
Many of the above-described streak cameras have time resolutions in the picosecond range, with some as short as 500 femtoseconds (fs). However, with the now routine generation of laser pulses as short as 30 fs, the detection of luminous events on the 30 fs scale is now important. Accordingly, there is a need for a streak camera whose time resolution is better than existing streak cameras and is preferably in the 30 fs scale.


A self-detection charge sharing module for a liquid crystal display device is disclosed. The self-detection charge sharing module includes at least one detecting unit, for detecting a plurality of input voltages of a plurality of operational amplifiers driving a plurality of data line sand a plurality of output voltage of the plurality of data line, to generate at least one detecting result, and at least one charge sharing unit, for conducting connection between at least one first data line and at least one second data line among the plurality of data line when the at least one detecting result indicates at least one corresponding first input voltage and at least one corresponding second input voltage among the plurality of input voltage have opposite voltage variation direction and vary toward each other. The at least one first input voltage and the at least one second input voltage maintain respective polarities.

1. Field of the Invention
The present invention relates to a self-detection charge sharing module, and more particularly, to a self-detection charge sharing module capable of detecting tendency of voltage variation of data lines and performing charge sharing, to raise performance of power saving.
2. Description of the Prior Art
The advantages of a liquid crystal display (LCD) include lighter weight, less electrical consumption, and less radiation contamination as compared to other conventional displays. Thus, LCD devices have been widely applied to various portable information products, such as notebooks, PDAs, etc. In an LCD device, incident lights are polarized or refracted differently when the alignment of liquid crystal molecules is altered. The transmission of the incident light is affected by the liquid crystal molecules, and thus magnitude of the light emitting out of the liquid crystal molecules varies. The LCD device utilizes the characteristics of the liquid crystal molecules to control the corresponding light transmittance and produces gorgeous images according to different intensities and gray scales of red, blue, and green light.
Please refer to FIG. 1, which illustrates a schematic diagram of a conventional thin film transistor (TFT) LCD device 10. The LCD device 10 includes an LCD panel 100, a timing controller 102, a source driver 104, and a gate driver 106. The LCD panel 100 includes two parallel substrates, and the liquid crystal molecules are filled up between these two substrates. A plurality of data lines 110, a plurality of scan lines 112 perpendicular to the data lines 110, and a plurality of TFTs 114 are disposed on one of the substrates. There is a common electrode installed on another substrate for outputting a common voltage Vcom via the common electrode. Please note that only four TFTs 114 are shown in FIG. 1 for simplicity of illustration. In practical implementation, the LCD panel 100 has one TFT 114 installed in each intersection of the data lines 110 and scan lines 112. In other words, the TFTs 114 are arranged in a matrix form on the LCD panel 100. The respective data lines 110 correspond to different columns, and the respective scan lines 112 correspond to different rows. The LCD device 10 uses a specific column and a specific row to locate the associated TFT 114 that corresponds to a pixel. In addition, the two parallel substrates of the LCD panel 100 filled up with liquid crystal molecules can be considered as an equivalent capacitor 116.
The operation of the conventional LCD device 10 is described as follows. First, the timing controller 102 generates data signals for image display as well as control signals and timing signals for driving the control panel 100. The source driver 104 and the gate driver 106 generate input signals for different data lines 110 and scan lines 112 according to the signals sent by the timing controller 102, to control conduction of the corresponding TFTs 114 and voltage differences across the equivalent capacitors 116, so as to change the alignment of liquid crystal molecules and light transmittance. For example, the gate driver 106 outputs a pulse to the scan line 112 for turning on the TFT 114. Therefore, the voltage of the input signal generated by the source driver 104 is inputted into the equivalent capacitor 116 through the data line 110 and the TFT 114. The voltage difference kept by the equivalent capacitor 116 can then adjust a corresponding gray level of the related pixel through affecting the related alignment of liquid crystal molecules positioned between the two parallel substrates. In addition, the source driver 104 generates the input signals, and magnitude of each input signal inputted to the data line 110 corresponds to different gray levels.
If the LCD device 10 continuously uses a positive voltage to drive the liquid crystal molecules, the liquid crystal molecules will not quickly change a corresponding alignment according to the applied voltages. Similarly, if the LCD device 10 continuously uses a negative voltage to drive the liquid crystal molecules, the liquid crystal molecules will not quickly change a corresponding alignment according to the applied voltages. Thus, the incident light will not produce accurate polarization or refraction, and the quality of images displayed on the LCD device 10 deteriorates. In order to protect the liquid crystal molecules from being irregular, the LCD device 10 must alternately use positive and negative voltages to drive the liquid crystal molecules. In addition, the LCD panel 100 has the equivalent capacitors 116, and the related circuit also has some parasitic capacitors owing to its intrinsic structure. When the same image is displayed on the LCD panel 100 for a long time, the parasite capacitors will be charged to generate a residual image effect. The residual image with regard to the parasitic capacitors will further distort the following images displayed on the same LCD panel 100. Therefore, the LCD device 10 must alternately use the positive and the negative voltages to drive the liquid crystal molecules for eliminating the undesired residual image effect, for example column inversion and dot inversion schemes are exploited.
As mentioned above, when the driving voltages of the LCD panel 100 begin to reverse polarities, the LCD device 10 has the largest loading since the source driver 104 consumes the largest amount of current at this time. Generally, charge sharing is exploited to reuse electrical charges and reduce the reaction time that the equivalent capacitors 116 are charged to the expected voltage level, to save power. In the LCD device 10, the source driver 104 evenly allocates electrical charges by controlling transistor switches between two adjacent data lines to achieve charge sharing.
Please refer to FIG. 2, which is a schematic diagram of voltage levels of an odd data channel CH_ODD and an even data channel CH_EVEN next to the odd channel CH_ODD when the LCD 10 is driven by the dot inversion driving approach. As shown in FIG. 2, the X-axis represents time and the Y-axis represents voltage level. The maximum and minimum driving voltage outputted to the equivalent capacitors 116 can be represented by VDD and VGND. The voltage level after charge sharing can be represented by Vavg. If the liquid crystal molecules are driven in the positive polarity, a driving voltage Vp outputted to the equivalent capacitors 116 needs to be between the common voltage Vcom and the maximum driving voltage VDD. On the other hand, if the liquid crystal molecules are driven in the negative polarity, a driving voltage Vn outputted to the equivalent capacitors 116 needs to be between the minimum driving voltage VGND and the common voltage Vcom.
If the LCD panel 100 of the LCD device 10 is driven by the dot inversion driving approach, as shown in FIG. 2, when a driving period ends, the voltage level of the equivalent capacitor of an odd data channel CH_ODD is equal to the maximum driving voltage VDD, and the voltage level of the equivalent capacitor 116 of an even data channel CH_EVEN is equal to the minimum driving voltage VGND, wherein Vcom=0.5 VDD, and VGND=0. Before the next driving period starts, the conventional LCD device 10 first turns on transistor switches coupled between two adjacent data channels to perform charge sharing and neutralize electrical charges stored in liquid crystal capacitors in the end of the previous driving period. Thus, the voltage level of the equivalent capacitor of the odd data channel CH_ODD is pulled from Vp to Vavg. Similarly, the voltage level of the equivalent capacitor of the even data channel CH_EVEN is pulled from Vn to Vavg. Assuming Vp and Vn are equal to the maximum and minimum driving voltage, respectively, Vag=Vcom=0.5 VDD. During the next driving period, the polarity of the odd data channel CH_ODD turns from positive to negative. Since the source driver 102 discharges the odd data channel CH_ODD in advance through charge sharing, only a voltage difference ΔV=−0.5 VDD is provided for driving the liquid crystal molecules to control the gray levels of the relative pixels. Similarly, during the next driving period, the polarity of the even data channel CH_EVEN turns from negative to positive. Since the source driver 102 charges the even data channel CH_EVEN in advance through charge sharing, only a voltage difference ΔV=−0.5 VDD is provided for driving the liquid crystal molecules to control the gray levels of the relative pixels.
However, in the prior art, conventional charge sharing techniques utilize digital signals (i.e. polarity inverted signals) to control data lines with opposite polarities of voltage to perform charge sharing for power saving when polarities of voltages are inverted. These methods of charge sharing can save power only when polarities of voltages are inverted and thus can not apply to applications of only magnitudes of voltages being changed and polarities of voltages being the same, to perform charge sharing for saving power. Thus, there is a need to improve over the prior art.


Data having three values or more is stored in a memory cell in a nonvolatile manner. A data circuit has a plurality of storage circuits. One of the plurality of storage circuits is a latch circuit. Another one of the plurality of storage circuits is a capacitor. The latch circuit and the capacitor function to temporarily store program/read data having two bits or more. Data held by the capacitor is refreshed using the latch circuit if data variation due to leakage causes a program. As a result, the data circuit does not become large in size even if multi-level data is used.

The present invention relates to a nonvolatile semiconductor memory and particularly relates to a nonvolatile semiconductor memory used as a Multi-level NAND cell type EEPROM, e.g., a four-level NAND cell type EEPROM.
There is known, as one of nonvolatile semiconductor memories, an NAND cell type EEPROM. This EEPROM has a memory cell array consisting of a plurality of NAND cell units. Each of the NAND cell units consists of a plurality of memory cells connected in series and two select transistors connected to both ends of the memory cells, respectively. The NAND cell unit is connected between a bit line and a source line.
Each memory cell consists of an n channel MOS transistor having a so-called stack gate structure in which a control gate electrode is stacked on a floating gate electrode. Each select transistor consists of an n channel MOS transistor having a structure in which an upper electrode is stacked on a lower electrode as in the case of the memory cell. It is the lower electrode, for example, that actually functions as the gate electrode of the select transistor.
One source region or one drain region is common to adjacent two transistors among a plurality of transistors (memory cells and select transistors) in an NAND cell unit.
Now, the concrete structure of an NAND cell type EEPROM will be described.
FIG. 1 shows part of a memory cell array of the NAND cell type EEPROM.
Each NAND cell unit consists of a plurality of (4, 8, 16 or the like) memory cells connected in series and two select transistors connected to both ends of the memory cells, respectively. The NAND cell unit is connected between bit lines BLi and source lines SL. Each of the source lines is connected to reference potential lines each formed of a conductive member such as polysilicon at preset positions.
The source lines SL extend in row direction, whereas the bit lines BLi and the reference potential lines extend in column direction. Contact portions on which the source line SL and the reference potential line contact are provided at intervals at which each source line SL intersects, for example, 64 bit lines, i.e., four bit lines BL0, . . . BL63. The reference potential lines is connected to so-called peripheral circuits provided on the peripheral section of the memory cell array.
Word lines (control gate lines) WL1, . . . and WLn extend in the row direction and the select gate lines SG1 and SG2 extend in the row direction, as well. The collection of the memory cells connected to one word line (control gate line) WLi is called one page. Further, the collection of the memory cells connected to the word lines WL1, . . . and WLn put between the two select gate lines SG1 and SG2 is called one NAND block or simply one block.
One page consist of, for example, 256-byte (256×8) memory cells. The memory cells in one page are programmed almost simultaneously. In addition, if one page consists of 256-byte memory cells and one NAND cell unit consists of eight memory cells, one block consists of 2048-byte (2048×8) memory cells. The memory cells in one page are erased almost simultaneously.
FIG. 2 is a plan view of one NAND cell unit in the memory cell array. FIG. 3 is a cross-sectional view of the NAND cell taken along line III-III of FIG. 2. FIG. 4 is a cross-sectional view thereof taken along line IV-IV of FIG. 2. FIG. 5 shows an equivalent circuit of the devices of FIGS. 2 to 4.
In a p substrate (p-sub) 11-1, a so-called double-well region, consisting of an n well region (Cell n-well) 11-2 and p well region (Cell p-well) 11-3, is formed. The memory cells and select transistors are formed in the p well region 11-3.
The memory cells and select transistors are arranged in an element region within the p well region 11-3. The element region is surrounded by an element separation oxide film (element separation region) 12 formed on the p well region 11-3.
In this example, one NAND cell unit consists of eight memory cells M1 to M8 connected in series and two select transistors S1 and S2 connected to the both ends of the memory cells, respectively.
Each memory cell consists of a silicon oxide film (gate insulating film) 13 formed on the p well region (Cell p-well) 11-3, a floating gate electrode 14 (141, 142 . . . 148) on the silicon oxide film 13, a silicon oxide film (inter-polysilicon insulating film) 15 on the floating gate electrode 14 (141, 142 . . . 148), a control gate electrode 16 (161, 162 . . . 168) on the silicon oxide film 15 and a source-drain region 19 in the p well region (Cell p-well) 11-3.
Each select transistor consists of a silicon oxide film (gate insulating film) formed on the p well region 11-3, a gate electrode 14 (149, 1410) and 16 (169, 1610) on the silicon oxide film, and a source-drain region 19 in the p well region 11-3.
The structure of the select transistor is similar to that of the memory cell for the following reason. By simultaneously forming the memory cells and the select transistors through the same process, the number of process steps is intended to be reduced to thereby reduce production cost.
One source region (n+ diffused layer) 19 or one drain region (n+ diffused layer) 19 is common to adjacent two transistors among the plural transistors (memory cells and select transistors) in the NAND cell unit.
The memory cells and the select transistors are covered with a silicon oxide film (CVD oxide film) 17 formed by the CVD method. A bit line 18 connected to one end of the NAND cell unit (n+ diffused layer 19) is arranged on the CVD oxide film 17.
FIG. 6 shows the well structure of the NAND cell type EEPROM.
In the p substrate (p-sub) 11-1, a so-called double-well region, consisting of the n well region (Cell n-well) 11-2 and the p well region (Cell p-well) 11-3, an n well region (n-well) 11-4 and a p well region (p-well) 11-5.
The double-well region is formed on a memory cell array section, and the n well region 11-4 and the p well region 11-5 are formed on a peripheral circuit section.
The memory cells are formed in the p well region 11-3. The n well region 11-2 and the p well region 11-3 are set to have the same potential.
A high voltage n channel MOS transistor applied with a higher voltage than a power supply potential is formed on the p substrate (p-sub) 11-1. A low voltage p channel MOS transistor applied with the power supply voltage is formed on the n well region (n-well) 11-4 and a low voltage n channel MOS transistor applied with the power supply voltage is formed on the p well region (p-well) 11-5.
Next, the basic operation of the NAND cell type EEPROM will be described.
First, to facilitate the description, the following preconditions are specified. Two level data "0" and "1" are stored in a memory cell; a state in which the threshold voltage of the memory cell is low (e.g., the threshold voltage is negative) is a "0" state; and a state in which the threshold voltage of the memory cell is high (e.g., the threshold voltage is positive) is a "1" state.
In an ordinary two-level NAND cell type EEPROM, a state in which the threshold voltage of the memory cell is low is set at a "1" state and that in which the threshold voltage is high is set at a "0" state. However, as will be described later, the present invention is mainly intended for a multi-level (e.g., four-level) NAND type EEPROM. Considering this, it is assumed that a state in which the threshold voltage of the memory cell is low is a "0" state and that in which the threshold voltage of the memory cell is high is a "1" state.
As for the memory cell, it is assumed that the "0" state is an erase state and the "1" state is a program state. "Programming" involves "0"-programming and "1"-programming. The "0"-programming means maintaining the erase state ("0" state) and the "1"-programming means changing the "0" state to the "1" state.
Program Operation
In program operation, the potential of a bit line is set according to program data on a selected memory cell connected to the bit line. For example, if the program data is "1" ("1"-programming), the potential of the bit line is set at a ground potential (0V) Vss. If the program data is "0" ("0"-programming), the potential of the bit line is set at a power supply potential Vcc.
The potential of a select gate line SG1 at a bit line side (drain side) in a selected block, i.e., in an NAND cell unit including the selected memory cell is set at the power supply potential Vcc. The potential of a select gate line SG2 at a source line side in the selected block, i.e., in the NAND cell unit including the selected memory cell is set at the ground potential (0V) Vss.
The potentials of select gate lines SG1 and SG2 in the unselected block, i.e., in the NAND cell unit not including the selected memory cell are all set at the ground potential (0V) Vss.
In case of "1"-programming, the ground potential (0V) Vss is transmitted to the channel of the selected memory cell in the selected block. In case of "0"-programming, the channel potential of the selected memory cell in the selected block is Vcc−Vthsg (where Vthsg is the threshold voltage of the select transistor S1). Thereafter, the channel of the selected memory cell in the selected block turns into a floating state while maintaining the potential Vcc−Vthsg so as to cut off the select transistor S1 at the bit line side (drain side) in the selected block.
If the selected memory cell is not the closest to the bit line and the threshold voltage of a memory cell positioned at the bit line side with respect to the selected memory cell (or, at least one memory cell among a plurality of memory cells which exist at the bit line side with respect to the selected memory cell) is a positive voltage Vthcell, then the channel of the selected memory cell turns into a floating state while maintaining the potential Vcc−Vthcell.
Then, a program potential Vpp (e.g., about 20V) is applied to a selected word line in the selected block, i.e., to the control gate electrode of the selected memory cell. An intermediate potential Vpass (e.g., about 10V) is applied to unselected word lines in the selected block, i.e., the control gate electrodes of unselected memory cells.
At this moment, the channel potential of the selected memory cell to which "1"-programming is conducted, is the ground potential (0V) Vss. Due to this, a high voltage necessary for the "1"-programming is applied between the floating gate electrode and the channel (Cell p-well) of the memory cell and electrons move from the channel to the floating gate electrode by F-N tunnel effect. As a result, the threshold voltage of the selected memory cell rises (e.g., moves from a negative value to a positive value).
On the other hand, the channel potential of the selected memory cell to which "0"-programming is conducted, is Vcc−Vthsg or Vcc−Vthcell and the channel is in a floating state. Due to this, if either Vpp or Vpass is applied to the word line, the channel potential rises by the capacitive coupling between the control gate electrode and the channel. As a result, a high voltage necessary for "1"-programming is not applied between the floating gate electrode and the channel (Cell p-well) and the threshold voltage of the selected memory cell is kept in a present status (the memory cell is kept in an erase state).
Erase Operation
Data erase is carried out in block units and data on memory cells in a selected block are erased almost simultaneously.
Concrete erase operation will be described below.
First, the potentials of all word lines (control gate electrodes) in a selected block are set at 0V and the potentials of all word lines (control gate electrodes) of unselected blocks and all select gate lines in all blocks are set at an initial potential Va and then set in a floating state.
Thereafter, a high voltage Vpp (e.g., about 20V) is applied to the p well region (Cell p-well) and the n well region (Cell n-well) for erase operation.
At this moment, as for the memory cells in the selected block, since the potentials of the word lines (control gate electrodes) are 0V and those of the well regions are VppE, a sufficiently high voltage is applied between the control gate electrodes and the well regions for erase operation.
Accordingly, in the memory cells in the selected block, electrons in the floating gate electrodes move to the well regions and the threshold voltages of the memory cells decrease (e.g., the threshold voltages become negative) by the F-N tunnel effect.
On the other hand, the potentials of all word lines in the unselected blocks rise from the initial potential Va to VppE or a potential close to VppE by the capacitive coupling between the word lines and the well regions. Likewise, the potentials of all select gate lines in all blocks rise from the initial potential Va to VppE or a potential close to VppE by the capacitive coupling between the select gate lines and the well regions.
Accordingly, in the memory cells in the unselected blocks, a high voltage sufficient for data erase is not applied between the control gate electrodes and the well regions. That is, since electrons within the floating gate electrodes do not move, the threshold voltages of the memory cells have no change (the present state is maintained).
Read Operation
Data read is carried out by changing the potentials of bit lines according to memory cell data and by detecting the potential change.
First, a bit line (or part of bit lines if all bit lines or a bit line shield read method or the like is adopted) to which a memory cell which data is to be read is connected, is precharged, the potential of the bit line is set at a precharge potential, e.g., the power supply potential Vcc and the bit line is then turned into a floating state.
Thereafter, the potential of the selected word line, i.e., the potential of the control gate electrode of the selected memory cell is set at 0V, those of unselected word lines (or the control gates of unselected memory cells) and of the select gate lines are set at the power supply potential Vcc (e.g., about 3V), and those of the source lines are set at 0V.
At this time, if selected memory cell data is "1" (the threshold voltage Vth of the memory cell satisfies Vth>0), the selected memory cell is turned off and the potential of the bit line to which this memory cell is connected is, therefore, kept a precharge potential (e.g., the power supply potential Vcc).
On the other hand, if the selected memory cell data is "0" (the threshold potential Vth of the memory cell satisfies Vth<0), the selected memory cell is turned on. As a result, the charges of the bit line to which the selected memory cell is connected are discharged and the potential of the bit line decreases from the precharge potential by ΔV.
In this way, the potential of the bit line changes according to the memory cell data. Thus, if this change is detected by a sense amplifier circuit, the memory cell data can be read.
Meanwhile, so-called multi-level NAND cell type EEPROMs have been developed and put to practical use with a view of increasing one-chip memory capacity and reducing cost per bit.
In case of the above-stated NAND cell type EEPROM, binary (one-bit) data ("0", "1") can be stored in a memory cell. An n-level NAND cell type EEPROM, where n is a natural number of not lower than 3 is, by contrast, characterized in that n-level data can be stored in a memory cell.
In case of an four-level NAND cell type EEPROM, for example, four-level (2-bit) data ("00", "01", "10", "11") can be stored in a memory cell.
The prior art multi-level NAND cell type EEPROM is described in, for example, Reference 1 (Japanese Patent Application No. 8-98627).
Normally, in the n-level NAND cell type EEPROM, a plurality of latch circuits are provided per bit line connected to a selected memory cell. Namely, if n-level data are programmed into or read from a selected memory cell, the plural latch circuits function to temporarily store the n-level data.
As described in Reference 1, for example, in the four-level NAND cell type EEPROM, two latch circuits corresponding to one bit line connected to a selected memory cell are provided so as to temporarily store four-level (two-bit) data during program or read operation.
However, as shown, for example, in FIG. 7, each latch circuit consists of SRAM (static RAM) cells. Further, the latch circuit consisting of the SRAM cells is large in area. In addition, if the quantity of data stored in one memory cell increases (the value of n is higher), the number of latch circuits provided per bit line connected to the selected memory cell increases, as well.
In case of the four (=22)-level NAND cell type EEPROM, for example, two latch circuits are provided per bit line connected to a selected memory cell. In an eight (=23)-level NAND cell type EEPROM, three latch circuits are provided per bit line connected to a selected memory cell.
Accordingly, if data stored in the memory cell are multi-level (n-level) data and the number of n increases, the number of latch circuits (SRAM cells) on a memory chip increases and the area of the chip disadvantageously increases.

Nonvolatile semiconductor memory having plural data storage portions for a bit line connected to memory cells


A testing apparatus for fixing and testing a LCD panel includes a location frame and an adjustable base for fixing a camera set. The location frame and the adjustable base are connected together via a holder set. The adjustable base is able to be adjusted a distance between the location frame on the holder set. The location frame includes a framework set with adjustable plates on the edges of the backside of the framework. The adjustable plates are adjusted according to different sizes of the LCD panels for placing LCD panels with different sizes. The LCD panel is supported by top-supporting devices on the backside of the framework and located at the backside of the framework. Each edge of the framework is set with a movable shade which is adjusted according to different sizes of the LCD panels for shading metal rims of the LCD panel. When the camera set takes pictures of the LCD panel, the boundaries of the screen area and the rims are clearly defined to make the testing module accurately test the defects of the LCD panel and to improve testing quality.

1. Field of the Invention
The present invention relates to a testing apparatus for fixing and testing a LCD panel. More particularly, the present invention relates to a testing apparatus that is configured to fix the LCD panel onto a location frame, thus a camera can take identical size of image from time to time for quality comparison process executed by a testing module.
2. Descriptions of the Related Art
Generally, manufactured LCD panels comprise good products and bad products. To avoid the bad products from getting into the market and influence reputation of the manufacturer, quality-control people of the manufacturer screen out the bad LCD panels. Thus, the quality-control people play important role in manufacturing process.
Generally, during testing process, the quality-control people do things wrong as the following ways:
1. The quality-control people hold the LCD panel by hands, and check the defects of the LCD panel by eyes contact; therefore, asthenopia after a long time checking would result in inefficient quality control that influences quality of products.
2. Fine defects are not easy to be screened out by eyes contact, which results in high error testing result.
Thus it can be seen that the aforementioned modes still have many drawbacks and are not good in design, thus the aforementioned products need improvement.
The inventor considers improvement in view of the aforementioned drawbacks of the conventional testing methods, and develops the present invention of testing apparatus for fixing and testing a LCD panel after a long term of research.

Testing apparatus for fixing and testing a LCD panel


A scroll-type refrigerant compressor for use in a conventional refrigerating circuit and having liquid refrigerant compressor cooling provided by the injection of liquid refrigerant into an intermediate biasing chamber and/or specifically located bleed holes.

This invention relates generally to scroll type compressors and more specifically to a scroll type compressor having provision for the injection of liquid refrigerant at an intermediate stage of the compression cycle to thereby reduce overheating.
Scroll compressors are known to be extremely efficient, reliable and quiet in applications for the compression of refrigerant. However, like all compressors, they are subject to overheating during certain high load situations.
In the normal refrigeration cycle, vapor is drawn into a compressor where it is compressed to a higher pressure. The compressed vapor is cooled and condensed in a condenser into a high pressure liquid which is then expanded, typically through an expansion valve, to a lower pressure and caused to evaporate in an evaporator to thereby draw in heat and thus provide the desired cooling effect. The expanded, relatively low pressure vapor exiting the evaporator is once again drawn into the compressor and the cycle starts anew. The action of compressing the vapor imparts work onto the vapor and results in a significant increase in the vapor temperature. While a substantial portion of this heat is subsequently rejected to the atmosphere during the condensation process, a portion of the heat is transferred to the compressor components. Depending upon the specific refrigerant vapor compressed and on the pressure conditions of operation, this heat transfer can cause the temperature of the compressor components to rise to levels which may cause the compressor to overheat, resulting in degradation of the compressor performance and lubrication and possible damage to the compressor.
In order to overcome overheating problems, various methods have been developed for injecting gaseous or liquid refrigerant under pressure into the suction inlet of a compressor where it expands and cools the inlet vapor and the compression chamber. Two such system are disclosed and described in detail in commonly assigned U.S. Pat. Nos. 5,076,067 and 4,974,427 the disclosures of which are hereby expressly incorporated herein by reference. However, injecting refrigerant into the inlet port of the compressor suffers the disadvantage that it reduces the compressor efficiency by reducing the net amount of refrigerant drawn into the compressor on the suction side of the refrigeration circuit. In order to minimize this reduction in efficiency, systems have been developed using thermostats or other thermal transducer circuits incorporating valve means to limit the injection of refrigerant to only those times when the compressor temperature rises to a certain preset temperature, such as occurring under abnormally high load situations. Other methods of controlling the amount of liquid injection include providing capillary tubes or thermal expansion valves. While these devices are simple and relatively low cost, they are known to leak excess refrigerant from the high pressure discharge side into the relatively low pressure suction side of the compressor, thus potentially increasing flooding problems. Additionally, when the compressor is deactivated, high pressure refrigerant can further migrate through these devices to the normally low pressure Inlet of the compressor, thus increasing the chance of starting problems.
Another known system reduces discharge temperature by injecting liquid refrigerant directly into the pumping chamber at an intermediate pressure point therein. The disadvantage of such a system is that it requires very accurate, repeatable and long life thermostatic devices, as well as reliable, long life control valves. Substantial extra machining is also required.
The present invention overcomes the aforesaid disadvantages of prior liquid injection systems by providing a system which is self-regulating and therefore eliminates the complexity introduced by thermostat control systems and which provide for the injection of liquid refrigerant into an existing chamber in many scroll machines which is always adjacent to and in fluid communication with an intermediate stage of the compressor; i.e. the intermediate axial biasing chamber for enhancing scroll tip sealing. In addition, a restriction is provided to reduce the pressure of the injected liquid to approximately that of the intermediate stage of the compressor. In this arrangement, the increase or decrease in pressure at the intermediate stage of the compressor in response to increase or decrease of suction pressure, and hence the pressure differential across the compressor, acts to automatically regulate the amount of liquid refrigerant injected, thus providing enough liquid to cool the compressor without causing flooding. Further, the present invention provides for an optional simple valve actuated in response to operation of the compressor to prevent migration of fluid into the compressor when it is not operating. The present invention also contemplates the use of bleed hole pairs (symmetrical or preferably non-symmetrical) for the injection of liquid refrigerant, without any type of intermediate pressure axial biasing. The term "liquid injection" is used herein to denote that it is liquid refrigerant which is taken from downstream of the condenser, but in reality a small portion of this liquid is vaporized as it flows to and into the compressor so that it is a two phase (liquid and vapor) fluid which is actually injected into the compressor. This is to be distinguished from vapor injection systems where pure vapor is taken from a heat exchanger or subcooler and is introduced into the compressor at an intermediate pressure.
Theoretically, there is no thermodynamic advantage (or penalty) to be derived from the use of liquid injection into an intermediate pressure-compression chamber for the purpose of discharge gas cooling. On the other hand, because a real system is not perfect in the theoretical sense, it has been observed that some heat transfer inefficiencies are in fact reduced in the compressor super heat process by the injection of liquid refrigerant, and as a consequence efficiency increases of 2 to 4 percent can be realized.
The present invention is uniquely adaptable to provide cooling by injecting liquid refrigerant into intermediate axial pressure biasing chambers on either the non-orbiting scroll side or the orbiting scroll side of the compressor, and/or through unequally located bleed holes.
Additional advantages and features of the present invention will become apparent from the subsequent description and the appended claims taken in conjunction with the accompanying drawings.