An improved pot and pan washing machine is provided including a low suction intake manifold and a partition for capturing a substantial portion of the wash action of the washing machine within a segregated area. The intake manifold of the instant invention includes a plurality of voids having a void concentration that increases as the distance from the source of suction (such as a pump or intake inlet) increases. The partition (or divider) of the instant invention can be removed and repositioned within the wash tank through the use of channels along the walls of the wash tank that receive the partition.

Pot and pan washing machines, of the type used in restaurants, institutions and other eating facilities often involve a large wash tank or basin in which water is circulated about the pots and pans to provide a washing action. One such machine is described in U.S. Pat. No. 4,773,436 issued to Cantrell et al., the specification of which is incorporated herein by reference. The machine of Cantrell includes a wash tank with multiple jets evenly spaced apart at an elevated position along the rear wall of the wash tank. The tank is filled with water to a level above the position of the jets. Pots and pans are placed in the wash tank, and a pump is activated to draw water from within the wash tank and direct it through the jets to create a jet stream. Each jet directs its jet stream toward the bottom wall of the wash tank, the bottom wall then deflects the jet stream upward and towards the front wall of the tank. The front wall then deflects the upward moving jet stream towards the rear wall of the tank, and the rear wall deflects the jet stream downward and back towards the front wall along the bottom wall. The combination of deflections of the jet stream from the bottom, front and rear walls provides a rolling washing action within the wash tank.
The basic components of the wash tank of the pot and pan washing machine of the prior art are shown in FIG. 1. Wash tank 10 includes end walls 12 and 14, rear side wall 16, front side wall 18 and bottom wall 19. A pump can be attached to either end wall; in the embodiment shown in FIG. 1, pump 50 is attached to right end wall 14. An impeller located within pump 50 is driven by electric motor 56. The impeller draws fluid into pump inlet 52 through an intake port (not shown) located in end wall 14. The fluid is then discharged from the pump through pump outlet 54 and into outlet manifold 60. Outlet manifold 60 includes a ninety degree turn, and several other turns, to direct the fluid across the back side of rear wall 16 and out jet nozzles 20 which are protruding through and extending from rear wall 16. The intake port associated with pump inlet 52 is covered by perforated intake manifold 30. Intake manifold 30 includes handle 36 and is removably supported within wash tank 10 for easy cleaning. Intake manifold 30 fits tightly between outer runner 32 and inner runner 34, each of which extends vertically from bottom wall 19. Heating element 40 is positioned between intake manifold 30 and end wall 14 for its protection and to maximize the use of space.
Although the prior art pot and pan washing machine disclosed in U.S. Pat. No. 4,773,436 provides an exceptional wash action, many of the components discussed above hinder the overall efficiency and performance of the machine. The inventions disclosed in co-pending U.S. application Ser. No. 09/947,484 provide components that greatly increase the overall efficiency and performance of the machine, including an improved intake manifold positioned along the rear wall of the machine as shown in FIG. 2. The invention disclosed in U.S. application Ser. No. 09/947,484 provides a scaleable, self-cleaning intake manifold that has a generally linear intake path. Nevertheless, the improved intake manifold itself has several disadvantages that result in a reduction of efficiency and performance.
The main problem with the prior art pump intakes in a pot washing system is that a fluid will take the path of least resistance to the inlet of the pump. Therefore, the volume of fluid nearest the pump intake will be pulled in at a much greater rate than the volume farthest away from the intake. This "sucking" action creates problems in pot and pan washing systems as it will eventually draw the wares toward the intake-end of the wash sink (a phenomenon called "pan migration") where they can potentially "pile up", blocking the inlet manifold and starving the pump by restricting the fluid flow to the inlet. This occurs on all existing pot and pan washing systems, including systems utilizing linear intake manifold 130 shown in FIG. 2, which includes holes evenly spaced across the entire surface of the intake manifold. In the case of intake manifold 130 the even spacing of holes result in over 90% of the fluid transfer from the sink to pump 150 takes place in the first 50% of the intake, creating a large vacuum due to the suction of the water through holes in the intake. In addition, the fluid entering pump 150 is fairly turbulent as the path of most of the fluid must turn a sharp angle (generally ninety degrees) almost immediately from the point in which the fluid enters intake manifold 130 to the point in which the fluid enters pump 150. This too reducing the efficiency and performance of pump 150.
In order to provide the most efficient wash action within the entire volume of the wash sink it is desirable to develop a pump intake manifold that will introduce fluid to the pump inlet in such a way as to minimize the vacuum effect of the pump (as it draws in the fluid) and to minimize the turbulence of the fluid prior to reaching the pump inlet.
Although a machine that employs a wash tank and jet stream of the type described above is extremely useful for washing pots and pans, it is less desirable for washing smaller items such as utensils. In addition, it is difficult to separate items that require different levels of cleansing within the single wash tank of the above-described washing machine. In an attempt to provide a segregated wash area for items such as utensils, utensil baskets are often located within the wash tank. The invention disclosed in U.S. application Ser. No. 09/947,485 provides a powered utensil basket that captures a jet stream from the washing machine in which the basket is located to maintain the washing action of the machine within the basket. Although the powered utensil basket does provide a segregated washing area for utensils and other items that is removable from the washing machine, the basket itself is rather bulky and often not utilized in operation. Therefore, it is desirable to provide a segregated washing area within a wash tank that does not require the placement of a bulky utensil basket in the wash tank, while at the same time maintaining the wash action of the machine.

Pot and pan washing machine, components, and methods of washing items


Methods of treating viral disorders are disclosed.

Viral diseases are an increasing worldwide health concern.
HIV infection has been implicated as the primary cause of acquired immune deficiency syndrome (AIDS). Barre-Sinoussi et al. (1983) Science 220:868-870; and Gallo et al. (1984) Science 224:500-503. Infection of the CD4+ subclass of T-lymphocytes with the HIV-1 virus leads to depletion of this essential lymphocyte subclass which inevitably leads to opportunistic infections, neurological disease, neoplastic growth and eventually death. Anti-retroviral drugs, such as reverse transcriptase inhibitors, viral protease inhibitors, and viral entry inhibitors, have been used to treat HIV infection (Caliendo et al. (1994) Clin. Infect. Dis. 18:516-524). More recently, treatment with combinations of these agents, known as highly active antiretroviral therapy (HAART), has been used to suppress replication of HIV (Gulick et al. (1997) N. Engl. J. Med. 337:734-9 (see comments); Hammer et al. (1997) N. Engl. S. Med. 337:725-733). Viral hepatitis is a cause of considerable morbidity and mortality in the human population, both from acute infection and chronic sequelae which include, in the case of hepatitis B, C and D, chronic active hepatitis and cirrhosis. Promising classes of treatment agents for hepatitis include interferons (hepatitis B) and protease inhibitors (hepatitis C).


A process and a device for controlling an internal combustion engine, in particular for influencing the time of fuel injection into an internal combustion engine, influences a system deviation, which is computed from a setpoint and an actual value. From the system deviation, a controller defines a manipulated variable to be supplied to the actuator. When a set of first operating states is present, a first controller structure is active, and when a set of second operating states is present, a second controller structure is active. At the time of passage from the first controller structure to the second controller structure, an initial value is set for the second controller structure as a function of at least the setpoint and the actual value.

German Patent Application No. 34 00 711 (corresponding to U.S. Pat. No. 4,638,782) describes a process and a device for open and/or closed-loop control of an actuator, in particular for influencing fuel delivery in an internal combustion engine. A system deviation is determined from a setpoint and an actual value. From the system deviation, a controller defines a manipulated variable to be supplied to an actuator. At high engine speeds, control with this device is preferably performed using a controller with PI action. In other operating states (i.e., at low engine speeds) the actuator is only controlled using open-loop control.
In order for such controllers to satisfy the high requirements, in particular regarding dynamics, complex control circuit structures are needed. One possible way to meet those requirements is a use of variable-structure controllers which, under certain conditions, can be toggled between different controller structures. Thus, the controller may be able to, switch back and forth between a PI controller and a proportional (or a pure) open-circuit controller.
The switching action is problematic in the prior art. When switching from one controller structure to another controller structure, undesirable transient phenomena often occur. If a proportional control with a high gain used as a large-signal controller is switched to a PI controller used as a small-signal controller, I component must be suitably preset to avoid undesirable controller characteristics, i.e., oscillations.

Process and device for controlling an internal combustion engine


The subject invention provides a method for purifying a target protein from a mixture comprising the target protein and contaminating protein, comprising the steps of exposing the mixture to an effective amount of a cationic surfactant such that the contaminating protein is preferentially precipitated and recovering the target protein. Proteins purified according to the method of the invention are also provided.

Production of biological macromolecules, particularly proteins, often involves purity-enhancing steps based on physical and physicochemical properties. Difficulties encountered in such process steps include, but are not limited to, determining conditions which enable separation of soluble and insoluble molecules, relatively low recovery of the desired molecule after a treatment step, loss of biological activity in the course of the process, and sensitivity of the protein to process step conditions such as pH.
Surfactants have been utilized in the processing of biological macromolecules. Cationic surfactants are a recognized subclass of surfactants, and include amphipathic ammonium compounds. Amphipathic ammonium compounds comprise quaternary ammonium compounds of the general formula QN+ and paraffin chain primary ammonium compounds of the general formula RNH3+. Both types of amphipathic ammonium compounds include long-chain ammonium surfactants that have a long aliphatic chain of preferably at least six carbon atoms (Scott (1960) Methods Biochem. Anal. 8:145-197, incorporated herein by reference in its entirety). The long-chain quaternary ammonium surfactants are known to interact with biological macromolecules. The long-chain quaternary ammonium compounds have at least one substituent at the nitrogen which consists of a linear alkyl chain with 6-20 carbon atoms. The best known representatives of this class are the benzalkonium salts (chlorides and bromides), hexadecylpyridinium chloride dequalinium acetate, cetyldimethylammonium bromide (CTAB) and hexadecylpyridinium chloride (CPCl), and benzethonium chloride. Quaternary ammonium surfactants include salts such as cetyl pyridinium salts, e.g. cetyl pyridinium chloride (CPC), stearamide-methylpyridinium salts, lauryl pyridinium salts, cetyl quinolynium salts, lauryl aminopropionic acid methyl ester salts, lauryl amino propionic acid metal salts, lauryl dimethyl betaine stearyl dimethyl betaine, lauryl dihydroxyethyl betaine and benzethonium salts. Alkyl pyridinium salts comprise stearyl-trimethyl ammonium salts, alkyl-dimethylbenzyl-ammonium chloride, and dichloro-benzyldimethyl-alkylammonium chloride.
Known uses of cationic surfactants for purifying biological macromolecules include 1) solubilization of aggregates, including protein aggregates; 2) elution of chromatographic column-bound biological macromolecules; and 3) precipitation of polyanions such as hyaluronic acid (HA), nucleic acids, and heparin (and molecules which co-precipitate with polyanions).
Cationic surfactants have been used for solubilizing protein aggregates. Otta and Bertini ((1975) Acta Physiol. Latinoam. 25:451-457, incorporated herein by reference in its entirety) demonstrated that active uricase could be solubilized from rodent liver peroxizomes with the quaternary ammonium surfactant, Hyamine 2389. It is found that increase of the ammonium surfactant concentration resulted in increase of dissolution of both uricase (based on enzymatic activity) and total protein such that there is no increase in the relative amount of uricase protein with respect to the amount of total protein. In other words, there was no selective solubilization of the uricase protein with respect to the total protein, and the uricase protein did not constitute a higher percentage of the total protein upon solubilization with the cationic surfactant. Thus, in this process, uricase purity with respect to the total protein content is apparently not enhanced as a result of quaternary ammonium surfactant solubilization.
In another study, Truscoe ((1967) Enzymologia 33:1 19-32, incorporated herein by reference in its entirety) examined a panel of cationic, anionic, and neutral detergents for their extraction efficacy of urate oxidase (uricase) from ox kidney powders. While the neutral and anionic detergents were found to enhance soluble urate oxidase activity, the cationic detergents, e.g., quaternary ammonium salts, were found to decrease total enzymatic activity with increasing concentration. The authors concluded that cationic detergents were not useful for purifying ox kidney urate oxidase
Solubilization of recombinant proteins, porcine growth hormone, methionyl-porcine growth hormone, infectious bursal disease virus protein, B-galactosidase fusion protein, from E. coli inclusion bodies or cells, with cationic surfactants is described in U.S. Pat. No. 4,797,474, U.S. Pat. No. 4,992,531, U.S. Pat. No. 4,966,963, and U.S. Pat. No. 5,008,377, each incorporated herein by reference in its entirety. Solubilization under alkaline conditions is accomplished using quaternary ammonium compounds including cetyltrimethylammonium chloride, mixed n-alkyl dimethyl benzylammonium chloride, CPC, N,N-dimethyl-N-[2-[2-[4-(1,1,3,3,-tetramethylbutyl)-phenoxy]ethoxy]ethyl]benzenemethanammonium chloride, tetradecyl trimethylammonium bromide, dodecyl trimethylammonium bromide, cetyl trimethylammonium bromide. These publications mention that, after each solubilization process, the solutions are centrifuged, and little to no pellet is observed in each case. This observation suggests that most or all of the proteins are solubilized without regard to selectivity for the solubilization of a target protein. The purity of the recovered proteins is not indicated. U.S. Pat. No. 5,929,231, incorporated herein by reference in its entirety, describes cetyl pyridinium chloride (CPC) disintegration of granules and aggregates containing starches. Thus, the prior art relates to use of cationic surfactants for general, nonspecific solubilization of particulate biological macromolecules. These methods of the prior art do not disclose increasing the purity of a desired target protein with respect to total protein with a cationic surfactant.
Cationic surfactants have also been used to elute biological macromolecules adsorbed to cation exchange resins or aluminum-containing adjuvants (Antonopoulos, et al. (1961) Biochim. Biophys. Acta 54:213-226; Embery (1976) J. Biol. Buccale 4:229-236; and Rinella, et al. (1998) J. Colloid Interface Sci. 197:48-56, each of which is incorporated herein by reference in its entirety). U.S. Pat. No. 4,169,764, incorporated herein by reference in its entirety, describes elution of urokinase from carboxymethyl cellulose columns using a wide variety of cationic surfactant solutions. The authors state a preference for using tetra substituted ammonium salts in which one alkyl group is a higher alkyl group up to 20 carbon atoms and the others are lower alkyl groups up to 6 carbon atoms. Use of such cationic surfactants enables removal of biological macromolecules from their attachment to a solid matrix.
Conversely, impregnation of filters such as those composed of nylon, with cationic surfactant enables immobilizing of polysaccharides or nucleic acids (Maccari and Volpi (2002) Electrophoresis 23:3270-3277; Benitz, et al. (1990) U.S. Pat. No. 4,945,086; Macfarlane (1991) U.S. Pat. No. 5,010,183, each of which is incorporated herein by reference in its entirety). This phenomenon is apparently due to cationic surfactant-polyanion interactions which enable precipitation of the polyanion.
It is well established that amphipathic ammonium compounds, which comprise quaternary ammonium compounds of the general formula QN+ and paraffin chain primary ammonium compounds of the general formula RNH3+, can precipitate polyanions under defined conditions (reviewed in Scott (1955) Biochim. Biophys. Acta 18:428-429; Scott (1960) Methods Biochem. Anal. 8:145-197; Laurent, et al., (1960) Biochim. Biophys. Acta 42:476-485; Scott (1961) Biochem. J. 81:418-424; Pearce and Mathieson (1967) Can. J. Biochemistry 45:1565-1576; Lee (1973) Fukushima J. Med. Sci. 19:33-39; Balazs, (1979) U.S. Pat. No. 4,141,973; Takemoto, et al., (1982) U.S. Pat. No. 4,312,979; Rosenberg (1981) U.S. Pat. No. 4,301,153; Takemoto, et al., (1984) U.S. Pat. No. 4,425,431; d'Hinterland, et al., (1984) U.S. Pat. No. 4,460,575; Kozma, et al. (2000) Mol. Cell. Biochem. 203:103-112, each of which is incorporated herein by reference in its entirety). This precipitation is dependent on the precipitating species having a high polyanion charge density and high molecular weight (Saito (1955) Kolloid-Z 143:66, incorporated herein by reference in its entirety). The presence of salts can interfere with or reverse cationic surfactant-induced precipitation of polyanions.
Additionally, polyanions can be differentially precipitated from solutions containing protein contaminants, under alkaline pH conditions. In such cases, proteins not chemically bound to the polyanions will remain in solution, while the polyanions and other molecules bound to the polyanions will precipitate. For example, precipitation of polyanions such as polysaccharides and nucleic acids is accompanied by co-precipitation of molecules such as proteoglycans and proteins interacting with the polyanions (Blumberg and Ogston (1958) Biochem. J. 68:183-188; Matsumura, et al., (1963) Biochim. Biophys. Acta 69: 574-576; Serafini-Fracassini, et al. (1967) Biochem. J. 105:569-575; Smith, et al. (1984) J. Biol. Chem. 259:11046-11051; Fuks and Vlodavsky (1994) U.S. Pat. No. 5,362,641; Hascall and Heinegard (1974) J. Biol. Chem. 249:4232-4241, 4242-4249, and 4250-4256; Heinegard and Hascall (1974) Arch. Biochem. Biophys. 165: 427-441; Moreno, et al. (1988) U.S. Pat. No. 4,753,796; Lee, et al. (1992) J. Cell Biol. 116: 545-557; Varelas, et al. (1995) Arch. Biochem. Biophys. 321: 21-30, each of which is incorporated herein by reference in its entirety).
The isoelectric point (or pI) of a protein is the pH at which the protein has an equal number of positive and negative charges. Under solution conditions with pH values close to (especially below) a protein's isoelectric point, proteins can form stable salts with strongly acidic polyanions such as heparin. Under conditions which promote precipitation of such polyanions, the proteins complexed with the polyanions also precipitate (L B Jaques (1943) Biochem. J. 37:189-195; A S Jones (1953) Biochim. Biophys. Acta 10:607-612; J E Scott (1955) Chem and Ind 168-169; U.S. Pat. No. 3,931,399 (Bohn, et al., 1976) and U.S. Pat. No. 4,297,344 (Schwinn, et al., 1981), each of which is incorporated herein by reference in its entirety).
U.S. Pat. No. 4,421,650, U.S. Pat. No. 5,633,227, and Smith, et al. ((1984) J. Biol. Chem. 259:11046-11051, each of which is incorporated herein by reference in its entirety) describe purification of polyanions by sequential treatment with a cationic surfactant and ammonium sulfate (that enables dissociation of polyanion-cationic surfactant complexes) and subsequent separation using hydrophobic interactions chromatography. European patent publication EP055188, incorporated herein by reference in its entirety, describes cationic surfactant-enabled separation of RTX toxin from lipopolysaccharide. However, there is no mass balance in the amount of lipopolysaccharide that is quantified by endotoxin activity assays. Neutralization of endotoxin activity by strongly interacting cationic compounds has been demonstrated (Cooper J F (1990) J Parenter Sci Technol 44:13-5, incorporated herein by reference in its entirety). Thus, in EP055188, the lack of endotoxin activity in the precipitate following treatment with increasing amounts of cationic surfactant possibly results from neutralization of the activity by surfactant-lipopolysaccharide complex formation.
The above-mentioned methods require intermediary polyanions, solid supports or aggregates comprising proteins with selective solubility by a cationic surfactant for enabling purification of soluble proteins using cationic surfactant. Hence, the prior art does not provide a method of purifying a target protein by contacting the protein with a cationic surfactant in an amount effective to preferentially precipitate proteins other than the target protein, i.e., contaminating proteins, particularly when such contacting is done in the absence of intermediary polyanions, solid supports, or aggregates of proteins. Often, one skilled in the art encounters mixtures of soluble proteins and does not have a simple, efficient means for purifying the desired protein. The novel method for purifying proteins, described herein, enables efficient purification of target proteins by using cationic surfactants to preferentially precipitate proteins other than the target protein. Preferably such precipitation of contaminating proteins is direct, and does not depend upon the presence of polyanions, solid supports or aggregates comprising the contaminating proteins and other molecules.

Purification of proteins with cationic surfactant


A portable electrical energy source includes a portable housing having an outer surface and defining an interior space. A direct current battery is disposed in the interior space. A direct current socket is supported on the housing and electrically coupled to the battery for supplying direct current from the battery to a device outside the housing. An inverter is provided for converting direct current into alternating current and includes an electrical lead have a male plug adapted for being electrically connected to the battery via the direct current socket and an electrical outlet for supplying alternating electrical current to a device outside the housing. The inverter is removably attached to the outer surface of the housing so that the inverter can be ported together with the battery inside the housing and selectively separated from the housing and used independently of the battery in the housing.

The invention relates to a portable electrical energy source.
Portable electrical energy sources are known for providing direct current for jump starting an automobile, boat or other vehicle as well as for providing direct current for energizing various appliances. For example, a jump start system providing a 12-volt, 400 ampere power supply is manufactured and distributed by Vector Manufacturing, Ltd., of Hollywood, Fla. under the trade name PRO-CHARGE-900. In this jump start system, a heavy-duty 12-volt battery is arranged inside an impact-resistant polyethylene case. Heavy duty No. 4 industrial booster cables attached to the battery extend through the case and are attached to heavy duty 400 amp booster clamps which, when not in use, can rest on shoulders molded on the case. Dc appliances may be plugged into a DC outlet socket mounted in the casing and coupled to the battery. The jump start battery can be charged by a car battery via a DC/DC power cord provided with a male plug adapted to be inserted into the cigarette lighter of an automobile. The jump start battery may also be charged via an appropriate AC adapter/charger.
Power inverters are known which convert direct current into alternating current. For example, Vector Manufacturing, Ltd. also manufactures and distributes a self-contained power inverter under the trade name POWER FORCE 140 which plugs directly into a cigarette lighter socket or other 12-volt power source for converting 12-volt direct current energy to 110-volt alternating current. The PRO-CHARGE-900 jump start system also includes a cigarette lighter socket so that a power inverter such as the POWER FORCE 140 may be plugged into the jump start system. In such a configuration, the jump start system can provide either 12-volt direct current or 110-volt alternating current. A disadvantage of this configuration is that by having two separate components, they are separately portable and both may not be readily at hand when it is desired to use them together to furnish DC power to the inverter to produce alternating electrical power.
Jump start systems are known wherein a power inverter is included within the impact resistant casing along with the 12-volt battery to provide a portable jump start system which provides both a 12-volt direct current power supply and a 110-volt alternating current supply. While the integration of the power inverter along with the 12-volt battery inside the impact resistant casing has the advantage of providing a portable electrical power source that provides both AC and DC electrical energy, it is a disadvantage that the power inverter cannot be separated from the jump start system and used independently. For example, it would be desirable if the inverter of the portable jump start system could be plugged into the cigarette lighter socket of an automobile to produce alternating current off the automobile battery.


Monoclonal antibodies which specifically bind human CD23, the low affinity receptor for IgE (FceRII/CD23), and contain either a human gamma-1 or human gamma-3 constant domain, are disclosed. The antibodies are useful for modulating or inhibiting induced IgE expression. Accordingly, they have practical utility in the treatment or prophylaxis of disease conditions wherein inhibition of induced IgE production is therapeutically desirable, including allergic conditions, autoimmune diseases and inflammatory diseases.

IgE is a member of the immunoglobulin family that mediates allergic responses such as asthma, food allergies, type 1 hypersensitivity and the familiar sinus inflammation allergic rhinitis and conjunctivitis, and as a result, causes widespread suffering throughout the general population. IgE is secreted by, and expressed on the surface of, B-cells. IgE synthesized by B-cells can be anchored in the B-cell membrane by a short transmembrane domain linked to the mature IgE sequence. Membrane and secreted versions of IgE are formed in the same cell by differential splicing of the IgE RNA transcript.
IgE also can be bound to B-cells (and T cells, monocytes, Langerhans cells, follicular dendritic cells, natural killer cells, eosinophils and platelets) through its Fc region to a low affinity IgE receptor (FceRII, hereafter "FCEL", and to mast cells and basophils through its Fc region to a high affinity IgE receptor FceRI, (hereinafter "FCEH"). The low affinity IgE receptor is generally referred to in the literature as CD23.
Upon exposure of a mammal to an allergen, antigen presenting cells process the antigen for presentation to helper T cells. These helper T cells secrete cytokines such as IL-4 which assist B-cells to undergo clonal amplification and secrete more allergen-specific IgE. This newly synthesized IgE in turn is released into the circulation where it binds to mast cells and basophils through the high affinity receptor on their cell surface. Such mast cells and basophils are thereby sensitized to the specific allergen. The next exposure to the same allergen causes binding to specific IgE on the surface of mast cells, and basophils, thereby cross-linking the FceRI on these cells and thus activating their release of histamine and other factors which are responsible for clinical hypersensitivity and anaphylaxis.
The art has reported antibodies capable of binding to FCEL (CD23)-bound IgE but not IgE bound to FCEH (see, for example, WO 89/00138 and U.S. Pat. No. 4,940,782). These antibodies are disclosed to be clinically advantageous because they bind to IgE which is bound to the low affinity receptor (FCEL) or to circulating IgE's, but do not bind to IgE bound to the high affinity receptor (FCEH). Therefore, these antibodies will not activate mast cells or basophils.
Moreover, anti-CD23 antibodies have been reported to have potential as therapeutics, e.g., for the treatment of allergic disorders, inflammatory diseases, and autoimmune diseases. For example, Bonnefoy et al., WO 9612741, report that ligands which bind CD23, e.g., monoclonal antibodies, are useful in the treatment or prophylaxis of inflammatory, autoimmune and allergic diseases.
The usage of monoclonal antibodies to CD23, as both IgE agonists and antagonists has been reported. IgE antagonists have been reported to have potential utility in treatment of conditions or diseases wherein IgE suppression is therapeutically desirable, e.g., allergic conditions such as allergic rhinitis and conjuntivitis, atopic dermatitis and asthma. For example, Bonnefoy et al., WO 8707302 (1987), report monoclonal antibodies to human CD23, which are assertedly useful for assaying the presence of IgE receptors on cell types and as therapeutics in diseases wherein modulation of IgE is therapeutically desirable.
In part because of their potential as therapeutics and diagnostics, many groups have reported the generation of monoclonal antibodies to CD23. See, e.g., Rector et al., Immunol., 55:481–488 (1985); Suemura et al., J. Immunol., 137:1214–1220 (1986); Noro et al., J. Immunol., 137:1258–1263 (1986); Bonnefoy et al., J. Immunol., 138:2970–2978 (1987); Flores-Romo et al., Science, 261:1038–1046 (1993); Sherr et al.; J. Immunol., 142:481–489 (1989); and Pene et al., Proc. Natl. Acad. Sci., USA, 85:6880–6884 (1988). Moreover, as discussed supra, the usage of such antibodies specifically to inhibit IgE production in systems where IgE synthesis is cytokine (IL-4) induced has also been reported. (Flores-Romo et al (Id.); Sherr et al. (Id.); Bonnefoy et al. (WO 8707302); Bonnefoy et al. (WO 8707302); Bonnefoy et al. (WO 9612741)); Bonnefoy et al., Eur. J. Immunol 20:139–144 (1990); Sarfati et al., J. Immunol 141:2195–2199 (1988) and Wakai et al., Hybridoma 12:25–43 (1993). Also, Flores-Romo et al. (Id.) disclose that Fabs prepared from anti-CD23 antibodies inhibit antigen-specific induced IgE responses in vivo in the rat. However, notwithstanding what has been reported, the mechanism by which anti-CD23 antibodies modulate IgE expression and in particular, the manner by which they block IL-4 induced IgE production remains unclear.
It has been suggested that anti-CD23 antibodies inhibit IgE production by signaling through CD23 present on the surface of IgE secreting B cells. It has been proposed that the function of CD23, which is upregulated on IgE secreting B cells, is feedback inhibition of IgE production (Yu, et al. Nature 369, 753–756 (1994)). This has been theorized because mice in which the CD23 gene has been removed have increased and sustained IgE production compared to controls (Yu, et al.). In addition, it has been reported that binding to CD23 by IgE complexes or by a monoclonal antibody to anti-CD23 suppresses ongoing IgE synthesis by a lymphoblastoid cell line that constitutively secretes IgE (Sherr et al. (Id.)). It appears that this is due to down regulation of the messenger RNA for the secreted IgE heavy chain in this cell (Saxon et al., J. Immunol., 147:4000–4006 (1991)). However, the exact mechanism by which IgE expression is inhibited has yet to be explained in systems in which IgE secretion is IL-4 induced.
It has also been reported that crosslinking of Fc gamma RII with surface Ig (B cell receptor) on B cells leads to down regulation of Ig expression. (D'Ambrosia et al., Science, 268:293–297 (1995). A similar mechanism can be proposed for B cells secreting IgE which also have cell surface CD23 and Fc gamma RII. An anti-human CD23 antibody bound to a cell by antigen (CD23) and also bound to Fc gamma RII through Fc interactions could transmit a signal to suppress IgE secretion through Fc gamma RII.
Mechanisms involved in IgE inhibition by anti-CD23 antibodies have been proposed that include blocking interactions other than the interaction between membrane CD23 and IgE. Related to this, CD23, which is a member of the C-type lectin family, has been shown to interact with several other ligands such as CD21, CD11b and CD11c present on a variety of cell types including T cells and monocytes. In this context CD23 can be envisioned as a cellular adhesion molecule.
Therefore, it has been proposed that the CD21–CD23 interaction may be involved in antigen presentation and subsequent IgE production. Models suggest CD21 on B cells sending an activation signal for IgE production after binding to CD23 on activated T cells present primarily in atopic individuals. (Lecoanet et al., Immunol., 88:35–39 (1996); and Bonnefoy et al., Int. Amer. Allergy Immunol., 107:40–42 (1995).) Blocking this interaction with an anti-CD23 could block induced IgE production. (Aubry et al., Nature, 358:505–507 and Immunol., 5:944–949 (1993); Grosjean et al., Curr. Opin. Eur. J. Immunol., 24:2982–2988 (1994); Henchoz-Lecoanet et al., Immunol., 88:35–39 (1996) Nambu et al., Immunol. Lett., 44:163–167 (1995); Bonnefoy et al., Int. Amer. Allergy Immunol., 107:40–42 (1995).) It is also possible that antigen presentation is upregulated by CD23 on antigen presenting B cells binding to CD21 on T cells.
Yet another mechanism which would potentially explain the effects of CD23 on IgE production involves soluble forms of CD23. It has been reported that CD23 is cleaved from the cell surface releasing several different forms of soluble CD23 or IgE binding factors. (Sarfati et al., Immunol., 53:197–205 (1984).) Soluble CD23 is a cytokine, with one of its reported activities being the augmentation of IL-4 induced IgE production from B cells. (Pene et al., J. Cell Biochem., 39:253–269 (1989); Pene et al., Eur. J. Immunol., 18:929–935 (1988); Sarfati et al., J. Immunol., 141:2195–2197 (1988); Sarfati et al. (1984) (Id.); (Saxon et al., J. Clin. Immunol. Allergy, 86 (3 pt 1) 333–344 (1990). Also, certain forms of soluble CD23 have been reported to inhibit IgE production (Sarfati et al., Immunol., 76:662–667 (1992)). Accordingly, anti-CD23 antibodies potentially may block IgE production by 1) inhibiting the IgE augmenting effects of soluble CD23 and/or 2) blocking the proteolytic release of soluble CD23 from the cell surface.
Thus, based on the foregoing, it is clear that there is significant complexity and uncertainty in the art with respect to the functions of more specifically CD23 and effects on IgE production, and further with respect to the means by which ligands specific thereto affect IgE production.

This patent is subject to a terminal disclaimer.

Gamma-1 and gamma-3 anti-human CD23 monoclonal antibodies and use thereof as therapeutics


In order to prevent data thrashing and the resulting performance degradation, a computer system may maintain an application-layer cache space to more effectively use physical memory and, thus, significantly improve an application-memory hit ratio and reduce disk input-output operations. In particular, the computer system may maintain a managed memory cache that is separate from a page cache. The managed memory cache may be managed according to predefined caching rules that are separate from the caching rules in the operating system that are used to manage the page cache, and these caching rules may be application-aware. Subsequently, when data for an application is accessed, the computer system may prefetch the data and associated information from disk and store the information in the managed memory cache based on data correlations associated with the application.

Field
The described embodiments relate to techniques for caching files. More specifically, described embodiments relate to techniques for application-layer caching of files in a managed memory cache that has application-layer caching rules.
Related Art
Applications are increasingly using memory-mapped files to manage their data in order to achieve improved performance. Memory-mapped (mmap) files provide data mapping between disk files and the virtual memory space of a computer system. This may allow applications executing in an environment of the computer system to access the virtual memory when they read/write the mapped files.
Moreover, when applications read data from disk files, corresponding pages (which, for an illustrative operating system, are typically each 4 kB) are allocated in memory and filled with data from disk, so that later read/write accesses can apply to the memory pages rather than disk files. By using this page-caching technique in the operating system to cache data, memory-mapped files can avoid time-consuming disk input-output (IO) operations. In particular, reading and writing of memory-mapped files is typically faster than traditional disk-file operations because disk-file operations rely on system calls and involve data copying between user space and kernel space. In general, system calls are significantly slower than accessing local memory. In addition, accessing memory-mapped files usually does not result in data copying between user space and kernel space.
Memory mapping works particularly well when the mapped data can be entirely loaded into physical random access memory (RAM), a scenario in which the data read access results in a 'page cache-hit.' However, as the data size increases beyond the size of physical RAM (and, more precisely, beyond the size of physical RAM that can be used for operating-system page caches), naive use of memory-mapped files can lead to significantly degraded performance because of the performance costs associated with a 'page cache-misses' and disk IO. In the present discussion, note that 'physical RAM' denotes the maximum page-cache size. In addition, note that, in general, read access from applications (e.g., database querying) is typically blocking, while write access by applications is typically non-blocking. Consequently, read accesses are more likely to affect application performance than write accesses.
Thus, memory-mapped files can result in severe memory-inefficiency problems. In particular, for applications that use data larger in size than physical RAM, not all the data can be loaded into memory at one time. (Note that 'data size' as used here refers to the 'working data size,' i.e., the amount of data that is actually accessed by the application.) Consequently, attempting to cache new data may cause some pages to be evicted from memory. However, later when the evicted data are needed, they will need to be brought into memory again, thereby kicking out other data (which is referred to as 'data thrashing'). Data thrashing can incur more-than-necessary disk read IO. Because disk IO is typically slow (and can easily become a performance bottleneck of the entire computer system), when data thrashing occurs the application response time is often increased and the use of memory mapping may paradoxically degrade the overall performance.
Table 1 provides prefetched memory-mapped (mmap) files in accordance with an embodiment of the present disclosure.
Note that like reference numerals refer to corresponding parts throughout the drawings. Moreover, multiple instances of the same part are designated by a common prefix separated from an instance number by a dash.

Managed memory cache with application-layer prefetching


The present invention relates to a semiconductor memory device. When a device exits from power mode, after a time until an instruction/address receive control signal substantially turns on or off an address and instruction input buffer unit and a time until the address and instruction buffer unit is turned on to synchronize an external command signal to an internal clock signal are compensated for, an internal clock-generating control signal for controlling generation of the internal clock signal is sensed at a high phase of a buffered clock signal and is generated at a low phase of the buffered clock signal. Further, when a device enters power mode, an internal clock-generating control signal for controlling generation of an internal clock signal is sensed at a high phase of a buffered clock signal and is then generated at a low phase of the buffered clock signal.

1. Field of the Invention
The present invention relates to semiconductor memory devices, and more specifically, to semiconductor memory devices for stably controlling power mode at high frequency, i.e., power-down mode or self-refresh mode and method of controlling power mode thereof.
2. Discussion of Related Art
Power mode includes power-down mode and self-refresh mode. Power-down mode refers to a state where an external clock signal is enabled. Self-refresh mode refers to a state where an external clock signal is disabled. Self-refresh mode can be simply referred to as a state whose power state is deeper than power-down mode. The entry and exit into and from power-down mode and self-refresh mode are indicated by a level of a clock enable signal synchronized to an external clock signal.
FIGS. 1 and 2 are timing diagrams showing the exit from power mode at high frequency in the related art. These drawings show a phenomenon where malfunction is generated upon exit from power mode.
In FIGS. 1 and 2, an X-time refers to a time until an instruction/address receive control signal (CKEZ_CA_EN) turns on or off an input buffer unit (not shown) (for receiving external command signals (COM) such as an address, a row address strobe signal and a chip select). A Y-time refers to a time until the input buffer unit (not shown) is turned on or off and external command signals are synchronized to an internal clock signal (INT_CLK). Furthermore, NO indicates no operation and DSEL indicates delete.
Referring to FIG. 1, at a time point t0 of an external clock signal (CLK), the buffered clock enable signal (CKE_OUT) is enabled to logic high. At a time point t1 of a buffered clock signal (CLK_OUT), the instruction/address receive control signal (CKEZ_CA_EN) shifts from logic high to logic low. At this time, the instruction/address receive control signal (CKEZ_CA_EN) turns on the input buffer unit (not shown) after the X-time. At a time point t2 (dotted line) of the external clock signal (CLK), the external command signal (COM) is received. After the Y-time, buffered command signals (CS/RAS/CAS/WE_OUT) are generated. An internal clock-generating control signal (CKEZ_CLK_EN) is generated by sensing the instruction/address receive control signal (CKEZ_CA_EN) at a low phase of t0 of the buffered clock signal (CLK_OUT). An internal clock signal (INT_CLK) is generated at a high phase of t1 of the buffered clock signal (CLK_OUT). If so, at a time point at which the internal clock signal (INT_CLK) is generated (i.e., before the buffered command signals (CS/RAS/CAS/WE_OUT) are input to a command latch unit (not shown) after the input buffer unit is turned on), invalid command signals (CS2Z/RAS2/CAS2Z/WEZ) are recognized as internal command signals. Thus, an instruction decoder (not shown) outputs an invalid command such as Mode Register Set (MRS), as shown in FIG. 1.
Referring to FIG. 2, in the case where a low phase margin Td of the buffered clock signal (CLK_OUT) t0 is small or almost no in recognizing the instruction/address receive control signal (CKEZ_CA_EN), the internal clock-generating control signal (CKEZ_CLK_EN) shifts to logic low approximately on the middle of a high phase of the buffered clock signal (CLK_OUT) t1. In this case, the internal clock signal (INT_CLK) is generated as an abnormal short pulse (indicated by a circular dotted line in FIG. 2) with its front side being cut. The short pulse of the internal clock signal (INT_CLK) has a close relation with the degree of the low phase margin of the buffered clock signal (CLK_OUT) t0 and a time until the internal clock-generating control signal (CKEZ_CLK_EN) is generated in recognizing the aforementioned instruction/address receive control signal (CKEZ_CA_EN). Such an unstable short pulse has a problem in that it may generate abnormal invalid internal command signals (CS2Z/RAS2/CAS2Z/WEZ) although the buffered command signals (CS/RAS/CAS/WE_OUT) are valid. Furthermore, at the low phase of the external clock signal (CLK) t2, the input buffer unit (not shown) is turned on and the buffered command signals (CS/RAS/CAS/WE_OUT) are cut at a hold line shown in FIG. 2. This results in a short set-up time (Tsetup). As a result, an invalid internal command can be performed.
FIG. 3 is a timing diagram showing the entry into power mode at high frequency in the related art. From FIG. 3, it can be seen that the short pulse of the internal clock signal (INT_CLK) generated upon exit from power mode is also generated upon entry into power mode.

Semiconductor memory device for stably controlling power mode at high frequency and method of controlling power mode thereof


A system and method for determining a fault threshold for an operational module according to the model of the operational module are described. The system includes an operational module, a storage unit, and a monitoring unit. The operational module has circuitry for producing a characterization signal with an electrical characteristic that uniquely correlates to the model of the operational module. A storage unit maintains an association between at least one parameter value and a fault threshold. A monitoring unit is in communication with the operational module to receive the characterization signal and with the storage unit. The monitoring unit measures the electrical characteristic of the characterization signal to derive a parameter value therefrom and accesses the storage unit to determine the fault threshold associated with the derived parameter value.

Cooling and temperature control in electrical, optical, and mechanical systems is of primary importance to the proper operation of such systems. Consequently, it is vital to replace a degrading or failed cooling module (e.g., blowers and fans) as quickly as possible in order to maintain normal system operation. In general, the replacement module can be from a different manufacturer than the manufacturer of the cooling module that is now degrading or failing. However, the ability to use cooling modules from different manufacturers can present a problem for fault detection.
Cooling modules produced by different manufacturers can operate at different rotational rates and still produce similar airflow volumes. Systems may use rotational rate as an indication of whether the cooling module is performing properly, degrading, or failing. The acceptable rotational rate, however, for a properly functioning cooling module can vary from manufacturer to manufacturer. Often, a single rotational rate serves as a fault threshold for all cooling modules that presently are or may become installed in the system. Typically, this fault threshold accounts for the slowest speed module from among the various manufacturers that might be used in the system; otherwise, if the fault threshold is set too high, properly functioning modules can erroneously trigger a fault or failure condition. Setting the fault threshold based on the slowest speed module, however, enables higher-speed cooling modules to degrade undetected to unacceptable performance levels because the rotational rate of the degrading module still happens to be above the fault threshold. The presence of a degrading cooling module can place a strain upon the continued operation of the system. Thus, there is a need for a system and method for setting fault thresholds that can accommodate operational modules from different manufacturers without the above-mentioned disadvantages associated with using a single fault threshold.

System and method of dynamically setting a fault threshold for an operational module


A picture type identifier, indicating one of intra-picture coding (an I-picture), forward or backward predictive coding (a P-picture) and bi-directionally predictive coding (a B-picture), is included with a picture signal when the signal is encoded and when the signal is decoded. Each of initial and subsequent encoding and decoding is a function of the included picture type.

The present invention relates to coding and decoding of a picture signal for transmission, and, more particularly, is directed to matching the type of predictive coding applied to pictures of the picture signal.
In, for example, a teleconferencing system or a video telephone system, moving picture signals are compressed and encoded by taking advantage of intra-frame and inter-frame correlation so that they can be more efficiently transmitted over a communication channel to a remote location.
Intra-frame correlation can be utilized by an orthogonal transformation, such as a discrete cosine transformation (DCT).
Inter-frame correlation can be utilized by predictive encoding between successive pictures. As used herein, a picture generally refers to an image represented by a frame. When the fields of a frame are coded in a non-interlaced manner, that is, separately, each field may be referred to as a picture.
As shown in FIG. 1A, for example, frame pictures PC1, PC2 and PC3 are generated at time points t1, t2 and t3. As shown by shading in FIG. 1B, the difference between the frame pictures PC1 and PC2 is obtained as difference picture data PC12, and the difference between the frame pictures PC2 and PC3 is obtained as difference picture data PC23. Since there is a fairly small change between signals of temporally neighboring frames, transmission of only the difference picture data utilizes the transmission channel more efficiently than transmission of the original pictures. That is, using the difference picture data as encoded picture signals reduces the amount of data to be transmitted.
However, if only the difference signals are transmitted, the original picture cannot be restored. It is advantageous to occasionally transmit a picture which is not predictively encoded as a reference for difference picture data, and because it is sometimes more efficient than transmitting the picture as a predictively encoded picture.
Pictures which are encoded utilizing only intra-frame correlation and not inter-frame correlation, are referred to herein as intra-pictures or I-pictures.
Pictures which are encoded with predictive encoding relative to one previously encoded picture are referred to herein as predictive pictures or P-pictures. The previously encoded picture may be an I-picture or a P-picture, and temporally succeeds the P-picture.
Pictures which are encoded with predictive encoding relative to at most two pictures, a temporally preceding and a temporally succeeding picture, are referred to herein as bi-directionally predictive coded pictures or B-pictures. The two pictures may each be an I-picture or a P-picture. When both are used, the mean value of the two pictures is obtained and used as a reference picture for the picture to be encoded.
A series of pictures may be considered as groups of pictures having a predetermined number of frames such as F1 . . . F17. The luminance and chrominance picture signals of the leading frame F1 are encoded as an I-picture, the picture signals of the second frame F2 are encoded as a B-picture, and the picture signals of the third frame F3 are encoded as a P-picture. The fourth and the following frames F4 to F17 are encoded alternately as B-pictures and P-pictures. FIG. 2A shows the reference pictures used for encoding P-pictures, while FIG. 2B shows the reference pictures used for encoding B-pictures.
As shown in FIGS. 3A and 3B, there are four methods for encoding the macro-blocks (discussed below) of a picture. When multiple methods are suitable, the method which will give the smallest amount of encoded data is employed on a macro-block by macro-block basis. Blocks F1 to F5 in FIG. 3A represent data for frames of moving picture signals, whereas blocks F1X to F5X in FIG. 3B represent data for encoded frames. The solid line arrows in FIG. 3A show the frames to which motion vectors x1 . . . x6 relate.
The first method, shown as SP1, is to not use predictive encoding, that is, to use only intra-frame correlation. This is suitable for any macro-blocks of an I-picture, a P-picture and a B-picture. In other words, if less encoded data is produced without predictive encoding, then this method is selected.
The second method, shown as SP2, is to predictively encode relative to a picture which temporally succeeds the current picture, referred to as backward predictive encoding. The third method, shown as SP3, is to predictively encode relative to a picture which temporally precedes the current picture, referred to as forward predictive encoding. The second method is suitable for macro-blocks of only B-pictures. The third method is suitable for macro-blocks of P-pictures and B-pictures.
The fourth method, shown as SP4, is to predictively encode relative to the mean value of two pictures, one temporally preceding and one temporally succeeding the current picture. This method is suitable for macro-blocks of only B-pictures.
The encoding sequence will now be described.
The first frame F1 is encoded as an I-picture using the first method SP1 so that it is directly transmitted over a transmission channel as encoded data F1X.
The third frame F3 is encoded as a P-picture. When the third method SP3, forward predictive coding, is used for a macro-block, difference signals from the temporally preceding frame F1 used as the reference picture, as indicated by a broken-line arrow SP3, and a motion vector x3 between the reference picture F1 and the current picture F3, are calculated and encoded as data F3X for that macro-block. Alternatively, in this or another macro-block of the P picture, if a smaller amount of encoded data is produced for a macro-block of the P picture being encoded, the first method SP1 can be used wherein the data of the original frame F3 are directly utilized as the transmission data F3X for that macro-block.
The second frame F2 is encoded as a B-picture.
When the fourth method SP4 is used to encode a macro-block of the frame F2, a difference between the mean value of the temporally preceding frame F1 and the temporally succeeding frame F3 is calculated, on a pixel by pixel basis. The difference data and the motion vectors x1 and x2 are encoded as data F2X.
When the first processing method SP1 is used to encode a macro-block of the frame F2, the data of the original frame F2 forms the encoded data F2X.
When one of the second or third methods SP2, SP3 is used to encode a macro-block of the frame F2, one of the difference between the temporally succeeding frame F3 and the current frame F2, and the difference between the temporally preceding frame F1 and the current frame F2 is calculated. The difference data and one of the motion vectors x1, x2 are encoded as the data F2X.
The frame F4 for the B-picture and the frame F5 for the P-picture are processed in a similar manner as described above to generate transmitted data F4X and F5X.
FIG. 4 illustrates an arrangement for encoding and decoding moving picture signals in accordance with the above-described predictive encoding scheme. As shown in FIG. 4, an encoding device 1 encodes input picture signals and transmits the encoded signals to a recording medium 3 as a transmission channel for recording. A decoding device 2 reproduces the signals recorded on the recording medium 3 and decodes these as output signals.
The encoding device 1 includes an input terminal 10, a pre-processing circuit 11, A/D converters 12 and 13, a frame memory 14 including a luminance signal frame memory 15 and a color difference signal frame memory 16, a format converting circuit 17 and an encoder 18.
Input terminal 10 is adapted to receive a video signal VD and to supply the signal VD to pre-processing circuit 11 which functions to separate the video signal VD into luminance signals and color signals, herein chrominance or color difference signals, that are applied to analog-to-digital (A/D) converters 12 and 13, respectively. The video signals, digitized by analog- to-digital conversion by the A/D converters 12 and 13, are supplied to frame memory 14 having memories 15, 16 which function to store the luminance signals and the color difference signals, respectively, and to read out the signals stored therein to format converting circuit 17.
The converter 17 is operative to convert frame format signals stored in the frame memory section 14 into block format signals. As shown in FIG. 5A, pictures are stored in the frame memory section 14 as frame-format data having V lines each consisting of H dots. The converting circuit 17 divides each frame into N slices, each slice comprising a multiple of 16 lines. As shown, in FIG. 5B, the converter 17 divides each slice into M macro-blocks. As shown in FIG. 5C, each macro-block represents luminance signals Y corresponding to 16×16 pixels or dots, and associated chrominance Cr, Cb signals. These luminance signals are subdivided into blocks Y1 to Y4, each consisting of 8×8 dots. The 16×16 dot luminance signals are associated with 8×8 dot Cb signals and 8×8 dot Cr signals. The converter 17 is also operative to supply the block format signals to the encoder 18, which is described in detail below with reference to FIG. 6.
The encoder 18 operates to encode the block format signals and to supply the encoded signals as a bitstream over a transmission channel for recording on the recording medium 3.
The decoding device 2 includes a decoder 31, a format converting circuit 32, a frame memory section 33 including a luminance signal frame memory 34 and a color difference signal frame memory 35, digital-to-analog converters 36 and 37, a post-processing circuit 38 and an output terminal 30.
The decoder 31 is operative to reproduce encoded data from the recording medium 3 and to decode the encoded data, as described in detail below with reference to FIG. 9, and to supply decoded data signals to format converting circuit 32 which is operative to convert the decoded data signals into frame format data signals and to supply the frame format data signals as luminance signals and color difference signals to the memory 33. The memories 34, 35 of the memory 33 function to store the luminance and chrominance signals, respectively, and to apply these signals to D/A converters 36 and 37, respectively. The analog signals from converters 36, 37 are synthesized by a post-processing circuit 38 which functions to form output picture signals and to output them to output terminal 30, and thence to a display unit, such as a CRT, not shown, for display.
FIG. 6 illustrates the encoder 18 shown in FIG. 4.
Generally, the encoder 18 stores three pictures, the current picture and the pictures temporally preceding and succeeding the current picture. Based on the sequential position of the current picture in the group of pictures, the picture coding type (I, P or B) is selected for each picture. The picture type sequence is determined by a user using picture type input device 65, independent of the pictures applied to an input terminal 49.
The encoder 18 also chooses one of frame-based and field-based predictive encoding as will be explained with reference to FIG. 7, and further chooses one of frame-based and field-based DCT encoding as will be explained with reference to FIG. 8. For each picture, appropriate motion vectors are obtained and the picture is predictively encoded relative to zero, one or two previously encoded pictures which have been locally decoded and which are referred to as reference pictures to form a difference data signal. The difference data signal is orthogonally transformed into blocks of coefficient data which are quantized, variable length encoded and transmitted as encoded data.
At the encoder 18, the quantized data are dequantized, inverse orthogonally transformed, and stored as the reference pictures. The predictive encoding applies the motion vector(s) obtained for the current picture to the reference picture(s) to produce a prediction picture which is subtracted from the current picture to yield the difference data.
The elements of the encoder 18 will now be explained in detail.
Picture data for encoding is supplied macro-block by macro-block to the input terminal 49 and thence to a motion vector detection circuit 50 which is operative to process the picture data of respective frames as I-pictures, P-pictures or as B-pictures, in accordance with a predetermined sequence for each group of pictures, as shown for example, in FIGS. 2A, 2B. The circuit 50 applies the picture data of the current frame to a frame memory 51 having frame memories 51a, 51b, 51c used for storing a temporally preceding picture, the current picture and a temporally succeeding picture, respectively.
More specifically, the frames F1, F2, F3 are stored in the memories 51a, 51b, 51c, respectively. Then the picture stored in memory 51c is transferred to memory 51a. The frames F4, F5 are stored in the memories 51b, 51c, respectively. The operations of transferring the picture in memory 51c to memory 51a and storing the next two pictures in memories 51b, 51c are repeated for the remaining pictures in the group of pictures.
After the pictures are read into the memory and temporarily stored, they are read out and supplied to a prediction mode changeover circuit 52 which is adapted to process the current picture for one of frame based and field based predictive encoding. After processing the first frame picture data in a group of pictures as an I-picture and before processing the second frame picture as a B-picture, the motion vector detection circuit 50 processes the third frame P-picture. The processing sequence is different from the sequence in which the pictures are supplied because the B-picture may involve backward prediction, so subsequent decoding may require that the P-picture temporally succeeding the B-picture have been previously decoded.
The motion vector detection circuit 50 calculates as an estimated value for intra-coding for each macro-block, the sum of absolute values of prediction errors for the frame prediction mode for each macro-block and the sum of absolute values of prediction errors for the field prediction mode for each macro-block and supplies these sums to the prediction decision circuit 54 which compares these sums and selects frame prediction mode or field prediction mode in accordance with the smallest of these values and provides the selected mode to the prediction mode changeover circuit 52.
If the frame prediction mode is selected, the prediction mode changeover circuit 52 outputs the four luminance blocks Y1 to Y4 and the two chrominance or color difference blocks Cb, Cr of each macro-block received from the motion vector detection circuit 50 without processing. As shown in FIG. 7A, odd or first field line data, indicated by solid lines, and even or second field line data, indicated by dashed lines, alternate in each luminance and color difference block as received from the motion vector detection circuit 50. In FIG. 7A, a indicates units for motion compensation. In the frame prediction mode, motion compensation is performed with four luminance blocks (macro-blocks) as a unit and a single motion vector is associated with the four luminance blocks Y1 to Y4.
If the field prediction mode is selected, the prediction mode changeover circuit 52 processes the signals received from the motion vector detection circuit 50 so that each of the four luminance blocks comprises data from a single field and the two color difference blocks have non-interlaced odd and even field data. Specifically, as shown in FIG. 7B, the luminance blocks Y1 and Y2 have odd-field data and the luminance blocks Y3 and Y4 have even-field data, while the upper halves of the color difference blocks Cb, Cr represent odd field color difference data for the luminance blocks Y1 and Y2 and the lower halves of the color difference blocks Cb, Cr represent even field color difference data for the luminance blocks Y3 and Y4. In FIG. 7B, b indicates units for motion compensation. In the field prediction mode, motion compensation is performed separately for the odd-field blocks and even-field blocks so that one motion vector is associated with the two luminance blocks Y1 and Y2 and another motion vector is associated with the two luminance blocks Y3 and Y4.
The prediction mode changeover circuit 52 supplies the current picture, as processed for frame based or field based predictive encoding, to arithmetic unit 53 of FIG. 6. The arithmetic unit 53 functions to perform one of intra-picture prediction, forward prediction, backward prediction or bi-directional prediction. A prediction decision circuit 54 is adapted to select the best type of prediction in dependence upon the prediction error signals associated with the current picture signals.
The motion vector detection circuit 50 calculates, for the current picture, the sum of absolute values of the differences between each Aij and the average value of the Aij in each macro-block Σ|Aij−(average of Aij)| and supplies the sum as an estimated value for intra-coding to the prediction decision circuit 54.
The motion vector detection circuit 50 calculates the sum of absolute values (or sum of squares) of the difference (Aij−Bij) between signals Aij of the macro-blocks of the current picture, and signals Bij of the macro-blocks of the prediction picture Σ|Aij−Bij| in each of frame prediction mode and field prediction mode. As explained above, the motion vector(s) for the current picture are applied to the reference picture(s) to generate the prediction picture. When the reference picture temporally precedes the current picture, the quantity Σ|Aij−Bij| is referred to as a forward prediction error signal, and when the reference picture temporally succeeds the current picture, the quantity Σ|Aij−Bij| is referred to as a backward prediction error signal. When the prediction picture is the mean of a temporally preceding and a temporally succeeding reference picture, as motion-compensated, the quantity Σ|Aij−Bij| is referred to as a bi-directional prediction error signal.
The circuit 50 supplies the forward frame prediction, the forward field prediction, the backward frame prediction, the backward field prediction, the bi-directional frame prediction and the bi-directional field prediction error signals to the prediction decision circuit 54.
The prediction decision circuit 54 selects one of intra-coding, forward inter-picture prediction, backward inter-picture prediction or bi-directional inter-picture prediction and one of frame and field prediction mode in accordance with the smallest of the estimated value for intra-coding and the forward frame, the forward field, the backward frame, the backward field, the bi-directional frame and the bi-directional field prediction error signals. The arithmetic unit 53 predictively encodes the current picture, as processed by the frame or field changeover circuit 52, in accordance with the prediction mode selected by the prediction decision circuit 54.
The motion vector detection circuit 50 serves to calculate and supply the motion vector(s) associated with the selected prediction mode to a variable length encoding circuit 58 and a motion compensation circuit 64, explained later.
The sums of the absolute values of the inter-frame differences (prediction errors) on the macro-block basis are supplied from the motion vector detection circuit 50 to the prediction mode changeover circuit 52 and to the prediction decision circuit 54, in the manner as described above.
The arithmetic unit 53 supplies predictively encoded data, also referred to as difference data, for the current picture to a DCT mode changeover circuit 55 which is adapted to process the current picture for one of frame based and field based orthogonal transformation.
The DCT changeover circuit 55 functions to compare the encoding efficiency when the DCT operations for the macro-blocks in a picture are performed with the odd field data alternating with the even field data, that is, for frame based orthogonal transformation, as shown in FIG. 8A, with the encoding efficiency when the DCT operations for the macro-blocks in a picture are performed with the odd field data separated from the even field data, that is, for field based orthogonal transformation, as shown in FIG. 8B. The circuit 55 functions to select the mode with the higher encoding efficiency.
To evaluate the encoding efficiency for frame based orthogonal transformation, the DCT mode changeover circuit 55 places the luminance macro-block data into interlaced form, as shown in FIG. 8A, and calculates the differences between the odd field line signals and even field line signals vertically adjacent to each other, and finds the sum of absolute values of the differences EFM, or the sum of squared values of the differences.
                    EFM        =                                                            ∑                16                                            j                =                1                                                                                ∑                  16                                                  i                  =                  1                                                                                                                                o                                                              (                                              i                        ,                        j                                            )                                                        -                                      e                                                              (                                              i                        ,                        j                                            )                                                                                                                    +                                                    ∑                16                                            j                =                1                                                                                ∑                  16                                                  i                  =                  1                                                                                                                                e                                                              (                                              i                        ,                        j                                            )                                                        -                                      o                                                              (                                                                        i                          +                          1                                                ,                        j                                            )                                                                                                                                              Eq        .                                          1
To evaluate the encoding efficiency for field based orthogonal transformation, the DCT mode changeover circuit 55 places the luminance macro-block data into non-interlaced form, as shown in FIG. 8B, and calculates the differences between vertically adjacent odd field line signals and the differences between vertically adjacent even field line signals, and finds the sum of absolute values of the differences EFD, or the sum of squared values of the differences.
                    EFD        =                                            ∑              16                                      j              =              1                                                                                ∑                15                                            i                =                1                                                                (                                                                                                            o                                                                    (                                                  i                          ,                          j                                                )                                                              -                                          o                                                                    (                                                                              i                            +                            1                                                    ,                          j                                                )                                                                                                              +                                                                                              e                                                                    (                                                  i                          ,                          j                                                )                                                              -                                                                  e                                                                          (                                                                                i                              +                              1                                                        ,                            j                                                    )                                                                                1                                                                                                    )                                                          Eq        .                                          2
The DCT changeover circuit 55 compares the difference between the frame based and field based sums of the absolute values with a predetermined threshold and selects frame based DCT transformation if the difference EFM−EFD is less than the predetermined threshold.
If the frame prediction mode is selected in the prediction mode changeover circuit 52, the probability is high that the frame DCT mode will be selected in the DCT mode changeover circuit 55. If the field prediction mode is selected in the prediction mode changeover circuit 52, the probability is high that the field DCT mode will be selected in the DCT mode changeover circuit 55. However, since this is not necessarily the case, the prediction mode changeover circuit 52 sets the mode which will give the least value of the sum of the absolute values of prediction errors, while the DCT mode changeover circuit 55 sets the mode which will give the optimum orthogonal transformation encoding efficiency.
If frame based orthogonal transformation mode, also referred to as frame DCT mode, is selected, the DCT mode changeover circuit 55 functions to ensure that the four luminance blocks Y1 to Y4 and two color difference blocks Cb, Cr represent alternating or interlaced odd and even field lines, as shown in FIG. 8A.
If field based orthogonal transformation mode, also referred to as field DCT mode, is selected, the DCT mode changeover circuit 55 functions to ensure that each of the luminance blocks represents only one field, and that each of the color difference blocks has segregated or non-interlaced odd and even field lines, as shown in FIG. 8B.
The DCT mode changeover circuit 55 functions to output the data having the configuration associated with the selected DCT mode, and to output a DCT flag indicating the selected DCT mode to the variable length encoding circuit 58 and the motion compensation circuit 64.
The DCT mode changeover circuit 55 supplies appropriately configured difference picture data to a DCT circuit 56 shown in FIG. 6 which is operative to orthogonally transform it using a discrete cosine transformation into DCT coefficients, and to supply the DCT coefficient data to a quantization circuit 57 that functions to quantize the coefficient data with quantization steps selected in accordance with the volume of data stored in a transmission buffer 59 and to supply quantized data to a variable length encoding circuit 58.
The variable length encoding circuit 58 is also supplied with the quantization step or scale data from the quantization circuit 57, prediction mode data from the prediction decision circuit 54, that is data indicating which of the intrapicture prediction, forward prediction, backward prediction or bi-directional prediction is used, and motion vector data from the motion vector detection circuit 50. The encoding circuit 58 also receives prediction flag data from the prediction decision circuit 54 comprising a flag indicating which of the frame prediction mode or the field prediction mode is used, and prediction flag data from the DCT mode changeover circuit 55 comprising a flag indicating which of the frame DCT mode or the field DCT mode is used. This information is placed into the header portion of the encoded data stream.
The variable length encoding circuit 58 serves to encode the quantized data and the header information using a variable length code such as a Huffman code, in accordance with the quantization step data supplied from the quantization circuit 57, and to output the resulting data to a transmission buffer 59.
The quantized data and quantization step are also supplied to a dequantization circuit 60 which serves to dequantize the quantized data using the quantization step, and to supply the recovered DCT coefficient data to an inverse DCT circuit 61 that functions to inverse transform the DCT coefficient data to produce recovered difference data and to supply the recovered difference data to an arithmetic unit 62.
The arithmetic unit 62 combines the recovered difference data with a previously encoded and decoded reference picture, as motion compensated, to produce decoded data for a reconstructed picture which will be used as a reference picture and which is read into one of two frame memories 63a, 63b. The memories 63a, 63b are adapted to read out the reference picture data stored therein to a motion compensation circuit 64 that uses the motion vectors from the motion vector detection circuit 50 to produce a prediction picture from the reference picture. Specifically, the circuit 50 uses the motion vector to alter the readout address of the reference picture from the memory 63a or 63b.
For a group of pictures, after the first frame I-picture data and the third frame P-picture data are stored in the forward and backward prediction picture memories or units 63a, 63b, respectively, the second frame B-picture data is processed by the motion vector detection circuit 50. The prediction decision circuit 54 selects the frame or field prediction mode, while setting the prediction mode to one of intra-frame prediction mode, forward prediction mode, backward prediction mode and bi-directional prediction mode in correspondence with the sum of absolute values of predictive errors by macro-block.
Since a reconstructed B-picture is not used as a reference picture for other pictures, it is not stored in the frame memory 63.
It will be appreciated that the frame memory 63 has its forward and backward prediction picture units 63a, 63b bank-exchanged as needed so that a picture stored in one of the units 63a or 63b can be outputted as either a forward or a backward prediction picture.
The motion compensation circuit 64 functions to supply the motion compensated data as a prediction picture to the arithmetic unit 62 and to the arithmetic unit 53 which subtracts the prediction picture from the P-picture or the B-picture currently being predictively encoded.
More specifically, when the motion vector detection circuit 50 receives picture data for an I-picture from the forward original picture unit 51a, the prediction decision circuit 54 selects the intra-frame prediction mode and sets a switch 53d of the arithmetic unit 53 to an input contact a. This causes the I-picture data to be inputted directly to the DCT mode changeover circuit 55. In this case, no prediction picture is expected from the motion compensation circuit 64. The I-picture data is also supplied to the forward prediction picture unit 63a.
When the forward prediction mode is selected by the prediction decision circuit 54, the circuit 54 also sets the switch 53d to an input contact b which causes the arithmetic unit 53a to subtract the prediction picture, produced by the motion compensation circuit 64, from the picture read out from the memory 51, for each macro-block on a pixel by pixel basis, to produce difference data. The P-picture, after encoding and local decoding, is supplied to one of the units 63a, 63b. For example, if the P-picture immediately follows an I-picture, then the P-picture is stored in the backward prediction picture unit 63b.
For forward predictive encoding, the prediction picture is a reference I-picture or P-picture read out from the forward prediction picture unit 63a of the frame memory 63 and motion-compensated by the motion compensation circuit 64 in accordance with the motion vector outputted from the motion vector detection circuit 50. More specifically, for each macro-block, the motion compensation circuit 64 shifts the readout address of the forward prediction picture unit 63a in an amount corresponding to the motion vector currently output by the motion vector detection circuit 50.
When the backward prediction mode is selected by the prediction decision circuit 54, the circuit 54 also sets the switch 53d to an input contact c which causes the arithmetic unit 53b to subtract the prediction picture, produced by the motion compensation circuit 64, from the picture read out from the memory 51, on a pixel by pixel basis, to produce difference data.
For backward predictive encoding, the prediction picture is a P-picture read out from the backward prediction picture unit 63b of the frame memory 63 and motion-compensated by the motion compensation circuit 64 in accordance with the motion vector outputted from the motion vector detection circuit 50. More specifically, for each macro-block, the motion compensation circuit 64 shifts the readout address of the backward prediction picture unit 63b in an amount corresponding to the motion vector currently output by the motion vector detection circuit 50.
When the bi-directional prediction mode is selected by the prediction decision circuit 54, the circuit 54 sets the switch 53d to an input contact d which causes the arithmetic unit 53c to subtract a prediction picture from the picture read out from the memory 51, on a pixel by pixel basis, to produce difference data. The prediction picture is the mean value of a forward prediction picture and a backward prediction picture.
In the case of bi-directional prediction, the picture stored in the forward prediction picture unit 63a, and the picture stored in the backward prediction picture unit 63b, are read out and motion-compensated by the motion compensation circuit 64 in dependence upon the motion vectors outputted from the motion vector detection circuit 50. More specifically, for each macro-block, the motion compensation circuit 64 shifts the readout address of the forward and backward prediction picture units 63a, 63b in an amount corresponding to the appropriate one of the motion vectors currently output by the motion vector detection circuit 50.
The transmission buffer 59 temporarily stores the data supplied thereto, generates control data indicating the volume of data stored therein and supplies the control data to the quantization circuit 57. When the volume of data stored in the transmission buffer 59 reaches a predetermined upper limit value, the control data from the transmission buffer 59 causes the quantization scale of the quantization circuit 57 to increase so as to decrease the volume of the quantized data. Similarly, when the volume of data stored in the transmission buffer 59 reaches a predetermined lower limit value, the control data from the transmission buffer 59 causes the quantization scale of the quantization circuit 57 to decrease so as to increase the volume of the quantized data. In this manner, the transmission buffer 59 prevents the data supplied thereto from overflowing or underflowing its capacity. The data stored in the transmission buffer 59 are read out at a predetermined timing to an output terminal 69 and thence to a transmission channel for recording on, for example, the recording medium 3.
Although the foregoing description has been made with reference mainly to the luminance blocks, the color difference blocks are similarly processed and transmitted using the motion vector which corresponds to the motion vector of the luminance block halved in both the vertical and horizontal directions.
FIG. 9 illustrates the decoder 31 shown in FIG. 4.
The reproduced encoded picture data transmitted from the recording medium 3 is applied to a reception circuit, not shown, or to an input terminal 80 which applies the encoded picture data to a reception buffer 81 that serves to temporarily store the encoded picture data and to supply this data to a variable length decoding circuit 82 of a decoding circuit 90.
The variable length decoding circuit 82 functions to variable length decode the encoded data, to output the recovered motion vector, prediction mode data, prediction flags and DCT flags to the motion compensation circuit 87, and to output the quantization step data and variable length decoded picture-data. including the predictive mode, the motion vector, the predictive flag, the DCT flag and the quantized picture data for each macro-block, to an inverse quantization circuit 83.
The inverse quantization circuit 83 is adapted to dequantize the picture data supplied from the variable length decoding circuit 82 in accordance with the quantization step data supplied from the variable length decoding circuit 82 and to output the thus recovered coefficient data to an inverse transformation IDCT circuit 84.
The IDCT circuit 84 is adapted to perform an inverse transformation on the recovered coefficient data to produce recovered difference data, and to supply the recovered difference data to an arithmetic unit 85.
If the recovered difference data supplied from the IDCT circuit 84 represents an I-picture, the arithmetic unit 85 does not process the data and simply supplies it through an output terminal 91 to the format converting circuit 32 shown in FIG. 4, and to a forward prediction picture unit 86a of a frame memory 86.
If the recovered difference data supplied from the IDCT circuit 84 represents a macro-block of a P-picture produced in the forward prediction mode, then the reference picture data of the preceding frame, as stored in the forward prediction picture memory 86a of the frame memory 86, is read and motion-compensated by a motion compensation circuit 87 in dependence upon the motion vector outputted from the variable length decoding circuit 82 to generate a prediction picture. Specifically, the motion compensation circuit 87 uses the motion vector to alter the read out address supplied to the memory 86a. The arithmetic unit 85 adds the prediction picture to the recovered difference data to produce a decoded or reconstructed picture which is stored in a backward prediction picture memory 86b of the frame memory 86. The decoded P-picture is retained in the decoder 31, and output after the next B-picture is decoded and output, so as to restore the pictures to the order in which they were supplied to the encoder 18 of FIG. 4.
Even if the macro-block of the P-picture was encoded as intra-coded mode data, the decoded P-picture is directly stored in the backward prediction picture unit 86b, without being output to the output terminal 91 by the arithmetic unit 85.
If the recovered difference data supplied from the IDCT circuit 84 represents a macro-block of a B-picture encoded in the intra-coding mode, as determined from the prediction mode supplied from the variable length decoding circuit 82 to the motion compensation circuit 87, a prediction picture is not generated.
If the recovered difference data supplied from the IDCT circuit 84 represents a macro-block of a B-picture encoded in the forward prediction mode, as determined from the prediction mode supplied from the variable length decoding circuit 82 to the motion compensation circuit 87, the data stored in the forward prediction picture unit 86a of the frame memory 86 is read out and motion compensated by the motion compensation circuit 87 using the motion vector supplied from the variable length decoding circuit 82 to form the prediction picture. The arithmetic unit 85 sums the recovered difference data with the prediction picture to form the recovered B-picture.
If the recovered difference data supplied from the IDCT circuit 84 represents a macro-block of a B-picture encoded in the backward prediction mode, as determined from the prediction mode supplied from the variable length decoding circuit 82 to the motion compensation circuit 87, the data stored in the backward prediction picture unit 86b is read out and motion compensated by the motion compensation circuit 87 using the motion vector supplied from the variable length decoding circuit 82 to form the prediction picture. The arithmetic unit 85 sums the recovered difference data with the prediction picture to form the recovered B-picture.
If the recovered difference data supplied from the IDCT circuit 84 represents a macro-block of a B-picture encoded in the bi-directional prediction mode, as determined from the prediction mode supplied from the variable length decoding circuit 82 to the motion compensation circuit 87, the data stored in both the forward and backward prediction picture memories 86a, 86b are read out and respectively motion compensated by the motion compensation circuit 87 using the motion vectors supplied from the variable length decoding circuit 82, then averaged to form the prediction picture. The arithmetic unit 85 sums the recovered difference data with the prediction picture to form the recovered B-picture.
The recovered B-picture is supplied via the output terminal 91 to the format converting circuit 32. However, since the B-picture is not utilized for generating a prediction picture for other pictures, it is not stored in the frame memory 86.
After outputting of the B-picture, picture data of the P-picture stored in the backward prediction picture unit 86b is read and supplied via the motion compensation circuit 87 to the arithmetic unit 85. Motion compensation is not performed at this time.
The counterpart circuits to the prediction mode changeover circuit 52 and the DCT mode changeover circuit 55 in the encoder 18 of FIG. 6 are not shown in the decoder 31. The processing to be performed by these circuits, that is, the processing for restoring the configuration in which odd-field line signals and even-field line signals are separated from each other to the configuration in which odd and even-field line signals alternate with each other, is performed by the motion compensation circuit 87.
The processing of the luminance signals has been explained in the foregoing. As will be appreciated by one of ordinary skill in the art, the processing of the color difference signals is carried out in a similar manner. However, the motion vector employed in such case is the motion vector for luminance signals which is halved hi both the vertical and horizontal directions.
FIG. 10 shows the signal to noise ratio (SNR) for pictures transmitted using the above-described technique. As can be seen, the best quality transmission is obtained for I-pictures, good quality transmission is obtained for P-pictures, and the poorest quality transmission is obtained for B-pictures. Thus, if the transmission path has adequate capacity, it is preferable to transmit a picture as an I-picture.
If all pictures cannot be transmitted as I-pictures, it is better to transmit a series of pictures as shown in FIG. 10, rather than in a format in which one average picture quality is used for all pictures. The technique shown in FIG. 10 takes advantage of the human visual sense characteristic of perceiving a series of changing picture quality, as shown in FIG. 10, as of higher quality than a series of unchanging picture quality, for a predetermined transmission rate.
Accordingly, in the configuration of FIG. 6, transmission rate control is carried out by the quantizer 57 in order to attain the picture quality perceived as better.
To dub pictures, two coder-decoder (codec) units are used in series. However, the picture quality obtained from the second codec is substantially worse than the picture quality obtained from the first codec, as explained below.
FIG. 11 shows a configuration representing two codecs connected by an analog connection, namely, coder 201, decoder 202, coder 203 and decoder 204, connected in series.
In FIG. 11, an analog video signal is supplied to an input terminal 200 as an input signal a. The input terminal 200 functions to apply the analog video signal to an A/D converter 211 of coder 201. The converter 211 is adapted to convert the analog video signal to a digital video signal, and to apply the digital video signal to coding circuit 212 that serves to encode this signal as previously described to produce a coded digital video signal.
The coded digital video signal from coding circuit 212 of coder 201 is supplied to a decoding circuit 213 of decoder 202 which is adapted to decode the coded digital video signal and to apply the decoded video signal to D/A converter 214.
The analog video signal produced by D/A converter of decoder 202 is supplied as an output signal b to the coder 203, which functions in a similar manner as the coder 201.
The digital video signal produced by the coder 203 is supplied to decoder 204 which functions in a similar manner as the decoder 202. The decoder 204 delivers an analog video signal as an output signal c to a terminal 205, which may transmit the signal c to another coder (not shown) and so on.
FIG. 12 shows the SNR of the output signals b, c shown in FIG. 11. The SNR of the output signal c is seen to be substantially worse than the SNR of the output signal b.
The deterioration in picture quality results from a mismatch between the picture type applied in the first codec and the picture type applied in the second codec. Namely, if a picture coded as a B picture in the first coder/decoder pair is coded as, e.g., P picture in the second coder/decoder pair, a great deterioration of picture quality results because the picture quality changes as a function of the picture type.
Since the deterioration in picture quality results from the mismatch between picture types of respective stages of codecs, such deterioration similarly takes place when digital connections are used between respective codecs.
FIG. 13 shows a configuration representing two codecs connected by a digital connection, namely, coder 302, decoder 303, coder 304 and decoder 305, connected in series.
An analog video signal is supplied to terminal 300, which supplies the analog video signal as an input signal a to A/D converter 301 that serves to digitize the signal a, and to apply the digital signal to a digital interface 311 of coder 302. The digital interface 311 applies the signal supplied thereto to a coding circuit 312 which encodes or compresses the digital video data to an encoded digital video bit stream.
The encoded digital video signal from the coding circuit 312 is supplied to decoding circuit 313 of decoder 303 that decodes the signal supplied thereto, and applies the decoded signal to digital interface 314. The interface 314 functions to output the decoded signal as an output signal b.
The output signal b is supplied to coder 304 which functions in a similar manner as coder 302 to produce a coded signal that is applied to decoder 305 which functions in a similar manner as decoder 303. The digital signal output from the decoder 303 is supplied to a D/A converter that serves to convert the signal supplied thereto to an analog video signal and to supply the analog video signal as an output signal c to output terminal 307.
FIG. 12 also generally represents the SNR of the output signals b, c shown in FIG. 13.

Picture signal transmitting method and apparatus