A method and apparatus for reducing the amount of RAM required while maintaining fast data access. Data records are often saved in nonvolatile memory in order to maintain the contents of the data records even when the circuit is powered down. In the present invention each record in the nonvolatile RAM collection of data records is input to a function H(x) that outputs a tag value. The calculated tag value is saved in predetermined memory locations in RAM. Each calculated tag is shorter in length than the record saved in nonvolatile RAM. Therefore less RAM is required to save one tag value for each data record than is required to save the entire collection of data records in RAM. The value of H(y) is calculated when a data record entry corresponding to y is desired. Then the value of H(y) is compared to all the values in the tag value table. If a match is found, the corresponding record from its location in non-volatile RAM is retrieved and compared to y. If the values do not match the tag value table is searched for another location matching H(y). The result is a very fast comparison with the contents of nonvolatile RAM requiring only a minimal amount of RAM.

I. Field of the Invention
The present invention relates to electronic circuits. More particularly, the present invention relates to a novel and improved method and apparatus for reducing the RAM requirement in a device while maintaining fast look up and retrieval of data from slow non-volatile memory.
II. Description of the Related Art
Electronic memory of some type is used in almost all modem electronic devices. Electronic memory can take the form of floppy discs, magnetic tape, hard discs, and integrated circuits (IC). Each form of memory has its advantages and disadvantages. Floppy discs allow numerous data updates on a portable medium but have limited capacity and extremely long read and write access times. Both magnetic tape and hard discs have the capability for enormous capacity but are not portable, require large amounts of support hardware, and have slow read and write access times. Data saved in floppy disc, hard disc, and magnetic tape is often first formatted in software to a file format prior to saving on the medium. When data is recovered from the storage medium the software file routine must be run to locate and extract the requested data. This further slows the data access process because it adds a software layer on top of the already slow hardware access.
IC memory is typically used where memory needs to be integrated into a portable device. Varying the type and number of ICs can scale the amount of memory. ICs require minimum support hardware, are extremely small, and can provide fast read and write access times. Some IC memory can easily support direct access without the need for a software layer.
Numerous different types of IC memory are available to provide solutions to various design requirements. Each type of memory is able to satisfy a number of design requirements, but no one memory type is able to provide a complete design solution. The type of memory chosen for any particular application will depend on planned usage and performance design trade-offs.
The most common type of IC memory is Read Only Memory (ROM). As the name implies, the memory is only read accessible. A ROM device cannot be rewritten once it has been programmed. Embedded software applications use ROM to store embedded code and data records. The processor in an embedded software application retrieves each instruction from ROM and executes it. Different types of ROM are available depending on the volatility of the information to be programmed within the ROM. If the information to be stored in ROM is not expected to change and the expected volume of devices is high then mask programmable ROM is used. This type of ROM is mask programmed prior to packaging of the die. The information to be programmed must be highly stable and not subject to revision since changes in the programmed information require a mask change. The benefits of using mask programmed ROM relate to cost and time savings for high volume, mature products. Other types of ROM are available for products that do not sustain production volumes or code stability sufficient to justify mask programmed ROM.
Programmable Read Only Memory (PROM) allows the device manufacturer to program the embedded code. This allows for revisions in the code but still does not allow for modification or erasure of the ROM once it has been programmed. Devices that have been programmed with an out of date code revision will either need to be used with the out of date code revision or will need to be discarded.
Erasable Programmable Read Only Memory (EPROM) provides the ability to completely erase a programmed part. Erasure of an EPROM is accomplished by exposing the die to ultraviolet (UV) light for a predetermined period of time. The die can be exposed to the UV light through a transparent window on the EPROM package. Once erased, the EPROM can be reprogrammed. EPROMs are typically only used for engineering development where the expected number of code revisions is high. The limitations on the package type that can accommodate the transparent window contribute to the much higher price of an EPROM when compared to a PROM. Although the EPROM can be erased and reprogrammed, modifications to the code must be done on a complete chip basis. Even changes to a single bit within the code require complete erasure and reprogramming. This limitation, along with the requirement for a UV light for erasure confine the task of updating EPROMs to original equipment manufacturers (OEMs).
A device that allows for selective content erasure and reprogramming is the Electrically Erasable Programmable Read Only Memory (EEPROM). Conventional EEPROM allows for data to be updated in place. That is, a particular data location can be erased and new data overwritten in the same location. Data can be read from an EEPROM quickly but the write cycle of the conventional EEPROM can be orders of magnitude longer than the read time. Another disadvantage of using a conventional EEPROM arises from the inherent structure of the conventional EEPROM cell. The structure of a conventional EEPROM cell requires more transistors than in a standard PROM. The increased structure results in reduced memory capacity and increased cost. These disadvantages make usage of conventional EEPROM prohibitive in most consumer electronics applications.
Random Access Memory (RAM) represents another alternate means for storage. RAM allows for selective data reads and writes. Read and write can be performed on a byte basis. No erase cycle is required before writing new data to a previously written byte. Moreover, unlike the EEPROM, the read and write cycle times of the RAM are nearly identical. The density and capacity of RAM is comparable to ROM. The major disadvantage in using RAM is the volatile nature of the stored data. Information stored in RAM is lost whenever the RAM powers down. This is in contrast to ROM, which is nonvolatile memory, where the contents of memory remain even after the IC has been power cycled. In order to retain the contents of RAM, power must be maintained on the chip at all times. This requires a battery back up to the normal power supply. If the battery back up fails when the power supply is de-energized the contents of RAM will be lost. For this reason RAM is not used for embedded code and is used only for dynamic memory. RAM used for embedded code would be susceptible to loss of battery power and power supply glitches. Furthermore, if RAM were used for embedded code, battery operated devices such as cellular telephones would have diminished battery life due to the constant power requirements of the RAM. When RAM is used for dynamic memory the system does not care if the contents are lost after a power cycle. This alleviates the need for battery back up. However, the cost of RAM is higher than the cost of ROM.
Another storage alternative is sectored EEPROM commonly referred to as FLASH memory. Sectored EEPROM is a nonvolatile storage device that allows read and write on a byte basis. Unlike RAM, in sectored EEPROM an erase operation must be performed before rewriting over a previously written byte. However, data erasure cannot be performed on a byte basis. Erasure can only be performed on a sector basis, where the size of the sector is defined by the particular memory device chosen. The size of an erasable sector is always larger than one byte and can be on the order of 64 Kbytes. However, the number of erase cycles is not unlimited, but is bounded by a maximum cycle life. A typical recommended erase cycle life for sectored EEPROM is 100,000 cycles. Therefore, one would not use sectored EEPROM for applications requiring greater than 100,000 erase cycles over the anticipated device lifetime. Sectored EEPROM has advantages over the other types of rewriteable memory in applications that require fewer than 100,000 erase and rewrite cycles. Sectored EEPROM is preferred over any type of RAM for embedded code applications because sectored EEPROM is nonvolatile. Sectored EEPROM is preferable over EPROM because of sectored EEPROM""s ability to rewrite portions of memory in circuit. Sectored EEPROM also does not require the UV light for chip erasure. Sectored EEPROM is preferable over conventional EEPROM, which has comparable rewrite limitations, because of the lower cost and higher density of sectored EEPROM devices. Sectored EEPROMs are used in portable electronic devices for the nonvolatile storage of user configurable data.
Data stored in sectored EEPROM is often formatted to conform to a file system. The file format convention is partially driven by the sector sized erase cycle. Data is not memory mapped to a particular location since data in sectored EEPROM cannot be rewritten in place. The additional software overhead results in dramatically increased memory access times. The access time is further increased in multi-tasking systems. Nonvolatile memory access in a multi-tasking system may be preempted by a higher priority task. Preemption requires the lower priority task to wait for the completion of the higher priority task before proceeding. When the software overhead is included in the calculation of access times, the time to access data from sectored EEPROM may be more than 1000 to 10,000 times slower than the access time to data stored in RAM devices.
Long access times present user interface problems. In a portable electronic device such as a wireless phone, nonvolatile user configurable data is often stored in sectored EEPROM. The user interface is enhanced if access to the phone book data appears to occur instantaneously. Data retrieval from sectored EEPROM results in a slow user response when a user enters a phone number to compare against the entries in the phone book. This is due to the software overhead in dealing with the file system that must be initiated in order to retrieve any data from sectored EEPROM. The long access time delay presents a serious problem in real time systems where data retrieval must occur within some predefined window of time.
One solution to the slow access times of sectored EEPROM, or any other nonvolatile memory, is to transfer all data from nonvolatile data records to RAM. The data records could be transferred from nonvolatile RAM upon device power up. Then all the data can quickly be retrieved from RAM. This greatly enhances the user interface. However, this solution presents considerable cost and space disadvantages. Additional RAM is required that redundantly stores the contents of the nonvolatile memory merely to enhance the user interface. What is required is a method and apparatus for reducing the amount of RAM required to maintain a fast user interface when accessing data stored in nonvolatile memory.
The present invention is a novel and improved method and apparatus for reducing the amount of RAM required to support fast data retrieval from slower non-volatile memory. The use of RAM instead of nonvolatile memory greatly decreases data search time. RAM access is orders of magnitude faster than nonvolatile memory access due to software overhead that must be performed each time nonvolatile memory is accessed.
A collection of data records can be saved in nonvolatile memory. Access to the nonvolatile data records is slowed because of the software overhead associated with nonvolatile memory access. The present invention can be used to greatly enhance searches of data records saved in nonvolatile memory. When data records saved in nonvolatile memory must be searched, numerous accesses to the nonvolatile memory are typically required. The present invention reduces the number of accesses to the nonvolatile data records by saving a series of calculated tag values in predetermined locations in RAM. Searches for data records saved in nonvolatile memory are then performed by searching through the predetermined RAM locations for corresponding tag values then looking up the nonvolatile data record if a matching tag value is found. Searching for matching tag values in RAM reduces to one the typical number of nonvolatile memory accesses required to search for a matching data record. This contrasts with the numerous nonvolatile record retrievals and comparisons required in a conventional search of nonvolatile data records.
A predetermined number of memory locations are allocated in RAM corresponding to the number of data records saved in the nonvolatile memory. Each memory location allocated in RAM need not be large enough to hold the data record saved in nonvolatile memory. In the preferred embodiment two bytes of RAM are allocated for each data record location in nonvolatile memory. The nonvolatile data record may be arbitrarily long. A tag function H(x) is defined to map each nonvolatile record into a corresponding tag value. The tag function H(x) need not provide a 1:1 mapping of data records to tag values. A 1:1 mapping of data records to tag values minimizes the number of nonvolatile memory accesses to one nonvolatile record access per data record search.
The predetermined RAM locations hold tag values determined from contents of the corresponding nonvolatile data records. When a search for a particular data record is required a tag value is calculated for the searched record. If the searched record is designated y, the tag value H(y) is calculated. The tag value H(y) is then compared to all tag values stored in the predetermined RAM locations. This step is performed very quickly due to the fast access capabilities of RAM. If a matching tag value in RAM i s found the corresponding nonvolatile memory location is identified as that location that corresponds to the particular RAM location. The contents of the nonvolatile data record are retrieved and compared to the searched record. I f the two match then the search is complete. If the retrieved nonvolatile memory record and the searched record are not identical matches the remaining tag values in RAM are searched for additional matches to the tag value calculated for the searched record. The search continues until an identical match is found or the end of the RAM tag value s is reached.
The present invention provides an enormous decrease in the amount of time that it takes to search the data records since the majority of the search is performed using the RAM tag tables. The nonvolatile memory records a re only accessed when a tag value match is found. For the majority of the searches only one nonvolatile memory access will be required. The time savings allow for an enhanced user interface while the reduction in RAM provides reduced hardware cost.

Hash technique eliminating pointer storage to reduce RAM size


A method for forming a pattern of a semiconductor device is disclosed which can increase the contact area between a photoresist and an anti-reflective film by performing an etching process on the anti-reflective film in a process of forming a photoresist pattern for a semiconductor device so as to form fine irregularities, thereby preventing collapse of a photoresist pattern. The disclosed method includes: (a) forming an organic anti-reflective film by coating an organic anti-reflective coating composition onto an upper portion of a layer to be etched, and performing a baking process thereto; (b) forming fine irregularities on the organic anti-reflective film by performing an etching process on the formed organic anti-reflective film; and (c) forming a photoresist pattern by coating a photoresist on the upper portion of the organic anti-reflective film, exposing the photoresist and then developing the same.

1. Technical Field
A method for forming patterns in a semiconductor device is disclosed, and more particularly, a method for forming patterns in a semiconductor device is disclosed which can increase the contact area between the photoresist and the anti-reflective film by performing an etching process on the anti-reflective film during the process of forming a photoresist pattern so as to form fine irregularities, thereby preventing the collapse of a photoresist pattern.
2. Description of the Related Art
It is known from conventional microfine pattern-forming processes that diffracted light and reflective light emitted from the lower film result in standing waves generated by optical properties of the lower film layer. As a result, variation in the thickness of a photoresist film, reflective notching, and/or variations of the critical dimension (hereinafter referring to as "CD") of the photoresist pattern unavoidably occur.
Accordingly, a protecting layer for maintaining the reflection on the lower film layer between the lower film and the photoresist has been introduced. The protecting layer is fabricated from materials with excellent light-absorbing ability within wavelength ranges of exposure light sources, the protecting layer is typically referred to as an anti-reflective film.
Anti-reflective films may be generally classified into inorganic or organic-based anti-reflective film, dependent on the type of materials to be used. In recent years, the organic anti-reflective films have been widely used and so, several organic anti-reflective films have been developed.
Meanwhile, when the adhesion between the photoresist and the organic anti-reflective film is poor, the photoresist pattern formed on the upper portion of the anti-reflective film may collapse. To solve such a problem, two techniques are mainly used. First, in order to increase the adhesion between the photoresist and the anti-reflective film, the organic anti-reflective film is developed so it conforms to the specific photoresist used in the formation of a pattern. However, the development of the organic anti-reflective film is time consuming and therefore costly.
Secondly, a method for increasing the contact area between the photoresist pattern and the anti-reflective film may be employed to increase the adhesion between the photoresist and the anti-reflective film. However, once the CD of the pattern is determined, the contact area between the anti-reflective film and the photoresist pattern is, for all practical purposes, fixed. Thus, conventionally, no method has been developed for effectively increasing the contact area between the anti-reflective film and the photoresist pattern.
Hence, in case of forming a photoresist pattern according to the conventional art, there still remains the phenomenon of the collapse of the pattern.
Due to such problems of the conventional art, there is an urgent need for a method for forming patterns of a semiconductor device which can prevent the collapse of the pattern by effectively increasing the contact area between the photoresist pattern and the anti-reflective film, and thus increasing adhesion between the pattern and the anti-reflective film.

Method for forming patterns in a semiconductor device


A plastic container includes a medium applied to a portion of the container. A digital image is applied to a portion of the medium, the digital image being comprised of a plurality of ink droplets. Methods for digital printing on a portion of a medium that is applied to a container are also disclosed.

Conventional techniques for printing onto curved surface plastic containers are subject to certain limitations and drawbacks. Such techniques make it difficult to provide a container, particularly a container having a non-planar surface, with an image that is commercially acceptable. Another challenge can be to provide a base coat or surface for subsequent digital printing in an efficient and cost-effective manner. A further challenge, is to efficiently provide a container with a multi-color digital image printed at acceptable speeds and at a reasonable cost.


An NC lathe includes a bed, a headstock mounted on the bed for rotating a work around C-axis, a tailstock slidably mounted on a first guide surface formed on the bed, and a carriage slidably mounted on a second guide surface formed on the bed in a direction of Z-axis parallel to the C-axis and juxtaposed with the first guide surface. The carriage has a saddle having a first slide surface for contacting the second guide surface of the bed and a second slide surface inclined at a predetermined angle with respect to the first slide surface. A slide base is slidably mounted on the second slide surface of the saddle for movement in a direction of Y-axis perpendicular to the Z-axis. A column extends from the slide base substantially perpendicular thereto and includes a column body which has a guide surface in a direction of X-axis perpendicular to the Z-axis and to the Y-axis. A cross slide is slidably mounted on the guide surface of the column body in the direction of the X-axis and includes a driving device. A tool spindle is rotatably mounted on the cross slide around B-axis perpendicular to the X-axis and to the Z axis and has a spindle rotatable around an axis perpendicular to the B-axis.

1. Field of the Invention
The present invention relates to a carriage structure of an NC lathe.
2. Description of the Prior Art
In a conventional NC lathe for machining a work W to form a shape as shown in FIGS. 31 to 33, an initial set-up step including an operation for chucking the work W and a subsequent operation for centering the work W by a tailstock and bracing means. A first machining step is thereafter performed and includes a turning operation for an outer surface of the work W to form a stepped portion 1 having surfaces 1a, 1b and 1c, another turning operation to form an inner surface 2 and an operation for threading the surface 1a to form a thread 3.
A second machining step is subsequently performed to form a flange portion 4 and its end portion 5. Before performing the second machining step, the work W machined through the first machining step is removed from a chuck of the NC lathe and is thereafter again mounted on the chuck at an inverted position. The work W thus mounted on the chuck is centered for the second machining step.
The work W machined through the second machining step is transferred to a vertical machining center at which the work W is again centered for a third machining step to form a key recess 6 and to machine first fl at surfaces 7 and second flat surfaces 8 through indexing operations. The work W machined through the third machining step is thereafter transferred to a horizontal machining center at which the work is again centered for a fourth machining step to finally form holes 9 on the end portion 5 through a drill-tapping operation.
The above conventional machining steps, however, consumes much time for transferring the work W for each subsequent machining step and also consumes much time for centering the work W at each subsequent machining step. Further, this may degrade the quality of the work W and cause problems in introduction of automatic operation.


Discloses are a transmission line having variable characteristic impedance and a combiner configured to combine a plurality of filter by use of the transmission line. The transmission line in accordance with an embodiment of the present invention includes: a first filter junction being connected with a first RF filter and configured to obtain an output signal of the first RF filter; a second filter junction being connected with a second RF filter and configured to obtain an output signal of the second RF filter; a first variable impedance section in which a phase of the output signal of the first RF filter is matched with a preset phase; and a second variable impedance section in which a phase of the output signal of the second RF filter is matched with the preset phase.

1. Technical Field
The present invention relates to a high-frequency signal transmission line, more specifically to a transmission line having variable characteristic impedance and a combiner for combining a plurality of filters using the same.
2. Background Art
RF signal transmitters used for mobile communication base stations divide the output signal into a plurality of identical signals, amplify the divided signals and recombine these signals, in order to increase the transmission output.
A base station transceiver of a mobile communication system is constituted with a splitter for splitting an inputted RF signal such as a subscriber signal, a power amplifier for high-power-amplifying each of the RF signals split by the splitter, and a combiner for combining the RF signals amplified by the power amplifier.
In the conventional base station base station transceiver, the power amplifier high-power-amplifies each of the RF signals split by the splitter, and then the RF signals high-power-amplified by the power amplifier are combined and outputted through the combiner.
The combiner uses simple power distribution and combining technologies, and thus shows a good signal combining property only when RF signals having identical signal characteristics, i.e., identical amplitude, identical time delay and identical phase, are inputted. When the signal characteristics are different from one another, the combining property is degraded, and reflected wave signals are inputted to the power amplifier.
The frequency band provided to mobile communication services can be constituted with a plurality of non-contiguous sub-frequency bands. Accordingly, a plurality of band pass filters (BPF) are used to filter out frequency bands that are not used for the services, and signals that have passed through the plurality of BPFs are combined to a single signal and transmitted through the combiner.
As various bands of frequencies, ranging from a few hundred MHz to a few GHz, are used in mobile communication services, problems caused by different signal characteristics can occur when various output signals that have passed through the plurality of BPFs are combined to and transmitted as a single signal.

Transmission line having variable characteristic impedance


A vertical ceramic wafer boat for supporting a silicon wafer having a predetermined radius R. The wafer boat comprises a base and a pair of column racks. The column racks extend generally vertically upwards from the base. Each column rack includes at least one arm having an arcuate section. Each arcuate section is sized to provide substantial support for a 0.7 R boundary region of the wafer and spans an arc of less than 180 degrees.

The present invention relates to semiconductor manufacturing. More specifically, the present invention relates to wafer boats having wafer support arms that contact and support a wafer along an arc of a circle.
Although other materials may be used, e.g., Silicon-Germanium (SiGe) or Galium Arsenide (GaAs), Silicon (Si) is presently the most important semiconductor for the electronics industry. Very Large Scale Integrated (VLSI) circuit technology (i.e., up to about 100,000 devices per chip), and Ultra Large Scale Integrated (ULSI) circuit technology (i.e., more than 100,000 and in some cases exceeding one billion devices per chip) being based almost entirely on silicon.
It is critical that the fabrication of VLSI and ULSI circuits which take place on silicon substrates possess very high crystalline perfection or purity. That is, in crystalline solids, the atoms which make up the solid are spatially arranged in a periodic fashion. If the periodic arrangement exists throughout the entire solid, the substance is defined as being formed of a single crystal. The periodic arrangement of the atoms in the crystal is called the lattice. Very high crystalline perfection requires that the silicon substrate possess a minimum of impurities and structural defects throughout its single crystal silicon lattice.
Generally, raw material, e.g., quartzite, is refined into electronic grade polysilicon (EGS) and melted. A silicon seed crystal is than used to grow a single crystal silicon ingot from the molten EGS. The ingot is than precisely sliced and polished into silicon wafers. The silicon wafers provide the substrates upon which VLSI and ULSI circuits are ultimately built through a complex sequence of wafer fabrication processes.
The increasing size of silicon wafers is one of the most obvious trends in silicon material technology. Presently, 300 mm diameter wafers are expected to ultimately replace most 150 mm and 200 mm wafer applications. It is also predicted that 400 mm wafers will probably be introduced in the not too distant future. The use of larger diameter wafers for maintaining productivity presents several major challenges to semiconductor manufactures. For example, facilities with equipment capable of handling the larger wafers, e.g., vertical furnaces, must be built. New patterning techniques must be developed to print smaller feature sizes over larger areas. The larger wafers must also be thicker to increase their resistance to warping and other structural deformations. Moreover, the larger wafers are also heavier, requiring the use of automated wafer transport systems.
As the silicon wafers become bigger and heavier, the problem of preventing impurities and structural defects to the lattice, i.e., of maintaining very high crystalline perfection, becomes even more critical. Two such structural defects, which becomes especially problematic in 300 mm silicon wafers and larger, are that of xe2x80x9cback side damagexe2x80x9d and xe2x80x9cslipxe2x80x9d in the lattice structure.
Back side damage is when a wafer moves across a surface of a wafer support device, causing scratches in the back side of the wafer.
Slip in silicon wafers is a function of the stress applied to the wafer. This stress can be mechanical (e.g., frictionally induced) and/or thermal. As the wafers are stressed, the crystal lattice undergoes elastic deformation that disappears as the solid crystal returns to its original position upon release of the stress. However, severe stress leads to slip, which is the plastic or permanent deformation in the crystal lattice, which remains when the stress is released. Slip occurs when the elastic limit (or yield strength) of the silicon is exceeded and the lattice becomes permanently misaligned.
Slip is common during high temperature processing of silicon wafers in heat treatment furnaces (furnacing operations), as thermal stress is proportional to the processing temperature. The transition temperature from brittle to ductile behavior of the wafer is generally within the range of about 720 to 1000 degrees C. Therefore slip, whether induced by thermal or mechanical stress, becomes especially problematic at process temperatures above 720 degrees C.
Wafer boats are wafer support devices, which are subjected to furnacing operations during semiconductor wafer processing. Horizontal wafer boats are typically designed to support a horizontal row of wafers, which are inserted into a horizontal furnace tube for high temperature processing. Vertical wafer boats are typically designed to support a vertical stack of wafers, which are inserted into a vertical furnace tube. Generally, for large diameter silicon wafers, e.g., 300 mm, vertical wafer boats are more commonly used. This is because vertical furnaces have a smaller foot print than horizontal furnaces and therefore take up less of the expensive manufacturing space. Additionally, vertical furnaces generally demonstrate better temperature control than horizontal furnaces.
Wafer boats are generally composed of ceramic materials. Ceramic materials, which are joined by ionic or covalent bonds, are typically composed of complex compounds containing both metallic and non metallic elements. Ceramics typically are hard, brittle, high melting point materials with low electrical and thermal conductivity, good chemical and thermal stability, and high compressive strengths. Examples of ceramic materials are quartz, silicon carbide (SiC) and recrystalized SiC. One such recrystallized SiC is available from Saint-Gobain Ceramics and Plastics, Inc., of Worcester, Mass., under the trade name CRYSTAR(copyright). This material is a silicon carbide ceramic that has been impregnated with high purity silicon metal.
Referring to FIG. 1, a typical prior art vertical wafer boat 10 generally includes three or four support rods 12 extending vertically upwards from a generally circular horizontal base 14, and spaced radially along the periphery of the base. The rods 12 have a plurality of cantilevered wafer support arms (or teeth) 16 supported only at one end, which extend inwardly toward the center of the base 14 to define a series of slots therebetween. The slots are sized to receive the silicon wafers, which are supported by the arms 16 during furnacing operations.
Problematically for larger wafers, the prior art wafer support arms 16 provide most of their support at the outer periphery of the wafer. Accordingly, most of the weight of the wafer is unsupported and distributed toward its center. Therefore, during high temperature thermal processing, the center of the wafers tend to sag, promoting slip in the crystal lattice of the wafer.
Because of the geometry of the circular wafers, substantially half of the weight of the wafer, i.e., the inner wafer weight, is distributed within a circular area that is 70 percent the radius (R) of the wafer. Conversely, half of the weight of the wafer, i.e., the outer wafer weight, is distributed over a doughnut shaped area that has an inner radius of 0.7 R and an outer radius of 1.0 R. As a result, supporting the wafers at or about the 0.7 R circular boundary region of a wafer, e.g., from 0.6 R to 0.8 R, balances the inner and outer wafer weights and greatly reduces the potential for sagging during high temperature thermal processing.
Current prior art boat designs require deep slots, thereby making the arms 16 of the support rods 12 long enough to extend to the 0.7 R point. However, manufacturing this geometry is cumbersome due to the precise machining required and the inherently low yield rates. Also the added length of the cantilevered arms impose a large moment force at the single support point where the arm attaches to the rod body, unduly increasing the probability of failure or breakage. Moreover, because the arms provide support at only three or four small discrete areas on the wafers, the possibility of back side damage is enhanced for the heavier wafers.
One prior art attempt to solve this problem, is to provide a plurality of discrete circular ceramic rings, having an inner radius smaller than 0.7 R and an outer radius greater that 0.7 R. The rings would be slid into each slot and the wafers would then rest upon each ceramic ring.
However, each ring typically costs in the range of one thousand to two thousand dollars to manufacture, greatly adding to the cost of the boat. Additionally, the rings essentially enclose the support area where the wafers rest. This makes it difficult for conventional transfer equipment to get between the rings and wafers in order to remove the wafers from the slots. Additionally, the enclosed design impedes the free flow of gasses that are often important to the processing of the wafers. Also, since the rings typically add up to 100 additional discrete moving parts to the boats (one for each slot), the potential for generating particles or other impurities is greatly enhanced. That is, the ceramic rings can rub against the wafer support arms during processing or handling, and frictionally rub off microscopic particles which can damage the semiconductor circuitry of the wafers.
Accordingly, there is a need for an improved wafer boat, which can provide enhanced support to reduce wafer sag and minimize slip in large diameter silicon wafers, while also providing maximum openness for material handling, at a reasonable cost.
The present invention offers advantages and alternatives over the prior art by providing a wafer boat for supporting a silicon wafer with a predetermined radius of R. The wafer boat having wafer support arms that support the wafer along an arc of a circle that is substantially 0.7 R and that span less than 180 degrees of arc.
The invention provides a substantial number of advantages over the prior art. Since each wafer is being supported along a substantial portion of its 0.7 boundary region, sagging of the center portion of the wafer is greatly reduced. Additionally, the arcuate sections 50 do not enclose a full circle, therefore leaving a substantial open area for gas flow and material handling equipment.
These and other advantages are accomplished in an exemplary embodiment of the invention by providing a vertical ceramic wafer boat for supporting a silicon wafer having a predetermined radius R. The wafer boat comprises a base and a pair of column racks. The column racks extend generally vertically upwards from the base. Each column rack includes at least one arm having an arcuate section. Each arcuate section is sized to provide substantial support for a 0.7 R boundary region of the wafer and spans an arc of less than 180 degrees.
In an alternative embodiment of the invention, the arcuate sections can include a radius of from 0.6 R to 0.8 R or span an arc of from 90 to 135 degrees.
In another embodiment of the invention the base and the pair of column racks of the wafer boat form a single monolithic structure for supporting the wafer.
In another alternative embodiment of the invention, for each arcuate section of one column rack there is an opposing arcuate section on the other column rack for supporting the same wafer. Each of the opposing arcuate sections are oriented to support substantially half the weight of the wafer.

Wafer boat with arcuate wafer support arms


This invention relates to the topical ocular use of non-peptide bradykinin receptor antagonists to treat glaucoma and ocular hypertension.

The present invention relates to the topical ocular use of non-peptide bradykinin receptor antagonists to treat glaucoma and ocular hypertension.
Glaucoma is a progressive disease which leads to optic nerve damage and, ultimately, a total loss of vision. The causes of this disease have been the subject of extensive studies for many years, but are still not fully understood. The principal symptom of, and/or risk factor for, the disease is elevated intraocular pressure or ocular hypertension due to excess aqueous humor in the anterior chamber of the eye.
The reasons why aqueous humor accumulates are not fully understood. It is known that elevated intraocular pressure (xe2x80x9cIOPxe2x80x9d) can be at least partially controlled by administering drugs which reduce either the production of aqueous humor within the eye, such as beta-blockers and carbonic anhydrase inhibitors, or increase the flow of aqueous humor out of the eye, such as miotics and sympathomimetics.
The pharmaceutical approaches currently being pursued in the treatment of glaucoma have exhibited various side effects. Miotics such as pilocarpine can cause blurring of vision and other visual side effects, which may lead either to decreased patient compliance or to termination of therapy. Systemically administered carbonic anhydrase inhibitors can also cause serious side effects, such as nausea, dyspepsia, fatigue, and metabolic acidosis which can affect patient compliance and/or necessitate the withdrawal of treatment. Moreover, some beta-blockers have increasingly become associated with serious pulmonary side effects attributable to their effects on beta-2 receptors in pulmonary tissue. Sympathomimetics cause tachycardia, arrhythmia and hypertension. There is therefore a continuing need for therapies which control the elevated intraocular pressure associated with glaucoma.
Bradykinin or xe2x80x9cBK,xe2x80x9d is an endogenous peptide made up of nine amino acids (i.e., Arg-Pro-Pro-Gly-Phe-Ser-Pro-Phe-Arg). BK is found in many organs, including the eye. BK exhibits many biological effects in the body, including tissue contraction, fluid and ion secretion and pain inducement (Regoli and Barabe, Pharmacol. Rev., volume 32, pages 1-46 (1980) and Hall, Pharmacol. Ther., volume 56, pages 131-190 (1992)).
BK and another endogenous peptide, Lys-BK, bind to two major BK receptor-subtypes. namely B1 and B2, to produce their biological effects. The B2-subtype is found to be expressed under normal physiological conditions, while the B1-subtype is induced during injury or trauma (Regoli, and Barabe, Pharmacol. Rev., and Hall, Pharmacol. Ther.). While the B1-subtype has a low affinity for BK and a high affinity for Des-Arg9-BK and Lys-BK, the B2-subtype has a high affinity for BK and Lys-BK but a low affinity for Des-Arg9-BK.
Both receptor subtypes have been cloned and shown to be coupled to G-proteins and phospholipase C, and their activation results in the generation of the second messengers inositol trisphosphate (xe2x80x9cIP3xe2x80x9d) and diacylglycerol (xe2x80x9cDAGxe2x80x9d) (Hall, Pharmacol. Ther.). The signal transduction of BK receptor binding results in IP3-stimulated mobilization of intracellular Ca2+, followed by DAG phosphorylation of protein kinase C. Together, these events lead to the final biological response, such as tissue contraction or fluid secretion.
The majority of the physiological and pathological effects of BK are mediated by the B2-receptor-subtype. However, recent pharmacological evidence points to two additional BK-receptor subtypes, namely B3 and B4 (Hall, Pharmacol. Ther., and Sharma, Gen. Pharmacol., volume 24, pages 267-274, (1993)). The B3 and B4 receptor subtypes are actually stimulated by certain peptide BK antagonists, whereas the B1 and B2 subtypes are blocked by those antagonists (Sharma, Gen. Pharmacol.). While the presence of B3 or B4 receptor subtypes in the eye has not been investigated, it is believed they may be present since there is a robust BK-precursor and BK-generating enzyme pool in human ocular tissues and also the presence of the B1 and B2 receptors (Ma et al., Exp. Eye Res., volume 63, pages 19-26, (1996)).
Most of the previously described BK antagonists have been peptides of limited potency and selectivity (Regoli et al., Trends in Pharmacol. Sci., volume 11, pages 156-161, (1990) and Hall, Pharmacol. Ther.). Peptides are labile, highly polar and, therefore, difficult to formulate and deliver to the site of treatment (Sharma, Gen. Pharmacol.). Such peptides would be especially difficult to formulate for topical administration to the eye due to the relatively impenetrable thick scleral and corneal/conjunctival covering of the eye.
Nowhere in the art has it been disclosed, taught or suggested to use non-peptide BK antagonists to treat ocular hypertension and glaucoma.
The present invention is directed to compositions and methods for the treatment of glaucoma and ocular hypertension. More specifically, the present invention is directed to topical ophthalmic compositions containing one or more bradykinin antagonists and methods of treating glaucoma and ocular hypertension.
The compositions and methods of the present invention employ antagonists to bradykinin receptors which are relatively stable and bioavailable to the relevant ocular tissues. As stated above, previous BK antagonists have been peptides and thus labile and of low bioavailability. The present invention compositions and methods, in contrast, are directed to stabile, bioavailable non-peptide BK antagonists. Preferred compositions and methods are directed to bradykinin B2 receptor antagonists.
The present invention provides compositions and methods of their use in treating glaucoma and ocular hypertension. More specifically, the present invention is directed to ophthalmic compositions comprising non-peptide bradykinin antagonists and methods of use in treating glaucoma and ocular hypertension.
While applicants do not wish to be bound by any theory, it is believed that BK causes an elevation in IOP by either inhibiting outflow of aqueous humor or increasing the production of aqueous humor. Thus, the administration of BK antagonists to the eye is thought to inhibit BK""s receptor action and hence stabilize or lower IOP.
It has been shown that injection of BK in the eyes of animals (e.g., rabbits) causes pupil constriction and increases IOP (Cole and Ungar, Ophthalmol Res., volume 6, pages 308-314 (1974)) by inhibiting the outflow of aqueous humor (Llobet, Invest. Ophthalmol. Vis. Sci. (suppl) volume 37, Abstract No. 953 (1996)). As stated above, increased IOP can lead to ocular hypertension, a major risk factor in the etiology of glaucoma.
The trabecular meshwork in the anterior chamber of the eye represents the primary locus for aqueous humor drainage, which apparently regulates IOP (xe2x80x9cconventional outflowxe2x80x9d). Defects(s) in this filtration system may underlie the etiology of open angle glaucoma. specifically by raising IOP. While the phagocytic action of trabecular meshwork cells appears important, the muscle-like tension in the trabecular meshwork may also contribute to the drainage of the aqueous humor to provide an homeostatic control of IOP. Recently, functional BK B2 receptors have been discovered on the surfaces of human trabecular meshwork cells (Sharif and Xu, Exp. Eye Res., volume 63, pages 631-637 (1996)). Thus, it is believed that BK may aberrantly contract the ciliary muscle and/or the trabecular meshwork, in addition to activating the ciliary epithelium, to produce its IOP-elevating effects.
The actions of BK on the ciliary epithelium to stimulate the production of aqueous humor (i.e., enhance inflow) may also result in IOP elevation. Therefore, the inventors believe that pharmacological agents which block the effects of BK in the anterior chamber will lower IOP and result in ocular hypotension, which in turn would reduce the risk for development of glaucoma.
Bradykinin receptors have been classified into at least four receptor subtypes. These subtypes include B1, B2, B3 and B4. Other subtypes may be elucidated in the future. For purposes of the present invention, all of these subtypes are included in the definition, xe2x80x9cbradykinin receptor.xe2x80x9d
The compositions of the present invention will comprise one or more bradykinin receptor antagonists in a suitable pharmaceutical vehicle. As used herein, a xe2x80x9cbradykinin antagonistxe2x80x9d or xe2x80x9cBK antagonistxe2x80x9d refers to a compound of the present invention which inhibits the binding of bradykinin to a bradykinin receptor and therefore prevents activation of the receptor. The BK antagonists of the present invention are selected from various chemical classes, except linear monomeric peptide classes, e.g., HOE 140. Such classes of BK antagonists of the present invention include non-peptide BK-antagonists, cyclic peptides antagonists, peptide dimer antagonists, cyclic organic molecule antagonists, peptidomimetic antagonists, or other classes of BK-antagonists which are not readily hydrolizable, in contrast to linear peptides. As used herein, the term xe2x80x9cnon-peptide BK antagonistxe2x80x9d refers to those BK antagonists which are not linear, monomeric peptides.
Examples of organic non-peptide BK antagonists of the present invention include FR173657 ((E)-3-(6-acetamido-3-pyridyl)-N-[N-[2,4-dichloro-3-[(2-methyl-8-quinolinyl) oxymethyl]phenyl]-N-methylaminocarbonylmethyl]acrylamide); FR167344 (N-[N-[3-[3-bromo-2-methylimdazo[1,2-a]pyridin-8-yl)oxymethyl]2,4-dichlorophenyl]N-methyl-aminocarbonylmethyl]-4-(dimethylaminocarbonyl)cinnamylamide hydrochlroide); WIN-64338 ([4-{(2[{bis(cyclohexylamino)methylene}amino]-3-[2-naphthyl]-1-oxopropyl) amino}phenyl]methyl) tributylphosphonium chloride monohydrochloride); WIN-62319; CP-2458; and others described in Abe et al., J. Med. Chem., volume 41, pages 564-578 (1998) and Salvino et al., J. Med. Chem., volume 36, pages 2583-2584 (1993); the entire content of the foregoing publications are incorporated herein by reference to the extent such publications disclose non-peptide BK antagonists of the present invention.
Examples of bissuccinimide-alkane peptide dimer BK antagonists of the present invention include CP-0127, CP-0364, and other compounds described in Cheronis et al, J. Med Chem., volume 37, pages 348-355 (1994); J. Med. Chem., volume 35, pages 1563-1572 (1992); and Srivastava et al., Immunopharmacol., volume 33, pages 194-197 (1996); the entire contents of the foregoing publications are incorporated herein by reference to the extent such publications disclose non-peptide BK antagonists of the present invention.
Other examples of psuedopeptide BK antagonists of the present invention include NPC-18521, NPC-18688 and others described in Mavunkel et al., J. Med Chem., volume 39, pages 3169-3172 (1996), the entire contents of which is incorporated herein by reference to the extent such publications discloses non-peptide BK antagonists of the present invention.
The non-peptide BK antagonists of the present invention may also be readily elucidated by employing the following bradykinin receptor and/or cellular functional assays:
Bradykinin receptor binding assays. Sharif and Whiting have described this type of receptor binding assay in: Sharif and Whiting, Neurochemical Res., volume 12, pages 1313-1320 (1993); and Sharif and Whiting, Neurochem. Internat., volume 18, pages 89-96 (1991), the entire contents of which are incorporated herein by reference, and which may be modified as described below, for the elucidation of non-peptide BK antagonists of the present invention. Briefly, cells (e.g., HSDM1C1, TM3 or CEPI-17-CL4) or tissues (e.g., guinea pig ileum, lung or brain) bearing the constitutive B2-BK receptor or cells genetically engineered to express such receptors, are harvested and gently homogenized in 25 mM TES (N-Tris[hydroxymethyl]methyl-a-aminoethansulfonic acid) buffer (pH 6.8, containing 1 mM 1.10 phenanthroline and a mixture of various peptide inhibitors (140 xcexcg/ml bacitracin, 1 xcexcM captopril. 1 mM dithiothreitol and 0.1% bovine serum albumin) using a Polytron tissue disrupter (setting xe2x80x9c3-5xe2x80x9d for 5-8 seconds). The homogenates are centrifuged at 30,000xc3x97g (20 minutes at 4xc2x0 C.) and the cell pellets gently dispersed in the above-described TES buffer (at 10-30 mg wet weight tissue/ml) for the binding assay. The resuspended cell or tissue pellet homogenates (400 xcexcl aliquots) are incubated with 50 xcexcl of various concentrations of the test unlabeled, non-peptide BK antagonist candidate (1 pM-10 xcexcM final concentrations) or buffer and 50 xcexcl of [3H]-BK (0.5 nM final concentration) in polypropylene tubes at 23xc2x0 C. for 90 minutes in order to reach equilibrium. Non-specific binding is determined using 10 xcexcM unlabeled BK. The assay is terminated by rapid vacuum filtration on a Tomtec cell harvester through Wallac xe2x80x9cBxe2x80x9d glass fiber filters (pre-soaked in 0.3% polyethyleneimine) using three 3 ml ice-cold 50 mM Tris HCl buffer (pH 7.4) washes. Receptor-bound radioactivity captured on the filter is measured by liquid scintillation spectrometry on a Wallac Beta-scintillation counter. Data analysis is performed using a standard non-linear, iterative curve-fitting computer program to determine the affinity (Ki, defined as the concentration required to inhibit [3]-BK binding by 50% and indicating the ability of the compound to bind to the receptor) of the BK antagonist for the BK receptor. BK antagonists having a Kixe2x89xa61xc3x9710xe2x88x927M (i.e., affinity 24 100 nM) are within the non-peptide BK antagonist definition of the present invention.
Cellular functional assay. Sharif and Xu have described this type of functional assay in: Sharif and Xu, Exp. Eye Res., volume 63, pages 631-637 (1996), the entire contents of which are incorporated herein by reference, and which may be modified as described below, for the elucidation of the BK antagonists of the present invention. Briefly, cells bearing the constitutive B2-BK receptor (e.g., HSDM1C1, TM3 or CEPI-17-CL4) or cells genetically engineered to express such receptors are grown in sterile 24-well culture plates and are incubated with [3H]-myo-inositol (2 xcexcCi/ml; 15-17 Ci/mmol) in sterile culture medium for 24 hours at 37xc2x0 C. in order to label the cell membrane phosphoinositide lipids. The medium is then aspirated and the cells exposed to BK in sterile culture medium (15 mM HEPES buffer) containing 10 mM LiCl for 60 minutes at 37xc2x0 C. in order to facilitate the accumulation of [3H]-inositol phosphates ([3H]-IPs) (Berridge et al., Biochem. J., volume 206, pages 587-595 (1982)). To determine the potency and/or efficacy of a non-peptide BK antagonist candidate, the candidates are added (1 pM-10 xcexcM final concentrations) to the cells 30 minutes prior to the addition of BK (e.g., 1 xcexcM final concentration). The medium is aspirated at the end of the incubation, and the assay terminated by the addition of 1 ml of ice-cold 0.1M formic acid and the [3H]-IPs quantified by standard ion exchange chromatography (Berridge et al. 1982) and liquid scintillation spectrometry on a beta-counter. Data analysis is performed using a standard non-linear, iterative curve-fitting computer program to determine the potency (Ki, defined as the concentration required to inhibit the BK-induced [3H]-IPs accumulation by 50% and indicating the ability of the antagonist to block the agonist-induced functional response) of the BK antagonist for the BK receptor. BK antagonists with a Kixe2x89xa61xc3x9710xe2x88x927 M (i.e. potency xe2x89xa7100 nM) are within the non-peptide BK antagonist definition of the present invention.
Preferred BK antagonists of the present invention are those antagonists which are: 1) potent BK antagonists; 2) relatively hydrophobic for topical uptake and rapid penetration; 3) non-labile; and 4) exhibit a low occurrence of side-effects. BK antagonists which inhibit the activation of the B2 receptor are most preferred BK antagonists of the present invention. Examples of B2 receptor antagonists include FR173657 ((E)-3-(6-acetamido-3-pyridyl)-N-[-[2,4-dichloro-3-[(2-methyl-8-quinolinyl) xymethyl]phenyl]-N methylaminocarbonylmethyl]acrylamide); FR167344 (N-[N-[3-[3-bromo-2-methylimdazo[1,2-a]pyridin-8-yl)oxymethyl]2,4-dichlorophenyl]N-methylaminocarbonylmethyl]4-(dimethylaminocarbonyl)cinnamylamide hydrochlroide); WIN-64338 ([4-{(2[{bis(cyclohexylamino)methylene}amino]-3-[2-naphthyl]-1-oxopropyl)amino}phenyl]methyl) tributylphosphonium chloride monohydrochloride); WIN-62318, CP-2458, CP-0127, CP-0364, NPC-18521 and NPC-18688.
The BK antagonists of the present invention are useful in lowering intraocular pressure and thus are useful in the treatment of ocular hypertension or glaucoma. As used herein, the term xe2x80x9cpharmaceutically effective amountxe2x80x9d refers to that amount of one or more BK antagonist(s), which controls IOP when administered to a mammal. As used herein, the word xe2x80x9ccontrols,xe2x80x9d as used in the previous sentence, refers to lowering IOP or stabilizing IOP, i.e., preventing an increase in IOP. The compounds of the present invention can be administered as solutions, suspensions, or emulsions (dispersions) in a suitable ophthalmic vehicle. The preferred route of administration is topical.
In preparing present invention compositions for topical administration, the BK antagonists are generally formulated from about 0.00005 to about 0.5 percent by weight (wt %). The BK antagonists are preferably formulated between about 0.0003 to about 0.3 wt % and, most preferably, between about 0.0005 and about 0.03 wt %. In general, the compositions will be solutions, having a pH between 4.5 to 7.4. While the precise regimen is left to the discretion of the clinician, the resulting solution or solutions are preferably administered by placing one drop of each solution(s) in each eye one to four times a day, or as directed by the clinician.
Other ingredients which may be desirable to use in the ophthalmic preparations of the present invention include preservatives, co-solvents, buffers, viscosity building agents and penetration enhancers. Viscosity building agents, such as hydroxymethyl cellulose, hydroxyethyl cellulose, methylcellulose, polyvinylpyrolidine, or the like, may be added to the compositions of the present invention to improve the retention of the compound in the conjunctival sac or surrounding area. In order to prepare a sterile ophthalmic ointment formulations, the BK antagonist may be combined with a preservative in an appropriate vehicle, such as white petroleum, mineral oil or liquid lanolin. Sterile ophthalmic gel formulations may be prepared by suspending the BK antagonist in a hydrophilic base prepared from the combination of, for example, carbopol-940, or the like, according to the methods known in the art for other ophthalmic formulations. Other compositions of the resent invention may contain penetration enhancing agents such as cremephor and tween 80, in the event the BK antagonists are less penetrating in the eye.
As used herein, the term xe2x80x9cpharmaceutically acceptable ophthalmic vehiclexe2x80x9d refers to those vehicles which cause at most, little to no ocular irritation, provide suitable preservation if needed, and deliver one or more BK antagonists of the present invention in a homogenous dosage.
Preferred formulations of BK antagonists of the present invention include the following Examples 1-4:

Non-peptide bradykinin receptor antagonists for use in controlling intraocular pressure and treating glaucoma


A coding circuit for generating an error correction code from digital data to be recorded in a record medium, includes a buffer manager which successively reads the digital data m bytes at a time from a temporal storage memory in a main scan direction and in a sub-scan direction, a PI parity unit which processes the data m bytes at a time, as the m bytes are supplied from the buffer manager, and generates a PI sequence parity based on the data for one row extending in the main scan direction, and a PO parity unit which includes in operation units, each of which processes a corresponding byte of the data, as m bytes of the digital data are supplied from the buffer manager, and generates a PO sequence parity based on the data for one column extending in the sub-scan direction.

1. Field of the Invention
The present invention generally relates to encode-data processors, and particularly relates to an encode-data processor used in an optical disk drive which records data on a DVD+RW-type optical disk.
2. Description of the Related Art
Conventional technologies relating to coding methods and coding circuits for use in the recording of DVD disks can be classified into two categories. One relates to the encoding of data by use of an ECC correction circuit that is used for decoding, as described in Patent Document 1. The other relates to the use of a coding circuit dedicated for the encoding purpose, as described in Patent Document 2.
The former has an advantage in that the same circuit as an ECC correction circuit for use in decoding can be utilized. Since such circuit is not optimized for data encoding purposes, difficulties are in abundance in the attainment of higher speed.
The latter can relatively easily attain higher speed because of the use of a coding circuit dedicated for encoding. It is not known, however, what circuit construction is suitable for such a coding circuit.    [Patent Document 1] Japanese Patent Application Publication No. 2001-319431    [Patent Document 2] Japanese Patent Application Publication No. 2001-156649
In recent years, there has been an increasing demand for higher recording speed with respect to DVD disks. Accordingly, there is a need for a coding circuit that is fast and efficient in recording data on a DVD disk.

Coding circuit for recording data on DVD disk


A display apparatus having a heat dissipating structure for a driver integrated circuit is provided. The display apparatus may be a plasma display apparatus including a chassis base, a plasma display panel (PDP) adjacent to a first side of the chassis base, and a driving circuit board attached on a second side of the chassis base, the second side being opposite to the first side where the PDP is attached. The plasma display apparatus also includes a driver integrated circuit (IC) electrically connected to electrodes of the PDP and the driving circuit board at a position therebetween, the driver IC selectively providing a voltage to the electrodes of the PDP in accordance with signals controlled by the driving circuit board. The plasma display apparatus also has a heat dissipation unit positioned at the edge of the PDP wherein the heat dissipation unit dissipates heat from the driver IC.

1. Field of the Invention
The present invention relates to a display apparatus and, in particular, to a plasma display apparatus having a heat dissipating structure for a driver integrated circuit.
2. Description of the Related Art
There are many display devices available today. One such display device is a plasma display device. It is well known that a plasma display apparatus uses plasma generated by gas discharge to produce an image on a plasma display panel (PDP). In the plasma display apparatus, electrodes printed on the PDP are connected electrically to a driving circuit, and a driver integrated circuit (IC) provides the electrodes with an address voltage in accordance with signals controlled by the driving circuit.
Exemplary structures using a driver IC to provide the voltage are a chip on board (COB), in which the driver IC is installed on a printed circuit board (PCB), and a chip on film (COF), in which the driver IC is installed on a film composing a flexible printed circuit (FPC). Other exemplary structures used to provide the voltage are a tape carrier package (TCP) in which the driver IC is packaged in a tape shape, and a chip on glass (COG), in which the driver IC is installed directly on the glass substrate of the PDP.
The COG-type has an advantage of reducing the size of the PDP because the driver IC is on a glass substrate of the PDP and electrically connects the electrodes formed on the glass substrate to the terminals of the FPC.
However, the COG-type driver IC produces a large amount of heat. This is partially due to gas discharge occurring at least 8 times in 1/60 second (1 TV field) which generates more than 256 gradations in the PDP. As a result, the heat may cause breakdown of the driver IC and degradation in the picture quality due to image sticking resulting from phosphor degradation by the heat.

Display apparatus having heat dissipating structure for driver integrated circuit


The present invention has a wrist connector connected to a conventional slat connection member. An electrically activated liner actuator which includes a linearly movable shaft is connected to the wrist connector to move the slat connection member fore or aft. The actuator is electrically controlled from an electrical control box located in the cab. Further, the actuator provides an electrical signal output responsive to the linear position of the shaft. This output signal is directed to the control box which has a meter driven by this output signal to provide a visual indication of how far the openings are opened or closed.

Conventional combines have sieves that function to separate kernels of grain from chaff and other foreign objects. The sieve is constructed of spaced apart slats mounted in parallel relation. A pivot bracket is mounted at one end of each slat. The pivot brackets are connected together with a slat connection member such as shown in U.S. Pat. No. 4,712,568, to Strong et al. As the slat connection member is moved fore and aft the slats are rotated in a manner similar to the operation of a Venetian blind. The rotation causes the openings in the sieve to open and close.
If the openings in the sieves are not adjusted properly, a combine will throw a considerable amount of grain away with the chaff. On older combines, the operator may not even be aware this is happening. Newer combines usually have a "grain loss monitor" in the exhaust path. But even when this instrument begins to show a loss trend, in most instances the operator still has to get out of the cab, walk to the rear of the combine, and then manually adjust the openings in the sieves. Sometimes he has to perform this operation several times as he "homes in" on the correct opening in the sieves for the grain conditions being encountered.
Several patents have addressed the problem of enabling a combine operator to adjust the sieve openings. For example, see U.S. Pat. No. 4,712,568, to Strong et al. This patent shows a handle for manipulating the sieve openings. U.S. Pat. No. 4,897,072 to Bestland shows a flexible pipe mechanically connected between a sieve and the cab of a combine so that an operator can turn a crank in the cab to mechanically adjust the opening of a single sieve. With this apparatus a single hand crank is associated with a single sieve and the apparatus provides no indication as to how far open or how far closed each sieve is adjusted when turning the crank.
From the above it can be seen that what is needed is a remote sieve adjusting apparatus which can easily control the sieve openings from a combine cab and further provide a visual indication as to how far the sieve openings are opened or closed.


The present invention relates to a method for increasing the efficiency of inducing pluripotent stem cells by utilizing genes Jhdm1a that modify histone. By utilizing Jhdm1a, and a stem cell inducing factor, the present invention increases the efficiency of inducing pluripotent stem cells and increases the quality of induced pluripotent stem cells. The stem cell inducing factor is a combination of Oct4 and Klf4, or a combination of Sox2, Oct4, and Klf4, or a combination of Oct4 and Sox2, and Oct4 alone. The method further comprises exposing the cells to vitamin C, which further increases the efficiency of inducing pluripotent stem cells as compared with the case where no vitamin C is used. By using less stem cell reducing factors, the method of the present invention reduces the potential carcinogenicity, obtains a high inducing efficiency, and provides high-quality induced pluripotent stem cells capable of germ-line transmission.

The present invention relates to a method for increasing the efficiency of inducing pluripotent stem cells, and more particularly, to a method for increasing the efficiency of inducing pluripotent stem cells by utilizing genes Jhdm1b and Jhdm1a that modify histone.
China is a populous country in the world and also has the highest number of organ losses, damages, failures, and functional disorders as a result of trauma, disease, aging, and heredity. Classical medical therapies based on drugs and surgeries have failed to satisfy the tremendous demand of clinical medicine. As a result, the research on the stem cells and the regenerative medicine attracts the attention of numerous research entities and all sectors of the society.
The cell transplantation therapy constitutes an important research direction of the regenerative medicine, and specific types of cell transplantations may be used to treat heart injury, nervous system degenerative diseases, spinal injury, renal failure, hematological system diseases, and so on. However, the cell transplantation therapy is facing many intricate problems such as allograft rejection and limited cell sources.
The stem cell is a type of cell capable of selfrenewal and can differentiate into various functional cells under certain conditions. Based on their development stage, the stem cells are divided into embryonic stem cells and adult stem cells. Based on their development potential, the stem cells are divided into three types: totipotent stem cells, pluripotent stem cells, and unipotent stem cells. The stem cell is a type of immature cell that is not fully differentiated and has a potential function to regenerate various tissues and organs and the human body, so it is called "universal cell" in the field of medicine.
In order to solve the problems encountered by the cell transplantation therapy, the transformation of cell fate attracts the attention of more and more scientists. Although the determination of cell differentiation and fate has always been considered as an irreversible and stable process in the development process, there are more and more in vitro evidences showing that this process is reversible.
The study on regulation of cell fate is just in a laboratory investigation state and is far from clinical trial. These transformed cells obtained through over-expression of transcription factors still have many application problems, for example, viral sequences integration, potential oncogenicity, the purity of the resultant transdifferentiated cells, and whether they can make up for normal cells which are damaged in certain conditions and play their due roles in the organism.
The induced pluripotent stem cell (iPS) is a type of cell that resembles with embryonic stem cell and has development totipotency. It acquires the properties of the stem cell by inducing the somatic cell through introducing specific ES enriched genes. In 2006, Japanese scientist Yamanaka introduced 24 candidate genes into mouse fibroblasts by using a retrovirus based vector, screened FBX15 positive cells by means of G418 resistance to isolate iPS clones similar to embryonic stem cells, and finally identified that 4 factors including Oct3/4, Sox2, c-Myc, and Klf4 are sufficient to induce mouse FBX15-iPS cells; as compared with embryonic stem cells, these cells are similar with embryonic stem cells in the aspects of clone shape, proliferation capability and ability to form teratoma, but they are different from embryonic stem cells in terms of gene expression and genomic methylation profile and cannot obtain living chimeric mice. Afterwards, this group and other two groups changed the screening method, and they used Nanog as the standard and obtained iPSs that are similar to embryonic stem cells in many aspects and these iPSs can produce chimeric offspring. Recently, the three research groups independently confirmed, by tetraploid complementation test, that mouse iPS cells can develop into an individual and possess development totipotency.
Following the method of inducing mouse iPSs, in 2007, each of the two groups Yamanaka [8] and Yu Junying [9] successfully reprogrammed human somatic cells into iPS cells, wherein the former transduced Oct3/4, Sox2, c-Myc, and Klf4 into human epidermal fibroblasts by using a retrovirus, while the latter incorporated Otc3/4, Sox2, Nanog, and Lin28 into foreskin cells by using a lentivirus. Both of the analysis on gene expression profiling and the analysis on the methylation of the promoter regions of genes Oct3/4 and Nanog showed that the human iPS cell line is very similar to the corresponding embryonic stem cell line, and all of the cells can develop into 3 germinal layers when they are injected into the body of a nude mouse. Furthermore, somatic cells can be successfully induced into iPSs in rat, swine, and monkey, in addition to mouse and human.
The cells that can be successfully reprogrammed are not only limited to fibroblasts, and many other types of adult cells can also be successfully induced into iPS cells, including pancreas beta cells, adult neural stem cells, hepatocytes, gastric cells, mature B cells, haematopoietic cells, meningocytes, adipose-derived stem cells, cord blood cells, peripheral blood CD34 positive cells, and keratinocytes. For cells at different differentiation stages, the difficulties in inducing and reprogramming them into iPSs are different. Take mouse haematopoietic cells as an example: the reprogramming efficiency of haematopoietic stem cells and haematopoietic progenitor cells may be up to 28% which is 300 times that of terminally differentiated T cells and B cells.
In inducing iPSs, it is often to incorporate an exogenous gene into cells by means of a retrovirus and a lentivirus, which provides very high gene transduction efficiency. However, integration of the viral sequence into the genome of the cell may result in gene insertional mutagenesis and even carcinogenicity, so this gene introduction method having potential risks is obviously unfavorable to application of the iPS technique in the field of regenerative medicine. Therefore, a different study group used non-integrating vectors to induce iPSs and succeeded. These vectors include an adenovirus vector, a common expression vector, a transposon, an episome vector, and a minicircle DNA vector.
Both of the combination of Sox2, Klf4, Oct3/4 and c-Myc and the combination of Sox2, Oct3/4, Nanog and Lin28 can successfully induce the generation of iPSs. Further studies found that c-Myc is not essential for reprogramming and the three transcription factors including Sox2, Klf4 and Oct3/4 are sufficient to drive the reprogramming of human and mouse somatic cells. Neural stem cells endogenously express high levels of Sox2, Klf4, and c-Myc, so it only needs to incorporate exogenous Oct3/4 in order to successfully induce iPSs. Among the transcription factors used in reprogramming, Sox2, Klf4, and c-Myc can all be replaced by other members of the same family, for example, Klf2 and Klf5 can replace Klf4; Sox1 and Sox3 can replace Sox2; N-Myc and L-Myc can replace c-Myc; but Oct1 and Oct6 cannot replace Oct4. Esrrb directly binds to Oct3/4 protein to regulate the self-regeneration and totipotency of stem cells, and in reprogramming, Esrrb can replace Klf4 to induce iPSs in combination with Sox 2 and Oct3/4. Oct3/4 is a very important transcription factor in reprogramming. Recent studies found that nuclear receptors LRH-1 (Nr5a2) and Nr5a1 can replace Oct3/4 and can induce mouse adult cells into iPSs in combination with Klf4 and Sox2.
However, so far, there are several different combinations of transcription factors capable of reprogramming, including Oct4, Klf4, Sox2, and c-Myc; Oct4, Nanog, Lin28, Sox2; Sox2, Klf4, and Lrh1; Oct4 and bmil, as well as reprogramming-related genes such as esrrb and tbx3. For the transcription factor combinations required by existing reprogramming methods, it needs to incorporate as many as 3 or 4 transcription factors and the induction efficiency is low. How to reduce the number of transcription factors while maintaining a high reprogramming efficiency is of great importance for reducing the accumulation of cell mutations in reprogramming and for improving the operability of the reprogramming technique. Furthermore, searching for genes that replace common transcription factors facilitates the study of the reprogramming mechanism and the improvement of the reprogramming technique.

This patent is subject to a terminal disclaimer.

Method for increasing the efficiency of inducing pluripotent stem cells

GUANGZHOU INSTITUTES OF BIOMEDICINE AND HEALTH CHINESE ACADEMY OF SCIENCES


In at least some embodiments, a method for mitigating interference between an Ultra Wideband (UWB) device and a non-UWB device is provided. The method includes, dynamically determining if a frequency channel associated with the non-UWB device is being used. If the frequency channel is being used, the method adjusts a UWB frequency band used for UWB signal transmission.

In order for electronic devices to communicate, a wireless or wired protocol (i.e., standard) defines hardware and software parameters that enable the devices to send, receive, and interpret data. The Federal Communications Commission (FCC) has allocated different frequency ranges (spectrums) for different wireless protocols. For example, the 802.11(a) protocol provided by the Institute of Electrical and Electronics Engineers (IEEE) specifies operating in a frequency range from 4.9-5.85 GHz (part of the Unlicensed National Information Infrastructure (U-NII) band). Also, the Worldwide Interoperability of Microwave Access (WiMAX) protocol specifies operating in frequency range from 3.3-3.8 GHz and from 5.4-5.825 GHz. More recently, the Ultra Wideband (UWB) protocol specifies operating in a frequency range from 3.1-10.6 GHz. The UWB protocol is based on Multi-band Orthogonal Frequency Division Multiplexing (OFDM) and is defined by the ECMA-368 specification provided by the WiMedia Alliance.
Because the UWB frequency range cuts across the frequency ranges specified for other protocols such as the 802.11(a) and WiMAX protocols, the possibility of interference between UWB-based devices and other devices (e.g., 802.11(a)-based devices or WiMAX-based devices) exists. Obviously, preventing or reducing interference between the different devices is desirable.

Methods and systems for detecting and mitigating interference for a wireless device


A semiconductor device (1) is provided which includes a regular cell array unit (30), a redundant cell array unit (31) that is provided in relation to the regular cell array unit (30), and a PGM/ER state machine (20) that controls reprogramming in which, when programming of a sector in the regular cell array unit fails (step S3), data involved in the programming that fails and data already stored in the sector in the regular cell array unit are written (step S8) into the redundant cell array unit (31). Since reprogramming is performed to write the data already written in the sector as well as the data involved in the programming that fails into the redundant cell array unit (31), data loss can be prevented and data can be secured, thereby increasing the reliability of the system.

1. Field of the Invention
The present invention relates to semiconductor devices, and more particularly, to a technique of replacing a defective memory cell with a redundant memory cell when a defect is caused during data programming.
2. Description of the Related Art
A semiconductor device such as a flash memory has a regular memory cell array and includes a redundant cell array as a backup circuit to be used when a defect is caused in the regular cell array. If an error occurs at the time of data programming or erasing, the defective memory cell is replaced with a redundant memory cell, so as to save data and increase production yield. In Japanese Unexamined Patent Publication No. 8-7597 (hereinafter referred to as Document 1), for example, the row address of a memory cell in which writing has not been properly completed is stored in a defective row address storage circuit. When the defective row address is input, a control circuit performs a control operation to select a redundant memory cell.
In Japanese Unexamined Patent Publication No. 2004-342187 (hereinafter referred to as Document 2), when an error in erasing is detected, relief information that associates the memory block in which the erasing error has occurred with a backup memory block is recorded. If access to a regular memory cell the memory block indicated in the relief information is detected, the access is switched from the regular memory block to the corresponding backup memory block.
Although there has been a conventional automatic redundancy technique by which reprogramming is performed to write data involved in failed programming into a redundant memory cell, a technique of securing data already written in sectors on which programming is to be performed has not been disclosed in the prior art. When an error occurs in a regular sector, a redundant sector is selected instead of the regular sector. Therefore, the already written data cannot be secured unless the data already written in the regular sector is moved to the redundant sector. The technique disclosed in Document 2 is a technique for data erasing, and data protection is not taken into consideration therein.

Semiconductor device and program data redundancy method therefor


A semiconductor memory device including: a memory cell array having at least one cell array unit, the cell array unit including a plurality of memory cells; a decoder for selecting at least one the memory cell in accordance with an externally supplied address; an input/output terminal for outputting data read from the selected memory cell and for receiving data supplied externally and sending the data to the selected memory cell; at least one data line for connecting the input/output terminal to each the cell array unit; sense amplifiers serially connected to each the data line in a multiple stage configuration for amplifying the read data; a write buffer connected in parallel with one of the sense amplifiers connected to each data line; by-pass switching elements connected between input and output terminals of the other sense amplifiers connected to each the data line; and a control circuit for applying an on-signal to at least one by-pass switching element when writing data, the on-signal turning on at least one by-pass switching element.

FIG. 1 shows a conventional semiconductor integrated circuit, particularly the details of a data read/write circuit portion for memory cells. As shown in FIG. 1, memory cells 1 are disposed in a matrix configuration. Any one of memory cells 1 can be selected by a row decoder 2 and a column decoder 3. A first sense amplifier 7 and a second sense amplifier/output buffer 8 are used when reading data from a memory cell 1. These circuits 7 and 8 read the data and send it to an input/output terminal 4. A data input circuit/first write buffer 5 and a second write buffer 6 are used when writing data to a memory cell 1. These circuits 5 and 6 write data from the input/output terminal 4 to a memory cell 1. Data read/write is selected by a read/write selector 9. First to fourth MOS transistors Tr1 to Tr4 turn on upon reception of an equalizing pulse outputted from an equalizing pulse generator 10 when an address for selecting a memory cell 1 changes. When the MOS transistors Tr1 to Tr4 are turned on, data accessed during a previous cycle is invalidated. The MOS transistors Tr1 and Tr2 equalize complementary data lines.
FIGS. 1A and 1B show the details of the circuits 9 and 10, respectively. Signals applied to the circuit 10 are generated in a circuit shown in FIG. 1C. In FIG. 1C, circuits labeled as the same reference numeral "15" show the same circuits.
With the circuit arrangement constructed as above, in reading data, the read/write selector 9 makes active the first sense amplifier 7 and second sense amplifier/output buffer 8, and makes inactive the data input circuit/first write buffer 5 and second write buffer 6. In this condition, the state (data) of a memory cell selected by the row decoder 2 and column decoder 3 is transferred to the first sense amplifier 7. This state is sent to the input/output terminal 4 via the second sense amplifier/output buffer 8. On the other hand, in writing data, the read/write selector 9 makes inactive the first sense amplifier 7 and second sense amplifier/output buffer 8, and makes active the data input circuit/first write buffer 5 and second write buffer 6. In this condition, data inputted from the input/output terminal 4 is written in a memory cell 1 selected by the row decoder 2 and column decoder 3. An equalizing pulse from the equalizing pulse generator 10 is supplied to the first to fourth MOS transistors Tr1 to Tr4 when an address is changed. Therefore, data in a memory cell 1 accessed at the preceding cycle is invalidated, to thus improve access speed.
The operation of the circuit shown in FIG. 1 is illustrated in a timing chart FIG. 1D in detail.
A serial connection of multiple stages including the first sense amplifier 7 and second sense amplifier/output buffer 8 is used in reading data. With this arrangement, the length of data line is divided and shortened, so that load capacitance to be driven by a memory cell 1 can be reduced and the data can be efficiently amplified. Similarly, a serial connection of multiple stages including the data input circuit/first write buffer 5 and second write buffer 6 is used in writing data. This arrangement results from substantially the same reason described above.
Conventionally, a multiple stage configuration has been applied to both reading and writing data via common data lines. A write buffer is therefore required to be provided for each data read stage. This results in an increased area of circuit pattern and an increased power consumption by a plurality stage of write buffers.


A bench mining system and mining method, particularly useful for open pit bench mining, employs a combination of bulldozers and transversely movable apron feeders to provide the primary mechanism for removal of overburden. The apron feeders are preferably equipped with a self-cleaning arrangement to facilitate continuous operation without undue stoppages.

In modern mining, geologic surveys and other techniques estimate the size and shape of mineral and/or ore configurations before their removal in a mining operation. The ore and mineral deposits exist in layers or veins at varying depths below ground. For example, deposits of coal can be divided into multiple layers of substantially horizontal planes of varying thickness and at various depths such that several deposits or veins lie at different levels spanning hundreds of feet below ground. Such layers of mineral and ore deposits are often not completely horizontal but have a pitch or slope. Because of the three dimensional sloping layers, the deposits are generally mined from the shallowest end of the deposit in a down slope direction.
In general the rock and earth disposed on top of a mineral or ore layer is referred to as "overburden". In open pit mining, the overburden atop a first uppermost layer is removed to substantially expose a strip of the mineral or ore deposit. The exposed deposit is then accessible to be removed by mining the uncovered portion and transporting it from the mine for shipment or other processing. Overburden is then removed from above a next adjacent strip of the first layer deposit to substantially expose more of the first deposit layer for removal by mining and shipment.
In open pit mining, once a portion of the uppermost deposit layer is mined and removed, the rock that had been sandwiched between the uppermost layer and the and the next lower deposit layer is exposed and is the overburden atop the next lower layer. Accordingly, the open pit process mining continues by removing strips of that overburden to generally expose the next deposit layer, in a sequential process that continues until successive deposit layers are exhausted. Depending on the size of the deposit, each strip may be several miles in length and is typically about 100 or more feet in width depending on the type of equipment used for the mining operation and other factors such as the size and pitch of the deposit layer.
As open pit mining continues, overburden removal above each deposit layer forms steps or benches. At each step, multiple removal operations increase efficiency in mining the ore or other minerals within the deposits. Multiple operations, however, take some time, and can be cost prohibitive if projected mining yields are not sufficiently high.
The valuable deposit layers are generally much smaller than the layers of overburden. Thus, the most labor intensive task in open pit mining is the removal of the overburden.
In one conventional mining method, a bucket wheel excavator 500, as illustrated in FIG. 1A, loads overburden 29 onto dump trucks 180. A single bucket wheel excavator 500 may cost on the order of One-Hundred Million Dollars ($100,000,000) and require a trained crew of 6 to 8 persons to operate.
As an alternative to a bucket wheel excavator, shovels, drag lines or other bucket type equipment are often used to remove overburden. For example, FIG. 1B illustrates a conventional operation where a shovel 502 loads large oversized dump trucks 180 which deposit their materials into a hopper on a centrally located apron feeder 550. The apron feeder 550 may feed a sizer that reduces oversized chunks of overburden to a size manageable by a conveyor 506 or other means of transport that carries the removed overburden away from the active mining area.
In a conventional mining operation, the apron feeders 550 is typically located at a semi-permanent position where overburden is trucked and deposited to a feed end of the apron feeder. When initially positioned or relocated, an apron feeder 550 is traditionally moved in a direction aligned with the feeder's conveyor operation so that they are essentially backed into a desired location. It is known in the art to provide apron feeders 552 with wheels or crawler undercarriage in line with the feeder operation for the purpose of positioning the apron feeders 552 such as illustrated in FIGS. 2A and 2B.
Applicants have recognized that it would be desirable to provide a method and system of open pit mining that reduces or eliminates the need for reliance on complicated and expensive equipment such as bucket wheel excavators and efficiently uses the necessary equipment. Applicants have in particular recognized that more efficient mining can be conducted through the creative expanded use of apron feeders in the mining operation.
Further, applicants have recognized that improved apron feeder designs may be employed to prevent costly operational stoppages due to the need for cleaning clogged material from an apron feeder.

Method and apparatus for open pit bench mining


A battery charger has a housing with a battery containing portion in which a rechargeable battery is detachably contained, a connector attached to the end of a power cord led out from the housing, and a charging source that is installed in the housing and charges the rechargeable battery contained in the battery containing portion with power supplied through the connector, and the housing is provided in its outer circumferential wall with a gutter-like cord recess in which the power cord is stored along the outer circumferential wall, and also with a connector holder that detachably holds the connector.

1. Field of the Invention
The present invention relates to a battery charger that is user-friendly and suitable for charging rechargeable batteries through a USB (Universal Serial Bus) of a personal computer (PC) or the like.
2. Description of the Related Art
Rechargeable batteries that can be reused by charging electrical energy, particularly cylindrical (circular) rechargeable batteries called AA-size batteries and AAA-size batteries have been used as general-purpose power sources for various kinds of devices. Chargers for these rechargeable batteries are mostly each provided with a built-in AC-DC converter formed of a transformer, a rectifier, etc. in a housing having a battery containing portion in which a rechargeable battery is detachably contained. The chargers are used, for example, in the condition where an AC plug installed in the housing is connected directly to an AC outlet.
A charger to be used while being externally connected to a device having a built-in rechargeable battery, or so-called AC adapter, has been well known. More specifically, there has been proposed a charger that is so constructed that AC and DC cords can be led out from a housing that is a main part of the charger and stored by winding them around the housing (see Unexamined Japanese Patent Publication No. 2004-79320, for example). Another proposed charger has such construction that a DC cord is led out from a housing in which an AC plug is installed (see Unexamined Japanese Patent Publication No. 2003-40533, for example).
The USB of a personal computer or the like includes a DC power line and is then capable of supplying power, albeit small electric power, to an external device connected to the USB. Therefore, if a charger using such a USB is realized, it is possible to readily charge the rechargeable batteries on the PC use environment.

Battery charger with USB connector and cable storage recess


A data communication method for wireless power charging and an electronic device using the same is provided. An electronic device performing authentication for wirelessly receiving power supplied from an external electronic device includes a wireless charging receiver module and a processor configured to control the wireless charging receiver module to exchange authentication data with the external electronic device and receive the wireless power supplied from the external electronic device based on a result of the authentication, the authentication data being split into at least one packet. Other embodiments are possible.

Recently, wireless charging technologies based on electromagnetic induction or magnetic resonance are being popularized as an option for electronic devices such as a smartphone. A wireless charging technology is designed such that, if a power receiver (PRX, e.g., smartphone) contacts a power transmitter (PTX, e.g., wireless charging pad) or the PRX is placed within a certain range from the PRX, the battery of the PRX is charged via electromagnetic induction or electromagnetic resonance.

Data communication method for wireless power charging and electronic device using the same


A semiconductor device includes a substrate having first fin and a second fin spaced apart and extending lengthwise in parallel. A fin remnant is disposed between the first fin and the second fin, extends lengthwise in parallel with the first and second fins, and has a height lower than a height of each of the first fin and the second fin. A first field insulation layer is disposed between a sidewall of the first fin and a first sidewall of the fin remnant and a second field insulating layer is disposed on a sidewall of the second fin. A blocking liner conforms to a sidewall and a bottom surface of a trench bounded by a second sidewall of the fin remnant and a sidewall of the second field insulating layer. A trench insulation layer is disposed on the blocking liner in the trench.

A semiconductor device includes integrated circuits including metal oxide semiconductor field effect transistors (MOSFETs). Reductions in semiconductor device size and design rule lead to reductions in the size of MOSFETs used in such devices. The size reduction of the MOSFETS can cause a short channel effect, which can reduce device performance. Various methods of fabricating semiconductor devices have been proposed to overcome such problems arising from higher degrees of integration to provide devices with high performance, high reliability, and low power consumption.

Semiconductor device and method of fabricating the same


A method for controlling a Multiple Input Multiple Output (MIMO) antenna system comprises at a first communication unit, receiving a table from a second communication unit, the table including a plurality of space time processing schemes based on predicted channel state information, selecting at least one of the schemes from the table, and transmitting data from the first communication unit to the second communication unit according to the at least one selected space time processing scheme.

Multiple-Input Multiple-Output (MIMO) antenna systems use multiple antennas in a transmitter and multiple antennas in a receiver to increase communication throughput and/or range at the same bandwidth and power consumption when compared to a Single-Input Single-Output (SISO) antenna system. For instance, typically, multiple antennas increase range in a system. Also, for instance, when multiple sets of antennas are used, multiple simultaneous data streams can be sent and received in the system, thereby increasing data throughput. One use for MIMO systems is to send multiple streams of the same data to a receiver with multiple antennas. A processing unit in the receiver then uses the redundant data streams to construct a more reliable copy of the data. In this way, MIMO systems can also be used to increase reliability of the data transfer.
In send/receive systems, there are typically at least two ways to operate a communication system. One way is referred to as "Time Division Duplexing" (TDD), which uses a single channel for both forward link (from the transmitter) and reverse link (to the transmitter). Different time slots are used for forward and reverse link transmissions. Another way is Frequency Division Duplexing (FDD), which uses a channel for the forward link and a channel for the reverse link, each separated by a guard band.
Whether using TDD or FDD, MIMO systems can benefit from pre-processing, which may include determining antenna selection and power allocation over beam vectors prior to a forward or reverse link data burst. Pre-processing is often accomplished by measuring qualities of a given channel and adjusting the next transmission accordingly. In a TDD system, a transmitter can measure the qualities of its channel by examining the reverse-link bursts. This is because forward and reverse links use the same channel. However, in FDD systems, it is only the receiver that receives a burst over the forward link channel. Thus, measurements of the forward link channel qualities are best measured at the receiver rather than at the transmitter.
Further, due to the time offset between a first forward burst and a second forward burst (in a FDD system) and between a reverse burst and a forward burst (in a TDD system), channel qualities at the time of their measurement are outdated by the time of the next burst for which pre-processing is done. Basing pre-processing on outdated information can often cause degradation of communication. Accordingly, various systems use measured channel qualities and apply an algorithm thereto in order to predict channel qualities at the time of pre-processing. This helps to ensure more relevant channel information is used in pre-processing.
For example, it is possible for a TDD system to employ a technique whereby the transmitter measures channel qualities and applies pre-processing immediately before the next forward burst using channel qualities predicted specifically for the burst time. This is in contrast to FDD systems, wherein forward channel quality information is measured at a receiver, and wherein the receiver usually has no knowledge of the timing of future forward bursts. This introduces at least two problems: 1) how to do pre-processing for the forward burst when the channel information is not at the transmitter, and 2) how to predict channel information when the timing of the next burst is not known.

Pre-processing systems and methods for MIMO antenna systems

Hong Kong Applied Science and Technology Research Institute Co., Ltd.