In an organic light-emitting display device and a method of manufacturing the same, the organic light-emitting display device includes: a first insulating layer, a transparent conductive layer, and a second insulating layer which are sequentially formed on a substrate; a thin film transistor including an active layer formed under the first insulating layer, a gate electrode including a part of the transparent conductive layer as a lower electrode layer, and source and drain electrodes connected to both sides of the active layer; an organic light-emitting device including a sequentially stacked structure comprising a part of the transparent conductive layer as a pixel electrode, an intermediate layer which includes an emission layer, and an opposite electrode; and a capacitor including a first electrode and a second electrode, which includes a part of the transparent conductive layer as a lower electrode layer; wherein the transparent conductive layer and the second insulating layer include a hole.

1. Field of the Invention
The present invention relates to an organic light-emitting display device and a method of manufacturing the same, and more particularly, to an organic light-emitting display device which can be fabricated simply and has excellent display characteristics, and a method of manufacturing the same.
2. Description of the Related Art
Organic light-emitting display devices are self-emitting display devices, in which a voltage is applied to a thin film layer, including an anodean anode, a cathode, and an organic emission layer disposed between the anode and the cathode, so that electrons and holes are recombined in the organic emission layer to thereby emit light.
Organic light-emitting display devices have been considered as next generation display devices due to their advantages such as light weight, small thickness, wide viewing angles, fast response speeds, and low power consumption.
On the other hand, organic light-emitting display devices for realizing full-color images adopt an optical resonance structure for changing optical lengths of wavelengths which are emitted from organic emission layers in pixels of different colors (for example, red, green and blue pixels).

Organic light-emitting display device and method of manufacturing the same


A monolithic micro or nano electromechanical transducer device includes a pair of substrates (20, 25) respectively mounting one or more elongate electrical conductors (40) and resilient solid state hinge means (30, 32) integral with and linking the substrates to relatively locate the substrates so that respective elongate electrical conductors (40) of the substrates are opposed at a spacing that permits a detectable quantum tunnelling current between the conductors when a suitable electrical potential difference is applied across the conductors. The solid state hinge means permits relative parallel translation of the substrates transverse to the elongate electrical conductors.

There have been a number of published proposals for the use of detectable changes in quantum tunneling current to measure micro or nano order displacements or motions. For example, Kobayashi et al, have proposed a displacement detector for a micro structure such as an atomic force microscope probe that relies on the extreme sensitivity of a tunneling current to the length of a gap, in the order of 1 nm, between a sample and a sharpened metallic tip. An earlier related disclosure by Kobayashi et al "An integrated tunneling unit" appears in Proceedings of MEMS 1992, Travemünde (Germany), Feb. 4-7, 1992. In an extract entitled "Microsensors get tunnelling" in Design Engineering (Morgan Grampian Ltd, London, U.K.), 1 Nov. 1997, there is a disclosure of an accelerometer that relies on tunnel current effects fabricated in a silicon-on-insulator (S.O.I.) wafer. This device, and a micro-mechanical atomic force sensor head disclosed in European patent publication 262253, rely on the sensitivity of detected quantum tunneling current to the variable width of a gap, typically between a tip and an opposed surface. That is, the tip and surface move towards and away from each other.
Other disclosures of arrangements utilising quantum tunneling between a tip and opposed surface are to be found in U.S. Pat. No. 4,806,755 and international patent publication WO 97/20189.
The present applicant's prior international patent publication WO 00/14476 discloses micromechanical apparatus for measuring or monitoring the relative position or displacement of two elements in which a pair of elongate electrical conductors are disposed at a mutual separation such that, on application of an electrical potential difference across the conductors, there is a detectable quantum tunneling current between the conductors. This device is sensitive to the degree of alignment, either lateral or angular, between the opposed conductors. In one form of the device, respective substrates mount opposed arrays of conductors at a spacing in the range 2 to 100 angstroms. Disclosed arrangements for accurately maintaining this gap include the use of C60 nanobearings or a separation film of an organic medium such as cyclohexane.
The concepts and structures disclosed in WO 00/14476 have great promise for a wide variety of applications at micro and nano level. It is an object of the present invention to provide a class of practical devices embodying those concepts.

Quantum Precision Instruments Asia PTE Ltd.


An apparatus for inflating a vehicle occupant restraint, such as an air bag, includes a housing. A hermetically sealed canister in the housing includes a lower section and a cover. Gas generating material is located in the canister. The gas generating material, when ignited, generates gas for inflating the air bag. The canister is sealed with a single hermetic seal between the lower section and the cover.

1. Technical Field
The present invention relates to a gas generating device, and particularly to an inflator for inflating an air bag to protect an occupant of a vehicle.
2. Description of the Prior Art
It is well known to protect a vehicle occupant by using an air bag that is inflated when the vehicle encounters sudden deceleration, such as in a collision. The air bag restrains movement of the vehicle occupant during the collision. The air bag is typically inflated by gas generated by activation of gas generating material. The gas generating material is contained in an air bag inflator.
The gas generating material of an air bag inflator can absorb moisture from the air. The performance of the gas generating material upon activation can be adversely affected by the absorption of moisture. Also, if the gas generating material absorbs enough moisture from the air, an undesired chemical reaction can take place between the moisture and the gas generating material and corrosion of metal parts of the inflator can occur.
Accordingly, the gas generating material is commonly enclosed in a hermetically sealed enclosure. The hermetically sealed enclosure prevents large amounts of air, and thus large amounts of moisture in the air, from coming into contact with the gas generating material over the lifetime of the air bag inflator. A hermetic seal may be defined as a seal which has an equivalent helium leak rate of less than 1.times.10.sup.-5 cubic centimeters per second of helium at one atmosphere pressure differential measured at a specified temperature between -50.degree. C. and 110.degree. C.

Hermetically sealed container for air bag inflator


A method of rendering a stereoscopic 3D image from a single image, including receiving a collection of pairs of 3D images including an input image and an output image that is a 3D pair of the input image, training a neural network composed of convolutional layers without any fully connected layers, with pairs of 3D images from the collection, to receive an input image and generate an output image that is a 3D pair of the input image, wherein the neural network is provided as an application on a computing device, receiving an input image and generating an output image that is a 3D pair of the input image by the neural network.

Single-image-based view-generation (SIVG) or 2D to 3D image conversion is a technique to generate a new view image from a single image. It has typically aimed to generate the right-view image from a left-view image in a stereoscopic viewing scenario. SIVG has been actively studied over decades, as it can be widely applied to provide richer representations and important perceptual cues on image understanding as well as 3D modeling, etc. SIVG techniques are becoming more and more important, as the dominant portions of the 3D movie and virtual reality (VR) markets are coming from 3D content production and consumption. Furthermore, computationally efficient SIVG methods can bring significant benefits as many 3D contents are consumed on mobile devices. Typically SIVG consists of two main stages:
1. single-image-based depth estimation (SIDE); and
2. depth image-based-rendering (DIBR).
Mathematically, SIDE and DIBR can be formulated as:D=h(L|θh),  (1)R=g(L,D|θg)  (2)
Where L, D, R are the left-view image, estimated depth map, and estimated right-view image, respectively. h(_) in Eq. 1 and g(_) in Eq. 2 arc considered SIDE and DIBR, respectively. θh in Eq. 1 and θg in Eq. 2 are model parameters.
It should be noted that disparity and depth are used herein interchangeably based on an assumption of the standard stereoscopic viewing condition where depth and disparity values are linearly proportional. Most existing approaches have focused on estimating accurate depth maps, that is, they aim to model h(_) in Eq. 1. For example as described in U.S. application Ser. No. 15/749,509 dated Feb. 1, 2018 the disclosure of which is incorporated herein by reference.
Previous depth estimation approaches have relied on utilizing one or a few depth cues in images, such as color, scattering, defocus, saliency regions and/or utilizing an image database. Recent works related to depth estimation suggested use of a convolutional neural network (CNN)-based data-driven approaches. Although these approaches showed remarkable performance improvement compared to previous hand-craft features-based approaches, DIBR in Eq. 2 (depth image rendering) should additionally be performed for SIVG, which often involves much computation and visual distortion.
Recently, Xie et al. (J. Xie, R. Girshick, and A. Farhadi. Deep3d: Fully automatic 2d-to-3d video conversion with deep convolutional neural networks. arXiv preprint arXiv: 1604.03650, 2016) proposed an end-to-end SIVG method, called Deep3D. The network architecture of Deep3D relies on a pre-trained CNN (VGG-16 Net) with a rendering network. Deep3D showed the highest prediction performance in SIVG compared with the CNN based depth-estimation methods followed by a standard DIBR. However, Deep3D requires large memory space with much computational complexity as it relies on pre-trained CNNs with fully-connected (dense) layers. Also, the dense fully connected layers in Deep3D inevitably limit the spatial resolution of its input and output (i.e., 384 by 160), thus constraining flexibility and applicability.

View generation from a single image using fully convolutional neural networks

QATAR FOUNDATION FOR EDUCATION, SCIENCE AND COMMUNITY DEVELOPMENT


A method of manufacturing a nitride semiconductor device comprises the steps of: growing an InxGa1-xN (0≦x≦1) layer, and growing an aluminium-containing nitride semiconductor layer over the InxGa1-xN layer at a growth temperature of at least 500° C. so as to form an electron gas region at an interface between the InxGa1-xN layer and the nitride semiconductor layer. The nitride semiconductor layer is then annealed at a temperature of at least 800° C. The method of the invention can provide an electron gas having a sheet carrier density of 6×1013cm−2 or greater. An electron gas with such a high sheet carrier concentration can be obtained with an aluminium-containing nitride semiconductor layer having a relatively low aluminium concentration, such as an aluminium mole fraction of 0.3 or below, and without the need to dope the aluminium-containing nitride semiconductor layer or the InxGa1-xN layer.

The (Al,Ga,In)N material system includes materials having the general formula AlxGayIn1-x-yN where 0≦x≦1 and 0≦y≦1. In this application, a member of the (Al,Ga,In)N material system that has non-zero mole fractions of aluminium, gallium and indium will be referred to as AlGaInN, a member that has a zero aluminium mole fraction but that has non-zero mole fractions of gallium and indium will be referred to as InGaN, a member that has a zero indium mole fraction but that has non-zero mole fractions of gallium and aluminium will be referred to as AlGaN, and so on. There is currently considerable interest in fabricating semiconductor light-emitting devices in the (Al,Ga,In)N material system since devices fabricated in this system can emit light in the blue wavelength range of the spectrum. Semiconductor light-emitting devices fabricated in the (Al,Ga,In)N material system are described in, for example, U.S. Pat. No. 5,777,350. There is also interest in fabrication electronic devices, such as high-performance transistors, in the (Al,Ga,In)N material system.
FIG. 1 is a schematic view of a typical semiconductor laser device (or laser diode—"LD") 10 fabricated in the (Al,Ga,In)N material system. The device is able to emit light in the blue wavelength range.
The laser device 10 of FIG. 1 is grown over a substrate 1. In the laser diode 10 of FIG. 1 the substrate 1 is a sapphire substrate.
A buffer layer 2, a first cladding layer 3 and a first optical guiding layer 4 are grown, in this order, over the substrate 1. In the embodiment of FIG. 1 the buffer layer 2 is a n-type GaN layer, the first cladding layer 3 is an n-type AlGaN layer, and the first optical guiding layer 4 is an n-type GaN layer.
An active region 5 is grown over the first optical guiding layer 4.
A second optical guiding layer 7, a second cladding layer 8 and a cap layer 9 are grown, in this order, over the active region 5. The second optical guiding layer 7 and second cladding layer 8 are of opposite conductivity type to the first optical guiding layer 4 and first cladding layer 3; in the laser device 10 of FIG. 1 the first optical guiding layer 4 and first cladding layer 3 are n-type so the second optical guiding layer 7 and second cladding layer 8 are p-type layers. In the laser device of FIG. 1 the second optical guiding layer 7 is a p-type GaN layer, the second cladding layer 8 is a p-type AlGaN layer, and the cap layer 9 is a p-type GaN layer.
The structure of the active region 5 of the laser device 10 is not shown in detail in FIG. 1. In general, however, the active region 5 will be either a single quantum well (SQW) active region having one quantum well layer disposed between first and second barrier layers, or a multiple quantum well (MQW) active region having two or more quantum well layers with each quantum well layer being disposed between two barrier layers. The quantum well layer(s) may be, for example, layers of InGaN, AlGaN or AlGaInN.
High quality heterostructure field effect transistors (HFET) and high electron mobility transistors (HEMT) typically require a combination of large electron sheet densities and high electron mobilities in the channel region. One approach to obtaining the necessary electron sheet concentration and electron mobility is to incorporate an electron gas region into the device. Electrons in an electron gas can have a much higher mobility than those in a bulk semiconductor crystal as a result of fewer interactions (or scattering) with host or dopant atoms.
It may also be desirable to incorporate an electron gas region into a nitride semiconductor optoelectronic device, as is described below.
As is known, an electron gas region may consist of, for example, a potential well in which electrons can accumulate to form an electron gas. Depending on the shape and thickness of the potential well, the electrons in the electron gas may be confined in the direction perpendicular to the plane of the quantum well and may be free to move only in the two dimensions parallel to the plane of the quantum well; in this case, the electron gas is known as "a two-dimensional electron gas" (2DEG). Alternatively, the electrons of the electron gas may be free to move in all three dimensions in which case the electron gas is known as "a three-dimensional electron gas" (3DEG). Electrons in an electron gas can have a much higher mobility than those in a bulk semiconductor crystal as a result of fewer interactions (or scattering) with host or dopant atoms.
Jeganathan et al. have reported, in J. Appl. Phys. 94 (2003) p 3260, that an AlGaN/GaN heterostructure can be used to achieve a 2DEG with a sheet carrier concentration of up to 5×1013 cm−2 without intentional doping of the heterostructure. This is well in excess of the sheet carrier concentration achievable in other III-V systems such as the AlGaAs/GaAs system, and this is mainly due to the five-times larger piezoelectric polarisation of a strained AlGaN layer compared to AlGaAs and the very large spontaneous polarisation (polarisation at zero strain) in wurtzite III-nitrides compared to other III-V materials. However, the method of Jeganathan et al. requires the use of an AlGaN layer that has a very high aluminium mole fraction, possibly even use of an AlN layer, in order to obtain a 2DEG having a sheet carrier concentration of 5×1013 cm−2. It is generally undesirable to incorporate a layer of AlN or AlGaN with a high aluminium mole fraction into a device, since this can lead to excessive strain within the device, to the formation of dislocations, and to unwanted impurity incorporation.
Co-pending U.S. patent application Ser. No. 10/974,348 (Co-pending UK patent application No. 0325100.6) discloses a semiconductor light-emitting device fabricated in a nitride material system and having an active region disposed over a substrate. The active region comprises a first aluminium-containing layer (for example an AlGaN layer) forming the lowermost layer of the active region, a second aluminium-containing layer forming the uppermost layer of the active region, and at least one InGaN quantum well layer disposed between the first aluminium-containing layer and the second aluminium-containing layer.
Jena et al. report, in Appl. Phys. Lett. 81(23) 2002 p 4395, the use of AlGaN layers with a graded aluminium mole fraction to produce a 3-D electron gas or slab. This method produces an electron gas having a maximum sheet electron concentration of 9×1012 cm−2.
Ibbetson et al. discuss, in Appl. Phys. Lett. 77(2) 2000 p 250, the source of electrons in an electron gas at an AlGaN/GaN interface. They identify surface states as major source of electrons and predict a maximum sheet electron concentration of 4.8×1013 cm−2 for an electron gas at an AlGaN/GaN interface. They make no mention of how to form the surface states.
Mkhovan et al. describe, in J. Appl. Phys. 95(4) 2004, p 1843, the formation of a quasi-2DEG with an electron sheet concentration of approximately 5×1013 cm−2 in the AlGaN/GaN materials system. They state that the sheet electron concentration is governed by polarisation induced charge and is influenced by interface diffusion. They give few details of how a 2DEG is formed or of the source of electrons for a 2DEG.
Jeganathan et al. (above) have reported, in J. Appl. Phys. 94 (2003) p 3260, that an AlGaN/GaN heterostructure can be used to achieve a 2DEG with a sheet carrier concentration of up to 5×1013 cm−2 without intentional doping of the heterostructure. However, there is no teaching of incorporating an AlGaN/GaN heterostructure into an optoelectronic device to provide an electron gas region and improve the optical efficiency of the device.
U.S. Pat. No. 6,515,313 discloses a light emitting device in which dipole reducing methods (such as interface grading or interface doping) are used to reduce any polarisation induced fields across the active region of the device so as to improve optical efficiency. In the present invention, however, dipoles and a polarisation field are specifically introduced to form an electron gas.
U.S. Pat. No. 6,541,797 discloses a light emitting device fabricated in a nitride materials system and having a 2DEG (with a sheet carrier concentration of less than 5×1013 cm−2) formed in the active region, on its p-type side. The 2DEG region acts as collecting region for efficient electron-hole recombination. In the present invention, in contrast, the electron gas region is situated outside the active region, and is on the n-type side of the active region.
U.S. Pat. No. 6,614,060 describes a light emitting device containing a wide InGaN layer situated below the active region, for electron capture and resonant tunnelling of electrons into the active region. There is no indication that an electron gas is formed anywhere in the device.
Kim et al. report, in Phys. Stat. Sol. (a) 201, (2004), p 2663, the use of an electron tunnelling barrier in a nitride LED for improved optical efficiency. The electron barrier is provided by an AlGaN layer with a thickness of 2 nm located in or just beneath the active region of the LED. The AlGaN layer is reported to reduce hot electron overflow out of the active region. The formation of an electron gas at the interface between the AlGaN tunnelling barrier and underlying GaN is not reported or suggested by Kim et al. Moreover, according to Smorchova et al in J. App. Phys. 86 (1999), p 4520, such a thin AlGaN layer would not result in the formation of a 2DEG.
Luo et al. report, in J. Elec. Matl. 30(5) 2001, p 459, an improvement in photoluminescence emission intensity from InAs quantum dots (QDs) coupled to a 2DEG. The 2DEG is thought to act as an electron reservoir for the QDs, through wave-functions of electrons in the 2DEG overlapping with the QDs. In the present invention, however, the electron gas is outside the active region and so the wavefunction of electrons in the electron gas is not coupled to the active region.

Semiconductor light-emitting device, and a method of manufacture of a semiconductor device


A liquid crystal display device includes a liquid crystal panel including a plurality of signal lines, a liquid crystal panel driving unit configured to provide a driving voltage to the plurality of signal lines, an image data judging unit configured to judge whether input image data is still image data or moving picture data, an image data correcting unit configured to correct moving picture data to output corrected moving picture to the liquid crystal panel driving unit, a plurality of light sources configured to provide a light to the liquid crystal panel, and a light source driving unit configured to detect a display region having a motion value larger than a reference value from among an image of which frame data is displayed, based on a comparison of current frame data of the moving picture data with previous frame data of the moving picture data.

1. Field
Embodiments relate to a liquid crystal display device, and more particularly, relate to a liquid crystal display device capable of improving the quality of a moving picture.
2. Description of the Related Art
A liquid crystal display device may be formed of two substrates and a liquid crystal layer interposed between the substrates. The liquid crystal display device may display a desired image by controlling the strength of an electric field being applied to the liquid crystal layer and a transmittance of light penetrating the liquid crystal layer. As the liquid crystal device is widely used as a computer display device as well as a television display device, there may be a need for displaying a moving picture.

Liquid crystal display device using corrected moving picture data


A computer-implemented Pain Management Advisor (PMA) based on an interactive knowledge-based expert system. The PMA facilitates the diagnosis and treatment of acute and chronic pain. The PMA system includes three key components: a knowledge-based component for use by the primary care providers; an inductive learning component and case-based reasoning technology for use by the chronic pain patient; and a third component used by primary care providers to consult with pain specialists and to update/modify pain management algorithms. One embodiment includes the steps of: (1) inputting demographic information for a patient into a computer; (2) inputting medical symptom information for the patient into the computer; (3) inputting a pain score into the computer; (4) generating a treatment plan for the patient by the steps of: automatically presenting to a care provider at least one rule-based pain management algorithm based on the demographic and medical symptom information; permitting a care provider to select one of the rule-based pain management algorithms; applying the selected rule-based algorithm to ask the patient questions about pain characteristics of the patient; inputting responses from the patient to such questions into the computer; generating a treatment plan recommendation for the patient based on the responses; (5) permitting a care provider to adopt the treatment plan; (6) generating a prescription and related instructions in accordance with the adopted treatment plan; (7) recording the adopted treatment plan and generated prescription information in the computer as a patient file.

Pain is sometimes defined as an unpleasant sensory and emotional experience associated with actual or potential tissue damage, or described in terms of such damage. The diagnosis and treatment of pain is time consuming and difficult. More than 80 million Americans suffer from chronic pain, and the cost to society of treating pain and the consequences of pain is staggering.
Very little training in the management of chronic pain is provided by medical schools. Despite such lack of formal training programs, pain management is emerging as an important medical specialty. However, while pain management specialists now exist, pain management expertise is not generally available to general practitioners. Yet according to the American Academy of Pain Management, pain specialists spend more than half of their time on therapy that would be better performed by primary care physicians. In this age of constantly escalating health care costs, it is important to increase the competency of health care providers. The most cost-effective way of doing this is not to send health care workers back to school, but to provide them with better tools to do their work.
Most physician are faced with the daily challenge of treating acute and chronic pain. The difficulties of managing chronic pain can lead to both physician and patient frustration. One of the most severe impediments to pain management is the problem of patient noncompliance with physician instructions. Even when well-designed treatment plans are followed, pain patients frequently return to their physician unsatisfied with their treatment effectiveness, or take it upon themselves to reduce their compliance with a prescribed treatment because of adverse side-effects. While such side-effects are often amenable to simple drug titration, such titration may be delayed or not even occur because care providers are too busy to provide close patient follow-up. Out of communication with a care provider, the pain patient may prematurely discontinue or otherwise modify therapy. All too often the patient returns for a follow-up visit with a prescribed treatment plan not having received a fair trial, resulting in precious time wasted.
Accordingly, the inventor has determined that there is a need for providing pain management tools to primary care physicians that also provide feedback about patient compliance. It would also be desirable if the pain management tools provide for adjusting prescribed treatment plans based on patient response. The present invention provides such tools.

Knowledge-based expert interactive system for pain


A Content Addressable Memory (CAM) device with an improved match sensing circuit is provided. The CAM is provided with a dummy cell and a respective dummy match line, as well as a reference dummy match line. The dummy match line is designed to be evaluated after all other cell match lines. The reference dummy match line triggers a dummy sensing block to initiate a time window for sensing the dummy match line. By this time, all other array match lines will have been stabilized and have reached their respective sensing blocks, to then allow the data to be latched. The match sensing circuit provided may be applied to a variety of arrangements including BCAMs and TCAMs.

Content Addressable Memory (CAM) devices are searchable memory devices that are used in applications that require high-speed searching. Such applications include packet forwarding and packet classification in Internet routers, data compression applications and neural networks.
CAMs are composed of conventional semiconductor memory (usually SRAM) with added comparison circuitry that enables a search operation to be completed in a single clock cycle.
A CAM device consists of an array of memory cells, each capable of storing one bit of information. The cells are each connected to respective feed lines which apply an input bit to compare with the bit stored in the cell, using the cell-dedicated comparison circuitry. If the input bit matches the stored bit, a match signal will be generated to the device output, providing the location of the match cell.
There are two types of CAM devices. The first is known as a Binary CAM device, in which the memory cells store one of a binary bit i.e. a 1 or a 0. The second type is known as a Ternary CAM or TCAM, in which the memory cells can store a 1, a 0 or a "don't care" (X) value, which will indicate a match with either a 1 or a 0 input to the device.
FIG. 1 shows an exemplary layout of a conventional TCAM 4 by 4 bit device 10. Device 10 has 16 memory cells 11, arranged in an array of four columns and four rows. An example of a TCAM cell is described in U.S. Pat. No. 5,313,590, the contents of which are hereby incorporated by reference.
Each cell 11 is electrically connected to a pair of feed lines or search lines 12a, 12a′ to 12d, 12d′. At an input to the device 10, search data (in this case a 4-bit word) is input to search line driver 14. Each pair of search lines 12a, 12a′ to 12d, 12d′ carries one bit of the four-bit word, to provide this bit to cells 11 in that column.
Each cell is also connected to one of match lines 13a to 13d, defining rows of cells 11. In this case, there are four rows of cells 11. If any one of the cells 11 connected to a match line 13a to 13d does not match the bit on its respective search line, the match line connected to that cell will indicate a no match. Only match lines for which all connected cells 11 match their respective search line bit will indicate a match.
In practice, this is accomplished by charging all match lines to an active or charged state at the beginning of each cycle. If a cell 11 does not match the bit on its search line, it will act to pull down its connected match line, thereby rendering it inactive, and indicating a no-match.
In the example of FIG. 1, at the beginning of a search cycle, all of the match lines 13a, 13b, 13c and 13d are charged to an active state. As the four-bit word 0110 is input to device 10, search lines 12a, 12a′ are charged to indicate a '0', lines 12b, 12b′ are charged to indicate a "1", lines 12c, 12c′ are charged to indicate a "1" and lines 12d, 12d′ are charged to indicate a "0".
Looking now at the first column (between search lines 12a, 12a′), the top cell 11, storing a "1" does not match the data on its corresponding search lines, and so pulls match line 13a down to an inactive state, indicating a no-match. Match line will remain in the inactive, "no-match" state, regardless of whether any of the other cells match in that row.
Looking now at the second row, cell 16 storing a "0" matches with the data on search lines 12a, 12a′ and so does not pull down the active state of match line 13b. Looking at the other cells in that row, each cell stores data that matches the data on their corresponding search lines, and so no cells pull down match line 13b. Accordingly, match line 13b indicates a match.
Similarly, all cells in the third row (starting with cell 17) match their corresponding search lines and so match line 13c remains active to indicate a match.
In the fourth row, cell 18 stores a "1", while search lines 12a, 12a′ store a "0". Therefore, the mismatch pulls match line 13 down to an inactive state, indicating a mismatch. As previously described, match line 13d will remain inactive regardless of the state of the other cells in that row.
The output of the cell array, being no-match, match, match, no-match is fed into an encoder 19 via amplifiers 15a to 15d. Encoder 19 converts the match information from the match lines into addresses which are then used to locate the searched for data. This arrangement provides a highly parallel lookup engine, however, such an arrangement can suffer from sensitivity to noise and process variations, especially in the case of wider CAMs.
Accordingly, it is an object of the present invention to provide an improved CAM arrangement.

Match sensing circuit for a content addressable memory device


A memory system and a method as well as robotic apparatus are strong against noise and excellent in memory capacity, volume of calculation, quantity of physical memory, and memory responsiveness. It is designed to store, in the frame form, the first information on a symbol as well as the second information on a symbol supplied separately from a variety of inputs in relation to competitive neurons corresponding to the symbol in a way to strengthen the connection between relevant input neurons and competitive neurons in response to the input patterns of a variety of inputs for each symbol with the use of a competitive neural network having a set of input layers composed of a plurality of input neurons and a set of competitive layers composed of a plurality of competitive neurons.

1. Field of the Invention
This invention relates to a memory system and a memory method as well as robotic apparatus, and is preferably applicable to an entertainment robot for example.
2. Description of the Rerlated Art
There has been proposed a system utilizing a competitive neural network as an associative memory system applicable to entertainment robots.
In this associative memory system, as shown in FIG. 12, input patterns composed of combinations of recognized results (hereinafter, referred to as "ID" as in color IDs, shape IDs, and face IDs, etc.) of each identifying system about several factors (for example, color, shape, and face, etc.) regarding an event or a thing (a symbol) being an object, are stored as memory patterns P1–Pn, and as shown in FIG. 13, the input of a certain pattern (a key pattern) recollects and outputs memory patterns P1–Pn analogous to it from among the same memory patterns P1–Pn stored. Note that in FIGS. 12 and 13 the squares positioned at the same height in the input patterns and the memory patterns P1–Pn signify the same factors, and that differences in pattern in the same factor indicate that results recognized from it differ.
Therefore, according to such an associative memory system as this, when a pattern similar to memory patterns P1–Pn stored in memory process is entered, a complete pattern complemented with the information of a missing factor can be output so that it may be possible to associate the identified result of the face with the name of a particular person for example.
FIG. 14 shows a typical example of the structure of an associative memory system to which a competitive neural network is applied. As shown in FIG. 14, this competitive neural network is structured as a hierarchical neural network composed of two sets of layers: input layers and competitive layers.
In this case, there are arranged in a set of input layers the number of input neurons equivalent to the aggregate of the number (m pieces) of IDs regarding the factor 1, the number (n pieces) of IDs regarding the factor 2, and so forth. And, each input neuron is assigned an identified result ID1–IDm, ID1–IDn, . . . from a relevant identifying system.
Also, a plurality of competitive neurons are provided in a set of competitive layers, each competitive neuron connected to each input neuron in the input layers with a certain degree of connection weight. Each of these competitive neurons is equivalent to one symbol (a conceptual object) to be stored. Note that the connection weight of the input layers and the competitive layers takes any value of from zero (0) to one (1) with the initial connection weight determined at random.
A competitive neural network provides two operation modes, namely a memory mode and a recollecting mode; in the memory mode input patterns are stored competitively, and in the recollecting mode complete patterns P1–Pn (FIGS. 12 and 13) is recollected from an input pattern missing partially.
Storing such a competitive neural network in the memory mode is performed by selecting a competitive neuron having fought it out in the competitive layers for an input pattern desired to be stored, and by strengthening a connection between the competitive neuron and each input neuron.
Here, in the input pattern vector [x1, x2, . . . , xn], the input neuron x1 corresponds to the first identified result (ID1) of the identifying system in regard to Factor 1, and the input of the first identified result ignites the input neuron X1, giving rise to such ignition on other factors in succession as well. An ignited input neuron takes the value of "1", a not-ignited input neuron the value of "−1".
And, assuming the connection weight of the ith input neuron and the jth competitive neuron as Wij, the value of a competitive neuron y1 against the input x1 is expressed by the following Expression (1):
                              y          i                =                              ∑                          i              =              0                        NumOfInput                                                        W              ji                                                  X              i                                                          (        1        )
Therefore, a competitive neuron winning out the competition can be sought by the following Expression (2):max {yi}  (2)
Also, in this manner the updating of the connection weight Wji of the competitive neuron winning out the competition and the input neuron is performed by the following Expression (3), in accordance with the Kohonen's updating rules:ΔWji=α(Xi−Wji)α: Learning RatioWji (new)−ΔWji+Wji (old)  (3)
At this point, regulating it with L2Norm leads to the following Expression (4):
                                          W            ji                                          (            new            )                          =                                            W              ji                                                  (              new              )                                                                          ∑                i                NumOfInout                                                                W              ji              2                                                          (        4        )
Consequently the connection weight Wji (new) obtained in the Expression (4) denotes the strength of a new memory after being updated, which comes to be a retentive memory.
Note that in Expression (4), the learning ratio α is a parameter denoting the relations between the number of times presented and memory. The greater the learning ratio α is, what is once retained will not be forgotten, and so, when a like pattern is presented next time, the retained pattern can be associated with, almost without fail.
Next, the recollecting mode is described. Assume that a certain input pattern vectors [x1, x2, . . . , xn] are presented. These input pattern vectors [x1, x2. . . , xn] can be an ID, or its likelihood or probability.
At this time, the value of the output neuron yi is calculated as in the following Expression (5); relative to the input pattern vector x1:
                              y          i                =                              ∑                          i              =              0                        NumOfInput                                                        W              ji                                                  X              i                                                          (        5        )
This Expression (5) can also be interpreted as indicating the likelihood of the igniting value of a competitive neuron corresponding to the likelihood of each factor. What is important here is that as for the likelihood inputs of a plurality of factors, the whole likelihood can be sought by connecting those likelihood inputs.
Now, supposing that it is the sole one with the greatest associated likelihood that is selected, the output neuron yi that can win competition can be obtained by the following Expression (6):max {yi}  (6)
And, as the number of the competitive neuron Y obtained in this way corresponds to the number of the symbol memorized, the input pattern X can be recollected by performing an inverse matrix operation on W as in the following Expression (7):Y=W·XX=W−1·Y=WT·Y  (7)
Thanks to the employment of a structure making memory stronger by gradually increasing the connection weight between the input neuron and the competitive neuron as described above, an associative memory system employing such a competitive neural network is designed to be capable of performing statistical addition-learning on each symbol corresponding to each competitive neuron respectively. Therefore, a conventional associative memory system using such a conventional competitive neuron network has a merit of being strong against noise.
When viewed from the opposite standpoint, however, because of that very structure, an associative memory system using such a conventional competitive neural network could perform learning on the symbol as statistical addition-learning only, and therefore, has a disadvantage of memorizing even clear information only by slow degrees.
Also, since a neural network is used in a conventional associative memory system employing a competitive neural network, it is necessary to increase the numbers of input neurons and competitive neurons accordingly so as to increase the number of types of information that can be stored and the maximum number of symbols that is memorized, causing a disadvantage of a substantial increase in the volume of calculation and the quantity of occupancy physical memory.

Memory system, memory method, and robotic apparatus


The present invention relates to methods and materials useful for systemically delivering polynucleotides across the blood brain barrier using adeno-associated virus as a vector. For example, the present invention relates to methods and materials useful for systemically delivering α-N-acetylglucosamidinase polynucleotides to the central and peripheral nervous systems, as well as the somatic system. Use of these methods and materials is indicated, for example, for treatment of the lysosomal storage disorder mucopolysaccharidosis IIIB. As another example, the present invention relates to methods and materials useful for systemically delivering N-sulphoglucosamine sulfphohydrolase polynucleotides to the central and peripheral nervous systems, as well as the somatic system. Use of this second type of methods and materials is indicated, for example, for treatment of the lysosomal storage disorder mucopolysaccharidosis IIIA.

Mucopolysaccharidosis (MPS) IIIB is a devastating lysosomal storage disease (LSD) caused by autosomal recessive defects in the gene coding a lysosomal enzyme, α-N-Acetylglucosaminidase (NAGLU). The lack of NAGLU activity disrupts the stepwise degradation of a class of biologically important glycosaminoglycan (GAG), leading to the accumulation of heparan sulfate oligosaccharides in lysosomes in cells of most tissues. Cells throughout the CNS are particularly affected, resulting in complex secondary neuropathology. MPS IIIB infants appear normal at birth, but develop progressive neurological manifestations that lead to premature death. Somatic manifestations of MPS IIIB occur in all patients, and involve virtually all organs, although they are mild relative to other forms of MPS, such as MPS I, II and VII.
MPS IIIA is a related LSD caused by autosomal recessive defects in the gene encoding a lysosomal enzyme, N-sulphoglucosamine sulphohydrolase (SGSH). The lack of SGSH activity also disrupts the stepwise degradation of a class of biologically important GAG, leading to the accumulation of heparin sulfate oligosaccharides in lysosomes in cells of most tissues.
No treatment is currently available for MPS IIIB or IIIA. For all of the MPS disorders, therapies have historically been limited to supportive care and management of complications. MPS IIIB is not amenable to either hematopoietic stem cell transplantation or recombinant enzyme replacement therapy. These have instead been used to treat mostly somatic disorders in patients with MPS I, II and IV. This is because the neuropathology of MPS IIIB is global and the blood brain barrier (BBB) precludes effective central nervous system (CNS) access.
For the majority of CNS diseases, effective treatments are rare since the CNS is located in a well protected environment and isolated by a highly defined anatomical/functional barrier. The BBB is completely formed at birth in humans. In general, the BBB protects the CNS by selectively regulating the transport of molecules/agents from the blood circulation into the CNS or vice versa. Likewise, it prevents potential therapeutics from entering the CNS. The BBB remains the most critical challenge to developing therapies for CNS diseases, especially global CNS disorders.
It is contemplated herein that gene therapy has potential for treating LSDs because the secretion of lysosomal enzymes, including NAGLU and SGSH, leads to bystander effects thus reducing the demand for gene transfer efficiency. The adeno-associated virus (AAV) vector system is one system with demonstrated therapeutic effect in a great variety of disease models. To date, no known pathogenesis has been linked to AAV in humans. Recombinant AAV (rAAV) vectors based on AAV serotype 2 (AAV2) have been used in numerous studies for neurological diseases, transducing both neuronal and non-neuronal cells in the CNS with demonstrated therapeutic benefits in treating MPS and other LSDs in animals and in patients with Parkinson's and Batten's disease. In the majority of rAAV-CNS gene therapy studies in LSDs, vectors were delivered by direct intracranial injection, which has limited potential for treating global CNS diseases. See, Sands et al., Acta Paediatr. Suppl., 97: 22-27 (2008); Fu et al., Mol, Ther., 5: 42-49 (2002); Cressant et al., J. Neurosci., 24: 10229-10239 (2004); Fraldi et al., Hum. Mol. Genet., 16: 2693-2702 (2007); Worgall et al., Hum. Gen. Ther., 19: 563-574 (2008) and Heldermon et al. Mol. Ther., 18: 873-880 (2010). To overcome these obstacles, more efficient delivery approaches have been developed with broad or global transduction, and functional benefits for the neurological disease in adult MPS TIM mice. An intracisternal injection of rAAV2-hNAGLU vector in adult MPS IIIB mice, following mannitol pretreatment, led to deep periventricular transduction and clinical benefits. See Fu et al., J. Gene Med., 12: 624-633 (2010). Intravenous (IV) rAAV injection into neonatal MPS I, MPS VII and MPS IIIB mice led to long-term correction of lysosomal storage in both somatic and CNS tissues. See, Sands et al., Lab. Anim. Sci., 49: 328-330 (1999); Hartung et al., Mol. Ther., 9: 866-875 (2004) and Heldermon et al., supra. However, the BBB may still be permeable in neonatal mice while closed at birth in humans. Previously, in adult MPS IIIB mice, pretreatment with an N infusion of mannitol transiently disrupting the BBB facilitated the CNS entry of IV-delivered rAAV2, resulting in diffuse global CNS transduction and neurological correction. See, McCarty et al., Gene Ther., 16: 1340-1352 (2009).
Recombinant AAV9 vectors encoding the sulfamidase enzyme have been administered to MPSIIIA mice as reported in Ruzo et al., XVIII Annual Congress of the European Society of Gene and Cell Therapy: 1389 (Abstract Or 96) (October 2010) and Ruzo et al., Mol. Therap., 20(2): 254-266 (2012).
Adeno-associated virus (AAV) is a replication-deficient parvovirus, the single-stranded DNA genome of which is about 4.7 kb in length including 145 nucleotide inverted terminal repeat (ITRs). The nucleotide sequence of the AAV serotype 2 (AAV2) genome is presented in Srivastava et al., J Virol, 45: 555-564 (1983) as corrected by Ruffing et al., J Gen Virol, 75: 3385-3392 (1994). Cis-acting sequences directing viral DNA replication, encapsidation/packaging and host cell chromosome integration are contained within the ITRs. Three AAV promoters (named p5, p19, and p40 for their relative map locations) drive the expression of the two AAV internal open reading frames encoding rep and cap genes. The two rep promoters (p5 and p19), coupled with the differential splicing of the single AAV intron (at nucleotides 2107 and 2227), result in the production of four rep proteins (rep 78, rep 68, rep 52, and rep 40) from the rep gene. Rep proteins possess multiple enzymatic properties that are ultimately responsible for replicating the viral genome. The cap gene is expressed from the p40 promoter and it encodes the three capsid proteins VP1, VP2, and VP3. Alternative splicing and non-consensus translational start sites are responsible for the production of the three related capsid proteins. A single consensus polyadenylation site is located at map position 95 of the AAV genome. The life cycle and genetics of AAV are reviewed in Muzyczka, Current Topics in Microbiology and Immunology, 158: 97-129 (1992).
AAV possesses unique features that make it attractive as a vector for delivering foreign DNA to cells, for example, in gene therapy. AAV infection of cells in culture is noncytopathic, and natural infection of humans and other animals is silent and asymptomatic. Moreover, AAV infects many mammalian cells allowing the possibility of targeting many different tissues in vivo. Moreover, AAV transduces slowly dividing and non-dividing cells, and can persist essentially for the lifetime of those cells as a transcriptionally active nuclear episome (extrachromosomal element). Furthermore, because the signals directing AAV replication, genome encapsidation and integration are contained within the ITRs of the AAV genome, some or all of the internal approximately 4.3 kb of the genome (encoding replication and structural capsid proteins, rep-cap) may be replaced with foreign DNA such as a gene cassette containing a promoter, a DNA of interest and a polyadenylation signal. The rep and cap proteins may be provided in trans. Another significant feature of AAV is that it is an extremely stable and hearty virus. It easily withstands the conditions used to inactivate adenovirus, making cold preservation of AAV less critical. AAV may even be lyophilized. Finally, AAV-infected cells are not resistant to superinfection.
Multiple serotypes of AAV exist and offer varied tissue tropism. Known serotypes include, for example, AAV1, AAV2, AAV3, AAV4, AAV5, AAV6, AAV7, AAV8, AAV9, AAV10 and AAV11. AAV9 is described in U.S. Pat. No. 7,198,951 and in Gao et al., J. Virol., 78: 6381-6388 (2004). Advances in the delivery of AAV6 and AAV8 have made possible the transduction by these serotypes of skeletal and cardiac muscle following simple systemic intravenous or intraperitoneal injections. See, Pacak et al., Circ. Res., 99(4): 3-9 (1006) and Wang et al., Nature Biotech., 23(3): 321-328 (2005). The use of some serotypes of AAV to target cell types within the central nervous system, though, has required surgical intraparenchymal injection. See, Kaplitt et al., Lancet 369: 2097-2105 (2007); Marks et al., Lancet Neurol 7: 400-408 (2008); and Worgall et al., Hum Gene Ther (2008).
There remains a need in the art for products and methods for treating lysosomal storage disorders such as MPS IIIB and MPS IIIA.

Methods for delivery of polynucleotides by adeno-associated virus for lysosomal storage disorders


A first variable resistor (5) is connected between a first terminal (7) and a third terminal (9) and increases/reduces its resistance value in accordance with the polarity of a pulse voltage applied between the first terminal (7) and the third terminal (9). A second variable resistor (6) is connected between the third terminal (9) and a second terminal (8) and increases/reduces its resistance value in accordance with the polarity of a pulse voltage applied between the third terminal (9) and the second terminal (8). Given pulse voltages are applied between the first terminal (7) and the third terminal (9) and between the third terminal (9) and the second terminal (8) to reversibly change the resistance values of the first and second variable resistors (5, 6), thereby recording one bit or multiple bits of information.

With recent development of digital technology for electric equipment, requirements for nonvolatile memories have been increasing in order to store data such as images. Specifically, requirements for larger capacity of memories, reduction of power necessary for writing, higher write/read speed, longer life and others have been further increasing. At present, flash memories that achieve nonvolatility by utilizing a mechanism in which electrons are injected into a floating gate provided at the gate of a semiconductor transistor are in practical use as nonvolatile memories and are widely used as external memories for digital cameras and personal computers.
However, such flash memories have many drawbacks, e.g., high write power, long write time, short rewritable life and difficulty in increasing the capacity (device miniaturization). Therefore, to overcome these drawbacks of flash memories, new nonvolatile memories such as a semiconductor memory (FeRAM) using a ferroelectric material, a semiconductor memory (MRAM) using a TMR (tunnel MR) material, a semiconductor memory (OUM) using a phase-change material have been actively developed to date. Nevertheless, these memories also have drawbacks, e.g., difficulty in device miniaturization for the FeRAM, high write power for the MRAM and short rewritable life for the OUM. Until now, no memories satisfy all the requirements for nonvolatile solid-state memories. As a recording method to overcome the drawbacks, a technique of changing the resistance value of an oxide with a perovskite structure by utilizing a pulse voltage was invented by Houston University (U.S. Pat. No. 6,204,139). However, this technique still has great difficulties in obtaining stable operation as a memory and high mass-production yield.

Memory device, memory circuit and semiconductor integrated circuit having variable resistance


At least one embodiment of the invention pertains to a collapsible planter apparatus is provided comprising (1) a floor section having one or more drainage holes, (2) a first side wall hingeably coupled to a first edge of the floor section, and (3) and a second side wall hingeably coupled to a second edge of the floor section opposite the first edge of the floor section. A third side wall may be removably coupled between the first and second side walls along a third edge of the floor section. A fourth side wall may also be removably coupled between the first and second side walls along a fourth edge of the floor section opposite the third edge of the floor section.

Gardening and landscaping serve an important part in the daily life of many Americans. Although large spaces are desirable for gardening and landscaping, all types of people garden and landscape on any available area around their home, town home, apartment or condominiums. In smaller spaces, it is often necessary to use sunny rooms, porches, and balconies and gardening in individual planters.
Individual planters allow the buyer to create their own gardens without a lot of space. The buyer can plant flowers, herbs, and vegetables and take care of their garden in their homes or on their balconies. This allows the consumer to garden without the typically larger spaces necessary to garden in.
Even though this allows gardeners with small spaces to plant flowers and other items, during the off season planters often become quite drab as the flowers and other plants die or wilt. Accordingly, the planter proceeds to occupy a great deal of space that could be used for storage or other purposes during the fall and winter seasons. This is especially true in a limited space situation like an apartment or condominium. Moreover, the lost space is not only unusable but aesthetically unattractive.
Additionally, full size planters also take up more shelve space at retail stores, warehouses, and carrier trucks. This additional space results in added costs to store and transport conventional planters.
Accordingly, a planter which solves the problems of lost space and lack of aesthetic appeal is desirable.


A capacitor array may include a bottom electrode, a plurality of top electrodes, at least one dielectric medium and a plurality of switching mechanisms. Each switching mechanism may separably electronically connect two or more top electrodes. The at least one dielectric medium may include a plurality of discrete capacitors each in contact with a top electrode and the bottom electrode.

1. Technical Field
The disclosed embodiments generally relate to methods and systems for providing a variable capacitance to an electronic circuit.
2. Background
Switched capacitor banks are used in microelectronics for a variety of reasons. For example, a switched capacitor bank can be used to adjust the resonance of a tunable resonator, to alter the transfer function of or to tune a filter, or to match a load impedance of an amplifier.
A monolithically integrated switched capacitor bank using Micro Electro Mechanical System (MEMS) technology is described in U.S. Pat. No. 5,880,921. The capacitor bank includes a plurality of switch-capacitor pairs attached in parallel between a power line and a ground line. Each switch-capacitor pair includes a MEMS switch in series with a capacitor. Similar devices incorporating mechanical relays and field effect transistors instead of MEMS switches are also described therein.
The capacitance of a parallel plate system, where a dielectric medium is located between two electrodes, is determined by the following formula:
      C    =                            ɛ          0                                  ɛ          r                        A            d        ,where ε0 equals the free space permitivitty (i.e., 8.85418×10−14 F/cm), εr equals the relative permitivitty (i.e., the dielectric constant) of the dielectric medium, A equals the area of overlap between the top and bottom electrodes, and d equals the thickness of the dielectric medium between the two electrodes.
Based on the above formula, if a plurality of capacitors in a capacitor array are electrically connected in parallel this results in an increase in the overlap area of the electrodes, thus the capacitance associated with the connected capacitors may be substantially equal to the sum of the individual capacitances associated with each capacitor. Accordingly, if capacitors in a capacitor array can be controllably and separably connected, a variable capacitor can be produced.
What is needed is a method and system for providing an electronically variable capacitor array for supplying a variable capacitance.
The present disclosure is directed to solving the above listed problem.


The present invention provides a cutting guide for ostectomy of the medial and lateral tibial surface during knee surgery. The cutting guide comprises a guide block including an axial opening defined along the longitudinal axis of the tibial canal. The guide block being adapted for attachment to a tibial trial base including alignment holes for locating the proper degree of rotational alignment of the tibial trial base with respect to the longitudinal axis of the tibia to assure the proper varus-valgus orientation and anterior-posterior slope of the resected tibial surface with respect to the femur. A pair of blade slots are provided for guiding a cutting tool for making a wedge-shaped resection of the tibia to accommodate a tibial tray component having a preselected internal distal surface corresponding to that of the resected tibia. The blade slots are pivotally mounted for selectively adjusting the angular alignment of the blade slots with respect to the lateral-medial axis perpendicular to the longitudinal axis of the tibia.

In replacing a knee joint which has been damaged due to disease or trauma, it is important that the prosthesis used to replace the damaged portion of the joint be properly aligned with respect to the bone to which the prosthesis is fixed. If the tibial surface does not lie in the correct plane, the implanted prosthesis may not properly articulate with the distal femoral prosthesis when the knee joint is reduced, and complications can result. Particular problems are encountered when resection of either the medial or lateral tibial surface is required, in that available shaping instruments require sacrificing the entire proximal surface. Rather, the stability of the prosthesis and knee is significantly improved by retaining as much of the proximal surface as possible.

Rotationally and angularly adjustable tibial cutting guide and method of use


A multicast packet transfer system includes a first packet transfer apparatus and a second packet transfer apparatus. The first packet transfer apparatus transmits transfer packet data relating to an IP header and a UDP header of a multicast packet when the multicast packet is received, rewrites a header section of the multicast packet to produce a unicast packet, and transmits the unicast packet. The second packet transfer apparatus receives the transfer packet data and the unicast packet, and reproduces the multicast packet based on the received unicast packet and the received transfer packet data.

1. Field of the Invention
The present invention relates to a multicast packet transfer apparatus for receiving and transferring a multicast packet, a multicast packet transfer system and a computer-readable storage medium used in the multicast packet transfer apparatus.
2. Description of the Related Art
Conventionally, when a multicast packet is transferred to another address in a state of original packet data being held, the multicast packet is encapsulated to have a new header added to the header and data of the multicast packet, as shown in FIG. 1.
Such transfer of a multicast packet is described, for example, in "Ip Encapsulation within IP" by C. Perkins, (IETF RFC2003, Oct., 1996). However, when the packet is encapsulated as described above, the packet becomes longer by the length of a newly added header. Therefore, there is a problem that the packet becomes longer than the MTU of the media so that there is a possibility that the packet is fragmentized or divided.
In conjunction with the above description, a transfer system in a loop network system is disclosed in Japanese Laid Open Patent Application (JP-A-Showa 62-56047). In this reference, a reception address of a packet is divided into sub-addresses for a plurality of nodes, and each of the sub-addresses can be allocated with one of set and reset states. A packet transmission source node sets the sub-addresses for destination to the set state and the other sub-addresses to the reset state. After the sub-addresses in the set state are stored, a packet transmission is carried out. Each node transfers the received packet with no change when the sub-address of the received packet for the self node is in the reset state. Also, the node takes the received packet therein when the sub-address of the received packet for the self node is in the set state, and then outputs the packet after setting the sub-address of the received packet to the reset state. Thus, the node determines that data of the packet has been already received, when the packet travels on the loop and is received again.
Also, a packet transfer apparatus is disclosed in Japanese Laid Open Patent Application (JP-A-Heisei 9-252319). In this reference, when a multicast setting to a plurality of specific terminals is carried out in a lower layer, an address management section (103) generates an upper layer address corresponding to a lower layer multicast address and stores the upper layer address and the lower layer multicast addresses in an address table of a transfer control section (101). When receiving an upper multicast packet, the transfer control section (101) searches the address table for lower layer multicast addresses corresponding to the upper layer address and carries out multicast transmission to the specific terminals corresponding to the searched lower layer multicast addresses through a multicast communication interface section (102).
Also, a data unit which receives and distributes data packets from and to a packet switching circuit and a switching apparatus containing the data unit is disclosed in Japanese Laid Open Patent Application (JP-A-Heisei 10-93589). In this reference, a packet registration section (146) has reception queues (RQ0 to RQ63) corresponding to destinations of reception packets. The packet registration section (146) produces an entry corresponding to the packet in one reception queue (RQ) corresponding to the packet destination at the time of the packet reception. A multicast handling section (148) produces an entry corresponding to the packet in each reception queue of the packet registration means (146) corresponding to each destination in case of that the reception packet is a multicast packet having equal to or more than 2 destinations. A data unit contains a packet output section (150) which reads the packets in the order of production of the entries from the reception queues of a memory (24), to output to a packet switching circuit. An ATM switching apparatus uses the data unit, and a self routing switching device uses the ATM switching apparatus.
Also, a cell copy apparatus is disclosed in Japanese Laid Open Patent Application (JP-A-Heisei 10-190663). In this reference, a cell copy apparatus is used for an ATM switching and transmitting apparatus which transfers cells for a unicast call and multicast call, and copies the cell for a copy number contained in control data of the cell when the received cell is for the multicast call. The cell copy apparatus is composed of a unicast call buffer which temporarily stores a plurality of unicast cells, and a multicast call buffer temporarily stores a plurality of multicast call cells. A copy number extraction section extracts the number of copies from the control data of the received cell. A write control unit writes a cell in the unicast call buffer when the received cell is the unicast call cell, and writes the cell in the multicast call buffer when the received cell is the multicast call cell. A load observation control unit observes the load relating to the reception of the cells to determine input load. A read control unit reads out a cell selectively from the unicast call buffer or the multicast call buffer in accordance with the input load by the said load observation control unit. The delay of the unicast call cell can be reduced even if the spacing of the multicast call cell is carried out

Multicast packet transfer system in which multicast packet is transmitted as unicast packet between transfer apparatuses


A method is provided for producing an optical acoustic sensor. In one embodiment, a method comprises winding a single-mode optical sensor fiber around at least one mandrel. The optical acoustic sensor fiber can comprise a core region having a diameter of about 2 μm to about 8 μm and a cladding region having an outer diameter of about 8 μm to about 20 μm. The method can also comprise interconnecting the at least one mandrel into an optical acoustic sensor.

Optical fibers can be used in any of a variety of different communications and sensing applications. For example, optical fiber-based acoustic sensors can be used for undersea applications. An optical fiber-based acoustic sensor can be formed by winding a length of optical fiber around a mandrel, where the fiber can be up to tens of hundreds of meters long. The sensor industry typically uses a conventional reduced-cladding fiber (80 μm diameter), which is an improvement over a standard-size (125 μm) fiber. A mode field diameter can typically be in the range of 7-10 μm, so light can be concentrated within the core region of the optical fiber and possibly a layer of a few microns of the cladding adjacent to it.
Most fiber-based acoustic sensors detect sound by determining a differential phase delay of light propagating through a length of optical fiber and the associated environmental strain placed on the fiber, as demonstrated below:
                                          Δ                                                                          Φ                    Φ                =                              ɛ            z                    -                                                    η                2                            2                                                  [                                                                    (                                                                  P                        11                                            +                                              P                        12                                                              )                                                                          ɛ                    r                                                  +                                                      P                    12                                                                          ɛ                    z                                                              ]                                                          Equation                                                  1                            Where: P11 and P12 are the elasto-optic coefficients for fused silica;        η is the refractive index of the fiber core; and        εz and εr are the longitudinal and radial strains, respectively.Alternatively, Equation 1 can be expressed explicitly as a function of fiber length and radius, as demonstrated below:
                                          Δ                                                                          Φ                    Φ                =                                            Δ                                                                                L                        L                    -                                                    η                2                            2                                                  [                                                                    (                                                                  P                        11                                            +                                              P                        12                                                              )                                                                                Δ                                                                                r                                        r                                                  +                                                      P                    12                                                                                Δ                                                                                L                                        L                                                              ]                                                          Equation                                                  2                            Where: L is the fiber length; and        r is the fiber radius.In the first order, the phase shift is dominated by the axial strain, and the radial component can thus be ignored. Therefore, Equation 2 can be rewritten as follows:
                                          Δ                                                                          Φ                    Φ                =                                            Δ                                                                                L                        L                                          (                          1              -                                                                    η                    2                                    2                                                                  P                  12                                                      )                                              Equation                                                  3
Based on Equations 1-3, it is demonstrated that, to increase phase shift, one can change the elasto-optic coefficient, increase an amount of strain per unit length experienced by the fiber, or increase the fiber length. However, the elasto-optic coefficient is a material property and is considered to be invariant. In addition, the amount of strain per unit length is governed by the transduction of force to the fused silica base material. Furthermore, increasing the fiber length may be impractical from a design, manufacturing, and cost perspective.


A multi-standard transmitter includes a differential stage that includes a current generator transistor; first and second transistors connected between a first node and the generator transistor and having respective control terminals connected to a first input terminal, the first and second transistors being interconnected at a first output terminal; third and fourth transistors connected between the first node and the generator transistor and having respective control terminals connected to a second input terminal, the third and fourth transistors being interconnected at a second output terminal; and first and second resistances connected between the first and second output terminals and interconnected at a second node. The transmitter includes a selective enabling circuit connected to the first and second nodes, and to a third node corresponding to a control terminal of the generator transistor. The selective enabling circuit supplies the nodes with regulation signals that modify an operating mode of the transmitter.

1. Field of the Invention
The present invention refers to a multi-standard transmitter.
The invention concerns in particular, but not exclusively, a multi-standard transmitter for telecommunication systems and the following description refers to this field of application with the sole purpose of making it easier to explain.
2. Description of the Related Art
As well known, the configuration of interfacing devices or interfaces is one of the most critical parameters that influence the transfer of data with high performance.
The ability to interchange between different types of interface is indeed to this day a challenge that often influences the schedules linked to the configuration of devices using such interfaces and to their actual distribution onto the markets.
In particular, in making high-speed telecommunication systems, differential interfaces have become popular, like interfaces LVDS (acronym for: "Low-Voltage Differential Signalling"), LVPECL (acronym for: "Low-Voltage Positive Emitter-Coupled Logic") and CML (acronym for: "Current-Mode Logic"). The success of such differential interfaces is linked to their ability to tolerate common-mode noise.
In any case, the transition between different types of interface used in transmitters and receivers of such telecommunication systems is problematic, should the technological differences between them not be taken into due consideration.
To better understand such technological differences, hereafter the basic characteristics of transmitters using known differential interfaces shall be described in greater detail.
A transmitter with LVDS interface or LVDS transmitter, as defined by standard IEEE1596.3, is a device made with low-voltage differential technology and with low power level, primarily intended for point-to-point data communication. Compared to other standard differential devices with cabled control, the LVDS transmitter has a minimum differential voltage oscillating in an admissible range of 250-400 mV with an offset value of 1.2Volt above a ground value.
Such an LVDS transmitter is schematically shown in FIG. 1, wholly indicated with 1.
The LVDS transmitter 1 essentially comprises a differential stage 2 with MOS transistors connected to a first and to a second voltage reference, in particular a VCC supply voltage reference and a ground GND, at a first X1 and a second inner circuit node X2 through a first MP and a second transistor MN, respectively, in particular a P channel MOS transistor and an N channel MOS transistor having the function of current generators.
The differential stage 2 has a pair of input terminals, IN+ and IN−, receiving respective complementary input signals, A_SW and AN_SW, as well as a pair of output terminals, OUT+ and OUT−, suitable for providing respective complementary output signals, VO and VON.
In greater detail, the differential stage 2 comprises a first M1 and a second transistor M2 inserted, in series with each other, between the first X1 and the second inner circuit node X2 and having respective control terminals connected together and to the first input terminal IN+ of the differential stage 2. Such first M1 and second transistors M2 are interconnected at the first output terminal OUT+ of the differential stage 2.
Similarly, the differential stage 2 comprises a third M3 and a fourth transistor M4 inserted, in series with each other, between the first X1 and the second inner circuit node X2 and having respective control terminals connected together and to the second input terminal IN− of the differential stage 2. Such third M3 and fourth transistors M4 are interconnected at the second output terminal OUT− of the differential stage 2.
Finally, the differential stage 2 comprises a resistive end element Rc, inserted between the first OUT+ and the second output terminal OUT−.
The transistors MP and MN having the function of current generators finally have control terminals receiving respective bias voltages PBIAS and NBIAS.
Substantially, the LVDS transmitter 1 makes a balanced current source, the output terminals of which, OUT+ and OUT−, provide voltage signals VO and VON, respectively positive and negative and phase-shifted of 180°.
In a telecommunications system, a receiver connected to such output terminals OUT+, OUT− detects a differential voltage capable of providing a logic signal. The resistive end element Rc allows the output terminals OUT+ and OUT− of the LVDS transmitter 1 to adapt to the different impedance values of a transmission line of the telecommunications system in which the transmitter is inserted, optimizing the integrity of a signal thus transmitted.
It should be remembered that an LVDS transmitter 1 as described above is able to interface with receiver circuits made in other differential technologies, provided that the signal levels used by such receiver circuits are within the preset common mode range, in other words between 0 and 2.4V.
An LVPECL transmitter essentially comprises a logic stage with coupled positive emitter having low power supply, typically below 3.3V, as defined for example by the standard Jedec8-2. In particular, the LVPECL transmitter has a variable output signal within a range equal to 600-900 mV.
Such an LVPECL transmitter is schematically shown in FIG. 2, wholly indicated with 3.
The LVPECL transmitter 3 comprises an input stage 4 inserted between a first and a second voltage reference, in particular a supply voltage reference Vcc and a ground GND, and connected to a first IN− and to a second input terminal IN+ of the LVPECL transmitter 3.
In particular, the input stage 4 comprises a first T1 and a second transistor T2, of the bipolar type having respective emitter terminals connected together, at an inner circuit node Yp, and to the ground GND through a generator Gp, respective emitter terminals connected, at a first Y1 and a second intermediate circuit node Y2, to respective first R1 and second resistive elements R2, in turn connected to the supply voltage reference Vcc, as well as command or base terminals respectively connected to the first IN− and to the second input terminal IN+ of the LVPECL transmitter 3.
The LVPECL transmitter 3 also comprises a third transistor T3 inserted between the supply voltage reference Vcc and a first output terminal OUT− of the LVPECL transmitter 3 and having a control or base terminal connected to the first intermediate circuit node Y1. Similarly, the LVPECL transmitter 3 also comprises a fourth transistor T4 inserted between the supply voltage reference Vcc and a second output terminal OUT+ of the LVPECL transmitter 3 and having a control or base terminal connected to the second intermediate circuit node Y2.
Finally, the output terminals OUT− and OUT+ of the LVPECL transmitter 3 are connected to a further supply voltage reference Vdd, respectively through a third R3 and a fourth resistive element R4, such resistive elements constituting an appropriate end for the LVPECL transmitter 3 in normal operating conditions (DC connection).
It should be noted that the structure shown for the LVPECL transmitter 3 has a low output impedance, and therefore does not carry out a correct impedance adaptation when a long transmission line is driven.
A CML transmitter essentially comprising a current switching output buffer is schematically shown in FIG. 3 and wholly indicated with 5.
The CML transmitter 5 comprises a first T1 and a second transistor T2, having respective emitter terminals connected together, at an inner circuit node Yp, and to a voltage reference, in particular a ground GND, through a generator Gp, respective emitter terminals connected to respective first R1 and second resistive element R2, in turn connected to a further voltage reference, in particular the supply voltage reference Vcc, as well as command or base terminals respectively connected to a first IN− and to a second input terminal IN+ of the CML transmitter 5.
The emitter terminal of the second transistor T2 is connected to a first output terminal OUT− of the CML transmitter 5, whereas the emitter terminal of the first transistor T1 is connected to the second output terminal OUT+ of the CML transmitter 5.
Typically, the CML transmitter 5 uses resistive elements of a value equal to 50 Ω for an optimal integrity of a transmitted signal.
Indeed, in a telecommunications system, on the receiver side, there is typically an end element with a resistive value equal to 50 Ω that make a current switch equal to 400 mV on the driver side.
It should be noted that the common mode voltage of the CML transmitter can be taken to the supply voltage value Vcc or to the value of the ground GND, but normally it is taken to a value slightly lower than the supply voltage (typically Vcc−0.2V).
Transmitters are also known that respect the standard CPRI, biased at a nominal current that is double CML, having common mode voltage values corresponding to the supply voltage value Vcc decreased by 0.4V.
In telecommunication systems, it is known to use substantially two interface modes between LVDS, LVPECL and CML type transmitters, and in particular the methods of:
1. DC coupling;
2. AC coupling
respectively schematically shown in FIGS. 4A and 4B.
The DC coupling method uses substantially a DC translation resistive network 6, as shown in FIG. 4A. According to the relationship between the interfaces included in the receiver and in the transmitter within the common mode range, the common mode voltage of such interfaces in contact through the resistive network 6 can be stepped up or stepped down.
In particular it is known to use a Therein resistive network analysis method to make an interconnection with DC coupling. For example, to place a LVPECL type transmitter in communication with an LVDS receiver, which requires a lower common mode voltage than the LVPECL transmitter, a step-down resistive network is used to reduce the common mode voltage, typically from Vcc−1.3V to 1.2V.
It can immediately be seen that the introduction of the resistive network 6 results in additional occupation of area and an increase in consumption of the telecommunication system overall. Moreover, such a solution with DC coupling does not have any configurability, it increases the attenuation of the signals, increases the costs of the printed board in which receiver and transmitter are made, lowers the yield of the telecommunication system and makes routing difficult on the printed board.
The AC coupling method, on the other hand, foresees the use of integrated buffer/translator circuits 7, as shown in FIG. 4B.
Such an integrated solution is also not without drawbacks, in particular low configurability, increased consumption, high cost of the printed board in which receiver and transmitter are made, lowering of the yield of the telecommunication system and difficult routing on the printed board.


A joystick position sensing device has a housing and a pivot ball movably mounted on said housing. The ball defines a prime axis, and a joystick is attached to the ball coaxially with the prime axis. The ball also defines two great circles which are orthogonal to each other and which intersect the prime axis. A groove is partially inscribed on the ball over a portion of each great circle, and a respective follower arm is slidably engaged with each groove. Also, each follower arm is rotatably engaged with a respective potentiometer. Motion of the joystick causes the ball (and grooves) to move, and the follower arms can slide in their grooves, or rotate relative to their potentiometers to adjust the setting of the associated potentiometer, in response to motion of the ball. The system generates a signal representative of the position of the joystick relative to the housing based upon the output signals of the potentiometers.

A large number of applications exist for remote control devices. Indeed, remote control devices have become everyday tools with a plethora of uses. For example, many if not most households now own interactive video entertainment devices which present games that can be controlled by a user by remote means. Also, many flight simulators use remote-control devices for simulating the controls of an aircraft, e.g., a helicopter.
One common remote control device is the well-known joystick. To control a video display or other device with a joystick, a user manipulates the joystick relative to a fixed component, ordinarily the housing to which the joystick is pivotally attached. As the joystick is moved, its orientation relative to the housing is sensed. Based upon the sensed orientation of the joystick, a signal can be generated to control, for example, the position of a cursor on a video display.
Not surprisingly, several devices have been introduced for sensing the orientation of a joystick and generating a control signal in response. As one example, Fredericksen U.S. Pat. No. 4,685,678 discloses a position transducer system in which a pair of slugs are attached to and moved by a joystick. Each slug is magnetically coupled to an inductor and each inductor is associated with an oscillator for generating a signal representative of the position of the slug and, hence, the joystick. Additionally, Kim U.S. Pat. No. 4,587,510 discloses an analog joystick controller in which a joystick is attached to a ball that is supported in a housing. The ball is connected through a relatively complicated mechanical linkage to potentiometers for generating a signal representative of the position of the joystick.
Unfortunately, the devices discussed above have either complicated constructions (e.g., the Kim device) or require comparatively expensive electronics (e.g., the Fredericksen device). Thus, a need exists to provide a joystick position sensor which can accurately sense the position of a joystick, and which has a relatively simple and inexpensive construction. The present invention recognizes that such a joystick position sensing system can be provided.
Accordingly, it is an object of the present invention to provide a joystick position sensing device which can relatively accurately sense the position of a joystick. It is another object of the present invention to provide a joystick position sensing device that has a comparatively simple construction. Furthermore, it is an object of the present invention to provide a joystick position sensing device that is relatively cost-effective to manufacture and easy to use.

System for sensing the position of a joystick


A soil plug processing mechanism for processing soil plugs which occur during ground maintenance. The soil plug processing mechanism having a separating device for picking up and processing the soil plugs by separating the soil plug material into fine particles and coarse particles. The separating device has at least one rotatable rotary sieve which has a rotatably driveable sieve drum with an outside surface which is configured at least partially as a sieve area.

1. Field of the Invention
The present invention relates to a soil plug processing mechanism and to a ground maintenance machine and/or cleaning machine having such a soil plug processing mechanism. In addition, the present invention relates to particular parts for such a soil plug processing mechanism or such a machine.
2. Background Information
Soil plugs are created within the framework of ground maintenance, for example when the ground is being maintained using hollow spiking tools such as hollow spoons during deep loosening. In the case of a ground maintenance machine for the deep loosening of soils, such as is described, for example, in DE 10 2008 017 242 A1, DE 10 2005 021 025 A1 or EP 1 505 862 B1 or WO 03/096784 A1, it is possible to use hollow tines as tools for the deep loosening, such hollow tines pulling soil plugs with them once they are pulled out of the ground and depositing them on the soil. The machines engage in the ground by way of hollow tines and remove soil plugs which remain lying on the surface of the ground.
The term "soil plug" does not have to designate a plug shape. The term refers to pieces of earth and soil materials (e.g. with vegetation or roots) which are dug out of the earth to insert holes. These pieces do not have to be absolutely plug-shaped, even if the plug shape is a frequent shape that appears. The term "soil plug" is to be understood synonymously with the term "soil core".
On many sports grounds or other grassed areas, said soil plugs have to be arduously collected in by hand and disposed of once the holes have been inserted by machine. Accordingly, in the prior art and in practice there are essentially two methods of dealing with such soil plugs. One method is to pick up and dispose of all the soil plugs. Another method is to pick up the soil plugs and to break them up completely in order then to distribute all the material of the soil plug onto the ground again. To this end, the material is chopped small and is deposited onto the ground again in a corresponding manner.
There are already machines for picking-up soil plugs which pick up the soil plugs using a brush and then process them in a corresponding manner. The brushes sweep the soil plugs up of the ground and are also referred to as sweeping brushes. Known soil plug processing machines are shown, for example, in U.S. Pat. No. 5,816,336, U.S. Patent No. 2003/0066661, GB 1 482 418 and U.S. Patent Application No. 2002/0056555.
Separating the soil plugs into organic materials and anorganic materials such as sand has already been proposed in part in the previously mentioned prior art. The sand is able to be re-distributed on the ground, it being possible to collect the organic materials and to supply them to a separate treatment or for disposal. The separating is effected by sieves which are fastened on the machine chassis and are provided with corresponding impinging elements or vibrating elements.


An apparatus and method for signal detection in a CR-based wireless communication system are provided. In the signal detection apparatus, a cyclic power calculator calculates the power spectral density of a cyclo-stationary and periodical signal to be detected with respect to a cyclic frequency and calculates optimum statistics using the power spectral density. A signal detector determines whether a signal exists or not according to the optimum statistics.

1. Field of the Invention
The present invention relates generally to a Cognitive Radio (CR)-based wireless communication system, and in particular, to an apparatus and method for detecting a Television (TV) signal on a radio channel.
2. Description of the Related Art
Along with the rapid development of wireless communication systems and a variety of wireless communication services, strict frequency separation is required for communication systems to coexist. Yet, there is only a limited spectrum available due to multiple applications over all of frequencies which can be commercially used. Hence, deployment of a new wireless platform faces a serious shortage of spectrum resources, particularly in lower frequency bands than a few gigahertz. To solve this spectrum shortage, the concept of CR has been introduced, which is a technique for detecting allocated but unused spectrum and efficiently sharing the unused spectrum.
Many countries have strictly regulated the use of frequency resources subject to their frequency policies, and service providers use frequencies through licensing and allocation from their governments. The CR technology enables the use of allocated but unused frequency resources.
In order to meet the recent increasing demand for the limited frequency resources, there is a pressing need for the CR technology, which has attracted much interest since the US Federal Communications Commission (FCC) commented on the possibility of frequency sharing in a Notice of Proposed Rule Making (NPRM) in December, 2003. Such a major example is a standardization of the Institute of Electrical and Electronics Engineers (IEEE) 802.22 Wireless Regional Area Network (WRAN) seeking the development of a CR-based communication platform. The IEEE 802.22 WRAN system is expected to be deployed in suburban areas of the U.S. or Canada, or in developing countries, aiming to provide wireless communication services using the CR technology in an unused TV frequency band.
CR standardization and development is active but in an early stage. Hence, there exist many issues to be handled and most of the configurations for the CR technology are yet to be specified.
CR, a technology for radio channel management, distribution, and interference detection using multiple channels, has a potential for interworking with future-generation wireless communications in a complementary fashion. For example, the CR technology can enable effective high-speed data transmission without frequency interference in shadowing areas existing under a cellular environment or in suburban areas requiring an increased cell size.
However, there are challenging issues to tackle in the application of CR to actual wireless communication systems. A major example is to detect a TV signal (hereinafter, simply referred to as a signal) to search for an unused channel.
In conventional signal detection, the power of a frequency band is measured. After the power measuring, the power measurement is compared with a predetermined threshold. For example, if the power measurement is equal to or less than the threshold, it is determined that no signal is detected. If the power measurement is greater than the threshold, it is determined that a signal exists in the frequency band and the signal is detected.
However, the conventional signal detection method cannot ensure reliability and suffers performance degradation.

Apparatus and method for signal detection in a cognitive radio-based wireless communication system