A random number that is co-prime with a set of prime numbers is generated, without having to calculate the greatest common denominator of the numbers. The value of 1−xλ(mod π), where x is a randomly generated value and λ is the Carmichael function, is tested to determine whether it is non-zero. If it equals zero, x is chosen as the random number of interest. Otherwise the value for x is updated, and the procedure is repeated. Due to the minimal amount of computation resources required to select x, the process is particularly well suited for generating cryptographic keys in portable electronic devices, such as smart cards.

A variety of public key cryptography protocols are known for encoding information, authenticating entities to one another, and electronically signing messages. Examples of such protocols include RSA, El Gamal, Schnorr and Fiat Shamir. A common feature of public key cryptography protocols is the fact that they employ large prime numbers, with typical lengths in the range of 512–2048 bits, to form one or more keys of the protocol. Some of these cryptosystems, such as RSA for example, require the random generation of several distinct prime numbers. Thus, generating prime numbers is an essential tool in public-key cryptography.
When efficiency is not a concern, one of the simplest ways to generate a random prime number is to select a random number q, and test it for primality. If the test is unsuccessful, the value for q is incremented by one, and the test is rerun. Since all prime numbers except two are odd, a straightforward improvement on this technique is to chose q as an odd value, and to update it in increments of two for each successive iteration of the test. However, this technique can become computationally intensive and is therefore not practical in a number of situations when large-sized numbers are employed.
To facilitate the random number selection process, several techniques have been developed that make it possible to more efficiently calculate the greatest common denominator of two numbers, and thereby determine whether they are co-prime. Examples of these techniques include Binary GCD, Extended GCD and the Lehmer formula. While these techniques exhibit excellent asymptotic complexity for numbers of extremely large size, they are difficult to program in an environment having limited processing resources, such as a smart card or other portable electronic device. In addition, they provide relatively poor performance for operations involving numbers of the size typically employed in the smart-card environment, e.g. in the range of 512 to 1024 bits. To increase the performance, it is possible to equip the card with an arithmetic coprocessor to carry out some of the operations of the primality test. However, other operations that are performed as part of the test, such as parity checking and binary shifts, are not compatible with the functionality typically offered in an arithmetic coprocessor. As a result, the overall performance still suffers.
To address these issues, an improved technique for generating random prime numbers is disclosed in commonly assigned application Ser. No. 09/818,658, the contents of which are incorporated herein by reference. Briefly, the method disclosed in this application comprises an algorithm that receives, as input, the values π and λ, where π=Πp1 is the product of a set of k distinct primary numbers p1, and λ is the Carmichael function and is defined as:λ=LCM(λ(p1), . . . ,λ(pk)) and λ(p1)=pi−1,in which LCM designates the least common multiple. The output of the algorithm comprises a random element x of the set (Z/πZ)* with uniform distribution. The algorithm essentially comprises the following steps:                1. Select a random number x<π with uniform distribution;        2. Calculate xλ(modπ), and if this value equals 1 return x;        3. Otherwise, x=x+1 and loop back to step 2.
It is an object of the present invention to improve upon the technique disclosed in the prior pending application. In particular, that technique requires, on average, λ/φ(π) modular exponentiations, modulo π, with the exponent λ, where φ(π)=Πki=o pi−1. It is the objective of the present invention to reduce the time necessary to carry out these arithmetic operations.

Generation of a random number that is non-divisible by a set of prime numbers


A speaker system is installed in a helmet, and includes a pair of piezoelectric speakers, frames supporting the speakers around the peripheral edges thereof, and laminated films for protecting the piezoelectric film speakers. Each of the frames has its longer sides curved with a radius of curvature of 210 mm to 360 mm in order to support the piezoelectric film speakers in a curved state similarly to the frame.

1. Field of the Invention
The present invention relates to a helmet with a built-in speaker system and a speaker system for a helmet, and more particularly relates to a helmet with piezoelectric film speakers, and piezoelectric film speakers for a helmet.
2. Description of the Background Art
Magnetic speaker systems including a voice coil mounted on a cone have been widely used in helmets up to this time. However, such speaker systems are difficult to downsize or make light in weight. There has been a great demand for improved speaker systems for helmets. In order to attach a speaker system in the confined space of a helmet and make a user feel comfortable, the use of the piezoelectric film speakers has been proposed in Japanese Patent Laid-Open No. Sho 63-175106 and Japanese Utility Model Laid-Open No. Sho 63-44584.
The piezoelectric film expands and contracts in response to voltages applied to an electrode. Therefore, when applying the piezoelectric film to a speaker, it is necessary to convert expansion and contraction of the surface of the piezoelectric film into oscillations of the film surface. This requirement is satisfied by maintaining the piezoelectric film in a curved state, which enables the piezoelectric film to function as a speaker.
In such a case, output performance in response to input signals, i.e. sound pressure level and frequency characteristics of the piezoelectric film as a speaker, depends upon the relative relationship between the expansion-contraction, and the oscillation. This relative relationship depends upon the degree to which the piezoelectric film is curved, i.e. a radius of curvature of the curved portion of the piezoelectric film. Further, there is a limitation to the radius of curvature in order for which the piezoelectric film to perform in the required manner. If such a limitation is not observed and is exceeded, the piezoelectric film speaker cannot produce a sufficient sound pressure level or may have deteriorating frequency characteristics, so that the speaker cannot demonstrate the desired capacity and sound quality.
In the foregoing related art, no definite measures seem to have been taken in order to strictly keep the piezoelectric film curved in the predetermined range. Therefore, existing piezoelectric film speakers do not function satisfactorily.

Helmet with built-in speaker system and speaker system for helmet


A wire dispensing device for containing a roll of wire having a free end. The device includes a plurality of enclosure walls connected to each other and forming an enclosure, where at least one of the walls is operable between an open position, thereby providing access to an internal area of the enclosure, and a closed position, thereby substantially enclosing the roll of wire positioned therein. At least one dispensing orifice extends through at least one surface of the enclosure and permits passage of the free end of the wire therethrough for use in dispensing the wire from the device. A method of dispensing wire from a roll of wire, and a method of manufacturing a dispensing device are also provided.

1. Field of the Invention
The present invention relates generally to systems and devices for dispensing wire, cord, etc. from a roll for use in a specified application, and in particular, to a wire dispensing device for use in dispensing wire from a roll in a construction setting or similar work area.
2. Description of Related Art
According to the prior art, wire, cord and other similar lengths of material are often provided to consumers and third parties in the form of a roll. For example, outdoor and indoor electrical wiring may be purchased in the form of a roll of wire, i.e., a long, continuous length of wire wrapped around a wooden or plastic spool. However, in many instances, residential, indoor wiring is provided wound, but simply positioned in the packaging. For example, in the field of indoor, structural wiring, builders often use Romex® indoor electrical wire, which is provided in a coiled (and banded) form inside a bag-type package.
Regardless of whether provided on a spool or coiled in a package, there are significant drawbacks and problems that arise while using such wiring. For example, oftentimes during storage and/or transportation, a wire is damaged, as it is unprotected. Presently, in order to protect against such damage, one must rely on self-policing or attempting to store the wire on top of other materials. Therefore, the user must find a safe and protected spot to place the wire, in an attempt to limit snags, abrasions, ultraviolet damage, nicks, cuts, crushes, etc. from other equipment or objects.
Another problem that occurs with such rolls of wiring, whether around a spool or loosely coiled, is the dispensing procedure. Again, as discussed above, simply pulling the wire from the roll often leads to kinks, abrasions, nicks and friction burns. In addition, in the case where the wire is loosely coiled in the package, during the dispensing process the wire often becomes knotted or twisted, which considerably lengthens the installation time. In addition, once unpackaged or exposed, the wire is subject to mishandling, impact, grit, dirt, grime and other factors and situations that lead to damaged wire. In addition, damaged wire is problematic in that, once it is installed in the walls of the home, it is difficult to access for repair purposes.
In an attempt to overcome such drawbacks, various wire dispensing devices are available. For example, Rack-A-Tiers Manufacturing, Inc. offers a Wire Tub, which is simply an open tub with an internal hub around which the wire can be placed. However, in use, the tub remains open and still allows for impact by the various environmental and physical factors discussed above, e.g., objects falling thereon, abrasion, dirt, grit, sawdust, etc. While a top plate is available for use in rewinding the wire placed in the Wire Tub, this plate includes multiple openings and allows the hub to also be exposed. Therefore, the Wire Tub does not provide the full enclosure needed to protect the sensitive wiring placed therein.
Another product available is the Wire Wheel, which is offered by Associated Electronic Products, Inc. The Wire Wheel acts as a rotatable spool placed upon legs, such that the wire is unrolled perpendicular to the ground and in a spaced relationship thereof. While this allows for the wire to be appropriately dispensed, again, and as with the Wire Tub, the wire is exposed to the environmental and physical conditions discussed above.
Other such storage and dispensing devices are the subject of one or more U.S. patents. For example, U.S. Pat. Nos. 4,552,323 to Otis; 4,944,472 to Stahl; 5,267,705 to Hofrichter et al.; 5,348,241 to Huette; 5,881,967 to Dawson et al.; 6,991,196 to Wheeler; and 7,121,501 to Lea all provide various wire spooling and storage systems and devices. However, as discussed above, none of these systems and devices provide maximum (or in some cases even adequate) protection of the wiring during the dispensing process. Further, there is considerable room for improvement in the field of wire storage and dispensing that allows for the safe and efficient dispensing of wire from a protected and secure location.


Device for a firestop collar, including an anchoring element and an expansion element The anchoring element serves to anchor the device to a substrate, and the expansion element is intended to interact with the firestop collar. The expansion element is made of intumescent material and is arranged between the anchoring element and the firestop collar in such a way that it is in contact with the firestop collar.

The firestop collar arranged around pipes or cables comprises intumescent material that expands upon exposure to heat, closing off the penetration as tightly as possible, so as to prevent propagation of the fire. Depending on the diameter of the penetration, the firestop collar can be arranged at an outer end of the penetration, for example, on the wall or floor/ceiling, or else directly in the penetration. When the firestop collar is arranged at the entrance to the penetration (wall mounting), it is normally fastened to the wall or floor/ceiling by means of brackets. Such firestop collars are described, for example, in German applications DE 10 2008 031 018 A1, DE 102 17 174 A1 and DE 198 52 120 A1. If the firestop collar is arranged in the penetration in such a way that only a small part of the firestop collar projects beyond the penetration, no additional bracket is needed as is the case with wall mounting. This is also referred to as firestop bandages or firestop strips. Such firestop collars are described, for instance, in German utility model DE 201 10 973 U1, German patent application DE 103 05 903 A1 or German patent application DE 10 2008 059 564 A1. The firestop collars, which are mounted so as to have an overhang, that is to say, which are wrapped around the pipe so as to extend partially beyond the penetration, are employed with a sufficient overhang, especially when it comes to thin-walled plastic pipes, so that, in case of fire, the intumescent material of the firestop collar can be heated up early enough to the temperatures needed for the expansion. When the firestop collar is completely integrated into the penetration, these temperatures are often only reached at too late a point in time, so that the plastic pipe collapses before the firestop collar starts to expand.
As set forth in the invention, the term "firestop collar" comprises all types of wrappings that are wound around pipes or cables and that have firestop properties, especially firestop fabric collars, that is to say, strips of intumescent material that are wrapped with a fabric strip, firestop bandages and firestop strips which are such that they are made of a material or applied onto a carrier that is so flexible that it can be pushed in a specific direction by the intumescence pressure of an expandable material. This list is provided by way of an example and should not be constructed in any limiting manner.
A firestop collar in the form of a firestop strip having an overhang is shown by way of an example in FIG. 1. A wall 2 has a penetration 3 through which a pipe 1 runs that extends along the longitudinal axis A. A firestop collar 4 which is, for instance, a fabric strip comprising intumescent material 5 surrounds the pipe 1 in the penetration 3 in the circumferential direction with an overhang, so that it comes to rest partially between the pipe 1 and the penetration 3. The remaining opening 7, in other words, the gap left between the firestop collar 4 and the penetration 3, can be filled with mortar or gypsum 6, which optionally can have firestop properties. This affixes the firestop collar 4 in the penetration 3.
These prior-art arrangements, however, entail the problem that some of the intumescent material 5 spreads in the axial direction (that is to say, essentially parallel to the longitudinal axis A of the pipe 1) and is squeezed out at the opening of the penetration 3 on the side of the wall. Moreover, the intumescence in the area of the overhang is not oriented and the intumescent material 5 spreads in all directions. As a result, intumescent material is lost and is then not available to close off the penetration 3. A correspondingly large quantity of intumescent material 5 is normally employed in order to remedy this problem.

Bracket for a firestop collar and use of this bracket


A wireless monitoring receiver and system use multiple video data feeds from a plurality of cameras. The video feeds are transmitted using a multi-antenna technique, and decoded by a a multi-antenna processor. The resulting transmissions are resistant to noise, interference, etc., and can be focused using antenna beams to achieve a simple form of location encryption.

Internet usage is increasing dramatically across the world. Wireless connections starting with a wireless local area network (WLAN) are attractive in many environments where labor/construction costs are high. Historically, WLANs were viewed as a niche market with proprietary protocols, high costs, and unrealized performance. With the adoption of IEEE 802.11 standards, WLANs now offer a viable alternative to wired LANs, as evident with the explosive growth over the past few years. Both large and small companies have or plan to offer solutions based on IEEE 802.11b (WiFiTM), 802.11a and 802.11g. For wide spread adoption, issues in the form of security, higher speeds, and increased radius of operation will need to be addressed.
WLAN Overview
The adoption of 802.11 standards made possible increased speeds, interoperability between systems, and cost reductions that made WLAN a feasible alternative. Companies like Lucent, Intersil, Cisco, 3COM, Texas Instruments, Microsoft, and Intel have or have announced products supporting the IEEE 802.11 standards. The 802.11 standards define the physical layer (PHY) and media access control layer (MAC); since these layers are based on 802 Ethernet protocol and CSMA/CA shared media techniques, any LAN application, network operating system, or protocol (such as TCP/IP) will run on a 802.11 compliant WLAN.
The WLAN market is comprised of several technologies all competing with different techniques and performance characteristics.                HomeRF and Home Rf 2.0 (WBFH)        IEEE 802.11b DSSS)        IEEE 802.11a (OFDM)        IEEE 802.11g        HiperLAN/2        MMAC
At the moment, the focus of the standard is on ether the 2.4 GHz band known as 802.11b or the 5 GHz band known as 802.11a. The supported data rates are up to 11 Mbps for 802.11b and are up to 54 Mbps for 802.11a. Products which conform to the 802.11b spec will in most cases work together and interoperate with ease. Essentially, the 802.11b or 11a standard provides open, asynchronous networking that requires a distributed control function.
Much like base stations for cellular technology, WLANs use an Access Point (AP) to provide wireless access to mobile terminals (MTs) or other devices in the network. AP is a cheap version of the base station for cellular technology and plays a very important role in WLAN. These APs are either connected to other APs, to other wired networks such as Ethernet, or connected to a broadband access medium such as DSL, cable, T1, etc.
IEEE 802.11b
The IEEE 802.11b operates in the unlicensed 2.4 GHz band. This standard permits two (2) distinctive types of transmission for data, Frequency Hopping Spread Spectrum (FHSS) and Direct Sequencing Spread Spectrum (DSSS). With the number of products and companies supporting DSSS, it has become the predominant standard for IEEE 802.11b. A raw data rate of 11 Mbps, 5.5 Mbps, 2 Mbps, or 1 Mbps is specified with a range of 100 meters.
Conventional configurations include single carrier, single receiver (Rx) and single transmitter (Tx) deploying a single omni-directional or dual dipole antenna. This is a simple and low cost solution. 802.11b is the predominant solution available on the market today. Since lower cost RF components may be used to achieve the requirements of 802.11b, the system cost has contributed to rapid growth.
Fundamental wireless channel impairments such as multipath (delay spread, temporal and frequency fading), interference, and noise greatly reduce the radius of the system. In most indoor environments, the 11 Mbps data rate is not achievable at 50 meters.
IEEE 802.11a
For higher speeds, companies are looking at IEEE 802.11a with 54 Mbps data rate. 802.11a uses a technique called Orthogonal Frequency Division Multiplexing (OFDM). OFDM sends multiple data streams simultaneously over separate radio signals in the less congested 5 GHz radio band, which has three (3) times the available spectrum. However, as the number of devices utilizing this band increases, congestion will also become an issue.
Although 802.11a offers a high data rate of 54 Mbps, a fundamental difference between 2.4 GHz and 5 GHz is the transmission range and corresponding coverage area. All things being equal, a higher frequency band will transmit a signal a shorter distance than a lower frequency band. The actual range at 54 Mbps in many instances may be less than 20 meters. This is of particular significance when considering the number of access points (APs) required for a similar area of coverage using 802.11a compared to 802.11b.
Barriers—Interference/Noise
Given the high cost of licensed spectrum, typical WLAN systems utilize either the 2.4 GHz or 5 GHz unlicensed (free) spectrum. As such, other devices and technology like microwave ovens, Bluetooth, satellite systems, and proprietary applications utilizing these unlicensed bands has created an overcrowding situation that will only get worse. A fundamental concern for all WLAN is the interference and noise between devices operating within the same spectrum.
Interference and noise may be viewed in two (2) types; in-band interference and out-of-band interference. Out-of-band interference or noise may be filtered out using the analog section of the receiver. In-band interference would include such time-varying impairments as multiple access interference and multipath conditions. Because the transmitted signal may take multiple paths in reaching the receiver, signal processing is required to address the delay spread, temporal and frequency fading.
Generally speaking, as the noise and interference increases the decipherable signal radius decreases. As a result, additional APs are required to complete coverage for a given area increasing costs and contributing to more interference.
Security
In a survey sponsored by Microsoft, security was the primary issue concerning companies implementing WLANs. The 802.11 standards address the issue in a couple of ways: Extended Service Set ID (ESSID) and Wired Equivalent Privacy (WEP). For ESSID, all mobile units associate themselves with an AP. This type of protection is limited since some products allow the mobile unit to attach to any AP, while others allow the user to browse and dynamically attach to a network.
WEP is a shared-key encryption mechanism option under 802.1 that employs either a 40-bit or 128-bit encryption using the RC4 algorithm. Unfortunately, many vendors have only just begun to implement this feature and it still relies on manual key distribution.
Multi-Antenna Technologies
Multi-beam wireless antenna systems are described in a number of references, including the following:    U.S. Publication No. 2001/0036843 to Thompson;    U.S. Pat. No. 6,351,499 to Paulraj et al.;
Furthermore, the use of multiple antennas for WLANs are also mentioned in an article entitled "Technologies and Performance for Non-Line-of Sight Broadband Wireless Access Networks" by Gesbert et al. in IEEE Communications Magazine, April 2002.
The above materials are hereby incorporated by reference.
Using multiple antennas at one or both ends of a wireless link can significantly increase a bit rate. By using multiple antennas at both the transmitter and the receiver, a matrix channel is created in which transmitting occurs over several independent spatial "dimensions" or "modes" within the same time frequency slot at no additional power expenditure.
In the art, this technique is referred to as spatial multiplexing (SM). As Gesbert et al. explain, a data rate can be scaled in accordance with a number of antennas employed. In operation, a high-data rate signal to be transmitted is first multiplexed into multiple bitstreams. These bitstreams are then transmitted simultaneously using multiple antennas. This causes the independent signals to be mixed in the channel since they occupy the same time and frequency resource.
At the receiver, the multiple received signals are separated, and individual data streams are demultiplexed to yield the original high rate signal. The separation is made possible by the fact that each transmit/receive antenna effectively sees a very different channel because of extensive multipath effects.
While such references generally describe the utility of multi-beam signal processing, they do fail to describe embodiments which would be compatible with conventional 802.11x based protocols (i.e, 802.11a, 802.11b, 802.11g, etc.) to enhance a conventional operating range of access points systems, and/or which could be efficiently implemented in integrated circuit solutions.
There is also a strong need for wireless systems which can handle situations in which the separation of incoming signals is very small, such as occurs in typical office space environments.
Furthermore, wireless security remains a significant problem. Any additional measures which can be used to "encrypt" a data transmission are extremely valuable in wireless applications.

Monitoring system using multi-antenna transceivers


An underwater communications system may include a first device and a second device being movable relative to one another. The first device may include a first laser transmitter configured to generate a first laser beam having a selectable spatiotemporal beam shape from among a plurality thereof, and a first controller coupled to the first laser transmitter and configured to select a spatiotemporal beam shape for the first laser beam from among the spatiotemporal beam shapes. The second device may include a second laser receiver configured to receive the first laser beam, and a second controller coupled to the second laser receiver.

Underwater communications systems have become more important since oceanic environmental and exploratory activities have increased, including oceanographic data collection, water sampling, and environmental studies. These underwater communications systems are usually wireless and employed also in coastal security, natural resource investigations, mapping and discovering unknown regions of underwater terrain, oceanic experimental observations and data analysis, underwater navigation, disaster prevention, and early detection warnings of tsunamis. Different underwater wireless communications used in these various services have included optical, acoustic, and electromagnetic (EM) systems. The quality and reliability of data transmission in both shallow and deep water are dependent on the physical characteristics of the water channel, the physicochemical properties of the water medium, and the physical characteristics of the optical, acoustic and EM carrier waves. Water properties that affect EM carrier waves include the water density, which can vary with temperature, high permittivity, electrical conductivity, salinity, turbidity, and EM noise levels present during communication. Acoustic communications are limited in propagation distance and may be attenuated by water turbidity, and have low frequency, bandwidth and low speed such as around 1,500 m/s.
Optical underwater communications systems using laser transmitters or other light sources, however, are becoming an area of greater research because of the potential to increase data capacity in transmission and potential use of commercial-off-the-shelf (COTS) devices. However, establishing and maintaining optical communication links between different devices, such as a buoy and a submersible, in a degraded water environment presents a challenge. Absorption and scattering are two crucial factors that affect the propagation of optical waves in underwater environments. As a result, optical transceivers make performance trades that may limit the optimal performance of an optical underwater communications system. Even where a data rate between devices is balanced relative to the distance between the devices in an optical underwater communications system, dynamic link conditions often may lead to degraded or intermittent optical communications service.
Some state-of-the-art optical underwater communications systems change the carrier using a multi-modal approach, e.g., employing an acoustic signal to enable long range, but very low data rate communications up to 100 to 1,000 km. When conditions permit, these systems switch to an optical system to provide shorter range, but much higher data rate communications. Switching between the acoustic and optical communications has been found to bridge performance gaps in some underwater communications systems. Other underwater communications systems employ an adaptive phase approach by changing the phase of the subcarrier. For example, corrections to the phase front may optimize performance in degraded underwater communications links with an increased power at the receiver and a lowered drop rate.
As the underwater communication link conditions change, the phase front may be changed and performance across the changing link environments may be more readily equalized. In these approaches, however, once a carrier is selected, for example, an optical or RF carrier, the sub-carrier profile as the spatiotemporal beam profile of the carrier is fixed and generally assumed to be Gaussian. Optimization strategies, such as phase front correction, are then applied to that sub-carrier profile. There are many possibilities for the sub-carrier profile, however, and each possibility may have benefits that may be exploited to improve communications link performance.

Underwater communications system having selectable beam and associated methods


A catheter-based, annulus reduction device and system for cardiac valve repair and method of using the same. The system is usable for treating mitral valve regurgitation and comprises a catheter, a reduction ring carried within the catheter, the reduction ring including a plurality of exit ports formed in a side wall of the reduction ring and filament received in the reduction ring. The filament includes a plurality of radially extendible barbs corresponding to the sidewall openings. The reduction ring carrying the filament is deployed adjacent a mitral valve annulus and the filament is translated relative to the reduction ring to deploy the barbs through the exit ports and into the annulus and to further translate the reduction ring with deployed barbs to reshape the annulus.

Heart valves, such as the mitral valve, tricuspid, aortic and pulmonic valves, are sometimes damaged by disease or by aging, which can cause problems with the proper function of the valve. Heart valve problems generally take one of two forms: stenosis, in which a valve does not open completely or the opening is too small, resulting in restricted blood flow; or insufficiency, in which blood leaks backward across the valve that should be closed. Valve replacement may be required in severe cases to restore cardiac function. In common practice, repair or replacement requires open-heart surgery with its attendant risks, expense, and extended recovery time. Open-heart surgery also requires cardiopulmonary bypass with risk of thrombosis, stroke, and infarction.
In various types of cardiac disease, mitral valve insufficiency may result. Any one or more of the mitral valve structures, i.e., the anterior and posterior leaflets, the chordae, the papillary muscles or the annulus may be compromised by damage from disease or injury, causing the mitral valve insufficiency. Typically, in cases where there is mitral valve insufficiency, there is some degree of annular dilation resulting in mitral valve regurgitation. Mitral valve regurgitation occurs as the result of the leaflets being moved back from each other by the dilated annulus, thus making the leaflets unable to appose each other completely during systole. Thus, without correction, the mitral valve insufficiency may lead to disease progression and/or further enlargement and worsening of the insufficiency. In some instances, correction of the regurgitation may not require repair of the valve leaflets themselves, but simply a reduction in the size of the annulus.
A variety of techniques have been attempted to reduce the diameter of the mitral annulus and eliminate or reduce valvular regurgitation in patients with incompetent valves. Current surgery to correct mitral regurgitation in humans includes a number of mitral valve replacement and repair techniques.
Valve replacement can be performed through open-heart surgery, open chest surgery, or percutaneously. The native valve is removed and replaced with a prosthetic valve, or a prosthetic valve is placed over the native valve. The valve replacement may be a mechanical or biological valve prosthesis. The open chest and percutaneous procedures avoid opening the heart and cardiopulmonary bypass. However, the valve replacement may result in a number of complications including a risk of endocarditis. Additionally, mechanical valve replacement requires subsequent anticoagulation treatment to prevent thromboembolisms.
As an alternative to valve replacement, various valve repair techniques have been used including quadrangular segmental resection of a diseased posterior leaflet; transposition of posterior leaflet chordae to the anterior leaflet; valvuloplasty with plication and direct suturing of the native valve; substitution, reattachment or shortening of chordae tendinae; and annuloplasty in which the effective size of the valve annulus is contracted by attaching a prosthetic annuloplasty ring to the endocardial surface of the heart around the valve annulus. The annuloplasty techniques may be used in conjunction with other repair techniques. Typically such rings are sutured along the posterior mitral leaflet adjacent to the mitral annulus in the left atrium. The rings either partially or completely encircle the valve, and may be rigid or flexible/non-elastic. All of these procedures require cardiopulmonary bypass, though some less and minimally invasive techniques for valve repair and replacement are being developed.
Although mitral valve repair and replacement can successfully treat many patients with mitral valve insufficiency, techniques currently in use are attended by significant morbity and mortality. Most valve repair and replacement procedures require a thoractomy to gain access into the patient's thoracic cavity. Surgical intervention within the heart generally requires isolation of the heart and coronary blood vessels from the remainder of the arterial system and arrest of cardiac function. Open chest techniques with large sternum openings are typically used. Those patients undergoing such techniques may have scarring retraction, tears or fusion of valve leaflets as well as disorders of the subvalvular apparatus.
Recently, other surgical procedures have been provided to reduce the mitral valve annulus using a less invasive surgical technique. According to one method, a prosthesis is transvenously advanced into the coronary sinus and deployed within the coronary sinus to reduce the diameter of the mitral valve annulus. The prosthesis is tightened down within the coronary sinus to reduce the mitral valve annulus. This may be accomplished in an open surgical procedure or by percutaneous transluminal access through the venous system by one of the internal jugular, subclavian or femoral veins.
While the coronary sinus implant provides a less invasive treatment alternative, the placement of the prosthesis within the coronary sinus may be problematic for a number of reasons. Sometimes the coronary sinus is not accessible. The coronary sinus on a particular individual may not wrap around the heart far enough to allow enough encircling of the mitral valve. Also, leaving a device in the coronary sinus may result in formation and release of thrombus that may pass into the right atrium, right ventricle and ultimately into the lungs, possibly causing a pulmonary embolism. Another disadvantage is that the coronary sinus is typically used for placement of a pacing lead, which may be precluded by the previous placement of a prosthesis in the coronary sinus.
It would be desirable, therefore, to provide a method and device for reducing cardiac valve regurgitation that would overcome these and other disadvantages.


Potassium-containing polyphosphate glasses having a relatively high amount of potassium and a relatively low level of insoluble material (e.g., less than about 10% by weight), and a method for their production that includes using a boron-containing glass-former additive. More specifically, these polyphosphate glasses may be described according to the formula M(n+2)O(PO3)n, where M is at least K or K+Na and the glasses have a mole % M-as-K that is about 33 to 100. These polyphosphate glasses may be used in reduced sodium foods (e.g., beverages and meat products).

The invention relates to potassium-containing polyphosphate glass compositions with low levels of water-insoluble compounds and to methods for their preparation. The invention particularly is directed to polyphosphates having a ratio of potassium to sodium that is relatively high and a relatively low amount of water-insoluble impurities and methods for their preparation.
Sodium salts of phosphoric acid derivatives, especially food grade sodium hexametaphosphate (SHMP), can be used to reduce and control various classes of microorganisms, specifically those important to the safety and spoilage of food and beverages during processing, storage, and distribution. Because these compositions control pathogens at near neutral pH conditions using very dilute preparations, the physicochemical changes (flavor, texture, color, nutrient retention) that may occur at highly alkaline or highly acidic conditions are reduced. For example, sodium salts of phosphoric acid derivatives have been used with preservatives to enhance the potency of preservatives so that lower levels of preservatives can be used, thus improving taste (see, e.g., Calderas (U.S. Pat. No. 5,431,940) and Pflaumer (U.S. Pat. No. 5,641,532), which disclose the use of sodium-containing polyphosphates in combination with sorbate preservatives in dilute juice beverages having relatively low water hardness).
Notwithstanding the antimicrobial benefits, the addition of such sodium salts to foods and beverages increases their sodium content and makes them unacceptable to users who require a low sodium intake. Potassium metaphosphate (KMP), [KPO3]n, (which is also know as Potassium Kurrol's salt) is a crystalline polyphosphate that contains potassium instead of sodium as the metal cation. Because potassium polyphosphate salts, including KMP, contain negligible levels of sodium, their use would substantially reduce the amount of added sodium to foods. But such compositions have not been widely utilized in food applications because they are difficult to dissolve in water and contain relatively large amounts of insoluble material. Technically, KMP is water-soluble but it dissolves so slowly that for practical purposes is considered water-insoluble. Furthermore, it is extremely difficult to produce KMP as a glass or as an easily-solubilized material.
For these reasons, sodium-potassium hexametaphosphate (SKMP), which is a water-soluble mixed-cation analog of sodium hexametaphosphate having significant substitution of sodium with potassium, has the potential to be a desirable alternative to both SHMP and KMP in applications involving polyphosphates (e.g., applications where the functionality of a soluble, longer-chain polyphosphate is desired but without introducing high levels of sodium). Henson et al. (U.S. Pat. Nos. 6,509,050; 6,440,482; and 6,610,340) disclose the use of SKMP in food products as an alternative to SHMP. SKMP typically comprises a distribution of polyphosphate chain lengths and may be represented by the formula (K, Na)(n+2)O(PO3)n, where n designates the average chain length of phosphates. The foregoing formula ignores minor components, including glass-former additives, residual water, water-insoluble impurities (e.g., KPO3), possible ring phosphates, and other trace impurities.
Solid SKMP is a water-soluble glass (or amorphous or vitreous material) that is typically made by chilling a melt containing sodium and potassium phosphates having a mole ratio of cation to phosphorus (M/P mole ratio, where M=alkali metals, typically Na and K but it is possible other alkali metals may be included, and P=phosphorus) that is typically between about 0.9 and about 1.6. SKMP glass made by chilling a melt normally contains an amount of water-insoluble impurity that is typically primarily, if not entirely, KMP. Moreover, the propensity for insolubles to form in glassy SKMP increases with increasing substitution of sodium by potassium. For example, Henson et al. (WO 2001000527) discloses that the formation of insolubles increases substantially as the amount of potassium relative to the total amount of cations increases above about 70-80 mole % M-as-K (mole % M-as-K=100*moles of K/moles of M) and may depend on the chill rate. Iler (U.S. Pat. No. 2,557,109) describe preparation of aqueous solutions of mixed polyphosphates by ion exchange. Although aqueous solutions of mixed polyphosphates may be made by ion exchange, it may be preferred or desirable to make soluble potassium polyphosphates in solid form using a melt process. It still is desirable to further minimize the amount of sodium present in glassy SKMP.
Given the state of the field, a need exists for a water-soluble polyphosphate glass with a relatively high mole ratio of K to Na that also contains a relatively low level of insoluble material. Such a polyphosphate glass would be particularly useful as an antimicrobial agent in food and beverage applications. Furthermore, a need exists for a method of producing such a composition, in particular for decreasing the amount of insoluble content when a relatively high degree of potassium for sodium is used. Further, it is desirable that any method for decreasing the amount of insoluble content be compatible with the conditions currently used for preparing polyphosphates. Additionally, it is preferable for any additive to be a minor component of the resulting composition.

Sodium-potassium hexametaphosphate and potassium metaphosphate with a low insolubles content


A direct-path echo cancellation circuit includes a loudspeaker (12), first and second microphones (14, 16), and an in-phase signal cancellation circuit (21, 43). The first and second microphones (14, 16) are positioned adjacent the loudspeaker (12) in order to receive in-phase direct-path echo components (31, 32) of an output signal from the loudspeaker (12). The in-phase signal cancellation circuit (21 or 43) combines the in-phase direct-path echo components of the output signal in order to cancel the direct-path echo components. Direct-path echo cancellation helps to reduce howling and/or oscillation in a full-duplex speakerphone system. Also, direct-path echo cancellation provides more dynamic range to an input signal which is provided to a speakerphone signal processing system (26).

Full-duplex speakerphones using present signal processing technology have problems with acoustic echo cancellation. Since full-duplex speakerphones should be able to operate in a variety of environments, they are designed to accommodate environments having high levels of acoustic echo. The acoustic echo may be a direct-path echo from the loudspeaker to the microphone, or may be a reflected echo, where the delay of the reflected echo may be several hundred milliseconds, depending on the size of the room, location of objects, etc. The direct-path echo typically has a larger signal strength than a reflected echo. Thus, the result of direct-path echo may be a large reduction in dynamic range, as well as an annoying howling from the loudspeaker.
Full-duplex speakerphones typically implement adaptive echo cancellation which uses very large AFIR (adaptive finite impulse response) filters for canceling acoustic echo. Adaptive echo cancellers are usually very effective at reducing reflected, or delayed, acoustic echo because the echo signal strength is smaller, and has been changed from the original audio signal. However, when there is a direct-path echo and several reflected echoes, the direct-path echo has a larger signal strength than the signal strength of any of the reflected echoes. The adaptive echo canceller attempts to cancel the strongest signal among the echoed signals. Therefore, the adaptive echo canceller may tend to ignore the weaker reflected echoes when strong direct-path echoes are present.
The typical solution to direct-path echo reduction is to isolate the microphone from the loudspeaker by as much effective distance as possible. In expensive teleconferencing equipment, the loudspeaker may be mounted on a wall or a ceiling, for example, and the microphone may by placed on a table which is a sufficient distance from the loudspeaker to reduce the effects of direct-path echo. In other speakerphone systems where the microphone and the loudspeaker are in the same housing, or enclosure, sound damping materials may be used to attempt to isolate the microphone from the loudspeaker.

Echo cancellation in a full-duplex speakerphone


Test instruments constituting an automatic test system are characterized in terms of execution time data. The execution time data is composed of a set of execution times. Each of the execution times is the time required for the test instrument to perform a respective testing operation. The test instruments additionally have the ability to communicate their respective execution time data to such recipients as others of the test instruments, the system controller and recipients outside the automatic test system. Additionally, such test instruments have the ability to communicate test results to at least one other of the test instruments and the ability to process test results received from at least one other of the test instruments. Such characterization, communication and processing allows a system integrator to devise execution time-dependent test programs as part of a test suite that allows test throughput to be maximized.

Automatic test systems are used to test electronic products. FIG. 1 is a block diagram showing a simplified view of an example of a conventional automatic test system 10. Test system 10 is composed of a system controller 12, a number of test instruments 14 and a test fixture 16. Test fixture 16 provides an interface that allows test system 10 to exchange signals with a unit under test (UUT). System controller 12 is connected to a control port of each of the test instruments 14 via a suitable communication link or network such as GPIB or, more typically, via an Ethernet local area network 18. System controller 12 is additionally connected to the UUT via test fixture 16 and network 18. Test instruments 14 operate in response to commands output by system controller 12 to monitor or control various inputs and outputs of unit under test UUT via test fixture 16. In the example shown, the test instruments are indicated by the same reference numeral 14 but in practice the test instruments that constitute automatic test system 10 differ from one another. The number of test instruments may differ from the number in the example shown. Exemplary ones of the test instruments 14 are indicated at 22 and 24.
An automatic test system such as automatic test system 10 tests a UUT by subjecting the UUT to a sequence of tests. Such sequence of tests will be referred to as a test sequence. In each test in the test sequence, the automatic test system measures the response of the UUT to a stimulus, and compares the response to one or more test limits to determine whether the unit under test has passed or failed the test. The stimulus is typically generated by one of the test instruments 14 constituting test system 10 but may additionally or alternatively be provided by a source external to test system 10. Passing the test typically causes the automatic test system to subject the UUT to the next test in the test sequence. Failing the test may cause the automatic test system to stop testing the unit under test. Alternatively, the automatic test system may repeat the failed test and only stop the testing if the UUT fails the test a predetermined number of times consecutively.
FIG. 2 is a flow chart illustrating a portion of a typical test sequence 30 performed by conventional automatic test system 10 described above with reference to FIG. 1. In block 32, system controller 12 issues commands that configure test instruments 14 to perform a test n. For example, in block 32, the command issued by system controller 12 defines the parameters of a stimulus that will be generated by test instrument 22 and additionally defines a set of measurement parameters that will be used by test instrument 24 to measure the response of the UUT to the stimulus.
In block 34, system controller 12 issues a command that causes test instruments 14 to perform test n. For example, in block 34, the command issued by system controller 12 causes test instrument 22 to generate the stimulus defined in block 32 and to apply such stimulus to the UUT via test fixture 16. The command additionally causes test instruments 24 to receive a response of the UUT to the stimulus via test fixture 16 and to measure the response using the specified measurement parameters.
In block 36, a test is performed to determine whether the UUT has passed test n. For example, in block 36, system controller 12 issues a command that causes test instrument 24 to compare the measurement made in block 34 with a predetermined test limit. The command additionally causes test instrument 24 to return a test result YES when the measurement is within the test limit, otherwise to return a test result NO, and to output the test result to system controller 12. The test result received by system controller 12 determines the future course of the test sequence.
A YES result received by system controller 12 in block 36 causes automatic test system 10 to perform blocks 42 and 44. Blocks 42 and 44 are similar to blocks 32 and 34, respectively, and respectively cause test system 10 to configure itself to perform a test n+1 and to apply test n+1 to the UUT. Blocks 42 and 44 will not be described further.
A NO result in block 36 causes automatic test system 10 to perform block 38. In block 38, controller 12 determines whether the UUT has failed test n a predetermined number m of times.
A YES result in block 38 causes the test sequence to end. A NO result in block 38 causes execution to return to block 34, where test n is executed again. Execution of the loop composed of blocks 34, 36 and 38 continues until a YES result is obtained in block 36 (test n+1 then executes) or a YES result is obtain in block 38 (test sequence then ends).
As electronic products have become more complex, the time required for the automatic test system to test each unit under test has increased. Moreover, the cost of the constituent components of the electronic products has fallen. Consequently, the fraction of the cost of manufacture represented by the cost of testing has undesirably increased.
What is needed is a way to reduce the cost of testing an electronic product.

Test instrument and system responsive to execution time data


The present invention relates to the formation of low volatile anhydride-containing aromatic vinyl polymers by polymerizing the half ester of the anhydride with a vinyl aromatic monomer followed by devolatilizing the half-ester and reforming the anhydride at elevated temperatures and reduced pressures.

In the preparation of polymers of vinyl aromatic monomers, particularly styrene, with maleic anhydride or similar unsaturated anhydrides, by mass or solution polymerization, devolatilization of unreacted monomer, solvent and other volatile components is an absolutely vital step. As polymer technology has progressed, the acceptable level of residual volatile material, particularly as monomer, in a polymer has decreased. While low residual monomer is important for all commercial applications, it is of particular importance in food contact applications, such as containers, where taste and odor contributions to the food are found at relatively low levels. Lower volatile contents also result in improved thermal and mechanical properties. Various means have been employed in the past to reduce volatile content in commercial polymers. However it has not been possible to totally eliminate the volatile content of such polymers.
Multi-polymers, i.e., polymers involving more than one monomer, such as polymers of styrene and maleic anhydride are of particular interest for food contact applications. This interest comes from the increase in heat resistance over polystyrene that results from copolymerization with maleic anhydride. For each added percent of maleic anhydride the heat distortion temperature of the copolymer is increased by nearly 2° C. (Ind. Eng. Chem. Prod. Res. Dev. 1986, 25, 315-321).
Street in U.S. Pat. No. 3,536,787 noted that rubber modified, high impact polystyrene containing 3-5% unreacted styrene could be devolatilized to 2000 ppm of styrene monomer in an extruder devolatilizer system. Street then demonstrated that injection of 0.1% water as a stripping agent, prior to the extruder, lowered the styrene content to 1000 ppm. Generally polymerization to 95-97% conversion level disclosed by Street is not practical because of the long polymerization time required. Further, an extruder devolatilization system is not considered practical for large-scale commercial operations. High capital and operating cost as well as operational problems with vacuum line plugging are among major deterrents to their use.
Fujimoto, in U.S. Pat. No. 3,987,235, discloses a devolatilization by introducing methanol into molten styrene polymer and removing the volatiles under vacuum. However, this route requires a high pressure apparatus for dispersing the methanol into the polymer and an entire additional devolatilization system. This additional system includes a polymer heater, a vacuum chamber with expulsion pump, condenser and other auxiliary equipment.
Skilbeck has shown in U.S. Pat. No. 5,380,822 (which is hereby incorporated by reference to demonstrate the mechanical equipment and steps employed in devolatilization) that a previously devolatilized molten blend of polystyrene and rubber modified polystyrene containing less than 2 weight % residual monomer could be further reduced by dispersing water as a stripping agent into the molten stream and passing it through a vacuum devolatilization system.
Maleic anhydride, MA, can be used as a comonomer to increase heat resistance of polystyrene, but requires intensive mixing during copolymerization. Moore (Ind. Eng. Chem. Prod. Res. Dev. 1986, 25, 315-321) teaches conditions to produce homogeneous copolymers of styrene and 0 to 33% of MA. Moore later demonstrated (U.S. Pat. No. 3,919,354) that high impact copolymers of styrene and MA could be produced in a series of reactors. These copolymers all have Vicat softening points that are about 2° C. above that of homopolymer polystyrene for each added percent of MA.
High degrees of agitation are necessary in order to produce homogeneous copolymers of styrene and MA. If agitation is gradually reduced the first indication of a lack in homogeneity will be a slight haze. Further reduction will produce a cloudy copolymer and a still further reduction will result in an opaque copolymer. In a crystal grade copolymer clarity is of value for most applications. A haze will thus reduce the value of copolymer for most unpigmented applications. Cloudiness will reduce value further and there are relatively few commercial applications that will accept an opaque polymer. Rubber modified styrene/maleic anhydride copolymers are more tolerant of non-homogeneous polymer but will see a loss in impact strength when there is a high degree of non-homogeneity. It is desirable to produce a heat resistant styrene copolymer or terpolymer or rubber modified heat resistant polymer with reduced agitation requirements.


Characterizing dielectric surfaces by detecting electron tunneling. An apparatus includes an atomic force probe. A mechanical actuator is connected to the atomic force probe. A mechanical modulator is connected to the mechanical actuator. The mechanical modulator modulates the mechanical actuator and the atomic force probe at the resonant frequency of the atomic force probe. An electrical modulator is connected to the atomic force probe. A feedback sensing circuit is connected to the mechanical modulator to detect movement of the atomic force probe and provide information about the movement of the atomic force probe to the mechanical modulator allowing the mechanical modulator to modulate the atomic force probe at the resonant frequency of the atomic force probe as the resonant frequency of the atomic force probe changes. An FM detector is connected to the feedback circuit detects changes in the resonant frequency of the atomic force probe.

1. The Field of the Invention
The invention is generally directed to measuring surface characteristics. More particularly, the invention is directed to measuring electron tunneling events and surface potentials of dielectric materials to characterize electronic states and/or defects with high spatial and/or energy resolution.
2. Description of the Related Art
Material science is directed towards the study of materials used in manufacturing various devices. One area of materials science is directed to characterizing surfaces of materials. In particular, it is often useful to be able to characterize surfaces of materials at an atomic level. For example, in the semiconductor device context, the ability to continue to scale semiconductor devices (implement more semiconductor devices in smaller amounts of space) requires that electronic defects in dielectric materials used in fabricating the semiconductor devices be understood. For example, silicon dioxide is a common dielectric material used in silicon semiconductor manufacturing. Due to impurities and other defects, the silicon dioxide may develop electron traps within the silicon dioxide. The electron traps result in loss of performance of semiconductor devices. The accumulation of these types of defects can limit the scalability of semiconductor devices. Presently, no atomic scale method exists for measuring the atomic scale location of the electronic defects in completely insulating materials.
Another material that is presently of interest is hafnium oxide. The use of hafnium oxide may help to further facilitate semiconductor scalability. However, hafnium oxide films may include significant defects which should be detected and understood.
It is also useful to understand other surfaces which are non-conducting or structures on non conducting surfaces. For example, it may be useful to study molecules on non-conducting surfaces or conducting structures on non-conducting surfaces.
It may also be useful to understand surface potentials on dielectric and non-conducting surfaces that may be associated which charge on the surface.
The subject matter claimed herein is not limited to embodiments that solve any disadvantages or that operate only in environments such as those described above. Rather, this background is only provided to illustrate one exemplary technology area where some embodiments described herein may be practiced.

Scanning probe characterization of surfaces

The University of Utah Research Foundation


An apparatus comprising a sight axis detection means for detecting a sight axis direction of a photographer who looks into a finder field, a focus detection means for detecting focus adjustment states in a plurality of areas in the finder field, and a photometry means for measuring luminances of a plurality of areas in the finder field, which causes a selection means to select an area to be subjected to a distance measuring operation on the basis of signals from the sight axis detection means and the photometry means, and performs focus detection of an objective lens on the basis of a focus detection signal from the focus detection means in the area selected by the selection means.

1. Field of the Invention
The present invention relates to a camera having a focus detection means and a sight axis detection means and, more particularly, to an apparatus suitably used for a still camera, a video camera, an SV camera, and the like upon adjustment of a focusing state of a photographing system by selecting one of a plurality of in-focus signals obtained by the focus detection means having a function of detecting focusing states on a plurality of areas of an object.
2. Related Background Art
Conventionally, there have been proposed various cameras, in each of which an area in a finder field observed by a photographer, i.e., a so-called view direction of the photographer is detected by a sight axis detection means provided to a portion of a camera, and various photographing functions such as an auto-focusing function, an auto-exposure function, and the like are controlled on the basis of a signal from the sight axis detection means.
For example, Japanese Laid-Open Patent Application No. 61-61135 proposes a camera, which adjusts the focusing state of a photographing system by mechanically controlling the distance measuring direction of a focus detection device on the basis of an output signal from a sight axis detection means.
Also, the present applicant proposes, in Japanese Laid-Open Patent Application No. 1-241511, a camera, which comprises a sight axis detection means for detecting the view direction of a photographer, a focus detection means having a plurality of distance measuring fields, and an auto-exposure control means having a plurality of photometry sensitivity distributions, and controls the driving operations of the focus detection means and the auto-exposure control means on the basis of an output signal from the sight axis detection means.
In a conventional camera, photographing conditions for focus adjustment, exposure control, and the like are automatically set with reference to the central area in the finder field. In contrast to this, in the camera proposed by this patent, an arbitrary area (many areas in some cases) in the finder field is selected on the basis of a photographer's choice, and focus adjustment, exposure control, and the like are performed with reference to the selected area. Thus, one of the most important factors in image formation can be selected independently of automatic control methods, and a photographing operation can be performed under the desired conditions intended by a photographer.
In general, the movement of the sight axis of the photographer who observes the finder field is complex, and the sight axis position observed by the photographer does not always correspond to a main object, i.e., a distance measuring area to be focused.
For example, a photographer's attention is drawn to an especially bright object (having a high luminance) near the periphery of the frame, and the photographer may instantaneously observe the object.
In this case, when an auto-focusing operation is performed with reference to a distance measuring area selected on the basis of the sight axis information of the photographer, the driving operation of a focusing lens is very complicated, and the focusing state frequently changes (in particular, in a single-lens reflex camera).
As a result, a finder image cannot easily be observed, and the camera cannot be focused on the main target object.


In cancelling the cast out portion of a combined operation including a data access related to the cast out, the combined response logic explicitly directs a horizontal storage device at the same level as the storage device initiating the combined operation to allocate and store either the cast out or target data. A horizontal storage device having available spacexe2x80x94i.e., an invalid or modified data element in a congruence class for the victimxe2x80x94stores either the target or the cast out data for subsequent access by an intervention. Cancellation of the cast out thus defers any latency associated with writing the cast out victim to system memory while maximizing utilization of available storage with acceptable tradeoffs in data access latency.

1. Technical Field
The present invention relates in general to alternatives to cancelled cast out operations in data processing systems and in particular to directing different allocation of cast out or target data. Still more particularly, the present invention relates to instructing, within a combined response to an operation involving a cast out, a horizontal storage device to allocate and store either the cast out data or the target data.
2. Description of the Related Art
High performance data processing systems typically include a number of levels of caching between the processor(s) and system memory to improve performance, reducing latency in data access operations. When utilized, multiple cache levels are typically employed in progressively larger sizes with a trade off to progressively longer access latencies. Smaller, faster caches are employed at levels within the storage hierarchy closer to the processor or processors, while larger, slower caches are employed at levels closer to system memory. Smaller amounts of data are maintained in upper cache levels, but may be accessed faster.
Withinsuch systems, when data access operations frequently give rise to a need to make space for the subject data. For example, when retrieving data from lower storage levels such as system memory or lower level caches, a cache may need to overwrite other data already within the cache because no further unused space is available for the retrieved data. A replacement policyxe2x80x94typically a least-recently-used (LRU) replacement policyxe2x80x94is employed to decide which cache location(s) should be utilized to store the new data.
Often the cache location (commonly referred to as a xe2x80x9cvictimxe2x80x9d) to be overwritten contains only data which is invalid or otherwise unusable from the perspective of a memory coherency model being employed, or for which valid copies are concurrently stored in other devices within the system storage hierarchy. In such cases, the new data may be simply written to the cache location without regard to preserving the existing data at that location by deallocating the cache location and reallocating the same cache location for the new data.
At other times, however, the cache location selected to received the new data contains modified data, or data which is otherwise unique or special within the storage hierarchy. In such instances, the replacement of data within a selected cache location (a process often referred to as xe2x80x9cupdatingxe2x80x9d the cache) requires that any modified data associated with the cache location selected by the replacement policy be written back to lower levels of the storage hierarchy for preservation. The process of writing modified data from a victim to system memory or a lower cache level is generally called a cast out or eviction.
When a cache initiates a data access operationxe2x80x94for instance, in response to a cache miss for a READ operation originating with a processorxe2x80x94typically the cache will initiate a data access operation (READ or WRITE) on a bus coupling the cache to lower storage levels. If the replacement policy requires that a modified cache line be overwritten, compelling a cast out for coherency purposes, the cache will also initiate the cast out bus operation.
There are a number of circumstances in which an eviction or cast out may, from the perspective of global data storage management, be less preferable than other alternatives. For example, if the target of the data access is only going to be accessed once by the processor core requesting that cache line (e.g., the cache line contains instructions not affected by branching), there would be no benefit to casting out the existing cache line in order to make space for the requested cache line. Alternatively, where a cache from which the victim is being evicted is one or multiple caches in a given level of a storage hierarchy, each supporting modified or shared intervention, and a horizontal cache (one at the same level as the evicting cache) has an invalid or shared entry within the congruence class for the victim, available data storage may be more effectively employed by allowing the data access target or the cast out victim to replace the invalid or shared entry.
It would be desirable, therefore, to be able to cancel a cast out operation or portion of an operation in order to improve global data storage management. It would further be advantageous if cancelling the eviction did not significantly increase latency of data access operations.
It is therefore one object of the present invention to provide alternatives to cancelled cast out operations in data processing systems.
It is another object of the present invention to provide a mechanism for directing different allocation of cast out or target data as an alternative to cancelled cast out operations.
It is yet another object of the present invention to provide a mechanism for instructing, within a combined response to an operation involving a cast out, a horizontal storage device to allocate and store either the cast out data or the target data.
The foregoing objects are achieved as is now described. In cancelling the cast out portion of a combined operation including a data access related to the cast out, the combined response logic explicitly directs a horizontal storage device at the same level as the storage device initiating the combined operation to allocate and store either the cast out or target data. A horizontal storage device having available spacexe2x80x94i.e., an invalid or modified data element in a congruence class for the victimxe2x80x94stores either the target or the cast out data for subsequent access by an intervention. Cancellation of the cast out thus defers any latency associated with writing the cast out victim to system memory while maximizing utilization of available storage with acceptable tradeoffs in data access latency.
The above as well as additional objects, features, and advantages of the present invention will become apparent in the following detailed written description.

Multiprocessor system bus with combined snoop responses explicitly informing snoopers to scarf data

International Business Machines Corporation


A machine (1) for spreading fabric on a spreading plane (2) includes a carriage (3) that is movable on the spreading plane, the carriage has an unwinding system (6) for unwinding the fabric; an inclined chute arranged below; a cutting system (11) for cutting the fabric, arranged at a lower end (12) of the chute; and a movement system (35) for moving the unwinding system between a first and a second unwinding operating configuration. In the first configuration, a first end (14) of the unwinding system is vertical to the chute (10) and in the second configuration, the first end (14) is in an advanced position towards the cutting head (13).

The object of the present invention is a machine for spreading fabric that is, a machine that is capable of laying out a layer or a number of overlapping layers of fabric on a plane surface, unwinding it from a roll of fabric or from folded fabric.
There are prior-art machines for spreading fabric that comprise a spreading plane and a carriage that is movable with rectilinear forward-backward motion over the spreading plane. A system for unwinding the fabric is mounted on the carriage and comprises a pair of conveyor belts arranged adjacently in a "V" shape so as to define an area for receiving the roll of fabric to be unwound, with the axis thereof arranged horizontally. An inclined chute is also mounted on the carriage and a cutting system for cutting the fabric is mounted in the proximity of the lower end of the chute.
In use, the simultaneous rotation of the conveyor belts transmits rotational motion to the roll of fabric about its own axis, which results in the unwinding of the fabric from the roll. The strip of unwound fabric is conveyed by the conveyor belt arranged downstream (with respect to the direction of advancement of the unwound fabric) to the free end, from which the fabric, continuing to move, drops downwards until it rests on the inclined chute that guides the strip of fabric towards the cutting system and from there to the spreading plane.
The coordinated movement of the conveyor belts and of the carriage gradually spreads the strip of unwound fabric on the spreading plane. Once the desired length of fabric has been laid out, the cutting system cuts the fabric and the spreading cycle can thus resume.
The Applicant has observed that this spreading technique is not optimal for some fabrics, including for example very thin and/or lightweight knit fabrics, in that sliding on the chute and/or being drawn over a substantial portion of the belt leads to the formation of creases in the fabric spread out on the spreading plane, resulting in the need for an operator to intervene so as to remove them manually.
There is also an alternative prior-art technique in which the unwound fabric drops vertically from an unwinding system until it engages the cutting system, without any chute on which the fabric can slide.
However, the Applicant has observed that this spreading technique leads to a lower spreading speed, even when fabrics of substantial weight are spread. This is because the vertical drop of the fabric creates a "sail" of sorts, which tends to belly owing to the coming and going motion of the carriage, and this effect increases as the speed of deposition increases, said speed thus being subject to a limit.


A semiconductor memory device includes a memory cell array block (1; MB1 to MB16) having a first column group (area I) and a second column group (area II). The device also includes sense amplifiers (10-1, 10-2, 10-3 . . . ) provided for each column to detect and amplify a read-out voltage on associated columns. The device further includes a control circuit (20) for activating the sense amplifiers for the first column group and the sense amplifiers for the second column group at different timings to reduce peak current in sensing operation. The control circuit operates in response to a column designating signal to activate first the sense amplifiers for the column group including a column connecting thereto a selected memory cell. The column designating signal includes an externally applied column address bit. The column address bit is supplied to the device simultaneous with row address bits in an address multiplexing memory device. The first column group (BL0, BL0, BL2, BL2) includes a plurality of bit line pairs having at least one twisted portions. The second column group (BL1, BL1) includes a plurality of bit line pairs having no or one or more twisted portion. Bit line pairs of the first column group and bit line pairs of the second column group are arranged alternately.

1. Field of the Invention
This invention relates generally to dynamic-type semiconductor memory devices, and more particularly, to an improvement of a scheme for driving a sense amplifier in a dynamic random access memory having a twisted bit line arrangement.
2. Description of the Background Art
As one of semiconductor memory devices, a dynamic-type random access memory (hereinafter, referred to as DRAM) is known. FIG. 1 shows an example of an entire structure of a conventional DRAM.
Referring to FIG. 1, the DRAM includes a memory cell array 1 in which a plurality of memory cells (not shown in FIG. 1) are arranged in a matrix. In order to select one memory cell (in case of 1 bit configuration) of the memory cell array 1, provided are an address buffer 2 for receiving an address A applied from an exterior to generate an internal row address RA and an internal column address CA, an X decoder 3 for decoding the internal row address RA from the address buffer 2 to select one corresponding row in the memory cell array 1, and a Y decoder 4 for decoding the internal column address CA from the address buffer 2 to select one column of the memory cell array 1.
In order to transfer data between a selected memory cell and the exterior of DRAM, provided are a sense amplifier which is activated in response to a sense amplifier activating signal .phi.0 from a sense amplifier activating signal generator 8, for sensing data of memory cells in one row selected by the X decoder 3 for amplification, and an I/O gate for selecting one column in the memory cell array 1 in response to a signal from the Y decoder 4 to connect the selected one to the exterior to the memory. FIG. 1 shows the sense amplifier and the I/O gate as included in one block 7.
In order to define operation timing of DRAM, provided are a RAS buffer 5 which receives a row address strobe signal RAS applied from the exterior for generating an internal signal to apply the same to the address buffer 2, the X decoder 3 and the sense amplifier activating signal generator 8, and a CAS buffer 6 which generates an internal control signal (a signal for controlling column selecting operation) in response to the column address strobe signal CAS for applying the same to the address buffer 2 and the Y decoder 4.
The address A from the exterior to the address buffer 2 has a row address and a column address time division multiplexed. The address buffer 2 generates an internal row address RA and an internal column address CA after accepting the internal address A as a row address and a column address in response to each internal control signal from the RAS buffer 5 and the CAS buffer 6.
FIG. 2 shows an example of a detailed structure of the memory cell array 1, the sense amplifier and I/O gate block 7 shown in FIG. 1.
Referring to FIG. 2, memory cells MC are arranged in matrix of rows and columns. Bit lines each for connecting a column of the memory cell array 1 constitute a folded bit line scheme wherein two bit lines are disposed in pair. More specifically, bit lines BL0 and BL0 connect one column of the memory cell array, and respective bit lines BL1, BL1 and BL2, BL2, and BLm, BLm select one column of the memory cell array.
Word lines WL1, WL2, . . . , each connecting one row of the memory cell array 1 are provided so as to intersect with each of bit lines BL0 - BLm.
Sense amplifiers 10 - 1.about.10 - n are provided on each of bit line pairs BL0, BL0, . . . , and BLm, BLm, which are activated in response to a sense amplifier activating signal .phi.0 for sensing potentials of a corresponding bit line pair for amplification.
Precharging-equalizing circuits 15 - 1.about.15 - n are provided on each of bit line pairs BL0, BL0, . . . and BLm, BLm for precharging and equalizing each bit line pair to a predetermined potential (usually, half an operation power supply potential Vcc/2).
Furthermore, each of column selecting switches T0, T0', T1, T1', T2, T2', . . . , Tm, Tm' is respectively provided corresponding to each bit line for connecting one column of the memory cell array 1 to data input/output buses I/O, I/O in response to a column selecting signal from the Y decoder 4.
A memory cell MC is disposed at an intersection of each word line and one bit line of a bit line pair.
Parasitic capacitance C.sub.M inevitably exists between adjacent bit line pairs. The parasitic capacitance C.sub.M becomes large as a pitch or space between bit lines is made smaller concomitantly with the high integration of DRAM.
Now, brief description of operation will be made, taking an example of that in data reading. Initially, DRAM is in a stand-by state, and a row address strobe signal RAS is at "H" level. Accordingly, each of precharging/equalizing circuits 15 - 1.about.15 - n is in active state to precharge a corresponding bit line pair to a predetermined precharge potential Vp and hold the same.
When the row address strobe signal RAS drops to the "L" level, a memory cycle starts, thereby causing the address buffer 2 to accept an external address A for applying as an internal row address RA to the X decoder 3. The X decoder 3 decodes the internal row address RA and selects a single word line (e.g. a word line WL1) in the memory cell array 1, so that stored information in the memory cells MC connected to the selected word line (WL 1) is transferred onto a corresponding bit line. Then, each of the sense amplifiers 10 - 1.about.10 - n is activated by the sense amplifier activating signal .phi.0 from the sense amplifier activating signal generator 8, so that potentials on each bit line pair are sensed to be differentially amplified. Then, in response to an internal control signal from the CAS buffer 6, the address buffer 2 generates an internal column address CA to be applied to the Y decoder 4. The Y decoder 4 decodes the internal column address CA, and applies a column selecting signal to transfer gates T0 - Tm' for selecting a corresponding column, so that a pair of column selecting switches enters an on state and the selected bit line pair is connected to the data input/output buses I/O and I/O, and then the selected memory cell data is read out to the exterior.
Data reading is performed in the above operation, wherein each of sense amplifiers 10 - 1.about.10 - n (hereinafter, as a representative, a sense amplifier is shown as a reference numeral 10) differentially amplifies a very small potential difference on a corresponding bit line pair. If a DRAM is more integrated, a parasitic capacitance C.sub.M between bit line pairs becomes large, so that a read potential between adjacent bit lines affects each other by means of capacitive coupling. Therefore, a problem arises that the sense amplifier 10 can not correctly sense and amplify a potential difference between a corresponding bit line pair. The situation of this will be explained in more detail in the following.
FIGS. 3A to 3D show change of a potential of each bit line pair during the operation of a sense amplifier. FIGS. 3A to 3D also show effects on reference potentials of a bit line pair BL1 and BL1 exerted by bit line pairs BL0, BL0 and BL2, BL2. In the following, referring to FIGS. 3A to 3D, potential changes of bit lines due to capacitive coupling between adjacent bit line pairs at the time of operation of a sense amplifier will be described.
First, referring to FIG. 3A, an operation will be described wherein potentials of the logical low ("L") level are read out onto both of a bit line BL0 and a bit line BL2. When a potential of a selected word line (for example, a word line WL1 in FIG. 2) rises at the time of t0, information of a memory cell MC connected to the selected word line is transferred to the bit lines BL0 and BL2. At this time, the potentials of the bit lines BL0 and BL2 do not deviate and remain at the reference potential. Accordingly, a potential of a bit line BL1 adjacent to the bit line BL0 does not change and remains at the precharge potential V.sub.p. On the other hand, the potential change .DELTA.V1 of the bit line BL2 is transferred to a bit line BL1 adjacent to the bit line BL2 by means of capacitive coupling, so that the reference potential of the BL1 drops by .DELTA.V1'. At the time t1, a sense amplifier 10 is activated, thereby starting discharging a bit line of a lower potential of a bit line pair, so that the potential change .DELTA.V2-1 of the bit line BL2 is transferred to the bit line BL1 by means of capacitive coupling and the reference potential (precharge potential) of the bit line BL1 further drops by .DELTA.V2'- 1. When the sense amplifier further operates at the time t2, and bit lines of higher potential are charged to the operation power supply potential Vcc level, the potentials of the bit lines BL0 and BL2 rise to the power supply potential Vcc. Accordingly, the potential of the bit line BL1 rises by means of capacitive coupling by .DELTA.V3'-1 according to the potential change .DELTA.V3'- 1 of the bit line BL0.
Referring to FIG. 3B, described is a deviation of the reference potentials (precharge potential) of bit lines BL1 and BL1 when potentials of the logical high "H" level are read out onto the bit lines BL0, BL2. First, when a potential of a selected word line rises at the time t0, data of respective memory cells connected to the selected word line are transferred to the bit lines BL0 and BL2, thereby causing the potentials of the bit lines BL0 and BL2 to rise by .DELTA.V1. Due to the potential rise .DELTA.V1 of the bit line BL2, a potential of the bit line BL1 rises by .DELTA.V1' by means of capacitive coupling. When the sense amplifier 10 is activated at the time t1, bit lines of lower potentials are discharged to the ground potential, thereby causing a potential of the bit line BL0 to drop to 0V, and causing the potential drop to the bit line BL1 by means of capacitive coupling, so that a potential of the bit line BL1 drops by .DELTA.V2'- 2. When at the time t2, a further operation of the sense amplifier causes bit line potentials of higher potential to rise to the power supply potential Vcc level, the potentials of the bit lines BL0 and BL2 further rise by .DELTA.V3 - 2. The potential rise .DELTA.V3 - 2 of the bit line BL2 is transferred to the bit line BL1 by means of capacitive coupling, so that the reference voltage of the bit line BL1 further rises by .DELTA.V3'- 2.
With reference to FIG. 3C, described is an operation wherein a potential of the "L" level is transferred to the bit line BL0 and a potential of the "H" level is transferred to the bit line BL2. At the time t0, when a potential of a selected word line rises, a potential of the bit line BL2 rises by .DELTA.V1, while a potential of the bit line BL0 drops by .DELTA.V1. The potential drop .DELTA.V1 of the bit line BL2 is transferred to the bit line BL1 by means of capacitive coupling, so that the reference potential of the bit line BL1 rises by .DELTA.V1'. At the time t1, when the sense amplifier 10 is activated, bit lines of lower potential are discharged. At this time, since bit lines to be discharged are bit lines BL0 and BL2, the potentials do not rise due to capacitive coupling to the bit lines BL1 and BL1, and reference potentials of the bit lines BL1 and BL1 remain the same as that of the time t1 when at the time t2, a further operation of the sense amplifier causes bit lines of higher potential to charge, a potential of the BL0 rises by .DELTA.V3 - 1, and the potential of the bit line BL2 rises by .DELTA.V3 -2. As a result, the reference voltage of the bit line BL1 rises by .DELTA.V3'-1, while the reference potential of the bit line BL1 rises by .DELTA.V3'- 2.
Operation will be described with reference to the FIG. 3D wherein a potential of the "H" level is transferred to the bit line BL0 and a potential of the "0" level to the bit line BL2. At the time t0, when a selected word line is activated, a read potential .DELTA.V1 is transferred to the bit line BL0 and BL2. As a result, the reference potential of the bit line BL1 drops by .DELTA.V1'. At the time t1, when the sense amplifier is activated, the bit lines BL0 and BL2 are discharged to the ground potential. The potential drops .DELTA.V2 - 1 of the bit line BL2 is transferred to the bit line BL1 by means of capacitive coupling, thereby causing the reference potential of the bit line BL1 to further drop by .DELTA.V2'-2. The potential drop .DELTA.V2'-2 of the bit line BL0 is transferred to the bit line BL1 by means of capacitive coupling, thereby causing the reference potential of the bit line BL1 to drop by .DELTA.V2'- 2. At the time t2, operation of the sense amplifier causes potentials of the bit lines BL0 and BL2 of higher potential to start rising up to the power supply potential Vcc level. The potential rise of the bit lines BL0 and BL2 after the time t2 does not affect the potentials of the bit lines BL1 and BL1.
As described in the foregoing, as the degree of integration of a semiconductor memory device DRAM is increased, a space between bit lines becomes narrower, and capacitance value of parasitic capacitance C.sub.M becomes larger. In this case, if potential changes caused by a coupling capacitance between adjacent bit lines are in the same phase, adverse effect on a sensing operation can be avoided, but when a noise occurs in the opposite phase, correct data reading can not be performed. More specifically, since the sense amplifier differentially amplifies a potential difference of a bit line pair, if noise of the same phase appears on a bit line pair, it is possible to cancel that noise and detect correctly the potential of the bit line pair. However, as shown in FIG. 3A and FIG. 3B, if noise of opposite phase occurs on a bit line pair, sometimes it will be impossible to read data correctly due to reduction in a potential difference of a bit line pair or due to inverse of readout data, caused by the noise.
A twisted bit line arrangement as shown in FIG. 4 is proposed in order to prevent operation of erroneous data reading due to capacitive coupling noise in such a highly integrated DRAM as the above. In FIG. 4, although the same reference numerals are given to the corresponding portions in FIG. 2, a bit line pair having crossing portion in the central portion is disposed every other pair. More specifically, while in FIG. 4, a bit line pair BL1 and BL1, and bit line pair BLm and BLm are non-twisted bit line pair without crossing portion, bit line pair BL0 and BL0, and bit line pair BL2 and BL2 construct a twisted bit line pair arrangement having crossing portion in the center. In this case, for example, value of coupling capacitance of the bit line BL1 is reduced due to capacitive coupling to the respective bit lines BL0 and BL0 through coupling capacitance C.sub.M /2, and noise by means of the capacitive coupling to the adjacent bit lines BL0 and BL0 becomes opposite phase, while noise of the same phase is transferred from the bit line BL1 to bit line BL0 and BL0, thereby intending to reduce noise through coupling capacitance. FIGS. 5A to 5D show a diagram illustrating potential change in sensing operation of DRAM of a twisted bit line arrangement shown in FIG. 4.
FIG. 5A shows changes of reference potentials of the bit lines BL1 and BL1 when potentials of the "L" level are transferred to the bit lines BL0 and BL2, FIG. 5B shows changes of reference potentials of the bit lines BL1 and BL1 when potentials of the "H" level are transferred to the bit lines BL0 and BL2, FIG. 5C shows changes of reference potentials of the bit lines BL1 and BL1 when potentials of the "H" level are transferred to the bit line BL2, and FIG. 5D shows changes of reference potentials of the bit lines BL1 and BL1 when a potential of the "H" level is transferred to the bit line BL0 and that of the "L" level to the bit line BL2.
As shown in FIGS. 5A to 5D, all the potential changes of the bit lines .DELTA.V2'- 2, and .DELTA.V3"- 2 caused by capacitive coupling of adjacent bit line pairs occur in the same phase, and the amount of potential changes due to capacitive coupling is smaller than that in a non-twisted bit line structure. Accordingly, even if DRAM is more highly integrated and a pitch between bit lines is made smaller, it is possible to reduce noise caused by capacitive coupling and to make noise through capacitive coupling into the same phase on each bit line pair by employing the above twisted bit line structure, so that it will be possible to prevent erroneous detection of data in the sensing operation.
As in the foregoing, in a highly integrated DRAM, a twisted bit line structure makes it possible to reduce the amount of potential changes of bit lines caused by capacitive coupling between adjacent bit line pairs and to make capacitive coupling noise into noise of the same phase, and thus erroneous reading of data can be prevented. However, as DRAM is more highly integrated to have larger capacity, the number of memory cells connected to a single word line is increased. More specifically, for example, in the case of DRAM of 1M bit, 1024 memory cells are connected to a single word line. Since a single sense amplifier is provided to a single column, 1024 sense amplifiers are needed in the case of DRAM of 1M bit. In this case, since 1024 sense amplifiers are all to be operated simultaneously, potentials of the bit lines are charged or discharged through the sense amplifiers. As a result, peak current flowing through sense amplifiers in operation is increased, so that a large current leakage flows into a substrate to generate substrate current (hole current caused by impact ion and the like), and substrate potential deviates, resulting in malfunction of any circuit of DRAM in some case.
More specifically, a constant bias potential is usually provided to a substrate, so that a threshold voltage of MOSFET (insulated gate type field effect transistor) formed on a semiconductor substrate is stabilized, parasitic capacitance (junction capacitance) is reduced, and occurrence of parasitic FET caused between interconnection lines and the substrate is prevented, thereby stabilizing operation of each circuit. However, as in the foregoing, if many sense amplifiers operate simultaneously and large peak current flows through a substrate, not only the operation power supply potential deviates but also potential of the substrate deviates due to hole current flowing into the substrate, thereby causing malfunction of each circuit and making the correct data reading impossible.
Reduction of peak current has been tried by dividing a memory cell array into blocks, activating only a block comprising a selected memory cell, and operating only sense amplifiers included in the activated block. However, even in this scheme, the more the memory cells included in one block, the more the sense amplifiers operate simultaneously, which results in a large peak current flow.

Dynamic-type semiconductor memory device having staggered activation of column groups


A series of benzimidazole compounds having the following general structure are provided which inhibit the growth of picornaviruses (e.g., rhinoviruses, enteroviruses, polioviruses, coxsackieviruses of the A and B groups, echo virus and Mengo virus) and flaviviruses (e.g., hepatitis C and bovine diarrheal virus). ##STR1## A method for inhibiting picornaviruses and flaviviruses is also provided which includes administering to a host an effective amount of the inventive benzimidazole compounds.

The incidence of viral upper respiratory disease, the common cold, is immense. It has been estimated that nearly a billion cases annually appear in the United States alone. Rhinovirus, a member of the picornaviridae family, is the major cause of the common cold in humans. Because more than 110 strains of rhinoviruses have been identified, the development of a practical rhinovirus vaccine is not feasible, and chemotherapy appears to be the more desirable approach. Another member of the picornavirus family is the enterovirus, which includes approximately eighty human pathogens. Many of these enteroviruses cause cold-like symptoms; others can cause more serious diseases such as polio, conjunctivitis, aseptic meningitis and myocarditis.
Illness related to rhinovirus infection is evidenced by nasal discharge and obstruction. Furthermore, it has been implicated in otitis media, predisposes the development of bronchitis, exacerbates sinusitis, and has been implicated in the precipitation of asthmatic altoclis. Although it is considered by many to be a mere nuisance, its frequent occurrence in otherwise healthy individuals and the resulting economic importance in terms of employee absenteeism and physician visits have made it the subject of extensive investigation.
The ability of chemical compounds to suppress the growth of viruses in vitro may be readily demonstrated using a virus plaque suppression test or a cytopathic effect test (CPE). Cf Siminoff, Applied Microbiology, 9(1), 66 (1961). Although a number of chemical compounds that inhibit picornaviruses such as rhinoviruses have been identified, many are unacceptable due to 1) limited spectrum of activity, 2) undesirable side effects or 3) inability to prevent infection or illness in animals or humans. See Textbook of Human Virology, edited by Robert B. Belshe, chapter 16, "Rhinoviruses," Roland A. Levandowski, 391-405 (1985). Thus, despite the recognized therapeutic potential associated with a rhinovlrus inhibitor and the research efforts expended thus far, a viable therapeutic agent has not yet emerged. For example, antiviral benzimidazole compounds have been disclosed in U.S. Pat. Nos. 4,008,243, 4,018,790, 4,118,573, 4,118,742, 4,174,454 and 4,492,708.
In general, the compounds disclosed in the above patents do not have a desirable pharmacological profile for use in treating rhinoviral infections. Specifically, these compounds do not possess satisfactory oral bioavailability or a high enough inhibitory activity to compensate for their relatively low oral bioavailability to permit their widespread use. In addition, it is widely accepted in the art that compounds used to treat rhinoviral infections should be very safe from a toxicological standpoint.