A product package includes a generally flat hang card with an enclosed product chamber and at least one lateral edge with a two dimensional profile cut pattern of a product in the package which enables a prospective customer the opportunity to compare the profile of a sample product to determine the compatibility of the sample with the packaged product or to confirm the content of the package without opening the package.

In a principal aspect, the present invention relates to a product package construction for displaying the product maintained, in the package while further incorporating a feature which enables a prospective purchaser of the packaged product to confirm that the packaged product is compatible with a sample of a related item maintained by the prospective purchaser without removing the packaged product from the package.
Many products are packaged in packaging such as a display pack comprised of a generally flat cardboard backing with a clear plastic cover adhered to the backing. The plastic cover retains the product on the backing. The cardboard backing typically includes a slot or opening near the top edge so that the packaged product may be supported on a display hook. Thus multiple packages of the identical packaged item or product may be supported on a single display hook. Often, similar products are displayed in an array of multiple hooks on a display rack. As a consequence, customers searching for a particular item in such a display may, as a result of inspecting the packaged products, remove display items temporarily and then replace them improperly on a display hook. Consequently, a subsequent customer may mistakenly choose a displayed, packaged item or may be challenged to confirm that the correct item is available or being chosen for purchase. This is a problem which can be especially frustrating in the circumstance where the display rack array involves products that are similar with subtle, but important differences.
For example, various fasteners, air hose couplers, hardware items and many other products may be difficult to easily distinguish. In an effort to overcome this problem, the products involved may be retained in clear plastic blister packaging. That is, the cardboard backing for the product may include a clear plastic bubble shaped cover for the product which enables the customer to see the potential purchase. Further the cardboard backing may include descriptive printing, product names and other legends to assist product choice. Nonetheless, customers may be challenged to make the correct purchase choice even if the customer has a sample of the desired product for visual comparison purposes.
Thus there has developed the need to provide a package construction which will assist a customer making a desired product choice.

Package display card with die cut silhouette pattern of product profile


To accurately extract embedded information from a document image using line spacing watermark, an image processing apparatus for extracting watermark information includes an input unit which inputs a document image as image data, an image reduction unit which generates, from the image data, reduced image data reduced in the first direction, a detection unit which scans the reduced image data in the second direction and detects the length of a blank region as line spacing information, and an extraction unit which extracts watermark information embedded in the document image based on the line spacing information.

1. Field of the Invention
The present invention relates to an image processing technique of extracting watermark information embedded in a document image based on the line spacing between the character strings in the document image.
2. Description of the Related Art
As a technique of adding information of, for example, copyright or copy control to a document image, a method described in Kineo Matsui, "Basics of a digital watermark", Morikita Publishing Co., Ltd. pp. 198-199, 1998 (ISBN:4-627-82551-X) is known, in which information is embedded using line spacing (to be referred to as a line spacing watermark hereinafter). FIG. 2 is a view showing the concept of a line spacing watermark. To extract embedded information from a document image using a line spacing watermark, first, the line spacing between the character strings in the document image is obtained. To obtain the line spacing, generally, a histogram is obtained by fully scanning the document image. The line spacing is derived from the histogram. Then, information is extracted in accordance with the derived line spacing and a rule used for embedding. To embed, e.g., binary information "0", line spacings U and D are set to U>D, as shown in FIG. 2. On the other hand, to embed binary information "1", the line spacings U and D are set to U<D.
However, the above-described method of extracting information embedded in a document image using a line spacing watermark has the following problems. To measure the line spacing, it is necessary to fully scan the document image and obtain a histogram. Hence, an accurate information extraction process is time-consuming. In particular, when copy control information is embedded, the copy control information is extracted in a copying machine, whether or not copy is possible is determined based on the extracted information, and then, a copy process is performed. The series of processes of copying one document takes a lot of time. Additionally, when the character string direction copying one document takes a lot of time. Additionally, when the character string direction and scanning direction of the input document image are tilted with respect to each other, no line spacing can be derived from the histogram. In this case, the document image needs to be input again. Alternatively, cumbersome image processing of, for example, rotating the input document image is necessary.

Image processing apparatus and method of controlling the same


A memory managing method is provided for a memory system, including a nonvolatile memory device and a memory controller controlling the nonvolatile memory device. The memory managing method includes determining whether a program-erase number of a memory block in the nonvolatile memory device reaches a first reference value; managing a life of the memory block according to a first memory managing method when the program-erase number of the memory block is determined to be less than the first reference value; and managing the life of the memory block according to a second memory managing method different from the first memory managing method when the program-erase number of the memory block is determined to be greater than the first reference value.

Embodiments of the inventive concept described herein relate to a memory system including a nonvolatile memory device.
There is increasing demand for electrically erasable and programmable semiconductor memory devices without refresh of data stored therein. The trend is toward increasing storage capacity and integration of memory devices. An example of a nonvolatile memory device providing a large storage capacity and high level of integration without refresh of stored data is a NAND flash memory device. Since flash memory devices retain data even when power is off, they are widely used in electronic devices which commonly experience sudden interruptions in power (e.g., portable terminals, portable computers, etc.).
Data-retention characteristics and the number of program/erase cycles are closely associated with reliability and life span of nonvolatile memory devices having floating gate structures. Stored charge (electrons) may leak from a floating gate as a result of various types of failure, causing a threshold voltage to decrease. On the other hand, a floating gate slowly obtains electrons with a control gate maintained with a specific voltage. This means that a threshold voltage increases. Iteration of program/erase cycles forces an oxide film of a cell transistor to be stressed, causing failures, such as tunnel oxide breakdown of a cell transistor. In flash memory devices, program/erase endurance is mainly affected since charge is trapped within a tunnel oxide film during program and erase operations. Charge trap affects a threshold voltage window of the memory device or program/erase times of subsequent cycles.

Memory system and memory managing method thereof


A symmetric multi-processing system for processing exclusive read requests. The system includes a plurality of cell boards, each of which further includes at least one CPU and cache memory, with all of the cell boards being connected to at least one crossbar switch. The read-latency reducing system includes write-through cache memory on each of the cell boards, a modified line list on each crossbar switch having a list of cache lines that have been modified in the cache memory of each of the cell boards, and a cache coherency directory on each crossbar switch for recording the address, the status, and the location of each of the cache lines in the system. The modified line list is accessed to obtain a copy of a requested cache line for each of the exclusive read requests from the cell boards not containing the requested cache line.

A symmetric multi-processing (SMP) system contains one or more CPU cell boards. A CPU cell board contains one or more CPUs, cache, and memory. The cell-boards are connected by a 'system fabric', typically, a set of links, including one or more crossbar switches. Data can be shared between cell boards (and also between CPUs on a single cell-board), but a protocol must be followed to maintain cache coherency. Although caches can share data, the same memory address can never have different values in different caches.
A common cache coherency implementation uses directories, called cache-coherency directories, which are associated with each cache. A cache coherency directory records the addresses of all the cache lines, along with the status (e.g., invalid, shared, exclusive) and the location of the line in the system. A bit vector is generally used to represent the cache line location, each bit corresponding to a processor or (in some implementations) a processor bus. Given the information in the cache coherency directory, a protocol is implemented to maintain cache coherency.
In a typical cache-coherency protocol, each cache address has a home directory, and exclusive reads that miss cache anywhere in the system go first to that directory. Unless the address missed is 'local' (to a particular cell board), a cache miss must make a traverse of the system fabric. Depending on the configuration of the system fabric, one or more crossbar switches must be crossed to reach the home directory for a particular address (if the address missed was not a local address).
Once the request reaches the home directory, there are three possible cases:                1. No remote copies of the line exist (as determined from the directory). In this case, the home directory fetches the requested line from either local memory or local cache, and sends it across the system fabric to the requesting CPU.        2. remote shared copies exist. In this case the home directory must send 'invalidate' commands to all the nodes that contain copies, and then fetch the requested line from either local memory or local cache, and send it across the system fabric to the requesting node.        3. remote exclusive copy exists. The home directory fetches that copy, invalidates it in the remote cache, and then sends it to the requesting node.
The latency of these requests is dominated by the number of hops, each of which increases the time required to traverse the system fabric. As SMPs grow larger, the number of crossbar switches and the length of the links between nodes increase, which in turn lengthens the average time required to make a hop. Also, some SMP designs keep the directory in main memory (as opposed to cache), causing case 3, above, to take even more time.
There is a design problem with the above type of system that parallels the performance problem: increasing the number of crossbar switches and links reduces hop latency, but the expense of these extra components, and the difficulty of designing them into a cabinet of a given size, and of powering and cooling them, are not trivial issues.

System for reducing the latency of exclusive read requests in a symmetric multi-processing system

Hewlett-Packard Development Company, L.P.


Pyrrolizine compounds having the formula (I),

Cells adhere to other cells and to substrates through specific, regulated processes that are critical to various biological functions. The proper functioning of the immune system, for example, is dependent upon adhesive interactions and cell migration. A key event in an immune response involves the migration of leukocytes to a disease site. During an inflammatory response, leukocytes are recruited to the site of injury and extravasated by a series of cellular interactions involving cell-cell and cell-substrate adhesion.
One family of molecules that serve an important adhesive function are integrins. Integrins are expressed on cell surfaces and function in cell-cell and cell-substrate adhesion. Integrins are alpha-beta heterodimers: each integrin has an alpha (α) subunit non-covalently binded to a beta (β) subunit. When activated, integrins bind to extracellular ligands and induce adhesion (the expression of integrins on a cell surface alone is inadequate for adhesion—they must be activated to become adhesive). The integrin activation state is transient, such that there is a rapid flux between adhesive and non-adhesive states which is important for cell movement, e.g., a cell is endowed with the ability to rapidly adhere to various cell surfaces and matrices and to migrate among cells and tissue.
There are four known integrins having a β2 or CD18 subunit which comprise the CD11/CD18 integrin sub-family, namely, Lymphocyte Function-associated Antigen 1 (LFA-1) (CD11a/CD18 or α1β2); Macrophage Antigen 1 (Mac-1) (CD11b/CD18 or αMβ2); p150,95 (CD11c/CD18 or αXβ2); and αDβ2. The CD11/CD18 family of integrins are also referred to as Leukointegrins as they are expressed on the surface of various leukocyte cells, and they mediate a number of inflammation-related cellular interactions. See Diamond et al., "The Dynamic Regulation of Integrin Adhesiveness," Current Biology, Vol. 4 (1994) at pp. 506-532.
Ligands to LFA-1 and Mac-1 comprise the intercellular adhesion molecule (ICAM) ICAM-1. LFA-1, the primary CD11/CD18 integrin, also binds with ICAM-2 and ICAM-3. ICAMs are found on endothelium cells, leukocytes, and other cell types, and their interaction with CD11/CD18 integrins is critical to immune system function. The interaction between the CD18 integrins, particularly LFA-1, and ICAMs mediates antigen presentation, T-cell proliferation, and adhesion between the endothelium and activated leukocytes which is necessary for leukocytes to migrate from the circulatory system into tissue. A condition termed "Leukocyte Adhesion Deficiency" has been identified in patients having a severe deficiency in CD 18 integrins. These patients are unable to mount a normal inflammatory or immune response; they suffer from disorders such as recurrent infections, poor wound healing, granulocytosis, progressive periodontitis, and umbilical cord separation. See Anderson et al., "Leukocyte LFA-1, OKMI, p 150,95 Deficiency Syndrome: Functional and Biosynthesis Studies of Three Kindreds," Fed. Proc., Vol. 44 (1985), pp. 2671-2677.
While sufficient levels of CD18 integrins interacting with ICAMs are needed to mount a normal immune response, significant cellular and tissue injury can result in chronic inflammatory states where there is an inappropriate influx of leukocytes to the disease site. Continuous recruitment of leukocytes from blood vessels into inflamed tissue, as in chronic inflammatory states, can perpetuate tissue injury and lead to excessive fibrous repair and autoimmune disease. Thus, inhibition of the interaction between LFA-1 and/or Mac-1 and their ICAMs can be advantageous in treating inflammatory or immune disease. For example, monoclonal antibody blockade of either ICAM or LFA-1 has been shown to prevent the migration of leukocytes into tissue and the subsequent development of inflammatory disease in animal models of rheumatoid arthritis, inflammatory bowel disease, and pulmonary inflammation (e.g., asthma). Knockout mice deficient in ICAMs have reduced susceptibility to induced arthritis, ischemia injury, impaired lung inflammatory responses, and increased tolerance to transplantations (e.g. heart grafts). See Anderson, supra. Antibodies blocking the ICAM-LFA-1 interaction reportedly suppress cardiac allograft rejection and islet cell xenograft rejection in animal models. See Gorski, "The Role of Cell Adhesion Molecules in Immunopathology," Immunology Today, Vol. 15 (1994), at pp. 251-255.
Compounds inhibiting CD 18 integrins, ICAMs, or the LFA-1:ICAM interaction could potentially demonstrate a wide range of utilities in treating inflammatory or immune diseases. Blockage of LFA-1 reportedly inhibits the influx of leukocytes in almost every system, including the skin, peritoneum, synovium, lung, kidney and heart, and blocking ICAM-1 would be expected to have similar effects. Also, present therapies for many inflammatory or immune diseases have drawbacks. There is an interest in providing consumers with drugs having increased effectiveness and fewer side effects. For example, current treatments for asthma include β2-agonists, inhaled corticosteroids, and LTD4 antagonists. However, β2-agonists have limited efficacy and inhaled corticosteroids raise safety concerns. To treat psoriasis, current therapies include PUVA, methotrexate, cyclosporin A, and topical treatments. The first three of those therapies raise toxicity issues over long-term (6-9 month) use, whereas topical treatments have limited efficacy. Additionally, these treatments typically are applied only in response to flares and not as a prophylaxis measure.
Accordingly, there is great interest in developing Leukointegrin or ICAM antibodies and antagonists of Leukointegrins and/or ICAMs. Hydantoin-based compounds are active LFA-1/ICAM inhibitors. See Intern. Pub. No. WO WO/03029245, "Spiro-Hydantoin Compounds Useful as Anti-Inflammatory Agents" filed by Applicants. Thiadiazole-based compounds reportedly inhibit LFA-1 and Mac-1 binding with ICAM-1 and are claimed to be useful as anti-inflammatory agents. See Intern. Pub. No. WO 99/20,618, "Thiadiazole Amides Useful as Anti-Inflammatory Agents" filed by Pharmacia & Upjohn Co. (See also WO 99/20,617, also to Pharmacia and Upjohn.) Thiazole compounds linked to phenyl and pyrazole rings are claimed to be active LFA-1/ICAM inhibitors. Sanfilippo et al., "Novel Thiazole Based Heterocycles as Inhibitors of LFA-1/ICAM-1 Mediated Cell Adhesion," J. Med. Chem. Vol. 38 (1995) at pp.1057-1059. A series of small molecules comprising 1-(3,5 dichlorophenyl) imidazolidines are claimed to be antagonists to the binding of ICAMs with CD18 integrins. See Intern. Pub. No. WO9839303, "Small Molecules Useful in the Treatment of Inflammatory Disease," filed by Boehringer Ingelheim Pharmaceuticals, Inc. A series of compounds comprising various benzylamines and 2-bromobenzoyltryptophan are claimed to be antagonists to LFA-1/ICAM-1 receptor binding. See Intern. Pub. No. WO99/49,856, "Antagonists for Treatment of CD11/CD18 Adhesion Receptor Mediated Disorders," filed by Genentech, Inc. See also Intern. Pub. No. WO 00/21,920, "Diaminopropionic Acid Derivatives," filed by Hoffmann-La Roche Inc., disclosing a series of compounds claimed to block ICAM activity and have particular utility in treating reperfusion injury following acute myocardial infarction.
Compounds containing a pyrrolizine core are disclosed in JP 2000239276 to Nippon Soda Co. for use as herbicides; in U.S. Pat. No. 5,683,965 to Bayer A.-G. for use as pesticides; in EP 442077 B1 to Bayer A.-G. for use as insecticides, acaricides and herbicides; and as chemical intermediates in two articles by Parlier et al. See J. of Organometallic Chemistry (1988), 358 at pp. 1-3, 245-72 and Organometallics (1995), 14(6), at pp. 2760-74.
As may be appreciated, those in the field of pharmaceutical research continue to seek to develop new compounds and compositions for treating inflammatory or immune disease such as inhibitors of Leukointegrins and/or ICAMs. Particularly in the area of immune response, many individuals respond differently to different drugs. Thus, there is an interest in providing consumers not only with pharmaceutical compounds and compositions demonstrating increased effectiveness and reduced side-effects but also different structures or mechanisms of action to provide consumers with a choice of options.
Each of the patents, patent applications and publications referenced above and hereinafter is incorporated herein by reference.

Pyrrolizine compounds useful as anti-inflammatory agents

Abstract: or pharmaceutically-acceptable salts thereof, are effective in treating inflammatory or immune diseases, where A is a four- to seven-membered saturated ring, K is O or S, and R1, R2, R3 n, and M are defined in the specification.


The present invention relates to a pharmaceutical combination comprising:                (a) a PPAR agonist;        (b) a p38 kinase inhibitor; and optionally        (c) one or more pharmaceutically acceptable diluents, excipients or carriers for use in a method of preventing or treating ophthalmic diseases or disorders in a subject.

Ophthalmic diseases or disorders are often devastating diseases leading to complete or partial blindness. For example, age-related macular degeneration (AMD) is the leading cause of blindness in people 60 years and older in developed countries. A recent systematic review and meta-analysis has shown that 8.7% of the worldwide population has AMD, and with the increase of lifespan the projected number of people with the disease will be at about 196 million in 2020, reaching 288 million in 2040. About 1.75 million Americans are affected by AMD, and this number is expected to grow to almost 3 million by 2020. No therapy is currently available for the dry, slowly progressing atrophic form of AMD. In conclusion, there is a high unmet medical need for the treatment of ophthalmic diseases or disorders, such as AMD.

Methods of preventing or treating ophthalmic diseases


A customized seal ring for a semiconductor device is formed of multiple seal ring cells that are selected and arranged to produce a seal ring design. The cells include first cells that are coupled to ground and second cells that are not coupled to ground. The second cells that are not coupled to ground, include a higher density of metal features in an inner portion thereof, than the first seal ring cells. Dummy metal vias and other metal features that may be present in the inner portion of the second seal ring cells are absent from the inner portion of the first seal ring cells that are coupled to ground. The seal ring design may include various arrangements, including alternating and repeating sequences of the different seal ring cells.

An integrated circuit (IC) is a miniaturized electronic circuit including semiconductor devices and passive components and which is manufactured in and on the surface of a substrate typically formed of semiconductor material. Integrated circuits are used in a variety of devices and a multitude of applications due to their low cost and high performance.
A high number of integrated circuits are fabricated simultaneously on a semiconductor substrate. Once the integrated circuits are completed, the semiconductor substrate is sawed into individual chips. The uppermost surfaces of the chips are generally protected by a passivation layer disposed over the integrated circuit. This passivation layer, however, cannot cover the periphery of each chip. Thus, the periphery of each chip is exposed to undesirable moisture and ionic contaminants. Accordingly, guard rings or seal rings as they are alternatively called, are commonly formed around at least the upper periphery of the chip as part of the integrated circuit fabrication process, prior to sawing the substrate. Seal rings are formed of one or multiple metal layers and can provide structural reinforcement and stop undesirable moisture and mobile ionic contaminants from entering chip active circuitry regions and affecting operational reliability. The structural stability of the seal ring has become increasingly important with the advent of extremely low-k, ELK, dielectrics which can be very porous in nature.
Features that can provide structural stability to the seal ring structures are metal vias and other metal structures formed at different device levels. The structures formed in seal rings are not active device structures and are often referred to as dummy metal structures. It is desirable for seal rings to be coupled to ground.

Guard ring method for semiconductor devices

Taiwan Semiconductor Manufacturing Co., Ltd.


A connection sleeve having an open hollow end portion and being carried by one of the mirror support arm and the vehicle mount. A connector shaft carried by one of the mirror support arm and the vehicle mount for being received within the connection sleeve. A longitudinal wedge pocket formed in the connector shaft having a slanted pocket contact surface. A camming wedge disposed within the wedge pocket having a slanted bearing surface adapted to bear against the slanted pocket contact surface and the connection sleeve. An operator for moving the camming wedge into the wedge pocket against the slanted pocket contact surface whereby the wedge and connector shaft are simultaneously forced against the connection sleeve to provide a tight vibration resistant connection between a mirror support arm and a vehicle mount.

1) Field of the Invention
The present invention relates to vehicle mirror assemblies, and more particularly, to a vibration resistant connector for attaching a mirror support arm to a vehicle mount attached to the vehicle body.
2) Description of Related Art
A problem with large exterior side view vehicle mirror assemblies carried by commercial tractor-trailers and other large vehicles is that the vehicles produce constant vibration, which caused the connection of the mirror assembly to the vehicle to loosen over time. Typically, the vehicle mirror assembly includes large tubular frame member which carries the mirror assembly. The tube frame is then affixed to a vehicle mounted attachment by way of a tube connector. The connection between the tube connector and the tubular frame is where vibrations cause the components to loosen.
Typically, the connection between the tube frame and the tube connector is accomplished by one of several ways. One way of connecting these components is by a press fit which essentially squashes the tube frame to the tube connector. The press fit has resulted in numerous problems, however, such as the cracking and breaking of parts under pressure and generally loose connections. When the press fit does not provide a tight connection, screws are used to attempt to resolve the problem, but it has been found that over time the screws can loosen up through vibration and cause the parts to wear on each other and eventually fail.
Another way of attaching the tube frame to the tube connector involves the use of glues. Gluing the parts together presents many manufacturing problems as the components must sit a certain amount of time to cure. Additionally, gluing is more expensive and has not produced a dependable vibration resistant connection.
Yet another way to attach the tube frame to the tube connector is to cut notches into the tube connector and then press the tube frame into the notches. This has had some success when using carbon steel tubing with minimal rebound memory. Stainless steel tubing, however, springs back to far to provide a reliable tight connection. Pressing the steel tubing far enough to compensate for this spring back typically breaks the tube-connector, which is usually made of aluminum.
Alternatively, some skilled in the art have attempted to get rid of the tube connector entirely by flattening the end of the tube frame and bolting it directly to the vehicle mounted attachment. However, this does not provide a good joint between the components and loosens up over time due to vibration.
U.S. Pat. No. 4,565,345 discloses a mirror assembly that includes an expandable ball and socket arrangement for selectively retaining a mirror in a desired rotational position relative to the vehicle. The expandable ball comprises a plurality of partially spherical segments which expand outward from an axial bore when a draw bolt is received through the ball. The spherical segments then bias against the socket to hold the mirror in position. This invention is not directed to providing a sturdy connection for large tubular frame members carrying mirror assemblies of the type found on commercial tractor-trailers. Rather this connector was designed simply to hold a small mirror of the type found on passenger vehicles in a fixed position, and is not intended to serve as a structural support for carrying and attaching large mirror assemblies to a vehicle.
U.S. Pat. No. 5,419,522 discloses an adjustable mount having a pair of ball and socket units in which a screw engages a wedge, which in turn forces a pair of plungers to engage ball elements that hold the adjustable mount in a desired position. As the screw is tightened, the wedge is drawn upward which forces the plungers laterally to engage the ball elements. This connector assembly is intended to allow the mirror to be easily repositioned by loosening and tightening of the screw and there is no suggestion that this connector could be useful in securing large mirror assemblies to vehicles.
Accordingly, it is an object of the present invention to provide a vibration resistant connector assembly for affixing a mirror support arm carrying a mirror assembly to a vehicle mount so that vibration caused by driving of the vehicle do not cause the connection to become loose.

Vibration resistant vehicle mirror connecting assembly


A temperature measuring device of a power semiconductor apparatus that accurately detects chip temperature even where a gradient of the measured characteristic line segment is different from a designed gradient, including a chip temperature detecting circuit that includes an A/D converter delivering a measurement value of a digital converted forward voltage across a temperature detecting diode and an operational processing unit for calibration and chip temperature calculation. In calibration processing, different known reference voltages are applied by a reference connected in place of the diode and a gradient of the line segment connecting the measurement values is calculated. The gradient is stored in a memory with an offset correction value that is one of the measurement values. A chip temperature is calculated based on a forward voltage across the diode calculated based on the measurement value and the stored values of the gradient and the offset correction value.

1. Field of the Invention
The present invention relates to a temperature measuring device for a semiconductor apparatus installed in voltage converters for electronic systems of vehicles or the like.
2. Description of the Related Art
In recent onboard apparatus, a vehicle driving system 1100, as shown in FIG. 11, having an electric motor 1104 to generate driving force, may include the main sections of a power supply 1101, a buck-boost converter 1102, and an inverter 1103, to achieve high efficiency and energy saving. The three phase motor 1104 is a motor when it drives a vehicle, but becomes a generator when it brakes the vehicle. The arrow Y1 indicates the direction of energy flow when the vehicle is driven and the arrow Y2 indicates the direction of energy flow when the vehicle is braked.
The voltage VL of power supply 1101 is obtained from overhead wires or from series-connected batteries.
When the vehicle is driven, the buck-boost converter 1102 steps-up the voltage VL (280 V, for example) from the power supply 1101 to a voltage VH (750 V, for example) suited for driving the motor 1104; and when the vehicle is braked, the buck-boost converter 1102 steps-down the voltage VH (750 V, for example) that is generated by the motor 1104 to the voltage VL (280 V, for example) of the power supply circuit, performing regenerative braking.
When the vehicle is driven, the inverter 1103 supplies current to the phases of the three phase motor 1104 from the voltage VH that has been stepped-up by the buck-boost converter 1102 by ON-OFF controlling the switching elements in the inverter 1103. The speed of the vehicle is varied by the frequency of the ON-OFF switching. When the vehicle is braked, the inverter 1103 performs a rectification operation by ON-OFF controlling the switching elements in synchronism with the voltage generated in each phase of the motor 1104, and the inverter 1103 converts the voltage in the phases of the motor 1104 to a DC voltage by the rectification operation, resulting in regenerative braking.
Next, a detailed construction of the buck-boost converter 1102 is described with reference to FIG. 12. The buck-boost converter 1102 comprises main components of: a reactor R, a capacitor C, two switching elements SW1 and SW2, and two control circuits 1111 and 1112 for controlling the switching elements SW1 and SW2. Switching elements SW1 and SW2 in recent driving systems of onboard apparatus may each be composed of an IGBT 1105 (or 1106) and a diode D1 (or D2) connected in parallel with the IGBT 1105 (or 1106) between emitter and collector thereof as shown in FIG. 12. With this connection, the current in the diode D1 (or D2) flows in the reverse direction to the current in the IGBT 1105 (or 1106).
The following describes the principle of step-up and step-down operation of the buck-boost converter 1102. FIG. 13 shows the waveforms of the current flowing in the reactor R in the step-up operation.
The step-up operation is first described. When the IGBT 1105 of the switching element SW1 is in the ON state (conducting state) during the time periods from t0 to t1, from t2 to t3, and from t4 to t5 indicated in FIG. 13, electric current I flows in the reactor R and energy LI2/2 is stored in the reactor R having an inductance L.
In the OFF state (non-conducting state) of the IGBT 1105 of the switching element SW1 during the periods from t1 to t2, from t3 to t4, and after t5, electric current I flows through the diode D2 of the switching element SW2 and the energy stored in the reactor R is transferred to the capacitor C.
Next, step-down operation is described. In the ON state (conducting state) of the IGBT 1106 of the switching element SW2, current I flows through the reactor R and energy LI2/2 is stored in the reactor R.
In the OFF state (non-conducting state) of the IGBT 1106 of the switching element SW2, current flows through the diode D1 of the switching element SW1 and the energy stored in the reactor R is regenerated to the power supply 1101.
Thus, stepped-up and stepped-down voltages can be adjusted by varying ON time (ON duty factor) of the switching element SW1 and SW2. The following relation approximately holds.VL/VH=ON duty factor (%),where                VL is the power supply voltage,        VH is the voltage after the stepping-up operation; and        the ON duty factor is a fraction of a conducting period in the switching period of the switching element SW1 or SW2.
In actual operation, however, to cope with variations in the load and power supply voltage, the stepped-up voltage VH is monitored and the ON time (or ON duty factor) of the switching element SW1 or SW2 is controlled to attain the target value of the voltage.
FIG. 14 is a block diagram of an intelligent power module (IPM) 2100 for a buck-boost converter. The main sections of IPM 2100 are a lower arm switching section 2101, an upper arm switching section 2102, and a control section 2103. The switching sections 2101 and 2102 are high voltage circuits that must be electrically isolated from the control section 2103, which is a low voltage circuit. Thus, signals are transmitted between the high and low voltage circuits through photo-couplers 2115, 2116, 2117, 2118, and 2119, pulse transformers (not depicted), or like circuit components.
The upper arm switching section 2102 comprises a temperature detecting diode 2142 that is embedded in a switching element chip SW12 together with IGBT 2112 and diode D12, an IGBT protecting circuit 2122 connected to the anode of the temperature detecting diode 2142 and to the point between series-connected resistances R1421 and R1422 that are provided between the emitter of the IGBT 2112 and ground, a gate driver 2124 connected to the output terminal of the IGBT protecting circuit 2122 and to a gate terminal of the IGBT 2112, and an IGBT chip temperature detecting unit 2126 connected to the anode of the temperature detecting diode 2142.
The lower arm switching section 2101 comprises a temperature detecting diode 2141 that is embedded in a switching element chip SW11 together with IGBT 2111 and diode D11, an IGBT protecting circuit 2121 connected to the anode of the temperature detecting diode 2141 and to the point between series-connected resistances R1411 and R1412 that are provided between the emitter of the IGBT 2111 and ground, a gate driver 2123 connected to the output terminal of the IGBT protecting circuit 2121 and to the gate terminal of the IGBT 2111, and an IGBT chip temperature detecting unit 2125 connected to the anode of the temperature detecting diode 2141, and a VH detecting circuit 2150 for detecting a stepped-up voltage VH.
The VH detecting circuit 2150 comprises a voltage dividing circuit 2151 for dividing the input voltage VH, a level adjusting circuit 2152 for adjusting a level of the voltage divided by the voltage dividing circuit 2151, a triangular wave generator 2153 for generating a triangular wave, and a comparator 2154 for comparing the triangular wave and the level adjusted voltage and delivering an "L" or "H" level voltage obtained by the comparison to a photo-coupler 2119.
The control section 2103 comprises a low pass filter (LPF) 2161 for smoothing a signal "0" corresponding to the "L" and the signal "1" corresponding to the "H" from the photo-coupler 2119 and converting them to DC level signals, a VH comparator 2162 for comparing the DC level signal from the LPF 2161 with a buck-boost instruction value, and a gate signal generator 2163 for delivering gate signals to the photo-couplers 2115 and 2117 so that the stepped-up voltage VH attains a predetermined voltage corresponding to the buck-boost instruction value in response to the comparison results from the VH comparator 2162.
In the IPM 2100 having the construction described above, the present invention relates in particular to the IGBT chip temperature detecting units 2125 and 2126 for detecting the chip temperature of the IGBTs 2111 and 2112 based on the VF voltages across the temperature detecting diodes 2141 and 2142 embedded in the switching element chips SW11 and SW12 in order to control operation of the IPM 2100 as a power system.
The IGBT chip temperature detecting unit 2126 in the upper arm switching section 2102 is selected as representative of the IGBT chip temperature detecting units 2125 and 2126 and described in detail in the following with reference to FIG. 15 which is a block diagram of the IGBT chip temperature detecting unit 2126, on the understanding that the operation of the IGBT chip temperature detecting unit 2125 is substantially the same.
The IGBT chip temperature detecting unit 2126 comprises, on the high voltage circuit side thereof, a constant current source 2170 connected to the anode of the temperature detecting diode 2142, a buffer circuit 2171 that is an operational amplifier having a + input terminal connected to the point between the constant current source 2170 and the temperature detecting diode 2142, a level converter 2177, a triangular wave generator 2178, a comparator 2179 that is an operational amplifier connected to the output terminal of the triangular wave generator 2178 and the output terminal of the level converter 2177, where the output terminal of the comparator 2179 is connected to a gate terminal of field effect transistor 2181 in a PWM-analogue converter 2190 through a resistance 2180 and the drain terminal of the field effect transistor 2181 is connected to a photo-coupler 2116 of the PWM-analogue converter 2190 through a resistance 2182.
The level converter 2177 comprises an operational amplifier 2173 with the − input terminal thereof connected to the output terminal of the buffer circuit 2171 through a resistance 2172, a resistance 2174 connected between the − input terminal and the output terminal of the operational amplifier 2173, and resistances 2175 and 2176 connected between a first power supply Vcc1 and the ground with the connection point between the two resistances connected to the + input terminal of the operational amplifier 2173.
The PWM-analogue converter 2190 further comprises the photo-coupler 2116, a binarization circuit 2191, a buffer circuit 2192, and an LPF circuit 2193.
The photo-coupler 2116 is connected between the first power supply Vcc1 and the FET 2181 and comprises a light emitting diode 2185 with a resistance 2184 connected in parallel thereto and a photo detecting diode 2187 that receives the light emitted by the light emitting diode 2185. The photo detecting diode 2187 is connected between the base terminal of a transistor 2188 and a second power supply Vcc2. A resistance 2189 is connected between the cathode of the photo detecting diode 2187 and the collector terminal of the transistor 2188.
The emitter terminal of the transistor 2188 of the photo-coupler 2116 is connected to the binarization circuit 2191, the output terminal of which is connected to the + input terminal of the buffer circuit 2192, an operational amplifier. The − input terminal of the buffer circuit 2192 is connected to the output terminal of the buffer circuit 2192, which is connected to the low pass filter (LPF) circuit 2193.
In operation of the IGBT chip temperature detecting unit 2126 to measure the temperature of the IGBT 2112, a constant current is fed from the constant current source 2170 to the temperature detecting diode 2142 embedded in the same chip as the IGBT 2112. The voltage VF across the temperature detecting diode 2142 (the voltage is also referred to as a "VF voltage signal") exhibits a linear dependence on temperature as shown in FIG. 16. As shown in FIG. 16, the voltages VF are VF=1.5 V at T=165° C. and VF=2.0 V at T=25° C., where T is the chip temperature of the temperature detecting diode 2142. Thus, the full span for the actual temperature signal is a variation of the VF of 500 mV.
FIG. 17 shows a detailed construction of a VF/PWM conversion circuit having the buffer circuit 2171, the level conversion circuit 2177, the triangular wave generating circuit 2178, and the comparator 2179.
The triangular wave generator 2178 comprises a comparator 2201, an operational amplifier 2202; and resistances R21, R22, R23, R24, R25, R26, and a capacitor C11, which are connected as indicated in FIG. 17 to the − and + input terminals and the output terminals of the comparator 2201 and the operational amplifier 2202 or to the power supply Vcc1 or the ground.
The triangular wave generator 2178 delivers triangular wave signals with a predetermined range between an upper limit and a lower limit.
The forward voltage drop VF across the temperature detecting diode 2142 undergoes impedance conversion in the buffer circuit 2171, and is then amplified and subjected to addition and subtraction operation in the level converter 2177 so that the upper limit value of the triangular wave signal corresponds to the VF in the side of high temperature (165° C., for example), and the lower limit value of the triangular wave signal corresponds to the VF in the side of low temperature (25° C., for example).
The level converter 2177 performs gain adjustment and offset adjustment. The gain adjustment expands the width of the VF voltage signal so that the level of the width of the VF voltage signal matches the level of the width (amplitude) between the upper limit and the lower limit of the triangular wave signal. The offset adjustment makes the top and bottom levels of the expanded VF voltage signal in coincidence with the positions of the upper limit and the lower limit of the triangular wave. Specific gain and offset adjustment are carried out as follows.
As shown in FIG. 17, the voltage of the power supply Vcc1 is divided by the resistances R11 and R12 and given to the + input terminal of the operational amplifier 2173, and the amount of offset is determined by the resistance R13 connected between the power supply Vcc1 and the − input terminal of the operational amplifier 2173. The gain of the operational amplifier 2173 is determined by the resistance R14 connected between the output terminal of the buffer circuit 2171 and the − input terminal of the operational amplifier 2173 and the resistance R15 connected between the − input terminal and the output terminal of the operational amplifier 2173.
After this level adjustment, a comparator 2179 in the next stage compares the output voltage Vlev of the level converter 2177 and the output voltage Vtri of the triangular wave generator 2178. If Vlev>Vtri, then the output of the comparator 2179 is "L"; if Vlev<Vtri, then the output is "H".
The duty factor of the output pulses of the comparator 2179 thus generated is proportional to the VF voltage signal. For example, a duty factor of zero % corresponds to a low temperature (25° C.) side VF and a duty factor of 100% corresponds to a high temperature (165° C.) side VF. The PWM signal bearing the VF voltage signal is transmitted, through the isolated transmission circuit of the photo-coupler 2116 or 2118, from the upper arm switching section 2101 or the lower arm switching section 2102 to the binarization circuit 2191 in the control section 2103.
From the PWM signal, the binarization circuit 2191 generates and outputs a voltage, a binarized signal V1/V2, which is V1 for zero % of the duty factor of the PWM signal and V2 for 100% of the duty factor. The binarized signal V1/V2 receives impedance conversion in the buffer circuit 2192 and then smoothed in the LPF circuit 2193 to be converted into a DC level signal.
Thus, an IGBT chip temperature voltage signal Vout, which is an output voltage isolated from each arm, is obtained.
Thus-obtained voltage signal Vout proportional to the IGBT chip temperature is transmitted to a system at a higher level (not depicted in the drawings) in the buck-boost converter 1102. Monitoring the temperatures of the IGBTs 2111 and 2112 continuously, the higher level system works, for example to reduce the switching frequency to a half when the IGBT chip temperature exceeds a first predetermined temperature T1 and to stop switching operation (or buck-boost operation) in order to perform a protecting function when the IGBT chip temperature exceeds a second predetermined temperature T2.
Execution of the protecting function affects driving the vehicle, so the chip temperature of the IGBTs 2111 and 2112 must be measured accurately - - - with an accuracy in the range of about ±5%. Error factors in chip temperature measurement can be the scattering of characteristics of two categories of components; the scattering of the forward voltage drop VF and the temperature coefficient thereof of the temperature detecting diodes 2141 and 2142 embedded in the IGBT chip, and the scattering of the characteristics of the circuits including the buffer circuit 2171, the level converter 2177, the triangular wave generator 2178, the photo-coupler 2116 (which is an isolated transmission circuit for PWM signals), the binarization circuit 2191, the buffer circuit 2192, and the LPF circuit 2193.
The scattering of the VF values of the temperature detecting diodes 2141 and 2142 is primarily caused by semiconductor processing. If the scattering of the VF values is estimated to be ±3%, which is about 60% of the overall allowed error of ±5%, the error permitted for the other circuit components is ±2%. This requires each of the other circuit components to be within an error suppressed to about ±0.5%.
Accordingly, high accuracy products must be used for circuit components including resistance elements, constant voltage elements, and operational amplifiers. In consideration of guaranteeing operation over a wide temperature range of −40° C. to +105° C. for the onboard environment, high reliability required by onboard applications, and quick response to customer complaints, selection of those circuit components should be made from ICs for onboard applications supplied by major manufacturers of semiconductor products.
As shown in FIG. 15, the forward voltage drop VF across the temperature detecting diode 2142 developing with the constant current IF supplied by the constant current source 2170 is given to the + terminal of the buffer circuit 2171 and receives impedance conversion there, and is delivered to the level converter 2177. The forward voltage drop VF corresponds to the temperature of the temperature detecting diode 2142 and may have values of, for example, VF=1.5 V for a chip temperature of 165° C. and VF=2.0 V for 25° C.
As shown in FIG. 17, the + input terminal of the operational amplifier 2173 of the level converter 2177 is fixed to an electric potential of Vcc11 that is a divided voltage of the potential of the power supply Vcc1 divided by the resistances R11 and R12. The output voltage Vlev of the operational amplifier 2173 is given by the equation (1) below.
                              V          lev                =                              V                          cc                                                                                11                                -                                    R              15                                                  (                                                                                V                                              cc                                                                                1                                                              -                                          V                                              cc                                                                                11                                                                                R                    13                                                  +                                                                            V                      F                                        -                                          V                                              cc                                                                                11                                                                                R                    14                                                              )                                                          (        1        )
The upper limit value Vsu and the lower limit value Vsd of the triangular wave signal from the triangular signal generator 2178 are given by the equations (2) and (3) below. Here, the − input terminal of the comparator 2201 is fixed to an electric potential of Vcc12 that is a divided voltage of the potential of the power supply Vcc1 divided by the resistances R21 and R22.
                              V          su                =                              V                          cc                                                                                12                                +                                    R              26                                                  (                                                                    V                                          cc                                                                                12                                                        -                                      V                                          ic                                                                                3                                            LOW                                                                                R                  25                                            )                                                          (        2        )                                          V          sd                =                              V                          cc                                                                                12                                -                                                    R                26                                                          (                                                                            V                                              cc                                                                                1                                                              -                                          V                                              cc                                                                                12                                                                                R                        23                                            +                                              R                        24                                                              //                                          R                      25                                                                      )                                      ×                                          R                24                                                              R                  24                                +                                  R                  25                                                                                (        3        )
The Vic3LOW in equation (2) represents the "L" level output voltage of the comparator 2201. The symbol "//" in equation (3) is a simplified representation of a combined resistance of the parallel connected resistances indicated at the both sides of the symbol "//". The representation "R24//R25", for example, indicates a combined resistance of the resistances R24 and R25 that are connected in parallel.
The comparator 2179 compares the output signal of triangular wave having the upper limit value Vsu and the lower limit value Vsd from the triangular wave generator 2178 with the output signal of the level converter 2177. The comparator 2179 generates a PWM signal with a pulse width corresponding to the chip temperature as given by equations (4), (5), and (6) below.Condition 1: Vsu≧Vlev Duty=100%  (4)Condition 2: Vsu≧Vlev≧Vsd Duty=(Vlev−Vsd)/(Vsu−Vsd) (%)  (5)Condition 3: Vsd≧Vlev Duty=0%  (6)
The PWM signal is transmitted successively, as shown in detail in FIG. 18, through the photo-coupler 2116 in the PWM-analogue converter 2190, to the binarization circuit 2191, comprising transistor 2250 and resistors R30, R31, R32 and R628, the buffer circuit 2192, comprising operational amplifier IC601 in section 2190a, and the LPF circuit 2193, which comprises resistor R637 and capacitor C604. The relation between the duty factor Duty of the PWM signal and the output VLPF of the LPF circuit 2193, which is the IGBT chip temperature voltage signal Vout, is given by the equation (7) below.
                              V          LPF                =                                                                              R                  32                                ×                                  V                                      cc                                                                                2                                                                                R                  31                                +                                  R                  32                                                                  Duty                    +                                    {                                                V                                      cc                                                                                2                                                  -                                                                                V                                                  cc                                                                                2                                                                    -                                                                                R                            32                                                                                V                            ce                                                                                R                            30                                                    +                                                      R                            32                                                                                R                        32                                            +                                              R                        31                                            -                                                                        R                          32                                                                                R                            30                                                    +                                                      R                            32                                                                                R                    31                                                              }                        ×                          (                              1                -                Duty                            )                                                          (        7        )
In the equation (7), Vice is a collector-emitter voltage of the transistor 2250 in a saturated condition, and is about 0.15 V. As can be seen from the equations (1), (2), (3), and (7), the error in the output of the LPF circuit 2193 depends on the scattering of the voltages of the power supplies Vcc1 and Vcc2 when resistance elements with high accuracy of ±0.1% are used.
The power supply Vcc1, in particular, which is used in a circuit managing a signal with a full span of 500 mV, is necessarily a voltage source with high stability and high accuracy. Accordingly, a shunt regulator with high accuracy should be used. The power supply Vcc2, on the other hand, which manages a signal with a full span of 4 V, does not need such accuracy as the one required for the power supply Vcc1.
FIG. 19 shows the distribution of the electric potential of the power supply Vcc1 that is supplied from a shunt regulator; and FIG. 20 shows the distribution of the electric potential of the power supply Vcc2 that is supplied from a high accuracy voltage regulator.
The scattering of the voltages of the reference voltage sources, i.e. the variation of the voltages Vcc1 and Vcc2, affects the span and the offset of the output voltage VLPF of the LPF circuit corresponding to the chip temperature, as can be seen from the equations (1), (2), (3), and (7). The span is basically assigned to be 130° C. for the temperature and 4 V for the output voltage; and the offset is assigned to be 4.5 V at a temperature of 25° C.
FIGS. 21 and 22 show the effects of the variation of the voltage of Vcc1 on the output of the LPF circuit 2193. FIGS. 23 and 24 show the effects of the variation of the voltage of Vcc2 on the output of the LPF circuit 2193.
A normal distribution is assumed for the distribution of output voltage of Vcc1 and Vcc2, and statistical calculations have been made for errors and accumulated distribution rate in the interval in the IGBT chip temperature voltage signal Vout (which is the LPF output) in the range up to 3σ from the center of the distribution. The calculation result has revealed that the error in temperature measurement of the circuit is suppressed to within ±2.88% in the range of 1.2σ including 77% of population, but the error exceeds ±2.88% in the remaining 23% of population. Accordingly, the resistance value of the resistance R13 in the level converter 2177 in FIG. 17 needs to be changed for offset adjustment and the resistance value of the resistance R15 needs to be changed for gain adjustment.
For the resistances R13 and R15, resistance elements with low resistance values are preliminarily packaged in order to allow later adjustment within ±5σ. The target resistance value may be achieved by partially cutting the resistance pattern of the low resistance elements with a laser trimming device.
In this resistance adjustment procedure, two known voltages VF1 and VF2 are given as input signals to the chip temperature measuring circuit and two output voltage Vout1_m and Vout2_m are measured to determine the respective differences from the target voltage values Vout1_s and Vout2_s. Based on the differences obtained, the target resistance values of the resistances R13 and R15 are determined and the trimming is carried out on R13 and R15.
After that, two known voltages VF1 and VF2 are again given to the chip temperature measuring circuit after the trimming process and the output voltages Vout1_m and Vout2_m are measured to ensure that the measured values fall within allowable error from the target voltage values Vout1_s and Vout2_s.
This adjusting procedure requires a costly laser trimming device and some man-hours for resistance adjusting work, thus leading to higher manufacturing cost. Because re-adjustment is impossible once the trimming is conducted, an additional unsolved problem is present in that the procedure involves to some extent a percentage of defective units.
To cope with this problem, methods are known to conduct temperature compensation of the chip temperature measuring circuit by an electronic process.
Japanese Patent No. 4141444 and Japanese Patent No. 4229945, for example, disclose an onboard engine control device provided with a micro-processor having a non-volatile memory that stores a control program and control constants written in through an external tool, and a RAM memory for operational processing. This onboard engine control device comprises a constant voltage power supply circuit, a temperature sensor, and a multi-channel AD converter.
The non-volatile memory further stores calibration data and conversion data. The calibration data is the results of measurement with an externally equipped instrument and transferred through an external tool to write-in to the non-volatile memory in the adjusting operation stage of the onboard engine control device. The calibration data include externally measured data about the temperature around the constant voltage power supply circuit estimated from the environment temperature at the time of adjusting operation and about the actual output voltage of the constant voltage power supply circuit at the time of adjusting operation.
The conversion data include the data about variation characteristics of the environment temperature versus output voltage of the constant voltage power supply circuit, the data being actually measured in advance on multiple of products and statistically processed to obtain averaged voltage variation characteristics.
An output voltage of the constant voltage power supply circuit under a different temperature environment is estimated from a detected output of the temperature detecting sensor referring to the calibration data and the conversion data. The estimated output voltage is divided by the constant voltage to obtain a correction factor, by which is multiplied a digitalized value of an analogue input voltage to obtain a corrected digital voltage value.
Japanese Unexamined Patent Application Publication No. 2008-116233 discloses a method of calibrating an output of a temperature detecting diode of a switching element. The calibration in the above reference is conducted with a temperature correction factor based on a detected motor temperature after combining the motor and a detected temperature of the switching element. Temperature characteristics of the temperature detecting diode and the calibration factor (the temperature correction factor) are stored in a memory or other recoding medium.
Japanese Unexamined Patent Application Publication No. 2005-333667 discloses a semiconductor device that comprises a temperature detecting means that detects an operating temperature of a semiconductor switching element, an overheat protecting means that stops operation of the semiconducting switching element if a detected signal of the temperature detecting means exceeds a prescribed trip level stored in a non-volatile memory, and a characteristic correction means that corrects the trip level.
Japanese Unexamined Patent Application Publication No. 2004-117111 discloses a technology in which a temperature measuring diode is formed in a semiconductor element and temperature data is obtained at the position of the temperature measuring diode from the temperature characteristics of forward voltage drop of the temperature measuring diode. On the other hand, a sense current flowing through a current sense emitter is measured with a current detecting circuit and a corrected temperature is calculated in an operating unit based on the sense current value. The operating unit obtains a junction temperature by adding a temperature correction to the temperature data. A table of temperature correction is stored in a memory for current values detected with the current detecting circuit. Upon receiving a current value detected with the current detecting circuit, a temperature correction is calculated referring to the table.
In the conventional technology disclosed in Japanese Patent No. 4141444 and Japanese Patent No. 4229945, conversion data, which is temperature-output voltage characteristic in standard characteristics, is stored in a non-volatile memory. In the technology also stored is calibration data, which includes calibration temperature on an adjusting operation stage of the onboard engine control device and output voltage at the calibration temperature. When an actual temperature is measured, a constant voltage output at the actual measurement temperature is calculated according to a predetermined calculation formula referring to the calibration data and the conversion data stored in the non-volatile memory. The calculated constant voltage output is divided by a reference voltage to calculate a correction factor, by which a digitalized voltage is multiplied to obtain a corrected digital voltage.
Therefore, a non-volatile memory must store the calibration data and the conversion data, increasing memory capacity. In addition, the calculation operation needs to be repeated referring to the calibration data and the conversion data every time the actual temperature changes, increasing calculation operation load.
In the conventional technology disclosed in Japanese Unexamined Patent Application Publication No. 2008-116233, with a motor driving device combined, the difference between the motor temperature calculated in a motor temperature calculating section and the switching element temperature calculated in a switching element temperature calculating section is stored in a memory or other recording medium as a calibration value or a temperature correcting factor for correcting the calculation result in the switching element temperature calculating section. Offset correction is conducted by correcting the output from the diode for switching element temperature detection using the calibration value (or the temperature correcting factor). In the conventional technology of Japanese Unexamined Patent Application Publication No. 2008-116233, however, the calibration value is simply added to the output from the diode for switching element temperature detection. Therefore, the technology cannot be applied to a case where a gradient of the temperature-output voltage characteristic line is varied.
In the conventional technology disclosed in Japanese Unexamined Patent Application Publication No. 2005-333667, correction of the trip level that is the basis for decision of overheating is conducted by selecting the number of capacitors that are connected according to a characteristic correction signal written in an EPROM. Therefore, this technology also cannot be applied to a case where a gradient of the temperature-output voltage characteristic line is varied.
In the conventional technology disclosed in Japanese Unexamined Patent Application Publication No. 2004-117111, temperature correction is calculated based on the sense current flowing through the current sensing emitter of the semiconductor element referring to the table of current versus temperature correction stored in a memory. The temperature correction is added to a temperature data obtained by a temperature detecting circuit to calculate a junction temperature. Therefore, this technology also cannot be applied to a case where a gradient of the temperature-output voltage characteristic is varied.

Temperature measuring device of a power semiconductor apparatus


A lighting fixture includes a convertible shade which is supported relative to the light source to intercept light rays emitted by the light source in a selected direction or directions. The wall of the convertible shade has one or more wall inserts which can be selectively and easily secured to or detached from the convertible shade to alter the effect of the convertible shade on light rays from the light source which are directed at the location or locations of the wall insert(s) in the convertible shade without detaching the convertible shade from the shade supporting means. Preferably, the convertible shade is made of an opaque material while the insert(s) may be made of opaque, translucent or clear materials.

The present invention relates to convertible shades for lighting fixtures, such as floor lamps, table lamps, desk lamps and certain wall mounted lamps wherein the shade is located generally above the light source of the lighting fixture, and, in particular, to convertible shades which are provided with one or more wall inserts that can be easily secured to or detached from the walls of the convertible shades to alter the effect of the convertible shades on light rays emanating from the light source(s) of the lighting fixtures and to lighting fixtures including such convertible shades.
The present invention provides a unique convertible shade that enables the lighting effects of floor, table, desk and certain wall mounted lamps to be easily and dramatically altered. Normally, floor, table, desk and wall lamps with shades above the light source are made to redirect any upward light rays from the light source in a generally downward direction to focus or concentrate the light rays where a person using the light source most needs the light to perform tasks such as reading, writing, playing board or card games, etc. and such shades thereby perform a valuable function. However, there may be times when it is desired to change the lighting effects of such a floor, table, desk or wall lamp for fulfilling functions other than reading, writing, playing board or card games, etc., such as, for parties, general overall room illumination, etc., by allowing at least some of the generally upwardly directed light rays from the light source(s) to reflect off of the ceiling and/or walls of a room including the formation of various regular or irregular patterns of light on the ceiling and/or wall. The convertible shade of the present invention provides an easily convertible shade for such floor, table, desk and wall lamps that can be used to redirect all of the light rays emanating in a general upward direction or directions from light source(s) of such a lighting fixture in a generally downward direction or permit at least some of the light rays from the light source(s) to pass through the shade and onto a ceiling and/or wall(s) for aesthetic or other reasons.

Lighting fixture with convertible shade having a wall with detachable inserts of opaque, translucent, or clear materials


A musical apparatus which controls a variety of parameters of musical tones by detecting motion of an object in a space adjacent to the musical apparatus. More specifically, the musical apparatus may comprise a musical tone signal generator which generates a musical tone signal, at least one light source which radiates light beams into a space adjacent to the musical apparatus, at least one light detector which detects at least two light beams reflected from an object in the space and generates a detection value for each of said at least two light beams, a computing element which receives the detection values and generates a synthesized value; and a controller which controls parameters of musical tones based on the synthesized value. For example, the synthesized value may be the sum of the detection values, the difference between the detection values, the ratio between the detection values, or some other relationship between the detection values.

An electronic musical apparatus which detects reflected light to control the musical tone signal is known. Such a device was disclosed in Japanese Laid-Open Utility Model Application Publication Number SHO 58-195296.
Japanese Laid-Open Utility Model Application Publication Number SHO 58-195296 discloses attaching a light quantity detection apparatus in order to detect and sense the amount of ambient light outside an electronic musical apparatus. It reacts to the amount of light that has been sensed by the light quantity detection apparatus and controls parameters that are related to the musical tone (hereinafter, simply referred to as "parameters" ) such as the musical interval, timbre and volume.
However, in the device disclosed in Japanese Laid-Open Utility Model Application Publication Number SHO 58-195296 the amount of light is detected by a single light quantity detection apparatus, and there is no disclosure in Japanese Laid-Open Utility Model Application Publication Number SHO 58-195296 of the detection of a plurality of light quantities.
In addition, U.S. Pat. No. 5,045,687 discloses that a space is irradiated with light such as infrared light, mutually different sound pitches are assigned in advance to the multiple number of light beams reflected from the specified objects in the space, said multiple number of reflected light beams are detected and musical tone signals are produced that possess pitches which conform to the reflected light beams that have been detected.
However, in the system disclosed in U.S. Pat. No. 5,045,687, if a plurality of reflected light beams are detected, the device controls the musical tone signal based only on one of the reflected light beams, the one that is detected first. U.S. Pat. No. 5,045,687 does not disclose that controlling musical tone signals by means of the joint action of a multiple number of reflected light beams.

Musical apparatus using multiple light beams to control musical tone signals


A system and method for applying a convolutional neural network (CNN) to speech recognition. The CNN may provide input to a hidden Markov model and has at least one pair of a convolution layer and a pooling layer. The CNN operates along the frequency axis. The CNN has units that operate upon one or more local frequency bands of an acoustic signal. The CNN mitigates acoustic variation.

Systems for automatic speech recognition (ASR) are generally challenged with the wide range of speaking, channel, and environmental conditions that humans can generally handle well. The conditions may, for example, include ambient noise, speaker variability, accents, dialects and language differences. Other variations may also be present in a particular speech pattern.
These types of acoustic variations have been found to be challenging to most ASR systems that use Hidden Markov Models (HMMs) to model the sequential structure of speech signals, where each HMM state uses a Gaussian Mixture model (GMM) to model short-time spectral representation of speech signal. Better acoustic models should be able to model a variety of acoustic variations in speech signals more effectively to achieve robustness against various speaking and environmental conditions.
More recently, deep neural networks have been proposed to replace GMM as the basic acoustic models for HMM-based speech recognition systems and it has been demonstrated that neural network (NN)-based acoustic models can achieve competitive recognition performance in some difficult large vocabulary continuous speech recognition (LVCSR) tasks. One advantage of NNs is the distributed representations of input features (i.e., many neurons are active simultaneously to represent input features) that generally makes them more efficient than GMMs. This property allows NNs to model a diversity of speaking styles and background conditions with typically much less training data because NNs can share similar portions of the input space to train some hidden units but keep other units sensitive to a subset of the input features that are significant to recognition. However, these NNs can be computationally expensive to implement.
It is an object of the following to obviate or mitigate at least one of the foregoing issues.

System and method for applying a convolutional neural network to speech recognition

THE GOVERNING COUNCIL OF THE UNIVERISTY OF TORONTO


Portable container apparatus and method for co-storing work articles including working implements and their associated elongated elements such as cable, power cord, hose, wire, string, thread, yarn, rope, bridle or leash elements. The container retains a collection of working implements within its inner cavity while simultaneously retaining elongated elements upon its outer surface of revolution. The container rotates to facilitate wrapping and unwrapping of the elongated elements. The container, which may include retractable wheels, is further configured as a seat or step-stool. An optional electrical supply source is included on the container wall.

The present invention generally relates to the article storage field, including portable containers or holders and the method of their use. More specifically, the invention described herein relates to technology for temporary storage, transport, and convenient retrieval of articles for on-site work or hobby application.
Temporarily stored and transported articles, for example, might include implements such as hand tools, power tools, elements and related items. Such articles may further include those of a considerably different configuration, for example, elongated accessory elements such as cable, hose, rope, wire, cord, yarn, and string elements and the like, any of which may well find need for application at a remote work or hobby site.
In a wide variety of vocations and avocations, activities of individuals often involve intermittent need for and use of special tools, implements, utensils, accessories and the like. When not in use, the tools, implements, and so on, must be stored in an organized manner so as to be portable and conveniently accessible. Specific tasks undertaken command specific kinds of tools. For example, while some commonality exists, special implements are employed by carpenters, plumbers, handypersons, tailors or seamstresses, gardeners, stable workers, groomers, and so on. These represent examples only and for simplicity their special tools are hereinafter referred to collectively as articles.
Such articles are called into use only periodically; then placed in temporary storage during indefinite periods of non-use. Storage methods and facilities for these articles of vocation and avocation must be such that they remain handy for ready access, yet unobtrusive and securely preserved. Beyond that, they should be collectively portable as necessary. When the articles to be stored are in varied shapes and sizes, particularly including elongated members of varied lengths as well as a collection of uniquely shaped implements, portable storage is not so easy.
Articles of the type referred to herein may be discrete hand-actuated or hand-held implements, with few or no moving parts. Or they may be complex power tools such as drills, power screw-drivers, electric scissors and sewing machine units. Additionally the articles will include associated elongate items or accessories such as power cords, strings, wires, cables, hoses, leashes, bridles, yarn, measuring tape and such. Examples of power cords would be the well-known drop light power line used occasionally by workers dealing with low-lighting conditions at their work site, as well as cords associated with power tools such as hand drills and saws.
Gardening hobbyists are known to frequently experience the need for temporarily storing work related articles such as soil-working implements, seed packets, shears, clipper, hand-rake or other small hand-manipulated or power-driven implements. At the same time, they may have need for a water hose with attached nozzle, or power cords for certain electrically driven devices. Storing all these items in a conveniently handy manner can be difficult. Sewing and knitting equipment and materials such as needles, yarn, thread spools, scissors and so on, represent yet another hobby-type of environment demanding temporary storage containers for articles such as implements and elongated strands. For the professional gardener or tailor, work article storage obviously poses a challenge of a much greater magnitude.
Carpenters and plumbers similarly require transportable storage of an assortment of tools including collections of threaded and non-threaded fasteners, wrench sets, hammers, measuring tape, pliers, power drills, level, chisels, stud locator, power screwdrivers, and so on. They also find the necessity of transporting power cables of various lengths, including the shorter cable directly associated with a power tool as well as lengthy extension cables needed to access remote power sources. Such articles must be in easy reach of the carpenter and plumber; they should be conveniently organized and easily transported in bulk to the site of intended use.
Transporting, as by cart, truck or automobile, a stored collection of work or hobby related articles of the nature referred to above can be difficult and cumbersome, particularly when the shapes of the articles involved range from discrete implements to complex power tools and elongated cords, hoses and so forth. Invariably, the locations where individuals must apply or utilize the stored items are remote from their typical short-term or long-term storage location. This is true even if the articles are placed or kept within a toolbox or within an automobile trunk, truck bed, wagon or wheelbarrow bed and so forth. Also, there is the risk of breakage, entanglement, or loss.
Even if stored directly adjacent to the site of use (for example) temporary storage in an attic, closet, basement, garage, or shed, the retrieval of the stored items for use or application is not easy. This is especially true if such items, particularly cords and other elongated articles, have been stored in a random manner, and crammed together, disorganized, unsecured or loosely collected. In such instances, the prospective user or worker is likely to discover needed items have become lost, misplaced, damaged, or entangled, due either to their disorganized storage or clumsy transit, or both. This can bring significantly added costs to the consumer and society in general, in terms of time, energy, efficiency and/or necessary re-work.
Carrying out specific tasks of the type mentioned above, for example those of the electrician, plumber, gardener, seamstress or carpenter frequently involves strenuous, back-straining, knee-bruising activities. More specifically, such activities may require a person's capability of reaching higher levels out of normal arm extension range. Other activities may necessitate positioning one's self on bended knee or in uncomfortable bending and squatting positions. When stretching or twisting to trim a tall garden plant, hang pictures, or to apply ornaments and decorative lights, there is always a danger of hurting one's self. The required turning from task to task during work activities often involves stretching and twisting the torso or spine and/or sliding and pivoting on the knees or tip-toes. This hastens exhaustion, risks damage to one's clothing, and poses obvious physical hazards.
Besides the need for organized containers and the comfort aspect just described, the worker and hobbyist commonly face the need for access to electrical power when carrying out tasks with power tools or small appliances. Too often, a work site is found to be remote from any convenient outlets, requiring that extension cords be carried along with all the other items which may prove necessary to completing a particular task at hand. Extension cords stretched from a remote site to a distant power source are frequently left to recline at ground-level, underfoot and subject to damage and water hazard where interconnected to the cord of a hand tool. This, too, poses a physical hazard with serious implications for the user's health and safety.
Various apparatuses and methods have been proposed as solutions to these challenging problems of temporary item storage, preservation, safekeeping, organizing, ease of retrieval and ease of application or placement, power supply issues and user comfort and safety. There are a myriad of suggestions for tool boxes, re-useable decorating kits, sewing, crocheting, and knitting baskets, garden-caddies, freestanding or rotated power cord wrapping frames, hose reels, compartmented crates or storage containers.
Receptacles for storing articles such as tools and implements, and even elongated elements such as cords cables, strings, holiday lights, have been proposed in the prior art. For example, mobile and portable units or caddies designed to carry gardening implements are well known. Also well known are water hose storage containers adapted to retain the hose in a coiled state. Special compartmented boxes are known for the temporary storage of holiday lights and decorations, including posts around which light cords are wrapped. In another known storage container, the light strings are wrapped around frames suspended within a rectangular box.
It is apparent that the prior art in this field includes a wealth of ad hoc, special and general use containers and methods developed with good intentions of achieving or delivering convenient, organized and safe short-term storage of articles. Many are custom made to hold hand tools and related items. Still others are specially designed to accommodate elongated elements such as strings of decorative lights or power cords, or accommodate both the power tool and its associated power supply cord. These offer a variety of user advantages, even in some cases access to resources such as electricity.
Still, there exists considerable room for improvement in the form of a comprehensive method and apparatus affording handy, temporary co-storage, or simultaneous storage, of articles that include both working implements and task-associated elongated elements such as cable, cord, yarn, hose, leash, string, strap or strip elements, and so on. There also is considerable room for improvement in making such storage apparatuses and methods to be accommodating to the human user in a way that can be both safe and comfortable
The shortcomings of the prior art, even in instances where only occasional access and application of stored items, as in the case of sewing tasks, seasonal gardening duties, plumbing emergencies, or decorating for holidays, bring great loss in efficiencies and frustration. Where hobbies are concerned, the lack of easy access to task-related articles, including both implements and associated elongated elements, can have discouraging results.
And, where more serious work is at hand, for example, involving professional electricians, carpenters, tailors, pet or animal groomers, and so on, the absence of easily usable apparatus and methods for co-storing work-related articles and elongated elements brings loss of effectiveness and efficiencies translating to economic costs to consumers and society as a whole.
Thus, it is the objective of the present inventive method and apparatus to address the above-noted shortcomings and present long-awaited improvements. The invention is fully and completely described as follows.

This patent is subject to a terminal disclaimer.


A linear prediction analysis is performed for each frame of a speech signal to determine the coefficients of a short-Term synthesis filter. For each sub-frame, an excitations sequence which, when applied to the short-term synthesis filter generates a synthetic signal representative of the speech signal, is determined by means of an iterative process in which a symmetrical matrix B.sub.n, is gradually built up with each iteration. The matrix B.sub.n is reversed with each iteration by decomposing the pattern B.sub.n =L.sub.n .multidot.R.sub.n.sup.T with L.sub.n =R.sub.n .multidot.K.sub.n where L.sub.n and R.sub.n are triangular matrices and K.sub.n is a diagonal matrix, and matrix L.sub.n has only 1s on its main diagonal.

The present invention relates to analysis-by-synthesis speech coding.
The applicant company has particularly described such speech coders, which it has developed, in its European patent applications 0 195 487, 0 347 307 and 0 469 997.
In an analysis-by-synthesis speech coder, linear prediction of the speech signal is performed in order to obtain the coefficients of a short-term synthesis filter modelling the transfer function of the vocal tract. These coefficients are passed to the decoder, as well as parameters characterising an excitation to be applied to the short-term synthesis filter. In the majority of present-day coders, the longer-term correlations of the speech signal are also sought in order to characterise a long-term synthesis filter taking account of the pitch of the speech. When the signal is voiced, the excitation in fact includes a predictable component which can be represented by the past excitation, delayed by TP samples of the speech signal and subjected to a gain g.sub.p. The long-term synthesis filter, also reconstituted at the decoder, then has a transfer function of the form 1/B(z) with B(z)=1-g.sub.p .multidot.z.sup.-TP. The remaining, unpredictable part of the excitation is called stochastic excitation. In the coders known as CELP ("Code Excited Linear Prediction") coders, the stochastic excitation consists of a vector looked up in a predetermined dictionary. In the coders known as MPLPC ("Multi-Pulse Linear Prediction Coding") coders, the stochastic excitation includes a certain number of pulses the positions of which are sought by the coder. In general, CELP coders are preferred for low data transmission rates, but they are more complex to implement than MPLPC coders.
One purpose of the present invention is to propose a method of speech coding in which the search for the stochastic excitation is simplified.

Speech coding method using synthesis analysis using iterative calculation of excitation weights


The present invention relates a novel system and method to diagnose and predict systemic disorders including brain disorders and mental states in early stage and more accurately. More particularly, this invention relates to a novel method of EEG recording and processing through which multiple output data streams are taken together from a system like brain and the structure of their correlation matrix is studied through its eigenvector, eigendirection and eigenspaces and other signal processing techniques including compression sensing, wavelet transform, fast fourier transform etc.

Neuromonitoring is a subfield of clinical patient monitoring focused on measuring various aspects of brain function and on changes therein caused by neurological diseases, accidents, and drugs commonly used to induce and maintain anesthesia in an operation room or sedation in patients under critical or intensive care.
Electroencephalography (EEG) is a well-established method for assessing brain activity. When measurement electrodes are attached on the skin of the skull surface, the weak biopotential signals generated in brain cortex may be recorded and analyzed. The EEG has been in wide use for decades in basic research of the neural systems of the brain as well as in the clinical diagnosis of various central nervous system diseases and disorders. EEG measures voltage fluctuations resulting from ionic current flows within the neurons of the brain. In clinical contexts, EEG refers to the recording of the brain's spontaneous electrical activity over a short period of time, usually 20-40 minutes, as recorded from multiple electrodes placed on the scalp. Diagnostic applications generally focus on the spectral content of EEG, that is, the type of neural oscillations that can be observed in EEG signals.
The importance of accurate, timely diagnosis of brain abnormality is crucial in many clinical settings including the emergency room (ER) or intensive care unit (ICU), in Out-Patient Department (OPD). However, most mental and neurological states are evaluated mainly through interviews and subjective exams based on the subjects' temporary performance at that time. There is no objective quantitative test for evaluating baseline brain function. Imaging technologies such as standard magnetic resonance imaging (MRI) show only structure within the brain without providing an indication of dynamic brain function. EEG is the most effective method for evaluating brain function like ECG for the heart, but interpretation requires interpretation of multichannel graphs based on visual analysis by highly trained experts.
Currently the EEG is used to diagnose neurological disease like epilepsy, seizures, encephalopathy, comatosed condition, brain dead state, encephalitis (brain fever). It is very useful tool in comatosed or unconscious patient to know the reason of unconsciousness. But it is not very sensitive and specific for the different diseases most of the time. The sensitivity varies from 30% to 60% in patients of epilepsy. EEG is often normal in patients having recent seizures even on the same day of the test. EEG is not specific or sensitive in patients of stroke, dementia, Parkinson's disease or encephalopathy.
The present invention overcomes the above shortcomings by providing a novel methodology which will be helping in diagnosing the different disorders including neurological and also systemic diseases more accurately and comprehensibly. It will also diagnose certain neurological disorders, which are not diagnosed with current EEG techniques and predict them even before symptoms.

System and method to diagnose and predict different systemic disorders and mental states