Provided are a method for detecting a pressure of an active pen, a device and an active pen, where a pen body of the active pen is provided with a touch sensor. The method includes: obtaining a sensing change amount of the touch sensor, where the sensing change amount indicates a capacitance change amount of the touch sensor; and determining, according to the sensing change amount, a pressure value on the pen body. The technical solution provided by the disclosure can reduce the cost of the active pen while realizing the pressure detection for the active pen.

With the rapid development of touch technologies and mobile terminal technologies, touch screens are used on more and more mobile terminals for human-machine interaction. In addition to accepting touch operations conducted directly by a finger, a touch screen can also support touch input operations through a stylus. The stylus is more and more widely used on touch screens because of its advantages, for example, in accurate and fast writing on smaller touch screens.
Currently, styluses for touch screens mainly include passive pens and active pens. The role of a passive pen is equivalent to a finger of a person. When the passive pen touches a touch screen, the electrode capacitance at the touch point can be changed, and the position of the touch point can be determined through detecting the change in the electrode capacitance by a touch chip of the touch screen. For achieving sufficient sensitivity, the nib of the passive pen is often very thick, and the passive pen cannot express the thickness of handwriting. An active pen can emit an excitation signal to change the electric field at the touch point, thereby changing the electrode capacitance at the touch point, and the position of the touch point can be determined through detecting the change in the electrode capacitance by the touch chip of the touch screen. Since the active pen can actively emit an excitation signal, the nib of the active pen can be designed to be very thin, and the active pen can emit signals representing different writing strength of a user to the touch screen by sensing the writing strength of the user, so that the touch screen displays the thickness of the handwriting.
In the prior art, an active pen senses the writing strength of a user mainly through a pressure sensing principle, that is, a pressure sensor is provided in the nib of the active pen, through which a pressure on the active pen under different writing strength from the user can be sensed. Pressure signals representing different writing strength of the user are transmitted to the touch screen to make the touch screen display the thickness of the handwriting. However, such active pen has a higher requirement for the material of the nib, and the cost of the pressure sensor itself is also relatively high, resulting in a high cost of the active pen.

Method for detecting pressure of active pen, device and active pen


In one embodiment, a combined mux/storage circuit comprises a latch element, a plurality of passgates connected to the latch element, and logic circuitry. Each passgate has an input coupled to receive a signal representing a respective mux input and is configured to open and close responsive to respective pairs of control signals. The logic circuitry is coupled to receive a clock signal, a delayed clock signal, and mux select control signals, and is configured to generate pulses on the pair of control signals to control a passgate that has an input coupled to receive the signal representing a selected mux inputs, as indicated by the mux select control signals. The width of the pulses is dependent on the clock signal and the delayed clock signal. The latch element is configured to latch the signal representing the selected mux input in parallel with the selected mux input being driven as an output of the mux/storage circuit.

1. Field of the Invention
This invention is related to the field of clocked storage devices such as flops, latches, registers, etc.
2. Description of the Related Art
The operating frequency of processors and other digital integrated circuits has continued to increase, reaching the GigaHertz (GHz) range in recent years. As the frequency has increased, the delay attributable to the clocked storage devices used to store state at the clock cycle boundaries has grown to a larger percentage of the clock cycle time. Accordingly, the amount of time available to do "useful work" has decreased.
Similarly, clocked storage devices typically support scan functionality for test purposes. The clocked storage devices may be linked together through special scan-in inputs and scan-out outputs in one or more "scan chains". State can be scanned in and out of the clocked storage devices for debugging and/or other test purposes. Often, the scan functionality also impacts the delay attributable to the clocked storage device.


The present invention relates to a reagent kit for detecting biofilm in test tissue, the reagent kit comprising:                (a) a pretreatment liquid comprising at least one surfactant selected, from the group consisting of nonionic surfactants, amphoteric surfactants, and cationic surfactants,        (b) a staining liquid comprising a dye, and        (c) a decolorizing liquid comprising at least one surfactant selected from the group consisting of nonionic surfactants, amphoteric surfactants, and cationic surfactants;

Chronic wounds, such as pressure ulcers (pressure injuries) and diabetic foot ulcers, have an extremely high risk of developing infections, because they are constantly exposed to external bacteria and the host's immunity is weakened. In recent years, it has become clear that bacterial biofilms are involved in the pathophysiology of chronic wounds. Biofilm-based wound management, which manages wounds depending on the presence of biofilm, has been emphasized.
Biofilm is a community formed by the fixation of microorganisms, and its main constituents are glycoproteins, proteins, extracellular DNA, etc. Biofilm is present as a reservoir of bacteria and expresses pathogenicity by forming a population. Further, biofilm can evade the effects of antibacterial agents and host immunity, causing chronic inflammation and becoming a very strong source of infection (see NPL 1). Therefore, healing cannot be expected as long as biofilm is present at the bottom of the wound. For this reason, since the latter half of the first decade of the 2000s, it has been advocated that, as biofilm-based wound therapy, wound treatment should be selected depending on the presence of biofilm. Specifically, the international guidelines jointly published by the European, US, and Pan Pacific Pressure Ulcer Advisory Panel (EPUAP-NPUAP-PPPIA) in 2014 include the section "Assessment and treatment of infection and biofilms," where the management method is explained. The guidelines recommend suspecting the presence of biofilm when, for example, the wound has been present for more than 4 weeks, there are no signs of healing for the past 2 weeks, there are findings of inflammation, or there is antimicrobial resistance. However, implementation in clinical practice is difficult because a definitive diagnosis of the presence of biofilm requires tissue biopsy and microscopic observation (see NPL 1 above).
Accordingly, there have recently been proposed technologies for quickly visualizing the distribution of biofilm on the wound surface by detecting polysaccharide components, which are constituents of biofilm, by application of wound blotting, which is a method for detecting trace components present on the wound surface (e.g., PTL 1, PTL 2, and NPL 2 to NPL 4).
PTL 1 discloses a method for visualizing the distribution of biofilm on a wound surface by wound blotting using a membrane containing a ligand for detecting trace components (anionic bacterial exopolysaccharides, such as poly-β-(1-6)-N-acetyl-D-glucosamine and alginic acid) present in the extracellular matrix of biofilm. However, this method requires about 30 minutes for detection, and is not suitable for use in clinical practice, particularly at the bedside. In order to improve this, PTL 2 discloses a method for directly detecting biofilm by wound blotting without using a biofilm-specific detection ligand. Specifically, this method comprises bringing a positively charged membrane (e.g., a cationic nylon membrane) into contact with a wound surface, staining the membrane removed from the wound surface with a cationic dye (e.g., ruthenium red or alcian blue), and cleaning the stained membrane with an aqueous solution containing acetic acid and 3 to 2% low alcohol, whereby negatively charged trace components derived from biofilm can be stained in a state of adhering to the membrane. Although this method can shorten the detection time compared with the method of PTL 1, it is not yet sufficient. Further, due to the use of acetic acid, which has a pungent odor, as a component of the membrane cleaning solution, this method is not suitable for implementation at the bedside.
NPL 2 to NPL 4 disclose methods for visualizing biofilm by cleaning a wound surface, then attaching a nitrocellulose membrane to the wound surface for 10 seconds, and then immersing the membrane in a staining liquid (ruthenium red or alcian blue) specific to polysaccharide components derived from biofilm. According to these methods, the time required for detection is about 2 minutes, and biofilm can be detected easily in a short time and non-invasively at the bedside. Therefore, an index for cleaning the wound can be obtained, and more appropriate local management of wounds is possible.

Reagent kit for detecting biofilm and method for detecting biofilm

Abstract: wherein after a membrane is brought into contact with the test tissue and released from contact, the pretreatment liquid (a), the staining liquid (b), and the decolorizing liquid (c) are brought into contact with the contact surface of the membrane in this order.


Circuit boards are mechanically connected to each other by a U-shaped pin, the legs of which are forcibly inserted into holes along edges of the circuit boards. The holes are conventional through-holes having metal linings that are electrically connected to circuit board traces that extend to components on the circuit boards. The U-shaped pin thus electrically connects components on the two circuit boards to each other.

Connecting the electronic devices on separate circuit boards is typically accomplished using one or more flexible wires, the opposite ends of which are provided with connectors that mate with connectors attached to the circuit boards themselves. An example of such an inter-circuit board connection is the ribbon cable commonly used to connect the different circuit boards found in many "desk-top" personal computers. Such prior art connections have drawbacks, one of which is their cost. Another drawback is that they are susceptible to failure when they are assembled or when they are disassembled. They are also unable to mechanically couple circuit boards to each other but are instead limited to electrically connecting them. A method and apparatus for reliably and economically connecting circuit boards and the components on them both electrically and mechanically would be an improvement over the prior art.

Compliant staple pin for connecting multiple printed circuit boards


A method of fabricating semiconductor devices. Upon formation of a trench for isolation in a cell region, a hard mask film is used as an etch mask. It is thus possible to prevent attacks of a lower layer due to deformation or loss of the etch mask.

1. Field of the Invention
The present invention relates to a method of fabricating semiconductor devices. More specifically, the present invention relates to a method of fabricating semiconductor devices, wherein a lower layer is prevented from being attacked due to deformation and loss of an etch mask when forming a trench for isolation in a cell region.
2. Discussion of Related Art
Generally, a semiconductor device includes an isolation region for electrically separating individual circuit patterns. More particularly, as semiconductor devices are high integrated and miniaturized, development into the shrinkage of an isolation region as well as the shrinkage of the size of an individual element is actively in progress. This is because formation of the isolation region greatly influences the size of an active region and process margin of subsequent process steps, as an initial manufacturing step of all semiconductor devices.
Recently, a LOCOS isolation method that has been widely used in fabrication of semiconductor devices forms an isolation region having a relatively wide area, and reaches a limit as semiconductor devices are highly integrated. Accordingly, a trench isolation method in which some of a substrate is etched to form trenches, thereby isolating elements has been proposed as technology suitable for isolation of high-integrated semiconductor devices.
Meanwhile, among semiconductor devices, flash memory devices in which stored information is not erased although external power is off have been spotlighted and widely used in memory cards. The flash memory devices need a high voltage in program and erase operations. Accordingly, a semiconductor substrate of a flash memory device has characteristics in that it has to include a peripheral region in which a high voltage circuit will be formed as well as a cell region in which data will be stored, wherein the peripheral region has to be wider than the cell region, and an isolation film of the peripheral region has to be greater than a width and depth of the isolation film of the cell region. In order to fulfill the characteristics of this flash memory device, a dual trench isolation structure in which an isolation film of the peripheral region is deeper than an isolation film of the cell region has been proposed.
As such, in order to form isolation films having different depths in the cell region and the peripheral region, respectively, a photomask process and an etch process have to be performed on each of the cell region and the peripheral region. The peripheral region has to use a photoresist for KrF since it has a great pattern size. The cell region has to use a photoresist for ArF, which can be patterned finely, since it has a small pattern size.
The photoresist for KrF, which uses KrF light (248 nm) as an exposure light, does not become problematic upon etching of trenches because it is not weak in plasma and can be formed thickly. However, the photoresist for ArF, which uses ArF light (193 nm) as exposure light, can be lost upon etching of trenches because it is thin in thickness and weak in plasma. Further, the photoresist for ArF can be deformed due to plasma used in a trench etching process, and thus attacks a lower layer and a semiconductor substrate.
More particularly, in nano technologies, as overlay margin between a floating gate and an isolation film decreases, a pad nitride film, which serves as an anti-polish film in a subsequent CMP process of a polysilicon film, is lost in the case of introducing a self-aligned floating gate (SAFG) scheme. Accordingly, a thickness of the pad nitride film is increased about 1000 to 2000 Å. This makes it impossible to etch trenches using a photoresist for ArF.

Method of fabricating semiconductor device


Thin film AMA has a substrate having electrical wiring and a connecting terminal, an actuator formed on the substrate, a supporting element formed between the substrate and the actuator for supporting the actuator, a reflecting member formed on the actuator, and a plurality of posts formed between the actuator and the reflecting member for supporting the reflecting member. The reflecting member is supported by a first post formed on the actuator and by a second post and a third post correspondingly formed on an actuator adjacent to the actuator. So, a deflection or tilting downward of the reflecting member can be prevented so that tilting angle of the reflecting members can be made uniform. Further, as the length of the reflecting member between the first post and the second post, or between the first post and the third post is shorter, the tilting angle of the reflecting member is bigger.

The present invention relates to a thin film actuated mirror array in an optical projection system and to a method for manufacturing the same, and more particularly to a thin film actuated mirror array in an optical projection system having a plurality of posts between an actuator and a reflecting member so as to prevent an initial deflection or a tilt of the reflecting member, thereby making a tilting angle of the reflecting member uniform and bigger, and to a method for manufacturing the same.
In general, light modulators are divided into two groups according to their optics. One type is a direct light modulator such as a cathode ray tube (CRT). The other type is a transmissive light modulator such as a liquid crystal display (LCD). The CRT produce superior quality pictures on a screen, but the weight, the volume and the manufacturing cost of the CRT increase according to the magnification of the screen. The LCD has a simple optical structure, so the weight and the volume of the LCD are less than those of the CRT. However, the LCD has a poor light efficiency of under 1 to 2% due to light polarization. Also, there are some problems in the liquid crystal materials of the LCD such as sluggish response and overheating.
Thus, a digital mirror device (DMD) and actuated mirror arrays (AMA) have been developed in order to solve these problems. Currently, the DMD has a light efficiency of about 5%, but the AMA has a light efficiency of above 10%. The AMA enhances the contrast of a picture on a screen, so the picture on the screen is more apparent and brighter. The AMA is not affected by and does not affect the polarization of light and therefore, the AMA is more efficient than the LCD or the DMD.
FIG. 1 shows a schematic diagram of an engine system of a conventional AMA which is disclosed in U.S. Pat. No. 5,126,836 (issued to Gregory Um). Referring to FIG. 1, a ray of incident light from a light source 1 passes a first slit 3 and a first lens 5 and is divided into red, green, and blue lights according to the Red.multidot.Green.multidot.Blue (R.multidot.G.multidot.B) system of color representation. After the divided red, green, and blue lights are respectively reflected by a first mirror 7, a second mirror 9, and a third mirror 11, the reflected light is respectively incident on AMA devices 13, 15, and 17 corresponding to the mirrors 7, 9, and 11. The AMA devices 13, 15, and 17 tilt mirrors installed therein, so the incident light is reflected by the mirrors 7, 9, and 11. In this case, the mirrors 7, 9, and 11 installed in the AMA devices 13, 15, and 17 are tilted according to the deformation of active layers formed under mirrors. The lights reflected by the AMA devices 13, 15, and 17 pass a second lens 19 and a second slit 21 and form a picture on a screen (not shown) by using projection lens 23.
The AMA is generally divided into a bulk type AMA and a thin film type AMA. The bulk type AMA is disclosed in U.S. Pat. No. 5,469,302 (issued to Dae-Young Lim). In the bulk type AMA, after a ceramic wafer which is composed of multilayer ceramics inserted into metal electrodes therein is mounted on an active matrix having transistors, a mirror is mounted on the ceramic wafer by means of sawing the ceramic wafer. However, the bulk type AMA has disadvantages in that it demands a very accurate process and design, and the response of an active layer is slow. Therefore, the thin film AMA manufactured by using semiconductor technology has been developed.
The thin film AMA is disclosed in U.S. Ser. No. 08/336,021 U.S. Pat. No. 5,760,947, entitled "THIN FILM ACTUATED MIRROR ARRAY USED IN AN OPTICAL PROJECTION SYSTEM AND METHOD FOR THE MANUFACTURE THEREOF," which is now pending in USPTO and is subject to an obligation to the assignee of this application.
FIG. 2 shows a cross-sectional view of the thin film AMA. Referring to FIG. 2, the thin film AMA has an active matrix 31, an actuator 33 formed on the active matrix 31, and a mirror 35 installed on the actuator 33. The active matrix 31 has a substrate 37, M.times.N (in which M, N is integers) number of transistors (not shown) which are installed in the substrate 37, and M.times.N (in which M, N is integers) number of connecting terminals 39 respectively formed on the transistors.
The actuator 33 has a supporting member 41 formed on the active matrix 31 which includes connecting terminal 39, a first electrode 43 having a bottom of first portion thereof attached to the supporting member 41 and having a second portion formed parallel to the active matrix 31, a conduit 49 formed in the supporting member 41 so as to connect connecting terminal 39 to the first electrode 43, an active layer 45 formed on the first electrode 43, a second electrode 47 formed on the active layer 45, a spacing member 51 formed at first portion of the second electrode 47, and a supporting layer 53 having a bottom of first portion thereof attached to the spacing member 51 and having a second portion formed parallel to the second electrode 47. The mirror 35 is installed on the supporting layer 53.
A manufacturing method of the thin film AMA will be described below. FIGS. 3A to 3D illustrate manufacturing steps of the thin film AMA. In FIGS. 3A to 3D, the same reference numerals are used for the same elements in FIG. 2.
Referring to FIG. 3A, at first, the active matrix 31 which includes the substrate 37 in which M.times.N number of transistors (not shown) are formed and M.times.N number of connecting terminals 39 respectively formed on the transistors is provided. Subsequently, after a first sacrificial layer 55 is formed on the active matrix 31, the first sacrificial layer 55 is patterned to expose a portion of the active matrix 31 where the connecting terminal 39 is formed. The first sacrificial layer 55 can be removed by using an etching method or by means of chemicals.
Referring to FIG. 3B, the supporting member 41 is formed on the exposed portion of the active matrix 31 by a sputtering method or a chemical vapor deposition (CVD) method. Next, after a hole is formed through supporting member 41, the conduit 49 is formed in the supporting member 41 by filling the hole with an electrically conductive material, for example tungsten (W). The conduit 49 electrically connects the connecting terminal 49 to the first electrode 43 which is successively formed. The first electrode 43 is formed on the supporting member 41 and on the first sacrificial layer 55 by using an electrically conductive material such as gold (Au) or silver (Ag). The active layer 45 is formed on the first electrode 43 by using a piezoelectric material, for example lead zirconate titanate (PZT). The second electrode 47 is formed on the active layer 45 by using an electrically conductive material such as gold (Au) or silver (Ag).
The transistor installed in the active matrix 31 converts a picture signal which is caused by an incident light from a light source into a signal current. The signal current is applied to the first electrode 43 through the connecting terminal 39 and the conduit 49. At the same time, a bias current from outside through a common line (not shown) formed on the bottom of the active matrix 31 is applied to the second electrode 47, so an electric field is generated between the second electrode 47 and the first electrode 43. The active layer 45 formed between the second electrode 47 and the first electrode 43 is actuated according to the electric field.
Referring to FIG. 3C, after a second sacrificial layer 57 is formed on the second electrode 47, the second sacrificial layer 57 is patterned to expose a portion of the second electrode 47 adjacent to a portion under which the supporting member 41 is formed. After the spacing member 51 is formed at the exposed portion, the supporting layer 53 is formed on the second sacrificial layer 57 and on the spacing member 51. Also, the mirror 35 for reflecting the incident light is formed on the supporting layer 53.
Referring to FIG. 3D, the mirror 35, the supporting layer 53, the second electrode 47, the active layer 45 and the first electrode 43 are sequentially patterned so that M.times.N number of pixels having predetermined shapes are formed. Consequently, after the first sacrificial layer 55 and the second sacrificial layer 57 are removed, pixels are rinsed and dried in order to complete the thin film AMA.
To However, in the above-described thin film AMA, as a first portion of the mirror is supported by a spacing member formed on the actuator, a second portion of the mirror which is not supported by the spacing member may deflect or tilt downward. So, the tilting angles reflected by every reflecting member are not uniform. Therefore, the light efficiency of the light reflected by the reflecting member is decreased and the contrast of the picture projected onto a screen is also decreased. In addition, the distance between the light source and the screen is narrower due to the limited tilting angle of the actuator.

Thin film actuated mirror array in an optical projection system and method for manufacturing the same


This invention details a lubrication system for an automatic transmission, specifically the bearings of the planetary pinion gears. The planetary carriers have grooves formed in spider and flange sections thereof to carry the lubricating material from the inner diameter of the planetary carrier to the inner diameter of each pinion gear bearing mounted in the planetary carrier. The invention further includes two thrust washers that are assembled on opposing sides of each pinion gear that have axially and radially extending slots that further carry the oil between the inner diameter of the planetary carrier and the outer diameter of the planetary carrier. Lastly, the invention discloses a method for lubricating the pinion gears of the planetary carrier.

Power transmissions require oil or other lubricating materials to carry away thermal energy dissipated by the power transmission components. This is especially true for electromechanical transmissions having an electric motor housed inside the transmission. The lubricating oil originates in an oil reserve and is directed by a pump that distributes the oil centrifugally throughout the transmission. The operating temperatures of the bearing components supporting the planetary gear loads can be of considerable concern. To ensure sufficient lube oil flow to the intended internal components, the transmission design has to be carefully considered to provide sufficient oil flow to components along the entire length of the transmission.
An electro-mechanical transmission is described and commonly assigned U.S. Provisional Ser. No. 60/531,528 entitled "Two-Mode Compound-Split, Hybrid Electro-Mechanical Transmission Having Four Fixed Ratios," Schmidt et al., filed Dec. 19, 2003 and hereby incorporated by reference in its entirety.

Lubrication system and method for hybrid electro-mechanical planetary transmission components


An optical homodyne detection scheme for FM chirped lidar is described. The system performs de-chirping within a photodetector, and it does not require high-speed photo-detection or RF mixing. Embodiments are also described for dealing with phase noise.

Lidar altimeters provide better range resolution and smaller beam size compared to conventional microwave radar systems. It is known that the range accuracy of a lidar system σR depends on signal bandwidth B and the receiver signal-to-noise-ratio (SNR) as σR∝c/(B√{square root over (SNR)}), where c is the speed of light and signal bandwidth B is inversely proportional to the pulse width. In order to achieve acceptable range accuracy and detection sensitivity, satellite-based lidar systems generally operate in short pulse and high peak power regime with relatively low pulse repetition rate. In this case, photon damage has been a concern because megawatt level pulse peak power may cause damage to optical devices and therefore shorten the lifetime of the optical system.

Coherent detection scheme for FM chirped laser radar


A module comprising: one or more vials containing tritium; one or more tritium covers; and an open space within the one or more tritium covers, wherein the one or more vials containing tritium are located within the open space of the one or more tritium covers so that the one or more tritium covers protect the one or more vials containing tritium, and wherein the one or more tritium covers are made from a material that exhibits sufficient strength so that the module protects the one or more vials containing tritium from damage when dropped from a distance of 1 m or more.

Typically, glass vials are filled with tritium and sealed so that the tritium is retained within the vials. These vials may be incorporated into another device so that the tritium provides illumination to the other device. When incorporated into another device the tritium vials may be damaged and broken. Further, the device may be subjected to an impact which may increase the likelihood of breaking the vials of tritium. A prototype design was produced and displayed at a trade show; however, after testing the prototype design it became apparent that the design did not adequately protect the vials of tritium from impact, thermal shock, chemicals, or water. Examples of a vial containing tritium incorporated into a device may be found in U.S. Pat. Nos. 4,741,120; 5,359,800; 6,216,351; 6,257,734; 7,743,546; and 7,903,503 and German Patent No. DE202004012237U1 all of which are expressly incorporated by reference herein for all purposes.
It would be attractive to have a module that is substantially resistant to impact so that the module prevents the vials of tritium from breaking. It would be attractive to have a module that is resistant to extreme thermal conditions and thermal shock so that the module provides protection to the vials of tritium. It would be attractive to have a module that is resistant to fluid penetration so that a fluid does not enter a cavity in the module and damage the vials of tritium. Further, it would be attractive to have a module that is resistant to the outdoor weathering conditions and ultra-violet radiation, as well as chemicals which the module incorporated into another device may be exposed to in the outdoors, for example gasoline, an insect repellent, or a sun screen.

Apparatus and method for encapsulating tritium


Text intraline diffing output may be provided. Based on a comparison of each of a first plurality of lines to a second plurality of lines, a deleted line set and an added line set may be created. The deleted line set may comprise lines selected from the first plurality of lines that are not identical to any line present in the second plurality of lines. The added line set may comprise lines selected from the second plurality of lines that are not identical to any line present in the first plurality of lines. Next, a matrix may be created comprising a plurality of weights. A path may then be established through the matrix that maximizes a number of matching lines between the deleted line set and the added line set. Moreover, each of the matching lines may be displayed in which word differences may be indicated.

In computing, "diff" is a file comparison utility that outputs differences between two text files. Furthermore, the diff utility's output is also called a diff. In some situations, diff utilities can display differing section sub-parts between two text files or side-by-side differences between two text files. Conventional diff utilities, however, do not look inside the differing section sub-parts and determine which lines are similar in order to provide a more efficient diff display to a user. Rather, with conventional diff utilities, changes in a text line part are difficult to view because left and right lines are simply displayed next to one another in a horizontal or vertical alignment. Thus with conventional diff utilities, its not possible to highlight just a line's portion that is different from the other text file being compared. While conventional diff utilities can show intraline differences so long as the differences is a single line that changed in isolation, conventional diff utilities do not match up similar lines in the context of an entire block of differing lines. Consequently, developers cannot efficiently see intraline differences between two text files. This often causes problems, for example, because the conventional strategy does not highlight just a line's portion that has changed.

Displaying text intraline diffing output


A tool for rotating a drum from a first cartridge drum axle end, the first cartridge drum axle end having a predetermined shape, the tool comprising a tool body configured to provide structure to the tool; a first end defined by the tool body; a second end defined by the tool body, the second end positioned on an end on the tool body opposite to the first end; and a first impression made on the first end of the tool body, the first impression substantially matching the predetermined shape of the first cartridge drum axle end, wherein when the first cartridge drum axle end is inserted within the first impression, the tool allows the drum to be rotated.

Printer cartridges typically include a cartridge drum. The cartridge drum is usually electrically charged and functions to transfer toner to paper according to a print pattern. The cartridge drum is usually mounted to a printer cartridge via a drum axle assembly 10 (FIG. 1). The drum axle assembly includes a drum axle end 12, which may be of various shapes and sizes. In some printer cartridges, the drum axle end 12 may be made of either plastic or metal and may have a substantially triangular shape (FIGS. 1-3).
Printer cartridges of fax machines, copiers, inkjet printers, and laser printers are often remanufactured. The remanufacturing of printer cartridges may include cleaning, repairing damaged parts, adding toner, and replacing worn parts. Among the parts being replaced is the drum. When the drum is attached to the cartridge either during manufacturing or remanufacturing, the drum gets lubricated and the tightness of the drum attachment to the printer cartridge is checked. During the lubrication and the tightness check, the drum has to be rotated a few times by turning the drum axle from the drum axle end.
Currently, the drum may be rotated by hand during lubrication and tightness check. The problem with this method is that it may be ineffective in high volume manufacturing and remanufacturing environment. A method and device that would provide leverage in rotating the drum during cartridge manufacturing or remanufacturing are desired and are addressed by the present invention.


A method for optimizing a seasoning recipe for a dry etch process. The method includes setting a critical value of reproducibility, a main etch recipe, and a preliminary seasoning recipe. A test wafer is then etched using the preliminary seasoning recipe in a dry etch chamber. Next, a main etch process is performed with respect to at least 10 run wafers in the dry etch chamber using the main etch recipe and an end-point detection time for each wafer is determined. An initial dispersion and a standard deviation are then determined using the determined end-point detection times. The critical value of reproducibility is then compared to the initial dispersion. If the initial dispersion is equal to or less than the critical value of reproducibility, the preliminary seasoning recipe is used as the seasoning recipe, otherwise the preliminary seasoning recipe is modified and the process is repeated until an optimal seasoning recipe is determined.

As semiconductor devices become more highly integrated, the design rules are reduced. Thus, in a dry etch process, it is important to have a high etch selectivity and a high anisotropy to properly etch a wafer. Also, it is important to be able to reproduce the same etch for each wafer that passes through the dry etch process.
In a dry etch process, the initial set of wafers that are processed can be spoiled when the dry etch processing chamber is not stabilized. In other words, if the ambient atmosphere within the chamber has not reached steady state, an unsteady etch rate can result.
This problem also occurs after a series of wafers have been processed or the dry etch process remains idle for a period of time between etch processes. Thus, a "seasoning process" is performed to prevent these problems by using a test wafer before a main etch process. Here, "seasoning process" means a process of etching a test wafer before performing a main etch process in the same chamber. In a conventional method, a recipe for a seasoning process is the same as that of a main etch process. However, immediately after finishing the seasoning process, the ambient atmosphere in the chamber may still not be stabilized, which results in an unsteady etch rate in the main etch process.
FIG. 1 is a graph showing experimental results obtained using a conventional dry etch process. In FIG. 1, the results of two test cases are shown. In case 1, a seasoning process was performed using a test wafer with an oxide layer in a dry etch chamber. Then, a main etch process was performed in the same chamber using a run wafer having a polysilicon layer and a tungsten silicide layer sequentially stacked on the wafer. Further, the run wafer included a hard mask pattern formed on the tungsten silicide layer. In the main etch process, the tungsten silicide layer was etched using the hard mask pattern by supplying Cl2 and SF6. An end-point detection time was determined as the time when the tungsten silicide layer was completely etched, as measured using an optical emission spectroscopy. Next, the polysilicon layer was etched by supplying HBr and O2. In a seasoning process (which was performed before the main etch process), a test wafer with an oxide layer was etched by supplying the same etch gases, under the same conditions and with the same sequences, as in the main etch process.
In case 2, the same main etch process was used as in case 1. However, in the seasoning process of case 2, a test wafer having a polysilicon layer was etched. Further, the main etch recipe used in case 2 was identical with that of case 1. In case 1 and case 2, each of the main etches were repeatedly performed on multiple wafers of at least one lot.
As illustrated in FIG. 1, with case 1, after the seasoning process was performed with respect to the test wafer with the oxide layer, an end-point detection time in the first main etch process was determined to be greater than the end-point detection times of subsequently processed wafers. As subsequent wafers were processed through the main etch process, the end-point detection time gradually decreased and stabilized. Furthermore, in case 2, after performing a seasoning process with respect to the test wafer with the polysilicon layer, an end-point detection time of a first main etch process was determined to be less than the end-point detection times of subsequently processed wafers. As subsequent wafers were processed through the main etch process, the end-point detection time gradually increased and stabilized. Thus, as is apparent from FIG. 1, although a seasoning process was performed in the conventional dry etch process with respect to a test wafer by using the same etch recipe with that of the main etch process, the conventional method did not provide a constant etch rate for the main etch process.
Therefore, a need exists for a reproducible dry etch process that reduces the number of wafers that are spoiled during the start-up of a dry etch process.

Method of optimizing seasoning recipe for etch process


A system and method is provided for controlling operating of an engine having a turbocharger with a compressor and an exhaust turbine, wherein the compressor is configured to provide a boost pressure and operate stably in a stable operating range between a surge line and a choke line of a compressor map. A controller is configured to control an actuator to cause an operating point of the compressor to move along a predetermined path within a corridor along a safety zone in the compressor map. The safety zone extends along the surge line. The safety zone is selected to provide a distance between the surge line and the corridor that minimizes a reduction of the boost pressure such that a sufficient boost pressure is available after the network fault.

The present invention concerns an internal combustion engine, and a genset having a generator driven by an internal combustion engine.
Turbochargers have long been used to compress air, a fuel-air mixture or pure fuel to a higher pressure level before being fed to the combustion chambers of the internal combustion engine.
The surge line of the compressor of the turbocharger indicates that limit at which, in the event of exceeding it, an unstable operation, e.g. a flow reversal, occurs through the compressor.
The choke line of the compressor of the turbocharger indicates that limit at which there is no mass flow through the compressor in case of reaching the limit.
External and internal influences can lead to the position of the operating point of the compressor changing, and even to the surge line being reached or exceeded. Aging of the turbocharger can also lead to such a behavior.
If the internal combustion engine is coupled with a generator to a genset, an important example of an external influence is a net fault in a power supply net connected to the genset. This can be for example a short circuit in at least one phase of the power supply net. This leads to an undervoltage and an overcurrent, which causes strong and rapid load changes with respect to the genset. Various national legal systems stipulate that the genset must remain connected to the energy supply net at least for a certain time in the event of a net ("low voltage ride through"—LVRT). Without protective measures, there may be disadvantageous effects on the genset.
Examples of internal influences are a damage at the turbocharger, misfiring with respect to at least one combustion chamber of the internal combustion engine, etc.
The object of the invention is to provide an internal combustion engine, which allows, even in case of influences, which, in the state of the art, cause the surge line of the compressor to be reached or exceeded, a stable operation of the turbocharger, and a genset with such an internal combustion engine.


A frac system includes power generation equipment and a power storage device used to provide electric power to one or more pieces of frac equipment. The frac system includes a power controller used to control the source of the power to the frac equipment. The power controller may measure the charge status for the power storage device and the electrical power load being used by the frac equipment. The power controller may engage or disengage the power generation equipment based on the measured charge status and electrical power load, may control the source of the power provided to the frac equipment, and may control whether the power storage device is being charged.

During frac operations, multiple pieces of frac equipment may be in continuous use. Such equipment may include, for example, one or more blenders, hydrators, pumps, CAS, and belt loader systems as well as control systems for operating the equipment and infrastructure such as light plants for night operation. Typically, the frac equipment is powered using diesel engines or electric motors with one or more generators. However, the requirement to continuously supply electrical power to frac equipment, which may require continuous operation of the generators, may result in high operation costs due to fuel consumption and maintenance requirements on the generators as well as producing noise and emissions.

Wellsite adaptive power management system


A method and apparatus for resource management for non-deterministic automata for dynamic verification of a system or device under test is described herein.

1. Field of the Invention
This invention relates to the field of system verification. More specifically, the invention relates to the use of resource management in automata-based methods in the dynamic verification of a system or device under test.
2. Background
Definitions
"compliance assessment". (Defined in the text below.)
"compliance assessment protocol". (Defined in the text below.)
"compliance verification". Determination of the level of correspondence between the requirements expressed in a system specification and the performance of a DUT.
"deterministically specified system". (Defined in the text below.)
"directive". The communication of a request or command, and any other communication made for the purpose of causing the occurrence of an intended result. Those skilled in the art are familiar with a variety of ways of implementing directives, such as function calls.
"DUT", or "device under test". An implementation of a system that is to undergo verification.
"DUT computation". Computation of DUT behavior (e.g. simulation of a model of a DUT) during dynamic system verification.
"dynamic verification run". A single session of testing, that is, applying a compliance assessment protocol to a DUT.
"dynamic verification suite". The set of dynamic verification runs used in compliance verification.
"interface". Specified behavior made accessible by a system specification. This can include specialized behavior made available solely during verification. The totality of the behavior exhibited by a system is its interface, but, for convenience in explanation, it is sometimes useful to speak of different subsets or subparts of a system's interface as if they were separate.
"NDA", or "non-deterministic automaton". (Defined in the text below.)
"non-deterministically specified system". (Defined in the text below.)
"sequence". A series of verification operations and their associated timing information. Timing information may be in terms of suitably quantized periodic intervals or, equivalently, at arbitrary intervals dependent on the verification operations in question.
"system". A device or set of devices intended to accomplish a particular specified set of functions. A system could be implemented as software, hardware, or some combination of software and hardware. It is possible that the system exists in and of itself, as a model in some modeling environment, or as a combination of existence for some portion and model for others. The system has a defined interface through which it interacts with the outside world and the outside world interacts with it.
"test computation". Computation performed during dynamic system verification other than DUT computation.
"traverse". (Defined in the text below.)
"user". Person or persons involved in a compliance verification of a system.
"verification environment". The situation under which a dynamic verification run is conducted (e.g., temperature, humidity, clean room, noise, NC-Verilog™ hardware description language simulator, ModelSim™ hardware description language simulator). Together with the interface of the system, this establishes the set of verification operations that are possible to apply to the DUT as well as to the non-DUT components of the verification environment.
"verification operation". A verification action at an instant of time. The set of possible verification operations, which includes read and write, depends on a system's interface and a verification environment.
"verification protocol". (Defined in the text below.)
Overview
The creation of a system typically begins with the creation of a system specification (which may or may not be written down, in whole or in part) that defines the requirements for the system's functioning. These requirements may concern not only the desired function of the system but also other attributes such as power consumption, speed of operation, and so forth.
Verifying that a complex system operates in compliance with the requirements given in its system specification is difficult for many reasons. In particular,    1. The size of input that may be supplied to the system at any one time can be substantial. Even if the system has a relatively small number of individual input ports, the number of possible combinations of input values can still be very large. For example, having only 30 binary input lines still represents over a billion possible input combinations, and it is not uncommon for a system to have several times this number of inputs.    2. The system may keep an internal state. As a result, the functioning of the system at a particular time can be dependent not only on the inputs being supplied to the system at that time but also on all input that has been supplied to the system up to that time.    3. The combination of the two previous points results in an almost incomprehensibly large number of possibly unique situations arising in a given system. For example, a series of only 12 of the 30-bit inputs mentioned previously represents 212•30, or about 10108, potentially unique situations. Even if every particle in the universe were a verification system able to perform a verification test every nanosecond, there has not been enough time from the beginning of the universe to have tested all of the possible unique situations in this simple example.    4. Given the large number of unique situations arising from even limited series of inputs, exhaustive testing is not possible in the limited time and using the limited resources available today. Only a tiny fraction of the number of unique situations can actually be used for verification purposes. The quality of the compliance verification process is then highly dependent on how "good" the tests are that make up the sample from the total space of possible tests. (A "good" test is defined as one likely to detect a potential discrepancy between the DUT and its specification. A "good" set of tests is one that includes tests that do not significantly overlap in terms of which discrepancies they detect; that is, that they exhibit little-to-no redundancy.)
When searching for "good" tests or classes of tests, it is natural to attempt to control the complexity of the task by subdividing the total interface to the system into more manageable pieces and constructing tests for those pieces independently. While this kind of "divide and conquer" approach is useful in many other areas, it is not appropriate in the compliance verification of complex systems. In particular, the following difficulties are encountered.    1. Complex systems in general comprise a number of subparts which may interact internally, either directly (through, e.g., active collaboration on the accomplishment of some task) or indirectly (through, e.g., the successive use of the same shared resources). These subparts may exhibit behavior through the system's interface and these behaviors may be in active use simultaneously.    2. Another layer of complexity is therefore added by the interaction of the activity of one of these subparts with the activity of the others. In particular, not only is the behavior of a subpart dependent on the entire history of its input stream, it is also dependent on the relative timing of its activity with that of other subparts of the system who are themselves dependent on the entire histories of their own input streams.    3. As a result, it is not possible in general to separate the verification of one part of a system's interface from that of the other parts, even when the parts do not, from a user's point of view, have any relation to each other. As a particular example, presenting the same input to one part of the system's interface at different times can result in different responses, depending upon what else just happened to be occurring elsewhere in the system at that moment.    4. Defects may therefore be obscured until not only the appropriate stimulus on the pertinent part of the interface is applied, but also until that stimulus is coordinated with the complete stimulus history applied to other parts of the interface as well. More intricate and subtle tests have to be created to exercise these situations.
To users, the behavior of systems can appear to be either deterministic or non-deterministic. Behavior appears to be deterministic to a user of a system if the specification provided to said user has sufficient information to enable the computation of the precise response pattern of the system for any sequence of stimulus that is included in the system's specification. We call a specification that makes a system appear to be deterministic a "deterministic specification". Behavior appears to be non-deterministic to a user of a system if the specification provided to said user does not have sufficient information to enable the computation of the precise response pattern of the system for a sequence of stimulus that is included in the system's specification. We call a specification that makes a system appear to be non-deterministic a "non-deterministic specification".
While at first glance it may appear that a deterministic specification is more desirable, a system may have a non-deterministic specification for a variety of reasons.                The system may be implemented in such way that it is inherently non-deterministic (e.g., dependent on quantum decay events).        The system may have a deterministic but very complex implementation, which would be difficult for users to understand or work with. A non-deterministic specification can be considerably more concise, as well as easier to understand and work with.        The system may have a deterministic but proprietary implementation, which the system provider does not want to reveal.        The system may be a deterministic implementation of a specification that was deliberately written as a non-deterministic specification to allow a wide range of implementations. Industry-standard interface specifications are often written as non-deterministic specifications for this reason.
We will refer to a system that has a non-deterministic specification as a "non-deterministically specified system", or an "NDS system". We will refer to a system that has a deterministic specification as a "deterministically specified system" , or a "DS system".
A large portion of modern systems are NDS systems; for example, microprocessors, multi-threaded software systems (e.g., Windows, Linux), automotive control systems, avionic control systems, and so forth. An NDS system may expose subsystems which are DS systems for, e.g., specialized applications.
The manual selection of "good" tests or "good" classes of tests from the space of all possible tests is difficult for many reasons. In particular,    1. As has been described, the space of possible tests is so immense that only a tiny fraction of tests can ever be selected. As is well-known by statisticians, selecting an appropriate sample under such conditions is quite difficult. It is also difficult to define what "statistically appropriate" means when applied to compliance verification. Consequently, much of the prior art mathematical analysis that has been created for other domains may not be applicable.    2. Given the large number of dimensions along which the space can vary, it is difficult for humans to conceptualize the entire extent of possible tests. Without such conceptualization, however, it is not possible to create an efficient and spanning test strategy.    3. In response, ad hoc and intuitive approaches have been used. These methods can be somewhat successful in achieving limited levels of compliance assessment, but in general they do not provide adequate coverage across the entire space of possibilities. The tests that are produced under such strategies tend to be concentrated in those areas that "seem to need" testing, according to preconceived notions. Other areas might remain entirely uncovered.    4. The conceptualization difficulty extends to those situations that require extended setup. The intricate nature and length of the sequence necessary to establish the conditions for a particular defect to manifest itself in an observable fashion can be beyond the ability of a user to visualize even though, because of the high speed of the components, such conditions may occur within the normal functioning of the system at frequent intervals.    5. The conceptualization difficulty further extends to those situations that require interaction complexity. Systems can achieve performance advantages by reusing internal resources and performing functions in parallel. Such techniques result in complex internal interactions, not readily apparent to the user, even when all details of the implementation are known. This internal interaction complexity can also be beyond the ability of the user to visualize, especially when taken in conjunction with the extended-setup difficulty previously described.
Once a problem has been detected, it is necessary to track back to the original root cause. This root cause may have occurred much earlier during the execution of a test than the point at which an anomaly was first observed, and the anomaly may be observed in a part of the system far removed from where the defect actually is located. One way to do this analysis is to re-run the same sequence that exposed the defect, but with additional checking enabled to observe aspects of the DUT that were previously ignored. A difficulty with this approach is that numerous re-runs may be required. Another difficulty is that the set-up required to get the DUT into the state in which the root cause may occur could be quite time-consuming to execute. These two factors can compound each other.
Another approach entirely is for the user to contrive a hypothesis as to the cause of the observed defect and then construct a "small" test program that exercises just those circumstances. The construction of such a test program can be quite complex because, among other reasons, it is not always easy to identify the least amount of set-up required to get the DUT into the state that detection of the root cause requires. It is of great value to have a testing method that supports the rapid development of a sequence or set of sequences that exhibit particular properties.
Verification of a system's compliance with its specification may be performed at various stages in the system's development, either by using a model of the system at some abstraction level or by using a fabricated example of the system. Performing compliance verification by using a model before actual system fabrication can be very advantageous because of the great savings in time, money, and resources that may be gained.
For purposes of explanation only, the following discussion will focus on compliance verification by using system models as opposed to actual system implementations.
Within the context of compliance verification using a system model, the verification environment may be more precisely defined as encompassing among other items a representation of the system model (also known as the target or DUT, device under test) and a mechanism for processing the system model (typically a simulator or a model interface, which in some cases may be built into the system model itself). Within this environment, the number of possible individual verification operations (appropriate or not) that may be performed on the DUT at any one time can be very large. The number of different sequences of verification operations that may be performed on the DUT increases exponentially as a function of the complexity of the system and the lengths of the sequences. Whenever we refer to reading from or writing to the DUT, we also mean reading from or writing to any part of the verification environment, including the mechanism for processing the system model as well as any other objects.
Out of the universe of all possible sequences, the user defines the subset for which the specification defines a behavior that will result when the sequence is applied to the DUT. We call such sequences "meaningful". The meaningful sequences can include both those that are anticipated during normal operation of the DUT and those that indicate errors. It is useful to include both types of sequences because the user may desire to ascertain not only that the DUT operates according to its specification when presented with normal inputs but also when presented with error inputs.
The definition of this subset is itself typically extremely difficult due to among other factors the non-deterministically specified behavior of the DUT that constrains what is and isn't meaningful and the need to ensure that only meaningful sequences are included.
This subset of sequences is known as the verification protocol.
Typically, testing the DUT merely by applying the verification protocol to it is not sufficient to achieve effective and efficient compliance verification. Usually additional compliance assessment computation is done during testing, typically to check that DUT behavior meets requirements. In general, compliance assessment can be described without loss of generality as a sequence of steps each of which occurs between the relevant steps of the verification protocol. Each compliance assessment step takes as its input the current state of the compliance assessment and the current observable state of the DUT, and computes a new state of the compliance assessment, or reports information to the user, or some combination of both. The combination of the verification protocol and compliance assessment will be referred to hereinafter as the compliance assessment protocol. The process of testing a DUT by applying a compliance assessment protocol to said DUT is called dynamic verification.
To meet specific compliance verification goals the user identifies which sequence(s) from the compliance assessment protocol will be made use of in any one dynamic verification run. Such goals may include the exercise of certain portion(s) of the DUT, the exercise of certain subset(s) of the system specification, completion of the dynamic verification suite within a time limit, the ability to execute the dynamic verification suite using a particular set of resources, and so forth. The user may decide to perform a given dynamic verification run repeatedly to investigate a problem. As some sequences may be infinite in length, the user may decide to make use of only a portion of a sequence. The user may also decide to make use of a sequence repeatedly.
Along with sequence selection, the user also determines when a sufficient amount of verification has been conducted to declare the DUT as in compliance with its specification, and the conditions under which the DUT will be declared as not in compliance with its specification.
A representation of the compliance assessment protocol and a mechanism for applying the compliance assessment protocol to the system model and interpreting the results are included as part of the verification environment mentioned above.
Aside from the great difficulties just described, the user often has the additional difficulties of having to create the compliance assessment protocol while the specification of the system is not in its complete, finished form. Changes to the specification may be made at any time during system verification, and such changes must be reflected by appropriate changes in the compliance assessment protocol.
Another significant issue arises from the fact that many "new" systems designs that need to be verified are not totally new, but are instead improved versions of existing system designs that have already been verified. Because creation of a compliance assessment protocol for a complex system is quite difficult, expensive, and time-consuming, it is important from both a cost perspective and time-to-market perspective that a compliance assessment protocol for a system be created in such a way that as much of it as possible can readily be reused on future or similar systems.
In the prior art, various methods have been used for expressing the compliance assessment protocol, identifying the sequence(s) or portion(s) of sequence(s) that are used in a particular dynamic verification run, maintaining and updating the specification of the compliance assessment protocol, and providing at least some measure of verification work reuse.
In general the prior art approaches may be divided into those that are purely programmatic in nature and those that use automata. The automata approaches in general include some measure of programmatic techniques to carry out imperative functions. Each of these kinds of approach is considered below.
The most common of the early programmatic approaches to verification is known as "directed testing". Typically a directed test program implements and tests a single sequence from the compliance assessment protocol. The user manually codes the test program in some imperative programming language(s) supported by the verification environment. This test program generates some stimulus to be applied to the DUT, observes the DUT's response or reaction, and then repeats the process.
The sequence from the compliance assessment protocol implemented by a particular directed test program is chosen through the user's manual selection of the particular pattern of stimulus to generate for application to the DUT. It is the user's responsibility to ensure that the DUT is in the proper state to accept the stimulus (if any), to observe the DUT's response or reaction (if any), and to check that said response or reaction is appropriate for the applied stimulus. All of these actions must be manually coded by the user.
The cost of creating a directed test for each of the large number of sequences that are needed to test a typical modern design is generally prohibitive. Fortunately there are a number of similarities within various subsets of the desired tests, so some program code can be shared between some of the directed tests. It is a natural progression from this observation to the creation of a parameterized or configurable test program that encompasses multiple directed tests. These configurable test programs can decide which of a range of tests to perform, how to vary the internal parameters that affect the tests, and so on. Such a test program accepts as part of its input from the user an indication of which aspects of its range of testing it is to carry out during any particular dynamic verification run, acceptable value sets for various parameters and the like, and so forth.
The combination of a set of directed tests into a configurable test program is entirely manual. The user must conceive of a set of possible tests, select the subset of these tests that will effectively make use of the available verification resources by minimizing redundancy, identify the dimensions along which the selected tests may be factored, perform the factoring, and blend the fragments into the configurable test program. This work requires a higher degree of skill than the creation of individual directed test programs, for the user must not only be able to comprehend what the individual directed test programs would be like if written (so the appropriate fragments for factoring can be identified) and conceive of how the fragments may be called in sequence so the DUT progresses through the appropriate series of states, but also be able to construct a suitable mechanism for doing so.
The configurable test program contains not only the union of all of the functionality of the individual directed test programs it replaces, but also extra code to implement the configurability itself. This extra code adds knowledge of a different sort than that contained in an individual directed test program. Instead of being directed towards the generation of stimulus, the acquisition of response or reaction information, or the checking thereof, the added material relates to the higher-order pattern of exercising the DUT. There has been a mixing of knowledge about what should be verified (i.e., which of the possible tests should be applied) with how (i.e., application of stimulus, checking of response). This mixing results in a significantly more complex test program and correspondingly increases the cost in time and effort to create the test program and to ensure that it is correct.
At the cost of a substantial increase in complexity and programming skill requirements, configurable test programs provided significantly more unique test sequences than could be created using individual directed tests. However, as design complexity increased, more powerful techniques were needed to expand the number of tests. The most popular recent technique is constrained pseudo-random testing (CPRT). In this approach, a number of pseudo-random choices are incorporated into a configurable test program which extend the range of possible sequences that the program can generate. In general some of these sequences are in the compliance assessment protocol and some are not. Therefore a CPRT program typically also contains a number of constraints on the pseudo-random choices which operationally restrict the choices so that the resulting sequences are all in the compliance assessment protocol.
The CPRT approach does expand the number of tests that a configurable test program can create, but at a substantial cost in terms of simulation efficiency. To completely cover a given set of sequences typically takes considerably more simulation cycles with a CPRT program. The amount of simulation time wasted increases rapidly as the size of the target sequence set grows, typically at the rate of (N*In(N)−N), where N is the size of the target sequence set. Even for a relatively small N of twenty three thousand, on average it takes ten times as long to cover a sequence set with CPRT. For the substantially larger sequence sets that are typically needed to test complex modern designs, the cost of this can be prohibitive.
In the prior art, an alternative to the use of a programmatic approach to system verification is the use of an automata-based approach.
Non-deterministic automata can be described in a variety of ways. For example, some prior art teachings describe non-deterministic automata in terms of states and transitions, some prior art teachings describe non-deterministic automata in terms of grammars or sets of strings of terminals, and some prior art teachings describe non-deterministic automata in terms of graphs, i.e., nodes and connections. All such prior art non-deterministic automata descriptions are mathematically equivalent, and can be transformed into each other using techniques well-known to those skilled in the art.
Prior art teachings show how to apply non-deterministic automata to the problem of system verification by using them to define sequences of test program fragments (also known as "action routines") that can be executed one after another during a dynamic verification run. For example, some prior art teachings use non-deterministic automata described in terms of a combination of states and transitions with references to test program fragments from the states, from the transitions, or from a combination of both. For example, some other prior art teachings use non-deterministic automata described in terms of a combination of grammars or sets of strings of terminals with references to test program fragments from the terminals, from the non-terminals (if any are defined in the grammars), or from a combination of both. For example, some other prior art teachings use non-deterministic automata described in terms of a combination of graphs (i.e., nodes and connections) with references to test program fragments from the nodes, from the connections, or from a combination of both. The prior art implements references to test program fragments in a variety of ways, such as pointers, lookup table entries, etc. All such prior art combination descriptions (including in said combination descriptions the references to test program fragments and the referred-to test program fragments themselves) are mathematically equivalent, and can be transformed into each other using techniques well-known to those skilled in the art. Some prior art teachings refer to the entities described by the combination descriptions as "extended non-deterministic automata", regarding the test program fragments as "automata extensions". Other prior art teachings simply refer to the entities described by the combination descriptions as "non-deterministic automata", regarding the test program fragments to be part of the automata. For the sake of clarity and brevity, we will take the latter approach and use the phrase "non-deterministic automata" to refer to the entities described by the combination descriptions. The singular form of "non-deterministic automata" is "non-deterministic automaton". For brevity, we will sometimes use the abbreviation "NDA" to refer to a non-deterministic automaton. Mathematically, the set of non-deterministic automata without test program fragments is a proper subset of the set of non-deterministic automata with some non-negative number of test program fragments, since the number can be zero.
Since non-deterministic automata can be described in a number of mathematically equivalent ways, for the sake of brevity we will select any one of the description methods whenever we make a point about them—the application of the point to non-deterministic automata described using any of the other methods should be readily appreciated by those skilled in the art. Also, prior art teaches that deterministic automata are a proper subset of the set of non-deterministic automata, and so are included whenever non-deterministic automata are discussed.
The automaton approach to testing was developed in the prior art by those verifying a DS system or a deterministic subset of an NDS system. Primarily, the domain area was single-threaded software applications. Typically in this prior art, the automaton is used to help track the states of the software application under test.
In many prior art automata applications, a graph representing the NDA's grammar (an "NDA graph") is constructed, often by means of a program that takes as input an extended-BNF-like description and creates an NDA graph automatically. The graph is traversed to generate a terminal sequence. This terminal sequence is used in effect to stitch together in sequential order the test program fragments corresponding to the terminals to compose a specific application of the compliance assessment protocol for a dynamic verification run.
In the prior art, traversing is done in a variety of ways. "Traverse" includes any method of processing an NDA in which a plurality of components of the NDA are processed in a sequence which is defined in the specification of the NDA.
By using the automaton method, the specification of an entire universe of test programs can be constructed using a relatively modest number of test program fragments that carry out particular fundamental operations. The generation of any individual test from the specified universe can be carried out by a generic test generation program that takes a non-deterministic automaton representing a compliance assessment protocol as its input and performs a traversal of the corresponding NDA graph according to some particular traversal strategy. The application of the generated test can be carried out by a generic test application program that executes the corresponding test programs fragments in the sequential order determined by the traversal. Typically changes to the specification of the universe of test programs do not require changing the test generation program or the test application program (which may in some cases be combined into a single program).
In general, the prior art automaton approaches have several advantages over the strictly programmatic approach. The advantages are analogous to those obtained in complier development by moving from the hand-crafted creation of a, for example, recursive-descent parser to one created from a grammar-based language specification by an automatic parser generator (for example, yacc or Bison).
One advantage of the prior art automaton approaches is that they separate the specification of the compliance assessment protocol (expressed by a non-deterministic automaton) from the selection of the particular sequence(s) used in a given dynamic verification run (expressed by how the non-deterministic automaton is processed or traversed). As a result, different persons can work on either portion of the problem, improving the development, communication, review, and management aspects of the process of test program creation. Further, the scope of the compliance assessment protocol can be easily seen without the clutter of the details contained in the test program fragments. Another significant advantage is that the automaton's grammar itself can be related directly to a system's specification without having to factor out the traversal code. This provides the foundation for a more meaningful measurement of the coverage achieved by a particular dynamic verification run.
In contrast, the programmatic approach defines the compliance assessment protocol operationally, that is, by the particular code that makes up the test program. In general, there is no distinction drawn in the test program between (a) the code that generates and applies the stimulus, acquires the response or reaction of the DUT, and checks the result for appropriateness, and (b) the code that makes the actual selection of which stimulus sequence to apply. By mixing the two, it becomes much more difficult if not impossible to independently process the two kinds of knowledge. It is especially difficult for the traversal strategy since in the programmatic approach that strategy is typically implicit in how the test program was coded. The user's intent is unavoidably obscured and the strategy cannot be easily understood or modified automatically to achieve a different objective than was intended when it was originally written, for example, additional coverage objectives. The coverage that can be measured is less useful because it focuses on lines or paths of the test program's code rather than the requirements given in the system's specification. Further, since the sequence selection is manual, all of the difficulties associated with the manual selection of "good" test cases (discussed above) are encountered.
Another advantage of automaton-based approaches is that they result in more concise specifications of the compliance assessment protocol for a given level of coverage of the specification. As a result, less time is typically required for their creation, and they are easier to change, maintain, update, extend and reuse. Because of these factors, they are also likely to have fewer bugs. The total amount (and complexity) of code that the user must manually create in the programmatic approach puts severe limits on the amount of coverage a user can achieve in a given amount of time.
The advantages of automaton-based approaches over programmatic approaches are a function of the degree to which the extent of the verification protocol is expressed in the automaton's grammar instead of in the test program fragments. For a given compliance assessment protocol, the more the extent of the verification protocol is expressed in the grammar, the more the advantages of the automaton-based approach can be realized. In contrast, the more the extent of the verification protocol is expressed in the test program fragments, the closer it comes to the programmatic approach with all of the disadvantages described above.
The prior art automaton approaches have primarily been applied to testing systems, such as single-threaded software programs, in which non-deterministically specified behaviors are either non-existent or highly localized. In such verification applications, most of the extent of the verification protocol can readily be expressed in the automaton's grammar without any need for the ability to dynamically constrain the series of terminal generation (equivalent to dynamically constraining the traversal of an NDA graph) during a dynamic verification run. However, when prior art approaches are applied to more complex systems, such as multi-threaded microprocessor based computer chips, in which non-deterministically specified behaviors are not highly localized, the user is forced to shift much of the expression of the verification protocol's extent from the automaton's grammar into the test program fragments. As a result, the test program fragments become substantially larger and more complex, and much of the advantage of using an automaton-based approach instead of a programmatic approach is lost.
We can see, therefore, that prior art automaton approaches have several advantages over programmatic approaches, but also rather severe limitations on the degree to which the extent of the verification protocol can be represented in the automaton's grammar. These limitations have prevented the automaton approach to verification from being used in the compliance verification of many complex systems.
A problem with the programmatic approach is that a substantial amount of time and expense is required for test conceptualization, development, update, and maintenance. These costs are often significantly greater than those incurred for the creation of the design of the system itself. Test conceptualization is especially difficult using the programmatic approach because of the test selection problem described previously. The test programs developed using this approach are large pieces of software. All of the well-known difficulties of development, update, and maintenance of large, complex software applications must therefore be surmounted.
A problem with the programmatic approach is that the reduction of observed anomalies to root causes or defects is very costly in time and resources. To decrease the amount of time required to recreate the situation that exhibits an anomaly, the user typically attempts to minimize the set-up sequence. However, determining how to do this appropriately and, especially, correctly editing the test program to achieve it under the programmatic approach is very costly because of the aforementioned difficulties of working with large pieces of complex software.
A problem with the programmatic approach is that test creation early in the product development process is very costly in time and resources. Since a large test program is typically required for verification, it is advantageous to begin its construction as soon as possible. However, early in the product development process it is quite normal for the system specification to change frequently. Correctly identifying and revising the test program code affected by these changes is very costly because of the aforementioned difficulties of working with large pieces of software.
A problem with the programmatic approach is that it requires relatively high levels of software development skill from the developers of tests because of the aforementioned difficulties of working with large pieces of complex software.
A problem with the programmatic approach is that substantial numbers of defects are typically found in the test program while it is being used to verify the target system. It has been observed in the prior art that the number of defects found in the test software is typically at least as large as the number found in the target system itself. Investigating and fixing these defects consume large amounts of time and resources. This is a natural consequence of the fact that the programmatic method requires the creation of substantial amounts of complex software to implement the tests. As is well-known to those skilled in the art, the incidence of defects in complex software is strongly correlated to the number of lines of code written.
A first level of measure of the value of a new test sequence when added to a set of existing test sequences is whether or not it is the same as any of the sequences already in the set, i.e., does it exercise anything different. A test sequence that is not different in at least some aspect is typically not worth adding to the set. A next level of measure of value is how different the new test sequence is, i.e., how many different aspects of the system's specification are covered. From this concept, we can then consider the breadth of coverage of a given set of test sequences as its span. Given that it is not possible typically to exercise every possible aspect of a system's behavior, it is valuable to spread the verification effort across as much of the system specification space as possible by creating a set of unique test sequences with as large a span as possible. However, because of the test selection problem described previously, this is very difficult when using the programmatic approach.
As with any other large software project, the creators of programmatic approach tests have certain goals when writing test programs: getting the programs done, avoiding defects, making the execution fast, and so forth. These goals are not the same as those when the users have to communicate with the various verification process stakeholders (customers, designers, colleagues, management, etc.). At those times, it's more important for the users to communicate an understanding of the complex body of work represented by the tests. In these cases, hierarchy, abstraction, progressive disclosure of detail, and so forth, are required. These two sets of goals are typically not compatible for large, complex software projects. In the programmatic method, the same difficulties are encountered.
A serious problem with prior art automaton-based methods is their inability to dynamically change the traversal of the automaton or the automaton itself to handle various non-deterministically specified behaviors as they are exhibited by the DUT during verification. For many complex systems, this problem severely limits the degree to which the extent of the verification protocol can be represented in the automaton's grammar. This has prevented prior art automaton approaches to verification from being used in the compliance verification of many complex systems.

Resource management during system verification


Methods and systems for governing an aircraft propeller of an engine are described. The method comprises obtaining a fluid flow command for speed control of the propeller, determining pulse parameters of a pulse width modulated valve control signal for actuating a two-position solenoid valve in accordance with the fluid flow command based on an average fluid flow through the solenoid valve and an opening and closing time of the solenoid valve, generating the valve control signal with the pulse parameters as determined, and transmitting the valve control signal to the solenoid valve for actuating the solenoid valve, thereby controlling the speed of the propeller.

Constant speed propellers are controlled by varying blade angles to maintain the speed of the propeller at a reference speed. In order to do so, the blade angle is increased with increasing aircraft power and speed and decreased with decreasing aircraft power and speed. Varying the blade angle is achieved by either adding or removing oil in the propeller dome.
The primary means of adding or removing oil to the propeller is through a proportional valve that controls precisely the oil flow to maintain constant speed of the propeller. A backup mode of controlling oil flow to the propeller, sometimes used when the primary mode fails, is to use the feather solenoid valve. However, the feather solenoid valve is a two position valve, which does not allow precise control of oil flow therethrough. In addition, propeller speed cannot be maintained in a stable manner so as to allow the aircraft to pursue its flight.
Therefore, improvements are needed.

System and method for aircraft propeller governing


Hydrocarbon feeds are upgraded by contact of the stream under hydrodesulfurization (HDS) conditions with a catalyst system comprising a sulfided, transition metal promoted tungsten/molybdenum HDS catalyst, e.g., Ni/Co--Mo/Al.sub.2 O.sub.3 and a solid acid catalyst which is effective for the isomerization/disproportionation/transalkylation of alkyl substituted, condensed ring heterocyclic sulfur compounds present in the feedstream, e.g. zeolite or a heteropolyacid compound. Isomerization, disproportionation and transalkylation reactions convert refractory sulfur compounds such as 4- or 4,6-alkyl dibenzothiophenes into corresponding isomers or disproportionated isomers which can be more readily desulfurized by conventional HDS catalysts to H.sub.2 S and other products.

Hydrodesulfurization is one of the key catalytic processes of the refining and chemical industries. The removal of feed sulfur by conversion to hydrogen sulfide is typically achieved by reaction with hydrogen over non-noble metal sulfides, especially those of Co/Mo and Ni/Mo, at fairly severe temperatures and pressures to-meet product quality specifications or to supply a desulfurized stream to a subsequent sulfur sensitive process. The latter is a particularly important objective because many processes are carried out over catalysts which are extremely sensitive to poisoning by sulfur. This sulfur sensitivity is sometimes sufficiently acute as to require a substantially sulfur free feed. In other cases environmental considerations and mandates drive product quality specifications to very low sulfur levels.
There is a well established hierarchy in the ease of sulfur removal from the various organosulfur compounds common to refinery and chemical streams. Simple aliphatic, naphthenic, and aromatic mercaptans, sulfides, di- and polysulfides and the like surrender their sulfur more readily than the class of heterocyclic sulfur compounds comprised of thiophene and its higher homologs and analogs. Within the generic thiophenic class, desulfurization reactivity generally decreases with increasing molecular structure and complexity. While simple thiophenes represent the relatively liable sulfur types, the other extreme, which is sometimes referred to as "hard sulfur" or "refractory sulfur", is represented by the derivatives of dibenzothiophene, especially those mono- and di-substituted and condensed ring dibenzothiophenes bearing substituents on the carbons beta to the sulfur atom. These highly refractory sulfur heterocycles resist desulfurization as a consequence of steric inhibition precluding the requisite catalyst-substrate interaction. For this reason, these materials survive traditional desulfurization and they poison subsequent processes whose operability is dependent upon a sulfur sensitive catalyst. Destruction of these "hard sulfur" types can be accomplished under relatively severe process conditions, but this may prove to be economically undesirable owing to the onset of harmful side reactions leading to feed and/or product degradation. Also, the level of investment and operating costs required to drive the severe process conditions may be too great for the required sulfur specification.
A recent review (M. J. Girgis and B. C. Gates, Ind. Eng. Chem., 1991, 30, 2021) addresses the fate of various thiophenic organosulfur types at reaction conditions employed industrially, e.g., 340-425.degree. C. (644-799.degree. F.), 825-2550 psig. For dibenzothiophenes, the substitution of a methyl group at the 4-position or at the 4- and 6-positions decreases the desulfurization activity by more than an order of magnitude. These authors state, "These methylsubstituted dibenzothiophenes are now recognized as the organosulfur compounds that are most slowly converted in the HDS of heavy fossil fuels. One of the challenges for future technology is to find catalysts and processes to desulfurize them."
M. Houalla et al, J. Catal., 61, 523 (1980) disclose activity debits of several orders of magnitude for similarly substituted dibenzothiophenes under similar hydrodesulfurization conditions. While the literature addresses methyl substituted dibenzothiophenes, it is apparent that substitution with alkyl substituents larger than methyl, e.g., 4,6-diethyldibenzothiophene, would intensify the refractory nature of these sulfur compounds. Condensed ring aromatic substituents incorporating the 3,4 and/or 6,7 carbons would exert a similar negative influence. Similar results are described by Lamure-Meille et al, Applied Catalysis A: General, 131, 143, (1995) based on similar substrates.
Mochida et al, Catalysis Today, 29, 185 (1996) address the deep desulfurization of diesel fuels from the perspective of process and catalyst designs aimed at the conversion of the refractory sulfur types, which "are hardly desulfurized in the conventional HDS process." These authors optimize their process to a product sulfur level of 0.016 wt. %, which reflects the inability of an idealized system to drive the conversion of the most resistant sulfur molecules to extinction. Vasudevan et al, Catalysis Review, 38, 161 (1996) in a discussion of deep HDS catalysis report that while Pt and Ir catalysts were initially highly active on refractory sulfur species, both catalysts deactivated with time on oil.
In light of the above, there remains a need for a desulfurization process that will convert feed containing the refractory, condensed ring sulfur heterocycles at relatively mild process conditions to products substantially free of sulfur.

Desulfurization process for removal of refractory organosulfur heterocycles from petroleum streams


The present invention discloses a semiconductor device, the device comprising a semiconductor layer on a substrate. A gate oxide and a gate electrode are formed on the semiconductor substrate. A gate conductive layer is formed on the gate electrode. A first doped region is formed in the semiconductor layer. A dielectric spacer is optionally formed onto the sidewall of the gate electrode and part of the semiconductor layer. A second doped region is formed from a predetermined distance to the gate electrode, wherein the predetermined distance is no less than the distance between the first doped region and the gate electrode. A third doped region is formed adjacent to the first doped region in the semiconductor layer and between the first doped region and the second doped region.

1. Field of the Invention
The present invention relates to a semiconductor device, and more specifically, to a device structure.
2. Description of the Related Art
The semiconductor industry has been advanced to the field of Ultra Large Scale Integrated Circuit (ULSI) technologies. The fabrication of the nonvolatile memories also follows the trend of the reduction in the size of a device. The nonvolatile memories include various types of devices. Different types of devices have been developed for specific applications' requirements in each of these segments. The formation of nonvolatile memories toward the trends of low supply power and fast access, because these requirements are necessary for the application of the mobile computing system.
One of the semiconductor devices is called anti-fuse as shown in FIG. 1. The MOS transistor consists of a silicon substrate 100, a gate dielectric 104, a doped polysilicon gate 105, lightly doped regions 103, and source/drain regions 101 formed by diffusion of N-type dopants in the silicon substrate. Silicide 107 is introduced on the exposed surface of the top portion of the gate 105 and the source and drain regions 101. The gate dielectric 104 separating the polysilicon gate 105 from the channel region usually consists of the thermally grown silicon dioxide. When the gate dielectric is stressed beyond a critical electrical field, the transistor is destroyed by rupturing of the gate dielectric. Rupturing dielectric requires sufficient pulse width duration and amplitude to provide enough damaging power through the gate oxide, which therefore produces a reliable, low resistance anti-fuse.
The anti-fuse layer is initially intact, but it can be ruptured or broken by applying a sufficient voltage across the memory cell. The voltage is chosen such that the anti-fuse layer ruptures, and a high conductivity state of the memory cell is established.
In reading operation, a ground voltage is applied to the transistor's body or well via metal interconnect, and a read voltage is applied to the gate. In this situation, the gate oxide between well and gate is stressed in a low electric field, thereby allowing no current to flow between the well and the gate. Since no reading current is detected, the digital state is defined as "0". To program anti-fuse, the gate voltage is increased until avalanche breakdown occurs at the gate oxide. When avalanche breakdown occurs, a breakdown current will flow through the oxide. This current flow causes permanent damages in the oxide structure along the path of the breakdown current. When the gate is applied with a read voltage, there is a significant leakage current to flow between the well and the gate. As a result, the digital state is defined as "1" by this reading current.
FIG. 2 illustrates other alternative programming mechanisms including "Localized gate oxide breakdown", "Drain junction breakdown" and "Source/Drain punch through" used for Anti-Fuse applications. However, all these three mechanisms are required a high drain voltage, Vd, for programming while the Vg, Vs and body are grounded. As Vd is increased and applied to the drain, one of the three programming mechanisms will take place first. The first mechanism is determined by the operating and device parameters, such as applied signal timing, signal amplitude, gate oxide thickness, channel length, doping concentration, fringing capacitance and so forth. By leaving Vg as floating, the localized gate oxide breakdown can be avoided for the high Vd potential. However, the high Vd induces a moderate potential in Vg which therefore has the risk to turns on the channel.
FIG. 3 illustrates the overlapped and fringing capacitors, i.e. COV and CFR, near the drain side. The total coupling capacitance includes COV and CFR. The Vg can be induced to a moderate voltage between ground and Vd depending on its gate coupling efficiency. Once Vg approaches the transistor's threshold voltage, the channel has been lightly turned on and allows high current during its programming stage. Therefore, the anti-fuse devices in the prior art have found high power consumption and gate oxide degradation problems due to their high coupling capacitance. An anti-fuse device having low coupling capacitance is needed to prevent localized gate oxide breakdown and channel turned-on for low power and high density applications.
Those devices are manufactured by various processes and the device operating scheme is different from each other. The present invention provides a basic device structure for those devices including, but not limited to, non-volatile, anti-fuse, mask-ROM.

Semiconductor device structure for anti-fuse

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