To provide a lateral MISFET that has a uniform and reliable gate insulation film, and exhibits low on-resistance and excellent balance between the breakdown voltage and on-resistance. The device of the invention has an n-type semiconductor substrate, in a part of the surface layer thereof is formed a trench. An n-drain region is formed in the bottom of the trench. A side wall oxide film is formed on the side face of the trench. The trench is filled with a conductive material, on which is formed a drain electrode. A p-base region and an n-source region are self-aligned on the portion of the substrate in which the trench is not formed. A MIS gate is disposed on the p-base region. Since the portion of the substrate along the side wall oxide film functions as a drain drift region, the unit cell dimension are greatly reduced, the on-resistance is reduced, and therefore the trade-off relation between the breakdown voltage and the on-resistance is improved.

The present invention relates to lateral MISFETs (metal-insulator-semiconductor field effect transistors) having a trench structure, and a method of manufacturing the lateral MISFETs. The lateral MISFET, that exhibits a high breakdown voltage and a low on-resistance, is used as an individual device or integrated into a power IC incorporated into an electronic instrument, an IC for driving a motor, an IC for driving a liquid crystal display, etc.
A power MOSFET (metal-oxide-semiconductor field effect transistor), one of the MISFETs, is outstanding by virtue of its low loss and high switching speed among the power semiconductor devices. However, the power MOSFET has a problem in reducing its on-resistance. Since the power MOSFET is a single-carrier (electron or hole) device, the conductivity thereof is not modulated by minority carrier injection. On the other hand, techniques for forming trenches in a semiconductor surface are adopted in various ways inclusive of aiming at on-resistance reduction in the semiconductor devices. And, various semiconductor devices which have a trench structure therein have been proposed recently.
FIG. 13 is a cross section of a part of a vertical trench MOSFET. FIG. 13 shows a unit cell of the MOSFET that includes a half of a trench. Many actual MOSFETs adopt a structure that connects in parallel many such unit cells arranged alternately in a mirror symmetry. The actual MOSFET requires a peripheral portion that sustains the breakdown voltage thereof in addition to the current carrying portion shown in FIG. 13. Since the general structures may be adopted to the peripheral portion, explanation of the peripheral portion will be omitted. In FIG. 13, a trench 1302 is formed from a first major surface of a semiconductor substrate 1301. A p-base region 1308 is formed beside the trench 1302. An n-source region 1309 is formed in a part of the surface layer of the base region 1308. An n-drain layer 1303 is formed on a second major surface of the semiconductor substrate 1301. The side face of the trench 1302 is covered with a thin gate oxide film 1306. A gate electrode 1307 is buried in the trench 1302. A source electrode 1312 that contacts commonly with the n-source region 1309 and the p-base region 1308 is disposed on the first major surface, from that the trench 1302 is formed, of the semiconductor substrate 1301. A drain electrode 1313 is disposed on the back surface of the n-drain layer 1303. As shown in the figure, the source electrode 1312 may be extended over the gate electrode 1307 with an inter-layer insulation film 1311 inserted inbetween. When a positive voltage is applied to the gate electrode 1307 of the device of FIG. 13, a channel inverted to n-type is created in the surface layer of the p-base region 1308 beneath the gate electrode 1307, and the n-source region 1309 and the n-drain region 1303 are electrically connected with one another.
The vertical trench MOSFET of FIG. 13 facilitates reducing the cell pitch, i.e. the dimensions of the unit cell, since the MOS gate structure thereof is disposed in the trench. Therefore, the vertical trench MOSFET of the figure facilitates reducing the on-resistance thereof by arranging more unit cells in a unit area. However, since the drain electrode 1313 is disposed on the back surface of the semiconductor substrate 1301, the MOSFET of FIG. 13 has drawbacks in integration with the control and protection circuits into a monolithic structure, in integration of a plurality of the MOSFETs into a single chip, and in adoption of a multi-drain structure.
In contrast to the vertical MOSFETs, lateral MOSFETs in which the source and drain electrodes are disposed on the same side of the semiconductor substrate facilitate integration with the control and protection circuits into a monolithic structure, integration of a plurality of the MOSFETs into a single chip, and adoption of a multi-drain structure. As far as the present inventors know, two lateral MOSFETs which have a trench structure have been reported so far. The first example is a top-drain-trench type RESURF DMOS transistor construction disclosed in the Japanese Unexamined Laid Open Patent Application (Koukai) No. H06-97450. The top-drain-trench type RESURF DMOS has a trench, on the first side thereof is formed a p-base region. An n-source region is formed in a part of the surface layer of the p-base region. The first side of the trench on which the n-source region is formed is covered with a thin gate oxide film. A gate electrode is buried in the trench. An n-drain drift region is formed on the second side of the trench opposed to the first side. The second side of the trench is covered with a thick oxide film. On the semiconductor layer located on the side opposed across the trench to the side on which the n-source region is formed, an n-drain region is formed in contact with the n-drain drift region. Thus, the top-drain-trench type RESURF DMOS increases integrated unit cells to reduce the on-resistance thereof by forming the MOS gate on the side face of the trench.
The second example of the lateral trench MOSFET is a TDD (trench-drain-double diffusion) MOSFET structure (cf. Sakai et al., Technical Report, EDD-92-92, Japanese Institute of Electrical Engineers). FIG. 14 is a cross section of the TDD MOSFET. Referring now to FIG. 14, an epitaxial substrate has an n+ substrate 1419 on which is laminated an n-type semiconductor layer 1401. A p-base region 1408 and an n-source region 1409 are self-aligned by double diffusion in the surface layer of the epitaxial substrate. A p-contact region 1410, with a higher impurity dose than the p-base region 1408, is formed in the surface layer portion of the p-base region 1408 in which the n-source region 1409 is not formed. A poly-crystalline silicon gate electrode 1407 is disposed above the portion of the p-base region 1408, with a gate oxide film 1406 inserted inbetween, extending between the n-type semiconductor layer 1401 and the n-source region 1409. A source electrode 1412 is disposed in common contact with the n-source region 1409 and the p-contact region 1410. A trench 1402 is dug in a drain region. After forming an n-drain region 1403 by diffusion from the inside wall of the trench 1402, a drain electrode 1413 is disposed on the bottom and side faces of the trench 1402. The side and upper parts of the gate electrode 1407 is covered with an inter-layer insulation film 1411 to insulate the gate electrode 1407 from the source electrode 1412. By applying a positive bias voltage to the gate electrode 1407, a channel is created in the surface layer of the p-base region 1408, and the n-drain region 1403 and the n-source region 1409 are electrically connected with one another. The TDD MOSFET of FIG. 14 increases the contact area and reduces the contact resistance of the drain electrode 1413 by forming the trench 1402 in the drain region. By these means, the TDD MOSFET has reduced the on-resistance thereof by 5%.
In the first device structure of the conventional lateral trench MOSFETs, it is hard to secure the uniformity and reliability of the gate oxide film because of the etching damage at trench formation and the stress exerted to the corner of the trench at oxidizing to form the gate oxide film. Moreover, since two kinds of gate oxide films should be formed on the right and left halves of the trench respectively, the process for manufacture is inevitably complicated. The second example of the conventional lateral trench MOSFETs avoids the problems pointed out above, since the gate of the MOS structure is formed in a portion in which the trench is not formed. However, since the breakdown voltage of the device is determined by the distance LD of FIG. 14 between the gate and drain, the adoption of the trench structure is not expected to contribute to integrated unit cell increase.

Lateral trench MISFET and method of manufacturing the same


Embodiments of a modular motor assembly are disclosed. In some embodiments, a motor comprises a plurality of modular magnetic units, where each of the modular magnetic units includes at least one rotor and at least one stator. The motor further comprises a plurality of structural segments each adapted to support a stator of a corresponding one of the modular magnetic units, where each of the structural segments interlocks with a next structural segment to form a stack. A method of manufacturing a motor includes arranging a selected number of modular magnetic units, coupling the selected number of modular magnetic units to a shaft, coupling the selected number of modular magnetic units to respective structural segments, and forming electrical connections to apply three-phase voltage to stator windings of the modular magnetic units.

Electric motors operate by converting electrical energy to mechanical energy. Depending on the application for the electric motor (e.g., lawn mower, land vehicle, aircraft, etc.), the number of magnetic units making up the electric motor can be varied to provide the desired amount of mechanical power. Motors are typically custom-made for specific uses. Parts may need to be replaced during the lifetime of the motor. The manufacture and maintenance of a motor can be costly because of the custom-made nature of the motor, diversity of parts used, and the qualification of parts. Manufacturing and maintenance costs may escalate if the motor is especially complex and has many unique parts.


The invention provides a PCB type dual band patch antenna and a wireless communication module incorporating the antenna. The antenna includes a substrate. A ground pattern is formed on the substrate. A radiating patch is formed on the substrate to be spaced apart from the ground pattern at a predetermined distance. The radiating patch includes an input arm and a main radiator which are divided by a slot with ‘L’ and inverse ‘L’ shapes combined. The main radiator has an open terminal opposing the input arm across the slot. Also, a feeding part is connected to the input arm of the radiating patch to apply an electrical signal to the radiating patch. Further, wireless devices are integrally mounted on the PCB substrate used for the antenna, thereby achieving a high efficiency and wide-bandwidth dual band patch antenna and a minimal-sized and low-cost wireless communication module.

With development of a wireless mobile communication technology, electronic products are embedded with a wireless mobile communication system and a wireless sensor system. An antenna is a chief communication component for determining capability of the wireless communication products. Meanwhile, an IEEE 802.15.4/4a wireless communication system has found a growing application in detection and control systems such as home automations and office automatic sensors. For now, the IEEE 802.15.4 wireless communication system has been commercialized at a bandwidth of 2400 MHz. However, the IEEE 802.15.4 system for 2400 MHz bandwidth may experience interference with the existing wireless LAN frequency. Therefore, the IEEE 802.15.4 system for 900 MHz bandwidth is being developed at home. This crucially necessitates a dual band antenna for covering both bandwidths of 900/2400 MHz for the IEEE 802.15.4 system and the IEEE 802.15.4a system which is to be standardized later.
Conventionally, the IEEE 802.15.4 wireless communication system mainly employs a monopol or helical antenna, and a ceramic chip antenna in the applications thereof to reduce size. However, the external antenna is easily altered in its characteristics by external environment, while the internal ceramic chip antenna degrades capability of the wireless communication system due to decline in gain thereof. Moreover, a separate antenna is required for each of the IEEE 802.15.4/4a wireless communication modules, thereby creating additional costs.

PCB type dual band patch antenna and wireless communication module incorporating the same PCB type dual band patch antennna

Electronics and Telecommunications Research Institute


A rechargeable battery module includes a plurality of unit cells including rechargeable batteries and adjacently disposed, at least one bus bar connecting electrode terminals of adjacent unit cells of the plurality of unit cells, and a cover configured to cover the plurality of unit cells, the cover including a coupling part coupled with the at least one bus bar, and a signal detector electrically connected to the bus bar.

1. Field
Example embodiments relate to a rechargeable battery module with improved reliability of a connection of a bus bar and a detection of a signal, and a simplified module assembling process.
2. Description of the Related Art
A rechargeable battery is a battery repeatedly performing charging and discharging, as opposed to a primary battery. A rechargeable battery with small capacity may be used in portable small electronic devices, e.g., a mobile phone, a notebook computer, and a camcorder, and a rechargeable battery with large capacity may be used as a motor driving power source, e.g., for a hybrid vehicle and an electric vehicle.
The rechargeable battery may be used as a single cell, e.g., a rechargeable battery in a small electronic device, or may be used in a module state having a plurality of electrically connected cells, e.g., a rechargeable battery for driving a motor. The rechargeable battery module is configured so that electrode terminals of cells, i.e., unit cells, are connected to bus bars, and a signal terminal is included in each bus bar to detect a signal for information on the unit cell. Each signal terminal is connected to a controller through a wire harness. For example, the bus bars may be connected to the electrode terminals of adjacent unit cells by welding, and a signal terminal may be connected to each bus bar.


A system for determining a software package for deployment based on a user request receives a request from the user to access software packages to perform a particular task. The system determines particular software packages for the user, based on an experience level of the user in performing the particular task. The system determines whether a security vulnerability is associated with the determined software packages by scanning the source code of the determined software package and searching for instances where a code portion includes open ports vulnerable to unauthorized access. If it is determined that no security vulnerability is associated with the determined software packages, the system deploys the determined software packages to a computing device from which the user sent the request.

It is challenging to verify software packages in a deployment process using current software package deployment monitoring and verifying technologies. Some of the software packages selected to be deployed may contain security vulnerabilities that make the software packages and receiving computer systems vulnerable to security threats. Furthermore, a software package selected to be deployed may not be compatible with other software packages resident on the receiving computer systems. Furthermore, deployed software packages may not be compliant with user requirements to perform a task. Current technologies of verifying software package deployment are based on manual confirmations in a quality checking process. The auditing of software deployments using existing technologies is reactive and costly in terms of time, processing, and memory resources. Current software package deployment and information security technologies are not configured to verify whether software packages comply with user requirements, or contain security vulnerabilities.

This patent is subject to a terminal disclaimer.

Information security system for identifying potential security threats in software package deployment


A compact disc storage structure or rack is provided for storing and displaying a plurality of compact discs cases. The structure resembles a skyscraper type building and includes a base and an upright elongated housing secured to the base. The housing has sidewalls defining an interior chamber therewithin. One of the sidewalls has a vertical and generally rectangular shaped slot formed therein. The slot is sized for receiving a plurality of compact disc cases and has opposite upright slot sidewalls. The slot sidewalls have a plurality of support structures with each support structure adapted for holding and supporting a compact disc case. The elongated housing has a plurality of apertures extending therethrough. A light source is mounted within the interior chamber for illuminating the interior chamber and transmitting light through the apertures.

1. Field of the Invention
The present invention relates generally to display or storage racks. More particularly, the invention pertains to a compact disc storage rack adapted for storing and displaying compact discs.
2. Description of the Prior Art
Compact discs have become a popular medium for storing both music and computer software. The discs themselves are relatively thin and are sold within a plastic protective case to prevent damage. Numerous compact discs can be quickly acquired by both music enthusiasts and computer users which can lead to clutter and disorganization.
Various prior art compact disc storage racks are known in the art to provide a solution to this problem. U.S. Pat. No. 5,195,642 issues to Dardashti and U.S. Pat. No. Design 364,512 issued to Stravitz disclose compact disc storage towers having upright sides and slots for receiving individual compact disc cases. The upright tower configuration allows these racks to hold a large number of compact discs without requiring a large amount of floor space. However, while as functional as these storage towers are, they are not always particularly attractive. Compact disc racks or towers are commonly placed in rooms or offices that are also used to entertain guests or to meet with visitors or clients. Accordingly, it would be desirous to have a compact disc storage rack that is both functional in use and decorative.
As will be described in greater detail hereinafter, the compact disc storage rack of the present invention differs from those previously proposed and employs a number of novel features that render it highly advantageous over the prior art.


Three non-complex imaging arrangements are provided where in two of the imaging arrangements a moveable carrier housing at least one objective lens is provided and, in the other imaging arrangement, at least one stationary objective lens and additional optical elements are provided. Each embodiment includes at least one fixed image sensor array for imaging thereon an optical code or target, such as a one-dimensional barcode symbol, or label, marking, picture, etc. Each imaging arrangement provides an extended working range of approximately 5–102 cm. The imaging arrangements are capable of being incorporated within a barcode imager to provide a non-complex barcode imager having an extended working range which is comparable to or greater than the working ranges of conventional image-based barcode imagers.

1. Field of the Invention
The present invention relates to the field of imaging, and specifically to an imaging arrangement and barcode imager for imaging an optical code or target at a plurality of focal planes.
2. Description of the Related Art
CCD or CMOS-based imaging devices, such as conventional barcode imagers, generally have limited working ranges on the order of 5–61 cm (˜2–24 inches). In many cases, these imaging devices are designed to be handheld or at least moveable within a given area, thus compensating, somewhat, for the limited working range. However, the operator is still required to position the imaging device within the proper range to produce an adequately sharp, i.e. substantially focused image; this may require a trial and error approach on the part of the operator in order to obtain the proper distance from the target to be imaged.
In applications where the imaging device is kept stationary, such as in an assembly line where the imaging device is generally fixed for imaging barcode symbols on objects being moved along the assembly line, the conventional working range (i.e., 5–61 cm) is generally acceptable. In many applications where an increased working range is necessary, expensive and complex imaging arrangements having state-of-the-art automatic focus systems, such as zoom capabilities, are generally incorporated within or used in conjunction with barcode imagers to increase their working range. However, such imaging arrangements, besides being expensive, generally require constant maintenance. Therefore, when an application calls for imaging and decoding one-dimensional barcode symbols, these imaging arrangements do not compete well in the marketplace against laser-based barcode readers which have comparable or even greater working ranges, and generally are less expensive.

Imaging arrangement and barcode imager for imaging an optical code or target at a plurality of focal planes


Embodiments of the present invention are deck accessory brackets, which are mounted to a vertical structure and are suitable for supporting a plurality of clothes lines and a variety of objects such as rods, shelving, hanging plants and hanging bird feeders. The mountable backing plate has 2 arms joined to it, one at an outward horizontally position, and one with a vertically angled supporting arm. The top horizontal arm has positioned receptors to which clothes line and/or rods are arrayed. The face of the mountable backing plate and the top of the horizontal arm are joined to a gusset.

1. Field of the Invention
Embodiments relate to brackets used to support objects.
2. Description of Related Art Including Information Disclosed Under 37 CFR 1.97 and 1.98.
The present invention a deck accessory bracket. Once the bracket(s) are mounted to a vertical structure they can be used to support a plurality of clothes lines and a variety of objects such as rods, shelving, hanging plants and hanging bird feeders. The invention relates to a new and improved clothes line because the line is located on a lower plane so that clothes are easily hung without raising your arms above your head and the lines are easily accessed for cleaning. The invention saves the user from having to walk their laundry across their yard to hang them, it takes away from the unsightliness of the clothes line that is placed within the yard and it frees up yard space. It would be an improvement on the umbrella clothes line hangers because there will be no need to dig and mix concrete to set the base pole into. There would be more privacy as to what is hung on the clothes line since it would back onto the user's deck. The deck accessory brackets are an improvement on some of the hanging plant and birdfeeders that are placed in the middle of the yard because the bracket is mounted to the deck it will not be susceptible to blowing over in extreme weather conditions. It is an improvement on some of the banister plant holders because the present invention can support odd shaped pots of plants that are of different weights and sizes on the shelving or rack that is created once the rods are placed.
The present invention is designed to provide additional improvements on the current inventions as more fully described below.
U.S. Pat. No. 5,280,841 issued to Van Deursen, contained a portable support assembly for the drying of clothes. The device has a set of arms that extend up and outwardly away from a central pole that is placed on top of the ground with a supporting structure.
U.S. Pat. No. 6,971,204 issued to Gibney, contained a flowerpot baluster bracket, the bracket is used to support a potted plant on a vertical baluster.
U.S. Pat. No. 3,857,493 issued to Bourne, contained a collapsible garmet dryer consisting of a post member with a plurality of arms pivotally attached. The post is stabilized by anchoring it into the ground.
U.S. Pat. No. 6,971,204 issued Dec. 6, 2005 to Gibney is titled Flower Pot Baluster Bracket.
U.S. Pat. No. D549,506 issued Aug. 28, 2007 to Stacy is titled Clothing Rack.
U.S. Pat. No. 5,865,410 issued Feb. 2, 1999 to Horen is titled Universal Staging Bracket.
U.S. Pat. No. 5,816,417 issued Oct. 6, 1998 to Reaves is titled Mini Clothes Line.
U.S. Pat. No. 6,003,826 issued Dec. 21, 1999 to Galloway is titled Supporting System For Patio Deck Accessories.
U.S. Pat. No. 5,118,059 issued Jun. 2, 1992 to Mainer is titled Support Brackets.
U.S. Pat. No. 5,390,443 issued Feb. 21, 1995 to Emalfarb is titled Railing Hanger.
U.S. Pat. No. 4,666,115 issued May 19, 1987 to Schiro is titled Plant Hanger.
U.S. Pat. No. D568,727S issued May 13, 2008 to Walker is titled Adjustable Plant Box Railing Bracket.
U.S. Pat. No. D461,429S issued Aug. 13, 2002 to Holland is titled Hanging Plant Brace.
U.S. Pat. No. 5,395,081 issued Mar. 7, 1995 to Vollink is titled Square Post Mounted Hanger.
U.S. Pat. No. 285,510 issued Sep. 25, 1883 to Perry is titled Nail Driver's Harness and Lath Holder.
U.S. Pat. No. 1,147,019 issued Jul. 20, 1915 to Henry is titled Article Holder.
U.S. Pat. No. 2,506,119 issued May 2, 1950 to Tregear is titled Bracket.
U.S. Pat. No. 7,150,364 issued Dec. 19, 2006 to Jablow et al is titled Shelving.
U.S. Pat. No. D522,848S issued Jun. 13, 2006 to Nawroki is titled Shelving Component.
U.S. Pat. No. D510,223S issued Oct. 4, 2005 to Jablow et al is titled Shelving.
U.S. Pat. No. D507,479S issued Jul. 19, 2005 to Jablow et al is titled Shelving Component.
U.S. Pat. No. 6,672,226 issued Jan. 6, 2004 to Bohnacker is titled Bracket System for Shelving.
U.S. Pat. No. 6,402,108 issued Jun. 11, 2002 to Remmers is titled Shelving Bracket.
U.S. Pat. No. 6,126,127 issued Oct. 3, 2000 to Riblet is titled Bracket Assembly.
U.S. Pat. No. 5,941,486 issued Aug. 24, 1999 to Riblet is titled Bracket Assembly.
U.S. Pat. No. 5,351,842 issued Oct. 4, 1994 to Remmers is titled Shelf and Support Assembly.
U.S. Pat. No. 5,280,841 issued Jan. 25, 1994 to Deursen is titled Portable Support Assembly.
U.S. Pat. No. 6,557,806 issued May 6, 2003 to Davies is titled Deck Mountable Plant Stand.
U.S. Pat. No. 4,767,088 issued Aug. 30, 1988 to Fielder et al is titled Multistation Bird Feeder support.
U.S. Pat. No. D285510 issued Sep. 9, 1986 to Douglas et al. is titled Bracket For A Hanging Plant, or Similar Article.
The foregoing examples of the related art and limitations related therewith are intended to be illustrative and not exclusive. Other limitations of the related art will become apparent to those of skill in the art upon a reading of the specification and a study of the drawings.


Technologies are generally described for detecting acceleration by sensing a movement of a liquid contained in at least one liquid flow path arranged in a film-type material. An example device may be configured to detect acceleration based at least in part on an output signal from at least one strain sensor formed on at least one surface of a film layer. The film layer may include at least one liquid flow path containing a liquid and arranged in the film layer. The strain sensor may be formed on the at least one surface of the film layer in the vicinity of the least one liquid flow path, and may be configured to detect deformation on the at least one surface of the film layer.

Unless otherwise indicated herein, the approaches described in this section are not prior art to the claims in this application and are not admitted to be prior art by inclusion in this section.
Motion sensing techniques can be used to detect and generate various information (e.g., acceleration, angular velocity, etc.) input to mobile devices such as smartphones, tablet computers, etc. Such information can be used to identify the location or movement of a mobile device or a user of the device. Motion sensors or accelerometers provided for detecting such information are required to be implemented in a small size and have high sensitivity. Recently, MEMS (micro-electromechanical systems) technology is used for implementing accelerometers used in mobile devices. MEMS sensors may be fabricated on silicon substrates using micromachining technology in the form of microchips having a size of the order of 1 micrometer or less, which may be then mounted in a sensor unit with a size of a few millimeters on a printed circuit board.
Additionally, to provide more flexibility for a mobile device, there are demands for further reducing the thickness of components or frames for the device and also fabricating them with flexible materials in an integrated form. For example, electronic devices can be implemented on film substrates by means of printing technology such as printable electronics such that its display units can be flexible.


Systems, methods, and non-transitory computer-readable media can generate an address associated with an image. The address can be generated to embed a parameter that specifies a quantity of image portions for representing a particular version of the image. A request can be acquired from a client device for an instance of the image. The request can include the address that embeds the parameter. It can be determined whether a predefined version of the image is stored at an edge server. The predefined version can utilize a predefined quantity of image portions to represent the image. The particular version of the image can be generated, in response to the request for the instance of the image and when the predefined version is stored at the edge server, based on at least a portion of the predefined version and based on the quantity of image portions specified by the parameter.

Today, people often utilize computing devices (or systems) for a wide variety of purposes. Users can use their computing devices to, for example, interact with one another, access content, share content, and create content. In some cases, users can utilize their computing devices to download, view, or otherwise access media content. For instance, users of a social networking system (or service) can, via their computing devices, access their feeds or other users' profiles to view various posts that include media content items, such as images.
Under conventional approaches rooted in computer technology, transmitting an entire image at its full resolution can, in some cases, require a significant amount of data. In many instances, users' computing devices (or systems) may have limited data access, such as due to limited cellular data plans. Moreover, in some instances, users' computing devices may not necessarily have the capabilities (e.g., due to limited display screen sizes or resolutions) to efficiently utilize entire images at full resolutions. Furthermore, conventional approaches to providing images can store multiple versions of an image to serve different computing devices, which can cause data storage inefficiency. As such, conventional approaches can create challenges for or reduce the overall experience associated with utilizing media content such as images.

Systems and methods for providing image portions for progressive images


An universal multimedia book interfacing device is disclosed in this invention. This device is used for operation with a multimedia book. The interfacing device includes a first adapting connector provided with connection compatibility for electrically connecting to several different multimedia books. Each multimedia book is provided with user interfaces for accepting user input signals therein and delivering user output signals therefrom. The universal interfacing device further includes a second adapting device provided with connection compatibility for electrically connecting to a data storage containing data relating to the multimedia books. The universal interfacing device is provided for electrically transmitting the user input signals received from one of the multimedia books to pre-designated locations in the data storage for generating user output signals and for electrically transmitting the user output signals to the multimedia books. In one of the preferred embodiment, the first adapting connector is a multimedia book cartridge provided with adapting compatibility to receive different multimedia books therein.

1. Field of the Invention
This invention relates generally to application of information printed on pages of a book and circuit elements placed thereon for the purposes of generating user input and corresponding output by adapting the book to an electronic data processing module. More particularly, this invention relates to an universal book adapting processing system for interfacing with multimedia books such that the multimedia books can be flexibly operated with removable data-storage media without requiring a book-specific electronic module whereby the cost of using multimedia books for learning and teaching enhancement can be reduced while the quality and performance of the multimedia book operations can be improved.
2. Description of the Prior Art
The "show-and-tell" types of "electronic books" currently available in the marketplace by taking advantage of the data processing capabilities of electronic modules are still limited by the difficulties that each book is adapted to a specific data-processing module suitable only for that book. The book-specific data-processing module is specially designed and manufactured uniquely for a pre-designated book to be adapted thereon. On the one hand, the application of such book is more expensive due the requirement that each book has to be adapted to a customized electronic module. On the other hand, in order to maintain reasonable price such that these "electronic books" in combination with the customized electronic module are marketable, the data-processing module and the circuit elements formed on the pages of the book are generally manufactured with cheap and simple processes. Therefore, limited by the cost constraints, the quality, performance and sophistication levels of functions provided in these "electronic books" are at the very low end when compared with what are achievable by current integrate circuit (IC) and multimedia data processing technology.
A typical "electronic book" 10 for learning or teaching enhancement, generally applied for children education, is shown in FIG. 1. This conventional "electronic book" includes a plurality of wired pages 15. Each of these wired pages includes printed illustrations 20, such as foods, animals, or daily items for which the pronunciations of those item's names are to be learned by a child. Next to each printed illustration 20 is a push button 25 which is connected by an electric wire 30 to a book's electronic module 40. When a child pushes the button next to an illustration showing a specific item, a signal, i.e., an address is transmitted via the wire 20 to the book's electronic module 40. The address signal generated by the child's action in pushing the button is transmitted to the book's electronic module 40 to initiate an audio output generated from a specific memory address depending on the page number and the button 25 pushed by the child. The audio output generated by the book's electronic module is the pronouncement of the name of the drawing 20 next to the button 25 pushed by the child thus allowing an interactive learning process to be carried out between the child and the "electronic book". Due to the limitation of the configuration employed by the conventional electronic book-10, each book is attached to a specific electronic module. The cost for manufacturing such electronic book for learning enhancement cannot be easily reduced. However, in order to lower the production cost of these "electronic books" to make them more marketable, the electric wires 30 and the book's electronic module 40 are made with simple and cheap materials and processes. The quality of the audio output and the features of functions performed by the electronic books are therefore limited by the price constraints.
Therefore, a need still exists in the art of designing and manufacturing the electronic books to provide better system configuration and method of interfacing the content presented on a multimedia book to a data-processing module such that the difficulties and limitations as encountered by those electronic book in the prior art can be resolved. It is desirable that the system configuration and method of interface can provide broader interfacing capabilities and greater degree of freedom whereby a user can moire conveniently and flexibly apply the improved system for learning enhancement without significantly increasing system costs.

Multimedia-book operable with removable data storage media implemented with universal interfacing book-adapting processor


Shallow trench isolation structures are provided for use with UTBB (ultra-thin body and buried oxide) semiconductor substrates, which prevent defect mechanisms from occurring, such as the formation of electrical shorts between exposed portions of silicon layers on the sidewalls of shallow trench of a UTBB substrate, in instances when trench fill material of the shallow trench is subsequently etched away and recessed below an upper surface of the UTBB substrate.

With SOI (silicon-on-insulator) technology, a thin silicon layer is formed over an insulating layer, such as silicon oxide, which in turn is formed over a bulk substrate. The insulating layer is referred to as a BOX (buried oxide) layer. For a single BOX SOI wafer, the thin silicon layer is divided into active regions using STI structures, which intersect the BOX layer. In general, the STI structures are fabricated by etching a pattern of trenches in the SOI substrate below the BOX layer, and depositing one or more layers of dielectric material to fill the trenches. The STI structures define the active regions, and provide isolation between active regions in the upper silicon layer of the SOI in which devices such as FETs (field effect transistors) are formed. The gate structures of FETs are formed on top of the thin silicon layer, for example, by depositing a gate dielectric layer and a gate electrode layer on the top surface of the thin silicon, followed by photolithographic patterning, and etching to form gate stack structures. The sources and drains of field effect transistors are then formed, for example, by ion implantation of N-type and/or P-type dopant material into the thin silicon layer using a gate stack structure to self-define a channel region.
In a single BOX SOI structure, the silicon layer underlying the BOX layer can be used as a back gate layer under the active regions, wherein the BOX layer serves as the back-gate dielectric, wherein the back gate can be defined by either P+ or N+ implantation. FETs with back gates typically use a UTBB (Ultra-Thin Body and Box) substrate having a relatively thin upper silicon layer and thin BOX layer to enable fully depleted device operation with a threshold voltage that is responsive to a back gate voltage applied to the back gate (lower silicon layer). FETs fabricated using UTBB technology with back gates have significant advantages such as, for example, reduced short channel effects, less threshold variability due to body doping fluctuations, and ability to use the back gate voltage to adjust the threshold voltage
However, as the thickness of the BOX layer is reduced for UTBB structures, the potential for electrical shorts between the upper and lower silicon layers of the device increases as a result of various processing steps that can etch down the trench fill material and expose the upper and lower surfaces of the upper and lower silicon layers on the sidewalls of the shallow trench.


A hall effect sensor device implemented on a semiconductor body, having a first Hall effect sensor and a second Hall effect sensor, each of the two Hall effect sensors has at least four individual Hall effect elements and the four Hall effect elements are connected in series, and each Hall effect element has three contact terminals arranged in a row, and the series connection is implemented through a coupling or interconnection of the two outer contact terminals. Semiconductor well regions of the individual Hall effect elements are separated from one another, and the first Hall effect sensor and the second Hall effect sensor are connected in parallel, whereby a middle contact terminal of a Hall effect element of the first Hall effect sensor is connected in each case with a middle contact terminal of a Hall effect element of the second Hall effect sensor.

Field of the Invention
The invention relates to a Hall effect sensor device.
Description of the Background Art
A magnetic field sensor is known from DE 101 50 955 C1. The magnetic field sensor has multiple vertical Hall effect sensors, each with five contact terminals. In this design, the up to four Hall effect sensors are parallel to one another in implementation, and the contact terminals are connected to one another by means of a cyclic interchange in order to reduce the offset of the magnetic field sensor as compared to the offset of a single Hall effect sensor. In addition, the offset can be further reduced by means of the so-called "spinning current" method. It is desirable to improve the costly arrangement and the sensitivity of the magnetic field sensors.
In addition, a Hall effect sensor device with multiple individual Hall effect elements is known from DE 10 2011 107 767 A1, which corresponds to US20130015853, and which is incorporated herein by reference. Here, the individual Hall effect elements of the applicable Hall effect sensor device are connected in series in the form of a ring.


An intelligent electronic device and a method for activating a function in an intelligent electronic device; the device includes an inter-module bus, a first interface and a number of hardware modules connected to each other via the inter-module bus. The modules include a process control module including a control unit that senses the types of hardware modules connected to the inter-module bus, that obtains set-up data from an external portable data carrier, where the set-up data includes configuration data and verification data, where the verification data includes hardware type data related to the modules in the device, that compares the obtained verification data with own verification data including data regarding the sensed hardware type, and that activates a protection function only if there is a match between all verification data being compared.

Local process equipment in substation automation or distribution automation systems, such as circuit breakers and transformers, are normally controlled and/or protected by intelligent electronic devices (IEDs). These intelligent electronic devices in many cases communicate with other higher control and protection level devices using a computer communication system. When an intelligent electronic device is to be configured it would then normally receive a configuration file over such a computer communication network.
However, not all intelligent electronic devices are provided with this communication ability. Some may be provided as isolated devices being separated from such a computer communication network. In this case other ways of configuring the intelligent electronic device has to be provided.
One way to provide configurations to an intelligent electronic device is through the use of a portable non-volatile data carrier, such as a memory stick, which is brought and connected to the device in question.
This has been described in relation to other fields of technology.
US 2002/0092018, which is related to the field of cable or satellite television, does for instance describe the use of a memory stick for providing a boot loader program and an alternative application software program, an upgraded application software program or a corrective application software program to a set top box. The boot loader program also checks to see if the software is valid.
US 2007/0106764 describes configuration of a consumer electronic device, like a television set. Network configurations are here provided to a configuration-file transfer device including a USB memory and IR transmitter. The configuration file is then transmitted to the consumer device using the IR transmitter. The document also mentions that the configuration file can include other data, such as user personalization data.
U.S. Pat. No. 6,842,794 describes how a flash memory device gets connected to a data processing system and then activates this system. There are however no configurations.
In relation to intelligent electronic devices WO 2007/036178 describes using keys provided in a USB memory for verifying a user according to defined user types.
The document "SetITV4, Leistungsmerkmale net-line Stationsleittechnik" dated Nov. 15, 2007 and downloadable from www.saeit.de/pool/download/Leistungsmerkmale_setITV4.pdf briefly mentions that IEC61850 compliant devices can be configured via a USB memory stick.
In order to lower the costs of these types of isolated intelligent electronic devices, the number of user interfaces are often kept to a minimum. This means that for instance keyboards or keypads as well as displays may not be present.
An intelligent electronic device may furthermore be modular in that it includes various hardware modules providing different function of the IED. One way of providing modularized hardware for an intelligent electronic device is described in U.S. Pat. No. 7,191,076. Here there is an intelligent electronic device having a base module to which external function modules can be attached. These external function modules offer expandable features such as additional power management, additional communications, advanced communications, wireless communications, analog and digital input/output, data logging etc.
However, before the isolated IED with a limited number of user interfaces and being made of such modular hardware is activated it may be of interest to make further investigations concerning the device for enhancing the security. This may be hard to do given the limited number of user interfaces.
There is therefore a need for improvement in relation to performing configuration of an isolated intelligent electronic device.

Configuring of an intelligent electronic device


An eye diagram measuring circuit includes a reference signal generator, a clock data recovery circuit, a test signal generator, and a boundary determining unit. The reference signal generator generates a reference signal. The clock data recovery circuit generates a clock signal according to the reference signal. The test signal generator generates a first sampling signal according to the clock signal. The test signal generator discriminates logic levels of plural bits of the input signal according to the first sampling signal and a slicing voltage, thereby generating a test signal. The boundary determining unit generates a boundary of an eye diagram according to a relationship between the test signal and the reference signal. The test signal generator changes a phase of the first sampling signal and a magnitude of the slicing voltage according to plural conditions provided by the boundary determining unit.

A serializer/deserializer (also referred as SERDES) is usually used in high speed communications. By the SERDES architecture, a parallel data is converted into a serial data in a transmitting device, and the serial data is restored to the parallel data in a receiving device. The SERDES architectures are widely used in high-speed storage interface such as SATA interfaces, SAS (Serial SCSI) interfaces, USB 2.0/3.0 interfaces, PCI-e interfaces, HDMI interfaces, XAUI interfaces, 10G interfaces or fiber-optic interfaces.
FIG. 1 is a schematic functional block diagram illustrating a conventional SERDES architecture. For example, the conventional SERDES architecture is disclosed in U.S. Pat. No. 8,243,782. As shown in FIG. 1, the conventional SERDES architecture includes a transmitting device 61, a receiving device 65, and a channel 63. A serial data (in) is transmitted from a transmitter 61a of the transmitting device 61 to a receiver 65a of the receiving device 65 through the channel 63. In particular, after the serial data is equalized by a transmitter equalizer (Tx equalizer) 61b of the transmitter 61a, a transmitting signal is outputted. After the transmitting signal is transmitted through the channel 63, the transmitting signal is an input signal of the receiving device 65.
The receiver 65a of the receiving device 65 includes a receiver equalizer and sampler (RX equalizer and sampler) 651, a measuring circuit 653, and an adaptive controller 655. However, while the transmitting signal passes through the channel, the transmitting signal is usually affected by inter-symbol Interferences (ISI), insertion loss or return loss. Consequently, after a serial data (out) is recovered from the input signal by the RX equalizer and sampler 651, the serial data (out) has to be corrected according to the measured signal quality.
For evaluating the quality of the input signal, the equalized input signal is further measured by the measuring circuit 653 of the receiver 65a. The measuring result is transmitted from the measuring circuit 653 to the adaptive controller 655. According to the measuring result, the adaptive controller 655 will judge whether the settings of the receiving device 61 and the receiving device 65 have to be adjusted or not.
For example, if the measuring result from the measuring circuit 653 indicates that the quality of the input signal is unqualified, the adaptive controller 655 generates an adjusted signal. The adjusting signal is fed back to the RX equalizer and sampler 651 of the receiver 65a and the Tx equalizer 61b of the transmitter 61a. According to the adjusting signal, the settings of the RX equalizer and sampler 651 of the receiver 65a and the Tx equalizer 61b of the transmitter 61a are correspondingly adjusted.
After the settings of the RX equalizer and sampler 651 of the receiver 65a and the Tx equalizer 61b of the transmitter 61a are adjusted, a corresponding new input signal is measured by the measuring circuit 653, and a new measuring result is generated by the measuring circuit 653. Similarly, if the measuring result indicates that the quality of the input signal is unqualified, the adaptive controller 655 generates a new adjusted signal again. The new adjusting signal is fed back to the RX equalizer and sampler 651 of the receiver 65a and the Tx equalizer 61b of the transmitter 61a again. The above procedures are repeatedly done until the measuring result from the measuring circuit 653 indicates that the quality of the input signal is qualified.
Generally, the bit error rate (BER) is a parameter indicating the quality of a received signal of a system. According to many high-speed transmission standards, the bit error rate should be lower than an expectation value. For example, the allowable bit error rate of the SERDES system is lower than 10−12; and the allowable bit error rate of the fiber-optic system is lower than 10−15. In the SERDES architecture of FIG. 1, the input signal is repeatedly measured, the adjusting signal is repeatedly fed back to the transmitter 61a and the receiver 65a, and the settings of the transmitter 61a and the receiver 65a are repeatedly adjusted. Consequently, the quality of the input signal can meet the BER requirement.
However, it is necessary for the measuring circuit 653 to efficiently and accurately measure the quality of the input signal in order to meet the BER requirement. If the quality of the input signal is not efficiently and accurately measured, the process of adjusting the settings of the transmitter 61a and the receiver 65a is either inefficient or incorrect.

Eye diagram measuring circuit and measuring method thereof

TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD


The invention provides a waveguide connector assembly for the precision interconnection of mating arrays of parallel optical waveguides which are preferably photolithographically formed on substrates. The connector assembly has a base with several parallel channel walls cut along a surface of the base. A waveguide assembly is positioned on the base. The waveguide assembly comprises a substrate and several transparent, polymeric waveguides on and raised from a surface of the substrate. The waveguides have a polygonal cross section with flat edges. The waveguide assembly is positioned on the base such that each of the waveguides is set in one of the channels and contacts the walls of the channel at two or more points. A cover plate holds the waveguide assembly on the base.

The present invention relates to waveguides, or more particularly to a connector assembly for the precision interconnection of mating arrays of parallel optical waveguides. The optical waveguides are preferably photolithographically formed on substrates.
It is known in the art to photolithographically produce optical waveguides on a substrate. Such optical waveguides connect optical information processing devices or connect such devices and other optical communication links such as glass optical fibers. Waveguides may also be used to create passive optical devices such as splitters, combiners, couplers, routers and the like. In commonly used applications, waveguides are densely packed on substrates and extremely small dimensions are generally required. The transverse dimension of such waveguides typically range from about 5 .mu.m to about 100 .mu.m, while the space between guides can be as little as 3 .mu.m. It is known in the art to produce waveguides with UV photopatterned polymeric materials. In this regard, see U.S. Pat. No. 4,609,252 which is incorporated herein by reference. It is often necessary to make an optical interconnection between waveguides having approximately rectangular cross-section and other waveguides, devices and/or optical fibers. These interconnections require a precision alignment at the interface between the devices. This is difficult to achieve when the device structures have different geometries. Moreover, no matter how well made, such interconnects result in loss of optical power. A further complication is that the alignment, once accomplished, is difficult to maintain under conditions of high vibration. It is therefore generally desired to minimize the number of interconnects, to facilitate the precision alignment at any necessary interconnects and to ensure the maintenance of alignment over time.
The present invention provides a raised rib structure which allows the precision alignment of a waveguide array with another corresponding waveguide array or light transmitting device having a raised rib configuration or fiber array. Such a raised rib structure serves as an optical interconnect between light transmitting devices. The device may be a printed waveguide structure which, when fabricated on a flexible substrate may include a flexible ribbon-type interconnect which can be run directly to a connector or to another device. The device itself may be laminated to a rigid structure such as a sheet of rigid plastic or glass with the flexible ribbon interconnects allowed to extend beyond the substrate and which can be fed to an optical connector or other interface between devices.
U.S. Pat. No. 4,111,522 discloses the alignment of glass fibers in a fiber-to-fiber connector. The foregoing does not suggest the aligned attachment of photolithographically formed waveguides on substrates nor a de-mateable connector for the interfacing of standing rib waveguide to conventional glass or polymer fiber. U.S. Pat. No. 5,375,184 shows a waveguide alignment device wherein a single waveguide is aligned with another single waveguide by means of mating guides. U.S. Pat. No. 5,024,505 shows a splicer for several individual strands of circular cross-section optical fibers.
It would be desirable to provide a means of connecting two or more ribbons of densely packed, small diameter, substantially parallel, photolithographically formed waveguides, especially rectangular cross-section waveguides on substrates. It has now been found that a good optical connection between waveguides can be achieved by mating the ends of waveguides to be connected in the base portion of a coupler having precision grooves. The ends of the waveguides are self-aligned by abutting them against the walls of the grooves. Once aligned, a cover plate maintains them in place.

Raised rib waveguide ribbon for precision optical interconnects


A wireless tracking device including a positioning system for determining a location of the device and a processor connected to the positioning system. The wireless tracking device further including a wireless radio connected to the processor for transmitting the location of the device across a wireless area network.

The present invention relates generally to networks, and in particular to networks used for tracking vehicles, aircraft, vessels, equipment and other property.
Vehicle tracking is the ability for a user such as a vehicle owner or fleet owner to monitor the location, speed and direction of a vehicle at a given time. It is desirable for fleet owners to monitor the distance and routes driven to find inefficiencies, and to monitor speed to determine safety of driving and fuel consumption. For aircraft or boat owners or operators (e.g. commercial fishermen), it may be desirable to have their location known by the Coastguard in the event of an emergency.
Conventional vehicle tracking systems employing global positioning systems (GPS) use cellular telephone technology to transmit the location of the vehicle. The location of the vehicle may be transmitted to a car rental agency, local authorities, or to a third-party monitoring company. These conventional systems usually require a monthly subscription for the wireless communication link. FIG. 1 shows a conventional solution that is used for tracking vehicles, including a vehicle 10 equipped with a tracking device and a communication device operating in a cellular network 16. Cellular tower 14 provides the cellular network 16. The cellular network 16 is typically integrated with the Plain Old-Telephone System (POTS) for communication with a third party operator 18.
The conventional system requires the Third party operator 18 to receive signals from the vehicle 10 and monitor its location. Vehicle location systems are operated by police to find vehicles reported as stolen. The conventional solution hardware comprises a telephone 18 and communicates using a modem data transfer for example.
Conventional solutions are expensive and inflexible. Many people do not own a vehicle tracking device because a monthly subscription for the wireless communication link is expensive. Some people do not want a third party to be able to track their vehicle, and so do not join these conventional services.
The present invention addresses these and other problems associated with the prior art.

Abstract: A vehicle monitoring system including a sensor, a microcontroller configured to receive a sensor input from the sensor and determine a vehicle condition data, and a wireless transmitter in communication with the microcontroller. The wireless transmitter is configured to transmit the vehicle condition data to a remote data network access point.

Abstract: A method of monitoring a vehicle including determining a status of the vehicle, locating an available wireless data network access point, and transmitting the status of the vehicle though the access point.


A constant speed display method applied in an electronic device is provided. The electronic device is in a full screen view for illustrating images in a photograph. The method has the following steps of: determining whether consecutive swiping touch actions matching specific criteria have been received by the electronic device; and displaying an aligning animation of the images in the photograph at a constant speed without being affected by a next swiping action after the consecutive swiping touch actions matching the specific criteria have been received by the electronic device.

1.Field of the Invention
The present invention relates to electronic devices, and in particular relates to electronic devices that implement a constant speed display method capable of detecting consecutive swiping actions and displaying image aligning animation with a constant moving speed.
2.Description of the Related Art
Mobile devices, such as smart phones, tablet PCs, digital cameras, or laptops, have become more and more popular. A mobile device can be used to take pictures or receive image files from the network or other devices. However, when the amount of pictures stored in the mobile device is very large, a user may want to search for a specific picture of a selected album or view the selected album at a glance quickly in a full screen view. Specifically, the pictures of each album stored in the mobile device are generally arranged as a photograph in the full screen view. When pictures of a selected album are numerous (i.e. many pictures in the album) and it is not desired for the user to re-enter the full screen view after selecting a thumbnail in the thumbnail view ,a user may have to repeat a "swiping" action many times to search for a specific picture in the full screen view. Accordingly, a current photograph view may generally change to an adjacent picture (e.g. previous picture or next picture) from the current picture by a single complete "swiping"action, which can be regarded as a "general display mode" in the full screen view. Specifically a swiping action may comprise panning and flinging actions, and the moving speed during panning and flinging is not constant. Thus, the moving speed of a photograph may correspondingly alternate during each "swiping" action in the general display mode. Accordingly, image latency or unsmooth images may be caused visually while viewing photographs with quickly repeated swiping actions (e.g. swiping for more than 3 times in one second) on conventional mobile devices.

Constant speed display method of mobile device


An LCD repair method repairs gate opens in a gate line where the gate line intersects with a data line or where the gate open exists at a position where it is not overlapped by a single pixel electrode. The method includes connecting a pixel electrode overlapping a portion of the opened gate line to the gate line, and forming a metal pattern to electrically connect two adjacent pixel electrodes.

1. Field of the Invention
The present invention relates to liquid crystal displays, and more particularly, to repairing an open gate line in an LCD.
2. Description of the Related Art
Generally, a liquid crystal display (LCD) utilizes optical anisotropy and polarization properties of liquid crystals. The liquid crystals also have directionality properties imparted by their slender and long structure. An electric field applied to the liquid crystal can control the direction of molecular arrangement in the liquid crystal.
Accordingly, adjusting the direction of molecular arrangement modulates light polarized due to the optical anisotropy to represent an image information.
Such liquid crystals are classified according to their electrical characteristics as either a positive liquid crystal or a negative liquid crystal. A liquid crystal molecule whose permittivity anisotropy is positive has a major axis arranged in parallel with the direction of the applied electric field. On the other hand, a liquid crystal molecule whose permittivity anisotropy is negative has a major axis arranged perpendicular to the direction of the applied electric field.
Today, an active matrix LCD, in which thin film transistors coupled to pixel electrodes coupled are arranged in a matrix form, is widely used because it has an excellent resolution and is responsive enough for displaying rapidly changing images. A liquid crystal display panel is often constructed as explained below with regard to FIG. 1, which shows an exploded perspective view of a LCD.
Referring to FIG. 1, the LCD 11 includes an upper substrate 5 and a lower substrate 22, and the liquid crystal 14. The liquid crystal 14 is disposed between the upper substrate 5 and the lower substrate 22. The upper substrate 5 is provided with a color filter that includes a black matrix 6, a sub color filter 8, and a transparent common electrode 18 formed on the color filter 7. The lower substrate 22 supports circuitry for individual pixel areas P, including a pixel electrode 17 formed in each pixel area P, a thin film transistor T serving as a switching element, a data line 15, and a gate line 13.
The lower substrate 22 is also called an array substrate, and the switching thin film transistors T are arranged in a matrix form. The thin film transistors T are generally located proximate to where the gate line 13 and the data line 15 intersect. The areas bounded by the intersection of the gate lines 13 and the data lines 15 are the pixel areas P.
In operation, the gate line 13 applies a control voltage pulse that drives a gate electrode of the thin film transistor T, and the data line 15 applies a signal voltage for driving a source electrode of the thin film transistor T. When the signal voltage is applied to the source electrode and the control voltage pulse drives the gate electrode, the signal voltage is applied through the transistor to the activate the pixel. When the signal voltages applied to the remaining source electrodes are lower than the liquid crystal driving voltage, the pixels connected to the remaining source electrodes remain inactive, and only a single pixel activates.
In order to independently drive each pixel, gate lines and data lines are arranged in a matrix form over an overall display area. As noted above, the gate lines and the data lines drive the thin film transistors to activate or deactivate selected pixels.
However, defects may impair the operation of the circuitry formed on the array substrate during manufacturing. The defects are generally classified as a dot defect, a line defect, or a display spot defect according to impact that the defect has on the operation of the pixels. The dot defect is caused due to a thin film transistor failure and a pixel electrode failure, and the line defect is caused by a breakdown of the thin film transistor due to a gate or data line open circuit or short circuit, caused, for example, by static electricity.
The defects are increasingly problematic and important as the display area of the LCD increase. Particularly, even a single line defect is considered a fatal defect. The defective LCD is considered valueless because a whole row or column of pixels is rendered inoperable. In other words, the LCD is not considered a saleable product and, as a result, the resources spent to produce the defective LCD are wasted.
In the past, a line defect in the form of an open circuit in a gate line has been repaired as will be described next. In particular, FIGS. 2A, 2B, and 2C are plan views schematically illustrating a partial portion of an array substrate of a LCD, and show the prior repair technique for an open circuit defect in a gate line.
Referring to FIG. 2A, the gate lines 13 and 13′ and the data lines 15 and 15′ intersect to define a pixel area P. A neighboring pixel area P′ is also shown, and the electrodes 17 and 17′ are disposed within the pixel areas P and P′ respectively. A thin film transistor T that includes a gate electrode 31, a source electrode 33 and a drain electrode 35 is formed proximate to the intersection area of the gate lines 13 and 13′ and the data lines 15 and 15′.
In addition, the pixel electrode 17 is electrically connected to the drain electrode 35 of the thin film transistor T via a contact hole 37 provided within the pixel area P. A predetermined portion of each pixel electrode 17 and 17′ is overlapped with the gate line 13′. For example, a portion of the pixel electrodes 17 and 17′ extend over the gate line 13′, and thereby form individual capacitors with capacitance Cst.
Here, the source electrode 33 and the drain electrode 35 are formed spaced apart under the gate electrode 31 by a predetermined interval, and an active channel (not shown) formed from a semiconductor layer (not shown) for the transistor T is thereby exposed in the interval.
When a scanning pulse is applied to the gate electrode 31 of the thin film transistor T, the voltage on the gate electrode 31 increases and the thin film transistor T is turned on. At this time, a liquid crystal driving voltage is applied to the pixel electrode 17 from the data line 15 through the source electrode 33 and the drain electrode 35 of the thin film transistor T, so that a pixel capacitance is charged. The pixel capacitance is a sum of a liquid crystal capacitance Clc and the storage capacitor capacitance Cst.
In such an array substrate, as shown in FIGS. 2B and 2C, a gate open (GO) may occur due to impurities or other factors occurring during a manufacturing process. Here, the gate open (GO) represents a break or open circuit at or over a predetermined portion of the gate line 13′.
FIG. 2B illustrates a case in which the gate line 13′ has a gate open (GO) contained within the pixel area P, and more particularly contained within the extent of the pixel electrode 17. On the other hand, FIG. 2C illustrates a case in which the gate line 13′ has a gate open (GO) at a stepped portion that occurs where the gate line 13′ intersects with the data line 15′.
Referring to FIG. 2B, when the gate line 13′ has a gate open (GO) within the pixel area P, a laser welding process may be employed to repair the gate line 13′. Note that the gate line 13′ includes a first portion 20 and a second portion 21 on opposite sides on the gate open (GO). To repair the gate open (GO), the first portion 20 is connected to the pixel electrode 17 (where the first portion 20 overlaps the pixel electrode 17), and the second portion 21 is also connected to the pixel electrode 17 (where the second portion 21 overlaps the pixel electrode 17). The connection point formed by the laser is labeled "C" in FIG. 2B.
By doing so, the opened gate line 13′ incorporates the pixel electrode 17 to bypass the gate open (GO).
In this case, the corresponding pixel electrode 17 does not play operate as a conventional pixel electrode. As a result, the associated pixel is defective and has the appearance of a one pixel spot on the LCD. Nevertheless, a one pixel spot is within the guidelines for acceptance as a good LCD panel, and may therefore by sold to generate revenue.
Note, however, that this technique cannot be applied to bypass all gate open (GO) manifestations. For example, as shown in FIG. 2C, a gate open (GO) may occur in the gate line 13′ at the stepped portion where the gate line 13′ intersects with the data line 15′. In other words, since the gate line portions 24 and 25 (disposed at first and second sides of the opened gate line 13′) overlap different pixel electrodes 17 and 17′, forming connection points C between the gate line portions 24 and 25 and the underlying pixel electrodes 17 and 17′ does not fix the gate open (GO) condition.
Since the technique described above cannot repair the gate open (GO) defect shown in FIG. 2C, the corresponding LCD panel must be discarded, thereby reducing the manufacture yield of the LCD panel, and wasting valuable product manufacturing resources.
Thus, a need has long existed for addressing the gate open (GO) defects noted above, and related problems previously experienced.


A locking device for a foldable collapsible seat is provided. The collapsible seat includes a plurality of legs. A pivoting mechanism pivotally connects together the plurality of legs. A seat portion is mounted to an upper end of the plurality of legs. A locking device is removably positioned above the pivoting mechanism for wedging apart the plurality of legs and increasing a rigidity of the collapsible seat in an expanded, setup position.

The present invention relates to an improvement to a foldable and collapsible seat, and more particularly, relates to a safety and locking device for a foldable and collapsible seat which prevents the legs of the seat from inadvertently collapsing. The present invention finds particular application in conjunction with a foldable three-leg seat, and will be described with particular reference thereto. However, it is to be appreciated that the present invention is also amenable to other like applications.
It has often been desired to provide a portable collapsible seat which may be conveniently transported from place to place. It is also desired to provide a portable seat which may be reduced to a small size for ease of carrying and storage. Conventionally, tripod or three-leg seats have been utilized to provide portable seating. However, such tripod seats are generally unstable. The legs have a tendency to move with respect to one another, particularly upon movement of the seat. Still another problem is the undesirable movement of a seat portion with respect to the legs when the user is sitting on the seat portion.
A need therefore exists for a locking device for a portable foldable and collapsible seat which prevents the legs of the seat from unintentionally collapsing during use and movement of the seat.


An upright-type fire protection sprinkler with a body defining an orifice and outlet for flow of fluid, and a deflector positioned coaxial with the outlet for impingement of fluid flow thereupon, has one or a combination of the following features for improved performance. The deflector may have an inner surface with a recessed central area, and a recessed redirecting area about the central area at a predetermined acute angle and axial offset thereto. The deflector has tines with inner surfaces inclined towards the outlet, at least a first set of tines disposed in planes at about 45.degree. to a first plane of sprinkler frame arms, the surfaces of the first set of tines being inclined at an angle relatively more outward from the axis than the angle of inner surfaces of adjacent tines. The tines may include a second set of tines in a plane perpendicular to the first plane, and a third set of tines in the first plane, inner surfaces of the second set of tines having a second set width and inner surfaces of the third set of tines having a third set width about 0.15 to 0.65 times the second set width. The second set width may be substantially greater than widths of inner surfaces of all other tines.

The invention relates to fire protection sprinklers.
An automatic fire sprinkler has a body with an outlet that is normally closed by a plug, the plug being held in place by a heat-activated trigger mechanism, and an orifice which is normally coincident with or just upstream of the outlet.
Automatic sprinklers of the upright type also have a substantially horizontal water distribution deflector that faces the outlet. When a sufficiently elevated temperature is sensed, a thermally responsive element which normally retains the plug in a closed position releases the plug, a vertically directed stream of water (downward for pendent sprinklers and upward for upright sprinklers) discharges from the outlet orifice towards the deflector. The water impacts and is diverted generally radially downward and outward by the deflector, breaking up into a spray pattern, the shape of which is, in large part, a function of the deflector configuration, the water being projected over the intended area of coverage, i.e., the protected area.

Deflector for upright-type fire sprinklers


Chiral synthesis from an achiral starting material by chiral diamine-mediated, such as sparteine-mediated, intermolecular asymmetric alkylation with a strained cyclic ether in the presence of a Lewis acid.

Chiral, non-racemic alkylated derivatives, including but not limited to chiral hydroxy-alkyl derivatives, of nitrogen-containing heterocycles such as pyrrolidine, are desirable for preparing a variety of compounds, including pharmaceutically active compounds. Chiral hydroxy-alkyl derivatives of nitrogen-contining heterocycles are typically needed in large quantities and good enantiomeric excess (ee) in drug discovery efforts. These derivatives are useful precursors in the synthesis of compounds such as Anthramycin, Lydicamycin, Halosaline, and Cuscohygrine, and also in the synthesis of many bioactive molecules, such as clemastine (antihistamine), (R)-3-(2-(2-(4-methylpiperidin-1-yl)-ethyl)pyrrolidine-1-sulfonyl)phenol (a 5-HT7 receptor modulator), and SB-269970 (5HT7 receptor antagonist). See, for example, O'Neil, I. A., Murray, C. L., Potter, A. J., Kalindjian, S. B., Tetrahedron Lett. 1997, 38, 3609-3610; Hayakawa, Y., Kanamaru, N., Morisaki, N., Seto, H., Furihata, K., Tetrahedron Lett. 1991, 3, 213-216; Takahata, H., Kubota, M., Ikota, N., J. Org. Chem. 1999, 64, 8594-8601; Stapper, C., Blechert, S., J. Org. Chem. 2002, 67, 6456-6460; Manthorpe, J. M., Gleason, J. L., J. Am. Chem. Soc. 2001, 123, 2091-2092; Danilewicz, J. C., Abel, S. M., Brown, A. D., Fish, P. V., Hawkeswook, E., Holland, S. J., James, K., McElroy, A. B., Overington, J., Powling, M. J., Rance, D. J., J. Med. Chem. 2002, 45, 2432-2453; Stanchev, S., Rakovska, R., Berova, N., Snatzke, G., Tetrahedron: Asymmetry 1995, 6, 183-198; Lovell, P. J., Bromidge, S. M., Dabbs, S., Duckworth, D. M., Forbes, I. T., Jennings, A. J., King, F. D., Middlemiss, D. N., Rahman, S. K., Saunders, D. V., Collin, L. L., Hagan, J. J., Riley, G. J., Thomas, D. R., J. Med. Chem. 2000, 43, 342-345; Cardillo, G., Gentilucci, L., Qasem, A. R., Sgarzi, F., Spampinato, S., J. Med. Chem. 2002, 45, 2571-2578; Vernier, J-M, El-Abdellaoui, H., Holsenback, H., Cosford, N. D. P., Bleicher, L., Barker, G., Bontempi, B., Chavez-Noriega, L., Menzaghi, F., Rao, T. S., Reid, R., Sacaan, A. I., Suto, C., Washburn, M., Lloyd, G. K., McDonald, I. A., J. Med. Chem. 1999, 42, 1684-1686; DeVita, R. J., Goulet, M. T., Wyvratt, M. J., Fisher, M. H., Lo, J-L, Yang, Y. T., Cheng, K., Smith, R. G., Bioorg. Med. Chem. Lett. 1999, 9, 2621-2624. One example of such chiral hydroxy-alkyl derivatives of N-containing heterocycles is (2R)-2-(2-hydroxy-ethyl)-pyrrolidine-1-carboxylic acid tert-butyl ester, also known as (+)-(2R)-1-Boc-2-(2-hydroxy-ethyl)-pyrrolidine, a compound of formula (Ia), or its deprotected form, a compound of formula (Ia′):

Conventional methods to synthesize chiral hydroxy-alkyl derivatives of nitrogen-containing heterocycles, such as a compound of formula (Ia), involve multiple step sequences from starting materials that are themselves chiral, and often expensive, such as D-prolinol or D-proline. Suitable chiral starting materials having nitrogen-containing heterocycles with rings smaller or larger than five members are often not commercially available. These starting materials, however, are not regarded as being suitable for large-scale synthesis. See, for example, O'Neil, I. A.; Murray, C. L.; Potter, A. J., Kalindjian, S. B., Tetrahedron Lett. 1997, 38, 3609-3610; Lovell, P. J.; Bromidge, S. M., Dabbs, S., Duckworth, D. M.; Forbes, I. T.; Jennings, A. J.; King, F. D.; Middlemiss, D. N.; Rahman, S. K.; Saunders, D. V.; Collin, L. L.; Hagan, J. J., Riley, G. J., Thomas, D. R., J. Med. Chem. 2000, 43, 342-345; Cardillo, G., Gentilucci, L., Qasem, A. R., Sgarzi, F., Spampinato, S., J. Med. Chem. 2002, 45, 2571-2578; Vernier, J-M, El-Abdellaoui, H., Holsenback, H., Cosford, N. D. P., Bleicher, L., Barker, G., Bontempi, B., Chavez-Noriega, L., Menzaghi, F., Rao, T. S., Reid, R., Sacaan, A. I., Suto, C., Washburn, M., Lloyd, G. K., McDonald, I. A., J. Med. Chem. 1999, 42,1684-1686; and DeVita, R. J., Goulet, M. T., Wyvratt, M. J., Fisher, M. H., Lo, J-L, Yang, Y. T., Cheng, K., Smith, R. G., Bioorg. Med. Chem. Lett. 1999, 9, 2621-2624.
Scheme 1a provides an example of such conventional synthetic methodology that starts with a chiral compound and relies on four steps to generate compound (Ia).

With respect to Scheme 1a, a compound of formula (Ia) is prepared from a chiral starting material (D-prolinol). The reference letters a-d depicted with the reaction steps in the same scheme are given with the following meanings: (a) BOC2O, THF/H2O, K2CO3; (b) CH3SO2Cl, Et3N, CH2Cl2; (c) NaCN, DMF; and (d) hydrolysis to a methyl ester and then reduction in the presence of LiAlH4, Et2O, as in the last step of Scheme 1b.
Scheme 1b provides another example of conventional synthetic methodology that starts with a chiral compound and relies on a plurality of steps to generate compound (Ia).

With respect to Scheme 1b, a compound of formula (Ia) is prepared from a chiral starting material (D-proline) according to the synthetic steps shown therein.
Figures given as percentages in reaction steps refer to yields in the respective steps. For example, the figure "95%" in Scheme 1b means that the last step in such Scheme produces the final product with a yield of 95% (which unless indicated otherwise is calculated in terms of mass with respect to the maximum theoretically possible quantity of product that could be obtained in that step).
It is desirable to prepare chiral alkylated derivatives of nitrogen-containing heterocycles, such as compound of formula (Ia), from readily available inexpensive starting materials. Low complexity starting materials, such as achiral compounds are typically desirable, for they are generally more readily available and/or less expensive than chiral counterparts. It is also desirable that the, synthetic methods be suitable for large-scale synthesis, and that they involve a small number of steps, preferably one step. Where chirality is involved, it is also desirable to develop a synthesis that is as highly stereoselective as possible, so that a high ee of the product reduces, or even eliminates, the need for subsequent isolation and purifiction steps. In addition, desirable synthetic methods should preferably generate the chiral alkylated derivatives of nitrogen-containing heterocycles, such as compound of formula (Ia), in high yield.
Embodiments of the present invention provide desirable features such as those refered to above. Furthermore, embodiments of this invention provide synthetic methods for chiral alkylated derivatives of nitrogen-containing heterocycles, such as chiral hydroxy-alkyl derivatives of nitrogen-containing heterocycles, including a compound of formula (Ia), that solve synthetic problems that are not known to have been solved, or even addressed, by conventional methodologies.
For example, (−)-sparteine-mediated asymmetric deprotonative lithiation has been used to generate chiral carbanions. See, for example, Hoppe, D., Hense, T., Angew. Chem. Int. Ed. Engl. 1997, 36, 2282-2316; Beak, P., Basu, A., Gallagher, D. J., Park, Y. S., Thayumanavan, S., Acc. Chem. Res. 1996, 29, 552-560; Johnson, T. A., Jang, D. O., Slafer, B. W., Curtis, M. D., Beak, P., J. Am. Chem. Soc. 2002, 124,11689-11698; Laumer, J. M., Kim, D. D., Beak, P., J. Org. Chem. 2002, 67, 6797-6804; Lim, S. H., Beak, P., Org. Lett. 2002, 4, 2657-2660; Johnson, T. A., Curtis, M. D., Beak, P., Org. Lett. 2002, 4, 2747-2749; Christoph, G., Hoppe, D., Org. Lett. 2002, 4, 2189-2192; Arrasate, S., Lete, E., Sotomayor, N., Tetrahedron: Asymmetry 2002, 13, 311-316; and Metallinos, C., Snieckus, V., Org. Lett. 2002, 4, 1935-1938. Furthermore, a reportedly readily available (+)-sparteine surrogate has been introduced for its use in place of (+)-sparteine, which is not commercially available. See, for example, Dearden, M. J., Firkin, C. R., Hermet, J. R., O'Brien, P., J. Am. Chem. Soc. 2002, 124,11870-11871.
Conventional methods, however, rely on strong electrophiles, such as TMSCl, Bu3SnCl, Me2SO4, aldehydes, and ketones. See, for example, Beak, P., Kerrick, S. T., Wu, S. D., Chu, J. X., J. Am. Chem. Soc. 1994, 116, 3231-3239. In contrast, methodology according to this invention uses weak electrophiles, such as strained cyclic ethers. Conventional methodology does not address the suitability of weak electrophiles. In addition, conventional methodology does not address the conditions under which such electrophiles could be used effectively. Even more specifically, conventional methodology does not address the issue of whether weak electrophiles could be used at all. Furthermore, conventional methodology does not appear to suggest the results of using such eletrophiles, even if such use could be effectively implemented. Moreover, the reported use (see, for example, Dearden, M. J., Firkin, C. R., Hermet, J. R., O'Brien, P., J. Am. Chem. Soc. 2002, 124, 11870-11871) of an epoxide in an intramolecular example wherein the epoxide opening is not activated by complexation with a Lewis acid, does not teach the use, in the presence of a Lewis acid, of a strained cyclic ether in an intermolecular process as an electrophilic partner of a sparteine/organometallic complex. Although Lewis acids have been reported as being capable of activating an epoxide for nucleophilic attack, and alkyl lithium reagents have been reported to react with epoxides that have been activated with BF3.Et2O (see, for example, Yamaguchi, N., Hirao, I., Tetrahedron Lett. 1983, 24, 391-394; Bachi, M. D., Bosch, E., Tetrahedron Lett. 1986, 27, 641-644), such reported activations do not address the chiral synthesis with sparteine-organometallic complexes and Lewis acid-activated strained cyclic ethers from achiral nitrogen-containing heterocycles.
In contrast with the conventional methodologies, embodiments of this invention provide efficient one-step methods for synthesizing versatile precursors of many bioactive molecules in high efficiency and enantioselectrivity by nucleophilic ring opening of a strained cyclic ether by a chiral N-heterocycle-metal-diamine complex, promoted by a Lewis acid.
References cited throughout the specification are incorporated herein by reference.

Synthesis by chiral diamine-mediated asymmetric alkylation


An airplane arresting gear has a generally planar frame (20) having a front end and a rear end that is adapted to be attached at the front end to a structure of the airplane for pivotal movement about a frame pivot axis (FPA) substantially parallel to the airplane z-axis between a stowed position in which the frame (20) resides within the fuselage skin and a deployed position in which the frame (20) extends rearwardly and obliquely downwardly with respect to the x-axis of the airplane. A shank (30) having a cable hook (80) at the rear end is coupled at its front end to the rear end of the frame (20) for pivotal movement about a shank pivot axis between a deployed position in which the shank (30) extends rearwardly from the shank pivot axis and a stowed position in which the shank (30) extends generally forwardly from the shank pivot axis and lies abreast of the frame (20). A deploying damper-actuator (70), which is coupled between the frame (20) and the structure of the airplane moves the frame (20) from the stowed position to the deployed position. A retractor actuator (92), which is likewise coupled between the frame (20) and the structure of the airplane, moves the frame (20) from the deployed position to the stowed position. An actuator mechanism (74), which is connected between the frame (20) and the shank (30), moves the shank (30) between the deployed and stowed positions. An up-swing damper (52) prevents the frame/shank unit (10) from contacting the fuselage.

The arresting gear for an airplane that lands in a very short distance and is stopped by an arresting cable, such as a carrier-based airplane, conventionally includes a tail hook in the form of a unitary, relatively long, arm that is attached by a pivot coupled to a keel member, or a pair of keel members, of the airframe. The tail hook is generally stowed in an upper position either closely adjacent and outside of the skin of the underside of the fuselage or within a cavity in the skin. The tail hook swings down to a deployed position in which a hook on the end of the arm can be caught by an arresting cable. Conventional long arm tail hooks, which may include a damper and a deployment mechanism, generally require a long space within the skin.
The front end of a conventional long arm tail hook is generally attached to the airframe at a point relatively far forward of the rearmost end of the fuselage so that the rear end of the tail hook, when stowed, will not extend beyond the tail end of the fuselage. For airplanes having a single tail engine, such as many carrier-based fighters, the long arm tail hook can interfere with removal of the engine and often must be removed before the engine can be removed.
It is desirable to minimize the load placed on the nose gear of the aircraft during an arrested landing. The vertical location of the tail hook attachment to the airframe determines the loads generated by the arresting cable on the nose gear of the airplane during an arrested landing. In an arrested landing of an airplane, the load created by the arresting cable runs generally from the arresting cable through the attachment point of the tail hook to the airplane. Airplanes having a conventional arresting gear are generally attached at a point on the airframe vertically below the center of gravity. The low vertical attachment of the conventional arresting gear places a large vertical load on the nose gear, because the load line created by the arresting cable passes far below the center of gravity of the airplane.
Modern fighters may require the arresting gear to be enclosed within doors that open to allow the arresting gear to deploy. Many arresting gear configurations are unsuitable to provide this requirement since the closures would be at risk of damage by the cable or arresting hook during an arrestment with the doors opened.


A resistor network for terminating active electronic devices has low cross talk noise between the adjoining resistors and the conductors that connect the resistors to other electronic packages. A substrate has a top and a bottom surface. Resistors are located on the top surface. Conductors are also located on the top surface and are electrically connected to each end of the resistors. Vias extend through the substrate and electrically connect to the conductors. Solder spheres are positioned on the bottom surface and are electrically connected to the vias. An end of each of the resistors is electrically connected in common through a common conductor. The commoned resistors are electrically connected to a common via through the common conductor. The resistor network minimizes cross talk noise between the resistors and provides a high density interconnection.

1. Field of the Preferred Embodiment(s)
This invention generally relates to resistors for electronics. Specifically, the invention is a group of impedance matching or terminating resistors mounted in a high density network or array package using spherical solder connections and having low noise characteristics.
2. Description of the Related Art
Resistor networks are commonly used to terminate high speed digital signal lines to minimize unwanted reflections back through the transmission structure which is typically a printed circuit board. In most applications, the terminations are made by placing a resistor with a resistance matching the impedance of the transmission line, at the end of the transmission line. One end of the resistor is connected to a common termination voltage and the other end is connected to the signal line. For these applications a bussed resistor network is a convenient solution, since one end of the termination is common to all signal lines.
The previous resistor network designs including surface mount, SIP and DIP versions have had resistors and conductor arrangements with individual conductor lines running for a length of some distance on the network before being tied to a common point. This is necessitated because all the external off resistor network connections are made at the periphery of the device and a conductor must be run from the periphery of the device to the individual resistor. The lengthy line length causes each resistor/conductor pair to have a higher mutual inductance between adjoining resistor/conductor pairs and leads to significant cross-talk noise being coupled between the resistor/conductor pairs when the resistor network is employed in its typical use as a terminating or impedance matching resistor for simultaneously switching transistors in an electronic device. As the transistor density and speed of semiconductor devices increase, the problem of cross-talk noise causing an erroneous signal becomes more of a problem in all areas of the electronic package and must be taken into consideration when designing electronic packaging. Further, at high frequencies, the high inductance of the common termination lines can cause a high impedance to appear at the end of the transmission line.
Despite the advantages of each type of prior art resistor network, none have been easily or economically manufactured with a high density of interconnects per unit area on a printed circuit board. In particular, providing the electrical connections only on the periphery of the resistor network causes the electrical leads to be tightly spaced on the edge of the device, while the area in the interior of the device is unused for electrical interconnections.
Therefore, there is a current unmet and heretofore long felt need for a resistor network with higher density, low cross-talk noise and improved signal integrity.

Low cross talk ball grid array resistor network