Embodiments of the invention secure a sufficiently large magnetic field, and deter a protrusion phenomenon of a perpendicular magnetic recording head, causing a problem in implementing a low flying height, while solving problems such as erasure of information in peripheral tracks. In one embodiment, a main pole or a stacked body made up of the main pole, and an auxiliary pole is deposited over an underlayer formed on a substrate so as to be in contact with the underlayer. On top of the main pole or the stacked body, there is deposited a coil, a return pole, and a read element in that order, thereby fabricating a perpendicular magnetic recording head. Further, an additional structure may be added such that an underlayer containing a metal is disposed between the substrate, and the main pole or the stacked body made up of the main pole, and the auxiliary pole, and a heat diffusion layer is disposed between portions of the coil and the substrate, or portions of the coil is disposed closer to the substrate than other portions of the coil.

The present invention relates to a magnetic recording head for use in a magnetic recording drive, and the magnetic recording drive using the same, and in particular, to a perpendicular magnetic recording head that can be driven even at a high frequency, and a small-sized and large-capacity perpendicular magnetic recording drive enabled to operate by using the same.
A magnetic recording drive is provided with a medium for magnetically recording information, a magnetic recording head for writing information to, or reading information from the medium, a write-read operation control circuit for reproducing information on the basis of output signals from the magnetic recording head, and recording information on the basis of signals inputted, a mechanism for rotating or shifting the medium, and a positioning mechanism for determining the position of the magnetic recording head, relative to the medium. On the surface of the medium, there are included regions for recording information, regions for recording servo data for positioning of the magnetic recording head, and linkage regions disposed between those regions. Since no information is recorded in the linkage regions, it is required that the regions for recording information be expanded by setting up the linking regions as small as possible to thereby enhance the capacity of the hard-disk drive.
In order to promote advances in the hard-disk drive towards larger capacity and miniaturization, it has been proposed that for the medium, use is made of a perpendicular magnetic recording medium having a recording layer made of a hard magnetic material that can be easily magnetized in the perpendicular direction against a substrate. It is effective for recording information at higher density in such a perpendicular medium to provide a soft underlayer between the recording layer and the substrate. That is because the soft underlayer provided enables a recording field produced by the magnetic recording head to be enhanced, and read output to be enhanced.
The magnetic recording head comprises a write element for producing the recording field to record information in the medium, and a read element for reproducing signals written on the medium. FIG. 1 shows a section of the magnetic recording head by way of example. An underlayer 11 made of alumina, and so forth, on the order of 1 μm in thickness, is disposed on a substrate 1 made of Al2O3-TiC, and over the underlayer 11, there is disposed a read element 2 formed by sequentially depositing a lower shield layer 21 made of Ni80Fe20, and so forth, on the order of 1 μm in thickness, a magnetoresistive sensor 20, and an upper shield layer 22 made of Ni80Fe20, and so forth, on the order of 1 μm in thickness. Further, a write element 3 is deposited on the read element 2 with a spacer 12 made of alumina, and so forth, on the order of 0.25 μm in thickness, interposed therebetween.
The write element 3 is formed by depositing a return pole 33 made of Ni80Fe20, and so forth, on the order of 2 μm in thickness, coils 35 (parts thereof not shown in the figure) made of Cu, and so forth, on the order of 2 μm in thickness, an auxiliary pole 31 made of Ni80Fe20, and so forth, on the order of 1.5 μm in thickness, and a main pole 30 made of Fe70Co30, and so forth, on the order of 0.2 μm in thickness, in that order. Magnetic fluxes generated by causing a current to flow to the coli 35 are converged by use of a yoke 32 and the auxiliary pole 31 to be guided to the main pole 30. Using magnetic fluxes passing through the tip of the main pole 30, information is written to a medium (not shown in the figure). Magnetic fluxes passing through the medium are fed back to the main pole 30 through the return pole 33.
FIG. 2 is a perspective view showing the write element 3. The coils 35 are not shown in the figure. The auxiliary pole 31 is in a plane shape tapered towards an air bearing surface 4 to cause magnetic fluxes to efficiently converge on the main pole 30. Further, as disclosed in, for example, JP-A No. 36503/2003, because the auxiliary pole 31 is disposed so as to be deposited on the underside of the main pole 30, and further, is recessed from the air bearing surface 4, magnetic fluxes leaking from the auxiliary pole 31 have no adverse effect on recording.
In JP-A No. 101612/2001, it is disclosed that an auxiliary magnetic pole, a main pole, and a return pole are preferably disposed in that order from the side of a substrate for recording information sharply.

Perpendicular recording head with reduced thermal protrusion

Hitachi Global Storage Technologies Netherlands B.V.


A semiconductor device comprises a substrate (100), first conductive film (22 and 32) over the substrate (100), and a second conductive film (54 and 64) over the first conductive film (22 and 32). The first conductive film includes a refractory metal and nitrogen. The first conductive film has a first portion (22) that lies closer to the substrate and a second portion (32) that lies further from the substrate. The nitrogen percentage for the second portion (32) is lower than the nitrogen atomic percentage for the first portion (22). The second conductive film (54 and 64) includes mostly copper. The combination of portions (22 and 32) within the first conductive film provides a good diffusion barrier (first portion) and has good adhesion (second portion) with the second conductive film (54 and 64).

Typically metalization schemes require barrier or adhesion films in order for a metal film to properly adhere to and make good contact resistance with underlying layers. A common metalization scheme for aluminum interconnects uses a combination of a titanium film followed by a titanium nitride film, over which, an aluminum or an aluminum alloy film is deposited. Aluminum suffers from several problems, such as its relative high resistance compared to copper and electromigration problems.
Attempts have been made to use tantalum and tantalum related compounds in forming interconnect structures. For example, either a pure tantalum film or a tantalum nitride film is used as a barrier/adhesion film for a copper interconnect. However, tantalum can be very difficult to remove using a polishing process, and tantalum nitride has adhesion problems with some types of copper films.
Other barrier/adhesion films could be used for the interconnect schemes. In one, a titanium film is deposited followed by a titanium nitride film that is followed by a titanium-rich titanium nitride film. Following the deposition of the titanium-rich titanium nitride film, an oxygen plasma is then used to convert that film to a titanium oxynitride compound. Unfortunately, titanium oxynitride can be too resistive. Although tantalum can be used in place of titanium in the oxynitride compound, the problems with the relatively high resistance is expected to continue to be a problem.
In another interconnecting scheme, an aluminum or aluminum alloy film can be capped with a titanium-rich titanium nitride compound followed by a stoichiometric titanium nitride compound. As previously discussed, copper does not adhere to titanium nitride very well. Even if tantalum is used to replace the titanium, the adhesion problem still exists with tantalum nitride.

Process for forming a semiconductor device


Semiconductor devices and methods of manufacturing such devices are disclosed. In one embodiment of this invention, a semiconductor chip is bonded to a first surface of a substrate. The substrate extends beyond the edge of the chip. Signal input/output pads on the chip are juxtaposed with an opening in the substrate. A molded support is formed on the portion of the first surface of the substrate that extends beyond between the sidewall of the edge of the chip. The support prevents bending of the substrate, and allows solder balls to be formed on the entire area of a second surface of the substrate opposite the first surface of the substrate. A heat dissipating plate is mounted on a surface of the chip opposite the substrate. The heat dissipating plate is attached to the support.

The present invention relates, in general, to semiconductor devices and a method of manufacturing such devices and, more particularly, to a semiconductor device having a substrate on one surface of a semiconductor chip, the substrate extending on the chip so as to exceed the outside edge of the chip, thus carrying an increased number of solder balls or signal input/output terminals on the device and being almost free from being bent, and effectively dissipating heat from the chip to the atmosphere, the invention also relating to a method of manufacturing such a semiconductor device.
As is well known to those skilled in the art, a semiconductor device is used for mounting a semiconductor chip on a mother board in addition to intermediating input/output signals between the chip and the mother board. In accordance with the recent trend of compactness, lightness, thinness and smallness of semiconductor chips, it has been necessary to make the semiconductor device compact, light, thin and small.
FIG. 1 shows a conventional semiconductor device 100xe2x80x2. In the drawing, the semiconductor device 100xe2x80x2 is shown while being inverted for ease of description.
As shown in the drawing, the conventional semiconductor device 100xe2x80x2 comprises a semiconductor chip 40xe2x80x2, having a plurality of signal input/output pads or edge pads 41xe2x80x2 on its upper edge. A substrate 10xe2x80x2 is formed on the upper surface of chip 40 as follows. A polyimide layer 12xe2x80x2 is attached to the upper surface of the chip 40xe2x80x2 with an adhesive layer 21xe2x80x2 being interposed between the chip 40xe2x80x2 and the polyimide layer 12xe2x80x2. The above substrate 10xe2x80x2 also comprises a plurality of circuit patterns formed on the polyimide layer 12xe2x80x2. Each of the circuit patterns consists of a solder ball land 15xe2x80x2. A connector 14xe2x80x2 extends from the solder ball land 15xe2x80x2 and has a lead 13xe2x80x2 at its outside end, and is connected to an associated signal input/output pad 41xe2x80x2 of the chip 40xe2x80x2 at the lead 13xe2x80x2 using an electric connecting means 50xe2x80x2. A cover coat 16xe2x80x2 is coated on both the connectors 14xe2x80x2 of the above circuit patterns and the upper surface of the polyimide layer 12xe2x80x2. In order to protect the pads 41xe2x80x2 of the chip 40xe2x80x2, the electric connecting means 50xe2x80x2 and the leads 13xe2x80x2 from the atmospheric environment, the upper edge of the chip 40xe2x80x2 is packaged using a packaging material, thus forming a packaging part 60xe2x80x2. A solder ball 70xe2x80x2 is welded to each of the solder ball lands 15xe2x80x2 and is used for mounting the semiconductor device 100xe2x80x2 on a mother board.
Such semiconductor devices 100xe2x80x2 may be produced as follows. In a first conventional process, a plurality of semiconductor chips are primarily attached to the lower surface of a wafer-shaped substrate using an adhesive layer, thus performing a wafer lamination step. Thereafter, an electric connection step is performed. In the electric connection step, each signal input/output pad of each of the semiconductor chips is connected to an associated lead of the circuit patterns of the substrate using an electric connecting means. The electric connection step is followed by a packaging step wherein the upper edge of each of the semiconductor chips is covered with a packaging part so as to protect the electric connection part, comprising the signal input/output pads, the electric connecting means and the leads, from the atmospheric environment. Thereafter, a solder ball welding step, wherein a plurality of solder balls are welded to the solder ball lands of the substrate, is performed. A singulation step follows the solder ball welding step. In the singulation step, the wafer, with the substrate, is divided into a plurality of semiconductor devices.
Alternatively, the semiconductor devices may be produced through a second process. In the second process, a plurality of semiconductor chips are bonded to a rectangular or regular square substrate strip prior to performing the same electric connection step, packaging step, solder ball welding step and singulation step as that described for the first process.
In recent years, it is necessary to carry an increased number of signal input/output pads on a semiconductor chip in accordance with a development in the semiconductor chip integration technology. Therefore, it is also necessary to increase the number of solder balls formed on each semiconductor device. However, since the conventional substrate is formed on a limited area of one surface of a semiconductor chip as described above, the area of the substrate is smaller than that of the chip. This limits both the number of circuit patterns and the number of solder balls formed on each substrate.
In order to overcome the above-mentioned problems, the substrate may extend in a way such that it exceeds the outside edge of the chip. However, since the substrate is made of a flexible material, the enlarged substrate is partially and easily bent at a portion outside the edge of the chip. When a solder ball is carried on the portion of the substrate outside the edge of the chip, the substrate regrettably fails to firmly or effectively support the solder ball on that portion.
Another problem, experienced in the conventional semiconductor device, resides in that the device fails to effectively dissipate heat from the semiconductor chip into the atmosphere during an operation of the device. That is, in accordance with the recent trend of high integration degree and high operational frequency of semiconductor chips, each semiconductor chip emits a large quantity of heat during an operation of the device. However, the conventional semiconductor device does not have any structure designed to effectively dissipate the heat to the atmosphere, thus being reduced in its electric performance and causing an operational error of the chip.
Accordingly, the present invention has been made keeping in mind the above problems occurring in the prior art, and an object of the present invention is to provide a semiconductor device, of which the substrate extends on one surface of a semiconductor chip so as to exceed the outside edge of the chip and has an area larger than that of the chip, thus effectively carrying an increased number of circuit patterns and solder balls or signal input/output terminals on the device.
Another object of the present invention is to provide a semiconductor device, of which the electric connection part, comprising the bond fingers of the substrate and the signal input/output pads of the chip, is primarily packaged with a packaging material, thus being prevented from unexpected separation during a process of manufacturing the device, and which is secondarily packaged with a packaging material so as to enhance the bonding strength between the chip and the substrate, thus preventing an undesirable bending of the substrate and firmly supporting the solder balls carried on the substrate, and increasing the bonding strength at the junction between the parts of the device.
A further object of the present invention is to provide a semiconductor device which more effectively and quickly dissipates heat from the semiconductor chip into the atmosphere, thus being almost free from a reduction in its electric performance and being almost free from any operational error of the chip.
Still another of the present invention is to provide a method of manufacturing the above-mentioned semiconductor device.
In order to accomplish the above objects, an embodiment of the present invention provides a semiconductor device, comprising: a semiconductor chip having a plurality of signal input/output pads on one surface thereof; a substrate having a plurality of regularly arranged circuit patterns and an area larger than that of the semiconductor chip, each of the circuit patterns consisting of a solder ball land and a bond finger extending from the solder ball land, with a cover coat covering the circuit patterns except for an area corresponding to both the solder ball lands and the bond fingers, the substrate also having a hole at a position around the bond fingers; an adhesive layer adapted for bonding the substrate to the semiconductor chip with the signal input/output pads being exposed to an outside of the substrate through the hole of the substrate; electric connection means for electrically connecting each of the bond fingers of the substrate to an associated signal input/output pad of the chip, the electric connection means passing through the hole of the substrate; a primary packaging part adapted for packaging both the electric connection means and the signal input/output pads positioned inside the hole of the substrate; a second packaging part adapted for packaging an, area defined between a sidewall of the semiconductor chip and the substrate; and a solder ball welded to each of the solder ball lands provided on the substrate.
In the above semiconductor device, a polyimide layer may be formed between the adhesive layer and the circuit patterns.
In addition, a metal core layer may be formed between the polyimide layer and the adhesive layer.
The primary packaging part is preferably made of a liquid packaging material, while the second packaging part is preferably made of an epoxy molding compound.
In the present invention, the sidewall of the second packaging part may be aligned with the edge of the substrate.
The sidewall of the second packaging part may be positioned inside the edge of the substrate.
The sidewall of the second packaging part may be parallel to the sidewall of the semiconductor chip, or may be inclined downwardly relative to the sidewall of the semiconductor chip at an acute angle.
The surface of the semiconductor chip opposite to the surface having the signal input/output pads may be leveled with the surface of the second packaging part opposite to the substrate contact surface of the second packaging part.
In addition, a heat dissipating plate may be attached to the surface of the semiconductor chip opposite to the surface having the signal input/output pads.
The sidewall of the heat dissipating plate is covered with the second packaging part.
The surface of the heat dissipating plate opposite to a chip contact surface of the plate is leveled with the surface of the second packaging part opposite to the substrate contact surface of the second packaging part.
The electric connection means is preferably selected from a conductive wire and a lead.
In an embodiment of present invention, the circuit patterns comprise: a plurality of first circuit patterns formed on the substrate at a position corresponding to the surface of the semiconductor chip; and a plurality of second circuit patterns formed on the substrate at a position outside the edge of the semiconductor chip, with the hole being formed between the first and second circuit patterns while separating the first and second circuit patterns from each other.
The first packaging part may pass through the hole of the substrate prior to being brought into contact with the second packaging part.
The second packaging part may package an area defined between the second circuit patterns and the sidewall of the semiconductor package, thus supporting the substrate having the second circuit patterns thereon.
The signal input/output pads are arranged along opposite edges of the semiconductor chip.
An embodiment of present invention also provides a method of manufacturing a semiconductor device, comprising the steps of: preparing a substrate having upper and lower surfaces and a plurality of regularly arranged circuit patterns, each of the circuit patterns having upper and lower surfaces and consisting of a solder ball land and a bond finger extending from the solder ball land, with a cover coat covering the circuit patterns except for an area corresponding to both the solder ball lands and the bond fingers, the substrate also having a hole at a position around the bond fingers; bonding a semiconductor chip, having both an area not larger than of the substrate and a plurality of signal input/output pads, to the substrate using an adhesive layer in a way such that the signal input/output pads are exposed to an outside of the substrate through the hole of the substrate; electrically connecting each of the circuit patterns of the substrate to an associated signal input/output pad of the chip using an electric connection means passing through the hole of the substrate; primarily packaging both the electric connection means and the signal input/output pads positioned inside the hole of the substrate, thus forming a primary packaging part; secondarily packaging an area defined between a sidewall of the semiconductor chip and a lower surface of the substrate, thus forming a second packaging part; and welding a solder ball to each of the solder ball lands provided on the substrate.
In the above method, the substrate may further comprise a polyimide layer formed on the lower surface of the circuit patterns.
The above polyimide layer may be formed on a metal core layer.
An embodiment of the circuit patterns comprise: a plurality of first circuit patterns formed on the substrate at a position corresponding to the surface of the semiconductor chip; and a plurality of second circuit patterns formed on the substrate at a position outside the edge of the semiconductor chip, with the hole being formed between the first and second circuit patterns.
The second packaging part allows the lower surface of the semiconductor chip to be exposed to the atmosphere.
In the above method, the second packaging step may be performed with a heat dissipating plate being positioned on a lower surface of the semiconductor chip.
The first and second packaging steps may be performed while allowing the first packaging part to be brought into contact with the second packaging part.
The second packaging step may be performed so as to allow the second packaging part to package the area defined between the second circuit patterns and the sidewall of the semiconductor package, thus supporting the substrate having the second circuit patterns thereon.
In the above method, the electric connection means may be selected from a conductive wire and a lead.
In accordance with an embodiment of the present invention, the substrate, having an area larger than that of a semiconductor chip, is bonded to one surface of the chip and extends so as to exceed the edge of the chip, thus carrying an increased number of circuit patterns and an increased number of solder balls.
In addition, a second packaging part is formed on an area defined between the sidewall of the semiconductor chip and the lower surface of the substrate exceeding the edge of the chip. The portion of the substrate, exceeding the edge of the chip, is thus firmly supported by the second packaging part and is prevented from being bent. The second packaging part also firmly supports the solder balls welded to the upper surface of the substrate.
The semiconductor device of this invention is also designed to dissipate heat from the semiconductor chip into the atmosphere through the lower surface of the chip or through a heat dissipating plate mounted to the lower surface of the chip. Therefore, the semiconductor device is almost completely free from a reduction in the electric performance of the chip or an operational error of the chip during an operation.

Semiconductor device and method of manufacturing such device


A solar battery unit (100) is provided that includes: a substrate (120); a solar battery (110) attached to a back face of the substrate (120); and a communications module (130) attached to the substrate (120). The communications module (130) includes an antenna (132) disposed so as not to overlap solar cells (115) in the solar battery (110) in a front view.

Solar battery units have been known that include a solar battery and a communications antenna among others. As an example, International Japanese Patent Application Publication, Tokukou, 2017/013940 (Patent Literature 1) discloses a communications device. Patent Literature 1 provides a communications device including: a solar battery having a light-receiving face where emission light is received; a power storage device disposed on the opposite face from the light-receiving face; and a circuit substrate disposed on the opposite face of the power storage device from another face thereof facing the solar battery, the circuit substrate including a communications antenna.

Solar battery unit and wireless transmitter including solar battery unit


A router device is provided with a plurality of router node devices interconnected via internal transmission lines, in which each of the plurality of router node devices comprises a unit for connecting to a plurality of networks; a routing table describing paths via which packets are forwarded; a forwarding unit for forwarding a packet between one network and another, and for forwarding the packet between the network connected to the router node device and the network connected to some other router node device of the router device via some other router node device, according to the routing table; a routing information collection unit for collecting routing information from each router device connected to the network, not via other router node devices, to the router node device to create a routing table in each router device, the routing information being information to be exchanged among router devices, a distribution unit for distributing the collected routing information to other router node devices via the internal transmission lines; and a routing table generation unit for generating the routing table based on the collected routing information and the routing information distributed from the other router node devices.

1. Field of the Invention
This invention relates to technology for routing packets over a network, and more particularly to technology for a router device, composed of a plurality of interconnected router node devices and externally behaving as a single router, to send and receive routing information to or from other routers.
2. Description of Related Art
A router which transfers packets from a terminal on a network to a terminal on another network exchanges routing information with another router to perform dynamic routing and, based on this routing information, generates a table, called a routing table, which contains a set of entries that each specify a packet destination address and the next-hop used to reach that destination.
Two protocols are known for exchanging routing information and for generating a routing table based on the information: one is a Distance Vector Algorithm (DVA) based protocol, such as Routing Information Protocol (RIP) stipulated by Request for Comments (RFC) 1058 prepared by the Internet Engineering Task Force (IETF) and issued from the Internet Architecture Board (IAB), and the other is a Link-State Algorithm (LSA) based protocol such as Open Shortest Path First (OSPF) stipulated by RFC 1247.
A RIP-based router exchanges routing table entries with another router and determines a routing path according to the number of hops (the number of routers to the destination), while an OSPF-based router exchanges network connection state information (addresses and so on) and determines a path based on a cost determined by considering many factors including the number of hops. It should be noted that, in exchanging routing information among routers, a particular packet called a routing protocol packet is used.
To increase performance, a router has been proposed which has its function divided into two (using two processors): a packet forwarding function and a routing table generation function. This configuration prevents the packet forwarding function from being affected by the load on the routing table generation function. This technology is described in xe2x80x9cPacket Magazine Third Quarter 1995xe2x80x9d published by Cisco.
The present inventors have been studying so as to accomplish a router device capable of processing at higher speed using a router configured of two portions, one is a part for forwarding packets and the other is a part for executing a protocol for generating a routing table as described above. As an example, they have proposed that a plurality of routers configured as described above are used as router nodes interconnected via a plurality of high-speed transmission lines to have a single router. Such a configuration have been described in the Japanese Patent Application (Hei 10-185921).
As a method for generating routing tables on such a router composed of a plurality of router nodes using the table generation method designed for use on a conventional router not composed of a plurality of router nodes, the present inventors have proposed that one of the following two methods is used.
In the first method, each router node acts as if it was a conventional router not composed of a plurality of nodes. In this case, each router node exchanges routing protocol packets with other routers and other router nodes connected to that router node to create its own routing table.
In the second method, one of the plurality of router node units stores therein the routing information on all other router nodes and only this router node exchanges routing protocol packets with all other routers connected to the router device composed of the plurality of router nodes. Collected routing information is then distributed to all other router nodes.
However, in the first method, one router node must be equivalent to one router when sending or receiving routing protocol packets and generating the routing table. Therefore, a router composed of a plurality of router nodes must be equivalent, at least, to one network or one sub-net composed of a plurality of routers. This means that a host address must be assigned to each router node and that one network address or sub-net address must be assigned to the router composed of the plurality of router nodes. Thus, this method results in inefficient address usage.
In the second method, the router node which processes routing protocol packets for the plurality of nodes is too busy to generate or update routing table entries within an allowable time, sometimes discarding packets or causing a traffic problem.
It is an object of the present invention to provide a router device composed of a plurality of router nodes to perform routing protocol processing without using extra addresses and without exerting a heavy load on a particular router node.
To achieve the above object, the present invention provides, for example, a method for use in a router device which connects to a plurality of networks and in which a plurality of router node devices, each forwarding packets according to a routing table describing paths via which the packets are forwarded, are interconnected by internal transmission lines. The method, provided for processing a routing protocol for generating the routing table, wherein a process in said routing protocol processing, for collecting routing information requested for generating the routing table from the other router device, comprises the steps of causing each of the router node devices to collect routing information from router devices connected to the network connected, not via other router nodes, to the router node device; and collecting and integrating the routing information collected by each router node device via the internal transmission lines.
In this processing method, because each router node performs a part of the processing performed by one router device, a router device composed of a plurality of router nodes may be treated as a single router device from the viewpoint of address usage. Thus, there is no need to assign network addresses or sub-net addresses to a router device composed of a plurality of router nodes. In addition, the plurality of router nodes collect routing information from other router devices connected to the router device, preventing the processing load from being concentrated on a particular router node.

Scalable cluster-type router device and configuring method thereof


A frequency error detector which is independent of channel distortion and determines in a receiver the frequency deviation between the carrier frequency generated in the receiver and the carrier frequency of a received signal has a first differential power meter that forms the power difference between spectral components that are symmetrical with the receiver carrier frequency and belong to the received signal spectrum, and it has a second differential power meter that forms the power difference between spectral components that are symmetrical with the receiver carrier frequency and belong to the spectrum formed by undersampling of the received signal. The sum of the output signals of the two differential power meters provides information on the frequency deviation.

Frequency error detectors are used for automatic frequency control (AFC) in control loops that are in radio transmission receivers, for example, for coherently modulated signals (e.g., quad amplitude modulation, QAM) to adjust the carrier frequency of the receiver to the carrier frequency of the transmitter, i.e., the carrier frequency of the received signal. In addition, these receivers for coherently modulated signals often have another closed loop for carrier phase synchronization which is capable of synchronization in the case of relatively small frequency deviations. The frequency error allowed in synchronization of the carrier phase is called the lock-in range. Since the transmission carrier frequency is not known at the start of a transmission or after a system failure, the receiver must be capable of reliably estimating this frequency. The accuracy of this estimation must be within the lock-in range of the carrier phase synchronization. The size of this lock-in range depends on several system parameters of the broadcast system. Narrow-band broadcast systems with a high number of modulation levels have a smaller lock-in range, but broad-band systems with fewer modulation levels have a larger lock-in range.
A conventional frequency error detector includes a suitable device that synchronizes the carrier frequency of the receiver at the transmission carrier frequency. This conventional device measures the differential power of the received signal spectrum symmetrically with the center of the band. An error signal generated in this way will disappear at the correct carrier frequency in the receiver. A quadricorrelator as descrived in German Patent No. 37 07 762 is one such frequency error detector. This quadricorrelator reacts very sensitively to signal distortions; i.e., it supplies false information about the frequency deviation when the received signal spectrum is skewed because of channel distortion. Straight-line broadcast systems usually have great channel distortion. Therefore, the background art frequency error detector would not be suitable for a receiver in a transmission system where channel distortion is expected.
The object of the present invention is therefore to provide a frequency error detector that will supply the most accurate possible information about the deviation in the carrier frequency in the receiver in comparison with the transmitted carrier frequency regardless of channel distortions.


There is provided a capacitive touch system including a gain control unit sequentially receiving a plurality of digital detected signals of a detection frame. The gain control unit includes a gain buffer and a control circuit. The gain buffer is configured to store a current gain sheet. The control circuit calculates a first gain sheet according to a setpoint and the digital detected signals of the detection frame, compares a current roughness of the current gain sheet with a first roughness of the first gain sheet and replaces the current gain sheet in the gain buffer by the first gain sheet when the first roughness is flatter than the current roughness.

1. Field of the Disclosure
This disclosure generally relates to an input system and, more particularly, to a capacitive touch system and a gain control method thereof.
2. Description of the Related Art
The capacitive touch system generally includes a touch panel configured to detect the approaching or touching of at least one conductor. The touch panel includes a plurality of sensing cells configured to sense the capacitance variation induced by the conductor and to output varying detected signals.
The detected signals outputted by the sensing cells are sequentially amplified and filtered by an analog front end and then inputted into a digital back end. The digital back end generally includes a gain amplifier configured to keep each of the digitized detected signals at a substantially identical digital value when no touch event occurs. For example, a gain sheet may be previously set before shipment such that the digitized detected signals associated with every sensing cell may have substantially identical digital values in a non-touch state. However, the gain sheet is fixed and can not be changed according to the change of operation conditions, e.g. the operation temperature or aging, such that misidentification may occur during operation.
Accordingly, the present disclosure further provides a capacitive touch system and a gain control method thereof that may automatically update the gain sheet according to the roughness of touch data in actual operation so as to effectively improve the detection accuracy.

Capacitive touch system and gain control method thereof


Techniques are disclosed for reducing database workload in implementing selective subfolder synchronization in a cloud-based environment. In one embodiment, a method comprises, in response to a selection, from a user, of a first synchronization state of a first folder in the workspace, synchronizing content of the first folder in the workspace with a corresponding folder on devices of a user (and collaborators) based on the first synchronization state. The workspace is shared among the user and one or more collaborators of the user. In some embodiments, the method further comprises determining the first synchronization state of the first folder based on synchronization states of one or more folders, other than the first folder, that are related to the first folder. The entries can be configured to identify hierarchical relationships between the one or more folders and the first folder on a per-user basis.

With the advancements in digital technologies, data proliferation and the ever increasing mobility of user platforms have created enormous amounts of information traffic over mobile and computer networks. This is particularly relevant with the increase of electronic and digital content being used in social settings or shared environments of digital content compared to traditional stand-alone personal computers and mobile devices. As a result, content is shared across multiple devices among multiple users.
However, to date, content sharing and content synchronization lacks an intuitive manner in which content or folders/files in a shared space among multiple users can be accessed and/or synchronized in a user friendly manner. Further, the amount of data that servers have to process in order to coordinate the synchronization statuses for folders among multiple users can increase dramatically with the increasingly large amount of folders and users involved in a shared space.
The same reference numbers and any acronyms identify elements or acts with the same or similar structure or functionality throughout the drawings and specification for ease of understanding and convenience.

Server side techniques for reducing database workload in implementing selective subfolder synchronization in a cloud-based environment


A discharge lamp lighting device has an oscillation control circuit for determining a frequency with time constant of R and C, a L-C series resonant circuit connected to a half bridge or full bridge operating at the frequency and a circuit in which one end of hot cathodes at both ends of a hot cathode type discharge tube are respectively connected to both ends of a resonant capacitor. A capacitor is further connected in series to other ends of filaments at both ends of the discharge tube for lighting. Dimming of tube current is achieved by changing the oscillation frequency with a DC dimming control voltage by use of a variable capacitor or diode for determining the frequency of the oscillation control circuit. By simultaneously changing the tube current and a filament current of the discharge lamp, the tube current is decreased upon dimming and the filament current is increased.

There has conventionally been provided a discharge lighting device capable of performing dimming control of a hot cathode type discharge lamp such as a fluorescent lamp. In the case of dimming, as a tube current is decreased (dimming level is increased), a filament temperature is decreased, and as the tube current is further decreased, discharge cannot be maintained, which in turn causes moving striations and flickering.
A conventional device addressing such a problem is described in, for example, Patent document 1. As illustrated in FIG. 13, the conventional device is configured to include four power supplies including an inverter power supply 1 for lighting, a DC-DC power supply 3 for lighting, a DC-DC power supply 4 for preheating, and an inverter power supply 2 for preheating filter. Dimming is performed by varying an output voltage of the DC-DC power supply 3 for lighting. Control of a filament current is performed by connecting the output voltage of the DC-DC power supply 3 for lighting to a feedback circuit 5 for the DC-DC power supply 4 for preheating, and varying an output voltage of the inverter power supply for preheating 2 in proportional to a level of the dimming.    Patent document 1: Japanese Unexamined Patent Publication No. 1995-211478    Patent document 2: Japanese Unexamined Patent Publication No. 2001-357994


The invention relates to a microscope (10) having an illumination apparatus (26) having a light source (1) and an optical system. The light source (1) is embodied to output a coherent light beam bundle along a defined illumination beam path (2a), and the optical system in the illumination beam path (2a) encompasses a spatial light modulator (3) for modifying the illuminated field (4). A surgical microscope (10) is preferably equipped with an illumination apparatus (26) of this kind that is arranged adjustably in two directions on the surgical microscope (10).

A slit lamp is generally understood to be an illumination apparatus that is used to view the front portion of the eye (lens and proximal vitreous body, and for inspection when fitting contact lenses). With the aid of the slit image, structures and layers in the eye can be better recognized during diagnostic and surgical procedures. Surgical slit lamps are used for the most part in combination with a surgical microscope in intraocular and especially in retinal surgery. By means of the rectangular illuminated field on the retina, membranes that have become diseased, which are very thin but nevertheless greatly reduce the patient's sight, can be detected early and successfully operated on.
Surgical slit lamps of this kind are on the market, for example, under the name "Leica Slit Illuminator," and are described in Leica Selling Guide OPH 07/02, page 10.5.
The lamp housings of these surgical slit lamps are very bulky, however, because of the light source incorporated thereinto, which is usually a halogen lamp. In addition, such known surgical slit lamps contain not only the light source but also the imaging optics and the aperture that generates the slit. Efforts have been made to minimize the size of surgical lamps by at least replacing the halogen lamp with a fiber-optic light supply system (e.g. DE-C2-4227942).
The obligatory mounting location for surgical slit lamps is below the main objective of a surgical microscope. Bulky structures at this mounting location are undesirable, however, because they reduce the open working distance and are thus disadvantageous for the overall handling of the surgical microscope.

Microscope having a surgical slit lamp having a laser light source


A method and apparatus are disclosed for providing pre-pay and post-pay calls. After receiving a pre-pay call, an integrated service platform obtains and transfers a pre-pay destination number and a pre-pay validation parameter to a switching system. The switching system then releases the pre-pay call extension to the integrated service platform and extends the pre-pay call using the pre-pay destination number. As the pre-pay call is in progress, the switching system monitors a duration of the pre-pay call and terminates the pre-pay call if the duration meets or exceeds a pre-pay amount indicated by the pre-pay validation parameter. In this manner, integrated service platforms, as required by prior approaches, are no longer required to be connected to the pre-pay call for the entire duration of the pre-pay call. Rather, an integrated service platform can request and receive authorization and call destination information, then be released for use by other calls. After receiving the post-pay call, the integrated service platform obtains and transfers a post-pay destination number and a post-pay validation parameter to the switching system. The switching system then releases the post-pay call extension to the integrated service platform and extends the post-pay call using the post-pay destination number if the post-pay validation parameter allows the post-pay call. One advantage for post-pay calls is the provision of post-pay calls service such as messaging and validation is centralized in the integrated service platform, which reduces the time and cost of maintaining the post-pay service.

1. Field of the Invention
This invention relates to communication networks, and more particularly, to a system for providing pre-pay and post-pay calls using an integrated service platform connected for a portion of the calls.
2. Description of the Prior Art
As is the case for most businesses, telecommunication service providers desire to increase their profits. Typically, profits are increased by offering new products and services, and by reducing costs associated with providing products and offering services. Communication service providers typically offer services on a very large scale, such as on a nationwide basis. In this environment, communication providers can substantially reduce costs by decreasing the number of network resources required for offering a service.
Communication providers today offer many types of communication services, including pre-pay and post-pay calling card services. In a pre-pay calling card service, a caller obtains a pre-pay account with an amount such as monetary amount or a period of time that is debited against when a pre-pay call is made. Typically, a caller calls an 800 number to place the pre-pay call and enters the pre-pay account number and destination phone number. In a post-pay calling card service, the caller pays for the post-pay call after the post-pay account is charged with the post-pay call and the caller is billed. With some post-pay calling card services, there is a credit limit that is not to be exceeded for a post-pay account. Current implementations of these services require different platforms, despite the similar functions being performed to implement these services. For example, current implementations of pre-pay and post-pay calling card services use separate and distinct validation servers.
FIG. 1 depicts a system level block diagram for prior solutions of pre-pay calling card services, post-pay calling card services, and "connect to resource" services. FIG. 2 depicts a message sequence chart for a prior solution of providing pre-pay calling card services. In FIG. 2, a first switch 110 receives a pre-pay call over a link 102. The first switch 110 then processes the pre-pay call and transmits a route query for a Service Control Point (SCP) 150 via a link 106, a signal transfer point 140, and a link 108. The first switch 110 receives a routing instruction from the SCP 150. Using information from the routing instruction, the first switch 110 routes the pre-pay call to a service platform 160 via a link 112, a third switch 130, and a link 128. The service platform 160 then collects the digits from the pre-pay call for the pre-pay account code and destination number. The service platform 160 validates and rates the collected digits. If the pre-pay account code and destination number are valid, the service platform 160 extends the pre-pay call to the destination phone via the link 128, the third switch 130, a link 126, a second switch 120 and a link 124. The service platform 160 monitors a duration of the pre-pay call and terminates the pre-pay call if the call duration exceeds the number of remaining units on the pre-pay account. One disadvantage with this solution is the pre-pay call is extended through the first switch 110, third switch 130, the service platform 160, and the second switch 120. Thus, many network resources are utilized, which unnecessarily burdens the service platform 160 and the 3rd switch 130 for the pre-pay call to reach its destination.
FIG. 3 depicts a message sequence chart for a prior solution of providing post-pay calling card services. In FIG. 3, the first switch 110 receives the post-pay call over the link 102. The first switch 110 then processes the post-pay call. The first switch 110 collects the digits from the post-pay call for a post-pay account code and a post-pay destination number. The first switch 110 then transmits a validate code query for the SCP 150 via the link 106, the signal transfer point 140, and the link 108. The first switch 110 receives a validate code response from the SCP 150. If the post-pay account code is valid based on the validate code response, the first switch 110 extends the post-pay call to the destination phone via a link 114, the second switch 120, and the link 124. Once the post-pay call is completed, the first switch 110 generates billing information for the post-pay account code. The disadvantage with this solution is the maintenance and cost problems of providing the post-pay call service. In this solution, the first switch 110 performs the majority of the post-pay call service such as collecting digits and validating caller digits. Thus, a simple change in post-pay call service would have large costs to distribute the change to each switch that performs post-pay call service.
FIG. 4 depicts a message sequence chart for a prior solution of providing "connect to resource" call processing services. In FIG. 4, the first switch 110 receives the call over the link 102 from a user that requires voice response interaction before the call is connected to the called destination. The first switch 110 then processes the call and transmits a route query for the SCP 150 via the link 106, the signal transfer point 140, and the link 108. The first switch 110 receives a routing instruction from the SCP 150 that routes the call from the first switch 110 to the service platform 160. The SCP 150 also transmits a context message containing call information to the service platform 160 via the link 116. Using information from the routing instruction, the first switch 110 routes the call to the service platform 160 via the link 112, the third switch 130, and the link 128. After receiving the call and the context information from the SCP 150, the service platform 160 plays a prompt message and collects information from the caller. The service platform 160 processes the call by processing the information and sending a transfer request message to the SCP 150 via the link 116. The SCP 150 processes the transfer request message and transmits a destination instruction to the first switch 110 via the link 108, the signal transfer point 140, and the link 106. The first switch 110 then disconnects the call between the first switch and the service platform 160 and extends the call to the destination phone via the link 114, the second switch 120, and the link 124.
The "connect to resource" solution is further described in a pending U.S. patent application Ser. No. 09/063,902 entitled "Telecommunications Resource Connection and Operation Using a Service Control Point", filed on Apr. 21, 1998, and is hereby incorporated by reference.
Current pre-pay and post-pay implementations do not provide enough flexibility for providing new services, such as providing customized greetings that are easily and dynamically changeable. Currently, post-pay call greetings are played to a customer by a switching system and a voice response unit, which cause the greetings to be very expensive to change, and do not provide enough flexibility.

This patent is subject to a terminal disclaimer.

Method and apparatus for providing pre-pay and post-pay communication services using the same integrated system


Nuclear reactor components are treated with thermal methods to increase wear resistance. Example treatments include thermal treatments using particulate or powderized materials to form a coating. Methods can use cold spray, with low heat and high velocities to blast particles on the surface. The particles impact and mechanically deform, forming an interlocking coating with the surface and each other without melting or chemically reacting. Materials in the particles and resultant coatings include metallic alloys, ceramics, and/or metal oxides. Nuclear reactor components useable with methods of increased wear resistance include nuclear fuel rods and assemblies containing the same. Coatings may be formed on any desired surface, including fuel rod positions where spacer contact and fretting is most likely.

Boiling water nuclear reactors operate for many years. Commencing with their initial construction and through their service lives, these reactors may accumulate debris in their closed circulation moderator systems. This debris can become an operating hazard if the debris is allowed to enter into the fuel bundle-containing core region. In order to understand this problem, a summary of reactor construction as it relates to the accumulation of debris in the core is described, as well as fuel bundle construction and the effects of debris entering into the fuel rod region of the fuel bundles.
Boiling Water Reactors are provided with a large, central core. Liquid water coolant/moderator flow enters the core from the bottom and exits the core as a water steam mixture from the top. The core includes many side-by-side fuel bundles. Water is introduced into each fuel bundle through a fuel bundle support casting from a high pressure plenum which is situated below the core. Water passes in a distributed flow through the individual fuel bundles, is heated to generate steam, and exits the upper portion of the core as a two phase water steam mixture from which the steam is extracted for the generation of energy.
The core support castings and fuel bundles are a source of pressure loss in the circulation of water through the core. This pressure loss assures the substantially even distribution of flow across the individual fuel bundles of the reactor core. There may be approximately 750 individual fuel bundles in a reactor core, so uniformity of flow distribution is important. To interfere with the pressure drop within the fuel bundles could affect the overall distribution of coolant/moderator within the fuel bundles of the reactor core.
The fuel bundles for a boiling water nuclear reactor include a fuel rod supporting lower tie plate assembly, in which the lower tie plate is a cast structure. The lower tie plate assembly includes at its lowest point a downward protruding bail covering an inlet nozzle. This inlet nozzle includes entry to an enlarged flow volume within the lower tie plate. At the upper end of the flow volume, there is located a rod supporting grid. Between the supporting grid and the nozzle there is defined a flow volume.
The rod supporting grid has two purposes. First, the rod supporting grid provides the mechanical support connection for the weight of the individual fuel rods to be transmitted through the entire lower tie plate to the fuel support casting. Secondly, the rod supporting grid provides a flow path for liquid water moderator into the fuel bundle for passage in between the side-by-side supported fuel rods.
Above the lower tie plate, each fuel bundle includes a matrix of upstanding fuel rods, which are sealed tubes each containing fissionable material which when undergoing nuclear reaction produce the power generating steam. At the upper end of the matrix of upstanding fuel rods is located an upper tie plate. This upper tie plate holds at least some of the fuel rods in vertical side-by-side alignment. Some of the fuel rods are attached to both the upper and lower tie plates. Between the upper and lower tie plates, there are usually included water rods to enhance water moderator to fuel ratio, particularly in the upper, highest void fraction region of the fuel bundle.
Fuel bundles also include about seven to nine fuel rod spacers at varying elevations along the length of the fuel bundle. These spacers are required because the fuel rods are long and slender, and would come into contact under the dynamics of fluid flow and nuclear power generation within the fuel bundles. The spacers provide appropriate restraints for each fuel rod at their respective elevations and thus prevent abrading contact between the fuel rods and maintain the fuel rods at uniform spacing relative to one another along the length of the fuel bundle for optimum performance.
Each fuel bundle is surrounded by a channel. This channel causes water flowing between the tie plates to be restricted to only one bundle in an isolated flow path between the tie plates. The channel also serves to separate the steam generating flow path through the fuel bundles from the surrounding core bypass region, this region being utilized for the penetration of the control rods. The water in the bypass region also provides neutron moderation.
In the operation of a boiling water nuclear reactor, maintenance of the originally designed flow distribution is important. From the lower (high pressure) plenum inlet to the core to the outlet from the core of the steam and water mixture through the upper tie plates of the fuel bundles, about 20 pounds per square inch (psi) of pressure drop is encountered at typical operating conditions. About 7 to 8 psi of this pressure drop occurs through the fuel support casting. This pressure drop is mainly to assure the uniform distribution of coolant/moderator flow through the many fuel bundles making up the core of the reactor and is related to the prevention of operating instabilities within the reactor at certain power rates of the reactor. At the lower tie plate of each fuel bundle, from the inlet nozzle into the flow volume and through the fuel rod supporting grid, about 1 to about 11/2 psi pressure drop occurs which contributes to establishing flow distribution between the individual fuel rods of each fuel bundle. Finally, through the fuel bundle itself—from the lower supporting grid to the exit at the upper tie plate—about 11 psi of pressure drop usually occurs.
Typically debris within boiling water nuclear reactors can include extraneous materials left over from reactor construction. Corrosion during the reactor lifetime also liberates debris. Further debris can be introduced during the numerous outages and repairs of the nuclear reactor. Nuclear reactors include closed circulation systems that essentially accumulate debris with increasing age.
A particularly vexing and usual place for the accumulation of debris is in the fuel bundles between the fuel rods particularly in the vicinity of the fuel rod spacers. Debris particles tend to lodge between the spacer structure and the fuel rods and often dynamically vibrate with the coolant/moderator flow in abrading contact to the sealed cladding of the fuel rods. Such flow induced vibration within the reactor can cause fretting and eventually damage and/or rupture of the cladding of the fuel rods. The rupture of the cladding may lead to the undesirable release of fission gas accumulated and sealed within the fuel rod prior to the rupture. If sufficient fission gas has been released due to cladding ruptures, plant shutdown could be necessary.
Modern nuclear plants have both redundancy and many safety systems designed to counteract anticipated operating fuel failures, such as fuel rods becoming punctured by debris. As such, these failures may not affect safety; however, in almost all cases they result in the plant operating at less than optimum efficiency.


A method, apparatus, and computer program product are disclosed for testing a data processing system's ability to recover from cache directory errors. A directory entry is stored into a cache directory. The directory entry includes an address tag and directory parity that is associated with that address tag. A cache entry is stored into a cache that is accessed using the cache directory. The cache entry includes information and cache parity that is associated with that information. The directory parity is altered to imply bad parity. The bad parity implies that the address tag that is associated with this parity is invalid. The information included in the cache entry is altered to be incorrect information. However, although the information is now incorrect, the cache parity continues to imply good parity which implies that the data is good. This good parity implies that the information that is associated with the parity is valid, even though it is not. The data processing system's ability to recover from errors is tested using the directory entry and the cache entry.

1. Field of the Invention
The present invention is directed to data processing systems. More specifically, the present invention is directed to a method, apparatus, and computer program product for testing a data processing system's ability to recover from cache directory errors.
2. Description of the Related Art
Cache memories are relatively small buffer memories used in computer systems to provide temporary storage for data retrieved from larger, slower main memory devices, such as main memory in the computer system or external storage devices such as hard disk drives. Cache memories are located near the processor cores that they serve, and are used to store copies of data that has recently been used by a processor core and/or is likely to be used by the processor core in the near future. Use of cache memory can frequently reduce the period of time for data access that would otherwise be required for accessing to main memory. Cache memories, if properly managed, can significantly improve computer system performance.
A central processing unit in a computer system needs less time to obtain data from a cache memory than it does to obtain the same data by accessing the main memory or an external storage device. If a reasonable percentage of the data needed by a central processing unit is maintained in cache memory, the amount of processor time wasted waiting for data to be retrieved from main memory is significantly reduced, improving the computer system performance.
When a processor core needs particular information, the processor core first looks to its cache memory to determine whether information is currently stored in its cache memory. The information retrieved from the cache may be data, instruction, or a combination of data and instruction. Thus, the cache may be a data cache, an instruction cache, or a cache that includes a combination of instruction and data.
If the requested information is found in the cache, this is called a "hit". If the requested information cannot be found in the cache, this is called a "miss". A miss necessitates a "fetch" operation to retrieve the memory from other storage, such as main memory in the computer system or an external storage device.
A processor chip may include multiple processor cores within that chip. Each processor core may include at least one cache memory that is associated with the processor core. A cache is often included in the processor core itself for use by that processor core. In addition, other caches may be included within a chip for use by the processor cores included in that chip.
There are several different kinds of caches including direct mapped caches, set associative caches, and content addressable memory or CAM type caches.
The simplest type of cache is a direct mapped cache. With a direct mapped cache a subset of the bits are used to address both the directory portion of the cache and the data portion of the cache. Generally the low order bits of the address are used to address the cache and directory arrays. The bits that are not used to address the cache are stored in the directory. In addition there is a valid bit associated with each entry in the cache. A cache hit in the direct mapped cache occurs when the bits of the address that are stored in the directory matches the address bits that are being fetched, and the entry is marked as being valid by its associated valid bit. As an example, there may be a four-entry cache and four address bits. Bits 2:3 of the address would be used to address the directory while bits 0:1 of the address would be stored in the directory with a valid bit.
A set associative cache is several direct mapped caches side by side. In a direct mapped cache each address can only exist in one place in the cache. In a set associative cache the data can exist in multiple places or "ways". When the data is loaded into the cache the hardware must determine in which "way" it will store the data in the cache. Typically this is done with a least recently used scheme (LRU), but sometimes other schemes are used. Based on which "way" the cache directory matched determines which "way" the data should be muxed out. If none of the "way" addresses match then there is a miss.
A CAM is a set associative instruction cache (Icache) where none of the bits are used to address the array and all of the bits are used for the compare, e.g., if there is a four-entry CAM, all four entries in the CAM would contain address compares for all the bits.
Some caches use parity. For these caches, each entry in the cache and the cache directory includes an associated parity. This parity is typically one bit although multiple bits may be used. Parity is used for error-checking. Parity implies whether the associated entry includes an even or odd number of logical ones. If, for a particular entry, the associated parity bit implies that the parity for the entry is odd and the system is using even parity, a determination is made that an error has occurred. Thus, the parity for this entry is said to be "bad". Conversely, if, for that particular entry, the parity bit implies that the parity for the entry is even, a determination is made that no error has occurred. Thus, the parity for this entry is said to be "good".
When the parity that is associated with a cache directory entry is bad, an error has occurred and the cache directory entry is not valid. In this case, any information that is retrieved from the cache that corresponded to that cache directory entry should not be forwarded or processed. If an error occurs, the system can either implement an error recovery process or execute a machine stop or machine check.
If an error recovery process is not executed properly, the invalid information could be processed by the machine which results in inaccurate results by the system or a system malfunction such as a system crash. Thus, it is important that the error recovery process be executed properly.
An error recovery process must also be able to recover when the information in the cache is incorrect. This incorrect information should not be processed by the system.
The error recovery process may be tested by injecting an error into the cache directory and then making sure that the error recovery mechanism in the system recovered properly from that injected defect. However, it can be difficult to determine whether the error recovery mechanism recovered properly from that injected defect.
For example, an error may be injected into the cache directory by changing a bit in the entry. This would result in a cache directory hit when the address that is now being fetched just happens to match a directory entry only because the entry was corrupted. In this case, there was a hit in the cache directory only because the defect caused the address to change from address A to address B and the cache happened to have the data for address A.
However, the parity bit associated with this directory entry would now imply bad parity. If address A were needed, a cache miss would occur and no extra recovery action would be required. If an attempt were made to fetch address B, there would be a hit in the cache but the directory entry's parity would imply bad parity. In this case, the error detection logic would be required to properly detect and recover from the error.
Therefore, a need exists for a method, apparatus, and computer program product for testing a data processing system's ability to recover from cache directory errors.

Method for testing ability to recover from cache directory errors

International Business Machines Corporation


Disclosed are various embodiments for automatically creating printed works. A subset of electronic publications from a collection of electronic publications is periodically selected in at least one computing system. The selecting is directed at least in part by at least one rule predefined by a user. The subset of electronic publications includes at least two distinct electronic publications. A printed work that includes the subset of electronic publications is encoded for printing.

In The Sermons of Henry Ward Beecher (1870), Mr. Beecher states:                "Books are the windows through which the soul looks out. A home without books is like a room without windows."
Indeed, humans have held a special appreciation for books and other written works for thousands of years, and continue to do so today. In today's information society, people have access to a vast universe of electronic works, including electronic books, articles, news stories, and countless other electronic publications containing combinations of text, charts, images, photos, etc. People also continue to access a broad variety of printed works in more traditional paper form by going to libraries, bookstores, and newsstands, or by subscribing for home or office delivery of newspapers and periodicals. As the number of sources of written works has proliferated, however, and the means for acquiring those works has increased, people have found it more and more difficult to monitor and consume all of the sources of information that interest them. For example, while it has become popular for people to create lists of hyperlinks to different web pages having information about a particular topic, using such lists requires access to an electronic device and appropriate connectivity or caching to access all of the linked-to information. While accessing information of interest with an electronic device has the advantage of allowing a user to instantly get the most up-to-date information, it can also be cumbersome at times. For example, the battery life of electronic devices can be unsuitable for trans-Atlantic flights, while the displays of electronic devices can be unsuitable when vacationing on a beach. In contrast, printed works are much more suitable for these challenging environments—but finding, purchasing, and transporting all of the printed works on a particular topic can be so challenging that most consumers won't make the effort. It would therefore be advantageous if people were able to aggregate various works of information in which they are interested, and put such works into a form that can be more readily consumed.

Automated creation of printed works having customized and/or personalized content


Genipin derivatives and pharmaceutical compositions thereof that inhibit the activity of uncoupling protein-2 (UCP2) and are useful in treating deficient first-phase insulin secretion, non-insulin dependent diabetes mellitus, and ischemia in a mammal are disclosed.

Diabetes is a disease in which a mammal's ability to regulate glucose levels in the blood is impaired because the mammal has a reduced ability to convert glucose to glycogen for storage in muscle and liver cells. In Type I diabetes, this reduced ability to store glucose is caused by reduced insulin production. Type II diabetes mellitus (also known as non-insulin dependent diabetes) is the form of diabetes which is due to a profound resistance to insulin stimulating or regulatory effect on glucose metabolism in the main insulin-sensitive tissues (muscle, liver and adipose tissue) which occurs in association with relative β cell dysfunction.
Current treatment for diabetes mellitus generally first involves treatment with diet and exercise. However, compliance can be poor and as the disease progresses treatment with hypoglycemics, typically sulfonylureas, thiazolidinediones, or metformin, is often necessary. However, in many patients, these pharmaceutical agents prove inadequate for maintaining blood glucose at an acceptable level and injection with insulin is necessary. Since insulin injection has the life threatening side effect of hypoglycemic coma, patients using insulin injections must carefully control dosage.
Therefore, a need exists for new pharmaceutical agents which prevent, treat and/or alleviate diabetes and related complications of the disease without imposing on the patient burdensome and complicated treatment regimes which may effect patient compliance.

Beth Israel Deaconess Medical Center, Inc.


A total knee prosthesis system that includes a guide having first and second wedges each having a thickness configured to be located between the tibial and femoral component. When the first and second wedges are located between the tibial and femoral component, the first and second wedges align the first axle opening of the tibial component with the second axle opening of the femoral component for receipt of an axle. The guide includes a guide recess extending between the first and second wedges and a post extending into the guide recess. The guide also includes a bridge connected to and extending between the first and second wedges such that the bridge at least partially defines the guide recess.

A natural knee includes a distal femur, proximal tibia, and patella. The distal femur and proximal tibia comprise a tibiofemoral joint, and the distal femur and patella comprise a patellofemoral joint. Soft tissue, such as ligaments and tendons, help stabilize these joints throughout flexion of the knee. However, the natural knee can become damaged or diseased. For example, osteoarthritis can destroy articular cartilage within the tibiofemoral and/or patellofemoral joints producing painful bone-on-bone articulation and malalignment of the knee.
Surgery may be indicated to treat complications of such damage or disease. This may involve resecting portions of the distal femur, proximal tibia, and patella and replacing the resected bone with one or more prostheses. Surgery to replace the patellofemoral and tibiofemoral joints is commonly referred to as total knee arthroplasty ("TKA") or total knee replacement.
In many circumstances, damage extends beyond the articular cartilage and bone further complicating a TKA procedure. For example, malalignment of the knee caused by osteoarthritis can impose excess stress on stabilizing soft tissue, which may result in damage and/or laxity of such structures and instability of the knee. Without resolution, such damage and/or laxity can compromise the replaced tibiofemoral and patellofemoral joints and reduce patient satisfaction.
Certain categories of prostheses have been developed to address soft tissue instability. One such category is a posterior stabilized ("PS") prosthesis. PS prostheses are often utilized to address posterior cruciate ligament deficiency in patients who otherwise have sufficient collateral ligament stability. Many of the existing PS prostheses offer tibiofemoral rotational freedom while providing stability during flexion to prevent femoral anterior subluxation. This is often achieved by a femoral cam and tibial post mechanism.
Another TKA prosthesis category is a hinge knee prosthesis. Hinge knee prostheses are typically indicated for patients that have significant stabilizing soft tissue deficiencies, particularly significant laxity or complete removal of the collateral ligaments. Hinge knee prostheses typically offer a one-degree-of-freedom hinge about which the knee flexes and extends. Such hinge is commonly comprised of an axle that connects a tibial component with a femoral component. Such axle is connected to these components by the surgeon during the procedure. However, in order to connect the axle to the femoral component and tibial component, the surgeon may need to hold both the femoral and tibial component in precise alignment so that the axle can be connected thereto, which may be complicated or difficult during surgery and may unnecessarily increase the time of the procedure as the surgeon deals with this assembly. Thus, further improvements are desirable.


A image capturing device includes an image capture unit, a digital signal processor (DSP), a selection unit, an adjustment unit, a microprocessor, a storage unit, and a accelerometer. The image capture unit photographs a subject to output image data representing the subject to the DSP. The accelerometer detects an angle between a vertical axis of the image capture unit and the direction of the gravitational field to output an adjustment signal. The microprocessor outputs an adjustment value after comparing the adjustment signal with a reference adjustment value preset in the storage unit. When a first photograph angle adjustment manner is selected by the selection unit, the DSP adjusts the image data according to the adjustment value. When a second photograph angle adjustment manner is selected by the selection unit, the adjustment unit adjusts photographing angle of the image capture unit according to the adjustment value.

1. Technical Field
The present disclosure relates to image capturing devices, and particularly to an image capturing device and a method for adjusting a photographing angle of the image capturing device.
2. Description of the Related Art
Images captured by an image capturing device, such as a camera, may be skewed at an angle causing undesirable results. As a result, an operator of the camera may have to capture the images again or use digital photography software to amend the problem. However, these methods may be time-consuming and imprecise.

Image capturing device and method for adjusting photographing angle thereof


A display sheet 10 according to the present invention is to be used while being placed on a display 11, and includes: infrared-light emitting elements 15 that emit infrared light from on the display 11 to a space; infrared-light receiving elements 16 that receive infrared light proceeding to the display 11 from the space; and transmitting portions 17 that passes light emitted from the display 11 to the space. The infrared-light emitting elements 15, the infrared-light receiving elements 16, and the transmitting portions 17 are formed into a sheet in a state of being arranged side by side or arranged to be scattered. Merely by placing the display sheet 10 on the display 11 and teaming them with an optical image-forming means, an aerial-image-forming type input device can be obtained with no need of separately preparing a dedicated display or infrared-light emitter. Thus, it is excellent in versatility.

A touch panel provided with a display (i.e., displaying equipment), in which when an image is displayed on the display and a specific position on the displayed image is pressed with a finger, X and Y coordinates of the pressed position are detected with a pressure sensor or something, and a subsequent, action is executed depending on input signal, has been conventionally known (e.g., patent literature 1).
In patent literature 2, a large number of light emitting elements and light receiving elements are arranged directly on a display along X and Y axes in a parallel manner and formed into a matrix, and when the surface of the display is touched with an obstacle such as a finger or a pen (i.e., an indicating means), the directly touched position on the display is detected by using the obstacle going across the matrix.
On the other hand, in a method and apparatus suggested in patent literature 3, an image of a display and an image in which infrared light irregularly reflects off the surface of the display, are displayed in the air as reproduced images at the same time, using an optical image-forming means, and a position of an indicating means having touched the reproduced image of the display is detected with a two-dimensional infrared camera, thereby detecting the indicated position on the reproduced image of the display. The optical image-forming means includes: a first light-control panel having a large number of first flat light-reflecting parts arranged in parallel at constant intervals inside a transparent flat board; and a second light-control panel having a large number of second flat light-reflecting parts arranged in parallel at constant intervals inside a transparent flat board, and the first and second light-control panels are so disposed as to be in direct contact with each other or as to be adjacent to each other in a state where the first flat light-reflecting parts and the second flat light-reflecting parts are orthogonally crossed when viewed from above.
Also, a displaying apparatus and method for contactless input in patent literature 4 includes: an optical image-forming means, in which a large number of first micro reflecting surfaces so disposed as to stand upright on a flat surface and a large number of second micro reflecting surfaces so disposed as to stand upright on a flat surface are orthogonally crossed when viewed from above; and a display disposed on one side of the optical image-forming means, forms an image of the display as a first image on the other side of the optical image-forming means, and optically detects the position in the image of an indicating means having touched the first image. In this apparatus and method, light sensors for detecting light only coming from the front side are provided on the surface of the display, reflected light from the indicating means forms an image on the display through the optical image-forming means as a second image, and the position of the second image is detected with the light sensors.
Additionally, as described in patent literature 5, an apparatus that is provided with light sensors inside a transistor-shaped surface composing a liquid-crystal panel, and recognizes multi-touch with fingers on the surface of the liquid-crystal panel and motion with a touch pen, has been suggested.


A proton-conductive membrane is provided, which exhibits high proton conductivity even in an anhydrous environment. The proton-conductive membrane includes a crosslinked polymer and a plasticizer, wherein the crosslinked polymer includes a proton acceptor group in an amount equal to not less than 10 mol % of repeating units constituting the crosslinked polymer, the plasticizer includes a proton donor compound having a pKa value of not more than 2.5, and the plasticizer is a viscoelastic solid in a temperature range of 50° C. to 120° C.

The use of proton-conductive membranes as the electrolyte material for fuel cells is known.
For example, Patent Literature 1 discloses:
a proton-conductive membrane comprising perfluorosulfonic acid and/or a perfluorocarboxylic acid-type resin produced by a method comprising:
a first step in which a metal salt of perfluorosulfonic acid and/or a metal salt of perfluorocarboxylic acid is dissolved in a polymer dispersion comprising a polyelectrolyte precursor that exhibits proton conductivity as a result of alkaline hydrolysis and acid treatment;a second step in which a polymer electrolyte precursor membrane is formed from the dispersion obtained in the first step;a third step in which the polymer electrolyte precursor membrane obtained in the second step is subjected to alkaline hydrolysis and acid treatment to form a polymer electrolyte membrane; anda fourth step in which the polymer electrolyte membrane obtained in the third step is heated and dried to precipitate a metal oxide in the polymer electrolyte membrane.

Proton-conductive membrane and fuel cell

NATIONAL UNIVERSITY CORPORATION NAGOYA UNIVERSITY


A data processing system includes a CPU, an address decoder for generating a location designation signal which designates a location of a predetermined area of address area meeting a predetermined correspondence relation to a numerical address supplied from the CPU, and a memory securing locations of a plurality of areas capable of being designated by the location designation signal for the address decoder. The address decoder generates a location designation signal designating a location of a predetermined area in the address area corresponding to the numerical address supplied from the CPU in a predetermined relation different from the predetermined correspondence relation in response to an external operation, and designates according to the designation signal designating the location in the different predetermined correspondence relation, a location in a solid-state memory capable of being loaded in and unloaded from the system as a location equivalent to a location of a non-volatile memory in which CPU programs and operation parameters are stored.

The present invention relates to data processing systems such as personal computers and, more particularly, to a data processing system provided with memory card loading means for loading and unloading a memory card therein.
In the data processing system such as a personal computer, RAM, ROM, I/O, etc. are connected with a CPU by common buses and address signals, data, write signals, read signals and so forth via the common buses for their transmission and reception. The structure of such a prior art system is shown schematically in FIG. 19.
Referring to FIG. 19, a CPU 1 is connected with a RAM 2, a ROM 3, an I/O 4, a memory card 5 and like devices via common address and data buses 6 and 7. The I/O 4 is connected with an operation/display system 8 and serves as a man-machine interface. The CPU 1 and the devices noted above are each supplied with predetermined power from a power supply 9.
In this type of system of FIG. 19, it is required that the CPU 1 can access a specific device, such as the RAM 2, ROM 3, I/O 4 or memory card 5, without accessing the other devices. To this end, the address area in the CPU 1 is assigned to the individual devices as shown in FIG. 20, and an address decoder 10 is provided, which generates a chip select signal (CS1 or CS2) designating a specific device to be accessed by decoding the address signal outputted from the CPU 1.
With this structure, when the CPU 1 is accessing, for instance, area A in the address area shown in FIG. 20, the address decoder 10 makes the chip select signal CS2 effective to select the ROM 3. At this time, no other chip select signal is outputted, and the other devices than the ROM 3 do not respond to the write and the read signal from the CPU 1. In the pertinent data processing operation, the CPU 1 reads out and executes successive programs stored in predetermined areas.
Usually, in the system of the above structure the programs have been previously written in the ROM 3. To write the program in the ROM, they are written in a mask for manufacturing the ROM 3. Alternatively, a ROM capable of writing data therein is used to write the programs before its mounting. The ROM may be mounted using a socket, or directly soldered to the circuit board.
In the above prior art system, however, it is very difficult to provide for a different program operation without updating the ROM program. This does not only pose problems when it is desired to increase the versatility of the system but also is very inconvenient for operation confirmation during manufacture. The operation confirmation requires exclusive programs to be stored previously in the ROM in addition to the operation programs that may be executed by the system. When the operation confirmation process is complicated, the operation confirmation programs may be greater in scale than the programs provided for execution by the system. In such a case, a large capacity ROM is necessary. A design with a restricted ROM capacity inevitably results in an extreme limitation of the operation confirmation items obtainable according to programs which can be stored in the ROM.
In a different aspect, there often arises a need for updating a CPU program (i.e., a program stored in the ROM 3) in order to change or expand the system function. Re-writing of the ROM data requires opening a system body housing even when the ROM is capable of data re-writing. To ensure readiness of the operation, mounting of the ROM in a socket is necessary. In a case in which the ROM capable of data re-writing is directly soldered to the circuit board, the replacement of the ROM requires removal of the solder. This operation is cumbersome and requires skill. In such an operation there is a possibility of copper foil separation from the circuit board.
In order to overcome the above drawbacks in the prior art system, there is a proposal to use a non-volatile memory capable of data re-writing, such as a flush EPROM, and allowing programs once stored in the ROM (i.e., flush EPROM) to be updated using an exclusive program for program re-writing after the start of the system.
According to this method, however, the exclusive program for program re-writing can be executed only in the operative state of the system. Further, such exclusive program for program re-writing provides its function only for updating a program that has been stored. This means that a program re-writing operation is dictated before mounting the ROM, such as when storing a new program when the ROM is blank, for instance, during system manufacture. Therefore, it was necessary to mount the ROM in the socket.
In a further aspect, upon failure of a normal program updating operation, it is impossible subsequently to start the system. It is therefore necessary to re-write the ROM data using an exclusive writing means after removing the ROM. This operation of course requires opening the system housing and is therefore, cumbersome, so that the program updating can not be made readily and frequently.

Data processing system including a solid-state memory capable of being accessed as a location equivalent of a non-volatile memory


A method and apparatus in which category classes express information content categories that are defined based on object-oriented programming. The information items that are to be collected for each category are set as properties, and an information acquisition method or information process and treatment method is described for each property. After a request input from a user has been converted into a request input format that the system can understand, the request input is classified into category classes, searching is performed, and the information items the system outputs are displayed using the properties of the classes to which the request input belongs. Information searching and collection is accomplished on the basis of the contents described by the methods, and the information is output as comprehensive information in accordance with the request input of the user.

1. Field of Invention
The present invention relates to an information search and collection method and system which, when collecting certain specific information from the Internet, collects information corresponding to the request of a user from among a multitude of information relating to a keyword input by the user, and outputs this collected information as comprehensive information.
2. Description of Related Art
Recently, it has become possible to search for and collect all types of information using the Internet. When searching and collecting information over the Internet, there is for example a search method such that a keyword input by the user is entered into a search engine, and the addresses of all of the pages hit using that keyword are output.
For example, assuming information about a particular famous person is to be collected, the name of that person is input as the keyword, and the addresses of all pages hit using that keyword are output. Through this, the user obtains the desired information through an operation such as accessing pages identified by the search engine where the information needed by the user appears to exist, and extracting only the necessary information.
However, with the above-described search and collection method, when the person on which information is being collected is active in many fields, if a search is made using only the name as a keyword, the number of pages that are searched can at times be several hundred pages. Not only is this true for people, but can occur when obtaining information about a particular facility. For example, if the facility is famous there is a large possibility that information on that facility exists in various fields, and thus when search and collection are conducted using the facility name as the keyword, an enormous number of pages is searched.
As a method to improve even slightly the trouble of this search and collection process, it is possible, for example, to input a plurality of keywords expressing the information to be collected and to output the addresses of pages hit using all of the keywords, and to restrict the information to a certain degree such as by outputting only the addresses of pages where more than a set number of the keywords appear.
For example, when collecting various information relating to the main field of activity of a famous person active in a wide range of fields, the name of the person and the primary occupation are input as keywords, and only the addresses of pages hit using both keywords are output, so that the number of pages extracted is greatly restricted.
However, even when pages are extracted using a certain degree of restriction in this manner, there are many times when the information really required by the user is not all of the extracted pages, but only a portion thereof, and in effect it is necessary for the user to go through the effort of choosing and selecting the necessary information from among the extracted pages.
In this way, with the current level of research services, even when a certain degree of restriction of the information is accomplished, it is still ultimately necessary for the user to personally search for the necessary information from among the large quantity of identified information and compile a single information page. Accordingly, there is a need to improve the ease of use of such information search and collection methods and systems.
Hence, it is an objective of the present invention to analyze the input request from the user on the basis of keywords from the user, convert the request from the user into a format understandable by the system, perform searching and collecting of information on the basis of a predetermined algorithm, and provide comprehensive information in accordance with the request input from the user.

Information search and collection method and system