FK506 and geldanamycin promote nerve regeneration by a common mechanism that involves the binding of these compounds to polypeptide components of steroid receptor complexes other than the steroid hormone binding portion of the complex (FKBP52 and hsp90, respectively). These and other agents cause hsp90 dissociation from steroid receptor complexes or block association of hsp90 with steroid receptor complexes.

Following traumatic or mechanically induced axonal degeneration in the peripheral nervous system, axonal regeneration ensues, resulting in functional recovery. However, the rate of axonal elongation (3-4 mm/day) is slow. Consequently, recovery is measured in weeks or months, depending upon the distance between the site of injury and the target tissue. Therapies that speed regeneration over long distances would be highly beneficial to patients and would significantly reduce health care costs.
The immunosuppressant drug FK506 (USAN tacrolimus; Prograf.RTM.) speeds functional recovery and axonal regeneration in the rat in a dose-dependent manner following a sciatic nerve crush lesion (Gold et al., J. Neurosci. 15:7505-7516, 1995; Gold et al., Restor. Neurol. Neurosci. 6:287-296, 1994). FK506 was shown to stimulate neuritic outgrowth in a rat pheochromocytoma cell line in a concentration-dependent manner (Lyons et al., Proc. Natl. Acad. Sci. USA 91:3191-3195, 1994).
Systemic administration of two synthetic FK506 analogs that bind FKBP-12 but that do not inhibit calcineurin activity (and which are not immunosuppressants) increases the size of myelinated fibers (Steiner et al., Nature Medicine 3:1-8, 1997; Steiner et al., Proc. Natl. Acad. Sci. USA 94:2019-2024, 1997). U.S. Pat. No. 5,654,332 (Armistead et al.) discusses immunosuppressive FK506 analogs that bind FKBP12 and that are said to stimulate neurite outgrowth in the presence of NGF. It was stated that the neurotrophic activity of these FKBP12 binding compounds "is directly related to their affinity for FKBP12 and their ability to inhibit FKBP12 rotomase activity" (id. at col. 7, lines 47-50).
It has been reported that androgens and estrogens stimulate facial nerve regeneration in hamsters (Jones, "Androgenic enhancement of motor neuron regeneration," In: Luine and Harding, eds., Hormonal Restructuring of the Adult Brain, Ann. N.Y. Acad. Sci. 85:141-164, 1994; Tanzer and Jones, Exp. Neurol. 146:258-264, 1997).

Compositions and methods for promoting nerve regeneration


In some embodiments, a system includes an ingestible signal generator coupled to a medication and configured to generate a body-transmissible signal upon ingestion by a user. The system also includes a receiver, the receiver including a sensor configured to detect the body-transmissible signal, the receiver configured to generate and wirelessly transmit a sensor signal based on the body-transmissible signal. The system also includes a user device. A processor of the user device is configured to wirelessly monitor the sensor for the sensor signal and, in response to not receiving the sensor signal within a predetermined time period, generate a notification. The processor is further configured to send a signal to present the notification and receive a response to the notification from the user. The processor is also configured to identify at least one trend associated with the sensor signal and the medication, and perform an action based thereon.

Some known methods to measure medication adherence, including patient self-reports, pill counts, refill rates, biological monitoring, and electronic monitoring, are proxy measures. As an example, patient self-reports rely on memory and can be prone to inaccuracies and recall bias. Pill counts can be unreliable if patients fail to return bottles and/or discard pills before the count. As another example, biological monitoring (e.g., sampling blood, urine) can be impractical, invasive, and/or intrusive and usually cannot measure adherence unless the time and dose administered before sampling are verified. As yet another example, refill rates or electronic monitoring are often indeterminate on whether patients actually took a medication.
Thus, there exists a need for systems, devices and methods that can more accurately sense ingestion-related events, and analyze the events for potentially triggering one or more actions, such as, for example, directed to assuring patient compliance.

Systems, devices, and methods for ingestible event sensing and analysis


The invention relates to methods of making compounds of the formula VII ##STR1## and their enantiomers, where Ar is a substituted or unsubstituted five- or six-membered aromatic group and B is either an amino acid linked through the amino portion to form an amide or a C.sub.1 -C.sub.6 alcohol linked through the alcohol portion to form an ester. These compounds are advantageously employed as intermediates to prepare optically pure compounds that are active GARFT inhibitors. In one method, a compound of the formula ##STR2## is reacted with a compound of the formula ##STR3## where X is a halogen.

GARFT is a folate-dependent enzyme in the de novo purine biosynthesis pathway. This pathway is critical to cell division and proliferation. Shutting down this pathway is known to have an antiproliferative effect, in particular, an antitumor effect. Compounds that inhibit GARFT consequently inhibit the growth and proliferation of the cells of higher organisms or microorganisms such as bacteria, yeast and fungi.
A number of folate analogs have been synthesized and studied for their ability to inhibit GARFT. A prototypical specific tight-binding inhibitor of GARFT, 5,10-dideazatetrahydrofolic acid, has been reported to show antitumor activity. See F. M. Muggia, "Folate antimetabolites inhibitor to de novo purine synthesis," New Drugs, Concepts and Results in Cancer Chemotherapy, Kluwer Academic Publishers, Boston (1992), 65-87.
Antifolates or antifoles are a subclass of antiproliferative antimetabolites and are antagonists of the vitamin folic acid. Typically, antifolates closely resemble the structure of folic acid and incorporate the characteristic P-benzoyl glutamate moiety of folic acid. The glutamate moiety of folic acid takes on a double negative charge at physiological pH. Thus, this compound and its analogs have an active energy-driven transport system to cross the cell membrane and exert a metabolic effect.
Compounds useful as antiproliferative agents or GARFT inhibitors, such as certain glutamic acid derivatives, have been recently developed as described in U.S. application Ser. No. 08/282,293 to Varney et al., filed Jul. 28, 1994, and in International Application PCT/US94/00418 to Varney et al., filed on Jan. 18, 1994, the disclosures of which are herein incorporated by reference. Such compounds also have antitumor, antiinflammatory, antipsoriatic and/or immunosuppressive activity. The present invention relates to advantageous methods of making such compounds in optically pure forms in good yields. The invention also relates to optically pure intermediates useful for making the antiproliferative agents/GARFT inhibitors and to methods of making these intermediates.

Synthesis of optically pure compounds useful as GARFT inhibitors and their intermediates


A vibration damping device including: a pressure-receiving chamber and an equilibrium chamber connected by a first orifice passage; a movable member disposed within the pressure-receiving chamber, to form a primary fluid chamber partly defined by a rubber elastic body, and an auxiliary fluid chamber partly defined by an oscillating plate; and a second orifice passage connecting the auxiliary fluid chamber to the equilibrium chamber. A through-hole is formed in a partition member that partitions the primary fluid chamber and the auxiliary fluid chamber, the oscillating plate is housed within the through-hole with a gap provided therebetween whereby the oscillating plate is displaceable in an axial direction within the through-hole. A stopper abutted by the oscillating plate during displacement to one axial side is provided, with the gap becoming closed off when the oscillating plate is in a state of abutment against the stopper.

1. Field of the Invention
The present invention relates to a fluid filled vibration damping device adapted to provide active vibration damping action through control of pressure fluctuations of a pressure receiving chamber filled with a non-compressible fluid, wherein control is carried out in a cycle that corresponds to the frequency of the vibration to be damped.
2. Description of the Related Art
In the field of vibration damping devices such as vibration damping linkages or vibration damping supports designed for installation between components that make up a vibration transmission system, one type of known device is a fluid filled type vibration damping device having a first mounting member and a second mounting member linked by a rubber elastic body; a pressure-receiving chamber whose wall is partially defined by the rubber elastic body and an equilibrium chamber whose wall is partially defined by a flexible film, the pressure-receiving chamber and the equilibrium chamber being formed to either side of a partition member and filled with a non-compressible fluid; and an orifice passage connecting the pressure-receiving chamber and the equilibrium chamber. Since this type of fluid filled vibration damping device is able to exhibit vibration damping effect by using flow action, e.g. resonance action, of fluid flowing through the orifice passage, application of such devices in automotive engine mounts and the like is a current topic of interest.
However, one problem with such devices was that in order to for each of the orifice passages to achieve the orifice effect effectively, each orifice passage is limited to a pre-tuned, relatively narrow frequency range. Thus, in instances where frequency or other characteristic of vibration targeted for damping varies, or where advanced vibration damping action is required, difficultly in achieving satisfactory vibration damping action was a problem.
As one approach to solving this problem, in recent years, vibration damping devices of active type have been developed and are the subject of ongoing research. In such active vibration damping devices, typically, another part of the wall of the pressure-receiving chamber is defined by an oscillating plate, and through actuated oscillation of this oscillating plate at a cycle corresponding to the frequency of the vibration being damped, the pressure in the pressure-receiving chamber is controlled to produce positive and active vibration damping action. One such device is disclosed in U.S. Pat. No. 6,527,262, for example.
In the active type fluid filled vibration damping device disclosed in U.S. Pat. No. 6,527,262, the oscillating plate is linked to a second mounting member via a supporting rubber elastic body of annular shape, with the aim of elastically positioning and supporting the oscillating plate on the second mounting member while maintaining fluidtightness of the pressure-receiving chamber. For this reason, there was a risk that permanent set in fatigue of the supporting rubber elastic body might make it difficult to consistently achieve the desired vibration damping action. Additionally, since oscillation energy of the oscillating plate is consumed through deformation of the supporting rubber elastic body, there is a risk of diminished actuation efficiency of the oscillating plate.
In order to address such problems, it would be conceivable, for example, to employ an oscillating plate of piston construction as taught in Japanese Unexamined Patent Publication Nos. JP-A-06-330980 or JP-A-2005-291276. According to these fluid filled vibration damping devices, a through-hole of cylinder shape is formed in the partition member, a piston shaped oscillating plate is disposed at the distal end side of the output member of the actuator in the actuation direction, and the oscillating plate is movable in the axial direction along the inside peripheral face of the partition member constituting the peripheral wall of the through-hole. The gap provided between the outside peripheral face of the oscillating plate and the inside peripheral face of the partition member obviates the need for the supporting rubber elastic body to support the oscillating plate on the second mounting fitting, thereby solving the aforementioned problem stemming from the support structure for the oscillating plate via the supporting rubber elastic body.
However, a fluid filled vibration damping device furnished with such a piston shaped oscillating plate proved to have the problem that pressure in the pressure-receiving chamber leaks out through the gap between the inside peripheral face of the partition member and the outside peripheral face of the oscillating plate. Specifically, the problem of difficulty in achieving satisfactory orifice effect arose as a result of pressure leaking from the pressure-receiving chamber through the gap and reducing the level of fluid flow through the orifice passage.
The above-mentioned JP-A-06-330980 and JP-A-2005-291276 also teach making the gap sufficiently small in size. However, simply reducing the size of the gap does not readily prevent pressure leakage from the pressure-receiving chamber to a sufficient extent. Moreover, if the gap is too small, the oscillating plate may interfere with the inside peripheral face of the partition member, resulting in the risk of diminished actuation efficiency of the oscillating plate, of scratching or other damage to the opposed faces of the oscillating plate and the cylinder member, or of unwanted noise.

Fluid filled type vibration damping device


A method for manufacturing a micro light-emitting diode array substrate is disclosed. The method includes: providing a drive substrate comprising a plurality of sub-pixel regions, the plurality of sub-pixel regions being configured for bearing micro light-emitting diodes of different colors, and epitaxial layers of the micro light-emitting diodes of different colors having different thicknesses; providing a base substrate, forming a plurality of micro light-emitting diodes on the base substrate, and transferring micro light-emitting diodes of same color on the base substrate as a whole onto the drive substrate; repeating the transferring process in a sequence that the thicknesses of the epitaxial layers of the micro light-emitting diodes gradually increase, until each sub-pixel region in pixel units is provided with one of the micro light-emitting diodes having same color as the each sub-pixel region.

Currently, a micro light-emitting diode (Micro-LED) display has received more and more attention, and a Micro-LED display screen has a power-saving characteristic, and is applicable to wearable devices such as augmented reality (AR)/virtual reality (VR) helmets and smart watches, and also applicable to outdoor display billboards, head up displays (HUD) and the like. In addition, the Micro-LED display screen also has promising application prospects in the fields of taillights, wireless optical communication (such as Light Fidelity, Li-Fi for short), projectors and the like. A Micro-LED is mainly obtained by miniaturizing, arraying and thinning a conventional light-emitting diode crystal film by means of a miniature process technology, then transferring the crystal film onto a drive circuit substrate by means of a transfer technology, manufacturing a protective layer through physical deposition, and finally completing packaging.

Method for manufacturing micro light-emitting diode array substrate

BEIJING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.


A processor comprises a core, a cache, and a ZCM manager in communication with the core and the cache. In response to an access request from a first software component, wherein the access request involves a memory address within a cache line, the ZCM manager is to (a) compare an OTAG associated with the memory address against a first ITAG for the first software component, (b) if the OTAG matches the first ITAG, complete the access request, and (c) if the OTAG does not match the first ITAG, abort the access request. Also, in response to a send request from the first software component, the ZCM manager is to change the OTAG associated with the memory address to match a second ITAG for a second software component. Other embodiments are described and claimed.

A data processing system may execute a virtual machine monitor (VMM) that enables multiple different virtual machines (VMs) to execute on the data processing system. And sometimes, one VM will send data to another VM. One way to send data from one VM to another is to transfer the data using a network packet. Another way is to use shared memory that is accessible to both VMs.
To use a network packet, the source VM may copy the data from working storage of the source VM into the packet and then send to packet to the destination VM. The destination VM may then copy the data from the packet into working storage of the destination VM, and an application in the destination VM may then use that data.
To use shared memory, the source VM may copy the data from its working storage into a shared memory buffer. The destination VM may then copy the data from the shared memory buffer into its working storage. However, a shared memory channel may present security risks, in that data may be inadvertently leaked between the two VMs via that channel.
Another approach is for the destination VM to instruct the VMM to map a memory buffer for the destination VM to a portion of the working storage of the source VM. The source VM may then copy data into that memory buffer from working storage of the source VM. The destination VM may then instruct the VMM to unmap that buffer from the source VM, and the destination VM may copy data from that memory buffer into the working storage of the destination VM. This approach requires the destination VM to perform one memory copy and two VMM calls. It also requires a translation lookaside buffer (TLB) invalidation to unmap the buffer from the source VM. And since the VMM cannot determine which linear address of the source VM would map to the buffer, the TLB invalidation would have to flush all TLB translations of the source VM. Such invalidations are expensive and may adversely affect performance.
In any case, the need to make copies of the data may adversely affect performance.

Technology for moving data between virtual machines without copies


A backlight includes a plurality of light sources of at least three different colors disposed on a base substrate, and a plurality of grating units that are disposed on a light exit side of the plurality of light sources and are in one-to-one correspondence with the plurality of light sources. Each of the plurality of grating units is used for splitting light emitted by a corresponding one of the plurality of light sources to form in an array of uniformly distributed monochromatic spots, so that the backlight may form an array of colored spots in which at least three different colors of light spots are alternately arranged in sequence along a first direction, wherein the first direction is a row direction or a column direction of the array of colored spots.

A Liquid crystal display (LCD), as a flat panel display device, is increasingly used in the field of high performance display due to its small size, low power consumption, no radiation, and relatively low manufacturing cost.
As shown in FIG. 1, an existing LCD includes a backlight 01 and a display panel 02. Generally, light emitted by the backlight 01 is white light. Therefore, in order to achieve color display, it is necessary to provide a color film layer 021 in the display panel 01. The color film layer 021 includes a first color pattern layer 0211, a second color pattern layer 0212, and a third color pattern layer 0213. When the white light emitted by the backlight 01 is incident on the color film layer 021 through a liquid crystal layer, light having a color different from the color pattern layer in the light passing through each color pattern layer is absorbed, and light having the same color as the color pattern layer can be transmitted, thereby achieving color display.
However, since when the white light passes through each color pattern layer, only the light having the same color as the color pattern layer can be transmitted, and the light having a color different from the color pattern layer is absorbed, the light utilization efficiency of the display device is relatively low, and the power consumption is high.

Backlight and liquid crystal display device

BEIJING BOE DISPLAY TECHNOLOGY CO., LTD.


A device for limiting access of an animal is disclosed. The device includes a housing having a sidewall defining an opening therein, and a housing interior in communication with the opening. The device also includes an opening-size selectable member engageable with at least a portion of the housing for restricting at least one dimension of the opening to form a modified opening. The modified opening allows passage of a first animal into the housing interior through the opening, and restrains a second animal from entering the housing interior. In one configuration, the second animal is larger than the first animal.

1. Field of the Invention
The present invention relates generally to pet access limiting devices and, more particularly, to an apparatus having an adjustable opening for allowing animals of a certain size to pass therethrough, while preventing larger animals from entering the opening.
2. Description of Related Art
Many pet owners have more than one animal living within a house. In these circumstances, pet owners often encounter difficulties in keeping food dishes and/or litter boxes separated between various pets. For example, if a large cat and a small cat reside within the same dwelling, the large cat will often consume all of its food, and will then begin to consume the food left for the small cat. This can result in excessive food consumption for the large cat, and poor nutrition for the small cat. A similar situation can arise when a large dog and a small dog reside within the same dwelling, or when a cat and a dog share the same house. This often requires that the animal owner elevate the cat food to an inconvenient location in order to prevent the dog from eating the food. Typically, pet owners will resort to placing food dishes on clothes dryers, computer tables, bedroom dressers, dining room tables, or kitchen counters. This often results in pet hair, pet food, and general pet messes in such areas, which can be both unsightly and unsanitary. Alternatively, a pet owner may be required to be present at each, or most, feedings to ensure that each animal receives the proper amount of food and/or water.
Similarly, litter box issues can also arise when multiple animals reside within the same space. In certain situations, a dog will consume feces left in a litter box by a cat. If a litter box is left unguarded by the animal owner, the dog may consume the feces and subsequently become ill. The dog may also consume feces and subsequently approach children or adults, potentially putting them at risk for transmission of disease.
At other times, nursing or ill animals must be carefully watched by their owner and often separated from other animals within the house. Nursing or ill animals often have special dietary restrictions, such as special foods, food amounts, or medicines, which must be consumed by the ill animal only and not shared among other pets. This often requires that the pet owner confine the nursing or ill animal to a room or gated area within the house that is separated from other pets. Separating animals in such a fashion necessitates the use of gates or requires that certain areas of the home remain restricted from otherwise normal use.
In each of the above situations, an extra burden is placed on the pet owner to diligently watch their pets and the behaviors of one pet toward another. This extra burden can result in increased time required at feedings, constant guarding of a litter box, and/or added expense in extra food, gates, or other equipment to physically separate the space occupied by one pet in comparison to other pets. Accordingly, a need exists for an improved apparatus for separating one pet from another at feeding times and during use of a litter box.


A non-volatile memory device includes a tunnel insulating layer pattern on a channel region of a substrate, a charge trapping layer pattern on the tunnel insulating layer pattern, a blocking layer pattern on the charge trapping layer pattern, and a gate electrode including a conductive layer pattern on the blocking layer pattern and a barrier layer pattern on the conductive layer pattern. The conductive layer pattern includes a metal.

1. Field of the Invention
Embodiments relate to a non-volatile memory device and a method of manufacturing the same and, more particularly, to a non-volatile memory device including a conductive layer and a barrier layer, and a method of manufacturing the same.
2. Description of the Related Art
A silicon oxide nitride oxide semiconductor (SONOS) or metal oxide nitride oxide semiconductor (MONOS) type non-volatile memory device may include a tunnel insulating layer formed on a channel region of a semiconductor substrate, a charge trapping layer for trapping electrons from the channel region, a blocking layer formed on the charge trapping layer, a gate electrode formed on the blocking layer, and source/drain regions formed at surface portions of the semiconductor substrate adjacent to the channel region.
The conventional non-volatile memory device may serve as a single level cell (SLC) or a multi-level cell (MLC), and may perform programming and erasing using a Fowler-Nordheim (F-N) tunneling mechanism and/or a channel hot electron injection mechanism.
For example, a programming voltage, e.g., about 5 V to about 18 V, may be applied to the gate electrode and electrons may be trapped in trap sites of the charge trapping layer from the channel region of the semiconductor substrate by F-N tunneling. Thus, a logic state, e.g., "1," may be stored in the charge trapping layer. A threshold voltage in the channel region may be varied by the electrons trapped in the charge trapping layer, and the logic state may be read by applying reading voltages different from each other to the gate electrode and a drain region, and then detecting a current in the channel region.
The erasing operation of the non-volatile memory device may be performed by applying an erasing voltage, e.g., about −15 V to about −20 V, to the gate electrode. However, when the erasing voltage is applied to the gate electrode, a back-tunneling may occur, i.e., a phenomenon whereby electrons move from the gate electrode to the charge trapping layer through the blocking layer. Consequently, the time required for the erasing operation may be increased, and the data retention performance and operating reliability of the non-volatile memory device may be degraded.
One approach to ameliorating the above-described problems is to form the gate electrode using a material having a relatively high work function, such as metal nitride, metal oxide, etc. However, the work function of the gate electrode may subsequently be altered or varied during a later-applied heat treatment process. For example, after forming the gate electrode using metal nitride or metal oxide, the work function of the gate electrode may be undesirably varied during a heat treatment process for activating impurities (dopants) implanted in the source/drain regions. Consequently, there is a need for non-volatile memory device, and a method of making the same, wherein the back-tunneling of electrons through the blocking layer may be reduced or prevented.

Non-volatile memory device and method of manufacturing the same


A method of remote capture with user interface providing separate inside- and outside-light-box modes is provided, wherein when the user selects the inside-light-box mode together with an automatic mode to take a photograph, it is the photographic parameters, which are obtained experimentally for various cameras under given light sources, but not the photographic parameters, which are automatically generated by the light sensor of the camera, that are utilized to control the camera. Via the inside-light-box mode together with the automatic mode, an image in good qualities is acquired.

1. Field of the Invention
The present invention relates to remote capture with user interface, particularly to a method of remote capture with user interface providing separate inside- and outside-light-box modes.
2. Description of the Related Art
When utilizing a digital camera, most of the users adjust the lighting instruments by themselves for taking human or product pictures. Even though the light source inside a light box is more uniform, taking a picture inside a light box is not a common adoption because most of the users are not accustomed to complicated remote capture software provided by camera manufacturers and also because only few camera manufacturers provide remote capture software for the users. Besides, camera manufacturers also usually provide incomplete software development kits for system-integrator to develop custom-made capture software. Therefore, few of them can integrate the environment of a light box and remote capture software into a complete system.
As shown in FIG. 1A, a general user interface 200 has an Auto Exposure function, i.e. the AE mode 202, which further provides the options: Manual mode 204, Automatic mode (Program AE) 206, Shutter Speed Priority mode 208, Aperture-Priority mode 210. Refer to FIG. 1B the flowchart of using the conventional user interface. When the user intends to take a photograph with a camera, he starts to operate the user interface (step S10). Next, the user selects the Manual mode 204 or the Automatic mode (Program AE) 206 (step S12). Once the Automatic Mode (Program AE) 206 is selected (step S14), photographic parameters will be automatically created and associated with the light sensor of a capturing apparatus (not shown) (step S16). If the Manual mode 204 is selected (step S18), photographic parameters will be manually set (step S20). After the photographic parameters have been created or set, the user utilizes the preview function of the user interface to observe the position and the dimension of an object (step S22). Then, the user utilizes the zoom-in and the zoom-out functions of the user interface to adjust the image size of the object (step S24 and step S26). Finally, the user snaps a photograph (step S28). However, this conventional technology cannot obtain the optimal photographic parameters. Besides, external factors will also interfere with photographing. Therefore, the images captured with the conventional technology do not always achieve the desired quality.
As the light sensors of different digital cameras have different light sensitivities, and owing to the variation of lighting environments and the variation of the distance between the light sensor and the photographed object, the photographic parameters created by a light sensor may have a considerable error. Further, when the user undertakes a top shot, the fixing mechanism of the digital camera is apt to block the light detection, which also results in the error of the photographic parameters.
Therefore, it is necessary to integrate the lighting environment of a light box and a remote capture software into a complete system. To achieve a superior image, the photographic parameters for a specific camera should be experimentally obtained under the real light source of a light box. Those photographic parameters are to be further preset in the remote capture software of a user interface. Thereby, when the user takes a photograph inside the light box with the automatic mode, a superior image can be obtained. Based on the above discussion, the present invention proposes a method of remote capture user interface with separate inside- and outside-light-box modes to overcome the problems.

Method of remote capture with user interface providing separate inside- and outside-light-box modes


In an integrated circuit having a first circuit part and at least one second circuit part, which is assigned to a specific functionality of the first circuit part, on one and the same silicon wafer, of which the first circuit part and the at least one circuit part are arranged in non-overlapping, mutually separate regions of the silicon wafer and are connected to one another via connecting elements or lines, during the fabrication, for each exposure plane, with the exception of the exposure plane used for the fabrication of the connecting elements or lines, use is made in each case of a first exposure mask intended for the first circuit part and a second exposure mask intended for the second circuit part. These first and second exposure masks may be arranged on a common reticle for a respective exposure plane.

Integrated circuits, principally on account of the ever increasing complexity and the ever higher speed, have the problem that the users of the integrated circuits, more precisely the users of the modules and devices containing the integrated circuits, are often no longer able to identify or to eliminate the causes of improper functioning of the integrated circuits and/or of the systems containing the integrated circuits.
For this reason, so-called emulators have been developed for particularly complex integrated circuits, for example for microprocessors and microcontrollers, with the aid of which emulators, during the normal operation of an integrated circuit, internal states and sequences in the integrated circuit, such as, for example, register contents, memory contents and/or addresses, data, control signals transferred via internal, or external lines or bus systems, etc., can be observed and altered as desired.
During an emulation of an integrated circuit, the latter would generally be removed from the system containing it and be replaced by a special circuit, the special circuit containing the integrated circuit itself that is to be tested or a particular version of the integrated circuit (a so-called bond-out version having additional terminals for observing internal states and operations).
The above-mentioned integrated circuit disclosed in DE 101 00 344.7 was based on the object of providing a particularly suitable and simple possibility of emulation for complex integrated circuits by virtue of the integrated circuit comprising, in addition to a first circuit part, for example a processor or controller part, a second circuit part, which is necessary or useful for the emulation thereof, alongside of the first circuit part on the same silicon wafer.
During the fabrication of the integrated circuit, an exposure mask is used for each exposure plane, patterns for fabricating a first circuit part of the integrated circuit and patterns for fabricating a second circuit part thereof being situated jointly on said exposure mask, in which case, during the fabrication of a variant which does not contain the second circuit part, that part of the exposure mask which serves for fabricating the second circuit part is covered and, during the fabrication of a variant of the integrated circuit which has the second circuit part, the relevant part of the exposure mask remains uncovered.
The known procedure is explained in more detail with reference to the accompanying diagrammatic FIGS. 6A, 6B, 6C, 7 and 8.
FIGS. 6A, 6B and 6C firstly show, in diagrammatic plan view, three different integrated circuits such as are known from the abovementioned DE 101 00 344.7. In accordance with FIG. 6A, a first integrated circuit IC1 has a first circuit part 1 and a second circuit part 21. As mentioned, the first circuit part 1 is a processor circuit, for example, and the second circuit part 21 is an emulator circuit which is used for the emulation of the first circuit part 1 but is integrated-separately from the latter along one side (the upper side in FIG. 6A) of the first circuit part 1. Connecting lines between the first circuit part 1 and the second circuit part 21 are provided but are not illustrated for the sake of simplicity.
A variant of the integrated circuit that is designated by IC2 is illustrated diagrammatically in FIG. 6B. Here, the second circuit part designated by the numeral 22 is integrated separately from the first circuit part 1, however, along two sides thereof. In the two variants shown in FIGS. 6A and 6B, the first circuit part 1 and the second circuit part 21 and 22, respectively, are neither interleaved in one another nor do their respective regions overlap.
FIG. 6C diagrammatically illustrates a variant of the integrated circuit that is designated by IC3, which does not have a second circuit part. The procedure in mass production is usually such that very many integrated circuits IC3 in accordance with FIG. 6C and a few integrated circuits IC1 or IC2 in accordance with FIG. 6A or FIG. 6B are fabricated on a wafer. In FIGS. 6A–6C, connecting lines of the integrated circuit are designated by 3 and terminal points are designated by 4.
FIGS. 7 and 8 show that, during the method for fabricating the known integrated circuit, for each exposure plane with an exposure mask 10, which has regions for the first circuit part 1 and in addition for the second circuit part 2, it is possible to fabricate an integrated circuit IC1 in accordance with FIG. 6A and an integrated circuit IC3 in accordance with FIG. 6C, that is to say without a first circuit part.
For this purpose, regions of the exposure mask 10 are either not covered (FIG. 7) or are covered (FIG. 8) by displaceable sections S1, S3 of a diaphragm S having the sections S1, S2, S3 and S4. The arrows m illustrate that the sections S1 and S3 of the diaphragm S are displaceable in this way.
One problem in the case of the known method outlined above is that a relatively large distance has to be complied with in each case between the first mask region serving for the production of the first circuit part and the mask region serving for the production of the second circuit part, which distance unfortunately cannot be made arbitrarily small on account of the unsharpness during the imaging of the diaphragm sections S1, S3. Therefore, too much space on the wafer is given away during the mass production of an integrated circuit in accordance with FIG. 8.

Method for fabricating an integrated circuit


Methods for communicating between an application and an ink divider object (which stores ink strokes to be divided into groups) may include: (a) issuing a divide request to the ink divider object, optionally by the application; (b) in response to the divide request, calling a divide method, which groups the stored ink strokes into one or more groupings of strokes having a first predetermined granularity (e.g., words, lines, paragraphs, sentences, drawings, etc.); and (c) making information regarding the one or more groupings of strokes available to the application. This “information” made available to the application may include, for example, the actual groupings of the strokes, the number of stroke groupings having the first predetermined granularity, machine generated text corresponding to the stroke groupings, or the like. The results of the divide method may be stored in an ink division result object. In some examples, the ink division result object may include the originally divided strokes and allow retrieval of groupings of strokes of various different granularities. This invention also relates to systems for performing the above methods and various data structures used in performing these methods.

Typical computer systems, especially computer systems using graphical user interface (GUI) systems, such as Microsoft WINDOWS, are optimized for accepting user input from one or more discrete input devices, such as a keyboard for entering text and a pointing device (e.g., a mouse with one or more buttons), for driving the user interface. The ubiquitous keyboard and mouse interface provides for fast creation and modification of documents, spreadsheets, database fields, drawings, photos and the like. However, in some respects, there is a significant gap in the flexibility provided by the keyboard and mouse interface as compared with the non-computer (i.e., conventional) pen and paper. With conventional pen and paper, a user may edit a document, write notes in a margin, and draw pictures and other shapes, and the like. In some instances, a user may prefer to use a pen to mark-up a document rather than review the document on a computer screen because of the ability to freely make notes outside of the confines of the keyboard and mouse interface.
Some computer systems permit users to draw on a screen. For example, the Microsoft READER application allows users to add electronic ink (also referred to herein as "ink" or "digital ink") to a document. The system stores the ink and provides it to a user when requested. Other applications (for example, drawing applications as known in the art associated with the Palm 3.x and 4.x and PocketPC operating systems) permit the capture and storage of drawings. Also, various drawing applications, such as Corel Draw, and photo and editing applications, such as Photoshop, may be used with stylus based input products, such as the Wacom tablet product. These drawings include other properties associated with the ink strokes used to make up the drawings. For instance, line width and color may be stored with the ink. One goal of these systems is to replicate the look and feel of physical ink being applied to a piece of paper.
While computer systems that accept electronic ink are known, at present time their availability and usefulness, in at least some respects, are somewhat limited. To further increase their availability and usefulness, application programs must include code that allows interaction and interfacing with the electronic ink. Accordingly, an application programming interface ("API") that allows code writers to readily, flexibly, and consistently interact and interface with various different groupings of ink would be very useful to those who wish to write code for application programs that interact in some manner with electronic ink.

Ink divider and associated application program interface


Locking mechanisms for releasably connecting handle extensions to tool handles having either compatible lock engaging end portions or standard internally threaded sockets include an adaptor mounted on an outboard end of a handle extension, the adaptor including an extension pole tip with circumferentially spaced thread segments axially insertable into tool handle sockets having compatible lock engaging end portions and threadably connectable to tool handles having standard internally threaded sockets. Means are provided for preventing relative rotation between the adaptor and tool handles having compatible lock engaging end portions when the extension pole tip is fully inserted into the tool handle sockets and for preventing inadvertent pull out of the extension pole tip from the tool handle sockets.

It is generally known to provide handle extensions with quick release lock mechanisms that allow for the quick and easy attachment (and removal) of the handle extensions to (and from) tool handles having compatible lock engaging end portions. However, such quick release lock mechanisms have the objection that they cannot readily be used with tool handles having standard internally threaded sockets unless an appropriate adaptor configured to mate with the quick release lock mechanisms is first threaded into the tool handle sockets. Also there is the potential that the operator/user of such handle extensions may not be aware of the availability of such an adaptor, or even if so aware, the adaptor may be lost or misplaced when the operator/user wants to use it.

Quick release lock mechanisms for handle extensions


There is provided a method of forming a silicon film, which includes: a film forming step of forming the silicon film on a base, the silicon film having a film thickness thicker than a desired film thickness; and an etching step of reducing the film thickness of the silicon film by supplying an etching gas containing bromine or iodine to the silicon film.

Conventionally, there is known a method of supplying an aminosilane-based gas to a base to form a seed layer and supplying an amino group-free silane-based gas to the seed layer to form a silicon film, thereby reducing the thickness of the silicon film. In addition, there is also known a method of forming an amorphous silicon film on a base and then dry-etching the amorphous silicon film using Cl2 gas to reduce the film thickness of the amorphous silicon film, thereby reducing the thickness of the amorphous silicon film and smoothing the surface of the amorphous silicon film. In this method, it is possible to form a thin silicon film, which has good surface smoothness and has no pinhole.
However, with the methods described above, it is difficult to reduce the thickness of a silicon film to meet the needs of further film thickness reduction.

This patent is subject to a terminal disclaimer.

Silicon film forming method and substrate processing apparatus


An apparatus for removing sludge from the tubes and tubesheet of a steam generator. A support structure is adapted to be mounted at an access port of a steam generator. A lance tube extends from the support structure into the steam generator. A spool attached to a high pressure hose is received in the lance tube. A pinch roller assembly mounted on the support structure is used to move the cylinder through the lance tube. High pressure water flows through slots drilled in the spool and out holes in the lance tube against the tubes and tubesheet. A rocker motor causes back and forth rotation or rocking of the lance tube to create a sweeping action. The lance tube may also be adjusted axially to insure that the water streams are directed to the tube lanes.

1. Field of the Invention
The present invention is generally related to equipment for cleaning steam generators and in particular to a high pressure fluid lance for cleaning sludge off the tubesheet and tubes by access to an open tube lane.
2. General Background
In nuclear power stations, steam generators such as recirculating steam generators (RSG's) are used for heat exchange purposes in the generation of steam for driving turbines. Primary fluid which is heated by the core of the nuclear reactor is lead through a collection or bundle of tubes in the RSG. A secondary fluid, generally water, which is fed into the space around the tubes receives heat from the tubes to provide a continuous steam generation cycle. Due to the constant high temperature and severe operating environment, a sludge mainly comprised of iron oxide such as magnetite builds up on the lower outer portion of the tubes and on the tube sheets that support the tube bundle. Since the sludge build up on the tube bundle and tube sheets reduces heat transfer efficiency and can cause corrosion, it is preferable that the tubes and tube sheets be cleaned periodically to remove the sludge.
Conventional RSG sludge lancing consists of the use of segmented lances, usually screwed together, that are moved into and out of the tube bundle by an externally mounted indexer. Operation of these lances requires that the lance sections be removed or added as the lances are retracted or advanced. The addition or removal of lance sections requires that the sludge lancing operation be stopped and it requires the presence of personnel in a radioactive area. Depending on the job and the number of passes required with the lance, as much as one half of the time scheduled for the operation involves adding and removing lance sections. This results in increased radiation exposure of personnel and unproductive down time of the nuclear steam supply system.
Patents related to sludge lancing-that applicants are aware of include the following.
U.S. Pat. No. 4,079,701 discloses a system for removing sludge from a steam generator wherein headers are arranged at the elevation of the sludge to be removed and a fluid lance is moved along the line between the headers.
U.S. Pat. No. 4,424,769 discloses an apparatus for the removal of sludge deposits on the tube sheet of a steam generator wherein a lance assembly is moved into and through the steam generator by a driving mechanism. Cleaning is carried out in successive sequences with different lances that direct cleaning fluid to the tube plate in different zones more and more remote from the lances.
U.S. Pat. No. 4,515,747 discloses a wheeled transporter that is pulled by cables along the tubesheet between the tube bundle and the steam generator shell. Inspection equipment or a nozzle for cleaning the tubesheet may be attached to the transporter.
U.S. Pat. No. 4,566,406 discloses a steam generator having a manifold with a plurality of nozzles for cleaning sludge from the tubesheet. The manifold is rigidly attached to the tubesheet and remains in place during normal operation of the steam generator.
U.S. Pat. No. 4,700,662 discloses a sludge lance wand for cleaning once through steam generators. A curved high pressure fluid feed tube has a plurality of feed tube extensions attached at one end and nozzles attached at a second end for directing fluid toward the tubesheet as the wand is moved through the steam generator.
U.S. Pat. No. 4,757,785 discloses a steam generator sludge removal apparatus wherein a track is assembled between the once through steam generator outer shell and circular shroud around the tube bundle. A motorized carriage driven on the track directs high pressure fluid toward the tube bundle through windows in the circular shroud.


A plug-in connector for connecting to a glow plug in a diesel engine has a circular cross section and a plastic base body on which at least one strip contact is coaxially provided. The strip contact has a longitudinally extending slit and at least one protruding projection on the base body. After the strip contact is installed on the base body the projection is deformed in such a way that it projects at least partially over at least one web of the strip contact after being deformed.

A plug-in connector for connecting to a glow plug in a diesel engine is known from DE 10 2005 014 203 [U.S. Pat. No. 7,165,982]. This known plug-in connector has a circular cross section and a plastic base body on which at least one strip contact, preferably multiple strip contacts, are coaxially provided. This known plug-in connector is mounted on a complementary connector provided on the glow plug, so that after the corresponding contacts of the plug-in connector and of the glow-plug connector are joined together the glow plug may be supplied with power, and sensor signals from the glow plug or sensors provided therein may be received.
These plug-in connectors are subjected to very harsh environmental conditions due to their use in and on internal-combustion engines of vehicles. On the one hand, the plug-in connectors are exposed to very large temperature differences, as well as intense vibrations, impacts, shocks, and the like during operation of the internal-combustion engine. However, since the glow plug, or sensors connected via the plug-in connector to an engine control system, must detect parameters of the internal-combustion engine that are absolutely necessary for engine control, it is important that contact be guaranteed at all times when the plug-in connector and mating connector are joined together. This may be ensured by corresponding complicated measures which, however, are in conflict with economical development and manufacture of such plug-in connectors for diesel engines.
DE 10 2005 014 203 discloses only a plug-in connector having a base body on which multiple strip contacts are provided one behind the other. The manner in which the strip contacts are provided on the base body and manufactured as such is not disclosed in this prior art.

Plug-type connector for use on a glow plug and having an integral projecting blade contact


A field effect transistor switch circuit may include: (1) first, second, and third switch terminals; (2) a first field effect transistor, a pair of the main electrodes of which are connected respectively to the first switch terminal and the second switch terminal; and (3) a second field effect transistor, a pair of the main electrodes of which are connected respectively to the first switch terminal and the third switch terminal. A first resistor is connected between a control electrode and any one of the pair of the main electrodes of the first field effect transistor, and a second resistor is connected between a control electrode and any one of the pair of the main electrodes of the second field effect transistor.

1. Field of the Invention
The present invention relates generally to a field effect transistor switch circuit and, in particular, to a field effect transistor switch circuit for high frequency and high power applications.
2. Related Art of the Invention
Switches composed of MES field effect transistors are widely used in high frequency and high power applications. In these switches, signal lines are switched using the ON and OFF resistances of the transistors.
In general, MES field effect transistors are of depletion type. That is, their threshold voltage Vth below which the drain current becomes zero is negative. Accordingly, when the gate-source potential difference Vgs is 0 V, such a field effect transistor is ON. In order for the field effect transistor to go OFF, a voltage below the threshold voltage Vth needs to be applied. In prior art apparatuses, this voltage has generally been obtained from a negative power supply. However, in another prior art apparatus, internal self-bias effect of a field effect transistor is utilized to generate a reference bias voltage, whereby the necessity of an external bias circuit is avoided (Japanese Laid-Open Patent Publication No. H9-181588).
A DPDT (double pole double throw) switch which needs no external bias circuit is described below in detail as an example of a prior art field effect transistor switch circuit.
FIG. 5 is a circuit diagram showing a DPDT switch which needs no external bias circuit. The DPDT switch comprises four switch terminals, which are two switch input terminals 1 and 3 and two switch output terminals 2 and 4. The switch input terminals 1 and 3 receive input signals IN1 and IN2, respectively. The switch output terminals 2 and 4 provide output signals OUT1 and OUT2, respectively.
Four sets of field effect transistors 5a–5d, 6a–6d, 7a–7d, 8a–8d are arranged respectively between the switch input terminals 1 and 3 and the switch output terminals 2 and 4. Voltages of +Vc and 0 V are selectively applied as control voltages Vc1 and Vc2 to the control terminals 21 and 22, whereby the gate voltages of the field effect transistors 5a–5d, 6a–6d, 7a–7d, 8a–8d are controlled. As a result, the field effect transistors 5a–5d, 6a–6d, 7a–7d, 8a–8d go ON and OFF, and thereby switch the signal lines. In this example, the sources of the field effect transistors 5a–5d, 6a–6d, 7a–7d, 8a–8d are oriented toward the switch input terminal 1 or 3, while the drains are oriented toward the switch output terminal 2 or 4.
Two signal path configurations are available in this apparatus. In a first path configuration, the input signal IN1 inputted to the switch input terminal 1 is outputted as the output signal OUT1 from the switch output terminal 2, while the input signal IN2 inputted to the switch input terminal 3 is outputted as the output signal OUT2 from the switch output terminal 4.
In a second path configuration, the input signal IN1 inputted to the switch input terminal 1 is outputted as the output signal OUT2 from the switch output terminal 4, while the input signal IN2 inputted to the switch input terminal 3 is outputted as the output signal OUT1 from the switch output terminal 2.
Resistors 9a–9d, 10a–10d, 11a–11d, 12a–12d are connected respectively between the gates of the field effect transistors 5a–5d, 6a–6d, 7a–7d, 8a–8d and the control terminal 21 or 22.
DC cut capacitors 13, 14, 15, 16 are connected respectively between: the field effect transistors 5a, 5d, 6a, 6d, 7a, 7d, 8a, 8d; and the switch input terminals 1 and 3 and the switch output terminals 2 and 4.
In FIG. 5, when voltages of +Vc and 0 V are applied respectively as the control voltages Vc1 and Vc2 to the control terminals 21 and 22, relations between potentials at various points connected to the control terminal 21 or 22 become as described below.
When the potentials at the control terminals 21 and 22 are denoted by V(Vc1) and V(Vc2), respectively, the voltage condition is expressed as follows.+Vc=V(Vc1)0V=V(Vc2)The gate potential V(G8d) of the field effect transistor 8d is lower than the potential V(Vc1) of the control terminal 21 because of the voltage drop across the resistor 12d.
In the field effect transistor 8d, a forward current flows through the P-N junction from the gate G8d to the source S8d, thereby generates a voltage drop. In the field effect transistor 5a, a reverse current flows through the P-N junction from the source S5a to the gate G5a, thereby generates a voltage drop.
Further, a resistor 9a generates a voltage drop between the gate G5a of the field effect transistor 5a and the control terminal 22.
These relations are summarized by the following single expression.+Vc=V(Vc1)>V(G8d)>V(S8d)=V(S5a)>V(G5a)>V(Vc2)=0VHere, symbol V(S8d) denotes the source potential of the field effect transistor 8d. Symbol V(S5a) denotes the source potential of the field effect transistor 5a. Symbol V(G5a) denotes the gate potential of the field effect transistor 5a.
In such a bias condition, in the field effect transistor 8d, a forward current flows through the P-N junction because of the forward bias. In the field effect transistor 5a, a reverse current flows through the P-N junction because of the reverse bias.
However, a DC cut capacitor 13 is connected to the switch input terminal 1. Accordingly, the forward current equals the reverse current. Further, if a forward bias and a reverse bias having the same voltage are applied to P-N junctions, the forward current is substantially larger than the reverse current. Accordingly, when the same current flows through the P-N junctions, the voltage drop is substantially larger in the reverse bias than in the forward bias. That is,V(G8d)−V(S8d)<<V(S5a)−V(G5a)Thus, usingV(S5a)=V(S8d)the following relation is obtainedV(S5a)≈V(G8d)
Since the currents flowing through the P-N junctions are sufficiently small, the voltage drops in the resistors 9a and 12d are negligibly small. Thus,V(G8d)≈Vc and V(G5a)≈0VAccordingly,V(S5a)≈Vc
As a result, the field effect transistor 5a goes OFF, while the field effect transistor 8d goes ON.
Similarly, the field effect transistors 5b–5d and 7a–7d goes OFF, while the field effect transistors 6a–6d and 8a–8c goes ON.
As such, only the control voltages Vc1 and Vc2 cause the field effect transistors 5a–5d, 6a–6d, 7a–7d, 8a–8d to serve as switching elements.
Numeral D5a indicates the drain of the field effect transistor 5a. Numerals D5d, S5d, and G5d indicate respectively the drain, source, and gate of the field effect transistor 5d. Numerals D6a, S6a, and G6a indicate respectively the drain, source, and gate of the field effect transistor 6a. Numerals D6d, S6d, and G6d indicate respectively the drain, source, and gate of the field effect transistor 6d. Numerals D7a, S7a, and G7a indicate respectively the drain, source, and gate of the field effect transistor 7a. Numerals D7d, S7d, and G7d indicate respectively the drain, source, and gate of the field effect transistor 7d. Numerals D8a, S8a, and G8a indicate respectively the drain, source, and gate of the field effect transistor 8a. Numeral D8d indicates the drain of the field effect transistor 8d.
A technical problem in the prior art is that the depletion layer expands due to electron trapping effect, whereby the DC potentials of the switch input terminals 1 and 3 exceed +Vc+Vth. In case that the DC potentials of the switch input terminals 1 and 3 rise to this level, the field effect transistors do not go ON even when the gate potentials are set at the voltage +Vc.
The problem that the DC potentials of the switch input terminals 1 and 3 rise to this level is described below in detail. In the field effect transistor switch circuit shown in FIG. 5, all the field effect transistors 5a–5d, 6a–6d, 7a–7d, 8a–8d have the same characteristics. Further, the gate-source capacitance equals the gate-drain capacitance in each field effect transistor 5a–5d, 6a–6d, 7a–7d, 8a–8d. The gate of each field effect transistor 5a–5d, 6a–6d, 7a–7d, 8a–8d is biased through a resistor 9a–9d, 10a–10d, 11a–11d, 12a–12d having a high resistance. Thus, the bias circuit equivalently has a high impedance for high frequency.
When voltages of +Vc and 0 V are applied respectively as the control voltages Vc1 and Vc2 to the control terminals 21 and 22, the field effect transistors 5a–5d shown in FIG. 5 go OFF. These field effect transistors 5a–5d in the OFF state are equivalent to a serial connection of eight capacitances composed of the gate-source capacitances C and the gate-drain capacitances C. FIG. 6 schematically shows these capacitances C and the gate resistors 9a–9d.
When a high frequency signal having an amplitude of Vin is inputted as the input signal IN1 to the switch input terminal 1, the high frequency signal is divided by the gate-source capacitances C and the gate-drain capacitances C of the field effect transistors 5a–5d. As a result, the time-dependent changes in the potentials V(S5a), V(G5a), and V(D5a) of the source S5a, the gate G5a, and the drain D5a of the field effect transistor 5a are as shown in FIG. 7. The vertical axis in FIG. 7 indicates the potential at each measurement point, while the horizontal axis indicates the time.
In the field effect transistor 5a, the bias conditions at t=t1 and at t=t2 are as shown in FIGS. 8A and 8B, respectively. When the amplitude of the input signal is large, the field effect transistor 5a goes under a strong reverse bias condition at t=t1 and t=t2.
FIGS. 9A and 9B are cross sectional views of the structure of the field effect transistor 5a which is the first-stage field effect transistor relative to the switch input terminal 1 among the field effect transistors 5a–5d in the OFF state. In FIGS. 9A and 9B, mark "+" indicates a hole, while encircled mark "−" indicates an electron.
As shown in FIG. 9A, when a voltage of 0 V is applied to the gate, the depletion layer under the gate extends to the channel, whereby the field effect transistor 5a go OFF. However, when a signal having a large amplitude is applied to the source terminal and when the P-N junction thereby goes under a reverse bias condition as described above, a leak current flows from the gate, whereby electrons are trapped in the surface potentials (traps) between the gate and the source and between the gate and the drain. The depletion layer expands proportionally to the number of electrons. FIG. 9B illustrates the expanded depletion layer. The field effect transistor 5a immediately adjacent to the switch input terminal receives a signal having the largest amplitude. This causes a large reverse bias, and hence a wide expansion in the depletion layer.
Even when the depletion layer is in the expanded state, the field effect transistors 5a–5d are OFF. Accordingly, the field effect transistors 5a–5d are equivalent to a serial connection of eight capacitances composed of the gate-source capacitances and the gate-drain capacitances.
However, since the depletion layer is in the expanded state as described above, the gate-source capacitance of the field effect transistor 5a is smaller than the other gate-source capacitances and the gate-drain capacitances. The capacitance of each portion with an unexpanded depletion layer is C, while the capacitance of the portion with an expanded depletion layer is assumed to (½)C for simplicity. FIG. 10 schematically shows these capacitances and the resistors 9a–9d.
In such a situation, when a high frequency signal having an amplitude of Vin is inputted as the input signal IN1 to the switch input terminal 1, the time-dependent changes in the potentials V(S5a), V(G5a), and V(D5a) of the source S5a, the gate G5a, and the drain D5a of the field effect transistor 5a are as shown in FIG. 11. In this case, the gate-source capacitance of the field effect transistor 5a equals ½ of each of the gate-drain capacitances and the gate-source capacitances of the other field effect transistors 5b–5d. Accordingly, in contrast to FIG. 7, the voltage drop of the capacitance between the source S5a and the gate G5a of the field effect transistor 5a is twice value of each of the other capacitances.
The potentials of the source S5a, the gate G5a, and the drain D5a of the field effect transistor 5a at t=t1 and t2 behave as follows. As shown in FIG. 12, when the amplitude of the input signal is small, the field effect transistor 5a remains OFF. In contrast, when the amplitude of the input signal is large, the field effect transistor 5a goes ON. When the field effect transistor 5a goes ON, electric charge moves from the DC cut capacitor 14 to the DC cut capacitor 13. As a result, the DC cut capacitor 13 is charged up, and hence the DC potential of the switch input terminal 1 rises.
The potential of the switch input terminal 1 is at approximately Vc in the original state. Accordingly, when the potential rises slightly, the potential exceeds Vc immediately. Even when the state V(S5a)−Vc>Vth is reached, the field effect transistors 8a–8d do not go ON in case that Vc1=+Vc.
Accordingly, in this prior art field effect transistor switch circuit, when a signal having a large amplitude is inputted, the depletion layer expands due to electron trapping effect, whereby unbalance occurs between the DC cut capacitors 13 and 14. This causes a rise in the DC potential of the switch input terminal 1, and thereby disables ON/OFF switching operations which are the basic operations of a switch.
As such, the gate-source capacitance of the field effect transistor in the OFF state decreases due to the expansion of the depletion layer, whereas the gate-drain capacitance does not decrease regardless of the expansion of the depletion layer. This fact is described below. In FIG. 5, it is assumed that the field effect transistors 8a–8d are OFF and that the field effect transistors 5a–5d are ON. In this case, the field effect transistors 8a–8d are approximated as a serial connection circuit of capacitances. Assuming that the depletion layers are normal, the potentials V(S8d), V(G8d), V(D8d) are as shown in FIG. 13. At t=t2, the gate-drain voltage isVgd=3−(⅛)Vawhile the gate-source voltage isVgs=3+(⅛)VaThat is, Vgs>Vgd. This indicates that the depletion layer expands more in the gate-source region than in the gate-drain region.

Matsushita Electric Industrial Co., Ltd.


A holographic data storage apparatus having no readout lens. The apparatus has a spatial light modulator (SLM), a focusing element such as a lens, a holographic data storage material and a spatial light detector such as a CCD. The lens is located between the SLM and CCD such that the SLM is imaged onto the CCD (i.e. the positions of the SLM, lens, and CCD satisfy the lens equation). The holographic storage material is located between the lens and CCD. Preferably, the storage material is located centered upon a Fourier plane of the lens. In this case, the apparatus also has a phase mask located adjacent to the SLM. Alternatively, the storage material is located a distance away from the Fourier plane or is not centered on the Fourier plane. In yet another embodiment, the holographic storage material is located in contact with the CCD.

Optical systems provide extremely fast and effective means for processing information. In a typical system, an image comprising data is modulated into a coherent light beam. This can be performed by a spatial light modulator placed in the beam. The resulting spatially modulated beam then enters a series of optical elements which filter and process the image, and a detector records the final output. The list of applications for these systems is long, including image and data processing, pattern recognition, optical computation, and high density data storage systems such as holographic data storage systems.
Prior art holographic data storage systems have primarily made use of Fourier hologram recordings. In such a system, a collimated laser beam is directed through a spatial light modulator (SLM) which impresses into the beam the desired optical data to be stored in the system. The spatially modulated output of the SLM is directed towards a positive lens. The SLM is located at a front focal plane of the lens, while a holographic storage material, commonly a photorefractive crystal or photosensitive material, is located at a back focal plane. It is well known that after passing through the lens and arriving at the crystal, the modulated beam generates the spatial Fourier transform of the original data (see, for example, J. W. Goodman, Introduction to Fourier Optics, McGraw-Hill, 1968). Hence, a volume hologram is formed in the crystal by the interference of the modulated beam with a reference laser beam directed into the crystal.
Once the hologram is created, the original signal can be retrieved by directing the reference beam into the crystal. However, the reconstructed beam initially contains the transformed data not the original data. To render the optical data in its original form produced by the SLM, the reconstructed beam must be focused by a lens, referred to hereafter as a readout lens. Generally, the readout lens focuses the beam on the surface of a spatial light detector, most commonly a charge coupled device (CCD). The resulting image is that of the original data and is consequently recovered by the detector.
A 4-focal length (4-f) Fourier holography arrangement has traditionally been used for holograhic data storage. In a 4-f system, a spatial light modulator is placed at the front focal plane of a first lens and the holographic storage medium is placed at the back focal plane (the Fourier plane) of the first lens. A second lens is placed after the medium at a distance from the first lens equal to the sum of the focal lengths of the first and second lens, and a detector array is placed at the back focal plane of the second lens. Each pixel imaged on the detector array is recorded throughout the medium. The device is therefore less susceptible to error than a device which records data only at an image plane. Also, the tolerances of lens placement and design are less strict. However, a 4-f system has the disadvantage of requiring a relatively large number of optical components, which increases the cost of such systems.
Prior art holographic data storage systems generally require a relatively large number of complex and costly optical components.


A Fourier hologram with the distribution of a radial harmonic function creates, in the far field, a pseudo non-diffracting beam. The properties of this pseudo non-diffracting beam can be set by appropriate characterization of the radial harmonic function. Various operations can also be carried out to change the position of the beam relative to the focal point. The beam can be shifted in space, twisted, or tilted.

This invention was funded by the U.S. Army Research Office and the Advanced Research Projects Agency. The government may have certain rights in this invention.
The present invention relates to an optical system which generates light beams having special properties at the output of an optical system. More specifically, the optical system of the present invention uses a special kind of radial harmonic function, preferably formed on a Fourier hologram, to produce a non-diverging beam in its far field.
Optical systems often have many important and diverse applications. Lasers, for example, allow a beam of light to be projected to a precise location, still maintaining a high intensity.
It is a common inaccurate belief that a laser emits a collimated or non-diffracting beam. In actuality, while the beam is more collimated than light from an ordinary lamp, in fact the laser beam is a Gaussian beam. The Gaussian beam diverges according to the rule that the spread angles are related to the wavelength of the light divided by the minimal lateral width of the beam. The Rayleigh distance xcex94z, or non-diffracting beam width of this Gaussian is expressed as:       Δ              xe2x80x83            z    ∝            W      2        λ
where w is the initial beam width and xcex is the wavelength. This equation shows that reducing the initial width of the beam actually increases the spreading of the beam.
One aspect of the present invention avoids these phenomena by producing a beam which has better non-diffracting characteristics than a laser beam. The resulting beam has pseudo-non-diffracting properties, which is to say that the beam does not diffract over a defined interval. A pseudo non-diffracting beam (xe2x80x9cPNDBxe2x80x9d) behaves as a non-diffracting beam only in the sense that, in contrast to a Gaussian beam, its peak intensity remains almost constant along an axial intervalxe2x80x94its xe2x80x9clengthxe2x80x9d. The beam full width in half maximum (xe2x80x9cFWHMxe2x80x9d) increases much more slowly than expected from an ordinary Gaussian beam.
This is coupled with another problem which the inventors recognized as existing in the art. When a plane wave crosses a simple spherical lens, that plane wave is focused to the lens"" front focus. The distance between the front focus and the lens is called the focal length. The focal point is on the optical axis of the lens, which is usually an axis that is parallel to the light rays, and that passes through the center of the lens.
A simple lens produces an output which has a bell-curve-shaped intensity profile along the optical axis. Such a system would show a strong intensity precisely at the focal point. That intensity falls off rapidly on both sides of the focal point. A lens can be used to focus the information onto the focal point. However, even a slight deviation from the distance of the focal point will cause results which vary greatly from that desired. In a typical optical system, this results in a sharp image at the focal point, and a blurred image off the focal point.
The width of the bell curve-shaped intensity profile at the output of a lens is sometimes called the depth of focus of the lens. Some lens systems allow wider depths of field, making it easier to stay within the focal point of the lens. Various techniques are known for increasing the depth of focus.
The output characteristics of an optical system are defined according to the so-called point spread function. This point spread function tells us about the output of the system when there is a point at the input. The information is calculated by convolving the input function i with the function h. For a normal point spread function, the output is sharp and clear in the imaging plane.
It is one objective of the present invention to change the ordinary behavior of light when it passes through a lens and optical system to form a pseudo-non-diffracting beamxe2x80x94essentially a very wide depth of focus. The present invention defines an optical system that has a filter in the path of the light prior to the lens. The overall optical system forms a pseudo-non-diffracting beam over a specified position. Put another way, the present invention allows obtaining a very long point spread function.
The term xe2x80x9csword beamxe2x80x9d as used in this specification refers to a beam that maintains a constant intensity along a defined optical axis for an arbitrary interval. The lateral width at any cross section of the sword beam is substantially the same as that of the focused beam from an ordinary lens.
It is known that the depth of field of an optical system can be increased by placing an aperture with a narrow ring at the rear focal plane of the lens. See, for example, T. Durnin, JOSA A 4651 (1987). FIG. 1 shows a schematic of that system. That rear focal plane is located at a focal distance from the lens, but on the same side of the lens from which the light arrives.
This system, however, has a number of drawbacks. Only a very small portion of the light passes through the narrow ring and becomes useful at the front focus. Most of the energy of the light is absorbed by the opaque regions of the mask. This results in an extremely inefficient optical system.
Others have suggested preprocessing the optical energy using a Fresnel plate. However, each section of the Fresnel plate has a different frequency. The plate is not radially symmetric, causing certain problems in the output.
For instance, when such a plate is used as a spatial filter of an imaging system, the quality of the output image will be different from one radial direction to another. That is because the output image is obtained from a convolution between the input image and a non-symmetric point spread function (the Fourier transform of the spatial filter distribution). Another example is producing a long narrow tunnel in some material by using a beam emerged from such a plate. The lateral cross section of the tunnel will not be radially symmetric if the beam is not radially symmetric.
Another suggestion has used an alternate technique to provide a desired output. The iterative technique defines constraints of the input and output domains, expresses the distances between the two by an error function, and iteratively finds a hologram that minimizes the error under the constraints. The iterative technique is described, for example, in J. Rosen; A. Yariv; xe2x80x9cSynthesis of an arbitrary axial field profile by Computer-Generated Hologramsxe2x80x9d, Optics Letters, Vol 11, #19, pp. #843-845.
Certain of these suggestions have been made by the present inventors, so no admission is made herein that this iterative technique is, in fact, prior art.
It is an object of the present invention to provide a totally new solution to these problems, using a completely new technique. A preferred technique of the present invention uses a special mask at the rear focal plane of the lens. This mask has a light-altering function formed thereon. This function is preferably a radial harmonic function, and more preferably a phase-only function, e.g., a radial harmonic function of the 4th order or greater. The optical system forms a desired pseudo non-diffracting beam having desired characteristics at a specified position. That position can be the front focal point of the lens or other positions. The properties of the sword beam can be controlled using various parameters of the filter.
The inventors have found that a radial harmonic function of the fourth order produces substantially improved effects since virtually no light is absorbed by the mask. A 4th order harmonic system operates as a phase-only filter to change the wave""s phase distribution when it passes through the filter. Other techniques, including other orders of radial harmonic function, however, can also be used. More generally, any approximate solution to the ideal Bessel function can be used, and preferably a solution made using the known mathematical theory of stationary phase approximation.
The method of stationary phase approximation is a mathematical technique to solve (approximately) integrals of the form ∫ab f(t)exp[jkxcexc(t)]dt. The method is based on the fact that for a large k the significant contribution to the integral result comes from the area under the function f(t)exp[jku(t)] around the stationary points. A stationary point to is the point where the derivative of xcexc(t) is zero. For example, if xcexcxe2x80x2(to)=0, but xcexcxe2x80x3(to) xe2x89xa00 and to is the only stationary point inside the interval [a,b], the integral is approximately equal to             ∫      a      b                          f                          (          t          )                                  exp                          [                      j                                      xe2x80x83                                    k                                      xe2x80x83                                                  μ                                            (                t                )                                              ]                                  ⅆ        t              ≈            f                    (                  t          0                )                        exp                    [                  j                                xe2x80x83                              k                                xe2x80x83                                          μ                                      (                              t                0                            )                                      ]                                          2                    π                          k                                xe2x80x83                                                        μ              xe2x80x3                                                  (                              t                0                            )                                                              exp                          (                      j                                      xe2x80x83                                                  π              /              4                                )                    .
More details about this method are described in: A. Papoulis, Systems and transforms with applications in optics, Ch. 7, 222-254, (McGraw-Hill 1968).
The present invention also describes techniques which change the original radial harmonic function to shift the sword beam within the optical space, even tilting it by up to 20xc2x0 from the optical axis and/or changing the position relative to the focal point. These shifting techniques allow the focal line for the light to be modified in any desired way.
Another aspect of the invention makes use of the shifting technique to allow the focal line to be a line of any desired shape. The inventors have titled this arbitrary-shaped focal line a xe2x80x9csnake beamxe2x80x9d.
The sword beam has important applications in imaging systems and/or in any application where a laser is or can be used. The output of an imaging system is an observed object which is located at the input plane. Its image is obtained at the image plane. If the image is observed at a distance away from the image plane, it looks out of focusxe2x80x94it looks like a blurred image of the original object.
The radial harmonic filter system of the present invention keeps the image pattern in focus for a longer distancexe2x80x94a distance equal to the length of the pseudo non-diffracting beam. Since this beam is shaped like a sword, it is sometimes called a sword beam. This system effectively increases the focal length of the imaging system. This technique has many applications as described herein.
A well-known telescopic system can be used according to the present invention. This system uses two lenses, one behind the other, with a common focal plane. When the image is placed in the rear focal plane of the first lens, the image plane becomes the front focal plane of the second lens. The radial harmonic filter is displayed between the two lenses at their common focal plane. When the two image systems are compared, the image in the system with the filter is clear and sharp while the other one is not.

Optical system using a radial harmonic pupil filter for generating collimated beams


In data transfer in isochronous mode using an IEEE1394 serial bus, the data transfer rate is guaranteed, but data transfer is disabled if the number of channels is insufficient. An already assigned channel is released by lowering the data transfer rate currently using that channel, and the released channel is assigned to new data transfer, thus allowing the new data transfer.

The present invention relates to a data transfer apparatus for transmitting/receiving, e.g., image data via communications, and its control method and, more particularly, to a data transfer apparatus of, e.g., an image processing device which outputs a large volume of data onto a communication path and must guarantee a given lower reduce of the data transfer rate like in a case wherein image data is transmitted to and printed by an electrophotographic printer, and its control method.
In recent years, high-speed serial communications such as IEEE1394 and the like begin to be used.
USB, IEEE1394, and the like comprise a mechanism for implementing data transfer with a data transfer rate guaranteed such as isochronous transfer mode. In isochronous transfer mode, since a required number of channels capable of data transfer are assured at prescribed cycle time intervals, a data transfer rate corresponding to the processing performance of a device is assured to transfer image data from an image scanning device to a computer or from the computer to an image forming device.
In high-speed serial communications such as IEEE1394, since the number of channels capable of data transfer in each prescribed cycle time interval is limited, if a given device has assured channels in such conventional image processing system, another device often fails to assure a required number of channels.

Data transfer apparatus and its control method


A scraper hand tool with a retractable scraper blade, allowing the scraper blade to be moved in and out of a protected position, by including springs, which provide the force required for automatically moving the scraper blade from the extended to the retracted position.

Scrapers are commonly used for cleaning surfaces especially for removing paint, adhesives or other materials from surfaces which are essentially flat and smooth. For many years scrapers have been known with blades that can be moved between an extended position when in use and a protected or retracted position when not is use. Examples of such scrapers are shown in U.S. Pat. No. 4,558,517 or U.S. Pat. No. 4,955,138.
The common solution for moving the scraper blade between the extended and the retracted position is a trigger that can be located at the top of the scraper. This trigger is connected to a movable part of the scraper which is securely connected to the scraper blade. This allows the scraper blade to be moved in and out of the scraper casing by operating the trigger forward and back on the tool. The trigger is operated by using the thumb or another finger and requires the operator to apply pressure to move the trigger forward. In order to prevent the user from the need of exerting a permanent force on the trigger to keep the scraper blade in the extended position a lock mechanism is commonly used, which keeps the scraper blade in the extended position until the task is finished and the scraper blade can be stowed back into the retracted position. Depending on the type of mechanism used for locking the scraper in the extended position an additional force is required to move the scraper blade into and out of this position. For example it may be required to use the second hand to turn a knob fixing the scraper blade in the extended position as shown in U.S. Pat. No. 8,291,598. Alternately the trigger may be constructed in a way that it contains a mechanism that locks in either the retracted or the extended position as shown in U.S. Pat. No. 8,171,646. In this case the scraper blade slide must be disengaged by applying an additional force on the trigger for moving the scraper blade slide.
In U.S. Pat. No. 6,775,912 a solution is shown where only one trigger is used for moving the scraper blade slide from the retracted to the extended position and back. In this case an additional force perpendicular to the moving direction of the scraper blade is required to disengage the scraper blade slide from one of the two predefined positions before it can be moved to the other position.
In cases where the scraper is operated back and forth between the extended and the retracted position many times the operators thumb and fingers will tire quickly, as a force must be applied in forward and downward for moving the scraper blade to the extended position for using the scraper hand tool and backward and downward again after use for storing the scraper blade back in the protected position. Also as the scraper blade must be actively moved back to the retracted position, it is likely the operator will leave the scraper blade in the extended position, thus increasing the risk of injury.


A test method and a semiconductor device is disclosed. One embodiment provides sending out a test signal by a semiconductor device. A reflected signal generated in reaction is compared to the test signal with a first threshold value. The reflected signal is compared with a second threshold value differing from the first threshold value.

The invention relates to a test method, a test device, as well as to a semiconductor device, in one embodiment a data buffer device, and to a memory module.
Semiconductor devices, e.g., corresponding, integrated (analog or digital) computing circuits, semiconductor memory devices such as, for instance, functional memory devices (PLAs, PALs, etc.) and table memory devices (e.g., ROMs or RAMs, in one embodiment SRAMs and DRAMs), etc. are subject to comprehensive tests during and after their manufacturing process.
For the common manufacturing of a plurality of (in general identical) semiconductor devices, a wafer (i.e. a thin disc of monocrystalline silicon) is used. The wafer is processed appropriately (e.g., subject successively to a plurality of coating, exposure, etching, diffusion, and implantation process, etc.), and subsequently sawn apart (or e.g., scratched, and broken), so that the individual devices are then available.
During the manufacturing of semiconductor devices (e.g., of DRAMs (Dynamic Random Access Memories or dynamic write-read memories)), in one embodiment of DDR-DRAMs (Double Data Rate-DRAMs)—even before all the desired, above-mentioned processing were performed on the wafer—(i.e. already in a semi-finished state of the semiconductor devices) the (semi-finished) devices (that are still available on the wafer) may be subject to appropriate test methods at one or a plurality of test stations by using one or a plurality of test devices (e.g., kerf measurements at the wafer kerf).
After the finishing of the semiconductor devices (i.e. after the performing of all the above-mentioned wafer processing), the semiconductor devices are subject to further test methods at one or a plurality of (further) test stations—for instance, by using appropriate (further) test devices, the finished devices—that are still available on the wafer—may be tested appropriately (so-called "wafer tests").
Correspondingly, one or a plurality of further tests (at corresponding further test stations, and by using appropriate, further test devices) may be performed, for instance, after the incorporation of the semiconductor devices in the corresponding semiconductor device packages, and/or e.g., after the incorporation of the semiconductor device packages (along with the respectively included semiconductor devices) in corresponding electronic modules, e.g., memory modules (so-called "module tests").
In a plurality of applications—e.g., in server or workstation computers, etc.—memory modules with upstream data buffer devices (so-called buffers) may be used, e.g., "buffered" or "registered" DIMMs, FB-DIMMs (FB-DIMM=Fully Buffered DIMM), etc.
Such memory modules include in general one or a plurality of semiconductor memory devices, in one embodiment DRAMs, and—upstream of the semiconductor memory devices—one or a plurality of data buffer devices (which may, for instance, be arranged on the same printed circuit board as the DRAMs).
The memory modules are in one embodiment by interconnecting an appropriate memory controller (which is, for instance, positioned externally of the respective memory module)—connected with one or a plurality of microprocessors of the respective server or workstation computer, etc.
Caused by the upstream arrangement of the data buffer devices (buffers), it is possible to perform the above-mentioned conventional module tests only in a very restricted scope in the above-mentioned "registered" DIMMs, FB-DIMMs, etc. One reason for this is that the signals exchanged between a respective buffer and the DRAMs are not accessible from outside. Therefore, the quality of the connections between the buffer and the DRAMs can, for instance, only be tested indirectly by using conventional test methods.
For these and other reasons, there is a need for the present invention.


A data embedding technique that adds a watermark in the form of embedded data in the RGB domain in a duplex color laser printer. The data embedding algorithm employs a two-color (cyan and magenta) patch based coding scheme. Each bit of raw data is coded by a rectangular patch (“data area”) of either cyan or magenta color surrounded by white space (“space area”). The combination of a single data area and corresponding space area is a “data cell”.

1. Field of the Invention
This invention relates to data embedding and retrieval algorithms for a color laser printer, and more particularly to a multi-color patch based coding scheme. The invention can be embodied in a method, a program of instructions (e.g., software) and/or an apparatus.
2. Description of the Related Art
Conventionally, most printer-added watermarks have been inserted when the data is in the CMYK domain. ("CMYK" depicts a color space composed of cyan (C), magenta (M), yellow (Y) and black (K)). This is especially true for ink-jet printers in which the device driver has full access to the output dot pattern. However, for color laser printers, a CMYK-domain watermark requires direct access to the CMYK color space, which is deep inside the printer pipeline, as shown in FIG. 1.
For a duplex laser printer, it is not uncommon to apply tone reduction to reduce bleed-thru for plain paper printing. However, this step can adversely affect a watermark added at either the RGB domain or CMYK domain stage of the pipeline. Using tone reduction, even a saturated pixel might not appear on the printout after going through screening. This makes the adage "a dot is a dot" no longer true. On the other hand, if the embedded watermark data is to be printed on the backside of document, the bleed-thru problem must be overcome. An additional constraint to consider is that many laser printer engine manufactures put their own watermark on the Y channel.

Data embedding scheme for duplex color laser printer