Disclosed herein are a printed circuit board with embedded capacitors therein and a process for manufacturing the printed circuit board. The embedded capacitors are formed by applying a photosensitive insulating resin to a printed circuit board inner layer, and applying a high dielectric polymer capacitor paste thereto. The process for manufacturing a printed circuit board with embedded capacitors therein comprises the steps of: i) laminating photo resist dry films to a copper clad FR-4, exposing to light and developing the dry films, and etching copper foils of the copper clad FR-4 to form bottom electrodes for forming capacitors; ii) applying a photosensitive insulating resin to the surfaces of the bottom electrodes, and exposing to light and developing to etch the photosensitive insulating resin; iii) applying a capacitor paste to the etched regions and curing the capacitor paste; iv) plating the upper regions of the cured capacitor paste and the photosensitive insulating resin using an electroless copper plating process to form copper foil layers for top electrodes; v) laminating photosensitive dry films to the copper foil layers for top electrodes, and exposing to light and developing the photosensitive dry films to etch regions of the dry films except for the copper foil layers where the top electrodes are to be formed; and vi) etching the regions of the dry films except for the copper foil layers where the top electrodes are to be formed, and the dry films formed on the top electrodes are removed so that the capacitor paste is discretely positioned between the top electrodes and the bottom electrodes to form discrete capacitors.

1. Field of the Invention
The present invention relates to a printed circuit board with embedded capacitors therein, and a process for manufacturing the printed circuit board. More particularly, the present invention relates to a printed circuit board with embedded capacitors therein in which the embedded capacitors are formed by applying a photosensitive insulating resin to a printed circuit board (PCB) inner layer and applying a high dielectric polymer capacitor paste thereto, and a process for manufacturing the printed circuit board.
2. Description of the Related Art
Common discrete chip resistors or discrete chip capacitors have been mounted on the surfaces of conventional printed circuit boards (PCBs). Recently, printed circuit boards with embedded passive devices such as resistors, capacitors, etc. therein are developed.
Such printed circuit boards with embedded passive devices therein are manufactured by a process comprising inserting passive devices such as resistors, capacitors, etc., into an inner or outer layer of a substrate using novel materials (substances) and processes, thereby replacing the functions of conventional chip resistors and chip capacitors. That is, the printed circuit boards with embedded passive devices therein include passive devices, e.g., capacitors, buried in the inner or outer layer of the substrate. The term "embedded capacitors" used herein refers to capacitors as passive devices which are mounted as parts of a printed circuit board, irregardless of the size of a substrate. The substrate is referred to as "embedded capacitor PCB". The most important advantage of the embedded capacitor PCB is that since the capacitors are mounted as parts of the printed circuit board, there is no need to mount the capacitors on the surfaces of the printed circuit board.
On the other hand, recent techniques for manufacturing the embedded capacitor printed circuit board are largely classified into the following three techniques:
The first technique is a method for manufacturing polymer thick film type capacitors comprising application of a polymer capacitor paste and thermal curing (that is, drying) of the paste. Specifically, according to this method, the embedded capacitors are formed by applying the polymer capacitor paste to the printed circuit board inner layer, drying the polymer capacitor paste, printing a copper paste on the resulting printed circuit board to form electrodes and drying the copper paste.
The second technique is a method for manufacturing embedded discrete type capacitors comprising coating a ceramic filled photo-dielectric resin onto a printed circuit board. The related patent is owned by Motorola Inc. Specifically, according to this method, the discrete capacitors are formed by coating the photo-dielectric resin containing ceramic powders onto both surfaces of a substrate, laminating copper foils thereto to form respective top electrodes and bottom electrodes, forming circuit patterns thereon, and etching the photo-dielectric resin.
The third technique is a method for manufacturing power distributed decoupling capacitors comprising inserting dielectric layers having a capacitance characteristic into the printed circuit board inner layer, thereby replacing decoupling capacitors mounted on the surfaces of the conventional printed circuit boards. The related patent is owned by Sanmina Corp. Specifically, according to this method, power distributed decoupling capacitors are formed by a process comprising inserting dielectric layers composed of power electrodes and ground electrodes into the inner layers of the printed circuit board.
A variety of processes are developed based on the three techniques discussed above. Procedures for carrying out the processes are different from each other. Since a market for the printed circuit boards with embedded capacitors therein is small, the standardization of these techniques is not yet achieved and trials to develop commercially available processes are still ongoing.
Hereinafter, printed circuit boards with embedded capacitors therein and the processes for manufacturing the printed circuit boards according to the prior arts will be explained in more detail with reference to the accompanying drawings.
The first prior art is explained with reference to FIGS. 1a to 1e.
FIGS. 1a to 1e are sectional views showing a process for manufacturing a printed circuit board with embedded polymer thick film type capacitors therein according to the first prior art. Referring to FIGS. 1a to 1e, the printed circuit board with embedded polymer thick film type capacitors is manufactured by a process comprising application of a polymer capacitor paste and thermal drying (that is, curing) of the paste.
In step 1, a dry film is coated onto a copper foil of a PCB inner layer 42 composed of FR-4, and then subject to light exposure and development. The copper foil is etched to form copper foils 44a and 44b for positive (+) electrodes, copper foils 43a and 43b for negative (−) electrodes and clearances formed therebetween (FIG. 1a).
In step 2, a capacitor paste, a polymer containing ceramic powders of high dielectric constant, is applied to the copper foils 43a and 43b for negative (−) electrodes using a screen-printing manner, and is then dried or cured (FIG. 1b). The screen-printing manner refers to a printing method in which a medium, e.g., ink, is passed through a stencil screen using a squeezer to form a pattern on a substrate surface.
At this step, screened capacitor pastes 45a and 45b cover the copper foils 44a and 44b for positive (+) electrodes, the copper foils 43a and 43b for negative (−) electrodes and the clearances formed therebetween.
In step 3, a conductive paste such as silver and copper paste is applied to the resulting structure using a screen-printing manner to form positive (+) electrodes 46a and 46b, and then dried or cured (FIG. 1c).
In step 4, the capacitor layer formed on a copper foil 41 of the PCB inner layer 42 formed through the previous steps 1 to 3 is inserted between insulators 47a and 47b, and then the three layers are laminated to each other (FIG. 1d), wherein reference numerals 48a and 48b designate copper foil layers attached onto insulators 47a and 47b, respectively.
In step 5, through-holes (TH) and laser blinded via holes (LBVH) 49a and 49b are formed on the laminated product. The capacitors present in the interior of the laminated product are connected to corresponding positive (+) terminals 51a and 51b and negative terminals 50a and 50b of IC chips 52a and 52b through via the through-holes (TH) and the laser blinded via holes (LBVH) 49a and 49b, respectively. Accordingly, the capacitors function as embedded capacitors (FIG. 1e).
One of the problems concerning the first technique of the conventional techniques discussed above is the occurrence of cracks of the capacitor pastes 45a and 45b at ends of the positive (+) electrodes 46a and 46b.
FIGS. 2a and 2b are sectional views illustrating problems of the printed circuit board manufactured by the process shown in FIGS. 1a to 1e, respectively.
Referring to FIG. 1b, when the capacitor pastes 45a and 45b are printed on the copper foils 43a and 43b for negative (−) electrodes and dried in step 2 above, cracks (C) occur as shown in FIG. 2a. The occurrence of cracks (C) results from the thickness of the copper foils for negative (−) electrodes. The copper foils of the PCB inner layer commonly have a thickness of ½ oz (18 μm) or 1 oz (36 μm). Since the thickness of the printed capacitors is about 10 μm, cracks occur at ends of the copper foils for negative (−) electrodes. The cracks also cause problems that when the copper pastes 45a and 45b connected to the copper foils 44a and 44b for positive (+) electrodes are printed, an interlayer short between the negative (−) electrodes and the positive (+) electrodes is poor.
In addition, the second problem concerning the first technique of the conventional techniques discussed above is non-uniform insulation distance between a first layer and a second layer shown in FIG. 1e.
When the embedded capacitors 45a and 45b are formed in accordance with the steps of FIG. 1a to 1e and the insulators 47a and 47b are laminated as shown in step 4, the difference between the insulation distance from the capacitors to a first layer (designated by A) and the insulation distance from a second layer (designated by B) or a third layer in the inner layer core to the first layer, becomes large (FIG. 2b). For example, when the insulators have a thickness of 80 μm, the insulation distance (A) from the copper power electrodes 46a and 46b of the inner layer capacitors to the first layer is 20˜30 μm, while the insulation distance (B) from the FR-4 core 42 or the copper foils of the second layer to the first layer is 60˜70 μm. The difference between the insulation distances is because both the capacitor pastes 45a and 45b and the copper power electrodes 46a and 46b have a thickness of 10˜15 μm. The difference in the insulation distances leads to poor impedance of signal circuits in the first layer and the second layer.
Furthermore, the third problem concerning the first technique of the conventional techniques discussed above is the presence of impurities occurring during printing and drying of the capacitor pastes 45a and 45b.
As shown in FIG. 1b, after the capacitor pastes 45a and 45b are printed in a thickness of 10˜15 μm, dried at 150° C. or higher for 30˜90 minutes, the copper pastes 46a and 46b are printed thereon and dried. At this time, impurities occur during the printing. When the printed copper pastes 46a and 46b are dried, a number of voids are formed due to the impurities. The voids lead to a poor interlayer short between the positive (+) electrodes and the negative (−) electrodes when the copper pastes 46a and 46b connected to the copper foils 44a and 44b for positive (+) electrodes are printed on the capacitor pastes 45a and 45b and then dried.
Next, the second technique will be explained with reference to FIGS. 3a to 3c.
FIGS. 3a to 3f are sectional views showing a process for manufacturing a printed circuit board with embedded discrete capacitors formed by coating a photo-dielectric resin in accordance with a prior art. The embedded discrete type capacitors are formed by a process comprising coating the ceramic filled photo-dielectric resin onto a printed circuit board. The process will be explained with reference with U.S. Pat. No. 6,349,456 issued to Motorola Inc.
In step 1, a dielectric layer 14 containing ceramic powders is coated onto a substrate 10 on which a conductor layer 12 is formed, and then subjected to light exposure and thermal drying (FIG. 3a).
In step 2, a laminate copper foil 16 is applied to the surface of the dried dielectric layer 14 (FIG. 3b). The reference numeral 18 designates a sacrificial layer tin-plated onto the copper foil 16 to use as a copper etching resist.
In step 3, a dry film is laminated to the sacrificial layer 18, and then exposed to light and developed. The sacrificial layer 18 and the copper foil 16 are etched to form top electrodes 20 (FIG. 3c).
In step 4, the dielectric layer 14 underlying the top electrode 20 is exposed to light, and then the resulting dielectric layers 22 are etched. The top copper electrodes 20 serve as photomasks for the dielectric layer 14 (FIG. 3d).
In step 5, the copper foil 12 underlying the etched dielectric layers 22 is etched to form bottom electrodes 24 (FIG. 3e).
In final step 6, the capacitor layer 32 formed through the previous steps 1 to 5 is inserted between insulators 26, and then metal layers are laminated thereon (FIG. 3f).
Thereafter, the capacitors 32 present in the interior of the laminated product are connected to corresponding power terminals and ground terminals of IC chips mounted on the exterior of the laminated product through via the through-holes (TH) and the laser blinded via holes (LBVH), respectively.
The first problem concerning the second technique of the conventional techniques discussed above is high manufacturing cost.
That is, in order to manufacture the embedded discrete type capacitors by coating the ceramic filled photo-dielectric resin 14 onto the substrate, both the top electrode 20 and the bottom electrode 24 must be formed. In this case, many steps, which greatly increase manufacturing cost, are required. In addition, since the technique comprises printing the photo-dielectric resin 14 on the entire surface of the bottom electrodes 12 (a copper foil layer), exposing to light, and etching to remove regions responded to light, more of the photo-dielectric resin than expected is required even to manufacture a small number of the embedded capacitors. Accordingly, the technique is economically disadvantageous in terms of considerable loss of raw materials.
The second problem concerning the second technique of the conventional techniques discussed above is interlayer shorts between the bottom electrodes 24.
Specifically, the laminate copper foil 16 is circuit-formed to form the top electrodes 20. When the photo-dielectric resin 14 underlying the copper foil 16 is exposed to light, followed by etching using an etchant to remove regions responded to light, the width of the removed regions may be small. The small width carries a risk that the unetched dielectric resin 14 may remain at the surface of the copper foil 12. This is because when the photo-dielectric resin 14 is thermally cured (110° C., 60 min.), a photosensitive agent present in the photo-dielectric resin 14 is not completely reacted. In particular, the photo-dielectric resin 14 located in the lower copper foil 12 may be unetched, thus resulting in unetched lower copper foil 12. Finally, interlayer shorts between the bottom electrodes 24 may occur.
Next, the third conventional technique will be explained in more detail with reference to FIGS. 4a to 4c.
FIGS. 4a to 4c are sectional views showing a process for manufacturing a printed circuit board with embedded capacitors by inserting a dielectric layer having a capacitance characteristic, in accordance with a prior art. The embedded capacitors are formed by a process comprising inserting a separate dielectric layer having a capacitance characteristic into the printed circuit board inner layer. The embedded capacitors thus manufactured can replace decoupling capacitors mounted to the surface of the substrate. The process will be explained with reference with U.S. Pat. Nos. 5,079,069, 5,261,153 and 5,800,575 issued to Sanmina Corp.
In step 1, a dry film is deposited on a high electric copper coated laminate 61 between copper foils 63a and 63b, and subjected to light exposure and development. Then, the copper foils 63a and 63b are etched to form power electrodes and clearances (FIG. 4a).
In step 2, the resulting structure is inserted between insulators 64a and 64b, and then outer-layer copper foils 65a and 65b are laminated thereto (FIG. 4b).
In step 3, the capacitors present in the interior of the laminated product are connected to corresponding power terminals and ground terminals of IC chips 68a and 68b mounted on the exterior of the laminated product through via through-holes (TH) and laser blinded via holes (LBVH), respectively. The capacitors serve as power distributed decoupling capacitors (FIG. 4c). Reference numerals 67a and 67b designate clearance between a ground electrode and a power electrode, respectively. When the through-holes and laser blinded via holes are formed between the ground electrode and the power electrode, they are spaced sufficiently apart from the ground electrode and the power electrode not to contact one another.
The first problem concerning the third technique of the conventional techniques discussed above is low capacitance due to low dielectric constant of the embedded capacitor layer.
Specifically, in the case of a thin film type having a thickness of 10˜50 μm as shown in FIG. 4a, FR-4 (manufactured by Sanmina Corp.) having a thickness of 25 μm or 50 μm as a dielectric material is disposed between the copper foils used as power electrodes and ground electrodes. The FR-4 has a dielectric constant of 4˜5 and a capacitance value per unit area of 0.5˜1 nF/in2. Since the capacitance value of the FR-4 is considerably low, compared to that of currently used decoupling discrete chip capacitors (100 nf/in2), there is a limitation in manufacturing embedded capacitors.
The second problem concerning the third technique of the conventional techniques discussed above is an increase in the thickness of a printed circuit board due to insertion of embedded capacitor layers.
Specifically, in order to manufacture a printed circuit board with embedded capacitors therein having a high capacitance using the FR-4 dielectric material, the insertion of a large number of embedded capacitor layers, which increases in thickness of the printed circuit board to be manufactured, is required. Accordingly, the technique is economically disadvantageous in terms of increased manufacturing cost.
The third problem concerning the third technique of the conventional techniques discussed above is the occurrence of interlayer shorts and cracks between power electrodes and ground electrodes. Specifically, in the case of using a thin dielectric material to obtain a high capacitance value, during dry film lamination and circuit formation of an upper copper foil for power electrodes and a lower copper foil for ground electrodes, as shown in FIG. 5, interlayer shorts and cracks between the power electrodes and the ground electrodes occur.
FIG. 5 is a sectional view illustrating a problem of a printed circuit board with embedded capacitors therein manufactured by a process comprising inserting a dielectric layer having a capacitance characteristic, in accordance with a prior art. In a printed circuit board with embedded capacitors therein, the capacitors being formed by inserting a dielectric layer having a capacitance characteristic in accordance with a prior art, interlayer shorts (designated by G) and cracks (designated by F) between power electrodes 92 having a thickness of 18˜35 μm and ground electrodes 93 on a high dielectric layer 91 having a thickness of 8˜10 μm occur, as shown in FIG. 5.
On the other hand, capacitance is dependent on the area and thickness of a capacitor, and is given by the following equation 1:
                    C        =                              ɛ            r                    ·                                    ɛ              0                                                  (                              A                D                            )                                                          Equation                                                  1
wherein εr is the dielectric constant of a dielectric material, εo is a constant of 8.885×10−8, A is the surface area of the dielectric material, and D is the thickness of the dielectric material. That is, in order to obtain of high capacity capacitors, the dielectric constant of a dielectric material must be high, the thickness of the dielectric material must be small, and the surface area of the dielectric material must be large. In addition, when the thickness is 10 μm, the capacitance of the bimodal polymer ceramic composite is 5˜7 nF/cm2.
For example, according to U.S. Pat. No. 6,274,224 issued to 3M Innovative Properties Co., a thin film type dielectric material is disposed between the copper foils used as power electrodes and ground electrodes. The dielectric material is a composite of high dielectric BaTiO3 ceramic powders and a thermosetting epoxy resin or polyimide and has a thickness of 8˜10 μm. Although the dielectric material has a relatively high capacitance (10 nF/in2) per unit area, there are problems of interlayer shorts and cracks between power electrodes and ground electrodes due to low thickness of the dielectric material.

Printed circuit board with embedded capacitors therein, and process for manufacturing the same


A pressure control fill valve for a pressurized dispenser container comprises a first and second end and a base, a first and second circumferential lip. The lips enable placement of the valve in an opening of a pressurized dispenser container in first a position, where a propellant gas can be filled into the container and a second position for complete closing of the container. According to the invention, the second lip of the valve is asymmetric about its circumference. This prevents the valve from being pushed out of the opening of the container in case of high over-pressure or enlargement of the opening due to a temperature increase. The invention eliminates the hazard of a loss of valve and propellant gas in case of high temperature.

Pressure control fill valves for pressurized dispensing containers are also known as Nickelson or Nicholson plugs. Pressurized dispensing containers typically comprise a volume for a fluid to be dispensed, such as a cream, lotion or solution, and a second, separate volume for a pressurized gas that is used to propel the fluid out of the dispensing container. When the gas is filled into its volume through an opening in the dispensing container, it is closed by inserting a plug or fill valve into the opening.
A pressure control fill valve or Nicholson plug, as described for example in U.S. Pat. No. 3,522,900, has an essentially cylindrical shape and comprises two circumferential grooves, which enable a dual-positioning of the plug within an opening. When positioned in a first position, flutes or cavities on the sidewall of the plug allow a gas to be passed through and into the container. When the plug is placed in its second position in the opening, the opening is fully sealed closed.
In case of extreme heat the propellant gas in such pressurized containers may become over-pressurized, and the container may explode. In order to prevent such hazard, fill valves or Nicholson plugs have been developed that allow a release of pressure in case of overpressure. They are used for applications with propellant gases that do not pose a threat to the environment. Such valve is disclosed for example in EP 1892198. The valve prevents over-pressurization of the gas container by leakage of over pressure gas while stopping the leakage once a given minimum pressure has been reached.
Such fill valves have the preferred ability to release overpressure. However, should the overpressure reach a certain high level or should the opening of the pressurized gas container enlarge as a result of a temperature increase, the fill valve will pop out of the opening entirely causing loss of the propellant gas and potential hazard to a user or person assembling the dispensing container.


Various schemes are provided to improve SR resource utilization by adapting SR resource allocation to traffic pattern. In a first Scheme, SR resource allocation is configured more accurately. In one example, UE provides assistant information for eNB to determine or adjust SR configuration based on the received assistant information. In a second Scheme, multiple SR periods are configured and adapted to traffic pattern. In one example, eNB configures a set of SR resources with multiple SR periods, and UE applies different SR periods based on predefined events. Unused SR resources could be recycled by eNB for PUSCH data transmission. In a third Scheme, multiple SR allocations are configured and adapted to concerned applications. In one example, eNB configures multiple sets of SR resources adapted to predefined applications, and UE applies SR configurations based on corresponding applications. The additional SR configurations could be activated and/or deactivated.

Long-term evolution (LTE) system, which offers high peak data rates, low latency and improved system capacity, is adopted by many operators. In the LTE system, an evolved universal terrestrial radio access network (E-UTRAN) includes a plurality of evolved Node-Bs (eNodeBs) communicating with a plurality of mobile stations, referred as user equipment (UE), via LTE-Uu interface. The radio access network further connects with a core network (CN), which includes Mobility Management Entity (MME), Serving Gateway (S-GW), and Packet data Network Gateway (P-GW), to provide end-to-end services. While LTE network increases system capacity, it is projected that LTE network may soon face capacity problems. The exponential growth of mobile subscribers requires substantial increase of network capacity. Concurrent with this problem of rapid growth of number of users, there has been a rapid uptake of Smartphone subscribers, such as iPhone, Android phone and Blackberry phone users.
Many Smartphone applications such as news, weather, and social networking, periodically connect and disconnect to/from the network for updates. These applications contain small amount of user data while still require a large amount of signaling traffic to establish and tear down the session. Consequently, the core network tends to keep UEs connected under Smartphone applications. Under diverse data application (DDA) (background/IM) environment, it is very likely to keep a UE in RRC connected mode to prevent RRC transition. Less RRC transition could have similar power saving performance if discontinuous reception (DRX) is properly configured.
However, the radio resource utilization for physical uplink control channel (PUCCH) will be a problem when the number of connected UEs increases, especially on scheduling request (SR) resources allocated in PUCCH. This is because the SR resources are dedicate and periodic, hence SR resource wastage would increase linearly as the number of connected UEs increases. For example, with a bandwidth of 10 MHz (50 physical resource blocks (PRBs)), if 300 UEs are all kept connected, then the PUCCH allocation needs 8 PRBs when SR period is 5 ms. Among the 8 PRBs, the utilization (being used resources) of SR is only 0.04% under background traffic. Even when SR period is extended from 5 ms to 80 ms, the SR resource utilization is 0.67% only. In addition, while it is straightforward to use a longer SR period to increase utilization, such allocation will increase access delay extremely. If more resources are reserved for SR, then less resources would be available for uplink data transmission via physical uplink shared channel (PUSCH) and decrease uplink capacity. Therefore, when traffic becomes more diverse, traditional unified SR resource allocation scheme may not be enough or may not be efficient to satisfy network and UE requirement.
It is an objective of the current invention to increase the SR resource utilization and to maintain QoS as well. A solution is sought.

Method and apparatus of allocating scheduling request resources in mobile communication networks


Short parts are detected on machines where bar stock is fed through one or more work spindles and held in a burring spindle during cut off. The burring spindle contains a sensing rod biased towards the front of the burring spindle and adapted to contact a finished part on the end of the bar stock as the burring spindle moves on to the stock if the part has the proper length. This moves the sensing rod back, with respect to the burring spindle, and a target on the end of the sensing rod enters the sensing field of a proximity sensor. If the burring spindle moves onto a short part, the sensing rod is not moved by the design amount and the target disc does not enter the sensing field of the proximity sensor. The sensor then initiates a short part signal.

Automatic screw machines, CNC lathes and similar bar fed machines have been used for many years to machine small parts in large volumes. These machines provide a reliable, precise and economical way for producing a wide variety of parts, including air and hydraulic fittings, hose fittings, electrical fittings and connectors, carburetor parts, spark plugs, and various transmission and brake parts including shafts, pins, ABS brake cylinder pistons, screws, gears, splines, grease fittings and the like.
In many of these machines, a bar loader supplies bar stock to a plurality of work spindles mounted on a rotary spindle carrier. The carrier is indexed from work station to work station. Tools such as dovetail and circular form tools, drills, taps, reamers, thread rolls and shave tools, located at the different work stations, perform a variety of machining steps on the bar stock. When the machining sequence has been completed, the finished part is severed from the stock, and the stock is advanced so that the cycle may be repeated.
When a finished part is severed from the stock on a multi-spindle automatic screw machine or other bar fed lathe, it is frequently held in a reciprocating burring or pick-off spindle that supports the finished part as it is being cut off from the bar stock. The burring or pick-off spindle is typically driven by a mechanical cam, air actuator or servo-motor so that a collet or chuck in the end of the spindle is advanced over the finished part (on the end the bar stock extending from the work spindle). The collet or chuck is then closed, thus supporting the part while a cut-off tool separates it from the bar stock. The burring or pick-off spindle is coaxial with and driven at the same speed as the work spindle.
Sometimes when the stock is fed out from the work spindle to advance a new length for machining, the stock fails to advance the correct distance due to slippage in the feeding mechanism. Several methods for detecting this type of short feed have been attempted, including sensors positioned in front of the advancing stock which are designed to be activated only when the stock is fed the correct distance. Unfortunately, merely guaranteeing the stock is fed the correct distance will not ensure that the part is the correct length. Short parts can also be the result of the work piece being pushed back into the collet by any one of the tools performing work on the piece. This can result from a poorly adjusted or worn collet, undersized bar stock, or a worn tool which is applying excessive force to the work piece.
Finished parts are generally deposited in a simple parts basket by the machine when completed. If short fed out stock successfully navigates its way through the tooling stations, a too short part will be deposited in the parts basket along with all the good parts. Many customers will reject a complete order if they find even one part in their shipment not made to the print. To avoid this possibility, many screw machine shops are doing 100% inspection in order to sort out the short pieces from the good ones. This is very expensive. Thus, it is vitally important to be able to detect short parts whenever they occur, and take corrective action.

Method and apparatus for detecting short parts


A system, method and program product for controlling allocation of user assignments to server systems managed by a shared resource manager of a service provider. User request parameters are received from a first user for identifying a desired server resource. User assignment alternatives are calculated based on migration of user assignments of a second user to make the desired server resource available to the first user. User migration parameters are received from the second user that identify conditions for migrating the current user assignment of the second user from a first server to a second server in accordance with one of the user assignment alternatives. A new configuration of user assignments of the first user and the second user are calculated and communicated to the shared resource manager based on the first user and the second user accepting a user assignment alternative. The server systems are reconfigured in accordance with the new configuration of user assignments.

Cloud computing and other remote computing service models utilize the allocation of various shared servers and similar computing resources to meet customer demands. For example, cloud computing is a model of service delivery for enabling convenient, on-demand network access to a shared pool of configurable computing resources (e.g., networks, network bandwidth, servers, processing, memory, storage, applications, virtual machines, and servers) that can be rapidly provisioned and released with minimal management effort or interaction with a provider of the service. Relevant characteristics of the cloud computing model, may include on-demand self-service, broad network access, resource pooling, rapid elasticity, and measured service (e.g., storage, processing, bandwidth, accounts, etc.). Common service models enabled by cloud computing and other shared models may include software as a service (SaaS), platform as a service (PaaS), and infrastructure as a service (IaaS).
Cloud computing has been an outgrowth of prior models of shared server usage, where the applications, data, and/or other computing resources of multiple users are placed on one or more common servers. In the cloud computing context, IaaS is the capability to provide provisioning of processing, storage, networks, and other fundamental computing resources where the consumer is able to deploy and run arbitrary software, which can include operating systems and applications. In early server sharing arrangements, users may be able to contract for specific computing resources (storage, processing, etc.), server configurations, or even specific servers. Under IaaS, higher levels of abstraction are generally applied to user service requests to improve provider control over efficient use of resources.
Under any server sharing model, there is a tension among the interests of the service provider and multiple users of common resources, such as servers. More specifically, service providers will tend to optimize server allocation for performance and revenue in accordance with the abstractions built into their pricing model. Individual users will generally understand these allocations primarily in terms of performance against specific business criteria (e.g., risk of service interruption, security risk, cost of downtime, etc.) and cost of the resource allocation. Further, different users will have different business criteria and, depending on the uniformity of pricing by the service provider, may have different direct costs of the resource allocation. For example, different users may have critical applications that require processing and/or backup on separate machines, high-performance applications that benefit from colocation and clustering, and geolocation-aware applications that are best located where the highest concentration of end users are. However, to increase efficiency, service providers may not allow users to specify resource placement strategies.

This patent is subject to a terminal disclaimer.

Dynamic shared server resource allocation

International Business Machines Corporation


A reflector antenna system having a diplexer for providing isolation between transmitted and received signals, which eliminates the need for a diplexer to be inserted into the waveguide or coax transmission line coupling the antenna system with an external antenna electronics subsystem. The antenna system includes a main reflector to which is coupled a low effective dielectric tube. Transmit and receive feedhorns are supported within the tube. A hyperboloidal receive bandpass filter is supported in front of the receive feedhorn and a hyperboloidal transmit bandpass filter is disposed in front of the transmit feedhorn. The receive bandpass filter allows the received signal to pass therethrough but blocks the transmitted signal from the transmit feedhorn. Conversely, the transmit bandpass filter reflects the received signal received from the subreflector surface back towards the receive feedhorn while allowing the transmitted signal from the transmit feedhorn to pass therethrough.

This invention relates antenna systems, and more particularly to a reflector antenna capable of performing diplexing of received and transmitted signals as the signals are radiated through air.
With typical, present day Cassegrain reflector antenna systems, as shown in FIG. 1, a single feedhorn is employed in connection with a main reflector. The single feedhorn is used to receive signals reflected by a subreflector as well as to radiate a transmitted signal toward the subreflector, which is reflected by the subreflector back toward the main reflector, and subsequently reflected by the main reflector back into space.
The use of a single feedhorn required to perform both transmit and receive functions requires the use of a diplexer circuit to be installed in the waveguide or coax transmission line which is coupled to the feedhorn. The diplexer circuit is necessary to isolate the receive and transmit signals. In actual practice, the diplexer must be constructed within the physical dimensions of the waveguide or coax transmission line. With a WR75 waveguide, this requires the diplexer to be constructed within a cross sectional area of about 0.75 inch (19.05 mm) width and 0.375 inch (9.53 mm) height. As will be appreciated, these very small dimensions impose significant design restraints on the diplexer circuit and add to the difficulty in achieving the needed isolation between the transmit and receive signals. Waveguide, coax or microstrip diplexer components also have a higher loss which must be factored into the design of the electronics operating in connection with the antenna system.
Accordingly, there is a need for an antenna system which allows the transmit and receive signals to be separated without the use of a conventional diplexer circuit being placed in the transmission line communicating with the antenna. More specifically, there is a need for a reflector antenna system which is capable of isolating (i.e., diplexing) the transmit and receive signals while these signals are radiating through space. Such an antenna system would alleviate the above-described space constraints associated with present day diplexer circuits required to be disposed in the transmission line. Such a system would also provide less loss and better isolation of the transmit and receive signals, thus potentially resulting in the need for less expensive electronic circuitry being used to operate with the reflector antenna system.
The present invention is directed to a reflector antenna system which is operable to isolate receive and transmit signals being received and transmitted, respectively, by the antenna system while the signals are radiating through free space. The antenna system of the present invention thus eliminates the need for a conventional diplexer circuit to be included in the transmission line coupled to the antenna system.
In one preferred embodiment the antenna system of the present invention comprises a main reflector, a receive feedhorn and a transmit feedhorn spaced apart from the receive feedhorn. A receive bandpass filter is disposed adjacent the receive feedhorn and a transmit bandpass filter is disposed adjacent the transmit feedhorn. The receive bandpass filter allows a propagating electromagnetic wave having a first frequency to pass therethrough, but prevents an electromagnetic wave radiated from the transmit feedhorn, having a second frequency, which is different from the first frequency, from passing therethrough into the receive feedhorn. The hyperboloidal surface of the receive bandpass filter, in effect, scatters or reflects the transmitted electromagnetic wave isotropically to reduce its reflection back toward the transmit feedhorn. Thus, the receive bandpass filter serves to isolate the receive feedhorn from the signal radiated by the transmit feedhorn.
The transmit bandpass filter operates in the opposite fashion. The transmit bandpass filter operates to reflect an electromagnetic wave reflected by the main reflector back toward the receive feedhorn, where the propagating wave is then able to pass through the receive bandpass filter and be received by the receive feedhorn. Thus, the transmit bandpass filter isolates the transmit feedhorn from the receive signals reflected by the reflector.
In one preferred form, the transmit feedhorn, the receive feedhorn, the transmit bandpass filter and the receive bandpass filter are all supported by a tubular support, wherein the tubular support is supported adjacent a reflecting surface of the main reflector. This construction removes the tolerance constraints that are present when designing a diplexer which must fit within a waveguide or coax transmission line, as with previously developed Cassegrain reflector antenna systems. The use of the receive and transmit bandpass filters, which perform a diplexing function on the received and transmitted electromagnetic waves, also improves the isolation between the receive and transmit signals.
In the preferred embodiments the transmit bandpass filter, which functions as the subreflector, comprises a hyperbolic shape. Each of the transmit bandpass and receive bandpass filters include suitable multi-layer, frequency selective surfaces designed to pass therethrough a signal having a desired frequency. Thus, the receive bandpass filter is designed to pass only a signal having a first frequency, while the transmit bandpass filter is designed to pass only a signal having a second frequency which is different than the first frequency. In one preferred form, the receive bandpass filter is designed to pass a received signal having a frequency of about 12.7 GHz. In one preferred from, the transmit bandpass filter is designed to pass a signal radiated from the transmit feedhorn having a frequency of approximately 14.0 GHz.
Further areas of applicability of the present invention will become apparent from the detailed description provided hereinafter. It should be understood that the detailed description and specific examples, while indicating the preferred embodiment of the invention, are intended for purposes of illustration only and are not intended to limit the scope of the invention.

Reflector antenna for performing diplexing of received and transmitted signals


A method and apparatus for measuring an opening defined within object using an optical sensor system is provided. The method includes positioning an illumination source adjacent the opening, illuminating a perimeter circumscribing the opening, receiving an image of the illuminated boundary, and calculating an area within the received boundary. The system includes a light source oriented to project a first sheet of light intersected by a first portion of the opening perimeter, the light source projecting a second sheet of light intersected by a second portion of the opening perimeter, a light detector receiving a portion of the sheet of light intersected by the object opening perimeter and reflected toward the light detector, and an image processor communicatively coupled to the light detector, the image processor programmed to sample an image from the detector and programmed determine the dimensions of the object opening from the sampled image.

This invention relates generally to optical systems and more particularly, to methods and apparatus for measuring an opening area defined within a flow nozzle.
At least some known gas turbine engines include a compressor, a combustor, and at least one turbine coupled in a serial axial-flow relationship. The compressor compresses air which is then channeled to the combustor. The compressed air is mixed with fuel and ignited within the combustor to generate combustion gases which are channeled to the turbine. The turbine extracts energy from the combustion gases to power the compressor, as well as to produce useful work to propel an aircraft in flight or to power a load, such as an electrical generator.
A nozzle throat area of the engine is a critical parameter affecting engine efficiency. Accordingly, the nozzle throat area is measured during periodic inspections to verify clearances in the engine fluid path. New nozzle throats are carefully designed to provide a specific area value. Accurately measuring an opening area of the nozzle may also be relevant in determining a manufacturing time of the nozzle, as well as subsequent maintenance and repair costs and activities.
Conventional nozzle throat inspection methods include using a mechanical gauge. At least one known mechanical gauge includes a complex mechanical analog computer that multiplies a width of the throat by a height measured at several specified locations. Another known area gauge uses electronic linear voltage differential transformer (LVDT) sensors to measure the throat width and height values, and then a computer calculates the area. However, obtaining accurate measurements at the various orientations of the nozzle throat may be a difficult task. Furthermore, because of the contours and dimensions of the nozzle throat, using such gauges may be a costly and time-consuming process.

Methods and apparatus for measuring flow opening areas


A lamellar crystalline organic polymer containing acidic groups and/or ammonium salt thereof, such as ammonium salt of polymuconic acid, is mixed with a substance containing a metal ion such as alkali metal ion, to prepare a metal ion-containing polymer having a structure in which the metal ion is intercalated between the layers of the lamellar crystalline organic polymer having acidic groups. Subsequently, metal ion exchange reaction is conducted if necessary. Thereafter, the metal ion is reduced to produce fine metal particles. Thus, a crystalline organic polymer in which fine metal particles are dispersed in a crystalline organic polymer is obtained.

A number of studies are directed to complexation of an organic material and an inorganic material. There have developed some organic/inorganic composite materials prepared by complexation of inorganic substances and an organic polymers.
As for organic polymers capable of containing a metal ion as a guest substance, it has been widely known that polyethylene oxide, compounds similar thereto, and graft polymers containing, as its side chain, polyethylene oxide or a compound similar to polyethylene oxide are organic polymers capable of containing, as a guest substance, a metal ion such as an alkali metal ion. Polyethylene oxide, compounds similar thereto, and graft polymers containing, as its side chain, polyethylene oxide or a compound similar to polyethylene are utilized as ion-conducting materials (Reference 1: Electronic Materials, ed. by the Society of Polymer Science Japan, Kyoritsu Shuppan Co., Ltd., pp. 279-290 (1992)).
High-molecular-weight organic metal complexes in which a transition metal such as copper, iron, cobalt, rhodium or the like is coordinate-bond with a polymer ligand are also known. (Reference 2: Naoki TOJIMA, Masao KANEKO and Mitsuo SEKINE, New Material for Polymers One Point-25, Polymer Complex, Kyoritsu Shuppan Co., Ltd., pp. 1-13, especially FIG. 1.2 of page 4 (1990)) Such organic metal complexes with high molecular weight have the following properties: they are ease to be handled as raw materials, forming a complex to prepare them is easy, and they are highly effective. Examples of their functions are a synthesizing function (as catalysts, reagents), separating function, physiological function and physical function, and other functions.
Furthermore, various techniques to prepare an organic polymer containing fine metal particles by forming a complex with an organic polymer and fine particles of silver or gold are known. For example, (1) producing super lattice structure having a distinct structure by way of absorbing gold colloid and a cationic polymer alternatively, (2) physically synthesizing a polymer-metal nanoparticle complex by (i) preparing a metal nanoparticle through vacuum deposition, (ii) trapping the metal nanoparticle under a low temperature, and then (iii) stabilizing the metal nanoparticle by using the polymers, and (3) chemically synthesizing a polymer-metal nanoparticle complex by reducing a metal ion such as a gold ion, platinum ion, palladium ion, rhodium ion or iridium ion, using a reducing agent in the presence of a polymer stabilizer such as poly(N-vinyl-2-pyrrollidone)(PVP) or the like, (4) and other methods (Reference 3: Inorganic/Organic Nano Composite materials, Kagakusosetsu, Quarterly, No. 42, ed. The Chemical Society of Japan, Japan Scientific Societies Press, pp. 135-159 (1999)). It is also known to prepare a noble metal nanoparticle using a cationic isonitrile protectant having a relatively high molecular weight (having a hydrocarbon chain of 6 to 12 carbon numbers) (Reference 4: Tetsu YONEZAWA, Preparation of Noble Metal Nanoparticles Using a Cationic Isonitrile Protectant, Polymer Processing, vol. 51, No. 8, August, 2002 issue, pp. 343-347).
Some organic/inorganic composite materials containing a lamellar structure produced through intercalation are also known, though they are not many. For example, some organic/inorganic composite materials are also known wherein an inorganic lamellar substance such as graphite, a clay mineral, a metal oxide or the like is used and an organic substance is intercalated therein as guest molecules.
As another approach, the inventors of the present inventions and others reported recently that a lamellar crystalline organic polymer containing a carboxyl group can work as a host compound during intercalation and that the lamellar crystalline organic polymer can reversibly take (intercalate) an organic guest molecule such as an alkyl amine into a crystal thereof, the lamellar crystalline organic polymer obtained by crystalline polymerization of a muconic acid derivative or a sorbic acid derivative (Reference 5: Toru ODANI and Akikazu MATSUMOTO, Synthesis of Organic Lamellar Compounds by solvent-free process, Material Stage, vol. 1, No. 11, February 2002, Technical Information Institute Co., Ltd. pp. 48-52).
All of the conventional organic/inorganic composite materials mentioned in References 1 to 4 are, however, prepared by using amorphous or partial crystalline organic polymers as their organic polymer or their organic compound with relatively high molecular weight. Amorphous or partial crystalline organic polymers are inferior to crystalline organic polymers in terms of thermostability, flame retardance, elastic constant, tensile strength, flexural strength, impact resistance, mar resistance, linear expansion coefficient, dimensional stability, shaping processability, electric properties, dielectric breakdown strength, dielectric constant, properties under high temperature, weatherability, resistance against hydrolysis, and the like property. Therefore the conventional organic/inorganic composite materials including the amorphous or partial crystalline organic polymer are inferior and need be improved in these properties.
In addition, because organic polymers and inorganic substances are poorly compatible with each other in general, it is difficult to attain homogeneous dispersion throughout in a material. Thus, in most cases, especially the physical method, the fine metal particles with the size from about several nanometers to several ten nanometers have been difficult to be dispersed in forming the conventional complex of fine metal particles and an organic polymer, and thus properties of the fine metal particle cannot be utilized effectively.
Furthermore, in all of the conventional organic/inorganic composite materials having a lamellar structure prepared by intercalation, inorganic substances are used as host compounds and organic substances are intercalated as guest molecules. An organic/inorganic composite material prepared by intercalating an inorganic substance intercalated as guest molecules in an organic polymer having a lamellar structure has not been known.
The intercalation into the lamellar crystalline organic. polymer, which intercalation reported by the inventors of the present invention in the Reference 5, is to intercalate organic compounds as guest molecules. Intercalation of metal ion into a lamellar crystalline structure of an organic polymer is not known.

Polymer with dispersed fine metal particles, process for producing same, metal ion-containing polymer for use in the production, and process for producing same


An accelerometer includes a substrate having a surface and a movable electrode. The movable electrode is mounted on the surface of the substrate and movable along an axis substantially parallel to the surface of the substrate in response to acceleration. A light-permeable region is defined in the movable electrode. A plurality of photosensitive regions and a plurality of non-photosensitive regions are defined in the surface of the substrate. The photosensitive regions and the non-photosensitive regions are spatially separated. The light-permeable region overlies only a portion of one of the non-photosensitive regions when at rest, and the light-permeable region overlies a portion of at least one of the photosensitive regions when the accelerometer is subjected to acceleration, such that the corresponding photosensitive region generates an output current.

1. Technical Field
The invention relates generally to semiconductors, and particularly to an accelerometer.
2. Description of Related Art
Conventionally, micro-machined accelerometers utilize a movable electrode for a motion sensing capacitor. The electrode is deflected toward or away from a stationary electrode in response to acceleration.
The measured capacitance between the movable electrode and the stationary electrode is dependent upon numerous factors including the distance between the movable electrode and the stationary electrode. The sensitivity of the conventional micro-machined accelerometer is also dependent upon the area of the movable electrode that overlaps the stationary electrode and further upon the magnitude of the measured capacitance. Increase in the measured capacitance can increase the sensitivity of the conventional accelerometer, but requires an increase in the distance between the movable electrode and the stationary electrode, with corresponding increase in the volume of the accelerometer. Accordingly, sensitivity of the conventional accelerometer is limited by the volume of the accelerometer.
What is needed, therefore, is a micro-machined accelerometer with reduced sensitivity to the distance between the movable electrode and the stationary electrode.


A friction stir welding method including: feeding a filler material through a first passage in a friction stir weld tool and into a substrate during friction stir welding of the substrate; and rotating the filler material with respect to the substrate while feeding the filler material. In this method, heat generated by rotational frictional contact of the filler material contributes to plasticization of the filler material.

A technique for welding materials known as friction stir welding is recognized among the conventional methods of joining substrates. In conventional frictional stir welding, a non-consumable cylindrical tool may have a flat surface (i.e. shoulder) on the working end with a pin in the center. When the tool is plunged into a substrate, or between adjacent substrate pieces, the flat surface rests flush against the surface of the substrate, and the pin extends into the substrate. The tool is rotated and simultaneously translated relative to the substrate. The force of the translation and rotation plasticizes the substrate in the vicinity of the shoulder and pin. The rotation blends the substrate and moves substrate around the pin which permits the pin to move through the substrate. The plasticized substrate material is relocated to the wake of the pin, where it forms a weld bead. Importantly, the substrate material is plasticized, as opposed to melted, during this operation. Melting is specifically avoided, so that properties of the weld, which is made of plasticized and then solidified substrate, remain close to those of the substrate itself.
In a recent variation, filler material is fed through the non-consumable tool. This filler material exits the tool and contacts the substrate, where it is then plasticized and mixed into the weld by the weld tool. Using filler material permits the composition and volume of the weld bead to be adjusted as desired because the filler material is dispersed throughout the entire volume of the weld bead. This is different from friction surfacing, where a consumable material is rotated on a substrate's surface to generate heat via frictional contact. In friction surfacing heat causes plastic deformation which leaves some of the consumable material on the surface of the substrate. This is different than friction stir welding because surface treatment seeks only to treat the substrate's surface while avoiding significant penetration of the rotating material into the substrate. In friction surfacing only the surface of a substrate is built upon. Deep penetration of the consumable material in friction surfacing is not possible and not intended because the consumable is meant to deposit on the surface thereby building it up and (often) imparting different surface composition and properties.
Conventional friction stir welding has disadvantages. For example, once a weld bead of desired length is reached, the tool must either lift out of (i.e. retract from) the substrate, or must run past the edge of the substrate. In the first case, the tool will leave a weld tool crater or cavity (hereafter referred to as a crater) of tool tip geometry in the weld bead as it is extracted from the substrate because it is no longer plasticizing substrate, so there is no plasticized substrate to move into its wake. In the second case, once the leading edge of the tool reaches the edge of the substrate, it is again without material to plasticize and direct toward its wake, and a void may be left in the weld bead at the edge of the substrate. Run off tabs may be used to supply the feed of plasticized material but these tabs are often difficult to incorporate (i.e. fixture and support), especially on edges of geometrically complex parts. Thus there is room for improvement in the art.


A method for etching a semiconductor device (10) having BARC layer (22) and nitride layer (20) includes etching BARC layer (22) until reaching a first set point in the fabrication reaction chamber and then etching nitride layer (20) in-situ the fabrication reaction chamber immediately following etching BARC layer (22).

In the formation of many types of semiconductor devices, a layer of an organic material called BARC (which is an abbreviation for Bottom Anti Reflecting Coating) is deposited over a nitride layer according to the design or pattern of a photolithographic mask. The purpose of the BARC layer is to provide a desired level of photolithographic resolution for critical dimensions of 0.35 .beta.m or smaller. Once this step is completed, however, the BARC layer must be removed to form, for example, gates of a transistor in an integrated circuit. In addition to removing selected portions of the BARC layer, there is also the need to selectively remove portions of the nitride layer to form a transistor gate or similar structure.
The known way of removing selected portions of the BARC and nitride layers is to first etch the selected portions of the BARC layer in a first fabrication reactor chamber and then remove the semiconductor device from the chamber. Then, the etched semiconductor device is placed in a second fabrication reaction chamber where a nitride etch process takes place. This step removes the selected portion of the nitride layer.
Performing the etch of the BARC layer first in one chamber and the nitride etch in a second chamber often yields an unacceptable semiconductor device. Moreover, the logistical problems of working with two fabrication reaction chambers, as well as the time delays that the process causes, make the sequentially BARC layer etch and nitride layer etch a less than desirable way of fabricating the semiconductor device. Using known etch processes, however, prohibits combining the processes in a single fabrication reaction chamber.


A fan and a fan wheel thereof are provided. The fan comprises the fan wheel and a fan cowl. The fan wheel comprises a hub and a plurality of blades. The hub can define an axial direction and a radial direction, and each of the blades has an axial length and a radial length. The portion of each of the blades that extends along the axial direction over a top edge of a side wall of the hub accounts for the axial length in a ratio between one third and two thirds. A connection portion connecting a central portion to the side wall of the hub, and a tip and a tail of each of the blades, as well as a flow conducting portion connecting a top wall to a central hole of the fan cowl, are all rounded. Thereby, the fan and the fan wheel thereof can strengthen the flow rate and reduce the noise generated by the fan.

1. Field of the Invention
The present invention relates to a fan and a fan wheel thereof, and more particularly, the present invention relates to a fan and a fan wheel thereof capable of reducing the noise while increasing the air flow rate.
2. Descriptions of the Related Art
As a result of the advancement in process technologies, circuit boards of many electronic products are now made to carry electronic components (e.g., central processing units, memories, integrated circuits and the like) at an ever-higher density. Because electronic components generate heat during operation, denser electronic components increases the temperature of the whole electronic product, which may cause abnormal operation of the electronic products or even damage to the electronic components thereof due to intense heat.
In the prior art, a fan is disposed in an electronic product so that air flow produced by the rotating fan can force convection to cool the electronic components thereof.
FIG. 1 illustrates a conventional fan 1 that comprises a fan wheel 11 and a fan cowl 12. The fan wheel 11 comprises a hub 110 and a plurality of blades 111. Each of the blades 111 has a blade width W1 and extends from a side wall of the hub 110.
The conventional fan 1 has a narrower blade width W1, and to maintain certain efficiency in producing the air flow, a large number of blades must be provided. For instance, the conventional fan 1 depicted in FIG. 1 comprises seven blades 111. As a result, the pitch between the blades 111 is inevitably reduced. Moreover, to get a strengthened flow rate and improved heat dissipation efficiency, the rotation speed of the fan wheel 11 must be increased. However, when the fan 1 operates at a high rotation speed, there is too small of a pitch between the blades which will cause disturbance to the air flow fields produced by the blades to each other or even cause annoying noise.
According to the above description, the conventional fan 1 increases the rotational speed of the fan wheel 11 at the cost of exacerbated noise. On the other hand, if the rotational speed of the fan wheel 11 is not increased, the flow rate would be too small, which would be inadequate to deliver the desired heat dissipation efficiency for the dense electronic components.
In view of this, it is highly desirable in the art to provide a fan and a fan wheel thereof capable of reducing the noise while increasing the airflow rate.


A control portion decides whether received transmission data is destined for the processing board itself, based on a board ID included in a beginning header of the headers separated from the transmission data. If such is the case, a signal-processing portion processes an image signal separated from the transmission data or directly input, based on processing information (command and control parameter) included in the beginning header. A header generation portion generates a header to be combined with a processed image signal, based on the processing information included in the header. The header is combined with the image data to obtain transmission data. The processing board determines a transmission destination by itself.

1. Field of the Invention
The present invention relates to an apparatus and a method for processing an informational signal. More specifically, it relates to an apparatus and a medium for processing an informational signal, a processing board for processing an informational signal, an informational-signal-processing system, a program product and a recording medium for recording the program, which are well applicable to, for example, an image-signal-processing system etc. for performing a series of processing procedures such as format conversion and noise cancellation on an image signal and outputting a processing result.
2. Description of Related Art
In an image-signal-processing system for performing a series of processing procedures such as the format conversion and the noise cancellation on an image signal and outputting the processing result, it has been conventionally considered to implement this series of processing procedures by using plural processing boards. In this case, for example, when a format in which the image signals are input or output is changed or another processing board is added, an order in which the image signals are processed changes, so that it is necessary to replace the board or change wiring between the boards.
Japanese Patent Application Publication No. 2003-1798211 discloses communication of data between the boards by radio, thereby eliminating restrictions on signals flowing between the boards, and avoiding a troublesome job such as replacement of these boards and changing of inter-board wiring.
In the image-signal-processing system disclosed in the above publication, a controller is used. The controller recognizes plural processing boards installed therein and sets a processing order of image signals based on a table stored in a built-in memory. Thus, the image-signal-processing system disclosed in the publication has such the controller in addition to the processing boards so that its circuit scale is enlarged by the amount thereof. Further, in the image-signal-processing system, a communication between the controller and each processing board is executed when setting a processing order of image signals. This causes communication control to be complicated.
It is an object of the invention to improve the existing apparatus for processing informational signal, and the like by which, when input or output format of the informational signal is changed in, for example, the image-signal-processing system using plural processing boards or an processing board is added thereinto, it is possible to easily perform setting of processing order of informational signals without using a controller performing any complicated communication control such that the controller can control each processing board.

Apparatus and method for processing informational signal


A thin film transistor array panel is provided and includes a gate line, a gate insulating layer covering the gate line, a semiconductor layer disposed on the gate insulating layer, and a data line and a drain electrode disposed on the semiconductor layer. The data line and the drain electrode have a dual-layered structure including a lower layer and an upper layer with the lower layer having a first portion protruded outside the upper layer and the semiconductor layer having a second portion protruded outside the edge of the lower layer.

1. Field of the Invention
Exemplary Embodiments of the present invention relate to a thin film transistor array panel and a manufacturing method thereof.
2. Discussion of the Background
Generally, a thin film transistor (TFT) array panel is used as a circuit board for independently driving pixels in a liquid crystal display or an organic electro-luminescent (EL) display device. The thin film transistor array panel includes a scanning signal line or a gate line transmitting a scanning signal, an image signal line or a data line transmitting an image signal, a thin film transistor connected to the gate line and the data line, and a pixel electrode connected to the thin film transistor.
The thin film transistor includes a gate electrode that is a portion of the gate wire, a semiconductor layer forming a channel, a source electrode that is a portion of the data wire, and a drain electrode. The thin film transistor is a switching element controlling an image signal transmitted to the pixel electrode through the data wire according to the scanning signal transmitted through the gate line.
To reduce the number of processes using a mask when forming the thin film transistor array panel, the data line and the semiconductor layer may be formed by using one mask. That is, the side wall of the data line and the side wall of the semiconductor layer accord with each other. However, when etching the metal of the data line layer, the side wall of the data line and the side wall of the semiconductor layer do not accord with each other due to the increase of a skew, which may result in protrusion of the semiconductor layer from the data line.
As a four-mask structure is introduced in a process to simplify TFT-LCD panel production and reduce cost, screen display deterioration (i.e., a waterfall) may chronically occur. The waterfall problem occurs because the semiconductor layer exposed outside the data wire acts as a conductor when a backlight is turned on such that the semiconductor layer forms a capacitive structure with the pixel electrode, thereby creating vertical lines that continuously flow from the top to the bottom of the display under modulation of the backlight.
The above information disclosed in this section is to enhance understanding of the background of the invention, and it may contain information not part of the prior art already known in this country to a person of ordinary skill in the art.

Thin film transistor array panel and method for manufacturing the same


A method, system, and apparatus are provided for maintaining user privacy in a knowledge interchange (“KI”) system. A user may provide privacy preferences relating to their participation in the KI system. The user may identify specific keywords, noun phrases, and contacts that should not be transmitted to a server computer. The user may also specify whether each keyword, noun phrase, or contact should be public or private. If a public keyword is identified during a search query as being associated with the user, the user's identity will be made available to a seeker If a private keyword is identified during a search query as being associated with the user, the user's identity will not be made available and a brokered communication process between the seeker and the user will be performed.

Large corporate enterprises generate enormous amounts of data. Data is generated in documents of all kinds, electronic mail messages, instant messages, and other types of communications. Due to the large quantity of data generated and the fact that the data is often stored in many disparate locations, it can be very difficult for an individual seeking data (a "seeker") to locate information of interest. This is due, in part, to the fact that the data is frequently not linked, such as with documents made available on the World Wide Web (the "Web").
Employees working within large corporate enterprises are also typically experts on a large number of topics both related an unrelated to the business of the enterprise. An expert is an individual that is likely to help a seeker locate information relating to a topic or to locate another person that may have information related to the topic. In addition to seeking information, a seeker may also be interested identifying and contacting an expert on a topic of interest. However, it is very difficult to determine who the experts are for a particular topic within a large enterprise that may include tens or even hundreds of thousands of employees.
Systems do exist for assisting in the process of locating an expert within a large enterprise. However, current systems suffer from a number of serious drawbacks that limit their usefulness. In particular, current systems tend to locate too few experts within a large population. As a result, the limited number of experts may be overwhelmed with a large number of requests for assistance. As a consequence of the large number of requests, the experts frequently withdraw from the expert program. This results in the system having even fewer experts and the problem is exacerbated.
It is with respect to these considerations and others that the various embodiments of the present invention have been made.

Method, system, and apparatus for maintaining user privacy in a knowledge interchange system


A data transmission device remotely monitors and controls a distributed process system, which exchanges data with a superordinate communication unit via an interface and a communication connection in accordance with the IEC 61850 standard, and which is connected to a subordinate process via a further interface and a station bus. The data transmission device includes functional units integrated therein which are implemented as interfaces for connecting the process to at least one superordinate communication unit in accordance with the IEC 61850 standard.

Remote control devices for monitoring and controlling local as well as slave processes communicate through a communication connection, for example a network, with a master process control level, which is also referred to as control center, and with slave systems related with the process.
Communication in systems for electric power transmission, such as message transmission between different devices, for example, such as protective devices, switchgear, transformers, etc., is performed through the communication standard IEC 61850, which is described, for example, in EP 1 976 281 A1. For the data exchange in the system, it is necessary to connect the devices which do not operate according to the IEC 61850 standard by means of different modules to the network usually implemented as a data bus. WO 2005/055538 A1, for example, describes the modules necessary for doing so and the operation thereof, such as gateways, for example for converting the incoming data in a format compatible with the IEC 61850 standard, IED (intelligent electronic device) protocol converter, devices for connection to master communication units, such as the network control center, or input/output devices for directly coupling processes.
However, connecting existing devices to the communication network operating according to the ICE 61850 standard by means of the aforementioned modules is associated with a substantial hardware and configuration cost.

Data transmission device for remote monitoring and remote controlling in a distributed process system


Methods for fabricating an integrated circuit are provided herein. In an embodiment, a method for fabricating an integrated circuit includes forming a gate electrode structure overlying a semiconductor substrate. First sidewall spacers are formed adjacent to sidewalls of the gate electrode structure, and the first sidewall spacers include a nitride. An oxide etchant is applied to a surface of the semiconductor substrate after forming the first sidewall spacers. A second spacer material that includes a nitride is deposited over the semiconductor substrate and the first sidewall spacers to form a second spacer layer after applying the oxide etchant to the surface of the semiconductor substrate. The second spacer layer is etched with a second spacer etchant to form second sidewall spacers.

Transistors such as metal oxide semiconductor field effect transistors (MOSFETs) or simply field effect transistors (FETs) or MOS transistors are the core building blocks of the vast majority of semiconductor integrated circuits (ICs). A FET includes source and drain regions between which a current can flow through a channel of a semiconductor substrate under the influence of a bias applied to a gate electrode that overlies the channel. The gate electrode is disposed on a gate dielectric and generally includes a high-k dielectric material, i.e., a material that has a dielectric constant that is greater than silicon (dielectric constant of 3.9). The gate dielectric is disposed between the gate electrode and the semiconductor substrate, and the gate electrode and the gate dielectric together form a gate electrode structure. The ICs are usually formed using both P-channel FETs (PMOS transistors or PFETs) and N-channel FETs (NMOS transistors or NFETs) and the IC is then referred to as a complementary MOS or CMOS circuit. Some semiconductor ICs, such as high performance microprocessors, can include millions of FETs. For such ICs, decreasing transistor size and thus increasing transistor density has traditionally been a high priority in the semiconductor manufacturing industry. Transistor performance, however, must be maintained even as the transistor size decreases.
As advanced MOS technology continues to scale and move into the deep-sub-micron geometry dimensions, proper protection of gate electrode structures becomes more complex. Protection of the gate electrode structures is generally achieved by forming sidewall spacers adjacent to sidewalls of the gate electrode structures prior to implantation techniques that are employed to form the source and drain regions in the semiconductor substrate. Protection of the gate electrode structures using the sidewall spacers is generally desired to mask the gate electrode structures from various front-end-of-line (FEOL) processing techniques that could degrade the gate electrode structures, particularly techniques that employ etchants. The spacers also enable self-aligned formation of the source and drain regions during ion implantation. If the gate electrode structure is not properly protected, the gate electrode structure may be compromised during further FEOL processing. Often poor adhesion between the sidewall spacers and the semiconductor substrate is observed, resulting in formation of a seam between the sidewall spacers and the gate electrode structure. High-k dielectric material in the gate dielectric may be susceptible to etching through the seam during various cleaning techniques that are employed during FEOL processing, resulting in so-called "missing high k" defects that degrade yield performance of the ICs.
Accordingly, it is desirable to provide methods of forming semiconductor devices with robust protection of the gate electrode structures, with the high-k dielectric layer of the gate electrode structures adequately protected from etching during FEOL processing. Furthermore, other desirable features and characteristics of the present invention will become apparent from the subsequent detailed description of the invention and the appended claims, taken in conjunction with the accompanying drawings and this background of the invention.

Methods for fabricating integrated circuits with robust gate electrode structure protection


A method is provided for determining the validity of a signal received by a GPS receiver. A signal that is unfiltered, either mathematically or electronically, is monitored to determine the variability of different occurrences of the signal. These occurrences, which may be sequential, are compared to each other in order to detect whether or not variation exists between one occurrence of the signal and a subsequent occurrence of the signal. If no variation exists, it is determined that the signal is invalid and that a loss of fix of the satellite signal has occurred. If sufficient variability exists in the signal, between successive occurrences, the signal is deemed to be valid and suitable for use to control a vehicle such as a marine vessel.

1. Field of the Invention
The present invention is generally related to the use of a global positioning system (GPS) and, more particularly, to a method for monitoring the operability of a GPS receiver in order to determine, or verify, the validity of the signals being received by the receiver from global positioning satellites.
2. Description of the Related Art
Since the initial conception of a global positioning system (GPS), with a number of satellites transmitting data for receipt by GPS receivers, many different improvements and applications have been developed. These improvements include numerous data handling and error reduction techniques and numerous strategies to increase the speed and reliability of the data transmission, reception, and handling used in the determination of a global position of a GPS receiver.
U.S. Pat. No. 5,451,964, which issued to Babu on Sep. 19, 1995, describes a method and system for resolving double difference GPS carrier phase integer ambiguity utilizing decentralized Kalman filters. A reference station is provided at precisely known coordinates and carrier phase data and pseudoranges for each received GPS satellites are calculated at both the reference station and the mobile GPS receiver. A communication link couples carrier phase data, pseudorange data and the known reference station position from the reference station to the mobile GPS receiver. A first Kalman filter within the mobile GPS receiver operates on GPS satellite ephemeris parameters and the calculated pseudoranges to obtain an error state vector for position and time. The GPS satellite ephemeris parameters and calculated carrier phase data are then applied to a second Kalman filter to obtain a predicted vector of velocity and clock rate error. Line of site range and range rates are then estimated utilizing the outputs of both Kalman filters and utilized, together with double difference phase measurements, to resolve the double difference carrier wave integer ambiguity providing an accurate set of coordinates for the mobile GPS receiver.
U.S. Pat. No. 5,736,962, which issued to Tendler on Apr. 7, 1998, describes the time since last fix annunciation system for GPS-based wireless rescue systems. It is used in a wireless emergency location system in which a cellular phone is utilized to communicate the location of an individual or vehicle by announcing position based on the output of a GPS receiver, time since last fix is computed and annunciated to permit emergency personnel to ascertain if the position information is valid. The velocity and direction of travel can also be annunciated for permitting emergency personnel to calculate the location of the phone and thus a certain individual.
U.S. Pat. No. 6,121,923, which issued to King on Sep. 19, 2000, describes a fixed site and satellite data-aided GPS signal acquisition method and system. It includes lengthening a pre-detection integration interval so that weak signals can be detected by operating coherently on captured signals. Coherency is insured by relying on the predictability of the satellite signal's data pattern. The described method significantly reduces correlation resolution time based on applying information regarding code phase delays from each satellite in view to reduce to code search space for other satellites being correlated.
U.S. Pat. No. 6,273,771, which issued to Buckley et al. on Aug. 14, 2001, discloses a control system for a marine vessel. A control system for a marine vessel incorporates a marine propulsion system that can be attached to a marine vessel and connected in signal communication with a serial communication bus and a controller. A plurality of input devices and output devices are also connected in signal communication with the communication bus and a bus access manager, such as a CAN Kingdom network, is connected in signal communication with the controller to regulate the incorporation of additional devices, such as a GPS receiver, to the plurality of devices in signal communication with the bus whereby the controller is connected in signal communication with each of the plurality of devices on the communication bus.
U.S. Pat. No. 6,407,701, which issued to Ito et al. on Jun. 18, 2002, describes a GPS receiver capable of calculating accurate 2DRMS. In the GPS receiver, GPS solutions are calculated by performing GPS measurements using a Kalman filter. The GPS receiver is provided with a computing system which calculates 2DRMS according to a predefined equation.
U.S. Pat. No. 6,485,341, which issued to Lanyi et al. on Nov. 26, 2002, discloses a method for controlling the average speed of a vehicle. The method is described with reference to selecting a desired average speed, measuring an actual speed, and maintaining a cumulative error determined as a function of the difference between the average speed and actual speed and the time over which the actual speed measurement was taken. Based on the cumulative total of speed-time error, a compensatory speed is calculated that will reduce the cumulative speed time-error to an acceptable tolerance range within a selected period of elapsed time.
U.S. Pat. No. 6,559,793, which issued to Eschenbach on May 6, 2003, describes a differential global positioning system using a coarse GPS data for a fast time to a precise first fix. A differential global positioning system (DGPS) using coarse data for the locations in space of GPS satellites for ranging to the GPS satellites and then determining a precise differentially corrected GPS location of a GPS user receiver is described. The coarse GPS data can be GPS almanac data or non-current GPS ephemeris data as long as the same data is used by both a GPS reference receiver and the GPS user receiver.
U.S. Pat. No. 6,727,848, which issued to Eschenbach on Apr. 27, 2004, describes a global positioning system using almanac data for a fast time to first fix. A system using coarse GPS orbital parameters for providing a precise GPS location is described. It includes a GPS reference receiver and a GPS user receiver. Coarse locations in space of GPS satellites are computed from almanac or old ephemeris data.
U.S. Pat. No. 6,775,615, which issued to Yule on Aug. 10, 2004, describes a method of obtaining a position fix in a GPS receiver and a GPS receiver for the same. The method comprises the steps of providing an estimate of clock offset between the GPS receiver and the GPS satellite, measuring a set of pseudoranges from the GPS receiver to GPS satellite, and either resolving the set of pseudoranges to obtain a position fix or providing an estimate of the position of the GPS receiver, resolving the set of pseudoranges to obtain a position fix correction, and obtaining a position fix using the estimate of the position of the GPS receiver and the position fix correction, wherein resolving the pseudoranges does not involve resolving the pseudoranges for either a new clock offset or clock offset correction.
U.S. Pat. No. 6,842,715, which issued to Gaal on Jan. 11, 2005, describes multiple measurements per position fix improvements. Methods and apparatus for improved position determination of a device using multiple pseudorange measurements for transmitting sources at known locations, such as GPS satellites, is described. A plurality of pseudorange measurements for each transmitting source is processed together to obtain a simplified maximum likelihood estimate for the pseudorange for that transmitting source of a common reference time.
U.S. Pat. No. 6,885,919, which issued to Wyant et al. on Apr. 26, 2005, discloses a method for controlling the operation of a marine vessel. A process is provided by which the operator of a marine vessel can invoke the operation of a computer program that investigates various alternatives that can improve the range of the marine vessel. The distance between the current location of the marine vessel and a desired waypoint is determined and compared to a range of the marine vessel which is determined as a function of available fuel, vessel speed, fuel usage rate, and engine speed. The computer program investigates the results that would be achieved, theoretically, from a change in engine speed. Both increases and decreases in engine speed are reviewed and additional theoretical ranges are calculated as a function of those new engine speeds. The operator of the marine vessel is informed when an advantageous change in engine speed is determined.
U.S. Pat. No. 7,267,068, which issued to Bradley et al. on Sep. 11, 2007, discloses a method for maneuvering a marine vessel in response to a manually operable control device. A marine vessel is maneuvered by independently rotating first and second marine propulsion devices about their respective steering axes in response to commands received from a manually operable control device, such as a joystick. The marine propulsion devices are aligned with their thrust vectors intersecting at a point on a centerline of the marine vessel and, when no rotational movement is commanded, at the center of gravity of the marine vessel. Internal combustion engines are provided to drive the marine propulsion devices. The steering axes of the two marine propulsion devices are generally vertical and parallel to each other. The two steering axes extend through a bottom surface of the hull of the marine vessel.
U.S. Pat. No. 7,305,928, which issued to Bradley et al. on Dec. 11, 2007, discloses a method for positioning a marine vessel. A vessel positioning system maneuvers a marine vessel in such a way that the vessel maintains its global position and heading in accordance with a desired position and heading selected by the operator of the marine vessel. When used in conjunction with a joystick, the operator of the marine vessel can place the system in a station keeping enabled mode and the system then maintains the desired position obtained upon the initial change in the joystick from an active mode to an inactive mode. In this way, the operator can selectively maneuver the marine vessel manually and, when the joystick is released, the vessel will maintain the position in which it was at the instant the operator stopped maneuvering it with the joystick.
U.S. Pat. No. 7,446,700, which issued to Yu et al. on Nov. 4, 2008, describes methods and apparatus for decreasing time to first fix of GPS receiver. It provides a GPS receiver which is capable of computing a local time reference without employing RTC circuitry and employing a nonvolatile storing unit to store backup navigation data, wherein the local time reference and the backup navigation data can be used to reduce the TTFF of the GPS receiver. The GPS receiver includes a nonvolatile storing unit and a positioning unit. The positioning unit is capable of retrieving the backup navigation data from the nonvolatile storing unit and computing a local time reference after the GPS receiver is powered up. The positioning unit is further capable of employing the backup navigation data and the local time reference to computing the position of the GPS.
The patents described above are hereby expressly incorporated by reference in the description of the present invention.
Under certain circumstances, a receiver can experience a loss of GPS fix. When that happens, information relating to the global position of the receiver, as calculated by the software in the microprocessor of the receiver, becomes untrustworthy. In many applications, a temporary loss of fix is not extremely serious and, if the fix is regained within a relatively short period of time, the loss of fix is sometimes not even noticed. However, in other applications, a loss of fix can be very serious. For example, when a vehicle (e.g. a marine vessel) is being automatically controlled as a function of its GPS position, a loss of fix can cause a dangerous condition. It would therefore be very beneficial if a method could be provided for quickly and reliably detecting a loss of GPS fix condition and reporting that status to an operator of the vehicle. In addition, it would be significantly beneficial if, upon the detection of a loss of GPS fix, an alarm condition could be generated to halt all potentially dangerous actions that might subsequently be taken based on invalid information calculated on the assumption that the receiver was receiving valid and reliable information when, in fact, it was not because of a loss of fix.

Method for monitoring the operation of a global position system receiver