A probe connector adapted for fastening a cable thereto includes a shell, a plunger and an elastic element. The shell has a barrel and a base shell with an accommodating chamber therein. The base shell is connected with the barrel. A bottom of the base shell extends downward to form a connecting piece of which two opposite side edges oppositely extend outward to form two clipping pieces. The clipping pieces are bent towards each other to clip a core wire of the cable therebetween. The plunger is movably inserted in the barrel and further projects out of the barrel. The elastic element is telescopically assembled in the barrel and the accommodating chamber along the movement direction of the plunger, with one end thereof resisting against a bottom of the plunger and the other end thereof abutting against an inner side of a bottom plate of the base shell.

1. Field of the Invention
The present invention relates to a probe connector, and more particularly to a probe connector capable of fastening a cable thereto tightly.
2. The Related Art
A traditional probe connector generally includes a barrel, a plunger and an elastic element. The elastic element is received in the barrel. One end of the plunger connected with the elastic element is movably restrained in the barrel. The other end of the plunger projects out of the barrel to connect with a mated connector. When the probe connector is mounted to a printed circuit board, an adsorbing machine is used for assisting the probe connector to be soldered on the printed circuit board.
However, the barrel of the traditional probe connector is difficult to be connected with a cable. So, if the probe connector needs to be connected with the cable, a new die for manufacturing a fastening portion is specially needed. Then one end of the fastening portion can be soldered to the barrel of the probe connector, and the other end of the fastening portion can be connected with the cable. The probe connector described above needs two dies for manufacturing the barrel and the fastening portion respectively. As a result, manufacturing cost and time are wasted accordingly.


A bus-based control system comprises a plurality of bus subscribers which are connected to one another by means of a communication medium. The bus subscribers are assigned logical subscriber addresses. Next, the assigned subscriber addresses are verified. For this purpose, the bus subscribers use a defined mathematical operation to calculate a common first check value which is compared with a second check value. The mathematical operation begins with a defined starting value and comprises a number of operation steps which use a number of defined operands. Each of the subscriber addresses to be verified forms a different operand, and each bus subscriber executes at least one operation step.

The present invention relates to a method for allocating subscriber addresses to bus subscribers in a bus-based control system for the automated control of a technical process. The invention also relates to a bus-based control system for the automated control of a technical process that uses such a method.
A bus system is a communication network which is set up specifically to allow data communication between a plurality of what are known as bus subscribers and a central station, if appropriate. Typically, bus systems are used in order to allow cyclic data communication between controllers and I/O devices which are physically remote from one another. The I/O devices have inputs and/or outputs which are used to receive signals from remote sensors and to actuate remote actuators, respectively. Controllers process input data corresponding to the signals from the sensors and produce output data from which the I/O devices produce the output signals for the actuators. The use of bus systems allows a plurality of sensors and actuators to be arranged physically away from one or more controllers with limited cabling complexity.
There are numerous variants of bus systems which have been developed for different requirements. In many cases, the bus subscribers each require an individual subscriber address so that the messages transmitted by means of the communication medium can be associated with the desired receiver, and to some extent also in order to identify the respective sender of the message. The subscriber addresses are usually allocated in a configuration mode before the bus system is put into operation.
Various methods for allocating subscriber addresses are known. One method involves providing the individual bus subscribers with address selector switches, wherein the respective subscriber address is set on the bus subscriber itself by using the respective address selector switch. Such an approach has the disadvantage that a subscriber address can be allocated only at the location of the respective bus subscriber. Central configuration of the bus system is not possible.
There are therefore numerous methods which can be used to assign addresses to bus subscribers in a bus system from a central station via the bus system itself. One such method is described in DE 197 33 906 A1, for example. In this case, the address allocation is based on different distances between the bus subscribers and what is known as the master station, which allocates the subscriber addresses, and also on the resultant different message transfer times. The method is used to assign a respective individual subscriber address to a plurality of bus subscribers one after the other. However, the known method is not suitable for the allocation of subscriber addresses in a bus system which is intended to be used for transmitting safety-related data in terms of European standards EN 954-1, IEC/EN 61508 and EN ISO 13849-1. These standards define requirements for the design and implementation of machines and machine installations which may present a hazard to persons during operation. If, by way of example, the bus system is intended to be used to transmit an enable signal from an emergency off pushbutton or a safety light barrier to a controller or a shutdown signal for an electric drive, it is necessary to ensure that the respective messages come from the correct sender and also reach the correct receiver. An erroneous address assignment can have fatal consequences, for example if an incorrect machine is shut down when a safety light barrier is broken, and therefore a hazardous machine continues to run.
For a bus system which is intended to be used to control safety-related events within the terms of the aforementioned standards, the address allocation needs to be failsafe. In this context, "failsafe" means that at least the requirements of category 3 of European standard EN 954-1 and/or the requirements according to SIL2 of IEC/EN 61508 or comparable requirements are met. A possible error in the allocation of the addresses must accordingly not result in the controlled installation entering a state which presents a hazard to a user or another person.
DE 199 34 514 C1 discloses a method for allocating subscriber addresses to bus subscribers in a control system, in which the individual bus subscribers have an explicitly defined physical position as a result of the structure of the bus system. Each bus subscriber uses its explicit physical position to verify an assigned logical address. The method is particularly suitable for the allocation of subscriber addresses to bus subscribers on what is known as the Interbus, which has widely been used for the automation of technical processes in production environments. However, verifying an allocated subscriber address by using an actual physical position uses a particular property of the Interbus and therefore cannot be transferred to other bus systems without this particular property.
DE 199 40 874 A1 discloses another method for configuring a bus subscriber for a safety-oriented control system, wherein the bus subscriber is assigned a subscriber address. In this case, an unconfigured bus subscriber uses a predefined, explicitly stipulated universal address to register with a central station which is likewise connected to the bus system. The central station assigns the unconfigured bus subscriber a subscriber address which is verified by virtue of subsequent data traffic between the bus subscriber and the station. In this case, the central station monitors that only precisely one bus subscriber is configured in each case. This method is particularly suitable for configuring an individual bus subscriber which is used as a replacement device to replace a faulty bus subscriber on an already configured bus system. If a relatively large number of bus subscribers are intended to be assigned addresses, this method is very time-consuming, however.

Method for allocating subscriber addresses to bus subscribers of a bus-based control system


A configurable multi-faceted input/output (I/O) panel may be used in a computer or electronic device to present multiple I/O interfaces to a user. The configurable multi-faceted I/O panels may be configured by a user such that one of a plurality of different I/O faces is accessible to the user. Of course, many alternatives, variations, and modifications are possible without departing from this embodiment.

In computers and other electronic systems, input/output (I/O) devices are often used to provide an interface to the computer system. These I/O devices, such as connectors, displays, and LED indicators, may be provided on an I/O panel that is accessible by a user, for example, on an external region of a computer device. In some devices, there may be a need or desire to support different types of I/O interfaces, for example, an I/O interface with connectors and a separate I/O interface with a display and/or LEDs. Supporting different types of I/O interfaces may improve system versatility by allowing one system to support multiple market segments, such as USB, Firewire, Ethernet, and the like. Miniaturization in computer and electronic systems and increases in the number of system components, however, have resulted in limited real estate to support multiple I/O interfaces. For example, in bladed architectures, such as an Advanced Telecommunications Computer Architecture (ATCA) or a CompactPCI (CPCI) system, the real estate is limited on the front panels coupled to the blades in a chassis.
Although the following Detailed Description will proceed with reference being made to illustrative embodiments, many alternatives, modifications, and variations thereof will be apparent to those skilled in the art. Accordingly, it is intended that the claimed subject matter be viewed broadly.

Configurable multi-faceted input/output panel


Freight container construction having opposing body side panels, adapted for lifting by an overhead crane includes lifting support structures which are exteriorly secured to and transfer the lifting load to the panels. Couplers formed on the lifting support structures are disposed exteriorly adjacent to the panels which bear the lifting load.

The present invention relates generally to overhead lifting of freight trailer containers, and more particularly relates to the structure of lifting supports provided on the container body assemblies.
Roadway trailer containers and other containerized freight which are loaded onto railroad or even ship transport using overhead lifting cranes have required the construction of the container body itself to withstand the overhead lifting load. When the crane is coupled to couplers on the top of the container, the coupler structures have required the container construction to provide extensive framework to distribute the load from the four coupled "top pick points" provided on the roof of the container. Conventionally, the top pick points or lifting coupler structures have required projection and reinforcement within the body of the container which reduces the available freight volume. The present invention eliminates the foregoing disadvantages.


A photosensitive material is coated on an insulating material (13) stacked on a substrate (1) (FIG. 16A), and exposed and developed using a mask having a light-shielding film capable of controlling a light transmittance from 100% to 0% annularly and continuously to form a spiral photosensitive material (FIG. 16B). After conducting treatment at a high temperature, the insulating material under the photosensitive material is spirally formed by etching (FIG. 16C). A metal (12) is stacked on the substrate (FIG. 16D), and a photosensitive material is coated (FIG. 16E). The photosensitive material is exposed and developed using a mask having an annular light-shielding film with a light transmittance of 0% to leave the photosensitive material covering only the metal on the base of the spiral structure (FIG. 16F). After treatment at a high temperature is conducted and the metal exposed is etched (FIG. 16G), the photosensitive material is removed (FIG. 16H).

An inductance such as a solenoid coil or the like has often been used thus far in electric circuits other than microcircuits, such as in a semiconductor integrated circuit and the like. In microcircuits such as a semiconductor integrated circuit and the like, a transistor, a resistor, a condenser and the like are used. However, an inductance such as a solenoid coil involves many technical problems in that it is, in comparison with other elements, complex and difficult to manufacture.
A schematic view of a projection exposure device used in a lithographic step of baking a pattern which is one step of manufacturing a semiconductor is shown in FIG. 26. The view shown therein indicates that a photosensitive material 10 is of a positive type, and after development the photosensitive material 10 to which a light is not applied remains, and the photosensitive material 10 to which a light is applied is removed. A light 4 emitted from a light source transfers a pattern onto a mask M onto the photosensitive material 10 on a substrate 1 in a lightness and darkness form. For example, when a pattern made of an annular light-shielding film 8 is exposed through projection and developed on the substrate 1, the photosensitive material 10 is doughnut-shaped, and never spiral. The mask M used conventionally is made only of a glass 7, and transmits a light by approximately 100% in a region free of the light-shielding film 8, while it has a light transmittance of 0 and does not transmit a light in a region having the light-shielding film 8.
In order to solve the problems of this kind of the inductor element, a manufacturing technique is proposed in, for example, Japanese Patent Laid-Open NOS. 189,339/1998 and 313,093/1998. With respect to a method of forming a lateral coil, Japanese Patent Laid-Open No. 189,339/1998 discloses a technique in which an isotropic etching method or a method of a combination of anisotropic etching and isotropic etching is used as a method of forming a semicircular groove, and whereby polysilicon or amorphous silicon previously embedded in a groove portion is then stacked and expanded by oxidation for forming a cylindrical shape of a coil section. Further, Japanese Patent Laid-Open No. 313,093/1998 discloses a technique in which flat spiral inductors are vertically stacked via an insulation layer, and whereby, at this time, the upper and lower inductors are selectively connected spirally via through-holes formed in the insulation layer to form a two-layer spiral coil.
Incidentally, a filter circuit is inherently formed by a combination of a resistor, a condenser and a coil. A filter circuit formed on an existing semiconductor integrated circuit is however constructed by using a resistor, a condenser and a transistor. Since a coil is not used, a large number of parts, resistors, condensers and transistors are required to realize a filter circuit having desired characteristics, and chip size is thereby increased. In addition, transistors tend to be influenced by the temperature of the usage environment. Thus, the larger the number of transistors used, the more unstable the characteristics of the overall circuit tend to be.
Moreover, as the scale of the integrated circuit becomes larger, a wiring width of an electric wiring in the integrated circuit is more decreased, and the wiring route becomes longer, with the result that wiring resistance and the capacitance of wirings are increased. Consequently, there arise problems such that the speed of charge passing through wiring is controlled, and the rate of delay of a current is increased.
Meanwhile, in a technique disclosed in Japanese Patent Laid-Open No. 189,339/1998, as a method of forming an inductor element on a substrate, a method of forming a cylindrical portion of a lateral coil includes an isotropic etching method, or a method of a combination of anisotropic etching and isotropic etching and a method in which polysilicon or amorphous silicon is stacked and expanded by oxidation. Therefore, with this method, it is difficult to form a cylindrical section in the shape of a complete circle with high precision. For this reason, a change in the magnetic field cannot be uniformly maintained.
Further, the technique disclosed in Japanese Patent Laid-Open No. 313,093/1998 is problematic, in that the spiral coil in which the upper and lower coils are spirally stacked via the through holes leaks a magnetic flux outside the coil in comparison with a solenoid coil, and a change in the magnetic field thus cannot be rendered uniform.
The invention aims to provide a microsolenoid coil in which an inductance value can easily be increased by controlling an occupied area of a coil in a substrate, and whereby a change in the magnetic field can uniformly be maintained by retaining the magnetic flux within the coil.

Method of manufacturing a longitudinal microsolenoid


Multiple data processing circuits may share a semiconductor memory circuit, such as double-data-rate synchronous dynamic random access memory (DDR-SDRAM). A data processing circuit (202-1 or 202-2) ending control of a semiconductor memory circuit (201) supplies a clock enable signal and chip select signal at predetermined levels. A data processing circuit (202-2 or 202-1) starting control of a semiconductor memory circuit (201) supplies a clock enable signal and chip select signal at the same predetermined levels, before the data processing circuit (202-1 or 202-2) ending control stops supplying a clock enable signal and chip select signal. Therefore, a clock enable signal and chip select signal do not enter an undefined state, and malfunctions that could otherwise occur are prevented.

Conventionally, a data processing apparatus is known that uses a sharing arbitration circuit. The sharing arbitration circuit can arbitrate the sharing of a semiconductor memory circuit among multiple data processing circuits. Examples of such conventional data processing apparatuses are shown in Japanese Patent Publication JP 06-83780A, JP 11-272632A, and JP 2000-298652A.
Referring to FIG. 4, a conventional example of a data processing apparatus described above is shown, and designated by the general reference character 100. A data processing apparatus 100 can include a synchronous dynamic random access memory (SDRAM) 101 provided as a semiconductor memory device, two data processing circuits 102, constituted by one-chip microcomputers, an arbiter circuit 103 operating as a sharing arbitration circuit, and a bus control circuit 104.
The SDRAM 101 and two data processing circuits 102 are connected through system buses 105 having bus controller 104 at the center. Data processing circuits 102 are connected with arbiter circuit 103 through dedicated signal lines 106. Arbiter circuit 103 is connected with bus control circuit 104 through a dedicated signal line 107.
A requester circuit 108 and interface (I/F) circuit 109 are built into each data processing circuit 102. Requester circuits 108 are in signal communication with arbiter circuit 103, and I/F circuits are in signal communication with SDRAM 101 through system bus 105. A clock oscillation circuit (not shown) is provided to data processing apparatus 100 independently of the arrangement described above, and this clock oscillation circuit supplies the individual parts of the data processing apparatus 100 with a common clock signal.
In the conventional data processing apparatus 100 described above, the SDRAM 101 executes data reads and data writes in response to command signals and address signals received external to the SDRAM 101 by way of system bus 105. Such operations are conducted in synchronism with the clock signal received externally from the clock oscillation circuit.
It is noted that in the conventional example shown in FIG. 4, because two data processing circuits 102 are connected to a single SDRAM 101, it is necessary to selectively connect one data processing circuit 102 with the SDRAM 101 according to a control operation. In particular, in the data processing apparatus 100 of FIG. 4, arbiter circuit 103 controls the operational state of the two data processing circuits 102 and controls the operation of bus control circuit 104 to selectively connect one of the two data processing circuits 102 with the SDRAM 101.
In the conventional data processing apparatus 100 described above, because bus control circuit 104, controlled by the arbiter circuit 103, selectively connects one of the two data processing circuits 102 with the SDRAM 101, it is possible for the two data processing circuits 102 to share the SDRAM 101.
Thus, bus control circuit 104 is conventionally considered necessary for switching a connection between data processing circuits 102 and a shared single SDRAM 101. However, such a circuit increases overall circuit scale (e.g., size). Further, the bus control circuit 104 can decrease overall operating speed, as such a circuit introduces a switching delay into data access operations.
To address the above drawbacks of the conventional approach, one may consider eliminating the bus control circuit 104 and directly connecting the data processing circuits 102 and SDRAM 101 by way of system bus 105. Operations of the multiple data processing circuits 102 could then be arbitrated according to arbiter circuit 103. However, such an approach may be difficult to implement.
For example, when a double data rate (DDR)—SDRAM is used as a semiconductor memory circuit, the DDR-SDRAM operates at a high speed in synchronism with the rise and fall of a clock signal. Thus, it is necessary to change a control signal supplied form the data processing circuits to the DDR-SDRAM from a high electric potential (such as VDD) to a low electric potential (such as GND) with respect to center reference level (such as ½ VDD).
In such a proposed conventional arrangement, when the supply of a control signal is interrupted by switching of the data processing circuit currently controlling the DDR-SDRAM, the DDR-SDRAM can misinterpret the undefined state of the control signal as high or low. This can result in the malfunction of the DDR-SDRAM. Thus, in a data processing apparatus that shares a DDR-SDRAM among multiple data processing circuits 102, because it may not be possible to eliminate a bus control circuit 104, such a data processing apparatus suffers from increased circuit size. At that same time, as noted previously, response speed decreases due to the presence of the bus control circuit 104.
In light of the above, it would be desirable to arrive at some way of enabling a semiconductor memory circuit to be shared among multiple data processing circuits without the use of a bus control circuit. At the same time, such a solution should not suffer from the potential malfunctions that can occur in conventional arrangements.

Data processing apparatus that shares a single semiconductor memory circuit among multiple data processing units


A group of small pieces of divided base substrate is arrayed on a sheet without gaps therebetween by means of a simple method. Provided is a substrate-sheet fabricating method including cutting into a group of small pieces a base substrate whose first-side surface is attached to a first sheet member; transferring the group of small pieces to a second sheet member by attaching the second sheet member, which can be contracted in the direction along a surface thereof, to second-side surfaces of the group of small pieces and by peeling off the first sheet member from the first-side surfaces of the group of small pieces; and making the second sheet member contract in the direction along the surface thereof.

In the related art, there is a known microdissection method in which very small segments are cut out from a tissue section in order to perform tests of localized gene expression or the like in the tissue section (for example, see Patent Literature 1). The method of Patent Literature 1 requires large-scale equipment and well-developed skills.
On the other hand, there is a method employed as a similar method to that of Patent Literature 1, in which a base substrate such as a cover glass or the like is divided into a group of small pieces in advance; in this state, they are attached to an adhesive sheet that can be expanded, so as to be arrayed without gaps therebetween; a tissue section is attached on the group of small pieces; and the sheet is expanded to separate the small pieces from each other, thereby dividing the tissue section into segments along the outline of the individual small pieces. Here, the base substrate is manually divided by using a glass cutter in a state in which it is attached to the adhesive sheet, and thus, the group of small pieces are arrayed on the adhesive sheet without gaps therebetween. To divide the base substrate by using a glass cutter, first, grid-like grooves with spaces of several millimeters or less therebetween are made on the base substrate by using a glass cutter, and, subsequently, the base substrate is manually divided into small pieces along the grooves.


The present invention provides a hydrophilic substrate including a hydrophilic polymer layer having a smooth surface and formed of a special polymer (hydrophilic polymer). Included is a hydrophilic substrate including on its surface a hydrophilic polymer layer formed of a hydrophilic polymer having a number average molecular weight of 40,000 or more.

It has been proposed to coat the surface of substrates with special polymers in order to prepare devices for capturing specific cells (e.g. blood cells, cancer cells present in blood or biological fluid) from blood or biological fluid.
However, it is difficult for some special polymers to form a smooth surface by coating. Since the surface smoothness of the substrates affects the ability to capture specific cells, there is a need for substrates having a smooth surface with excellent properties, e.g. in terms of ability to capture specific cells such as cancer cells.


A method and system for defect evaluation using IDDQ voltage linearity provides improved IDDQ testing for determining whether manufacturing defects in a VLSI device are likely to cause functional faults. IDDQ data is collected at multiple power plane voltages (VDDs) for a test vector at which a fault is activated. The IDDQ vs. VDD is then examined and a range of VDDs over which the characteristic IDDQs are non-linear with respect to VDD is determined. Peaks in the first derivative of the IDDQ vs. VDD curve indicate a particular VDD at which the onset of non-linearity in the IDDQ occurs. The VDD point below which the curve is non-linear indicates the relative resistance of a fault with respect to the driving point resistance of the node at which the fault is located. The relative resistance is directly determinative of additional circuit delay cause by the fault and/or whether the fault will cause a logic level transmission failure. Therefore, the range of VDDs for which the IDDQ curve is linear provides a pass/fail indication that can be used to reject devices in manufacturing test.

1. Field of the Invention
The present invention generally relates to integrated circuit test systems, and more particularly to a computer program that analyzes voltage dependency of integrated circuit power supply pin quiescent current measurements.
2. Description of Related Art
Manufacturing tests and design verification tests are necessary for ensuring functionality and reliability of large-scale digital integrated circuits such as Very Large Scale Integration (VLSI) circuits. Millions of transistors and logic gates are often combined on a single die and the performance of the die is verified both in the design phase and the manufacturing phase of a VLSI product cycle.
Power supply current for individual gates or blocks within such a VLSI circuit combines to generate the power requirements for the overall die, and will typically combine in sub-groups to several power and ground pins that are typically also connected within the integrated circuit package. Faults within a VLSI circuit are generally caused by short circuit paths or open circuit paths in conductor or semiconductor segments and as device and line size is decreased in order to increase transistor count, a tolerable defect level is established by a manufacturer. Post-manufacture testing is performed, generally at the wafer level, in order to avoid packaging defective devices.
One test that has proven very efficient for determining whether short circuit faults exists in semiconductor dies is a quiescent supply current test (or IDDQ test). IDDQ testing is typically performed by measuring the leakage current through the power supply plane (sum of the power pin or return pin currents, i.e., IDDQ) using a manufacturing tester parametric (analog) measurement capability. A series of test vectors are used to exercise internal states of the integrated circuit and the IDDQ measurements are used to discover states in which an internal short is activated (for example, a short to ground on the output of an inverter raises IDDQ when the input of the inverter is set to a known low state by the test vector pattern).
However, the shorting resistance in short-circuit failures may be relatively high compared to the output circuit resistance and thus a particular short may not be a significant defect requiring rejection of a die. Additionally, a particular test acceptance current level (even on a per-vector basis) may cause rejection of dies that will not exhibit faults because the particular output circuit resistance is low with respect to the shorting resistance. Such a test may also pass dies that will exhibit faults, which may be logic value failures or unacceptable signal delays. Faults may be missed as the output circuit resistance may be so high that even a high shorting resistance that does not appear to significantly affect IDDQ may cause operational failures. Such fault missing may cause parts to be shipped that may exhibit failures in end-user installations, or at least will cost further test time and/or further packaging process cost that could be avoided if the defect could be detected prior to functional testing.
As the output resistance of various gates within a typical VLSI circuit may vary by as much as 100:1, variations in shorting resistance and short location cause some significant defects to be easily masked, while other defects that will not affect the functionality of the die may cause waste due to unnecessarily rejected dies.
Therefore, it is be desirable to implement an improved IDDQ testing methodology that can distinguish between shorts that are likely to cause functional failures and those that will not. It would further be desirable to provide an IDDQ testing methodology that can detect high-resistance shorts that will cause functional failures and detect relatively low-resistance shorts that will not cause functional failures.

Method and system for defect evaluation using quiescent power plane current (IDDQ) voltage linearity

International Business Machines Corporation


A tape-on-wafer mounting apparatus and method for mounting a dicing tape on a wafer. The wafer stage mounts a wafer in the hole, which is constructed such that, when the wafer is mounted there, the wafer top surface stands higher than the wafer stage surface, with the wafer surface on which chip circuits are fabricated faced down. The tape stage mounts a dicing tape on its ring with the tape surface on which adhesives are applied faced down. The tape pressing tool presses the tape stage on the wafer stage so that the tape presser, which is constructed such that vertical force exerted by it is the largest at its center and smaller with the increase in distance from the center, causes the dicing tape to stick to the wafer.

1. Field of the Invention
The present invention relates to a tape-on-wafer mounting apparatus and method for mounting a dicing tape on a semiconductor wafer (hereinafter simply called a wafer) before the wafer is divided into chips (or diced).
The process for manufacturing semiconductor devices includes a process in which a wafer having a plurality of chip circuits arranged on an entire surface thereof, is divided into a plurality of chips or diced.
When a wafer is diced, a method generally used to prevent chips diced from getting scattered and lost or even damaged due to a collision with each other, is to mount or stick a dicing tape on the entire surface of the wafer's back and then to cut the wafer to a depth where the dicing tape is not cut through. However, as a wafer becomes large-sized, the wafer becomes liable to bend due to its own weight and it becomes difficult to mount the dicing tape uniformly and firmly on the wafer. Accordingly, a dicing tape-on-wafer mounting apparatus and method for mounting a dicing tape on a semiconductor wafer uniformly and firmly on the wafer, is in great demand.
2. Description of the Related Art
FIG. 1 (a)-(c) illustrate a technical background of the present invention, each showing a wafer before dicing, in the process of dicing and after diced, respectively.
In FIG. 1 (a), a round wafer 1 has a plurality of chip elements 11 including chip circuits 11a, arranged on an entire surface (on the top side in the Figure) of the wafer 1. If the wafer 1 is diced into chip elements 11 as it is, the chip elements 11 diced may scatter or collide with each other, causing some of them to be lost or damaged in circuit function.
To prevent this, firstly a dicing tape 12, which is large enough to cover the wafer 1, is mounted (or stuck) on the back (the bottom side in the Figure) of the wafer 1 on which chip circuits 11a are not fabricated, as shown by an arrow. Secondly, the wafer 1 is grooved in a gridiron layout between the chip elements 11 by using a circular saw 13, to the depth of its thickness but where the dicing tape 12 is not cut through, as shown in FIG. 2 (b). The dicing tape 12 is made of polyethylene, for example, and has an adhesive 12a having a property to lose viscosity when irradiated by ultraviolet rays, applied on one side (the top side of the tape in the Figure).
Since the chip elements 11 diced are stuck to the dicing tape 12 as they are arranged in order as shown in FIG. 1 (c), they will never scatter or collide with each other, which facilitates reservation and transfer of them. Accordingly, the chip elements 11 diced can easily be peeled off and separated from the dicing tape 12 by irradiating ultraviolet rays on the entire surface of the wafer 1, as required.
FIG. 2 (a)-(b) show an example of a conventional dicing tape-on-wafer mounting apparatus and method. FIG. 2 (a) is a schematic sectional view of a dicing tape-on-wafer mounting apparatus 2, taken along a line passing the center of a wafer 1. FIG. 2 (b) is a sectional view of the dicing tape-on-wafer mounting apparatus 2, with a dicing tape 12 being stuck to the wafer 1.
In FIG. 2 (a), the dicing tape-on-wafer mounting apparatus 2 consists mainly of a wafer stage 21, a tape stage 22 and a roller 23. The tape stage 22, which has a flat and ring-shaped dicing frame 22a on its top surface for mounting the dicing tape 12, is coupled to a chamber (not shown) and moves up and down with respect to the wafer stage 21 in a fashion that it encloses the wafer stage 21. The roller 23 moves while rotating on the top surface of the tape stage 22, along a diameter of the tape stage 22.
The wafer stage 21 has a truncated cone-shaped recess (or hole) 21a on its top surface for mounting the wafer 1 therein. The recess 21a is constructed such that the diameters of its upper and lower bases are larger and smaller than that of the wafer 1, respectively and, when the wafer 1 is put in the recess 21a, the top surface of the wafer 1 stands higher than the top surface of the wafer stage 21.
The surface of the roller 23 is made of an elastic member (e.g., silicone rubber) and its length is made larger than the diameter of the wafer 1.
Thus, when the wafer 1 is mounted in the recess 21a coaxially (with the center of the wafer 1 aligned) with the recess 21a, with the wafer surface 1a having the chip circuits 11a fabricated thereon, faced down, the wafer back (shown upward in the Figure) of the wafer 1 comes slightly higher than the top edge 21b of the wafer stage 21.
Next, when the dicing tape 12 is mounted and stuck on the dicing frame 22a via the adhesive 12a while the dicing tape 12 is being pulled with a jig (not shown) to give tension thereto and, as the tape stage 22 is lowered gradually, the dicing tape 12 is mounted onto the wafer back 1b which stands out slightly above the top edge 21b of the wafer stage 21 (see FIG. 2 (b)). Then, when the roller 23 is rolled along the arrow B, the dicing tape 12 is pressed and stuck on the wafer back 1b. Thus, the wafer 1 with the dicing tape 12 stuck thereon is obtained by cutting off the part of the dicing tape 12 protruding the circumference of the wafer 1.
The above-mentioned method is useful in sticking a tape onto a wafer closely when the wafer is flat. However, the latest trend is toward a large-sized and thin wafer in order to improve productivity of semiconductor chips by fabricating as many chips as possible on a larger wafer and to meet the demand for small-sized chips.
Since the wafer 1 is held with the circumference edge of the wafer surface 1a which has chip circuits 11a fabricated, laid on the wafer stage 21, the wafer 1 tends to cave and hang down at its center portion as it becomes larger and thinner. Even if the roller 23 is pressed onto the dicing tape 12 with the wafer 1 at this state, the dicing tape 12 will fail to contact the wafer 1 closely and develop a gap at the center portion, collecting air there and preventing the dicing tape 12 from sticking uniformly and firmly on the wafer back 1b.
Therefore, a problem is that chip elements 11 diced in the dicing process peel off and scatter easily, causing some of them to be lost or damaged due to a collision and, eventually decreasing the productivity of semiconductor devices.

Tape-on-wafer mounting apparatus and method


An endodontic tool has a working tip including two cylindrical segments connected together lengthwise and terminating in a conical tip. The cylindrical segment which connects directly to the conical tip is smaller in diameter than the second cylindrical segment, whereby a shoulder is provided at the intersection of the two cylindrical segments. The conical tip and first cylindrical segment have surfaces for removing tooth material when the tool is vibrated at sonic frequencies. A stem connects to the second cylindrical segment at a right angle and is connectable to a conventional sonic hand piece so that vibratory energy generated within the hand piece is transmitted to the working tip by way of the stem. The hand piece provides vibratory motion generally along its longitudinal axis, and the stem is received in the hand piece with the stem axis at an angle to the longitudinal axis of the hand piece. The stem can be rotated about its own axis in the hand piece such that orientation of the working tip relative to the longitudinal axis of the hand piece is readily and releasibly adjustable.

This invention relates generally to dental apparatus for use in endodontic procedures and more particularly to a tool and hand piece suitable for retrofill cavity preparation, that is, preparation of a root cavity for filling from the bottom, by access through an opening provided in the jawbone.
In root canal surgery, the space containing the pulp is opened by drilling into the tooth from the top. The pulp is then removed and a suitable material is used to fill the entire internal volume of the tooth. However, if pain persists or if problems develop subsequently to cause the patient to feel pain in the tooth, it may be necessary to drill into the bottom of the tooth root which is seated in the jawbone. Such drilling is accomplished from the side, through the gums and jawbone. The tip or bottom of the root is removed and the bottom of the root canal is bored out and is subsequently filled with a filler material.
In the past, such bore has been made by an vibratory instrument operating at ultrasonic frequencies. Vibrations are induced in the tool by a mechanism, typically including a piezoelectric element, in a hand piece to which the tool is mounted, and which is adapted to be held by the dental surgeon. Rotary drilling bits are also sometimes used in place of, or in conjunction with, tools operating with vibratory motion. Because of the various locations in the mouth where root canal surgery may be required and because of the relative inaccessibility of many of these areas and the small space between cheek and jawbone, tools of many different shapes have been constructed to accommodate the various tooth locations so that the bottom of the root can be reached for retrofill cavity preparation regardless of the tooth's location. No single tool is known which is sufficiently versatile to operate at all of the tooth locations. Many possibilities for misaligning a drilled cavity, or for over-enlargement or excessive depth of a drilled cavity, are present. Such hazards are especially prevalent when using devices that vibrate at ultrasonic frequencies, since a small deviation from an intended path of operation can quickly and undesirably remove relatively large quantities of tooth material. Among others, the risk of an unintended breaking through of the side wall of a tooth is increased at ultrasonic frequencies. At best, operation of these tools involves very delicate and time consuming procedures.
Further, when operating at ultrasonic speeds with conventional tools, it is difficult to avoid enlarging the entrance to the cavity drilled at the bottom of the root such that the cavity becomes conical in shape, that is, increasing in diameter toward the bottom of the root. Such a conical shape, when filled from the bottom, results in a filling which may easily be dislodged. A straight, i.e. cylindrical, bore into the bottom of the tooth is preferred, since the friction from the parallel side wall of the bore aids in maintaining the filler material in place.
In the prior art, U.S. Pat. No. 5,094,617, issued Mar. 10, 1992, provides an ultrasonic tool having a conical working end that is connected at an angle to an elongated stem. Stems of many different shapes, both smoothly curved and also bent at clearly defined angles, are disclosed. Regardless of shape, the stem is received coaxially in a compatible tool holder of a hand piece for a dental retrofill instrument. Longitudinal ultrasonic vibrations generated in the hand piece are transmitted to the stem and to the conical working end of the tool, which is applied to a patient's tooth. The above-mentioned hazards associated with ultrasonic tools affect usage of the tools of the type disclosed in U.S. Pat. No. '617. The need for numerous tools, each of a different shape so as to access teeth of different locations can be an inconvenience to the surgeon.

Endodontic apparatus for retrofill cavity preparation


The present invention provides Nelumbo extract and a method thereof. The present invention further provides a composition comprising said extract and a method for treating subject suffering from breast cancer with the composition.

Breast cancer is a cancer of the glandular breast tissue and it is developed when a cancerous tumor occurs inside the breast. There are two main types of breast cancer. One is ductal carcinoma which starts in the tubes (ducts) that move milk from the breast to the nipple; most breast cancers are of this type. The other is lobular carcinoma which starts in parts of the breast, called lobules, which produce milk. In rare cases, breast cancer can start in other areas of the breast.
Many breast cancers are sensitive to the hormone estrogen. This means that estrogen causes the breast cancer tumor to grow. Such cancer is called estrogen receptor positive cancer or ER positive cancer.
Some women have what's called HER2-positive breast cancer. HER2 refers to a gene that helps cells grow, divide, and repair themselves. When cells have too many copies of this gene, cells, including cancer cells, grow faster. Experts think that women with HER2-positive breast cancer have a more aggressive disease and a higher risk of recurrence than those who do not have this type.
Worldwide, breast cancer is the fifth most common cause of cancer death (after lung cancer, stomach cancer, liver cancer, and colon cancer). In 2005, breast cancer caused 502,000 deaths (7% of cancer deaths; almost 1% of all deaths) worldwide. Among women worldwide, breast cancer is the most common cause of cancer death. Because the breast is composed of identical tissues in males and females, breast cancer also occurs in males, though it is less common.
Several herbal compounds or complexes have been indicated to be candidate drugs for treating breast cancer. For example, Puerariae radix and Ginseng radix Rubra extracts were suggested to have effective estrogenic actions and could be developed as estrogenic supplements. In addition, folk history has it that Sacred water lotus (Nelumbo nucifera) can be used to treat cancer. Modern research has isolated certain compounds from the plant that show anticancer activity. However, there was no research showing that extracts of Nelumbo nucifera can mitigate breast cancer.
Sacred water lotus (Nelumbo nucifera) has been used in the Orient as a medicinal herb for well over 1,500 years. All parts of the plant are used as herbal medicine because they have astringent, cardio-tonic, febrifuge, hypotensive, resolvent, stomachic, styptic, tonic or vessel dilating effect. For example, the leaf juice is used in the treatment of diarrhoea and is decocted with liquorice for the treatment of sunstroke.
A decoction of the flowers is used in the treatment of premature ejaculation. The flowers are recommended as a cardiac tonic. A decoction of the floral receptacle is used in the treatment of abdominal cramps, bloody discharges etc. The flower stalk is haemostatic. It is used in treating bleeding gastric ulcers, excessive menstruation, post-partum haemorrhage.
The stamens are used in treating urinary frequency, premature ejaculation, haemolysis, epistasis and uterine bleeding. Besides, a decoction of the fruit is used in the treatment of agitation, fever, heart complaints etc. Furthermore, the seed is sedative and used in the treatment of poor digestion, enteritis, chronic diarrhoea, insomnia and palpitations.
The root is tonic and the root starch is used in the treatment of diarrhea or dysentery, a paste is applied to ringworm and other skin ailments. It is also taken internally in the treatment of haemorrhages, excessive menstruation and nosebleeds. The roots are harvested in autumn or winter and dried for later use.
The root nodes are used in the treatment of nasal bleeding, haemoptysis, haematuria and functional bleeding of the uterus. The plumule and radicle are used to treat thirst in high febrile disease, hypertension, insomnia and restlessness.

Extracts of sacred water lotus for the treatment of cancer


A receiver circuit is described herein, comprising a first data determining unit configured to detect and amplify a voltage level difference between first and second external data and generate first and second sense signals and to generate first internal data in response to the first and second sense signals, a first offset control unit configured to generate first and second offset signals in response to the first and second sense signals, the first and second offset signals swinging between a maximum voltage level and a minimum voltage level determined based on a first code, a second data determining unit configured to detect and amplify the voltage level difference between the first and second external data to generate third and fourth sense signals and to generate second internal data in response to the third and fourth sense signals; and a second offset control unit for generating third and fourth offset signals in response to the third and fourth sense signals, the third and fourth offset signals swinging between a maximum voltage level and a minimum voltage level determined based on a second code, wherein the first data determining unit is configured to determine setup time and hold time of the first internal data in response to the third and fourth offset signals, and wherein the second data determining unit is configured to determine setup time and hold time of the second internal data in response to the first and second offset signals.

1. Technical Field
The embodiments herein relate to a semiconductor memory apparatus, and, more particularly, to a receiver circuit.
2. Related Art
A conventional receiver circuit of a semiconductor memory apparatus receives data from an external system, buffers the data, and delivers the data to an internal circuit of the semiconductor memory apparatus.
As shown in FIG. 1, a conventional receiver circuit includes first to fourth sense amplifiers 11, 12, 13, and 14, and first to fourth latch units 21, 22, 23, and 24. The first sense amplifier 11 detects and amplifies a voltage level difference between first external data signal 'Data+' and second external data signal 'Data−' to generate first and second sense signals 'SA_out1' and 'SA_outb1'. The first sense amplifier 11 operates in synchronization of a first clock signal 'CLK1'. The first latch unit 21 generates first internal data signal 'Data_int 1' in response to the first and second sense signals 'SA_out1' and 'SA_outb1'.
The second sense amplifier 12 detects and amplifies the voltage level difference between the first external data signal 'Data+' and the second external data signal 'Data−' to generate third and fourth sense signals 'SA_out2' and 'SA_outb2'. The second sense amplifier 12 operates in synchronization of a second clock signal 'CLK2'. The second latch unit 22 generates second internal data signal 'Data_int 2' in response to the third and fourth sense signals 'SA_out2' and 'SA_outb2'.
The third sense amplifier 13 detects and amplifies the voltage level difference between the first external data signal 'Data+' and the second external data signal 'Data−' to generate fifth and sixth sense signals 'SA_out3' and SA_outb3. The third sense amplifier 13 operates in synchronization of a third clock signal 'CLK3'. The third latch unit 23 generates second internal data signal 'Data_int 3' in response to the fifth and sixth sense signals 'SA_out3' and SA_outb3.
The fourth sense amplifier 14 detects and amplifies the voltage level difference between the first external data signal 'Data+' and the second external data signal 'Data−' to generate seventh and eighth sense signals 'SA_out4' and 'SA_outb4'. The fourth sense amplifier 14 operates in synchronization of a fourth clock signal 'CLK4'. The first to fourth clock signals 'CLK1' to 'CLK4' have a phase difference of 90°. The fourth latch unit 24 generates fourth internal data signal 'Data_int 4' in response to the seventh and eighth sense signals 'SA_out4' and 'SA_outb4'.
The receiver circuit having the above structure can determine four data during one period of a clock signal. However, the first to fourth sense amplifiers 11, 12, 13, and 14 must detect and amplify the voltage difference of the first and second external data signals 'Data+' and 'Data−' during ¼ period of a clock signal.
As a data rate is gradually increased, a clock frequency is also increased. Accordingly, as the clock frequency is increased, the operational time of the sense amplifiers 11, 12, 13, and 14 constituting the typical receiver shown in FIG. 1 is reduced. Therefore, a technology of ensuring an operation margin of such a receiver is necessary. If the operation margin of the receiver is not ensured, then the receiver may operate erroneously.

Receiver circuit of semiconductor memory apparatus


The drywall screw includes an elongated shaft about an axis, a screw head at one end and threads about the shaft. The screw head has a recess having upper and lower portions. The upper portion is comprised of an upwardly flared thin-walled section having convex and concave interior and exterior surfaces, respectively. The lower portion includes a Phillips head slot for receiving a Phillips head driver. The recess in the head of the drywall screw and the outwardly flared head enables the screw to be driven into the drywall without tearing or loosening the paper overlying the drywall, while simultaneously providing a sufficient recess for receiving the drywall mud finishing compound.

Drywall (sheetrock) is a gypsum composition in board form covered by paper on both sides typically fastened to supports such as wooden or metal studs by nails or screws with adhesive being sometimes used as an adjunct to the nails or screws. It will be appreciated that broken or torn paper around the head of any drywall fastener such as a nail or a screw is a principal concern when installing drywall. When the paper on the face side of the drywall, i.e., the side on which the fasteners are being driven into the drywall and into the supports, becomes loose, torn or broken about the fastener, the result is a "popper." Too many poppers on a given piece of drywall means that the drywall is not properly or safely attached to the supports, and could result in separation of the drywall from the support. Drywall, as is well known, is quite heavy, e.g., a 4'.times.12' length and 5" thick weighs over 100 pounds and its unanticipated separation from wall or ceiling supports could cause serious injury. Poppers also provide an unappealing appearance and are difficult to repair in a manner providing the same structural support to the drywall as intended when originally installed.
Present-day drywallers typically use nails or screws to fasten the wallboard to the underlying supports. Typically, the head of a drywall nail is concave and a sheetrock hammer face is convex. The hammer face is convex so that the paper around the head of the nail when driven home won't be broken by the hammer. Also, the convex hammer face creates the depth and expanse of a dimple in the drywall for receiving the appropriate fill. When the nail is properly driven through the drywall and into a stud, the convex face of the hammer flattens the concave nail head which catches the paper, securing it inside the dimple created by the hammer, thus preventing a popper. When properly performed, the next step is to fill the dimple with the drywall mud compound covering the nail, i.e., "spotting the fasteners," until the compound in the dimple lies flush with the surface of the drywall. It will be appreciated that the head of the drywall nail resides at the bottom of the dimple and its role is to hold the stretched surface paper of the drywall tightly to the smashed gypsum under the paper of the dimple, securing the paper to the drywall and the drywall to the support. However, even experienced drywallers will sometimes cause the paper about the nail head to be torn or broken.
Multi-purpose screws are also used to secure drywall to supports. Typically, such multi-purpose screw comprises a flat head. The screw must be recessed beneath the surface of the paper on the drywall. While the paper can and does stretch as the screw head is passing into the drywall, the paper about the screw head is oftentimes broken or torn when recessing the screw head beneath the surface of the drywall paper. Insufficient recessing of the flat head of the drywall screw relative to the paper surface leaves an insufficient dimple or recess for receiving the drywall mud compound, resulting in the inability of the mud compound to be retained in the dimple or recess and, at the same time, without having the face of the screw visible through the thin coats of compound. Driving the screw too deep into the gypsum will result, of course, in torn or loose paper and a popper. Electrically powered screw guns are often used to drive the drywall screws through the drywall and into the support. However, these can and often do drive the screw too far, creating a small hole in the paper which results in the "popper." Basically, with both the nail and screw-type fasteners for securing drywall, if the paper is broken, the installation of the drywall has not been properly achieved and, over time, problems associated with those flaws will become apparent.


A method for venting air from a fluid system through an air valve includes moving a float away from a seat mounted within a valve body, the valve body having an inner surface and an outer surface, the inner surface and the outer surface defining an inlet and an outlet, the seat having an upper surface and a lower surface defining a bore and a fastener hole extending between the upper surface and the lower surface, the upper surface facing the outlet of the valve body and defining a first sealing ridge and a second sealing ridge between the bore and the fastener hole, a fastener extending through the fastener hole into the valve body; and venting air from the fluid system through the outlet.

It is occasionally desirable to remove air from the interior of a fluid system to the exterior of the fluid system through an air valve. In many cases, it is also desirable that air from the exterior of the fluid system be prevented from entering the fluid system through the same air valve when air is not being removed from the interior of the fluid system through the air valve. When air is being removed from the fluid system, the air valve is open, and when air is not being removed from the fluid system, the air valve is closed.

This patent is subject to a terminal disclaimer.


A new processing capability for desert dust enhancement using imager data from the Sea-viewing Wide Field of View Sensor (SeaWiFS) has been developed for Naval meteorology/oceanography (MetOc) operations support. The data are captured via direct broadcast high-resolution picture transmission (HRPT) at Navy Regional Centers in Rota, Bahrain, and Yokosuka, and processed at the Naval Research Laboratory in Monterey. The raw data are calibrated, corrected for missing lines and clutter, corrected for molecular scatter contamination, and enhanced through multispectral combination to yield value added products. The processing has been automated completely such that products, generated upon receipt of data, are hosted upon a password protected website typically 60 to 90 minutes from time of initial capture. This invention summarizes the SeaWiFS instrument capabilities, the protocol followed for automated near real-time processing, a physical basis for the NRL enhancements, and specific examples of the products with extension to over-land dust enhancement as enabled by MODIS. It closes with a glimpse of the potential utility of these products from the perspective of the warfighter.

1. Field of the Invention
This invention deals generally with digital enhancement of environmental satellite imagery of airborne dust layers over both ocean and land backgrounds.
2. Description of the Related Prior Art
The detection and tracking of airborne dust from satellite has been of long-standing interest to both the Navy and academia alike, and there is no shortage of papers treating the subject (e.g., Shenk, W. E., and R. J. Curran, 1974: The detection of dust storms over land and water with satellite visible and infrared measurements, Mon. Weather Rev., 102, 830–837. Carlson, T. N., 1978: Atmospheric turbidity in Saharan dust outbreaks as determined by analyses of satellite brightness data, Mon. Weather Rev., 107, 322–335. Legrand, M., M. Desbois, and K. Vovor, 1987: Satellite detection of Saharan dust: optimized imaging during nighttime, J. Climate, 1, 256–264. Jankowiak, I., and D. Tanre, 1992: Satellite climatology of Saharan dust outbreaks: method and preliminary results, J. Climate, 5, 646–656.) These earlier works make use of various spatial and spectral contrast signatures to identify and retrieve properties of dust against land and ocean backgrounds.
A recent study (R. Cantu; "The Role of Weather in Major Naval Aviation Mishaps", MS Thesis, 106 pp., NPS Monterey) finds that poor visibility has factored into approximately 54% of Navy aircraft "Class-A" mishaps, for an estimated annual loss of $51 million. Of these mishaps it was reported that 56% were preventable had better forecasting and/or observational tools been available. The current Dust Enhancement Product represents a paradigm shift in the way dust is observed from the space platform, and is directly applicable to mitigating this multi-million dollar liability.
As noted in the reference listing above, several alternative methods exist for enhancing dust over land and water. Single-channel radiometerimagery with scaling thresholds chosen to enhance a small dynamic range of temperature or reflectance values has been applied to visible and infrared geostationary imagery. The resultant enhancements, usually only of marginal visual quality, are highly dependent on the thresholds chosen and hence not suitable for operations where optimal values for these thresholds may change dynamically over space and time. Combinations of single-channel visible and infrared data is a marked improvement over the scaling described above, but still suffers cloud/dust ambiguity for lack of multi-channel visible data (i.e., the basis for the over-water Dust Enhancement Product, which requires blue and short wave infrared channels). The Empirical Orthogonal Function (EOF, or sometimes referred to as "principle component") method has been shown to do a good job of enhancing dust over land and water. However, results produced by this method again are highly dependent on the variability of the scene and hence will provide an inconsistent enhancement depending on background and dimension of the region. Spatial contrast reduction, which takes advantage of the blurring effect of dust over otherwise sharply-defined terrestrial features, has been applied successfully for dust detection over land, but often fails over laminar ocean backgrounds and is limited over land in regions where the terrain is less variable (e.g., desert plains, where dust incidentally is most common).
None of the previous methods enlist multi-channel visible data to take advantage of the inherent spectral variability of dust at these wavelengths, due primarily to the unavailability of such data at the times of those writings. The unified land/ocean Dust Enhancement Product is a novel solution to the daytime dust detection problem. In comparisons between the visible/infrared combination technique (e.g., as is applied to Meteosat 5 data) and the current algorithm (applied to Terra-MODIS data) for a space and time co-located dust storm event in Southwest Asia has revealed superior detection of dust by the current method over both land and water. As such, the new technique is thought to be of immediate relevance to Navy Meteorology/Oceanography (METOC) operations in several regions of the world that experience significant dust outbreaks (including Southwest Asia, Africa, the Mediterranean, and the West Pacific).

System and method for significant dust detection and enhancement of dust images over land and ocean

The United States of America as represented by the Secretary of the Navy


An apparatus for holding molten metal in a container having an opening at the bottom thereof comprising an electromagnet for generating a horizontal magnetic field in a lower part of the molten metal in the container and a conductive block for guiding part of eddy currents induced in the molten metal by the generation of the horizontal magnetic field, to flow outside the molten metal.

In facilities for plating by passing a material to be plated through a bath of molten metal such as zinc or aluminum, a conductive liquid, the molten metal is held by a method as described in Japanese Laid-Open Patent Publication No. 356/92. In this method an opening portion is provided at the bottom of an aerial pot from a material poorly wettable by molten metal, and utilizes the surface tension of the molten metal to hold the molten metal inside the aerial pot. This method is limited in increasing the height of the molten metal that can be held.
To achieve an increased height of molten metal which can be held in a container Japanese Laid-Open Patent Publication No. 109148/88 discloses a technique of providing a pressure chamber for accommodating a gas under the container storing molten metal. This technique involves a pressure chamber containing gas connected to an opening at the bottom of the molten metal container, and raising the gas pressure inside the pressure chamber, thereby increasing the height of the molten metal held in the molten metal container. The technology disclosed in this publication, however, has the disadvantage that even when the pressure (gravitational) of the molten metal at the opening balances statically with the gas pressure inside the pressure chamber, the difference in density between the gas and the molten metal causes the gas to penetrate the molten metal as bubbles and go up through the molten metal.
To obtain a plating of satisfactory quality by passing a material to be plated through molten metal, it is desired that the height of the molten metal be kept high and constant, and avoid gas bubbles in the molten metal.
An object of the present invention is to enable molten metal to be held at a predetermined height in a container with an opened bottom.
Another object of the invention is to prevent the formation of gas bubbles in molten metal.
Still another object of the invention is to produce a plating of satisfactory quality by hot dipping.

Method and apparatus for holding molten metal


The present invention involves a programmable microprocessor based controller having the capacity to store multiple operational instruction sets for independently controlling system components. The invention further involves a distributed intelligence network of such programmable controllers having the capability to interface with one another, Host computers, and system control components to provide system-wide automation for simultaneously monitoring and controlling video, audio, and electro-mechanically operated equipment. The programmable controller accepts analog and digital inputs and provides a wide range of user defined control functionality through its analog and digital outputs and its many external connections. The controller can support one and possibly two communication buses, depending upon the application, upon which a plurality of system components may be connected to each. Automatic control system applications include, but are not limited to: concert sound systems, stadium sound systems, theme park automation, video-conferencing, etc. The invention further involves firmware for implementing smooth output limiting, automatic standby, short detection, enhanced ODEP conservation, and interrupt driven reporting.

The field of the invention relates generally to automated systems for simultaneously monitoring and controlling video, audio, and electro-mechanically operated equipment and more specifically to audio amplifier control systems. Automatic control system applications include, but are not limited to: concert sound systems, stadium sound systems, theme park automation, video-conferencing, etc. Certain automation systems utilize control components interfaced with Host computers to accomplish their tasks. In the absence of a Host computer, some limited stand-alone operation may be provided, such as local amplifier control, Junction Temperature Simulation (JTS), and Output Device Emulator Protection (ODEP) conservation.
Such systems are extremely dependent upon their associated Host computer for effective operation. In the event such a Host computer is off-line, the entire control system is compromised and many essential functions are disabled. In addition, many systems are too small to justify having a Host computer much less a qualified technician to operate it.
For real time operation it is essential that an automated control system operate on a high speed communication path. With large systems having thousands of components all having their individual data processed through a single source, i.e. Host computer, the overall system operating speed is reduced. Thus, the nature and the extent of control of these systems limit their applicability to real time operation.

Programmable central intelligence controller and distributed intelligence network for analog/digital control systems


A circuit arrangement for adapting the bit rates of two signals to each other comprises an elastic store (6). The useful data of a first frame-structured signal are written into this store (6) by means of a write address counter (7) and read out again by means of a read address counter (8). A phase comparator (16) is used for comparing the counts of these counters (7, 8). In order to largely avoid jitter in the signal that has been read, the read address counter (8) and the phase comparator (16) are incorporated in a control circuit that controls the clock for the read address counter (8). In this control circuit the output signal of the phase comparator (16) is the control error. The controlled system (17) of the control circuit consists of a controllable oscillator circuit with whose output signal and read address counter (8) is clocked. In order to avoid stationary phase shifts with a constant frequency shift, a controller (18) having a PI behavior (PI=proportionality and integration) is used.

Field of the Invention
The invention relates to a circuit arrangement for adapting the bit rates of two signals to each other, which arrangement comprises an elastic store into which the useful data of a frame-structured first signal are written with the aid of a write address counter and read out again with the aid of a read address counter, and further comprises a phase comparator for comparing the counts of these counters.
A circuit arrangement of this type is disclosed in German Patent Application DE-A-39 20 391 (filing date: Jan. 22, 1989); in digital transmission systems this arrangement is necessary for recovering the frame-structured useful data as plesiochronous data signals. Therefore, only the useful data are written into the elastic store because the counter is stopped during all other data in the signal and the count of the write address counter denotes the addresses at which useful data are stored in the elastic store. Accordingly, the count of the read address counter denotes the addresses of the memory locations from which the useful data can be read out again.
Reading the useful data is to be effected in a manner such that the deviations from the nominal bit rate of the recovered presiochronous signal remain within the prescribed tolerance limits. A correction of the reading speed within these tolerance limits is necessary, for example, to prevent the elastic store from overflowing. Therefore, the counts of the two counters are to be monitored. The phase comparator, which produces the difference between the counts or a value equivalent thereto, is used for this monitoring. If the output signal of the phase comparator is used as a control error for a customary phase-locked loop, by means of which loop the clock for the read address counter is generated, this has the advantage that with large abrupt control errors the read clock and also the presiochronous signal will be affected by a strong jitter.
Such control errors occur, for example, when the useful data are transmitted in a Synchronous Transport Module-1 (further details below). The write address counter must then be stopped for several bytes; thus it runs highly erratically. This erratic operation is also reflected in the control error resulting in the above mentioned disadvantageous consequences for the presiochronous signal.

Circuit arrangement for bit rate adaptation


A nail clipper includes a body, an upper cutting part, a lower cutting part and a pressing piece. The body is a box shape which is open at the top and at the bottom near the front end, and has the lower cutting part at its front end and a sliding locking piece at its rear end. The sliding locking piece has a pulling button which protrudes outside the body. The upper cutting part is movably connected to the front end of the body and has an opening at its rear end. The pressing piece is movably connected through a pivot to the middle front part of the body and its rear end bends downwards and can hook onto the sliding locking piece.

The present invention relates to a nail clipper and more particularly pertains to a portable nail clipper as a tool for manicure and pedicure.
There are various technical proposals relating to nail clippers. Most of the nail clippers are inconvenient and dangerous to carry because their cutting edges do not bite together for storage. There are some nail clippers with the cutting edges biting together for storage. The simplest method is to provide a cap to cover the cutting edges, but it is easy to lose the cap. Attaching the cap onto the clipper body can avoid losing the cap but it hinders the use of the nail clipper. Another method is to add a cover plate which is connected to the clipper body. The cover plate is structured to press the pressing piece when folded for storage, thereby locking the cutting edges to a position that they bite together. Although this method is more practical, as the pressing piece is persistently pressed by the cover plate when folded for storage, prolonged use renders the pressing piece becoming deformed or losing elasticity and so the pressing piece cannot function eventually. In order for the nail clipper to be simple to use and for the cutting edges thereof to bite together for storage, many technical proposals require many parts and components, more complex assembling and higher production costs and are inconvenient to use. To nail clippers such goods for daily use which are small in size and easily lost and have to be discarded once the cutting edges become blunt, it is difficult for the market to widely accept nail clippers which are too expensive and complicated to use.
The prior art therefore cannot fully satisfy the demands of the consuming public. The market is still looking forward to a nail clipper which is safe and reliable, small in size, convenient to carry, easy to fold for storage, equipped with a durable pressing piece that does not deform and is susceptible of a low selling price.


A wheel finishing apparatus includes an upwardly opening tank which stores therein a water and media mixture. An elongated spindle is mounted on a frame and is displaced directly above the tank. The spindle includes on its lower end a hydraulically expandable bulb which acts as a wheel clamp to releasably mount a wheel to be finished onto the spindle. A circular plate is mounted on the spindle a predetermined distance from the lower end of the spindle and cooperates with a mounted wheel to define a cylindrical flow channel therebetween. A motor connects to the spindle and operates to rotate the spindle and thus the wheel in the media at high speeds.

1. Field of the Invention
The present invention relates to deburring and finishing apparatus for machined metal parts and, more particularly, to apparatus for finishing automobile wheels.
2. Description of the Prior Art
Stylized chrome wheels have become quite popular with many automobile owners, and in particular with luxury and sports cars. This is due to the fact that chrome wheels serve to substantially enhance the overall appearance of an automobile. Most automobile owners feels that chrome wheels give an automobile a more stylish, sporty and expensive look.
However, order to provide such an aesthetically pleasing appearance, the front or visual face of a machine wheel must made be as smooth as possible before the front face is coated with a layer of chrome. If the front face is not smooth, the chrome layer applied thereto acts to enhance and visually magnify any grooves or imperfections remaining in the wheel surface, thereby significantly detracting from the overall appearance of the wheel. Thus, there is a need for a device which may quickly and efficiently remove substantially all the grooves and roughness on the front face of the wheel to provide a front face with the desired degree of smoothness.
One prior method employed for finishing automobile wheels to polish the front face thereof was to manually finish such wheels by hand. A workman would manually rub an abrasive material against the front face of the wheel which would eventually serve to polish the front face of the wheel. This procedure proved to be quite tedious, time consuming and thus very inefficient.
A mechanical device previously used in the industry to finish automobile wheels is a vibrating finishing machine. Such machines are typically formed with an upwardly opening trough into which is placed an unfinished machined wheel. The wheel is then surrounded with plastic or ceramic media. The machine is then actuated to vibrate the wheel and media such that the continuous agitation of the wheel and media causes the media to contact and rub against the front face of the wheel to eventually finish the wheel. Such a device is not free from shortcomings, however. The process of finishing a wheel in such an apparatus may take up to several hours thus utilizing a substantial amount of machine time. In addition, such an apparatus is quite noisy to operate, which may create a nuisance to any adjacent businesses or residences in addition to transmitting a large amount of noise throughout the building in which it is operated.
Automobile wheels finished by the above-described methods, due to the significant amount of man or machine time involved, are necessarily quite expensive. The finishing costs incurred to prepare the wheel for the chrome plating process significantly raises the costs of the finished wheel. Thus, for many consumers, purchasing stylized chrome wheels is out of the question due to the high cost of such wheels.
It has been proposed to rotate machined parts including machined wheels on a spindle in water containing abrasive media in effort to finish the front face of the wheels. However, such a procedure has proved to be ineffective in finishing automobile wheels, and has only been found to be effective as a deburrer for deburring the outer edges of certain machined parts, such as gears and the like.
As such, there continues to be a need for a wheel finishing apparatus which is efficient to use and effectively finishes an automobile wheel without requiring a substantial amount of man or machine time, thereby reducing the end cost to consumers. The present invention addresses such needs.


An intelligent thermostat control system for a building, such as a residential home, that automatically adjusts a thermostat setting in the home based on real-time data continually received from mobile devices and/or social media files associated with the residents. This allows the thermostat controller to override the explicit programmed settings with implicit settings based on activity analysis taking the actual locations and schedules of the residents into account. The intelligent thermostat controller may control different zones differently to take into account the schedules and locations of specific residents associated with specific zones. The temperature controller may also adaptively learn a number of parameters based on monitored data, such as travel times and heating/cooling times for the zones based, to determine times for adjusting the thermostats.

Many homes have programmable thermostats that allow a user to enter multiple settings for running the heat, ventilation and air conditioning (HVAC) systems to match the expected occupancy patterns of the residents to save energy. Most homes also have multiple zones with dedicated HVAC units, each having a separate programmable thermostat. It is generally appropriate to heat or cool different zones on different schedules to save energy. In some homes, for example, it may be appropriate to heat and cool the main living zone during waking hours, while the bedroom zone can be heated and cooled during sleeping hours. It may also be advantageous to turn the thermostats well down (i.e., turn the heating temperature setting up and the air conditioning temperature down) whenever the residents are scheduled to be away from home for extended periods, for example during weekday working hours. The thermostats can be programmed to automatically adjust to more comfortable settings when the residents are scheduled to return home. There may also be special events, such as vacations, when the entire family is away from home for extended periods. When the entire family is away from the home, energy can be saved by turning the thermostats well down for the duration of their absence.
In general, more accurate thermostat programming reflecting the actual occupancy of the residents can save energy, but few homeowners remember to adjust the thermostat as frequently as schedules change. And even if a homeowner were to endeavor to set the thermostats daily to reflect the expected occupancy schedules of the residents, the thermostat settings might still turn out to be less then optimal, at least on some occasions, due to unexpected changes in the schedules.

INTERNATIONAL BUSINESS MACHINES CORPORATION


A method includes receiving collimated light from an optical imaging system and dividing the received light into multiple bands of wavelength. Each band is refocused onto a corresponding diffraction grating having an amplitude function matched to a point spread function (PSF) of the optical imaging system. The light that is not filtered out by the diffraction grating is transmitted onto a corresponding pixel array. An image is reconstructed from data provided by the pixel arrays for each band. The intensity of light scattered by each diffraction grating may be detected, with the image being reconstructed as a function of an average value of detected intensity of scattered light used to scale the known zero-order mode profile, which is added to the image on the pixel array.

Primary optics for large aperture telescopes are massive, expensive, and can have a very long lead time for manufacturing. Primary optics for telescopes with smaller apertures don't suffer from these disadvantages, but their resolving power is smaller. Fine details are blurred. The trade-off between aperture size and expense puts limits on the telescope resolution achievable in applications like navigation by landmark or stars (without GPS), surveillance/reconnaissance (terrestrial, aerial and space based), defense against orbital and suborbital weapons, targeting/tracking systems, formation keeping and obstacle avoidance.

Holographic mode filter for super-resolution imaging


A microwave baking furnace is provided including a metallic cavity irradiated with microwaves; a baking chamber provided in the cavity and surrounded by a heat insulating member having a low microwave absorption characteristic and a high heat insulating property, which is disposed in the cavity; and a microwave generator. Substances having a high microwave loss are arranged in weak microwave electric field areas in the baking chamber at a distance, which exceeds ¼λ of a wavelength λ of microwaves to be used, from the metallic cavity. The microwave baking furnace can efficiently implement a temperature rise in a low temperature range and a temperature rise in a high temperature range only by microwave heating, can effectively prevent the occurrence of a temperature gradient in an object to be baked during a baking process, and is stable in supply of microwaves and is simply structured.

1. Field of the Invention
The present invention relates to a microwave baking furnace that bakes an object to be baked which is made of pottery materials, fine ceramics materials, etc. to produce a baked object.
2. Description of the Related Art
Recently, a technique that bakes pottery materials or fine ceramics by microwave heating has been suggested, and has already been put to practical use.
There are various types of microwave baking furnaces for microwave baking of ceramics, for example, a type in which an object to be baked such as ceramics self-heats by microwaves to bake itself and a type in which a heating material that generates heat by microwaves is disposed near an object to be baked and the object to be baked is baked by heat generated by the heating material. Japanese Patent Laid-Open No. 6-345541 (Pages 2 and 3, FIG. 1 discloses the former type of baking furnace.
As the latter type of microwave baking furnace, a baking furnace whose inner peripheral walls are made of a heating material that self-heats by microwaves is suggested (see Japanese Patent Laid-Open No. 2-275777 (Page 3, FIG. 1)). This baking furnace includes a cylindrical container made of a microwave-transmittable heat insulating member are received within a microwave oven and a cylindrical element made of a baked silicon carbide material and disposed in the container. In this baking furnace, using the inside of the cylindrical element as a baking portion, an object to be baked is put into the baking portion, and microwaves are radiated to the baked silicon carbide material, which causes it to generate heat to bake the object to be baked.
As a baking furnace employing both types together, a baking furnace is suggested (see Japanese Patent Laid-Open No. 7-318262 (Page 3, FIG. 1)) which includes a heating container composed mainly of a substance having a high microwave loss; a heat insulating member covering the outside of the heating container and composed mainly of a substance having a low microwave loss; an opening formed in the heating container; and a microwave radiating device that radiates microwaves into the heating container via the heat insulating member and to an object to be baked in the heating container via the opening in the heating container. In this baking furnace, the temperature distribution in the thickness direction can be made flatter.
When a homogenous object is baked by microwave heating, theoretically, every part of the object to be baked is heated uniformly by microwaves. However, during baking process, since the atmospheric temperature of the microwave baking furnace is much lower than the surface temperature of the object to be baked, the object to be baked radiates heat from its surfaces. Consequently, a temperature gradient is caused between the central portion and the surfaces of the object to be baked, which is likely to induce cracks in the object to be baked.
Moreover, as a characteristic of microwave heating, if an object to be baked is made of the same material, a portion of the object having a higher temperature has a larger dielectric loss. Therefore, once a temperature gradient is caused, the microwave absorption rate of a portion having a higher temperature increases, and thus microwave absorption rates vary considerably from portion to portion, which causes local heating of the object. In this way, once a temperature gradient is caused, temperatures vary considerably from portion to portion by microwave heating, which promotes cracks in the object to be baked.
Further, when alumina, silica, etc., a main material of ceramics having a low dielectric loss at room temperature, is used as a raw material of an object to be baked during baking by microwave heating, there is a problem in that the energy effect of microwave heating in a low temperature range is low.
Thus, as a microwave baking furnace which can suppress the occurrence of a temperature gradient to reduce the occurrence of crack, as shown in FIG. 7, a microwave baking furnace having a heater 18 disposed therein to control the temperature of the microwave baking furnace is suggested (see Japanese Patent Laid-Open No. 6-345541)).
Moreover, a baking furnace, as shown in FIG. 8, including a baking chamber 26 partitioned to surround a whole object 20 to be baked with a blanket 19 that can self-heat by microwaves and microwave generating means 22 that radiate microwaves to the object to be baked disposed in the baking chamber 26, is suggested (see Japanese Patent Laid-Open No. 2002-130960 (Page 3, FIG. 1)). In such a baking furnace, heating value per unit volume by microwaves of the blanket is larger than that of the object to be baked, and the inner surface temperature of the blanket is substantially equal to that of the object to be baked.
This furnace is considered to be devised from an idea that, when an object is baked by microwaves, the object to be baked can be almost completely insulted from heat by completely surrounding the object to be baked with the blanket having microwave absorption characteristics equivalent to those of the object to be baked. In this case, the occurrence of heat gradient in the object can be prevented by radiation cooling, and the object can be baked more uniformly. However, when the object to be baked is baked while being surrounded by the blanket, microwave energy is absorbed by the blanket as well as the object to be baked. Therefore, there is a problem in that the amount of energy required for baking is considerably increased.
When the thickness of the blanket is made small to decrease the amount of energy consumed by the blanket, the blanket loses more thermal energy than that it obtains by microwaves. Therefore, a large temperature difference is caused between the inner surfaces of the blanket and the object to be baked. In order to solve the problem, it is sought not only to decrease the amount of energy required for baking the object to be baked but also to prevent the occurrence of a temperature gradient due to radiation cooling in the object to be baked.
In this furnace, the problem has been solved by making heating value per unit volume by microwave of the blanket larger than that of the object to be baked, and by making the temperature of the inner surfaces of the blanket equal to the surface temperature of the object to be baked.
In the microwave baking furnace additionally including a heater 18 that can implement a heat treatment independently, such as the microwave baking furnace disclosed in Japanese Patent Laid-Open No. 6-345541 (Pages 2 and 3, FIG. 1), since the heater 18 supplementarily heats the object in a low temperature range in which the energy effect of microwave heating is low, an object having a low dielectric loss at room temperature can be baked, and the energy efficiency for baking can be improved.
Further, as described in Japanese Patent Laid-Open No. 2002-130960 (Page 3, FIG. 1), a heat insulating property around the baking chamber can be improved, and the occurrence of a temperature gradient due to heat radiation can be prevented by covering the blanket which defines the baking chamber with another blanket having an excellent heat insulating property.
However, the microwave baking furnace described in each Patent Document has a complex structure, and thus requires high manufacturing cost. In addition, in the microwave baking furnace described in Japanese Patent Laid-Open No. 2002-130960 (Page 3, FIG. 1), although an effect of suppressing the occurrence of a temperature gradient can be obtained to some extent, the energy efficiency in a low temperature range is rarely improved.
In a microwave baking furnace having a metallic cavity radiated with microwaves and a microwave generating means, a baking chamber that receives an object to be baked provided in the cavity is surrounded by a heat insulating member having a low microwave absorption characteristic and a high heat insulating property. A microwave baking furnace shown in FIG. 6 can be considered as the microwave baking furnace which has the above structure and high efficiency.
The microwave baking furnace shown in FIG. 6 bakes pottery materials or fine ceramics by microwave heating, and includes a cavity that defines a microwave space 2; a magnetron as a microwave generating means that is connected to the cavity 3 via a waveguide 4, and that radiates microwaves to the cavity 3; a microwave stirring means 7 that stirs microwaves radiated to the cavity 3; and a blanket 19 that is disposed in the cavity 3 to surround an object 11 to be baked.
The cavity 3 is adapted to reflect microwaves to the microwave space 2 at least at the inner surfaces thereof, and to prevent microwave leakage.
The microwave stirring means 7 includes stirring blades 8 disposed in the cavity 3; a driving motor 9 disposed outside the cavity 3; and a rotation transmitting shaft 10 that transmits the rotation of the driving motor 9 to the stirring blades 8, and stirs the atmosphere in the cavity 3 with the rotation of the stirring blades 8.
The blanket 19 partitions the baking chamber 12 in which the object 11 to be baked is to be disposed, and has a double layer structure of a heat insulating member 15a and a substance 15b having a high microwave loss.
The heat insulating member 15a is made of a material that not only insulates heat but also transmits microwaves, specifically, alumina fiber, foamed alumina, etc.
As shown in FIG. 9, the heat insulating member 15a can suppress heat radiation to the outside from the baking chamber 12 or the blanket 19 better as the thickness thereof increases.
In FIG. 9, a curved line F1 represents a heat radiation characteristic in a case in which the thickness of a heat insulating member 15a is small, and a curved line F2 represents a heat radiation characteristic in a case in which the thickness of a heat insulating member 15a is increased as compared to that in the curved line F1. It is evident from the drawing that the heat insulating member 15a having an increased thickness can improve the heat insulating property better. In FIG. 9, the horizontal axis represents the temperature of the baking chamber 12, and the vertical axis represents the amount of heat radiated from the blanket 19 to the outside.
The substance 15b having a high microwave loss is made of a dielectric material that self-heats by microwaves radiated from the outside and transmits some of the radiated microwaves to the object 11 to be baked in the baking chamber 12.
In this case, it is preferable that the substance 15b having a high microwave loss be made of one of silicon carbide, silicon nitride, graphite and composites containing these as main components.
Meanwhile, when the microwave baking furnace 1 shown in FIG. 6 bakes ceramics that is the object 11 to be baked by microwaves, the substance (silicon carbide, etc.) 15b having a high microwave loss covers six surfaces or all surfaces of the baking chamber 12 uniformly.
Also, when the substance 15b having a high microwave loss covers six surfaces or all surfaces of the baking chamber 12 uniformly, there is a problem in that the substance 15b having a high microwave loss is heated locally by microwaves and the object 11 to be baked or the heat insulating member 15a is broken irrespective of the existence of the microwave stirring means 7.

Matsushita Electric Industrial Co., Ltd.


The present invention discloses a sensing component and an intelligent socket, comprising a sensing unit, a warning unit and a control unit; the sensing unit and the warning unit are connected to the control unit respectively; the sensing unit acquires the environmental data and sends the data to the control unit for processing and analysis; the control unit sends the control signal to the warning unit to execute. The intelligent socket also comprises the sensing component, a wireless communication and an indicator light unit.

In recent years, with the continuous improvement of people's living standards, large-scale household appliances with high power and energy consumption, including air conditioning, television and refrigerator, have been popularized, and the power consumption of each family or enterprise is also rising. However, the existing socket products are only for securing power supply, and do not have the function to connect or cut off the circuit of the electrical work remotely, which limit the function of the socket. Therefore, the conventional sockets neither provide more functional supports to users nor maximize the efficiency of large household appliances; they even have problems such as energy waste and potential safety issues due to overuse of the electricity.

Sensing component and intelligent socket

Xindongzhen (Suzhou) Intelligent Technology Co., Ltd.