An electrostatic chuck device includes an electrostatic chuck section (2), which has a principal surface that is a mounting surface on which a plate-like sample (W) is placed, and has an internal electrode for electrostatic adsorption (13) incorporated in the section, and a temperature adjustment base section (3) which adjusts the temperature of the electrostatic chuck section (2); wherein a part or all of a surface of the temperature adjustment base section (3) is covered by a sheet-like or film-like insulating material (4) wherein the surface faces the side where the electrostatic chuck section is located; a thin plate-like heater element (5) is bonded on the insulating material (4); and the electrostatic chuck section (2) and the temperature adjustment base section (3) are integrated with each other via an organic insulating adhesive layer (6) formed by curing a liquid adhesive.

In recent years, in a semiconductor manufacturing process, further improvement in fine processing technology has been required according to higher integration or higher performance of an element. In the semiconductor manufacturing process, etching technology is an important one among fine processing technologies. In recent years, among etching technologies, a plasma etching technology which can achieve high efficiency and enable fine processing of a large area has become mainstream.
The plasma etching technology is one of a dry etching technology. In the plasma etching technology, a mask pattern is formed by a resist on a solid material, that is an object to be processed, and in a state where the solid material is supported in a vacuum, a reactive gas is introduced into the vacuum. Then, a plasma state is made by collision between accelerated electrons and gas molecules due to a high-frequency electric field applied to the reactive gas. Radicals (free radicals) and ions, which are generated from the plasma, react with the solid material which is exposed from the mask pattern, and whereby the exposed solid material is removed as a reaction product. In this way, a fine pattern is formed in the solid material.
On the other hand, there is a plasma CVD method, as one of thin film growth technology in which source gases are combined by the action of plasma and the obtained compound is deposited on a substrate. This method is a film formation method in which plasma discharge is caused by applying a high-frequency electric field to gas which includes source molecules, then, the source molecules are decomposed by electrons accelerated by the plasma discharge, and the obtained compound is deposited. Even if it is reaction which does not occur by only thermal excitation at low temperature, since in plasma, gases in a system collide with each other and are activated, thereby being turned into radicals, reaction becomes possible.
In a semiconductor manufacturing apparatus using plasma, such as a plasma etching apparatus and a plasma CVD apparatus, in the past, an electrostatic chuck device has been used as a device to easily mount and/or fix a wafer onto a sample stage and also maintain the wafer at a desired temperature.
As such an electrostatic chuck device, for example, an electrostatic chuck is proposed which includes an electrostatic chuck section comprising an internal electrode for electrostatic adsorption, and a cooling base section which cools the electrostatic chuck section. A heater which is formed by a screen printing method and having a thickness of 0.5 mm or less is provided between the electrostatic chuck section and the cooling base section, and the heater is brought into direct contact with the electrostatic chuck section and also fixed to the cooling base section by an adhesive layer which has insulation properties and is formed of silicone resin (Patent document 1).
In addition, an electrostatic chuck device is also proposed which includes an electrostatic chuck section comprising an internal electrode for electrostatic adsorption, a temperature adjustment base section which adjusts the temperature of the electrostatic chuck section to a desired temperature, and an organic adhesive layer which integrates the electrostatic chuck section and the temperature adjustment base section by adhesion and includes a thin plate-like heater element made of nonmagnetic metal having a thickness of 200 μm or less (Patent document 2).


The invention concerns a pressure transducer comprising a deflecting membrane, said membrane comprising two piezoresistors (10, 11) of different types, said piezoresistors being arranged such that a same stress or a same strain is applied on said piezoresistors and said piezoresistors (10, 11) yield changes in resistance, wherein a piezoresistor of a first type (10) is positioned such that its current direction is perpendicular to the stress direction (trans verse) and a piezoresistor of a second type is parallel to the stress direction (longitudinal), allowing, when a tensile stress is applied to the transducer, said piezoresistor of the first type to increase its resistance and said piezoresistor of the second type to decrease the resistance; or when a compressive stress is applied to the transducer, said piezoresistor of the first type to decrease its resistance and said piezoresistor of the second type to increase the resistance; wherein said piezoresistor of the first type (10) has a specific width and a length as short as possible and said piezoresistor (11) of the second type has a width as short as possible and a length as long as possible.

SiC has three major crystal types: 3C, 4H, 6H. Since the crystal growth of SiC is technically difficult compared to that of silicon, 6H—SiC wafer was first communalized in the 1980s as a substrate for growth of GaN, which is used for blue LEDs. In the 1990s, it was demonstrated that 4H—SiC is suited for power electronic devices and the commercialization of 4H—SiC wafer has started. Today, 4H—SiC wafer is much more produced than 6H—SiC. 3C—SiC wafer is not yet commercialized.
It has been known that SiC shows piezoresistive effect. SiC has long been viewed as a potentially useful semiconductor for high temperature transducers. Several high temperature "pressure" sensors up to ˜650° C. have been reported. Most of them used 6H—SiC. It is most likely because of the SiC wafer history. The following publications mentioned 4H—SiC high temperature pressure sensors:                R. S. Okojie, D. Lukco, C. Blaha, V. Nguyen, and E. Savrun, "Zero offset drift suppression in SiC pressure sensors at 600° C.," in Proc. TREE Sensors conference 2010, pp. 2269-274, 2010.        R. S. Okojie, V. Nguyen, E. Savrun, and D. Lukco, "Improved reliability of sic pressure sensors for long term high temperature applications," in Proc. Transducers '11 Beijing China, pp. 2878, 2011.
U.S. Pat. No. 7,516,668 describes a high temperature transducer fabricated from silicon carbide. It is fabricated by first epitaxially growing a layer of highly N-doped 3C silicon carbide on a first silicon wafer or substrate. A second wafer of silicon carbide, selected to be a carrier wafer, is etched preferentially to produce the deflecting diaphragms The 3C material is patterned to provide a series of individual piezoresistors which may be interconnected to form a Wheatstone bridge.
US 2004/0173027 describes a semiconductor pressure sensor which includes a semiconductor substrate having a diaphragm for receiving pressure and a bridge circuit for detecting a distortion of the diaphragm corresponding to the pressure. The bridge circuit includes a pair of first gauge resistors disposed on the center of the diaphragm and a pair of second gauge resistors disposed on a periphery of the diaphragm
U.S. Pat. No. 5,184,515 describes a transducer having a plurality of sensing elements disposed in a single diaphragm wherein each of the sensing elements is spaced from every other of the sensing elements a predetermined distance so as to control interference among the sensing elements. Each of the sensing elements preferably comprises a plurality of piezoresistors each of which are coupled in a Wheatstone bridge configuration.
US 2008/0022779 discloses a pressure sensor comprising a membrane on which one first measurement element and one second measurement element for detecting a pressure impingement of the membrane are arranged on the membrane, both measurement elements are arranged distanced differently far from the edge of the membrane, and the output signals of the first and the second measurement element are evaluated together in a manner such that the two measurement elements detect a differential pressure acting on the membrane, and thereby compensate the influence of the system pressure acting on both sides of the membrane.
U.S. Pat. No. 5,812,047 discloses a piezo-resistive pressure sensor comprising one type of resistors consisting of two layers, a low-doped layer and a high doped connection layer, arranged in a radial (current flows in a direction in parallel with the radial stress) and tangential (current flows in a direction orthogonal to the radial stress) geometries and having the same length and width.
The prior art also includes the following publications: EP 1785711; US 2004/045359; U.S. Pat. Nos. 5,756,899; 5,549,006; 5,432,372; 5,191,798; 4,777,826; 5,165,283; JP 59217374; JP 56043771; U.S. Pat. No. 5,243,319; US 2008/011087; U.S. Pat. No. 4,476,726; US 2008/276726; U.S. Pat. No. 5,770,883; JP 2001272293; JP 2001304998; DE 3508610; DE 3425147; U.S. Pat. No. 3,646,435; EP 0527400; U.S. Pat. Nos. 5,081,437; 5,197,334; 4,628,296; JP 6213744; EP 1087219; U.S. Pat. Nos. 6,234,027; 4,672,411; EP 0053337; U.S. Pat. No. 4,141,253; JP 53022385; U.S. Pat. No. 6,718,830; US 2010/257938; US 2007/152679; US 2003/087481; U.S. Pat. Nos. 5,303,594; 4,766,655; JP 56040735; EP 1530028; EP 1003217; U.S. Pat. Nos. 5,677,493; 5,537,882; WO 90/01153; JP 2002039891; JP 2002039886; US 2004/183150; DE 19957556; US 2011/203381; US 2002/086460; U.S. Pat. Nos. 6,510,742; 4,788,521; 5,259,248.
In the development of a 4H—SiC high temperature pressure transducer, one could not find any useful information on "piezoresistive property" of 4H—SiC, which is necessary to design piezoresistors. Indeed, there were many publications on 6H—SiC, but not on 4H—SiC. Hence, the property of 4H—SiC were experimentally tested and quite interesting features were developed. Based on the findings, the idea as to how the 4H—SiC piezoresistors should be designed and configured for a pressure transducer was reached.

CSEM CENTRE SUISSE D'ELECTRONIQUE ET DE MICROTECHNIQUE SA—RECHERCHE ET DEVELOPPEMENT


Luggage with crushable, resilient portions and methods for making it are disclosed. In one embodiment, the cover of a piece of luggage is formed of a thermoplastic urethane (TPU) and has sufficient deformability so that it may be crushed and inverted into itself for storage and then resiliently returned to essentially the same shape. The luggage is preferably made by a process of vacuum forming a heated TPU sheet over a mold.

1. Field of the Invention
In general, the invention relates to luggage with crushable portions and to methods of making such luggage.
2. Description of Related Art
Travel has increasingly become a part of modern life. In today's highly interconnected world, many executives travel thousands of miles a year attending to business. Leisure travel has increased as well, and many people now consider vacations and other trips of a scope and duration that would have been unheard of in the past.
Most travelers use luggage to store and protect their possessions while traveling. Many different types of luggage are in use today, including conventional hard-sided and soft-sided suitcases, duffel bags, garment bags, and upright roller travel bags. Of the conventional types of luggage, upright roller travel bags, which are suitcases that have integrated wheels and an integrated rigid, telescoping handle, have become particularly popular because they can be wheeled easily from place to place, are stable and easily controlled while in motion, and have handles that conveniently collapse into the bag.
One problem with conventional luggage is that when it is not in use, it often takes quite a bit of space to store. Even luggage sets, which allow smaller pieces of luggage to be stored inside larger ones, still require enough space to store the largest piece. However, storage space is often at a premium, making luggage storage an inconvenient hassle.
There are a few solutions to the problem of luggage storage. For example, soft-sided pieces of luggage, such as duffel bags, are generally very collapsible and can be stored easily in a minimum of space, but they are not able to protect possessions as well as hard-sided luggage. Hybrid solutions that provide some of the strength and rigidity of hard-sided luggage while collapsing or folding for storage may offer consumers the most flexibility and the best balance of protection and storability. For example, U.S. Pat. No. 7,500,547 to Bettua et al. discloses hard-sided luggage that folds along predefined fold lines into a storage configuration.
However, while hybrid luggage that includes both rigid and flexible portions may be advantageous for the user, both in terms of the protection it offers and its storability, making such luggage can present materials and engineering challenges.

Luggage with crushable, resilient portions and methods for manufacturing it


a method for navigating a pointer on a graphical user interface (GUI) includes the steps of: scrolling an input device to locate the pointer corresponding to the input device on a point of interest within the GUI, depressing an actuating button associated with the input device on the point of interest, obtaining a detailed view of the point of interest while centering the point of interest on the GUI and maintaining a position of the pointer on the point of interest.

The present invention is directed to user interfaces and more particularly, to a method of navigation and interaction with a user interface. Such interaction and navigation involve operating an input device such as a mouse, a trackball or a three-dimensional (hereinafter "3D") pointing remote device. The operation of the input device includes at least one of point, click, scroll, etc.
User interfaces, such as graphical user interfaces (GUIs) are well known. Virtually all computers include (or, enable) a graphical user interface in order to make the interaction with the computer more "user friendly". This is accomplished by reducing, if not eliminating, the number of keystrokes a user is required to enter in order to perform a function such as launching an application residing on the computer. An increasing number of other electronic devices, from cell phones to user controls on appliances, rely on various graphical user interfaces that facilitate a user interaction with the particular device.
Traditional methods of using a GUI (on a computer for example) include the use of an input device such as a mouse or a track ball. A movement of the mouse or the track ball results in a corresponding pointer moving on the graphical user interface. The pointer can thus be navigated to an object (represented by an icon) on the GUI that corresponds to an executable task such as launching a software application for example. Once the pointer is navigated to an icon, the corresponding task can be executed by clicking (depressing) on an actuating button that is integrated within the input device. For example, if the icon on the GUI corresponds to a word processing application, clicking on the icon results in launching the word processing application. The pointer can also be used to rapidly scroll through pages of text within a word processing document for example.
The input device can be used to perform various tasks depending on the application being executed on the computer. In a map software program (generically referred to as location information program) for example, maps of a geographic area can be displayed. While displaying a map, the actuating button of the pointer can be depressed on a particular area of the map to zoom in on the selected area to provide additional detail while displaying a smaller overall geographic area. The actuating button therefore can be used to zoom in on an area of interest.
Referring to FIG. 1, a map of the United States 114 is illustrated. Center point 108 represents the center of bounding box 102 (which could also represent the user interface) that includes map 114. User interface 102 can represent a window corresponding to the map software program similar to a window that represents a work area of a document in a word processing program for example. The user can then request a more detailed view of a point of interest 105 on the map (such as New York City) by moving the pointer 104 to point of interest 105 and depressing the actuating button. The points of interest displayed on a graphical user interface may be thought of as objects.
The zooming in on the point of interest (i.e. New York in this example) results in map 314 of FIG. 3A being included within user interface 102. As illustrated, New York (point of interest 105) is now displayed in the center of user interface 102. Center point 108, still representing center of the user interface 102 (but no longer representing center of map 114), now coincides with point of interest 105. The point of interest 105 and center point 108 represent the same location on map 314.
Pointer 104, previously pointing to the point of interest 105 (in FIG. 1), however remains at the same physical location within the user interface 102 but no longer points to the point of interest 105 (in FIG. 3A). That is, the relative distance of pointer 104 with respect to the side and top of user interface 102 in FIG. 3A is identical to the relative distance of pointer 104 with respect to the side and top of user interface 102 in FIG. 1.
If a user now wishes to zoom in further on New York, the user has to move the mouse until pointer 104 points to the point of interest 105 (or, center point 108) prior to depressing the actuating button. The pointer location does not coincide with or, is not synchronized to, the point of interest when zooming occurs according to current implementations. If a user wishes to zoom in a few times (to a number of zooming levels), a cumulative delay factor is introduced into the process as the pointer has to be located and moved to the point of interest for each desired zooming level. The cumulative delay factor is a sum of delays each of which is associated with having to re-centering the pointer after each zooming function.
Some embodiments provide a synchronization (or, coordination) between the zooming function and the pointer location on a user interface.


This invention provides a method of converting a stem cell into a ventral neuron which comprises introducing into the stem cell a nucleic acid which expresses homeodomain transcription factor Nkx6.1 protein in the stem cell so as to thereby convert the stem cell into the ventral neuron. Provided are methods of diagnosing a motor neuron degenerative disease in a subject. Also provides is a method of treating neuronal degeneration in a subject which comprises implanting in diseased neural tissue of the subject a neural stem cell which comprises an isolated nucleic acid molecule which is capable of expressing homeodomain Nkx6.1 protein under conditions such that the stem cell is converted into a motor neuron after implantation, thereby treating neuronal degeneration in the subject.

During the development of the embryonic central nervous system (CNS) the mechanisms that specify regional identity and neuronal fate are intimately linked (Anderson et al. 1997; Lumsden and Krumlauf 1996; Rubenstein et al. 1998). In the ventral half of the CNS, for example, the secreted factor Sonic hedgehog (Shh) has a fundamental role in controlling both regional pattern and neuronal fate (Tanabe and Jessell 1996; Ericson et al. 19976; Hammerschmidth et al. 1997). Shh appears to function as a gradient signal. In the spinal cord, five distinct classes of neurons can be generated in vitro in response to two- to threefold changes in the concentration of Shh, and the position at which each neuronal class is generated in vivo is predicted by the concentration required for their induction in vivo (Ericson et al. 1997a; Briscoe et al. 2000). Thus, neurons generated in more ventral regions of the neural tube require progressively higher concentrations of Shh for their induction.
The genetic programs activated in neural progenitor cells in response to Shh signaling, however, remain incompletely defined. Emerging evidence suggests that homeobox genes function as critical intermediaries in the neural response to Shh signals (Lumsden and Krumlauf 1996; Tanabe and Jessell 1996; Ericson et al. 1997; Hammerschmidt et al. 1997; Rubenstein et al. 1998). Several homeobox genes are expressed by ventral progenitor cells, and their expression is regulated by Shh. Gain-of-function studies on homeobox gene action in the chick neural tube have provided evidence that homeodomain proteins are critical for the interpretation of graded Shh signaling and that they function to delineate progenitor domains and control neuronal subtype identity (Briscoe et al. 2000). Consistent with these findings, the pattern of generation of neuronal subtypes in the basal telencephalon and in the ventral-most region of the spinal cord is perturbed in mice carrying mutations in certain Shh-regulated homeobox genes (Ericson et al. 1997; Sussel et al. 1999; Pierani et al., unpublished).
Members of the Nkx class of homeobox genes are expressed by progenitor cells along the entire rostro-caudal axis of the ventral neural tube, and their expression is dependent on Shh signaling (Rubenstein and Beachy 1998). Mutation in the Nkx2.1 or Nkx2.2 genes leads to defects in ventral neural pattering (Briscoe et al. 1999; Sussel et al. 1999), raising the possibility that Nkx genes play a key role in the control of ventral pattering in the ventral region of the CNS. Genetic studies to assess the role of Nkx genes have, however, focused on only the most ventral region of the neural tube. A recently identified Nkx gene, Nkx6.1, is expressed more widely by most progenitor cells within the ventral neural tube (Pabst et al. 1998; Qiu et al. 1998; Briscoe et al. 1999), suggesting that it may have a prominent role in ventral neural patterning. Here experiments show that in mouse embryos Nkx6.1 is expressed by ventral progenitors that give rise to motor (MN), V2, and V3 neurons. Mice carrying a null mutation of Nkx6.1 exhibit a ventral-to-dorsal switch in the identity of progenitor cells and a corresponding switch in the identity of the neuronal subtype that emerges from the ventral neural tube. The generation of MN and V2 neurons is markedly reduced, and there is a ventral expansion in the generation of a more dorsal V1 neuronal subtype. Together, these findings indicate that Nkx6.1 has a critical role in the specification of MN and V2 neuron subtype identity and, more generally, that Nkx genes play a role in the interpretation of graded Shh signaling.

Genetic demonstration of requirement for NKX6.1 and NKX2.2 in ventral neuron generation

Trustees of Columbia University in the City of New York

The Regents of the University of California


According to an aspect of the invention, there is provided an amplification-type solid-state image sensing device which uses a semiconductor substrate formed by epitaxially depositing an n-type semiconductor layer on a p-type semiconductor substrate and has a photoelectric conversion unit formed in the n-type semiconductor layer including a first p-type semiconductor layer which is formed under the photoelectric conversion unit of at least one of a G pixel portion and a B pixel portion a second p-type semiconductor layer which is formed to surround the photoelectric conversion unit together with the first p-type semiconductor layer and has a depth up to the first p-type semiconductor layer and a third p-type semiconductor layer which is formed to surround an R pixel portion and has a depth up to the p-type semiconductor substrate.

1. Field of the Invention
The present invention relates to an amplification-type solid-state image sensing device.
2. Description of the Related Art
Recently, amplification-type CMOS solid-state image sensing devices (CMOS image sensors) have become commercially available. The characteristic features of a CMOS image sensor are a single power supply, low-voltage driving (3 V), and low power consumption (about 50 mW). The CMOS image sensor includes photoelectric conversion elements and transistors arrayed on a single substrate and is also increasing the number of pixels and reducing the size, like a CCD. In the CMOS image sensor, signal charges generated by a photoelectric conversion element modulate the potential of a signal charge storage unit, and the potential modulates an amplification transistor in a pixel, thereby imparting an amplification function to the pixel.
A conventional CMOS image sensor uses a P/P+ substrate in which a 5- to 10-μm-thick epitaxial layer of a P-type semiconductor layer containing B at a low concentration (e.g., 1×1015 cm−3) is formed on a base substrate (e.g., 1 to 3×1018 cm−3) (on the substrate surface side).
FIG. 6 is a sectional view near a photodiode (photoelectric conversion unit) portion of a CMOS image sensor formed by using a P/P+ substrate. The CMOS image sensor uses a P/P+ substrate because it can, e.g., shorten the lifetime of carriers (electrons) generated at a deep part of the substrate (in a region with a high B concentration). More specifically, even when strong light irradiates a photodiode 3 and generates carriers which are diffused to the deep part of the substrate, the electrons recombine in the region where the lifetime of carriers is short. Hence, the electrons are suppressed from leaking into the photodiode 3 adjacent to that irradiated with light through the deep part of the substrate. This suppresses blooming from the viewpoint of the characteristic of the device. A dark current from the deep part of the substrate can also be reduced. On the other hand, for example, a CCD conventionally uses an N substrate.
FIG. 7 is a sectional view near a photodiode portion of a CCD image sensing device formed by using an N substrate 10. B (boron) ions are implanted into the entire surface of the N substrate at, e.g., an acceleration voltage of 2.7 MV and a dose of 5E11 cm2 without using a mask, thereby forming a flat p-well 8. The flat p-well 8 of a p-type semiconductor layer is formed at a depth of about 3 to 4 μm from the substrate surface. The photodiode 3 that executes photoelectric conversion is formed on the substrate surface side (about 1 μm). In addition, p-type semiconductor regions (barrier wells) 7 of B are generally formed between the adjacent photodiodes 3 to electrically isolate them from each other.
As described above, the conventional CCD image sensing device uses an N substrate. The flat p-well 8 and barrier wells 7 are formed under and near the photodiode 3. The device structure of the CCD image sensing device is designed (the concentration of the flat p-well 8 is adjusted) to move electrons to the substrate if strong light irradiates the photodiode 3, and generated electrons overflow from the photodiode 3. That is, since the structure of the N substrate allows to discard some of electrons generated upon irradiation of extremely strong light (e.g., sunlight), blooming can be suppressed.
However, the sensitivity of the N substrate is lower than that of the P/P+ substrate because all electrons generated at a deep part of the substrate, e.g., electrons generated at a deeper position than the flat p-well 8 are discarded to the substrate. This especially results in a decrease in red sensitivity for long-wavelength light (red light) with a small absorption coefficient with respect to an Si substrate.
As described above, in a solid-state image sensing device using an N substrate, carriers (electrons) overflowed from the photodiode 3 can be discarded to the substrate. It is therefore easy to suppress blooming or color crosstalk. However, the N substrate is disadvantageous in size reduction of the element because the sensitivity is lower than that of a P/P+ substrate. To solve the problem of low sensitivity, the CCD applies a high voltage (e.g., 5 V) to the photodiode to widen its depletion layer, thereby efficiently collecting carriers to the photodiode.
However, in an amplification-type solid-state image sensing device (CMOS image sensor) characterized in low-voltage driving, unlike a CCD, it is impossible to make the depletion layer of the photodiode so wide as that of the CCD, and the sensitivity is hard to improve. The technical problem of the CMOS image sensor is how to form a well structure to efficiently collect carriers to the photodiode.
To solve this problem, use of an N/P+ substrate has been proposed. An N/P+ substrate is formed by using the same P+ substrate as the base substrate of the conventional P/P+ substrate and epitaxially depositing an n-type semiconductor layer on it. Using the N/P+ substrate, P (phosphorus) ions are implanted into the N epitaxial layer by an accelerator to form a photodiode (n-type semiconductor layer). In this case, the depletion layer of the photodiode widens as compared to the P/P+ substrate. The region where the photodiode collects electrons can spread to the deep part side of the substrate so that the sensitivity can improve.
However, the structure with a solid-state image sensing device formed on a conventional P/P+ substrate and the structure with a solid-state image sensing device formed on an N/P+ substrate pose several technical problems. One problem is electrical isolation of the photodiodes. In the conventional P/P+ substrate, the photodiodes (n-type semiconductor layers) 3 are formed in the p-type epitaxial layer, as shown in FIG. 6. Hence, the p-type semiconductor layer of a p-type epitaxial layer 9 isolates the adjacent photodiodes 3. In the N/P+ substrate, however, since the photodiodes are formed in the n-type epitaxial layer, the photodiodes electrically connect to each other.
Additionally, the N/P+ substrate cannot discard excess signal charges generated when, e.g., strong light irradiates the photoelectric conversion element, like a structure with a CMOS image sensor formed on a conventional P/P+ substrate. Hence, even the N/P+ substrate has the problems of blooming and color crosstalk, like the conventional P/P+ substrate.
The above-described problem that a CMOS image sensor using an N/P+ substrate or P/P+ substrate cannot discard excess signal charges is posed because there is no place to discard the excess signal charges, although the structure of a CCD using an N substrate allows to discard excess signal charges to the substrate.
A technique disclosed in Jpn. Pat. Appln. KOKAI Publication No. 2006-5265 uses a P+/N/P substrate and forms an element isolation region adjacent to a photoelectric conversion element to suppress blooming.
Jpn. Pat. Appln. KOKAI Publication No. 2002-198507 discloses a technique of surrounding the side and lower surfaces of a sensor unit of a CCD solid-state image sensing device by a P-WELL to prevent color crosstalk.

Amplification-type solid-state image sensing device


A bracket for mounting a printed circuit card into the frame of a personal computer or work station is provided with supporting and locating arms which are attached to the printed circuit card and a plurality of grounding contacts disposed along the walls of a channel-shaped bracket to engage a mating surface within the computer frame. The grounding contacts are supplemented both with a spring finger which is deformed upon assembly of the bracket with the computer frame and also with projecting legs which define a gap through which a fastener may be inserted and tightened in order to rigidly attach the bracket to the computer frame. The bracket is provided with an opening or aperture to permit access therethrough for interface plugs necessary to interface the printed circuit card electrical outputs with other devices which need to be connected to the computer such as telephone lines, printer cables, and networking connections.

Many computer manufacturers are or will be using a printed circuit card or board which is attached to a larger printed circuit card or board and which in turn is connected to the electronics, particularly a buss or a Micro Channel, of the computer. The printed circuit card which has been added or piggy-backed is called a common mezzanine card. The common mezzanine card allows one or more functions such as a printer control, fax or network operation to be provided by the combined printed circuit card assembly without changing the electronic design of the host card to which the mezzanine card is attached. The mezzanine circuit card attached both physically and electrically to the host card permits, among other things, the external interfacing of the function provided. For example, if a function is that of printer control, the interface must accept a printer cable connector; while if the function is facsimile, of necessity, the interface must accept a standard telephone jack connector.
The Institute of Electrical and Electronic Engineers (IEEE) is an organization which establishes and administers some standards in the computer industry. A Draft Standard for a Common Mezzanine Card Family: CMC, P1386/Draft 2.0, Apr. 4, 1995, has been prepared by IEEE which will standardize the dimensional parameters and shape of a common mezzanine card bezel. However, the IEEE proposed standard is ambiguous as to the technique for mounting or attaching the mezzanine card bezel to the interface port or slot, also known as the expansion slot, within the frame of the computer or work station.
Several requirements must be satisfied in the attachment or mounting of the mezzanine card to the computer frame or work station frame. One such requirement is that the interface must be exposed so that the appropriate cables and connectors may be attached to the common mezzanine card at the interface.
A second requirement for the attachment or mounting of the mezzanine card is that electromagnetic radiation (EMR) generated within the computer frame must be suppressed, contained and prevented from escaping from the computer or work station unit and causing electromagnetic interference (EMI) either to the host device or to other electronic devices in the immediate area.
A third requirement for the attachment or mounting of the mezzanine card is that the interface structure of the mezzanine card be rigid and fixed relative to both the mezzanine card and the computer/work station frame to permit plugging and unplugging of cables without disturbing the position or the connection of the mezzanine card relative to other electronic circuits within the computer or work station.
Expansion cards previously have been provided with mounting brackets that are specifically designed to include the appropriate interface connector and thus not be universal. Additionally, present expansion cards require mounting brackets that are unique to a particular expansion card. Further, the expansion card brackets have relied only on a single screw to insure a grounding contact with the grounding circuit of the computer frame. Both of these design aspects provide less than desirable approaches in high performance computers because the bracket must be designed separately for each input/output interface requirement and the electromagnetic interference shielding is less than optimum in effectiveness for high speed computer operations.

Electronic circuit board interface mounting bracket


A dental instrument, suitable for use when creating a dental filling, is provided. The dental instrument includes a wedge and a matrix. The matrix is fixedly attached to the wedge, and the wedge is adapted to be inserted into the approximal space between two teeth of a patient. The wedge has a bow shape along a length axis of the wedge, the matrix has a first bow shape along a length axis of the matrix, and the matrix also has a second bow shape along an axis perpendicular to the length axis of the matrix. A method of using the dental instrument and a disposable system, which further comprises a protective member, is further provided.

Dental caries, also described as "tooth decay" or "dental cavities", is an infectious disease which damages the structures of the teeth. Dental caries can lead to pain and tooth infection. Dental caries often starts on the surfaces between adjacent teeth, also known as the approximal space. Proximal caries is one of the most common forms of caries.
The most common treatment of dental caries comprises the steps of excavating the tooth for removing the decayed part, this is usually done with a dental drill, whereafter a curing filling material is placed in the cavity to restore the function, integrity and morphology of the missing tooth structure.
When restoring a tooth it is of importance that the tooth returns to its original position in contact with the adjacent tooth and that the filling does not create what is called an overhang in the approximal space. An overhang is created if the dentist fails to seal off the preparation box, thus enabling the filling material to flow into the approximal space. The excess material creates an edge underneath the filling in which food remains can be trapped which usually leads to new dental caries or gingivitis.
Dental instruments have been used to close off a hole or trench made for the purpose of receiving a filling in a tooth. It is common knowledge that dentists use a shim or matrix, usually made of a metal or plastic material, to limit the flow of filling material to adjacent teeth and the approximal space. A second object when making a filling is to separate the teeth by placing a small tension on the teeth by means of a wedge. The placing of a small tension on the teeth allows the teeth to return to the original position, in which the teeth are in direct contact with each other, after the filling is completed.
Placing of a matrix band and achieving a good contact point after excavation for fillings is often a time consuming and pain staking procedure. Matrices of the past have generally had flat barriers that are held against the tooth and gums by small wooden or plastic wedges. The small loose wedges are difficult to handle and causes discomfort and pain. Furthermore, since the matrices of the past tend to be relatively inflexible and not anatomically shaped, they do not adequately seal against the tooth. The sharp metal matrix, when placed in direct contact with the gums, also creates cuts and discomfort. Thus, the wedge and matrix combinations of the past lack the ability to provide an adequate seal with the tooth, avoiding damage to the gums and providing a comfortable treatment for the patient.
Alternatives such as sectional matrixes in combination with retention are also very cumbersome and time consuming to place correctly. The tension created on the teeth from the tightening of the metal matrix as well as the sharp metal matrix being placed in direct contact with the gums of the patient creates pain and increases the risk of causing gingivitis during a dental procedure.


A sheet output apparatus includes a sheet set generating unit, an information obtaining unit, a decision unit, an output unit, and a control unit. The sheet set generating unit generates a set of sheets by stapling plural sheets. The information obtaining unit obtains image forming information with respect to each of the plural sheets constituting the set of sheets. The decision unit decides whether a pair of sheets including two sheets in which the images formed on the sheets face each other exists or not in the plural sheets. The output unit comes into contact with at least one of the uppermost sheet and the lowermost sheet in the set of sheets to apply a force to the sheet, and outputs the set of sheets in the output direction. The control unit controls the output unit to output the set of sheets.

1. Field of the Invention
The present invention relates to a sheet output apparatus which binds plural sheets of paper to generate a set of sheets and outputs the generated set of sheets.
2. Description of the Related Art
Generally, an example of relatively frequent office work includes production of a booklet which is performed by binding plural sheets in which the images are formed with an image forming apparatus such as a printer and a copying machine. Conventionally, in many cases, the sheet output apparatus is used as the apparatus which easily performs the binding work. The sheet output apparatus has a mechanism (hereinafter referred to as stapler) which binds the plural sheets by a binding needle (hereinafter referred to as staple) to generate the set of sheets, and the sheet output apparatus outputs the set of sheets generated with the stapler.
Some sheet output apparatuses have a first tray on which the plural sheets are temporarily loaded until the plural sheets are stapled and a second tray in which the stapled set of the plural sheets is finally stored. The generated set of sheets is nipped between a pair of rollers opposite to each other to be output from the first tray toward the second tray. In such sheet output apparatuses, when a size of the sheet or the number of sheets is large, there is a possibility that so-called stack failure is generated in which positions of the output set of sheets are varied on the second tray. Therefore, a technique in which, when the size of the sheet or the number of sheets is large, the set of sheets is output at low speed from the first tray toward the second tray is proposed in order to prevent the stack failure from occurring (for example, see Japanese Patent Application Publication No. 8-5585, pages 2 to 4 and FIG. 5).
Some image forming apparatuses have a function of forming the images on both sides of the sheet. However, when the set of sheets is generated by stapling the plural both-sides sheets in which the images are formed on both sides by the image forming apparatus with stapler to output the set of sheets, there is often generated the problem that the uppermost sheet and the lowermost sheet which are in contact with the pair of rollers for nipping the set of sheets are output while slipped from the set of sheets and the stapled portion is broken. As with the case of the stack failure, the problem can be prevented by outputting the set of sheets at low speed. However, in order to sufficiently prevent the generation of the problem, it is necessary to output the set of sheets at too slow speed, which generates another problem that productivity is remarkably decreased.


A trailer train apparatus is disclosed that is comprised of a plurality of trailers connected end-to-end. At least some of the trailers are wheeled trailers with steerable wheels. The train includes opposing end trailers that each have tongues that enable the train to be towed from either end. Links join the steerable axle supports (or wheel supports) of some chassis with other chassis so that when an end chassis is steered with its tongue, the other chassis are also steered.

1. Field of the Invention
The apparatus of the present invention relates to trailers and to trains of a plurality of trailers and more particularly to an improved trailer train arrangement that enables the train to be towed from either end. Even more particularly the present invention relates to a trailer train apparatus wherein each trailer of the train has a chassis, some having front and rear steerable axles and wherein intermediate chassis can be wheelless (or have only one pair of wheels), being pivotally attached to the upper deck of wheeled chassis on opposing ends of the wheelless chassis.
2. General Background of the Invention
Trains that include a plurality of connected trailers towed by a single tractor or like powered vehicle are commonly used in factories, manufacturing plants, warehouses, and other industrial facilities for transporting loads or load modules from one location to another.
At times, the trailer trains must operate in a confined space, wherein sharp turns are required. In some situations, the trailer train must execute a u-turn requiring valuable factory or warehouse floor space to accommodate the necessary turning radius.
Various trailer train arrangements have been patented. The following table lists patents that disclose trailer trains and related art.
TABLEPATENT NO.TITLE1,283,591Toy Train and Method of Making the Same1,416,613Train of Vehicles3,185,108Pedestrian Carrier3,288,491Articulated Cargo Vehicle2,190,058Modified Articulated Vehicle3,637,236Coupling Device of Trailers6,193,257Steering System for a Multiple Vehicle Train
The prior art trailer train devices suffer in that they can be towed in one direction only.


The present application relates to a hand-held steamer head. The steamer head (21) comprises a handle (3) and a soleplate (2) through which steam is ejected onto a surface being steamed. The soleplate is flexibly coupled to the handle or the soleplate is pivotally coupled to the handle and is biased in a direction away from the handle by a biasing member.

Garment steamers are known for steaming garments to remove creases from a fabric material of a garment through the use of heat and moisture. Such a garment steamer generally comprises a steam generating unit and a steamer head connected to the steam generating unit by a flexible hose through which steam is conveyed to the steamer head. The steamer head is provided with one or more steam holes to discharge steam onto the fabric being treated. Typically, the garment is hung on a hanger during treatment by the steamer and the user positions the steamer head over the garment to remove creases. Such a steamer head is disclosed in WO 2012/066473 and comprises a soleplate and a handle. The user grips the handle to position the soleplate over the section of fabric to be treated.


An interrogator is disposed in a main body of a vehicle for transmitting interrogating signals. A responder is mounted to each tire of the vehicle for returning tire information such as air pressure to the interrogator in response to the interrogating signals. The responder is provided with at least one sensor for detecting tire information and a sensor specifying means for specifying properties of the sensor. The interrogator is provided with a control means for processing tire information, and correction tables for correcting properties of a sensor specified by the sensor specifying means. The control means corrects the tire information by the correction tables and then outputs data related to the tire information.

1. Field of the Invention
The present invention relates to a detecting device for detecting tire information such as air pressure or temperature of tires.
2. Description of the Related Art
A conventional tire information detecting device will now be described with reference to FIG. 7. In FIG. 7, a transmitting unit 10 is mounted to each tire of a vehicle to detects the air pressure of a tire and then transmit it as a tire air pressure signal. One receiving units 31 is disposed between front wheels A1 and A2 and another receiving unit 31 is disposed between rear wheels B1 and B2. Each of the receiving unit has a built-in receiving antenna for receiving a signal from the transmitting unit 10. A control unit 4 such as a microcomputer determines whether or not a tire air pressure value output from the transmitting unit 10 is within a normal range. A display unit 5 such as an LCD displays the information determined by the control unit 4.
A sensor for detecting tire air pressure is disposed in the transmitting unit 10. A detected air pressure is converted into a tire air pressure signal, and then a high frequency signal modulated by the air pressure signal is transmitted from the transmitting unit 10. The receiving unit 31 outputs the high frequency signal after demodulating the high frequency signal. The demodulated high frequency signal are read, and displayed as an air pressure value on the display unit 5 (see Japanese Unexamined Patent Application Publication No. 2003-002020 (FIG. 1)).
Here, if each sensor has a variation in its output property of air pressure, a correct air pressure value cannot be displayed. Further, the arrangement of four sensors having uniform output properties increases the cost.

Tire information detecting device capable of detecting correct tire information


Emulsions, useful for imparting water resistance to gypsum products are disclosed. The emulsions of the invention include at least one wax, an alkyl phenol and a hydrophyllic metallic salt, preferably magnesium sulfate. The emulsions of the invention do not require the addition of a starch compound and therefore exhibit enhanced stability even at higher solids content then compared to prior art emulsions.

Certain properties of gypsum (calcium sulfate dihydrate) make it very popular for use in making industrial and building products; especially gypsum board. It is a plentiful and generally inexpensive raw material which, through a process of dehydration and rehydration, can be cast, molded or otherwise formed to useful shapes. The base material from which gypsum board is manufactured is the hemihydrate form of calcium sulfate (gypsum), commonly termed stucco, which is produced by the heat conversion of the dihydrate from which the water phase has been removed.
In the making of gypsum board, the gypsum slurry must flow onto a paper substrate. In a continuous process, the slurry/substrate combination is then sized by passing this combination between rollers. Simultaneous with this sizing step, a paper backing is positioned over the sized gypsum slurry. Accordingly, the gypsum slurry must possess sufficient fluidity so that a properly sized gypsum board can be made. Fluidity refers to the ability of the gypsum slurry to flow.
It is also important to the manufacture of gypsum board, that the gypsum slurry be capable of being foamed to a limited extent. Foamability refers to this ability to be foamed. When the gypsum slurry and paper substrate are passed through the sizing rollers, a certain amount of the gypsum slurry must back flow and accumulate in the rollers nip so that a steady flow of gypsum is delivered to the sizing rollers. Foamability is important to this ability of the gypsum slurry to back flow at the rollers nip. Forming plates maybe used, eliminating the use of a master roll, but foaming is important to control the density of the finished product.
Because of the continuous nature of a gypsum board manufacturing process wherein the gypsum slurry flows onto a substrate which then passes through sizing rollers, the extent to which the gypsum slurry flows after it is sized is critical to maintaining the finished product dimensions of the gypsum board. The time at which the gypsum slurry ceases its flow is referred to as the pre-set time. Therefore, pre-set time is an important property of the gypsum slurry. The set time of the gypsum slurry is also an important property. The set time refers to the amount of time it takes the gypsum slurry to be dried, under heat, to the finished, solid gypsum board. As is well known in the art, in a continuous gypsum board manufacturing process, it is important that the gypsum slurry possess a consistent set time.
Gypsum board absorbs water, which reduces the strength of the wallboard. Prior art products, like ordinary gypsum board, gypsum tile, gypsum block, gypsum casts, and the like have relatively little resistance to water. When ordinary gypsum board, for example, is immersed in water, the board quickly absorbs a considerable amount of water, and loses a great deal of its strength. Actual tests have demonstrated that when a 2 inch by 4 inch cylinder of gypsum board core material was immersed in water at about 70° F. (21.1° C.), the cylinder showed a water absorption of 36% after immersion for 40 minutes.
Previous attempts to provide water-resistant properties to gypsum board include incorporation of asphalt, metallic soaps, resins, and wax additives into a aqueous gypsum slurry. The resulting materials were difficult to use and the core properties difficult to control. Polysiloxane-based systems have also been used in attempts to impart water-resistance to gypsum board. However, the polysiloxane-based systems are both expensive and difficult to use. A finished gypsum product has also been coated with water resistant films or coatings. One specific example of a past attempt to provide a water-resistant gypsum product is the spraying of a molten paraffin, wax or asphalt into an aqueous gypsum slurry.
Another example of a prior art attempt to provide a water resistant gypsum product is the addition of an emulsion of wax, such as paraffin wax, and asphalt, in the relative proportions of from about 1 part to about 10 parts of asphalt per part of wax to the aqueous gypsum slurry. Since the asphalt is a relatively poor solvent for paraffin wax and similar wax at ordinary temperatures, the solution formed at high temperatures tends on cooling to deposit microscopic wax crystals on the asphalt-wax surface.
Polyvinyl alcohol has been used in an attempt to provide a room temperature system for use in adding water resistant properties to gypsum. However, the polyvinyl alcohol system tends to rapidly separate and thus typically requires continuous mixing prior to use. The inherent instability of the polyvinyl alcohol systems tends to produce stratification of the compounds in the formulation. Therefore, the polyvinyl alcohol systems tend to be compositionally inconsistent. In addition, because of destabilization into different phases, there is also the potential for bacterial growth.
Accordingly, there is a need for an additive which is useful in imparting water-resistance to gypsum products, and which is economical to apply. There is a need for a water-resistance additive which does not require the use of costly components and without affecting fluidity, foamability, pre-set time or set time.


A toggle type parking brake lever apparatus capable of surely holding a brake lever at a brake application position is provided. Attached to the brake lever is a pivotable stopper pawl, with which a stopper surface formed on a stopper plate is adapted to be engaged in a brake application condition so as to inhibit the brake lever from being turned in a brake releasing direction. A stopper releasing rod with a push button is provided longitudinally of the brake lever to pivot the stopper pawl, thereby to disengage the stopper pawl from the stopper face. The invention is also applicable to a brake lever which is supported to a lever bracket, tiltably back and forth, and left and right, by means of a universal joint.

1. Field of the Invention
The present invention relates to a toggle type parking brake lever apparatus adapted to be used in industrial vehicles such as a forklift or the like.
2. Description of the Prior Art
FIG. 10 shows a typical conventional toggle type parking brake lever apparatus in which a brake lever 1 is journalled to a lever bracket 3 secured to a machine frame 2 at the front part of a cabin. This lever bracket 3 is formed therein with an elongated hole 4 which extends toward the pivot point of the brake lever 1, and along which a hook 5 is movably held. The hook 5 is connected with the forward ends of brake wires 6 which are in turn connected to a brake main body (not shown). A link 7 is connected between the intermediate section of the brake lever 1 and the hook 5 so as to constitute the so-called toggle mechanism in cooperation with the brake lever 1. Accordingly, when the brake lever 1 is manually turned from a brake release position (which is a forward tilted position as indicated by the dotted chain line) to a brake application position, an upright position indicated by the solid line, which slightly exceeds the dead center point D. P. of the toggle mechanism, the hook 5 is pulled toward the brake lever 1, causing the brake wires 6 to be towed and therefore applying the parking brake.
The above-mentioned parking brake apparatus provides an advantage such that a stable braking force can be ensured by manually turning the brake lever 1 to the brake application position. However, the holding of the lever in this apparatus can only rely upon a turning moment which is applied to the brake lever 1 by the reaction to the towing force of the brake wires 6 which is effected when overriding the dead center point. Accordingly, if an external force is exerted to the brake lever 1, being caused by an unexpected accident such as an erroneous manipulation by the driver or the like, so that the brake lever 1 is moved in the brake releasing direction, reversely overriding the dead center point, the brake lever 1 is automatically and continuously turned to the brake release position by the above-mentioned reaction to the towing force, resulting in release of the parking brake.

Toggle type parking brake lever apparatus

Kabushiki Kaisha Toyoda Jidoshokki Seisakusho


A method for the production of a polymer material is shown and described, which is characterized by: a) producing a mixture containing at least 1 to 75 wt.-% starch and/or starch derivative, 10 to 85 wt.-% polyester, and 0.01 to 7 wt.-% of a polymer containing an epoxy group; (b) homogenizing the mixture while supplying thermal and/or mechanical energy; (c) setting the water content of the mixture, so that the end product has a water content less than approximately 12 wt.-%, in relation to the total composition of the mixture. The polymer material produced with the method according to the invention is characterized by outstanding mechanical properties.

The invention relates to a polymer material containing starch, to a method for the production thereof and to moulded parts, films and/or fibres produced from the material.
Polymer materials based on starch, which contain starch in combination with one or more thermoplastic polymers, e.g. polyesters, are generally known. The production and properties of unplasticised polymer blends containing starch are described, for example, in the publications EP 0 596 437 B1 and EP 0 917 540 B1.
Generally, unplasticised polymer blends containing starch contain up to a proportion of at most approximately 33 wt. % based on the total composition of the polymer blend. Although a further increase in the starch proportion would be desirable for economic and ecological reasons, this is not easily possible as an increase in the starch proportion generally is accompanied by a considerable deterioration in the mechanical properties of the polymer.
An unplasticised polymer blend based on starch, which is suitable in particular for blow film extruding, flat film extruding and injection moulding completely biodegradable products, is commercially available under the registered trade name "Bioplast® GF 106/02" from Biotec GmbH & Co. KG in Emmerich (Germany).

This patent is subject to a terminal disclaimer.

Polymer material and method for the production thereof

BIOTEC BIOLOGISCHE NATURVERPACKUNGEN GMBH & CO. KG


A method forms a bipolar transistor in a semiconductor substrate of a first conductivity type. The method includes: forming on the substrate a single-crystal silicon-germanium layer; forming a heavily-doped single-crystal silicon layer of a second conductivity type; forming a silicon oxide layer; opening a window in the silicon oxide and silicon layers; forming on the walls of the window a silicon nitride spacer; removing the silicon-germanium layer from the bottom of the window; forming in the cavity resulting from the previous removal a heavily-doped single-crystal semiconductor layer of the second conductivity type; and forming in said window the emitter of the transistor.

1. Field of the Invention
The present invention generally relates to the forming in integrated form of bipolar transistors. More specifically, the present invention relates to the forming of the extrinsic base of such a transistor.
2. Description of the Related Art
FIGS. 1A to 1D illustrate, in partial simplified cross-section views, different steps of a known method for manufacturing an integrated circuit bipolar transistor.
As illustrated in FIG. 1A, a silicon oxide layer 3, a heavily-doped P-type polysilicon layer 5, and a silicon nitride layer 7 are formed on a lightly-doped N-type single-crystal silicon substrate 1.
Then, as illustrated in FIG. 1B, a window 9 is opened in nitride and polysilicon layers 7 and 5 to expose oxide layer 3. A silicon nitride spacer 11 is formed on the vertical wall of window 9.
At the next steps illustrated in FIG. 1C, oxide layer 3 is opened from the bottom of window 9 to expose substrate 1. Layer 3 is etched so that the formed recess extends from window 9 to under layer 5. A selective epitaxial growth of a heavily-doped P-type semiconductor material 13, silicon or silicon germanium, is then performed. The growth of material 13 is performed selectively on the exposed silicon portions. A central single-crystal silicon region 131 is thus formed on the upper surface of substrate 1 and a lateral polycrystalline region 132 is formed under polysilicon layer 5.
As illustrated in FIG. 1D, the method carries on with the forming of an L-shaped spacer 15 on the wall and the bottom of window 9. A heavily-doped N-type silicon layer 19 is deposited to fill window 9. Silicon layer 19 and nitride layer 7 are etched to only be left in place close to window 9. Polysilicon layer 5 is thus exposed.
The method carries on with steps not shown, especially of silicidation of silicon surfaces 5 and 19 and of forming of metallizations solid with these surfaces.
A bipolar transistor having substrate 1 as its collector, region 13 as its base, and layer 19 as its emitter has thus been formed.
A disadvantage of such a method lies in the epitaxial growth of base 13 described in relation with FIG. 1C. Indeed, region 13 comprises regions 131 and 132 of distinct crystal lattices. Polycrystalline region 132 adversely affects the nominal electric performances desired for the final transistor. Its effect is all the stronger as base region 13 is thin and as the base-emitter junction is small.
Further, the conditions of the selective growth of base 13 are relatively disadvantageous. Indeed, these conditions depend on the nature of the planar upper surface, that is, of layer 7. In the presence of silicon nitride, the selectivity of the silicon-germanium epitaxial growth requires a high-temperature epitaxy in the presence of chlorine.
Further, to optimize the electric performances of the resulting transistor, it has been shown that is was desirable for region 13 to comprise a P-type doped layer intended to form the base of the transistor encapsulated in a silicon-germanium portion (SiGe) comprising substitutional-site carbon inclusions (C). To be in substitutional site and obtain a single-crystal SiGeC lattice, the carbon must be incorporated upon epitaxy at a sufficiently low temperature. However, it has already been noted that, to be selective in the presence of nitride, the epitaxy must be performed at high temperature, on the order of 700° C. The presence of nitride layer 7 thus limits the amount of carbon that can be incorporated.

Method of manufacturing a bipolar transistor with a single-crystal base contact


Disclosed is a substrate processing apparatus including a dry processing unit and a controller. The dry processing unit includes: a chamber that accommodates the substrate; a supercritical processing liquid supply unit that supplies a supercritical processing liquid to the substrate; a heating unit that heats an inside of the chamber; and a discharge unit that discharges a fluid in the chamber from the chamber. The controller controls the supercritical processing liquid supply unit, the heating unit, and the discharge unit such that the supercritical processing liquid is supplied to the substrate before or after the substrate is accommodated in the chamber, the inside of the chamber is heated to change the supercritical processing liquid into a supercritical fluid or a subcritical fluid, and the supercritical fluid or the subcritical fluid is discharged from the chamber.

In a manufacturing process of a semiconductor device in which a laminated structure of an integrated circuit is formed on the surface of, for example, a semiconductor wafer (hereinafter referred to as a "wafer") as a substrate, a liquid processing step is provided to process the surface of the wafer using a liquid, for example, to remove fine dust or a natural oxide film on the surface of the wafer surface with a cleaning liquid such as, for example, a chemical liquid.
There has been known a supercritical processing method using a fluid in a supercritical or subcritical state (which may also be collectively referred to as a "supercritical fluid") when removing a liquid or the like attached to the surface of the wafer in the liquid processing process.
When a liquid attached to the surface of the substrate surface is changed to a supercritical fluid or a subcritical fluid, alcohol such as, for example, isopropyl alcohol (IPA) (see, e.g., Japanese Patent Laid-open Publication No. 2013-179245), or hydrofluoroether (HFE) or hydrofluorocarbon (HFC) (see, e.g., Japanese Patent Laid-Open Nos. 2011-187570 and 2014-022566) may be used as a liquid source for the supercritical fluid or the subcritical fluid.

Substrate processing apparatus, substrate processing method, and storage medium


An integrated circuit includes: a phase-shifted data signal generation circuit configured to generate a plurality of phase-shifted data signals from an input data signal based on at least one phase-shifted clock signal; a synchronization circuit configured to generate a plurality of synchronization data signals by applying the at least one phase-shifted clock signal to the plurality of phase-shifted data signals provided by the phase-shifted data signal generation circuit; and a control signal generation circuit configured to perform logic operations on the plurality of synchronization data signals to generate a phase control signal for controlling a phase of the at least one phase-shifted clock signal, and generate a frequency control signal for controlling a frequency of the at least one phase-shifted clock signal.

Example embodiments of the inventive concepts relate to an integrated circuit, and a clock and data recovery circuit, and more particularly, to an integrated circuit that detects a target frequency in a short time by simultaneously and conveniently tracking phases and frequency errors between an input data signal and a clock signal, or a clock and data recovery circuit including the integrated circuit.
Conventional clock and data recovery (CDR) technology divides input data to generate a fixed reference clock signal, and by using the fixed reference clock signal, operates a frequency lock loop to find a target frequency. Until now, frequency detection has been very difficult in conventional CDR technology, and since a phase detector only capable of detecting a phase has been used, a circuit for adjusting the frequency by using a separate reference frequency clock generator has been required. In recent years, referenceless CDR technology, which does not require the reference frequency generator, has been developed. Referenceless CDR technology adopts a stochastic method which estimates an approximate frequency by measuring the number of conversions over a long period of time after determining a probability of conversion from about 0 to about 1, or from about 1 to about 0, that has been determined in the input data. In such conventional CDR technology, an incorrect reference clock signal is determined as a final fixed frequency through a frequency lock loop in a process of dividing the frequency from input data, and since the reference clock signal is slowed down due to the characteristics of the frequency division method, there is a drawback in that much time is required until the frequency is fixed.

Integrated circuit detecting frequency and phase of clock signal and clock and data recovery circuit including the integrated circuit


A method includes a first step of forming a first exposed area including only a device region on a semiconductor wafer that is repeated as needed. Next, a second step of forming a second exposed area including a portion of the device region and a Test Element Group (TEG) region on the semiconductor wafer is performed at least once. A plurality of first exposed areas and at least one second exposed area can be arranged on the semiconductor wafer at fixed pitches in the horizontal and vertical directions, even when the number of TEG regions is limited.

1. Field of Invention
This invention relates to a mask exposure method used in the production of semiconductor devices. This invention also relates to a reticle mask used in the method. This invention further relates to a semiconductor product wafer produced by the method. This invention also relates to a method of producing semiconductor device chips
2. Description of Related Art
Semiconductor devices, such as semiconductor integrated circuits, are generally produced by repeatedly exposing a semiconductor wafer through a mask pattern on a reticle using an exposing apparatus, such as a stepper, thereby forming a plurality of exposed areas arranged on the entire surface of the semiconductor wafer. The image of the mask pattern is printed on a resist layer applied on the surface of the semiconductor wafer, and developed to form a resist pattern, which is used as a mask for, for example, etching a layer formed on the surface of the wafer. By repeating these processes, a plurality of semiconductor device chips is produced on entire surface of the wafer. The semiconductor devices chips are separated into individual semiconductor devices at scribe lines between the chips and encapsulated into packages.
Typically, a reduction-type exposing apparatus is used to expose semiconductor wafers. Therefore, the size of the mask patterns on the reticle is several times the site of the actual semiconductor device patterns formed on the semiconductor wafer.
In addition to these actual devices, test devices for measuring electrical characteristics are also formed on semiconductor wafer. These test devices are called test element groups (TEGs) and are foamed, for example, in the scribe lines.
Japanese Unexamined Patent Application Publication Nos. 5-291106 and 10-312049 disclose exposure processes of chip patterns. In these processes, a semiconductor chip pattern (LSI pattern) and a TEG pattern are arranged on the same reticle. Required positions of the wafer are exposed through the TEG pattern and the other positions are exposed through the chip pattern. To expose through the TEG pattern mask blinds of the stepper cover the chip pattern on the reticle so that only the TEG pattern is projected onto the wafer. The TEG pattern is covered to expose through the chip pattern.
A serious concern in semiconductor production is to increase the number of semiconductor device chips produced on one semiconductor wafer. A countermeasure is narrowing the scribe lines. This method is particularly effective in producing semiconductor devices with small chip dimensions, such as 1 mmxc3x971 mm. A plurality of mask patterns for such small semiconductor device chips are closely arranged with narrow scribe lines of, for example, 50 xcexcM (the width when exposed on the wafer) on the same reticle so that the size of the entire mask pattern substantially corresponds to a field size, for example, 20 mmxc3x9720 mm that can be exposed at once by the exposing apparatus. The number of the chips formed by an exposure step and the total number of the chips formed on the entire wafer can be increased. Because the TEG patterns and alignment marks for the exposing apparatus cannot be included within the width of such narrow scribe lines, regions corresponding to one to several semiconductor chips on the mask pattern are allocated to the TEG patterns and the alignment marks.
When the above exposure step, however, is repeated over the entire surface of the semiconductor wafer, a plurality of exposed areas, each composed of a device region including a plurality of semiconductor device chips and a TEG region, is formed on the semiconductor wafer. In order to increase the number of the device chips produced on one wafer, it is preferable that the number of the TEG regions on one wafer be minimized as much as possible, for example, to one to several, by producing the TEG region in only specific positions.
In the above-described process using the mask blinds, however, the step pitch in the exposed areas arranged on the wafer surface cannot be maintained constant, when the device region and the TEG region have different sizes.
Thus, the distances between alignment marks for use in a laser-trimming step, each provided at a specific position in each device region, are different. Therefore, the laser-timing step requires complicated treatment, such as combining a plurality of map layouts, or splitting in a plurality of steps on each wafer. Moreover, 5 to 10% of the chips on the periphery of the wafer cannot be treated depending on the laser-trimming apparatuses. A process for measuring electrical characteristics is also complicated due to the irregular distances between the TEG regions.
Accordingly, it is an object of this invention to provide an exposure method capable of arranging exposed areas with fixed pitches even when TEG regions are formed only at several positions on a semiconductor wafer.
It is another object of this invention to provide a reticle mask used in the exposed method.
According to one aspect of this invention, an exemplary method of fabricating semiconductor devices comprises: applying a resist layer on a surface of a semiconductor wafer; forming a plurality of exposed areas in the resist layer arranged in rows and columns with fixed pitches, the exposed areas including a plurality of first exposed areas each including a device region, and at least one second exposed area including a portion of the device region and a TEG region.
Preferably, the device region of the first exposed areas includes a predetermined number of rows of exposed device chip patterns and the portion of the device region of the second exposed area includes a number of rows of the exposed device chip patterns that is less than the predetermined number of rows.
Preferably, each of the first exposed regions is formed by a single exposure.
Preferably, the first and the second exposed areas are formed using a common reticle have a device pattern region to form the device region and a having TEG pattern region to form the TEG region.
Preferably, the second exposed area is formed by a first exposure of the resist layer through a portion of the device pattern region and by a second exposure of the resist layer through the TEG pattern region of the common reticle.
Preferably, the TEG pattern region of the common reticle includes a blank zone, and a defective pattern formed by the first exposure is erased by the second exposure through the blank zone, or the second exposure through the blank zone prevents formation of a defective pattern by the first exposure.
Preferably, at least one of the first exposed areas is formed by exposing the resist layer through both the device pattern region and the TEG region of the common reticle so that the TEG region of the second exposed area adjacent to the at least one of the first exposed areas is formed simultaneously.
According to another as of this invention, an exemplary method of fabricating semiconductor devices comprises: setting a reticle having a device pattern region and a TEG pattern region in an exposing apparatus; positioning a semiconductor wafer 1 a resist layer on the semiconductor wafer in the exposing apparatus; and forming an exposed area in the resist layer by a first exposure through a portion of the device pattern region of the reticle and by a second exposure through the TEG pattern region of the reticle, wherein a defective pattern formed by the first exposure is erased by the second exposure, or the second exposure prevents formation of a defective pattern by the fist exposure.
Preferably, the TEG pattern region of the reticle includes a blank zone and the second exposure though the blank zone erases or prevents the formation of the defective pattern.
Preferably, the device pattern region of the reticle includes a predetermined number of rows of device chip patterns and the portion of the device pattern region includes a number of rows of the device chip patterns that is less than the predetermined number of rows and a portion of an adjacent row of the device chip patterns.
According to another aspect of this invention, an exemplary reticle for use in an exposing apparatus comprises: a rectangular pattern forming area on a surface of a substrate, the pattern forming area having a side; and a device pattern region and a TEG pattern region arranged wit the pattern forming area along a first direction perpendicular to the side of the pattern forming area, wherein the TEG pattern region includes a blank zone extending along a substantial length of the side of the pattern forming area.
Preferably, the TEG pattern region further includes a blind zone extending along a substantial length of a boundary between the device pattern region and the TEG pattern region in parallel with the side of the pattern forming area
Preferably, the device pattern region includes a plurality of rows of device chip patterns for producing semiconductor device chips. The rows of the device chip patterns are aligned in the first direction.
Preferably, a width of scribe lines between the rows of the device chip patterns is smaller than an alignment error of a mask blind of the exposing apparatus.
Preferably, a dimension of the blank zone along the tint direction is at least twice of an alignment error of a mask blind of the exposing apparatus.
According to another aspect of this invention, an exemplary semiconductor product wafer comprises: a plurality of patterned areas arranged vertically and horizontally with fixed pitches on a surface of the wafer, the patterned areas including a plurality of first patterned areas each including a device region and at least one second patterned area including a portion of the device region and a TEG region.
Preferably, the device region in each of the first pattern areas includes a predetermined number of rows of device chips, and the portion of the device region of the second patterned area includes a number rows of the device chips that is less than the predetermined number of rows of the device chips.
Preferably, a width of a scribe lie between the rows of the semiconductor device chips is the same as that of a scribe line between the TEG region and an adjacent one of the rows of the device chips in the second patterned area.
Preferably, the TEG region is smaller than the portion of the device region.
According to another aspect of this invention, an exemplary method of producing semiconductor device chips comprises: forming a plurality of patterned areas arranged vertically and horizontally with fixed pitches on a surface of a semiconductor wafer, the patterned areas including a plurality of first patterned areas each including a device region and at least one second patterned area including a portion of the device region and a TEG region, such that each of the device regions and the portion of the device region includes at least one device chip, and at least selected ones of the patterned areas include alignment marks at a fixed relative position within the respective patterned areas; and directing an energy beam onto selected ones of the device chips by using the alignment marks as positional references and trimming the selected ones of the device chips using the energy beam.
Preferably, the device region in each of the first patterned areas includes a predetermined number of rows of the device chips, and the portion of the device region of the second patterned area includes a number of rows of the device chips that is less than the predetermined number of rows of the device chips.
Preferably, the plurality of patterned areas includes at least one incomplete patterned area on the periphery of the wafer that includes at least one device chip; and the directing directs the energy beam onto the device chip in the incomplete patterned area using the alignment marks in at least one of the first and the second patterned areas as the positional references.
Herein, a region of a mask pattern on a reticle for producing semiconductor device chips is referred to as a xe2x80x9cdevice pattern region,xe2x80x9d and a region of a mask pattern for producing TEGs is referred to as a xe2x80x9cTEG pattern region.xe2x80x9d An area on a semiconductor wafer exposed through the reticle is referred to an xe2x80x9cexposed area.xe2x80x9d In the exposed area, a latent image corresponding to the mask pattern on the reticle is formed in a resist layer on the surface of the semiconductor wafer. The latent image is developed to form a resist pattern, which is used, for example, as a mask for etching. The exposed area includes a device region exposed through the device pattern region on the reticle and/or a TEG region exposed through the TEG pattern region on the reticle. In the exposing process of this invention, a plurality of exposed areas is arranged in rows and columns with fixed pitches in horizontal and vertical directions on the semiconductor wafer. Each exposed area may be formed by a single exposure step or a plurality of exposure steps.
As the simplest method for achieving a shot layout (arrangement of exposed areas) with constant step pitches, two separate reticles can be used. That is, a first reticle including a device pattern region is used to form first exposed areas including only the device regions A second reticle including a device pattern region and a TEG pattern region and having the same dimension as that of the first reticle is used to form second exposed areas each including both the device region and the TEG region. This method, however, requires two reticles for each layer in production of the semiconductor devices. Many sets of these reticles must be prepared and exchanged frequently in the production of advanced semiconductor devices, resulting in high cost and low production efficiency.
It is, therefore, preferable that the device regions and the TEG regions be exposed using a common reticle including both a device pattern region having an arrangement of a plurality of semiconductor device chip mask patterns and a TEG pattern region. In this case, exposure must be performed, for example, using mask binds of the exposing apparatus for covering undesired portions of the reticle. The accuracy of alignment of the mask blinds, however, is low, resulting in a positioning error. The positioning error distributes statistically. Typically, three-times of the standard deviation (3"sgr") of the positioning error is approximately 100 xcexcm on the wafer. Therefore, the exposure method should accept an alignment error of the mask blinds of approximately 100 xcexcm on the wafer.
When exposure is performed using only the device pattern region, a blind zone having an adequate width provided at a boundary between the device pattern region and the TEG pattern region absorbs the alignment error of the mask blind.
To form a second exposed area containing both the device region and the TEG region, a portion of the device pattern region on the reticle should be covered so that a total dimension of the second exposed area is equal to that of the first exposed area containing only the device region. Therefore, the mask blinds should be used to expose through only a portion of the device pattern region and the TEG region. However, when the exposure is performed by covering a portion of the device pattern region, a defective pattern in which only a portion of the device chip pattern is printed is formed on the semiconductor wafer due to an alignment error of the mask blind at the boundary between a region to be exposed and a region not to be exposed in the device pattern region.
A possible method to prevent the formation of such a defective pattern is providing a blind zone within the device pattern region. This method, however, requires a sufficiently wide scribe line at the boundary, resulting in a reduced number of semiconductor chips producible on one semiconductor wafer.
In a preferred embodiment, a reticle is used in which both a device pattern region and a TEG pattern region are included, and a blind zone and a blank zone are provided in the TEG pattern region More specifically, the blind zone is provided at one side of the TEG pattern region on the device pattern region side, and the blank zone is provided at the other side of the TEG pattern region away from the device pattern region. The width of the blind zone and the width of the blank zone may be appropriately determined depending on the alignment accuracy of the mask blind
Using this reticle, first exposure steps of exposing the resist layer through only the device pattern region, second exposure steps of exposing both the device pattern region and the TEG pattern region, and third exposure steps of exposing through only a portion of the device pattern region are repeated in an appropriate combination. By these exposure steps, first exposed areas including only the device region and second exposed areas, eat including both the portion of the device region and the TEG region and having the same dimension as the first exposed are; can be formed on the semiconductor wafer. Because the dimension of the first exposed area and that of the second exposed area are the same, arbitrary numbers of the first and the second exposed areas can be arranged on the surface of the semiconductor wafer in rows and columns with fixed vertical and horizontal pitches.
The light passing through the blank zone in the TEG pattern region in the subsequent second exposure step erases a defective pattern formed on the semiconductor wafer in the third exposure step. Alternatively, the light passing through the blank zone in the second exposure step prior to the third exposure step preliminarily exposes a region where, without the second exposure step, the defective pattern would be formed, and prevents the formation of the defective pattern in the third exposure step.

Method of arranging exposed areas including a limited number of test element group (TEG) regions on a semiconductor wafer


An electric toothbrush having a handpiece, a bristle holder which is arranged on a head portion of the handpiece and is rotatable about an axis of rotation of the bristle holder, and a drive mechanism for the bristle holder. The drive mechanism includes a motor which is arranged on the handpiece, and a transmission member which transfers a driving motion from the motor to the bristle holder. The transmission member is arranged to rock in multiple axes and is arranged to be driven by the motor such that is approximately traverses a double conical path.

A toothbrush of the kind described is known from WO 01/19281 A2, according to which an approximately round bristle cluster is drivable in a rotary oscillating manner. A bristle holder that is rotatably arranged in the brush head is coupled to a transmission member, which is driven back and forth lengthwise by a crank that is attached to a gearwheel. However, a crank drive of such kind has a relatively large space requirement. Moreover, because of the components it requires, it is complex and expensive. Thus, it is only practical for use in highly priced toothbrushes.
An electric toothbrush in which the rotary drive motion of the motor is transmitted to the bristle holder by a transmission member is known from U.S. Pat. No. 4,149,291. This transmission member is eccentrically coupled to the drive shaft at one end, and is supported by a ring bearing at its other end, where it exits the handpiece, so that it describes a conical driveing motion. In order to impart a special, approximately elliptical motion to the detachable brush element that is seated on the transmission member, the transmission member includes a spring that flexes along one axis. As a result the conical driving motion of the transmission member is only transferred to a limited degree in this one axis. However, because of the sophisticated design of the transmission member, this drive is complicated and expensive. Additionally, because of its spring-driven configuration, it is prone to fatigue. Moreover, the elliptical drive motion of the toothbrush head is in many respects disadvantageous.
German Patent No. DE 20112320 U1 described another electric toothbrush, in which the brush holder, with the bristle cluster affixed thereto, is arranged rigidly at one end of a drive rocker, which is disposed inside a hollow brush handle. The drive rocker is arranged to rock in multiple axes and is excited to oscillate in two axes by piezoelectric elements that are arranged at the other end of the drive rocker, between the rocker and the internal wall of the brush handle. However, the bristle holder, which is securely affixed to the rocker end, performs only relatively small, tethered movements. Particularly, rotating movements that turn the bristle cluster in on itself cannot be performed to a degree that would yield an optimum result in terms of cleaning the teeth.


Embodiments are directed to systems and methods for two or more cured composite assemblies that are bonded together to form a tubular composite structure, wherein each of the cured composite assemblies do not have a tubular shape. The tubular composite structure may form a spar for an aerodynamic component, for example. The two or more cured composite assemblies may comprise carbon or fiberglass composite materials or a combination of materials. Each of the cured composite assemblies may further comprise axial edges that are configured to be bonded to another of the cured composite assemblies, wherein the axial edges have a sloped shape. An adhesive agent may be applied on the axial edges for bonding two cured composite assemblies. Alternatively, or additionally, one or more fasteners may be used to attach the axial edges of at least two cured composite assemblies.

Composite assemblies are created by laying up an assembly of uncured details and material. This typically consists of laying dry fabric layers ("plies") by hand to create a laminate stack. Resin is then applied to the dry plies after layup is complete. Alternatively, "wet" composite plies that have resin built in may be used in the layup. Composite fabrication usually involves some form of mold tool to shape the plies and resin. A mold tool is required to give the unformed resin/fiber combination its shape prior to and during cure. Once the layup is complete, the composite is cured. The cure can be accelerated by applying heat and pressure to the composite layup.
A composite assembly may be used as a structural member for an aircraft component, for example. These structural members are often referred to as a "spar," and they may extend the axial length of a structure to provide support against loads applied on the structure. In the case of an aerodynamic component, such as propellers, rotor blades, and wings, for example, the spar may support both the weight of the aerodynamic component and any aerodynamic loads applied to the aerodynamic component, such as lift and drag forces. The spar is the primary structural member or backbone of many aircraft components. Due to the tubular geometry of typical spars, it can be challenging to produce a spar that fully forms to the desired shape without wrinkles or other defects that arise due to the inherent trapping condition exhibited by non-symmetric shapes and woven composite materials.
In existing manufacturing processes, a spar may be formed using a composite preform that is cured prior to assembly with the other components of the structure, such as skin assemblies in the case of composite blades. During this curing process, an inflatable bladder may be disposed within the uncured spar and expanded to help compact the layers of preformed composite material and remove any excess air bubbles or other voids included in the preform as the spar is cured at an elevated temperature within a precision mold. Once cured, the other components or details of the composite assembly are assembled with the spar. For instance, in the case of a rotor blade, outer skins and a leading edge are assembled with the spar and then bonded in a subsequent curing process.
The process of laying up a spar as one single structure requires a lot of manipulation which can lead to defects during the manufacturing process. For example, when the plies in the layers are oriented at various angles, such as off-axis plies that overlie unidirectional, full-span plies, the difference can cause wrinkling and bunching of the layers during cure.

Multi-piece assembly for a tubular composite body


The present document relates to audio conference systems. In particular, the present document relates to the mapping of soundfields within an audio conference system. A conference multiplexer (110, 175, 210, 400) configured to place a first input soundfield signal (402) originating from a first soundfield endpoint (120, 170) within a 2D or 3D conference scene (300) to be rendered to a listener (301) is described. The first input soundfield signal (402) is indicative of a soundfield captured by the first soundfield endpoint (120, 170). The conference multiplexer (110, 175, 210, 400) is configured to set up the conference scene (300) comprising a plurality of talker locations (321, 322, 332, 331) at different angles (323, 333) with respect to the listener (301); provide a first sector (325); wherein the first sector (325) has a first angular width (324); wherein the first angular width (324) is greater than zero; and transform the first input soundfield signal (402) into a first output soundfield signal (403), such that for the listener (301) the first output soundfield signal (403) appears to be emanating from one or more virtual talker locations (321, 322) within the first sector (325).

Audio conference systems allow a plurality of parties at a plurality of different terminals to communicate with one another. The plurality of terminals (which are also referred to as endpoints) may have different capabilities. By way of example, one or more terminals may be monophonic endpoints which capture a single mono audio stream. Examples for such monophonic endpoints are a traditional telephone, a device with a headset and a boom microphone, or a laptop computer with an in-built microphone. On the other hand, one or more terminals may be soundfield endpoints which capture a multi-channel representation of the soundfield incident at a microphone array. An example for a soundfield endpoint is a conferencing telephone equipped with a soundfield microphone.
An audio conference system which is configured to taken into account the soundfield information provided by a soundfield endpoint, e.g. for designing a conference scene, is referred to herein as a soundfield conference system. The present document addresses the technical problem of creating a conference scene for audio conference systems which comprise soundfield endpoints. In particular, the present document addresses the technical problem of mixing and/or multiplexing the audio signals coming from a plurality of endpoints, wherein at least one of the plurality of endpoints is a soundfield endpoint. A particular aspect of the present document is to provide schemes that integrate one or more soundfields together, so that a listener enjoys a perceptually continuous, natural, and/or enveloping teleconferencing experience in which he/she can clearly understand the speech, can identify who is talking at any particular time and/or can identify at which endpoint each talker is located.

Spatial multiplexing in a soundfield teleconferencing system

Dolby Laboratories Licensing Corporation