An arithmetic processing device has a first arithmetic processing unit including a first instruction controller that controls a write instruction to a memory and a first cache unit, and a second arithmetic processing unit including a second instruction controller and a second cache unit. The first arithmetic processing unit transmits an invalidation request to the second arithmetic processing unit when a write request to the memory is issued within a first transaction, and in response to the invalidation request, the second cache unit determines whether a second transaction is to be aborted based on information in the invalidation request when the second transaction conflicts with the first transaction for a cache block corresponding to a destination of the write request, and sends a determination result to the first arithmetic processing unit.

In parallel processing under the environment of a multi-CPU core having a plurality of central processing unit (CPU) cores or a multi-CPU having a plurality of CPUs (hereinafter CPU core and CPU are referred to as a CPU), a plurality of CPUs shares the same address space and executes a store instruction (write) and a load instruction (read) with respect to the same memory. In this case, a plurality of CPUs accesses the same memory address and writes data thereto. Due to this, exclusive processing which uses locks is known as a mechanism for mediating such accesses.
In exclusive processing which uses locks, in a period where a plurality of CPUs are executing respective threads, a CPU executes a lock acquisition operation before executing a write operation to a shared memory, executes a write operation when a lock is acquired, and after that, executes an operation of releasing the lock. In a locked state, since lock acquisition by another thread is inhibited, a write operation to the shared memory is performed exclusively, and coherency of data within a memory is maintained.
However, exclusive processing which uses locks is a burden for programmers and causes bugs. Thus, a transactional memory which performs exclusive processing instead of locks has been proposed.
In a transactional memory, a series of accesses to a shared memory is referred to as a transaction. In the transactional memory, when a thread of a certain CPU accesses a shared memory and a thread of another CPU also accesses the shared memory, conflict of accesses is checked. When an access conflict is detected, a plurality of conflicting threads aborts the executing transactions, returns to the state before the transactions were started and executes the transactions again.
The above matters are disclosed in JP2008-515055 and JP2012-509529.
Two types of transactional memories have been proposed, including a software transactional memory which implements a transactional memory with software and a hardware transactional memory which implements a transactional memory with hardware. A hardware transactional memory is advantageous in that it poses a lesser programming burden on programmers, but is not able to perform complex determination processes. Thus, only transactions of threads of a specific CPU may be repeatedly aborted, and consequently, deadlocks may occur.
When aborts occur repeatedly, the control is handed over to a software abort handler and processing using locks is performed. As a result, the performance of a transactional memory may deteriorate.

Arithmetic processing device, method of controlling arithmetic processing device, and information processing device


In a method for testing a component of a distributed system, a first invocation request is sent to the component, where the first invocation request includes an identifier. A second invocation request is sent to a second component, where the second invocation request carries the identifier from the first invocation request. In addition, the second component switches behavior based upon the identifier, where the switching of behavior of the second component is employed to test the component.

Distributed software accounts for a large percentage of software programs produced today. Distributed software is typically implemented as multiple components interacting in a single computer system or in multiple computer systems interconnected by networks both large and small. Rigorous testing is often required in order to produce a robust, high-quality, and reliable distributed software system. However, testing of such distributed software systems remains difficult because the interaction of components with other components throughout the system or over multiple systems is often highly complex. The complexity is due, in large part, to the difficulty in determining if erroneous code lies within the components, within the other components, or within the interactions between the components, especially when the component interacts with a relatively large number of other components.
Conventionally, each component of the distributed software is individually tested to validate the internal logic of each component, in an effort to produce error-free code for each component. In addition, system integration testing is performed to focus on testing of component interactions only when it is determined that each component contains error-free code. This type of testing, however, is difficult and time consuming. It would therefore be desirable to have a testing system that does not suffer from the drawbacks and difficulties associated with conventional testing schemes.

Testing a component of a distributed system

Hewlett-Packard Development Company, L.P.


A case has essentially parallel front and rear faces, a periphery formed of essentially parallel top and bottom and essentially parallel first and second sides coupling the front and rear faces. The case is adapted to receive and support a cell phone of the type having a keyboard with an upper row of numbers 1, 2, 3 adjacent an upper edge and a lower row of numbers 7, 8, 9 adjacent a lower edge. The case has an essentially rectangular opening in the front face and a plurality of openings in the sides adapted to overly and expose portions of the cell phone. The top of the case is closer to the lower edge of the cell phone than the upper edge. The bottom of the case is closer to the upper edge of the cell phone than the lower edge.

1. Field of the Invention
The present invention relates to a cell phone/case/necklace system and more particularly pertains to enclosing a cell phone in a case and supporting the case by a necklace, the cell phone being encased and supported in an orientation upside-down with respect to the case and necklace for reading the cell phone in a more convenient, reliable and simplified manner.
2. Description of the Prior Art
The use of cell phone cases of known designs and configurations is known in the prior art. More specifically, cell phone cases of known designs and configurations previously devised and utilized for the purpose of encasing and supporting cell phones are known to consist basically of familiar, expected, and obvious structural configurations, notwithstanding the myriad of designs encompassed by the crowded prior art which has been developed for the fulfillment of countless objectives and requirements.
While these devices fulfill their respective, particular objectives and requirements, they do not describe a cell phone/case/necklace system that allows enclosing a cell phone in a case and supporting the case by a necklace, the cell phone being encased and supported in an orientation upside-down with respect to the case and necklace.
In this respect, the cell phone/case/necklace system according to the present invention substantially departs from the conventional concepts and designs of the prior art, and in doing so provides an apparatus primarily developed for the purpose of enclosing a cell phone in a case and supporting the case by a necklace, the cell phone being encased and supported in an orientation upside-down with respect to the case and necklace.
Therefore, it can be appreciated that there exists a continuing need for a new and improved cell phone/case/necklace system which can be used for enclosing a cell phone in a case and supporting the case by a necklace, the cell phone being encased and supported in an orientation upside-down with respect to the case and necklace. In this regard, the present invention substantially fulfills this need.


A substrate biasing circuit operates in either a test mode or a normal operating mode. The substrate biasing circuit includes a voltage generating circuit generating a substrate biasing voltage at an output terminal and a control terminal controlling the magnitude of the substrate voltage. When the voltage at the control terminal is more positive than a predetermined value, the voltage generating circuit gradually drives the substrate more negative. When the voltage at the control input of the voltage generating circuit is less than the predetermined value, the output terminal of the voltage generating circuit essentially floats. In normal operation, the output terminal of the voltage generating circuit is also coupled to the control terminal so that the substrate voltage is regulated at the predetermined negative voltage. Alternatively, the substrate may be coupled to ground and the voltage generating circuit disabled during normal operation. In a test mode, the control terminal is coupled to an externally accessible input terminal. Respective impedance elements between the control terminal and the input terminal and between the control terminal and the output terminal form a voltage divider. As a result, the substrate voltage is adjusted as a function of a voltage applied to the input terminal to maintain the control terminal of the voltage generating circuit at the predetermined value. The control terminal may be coupled to the input terminal through a pass gate which may be controlled by a decode circuit to selectively isolate the control terminal from the externally accessible input terminal during normal operation.

Integrated circuits include a large number of transistors formed on a semiconductor substrate, such as silicon. The transistors may be a variety of types such as NMOS and PMOS transistors. Examples of integrated circuits of this type are memory devices such as static random access memories ("SRAMs") and dynamic random access memories ("DRAMs"). Further, there are several varieties of DRAMs such as synchronous DRAMs ("SDRAMs") and packetized DRAMs.
It is common in integrated circuits, particular integrated circuit memory devices, for the substrate of the integrated circuit to be biased at ground potential. However, it is also common for the substrate to be biased to a negative voltage. Biasing the substrate of the integrated circuit at a negative voltage lowers the sensitivity of threshold voltages to a phenomenon known as the "body effect," increases punch-through voltages, lowers the diffusion-to-substrate capacitance and provide other advantages. For example, a negative substrate voltage lowers subthreshold leakage on clocked depletion transistors and protects the chip against forward biasing of the substrate due to voltage undershoots at the inputs of the integrated circuit. The negative voltage is typically provided by a negative bias voltage generator, such as a charge pump. A wide variety of conventional charge pumps may be used for this purpose, one of which is illustrated in FIG. 1 to bias the substrate of an integrated circuit memory device 10. The memory device 10 includes conventional memory circuits 12 that are formed by a large number of transistors fabricated on the substrate of the memory device 10. The memory circuits 12 are coupled to external devices through a bus system 14 such as an address bus, a data bus, and a control/status bus.
Also fabricated on the substrate of the integrated circuit memory device 10 is a negative voltage generator 20 having an output voltage line 26 and a control voltage input line 28. The output voltage line 26 is coupled to the substrate of the memory device 10 to apply a substrate bias voltage Vbb to the substrate. The input control line 28 is also coupled to the substrate to apply the substrate voltage Vbb to a control input of the negative voltage generator 20. In operation, the magnitude of the voltage generated by the negative voltage generator 20 is controlled by the input control voltage on line 28 to regulate the bias voltage Vbb to a predetermined value. When the bias voltage Vbb tends to decrease for various reasons, such as an increase in load, the reduced bias voltage Vbb coupled to the input control line 28 causes the negative voltage generator 20 to bring the bias voltage Vbb back to the predetermined voltage. Negative voltage generators 20 having the characteristics described above are conventional and are described in, for example, U.S. Pat. No. 5,574,691 which is incorporated herein by reference.
Commercially available integrated circuits, such as memory devices, are typically tested throughout and after their manufacturing process. Generally, these integrated circuits are initially tested while they are still in wafer form before being separated to individual integrated circuit dies. Final testing of the integrated circuit occurs after the integrated circuit die has been placed in a package having externally accessible contacts. In the testing of integrated circuits, it is generally desirable to test under conditions in which the integrated circuit is more likely to fail compared to normal operating conditions. For example, for integrated circuits having a grounded substrate, it is desirable to test the integrated circuit with the substrate at a negative voltage. For integrated circuits having a substrate that is biased to a negative voltage during normal operation, it is desirable to test the integrated circuit with the substrate at a voltage that is more negative than the normal substrate bias voltage. If the integrated circuit operates properly at this test voltage, then it is more likely to work properly at the voltage to which the substrate is biased during normal operating conditions.
A variety of techniques have been used to provide a substrate voltage for test purposes. For example, as illustrated in FIG. 2, an integrated circuit, such as a memory device 30 having memory circuits 12, includes an enable circuit 32 having an externally accessible input terminal 34. The memory device 30 also includes a negative voltage generator 36 having an enable input terminal 38 connected to an output terminal 40 of the enable circuit 32. The negative voltage generator 36 has an output terminal 42 coupled to the substrate of the memory device 30. When enabled, the negative voltage generator 36 outputs a negative test voltage V.sub.TEST that is more negative than the substrate voltage Vbb produced by a different negative voltage generator (not shown in FIG. 2).
In operation, one or more signals are applied through one or more input lines 34 to the enable circuit 32, thereby causing the enable circuit 32 to generate an enable signal. The enable signal is applied to the enable input terminal of the negative voltage generator 36 which then generates the test voltage V.sub.TEST. Since the test voltage V.sub.TEST is more negative than the normal bias voltage Vbb, some tests performed on the memory circuits 12 in this condition may be more likely to fail as compared to normal operation. Thus, testing using the enable circuit 32 and negative voltage generator 36 of FIG. 2 is more likely to discover faults in the memory circuits 12 during testing.
Although the approach shown in FIG. 2 can successfully bias the substrate of the integrated circuit 30 to a negative test voltage that is more negative than the normal substrate voltage Vbb, it requires the inclusion of a negative voltage generator 36 for integrated circuits having a normally grounded substrate or a second negative voltage generator 36 for integrated circuits having a normally negatively biased substrate. The need to fabricate a negative voltage generator 36 or an additional negative voltage generator 36 in the memory device 30 increases the cost of the memory device 30 or other integrated circuit and can consume a significant quantity of surface area. Increasing the cost, complexity, and size of a memory device 30 solely for the purpose of facilitating factory testing is considered undesirable since this additional circuitry is used only briefly during the life of the integrated circuit. Furthermore, although the negative voltage generator 36 can generate a suitable test voltage V.sub.TEST, the magnitude of the test voltage V.sub.TEST cannot be varied. However, it is often desirable to vary the test voltage to alter the severity of the test depending on a variety of factors.
One technique for applying a negative test voltage to a substrate in integrated circuits having an existing negative voltage generator is described in U.S. Pat. No. 5,619,459 to Gilliam. The Gilliam patent teaches continuously activating a negative voltage substrate pump during testing, and then regulating the substrate voltage to a predetermined value using a voltage sensitive shunt. However, this shunt regulator approach may use excessive current for many applications. Furthermore, a significant amount of circuitry is required to implement the shunt regulator and the control circuitry for the regulator and charge pump.
The above-described disadvantages of the approaches described above can be eliminated by simply coupling a test voltage to the substrate of an integrated circuit the integrated circuit from an external source, as illustrated in FIG. 3. As shown in FIG. 3, an integrated circuit, such as a memory device 52 containing memory circuits 12, has a pair of externally accessible input terminals 54, 56. The input terminal 56 controls the conductive state of a pass gate 58 which selectively couples the input terminal 54 to the substrate.
In operation, a negative test voltage is applied to the input terminal 54 which is then selectively coupled to the substrate by the pass gate 58. The technique shown in FIG. 3 avoids the disadvantages of FIG. 2 since the magnitude of the test voltage V.sub.TEST can be varied at will and only a negligible amount of additional circuitry is required, i.e., the circuitry in the pass gate 58. However, the technique shown in FIG. 3 has the disadvantage of allowing the substrate to be inadvertently coupled to an external pin which may be at a voltage that can damage the integrated circuit 52. Furthermore, it is often not possible to couple a large negative voltage from an external terminal to the substrate without forward biasing semiconductor junctions that are also coupled to the input terminal 54.
There is therefore a need for a technique to apply to the substrate a negative test voltage that has an externally adjustable magnitude without requiring the addition of significant circuitry or risking the forward biasing of semiconductor junctions.

Method and apparatus for biasing the substrate of an integrated circuit to an externally adjustable voltage


A transparent lens microphone comprises (a) a refractive lens; (b) a sound sensitive coating on an outer surface of the refractive lens; and (c) electrical contacts connected to the sound sensitive coating so as to provide an electrical analog signal representative of an acoustic signal striking the outer surface of the transparent lens microphone.

1. Field of the Inventive Concepts
The inventive concepts disclosed and claimed herein relate generally to a microphone for hearing aids, and more particularly, but not by way of limitation, to a refractive lens coated to generate an electrical analog of an acoustic signal striking an outer surface of the refractive lens.
2. Brief Description of the Prior Art
Hearing aids are electroacoustic devices used to amplify or modify sound for the user. They are typically worn in or behind the ear and include a microphone, an amplifier and a speaker. The microphone receives sound waves and converts the sound to electrical signals. The electrical signals can then be amplified or otherwise processed to amplify certain frequencies while reducing or cancelling others. The amplified/processed electrical signals are then converted back to sound waves which are transmitted to an ear canal and/or the ear drum of the user. Other hearing aid devices transmit the amplified/processed electrical signals to a transducer that converts the signals into mechanical vibrations directly on the tympanic members of the middle ear. Bone anchored hearing aids (BAHA) bypass the outer and middle ear and vibrate the skull and inner ear directly.
Regardless of the final delivery means, all hearing aids require a microphone. Due to problems associated with hearing aid size and weight, and for cosmetic reasons, much effort has been expended to decrease the size of these microphones. However, there is generally a tradeoff between size and performance. For example, to improve directional hearing, constructions often make use of multiple microphones which can become quite noticeable and possibly cumbersome. There is a need for improved microphone designs for hearing aids that are cosmetically desirable and provide improved performance.


An electronic device for being carried on a vehicle for transmitting information to a vehicle following it over a given route. The electronic device is also intended to receive information coming from a vehicle preceding it over the same route. The device includes a transmitter for transmitting information and a chronometric scanner adapted to detect deceleration of the vehicle by comparing speed values communicated to it by sensor. In the event that deceleration values exceed a certain threshold, a signal is sent to a radio transmitter device adapted to transmit a deceleration signal via an antenna on the rear of the vehicle. The electronic device also includes a radio receiver for receiving information from an antenna at the front of the vehicle regarding deceleration of vehicle in front of the vehicle. An alarm device emits a visual and/or audible alarm in the event of sudden deceleration of a vehicle preceding it.

The present technique used to warn a succession of motorists that one of them is slowing down or stopping, consists in providing vehicles with stop lights, the lighting of which is subject to the actuation of the brake pedal. When a vehicle is braked, its stop lights come on but only the immediately following driver can perceive this signal. The third driver in line does not begin to brake until the stop lights of the second vehicle come on, and so on. This results in cumulative information delays which may end up in a multiple pileup if one of the drivers is distracted or slow to react, if he is travelling too close to the preceding vehicle or if the visibility conditions are poor. The phenomenon is accentuated by the disparity in braking performance from one vehicle to another and in their respective loading.

Electronic anti-collison device carried on board a vehicle


A wheel loader includes: a floor for a driving operation; an operator's seat for an operator to be seated; and a trainer's seat for a trainer to be seated, the operator's seat and the trainer's seat being provided in parallel to each other. A footrest of the wheel loader includes an operator's footrest and a trainer's footrest respectively having placement surfaces on which adjacent feet of the seated operator and trainer are respectively placed. The operator's footrest and the trainer's footrest are integrated with each other.

In typical construction machines such as a wheel loader and a hydraulic excavator, a footrest may be provided on a floor such that an operator can step on the footrest to keep his/her balance during operations. The footrest differs depending on kinds of the construction machines. For example, since working equipment of the hydraulic excavator is actuated solely by manually operating working equipment levers, the operator needs to keep his/her balance by applying a load with both his/her unused feet. Accordingly, footrests are respectively provided under his/her right and left feet (see, for example, Patent Literatures 1 and 2).
In a large construction machine used in a mine and the like, a trainer occasionally rides on the machine with an inexperienced operator in order to train the operator. For this reason, a trainer's seat for the trainer to be seated is provided next to an operator's seat for the operator to be seated.

Footrests and floor mats for construction machinery


A method for texture compressing images having a plurality of color components (R, G, B) includes defining color representatives for use in encoding by defining groups of colors for each color component (R,G,B), and selecting a representative median color for the group. Each group ideally includes 3 to 15 increasing colors. The method includes computing, for each group, an error between each member of the group and the representative median color of the group. Typically, the error is computed as the sum of the absolute differences (SAD) between each member of the group and the representative median color of the group.

1. Field of the Invention
The present invention relates to texture compression techniques.
2. Background of Invention
Compression and decompression intended to minimize the memory size needed to store 2D textures is a promising field of application for these techniques in the 3D graphic domain. This possible field of use is becoming more and more significant as the dimensions and number of these textures tend to increase in real applications. The level of detail tends to increase as required by some applications, such as 3D games, and, without the help of such techniques, memory size and bandwidth for access would tend to require increasing performance levels hardly sustainable in mobile, ultra low power, handheld systems. More to the point, these techniques are becoming increasingly important in wireless phone architectures with 3D games processing capabilities.
For example, assuming a texture dimension of 512×512 pixels 16 bit/color each and a depth of 3, the amount of memory needed is 1.5 M bytes. Assuming 20-30 frames per second, the memory bandwidth is 30 to 45 Mbytes/s.
Additional background information on this topic can be gathered from "Real-Time Rendering" by Tomas Akenine-Möller and Eric Haines, A. K. Peters Ltd, 2nd edition, ISBN 1568811829.
A well-known solution in this scenario was developed by the company S3; the related algorithm is designated S3TC (where TC stands for Texture Compression).
This has become a widely used de-facto standard and is included in the Microsoft DirectX libraries with adhoc API support.
Compression is performed off-line at compile time and the textures are stored in the main memory. Decompression processes act to compress textures accessing the memory run-time. This means that only decompression is implemented in hardware form while compression is not.
Important parameters for the decompression engine are: steps needed to decompress textures and possible parallel operation; low latency between data-access-from-memory and data-out-from the decompression engine.
In order to better understand operation of the S3TC algorithm one may refer to an image in RGB format, where each color component R (Red) or G (Green) or B (Blue) is a sub-image composed by N pixels in the horizontal dimension and M pixels in vertical dimension. If each color component is coded with P bits, the number of bits per image is N*M*3*P.
For example, assuming N=M=256 and P=8, then the resulting size is 1,572,864 bits. If each sub-image R or G or B is decomposed in not-overlapped blocks of Q pixels in the horizontal dimension and S pixel in the vertical dimension, the number of blocks per sub-image is (N*M)/(Q*S) while per image is [3(NM/(Q*S(WM)] and the number of bits per block is [3*(Q*S)]*P. If, for example Q=S=4 and P=8, then the resulting size of each block is 384 bits. If the number of bits per channel is R=5, G=6, B=5 then the resulting size of each block per image is (4*4)*(5+6+5)=256 bits. The S3TC algorithm is able to compress such an amount of data by 6 times when R=8, G=8, B=8 and 4 times when R=5, G=6, B=5. 64 bits compose the resulting compressed block always sent to decompression stage. This number is the results of the coding steps described below assuming Q=S=4.
To sum up, operation of the S3TC algorithm may be regarded as comprised of the following steps:
i) Decompose the R G B image in non overlapped Q=4*S=4 blocks of R G B colors
ii) Consider the following block composed by 16 pixels each one composed by R, G and B color components:
Pij=Rij U Gij U Bij (this denotes the pixel at the ij position the R G B image, and U is the union operator)
(R11 G11 B11)(R12 G12 B12)(R13 G13 B13)(R14 G14 B14)(R21 G21 B21)(R22 G22 B22)(R23 G23 B23)(R24 G24 B24)(R31 G31 B31)(R32 G32 B32)(R33 G33 B33)(R34 G34 B34)(R41 G41 B41)(R42 G42 B42)(R43 G43 B43)(R44 G44 B44)
iii) Decompose the block above in three sub-blocks called sub-block R, sub-block G and sub-block B as shown hereinbelow, each block including only one color component:
R11 R12 R13 R14sub-block RR21 R22 R23 R24R31 R32 R33 R34R41 R42 R43 R44G11 G12 G13 G14sub-block GG21 G22 G23 G24G31 G32 G33 G34G41 G42 G43 G44B11 B12 B13 B14sub-block BB21 B22 B23 B24B31 B32 B33 B34B41 B42 B43 B44as shown in FIG. 1.
Specifically, FIG. 1 shows RGB blocks ordered in different planes, with a RGB block shown on the left and a corresponding de-composition shown on the right.
iv) Sort in ascending order each sub-block color
v) Detect the black color, which is a pixel made of R=0 and G=0 and B=0
vi) If the black color is not detected, then set a color palette made by                a. 1st color is the minimum value of sub-block R, minimum value of sub-block G, minimum value of sub-block B.        b. 2nd color is the maximum value of sub-block R, maximum value of sub-block G, maximum value of sub-block B        c. 3rd is composed by (2*min R+max R)/3, (2*min G+max G)/3, (2*min B+max B)/3        d. 4th is composed by (min R+2*max R)/3, (min G+2*max G)/3, (min B+2*max B)/3
vii) Otherwise, if black color is detected then set a color palette made by                a. 1st color is minimum value of sub-block R, sub-block G, sub-block B where each of them must not be equal to zero (the black color component) at the same time        b. 2nd color is maximum value of sub-block R, sub-block G, sub-block B        c. 3rd is composed by (min R+max R)/2, (min G+max G)/2, (min B+max B)/2        d. 4th is the black color that has R,G,B components equal to zero
viii) If black color is not detected, define the look-up color palette as
                              Look                                -                              up                                                              table                =                                  [                                                                                Min                                                                                R                                    ,                                                                                Int                                            1                                            R                                        ,                                                                                Int                                        2                                        R                                    ,                                                                                Max                                                                                R                                                                                ]                                                                  [                                                                                Min                                                                                G                                    ,                                                                                Int                                        1                                        G                                    ,                                                                                Int                                        2                                        G                                    ,                                                                                Max                                                                                G                                                                                ]                                                                  [                                                                                Min                                                                                B                                    ,                                                                                Int                                        1                                        B                                    ,                                                                                Int                                        2                                        B                                    ,                                                                                Max                                                                                B                                                                                ]
If black color is detected define the color palette as
                              Look                                -                              up                                                              table                =                                  [                                                                                Min                                                                                R                                    ,                                                                                Int                                            1                                            R                                        ,                                                                                Max                                                                                R                                                                              0                                              ]                                                                  [                                                                                Min                                                                                G                                    ,                                                                                Int                                        1                                        G                                    ,                                                                                Max                                                                                G                                                                              0                                              ]                                                                  [                                                                                Min                                                                                B                                    ,                                                                                Int                                        1                                        B                                    ,                                                                                Max                                                                                B                                                                                0                                              ]
ix) Associate the following 2 bits code (in boldface, under the palette) to each column of the above palette
                                          Look                                      -                                    up                                                                          table                    =                                          [                                                                                Min                                                                                R                                        ,                                                                                Int                                                1                                                R                                            ,                                                                                Int                                            2                                            R                                        ,                                                                                Max                                                                                R                                                                                ]                                                                                [                                                                                Min                                                                                G                                        ,                                                                                Int                                            1                                            G                                        ,                                                                                Int                                            2                                            G                                        ,                                                                                Max                                                                                G                                                                                ]                                                                                [                                                                                Min                                                                                B                                        ,                                                                                Int                                            1                                            B                                        ,                                                                                Int                                            2                                            B                                        ,                                                                                Max                                                                                B                                                                                ]                                                                                00                                                                          01                                                                          10                                                                          11                                                                        Look                                      -                                    up                                                                          table                    =                                          [                                                                                Min                                                                                R                                        ,                                                                                Int                                                1                                                R                                            ,                                                                                Max                                                                                R                                                                                0                                                      ]                                                                                [                                                                                Min                                                                                G                                        ,                                                                                Int                                            1                                            G                                        ,                                                                                Max                                                                                G                                                                                0                                                      ]                                                                                [                                                                                Min                                                                                B                                        ,                                                                                Int                                            1                                            B                                        ,                                                                                Max                                                                                B                                                                                0                                                      ]                                                                                00                                                                          01                                                                          10                                                                          11
x) For each Pij=Rij U Gij U Bij (where i ranges from 1 to Q=4 and j ranges from 1 to S=4) compute the Euclidean distance Dist between it and each look-up color as defined above in vi.a,b,c,d or vii.a,b,c,d depending if black color has been detected or not. Note that the difference is within a homologue color component (between R or G or B).Dist1=√(|Rij−MinR|2+|Gij−MinG|2+|Bij−MinB|2)Dist2=√(|Rij−Int1R|2+|Gij−Int1G|2+|Bij−Int1B|2)Dist3=√(|Rij−Int2R|2+|Gij−Int2G|2+|Bij−Int2B|2)Dist4=√(|Rij−MaxR|2+|Gij−MaxG|2+|Bij−MaxB|2)
xi) For each Pij=Rij U Gij U Bij find the minimum distance among Dist1, Dist2, Dist3 and Dist4. For example let this be Dist1.
xii) Send to a decoder process the code associated to the color enclosed in the look-up table that has the minimum distance. If it is Dist1 then the code is 00.
xiii) The decoder receives for each Q*S block as shown in FIG. 2                a. 2 bits code for each Pij that are addresses to the look-up table        b. MinR MinG MinB        c. MaxR MaxG MaxB
xiv) If Min is received before Max by the decoder, then black has been detected by the encoder otherwise not
xv) As shown in FIG. 2, the decoder operates as described in steps vi or vii depending on black color detection                a. Int1R Int1G Int1B        b. Int2R Int2G Int2B
xvi) As shown in FIG. 2, the decoder addresses a look-up table with 2 bits code associated to each Pij and replaces it with the color stored in the look-up table color palette. Specifically ST, LUT, and CT indicate the source text, the look-up table, and the compressed text, respectively.
FIG. 3 shows how the data sent to the decoder are arranged in a bitstream and if the black color is not detected, while FIG. 4 shows the opposite case.
As stated before, the compression ratio is 6:1 or 4:1. This is because if colors are in R=8 G=8 B=8 format then 384 bits are coded with 64 (384/64=6) and if colors are in R=5 G=6 B=5 format then 256 bits are coded with 64 (256/64=4).
As shown in FIGS. 3 and 4, the sum of all the bits amounts to 64.

Methods and apparatus for texture compression and computer program product therefor


A pharmaceutical delivery system that releases an active agent in a controlled manner for an extended period in the vaginal cavity to treat or cure ailments associated with the vaginal cavity or proximal areas. The delivery system includes an applicator which is composed of a high internal phase emulsion, allowing the delivery system to adhere to the mueosal surfaces of the body, primarily the lining of vaginal cavity. The delivery system can maintain the high internal phase emulsion at a temperature of 86° F. for at least one month, without decomposition or instability of the emulsion.

Medical treatment of the female reproductive system for the prevention, control, diagnosis, and cure of disease typically involves the delivery of pharmaceutically active agents to the vaginal cavity and proximal organs. Generally, agents are put in the form of gels, foams, creams, suppositories, and dissolving tablets, or other forms generally known in the art. However, these forms of delivery have not demonstrated the ability to deliver active agents to the vaginal cavity in a controlled manner, particularly for periods of three hours or longer, while providing a high level of bioadherence and a high level of stability in environments having either high or low temperatures.
The biological characteristics of the vagina and proximal areas make it difficult to treat and deliver agents to the vaginal cavity. For example, the vaginal cavity exhibits an aqueous environment, with fluids having a pH in the range of 4.5 to 5.5 and an internal temperature of approximately 98.6° F. (37° C.). The environment of the vaginal cavity is also conducive to the growth of microorganisms, such as bacteria and fungi, including yeast, and the retention of foreign particulates, such as seminal fluid resulting from intercourse, and menstrual debris. The vaginal cavity is also characterized by the ability for considerable physical deformation, such as that resulting from sexual intercourse or insertion of tampons.
Agents, such as fungicides, have typically been used to treat ailments and afflictions in the vaginal cavity. However, the pharmaceutical and chemical activity of these agents has not reached an optimal level of effectiveness. This limitation in effectiveness is due, in part or in whole, to the inadequacy of the currently available delivery systems. In fact, the currently available delivery systems have not shown the ability to release a pharmaceutically active agent in an optimally safe manner for periods of three hours or greater, without encountering problems related to bioadherence or excessive release of the active pharmaceutical ingredient. For instance, delivery systems that are available generally begin to either solubilize, disperse or liquefy almost immediately following insertion into the vaginal cavity. Thus, these delivery systems typically have minimal bioadherence to the vaginal walls.
Conventional delivery systems having a large proportion of propylene glycol in the formulation have been used to enhance the availability of the incorporated drug. The advantage being taken of both the potential solubilization of the active pharmaceutical compound in a solvent like molecule such as propylene glycol and the increased penetration potential afforded by propylene glycol through biological membranes. This extrapolation to delivery systems for mucosal membranes can be overstated, particularly when used in the vaginal cavity. The aqueous nature of the environment provides optimum conditions for systemic absorption of solubilized active pharmaceutical compounds. Inclusion of high concentrations of compounds which solubilize active pharmaceutical agents can increase the systemic absorption potential of that agent. Though in some instances this is a desired effect, in the treatment of local mucosal infections the removal of the beneficial drug from the immediate area can prolong the treatment regime, and in some cases may cause systemic absorption of active pharmaceutical compounds to reach levels that are not beneficial.
In addition there can be physical aspects of the delivery system that are compromised by the inclusion of moderate to excessive amounts of propylene glycol. For conventional emulsions, moderate to excessive amounts propylene glycol can add to the solubilization and liquification of the delivery system in the hydrophilic environment of the vaginal cavity. For more unique emulsion systems the inclusion of higher levels of propylene glycol can lead to physical instability at both ambient and elevated temperatures.
As a result, the emulsions of conventional and unique delivery systems may not provide optimal treatment in the vaginal cavity. There is an unmet need in the art for a controlled release delivery system providing optimal treatment of vaginal ailments and afflictions. Accordingly, there is an unmet need for a delivery system providing a consistent release of a pharmaceutically active agent to the vaginal cavity, specifically a system allowing pharmaceutical activity for an extended period of time, such as at least three hours, and providing high levels of bioadherence. Furthermore, there is an unmet need in the art for a delivery system that reduces the proportion of propylene glycol in the formulation.


A method for signal processing of measurement signals of a vortex flow transducer for measuring flow of a medium through a measuring tube. The method is characterized by low needs as regards computing power and memory space. The transducer includes a bluff body arranged in the measuring tube and a sensor for registering pressure fluctuations arising at the bluff body and for converting such pressure fluctuations into an electrical measurement signal. In the method, at least a portion of the measurement signal is sampled and digitized, an autocorrelation of the digitized measurement signal is calculated, and the flow is derived on the basis of at least one characteristic of the autocorrelation.

Vortex flow transducers are used in industrial measurements technology for measuring volume flow. They work according to the principle of the Karman vortex street. In such case, a medium, whose volume flow, e.g. flow rate, is to be measured, is allowed to pass through a measuring tube containing a bluff body. Behind the bluff body, vortices of opposite rotational sense form alternately from both sides of the bluff body. Associated with these vortices are areas of reduced pressure. The pressure fluctuations are registered by the transducer and converted into electrical measurement signals. The vortices form, within the design limits of the transducer, very regularly. The number of vortices produced per unit time is proportional to the volume flow rate.
Suitable for registering the pressure fluctuations are e.g. capacitive sensors, such as are described in European Patent EP-B1 0 229 933.
The electrical measurement signals derived from the transducer exhibit, in the ideal case, a sinusoidal behavior. Current practice is to ascertain the number of vortices per unit time therefrom on the basis of the zero-crossings of the electrical signal. In such case e.g. the time from one zero-crossing to the next is measured, or e.g. in a time interval, the time from the first to the last zero-crossing and the number of zero-crossings occurring in the time interval are ascertained.
Under real measurement conditions, the case can arise in which disturbances are superimposed on the ideal, sinusoidal signal, such that an additional zero-crossing occurs, or a zero-crossing disappears. Such measurement errors are detected only with great difficulty.
A further disadvantage of such methods is that, additionally, there is information present in the signal, such as its amplitude or its harmonics, which goes unused.
This information can be captured for use, by performing a frequency determination, for example by means of a fast Fourier transform (FFT). Such methods require, however, that the measurement signal be digitized using a high sampling rate and that, at least temporarily, a large number of sampled values be stored. Moreover, this form of frequency determination requires a large number of mathematical operations.
Vortex flow meters are already currently available in the form of so-called two-wire devices. Such two-wire devices have two connecting lines, via which both the energy, or power, supply of the device and also the transmission of the measurement results are accomplished. In industrial applications, a standard has arisen for these two-wire devices, according to which the energy supply uses a 24-volt voltage source and the current flowing through the connecting lines is controlled to values between 4 mA and 20 mA, depending on the measurement results to be transmitted. As a result, only a small electrical power is available to these transducers, and, correspondingly, the achievable computing power is narrowly limited.

Method for signal processing of measurement signals of a vortex flow transducer


Example embodiments provide systems and methods for replacing recorded media content. In an example method, at least one media content source is searched for a media content item recorded to storage of a first media content device. Based on the media content item being found at a first media content source of the at least one media content source, a recording of the media content item to storage of a second media content device is scheduled based on the media content item being recordable from the first media content source at the second media content device. Based on the media content item not being recordable from the first media content source at the second media device, the availability of the media content item is indicated to the second media content device.

Television viewers have long employed digital video recorders (DVRs) (sometimes referred to as personal video recorders (PVRs)) to record and store programs for viewing at a later, more convenient time. Typically, such devices are either integrated within a television set-top box (STB) for receiving signals via a cable or satellite television distribution network, or utilized as a standalone unit.
Unlike older videocassette recorders (VCRs), which used a removable video tape cartridge as a recording medium, most DVRs employ a non-removable hard disk drive for program storage. Moreover, most DVRs do not possess the ability to offload the programs stored therein to an external storage medium. Consequently, when the DVR is no longer in service, such as when the DVR or associated STB fails, or when the DVR or STB is a replaced with a different (e.g., newer) model, all recorded programs stored on the DVR typically become inaccessible to the viewer.


A two dimensional piezoelectric positioning device of the type including a thin walled cylindrical shaped member of piezoelectric material. A plurality of substantially rectangular shaped members are positioned around one surface of the cylindrical shaped member to form opposite pairs of electrodes to control the two dimensional movement in accordance with voltages applied to the pairs of electrodes. Each rectangular shaped member is split into at least two electrode portions and with particular polarity voltages applied to the individual electrode portions to maintain a substantially constant length for the cylindrical shaped member during the two dimensional movement.

1. Field of the Invention
The present invention relates to an improved design of a piezoelectric positioning device for scanning probe microscopes to control the relative position of the surface of a sample under observation to a tip member. Specifically, the present invention relates to an improved electrode arrangement for a piezoelectric device to eliminate tilting of the device during scanning.
2. Description of the Prior Art
In general, a scanning probe microscope operates by positioning a conducting tip or needle either just touching or very close to the surface of a conducting sample. In particular, if the scanning probe microscope is a scanning tunneling microscope, the relative position between the tip and the surface is approximately ten angstroms (10 .ANG.) above the surface of the sample and as described in the prior art, a tunneling current flowing between the sample and the tip is used to detect the profile of the surface. If the scanning probe microscope is an atomic force microscope then the tip just touches the surface of the sample and detection of the position of the tip is produced as provided in the prior art.
In general, scanning probe microscopes include positioning apparatus so as to control the relative scan between the tip and the surface of the sample in an X-Y raster scan while keeping the tip just in contact with the surface of the sample or a substantially constant height above the surface. In both types of scanning probe microscopes it is possible to, either keep the tip stationary and move the sample with the positioning device in order to perform the scan, or to keep the sample stationary and move the tip with the positioning device in order to perform the scan. In general, although this is not necessary, a scanning tunneling microscope normally has the sample stationary with the tip movable whereas an atomic force microscope normally has the tip stationary and the sample movable relative to the tip.
Our prior art U.S. Pat. No. 4,871,938 issued on Oct. 3, 1989 was directed to a specific problem relating to the nonperpendicular nature of the X-Y scan for positioning devices prior to the '938 patent and also for minimizing horizontal-vertical cross-coupling and in particular for minimizing the vertical-horizontal cross-coupling at the side of the tube where the tip was mounted.
In our prior art design, and in particular the embodiment which used a cylindrical positioning device, a "pentrode" design was used which kept the side of the tube on which the tip was mounted from moving up and down as the tube was scanned side to side. Although this design was excellent for a tip that is mounted at one point on the scanner, the design does not work well when the sample is mounted on the end of the positioning device. In our previous design the tube tilts as the sample is scanned in the X and Y directions. As indicated above, mounting the sample on the end of the positioning device is the preferred form for an atomic force microscope, but is to be appreciated that a scanning tunneling microscope may also be operated in the same way.

Positioning device for scanning probe microscopes


An eccentric screw machine (10) demonstrates a Stator (11) having an inner lining (17), which demonstrates teeth projecting inwards. The tips of these teeth are provided with micro-ribs (26 to 29), which are embodied asymmetrically with respect to the radials (R). They preferably demonstrate a flatly rising edge (30) and a steeply falling edge (31). This thus results in improved operating performance, depending on the direction of rotation.

The invention relates to an eccentric screw machine, an eccentric screw motor or an eccentric screw pump for example, especially for sludgy media.
Eccentric screw machines are known from DE 102 45 497 B3 for example. They consist of a stator, which demonstrates a screw-shaped channel within which a screw-shaped rotor rotates. The screw-shaped channel defines a cross section which corresponds to a profile of an internal helical cut gearwheel. The cross section of the rotor corresponds to a pinion, which has one tooth less than the rotor. Together, the rotor and stator form chambers. When the rotor rotates, the center point of the cross section ideally moves on a circular path. Each cross section of the rotor thus executes an orbital movement around the longitudinal axis of the channel, the rotor also rotating around itself. Since the exterior surface of the rotor and the channel in the stator are both screw-shaped with the same direction of rotation, approximately banana-shaped hollows arise along the rotor advancing from one end of the stator toward the other end while the rotor is in motion. Other chambers, which are enclosed by other areas of the stator and other areas of the rotor, seal and separate each of these banana-shaped chambers. The stator is provided with an elastomeric lining to ensure a good seal between the separate chambers. To extend the temperature range of such eccentric screw pumps which are known in principle, the citation suggests that additional ribs, which run along the teeth, be mounted on the stator. The rotor elastically deforms these additional ribs, wherein they locally increase the surface pressure between the elastomeric lining and the rotor. The contact pressure between the rotor and stator can thereby be reduced overall. Moreover, the flexibility of the elastomeric lining is increased. In addition, space for accommodating material is created between the separate ribs, thereby improving the ability of the material to avoid the rotor.
Another eccentric screw pump, which is similarly constructed in principle, is known from EP 0 764 783 A1. However in place of continuous ribs on the elastomeric lining, there are provided finely structured projections in the shape of round heads, which are scaly and arranged one behind the other in rows. In this connection, the individual heads of one row are displaced relative to the heads of the adjacent row by approximately half the length of the heads of one row. Indentations, which separate the heads from one another, are located between the heads. This is intended to achieve a nonlinear impression characteristic of the individual projections, wherein the indentations located between the projecting parts are not formed as wide separation channels, but rather in such a manner that the pumped fluid or mash produces a lubricating effect that is not impaired when the fluid or mash is discharged. In particular, thusly designed eccentric screw pumps are supposed to require lower initial break-away torques during startup.
Eccentric screw machines of the above type are supposed to have a frictional resistance that is as low as possible during operation, wherein the chambers are supposed to be sealed relative to one another and wherein the wear of the elastomeric lining and/or the rotor is supposed to be low.

Eccentric screw machine with asymmetrical projections


A ratchet wrench including a head section formed with two slots and two pawls each having a post slidably fitted through the slots. The ratchet wrench further includes a shift member formed with two slots respectively intersecting the slots of the head section. The posts of the pawls are slidably inlaid in the slots of the head section and the slots of the shift member. By means of shifting the shift member, the pawls can be directly driven to slide along the slots, whereby one of the pawls is engaged with the ratchet wheel, while the other of the pawls is disengaged from the ratchet wheel.

The present invention is related to a ratchet wrench, and more particularly to a ratchet wrench having fewer components to lower manufacturing cost.
FIG. 9 shows a conventional ratchet wrench including a main body 7, a ratchet wheel 8, two pawls 81, a shift member 82 and a transmission member 83.
The main body 7 has a head section 71 formed with a receiving space 72 in which the ratchet wheel 8 is disposed. A cavity is formed at a front end of the handle of the main body 7 and communicates with the receiving space 72. The two pawls 81 are accommodated in the cavity. A spring 811 is compressed between the two pawls 81. Each pawl 81 has a boss 812.
The shift member 82 is arranged on a surface of the head section 71 of the main body 7. The shift member 82 has hub section 821. The hub section 821 is fitted through a through hole 73 formed on the surface of the head section 71. The transmission member 83 has a fitting column 831 fitted in the hub section 821. The transmission member 83 is formed with two connecting holes 832 in which the bosses 812 of the pawls 81 are respectively fitted. By means of shifting the shift member 82, the two pawls 81 can be driven and switched to selectively engage with the ratchet wheel 8 or disengage therefrom.
The conventional ratchet wrench includes numerous complicated components. It costs much time to manufacture and assemble these components so that the cost for the conventional ratchet wrench is relatively high. This makes the conventional ratchet wrench lack competitive ability on the market.


A guide wire includes a first wire located at the distal end of the guide wire, a second wire located at the proximal end of the guide wire and having a flexural rigidity greater than that of the first wire, and a tubular connector for joining the first and second wires. The connector has one or more grooves or slits formed on the distal side of the boundary between the first wire and the second wire. The connector is formed of a material different from the material of the first wire. The proximal portion of the first wire is provided with a thin metal coating. The first wire is joined to the connector by brazing at the portion provided with the thin metal coating.

This invention relates to a guide wire, especially a guide wire used to guide a catheter or other tubular medical devices to a target place in the body of a patient.
A guide wire is used to guide a catheter in treatment of the body parts on which open surgery is difficult or in treatment or examination for the purpose of reducing the invasiveness to the body such as PTCA (Percutaneous Transluminal Coronary Angioplasty) and cardiovascular angioplasty to the target place in the body. The guide wire used in the PTCA procedure is passed through the catheter before the catheter is inserted into a blood vessel, and the guide wire is used to guide the catheter to the vicinity of the target stenosed part in a blood vessel.
The guide wire used in the PTCA process is inserted in a blood vessel together with the catheter, with the distal end portion of the guide wire being protruded from the distal end of the catheter, to the vicinity of the target stenosed part in a blood vessel, and guides the distal end portion of the catheter to the target stenosed part. The distal end portion of the catheter has various shapes according to the purpose and the location in the body for which the catheter is designed, and has a flexibility which allows the catheter to follow complicated shapes of blood vessels and other organs in the body.
Since blood vessels bend in a complicated manner, a guide wire used to insert a catheter into a blood vessel must have a proper flexibility, pushability and torque-transmitting capability (operatability is a generic term for these two properties in combination), and kink resistance (property which resists sharp bending). A guide wire can have a metal coil with an appropriate flexibility attached around the distal end portion of a small-diameter core material to provide a proper amount of flexibility, or the guide wire can use a wire of a super elastic alloy such as Ni-Ti as the core material.
Conventional guide wires have a core material formed of substantially a single material, and a material with a relatively high rigidity is used to increase the operatability of the guide wire. As a result, the distal end portion of guide wire does not have a sufficient flexibility. On the other hand, if a material with a relatively low rigidity is used to increase the flexibility of the distal end portion of the guide wire, the operatability of the proximal end portion decreases. Therefore, it has been thought that is difficult to satisfy both the requested flexibility and operatability with a single core material.
To solve this problem, a guide wire is known which uses a core material formed of Ni-Ti alloy, for example, and having its distal end portion heat-treated and proximal end portion in different conditions to increase the flexibility of the distal end portion and the rigidity of the proximal end portion. However, there is a limitation of the control of flexibility by such heat treatment; it is not always possible to give the proximal end portion a satisfactory rigidity while making the distal end portion sufficiently flexible.
A guide wire made by joining a Ni-Ti alloy wire and a stainless steel wire with a tubular connector of Ni-Ti alloy to satisfy the desired flexibility for the distal end portion and a high rigidity for the proximal end portion is disclosed in Japanese Patent Application Laid Open No. 1992-9162. Since the tubular connector of Ni-Ti alloy used in this invention has a uniform rigidity over the entire length, there is a relatively large difference in the rigidity between the Ni-Ti alloy wire and the stainless steel wire which have different rigidities. As the result, a stress concentration occurs at the joint of the Ni-Ti alloy wire and the stainless steel wire, which can cause kink or decrease the operatability.

Guide wire having tubular connector with helical slits


A temperature regulation system for a vehicle includes a drive system configured to be coupled to an engine of the vehicle. The drive system is configured to convert power produced by the engine into electrical power for use by at least one traction motor of the vehicle. The system further includes a control unit for controlling the engine and drive system. The control unit is configured to automatically regulate a temperature of a vehicle component in dependence upon a detected reference temperature.

Large off-highway vehicles ("OHVs"), such as mining vehicles used to haul heavy payloads excavated from open pit mines, are well known and typically employ motorized wheels for propelling or retarding the vehicle in an energy efficient manner. This efficiency is typically accomplished by employing a large horsepower diesel engine in conjunction with an alternator, a main traction inverter, and a pair of wheel drive assemblies housed within the rear tires of the vehicle. The diesel engine is directly associated with the alternator such that the diesel engine drives the alternator. The alternator powers the main traction inverter, which supplies electrical power having a controlled voltage and frequency to electric drive motors of the two wheel drive assemblies. Each wheel drive assembly houses a planetary gear transmission that converts the rotation of the associated drive motor energy into a high torque low speed rotational energy output which is supplied to the rear wheels.
Typical operating loads in an OHV may exceed one hundred tons, while the gross weight of the vehicle and load may be several hundred tons. Besides hauling heavy loads, OHVs frequently operate in remote locations with extreme climatic conditions where temperatures may go as low as −30° C. to −60° C. At such extreme cold temperatures, when the OHV is parked or in an idle state, the engine may not generate enough heat on its own to maintain its operating temperature within ranges necessary for sufficient performance. In addition, drive system components may be damaged or exhibit performance degradation in such extreme cold.
Accordingly, it may be desirable to provide a system and method for regulating the temperature of the engine and/or drive system components of OHVs and other mining equipment in conditions of extreme cold.

Vehicle temperature regulation system and method


A rotary latch for selectively locking a closure, such as a tonneau cover, is provided with a joystick or toggle release lever. The joystick release lever enables the rotary latch to be installed in any position with respect to a remote handle because the joystick can be pulled in any direction, 360 degrees, to release the rotary latch. The joystick includes a trapped base supporting a spherical portion that is nested in a circular opening in the housing of the latch. The joystick is spring loaded, and is movable about its central axis in any direction, causing the base to pivot against the inside of the housing. The base of the joystick is positioned over a spring-loaded catch locking the rotary latch. As the base of the joystick rotates against the inside of the housing, it depresses the spring-loaded catch, releasing the rotary latch.

1. Field of the Invention
The invention relates to a rotary latch.
2. Description of Related Art
Rotary latches are well known in the art, providing a strong, compact latching mechanism for many applications. A rotary latch generally includes a housing portion fixed to a first structure having a U-shaped slot configured to receive a post fixed to an opposing structure. A C-shaped latch is pivotally attached within the housing and arranged to rotate from a latched position within and perpendicular to the U-shaped slot to an unlatched position. In the latched position, the C-shaped latch and the U-shaped notch overlap to define a central opening configured to hold the post. In the unlatched position, the C-shaped latch is rotated toward the opening of the U-shaped slot, allowing the post to move into or out of the U-shaped slot. The C-shaped latch usually includes a catch on its body in an opposing position to the opening of the "C" relative to the pivot point of the latch. The catch is configured to act in concert with a trip lever pivotally mounted within the housing. The C-shaped latch and the trip lever are generally spring-biased. The C-shaped latch is biased in an open position and the trip lever is biased in a locked position. When the C-shaped latch is moved into the closed position, the trip lever is biased to engage the catch, holding the C-shaped latch in the closed position. The C-shaped latch is released by rotating the trip lever until it disengages from the catch. A stud is usually mounted to the trip lever for attachment of a release cable. Because of the configuration of the trip lever having a fixed pivot axle, it is necessary to arrange the release cable in a very narrow approach angle to the stud, in order to be able to pivot the trip lever with a minimal force exerted on and by the release cable. In the known arrangement, the release cable is generally aligned parallel to the housing of the rotary latch. Deviations from the optimal attachment of the release cable to the stud, with a tangential positioning of the cable relative to the pivot axis of the trip lever, unnecessarily increase the force required to release the rotary latch. The mechanical advantage available in the trip lever can therefore be lost by suboptimal positioning of the cable. Also, in different applications, it becomes necessary to modify the configuration of the trip lever and the stud so that the release cable can even access the stud. This necessitates the manufacture and stocking of multiple configurations of rotary latch assemblies, dependent upon the variety of applications used in a particular assembly.
It would be advantageous to provide a rotary latch system that provides the maximum available mechanical advantage regardless of the exact alignment of the release cable relative to the pivot axis of the trip lever. It would further be advantageous to provide a rotary latch system that improves the accessibility of a release mechanism in different applications without requiring the physical modification of the rotary latch.


The present invention relates to novel thermoplastic polyurethane (TPU) compositions that have crystalline chain ends. The TPU compositions of the invention can provide improved resiliency, lower surface free energy, and/or reduced stickiness, while maintaining other desirable physical properties. The present invention also provides the described TPU compositions that are further grafted with vinyl alkoxysilane moieties allowing for crosslinked networks of the TPU compositions. The present invention also provides plasticizer-free, very soft TPU compositions without the processing difficulties often associated with such materials. The invention further provides means of reducing the surface tension of a TPU composition which can allow for improved blend compositions, and means of crosslinking the described TPU compositions.

Thermoplastic polyurethane (TPU) compositions are highly useful materials that can provide an attractive combination of physical properties. TPUs may be generally described as segmented copolymers, having one or more low glass transition temperature (Tg) soft segments and one or more high Tg hard segments.
There is a continuing need to provide improved TPU compositions that provide improved physical properties, that are easier to process, that are easier to scale to commercial quantities, that can be made via a continuous process, that are more versatile in how they can be used with other materials, or some combination thereof.
There is an ongoing need for TPU compositions that can be more easily processed, and which have improved processing windows, and more specifically, can be scaled to continuous commercial quantity processes. Many TPU compositions have very narrow processing windows, a very tight set of conditions under which they process well. Small changes in processing conditions, which cannot always be easily controlled, can lead to significant variations in product quality. Thus, there are many TPU compositions that could be made in the lab, and which could have interesting combinations of properties, but which effectively cannot be commercialized because they cannot be produced in commercially effective processes.
Thus, there is a need for TPU compositions that can be more easily processed, and which have improved processing windows, which are not as sensitive to changes in processing conditions, including developing TPU compositions with desired combinations of properties that can be produced in commercially effective processes, for example, continuous reactive extruders.
Also, there is an ongoing need for softer TPU compositions that can be easily processed. It is understood that as the amount of hard segment in the TPU is increased, the resulting material gets harder and harder, and likewise, reducing the amount of hard segment in the TPU can result in softer and softer TPU. However, there is a lower limit of hardness that can be reached by changing the hard segment content or type or soft segment content and type. Below this lower limit, the TPU starts losing its strength and becomes too sticky. It becomes more difficult to handle and process, due to the increased stickiness, etc., and eventually becomes impossible to process and/or manufacture. Thus, this lower limit prevents the production and use of "ultra-soft" TPU compositions.
Traditionally, the lowest hardness that can be achieved in a processable TPU without using plasticizer is about Shore 65-70A. However, production of even these TPU compositions is very challenging due to lower solidification or crystallization rates and ever present sticking issues (the TPU composition literally sticks to all equipment surfaces it contacts and to itself). Using a plasticizer in the TPU composition can bring the hardness down to lower values but often times plasticizers are not desired due to their toxicity (phthalate type plasticizers in particular are relatively toxic and not acceptable in many applications) and/or incompatibility (many plasticizers cause blooming in the resulting TPU composition).
Thus, there is always a need for more processable (i.e., extrudable, moldable, etc.), ultra-soft (i.e., Shore hardness below 65A), TPU compositions and methods of making the same. There is particularly a need for plasticizer-free TPU compositions that are ultra-soft and processable. There is also a need for crosslinked TPU networks made from such TPU's and processes of making the same. The present invention addresses these needs.
There is an ongoing need for TPU compositions that can be easily cross-linked. One method of providing cross-linkable TPU compositions is to graft a cross-linkable group or moiety onto the TPU itself and then cross-linking the groups to give a cross-linked TPU network. However, many cross-linkable groups or moieties, like vinyl alkoxysilane moieties, are difficult or even impossible to graft on to TPU compositions.
Thus, there is a need for a TPU compositions that can be easily grafted with a cross-linkable group or moiety, like a vinyl alkoxysilane moiety, thus allowing for easily cross-linkable TPU compositions.
There is also a need to provide a TPU that is more compatible with other polymers, particularly polyolefins. Blending TPU compositions, which are generally considered to be expensive materials, with less expensive materials, for example, polyolefins is an attractive goal for many manufactures that make products from TPU compositions. The blend would be less expensive than using all TPU to make their products. However, TPU compositions generally have poor compatibility with other polymers like polyolefins, resulting in blends that process poorly, have poor physical properties, or other drawbacks.
Thus, there is a need for TPU compositions that have improved compatibility with other polymers like polyolefins, thus allowing for the preparation and use of blends containing TPU compositions and polymers like polyolefins, while still maintaining the physical properties and quality required by manufactures that make products from TPU compositions.
There is a need for TPU compositions that can be easily cross-linked. As noted above, one method of providing cross-linkable TPU compositions is to graft a cross-linkable group or moiety onto the TPU itself and then cross-linking the groups to give a cross-linked TPU network. However, many cross-linkable groups or moieties, like vinyl alkoxysilane moieties, are difficult or even impossible to graft on to TPU compositions. In addition, this grafting step, even if it can be done easily, adds cost and complexity. A more ideal result would be a TPU that is readily cross-linkable without the need for a grafting step at all.
Thus, there is a need for TPU compositions that are easily cross-linkable with the need to graft a group or moiety onto the TPU first.
Various embodiments of the invention described herein address one or more of the needs described above.

Thermoplastic polyurethanes with crystalline chain ends


An electrical device (100) for interconnecting two parallel printed circuit boards at a large distance includes a plug connector (1), a receptacle connector (1′), and a mating extender (2) disposed between the plug connector and the receptacle connector. The mating extender includes a subassembly of wafer (21), a pair of identical caps (20) disposed on the top and bottom portions of the subassembly of wafer, and a pair of shroud-halves (22) sliding on the subassembly of the wafer. The subassembly of wafer is made up of a number of wafer modules (24) parallel with each other. Each wafer module has a wafer support (26) and a number of contacts (28) embedded in the wafer support.

1. Field of the Invention
The present invention relates to an electrical device for interconnecting two printed circuit boards (PCBs), and more particularly to an electrical device for interconnecting two parallel PCBs at a large distance.
2. Description of the Prior Art
Board mountable connectors are widely used to establish electrical connections between two separated PCBs. Usually, there are two connectors, a plug connector and a receptacle connector, respectively mounted onto the two separated PCBs and engagable with each other. However, in some situations, PCBs may be positioned at a large distance, thus in order to interconnecting two PCBs, the plug and the receptacle connectors have to span and thus would be fairly tall. U.S. Pat. No. 6,394,822 B1 discloses such an electrical connector assembly comprising a plug and a receptacle. The plug and the receptacle both comprise a number of parallel modules. Each module comprises an insulative support, a plurality of signal contacts attached on one side of the support and a shielding plate attached on another side of the support. Thus, in order to satisfy a relatively higher mating height, the plug, the receptacle and the modules have to span, thereby accordingly complicating the manufacture process and increasing product cost.
One solution to the above issue is to provide two identical board mountable connectors respectively mounted on the two PCBs, and an extender engagable with the board mountable connectors.
Accordingly, there is a need for providing an effective and economical solution for the requirement of a high stack height application. To that end, the use of some kind of cost-effective PCB interconnection device, which ensures reliable electrical connection between two PCBs and provides an easy assembly, is desirable.

Electrical device for interconnecting two printed circuit boards at a large distance


The present invention provides a method of predicting the risk of a patient for developing cutaneous adverse drug reaction to non-nucleoside reverse transcriptase inhibitors such as nevirapine by using HLA-B*3505 allele and/or polymorphisms in the CCHCR1 gene.

Adverse drug reactions occur during the drug development process and post-marketing of the prescribe-based medicine. They are responsible for the termination of approximately 20% of investigational new drugs in the pharmaceutical pipeline. About 1% of marketed drugs is withdrawn or restricted post-marketing due to safety-related issues.
During 1994, adverse drug reactions affected over 2 million people in the United States, resulting in over 100,000 deaths (Lazarou et al., JAMA 1998).
In 2002, adverse drug reactions accounted for 6.5% of hospital admissions and 0.15% of subsequent deaths in the United Kingdom (Pirmohamed et al., BMJ 2004).
Cutaneous adverse drug reactions are among the most common adverse drug reactions and may caused by immune or non-immune mechanisms. The severities of cutaneous reactions were graded according to Division of AIDs table for grading the severities of adverse events NIAID/NIH. Briefly, grade 1: localized macular rash; grade 2: diffuse macular, maculopapular or morbilliform rash or target lesions; grade 3: diffuse macular, maculopapular or morbilliform rash with vesicle or limited number of bullae or superficial ulceration of mucous membrane limited to one site; and grade 4: extensive or generalized bullous lesions or Stevens-Johnson syndrome (SJS) or ulceration of mucous membrane involving two or more distinct mucosal sites or toxic epidermal necrolysis (TEN). (www3.niaid.nih.gov/research/resources/DAIDSClinRsrch/PDF/Safety/DAIDSAEGradingTable.pdf)
Risk factors for the development of cutaneous adverse drug reaction may be related to the host factors (eg. certain HLA alleles), the drug and its metabolites (e.g. its reactivity), and underlying conditions (e.g. viral infections). Antibiotics, nonsteroidal anti-inflammation agents, anticonvulsant drugs (Raviglione et al., Drug Saf 1990), allopurinol (Hung et al., Proc Natl Acad Sci USA 2005), antiretroviral agents, particularly abacavir (Abel et al., N Engl J Med 2008) and nevirapine (Kiertiburanakul et al., Curr HIV res 2008), are among the most common causative agents.
Pharmacognomics is the study of biomarkers variations such as genetic variation, RNA variations, protein variations or combination of these variation in the response to medications. The development of pharmacogenomics has implied that the susceptibility to adverse drug reactions is associated with genetic variants. A successful example of the application of pharmacogenomic study to prevent hypersensitivity syndromes is genotyping of HLA-B*5701 before prescribing abacavir in whites. Abacavir is a potent HIV-1 nucleoside analogue reverse transcriptase inhibitor which is complicated by a potentially life threatening hypersensitivity syndrome in about 5% of cases. These reactions are characterized by skin rash, gastrointestinal and respiratory manifestations and can occasionally be fatal, particularly on drug rechallenge. Prospective screening for HLA-B*5701 decreased abacavir hypersensitivity reaction incidence in mix French population from 12% before screening to 0% after screening, and the rate of unwarranted interruptions of abacavir therapy decreased from 10.2% to 0.73%. (Zucman et al., J Acquir Immune Defic Syndr 2007)
Human immunodeficiency virus (HIV) infection and acquired immune deficiency syndrome (AIDS) is a significant health problem. By the end of year 2006, 32.2 million individuals were infected and living with HIV worldwide. In 2006 alone, 2.5 million new HIV infection with 2.1 million HIV-related deaths or 5,760 people deaths daily occurs, an estimated 32 million people have died from AIDS since the beginning of the pandemic. Approximately 95% of infected patients living in developing countries especially in Africa, Asian and South America. (UNAID/WHO, 2007)
For Thailand, based on an expert Thais working group estimated 1,109,000 people were infected with HIV, 600,600 anticipated deaths, 508,300 people living with HIV that required continuing care and treatment and 17,000 new cases for 2006 (www.epid.moph.go.th). While the incidence and mortality keeps reducing in Thailand, the delivery of appropriate cares of those who infected prolong patient' life and increase the quality of life.
High Active Antiretroviral Therapy (HAART), the combination of at least three antiretroviral agents comprising at least two NRTIs (Nucleoside Reverse Transcriptase Inhibitors) in combination with at least 1 NNRTI (Non-Nucleoside Reverse Transcriptase Inhibitor) or 1-2 PI (Protease Inhibitor) taken concurrently, represents the current standard of care with antiretroviral therapy. The goal of HAART is to suppress HIV replication to a level below the limit of detection by viral load assays and dramatically improve the patient immune function that results in reduced HIV-related morbidity and mortality and improve quality of life. (aidinfo.nih.gov/ContentFiles/AdultandAldolescentGL.pdf)
Thailand's National Access to Antiretroviral Program for People living with HIV/AIDS (NAPHA) and The Universal health care policy of Thailand were implemented nationwide of antiretroviral therapy to different levels of the public health system increasing dramatically with the number of patients who receiving antiretroviral drug especially GPO-VIR, the fixed-dose combination of stavudine, lamivudine and nevirapine, produced by the Government Pharmaceutical Organization (GPO). GPO-VIR can be taken only 2 tablets per day with the affordably prices making it has been recommended as the first line drug in Thailand.
Non-Nucleoside Reverse Transcriptase Inhibitors comprising nevirapine (NVP), efavirenz (EFV) and dilavirdine (DLV) bind directly to reverse transcriptase enzyme, the binding stops the ability of the reverse transcriptase in replication process. Cutaneous adverse drug reaction is a common side effect of all three NNRTIs. Efavirenz and nevirapine has been recommended as the first line drug in Thailand 2006/2007 because of its effectiveness, easy to administrate with good adherence, excellent food compatibility with affordable prices. Efavirenz has not been made available in combination pill format, patient has to take 7-8 pills per day compare to fixed combination pill consisted of nevirapine as a backbone. EFV is teratogenic and contraindicated in pregnancy, Currently Dilavirdine is not available in majority of developing countries.
EFV is a good alternative for NVP, when hypersensitivity or hepatitis develop in patients who took NVP, The common side effects of EFV included but not limited to drug rash, hepatitis. Both of these side effects had been found less frequent than NVP at rate of 11% and 9% respectively. Central nervous system side effects are more pronounced with EFV, the symptoms include dizziness, vivid dream confusion, suicidal idea, all of these CNS side effects are usually resolved spontaneously after 2 weeks of drug intake (Lee et al., Int Conf AIDS. 2004).
Nevirapine can be used as a single dose intervention peripartum for the prevention of mother-to-child transmission of HIV. It represents an attractive option for patients who must take antiretroviral medications and who prefer a protease inhibitor-sparing regimen as drug resistance regimen. Although antiretroviral therapy is known for its effective treatment, the adverse reaction of drugs is the cause of concern for prescription of NVP. In HIV patients with nevirapine treatment, between 16%-48% of patients reported rash. Second to rash development is hepatitis that can be found in 7-15.6% including fever, nausea, vomiting and dizziness. Furthermore 0.5%4% of patients eventually developed Stevens-Johnson syndrome (SJS) or Toxic epidermal Necrolysis.
The mechanism of nevirapine-induced skin rash is unknown. Some clinical features or characteristics that were associated with nevirapine-induced skin rash had been described such as female gender, low body weight, pretreatment with antiretroviral drugs prior to the nevirapine treatment, a higher level of the number of CD4-positive cells at the beginning of the treatment and HLA typing (de Maat[n 1] et al., Eur J Clin Pharmacol 2003; Kiertiburanakul et al., Curr HIV Res 2008). The current recommendation for initiation of NVP is for women with CD4<250 cells/mm3 and for men who has CD4<400 cells/mm3 when the indication for HAART fulfilled. (Baylor et al, 2004 and Sanne et al, 2005) In order to reduce the chance of hypersensitivity reaction, it was recommended that treatment should start with 200 mg single dose daily nevirapine for 14 days (lead-in), and followed by 200 mg twice daily. Monitoring of rash and hepatitis is recommended for the first three months.
Human Leukocyte Antigen is part of Major Histocompatibility Complex (MHC) on chromosome 6, the region covers 3.5 million base pairs, the HLA translated into a glycoprotein on the cell surface of immunology related cells and react to intruder antigens. HLA can be classified into three groups 1) Class I antigen (HLA-A, HLA-B and HLA-C). This class is attached to the exogenous antigens or drugs and introduce the foreign antigens to immune cells such as T lymphocyte. T lymphocyte can be stimulated and kill the cell invaded by drugs or foreign organisms. 2) Class II antigens (HLA-DR, HLA-DP and HLA-DQ) are the proteins that attached to endogenous protein and presented those protein to the B lymphocyte to produce antibody to the exogenous antigen. 3) Class III genes is the left over of the class I and class II, function in complement, hormone and intracellular peptide processing.
The hypersensitivity reactions of an antiretroviral drug, abacavir, had been extensively studied and its association to the HLA-B*5701 allele in Caucasians have been strongly implicated with odds ratios 117, negative predictive value more than 90% in every ethnic studies, but highly variable positive predictive value due to variability of HLA-B*5701 allele frequencies in each population. (Mallal et al., Lancet 2002; Hetherington et al., Lancet 2002; Martin et al., Proc Natl Acad Sci 2004).
Association study in hypersensitivity to nevirapine by Martin et al had reported that HLA-DRB1*0101 in patient with high CD4 level may determine susceptibility to nevirapine hepatitis with 40% positive predictive value and 96% negative predictive value (Martin et al., AIDS 2005). However this result had never been confirmed and no single HLA allele were associated with cutaneous adverse reactions from nevirapine in the study.

Risk assessment for cutaneous adverse drug reactions from antiretroviral agent

DEPARTMENT OF MEDICAL SCIENCES, MINISTRY OF PUBLIC

THAILAND CENTER OF EXCELLENCE FOR LIFE SCIENCES (OKMD)