An improved plant medicament composition, comprising an extract of Sorghum bicolor plant material for treating sickle cell disease is described. A method for the preparation of said composition having the property of inhibiting sickle cells is also provided.

Sickle cell disease (SCD) is a hereditary blood disorder, affecting over 75,000 people in the United States. Sickle cell disease (SCD) affects over twenty million people throughout the world and is particularly common among those whose ancestors come from sub-Saharan Africa, Spanish-speaking regions in the Western Hemisphere (South America, the Caribbean, and Central America), Saudi Arabia, India, and Mediterranean countries such as Turkey, Greece, and Italy.
In the US, those with SCD have an average mortality in their 40s, a poor quality of life and high medical costs. In SCD, a mutation in .beta.-globin (glu6val) causes deoxygenated sickle hemoglobin (deoxy-HbS) to form insoluble polymers inside red blood cells (RBCs), which deforms the RBCs into rigid shapes or sickle cells that occlude capillaries and small blood vessels. The only disease-modifying drug approved for use in SCD patients is hydroxyurea, an anti-cancer drug. Not all patients respond to hydroxyurea, and it can be poorly tolerated causing myelosuppression in some patients. Despite extensive studies on SCD by researchers over several decades, there has been little progress in the development of additional disease modifying agents. Therefore, new, safer and more effective therapeutic anti-sickling agents are needed to treat patients with SCD, particularly children, which could improve the quality of life, increase the life expectancies of sufferers of this disease, and reduce the estimated 100,000 hospitalizations and $500 million in direct hospital costs due to sickle cell disease in the United States. Sickle cell disease occurs in about 1 in every 500 African American births, and about 1 in 12 African Americans has sickle cell trait. The morbidity and mortality factors associated with sickle cell disease are well known and the acute and chronic trauma of the painful episodes is indescribable. In view of these realities, there is a desperate need for drugs or agents that could alleviate and mitigate the effects of this terrible disease.
U.S. Pat. No. 5,800,819 describes a composition requiring extracts from at least four plant materials for treating sickle cell disease. U.S. Pat. No. 5,800,819 does not describe Sorghum bicolor, per se, having anti-sickling activity nor measure the anti-sickling activity of Sorghum bicolor. It only describes the anti-sickling activity of the four ingredients mixed together. The present invention provides a distinctly different and improved plant formulation using Sorghum bicolor plant material, per se, that shows potent anti-sickling activity against human sickle cells and is simpler to formulate.

This patent is subject to a terminal disclaimer.

Botanical formulation for treating sickle cell disease


A terminal arrangement device electrically connects an electric device, which is received in a housing, to an external device, and includes a first connecting terminal fixed to the housing. The first connecting terminal has a first supporting portion and a second supporting portion which are elastically deformable such that an output terminal of the electric device is supported between the first supporting portion and the second supporting portion. The first supporting portion has a flexural rigidity which is different from a flexural rigidity of the second supporting portion.

JP-H06-507043A (U.S. Pat. No. 5,147,218) discloses a fork-shaped connecting terminal which electrically connects an electric device with a connector. The fork-shaped connecting terminal has a tip portion separated in two in a width direction, and is commonly used due to the simple structure.
Vehicles are recently downsized and sophisticated, so an in-vehicle device is also required to be downsized, lighter in weight, sophisticated, and to have high quality. Further, producing cost of the in-vehicle device is required to be reduced.


A system for minimizing the effect of clock skew in a bit line write driver includes a first control circuit coupled to the bit line write driver; and a second control circuit coupled to the bit line write driver. The bit line write driver outputs a first output signal and a second output signal. A method of minimizing the effect of clock skew in a bit line write driver includes outputting a first signal and a second signal from the bit line write driver; controlling the outputting of the second signal from the bit line write driver based on a feedback of the first signal; and controlling the outputting of the first signal from the bit line write driver based on feedback of the second signal.

In computer and information processing systems, various integrated circuit chips must communicate digitally with each other over common buses. The receiving bus nodes recognize the signal as being high or low using receivers, also referred to as input buffers. Often the receiver is a differential receiver, i.e., a receiver that detects the difference between two input signals, referred to as the differential inputs. These input signals may be a received signal and a reference voltage or they may be a received signal and the inverse of the received signal. In either case, it is the difference between the two input signals that the receiver detects in order to determine the state of the received signal.
Integrated circuits are powered at certain voltage levels, which levels are then provided to the various components, such as the receivers, which are located on the integrated circuit. However, the nominal supply voltage for integrated circuits keeps being decreased to reduce power consumption. Additionally, fluctuations of the voltage level during operation can make the voltage level powering a receiver even lower. The lower the supply voltage, the more challenging it is to get a receiver to operate reliably.
The signal frequency at which communication occurs can limit the performance of the overall system. Thus, the higher the communication frequency, the better. The maximum frequency at which a system communicates is a function not only of the time that it takes for the electromagnetic wavefronts to propagate on the bus from one chip to another, but also of the time required for the signals to be reliably recognized at the receiving bus nodes as being high or low. Characteristics that affect the time in which a signal is recognized by a receiver include the set up time of the receiver, i.e., the amount of time before a clock edge that a signal must arrive and settle to a recognized level, and the hold time of the receiver, i.e., the time that the received signal must stay at a certain level in order for that level to be detected.
The amount of setup and hold depends on the speed of the circuit and the skew and jitter of the clock distribution mechanism. The setup and hold time requirement decreases as the transistor speed increases because the process feature size decreases. However, historically, skew and jitter of the clock distribution mechanism does not decrease as fast as the clock speed increases. As a proportion of the clock frequency, skew and jitter now take up a larger and larger percentage of the clock cycle time. Additionally, as the process feature size shrinks the transistor speed increases faster than the delay in interconnects. For signals that need to be distributed through a long interconnect (wire) the receiver of that signal at the beginning of the long wire receives the signal earlier (have a better setup time) than the receiver at the end of the long wire because of interconnect delay.
On the other hand, the receiver at the beginning of the long wire has worse hold time (premature signal switching) than the receiver at the end of the long wire. The end result is extra guard-banding is needed when quantifying setup and hold timing and this guard band, like jitter and skew and the delay of interconnect, becomes a larger and larger percentage of the clock cycle time.
Referring to FIG. 1, a conventional write driver (10) outputs two signals (wd and {overscore (wd)}) through delays (12a and 12b) to a switch (14). The switch (14) also receives a clock signal (clk) that controls whether the write driver data is output onto the global bitline (gbl) and its complement ({overscore (gbl)}). As is conventionally understood, the two output signals (wd and {overscore (wd)}) are complements unless the circuit is in a precharge or reset state. Those skilled in the art will also appreciate that the switch (14) may receive a clock-derived signal rather than the clock signal itself.
Referring to FIG. 2, a typical write driver (10) and delay stage (12) is shown. The write driver (10) consists of two sets of transistors, which produce the output signals (wd and {overscore (wd)}) respectively. Specifically, the set of transistors producing the output signal (wd) includes a p-channel transistor (22a), a p-channel transistor (24a), and an n-channel transistor (26a). The p-channel transistor (22a) receives the clock signal (clk) at the gate, is connected at the source to pull-up voltage (Vcc), and is coupled drain to drain with p-channel transistor (24a). The p-channel transistor (24a) is also connected to pull-up voltage (Vcc) at the source, and is coupled gate to gate with n-channel transistor (26a). The n-channel transistor (26a) receives an input signal (Vin) at the gate, and at the source is coupled through pull-down transistor (28) to ground (GND). The pull-down transistor receives the clock signal (clk) at the gate, is coupled to n-channel transistor (26a) at the drain, and connected to ground (GND) at the source.
The set of transistors producing ({overscore (wd)}) are connected similarly, wherein transistors 22b, 24b, and 26b have the same interconnections as 22a, 24a, and 26a respectively. As can be seen, however, the input signal received by n-channel transistor (26b) passes through inverter (30) to become ({overscore (Vin)}). Thus, the output of the two sets of transistors are complements (wd and {overscore (wd)}). The output signals (wd and {overscore (wd)}) are fed to the delay stage (12), which, for example, consists of two pairs of inverters (38a, 38b and 37a, 37b) and (38c, 38d and 37c, 37d) respectively.
In general, in one aspect, the present invention involves a system for minimizing the effect of clock skew in a bit line write driver comprising a first control circuit coupled to the bit line write driver; and a second control circuit coupled to the bit line write driver. The bit line write driver outputs a first output signal and a second output signal; the first control circuit receives feedback from the second output signal and controls whether the bit line write driver outputs the first output signal based on the feedback from the second output signal; and the second control circuit receives feedback from the first output signal and controls whether the bit line write driver outputs the second output signal based on the feedback from the first output signal.
In general, in one aspect, the present invention involves a method of minimizing the effect of clock skew in a bit line write driver comprising outputting a first signal and a second signal from the bit line write driver; controlling the outputting of the second signal from the bit line write driver based on feedback of the first signal; and controlling the outputting of the first signal from the bit line write driver based on feedback of the second signal.
In general, in one aspect, the present invention involves an apparatus for minimizing the effect of clock skew in a bit line write driver comprising means for outputting a first signal and a second signal from the bit line write driver; means for controlling the outputting of the second signal from the bit line write driver based on feedback of the first signal; and means for controlling the outputting of the first signal from the bit line write driver based on feedback of the second signal.
In general, in one aspect, the present invention involves a bit line write driver with minimized clock skew effect, comprising a first set of transistors for producing a first output signal, a second set of transistors for producing a second output signal; a first control circuit for controlling whether a first output signal is output from the bit line write driver based on feedback from the second output signal; and a second control circuit for controlling whether a second output signal is output from the bit line write driver based on feedback from the first output signal.
In general, in one aspect, the present invention involves an apparatus for minimizing the effect of clock skew on a bit line write driver, comprising a first set of transistors for producing a first output signal, a second set of transistors for producing a second output signal; a first delay for delaying the first output signal; a second delay for delaying the second output signal; a first control circuit for controlling whether a first output signal is output from the bit line write driver based on feedback from the delayed second output signal; a second control circuit for controlling whether a second output signal is output from the bit line write driver based on feedback from the delayed first output signal, and an inverter for inverting the input signal to produce the inverted input signal.
The first set of transistors comprising a first p-channel transistor; a second p-channel transistor; and a first n-channel transistor. The first p-channel transistor is connected gate to a clock signal, source to a pull-up voltage, and drain to drain with the second p-channel transistor. The second p-channel transistor is connected source to the pull-up voltage, and gate to gate with the first n-channel transistor. The first n-channel transistor is connected gate to an input signal, and source to drain with a pull-down transistor. The pull-down transistor is connected gate to the clock signal, and source to ground.
The second set of transistors comprises a third p-channel transistor; a fourth p-channel transistor; and a second n-channel transistor. The third p-channel transistor is connected gate to the clock signal, source to the pull-up voltage, and drain to drain with the fourth p-channel transistor. The fourth p-channel transistor is connected source to the pull-up voltage, and gate to gate with the third n-channel transistor. The third n-channel transistor is connected gate to an inverted input signal, and source to drain with the pull-down transistor.
The first control circuit comprises a first control p-channel transistor; and a first control n-channel transistor. The first control p-channel transistor is connected gate to the feedback of the delayed second output signal, source to a pull-up voltage, and drain to drain with the first p-channel transistor and the second p-channel transistor. The first control n-channel transistor is connected gate to the feedback of the delayed second output signal, drain to drain with the first control p-channel transistor, the first p-channel transistor, and the second p-channel transistor, and source to the drain of first n-channel transistor.
The second control circuit comprises a second control p-channel transistor; and a second control n-channel transistor. The second control p-channel transistor is connected gate to the feedback of the delayed first output signal, source to a pull-up voltage, and drain to drain with the third p-channel transistor and the fourth p-channel transistor. The second control n-channel transistor is connected gate to the feedback of the delayed first output signal, drain to drain with the second control p-channel transistor, the third p-channel transistor, and the fourth p-channel transistor, and source to the drain of second n-channel transistor.
Other aspects and advantages of the invention will be apparent from the following description and the appended claims.

Minimizing the effect of clock skew in bit line write driver


A system (and method and programmable storage medium for storing program steps of the method) for locating an alternate communication mechanism in case of a failure of a wireless device, includes a location tracker for continuously transmitting information to the wireless communication device for allowing a user to locate an alternate communication mechanism after the failure has occurred.

1. Field of the Invention
The present invention generally relates to a system and method for locating an alternate communication mechanism, and more particularly to a system and method for locating an alternate communication mechanism in the case of a failure of a wireless communication device.
2. Description of the Related Art
Rapid advances are being made in the field of wireless communication. An increasing number of applications are being developed for the wireless device platform, ranging from "smart" cellular phones to two-way text pagers. Shortly, (in 2001), new cellular phones will be required to have a location-tracking device based on the global positioning system (GPS). This gives rise to systems that deliver real-time, location-based information and services to wireless subscribers.
Services provided over a wireless network are extremely convenient because they are available to the user independent of location. However, wireless connectivity is not available everywhere.
Indeed, isolated blind spots exist in many networks (e.g., cellular and the like), and moving away from populated areas makes the situation even worse. In addition, wireless handset devices consume power and must be recharged periodically. In many situations, recharging is impossible due to lack of electricity or appropriate converters or adaptors.
As consumers begin to depend on wireless devices more and more, it is important to have a safety net which allows use of alternate communication mechanisms if the wireless device fails.
However, the problem is that loss of network coverage or battery power can occur suddenly and unexpectedly. Once the event occurs, it is very difficult to find an alternate communication mechanism.
Presently, there is no mechanism for solving this problem by proactively and continuously transmitting information to the wireless communication device that helps the user locate an alternate mechanism.

System and method for locating an alternate communication mechanism in case of a failure of a wireless communication device

International Business Machines Corporation


A sensor includes an array of pixels organized in rows and columns and a plurality of metal busses overlaying the array of pixels. A first column of pixels includes a proximal set of first pixels and a distal set of first pixels separated by a first jog region. A second column of pixels includes a proximal set of second pixels and a distal set of second pixels separated by a second jog region. The first jog region is displaced in a column direction and in a lateral direction transverse to the column direction from the second jog region. A first metal bus is insulatively disposed over both the first and second jog regions.

1. Field of the Invention
The technical field relates to time-delay and integration (TDI) charge coupled device (CCD) sensors, and, in particular, to sensors with reticulated gate CCD pixels and diagonal strapping.
2. Description of Related Art
When CCD sensors are operated in short wavelengths of ultra violet light, referred to as deep ultra violet (DUV), different regions of a CCD pixel have different responses to illumination. For example, polysilicon in regions covered with polysilicon will effectively absorb all incident DUV illumination so that no photon generated signal electrons are produced, resulting in areas of low quantum efficiency for DUV illumination. Conversely, regions covered with field oxide, or regions that are formed into photodiode or pinned photodiode, will permit DUV photons to enter a substrate and create photoelectrons that can be integrated to form signal charge, introducing areas of high quantum efficiency. The problem of variation in illumination responses by regions also occurs, to a lesser extent, with visible illumination, since polysilicon also has some absorption of visible light photons.
FIG. 1 illustrates a prior art device with a single CCD pixel 50 that includes a localized region 3 of high quantum efficiency. The localized region 3 of high quantum efficiency is formed, for example, by creating a pinned photodiode region adjacent to a vertical CCD (VCCD) channel 9. This pixel architecture is often referred to as a "reticulated gate". In a conventional TDI imager, polysilicon CCD electrodes are continuous stripes across arrays of pixels. Here, these electrodes are "reticulated" over a portion of each pixel by deliberately removing polysilicon from areas of the pixel outside the VCCD channel 9, to enable localized regions of high quantum efficiency (e.g., region 3) to be formed as a photodiode or pinned photodiode.
Localized regions 3 of high quantum efficiency are disposed in rows and columns of a TDI array, as shown in FIG. 2. FIG. 2 is a schematic illustration of a group of individual pixels 50 of FIG. 1 organized into a TDI array to be used in TDI CCD sensors. The pixels 50 are spaced vertically and horizontally by a pixel pitch P. In this example, the TDI is in the vertical direction, pointing downwards toward the lower edge of FIG. 2.
FIG. 3 is a graph showing a net TDI response of the arrays of pixels 50 in FIG. 2. The TDI pixels 50 have localized regions 3 of high quantum efficiency, and regions between regions 3 have a comparatively lower response. The net TDI imaging response has peaks localized to these regions 3 of high quantum efficiency. The CCD pixel 50 has greater sensitivity to sense light at specific locations within the pixel 50. When an image contains patterns (e.g., stripes) at high spatial frequencies, for example, spatial frequencies that define patterns that repeat more often than the pixel pitch (i.e., above Nyquist rate), and a fill factor of the sensor pixels is less than 100 percent, spurious shapes of the resulting image typically appear, a phenomenon creating aliasing. Aliasing can be reduced by blurring the image, hence reducing the high spatial frequencies in the image. Blurring is typically achieved by lens defocusing or with an anti-aliasing filter, either optically or electronically.
One approach for reducing aliasing, and consequently, enhancing modulation transfer function (MTF), is to position a shift region (i.e., a jog region) in the array of pixels 50 to maintain uniformity of response. The localized region 3 of high quantum efficiency is shifted by a fraction of one pixel pitch, so that the jog region enables a whole column of pixels 50 in the TDI array to generate a more uniform level of response, resulting in enhanced MTF.
FIG. 4 is a schematic illustration of a group of pixels 50 of FIG. 2, with a lateral position shift region halfway down a column of the array. Referring to FIG. 4, one-half of the pixels 50 in the array have a lateral shift by ½P midway down the array. As a result, the lateral shift creates a more uniform net TDI response even with a localized area of enhanced quantum efficiency or photoresponse within each pixel 50. FIG. 5 is a graph showing the net TDI response of the columns of pixels 50 in FIG. 4, where the imaging response is no longer localized to specific lateral areas.
In another aspect of TDI CCD sensor design, metal bussing is introduced into the array of pixels 50 to reduce resistance capacitance (RC) time constants of polysilicon clocking, and to maintain a high fill factor of the TDI imaging region. FIG. 6 is a schematic illustration of the group of pixels 50 of FIG. 2, with a single metal bus 25 overlaying the array of pixels 50, but without MTF-enhancing offset in pixel position. One metal bus 25 is shown for purposes of illustration.
FIG. 7 is a graph showing the net TDI response of the columns of pixels 50, where the imaging response is localized to specific lateral areas (as in FIG. 3), but has been reduced slightly in all pixel columns by the shadow effects of the metal bussing. However, the localized response is still present in this example, as in FIG. 3.
The benefit of MTF-enhancement architectures and metal bussing structure can be combined by positioning the jog region (as in FIG. 4) and metal bussing (as in FIG. 6) into a single TDI array. However, the addition of opaque metal bussing to a TDI array using MTF-enhancing offsets in pixel position introduces pixel response nonuniformity (PRNU). Specifically, the localized regions 3 of high quantum efficiency within a pixel 50 may or may not be covered, depending on the specific location of metal bussing in the array. Therefore, vertical columns may not have the same effective fill factor in the DUV, creating nonuniformity of response between columns. PRNU is demonstrated in FIG. 8 and FIG. 9.
FIG. 8 is a plain view of an array of pixels 50 of FIG. 4, with MTF-enhancing architectures, and with metal bussing structure of FIG. 6. The metal bus 25 crosses dissimilar portions of the pixel 50, depending on where the metal bus 25 is positioned in the array, creating asymmetric response. FIG. 9 is a graph illustrating the net TDI response of the array of pixels in FIG. 8, showing a dissimilar response between the two regions of the array.
Since a CCD typically has many clock phases requiring many metal busses 25, and multiple lateral shifts of pixel position may be needed to enhance MTF, a complex and irregular response will likely be introduced. One possible solution is to create layout geometries where the metal busses 25 occupy the same portion of each pixel. However, this solution requires complex layouts to shift the metal busses 25 across the array in such a way that all TDI columns are affected equally.

Reticulated gate CCD pixel with diagonal strapping


1,4,7,10-Tetraazacyclodedecane butyltriols of general formula I.sub.A ##STR1## in which R.sup.1 means hydrogen or a metal ion equivalent independent of one another and. R.sup.2 means a butyltriol radical PA1 as well as their salts with organic or inorganic bases or amino acids are valuable pharmaceutical agents.

This invention relates to 1,4,7,10-tetraazacyclodedecane butyltriols, their complexes and complex salts, agents containing these compounds, their use as diagnostic agents and therapeutic agents as well as processes for the production of these compounds and agents.
In European patent application 87730085.5 with the publication number 0 255 471 macrocyclic compounds of general formula I ##STR2## are claimed, in which
Y is a nitrogen atom or phosphorus atom, PA2 A.sup.1 and A.sup.2 are the same or different and each is a straight-chain or branched alkylene group with 2 to 6 carbon atoms, PA2 U.sup.1, U.sup.2, U.sup.3, U.sup.4 are the same or different and each is a direct bond or a straight-chain or branched alkylene group with 1 to 6 carbon atoms, PA2 D.sup.1, D.sup.2, D.sup.3, D.sup.4 are the same or different and each is an oxygen atom or sulfur atom, an alkylene group with 1 to 6 carbon atoms or a group N--R.sup.7 with R.sup.7 meaning a hydrogen atom, a straight-chain or branched alkylene chain with 1 to 4 carbon atoms, which on the end carries a COOR.sup.1 group, and R.sup.1 stands for a hydrogen atom or a metal ion equivalent. PA2 D.sup.5 has the meaning indicated for D.sup.1, D.sup.2, D.sup.3 and D.sup.4 as well as the group ##STR3## with R.sup.5 meaning a hydrogen atom or a straight-chain or branched saturated or unsaturated C.sub.1 -C.sub.20 alkylene group, optionally substituted by hydroxy, mercapto, imino and/or amino group(s), optionally containing imino, phenylenoxy, phenylenimino, amide, ester group(s), oxygen atom(s), sulfur atom(s) and/or nitrogen atom(s), which on the end exhibits either a functional group or a macromolecule B bound by it, PA2 s and t represent whole numbers from 0 to 5, PA2 R.sup.2 represents hydrogen, a straight or branched, saturated or unsaturated alkyl, acyl or acylalkyl group with 1 to 16 carbon atoms optionally substituted by one or more hydroxy or lower alkoxy groups, PA2 --CH.sub.2 --X--V with X meaning carbonyl, a straight-chain or branched-chain alkylene group with 0 to 10 carbon atoms, which optionally is substituted by one or more hydroxy or lower alkoxy groups or a straight-chain or branched-chain alkylene group interrupted by oxygen atoms with 2 to 23 hydrocarbon atoms, PA2 V meaning ##STR4## of --COOR.sup.6, and R.sup.3 and R.sup.4, independently independently of one another, represent hydrogen, a straight or branched alkyl group with 1 to 16 carbon atoms optionally substituted by one or more hydroxy or lower alkoxy groups or R.sup.3 and R.sup.4 together with the nitrogen atom represent a saturated, five or six ring optionally containing another heteroatom and R.sup.6 represents hydrogen or a saturated, unsaturated straight-chain or branched-chain or cyclic hydrocarbon radical with up to 16 carbon atoms or an aryl or aralkyl group, or PA2 R.sup.2 or R.sup.3 represent a second macrocycle of formula I'--bound by an alkylene chain (K) containing 2 to 20 carbon atoms, which optionally carries carbonyl groups on the ends and optionally is interrupted by one or more oxygen atoms or R.sup.1 carboxymethylimino groups or is substituted by one or more hydroxy,lower alkoxy or carboxy lower alkyl groups-- ##STR5## which can be of a different structure than the parent substance of the first, or PA2 R.sup.2 means B or CH.sub.2 --COB, PA2 provided that, if R.sup.2 stands for B or CH.sub.2 --COB, R.sup.5 means a hydrogen atom, that at least two COOR.sup.1 groups are present in the molecule and that two heteroatoms of the macrocycle are each connected by an alkylene group with at least two carbon atoms, and functional groups existing in the molecule optionally are conjugated with macromolecules and optionally free carboxyl groups are made into salts with organic or inorganic bases or amino acids and basic groups with inorganic or organic acids.
The substances and the solutions prepared from them meet the demands to be made of pharmaceutically usable chelates. They have a strong and adaptable effectiveness, by the selection of suitable metal atoms, on the respective principles of the diagnostic or therapeutic method (x ray, NMR, ultrasound, nuclear medicine).

1,4,7,10-tetraazacyclododecane butyltriols, processes for their production and pharmaceutical agents containing them


The semiconductor device comprises a gate electrode 26 formed on a semiconductor substrate 10, a source region 45 a having a lightly doped source region 42a and a heavily doped source region 44a, a drain region 45b having a lightly doped drain region 42b and a heavily doped drain region 44b, a first silicide layer 40c formed on the source region, a second silicide layer 40d formed on the drain region, a first conductor plug 54 connected to the first silcide layer and a second conductor plug 54 connected to the second silicide layer. The heavily doped drain region is formed in the region of the lightly doped region except the peripheral region, and the second silicide layer is formed in the region of the heavily doped drain region except the peripheral region. Thus, the concentration of the electric fields on the drain region can be mitigated when voltages are applied to the drain region. Thus, even with the silicide layer formed on the source/drain region, sufficiently high withstand voltages of the high withstand voltage transistor can be ensured. Furthermore, the drain region alone has the above-described structure, whereby the increase of the source-drain electric resistance can be prevented while high withstand voltages can be ensured.

The present invention relates to a semiconductor device and a method for fabricating the semiconductor device, more specifically a semiconductor device having high withstand voltage transistors and a method for fabricating the semiconductor device.
In organic EL panels, LCD drivers, ink jet printers, etc., it is noted to mount logic transistors, and high withstand voltage transistors mixedly on and the same substrate for the purpose of their general high operational speed.
A proposed semiconductor device having logic transistors, and high withstand voltage transistors mixed mounted will be explained with reference to FIG. 16. FIG. 16 is a sectional view of the proposed semiconductor device. In FIG. 16, a logic region shown on the left side of the drawing, and a high withstand voltage region is shown on the right side of the drawing.
Element isolation regions 214 for defining element regions 212a, 212b are formed on the surface of a semiconductor substrate 210. In the element region 212a of the logic region 216 a transistor 220 of relatively low withstand voltage having a gate electrode 226, a source region 236a and a drain region 236b is formed. The source region 236a has a lightly doped source region 230a and a heavily doped source region 234a. The drain region 236b has a lightly doped drain region 230b and a heavily doped drain region 234b. On the other hand, in the source region 212b of the high withstand voltage region 218 a relatively high withstand voltage transistor 222 having a gate electrode 226, a source region 245a and a drain region 245b is formed. The source region 245a has a lightly doped source region 242a and a heavily doped source region 244a. The drain region 245b has a lightly doped drain region 242b and a heavily doped drain region 244b. An inter-layer insulation film 250 is formed on the semiconductor substrate 210 with the transistors 220, 222 formed on. Conductor plugs 254 are formed in the inter-layer insulation film 250 respectively down to the source regions 236a, 245a and the drain regions 236a, 245b. An interconnection is formed on the inter-layer insulation film 250, connected to the conductor plugs 254.
The proposed semiconductor device, in which the logic transistors 220, and the high withstand voltage transistors 222 are formed mixedly on one and the same substrate, can contribute to higher operation speed of electronic devices.
Recently, semiconductor devices are increasingly micronized. However, simply micronizing a semiconductor device causes increase a contact resistance and a sheet resistance in the source/drain. As a countermeasure to this, in a logic transistor whose gate length is below, e.g., 0.35 μm, usually a silicide layer is formed on the source/drain region for the purpose of depressing the contact resistance and the sheet resistance in the source/drain.
Another proposed semiconductor device which has the silicide layer formed on the source/drain region will be explained with reference to FIG. 17. FIG. 17 is a sectional view of another proposed semiconductor device.
As shown in FIG. 17, the silicide layer 240 is formed respectively on the heavily doped source regions 234a, 244a and the heavily-doped drain regions 234b, 244b.
Said another proposed semiconductor device shown in FIG. 17, in which the silicide layer 240 is formed on the source/drain regions, can be micronized while the contact resistance and the sheet resistance in the source/drain are depressed low.
Patent Reference 1 also discloses a semiconductor device having a silicide layer formed on the source/drain regions.
Following references disclose the background art of the present invention.
[Patent Reference 1]
Specification of Japanese Patent Application Unexamined Publication No. Hei 11-126900
[Patent Reference 2]
Specification of Japanese Patent Application Unexamined Publication No. Hei 9-260590
However, the proposed semiconductor device shown in FIG. 16 cannot ensure sufficient withstand voltage of the high withstand voltage transistors. The semiconductor device proposed in Patent Reference 1 cannot ensure sufficiently high withstand voltage.
Here, it can be proposed that a silicide layer is formed on the source/drain diffused layer of the logic transistors only, and in the high withstand voltage transistor, the silicide layer is not formed, but an insulation film covers the source/drain diffused layer thereof. In this case, however, it is difficult to obtain good contact in the high withstand voltage transistor, and the contact resistance and the sheet resistance in the high withstand voltage transistor are very high.

Method for fabricating semiconductor device having high withstand voltage transistor


A communication apparatus is configured to include first and second cards, and a card-to-card link connecting the cards. Each card is communicably connected to another communication apparatus through a route connected to the card. One of the cards is determined to be a primary card that controls data transmission between the communication apparatus and another communication apparatus, and the other card is determined to be a secondary card controlled by the primary card. The primary card establishes a primary data-path for transmitting primary data, using one of the first and second routes connected to the primary card. The primary card further establishes a secondary data-path for transmitting secondary data, using the card-to-card link, the secondary card, and the other one of the first and second routes connected to the secondary card.

As typified by S3G (Super 3G), a communication system in which base stations are connected to each other through multiple data-paths by using a multi-homing method, has been put into practical use. For example, Japanese Laid-Open Patent Application Publication No. 2000-209278 and 2006-279467 disclose about a communication system in which a multi-homing method is employed. According to a multi-homing method, a network within a company can be connected to another network outside the company through a plurality of data-paths, for example, using a plurality of ISPs (Internet Service Providers).
According to a multi-homing method, a communication apparatus, such as a base station, is typically configured to include a card for handling SCTP (Stream Control Transmission Protocol) which is a protocol corresponding to a transmission layer. The card may have, for example, two link ports each connected to a link port of another communication apparatus with which the base station communicates. The card may be configured to include a SCTP handler that terminates a SCTP signal. In the case, one of the two link ports is used for a primary data-path and the other one for a secondary data-path where a global address is assigned to each of the two link ports. Data is transmitted and received through the primary data-path under normal conditions, and the secondary data-path is used as an alternate path when the primary data-path is disconnected, for example, due to a failure. Here, it is also possible to distribute a communication load by using both the primary and secondary data-paths concurrently.
However, in the case where a card has only one link port for communicating with another communication apparatus, the above mentioned multi-homing communication may not be attained. Therefore, to perform a multi-homing communication, each of primary and secondary data-paths needs to be accommodated in a different card. Further, a communication apparatus, such as a base station, may be configured to include a redundant card so as to keep communication even if a failure has occurred in some cards. Adopting a redundant card requires each of primary and secondary data-paths to be accommodated in a different card. However, if each of primary and secondary data-paths is accommodated in a different card, a multi-homing method may not be applied since the primary and secondary data-paths are handled independently by each of SCTP handlers of two different cards.
In order to avoid the above problem, it may be possible to configure an access controller of the card, which is normally configured to provide services such as call processing, to perform a multi-homing communication. However, this causes another problem that the load of the access controller becomes higher, thereby exerting an adverse effect on providing the above-mentioned services such as call processing.
Further, in the case of a card having only one link port for communicating with another communication apparatus, the card may be assigned with one global address and one local address. A multi-homing method according to SCTP uses two global addresses each assigned to one of primary and secondary data-paths. In this case, when a setting for a multi-homing communication has been done within the card, the SCTP handler of the card may try to start a communication with another communication apparatus using both the global address and the local address which are assigned to the card. However, the communication using the local address fails since the local address is effective only within the communication apparatus. As a result, a multi-homing communication with another communication apparatus may not be performed. This case is also undesirable from the aspect of security because the local address for the card of the communication apparatus may flow out into the network.

Communication apparatus for transmitting data through a plurality of data-paths


A pattern of dummy structures (20) is added to the layout pattern of an integrated circuit (10) to equilibrate the polishing rate across the surface of a semiconductor substrate (11). The location of each dummy structure (20) is predetermined so that it does not intersect a well boundary (17) or an active region (21,27), and does not fall under a conductive material such as a layer of polysilicon (22,28) or an interconnect structure (23,29).

This invention is related to a patent application filed on Apr. 6, 1995, by George Meyer. That patent application was given an application Ser. No. of 08/417,524 and is assigned to the same assignee as the present invention.
This invention relates, in general, to semiconductor devices, and more particularly to semiconductor devices having a planarized trench isolation structure.
Some advanced semiconductor devices employ trench isolation as a method for electrically isolating a semiconductor device from neighboring structures. In short, trench isolation structures are formed by first patterning a masking layer on a semiconductor substrate. A reactive ion etch (RIE) is then used to remove exposed portions of the semiconductor substrate to form trench structures. The trenches are then filled with a non-conductive material such as silicon dioxide. Before the formation of the semiconductor device can continue, the non-conductive material must be polished to planarize the surface of the semiconductor substrate while maintaining a filled trench structure.
The density of the trench structures, however, causes a dishing problem when conventional polishing techniques such as chemical and mechanical polishing (CMP) are used. As the density of the trench pattern increases, the polish rate in that area decreases due to the presence of the additional material that must be removed. As a result, isolated trench structures will polish must faster than an area of the substrate that has a higher density of trench structures. This will cause the non-conductive material in the isolated structures to polish further than the denser areas thereby resulting in polishing non-uniformity (referred to as "dishing").
One method used to correct for the dishing problem is to first etch the conductive material with a reactive ion etch (RIE) using a pattern that is the n-layer or opposite pattern used to originally form the trenches. Thus the bulk of the non-conductive material is removed with the RIE etch prior to the polish process. This n-layer technique, however, requires and additional photolithographic mask and processing step and is prone to forming particle defects that will reduce the yield of the semiconductor device.
Another technique that attempts to improve the planarity of the non-conductive layer is to form dummy or tile structures around the device. This is done by simply inserting dummy structures randomly through the device in an attempt to equalize the polishing rate across the substrate. This technique, however, can cause shorting between various well structures or between interconnect structures that are used to form the device. This method can also affect the performance of the device by inserting large structures that change the capacitance of the device.
By now it should be appreciated that it would be advantageous to provide a method for improving the planarization of a non-conductive material when trench isolation is employed. It would also be advantageous if the method did not require the use of an additional photolithographic mask or electrically short circuit conductive portions of a semiconductor device.

Integrated circuit having a dummy structure and method of making


A method and apparatus for determining a rotational orientation of an object is provided. Embodiments of the present invention utilize an electrically conductive fluid enclosed within a shell attached to the object such that the conductive fluid contacts different portions of electrically conductive nodes, located on the inner wall of the shell, depending on the rotational orientation of the shell. The electrically activated nodes in contact with the conductive fluid act as sensors and individually transmit electric signals to a microcontroller for transformation into an indicator of a rotational orientation of the object. The indicator of the rotational orientation is then output.

The present invention relates generally to the field of navigation systems, and more particularly to determining three-dimensional rotational position in real time.
Navigation systems are generally any combination of systems or devices that are capable of determining an objects current location (relative to another fixed location) and/or rotational position (relative to a reference, non-rotating orientation). This information is highly useful for objects such as, but not limited to aircraft and watercraft (e.g., airplanes, helicopters, ships and submarines) to enable the internal guidance systems to make the necessary adjustments to stay on course to the target destination. Navigation systems are also becoming ubiquitous in many modern electronic and computing devices as well, such as cell phones, tablets and even video game controllers. One very common type of navigation device is a gyroscope, which most generally is a device that will seek to maintain its orientation at all times regardless of how the object that contains it is moving or rotating. Having the constant orientation of the gyroscope as a reference is a practical way of determining the three-dimensional rotational position (that is, x, y and z coordinates for roll, pitch and yaw, respectively) of the object that contains it at any given point in time.

Electronic roll pitch and yaw sensor using conductive fluid


A method is provided for storing and retrieving data in a network-attached data storage device by a cooperatively multitasking real time operating system configured to execute datapath routines and a general purpose operating system kernel configured to communicate with the network.

Storage networking began proliferating when the data transfer rates of industry standard architectures could not keep pace with the data access rate of the 80386 processor made by Intel Corporation. Local area networks (LANs) evolved to storage area networks (SANs) by consolidating the data storage capacity in the network. Users have realized significant benefits by the consolidation of equipment and the associated data handled by the equipment in SANs, such as the capability of handling an order of magnitude more storage than would otherwise be possible with direct attached storage, and doing so at manageable costs.
More recently the movement has been toward a network-centric approach to controlling the data storage subsystems. That is, in the same way that the storage was consolidated, so too are the systems that control the functionality of the storage being offloaded from the servers and into the network itself. Host-based software, for example, can delegate maintenance and management tasks to intelligent switches or to a specialized network storage services platform. Appliance-based solutions eliminate the need for the software running in the hosts, and operate within computers placed as a node in the enterprise. In any event, the intelligent network solutions can centralize such things as storage allocation routines, backup routines, and fault tolerance schemes independently of the hosts.
While moving the intelligence from the hosts to the network resolves some problems such as these, even more recently the trend has been toward storage-centric solutions. However, there are tremendous processing overhead challenges that must be solved in order to pave the way to storage-centric viability. What is needed is an intelligent data storage subsystem that self-deterministically manages network transactions as well as datapath control transactions, and does so fast and reliably. It is to this solution that embodiments of the present invention are directed.

Context-free data transactions between dual operating systems embedded within a data storage subsystem


A plurality of antenna clusters form an antenna array used in microwave imaging. Each antenna cluster has at least two antenna elements and an active device. The active device controls the two antenna elements to direct microwave radiation to and from an object to capture a microwave image of the object.

Various microwave imaging systems have been proposed to satisfy the demand for improved security inspection systems, such as those used in airports to screen passengers and baggage. At present, there are several microwave imaging techniques available. For example, one technique uses an array of microwave detectors (hereinafter referred to as "antenna elements") to capture either passive microwave radiation emitted by a target associated with the person or other object or reflected microwave radiation reflected from the target in response to active microwave illumination of the target. A two-dimensional or three-dimensional image of the person or other object is constructed by scanning the array of antenna elements with respect to the target's position and/or adjusting the frequency (or wavelength) of the microwave radiation being transmitted or detected.
Microwave imaging systems typically include transmit, receive and/or reflect antenna arrays for transmitting, receiving and/or reflecting microwave radiation to/from the object. Microwave radiation is generally defined as electromagnetic radiation having wavelengths between radio waves and infrared waves. Such antenna arrays can be constructed using traditional analog phased arrays or binary reflector arrays. In either case, the antenna array typically directs a beam of microwave radiation containing a number of individual microwave rays towards a point or area/volume in 3D space corresponding to a voxel or a plurality of voxels in an image of the object, referred to herein as a target. This is accomplished by programming each of the antenna elements in the array with a respective phase shift that allows the antenna element to modify the phase of a respective one of the microwave rays. The phase shift of each antenna element is selected to cause all of the individual microwave rays from each of the antenna elements to arrive at the target substantially in-phase. The resulting microwave image of the object can be displayed as a two-dimensional (2D) or three-dimensional (3D) image to an operator. Examples of programmable antenna arrays are described in U.S. patent application Ser. Nos. 10/997,422, entitled "A Device for Reflecting Electromagnetic Radiation," and 10/997,583, entitled "Broadband Binary Phased Antenna."
In traditional phased arrays, the custom is to place the antenna elements apart by λ/2 in both directions to suppress sidelobes throughout a hemispherical scan. The number of antenna elements in a circular area array is about π(D/λ)2 where D is the diameter of the circle and A is the wavelength of the radiation. The number of antenna elements, and therefore the cost of the array, is proportional to (D/λ)2. Each antenna element has traditionally been controlled by its own active device. However, the active devices used in controlling the antenna elements can be expensive, and in some cases may even require one or more stages of amplifiers. Even when the active devices are relatively inexpensive, the system may require a very deep digital memory to support a large set of focal areas or volumes.
One approach for reducing the number of antenna elements is to simply omit elements from the traditional "dense" phased array. The result is known as a "sparse array". While using a sparse array does reduce the number of active devices required, a new problem is created. Sparse arrays are well-known in the ultrasound and microwave/millimeter-wave literature to be associated with grating sidelobes. Sidelobes produce unwanted ghosting phenomena in the scanning or imaging process.
Various remedies have been tried to remove or negate the effect of the sidelobes. For example, deconvolution algorithms can be applied but the most successful of these are nonlinear algorithms which are both scene-dependent and very time-consuming. Two of the most popular deconvolution algorithms are CLEAN and the Maximum Entropy Method or MEM. An older, linear (and hence faster and more general) algorithm is Wiener-Helstrom filtering, but it is well known that it produces inferior image reconstruction compared to nonlinear (slower, more specialized) techniques such as Maximum Likelihood (ML) iteration. Correlation imaging, involving different subsets of an already sparse array, is another nonlinear scheme which tends to be quite slow. In some cases, e.g., radioastronomy, one has prior knowledge about the scene (say, from visible telescopes) which can be used to weed out much of the ghost phenomena. However, this solution is inadequate whenever one is dealing with a highly dynamic environment.
U.S. Application for patent Ser. No. 11/552,193, entitled "Convex Mount for Element Reduction in Phased Arrays with Restricted Scan," which was filed on Oct. 20, 2006, and U.S. Application for patent Ser. No. 11/551,382, entitled "Element Reduction in Phased Arrays with Cladding," which was filed on Oct. 20, 2006, disclose that when the range of solid scan angle is less than 2π steradians (i.e., less than a hemisphere), it is theoretically possible to reduce the element count without sidelobe degradation. However, U.S. Application for patent Ser. No. 11/552,193 requires that the antenna elements be mounted on a curved surface, and U.S. Application for patent Ser. No. 11/551,382 requires a special material to be applied to the surface of the antenna elements.
Therefore, a need still remains for a reduced-device phased array on a flat surface that does not suffer from sidelobe degradation.

Antenna clusters for active device reduction in phased arrays with restricted scan


Polymerization process having a plurality of processing steps in which an inert gas is used or is provided as a back-up, each of the processing steps being assigned a ranking based on the requirement for an inert gas flow in the processing step. The process, in the event of a process upset, controls with a control system the supply of available inert gas based on the rankings.

The present invention relates to a polymerisation process.
The production of polymer powder by polymerisation reactions of monomers in the presence of catalysts is well-known. For example, processes are known and widely operated commercially using both fluidised bed reactors and slurry phase reactors.
In the gas fluidised bed polymerisation of olefins the polymerisation is conducted in a fluidised bed reactor wherein a bed of polymer particles is maintained in a fluidised state by means of an ascending gas stream comprising the gaseous reaction monomer. During the course of polymerisation, fresh polymer is generated by the catalytic polymerisation of the monomer, and polymer product is withdrawn to maintain the bed at more or less constant volume. An industrially favoured process employs a fluidisation grid to distribute the fluidising gas to the bed, and to act as a support for the bed when the supply of gas is cut off The polymer produced is generally withdrawn from the reactor via a discharge conduit arranged in the lower portion of the reactor, near the fluidisation grid.
In a slurry polymerisation process the polymerisation is conducted in a stirred tank or, preferably, a continuous loop reactor comprising mainly polyolefin, hydrocarbon diluent and a catalyst for the polymerisation. Polymer product is removed from the reactor in the form of a slurry in the diluent.
Inert gases, and in particular nitrogen, can be used or provided for a number of purposes in the overall polymerisation process. Some of these uses occur during normal operation, whereas others are used during start-ups or shut-downs, or during process upsets.
For example, a potentially large requirement for inert gas can be found in downstream processing. In particular, the polymer product removed from the reactor in a polymerisation process may contain unreacted monomers and other hydrocarbon species (for example, hydrogen, methane, ethane, propane, butane, pentane, hexane) and these monomers and other hydrocarbons should be removed from the polymer product since failure to do so may lead to (a) hydrocarbons levels rising to explosive levels in downstream equipment or (b) environmental constraints being exceeded or (c) unacceptable product quality e.g. odours.
The removal of monomer and other residual hydrocarbons, which may be in gaseous or liquid form, is generally referred to as "degassing". One method that may be used is to contact the produced polymer with a gas in a purge vessel, usually a counter-currently flowing gas. The gas can be an inert gas, in particular nitrogen, although it is also known to use reaction gases, and is generally referred to as "purging".
Further, the polymer, even after degassing, can still contain residual levels of hydrocarbons, and for this reason downstream storage silos are also often provided with a purge using an inert gas to prevent build-up of such hydrocarbons in the silos.
A further example of a requirement for inert gas can be found in purging of feed treatment vessels. In particular, feeds to the process, such as fresh monomers, are generally passed through one or more treatment vessels comprising treatment beds to remove undesired components which might otherwise adversely influence the polymerisation process, for example by acting to poison the polymerisation catalyst. The treatment beds must be periodically treated to remove the undesired components, a process known as regeneration. Regeneration generally involves stopping passage of the fluid to be treated e.g. monomer, to the treatment vessel. The treatment bed is then usually depressurised and purged with an inert gas flow, generally heated, to remove the undesired components. Such processes are described generally in WO 2010/123748.
As further examples, inert gases may be used to purge valves, seals and filters to keep them free of fouling.
Inert gases, such as nitrogen even if not normally used, are also often provided as a back-up in case of a process upset. For example, in the event of a process upset nitrogen may be used to flush the reactor or other parts of the apparatus of reactive gases. This can include use of nitrogen in purge vessels where nitrogen is not otherwise typically used as the purge gas.
It can be seen from the above that inert gases may be used for a number of different steps in a polymerisation process, in particular in the downstream processing.
As a result of all of the above uses and, in particular the large number of potential uses of inert gas in the event of process upsets, it is necessary to provide a large inert gas capacity for the event it is required, but which inert gas capacity is normally not used. This can result in a large cost to the build and operation of a polymerisation plant, a cost which increases as the plant capacity increases.

Polymerization process in which inert gas supply is controlled according to ranking


A first bring up zone of a camel-back oven utilizes a plurality of short and/or medium wave infrared lamps to raise the component temperature up to a desired level. Once within the paint baking oven, the component enters into the bring up zone where a computer activates the requisite number of infrared lamps at the proper intensity to achieve the desired component temperature. While the infrared lamps are activated, inlet air is directed over the lamps to prevent them from overheating. The invention allows for smoother car finishes by preventing bubbling and pops and raises the component temperature more quickly than conventional dark radiation panels.

I. Technical Field
This invention relates to bring up zones for paint baking ovens. More particularly, the invention relates to a method and apparatus for distributing infrared radiation within this bring up zone of a camel-back paint baking oven to increase the temperature of components passing therethrough.
II. Discussion
Paint baking ovens are used throughout the manufacturing industry to bake the paint or coating applied to various articles such as automobile components. Such paint baking ovens often have conveyors or similar devices for bringing the component to be baked into the paint baking oven and then carrying the component through the various sections or zones of the paint baking oven. Generally, the first section or zone of a paint baking oven is known as a bring up zone. In a camel back paint baking oven this bring up zone has traditionally been positioned in the "hump" of such an oven, or, as shown in U.S. Pat. No. 5,155,335 to Habaki et al., in the oblique ramp connecting the oven entrance to the hump portion. While the component being baked is contained in this bring up zone, a heat source is activated which brings the component's body temperature to a desired level. It is well known in the industry that providing a relatively even body temperature over the entire component gives rise to a more consistent baking which, in turn, results in a more desirable finish.
Traditionally, dark radiation panels contained within the hump portion of the oven have been used as the heat source within paint baking oven bring up zones to obtain a relatively even temperature over the component body. The purpose of the radiant heat bring-up zone is to "skin" the paint coating prior to subjecting it to convection heating in a subsequent holding zone--i.e. to remove any stickiness at the outermost layer of the coating. By the time the painted object leaves such a bring-up zone, most of any solvents in the coating have been driven off by radiant heat. Although some success has been achieved through the use of dark radiation panels as a means of increasing the component's body temperature, it is difficult to control the amount of heat generated over specific areas of the component through the use of dark radiation panels. For example, if the component to be paint baked is an automobile component, it has been discovered that dark radiation panels are a less effective way of heating certain parts such as the roof, bonnet, side doors, wheel houses and other heavy parts because they contain inaccessible hidden surfaces.
Another drawback in using dark radiation panels within the bring up zone is the excessive amount of time necessary to increase the temperature of larger components to the desired level.
Until recently, none of the art known to the Applicant utilized infrared lamps within the bring up zone of a camel back oven to quickly increase the component's temperature to a desired level. U.S. Pat. No. 5,155,335 which issued Oct. 13, 1992 to Habaki discloses an infrared heater disposed within the oblique portion of the oven adjacent the elevated horizontal heating chamber. A severe drawback in disposing the infrared heat source within the oblique section of the oven is the likelihood of damage to the infrared heating source from exposure to the excessive heat generated by the elevated horizontal heating chamber. Typically, the convection heating which occurs within the elevated horizontal portion of a camel back oven is carried out at extremely high temperatures, much higher than the infrared lamps are capable of withstanding. Although Habaki discusses the use of a infrared heating source within the oblique portion of a camel back oven, there is no teaching, either express or implied of disposing a heating source such as infrared lamps within the lower horizontal portion of a camel-back oven to thereby function as a bring up zone. Further, none of the art presently known to the Applicant utilize any type of heating source within the lower horizontal portion of a camel-back oven.

Paint baking oven having a bring-up zone utilizing short and medium wave infrared lamps


A computer system includes at least one client computer and at least one server computer. An Object Configuration Manager allows a user to distribute and use objects, such as business logic, database tables, and batch applications. Additionally, through the Object Configuration Manager, access to objects can be limited to select users and applications. The Object Configuration Manager is implemented as a software application.

Modern data processing systems are often implemented as distributed computing environments, such as "client/server" configurations in which a number of client computers, typically personal computers or workstations, communicate with one or more "server" computers and request server computers to perform processing tasks.
Distributing objects among client and server computers allows server computers to perform processing tasks that would otherwise have to be all performed by a client computer. Consequently, distributing objects generally improves system performance.
Known client/server systems use business logic objects, and distribute business logic objects between client and server computers. Business logic objects are programs that can be used and accessed by multiple applications to perform functions, such as retrieving data from files and undertaking table manipulations (i.e., updates, deletions, calculations, and the like). Other functions performed by business logic objects include calculating a price of an item and determining if a customer has enough credit remaining.
Unknown in the art is a client server system that allows users to distribute other types of objects, such as database tables and batch applications, to different or new locations. Batch applications are programs that normally process data without user interaction.
Distribution of objects such as batch applications and database tables results in greater system performance because more processing tasks may be assigned to computers that are more available or more efficient at processing those tasks. Additionally, such distribution reduces expensive system or application redesign when the number of server computers in the system is increased. This is because, if database tables and batch applications cannot be distributed to a new location, then these objects generally cannot be placed or created on a new server without reprogramming existing applications. If these objects can be distributed, they can be placed on new servers as needed without reprogramming existing applications.
Also unknown in the art is a system that allows a distribution of an object to take effect while applications are running. Specifically, if an application is open (executing) while the location of an object is changed, known systems require that the application be closed (terminated) and reopened in order for the application to receive data regarding the location change. Therefore, it is desirable to have a system that allows location changes to be known without having to close and reopen applications.
Furthermore, unknown in the art is a client/server system that allows objects to be accessed at different sites for different users and that allows access to objects to be limited to certain users or applications. Therefore, it is desirable to have a client/server system that allows for such user-specific distribution.

System and method for managing the configuration of distributed objects


A balance includes a balance staff pivotally supported rotatably and a balance wheel arranged around the balance staff. The balance wheel has one end portion fixed to a connection arm radially connected to the balance staff and a free end portion configured to be radially deformed. The balance wheel has a first rim connected to the connection arm and a second rim in overlapping relation with the first rim and formed of a material having a linear expansion coefficient different from the first rim. The first and second rims are arranged in a circumferential direction and are bonded together by melting portions formed of melted materials of the first and second rims. The melting portions are formed on upper and lower surfaces of and in an intermediate position between the first and second rims.

1. Field of the Invention
The present invention relates to a balance, a timepiece movement having the balance, a timepiece and a manufacturing method of the balance.
2. Background Art
A speed regulator for a mechanical timepiece is generally configured to have a balance and a hair spring. Such a balance includes a balance staff and a balance wheel fixed to the balance staff. The balance is a member which oscillates by cyclically rotating forward and backward around an axle of the balance staff. In this case, it is important that an oscillation cycle of the balance is set to be within a predetermined control value. This is because a rate of the mechanical timepiece (degree indicating whether the timepiece is fast or slow) varies if the oscillation cycle is beyond the control value. However, the oscillation cycle is likely to vary due to various causes, and for example, also varies due to a temperature change.
Here, an oscillation cycle T described above is expressed by Equation 1 as follows.
                    T        =                  2                                                              π                                              I              K                                                          Equation                                                  1
In Equation 1, the "moment of inertia of the balance" is indicated by I and a "spring constant of the hair spring" is indicated by K. Therefore, if the moment of inertia of the balance or the spring constant of the hair spring varies, the oscillation cycle also varies.
Here, a metal material used in the balance includes a material whose linear expansion coefficient is generally positive and which is expanded due to a temperature rise. Therefore, the balance wheel is radially enlarged to increase the moment of inertia. In addition, since the Young's modulus of a steel material which is generally used in the hair spring has a negative temperature coefficient, the temperature rise causes the spring constant to be lowered.
As described above, in a case of the temperature rise, the moment of inertia is increased accordingly and a spring coefficient of the hair spring is lowered. Therefore, as is apparent from Equation 1 expressed above, the oscillation cycle of the balance has characteristics of being shorter at a low temperature and being longer at a high temperature. For that reason, as temperature characteristics of the timepiece, the timepiece is fast at the low temperature and slow at the high temperature.
Therefore, as a measure to improve the temperature characteristics of the oscillation cycle of the balance, the following two methods have been known.
The first method is a method where the temperature coefficient of the Young's modulus near an operating temperature range of the timepiece (for example, 23° C.±15° C.) is caused to have positive characteristics by employing a constant elastic material such as so-called Coelinvar as the material of the hair spring. In this manner, in the operating temperature range, it is possible to cancel the change in the moment of inertia of the balance with respect to the temperature, thereby enabling temperature dependence of the oscillation cycle of the balance to be lessened.
As the second method, there has been a known method of using a bimetal where metal plates formed of materials having different thermal expansion coefficients are radially bonded together in a portion of multiple rim portions configuring the balance wheel, while one end portion in a circumferential direction is set to be a fixed end and the other end in the circumferential direction is set to be a free end (refer to "The Theory of Horology" published by Swiss Federation of Technical Colleges, English Version, Second Edition, April 2003, pages 136 to 137).
Out of the bimetals, for example, the material of the metal plate positioned radially inward employs a low thermal expansion material such as Invar and the material of the plate positioned radially outward employs a high thermal expansion material such as brass. In this manner, in the case of the temperature rise, the bimetals are deformed inward so as to move the free end side radially inward due to a difference in the thermal expansion coefficients. This enables an average diameter of a rim portion to be radially reduced and enables the moment of inertia to be lowered. Thus, it is possible to cause the temperature characteristics of the moment of inertia to have a negative slope. As a result, it is possible to lessen the temperature dependence of the oscillation cycle of the balance.
However, in the above-described first method, there is a possibility that when manufacturing the hair spring using the constant elastic material such as the Coelinvar, the temperature coefficient of the Young's modulus may vary greatly depending on composition during a melting process and various processing conditions during a heat treatment process. Therefore, a strict manufacturing control process is required, thereby not facilitating the production of the hair spring. Accordingly, in some cases, it is difficult to cause the temperature coefficient of the Young's modulus to be positive near the operating temperature range of the timepiece.
In addition, in the above-described second method, as a general method for configuring the balance wheel, after brazing an annular metal member formed of the high expansion material around an outer periphery of a metal member which is positioned radially inward and formed of the low expansion material by using a brazing filler metal, the balance wheel is formed through a cutting process by turning. Accordingly, an amount of the brazing filler metal is not constant depending on a size of a clearance between parts, and there are large variations in the moment of inertia when the balance wheel is formed. In addition, radial deviation between the parts is likely to occur and a ratio of a plate thickness of a low thermal expansion portion and a plate thickness of a high thermal expansion portion is not constant in multiple rim portions when the balance wheel is formed. Thus, there is a problem in that a deformation volume of the free end has large variations due to the temperature change. In addition, as another method for configuring the balance wheel, an annular high expansion material having a lower melting point than a low expansion material is arranged outside the low expansion material finished to have a predetermined outer diameter, the high expansion material is bonded to the low expansion material by heating these materials at a temperature for melting the high expansion material only, and then the balance wheel is formed through the cutting process by turning. In this method, since the brazing filler metal is not interposed between the low expansion material and the high expansion material, there is no possibility that the moment of inertia may have large variations. However, when forming the balance wheel, inner and outer diameter processing for the low expansion material and outer diameter processing for the high expansion material are processes separate from each other. Thus, it is difficult to keep a constant ratio of plate pressures of respective materials, thereby causing a problem in that the deformation volume of the free end has the large variations due to the temperature change. Furthermore, in both of the manufacturing methods, it is necessary to heat the brazing filler metal or the high expansion material at a high temperature of 800° C. or higher for example, thereby leaving a large residual stress because of a difference in the linear expansion coefficient of the materials during a cooling process. In addition, since it is necessary to perform processing after bonding, a processing stress is left on the balance wheel. Therefore, the deformation is likely to occur when forming the free end at a portion of the rim, and the deformation due to a time-dependent change is likely to occur, thereby causing a problem in that a balance of the moment of inertia tends to deteriorate. As described above, there is a problem in that a target value of the moment of inertia which has been set when designing is largely deviated, and further, a rotation balance deteriorates due to the temperature change. Therefore, it is necessary to adjust the moment of inertia for the overall balance or to adjust the deformation volume for the respective rims with respect to the temperature. In practice, it is necessary to carry out work for attaching a plurality of balance screws to the rim portion and adjusting an attachment position of the balance screws or screwing intensity. For example, even if the temperature rises, if the timepiece is slow, a process of correcting the moment of inertia is performed by carrying out the work such as changing work to transfer the balance screws to the free end side.
As described above, since fine adjustment work using the balance screws is required in practice, the temperature correction needs labor and time, thereby resulting in poor workability.

Balance, timepiece movement, timepiece and manufacturing method of balance


A vehicle seat belt apparatus includes a reel to wind a seat belt, a motor to control a belt tension of the seat belt by rotating the reel, and a lock section to allow rotation of the reel in a normal state, and to prevent rotation of the reel in a belt extracting direction in an actuated state. A control section is provided to restrict a lock operation of the lock section by rotating the motor in a belt retracting direction when the belt tension is controlled by the motor.

The present invention relates to technique of controlling a seat belt for a vehicle.
A Published Japanese Patent Application Kokai No. 2000-177535 shows a seat belt system to restrain an occupant securely by providing a constant belt tension with a spring, and locking the seat belt against extraction with a lock mechanism in case of emergency. This seat belt system controls a seat belt tension in accordance with a vehicle condition, with a belt retracting motor.


A first insulating film, a second insulating film, a third insulating film, an antireflective film, and a resist film are formed in this order on a lower-layer wiring. After dry etching the third insulating film and the second insulating film, using the resist film as a mask, the resist film and the antireflective film are removed by ashing. Thereafter, the first insulating film is dry etched, using the third insulating film as a mask, to form a wiring trench extending to the lower-layer wiring. The dry etching of the third insulating film and the second insulating film is performed using a gas containing fluorine at a pressure of 0.1 Pa to 4 Pa. Ashing is preferably performed using at least one of hydrogen and an inert gas.

1. Field of the Invention
The present invention relates to a method for manufacturing a semiconductor device, and more specifically, to a method for manufacturing a semiconductor device using a insulating film having a low relative dielectric constant as an interlayer insulating film.
2. Background Art
In recent years, the speed of semiconductor devices has markedly risen, and concurrently, transmission delay due to lowered signal transmission speed caused by the parasitic capacitance between wiring resistances and wirings in multi-layer wiring portions has caused problems. Such problems tend to be more significant with increase in the wiring resistance and the parasitic capacitance due to the reduction of wiring width and wiring distance accompanying the high integration of semiconductor devices.
Heretofore, in order to prevent the signal delay due to increase in wiring resistance and parasitic capacitance, copper wirings substituting aluminum wirings have been introduced, and the use of a insulating film having a low relative dielectric constant (hereafter referred to as "low-k film") as an interlayer insulating film has been examined.
The methods for forming copper wiring using a low-k film include the Damascene method (e.g., refer to Japanese Patent Application Laid-Open No. 2000-36484). This method has been known as the technique for forming wiring without etching copper, because copper is more difficult to control the etching rate than aluminum.
Specifically, the Damascene method is a method wherein an etching-stopper film, a low-k film and a cap film are formed on a lower-layer wiring in this order, a wiring trench is formed by dry etching using a resist film as a mask, the resist film is removed by ashing, and then, a copper layer is buried in the wiring trench to form a copper wiring layer. The copper layer can be buried by forming the copper layer using a plating method so as to fill the wiring trench, and then by planarizing the surface using a CMP (chemical-mechanical polishing) method so as to leave the copper-layer only in the wiring trench.
In the above-described step of forming the wiring trench, a fluorine-containing gas is used as the etching gas. Here, in order to form the wiring trench having an ideally rectangular cross section, the pressure during etching is preferably as high as about 30 mTorr to 300 mTorr (about 4 Pa to about 40 Pa) to enhance isotropy. However, in isotropic etching, collision of active species formed by plasma applies large impact to the low-k film. Therefore, for example, when a porous MSQ (methyl silsesquioxane) film is used as the low-k film, there is a problem that methyl groups (—CH3) in the vicinity of the sidewall are released by collision to form a damaged layer, and the relative dielectric constant of the film rises.
When etching is performed in the high-pressure region, fluorine derived from the etching gas is, easily incorporated in the low-k film. If the moisture incorporated in the low-k film in a plating step reacts with fluorine due to heat treatment, hydrofluoric acid (HF) is formed in the low-k film. Since the hydrofluoric acid corrodes the low-k film, voids are formed in the low-k film, and cause a problem of lowering the electrical properties and the reliability of semiconductor devices. Specifically, since the formation of voids lowers the mechanical strength of the low-k film and reduces the adhesion area between the upper-layer film and the lower-layer film, the films are easily peeled off during polishing by a CMP method.
FIG. 16 is a sectional view of a semiconductor device formed using a conventional method. In FIG. 16, a copper wiring layer 29 is formed in an etching stopper film 26, a low-k film 27, and a cap film 28 formed on a lower-layer wiring 25. Reference numerals 30, 31 and 32 denote a barrier metal film, a seed copper film, and a copper layer, respectively. On the sidewall portion of the low-k film 27, a damaged-film 33 is formed in the dry etching step. Fluorine incorporated in the low-k film 27 corrodes the low-k film 27, and a large number of voids 34 are formed.
On the other hand, to cope with the problem that the cross section of the opening becomes a Boeing shape when the low-k film is etched using a fluorocarbon-based gas, a method wherein etching is performed using a mixture gas containing N2 (nitrogen) and H2 (hydrogen) under a low pressure has been proposed (e.g., Patent Document 1).
However, a fluorine-containing gas is not used as the etching gas in the conventional method. The problems of the damage of the low-k film and the voids formed in the low-k film due to dry etching are not solved in the conventional method.

Method for manufacturing semiconductor device


A method and apparatus (10) for grinding the edge of a precured tread (100) is described. The method for removing material from and shaping an edge of a precured tread comprises the steps of:. a) placing the edge of the tread in a V-shaped groove of a grinding wheel; PA0 b) rotating the grinding wheel while it is in contact with the tread edge; and PA0 c) moving the tread and grinding wheel relative to one another, the movement being in a direction causing the edge of the tread to be ground to move through the groove in the grinding wheel. The preferred method comprises mounting a winged tread on an apparatus (10) capable of grinding the wing tip of the tread, the apparatus (10) buffing the tread wing (108) such that the wing tip (110) is ground along axially inner and outer surfaces (112,114) a radial distance of at least 5 mm about the circumferential extent of the wing, wherein the inner and outer surfaces (112,114) of the wing tip are ground to form two surfaces that intersect.

This invention relates to an improved method and apparatus for grinding a tread edge or wing tip to remove material from, roughen, and shape its surface.
In the mounting of treads on a used tire casing, it is known in the art to buff the surface of the casing, removing the worn tread and roughening the remaining surface. This roughening of the casing improves the adhesion of a cushion layer of unvulcanized rubber which is cemented to the casing. The tread rubber is layered on and cemented to the cushion layer. This assembly is then cured. A similar procedure may be employed in applying a precured tread to a new tire cured casing. A new tire casing would be buffed in the crown region, without requiring the removal of the tread.
It has been determined that a roughening of a casing-contacting precured tread surface prior to cementing to the cushion layer improves the tread adhesion. The roughening procedure, commonly called buffing, is generally accomplished by the use of wire wheels. The wheels remove oxidized rubber and increase the surface area to be bonded, thus improving adhesion characteristics. Conventional buffing of the casing and the precured tread were directed circumferentially creating minute grooves around the circumferential surface of the tread and the casing.
With regard to winged treads, trials have shown that circumferentially buffing at the inner curvature of the wing did not produce a uniform buff. Uniformity of buffing being important to bond quality required that an alternative method be developed. Such a method was described in U.S. patent application Ser. No. 07/833,208.
It was the purpose of that invention to provide a method and apparatus for buffing a precured tread wherein the resulting roughened tread surface provided a means for improved air evacuation and an improved bond. This was accomplished by insuring that at least a portion of the roughened grooves terminated at the tread edges, thus providing a means for air evacuation.
It was a further purpose of that invention to describe and illustrate a method and apparatus for uniformly buffing a precured wing tread whereby the inner surfaces of the wings were uniformly roughened such that the grooves extended to a tread edge.
An improvement over the method described in U.S. patent application Ser. No. 07/833,208 has been discovered. A new method of grinding the inner and outer surfaces of the wing tip or edge of a precured tread can greatly reduce the potential of wing or edge lifting from the casing.

Tread edge grinding method and apparatus


An applicator for application onto and embossing microprofiling of a fluidic medium on a substrate, in particular in the aerospace sector, and a corresponding application device having such an applicator. The applicator has a circumferentially moving die that has an embossing profile, a press for the die and a stabilizing device, in particular a hardening device, for the applied medium. In addition, the applicator has a hollow support body, surrounded by the die at a distance forming a gap, the press being arranged in the gap. The application device has, in addition to the applicator, a handling device for a relative movement between the applicator and a workpiece.

Such an applicator is known from DE 10 2006 004 644 A1. The applicator applies a hardenable varnish on a surface of a substrate and in doing so also embosses it on its surface, whereby the varnish is provided with a microstructure. Such a varnish having a microstructure is also called riblet. The applicator has a circumferentially movable die having an embossing profile and is pressed by a robot against the surface, in particular the so-called substrate surface, and moved along the latter. The applicator has a roller inflatable by pressure on the outer circumference of which the die is firmly mounted and tensioned by the gas pressure. A hardening device directed towards the pressing area is arranged in the roller.


An inflatable boat platform floatation device having a “T” or “U” shaped opening in the front surface that receives the motor(s) and wraps around the motor(s) and sides of a boat allowing the front surface to engage the transom and side surfaces forming the opening at the front surface to engage the sides of the boat near the stern such that the platform rests against the boat in a manner that shields the propeller(s) from ropes, debris, hands and feet while providing a platform for the passengers outside the boat. The platform has top and bottom surfaces that are connected by stitched polyester fibers (“SPF”) which hold the surfaces together and determine the platform's thickness when inflated and keep the surfaces uniform and rigid when the platform is inflated. The upper surface includes at least one ethylene vinyl acetate (EVA) pad. The platform further includes a plurality of handles, at least one inflation and deflation valve and a plurality of D-rings for securing the platform to a boat and tethering other platforms or tethering other watercraft to the platform.

The Problem.
Various platform devices for boats are known in the background art. For instance, U.S. Pat. Nos. 8,702,461, 7,867,049 and 7,837,526 issued to d'Offay (the "d'Offay patents") disclose a floatable workstation including an inflatable base assembly having optional partitions disposed internally within an receiving cavity of a tube to form one or more inflatable chambers, each chamber including a valve for inflating the chambers. A deck attachment/assembly consisting of a plurality of deck boards are connected together to form a work surface/floorboard and are positioned on the upper surface of the inflatable base assembly. A deck attachment textured surface is provided upon the assembly for removably securing the series of deck boards.
U.S. Pat. No. 7,302,902 ("the '902 patent") issued to Stillman discloses an inflatable mooring station for use with a fixed or floating platform extending over a body of water. The mooring station is attached to the platform. The mooring station includes a buoyant, inflatable body and at least one line tie. The mooring station forms two three-sided docking areas for receiving watercraft.
U.S. Pat. No. 6,805,066 ("the '066 patent") issued to Johnson discloses a floating platform that has a flat low profile for use by swimmers, divers, boaters, and those engaged in other activities on water. The platform is used alone or as a module in combination with other such floating platform modules; attaching the modules to form a larger floating platform.
U.S. Pat. No. 6,475,048 ("the '048 patent) issued to Gredy discloses an inflatable raft tethering arrangement that includes an inflatable raft and a tether. The inflatable raft has an aperture and a rigid reinforcement. The tether includes a clasp, a cord, and a suction mechanism. The clasp is secured to the raft through the aperture and the cord secured to the clasp and the suction mechanism. The suction mechanism is attached to a surface to keep the raft in a particular area.
U.S. Publication No. 2006/0003646 ("the '646 Publication") a towable structure configured to be towed behind a boat while floating above the surface of a body of water.
It appears that no single prior art reference uncovered in the search clearly sets forth all of the elements of the invention. No reference we found discloses an inflatable and floatable boat platform having a "T" shaped opening or cutout that receives the motor(s) and wraps around the sides of the boat allowing the front surface of the platform to engage the transom while shielding the motor from ropes, debris, hands and feet. The references also do not disclose the use of stitch polyester fibers (SPF) to connect the top and bottom surfaces together so as to hold the surfaces together and keep the surfaces uniform and rigid as the platform is inflated. Moreover, the references to not disclose a platform having a top surface that comprises EVA foam.
While the d'Offay references disclose a floatable workstation including an inflatable base assembly that can be tethered to a boat. The d'Offay references to not disclose or suggest a "T" or "U" shaped opening for receiving an outboard motor(s) so as to allow the front surface of the platform assembly to engage the transom of the boat. In fact, the d'Offay references do not even contemplate the desire for an inflatable platform that can fully engage a boat transom. Rather, the d'Offay patents disclose an inflatable workstation design for being tethered to the boat for washing, waxing, buffing or making repairs to the outer surface of the boat to maintain both the function and appearance of the vessel.
Likewise, none of the other references disclose a "T" or "U" shaped opening or opening that could be combined with d'Offay. The '066 patent merely discloses a floating platform. The '902 patent discloses an inflatable mooring station that provides two "U" shaped openings for holding personal watercraft, such as jet skis. The mooring station disclosed in the '902 patent is not designed for receiving an outboard motor to engage a transom, nor does the reference contemplate or suggest such a use, even if possible. The '048 patent discloses an inflatable raft, tether and suction cup assembly for attachment to a surface to keep the raft in a particular area and does not disclose or suggest a design for having the raft engage the transom of a boat. Lastly, the '646 Publication discloses an inflatable towable float designed to be towed behind a boat, which teaches away from and clearly does not suggest engagement with a boat transom.
The foregoing patents fail to disclose an inflatable boat transom platform device that rests against the transom and sides of a boat while enveloping the motor as realized by the instant invention. It is therefore desirable to have such an inflatable boat transom platform that protects the propeller from debris, ropes, hands and feet while providing a comfortable platform for relaxing behind a boat. If there existed such a device it would address the shortcomings in the background art and provide a convenient device for enabling an enjoyable and safe boating, swimming and fishing experience behind a boat. As there are no known devices that provide an inexpensive albeit practical inflatable boat transom platforms, there exists a need for such a device. It is, therefore, to the effective resolution of the aforementioned problems and shortcomings of the prior art that the present invention is directed. The instant invention addresses this unfulfilled need in the prior art by providing an inflatable boat transom platform device as contemplated by the instant invention disclosed.