Digital predistortion system, methods and circuitry for linearizing a non-linear element using a multiply partitioned architecture that first addresses long or “memory” effects, and separately addresses shorter duration effects. These blocks or circuits are operated with the non-linear element to provide a highly linear system. A first or long predistortion block receives a baseband signal input and includes a plurality of parallel memory blocks each including a programmable linearity, a digital filter, summers, multipliers and multiplexers with control signals for configuring the blocks to form filters of different types. A second or short predistortion block is coupled to the long predistortion block and comprises a generalized Nth order polynomial filter coupled to a programmable linear equalizer. The first predistorter block compensates for effects of a longer duration, and the second predistorter block compensates for effects of a shorter duration. Methods for initializing, parameterizing and adapting the system are disclosed.

Generally, power amplifiers as are used in the communication art exhibit non-linear output characteristics, particularly as the transmit power level is increased in response to the input signal. Non-linear behavior results in distortion in the output signal that is undesirable, and may cause the communications system to fail to meet the required performance metrics as set by standards organizations or the governing regulatory agencies. However, as is well known, any power transistor driving a load will act in a non-linear fashion when operating in the transistor saturation region, that is, the linear relationship of the voltage input-voltage output characteristic is only maintained in the linear operation region of the transistor. As the input signal power is increased to and beyond the saturation point of the driving transistors in the power amplifier, the response of the transistor(s) does not change linearly and the power output characteristic therefore inherently becomes non-linear.
An important application for non-linear elements, for example, these power amplifiers, in the current art are in the area of wideband cellular communications. A typical application for a power amplifier is a forward or transmitter function for a cellular telephone base station (of course, the base station also receives as well, however the receiver function is not addressed here). Communication is accomplished using several well known standard protocols for voice and/or data transmission, for example CDMA, WCDMA, TDMA, GSM, EDGE, 3G and the like. These applications require and will continue to require increasing amounts of data to be transmitted over the cellular system. Further the communications units may be devices other than cell phones, including wireless portable email terminals, computers both fixed and portable such as laptops and palm computers, fixed location, handheld, and vehicle mounted telephone equipment, personal internet browsing devices, even video equipment and other communications or data receiver or transmitter applications. In these applications and other applications, RF transmit power is used and applied to a power amplifier with significant power consumption, so that distortion may occur when the input signal and the power applied take the power amplifier into operating regions where the output signal is not a linear function of the input signal.
FIG. 1 depicts a simplified schematic of the RF transmit portion (sometimes called the "analog" portion) for such a prior art base station application. (Only a single RF transmit function and one antenna is shown, however, many may be used). In FIG. 1, digital baseband transmit data VFF is input to a digital to analog converter (DAC) 3, which outputs analog data for transmission to a frequency converter 5 that is clocked by a local oscillator 15. The frequency converted analog signal is next presented to a power amplifier 11, and the resulting analog amplified output signal Vout is presented to an antenna 14 for transmission. A feedback path then returns an observed version of the analog transmitted signal Vout, labeled VFB, for observation through a coupler 13. This is accomplished, for example, by coupling the antenna signal to a second frequency converter 17 which is likewise clocked by local oscillator 15, the converted analog observation signal is then processed by analog-to-digital converter 19 and digital signals VFB are made available for observation, and for use in compensation of the transmit signal using feedback techniques. (Note that the voltage VFB is not the voltage received from other transmitters at the antenna, these are sent along a different path to an RF receiver, which is not addressed here).
During operation of such an RF transmit function, it is known that as for any power amplifier where a power transistor drives a load based on an input signal, if the output signal to be generated is such that the transistor enters its saturation region, the output becomes non-linear; that is the output no longer varies linearly with the input signal. This effect is described as non-linear distortion in the output signal. A simple and somewhat effective approach to limiting non-linear power amplifier distortion known in the prior art is to "back of" the output power, so that the amplifier operates only within the linear part of its voltage response characteristic. However, to be effective this output power backoff must account for the peak-to-average ratio (PAR) of the input signal. In order to account for the PAR, and still output the correct signal, the required transmit power backoff to maintain linear performance of the driving transistors therefore becomes very significant. This results in very low amplifier efficiencies. A metric sometimes used in the art for describing the peak amplitude verses average amplitude of a signal is the term "crest factor". As an example, a CDMA signal of the present cell phone systems may exhibit a PAR of up to 13 dB. Power backoff is a source of inefficiency in the operation of the power amplifier, because the amplifier is being intentionally operated at lower than possible output power levels for a given supply power. This amplifier inefficiency results in additional power consumption during operation of the system and therefore increases the manufacturing costs of the system, because to achieve a certain output power requires that a much more powerful amplifier be used, while if the backoff were not required, a lower gain amplifier can be used, and lower costs for the system would accrue. When "back of" is used to prevent distortion in the output, this inefficiency results in increased operating or ownership costs for the system, as the operating power expended for the actual transmit power is increased.
One prior art approach to reducing the amount of "backoff" required is to modify the input signal prior to applying it to the power amplifier by applying "crest factor reduction" or CFR. When CFR or peak amplitude reduction is applied to a signal, large amplitude peaks are identified in the input signal, a compensating signal with an opposing crest is created and then this inverted signal is combined with the input signal so as to remove only the largest peaks in the input signal, and so reduce the crest factor, i.e. reduce the PAR, prior to presenting the signal to the power amplifier for transmission. This approach advantageously reduces the amount of "backoff" required to maintain the power amplifier in its linear range, and efficiency for the system is thus increased. Processors specifically designed to provide the CFR function are commercially available, for example Texas Instruments, Inc. supplies integrated circuits designated as part no. GC1115 particularly directed to implementing CFR in communications systems. The GC1115 is a crest factor reduction preprocessor that receives digital upconverted input signals as I (in phase) and Q (quadrature phase) form digital signals, for example, and outputs a modified I,Q, signal with the peaks removed for transmission with reduced PAR. The GC1115 integrated circuit is operated by a programmable DSP executing software. Other manufacturers offer similar integrated circuit solutions for implementing CFR in commercial transmit systems as is known in the art.
In addition, or as an alternative to crest factor reduction, power amplifier distortion may be addressed by amplifier linearization techniques. Known approaches are to "linearize" the power amplifier by placing a preprocessing element between the input signal and the power amplifier. Prior art analog linearization approaches include the use of a non-linear, inverting amplifier in a feed forward architecture which is designed to produce a signal output that has distortion. This signal has distortion that is in direct opposition to the distortion observed in the power amplifier for a given input signal, the inverting distortion is amplified by a second amplifier, and the output is subtractively combined with the output of the power amplifier prior to presenting the signal to the antenna. In this manner, the overall response of the amplifier system as observed at the transmit antenna remains linear. From a complexity standpoint, the analog feed forward inverse distortion function must be very precise over a range of voltages, temperatures and conditions and thus implementing such a system can be costly, and in fact it may not be possible to build a practical amplifier to achieve the desired performance goals. From an efficiency point of view, the added analog amplifier adds additional power consumption similar to the power amplifier itself, which therefore may in fact result in no improvement over the power amplifier alone in a "backoff" configuration.
As an alternative approach to linearizing power amplifiers, digital predistortion circuits ("DPD") are also known in the prior art and are increasingly used. Typically these are described as implementing algorithms which may be implemented conveniently using existing DSP circuits for example, digital filters in combination with microprocessors and memory devices, or using integrated circuits which implement the algorithm in dedicated hardware as one or more ASICs, gate arrays, or custom integrated circuits. An off the shelf predistortion circuit for use in linearizing an amplifier is sold by Intersil Corporation, designated Intersil part number ISL 5329. The digital predistorters of the prior art typically attempt to create an inverse distortion to that distortion expected or known in the power amplifier, and this inverse distortion is applied on the input signal prior to presenting the signal to the power amplifier. Thus the two amplifier gain stages are operated in a cascade, and the predistorter amplifier provides an "inverse" function to compensate for the distortion expected in the power amplifier. The inverse distortion can be based on a model for the power amplifier which predicts the power amplifier distortion based on the currently observed samples of the incoming signals. Alternatively, a look up table solution can be developed using experimental observations of the power amplifier over a range of expected input signal situations. The predistorter and the amplifier are coupled in cascade to attempt to compensate the overall signal characteristic, and to cause it to be linear over the operating range of the power amplifier.
One disadvantage of the digital predistortion approaches of the prior art is that many current approaches assume the power amplifier is a "memoryless" non-linear amplifier. A memoryless approach begins with the premise that the output of the power amplifier at a given time depends solely on the input signal at that given time, and not on other effects. This may be considered a "0th" order polynomial representation filter. The prior art approach assumes the non-linear element distortion is simple, that is AM-AM (amplitude) and AM-PM (phase) distortion. However, in practice it is known that a power amplifier has significant memory effect performance characteristics. The term "memory" and "memory effects" refers to effects that are non-linear effects in the power amplifier response. These effects may include envelope effects and frequency effects. Envelope effects may be primarily the result of thermal hysteresis and electrical characteristics of power amplifiers. Frequency memory effects are due to variations in the frequency spacing of the input signals and may be characterized by shorter time constants. The temperature of the amplifier at an instant in time may in fact be partly determined by a thermal effect sometimes referred to as "self heating" that occurs during periods of peak power transmission, the temperature also depends on the environment which may include climate effects. Alternatively the amplifier may operate at a cooler than normal temperature for periods of no or little power transmission. The ambient temperature, which may or may not include the effect of operating heating and air conditioning equipment, may change rapidly or slowly and affect the distortion of the power amplifier. The previous signal transmissions and the ambient operating environment therefore create various short and long term memory effects; thus an effective amplifier linearizing method and system must address these long term or memory effects, in addition to the memoryless effects. That is, to effectively linearize the non-linear element (the power amplifier in this case) the design approach and system must incorporate adaptive functions that adapt for memory effects. In fact, it may be practically impossible to create a real time "inverse" amplifier predistortion circuit that can be commercially implemented for certain amplifiers and applications.
FIG. 2 depicts one typical prior art approach to predistortion for a power amplifier. In FIG. 2, power amplifier 25 is depicted as a circuit element, the digital to analog converter, driving transistors, and in the feedback path, the required analog to digital converter, as are shown in FIG. 1 are not depicted in full in FIG. 2, but are included in the box enumerated 25 including the power amplifier denoted "PA".
Digital predistorter 21 modifies the input signal VIN before it is presented to the power amplifier 25 in a manner intended to invert the distortion that will occur in the power amplifier, and therefore, linearize the output of the overall system. An input signal sequence x(k) is received and is coupled to magnitude squared detecting unit 27 and a random access memory block 33 labeled RAM1. An adaptive device 29 receives the output of the magnitude detecting device 27. Adaptive device 29 may be a look up table (LUT) or alternatively, a more complex polynomial expression unit (POLY) may be used.
The adaptive device 29 provides a predistortion signal to the multiplier 31. The node 31 uses input signal x(k) and the predistortion signal to present a corrected signal VFF to the power amplifier PA, which presents signal VOUT to the antenna or other output device. Note that in this predistortion scheme, it is observed that the predistorter can be made rotationally invariant, thus the adaptive circuit 29 only needs to receive the magnitude squared data of the input signal to affect the signals in the desired manner.
A feedback path provides a feedback form of output signal VOUT (appropriately frequency converted and following analog to digital conversion as shown in FIG. 2,) VFB, to a second random access memory device 35 labeled RAM2. Memory storage devices RAM1, RAM2 are coupled with a processing unit 37 labeled SP which may be, for example, a commercially available digital signal processor (DSP). Other processors such as fixed and floating point processors, reduced instruction set (RISC) machines, multiprocessor devices, and programmable microprocessors such as x86, Pentium, ARM, MIPS and other known processors may be utilized, or a custom processor may be provided. Signal processor 37 uses information relating to the input signal VIN from the memory device RAM1 and correction information relating to the output signal VOUT from the memory device RAM2, and based on difference determined between the two captured stored signals, provides a correction signal to adaptive circuit 29. The correction signal relates to differences between the observed output signal VOUT and input signal VIN, and is based upon the assumption that ideally, the signals VOUT and VIN should be substantially equal except for scaling (the scaling being the desired gain provided by the power amplifier PA) and other intended differences. Undesired differences detected in the comparison between the input signal and the observed output signals are assumed to have been introduced by the predistorting device 21 or the PA 25; these are then sought to be cancelled by the correcting signal.
FIG. 3 is a graphical depiction of the VOUT-VIN curves of the prior art circuits of FIG. 2. The ideal or linear response is represented by the line labeled IDEAL in FIG. 3, the dashed line. The response for a typical power amplifier PA is the solid curved line labeled PA. The possible digital predistortion curve for a predistorting signal is the solid line labeled DPD. The combined response curve that can be expected is the line labeled DPD+PA in FIG. 3.
In FIG. 3, it can be seen that when the output voltage VOUT (vertical or Y axis) exceeds the voltage where the power amplifier transistors are saturated (VSAT) the response will become increasingly non-linear. However, even at voltages below that level, the operation of the power amplifier alone is non-ideal as can be seen from the curves, the response moves away from the linear, IDEAL line at lower operating voltages. However, in the area of the graph labeled "Feasible Operation" it is possible to linearize the amplifier (in a simple case, such as illustrated here) using a digital predistortion function that predistorts the signal, this is seen by comparing the curve labeled DPD+PA with the IDEAL curve, in the "Feasible Operation" region it is the same as the line labeled IDEAL, or in effect, the amplifier is linearized. In the area labeled "Infeasible Operation", it is not possible to correct the distortion. Thus the use of CFR techniques along with a digital predistortion scheme may be important in order to fully linearize a non-linear element in a particular application, otherwise even with a predistortion function, the system may operate in a non-linear region.
The design approach of a system incorporating a prior art predistortion circuit can be best understood by considering the system as two cascaded gain stages, one for the power amplifier, and one for the predistorter circuit. This arrangement is depicted simply as two blocks in FIG. 4. Here the voltage characteristic of the digital predistorter 21 is depicted having a first voltage transfer characteristic, and the voltage characteristic of power amplifier 25 is depicted having a second voltage transfer characteristic exhibiting the typical non-linear characteristic of a power amplifier.
The design goal of a digital predistortion system is to create a combined linear input-output gain of G for the system, so that the gain F of the predistorter satisfies the function of:F(H(VIN))=G(VIN)=VOUT where H is the gain of the power amplifier, F is the gain of the predistorter, and G is the ideal linear gain of the cascaded system.
With reference now to FIG. 5, there is shown an exemplary basestation system 50 as is known in the prior art for the forward transmission path for existing cellular systems. The power amplifiers in such a system are known to be non-linear elements.
In FIG. 5, network switch 51 is depicted which receives information from a networked system, for example, a typical network fabric in a conventional wired or land line telephony system. A plurality of base band processors 55 are coupled in a parallel fashion to receive and transmit information to and from the network switch 51. Element 57 is a baseband switch distribution block which combines (depicted only in the forward transmit direction, although received signals are also processed) baseband data for the individual communications channels for each baseband processor 55. Radio Card/RFM module 61 includes a formatter, forward transmit processor, data converter for transmission TX RF, and on the receiver side, data converter for received signals RX RF, a digital down converter which may be implemented, as shown here, with Texas Instruments part no. GC5016 programmable up/down converter or an equivalent, and a control processor 59.
Radio Card/RFM 61 includes processing circuitry for processing the baseband signals prior to presentation to the power amplifier and in the prior art may incorporate digital predistortion circuitry. Power amplifier 41, as shown in FIG. 1, is a transmit power amplifier which is the amplification element to be linearized. Duplexer 65 will pass the signals to be transmitted to the antenna 71 and separates the received signals and passes those to tower mounted amplifier (TMA) modulator 67, which is coupled to the receive input of RFM 61. Radio Card/RFM 61 is shown as a single instantiation in FIG. 5; however in a practical system there may be many such cards in a given application as indicated by the replicator dots shown beneath element 61. Power amplifier 41 is simplified for illustration and includes the amplifier and RF transmit and receive circuitry of FIG. 1 for the transmission of analog signals output at antenna 71. Duplexer TX/RX filter 65 combines and separates the transmitted and received signals. TMA block 67 is a tower mounted amplifier that performs the function of amplifying the received signals from the antenna 71. It is recognized that many other elements such as noise filters, bandpass filters, upconverters and downconverters, may be used as is known in the art, however these are not illustrated in FIG. 5 for the purpose of keeping the illustration simple in this explanatory example.
Downconverter GC5016 is a commercially available digital downconverter integrated circuit available from Texas Instruments, Inc. and other similar circuits are available from other vendors as is known to those skilled in the art. This integrated circuit receives digital data from the analog to digital converter in the power amplifier and provides a conversion to a lower frequency, and decimation of the signal required to use the received signal in the baseband processors.
In operation, the system of FIG. 5 receives signals from the Net Switch 51, these are individually processed by the baseband processors 55 as channels, these are then combined for transmit messages, (or separated for receive messages), by the baseband switch/distributor 57, and the signals are provided to one of the radio cards/RFM 61. The signals for forward transmission to a cellular/wireless telephone system, for example, are then provided to the transmit processor in digital form, predistortion and linearizing steps are performed, the data is converted to analog format, up converted and once in the appropriate form, provided to the power amplifier 41 and driven out as a transmission signal on antenna 71. Received signals at the antenna are separated from the transmit signals in block 65, the duplexer, attenuated at TMA block 67 and provided to the analog to digital data converter RX RF, the digital data signals are then down converted by GC5016 integrated circuit or another similar downconverter, and provided through the BP IF/format block to the baseband switch 57, and then separated into channels for processing by the base band processors 55, and the resulting data is placed back in the switched network via switch 51.
Thus, there is a continuing need in the art for a system and method that provides efficient adaptive linearization of a non-linear element, such as a power amplifier for RF transmission. The system and methods should be realizable using commercially available technology. Embodiments and methods of the present invention described below address this need.

System and method for digitally correcting a non-linear element using a multiply partitioned architecture for predistortion


A method and system for detecting a search intent of a user are provided. The method includes receiving an input search query from a user device; tokenizing the input search query to at least one token to create at least one tokenized query; processing the at least one tokenized query by a plurality of engines, wherein each engine of the plurality of engines configured to compute a certainty score that indicates a probability that the at least one tokenized query is mapped to at least one entity, wherein each engine of the plurality of engines is further configured to correspond to at least one entity indicating a topic of interest, thereby the plurality of engines are configured with different entities; receiving from a set of engines of the plurality of engines their respective entities and computed certainty scores, wherein the set of engines output computed certainty scores above a predefined threshold; and analyzing the received certainty scores and the respective entities to determine the search intent.

Search engines are used to search for information over the World Wide Web. A web search query refers to a query that a user enters into a web search engine in order to receive search results.
A query received from a user device may be explicit or implicit in different levels. An implicit query makes it complicated to provide appropriate search results to the user because the user intent behind such queries is unclear. As an example, if the input query is "Madonna clips" it is unclear whether the user is interested in listening to the entertainer Madonna's music clips, viewing Madonna's video clips, or downloading Madonna's music or video clips to the user's device.
It would therefore be advantageous to provide a solution that overcomes the limitations of the prior art.

System and method for detecting a search intent


A spectroscopic sensor for measuring flat sheet product is disclosed. The disclosed sensor uses a combination of spectrometers and single-channel detectors and filters together with a broadband source of illumination to optimally measure multiple properties of a flat sheet product. A spectrometer is used to measure over a spectral range where an easily configurable set of wavelength channels is needed and where the signal-to-noise ratios and spectral resolutions of the channels are consistent with the spectral range and number of pixels of the spectrometer; while one or more single channel detector and filter combinations are used to measure, with high signal-to-noise ratio, at specific wavelengths within or outside the spectral range of the spectrometer(s). Therefore, the single channel detectors can be used to complement the information provided by a spectrometer or to extend the working range of a spectrometer by providing single wavelength measurements anywhere in the visible, near-IR or mid-IR spectral regions.

1. Field of the Invention
The invention relates to optical sensors for the paper and plastics flat sheet industries, and more particularly, to a spectroscopic sensor for measuring characteristics of flat sheet products.
2. Discussion of the Prior Art
In the paper and plastics industries, during the process of manufacture of flat sheet products, various sheet properties of multi-layered and single layer sheets can be detected with visible and infrared radiation while the sheet making machine is operating. Multiple components of the sheet including basis weight, coating weight, moisture content, opacity and layer thicknesses can be measured by sensors which detect the amount of radiation that the sheets absorb, transmit or reflect from a beam of infrared light or other radiation. In systems employing such sensors, radiation that interacts with the sheet is typically compared at two different wavelength bands, a reference wavelength band and a measurement wavelength band, to measure different properties of flat sheet products.
FIG. 1 illustrates a typical prior art sensor configuration. An infrared (IR) radiation source 103 directs a beam of IR radiation 101 towards a sample 110. The beam is transmitted through beam conditioning optics, such as collimating lenses and/or focusing lenses 190, 192, 146, 195. These lenses condition the optical radiation for optimal sensor efficiency. The optics 146, 195 in front of the detectors 145, 135, respectively, are typically focusing lenses and those adjacent to the sample are typically collimating or focusing lenses 190, 192. IR radiation is partly absorbed, reflected and transmitted by the sample 110 depending on its various properties. Beam splitter 120 splits the IR radiation into two separate beams 118 and 128. Each beam is directed to a separate bandpass filter 170 and 160, respectively, each of which is positioned and aligned immediately before detector 135 and 145, respectively. The bandpass filters 170 and 160 are configured to pass IR radiation at selected regions of the infrared spectrum. Any IR radiation not within the selected region of the spectrum is reflected by the filters back to the beam splitter 120.
Depending on the intensity of the radiation detected at the detector, the detector generates an analog electrical signal which may be converted to a digital signal for observation. The described sensor arrangement can measure different properties of the sample under observation. For instance, in the thickness measurement of thin plastic films, one of the two infrared bandpass filters only passes infrared radiation having wavelengths in a selected region of the infrared spectrum. This first region of the spectrum is called the "reference" region, and the associated detector is called the "reference" detector. The reference channel spectral range is located in a specific region of the IR spectrum which is not associated with a signature absorption band of the material or materials which the film is composed of. This reference channel however should be indicative of all other optical loss mechanisms in the sensor system and sheet that are not indicative of the optical absorption of the material being sensed. These other properties may include such things as scattering loss from the sheet or the insertion losses of the optical components used in the sensor system.
A second bandpass filter is associated with the second infrared detector and passes only wavelengths in a second selected region of the infrared spectrum. This second region of the spectrum is called the "measure" region. The detector associated with the "measure" region of the spectrum is called the "measure" detector. The wavelength region of the measure channel is chosen to encompass an IR spectral range that is characteristic of an optical absorption band associated with the material being sensed. The optical losses in the measure channel ideally include all the same losses that are associated with the reference channel in addition to the characteristic absorption band of the material being sensed. If a comparison is made between the optical signals detected by the reference and measure channels then we can ascertain the amount in terms of weight or thickness of the material being sensed.
The arrangement described consists of two single channel detectors—one reference and one measure. A pair of detectors will typically measure a single constituent component of the sheet such as total thickness, moisture or cellulose weight. However, often multiple characteristics or multiple components of the sample need to be measured. For example, when measuring a plastic sheet that is composed of multiple components, the relative concentration of each component must be determined. By necessity, this means looking at a wider spectrum so that multiple components of the sample can be measured at the same time. This can be done by stacking reference and measure channel pairs which have had their filters chosen for each constituent component of the sheet. Occasionally common reference channels can be used hence eliminating one or more of the reference channels.
An alternative to using multiple pairs of single detectors with filters is to use an optical spectrometer. An optical spectrometer can provide a convenient method of measuring properties of light over a larger, continuous portion of the spectrum while achieving improved spectral resolution. The spectrometer outputs light intensity as a function of wavelength over a specific range of wavelengths which is split up into pixels. For example the PSG2.2 InGaAs spectrometer from Zeiss covers a spectral range of 1000 to 2150 nm with 256 pixels and has a spectral resolution of 16 nm. Another example is the PSG1.7 InGaAs spectrometer from Zeiss which covers a spectral range of 960 to 1690 nm with 512 pixels and has a spectral resolution of 5 nm. This increased spectral resolution and convenience of a spectrometer is typically obtained at the expense of signal-to-noise ratio on the intensity measurement. Also, in the design of spectrometers one can trade off spectral resolution for spectral range.
Visible, near-IR and mid-IR sensors share a common need for large spectral range, high spectral resolution and high signal-to-noise ratio. Spectral range is needed for the sensor to address a large number of applications whereas spectral resolution and signal to noise ratio are key to good sensor accuracy and repeatability. However, these requirements are usually mutually exclusive. For example, a single detector plus filter combination that allows for high signal to noise ratio and good spectral resolution does not provide broad spectral range. Conversely, a compact spectrometer provides high spectral range with good spectral resolution but at the expense of signal-to-noise ratio and hence repeatability.
Additionally, spectrometers can cover a wide spectral range but, due to practical and technical reasons, a single spectrometer does not cover the entire range between the visible and the mid-IR range. Applications where this is an issue can be found in the plastic and paper industries. For example, a single sensor is desired to measure the thickness of thin plastic films on biaxial film production lines. The very thin films can be measured using interferometry in the visible or near-infrared spectrum where absorption is weak, whereas thicker films (greater than 15-20 μm) and edge beads are measured using absorption further out in the near-infrared spectrum. Commonly assigned U.S. Pat. No. 7,088,456 to Germanenko et al. discloses a system and method for analyzing characteristics of thin films using IR sensors; this patent is incorporated herein by reference. Similarly, moisture or coat weight in paper applications and thickness in plastic applications are measured in the near-IR spectrum while opacity is measured in the visible spectrum. In the above described cases, a single spectrometer or single channel detector and filter combinations cannot fully address the measurement needs. Many types of spectrometers exist, including array spectrometers, Fourier Transform Infrared (FTIR) spectrometers, Acousto-Optic Tunable Filter (AOTF) spectrometers, Linear Variable Filter (LVF) spectrometers and Fabry-Perot spectrometers. However, at present, no single spectrometer is available with required noise characteristics, spectral resolution (i.e. number of elements), and wavelength range.
In prior art optical sensors are designed either with a spectrometer or individual filter and detector combinations.

Spectroscopic sensor for measuring sheet properties


A technique for efficiently boosting the priority of a preemptable data reader in order to eliminate impediments to grace period processing that defers the destruction of one or more shared data elements that may be referenced by the reader until the reader is no longer capable of referencing the data elements. Upon the reader being subject to preemption or blocking, it is determined whether the reader is in a read-side critical section referencing any of the shared data elements. If it is, the reader's priority is boosted in order to expedite completion of the critical section. The reader's priority is subsequently decreased after the critical section has completed. In this way, delays in grace period processing due to reader preemption within the critical section, which can result in an out-of-memory condition, can be minimized efficiently with minimal processing overhead.

1. Field of the Invention
The present invention relates to computer systems and methods in which data resources are shared among concurrent data consumers while preserving data integrity and consistency relative to each consumer. More particularly, the invention concerns an implementation of a mutual exclusion mechanism known as "read-copy update" in a preemptive real-time computing environment. Still more particularly, the invention is directed to a technique for reducing performance degradation due to the preemption of non-real-time processes holding references to shared data that could otherwise be freed.
2. Description of the Prior Art
By way of background, read-copy update is a mutual exclusion technique that permits shared data to be accessed for reading without the use of locks, writes to shared memory, memory barriers, atomic instructions, or other computationally expensive synchronization mechanisms, while still permitting the data to be updated (modify, delete, insert, etc.) concurrently. The technique is well suited to multiprocessor computing environments in which the number of read operations (readers) accessing a shared data set is large in comparison to the number of update operations (updaters), and wherein the overhead cost of employing other mutual exclusion techniques (such as locks) for each read operation would be high. By way of example, a network routing table that is updated at most once every few minutes but searched many thousands of times per second is a case where read-side lock acquisition would be quite burdensome.
The read-copy update technique implements data updates in two phases. In the first (initial update) phase, the actual data update is carried out in a manner that temporarily preserves two views of the data being updated. One view is the old (pre-update) data state that is maintained for the benefit of operations that may be currently referencing the data. The other view is the new (post-update) data state that is available for the benefit of operations that access the data following the update. In the second (deferred update) phase, the old data state is removed following a "grace period" that is long enough to ensure that all executing operations will no longer maintain references to the pre-update data.
FIGS. 1A-1D illustrate the use of read-copy update to modify a data element B in a group of data elements A, B and C. The data elements A, B, and C are arranged in a singly-linked list that is traversed in acyclic fashion, with each element containing a pointer to a next element in the list (or a NULL pointer for the last element) in addition to storing some item of data. A global pointer (not shown) is assumed to point to data element A, the first member of the list. Persons skilled in the art will appreciate that the data elements A, B and C can be implemented using any of a variety of conventional programming constructs, including but not limited to, data structures defined by C-language "struct" variables.
It is assumed that the data element list of FIGS. 1A-1D is traversed (without locking) by multiple concurrent readers and occasionally updated by updaters that delete, insert or modify data elements in the list. In FIG. 1A, the data element B is being referenced by a reader r1, as shown by the vertical arrow below the data element. In FIG. 1B, an updater u1 wishes to update the linked list by modifying data element B. Instead of simply updating this data element without regard to the fact that r1 is referencing it (which might crash r1), u1 preserves B while generating an updated version thereof (shown in FIG. 1C as data element B′) and inserting it into the linked list. This is done by u1 acquiring an appropriate lock, allocating new memory for B′, copying the contents of B to B′, modifying B′ as needed, updating the pointer from A to B so that it points to B′, and releasing the lock. As an alternative to locking, other techniques such as non-blocking synchronization or a designated update thread could be used to serialize data updates. All subsequent (post update) readers that traverse the linked list, such as the reader r2, will see the effect of the update operation by encountering B′. On the other hand, the old reader r1 will be unaffected because the original version of B and its pointer to C are retained. Although r1 will now be reading stale data, there are many cases where this can be tolerated, such as when data elements track the state of components external to the computer system (e.g., network connectivity) and must tolerate old data because of communication delays.
At some subsequent time following the update, r1 will have continued its traversal of the linked list and moved its reference off of B. In addition, there will be a time at which no other reader process is entitled to access B. It is at this point, representing expiration of the grace period referred to above, that u1 can free B, as shown in FIG. 1D.
FIGS. 2A-2C illustrate the use of read-copy update to delete a data element B in a singly-linked list of data elements A, B and C. As shown in FIG. 2A, a reader r1 is assumed be currently referencing B and an updater u1 wishes to delete B. As shown in FIG. 2B, the updater u1 updates the pointer from A to B so that A now points to C. In this way, r1 is not disturbed but a subsequent reader r2 sees the effect of the deletion. As shown in FIG. 2C, r1 will subsequently move its reference off of B, allowing B to be freed following expiration of the grace period.
In the context of the read-copy update mechanism, a grace period represents the point at which all running processes having access to a data element guarded by read-copy update have passed through a "quiescent state" in which they can no longer maintain references to the data element, assert locks thereon, or make any assumptions about data element state. By convention, for operating system kernel code paths, a context (process) switch, an idle loop, and user mode execution all represent quiescent states for any given CPU (as can other operations that will not be listed here).
In FIG. 3, four processes 0, 1, 2, and 3 running on four separate CPUs are shown to pass periodically through quiescent states (represented by the double vertical bars). The grace period (shown by the dotted vertical lines) encompasses the time frame in which all four processes have passed through one quiescent state. If the four processes 0, 1, 2, and 3 were reader processes traversing the linked lists of FIGS. 1A-1D or FIGS. 2A-2C, none of these processes having reference to the old data element B prior to the grace period could maintain a reference thereto following the grace period. All post grace period searches conducted by these processes would bypass B by following the links inserted by the updater.
There are various methods that may be used to implement a deferred data update following a grace period, including but not limited to the use of callback processing as described in commonly assigned U.S. Pat. No. 5,727,209, entitled "Apparatus And Method For Achieving Reduced Overhead Mutual-Exclusion And Maintaining Coherency In A Multiprocessor System Utilizing Execution History And Thread Monitoring."
The callback processing technique contemplates that an updater of a shared data element will perform the initial (first phase) data update operation that creates the new view of the data being updated, and then specify a callback function for performing the deferred (second phase) data update operation that removes the old view of the data being updated. The updater will register the callback function (hereinafter referred to as a "callback") with a read-copy update subsystem so that it can be executed at the end of the grace period. The read-copy update subsystem keeps track of pending callbacks for each processor and monitors per-processor quiescent state activity in order to detect when each processor's current grace period has expired. As each grace period expires, all scheduled callbacks that are ripe for processing are executed.
Conventional grace period processing faces challenges in a preemptive realtime computing environment because a low priority reader holding a reference to shared data can be preempted by a higher priority process or blocked from acquiring a lock while in the read-side critical section. If the reader remains preempted or blocked for an extended period of time, grace periods cannot proceed and callbacks will not be processed. This can result in out-of-memory situations, which in turn can prevent high priority real-time processes from proceeding. A technique is therefore needed so that the priority of a preempted or blocked reader can be boosted, which would cause the reader to be scheduled ahead of other processes and complete its read-side critical section. This would allow grace-period processing to continue, eventually freeing memory and thereby permitting high-priority realtime processes to proceed without resource starvation.
Unfortunately, there might be a large number of reader processes potentially residing in a read-side critical section and a question arises as to how to identify preempted readers in an efficient manner. Scanning a data processing system's full list of processes is not an attractive solution because such scanning can be time-consuming and could potentially prevent high priority realtime processes from meeting their scheduling deadlines. Scanning only reader processes would be a better approach. However, creating and maintaining a list of each reader process that is currently within a read-side critical section is problematic. For example, such a list would require the use of expensive atomic instructions, spinlocks, and/or memory barriers within the RCU fast-path code used in preemptive realtime systems when readers enter and exit their critical sections (e.g., the rcu_read_lock( ) and rcu_read_unlock( ) primitives of the Linux® Kernel). Moreover, only a small fraction of read processes residing in a read-side critical section will normally be responsible for holding up current grace period processing as a result of being preempted or blocked. The vast majority of such readers will not be disturbed. Thus, a scan of even a reader process list would also waste valuable CPU time and degrade realtime latencies.
Accordingly, there is an unsolved need for a priority-boosting technique that overcomes the foregoing problems. What is needed is a solution that efficiently boosts the priority of only those readers that are holding up current grace period processing without having to scan large numbers of extraneous processes and without needing expensive operations within the common-case code paths of existing RCU primitives.

Efficiently boosting priority of read-copy update readers in a real-time data processing system

International Business Machines Corporation


A WLAN (Wireless Local Area Network) communication device including a first buffer, a second buffer and a shared backoff generator and corresponding methods and integrated circuit chips provided. The first buffer is for queuing first data packets to be transmitted by the WLAN communication device after a transmission channel has been idle for at least a first backoff time. The second buffer is for queuing second data packets to be transmitted by the WLAN communication device after the transmission channel has been idle for at least a second backoff time. The shared backoff generator is adapted to generate a first and a second backoff start value used to determine the first and second backoff times, respectively. Embodiments may reduce the hardware consumption and thus manufacturing and product costs.

1. Field of the Invention
The present invention relates to WLAN (Wireless Local Area Network) communication devices and corresponding methods and integrated circuit chips, and in particular to the backoff generation in such WLAN communication devices.
2. Description of the Related Art
A wireless local area network is a flexible data communication system implemented as an extension to or as an alternative for a wired LAN. Using radio frequency or infrared technology, WLAN systems transmit and receive data over the air, minimizing the need for wired connections. Thus, WLAN systems combine data connectivity with user mobility.
Today, most WLAN systems use spread spectrum technology, a wide band radio frequency technique developed for use in reliable and secure communication systems. The spread spectrum technology is designed to trade off bandwidth efficiency for reliability, integrity and security. Two types of spread spectrum radio systems are frequently used: frequency hopping and direct sequence systems.
The standard defining and governing wireless local area networks that operate in the 2.4 GHz spectrum is the IEEE 802.11 standard. To allow higher data rate transmissions, the standard was extended to 802.11b that allows data rates of 5.5 and 11 Mbps in the 2.4 GHz spectrum. Further extensions exist.
One example of these is the 802.11e extension, also referred to as WME (Wireless Media Extensions), that was designed to address QoS (Quality of Service) issues of the precedent 802.11 versions. For this purpose, the 802.11e specification provides MAC (Medium Access Control) enhancements to meet the QoS requirements of multimedia applications like voice over IP or audio/video streaming.
The previous 802.11 MAC layer had no means of differentiating traffic streams or sources. As a result, no consideration could be made for the service requirements of the traffic on the channel. The 802.11e specification introduces two new MAC modes, EDCF (Enhanced Distributed Coordination Function) and HCF (Hybrid Coordination Function), which support up to eight priority traffic classes (TCs).
Referring now to the figures and in particular to FIG. 1, a WLAN communication device, i.e., a transmitter or transceiver is shown in which a number n of traffic classes 105, 130, 155 is implemented. For each traffic class 105, 130, 155, the WLAN communication device includes a FIFO (First In First Out) storage 110, 135, 160 in which packets to be transmitted are queued. Each traffic class having packets to transmit starts a backoff operation after detecting the channel being idle for an arbitration interframe space (AIFS) which can be chosen individually for each traffic class and provides a deterministic priority mechanism between the traffic classes.
The following backoff operation is quantized into so-called time slots. Also, the AIFS interval is usually indicated as an integer number of time slots. A backoff counter 125, 150, 175 assigned to each traffic class 105, 130, 155 is decreased once every time slot. When the backoff counter value of a traffic class reaches zero, the respective traffic class attempts to transmit a packet out of its queue 110, 135, 160. For the next backoff operation, the backoff counter 125, 150, 175 is then set to a BC (Backoff Counter) start value selected randomly by the backoff generator 120, 145, 170 out of a contention window (CW). If, however, the backoff counter value has not reached zero before the channel becomes busy again, the backoff counter value is frozen and the next backoff operation is started with this value.
The minimum initial value of the contention window, denoted by CWmin, can be selected on a per TC basis. As collisions occur, the contention window is multiplied by a persistence factor (PF) that can be chosen individually for each traffic class 105, 130, 155 in the CW adaptors 115, 140, 165, thus providing a probabilistic priority mechanism between the traffic classes 105, 130, 155. Optionally, a maximum possible value CWmax for the contention window can also be selected individually for the traffic classes 105, 130, 155.
Within the WLAN communication device, the traffic classes have independent transmission queues 110, 135, 160. These behave as virtual stations within the above-mentioned parameters AIFS, CWmin, CWmax, and PF, determining their ability to transmit. If the backoff counter of two or more parallel traffic classes 105, 130, 155 in a single WLAN communication device reach zero at the same time, a packet scheduler 180 inside the WLAN communication device treats the event as a virtual collision without recording every transmission. A transmit opportunity is given to the traffic class 105, 130, 155 with the highest priority of the colliding traffic classes, and the others back off as if a collision on the medium occurred.
As can be seen from FIG. 1, each traffic class 105, 130, 155 has assigned its own backoff generator 120, 145, 170. This causes the conventional architecture to be unnecessarily hardware consuming. Traditional WLAN communication devices therefore often suffer from the problem of increased manufacturing costs. Further, this prior art layout is less suitable for device miniaturization, e.g., when aiming at providing WLAN compatible mobile telephones or PDAs (Personal Digital Assistants).

Shared backoff generation for 802.11E compliant WLAN communication devices


A method for using metformin and sodium butyrate in combination to treat a cancer patient with K-ras mutation is disclosed. When administering the pharmaceutical composition to a cancer patient, Metformin and sodium butyrate offer cooperatively therapeutic efficacy. The present invention also discloses a pharmaceutical composition and a pharmaceutical kit containing both aforementioned. The application of the method, the pharmaceutical composition and the pharmaceutical kit of the present invention are advantageous for improving the treatment effect to cancer patients with K-ras mutation.

Field of Invention
This invention relates to a pharmaceutical composition, a pharmaceutical kit and a method.
Related Art
Metformin is isolated from Galega offivinalis, and Galega officinalis was used for the treatment of diabetes for centuries. In the 1920s, the guanidine compound was discovered in Galega extracts, and, by animal experiments, the guanidine compound has been confirmed to be the main active ingredient to reduce blood glucose concentration. So far, we've known the mechanism of metformin or the medically acceptable salt thereof is to enhance glucose uptake and carbohydrates catabolism in muscle cells, and to suppress glucose production by the liver. Metformin thus has an antihyperglycemic effect, and has been widely used in treating type 2 (non-insulin dependent) diabetes mellitus.
Some patients with the type 2 diabetes mellitus have extraordinary high risk of having one of the three cancers at the same time: colorectal cancer, breast cancer and pancreatic cancer. Some studies show that administration of metformin or the pharmaceutically acceptable salt thereof can generally reduce the risk of developing cancer in the patients with type 2 diabetes mellitus. In other words, among the patients with type 2 diabetes mellitus, those who are administered with metformin or the pharmaceutically acceptable salt thereof have less risk of developing colorectal cancer, breast cancer or pancreatic cancer than those who are not administered.
On the other hand, the sodium butyrate is a histone deacetylase inhibitor (HDACi). The phenomenon of the histone deacetylase (HDAC) overexpression widely exists in many kinds of cancer; therefore, the sodium butyrate is considered as a substance with a great therapeutic potential, and applied in many cell or animal experiments. Current studies have found that the sodium butyrate inhibits growth of some specific cancer cell and induces apoptosis of some specific cancer cell; thereby the sodium butyrate has an efficacy of slowing tumor growth. Furthermore, sodium butyrate is also considered as a protective agent of the intestinal tract, which can repair the intestinal mucosa and treat the inflammation of the intestinal tract, thereby to reduce the risk of colitis oncogenesis. Furthermore, sodium butyrate also has been found to be able to prevent the developing of breast cancer.
In summary, currently studies confirm that metformin or the pharmaceutically acceptable salt thereof, or the sodium butyrate is individually effective for some specific cancer, to a certain degree. However, the therapeutic effect of each compound is only has their respective effect. Besides, metformin is still mostly used in the treatment of diabetes. As for reducing the morbidity of colorectal cancer, breast cancer or pancreatic cancer, due to the mechanism is not clear, and such efficacy has not been expected. Therefore, further studies of metformin and sodium butyrate still make no breakthrough for now.
However, especially for cancer patients with K-ras mutation, current drug has no significant therapeutic effect, and the clinical studies also confirm using metformin or the pharmaceutically acceptable salt thereof, or using sodium butyrate, is not much help for relieving or ameliorating the symptoms of the K-ras mutation cancer.

Pharmaceutical composition and kit for applying metformin and sodium butyrate in Kras mutation cancer treatment


A food products container is disclosed having a cover with two integrally formed flaps for covering a plurality of cover openings, in particular a spooning opening and shaker openings. Skirts extending downward from the flaps engage their respective openings in the cover to seal them. The skirts that engage the openings extend downward and outward from the flaps at an angle. By extending outward and downward, the skirts engage and lock into the holes. A lip is provided at an outer edge of the cover on the flaps and on the non-rotating part of the cover to retain a second, identical container placed on top by engaging an outer indent in the bottom of the second container.

In the field of hand-held plastic containers for storing and dispensing particulate matter, particularly food stuffs or seasonings such as those displayed and sold in supermarkets, designers have desired to create a containers that are easily stackable, having several openings, particularly openings for both shaking and spooning that have flaps to seal these openings, yet are inexpensive to manufacture in large quantities and are inexpensive to assemble.
These containers typically have a diameter of between 20 and 150 millimeters and are especially suitable for cooks who can spoon foodstuffs such as spices from a first opening and can shake the same foodstuffs from a second set of openings. Typically, the matter is spooned from the first opening and deposited into a bowl or other container for mixing food. The spooning opening is adapted to receive any one of a variety of common household spoons used for measuring foodstuffs. A second opening (or more accurately, several openings) on a second side of the cover are provided to allow the foodstuffs to be shaken out of the container. Typically, the shaker side of the container cover is used when the foodstuffs are shaken directly into food that is being served, or food that is being seasoned "to taste" while it is cooking.
Manufacturers of these products must balance several conflicting goals. First, the container must seal tightly to prevent the foodstuffs from oxidizing, to prevent their flavors from evaporating and to prevent them from picking up any of the flavors of the adjacent foods. Second, the container must be inexpensive to manufacture, since the cost of the foodstuffs in the container is typically quite small. Third, the container must similarly be inexpensive to fill and assemble. Fourth, the container must easily and reliably stack on supermarket shelves to a typical height of three to five containers, since supermarket shelves are typically spaced several inches apart, and shelf space is at a premium.
Manufacturers have had mixed results with their designs. In a typical recent example in the prior art, a cover is provided that has two flaps, one flap having a skirt extending down from its lower surface to seal a spooning opening, and another flap having three skirts extending down from its lower surface to seal three shaler openings. The skirts extend at right angles from the lower surface of their respective flaps and are sized to snap fit within their respective openings to secure their respective flaps in a closed position. A drawback of this design is that the flaps are formed separately from the rest of the cover and thus a separate joining process is required. In an alternative prior art design, a two-flap cover having one spooning opening and one shaker opening, avoids the thick skirts of the previous example, and provides slightly rounded bumps on the inner surface of the shaker flap that seal against the corresponding shaker openings. A drawback to this design is the limited sealing ability of the cover with bumps since the bumps do not lock into the holes they cover.
What is needed, therefore, is an improved food products container having a cover formed integrally with a plurality of flaps that provides improved sealing. It is an object of this invention to provide such a cover.


The present invention relates to a method of preparing polycarbonate comprising the steps of: (i) introducing to an extruder through a feed port a plurality of reaction components comprising a polycarbonate oligomer, an activated carbonate residue, and a transesterification catalyst, wherein the extruder comprises the feed port, a first back vent port, and a polycarbonate exit port, wherein the feed port is located between the first back vent port and the polycarbonate exit port, and wherein the resistance to flow of the reaction components from the feed port to the first back vent port is less than or equal to the resistance to flow of the reaction components from the feed port to the polycarbonate exit port; and (ii) extruding the reaction components at one or more temperatures in a range between 100° C. and 400° C., wherein during the extrusion of the reaction components, activated carbonate residue is removed through the first back vent port, thereby preparing a polycarbonate.

This invention relates to a method of preparing polycarbonate. More particularly the method relates to a method whereby a solution comprising a solvent and an oligomeric polycarbonate is introduced into a devolatilizing extruder wherein the oligomeric polycarbonate is converted into high molecular weight polycarbonate while simultaneously removing the solvent. More particularly, the instant invention relates to the formation under mild conditions of polycarbonates having extremely low levels of Fries rearrangement products, a high level of endcapping and low levels of residual solvent.
Polycarbonates, such as bisphenol A polycarbonate, are typically prepared either by interfacial or melt polymerization methods. The reaction of a bisphenol such as bisphenol A (BPA) with phosgene in the presence of water, a solvent such as methylene chloride, an acid acceptor such as sodium hydroxide and a phase transfer catalyst such as triethylamine is typical of the interfacial methodology. The reaction of bisphenol A with a source of carbonate units such as diphenyl carbonate at high temperature in the presence of a catalyst such as sodium hydroxide is typical of currently employed melt polymerization methods. Each method is practiced on a large scale commercially and each presents significant drawbacks.
The interfacial method for making polycarbonate has several inherent disadvantages. First it is a disadvantage to operate a process which requires phosgene as a reactant due to obvious safety concerns. Second it is a disadvantage to operate a process which requires using large amounts of an organic solvent because expensive precautions must be taken to guard against any adverse environmental impact. Third, the interfacial method requires a relatively large amount of equipment and capital investment. Fourth, the polycarbonate produced by the interfacial process is prone to having inconsistent color, higher levels of particulates, and higher chloride content, which can cause corrosion.
The melt method, although obviating the need for phosgene or a solvent such as methylene chloride requires high temperatures and relatively long reaction times. As a result, by-products may be formed at high temperature, such as the products arising by Fries rearrangement of carbonate units along the growing polymer chains. Fries rearrangement gives rise to undesired and uncontrolled polymer branching which may negatively impact the polymer's flow properties and performance. The melt method further requires the use of complex processing equipment capable of operation at high temperature and low pressure, and capable of efficient agitation of the highly viscous polymer melt during the relatively long reaction times required to achieve high molecular weight.
Some years ago, it was reported in U.S. Pat. No. 4,323,668 that polycarbonate could be formed under relatively mild conditions by reacting a bisphenol such as BPA with the diaryl carbonate formed by reaction phosgene with methyl salicylate. The method used relatively high levels of transesterification catalysts such as lithium stearate in order to achieve high molecular weight polycarbonate. High catalyst loadings are particularly undesirable in melt polycarbonate reactions since the catalyst remains in the product polycarbonate following the reaction. The presence of a transesterification catalyst in the polycarbonate may shorten the useful life span of articles made therefrom by promoting increased water absorption, polymer degradation at high temperatures and discoloration.
In U.S. Pat. No. 6,420,512, extrusion of a mixture of an ester-substituted diaryl carbonate, such as bis-methyl salicyl carbonate, a dihydroxy aromatic compound, such as bisphenol A, and a transesterification catalyst, such as tetrabutylphosphonium acetate (TBPA), afforded high molecular weight polycarbonate. The extruder employed was equipped with one or more vacuum vents to remove by-product ester-substituted phenol. Similarly, a precursor polycarbonate having ester-substituted phenoxy endgroups, for example methyl salicyl endgroups, when subjected to extrusion afforded a polycarbonate having a significantly increased molecular weight relative to the precursor polycarbonate. The reaction to form a higher molecular weight polycarbonate may be catalyzed by residual transesterification catalyst present in the precursor polycarbonate, or by a combination of any residual catalyst and an additional catalyst such as TBPA introduced in the extrusion step. Fries rearrangement products were not observed in the product polycarbonates.
Although the methods described in U.S. Pat. No. 6,420,512 represent significant enhancements in the preparation of polycarbonate relative to older methods, additional improvements are needed. For example, it would be highly desirable to increase the throughput rate of starting materials through the extruder in order to achieve greater efficiency without observing the entrainment of the feed and polycarbonate at the vent ports of the extruder. In addition, it would be highly desirable to avoid having to isolate a precursor polycarbonate having ester-substituted phenoxy endgroups prior to its extrusion to afford a higher molecular weight polycarbonate.

Process to make polycarbonate from bismethylsalicylcarbonate (BMSC)


A lifeguard observation station having a support structure for allowing a lifeguard to monitor a pool and swimmers or bathers therein. The lifeguard observation station includes a platform which is configured to accommodate the lifeguard. The platform member has a first edge, with at least a portion of the first edge of the platform member and a portion of the platform member adjacent the first edge being configured to extend to or beyond a pool edge of the pool. When positioned on the portion of the platform member adjacent the first edge, the lifeguard is positioned at the edge of the water or over the water in the pool to provide the lifeguard an unimpaired line-of-sight to the swimmers or bathers in the pool.

Lifeguard chairs are used at pools and beaches to allow a lifeguard to sit and observe individuals swimming or recreating in or near the water and to safely effectuate a rescue of a swimmer or bather in distress. Generally, a lifeguard chair includes a raised platform with a seat attached thereto. The seat allows the user to be positioned approximately 4 to 10 feet above the ground. A ladder may be used as part of the chair to allow the lifeguard to access the seat.
In some uses, the lifeguard chair is permanently affixed to the ground. For smaller pools and other environments, however, the lifeguard chair is portable. A frame of the lifeguard chair supports the chair and generally has a sufficiently wide base to provide support on the pool deck or other surface.
In general, lifeguard chairs are configured to provide a chair at the top of a ladder or stairs. Such configurations allow for little or no ability for the lifeguard to stand or move relative to the chair, thereby limiting the ability of the lifeguard to properly observe the individual swimmers in all locations of the pool or body of water. The ladder or stairs, or lack thereof, often pose the risk of a fall of the lifeguard, especially when attempting to effectuate a rescue. In addition, the positioning of the chair is often set back from the edge of the pool or body of water, as room is required for access or egress. Consequently, as the chair and the lifeguard are removed from the edge of the pool or body of water, the lifeguard's line of sight is not optimized, leaving areas of the pool or body of water not visible to the lifeguard.
Another problem with many lifeguard chairs is that they can tip over in foreseeable use, including in high winds. A falling chair can be dangerous for a lifeguard using the chair or for individuals around the chair when the chair falls over. In addition, the chair may be damaged if it tips over in the wind.
It would be beneficial to provide a lifeguard observation station which can be positioned at the edge of the pool or body of water and which provides the lifeguard with up to 360 degree visibility of swimmers or bathers in the pool when the lifeguard is positioned on the platform. It would also be beneficial to provide the lifeguard with maximum visibility of swimmers or bathers when the lifeguard is exiting the platform, thereby allowing the lifeguard to maintain a line-of-sight to any swimmer or bather in distress. It would also be beneficial to provide a lifeguard observation station which is portable and stable, and offers safe access and egress to and from the platform.


The present invention is an animal cooling system including a collar removably connected to a vest. The collar may be affixed around an animal's neck and the vest around the animal's torso. The collar includes a fabric layer having at least one pouch affixed to an inner side, at least one coolant sheet removably located within the pouch, and a fastener affixed to the fabric layer. The vest includes a fabric layer having at least one pouch affixed to an inner side, at least one coolant sheet removably located within the pouch, and a fastener affixed to the fabric layer. The coolant sheets include a freezable, non-toxic coolant and once melted, may be removed from their respective pouches and swapped for fresh, frozen coolant sheets to allow for continuous cooling. The system may also be utilized as a separate collar or a separate vest having the same construction and function.

The present invention relates to a protective covering for an animal, and more specifically, to a cooling system for an animal such as a dog.
Dogs are extremely sensitive to heat due to their size, lack of sweat glands, and often thick fur coats. A dog outside on a hot day can quickly overheat, going from a normal body temperature of 101 degrees to a hyperthermic 104 degrees in only a few minutes of exercise. Dogs with stocky bodies heat up faster and cool down slower, as do small breeds and brachycephalic breeds (e.g. pugs and bulldogs). News networks are replete with stories of dogs left in cars or outside on hot days who overheated and died. In 2012, a beloved bulldog college mascot died of heatstroke during an outside excursion in triple-digit temperatures. In the aftermath of a 2016 earthquake, a search and rescue dog died of heatstroke after rescuing seven people from a collapsed building.
Unfortunately, many dogs require daily exercise or trips outside to eliminate waste. Even short excursions in high temperatures can be harmful, especially for elderly or infirm dogs. If air conditioning breaks down or is unavailable, immersion in cold water may be the only way to cool down a dog, which can be problematic if one lacks a cool water source. Working dogs, such as explosive- and contraband-detecting dogs, members of law enforcement and military K9 units, guard dogs, service dogs, search and rescue dogs, and others often do not have the luxury of waiting for temperatures to cool before venturing outside. Working dogs must frequently venture into areas far from cool water or air conditioning, and may be required to exert themselves over long distances.
Some protective coverings for dogs utilize evaporative cooling of water to cool dogs. Sadly, if the ambient humidity level is too high, such coverings can actually transfer heat to the dog, making the problem worse. The constant moisture can also cause skin irritation. Other protective coverings apply a gel pack to the torso or neck of a dog. Unfortunately, the gel may not be an effective cooling means; furthermore, if the dog detaches and chews open the gel pack (an unfortunately common scenario), the gel can cause illness if ingested. Other cooling system merely tie or slide in place and are ineffective or uncomfortable for active dogs.
The present invention provides a non-toxic, thermally effective means of cooling a dog, regardless of activity level.


A system comprising a counter adapted to monitor the memory consumption of the allocated memory resources. Upon reaching or surpassing the memory resource threshold provided, the counter may indicate the need for garbage collection. The garbage collector assesses the memory and releases memory resources that are consumed by the programs but are not needed anymore. The recycled memory resources are thus provided to the programs and the counter is updated accordingly. In addition, the system may also include instructions requesting memory resources. After detecting such instructions, the memory usage counter is updated either by the exact amount of memory allocated or the estimated amount of memory allocated. The counter may be implemented in hardware or in software.

1. Technical Field of the Invention
The present invention relates generally to executing programs and more particularly, to improve the utilization of memory resources by executing a garbage collector.
2. Background Information
Many types of electronic devices are battery operated and thus preferably consume as little power as possible. An example is a cellular telephone. Further, it may be desirable to implement various types of multimedia functionality in an electronic device such as a cell phone. Examples of multimedia functionality may include, without limitation, games, audio decoders, digital cameras, etc. It is thus desirable to implement such functionality in an electronic device in a way that, all else being equal, is fast, consumes as little power as possible and requires as little memory as possible. Improvements in this area are desirable.

Conditional garbage based on monitoring to improve real time performance


A duty cycle corrector includes a first controllable delay configured to delay a first signal to provide a second signal, a second controllable delay configured to delay the second signal to provide a third signal, a circuit configured to adjust the first controllable delay and the second controllable delay to phase lock the third signal to the first signal, and a phase mixer configured to phase mix the first signal and the third signal to provide a fourth signal.

Many digital circuits receive a clock signal to operate. One type of circuit that receives a clock signal to operate is a memory circuit, such as a dynamic random access memory (DRAM), synchronous dynamic random access memory (SDRAM), or double data rate synchronous dynamic random access memory (DDR-SDRAM). In a memory circuit operating at high frequencies, it is important to have a clock signal that has about a 50% duty cycle. This provides the memory circuit with approximately an equal amount of time on the high level phase and on the low level phase for transferring data into and out of the memory circuit, such as latching rising edge data and latching falling edge data out of the memory circuit.
Often, a clock signal is provided by an oscillator, such as a crystal oscillator, and clock circuitry. The oscillator and clock circuitry may provide a clock signal that does not have a 50% duty cycle. For example, the clock signal may have a 45% duty cycle, where the high level phase is 45% of one clock cycle and the low level phase is the remaining 55% of the clock cycle. A duty cycle corrector receives the clock signal and corrects or changes the duty cycle of the clock signal to provide clock signals with transitions separated by substantially one half of a clock cycle.
One type of duty cycle corrector uses a single external clock signal to provide an internal clock signal and an inverted internal clock signal. Typically, there is some jitter on the external clock signal that is propagated to the internal clock signal and the inverted internal clock signal. If this jitter is too great, the jitter may affect operations performed using the internal clock signal and the inverted internal clock signal.


A carbonated beverage dispenser is provided with a station for dispensing chilled still water. The dispenser includes an adapter block which is easily installed in place of a standard dispensing valve, blocks the soda delivery tube and accepts chilled water from a syrup delivery tube for dispensing through a standard spigot.

This invention relates to a postmix carbonated beverage dispenser and in particular to a method and apparatus for dispensing plain water from such dispensers.
Beverage dispensers are commercially available from a number of sources. One beverage dispenser is described in U.S. Pat. No. 5,392,960 to Kendt, et al. which is incorporated herein by reference.
Carbonated beverages are sold in restaurants, snack shops, amusement parks, fast food outlets, and other establishments throughout the world. Many of these beverages are mixed and dispensed in postmix beverage dispensers. Generally, a postmix beverage dispenser is provided with a plurality of flavoring syrups and carbonated water which are chilled, mixed and dispensed into a cup or glass. Postmix beverage dispensers generally comprise at least one soda tube carrying carbonated water (sometimes referred to as soda) to a soda manifold which supplies a number of additional soda tubes leading to dispensing valves. A plurality of syrup tubes carry flavoring syrup from sources of syrup through tubes into dispensing valves. The syrup and soda tubes are normally chilled and portions of the tubes are embedded in a body of insulation to maintain the low temperature of the soda and syrup after it has been chilled. The downstream ends of the soda and syrup tubes are usually restrained in a mounting plate which positions the tubes appropriately and provides a convenient place to mount the beverage dispensing valves. Each beverage dispensing valve engages an adjacent pair of tubes, one carrying soda and one carrying flavoring syrup. Generally, the inlets to the dispensing valves are standardized on one of a small number of configurations. The spacing between the soda and the syrup tube is precisely set. The diameter and configuration of the fitting at the end of the syrup and soda tubes are also closely specified. Fittings generally have O-rings upon them providing leakproof engagement with recesses in the beverage dispensing valve. The spacing between adjacent pairs of tubes is also specified so that a beverage dispenser may carry the maximum number of standard size dispensing valves in a given area.
Beverage dispensers and beverage dispensing valves are commercially available from a variety of sources. The beverage dispensing valve of one manufacturer can normally be applied to the beverage dispenser of a different manufacturer following the same standard. The beverage dispensing valve of a first manufacturer can be removed from the beverage dispenser and the beverage dispensing valve of a second manufacturer put in its place with no modification to the beverage dispenser. The syrup and soda tube placement and fitting requirements of both valves are identical.
This industry wide arrangement has proven convenient in many respects. A restaurant operator can install a beverage dispenser and put dispensing valves as desired on the dispenser to provide various flavors of beverages such as cola, orange, lemon-lime, and the like. Should the restaurant operator decide to change the mix of flavors, he need only connect a different syrup reservoir to a given syrup tube and change the label or the beverage dispensing valve on the other end of that syrup tube. The beverage dispenser need not be altered. This is important because the beverage dispensers are complex devices which cannot be conveniently altered in the field.
Beverage dispensers usually include a chiller. The chiller can take the form of an ice bank mechanical refrigeration unit in which soda and syrup tubes are maintained in a bath of cold water chilled by tubes forming part of a refrigeration unit. An "ice bank" normally forms around the tubes in the bath. Alternatively, the chiller can be an aluminum cold plate in which syrup and soda tubes are embedded and to which a body of ice is applied. In either case, the syrup and soda tubes exiting the chiller are maintained in a body of insulation which is usually foamed in place insulation. The ends of the soda and syrup tubes which will engage beverage dispensing valves are maintained in place by a mounting plate. Once such a structure is manufactured, it is virtually impossible to modify the syrup and soda tubes without seriously degrading the insulated nature of the beverage dispenser itself. These units provide flexibility in the provisioning of carbonated beverages. However, providing plain water through a such a beverage dispenser is difficult. One must either put a plain water dispensing station in the beverage dispenser when manufactured or forego plain water dispensing. If one puts a plain water dispensing station in the beverage dispenser, one foregoes one of the available carbonated beverage dispensing stations. This is not an option desired by most restaurant operators as a permanent solution.
This dilemma and other problems are overcome by the present invention wherein a postmix beverage dispenser is adapted to provide either a carbonated beverage or plain water as selected by the restaurant operator through any of the stations or positions in the beverage dispenser.

Method and apparatus for dispensing plain water from a postmix carbonated beverage dispenser


A semiconductor device includes a monocrystalline substrate configured to form a channel region between two recesses in the substrate. A gate conductor is formed on a passivation layer over the channel region. Dielectric pads are formed in a bottom of the recesses and configured to prevent leakage to the substrate. Source and drain regions are formed in the recesses on the dielectric pads from a deposited non-crystalline n-type material with the source and drain regions making contact with the channel region.

Technical Field
The present invention relates to semiconductor processing, and more particularly to devices and methods that grow source and drain regions on dielectric materials.
Description of the Related Art
Metal oxide semiconductor field effect transistors (MOSFETs) often suffer from performance loss due to carrier leakage. One of the major leakage sources of MOSFET devices is drain-to-substrate leakage. Here, charge from the drain leaks into the substrate. This is made even more severe when epitaxially grown layers (epilayers) have defects. One method for addressing leakage into the substrate of the device is to provide a buried oxide layer. In a silicon-on-insulator (SOI) structure, a buried oxide layer is disposed between a base (bulk) substrate and a thin silicon layer. The devices are formed in the thin silicon layer, which is isolated from the base substrate by the buried oxide layer. Conventional source and drain regions are single-crystalline so these regions cannot be grown on insulators such as oxide.

INTERNATIONAL BUSINESS MACHINES CORPORATION


A method of data compression for use in a data communication's system for an electrical utility or the like to affect the most efficient transfer of data. The data is first formed into a forming a block (B). A parameter (M) is selected from among a group of parameters. Each data value in the block is divided by the selected parameter to produce, for each data value, a quotient (q=└n/M┘) and a remainder (r=n−qM). The quotient of each data value is encoded using unary coding in which the value for the quotient is encoded by transmitting an appropriate number of zeroes followed by a one. The remainder of each data value is encoded using binary encoding, and the resultant encoded block of data is then transmitted. The data values comprising the block of data are positive integer values and the encoding employs a Golomb-Rice code defined by a positive integer parameter.

This invention relates to the transmission of electric power consumption data in a "smart metering" system; and more particularly, to a data compression method for reducing the amount of data to be transmitted.
Current trends in the advanced metering infrastructure (AMI) market suggest that, for the foreseeable future, increases in the data capacity of a utility communications system used for automated metering will be useful to electric utilities. A significant amount of research has been done to extend the data throughput of AMI systems, but one area that remains relatively unexplored is data compression. Compressing interval data by any significant amount could enable an AMI system to support various combinations of more meters, more frequent intervals, or higher resolution interval data. The method of data compression proposed herein is based upon an analysis of interval data from meters, and various data compression schemes.


At the time of a failure in the second group of engagement devices, the manner of input of oil pressures to a fail-safe valve group is changed via a priority degree switching valve on the basis of the state of engagement of engagement devices of the first group in such a manner that the predetermined degrees of priority for the supply of one of oil pressures PC4, PB1 output from linear solenoid valves SL4, SL5 to a corresponding one of a clutch C4 and a brake B1 via the fail-safe valve group are changed so as to avoid an event that the fail-safe gear stage established in order to prevent the occurrence of interlock of the automatic transmission involves a downshift of two or more stages from the speed change stage maintained immediately prior to the occurrence of the failure. Therefore, it is possible to prevent the occurrence of an uncomfortable behavior of the vehicle caused by the shift to the fail-safe gear stage.

1. Field of the Invention
The present invention relates to a hydraulic control apparatus of a vehicular automatic transmission and, more particularly, to a fail-safe apparatus that avoids the occurrence of interlock of an automatic transmission.
2. Description of the Related Art
Vehicles provided with an automatic transmission that includes a plurality of friction engagement devices belonging to a first group, and a plurality of friction engagement devices belonging to a second group, and that establishes a plurality of speed change stages of different speed change ratios by simultaneous engagements of one of the friction engagement devices belonging to the first group and of one of the friction engagement device belonging to the second group, are well known. For example, Japanese Patent Application Publication No. JP-A-2000-249219 describes such a vehicle. Japanese Patent Application Publication No. JP-A-2000-249219 discloses a control apparatus constructed as follows. That is, at the time of a failure where two friction engagement devices of the second group simultaneously engage, the control apparatus stops the supply of oil pressure to the friction engagement devices other than the two friction engagement devices used for establishing the predetermined speed change stage through the use of a fail-safe valve, and thereby prevents the interlock of the automatic transmission.
It is conceivable that the shift from the speed change stage maintained immediately prior to the occurrence of a failure to the predetermined speed change stage established at the time of the occurrence of the failure is a downshift. On that occasion, an automatic transmission having multiple speed change stages with an increased number of friction engagement devices may sometimes undergo a downshift of two or more stages from the speed change stage maintained immediately prior to the occurrence of the failure, in which case there is a possibility of occurrence of an uncomfortable behavior of the vehicle.
For example, in an automatic transmission that establishes a plurality of speed change stages of different speed change ratios as indicated in an engagement operation table of FIG. 2, the interlock of the automatic transmission occurs due to simultaneous engagements of any two of friction engagement devices, that is, a clutch C3, a clutch C4, and a brake B1. Therefore, in this automatic transmission, it is conceivable to provide a fail-safe valve so as to prevent simultaneous engagements of those friction engagement devices. Let it assumed that the clutch C3, the clutch C4 and the brake B1 are given degrees of priority in the order of, for example, clutch C3, the clutch C4 and the brake B1, in order to engage one of them with priority to establish a speed change stage. Then, at the time of a failure where the oil pressure for engagement of the clutch C4 is output during running with the eighth speed change stage, the clutch C4 is engaged with priority over the brake B1, to establish the sixth speed change stage, thus bringing about a downshift of two or more stages, which is likely to lead to an uncomfortable behavior of the vehicle. On the assumption that degrees of engagement priority are given in the order of the clutch C3, the brake B1 and the clutch C4 in order to avoid the occurrence of a downshift of two or more stages during running with the eighth speed change stage, if during running with the fourth speed change stage, a failure occurs where the oil pressure for engagement of the brake B1 is output, the brake B1 is engaged with priority over the clutch C4, thus bringing about a downshift of two or more stages, which is likely to lead to an uncomfortable behavior of the vehicle.

Control apparatus of vehicular automatic transmission


A liquid crystal drive circuit has two circuit configurations for supplying one half the liquid crystal drive voltage. Also, the two circuits of the liquid crystal drive circuit section are shared by two terminals. The apparatus is controlled by a switch in such a manner that voltages are maintained at positive and negative amplitude levels between the two terminals based on the voltage Vcom of a common terminal of the liquid crystal to drive the liquid crystal in AC drive.

1. Field of the Invention
The present invention relates to a matrix liquid crystal display.
2. Description of the Related Art
In the case where the liquid crystal is driven by applying to it a video signal in conventional matrix liquid crystal display, an AC drive is required in which positive and negative voltages are alternately applied to a common electrode of the liquid crystal in order to prevent the deterioration of the liquid crystal. FIG. 1 is a block diagram showing a liquid crystal drive circuit used for a conventional matrix liquid crystal display configured as an integrated circuit.
The liquid crystal drive circuit shown in FIG. 1 includes a shift register 21, a first latch circuit 22 for latching n-bit video data from the shift register 21 in parallel, a second latch circuit 23 for latching the data output from the first latch circuit by a latch signal, a decoder 24 and a level shifter 25 for selecting 2.sup.n gray-level voltages supplied the n-bit video data from an external source, and 2.sup.n analog switches 26 (JP-A-63-304229).
Each output terminal of the liquid crystal drive circuit selects one value from the 2.sup.n gray-level voltages and applies a predetermined gray-level voltage to the liquid crystal. In the process, in order to drive the liquid crystal in AC drive, the gray-level voltage applied to the liquid crystal has conventionally been changed for each line or each frame of the matrix liquid crystal.
In this liquid crystal drive circuit, a voltage twice as high as the threshold voltage of the liquid crystal is required for applying positive and negative voltages alternately to a common electrode of the liquid crystal. The threshold voltage of the liquid crystal is normally about 4 to 5 volts. For AC drive, therefore, the liquid crystal drive circuit is required to have a breakdown voltage of at least 10 V. In view of this, a diffusion process of high breakdown voltage has conventionally been used for fabricating an integrated liquid crystal drive circuit.
In the case where the liquid crystal drive circuit for the matrix liquid crystal display shown in FIG. 1 is fabricated as an integrated circuit, the use of a diffusion process of high breakdown voltage poses the problem of a large chip size. This is attributable to the fact that the diffusion process of high breakdown voltage requires a long gate, a thick gate oxide film and a low-concentration layer for increasing the breakdown voltage of a transistor. Further, component elements are required to be isolated from each other, thereby leading to a large transistor size.
Further, when the liquid crystal drive circuit shown in FIG. 1 is fabricated as an integrated circuit, a long diffusion process leads to the problem of a higher chip cost. The reason is that the recent trend toward a matrix liquid display apparatus of higher definition is so marked that the logic unit of the liquid crystal drive circuit requires a high operating speed of at least 40 MHz. Also, the driver unit, which AC drives the liquid crystal, requires a breakdown voltage of not less than 10 V. As a result, a process of a low breakdown voltage (5 V) mixes with a process at a high breakdown voltage (10 V or more), so that the diffusion process is longer than the process at low breakdown voltage.
Another problem of the prior art is a large power consumption. This is because a voltage at least twice as high as the threshold voltage of the liquid crystal is required to be applied to the voltage source of the liquid crystal drive circuit.