The present invention provides an improved utility strap and method for using same for general binding purposes. The strap of the present invention provides a strip of material which includes hook-and-loop attachment means on both sides of one end of the strap, and complementary hook-and-loop material on both interior faces of a Y-shaped element anchored to the opposite end of the strap. Attachment is achieved by securing the first end of the strap within the Y-shaped element. The present invention provides all the benefits of ease of use found with conventional hook-and-loop binding devices, but is far more secure and durable.

1. Field of the Invention
The present invention relates to general purpose utility bands used to bind a wide variety of items, including serving as a belt to secure clothing. More specifically, the present invention provides an improved fastening device for such binding devices.
2. Description of the Prior Art
Various devices for binding and holding items together have been used for many years. These binding devices, such as elastic bands, string, ropes, straps and belts hold items together for convenience of handling and maintaining order.
One of the major areas for concern with respect to such binding devices has been to find an easy-to-use yet reliable fastening means to secure such devices together. Although buckles and ties continue to be used due to their simplicity and general utility, these devices are deficient in numerous respects. First, conventional buckles, such as a standard clothing belt buckle, normally are somewhat difficult to fasten and unfasten and often have limited adjustability. For instance, a standard belt buckle (i.e. employing a buckle frame, multiple punch holes in the belt, a tongue passing through one of the punch holes and securing against the frame, and a keeper to secure the loose tip of the belt), is known to have limited adjustability (with punch holes usually positioned about 1 inch apart) and as requiring additional slack beyond the desired fastened length to secure the tongue in the punch hole. Further, if the belt is too long, the loose tip of the belt must be secured in some manner to avoid interfering with the wearer. Numerous other belt designs have been suggested to avoid some or all of these problems, but none are considered entirely successful.
One product which has been widely employed as a fastening means is hook-and-loop fabric, such as that sold under the trademark VELCRO. Although hook-and-loop is being used for many fastening and binding projects, it has a number of drawbacks when applied to a clothing belt or in conjunction with other general utility binding bands.
For example, applicant is aware of at least one instance where hook-and-loop material was attached to a clothing belt--with a long length of hook material applied to one end of the belt, and a long length of complementary loop material applied to the opposite face of the belt at the opposite end. In this instance the limited shear strength of the hook-and-loop material was insufficient to retain the belt adequately in a closed position. Moreover, as is known, with heavy use (and especially with use involving substantial shear) the hook-and-loop material rapidly fatigues and no longer maintains its fastening strength. Accordingly, the operation and appearance of this belt steadily deteriorated over time.
Other examples of use of hook-and-loop fasteners for general utility projects include U.S. Pat. Nos. 3,279,008 issued Oct. 18, 1966, to Wallach (for a ski binding strap); 3,383,738 issued May 21, 1968, to Fox et al. (for a chair binding strap); 3,679,530 issued Jul. 25, 1972, to Perina (for general attachment between non-planar surfaces); 3,841,648 issued Oct. 15, 1974, to Meyer (for a ski binding strap); 3,893,725 issued Jul. 8, 1975, to Coulter et al. (for a container latching device); D720,779 issued Oct. 4, 1983, to Steinberg (for a shoelace bow knot retainer); 4,878,274 issued Nov. 7, 1989, to Patricy (for general securement system, such as for skis); and British Patent 1,161,406 issued Aug. 13, 1969, to Smith (for a general fastening means). In each of these examples, the hook-and-loop systems disclosed comprise a single layer of hook material on one strap face and another single layer of loop material on another strap face. Although each of these systems may work adequately well for their stated purposes, each has the same problems with wear and shear which was discussed above with regard to the clothing belt design.
In light of the foregoing, it is a primary object of the present invention to create a binding device which has the convenience of hook-and-loop fasteners, but is more reliable and less prone to wear than existing fastening devices.
It is another object of the present invention to provide a binding device that is easy to install and remove without damaging the bound item.
It is a further object of the present invention to provide a binding device employing hook-and-loop fasteners which is more resistant to lateral shear forces than existing hook-and-loop fasteners.
It is another object of the present invention to provide a binding device which can be employed as a clothing belt with a reliable and aesthetically appealing method of fastening it to itself.
These and other objects of the present invention will become evident from review of the following specification.

Apparatus for binding items and method of using same


A semiconductor device including a first lattice dimension III-V semiconductor layer present on a semiconductor substrate, and a second lattice dimension III-V semiconductor layer that present on the first lattice dimension III-V semiconductor layer, wherein the second lattice dimension III-V semiconductor layer has a greater lattice dimension than the first lattice dimension III-V semiconductor layer, and the second lattice dimension III-V semiconductor layer has a compressive strain present therein. A gate structure is present on a channel portion of the second lattice dimension III-V semiconductor layer, wherein the channel portion of second lattice dimension III-V semiconductor layer has the compressive strain. A source region and a drain region are present on opposing sides of the channel portion of the second lattice dimension III-V semiconductor layer.

The present disclosure relates to semiconductor structures and methods of fabricating the same. More particularly, the present disclosure relates to III-V compound semiconductor devices and methods of forming III-V compound semiconductor devices.
Silicon technology has dominated modern semiconductor devices as the mainstream technology for industry. In order to sustain Moore's Law, transistor dimensions are shrinking to achieve ever increasing density. Over the past several years, the inherent scaling limitations of electron devices have fueled the exploration of high carrier mobility semiconductors as a silicon (Si) replacement to further enhance the device performance. In particular, compound semiconductors heterogeneously integrated on Si substrates have been actively studied, combining the high mobility and low power consumption of III-V semiconductors and the well-established, low cost processing of the Si technology.

Compressive strained III-V complementary metal oxide semiconductor (CMOS) device


A method for dynamically translating bus address within a computer system is disclosed. In accordance with the method and system of the present invention, a computer system has a multiple of buses connected in a hierarchial manner. Information concerning a bus and a device attached to a bus are stored in a Hardware Namespace. In response to a request for an access to a device attached to one of the buses for the first time, a determination is made from the Hardware Namespace as to whether or not there is resource available for the device in a parent bus of the device. If there is resource available in the parent bus for the device, another determination is made from the Hardware Namespace as to whether or not the resource is exclusively allocated in the parent bus for the device. If the resource is exclusively allocated in the parent bus for the device, the device is configured according to the available resource. If the resource is not exclusively allocated in the parent bus for the device, the process resolves through each level of buses in the hierarchy until a bus having a resource that can be allocated for the device is found such that the device can be added to any one of the buses within the computer system independent of bus technology.

1. Technical Field
The present invention relates to a method and system for data processing, in general, and in particular, to a method and system for processing bus information within a computer system. Still more particularly, the present invention relates to a method and system for dynamically translating bus addresses within a computer system.
2. Description of the Prior Art
A computer system or data-processing system typically includes several types of buses, such as system bus, local buses, and peripheral buses. Various electronic-circuit devices and components are interconnected with each other via these buses such that intercommunication may be possible among all of the devices that are attached to one of the buses mentioned above. In general, a central processing unit (CPU) is attached to a system bus and over which the CPU communicates directly with a system memory that is also attached to the system bus.
A local bus such as Peripheral Component Interconnect (PCI) bus, is intended for connecting certain highly integrated peripheral components on the same bus as the CPU. Under the PCI local bus standard, peripheral components can directly connect to a PCI local bus without the need for glue logic. Thus, the PCI provides a bus standard on which high-performance peripheral devices, such as graphics devices and hard disk drives, can be coupled to the CPU, thereby permitting these high-performance peripheral devices to avoid the general access latency and the bandwidth constraints that would have occurred if these peripheral devices were connected to a peripheral bus.
A peripheral bus such as an Industry Standard Architecture (ISA) bus or an Extended Industry Standard Architecture (EISA) bus, is utilized for connecting various peripheral devices to the computer system. These peripheral devices typically include input/output (I/O) devices such as keyboard, floppy drives, and display monitor. A bus-to-bus bridge chip is commonly provided between a peripheral bus and a local bus in order to provide communication between devices that are attached to these two buses. A computer system can have other types of peripheral buses instead of, or in addition to, the two types of buses mentioned above. These include VM bus, XME bus, etc. Numerous types of peripheral devices are also available for usage with these various bus architectures.
In general, each bus in a computer system owns system resources such as I/O address space or memory address space that can be mapped into its parent bus address space. For example, in the PowerPC.TM. (PowerPC is a trademark of International Business Machines Corporation) platform, an ISA bus has an address range of 0-64 K that can be mapped to anywhere within a PCI local bus (ISA bus' parent bus) having an address range of 0-1 G. In turn, the address range 0-1 G of the PCI local bus can be mapped to anywhere within a system bus (PCI bus' parent bus) having an address range 0-2 G. Furthermore, the address range 0-2 G of the system bus can also be translated to a system physical address range of 1-3 G. Hence, a mouse device, utilizing an I/O port address of, for example, 0.times.60.sub.hex, may be mapped and translated anywhere in the 1-3 G range of the system physical address.
Under prior art, the bus address arrangement of a computer system is determined during the system initiation and cannot be changed during runtime. Hence, although all the devices within the computer system may be free of conflict in the beginning, this statically configured computer system cannot anticipate and provide a resource conflict resolution between the mouse device as mentioned above and, for example, a hot-pluggable peripheral device which utilizes the same I/O port address as the mouse device (i.e., 0-60.sub.hex) that may be installed in the computer system during runtime. Consequently, it would be desirable to provide a method for dynamically translating bus address during runtime in order to furnish a conflict-free resource for each device within a computer system.

Method and system for dynamically translating bus addresses within a computer system


In one embodiment, a disc brake assembly for use with a rotor includes a parking disc brake and a pair of service disc brakes. The parking disc brake is provided between the two service disc brakes, the parking and service disc brakes being disposable in a circumferential direction along the rotor. At least one component part of at least one service disc brake is used as a torque-receiving part of the parking disc brake. In another embodiment, the torque-receiving part is a caliper. In another embodiment, the torque-receiving part is a carrier. In yet another embodiment, the hydraulic type service disc brake is a floating-caliper type. In still another alternate embodiment, at least one tightening part is shared to install the adjacent side of the service disc and the parking disc brake on a stationary part of a vehicle.

This invention relates to a disc brake assembly for use with a rotor and suitable for a vehicle, such as an automobile or a commercial vehicle. More specifically, this invention relates to improvements of a disc brake assembly having two types of brakes, i.e., a service disc brake and a parking disc brake.
FIGS. 12 and 13 disclose a disc brake assembly in accordance with the prior art. This type of disc brake assembly comprises two fixed-caliper service disc brakes 11 and a mechanical floating-caliper parking disc brake 12 between the two fixed-caliper service disc brakes 11. The parking disc brake 12 and the service disc brakes 11 are peripherally distributed along a disc rotor 10 with equal intervals.
Calipers 11a of the respective service disc brakes 11 are fixed by two installation bolts 14 on a mounting bracket 13 which is a stationary part of the vehicle. The parking disc brake 12 includes a carrier 12b that supports a parking brake caliper 12a that is fixed on the mounting bracket 13 by second installation bolts 15.
The service disc brakes 11 include a pair of frictional pads (not shown in the diagram) that are pressed to the side surfaces of the rotor 10 by a fluid pressure operation mechanism built into the service disc brakes 11, thereby causing braking effect. And the parking disc brake 12 includes a pair of friction pads 12c, 12d that are pressured to the side surface of the rotor 10 by the mechanical operation mechanism built in the parking disc brake 12, thereby causing brake effect.
The above-described disc brake has several disadvantages. For example, the parking disc brake 12 has the carrier 12b as a component. Thus, both the carrier 12b and the second installation bolts 15 that fix the carrier 12b on the mounting bracket 13 require higher material costs, working costs, and surface treatment costs.
Also, because the parking disc brake 12 needs to be larger in the circumferential direction of the rotor 10 for the carrier 12b, the size of the parking disc brake 12 is increased. Since the disc brake needs to be a bit larger, it has disadvantages in the weight and the manufacturing cost as well as the fuel consumption of the vehicle.
This invention is intended to improve the above-points. To that end, the invention provides a smaller device with a lower cost. In one embodiment, a disc brake assembly comprises two hydraulic type service disc brakes that press a disc rotor from opposite sides to cause a braking effect, and further including a mechanical floating-caliper type disc brake for a parking brake, wherein the mechanical floating-caliper type parking disc brake is provided between the two hydraulic type service disc brakes which are disposed in the circumferential direction of the disc rotor with a certain interval, and wherein component parts of the two hydraulic type service disc brakes are used as a torque-receiving part of the mechanical floating-caliper type parking disc brake. In an alternate embodiment, the hydraulic type service disc brake is a fixed-caliper type. In another embodiment, the torque-receiving part is a caliper.
In yet another embodiment, the hydraulic type service disc brake is a floating-caliper type. In another embodiment, the torque-receiving part is a carrier.
In still another embodiment, a disc brake further includes tightening parts that attach said mechanical floating-caliper type parking disc brake on a stationary part, the tightening parts also attaching said hydraulic type service disc brake on the stationary part. Finally, in another embodiment, the mechanical floating-caliper type parking disc brake includes a spring chamber type operating mechanism.

Disc brake assembly having shared torque-receiving components


A method for purifying Piribedil includes mixing Piribedil solid having a purity of 98% by weight with water, boiling the mixture, adding slowly 95% ethanol to the boiling mixture to form a clear liquid, filtering the hot clear liquid, cooling the filtrate to obtain a white crystal having a purity of 99.8% by weight of Piribedil.

Piribedil is 2-[1′(3″,4″-methylenedioxy benzyl)-4-piperazinyl]-pyrimidine, and its chemical structure is as follows:

According to the disclosures in U.S. Pat. Nos. 3,299,067 (1967) and 5,362,731 (1994), and Polish patent No. PL 167397 (1995), Piribedil is useful in treating a patient suffering Parkinson's disease or hyperactive bladder, and it can also be used as a peripheral vasodilator, analgesic agent or anti-inflammatory agent.
Polish patent No. PL 167397 (1995) discloses a method of the synthesis of Piribedil comprising reacting 1-(2-pyrimidinyl)piperazine and piperonal in the presence of a reducing agent, formic acid, at a temperature of 100–140° C. The reaction can be represented by the following equation:
This synthesis method is recognized as the simplest method for the preparation of Piribedil. However, the Piribedil product prepared by this method is a light yellow powder having a purity of 98 wt %.
The inventors of the present application have made an approach to purify this Piribedil product including adding this Piribedil product into anhydrous ethanol or 95 wt % ethanol, boiling the resulting mixture, and re-crystallizing. The re-crystallized Piribedil product becomes darker in color and lower in purity. Another approach made is similar to the first approach but further includes a de-coloring step with activated carbon before the re-crystallization. However, the Piribedil purity is not enhanced.
Therefore, there is a need in the industry for a method of the purification of Piribedil, which can increase the purity of the Piribedil product from 98 wt % to a higher purity.

Method for the purification of Piribedil

Chung-Shan Institute of Science & Technology


Embodiments of the present invention include a configurable template definition which improves the self-service supplier registration and update process by providing a tailored request to match the needs for the particular type of supplier and collect all the relevant information from them. According to one embodiment, a template page can be made available where the administrator can specify which attributes or attribute groups can be applicable for each type of supplier when registering or updating their data. Profile questions can be selected from the master list and associated to the template. The registration process can then be coded to hide or show individual attributes or groups of attributes and individual profile questions based on the selection in the related template.

Embodiments of the present invention relate generally to methods and systems for registering participants in a process managed by an enterprise application and more particularly to supporting self-registration of suppliers, bidders, or other registrants.
Various types of enterprise applications support interactions between parties such as buyers and sellers. For example, various enterprise applications provide functions related to purchasing, accounts payable, procurement, strategic sourcing, services procurement, settlements, etc. These applications typically require suppliers or bidders to register before they can be available within the systems or applications and allowed to participate in transactions. Authorization for supplier creation and maintenance previously would typically be limited to a select few individuals within the organization. This created a burden for those individuals due to the potentially large volume of suppliers that might need to be managed. Hence, there is a need for improved methods and systems for allowing registrants such as suppliers, bidders, etc. to self-register.

Configurable templates for self-service supplier registration


A CDMA cellular radio-telephone system (FIG. 2) comprises a packet-switched communications network (202, 207, 201) that interconnects cells (base stations; 202) with each other and with the public telephone network (100). A unique combination of a static addressing plan that uses a different LAPD DLCI (302 in FIG. 7) for each unidirectional virtual call path, direct cell (202)-to-cell and cell-to-call-processing unit (264 in FIG. 5) control information exchanges, and packet-switching techniques that permit call traffic and control communications to share call paths and permit different call paths to share physical resources, is applied to call processing. This enables soft handoffs (FIGS. 27-29) to be handled in a manner transparent to the parties to the call and without significant involvement of system control elements (134 and 261 in FIG. 2) whose involvement would adversely impact the system's call-handling capacity. It also enables soft handoffs to occur without change of the call processing unit that is handling the call, so that a single call processing unit continues to handle the call from start to finish through even multiple soft handoffs.

Wireless-access telecommunications systems are well known in the art. They provide over-the-air (e.g., radio wave, infrared) connections between user communication terminals and a communications switching and transport network such as the telephone network. An illustrative example thereof are cellular radio-telephone systems.
In cellular radio-telephone systems, a plurality of radio cells, also referred to as base stations, are dispersed through a geographical area and each provides radio-telephone service to radio-telephones in its vicinity, referred to as a cell zone. The cells are conventionally connected to the public telephone network through a circuit-switched communications network known in the art collectively as a Mobile Telephone Switching Office (MTSO) or Mobile Switching Center (MSC). When a mobile radio-telephone crosses from one cell zone to another, its servicing is transferred from the cell serving the one cell zone to the cell serving the other cell zone through a process known as a "hard handoff". Adjacent cell sites operate at different radio frequencies, so a "hard handoff" involves a change in the radio frequency that is used to service the mobile telephone. This change in turn requires the cellular radio-telephone system to make a second communications connection to the mobile radio-telephone and to simultaneously drop the first connection. This takes time and uses processing capacity and switching fabric resources, thereby having a negative impact on the system's call-carrying capacity.
Mobile telephony is very popular, and the number of mobile radio-telephones is growing. This results in congestion of the presently-allocated radio-frequency spectrum and a need to more efficiently use that radio-frequency spectrum. The conventional mobile radio-telephony technique, known as frequency-division multiple-access (FDMA), tries to maximize capacity by splitting available bandwidth into separate channels in the frequency domain (e.g., into 30 KHz channels). But the radio-frequency spectrum that is allocated to mobile radio-telephone service is limited to 60 MHz.
A capacity-expanding technique, known as time-division multiple-access (TDMA) is known in the art and is a subject of technical standardization. It is a digital radio technique that splits each 30 KHz channel frequency into a plurality of time slots, each one or more of which can then act as a separate channel. The handoff procedure is similar to that used for conventional mobile radio-telephony, so the TDMA technique can in many instances be handled through conventionally-structured radio-telephone systems with only a change-out of the radio, i.e., the radio-frequency transmission and reception, equipment. But it only increases total system capacity approximately three-fold in mobile applications, which may not be adequate in many congested areas where cellular communications traffic is very high.
An alternative capacity-expanding technique, known as code-division multiple-access (CDMA) has been proposed. It is a dynamic transmission-power control and digital direct-sequence spread-spectrum technique that allows reuse of the same radio-frequency spectrum in adjacent cells. It yields up to approximately a twenty-fold increase in capacity over conventional FDMA systems. Mobile telephones in a CDMA cellular radio-telephone system may undergo "hard handoff" between cells. But, due to the frequency reuse between adjacent cells, a mobile radio-telephone that is crossing from one cell zone to another may sometimes find itself communicating with two cells on the same radio-channel at the same time, a situation known as "soft handoff". A whole sequence of "soft handoffs" may occur as a mobile radio-telephone moves through a series of cells.
Handling of CDMA call capacity and "soft handoff" is not easily accomplished in a conventional mobile radio-telephone system having the conventional FDMA architecture. This is due in large measure to the fact that there are typically many more "soft handoffs" in a typical CDMA system than there are "hard handoffs" in a conventional system and the "soft handoffs" are typically of longer duration than "hard handoffs", and so the demands placed by "soft handoffs" on system resources and processing and switching facilities are more extensive and acute. Handling of "soft handoff" additionally requires, inter alia: routing of the duplicate communications received from one mobile telephone at the two cells to a common call-processing point in the system, for selection in real time of one and discarding of the other duplicate communication; duplication of return communications and routing thereof to the two cells; and coordination of the operations of the two cells so that they transmit the duplicate return communications to the mobile telephone at the same time. Conceivable ways of meeting these requirements in conventionally-architected radio-telephone systems appear to be awkward, inefficient, complex, and expensive.
Furthermore, since each radio at a cell typically requires a unique trunk connection to the telephone network, handling off a call from one radio to another radio requires the mobile-telephone switching fabric to be reconfigured to connect the new radio and trunk to the original network trunk connection. In conventional systems, the total system capacity is a function of the amount of initial radio-to-network trunk connections the system can handle and the amount of reconfiguration (i.e. handoff) the system must perform. The reconfiguration requires intervention of the system control structures, and the length of time required for reconfiguring these trunks increases the complexity of these system control structures. CDMA systems require establishment of a second radio connection for "soft handoff" at rates faster than those needed for traditional handoffs, thereby taxing or exceeding the processing and reconfiguration capabilities of systems of conventional design.

Mobile telephone system call processing arrangement


Described herein are representative embodiments of amplifiers having selectable power output while maintaining low power consumption. In certain exemplary embodiments, the amplifiers are operated as linear power amplifiers, such as may be used in wireless communication systems. According to one exemplary embodiment, a circuit is described comprising a control system configured to operate the circuit in at least a first mode and a second mode. The circuit of this embodiment further includes a first amplifier section configured to amplify at least a portion of an input signal and produce a first amplified signal on a first signal path in the first mode of operation, a second amplifier section configured to amplify at least a portion of an input signal and produce a second amplified signal on a second signal path in the second mode of operation, and an impedance inverter having an input coupled to the first and second signal paths.

In the past two decades, the market for wireless communication systems has shown unprecedented growth. In addition to the widespread proliferation of mobile phone services, wireless local area networks (WLANs) operating according to wireless standards such as IEEE 802.11a, IEEE 802.11b and IEEE 802.11 g are becoming more common. As the popularity of wireless systems increases, so does the demand for improved performance in the wireless transceivers supporting such systems.
One of the components in a wireless transceiver that can affect performance is the power amplifier. For example, linear power amplifiers are often used in mobile transceivers to amplify radio frequency (RF) signals to be transmitted from the transceiver. Linear amplification is typically required in such transceivers to support the signal processing methods used to encode the RF transmissions (for example, Code Division Multiple Access (CDMA), Time Division Multiple Access (TDMA), or Enhanced Data GSM Environment (EDGE) processing). Further, because of the mobile nature of many wireless devices, the power amplification required for proper transmission is not necessarily constant. Consider, for example, a typical CDMA handset used in a cellular telephone network. Typical CDMA handsets are desirably capable of producing output powers of up to +28 dBm. The average output power that is necessary for such handsets, however, is far less than this maximum, and is generally closer to 0 dBm. The power required for proper transmission is typically dependent on the distance of the handset to the corresponding base station, and thus varies as the handset is transported from location to location. Further, because the typical handset draws its power from the handset battery, operating the linear power amplifier with optimal efficiency at the various required power levels would extend battery life, and thus the talk time of the handset. Accordingly, there exists a need for improved amplifiers that can operate with enhanced efficiency in multiple power modes, thereby providing the necessary peak power in one mode and efficient, low-power operation in another.

Amplifiers with high efficiency in multiple power modes


A solid phos-copper base brazing alloy component for forming a brazed joint with a raised shoulder, little to no black oxide, and improved corrosion resistance. The brazing components of the present invention are made of an alloy having a liquidus temperature above 840° F. and contain of about 4-7% phosphorus, about 2-8% tin, about 2% antimony, up to about 3% nickel, 0.1 to about 3% silicon, up to about 3% manganese, with the balance being copper.

Copper and copper alloys have been brazed successfully for many years with metals comprising the phosphorus-copper alloys, also known as phos-copper alloys. Silver is often added to the base metals to accomplish special features for a wide variety of applications. These alloys are generally known as silver-phos-copper alloys. Silver brazing alloys, composed primarily of silver, copper, zinc, tin, nickel, manganese, and cadmium, are used to braze ferrous and non-ferrous metals and alloys. These silver brazing alloys are designed to work at low temperatures and to provide strong, ductile joints.
Additions of other elements, such as tin, antimony, nickel or silver, to phos-copper and silver-phos-copper alloys have been made in an effort to lower the melting range temperatures or to reduce the phosphorus content to increase ductility. For example, U.S. Pat. No. 5,066,456 discloses that the addition of tin and antimony up to six percent each to a phos-copper based alloy lowers brazing temperatures.
Air conditioning coils, heat exchangers, water coolers and other copper coils are manufactured by connecting copper tubing and fittings by brazing with phos-copper or silver-phos-copper brazing alloys. These alloys produce strong, ductile brazes, but the industry has long experienced a relatively high percentage of leaks after brazing, particularly with BCuP-2 alloys. Most leaks are caught on the production floor during testing and are repaired. This double work of brazing and testing is very costly. More damaging, very tiny leaks can evade factory testing and end up as warranty work in the field, which is both expensive and damaging to the company's brand image.
The phos-copper alloys now on the market all range within a solidus temperature of 1310° F. to a liquidus temperature of 1500° F. Alloys of even higher phosphorus content, up to 8%, are now in use to enhance productivity because of their lower operating temperature cost considerations. The non-silver alloys in this group are the most commonly used in industry and contain 7% to 7.4% phosphorus, the balance being copper. The fact that these phos-copper alloys flow and join very well is problematic in that they also flow very thinly. Torch and furnace brazing is performed as rapidly as possible to achieve good productivity. While these alloys are quick to braze, they are difficult to observe for soundness. The entire 360° of the brazed joint must be carefully viewed by the operator, for it is here that a correction, if needed, should be made. These thin-flowing alloys produce only a very small cap, or shoulder, around the pipe at the fitting junction. The alloys are thin-flowing in that they flow like a heavy coating of paint, instead of more thickly as in a putty used to seal a ⅛″ crack.
Even a skilled brazer cannot tell 100% of the time that he has a totally leak-free connection by visually looking at his completed braze. In some places on a given braze connection, the brazing alloy can be seen to be in place as a shoulder between the two parts, while in other places the alloy drops in the adjoining area (the capillary) without forming any noticeable shoulder. When viewing this very closely, the operator can often see that the joint appears to be 100% sound, but he can't be certain of it. Most air conditioning companies submerge each copper coil, which comprises perhaps 100 brazes, into a water tank, and air pressure is added to this coil to determine if there are any leaks. Wherever leaks are found, brazing must be repeated.
The now-in-use phos-copper alloys, as described above, could be modified to form an advantageous cap by lowering the phosphorus content significantly. However, doing so is not feasible because the liquidus temperature rises to a point of endangering the copper being brazed. It is noteworthy that silver in the range of 6-15%, when added to the phos-copper alloys described above, lowers the solidus temperature to 1190° F., allows the phosphorus contents to be reduced as much as 2%, allows the alloy to flow in a much thicker manner, and effects a noticeable cap or shoulder to the brazed area. The popular 15% silver-phos-copper alloy has the consistency of hot taffy when hot enough to braze, and easily forms a large cap or shoulder at the joint area. This visible fillet is quickly seen by the operator and any omission in the braze can be remedied. However, the addition of silver is quite expensive.
Another serious deterrent to being able to observe the quality of copper tubing brazed with phos-copper or silver-phos-copper brazing alloys is the formation of a black oxide that is formed on the actual braze surface and on the adjacent copper pipe. Because the braze and the copper pipe all turn black, it is difficult to closely inspect the actual braze.
In addition to the initial soundness of the brazed joint, the corrosion resistance of the joint is of great importance. Brazed parts are used in corrosive environments of varying degree, for example, the marine environment, sewer treatment facilities and underground. The BCuP-5 alloy (80Cu-5P-15Ag) is typically used whenever corrosion is a significant factor. However, further improvement in corrosion resistance is desirable.
There is thus a need for a phos-copper base alloy system that brazes at low temperatures, forms a noticeable cap or shoulder to facilitate visual inspection, does not form black oxide to any extent that will obscure visual inspection, and provides high corrosion resistance.


An anticancer agent comprising a compound represented by the formula (I) [R1 represents hydrogen atom, hydroxyl group, a C1-6 alkoxy group and the like; R2 and R3 represents hydrogen atom, a halogen atom, a C1-6 alkyl group and the like; R4 represents hydrogen atom, a C1-6 alkyl group, a C1-6 alkylsulfonyl group and the like; R5 represents hydrogen atom or a substituent;  represents a single bond or a double bond; R6 and R7 represents hydrogen atom, a C1-6 alkyl group and the like; R8 represents hydrogen atom, a C1-6 alkyl group and the like; A represents —O—, —S—, or —CH2—; D represents —C═ or —N═; X represents methylene group, —O—, or —CO—; Q represents —N═ or —C(R8)═; and Y represents a heterocyclic group or amino group], which shows a superior inhibitory activity against pim-1 kinase.

Pim-1 kinase, which is overexpressed in certain kinds of leukemia and prostate cancer, is a serine/threonine kinase that promotes or enhances canceration of cells, exacerbation of cancer cells, resistance to an anticancer agent, and the like by phosphorylating proteins involved in apoptosis or cell cycle control (Cell, 37, pp. 141-150, 1984; EMBO J., 4, pp. 1793-1798, 1985; The International Journal of Biochemistry & Cell Biology, 37, pp. 726-730, 2005; European Journal of Cancer, 44, pp. 2144-2151, 2008). Because of the aforementioned characteristic actions of pim-1 kinase, usefulness of a substance having an inhibitory action against pim-1 kinase as an anticancer agent or the like is expected (refer to Japanese Patent Unexamined Publication (KOKAI) No. 2007-84494, Japanese Patent Unexamined Publication (KOHYO) No. 2009-511499 and the like).
From the aforementioned point of view, several pim-1 kinase inhibitors useful as an anticancer agent have been proposed. Among them, an example of compounds containing a bicyclic nitrogen-containing heteroaryl ring in a fundamental structure includes the 1,2-imidazo[b]pyridazine compounds disclosed in International Patent Publication WO2008/58126. SGI-1776, a typical compound among those disclosed in the aforementioned publication, has been under a clinical trial (phase I) for use as an anticancer agent. Although developments of compounds having the inhibitory activity against pim-1 kinase have been actively conducted as mentioned above, no medicament has yet been launched into the market, and in view of the circumstances, developments of novel compounds having superior activity have still been desired.
As compounds having the indole or 7-azaindole structure, the compounds disclosed in International Patent Publications WO2009/155052 are known. However, as for these compounds, inhibitory action against pim-1 kinase has not been reported. Although this publication discloses compounds having a benzofuran-3-one ring, and also discloses several compounds having hydroxyl group at the 7-position of the benzofuran-3-one ring, it does not disclose any compound having a substituent other than hydroxyl group at the 7-position of the benzofuran-3-one ring. Compounds having the benzofuran-3-one ring with a substituent at the 7-position are disclosed in Journal of Medicinal Chemistry, 45, pp. 1741-1′747, 2002. However, these compounds do not contain a bicyclic nitrogen-containing heteroaryl ring in the fundamental structure.


A readily adjustable belt and a link construction wherein a plurality of links of similar construction are detachably connected in end to end relationship to define an endless torque transmitting belt. Each link is formed of an injection molded plastic part having a female end portion and a male end portion arranged such that the male portion of one link can be readily snap-fitted to the female portion of the next adjacent link. The respective links are identical in structure and are provided in complementary interlocking structure to facilitate attachment and to insure positive interlocking engagement of adjacent links, and yet render the links readily detachably connected so as to facilitate rendering a belt readily adjustable. The respective links are also provided with transversely extending indentations formed in the upper and lower surfaces thereof to impart flexibility thereto. Tapering side surfaces are provided with a non-slip textured surface.

Belts are common means to transmit torque between rotating devices. An example of a widespread use of a torque transmitting belt is the belt used in an automobile engine to rotate various accessories, customarily known as the fan belt. Most belts are a continuous loop of fixed length. As a result, there are many different size belts for many different applications. For example, each make and model of automobile is likely to require a different size fan belt. This necessitates the availability of a large inventory of belts varying in size to quickly accommodate the replacement of a worn or broken belt. In order to avoid costly idle or down time of machinery, it is important that a worn or broken belt be replaced quickly.
The replacement of a broken or worn endless belt frequently constitutes a time consuming and tedious task. To replace such endless belts, e.g. in a vehicle, tools are required. This is because some part of the vehicle to which the belt is connected has to be loosened to provide the play necessary to effect the removal of such endless belt. Frequently, the part which must be moved to allow the play is difficult to get to. Thus, considerable effort and time is involved in replacing an endless type belt.
Heretofore, belts with adjustments have been made to compensate for wear, or for use in more than one application within a predetermined relatively small range. One such belt is disclosed in U.S. Pat. No. 1,264,193 issued to H. W. Leonard on Apr. 30, 1918 and entitled "Elastic Belt." Therein disclosed is a belt made up of a number of links or sections. This section can be either elastic or non-elastic, provided there is a sufficient length of elastic portion to give advantageous results. The elastic sections comprise a coiled spring as a core enveloped by a plurality of washers loosely movable over the spring core. Each section is connected to the adjacent section by a threaded hub connector. U.S. Pat. No. 4,058,022 to Pickburn on Nov. 15, 1977, entitled "Mobius Drive Belt Fastener" discloses a belt twisted to form a Mobius strip and a fastener to connect the ends together. The twist in the belt doubles the surface area of the belt contacting the pulleys, thereby extending the life of the belt.
U.S. Pat. No. 3,631,732 to E. Kleban entitled "Adjustable Belt Assembly" discloses a belt having coupling elements for adjusting the length of the belt that are either wholly confined within the cross-sectional area of the belt material or extend from the belt surface and receive a bolt for closing the ends of the belt.
Each of these belts are difficult to install and require tools for their installation. This complicates their quick and easy replacement, especially in emergency situations where assistance and the necessary tools are unavailable.
Also known are link type conveyor belts such as disclosed in U.S. Pat. Nos. 2,766,635; 1,896,407 and 1,861,642. However, such link type conveyor belts are not suitable for use in vehicles or other machine applications for coupling rotating machines for transmitting torque.
My prior U.S. Pat. No. 4,979,929 was an effort to overcome the foregoing noted structure. While the structure disclosed in U.S. Pat. No. 4,979,929 proved satisfactory, it was noted that the structure thereof could be further enhanced by additional improvement to facilitate the connection and disconnection of the adjacent links, to enhance the driving characteristic of the belt, to increase the flexibility of the belt and the individual links, and to render the connection between adjacent links stronger, simpler and more positive.

Endless belt and a link construction therefor


A storage device can include at least one nonvolatile (NV) memory array that includes a first section having a first physical address range, and a second section having a second physical address range. A nonvolatile fault indication can be set to at least a fault state or a no-fault state. A memory watchdog circuit configured to set the fault indication to the fault state in response to an expiration of a predetermined watchdog period, the watchdog period being reset in response to a defer indication. An address mapping circuit can be configured to, in response to the fault indication having the no fault state, mapping input addresses to the first physical addresses range, and in response to the fault indication having the fault state, mapping the same input addresses to the second physical address range. Corresponding methods and systems are also disclosed.

Systems NOR flash memories have traditionally been used for code storage in applications requiring high reliability across a wide temperature range. Embedded systems inside an automobile is one example of such an application. Current-generation automotive microcontroller units (MCUs) rely on embedded NOR flash. As automotive MCU manufacturers shift towards more advanced process nodes, embedding flash memory onto the same silicon die as the MCU processor can present technological and manufacturing challenges. Adding embedded flash memory to existing MCU logic (e.g., CMOS) requires a larger number of fabrication masks, adding to production cost and complexity. While replacements for embedded NOR flash memory have been proposed, such as MRAM, such alternate memory types have yet to be reliably employed.
To address these challenges, two distinct responses have emerged. One is systems-in-package (SiP) integration, and the other is to employ standalone NOR flash. In both cases, a NOR flash memory device can be separate from a corresponding MCU (e.g., different die or integrated circuit package). Both SiP and standalone approaches can provide very cost-effective solutions. However, one drawback of separate devices can be security concerns, including the ability to alter important code stored within the NOR device, particularly boot code executed by the MCU in a startup operation.
To address such security concerns, conventional approaches have sought to secure the boot process. Conventional approaches have relied on cryptography to verify code before MCU is allowed to execute the code. However, code verification can result in increased boot time. Several conventional methods to speed up a secure boot process have been proposed, including performing code verification in parallel with the booting operation and postponing verification to a later point in the boot process. However, these conventional methods have been impractical.
To better understand features and advantages of the disclosed embodiments, boot options and configurability of conventional systems employing a MCU and separate NOR flash device will be described.
FIG. 16 shows conventional booting options for a system 1601. Upon becoming operational, a flash-less MCU (i.e., and MCU without embedded flash memory) performs an immutable hardware configuration step (A) before allowing execution of boot code. Modern MCUs are designed to accommodate multiple boot options (B0 to BN) commonly based on available interfaces for various types of non-volatile memories. MCU manufacturers offer one-time or dynamically configurable boot options. Boot options are shown as 1603 in FIG. 16.
Dynamic configurability is achieved by relying on external pins 1605 while the use of a single boot option can be guaranteed by blowing internal non-resettable fuses 1607. Once configured, the system 1601 boots in a predefined way. Immutable code (A) performs minimal system initialization and passes control to the first mutable code. First mutable code (B0 to BN) initializes complex peripherals and transfers control to an operating system.
Security-aware systems offer boot options where the hard-coded branch is conditional, so that the MCU either executes verified code or fails to boot. This method can be extended to create a chain of layers or code blocks that are executed only if verified. However, the effect of additional code verification routines on system performance is not linearly spaced across time, but rather inversely proportional to the time at which these routines are performed. In other words, the earlier code verification occurs in the boot process, the more adverse the effect on boot performance (e.g., time to boot). One of the reasons for such effects can be computing resource availability inside the MCU as it starts up (e.g., comes out of power-on reset). Some multi-core processors boot from a single core while the remaining cores wait to be enabled by software. Consequently, when the code that enables secondary cores comes from an off-chip memory and needs to be verified, not all computing resources are available until verification is complete. Even when additional cores are not needed for verification, as with MCU that include hardware cryptography blocks, such MCUs can initially boot with fail-safe performance settings such as a reduced system clock frequency, which also impedes to goal of a fast boot time.
In addition to performance impact, the integration and maintenance effort associated with embedding verification into the boot code raises additional practical considerations. Multiple stakeholders are involved in developing the booting process in an embedded system: the MCU manufacturer, the memory (e.g., NOR flash) manufacturer, developers who generate bootloader code, operating system code, and application code. All of these can be separate entities. While such segregation results in high performing separate components, due to specialization, extensive coordination and integration efforts can be required to optimize a system boot process.
MCU functionality is largely defined by the code stored in non-volatile memories. MCUs typically include on-chip read only memory (ROM). The size of on-chip ROM is determined by the amount of logic that MCU manufacturers can safely finalize before tape-out. The size of ROM tends to be minimal in comparison with the initialization and boot logic, which is pushed over to an external flash device. Unlike ROM code, which is inherently trusted due to its immutability, location, and extensive design review, flash code must undergo periodic verification. Periodic verification has become an established practice because many conventional standalone NOR flash devices have lacked any on-chip security infrastructure to provide a level of assurance that approaches that of on-chip ROM.
For systems with MCUs and external memory (e.g., NOR flash), a level of code assurance can be achieved via a combination of device authentication and code verification. Device authentication can include a cryptographic exchange between the MCU and external flash device to ensure the identity of the flash device. Device authentication can help guard against a swapping of the physical flash die and ensures that the state of the flash device remains intact. Currently some type of security infrastructure is becoming implemented for many standalone flash devices, and the standards organization JEDEC is working toward a NOR flash authentication standard. Consequently, MCU manufacturers are increasingly more likely to include flash authentication support into the ROM of the MCUs.
Code verification can take various forms, including but not limited to the MCU comparing code received from an external memory against an expected value, such as a hash or other value generated for the code. Some verification processes can also include a cryptographic exchange. While device authentication can be included in some systems, code verification remains the deciding step in securing the boot process.
FIG. 17 is a block diagram showing a boot operation of a conventional embedded system 1701. A system 1701 can include an MCU 1703, NAND flash memory 1705, NOR flash memory 1707, and DRAM 1709, all formed on different chips (e.g., dice). MCU 1703 can include a processor (e.g., CPU) 1711, ROM 1713, SRAM 1715 and one-time programmable (OTP) memory 1717. An address space 1719 accessible by CPU 1711 can include the various memory types, including those on-chip (i.e., on the MCU 1703) as well as off-chip.
FIG. 17 shows components and control transfer points in time. At time t=0, a CPU can execute ROM code (Bootloaderl) 1721-0. When a system further boots from an external NOR flash memory 1707, ROM code 1721-0 can initialize a serial peripheral interface (SPI) controller so that it can fetch the further initialization routines 1721-1 (Bootloader2) from NOR flash memory 1707 to SRAM 1715 (between times t=1 and t=2). These routines configure several peripherals one of which is a DRAM controller. Once DRAM is available, at time t=3 an operating system kernel 1721-2 is copied from NOR flash memory 1707 to DRAM 1709 and control is passed to system kernel. Application code 1721-3 stored by NAND flash memory 1705 can then be executed.
A critical control transfer happens when ROM code 1721-0 branches to SRAM code 1721-1. If code verification is not performed before this point, there is a window of opportunity for unverified code to take over the execution flow. As noted, executing code verification prior to this point can be costly in terms of boot performance. Accordingly, conventional systems can include code verification deferral. In code verification deferral, a system is allowed to boot (with some safeguards), and then the code is verified subsequently. If verification fails, the system can enter a recovery operation.
Accordingly, conventional embedded systems relying on external NOR flash for booting can have two approaches to booting operations: a fast boot and no ability to recover, as fast boot is achieved via code verification deferral; or a slow (secure) boot, with the ability to recover. While a slow boot can provide security, it can be unsuitable for some applications, such as those requiring a boot operation to conclude within a limited time period.
FIG. 18A is a timing diagram showing a slow and secure boot operation. An application processor (e.g., a flash-less MCUs) boots from internal ROM (bootloader1). Bootloader 1 preliminarily configures the MCU and fetches subsequent code (bootloader2) from an external non-volatile memory (e.g., NOR flash).
At time t=0, operating on code from bootloader1, an MCU can authenticate the external NOR device. Once the NOR device has been authenticated, at time t=1, MCU can transfer or examine code stored by the NOR device (e.g., bootloader2), shown as "content verification". Since bootloader #2 comes from off-chip (e.g., off the MCU chip), it needs to be verified before control is passed to it. Existing solutions rely on cryptography to verify subsequent code. Code verification is a slow operation that can result in some system deadlines not being met. This is shown at time t=2, which can be an availability deadline for the MCU, at which time the MCU needs to be available to communicate with other devices of a system. For example, within an automobile, an MCU may be required to communicate over a CAN bus within 50 ms, but not necessarily be ready to perform any application-specific actions.
At time t=3, different actions can occur based on a code verification result. If code from the NOR device (e.g., bootloader2) passes verification (pass), the code can be executed as normal. However, if the code fails (fail), a system can execute a recovery operation, which can seek to remedy the bad code. At time t=4, an application deadline can occur. At this point in time, a system should be ready to execute application code.
FIG. 18B is a timing diagram showing a faster boot operation that sacrifices security for speed. The "availability deadline" problem can be addressed by ROM code (bootloader1) passing control to NOR code (bootloader2) without completing verification of the NOR code.
At time t=0, the NOR device can be authenticated. At time t=1, before the availability deadline, the MCU can execute NOR code. NOR code verification can also start before the availability deadline, however, the code verification will not be complete. At time t=3, a system can continue with normal operations or execute a recovery operation depending upon a code verification result.
While an approach like that of FIG. 18B can meet the availability deadline, the system loses the ability to recover in all cases, as control is passed to potentially unverified code.
The use of watchdog timers by application processors in embedded systems is known. However, a system that boots from an external flash can have altered boot code that can maliciously defer such a watchdog timer despite running unverified code. To circumvent this problem, conventional systems typically offload detection to a remote authority. Failure of an embedded system to prove its integrity to a remote authority results in a watchdog expiration. Communication between an embedded system and a remote authority over an insecure channel can be supported by making the watchdog deferral an authenticated procedure.
FIGS. 19A to 19C are diagrams showing conventional systems that include an authenticated watchdog timer. FIG. 19A shows a conventional system 1901 with an MCU 1903 having a watchdog timer 1923. MCU 1903 can initially boot with boot code from an internal ROM (Bootloader1), and then continue boot operations with boot code (Bootloader2) on an external NOR device 1907. MCU 1903 can communicate with a remote authority 1925 with an authenticated procedure.
FIG. 19B is a timing diagram showing a "good" boot operation. At time t=0, an MCU can boot with code from an internal ROM (Bootloader1). At time t=1, the MCU can boot with code from an external NOR device (Bootloader2). At about the same time, MCU can start a watchdog timer (WD). Watchdog timer (WD) can be deferred by defer messages from a remote authority (RA). FIG. 19B shows MCU reporting to RA, and RA deferring WD at time t=2. At time t=3 a system can have successfully booted with Bootloader2 code.
FIG. 19C shows a timing diagram of a boot operation that generates a watch dog fault. FIG. 19C shows the same operations as FIG. 19B. However, because Bootloader2 code is invalid, RA does not defer WD. Consequently, WD expires at time t=t3, causing a fault condition (e.g., power-on/reset).
The addition of an authenticated watchdog allows a MCU to retain the control and force the system into a known state: executing ROM code (e.g., Bootloader1) after a configurable timeout. This is a useful, but limited response because it is infeasible to embed recovery code into ROM. As a result, as shown in FIG. 19C, the watchdog expiration cycle can repeat itself. That is, while the addition of a watchdog timer can provide for a fast and secure boot, the system is not resilient, it cannot easily recover from the fault state.
It would be desirable to arrive at some way or providing a boot operation that is both fast, secure and resilient, for systems that store boot code in an external nonvolatile memory.

Nonvolatile memory devices, systems and methods for fast, secure, resilient system boot


A method and an apparatus are provided to remote boot a diskiess computer on a WAN. The remote boot apparatus is constructed as an embedded interface in the computer. The remote boot apparatus has a bi-directional buffer, a central processor, a network interface, a boot ROM and ail interface core routine. The remote boot apparatus intercepts a normal disk read of an MBR issued by a system BIOS of a local computer, and then redirects the disk instruction in a form of TCP/IP packet to a remote boot server to read a corresponding file block from a location of the remote boot server. After the file block is received and confirmed by the computer, the received file block is unpacked and supplied to boot the computer.

1. Field of the Invention
The present invention is related to a method to remote boot a diskiess computer, and more particularly to a remote boot technique that intercepts the disk interrupt requests, converts these requests to TCP/IP packets, and sends the packets to a remote boot server and deriving an operating system (OS) to boot a local computer.
2. Description of Related Art
An operating system (OS) is a software program that is used to manage the operation of all components in a computer system, and provides an operation platform through which users are able to control a variety of software and hardware. For instance, users can access data stored in hard disks, or design an application program to be executed by a central processor and then have the operation results displayed on a monitor screen.
When the personal computer is activated, the computer needs a special program, called a boot loader, which is directed by the BIOS (Basic Input Output System), to initialize the OS. Thereafter, the operating system can take full control of all components in the computer.
Computer users or managers have to spend a considerable amount of time learning how to use the personal computers and manage all the resources in the computers. Large enterprises are concerned with drastic costs of the system down time and the failure rate, and so the system installation and maintenance have become a daunting task in day-to-day operation of the information processing department. Without proper maintenance, all kinds of problems may occur.
System designers came up with a server-client configuration, where the server end had a hard disk large enough for holding the operating system, application programs and user data. In the aspect of the client station, each client station can individually boot the OS without any disk devices. It is noted that application programs are downloaded from the server end and independently executed in each client station resulting in higher operating efficiency. Further, because the client stations do not need physical disk devices (hard disk drives), the failure possibility of hardware can be reasonably reduced. Since the OS and application programs for client stations had been installed in the server end, users can simply operate computers just by activating thc power even though they are not familiar with any installation skill of the OS. Such a server-client configuration may be more suitable for large enterprises, schools and home users.
This remote boot technique was first introduced by Novell Inc. However, the remote boot was only limited to terminal mode and the text operation mode at that time. While the users controlled the computer operation through keyboard input, the application programs were actually executed in the main server. As a result, the system efficiency is inversely proportional to the amount of client stations being connected on line.
Later, Novell Inc. introduced the RPL (Remote Program Load) system and Intel Corporation also put out a PXE (Pre-boot eXecution Environment) system, both using remote boot technology and able to support graphic mode operation.
The main objective of the present invention is to provide a method to remotely boot a diskless computer over wide area network (WAN), including a local area network.
However, the biggest problem of the above RPL and PXE systems is that these systems can only be operated in a local area network (LAN) environment. The RPL system relied on data broadcasts through the network to find a boot server, and the PXE system used a DHCP (Dynamic Host Configuration Protocol) to obtain the necessary IP address and then use that to make connection to the server. But when the target server is beyond the limits of a network router or a virtual local area network (VLAN), an agent/proxy server or a transparent router is needed to enable the personal computer to access the boot server from a different network. However, the addition of either the proxy server or transparent router will add to the equipment cost and slow down the system performance.
RPL and PXE systems need to work with the operating system to produce the image files. When the personal computer is turned on, the BIOS or the Option ROM on a network interface card is initiated to use Trivial File Transfer Protocol (TFTP) to download the necessary image files from the boot server. The operating system can only be initialized once the image files are ready, and then the remote network connection program can be started. However, the image files have to meet the special requirements of different operating systems, for instance, different languages.
The conventional remote boot only provides the basic network connection function, without the error recovery and data restoration functions. Therefore, the chance of data loss in transmission is increased. When errors are detected during transmission of image files in the network connection mode, the complete image file needs to be resent, thus the system performance is slowed down.
In a conventional remote boot, both the server and the personal computer are controlled by the network file system (NFS). Even though the personal computer may create a network disk, the network disk still employs file-oriented data exchange. When the user needs a certain file, an access request is first passed through the operating system to a file system layer to convert to the disk instruction. Then, a network file system layer encapsulates the disk instruction in the TCP/IP packet and then sends the packet to the server through the network interface. When the server receives the disk instruction packet, the packet is passed to the file system layer to find the corresponding network disk, and after unpacking the packet format the disk instruction is passed to the actual disk where the requested file is stored and the disk read instruction is executed to get the data from a predetermined file block. However, the whole process has to go through many data conversion processes, which is a waste of the system resources. As described above, the conventional remote boot technique still has drawbacks needed to be solved.

Method and apparatus for redirecting a local boot request to a remote location


The present invention relates to a method for differentiating in a subject suffering from chronic shortness of breath (dyspnea) between (i) a pulmonary disease, (ii) a cardiovascular complication, (iii) a cardiovascular complication accompanied by a pulmonary disease and (iv) dyspnea without cardiovascular or pulmonary causes. The method comprises the steps of determining an amount of a pulmonary surfactant protein in a sample of a subject, determining an amount of a natriuretic peptide in a sample of said subject, and differentiating between (i) a pulmonary disease, (ii) a cardiovascular complication, (iii) a cardiovascular complication accompanied by a pulmonary disease and (iv) chronic dyspnea without cardiovascular or pulmonary causes by comparing the amount determined in a) and the amount determined in b) with a reference amount for each. The present invention further provides a device and a kit for carrying out the inventive methods.

Cardiovascular complications and, in particular, acute cardiovascular events are most often life threatening medical conditions which require immediate action. However, these conditions can not always be unambiguously diagnosed. Specifically, some of the most common symptoms accompanying various types of heart diseases including acute cardiovascular events, but also chronic heart dysfunctions such as chronic heart failure, are symptoms which are characteristic for other (non-cardiovascular) diseases as well. Therefore, it is often difficult, cumbersome and time consuming to differentiate between a cardiovascular or other cause of an observed symptom. Differentiation may also require the help of a specialist such as a cardiologist.
A typical symptom for cardiovascular complications, and, in particular, for an acute cardiovascular event or a more severe chronic heart failure, is shortness of breath (dyspnea). As for other symptoms, dyspnea may have various causes including cardiovascular complications and non-cardiovascular pulmonary diseases. In light of a potential cardiovascular cause of the symptom, though, it is very important to properly diagnose its cause in a given patient, e.g., an emergency patient.
As disclosed in WO2004/077056, systemic levels of surfactant proteins may be used as markers for heart failure. However, the disclosed techniques do not allow for a differential diagnosis of the cause of the elevated levels of the surfactant proteins. Specifically, it is known that pulmonary diseases or damages may also result in increased systemic levels of the proteins (Doyle 1997, Am J Respir Crit Care Med Vol. 156: 1217-1229). Accordingly, the '056 disclosed methods are highly likely to produce false positive diagnostic results, which, in turn, result in an application of inappropriate therapeutic regimen (Svendstrup Nielsen, 2004, The European Journal of Heart Failure 6: 63-70).
Therefore, there is a clear and long-standing need for means and methods permitting a differential diagnosis of the cause of symptoms such as dyspnea and, in particular, chronic dyspnea, in a subject. Desirable means and methods allow a reliable and efficient diagnosis while avoiding the drawbacks of the current techniques.
The technical problem underlying the present invention is the provision of means and methods for complying with the aforementioned needs. The technical problem is solved by the present invention as defined by the claims and as set forth below.

This patent is subject to a terminal disclaimer.

Methods for differentiation between cardiac and pulmonary causes of chronic dyspnea


A cantilevered stator stage for the axial compressor 14 of a gas turbine engine 10 in which the stator tips 26 rub against an abrasive section 24 on the rotor drum 22 during initial running of the engine 10 to abrade the tips 26 of the stator to provide optimised stator tip running clearance.

In gas turbine engines it is generally desirable for efficient operation to maintain minimum rotor tip clearances, and preferably with a substantially constant clearance around the circumference. This is the position for instance with cantilevered stators in an axial compressor or turbine. This can be difficult to achieve due for instance to various asymmetric effects either on build or during running. These effects include the casing centre being offset relative to the rotor drum centre line during build and/or during running. The casing may be distorted from a circular shape during build and/or running, and for instance the casing may become ovalised.


The depixelated visual display relates to visual displays which combine generated images with the view of the environment surrounding a user and transmit such combined visual information to the eye position of the user. Image generators, such as a cathode ray tube and a liquid crystal display, produce an image composed of a multiplicity of pixels in a plane. The dark area between pixels becomes more prominent in a visual display. To eliminate this dark area while conserving photons, the depixelated visual display has a crossed diffraction grating (1) placed parallel to the pixel plane of the image generator on the side from which light exits the pixels. Prior techniques for depixelation had not controlled the direction into which image light is diffracted, as does the crossed diffraction grating (1), and, unlike the crossed diffraction grating (1), required sources of light which create heat that can be detrimental to a liquid crystal display.

It is often desirable to provide visual information to a living being, usually a person. Frequently one wishes to superimpose such visual information upon the being's view of the real world.
Such a display requires, in a form known as a folded catadioptric display, an image generator; a beam splitter, which receives the image light from the image generator and sends a fraction, designated the reflected fraction, of such image light to a reflective combiner that both allows light from the real world to pass through such combiner and reflects the image light such that both the real-world light and the image light are transmitted to the eye of the user through the beam splitter.
The beam splitter will transmit a fraction, designated the transmitted fraction, of the image light reflected from the collimator-combiner. Of course, only a fraction of the real-world light is also transmitted by the beam splitter.
To correct for aberrations and distortions produced by the beam splitter and the combiner, a correction lens is often placed in the optical path between the image generator and the beam splitter.
Another beneficial process in a visual display is depixelation of the image.
The image generators that are well known in the art, such as a cathode ray tube and a liquid crystal display, produce an image composed of a multiplicity of pixels. Each pixel is a point of light. Since adjacent pixels do not contact each other, every pixel is surrounded by a dark area. The combiner magnifies the image, causing the dark area to be perceptible and thereby detracting from the accurate portrayal of the image one wishes to depict.
Depixelation traditionally comprises blurring the edges of the pixels without losing resolution or contrast. In fact, perceived resolution--although necessarily somewhat subjective--appears to be increased by depixelation. And, in the case of triads of colored pixels, depixelation blends the colors together.
In U.S. application Ser. No. 07/832,237, the inventor achieves depixelation of a liquid crystal display through the placement of a fiber optic faceplate between the liquid crystal display and the beam splitter, a fold mirror in that case, in such a manner that the input numerical aperture of the faceplate is approximately equal to twice the pixel size of the liquid crystal display divided by the distance between the fiber optic faceplate and the pixels.
A second process for achieving depixelation with a fiber optic faceplate involves simply placing the source of light for the liquid crystal display near the rear of the pixel plane of the liquid crystal display. Since the input surface of the faceplate is a finite distance in front of the pixel plane of the liquid crystal display, the image of each pixel on the input surface of the faceplate is not only enlarged, but also covers a greater portion of the total picture, correspondingly decreasing the amount of dark area surrounding each pixel. Also, the small size of each pixel causes considerable diffraction of the light which passes the edge of the pixel.
A common and third technique for depixelation is locating a weak diffuser plate a short distance from the pixels, in the direction of the beam splitter.


One intermediate substrate is disposed in one film substrate bent at a predetermined portion, one end side from a bent portion of the film substrate is made to oppose one surface of the intermediate substrate to construct a first panel, the other end side from the bent portion is made to oppose the other surface of the intermediate substrate to construct a second panel, and an edge portion on one side of the film substrate is made to project from the intermediate substrate. A plurality of terminal electrodes corresponding to first panel electrodes and second panel electrodes formed on both surfaces of the intermediate substrate and on the inner surfaces of the one end side and the other end side of the film substrate, which oppose the two surfaces of the intermediate substrate, respectively, are formed together at the edge portion.

This application is based upon and claims the benefit of priority from the prior Japanese Patent Application No. 11-336422, filed Nov. 26, 1999, the entire contents of which are incorporated herein by reference.
The present invention relates to a stacked display device and, more particularly, to a stacked display device constructed by one intermediate substrate and one outer substrate which sandwiches the intermediate substrate.
As electrooptic display devices using, e.g., a liquid crystal panel, a composite-type device having a touch input panel stacked on the front surface of a display panel on the observation side and a two-layered device having two, front and rear display panels are stacked are conventionally known. These devices are called stacked display devices.
FIG. 1 is a sectional view of a conventional stacked display device in which hatching is omitted. FIG. 1 shows a composite-type display device having a touch input panel (to be referred to as a touch panel hereinafter) 2 stacked on the front surface of a liquid crystal display panel 1.
In this stacked display device, one intermediate substrate 10 is shared as substrates on the adjacent sides of the liquid crystal display panel 1 and touch panel 2. This device comprises the intermediate substrate 10, a display panel substrate 11 opposing the rear surface of the intermediate substrate 10, and a touch panel substrate 12 opposing the front surface of the intermediate substrate 10.
The intermediate substrate 10 and display panel substrate 11 are transparent substrates made of glass. Transparent display panel electrodes 13 and 14 opposing each other are formed on the rear surface of the intermediate substrate 10 and on the inner surface (surface opposing the intermediate substrate 10) of the display panel substrate 11, respectively. Alignment films 15 and 16 cover the electrodes 13 and 14, respectively.
One of the intermediate substrate 10 and display panel substrate 11, and for example, the display panel substrate 11 has, on one end side, an edge portion projecting from the intermediate substrate 10 as the other substrate. The edge portion has, on its inner surface, a plurality of display panel terminal electrodes 17 corresponding to the display panel electrodes 13 and 14 formed on the rear surface of the intermediate substrate 10 and on the inner surface of the display panel substrate 11, respectively.
Although not illustrated in FIG. 1, the inner surface of the display panel substrate 11 has lead wires which connect the display panel electrodes 14 formed on the inner surface of the display panel substrate 11 to predetermined terminal electrodes of the plurality of display panel terminal electrodes 17 formed at the edge portion, pad electrodes corresponding to the terminal connections of the display panel electrodes 13 formed on the rear surface of the intermediate substrate 10, and lead wires which connect the pad electrodes to the remaining predetermined terminal electrodes of the plurality of display panel terminal electrodes 17.
The intermediate substrate 10 and display panel substrate 11 are jointed by a first frame-shaped sealing member 18 inserted therebetween while maintaining a predetermined gap. The terminal connections of the display panel electrodes 13 formed on the rear surface of the intermediate substrate 10 and the above-described pad electrodes on the inner surface of the display panel substrate 11 are electrically connected through conductive members (not shown) in or near the substrate joint region by the sealing member 18. A liquid crystal is encapsulated in the region in the gap, surrounded by the sealing member 18 between the intermediate substrate 10 and the display panel substrate 11 to form a liquid crystal layer 19. The liquid crystal display panel 1 has the above-described structure.
The touch panel substrate 12 opposing the front surface of the intermediate substrate 10 is formed from a transparent resin film having flexibility. Transparent touch panel electrodes 20 and 21 are formed on the front surface of the intermediate substrate 10 and the inner surface (surface opposing the intermediate substrate 10) of the touch panel substrate 12 made of a resin film, respectively, so as to extend in directions perpendicular to each other.
One of the intermediate substrate 10 and touch panel film substrate 12, and for example, the intermediate substrate 10 has, on one end side, an edge portion projecting from the film substrate 12 as the other substrate. The edge portion has, on its front surface, a plurality of touch panel terminal electrodes 22 corresponding to the touch panel electrodes 20 and 21 formed on the front surface of the intermediate substrate 10 and the inner surface of the film substrate 12, respectively.
Although not illustrated in FIG. 1, the front surface of the intermediate substrate 10 has lead wires which connect the touch panel electrodes 20 formed on the front surface of the intermediate substrate 10 to predetermined terminal electrodes of the plurality of touch panel terminal electrodes 22 formed at the edge portion, pad electrodes corresponding to the terminal connections of the touch panel electrodes 21 formed on the inner surface of the film substrate 12, and lead wires which connect the pad electrodes to the remaining predetermined terminal electrodes of the plurality of touch panel terminal electrodes 22.
The touch panel 2 is constituted by jointing the intermediate substrate 10 and the touch panel film substrate 12 with a second frame-shaped sealing member 23 inserted therebetween and electrically connecting the terminal connections of the touch panel electrodes 21 formed on the inner surface of the touch panel substrate 12 to the pad electrodes on the front surface of the intermediate substrate 10 through conductive members (not shown) in or near the substrate joint region by the frame-shaped sealing member 23.
This stacked display device is a TN (Twisted Nematic) type liquid crystal display device, for which the initial aligned state of the liquid crystal molecules in the liquid crystal layer 19 of the liquid crystal display panel 1 is twisted alignment with a predetermined twist angle (e.g., almost 90xc2x0), and polarizing plates 24 and 25 are arranged on the rear surface of the liquid crystal display panel 1 (outer surface of the display panel substrate 11) and the front surface of the touch panel 2 (outer surface of the touch panel film substrate 12) while extending their transmission axes in predetermined directions.
The stacked display device shown in FIG. 1 has a composite combination with the touch panel 2 stacked on the front surface of the liquid crystal display panel 1. However, some stacked display devices have two display panels stacked on the front and rear sides. For example, in a two-stacked display device having two liquid crystal display panels stacked, conventionally, the touch panel 2 of the stacked display device shown in FIG. 1 is replaced with a second liquid crystal display panel.
However, as shown in FIG. 1, the conventional stacked display device has the intermediate substrate 10 shared as substrates on the adjacent sides of the first panel (liquid crystal display panel in FIG. 1) 1 and second panel (touch panel in FIG. 1) 2, the first panel substrate 11 opposing the rear surface of the intermediate substrate 10, and the second panel substrate 12 opposing the front surface of the intermediate substrate 10, in which the first panel electrodes 13 and 14 are formed on one surface of the intermediate substrate 10 and the inner surface of the first panel substrate 11, and the second panel electrodes 20 and 21 are formed on the other surface of the intermediate substrate 10 and the inner surface of the second panel substrate 12. For this reason, three substrates, i.e., the intermediate substrate 10, first panel substrate 11, and second panel substrate 12 must be manufactured. This results in an increase in the number of manufacturing processes and an increase in manufacturing cost.
Additionally, in the conventional stacked display device, since the terminal electrodes 17 of the first panel 1 are formed at the edge portion of one of the intermediate substrate 10 and first panel substrate 11 (first panel substrate 11 in FIG. 1), and the terminal electrodes 22 of the second panel 2 are formed at the edge portion of one of the intermediate substrate 10 and second panel substrate 12 (intermediate substrate 10 in FIG. 1), the driving circuit for the first panel, which is connected to the terminal electrodes 17 of the first panel 1, and that for the second panel, which is connected to the terminal electrodes 22 of the second panel 2, must be connected in separate processes. Hence, the electrical connection operation in mounting this stacked display device in an electronic device is cumbersome, resulting in an increase in mounting labor.
It is an object of the present invention to provide a stacked display device which decreases the number of substrates to be used, can easily be manufactured at low cost by a small number of manufacturing processes, and is convenient for wiring connection to an external circuit.
In order to achieve the above object, according to the present invention, there is provided a stacked display device comprising:
one first substrate having electrodes formed on both of a front surface and a rear surface;
one second substrate having a one-end-side portion opposing the front surface of the first substrate and the other-end-side portion opposing the rear surface of the first substrate, the second substrate having a first panel electrode assembly opposing the electrodes formed on the front surface of the first substrate, a second panel electrode assembly opposing the electrodes formed on the rear surface of the first substrate, and a plurality of terminal electrodes electrically connected to the first panel electrode assembly and/or the second panel electrode assembly;
a first connecting member which connects the first substrate and the one-end-side portion of the second substrate to construct a first panel;
a second connecting member which connects the first substrate and the other-end-side portion of the second substrate to construct a second panel; and
an electrooptic substance layer having an electrooptic effect and formed between the first substrate and the second substrate at least in one of the first panel and second panel.
According to this stacked display device, since one substrate is formed into a substantially U-shape, and another substrate is disposed in the opposite portions of the substrate to form a stacked display device having two panels stacked, the number of substrates can be two, i.e., smaller than three for the prior-art device. In addition, electrodes for the two panels can be formed together on the substrate having the U shape. Hence, the number of processes and labor in manufacturing the stacked display device largely decrease to considerably reduce the manufacturing cost.
Furthermore, since the first panel electrode assembly and second panel electrode assembly are formed together on one substrate, terminal electrodes to be connected to these electrode assemblies can be arranged together at one portion, and wiring connection to an external circuit in mounting the device in an electronic device is very easy.
In the above stacked display device, the second substrate preferably comprises a flexible film substrate that can be bent at a predetermined portion to sandwich the first substrate while causing both side portions to oppose the two surfaces of the first substrate. When the edge portion on one side of the second substrate projects from the first substrate, and the terminal electrodes connected to the first panel electrode assembly and those connected to the second panel electrode assembly are arranged together at the projecting edge portion, wiring connection to an external circuit such as a driving circuit is facilitated.
In the above stacked display device, the first panel electrode assembly comprises first panel electrodes opposing the electrodes formed on the front surface of the first substrate, and wiring members for connecting the first panel electrodes to corresponding electrodes of the terminal electrodes. In this case, preferably, the front surface of the first substrate has a plurality of terminal connections connected to the electrodes on the front surface, and the first panel electrode assembly comprises a plurality of pad electrodes correspondingly connected to the plurality of terminal connections on the first substrate, respectively, and wiring members for connecting the pad electrodes to corresponding electrodes of the terminal electrodes. Thus, the terminal electrodes corresponding to the electrodes opposing the first panel electrodes, which are formed on the first substrate, can also be arranged together at the predetermined edge portion of the second substrate, and connection to an external circuit in mounting is further facilitated.
In the above stacked display device, the second panel electrode assembly comprises second panel electrodes opposing the electrodes formed on the rear surface of the first substrate, and wiring members for connecting the second panel electrodes to corresponding electrodes of the terminal electrodes. In this case, the rear surface of the first substrate has a plurality of terminal connections connected to the electrodes on the rear surface, and the second panel electrode assembly comprises a plurality of pad electrodes correspondingly connected to the plurality of terminal connections formed on the first substrate, respectively, and wiring members for connecting the pad electrodes to corresponding electrodes of the terminal electrodes. Thus, the terminal electrodes corresponding to the electrodes on the first substrate, which oppose the second panel electrodes, can also be arranged together at the predetermined edge portion of the second substrate, and connection to an external circuit in mounting is further facilitated.
In the above stacked display device, preferably, one of the first and second panels comprises a display panel having the electrooptic substance layer formed between the first and second substrates, and the other panel comprises a touch input panel. A liquid crystal is preferable for the electrooptic substance layer in that case.
In the above stacked display device, both of the first and second panels may comprise display panels each having the electrooptic substance layer formed between the first and second substrates. A liquid crystal is preferable as the electrooptic substance layer in that case as well.
The above-described object of the present invention can also be achieved by a stacked display device comprising:
one intermediate substrate having electrodes formed on both of a front surface and a rear surface;
one flexible substrate bent at a predetermined portion and sandwiching the intermediate substrate with a one-end-side portion from the bent portion opposing the front surface of the intermediate substrate and the other-end-side portion from the bent portion opposing the rear surface of the intermediate substrate, one of the side portions having an edge portion projecting from the intermediate substrate, the flexible substrate having a first panel electrode assembly opposing the electrodes formed on the front surface of the intermediate substrate, a second panel electrode assembly opposing the electrodes formed on the rear surface of the intermediate substrate, and a plurality of terminal electrodes formed at the projecting edge portion and electrically connected to the first panel electrode assembly and/or the second panel electrode assembly;
a first connecting member which connects the intermediate substrate and the one-end-side portion of the film substrate to construct a first panel;
a second connecting member which connects the intermediate substrate and the other-end-side portion of the film substrate to construct a second panel; and
an electrooptic substance layer having an electrooptic effect and formed between the intermediate substrate and the film substrate at least in one of the first and second panels.
According to this stacked display device, one flexible substrate is bent to two side portions, and another substrate is disposed between the side portions to form a stacked display device having two panels stacked. For this reason, the number of substrates can be as small as two, and the stacked display device can easily be manufactured only by bending one flexible substrate. In addition, electrodes of the two panels can be formed together on one flexible substrate. Hence, the number of processes and labor in manufacturing the stacked display device decrease to greatly reduce the manufacturing cost.
In the above stacked display device, the first panel electrode assembly preferably comprises a plurality of first panel electrodes opposing the electrodes formed on the front surface of the intermediate substrate, and a plurality of wiring members for connecting the first panel electrodes to corresponding electrodes of the terminal electrodes. In this case, preferably, the front surface of the intermediate substrate has a plurality of terminal connections connected to the electrodes on the front surface, and the first panel electrode assembly formed on the flexible substrate comprises a plurality of pad electrodes correspondingly connected to the plurality of terminal connections, respectively, and wiring members for connecting the pad electrodes to corresponding electrodes of the terminal electrodes.
In the above stacked display device, the second panel electrode assembly preferably comprises a plurality of second panel electrodes opposing the electrodes formed on the rear surface of the intermediate substrate, and a plurality of wiring members for connecting the second panel electrodes to corresponding terminal electrodes. In this case, preferably, the rear surface of the intermediate substrate has a plurality of terminal connections connected to the electrodes on the rear surface, and the second panel electrode assembly formed on the flexible substrate comprises a plurality of pad electrodes correspondingly connected to the plurality of terminal connections formed on the intermediate substrate, respectively, and wiring members for connecting the pad electrodes to corresponding electrodes of the terminal electrodes.
In the above stacked display device, preferably, one of the first and second panels comprises a display panel having the electrooptic substance layer formed between the intermediate substrate and the flexible substrate, and the other panel comprises a touch input panel.
In the above stacked display device, both of the first and second panels may comprise display panels each having the electrooptic substance layer formed between the intermediate substrate and the flexible substrate.
The above object of the present invention can also be achieved by a stacked display device constructed by stacking a first panel and a second panel, comprising one intermediate substrate, one outer substrate having a one-end-side portion opposing front surface of the intermediate substrate and the other-end-side portion opposing the rear surface of the intermediate substrate, a plurality of terminal electrodes formed at an edge portion on one side of the outer substrate, a first panel electrode assembly formed on the front surface of the intermediate substrate and on an inner surface of the one-end-side portion of the outer substrate while making at least some parts oppose each other and connected to predetermined terminal electrodes of the plurality of terminal electrodes, a second panel electrode assembly formed on the rear surface of the intermediate substrate and on an inner surface of the other-end-side portion of the outer substrate while making at least some parts oppose each other and connected to the remaining terminal electrodes of the plurality of terminal electrodes, a first joint member which joints the intermediate substrate and the one-end-side portion of the outer substrate to construct the first panel, a second joint member which joints the intermediate substrate and the other-end-side portion of the outer substrate to construct the second panel, and an electrooptic substance layer having an electrooptic effect and formed between the intermediate substrate and the outer substrate at least in one of the first and second panels.
Additional objects and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. The objects and advantages of the invention may be realized and obtained by means of the instrumentalities and combinations particularly pointed out hereinafter.

Stacked display device with folded substrate