A multiplex device is provided for monitoring computer video signals and receives as input the video signals of a plurality of computers. The multiplex device selects the video signals of one of the plurality of computers to be inputted into a monitor for monitoring. The multiplex device for monitoring the computer video signals has three sets of switch circuits, a control signal generating circuit, three sets of voltage amplifying circuits, three sets of current amplifying circuits, a synchronous signal multiplex selecting circuit, and an interface circuit.

It is a known method to monitor an operation or a manufacturing process by means of a plurality of computers and a plurality of monitors. Take an example, in an automatic manufacturing process, it is usually provided with a plurality of computers and a plurality of monitors at some monitoring points, and then collecting the video signals outputted from said monitors by a management computer, so that a supervisor can monitor and control the whole manufacturing process.
The disadvantage of the above known method can be described in FIG. 1. As shown in FIG. 1, the circuit diagram of a known device for monitoring video signals of a plurality of computers is indicated by the symbol 10, wherein four sets of red, green, and blue video signals of four computer terminals, i.e. (Ra, Ga, Ba), (Rb, Gb, Bb), (Rc, Gc, Bc), (Rd, Gd, Bd), are shown. The red video signals Ra, Rb, Rc, Rd are inputted into a first set of relays 11, the green video signals Ga, Gb, Gc, Gd are inputted into a second set of relays 12, and the blue video signals Ba, Bb, Bc, Bd are inputted into a third set of relays 13.
If the supervisor will monitor video signals of the second computer terminal, he can input two video selecting signals S11, S12 to a decoder 16 for generating four control signals Ca, Cb, Cc, Cd, wherein only Cb can make the corresponding relay in each set to be conducting, while other signals Ca, Cc, Cd will make other relays in each set open, thus the video signals Rb, Gb, Bb of the second computer terminal will pass through the corresponding relays and to be inputted into a connector 14. Additionally, said two video selecting signals S11, S12 are also inputted into a multiplexor 17 (which are inputted with the four sets of vertical and horizontal synchronous signals (Va, Ha), (Vb, Hb), (Vc, Hc), (Vd, Hd) of the four computer terminals) for selecting the vertical and horizontal synchronous signals Vb, Hb of the second computer terminal, and being inputted into the connector 14. The connector 14 will then send the video signals Rb, Gb, Bb and the horizontal and vertical sync signals Vb, Hb to a monitor 15 for being monitored by the supervisor.
The disadvantage of the above known method is in that the three sets of relays are analog mechanical devices, and there is no circuit for signal compensation, so the inputted video signals will be seriously attenuated when the distance is long or the frequency is high. Therefore, the distance between the monitor 15 and the four computer terminals are limited, and the frequency bandwidth of the video signals are also limited.
In order to improve the disadvantage of the circuit in FIG. 1, another three sets of analog IC switches 21, 22, 23 (as shown in FIG. 2) comprising transistor pairs (i.e. NPN transistor interconnected with PNP transistor, or PMOS transistor interconnected with NMOS transistor) are used to replace the three sets of relays 11, 12, 13 in FIG. 1 for being inputted with AC type of video signals, and an operational amplifier IC 24 (comprising three sets of operational amplifier 241,242, 243) are added before the connector 25 to amplify the selected video signals for compensation.
In FIG. 2, four sets of red, green, and blue video signals of four computer terminals, i.e. (Ra, Ga, Ba), (Rb, Gb, Bb), (Rc, Gc, Bc), (Rd, Gd, Bd), are shown. The red video signals Ra, Rb, Rc, Rd are inputted into a first set of transistor pair analog IC switch 21, the green video signals Ga, Gb, Gc, Gd are inputted into a second set of transistor pair analog IC switch 22, and the blue video signals Ba, Bb, Bc, Bd are inputted into a third set of transistor pair analog IC switch 23.
If the supervisor will monitor video signals of the second computer terminal, he can input two video selecting signals S21, S22 to a decoder 27 for generating four control signals Ca, Cb, Cc, Cd, wherein only Cb can make the corresponding transistor pair in each set to be conducting, while other signals Ca, Cc, Cd will make other transistor pairs in each set open, thus the video signals Rb, Gb, Bb of the second computer terminal will pass through the corresponding transistor pairs and being amplified by the first, the second, and the third video operational amplifiers 241, 242, 243 to be inputted into a connector 25.
Additionally, said two video selecting signals S21, S22 are also inputted into a multiplexor 28 (which are inputted with the four sets of vertical and horizontal synchronous signals (Va, Ha), (Vb, Hb), (Vc, Hc), (Vd, Hd) of the four computer terminals) for selecting the vertical and horizontal synchronous signals Vb, Hb of the second computer terminal, and being inputted into the connector 25. The connector 25 will then send the video signals Rb, Gb, Bb and the horizontal and vertical sync signals Vb, Hb to a monitor 26 for being monitored by the supervisor.
The disadvantage of the circuit in FIG. 2 is in that the transistor pair analog IC switches 21, 22, 23 will make the circuit design more complicated and more expensive. Additionally, since the switches 21, 22, 23 and the operational amplifiers 241, 242, 243 are IC packaged, the frequency bandwidth are therefore limited, video signals higher than 100 MHz will be attenuated abruptly, this limitation apparently makes the circuit in FIG. 2 unadaptable to high frequency video signals currently used. If we try to use high frequency IC switches and operational amplifiers, the cost will be raised dramatically. Furthermore, the video operational amplifiers 241, 242, 243 need a negative voltage besides a positive voltage, so the circuit are complicated and will increase more noises.

Multiplex device for monitoring computer video signals


A three-dimensional rendering device may project an image on a movable display through a collimating device, which collimates the rays from the display into a narrow solid angle. The narrow solid angle may allow the rays from the display to be projected only to a viewer located at a particular position relative to the display. As the display moves, the information displayed may change to be that appropriate for the particular position, so that a three-dimensional image of the object may be perceived by the viewer as the viewer changes positions around the three-dimensional rendering device.

1. Field
This invention relates to the rendering of three-dimensional images of surfaces or scenes.
2. Description of Related Art
Three-dimensional rendering of surfaces or scenes is often desirable in order to communicate to a viewer the three-dimensional shape of the surface of an object. Providing different three-dimensional rendering for different viewing angles provides a sense of three-dimensionality of the objects represented. A depth perspective may be provided by giving different (stereoscopic) image information to one eye, say the left eye, compared to the image information given to the other eye, the right eye. The viewer's brain then interprets the difference in the image perceived by the left eye, compared to the image perceived by the right eye, as a difference in depth to the object surface.
A variety of other methods for rendering a three-dimensional image from a two-dimensional display are known, such as that disclosed in U.S. Pat. No. 4,160,973 to Berlin. Berlin discloses a three-dimensional image rendering device in which a three-dimensional image is generated by a two-dimensional display that is moved to achieve the effect of three dimensions. The three-dimensional effect is achieved by adjusting the intensity of the light sources on the two-dimensional display as the display rotates. The three-dimensional image is a composite of the different images applied to the display, wherein the persistence of the two-dimensional images in the eyes of the viewer causes the image to appear three-dimensional.

Three-dimensional image rendering devices and methods


There are provided mechanisms and methods for enabling the deployment of applications into new execution environments by adding extensions to base deployment capability for each of the new containers. These mechanisms and methods can enable embodiments to instantiate modules that augment deployment and/or execution environments for applications being deployed. The ability of embodiments to provide augmented deployment and/or execution environments can enable server embodiments to become more flexible environments from the point of view of developers seeking to implement applications on the server.

Since its inception in 1995, the Java™ programming language has become increasingly popular. (Java™ is a trademark of Sun Microsystems, Inc.) Java, which is an interpreted language, enabled the creation of applications that could be run on a wide variety of platforms. This ability to function across a variety of different client platforms, i.e., platform independence, and Java's relatively easy implementation of network applications has resulted in its use in endeavors as basic as personal web pages to endeavors as complex as large business-to-business enterprise systems.
As Java has become more commonplace, a wide variety of tools and development platforms have been created to assist developers in the creation and implementation of applications based upon Java as well as other programming languages offering platform independence. These tools and development platforms allow users to work with previously generated modules, thus reducing overlapped efforts.
However, conventional tools and development platforms have added additional rigidity into the development process. Conventional approaches often limit developers to modules or module types having code that is shipped with the tool or development platform. Thus, developers using conventional tools and development platforms are often unable to use customized modules or execution environments without significant additional effort.

System and method for application container architecture


A method for measuring a physical function forms a symmetric composite function by combining the physical function with a reference function. The method obtains a Fourier transform of the symmetric composite function. The method calculates an inverse Fourier transform of the obtained Fourier transform, wherein the calculated inverse Fourier transform provides information regarding the physical function. The physical function can be a nonlinearity profile of a sample with at least one sample surface. The physical function can alternatively by a sample temporal waveform of a sample optical pulse.

1. Field of the Invention
The present invention relates generally to the field of measuring attributes of a physical system and, more particularly, relates to methods of measuring a non-symmetric physical function.
2. Description of the Related Art
Various optical devices are based on induced second-order susceptibilities in silica-based glass waveguides (e.g., electro-optic modulators, switches, parametric amplifiers). For example, G. Bonfrate et al. describe optical parametric oscillators useful for the study of quantum interference and quantum cryptography, and for metrology applications in Parametric Fluorescence in Periodically Poled Silica Fibers, Applied Physics Letters, Vol. 75, No. 16, 1999, pages 2356–2358, which is incorporated in its entirety by reference herein. Second-order susceptibility can be induced in a several-microns-thick region of fused silica (a material that is not normally centro-symmetric, and therefore normally does not exhibit a second-order susceptibility) by poling at elevated temperatures. This phenomenon has been described by R. A. Myers et al. in Large Second-Order Nonlinearity in Poled Fused Silica, Optics Letters, Vol. 16, No. 22, 1991, pages 1732–1734, which is incorporated in its entirety by reference herein.
FIGS. 1A and 1B schematically illustrate the poling of a silica wafer 1. As schematically illustrated in FIG. 1A, poling typically comprises using an anode electrode 2 placed proximate to one surface 3 of the wafer 1 and a cathode electrode 4 placed proximate to the opposite surface 5 of the wafer 1. A voltage is applied across the wafer 1 for a period of time, resulting in a second-order optical nonlinearity profile. The profile has a thickness and is localized beneath the surface 3 where the anode electrode was placed, as schematically illustrated in FIG. 1B. As used herein, the term "anodic surface" refers to the surface which is placed proximate to the anode electrode, and the term "cathodic surface" refers to the surface which is placed proximate to the cathode electrode. Such a poling procedure is described in more detail by Thomas G. Alley et al. in Space Charge Dynamics in Thermally Poled Fused Silica, Journal of Non-Crystalline Solids, Vol. 242, 1998, pages 165–176, which is incorporated herein in its entirety.
The field of poled silica has suffered from the lack of a common method to reliably measure the second-order optical nonlinearity profile of poled samples. This absence of a reliable procedure for measuring nonlinearity profiles may be the reason, at least in part, for wide discrepancies in the measured magnitudes and the positions of the nonlinearity profiles of various poled systems as reported in the literature. The Maker fringe (MF) technique is the most common method currently used to investigate the nonlinearity profile of poled silica. The MF technique comprises focusing a pulsed laser beam of intensity I1 (known as the fundamental signal) onto a sample at an incident angle θ and measuring the intensity I2 of the second harmonic (SH) signal generated within the nonlinear region as a function of the incident angle θ. For a transverse magnetic (TM) polarized fundamental laser beam, the conversion efficiency ηTM(θ) is given by:
                                          η            TM                                          (            θ            )                          =                                            I              2                                      I              1                                =                                    f                                            (                                  θ                  ,                                      n                    1                                    ,                                      n                    2                                                  )                                                                                                                  ∫                                                                                ⅆ                        33                                                                                (                        z                        )                                                                                ⅇ                                              jΔ                                                                                k                                                                                (                            θ                            )                                                    z                                                                                ⅆ                      z                                                                                                  2                                                          (        1        )            where    d33(z) is the nonlinear coefficient (which is proportional to the second-order susceptibility χ(2));    z is the direction normal to the sample surface (i.e., parallel to the poling field);    n1 and n2 are the refractive indices at the fundamental and SH frequencies, respectively;    Δk=k2−2k1, where k1 and k2 are the fundamental and SH wave numbers, respectively, and    ƒ(θ, n1, n2) is a well-defined function of the incident angle θ (relative to the surface normal direction) and refractive indices n1 and n2.
The function ƒ(θ, n1, n2) accounts for both the power loss due to reflection suffered by the fundamental and the SH beams, and the projection of the input electric field along the appropriate direction. In general, ƒ(θ, n1, n2) depends on both the polarization of the input fundamental wave and the geometry of the second harmonic generation configuration. The exact formula of ƒ(θ, n1, n2) is given by D. Pureur, et al. in Absolute Measurement of the Second-Order Nonlinearity Profile in Poled Silica, Optics Letters, Vol. 23, 1998, pages 588–590, which is incorporated in its entirety by reference herein. This phenomenon is also described by P. D. Maker et al. in Effects of Dispersion and Focusing on the Production of Optical Harmonics, Physics Review Letters, Vol. 8, No. 1, 1962, pages 21–22, which is incorporated in its entirety by reference herein.
The conversion efficiency ηTM(θ) is obtained experimentally by rotating the sample with respect to the incident laser beam and measuring the power of the SH signal as a function of the incident angle θ. Due to dispersion of the laser beam, Δk is finite and ηTM(θ) exhibits oscillations (called the Maker fringes) which pass through several maxima and minima. The objective of this measurement is to retrieve the second-order nonlinearity profile d33(z). The absolute value of the integral in Equation 1 is the amplitude of the Fourier transform of d33(z). In principle, if both the amplitude and the phase of a Fourier transform are known, the argument of the Fourier transform (in this case d33(z)) can be readily inferred by taking the inverse Fourier transform of the Fourier transform. However, the measured Maker fringes provide only the magnitude of the Fourier transform, not its phase. Consequently, for an arbitrary and unknown nonlinearity profile, the MF measurement alone is not sufficient to determine a unique solution for d33(z). Even if the phase information were available, the shape of d33(z) could be determined, but the location of this shape beneath the surface of the sample (i.e., where the nonlinearity profile starts beneath the surface) could not be determined.
Previous efforts to determine d33(z) have involved fitting various trial profiles to the measured MF data. Examples of such efforts are described by M. Qiu et al. in Double Fitting of Maker Fringes to Characterize Near-Surface and Bulk Second-Order Nonlinearities in Poled Silica, Applied Physics Letters, Vol. 76, No. 23, 2000, pages 3346–3348; Y. Quiquempois et al. in Localisation of the Induced Second-Order Non-Linearity Within Infrasil and Suprasil Thermally Poled Glasses, Optics Communications, Vol. 176, 2000, pages 479–487; and D. Faccio et al. in Dynamics of the Second-Order Nonlinearity in Thermally Poled Silica Glass, Applied Physics Letters, Vol. 79, No. 17, 2001, pages 2687–2689. These references are incorporated in their entirety by reference herein.
However, the previous methods do not produce a unique solution for d33(z). Two rather different trial profiles can provide almost equally good fits to the measured MF data. This aspect of using fitting routines to determine d33(z) is described in more detail by Alice C. Liu et al. in Advances in the Measurement of the Poled Silica Nonlinear Profile, SPIE Conference on Doped Fiber Devices II, Boston, Mass., November 1998, pages 115–119, which is incorporated in its entirety by reference herein.

This patent is subject to a terminal disclaimer.

Method of measuring a physical function using a composite function which includes the physical function and an arbitrary reference function

The Board of Trustees of the Leland Stanford Junior University


The invention relates to an internal multiband antenna intended for small-sized radio devices, and a radio device with such an antenna. The basic structure of the antenna is a two-band PIFA. A parasitic element (230) is added to it inside the outline of the radiating plane (220) of the PIFA, e.g. in the space (229) between the conductor branches (221, 222) of the radiating plane. The parasitic element extends close to the feeding point (FP) of the antenna, from which place it is connected to the ground plane of the antenna with its own short-circuit conductor (235). The structure is dimensioned so that the resonance frequency based on the parasitic element comes close to the one resonance frequency of the PIFA, thus widening the corresponding operating band, or a separate third operating band is formed for the antenna with the parasitic element. Because the parasitic element is located in the central area of the radiating plane and not in its peripheral area, the radio device user's hand does not significantly impair the matching of the antenna on an operating band which has been formed by the parasitic element. In addition, when the resonance frequency based on the parasitic element is on the upper operating band, the matching of the antenna also improves on the lower operating band.

Models that operate in two or more systems using different frequency ranges, such as different GSM systems (Global System for Mobile telecommunications) have become increasingly common in mobile stations. The basic condition for the operation of the mobile station is that the radiation and reception properties of its antenna are satisfactory on the frequency bands of all the systems in use. Without any limit on size, it is relatively easy to make a high-quality multiband antenna. However, in mobile stations, especially mobile phones, the antenna must be small when it is placed inside the covering of the device for comfort of use. This increases the requirements of antenna design.
In practice, an antenna of sufficiently high quality that can be placed inside a small device can be most easily implemented as a planar structure: The antenna includes a radiating plane and a ground plane parallel with it. In order to facilitate matching, the radiating plane and the ground plane are usually connected to each other at a suitable point by a short-circuit conductor, whereby the resulting structure is of the PIFA (planar inverted F-antenna) type. The number of operating bands can be increased to two by dividing the radiating plane by means of a non-conductive slot into two branches of different lengths as viewed from the short-circuit point, in a way that the resonance frequencies of the antenna parts that correspond to the branches fall in the ranges of the desired frequency bands. However, in that case the adaptation of the antenna can become a problem. It is especially difficult to make the upper operating band of the antenna sufficiently wide when it is wanted to cover the bands used by two systems. One solution is to increase the number of antenna elements. An electromagnetically coupled, i.e. parasitic planar element is placed close to the primary radiating plane. The resonance frequency of the parasitic element is arranged e.g. close to the other resonance frequency of a two-band PIFA so that a uniform, relatively wide operating band is formed.
FIG. 1 shows such a known internal multiband antenna. In the figure there is the circuit board 101 of a radio device, which circuit board has a conductive upper surface. This conductive surface functions as the ground plane 110 of the planar antenna. At the one end of the circuit board there is a radiating plane 120 with a roughly rectangular outline, the plane being supported above the ground plane with a dielectric frame 150. From the edge of the radiating plane, close to a corner, starts the first short-circuit conductor 125 that connects the radiating plane to the ground plane, and the feed conductor 126 of the whole antenna. From the feed conductor, there is a ground isolated lead-through to the antenna port AP on the lower surface of the circuit board 101. The radiating plane 120 has been shaped by means of a slot 129 therein in a way that the plane is divided into two conductor branches of clearly different lengths as viewed from its short-circuit point, the PIFA thus being dual-band. The lower operating band is based on the first, longer conductor branch 121 and the upper operating band on another, shorter conductor branch 122. The antenna structure also includes a radiating parasitic element 130. This is a planar conductor piece on the same geometric plane with the radiating plane 120. The parasitic element is located adjacent to the radiating plane on its long side next to the first portion of the first conductor branch mentioned above. One end of the parasitic element is connected to the ground with the second short-circuit conductor 135, which is relatively close to the feed conductor 126. In that case, the electromagnetic coupling between the parasitic element 130 and the radiating plane 120 is obtained to be strong enough to make the parasitic element function as a radiator. Together with the surrounding structure, the parasitic element forms a resonator which has a natural frequency on the band of the PCS1900 system (Personal Communication Service), for example. If the natural frequencies of the PIFA have then been arranged on the bands of the GSM900 and GSM1800 systems, for example, the result is an antenna that operates in three systems.
The structure according to FIG. 1 has the drawback that the parasitic element is relatively sensitive to external conductive materials. Therefore, the mobile phone user's hand can significantly impair the band properties of the antenna. In addition, the matching of the antenna on the lower operating band leaves room for improvement.


This telephone directory assistance system accepts a request for a telephone number of a registrant, and judges whether the registrant is registered in a telephone number data base. When the registrant is registered in the telephone number data base, the telephone directory assistance system judges whether a message from the inquirer is transmitted to the registrant without informing the telephone number to the inquirer based on a telephone number disclosing condition registered in the telephone number data base. Then, in a case of transmission, the inquirer is caused to input a message and the inputted message is informed to the registrant.

In the telephone directory assistance service of this kind, a person, who owns his/her telephone number (registrant), can select disclosure or private. For example, when a certain registrant does not want to make his/her telephone number known to others, the registrant registers his/her telephone number as private and this prevents the telephone number from being known by others via the telephone directory assistance service, so that the registrant's privacy is protected.

Telephone directory assistance method and telephone directory assistance system


A method for operating a memory controller includes determining a number of free blocks to be created during an idle time by using a block consumption history, and controlling a non-volatile memory device to perform a garbage collection operation during the idle time to create the determined number of free blocks.

1. Technical Field
The present inventive concept relates to a memory controller, and more particularly, to a method for operating a memory controller to reclaim a response time of a read operation and a write operation, and a system having the memory controller.
2. Discussion of the Related Art
A non-volatile memory device periodically collects garbage to reclaim a storage capacity thereof. For example, a garbage collection operation is performed by copying, from a block including valid pages and invalid pages, the valid pages into another block and erasing the block including the invalid pages. The erased block is freed up and the erased block may be called a free block.
The non-volatile memory device performs a write operation for writing data in the non-volatile memory device and a read operation for reading data from the non-volatile memory device in response to a write instruction and a read instruction, respectively. When the non-volatile memory device does not have enough free blocks to perform the write operation, a garbage collection operation may be performed before a write operation and a read operation are performed. However, this may delay the write operation and the read operation.

Method for operating a memory controller and a system having the memory controller

RESEARCH & BUSINESS FOUNDATION SUNGKYUNKWAN UNIVERSITY


An electromagnetic wave generator includes first and second electrodes facing each other and spaced apart from each other; a chargeable particle disposed between the first and second electrodes; a voltage source which applies a voltage between the first and second electrodes; and an antenna electrically connected to one of the first and second electrodes and which radiates an electromagnetic wave due to induced current oscillation based on the applied voltage.

1. Field
The present disclosure relates to electromagnetic wave generators and bit generators.
2. Description of the Related Art
In general, the term "terahertz electromagnetic waves" (hereinafter, also referred to as terahertz waves) refers to electromagnetic waves having a frequency band of about 0.1 to about 10 THz. Terahertz waves may be easily transmitted through materials which microwaves or light waves may not be transmitted through, and may be easily absorbed into moisture. As such, terahertz waves are highly regarded in various technical fields such as medical science, chemistry, military, security, biotechnology, environment, and information communication. However, apparatuses capable of reliably generating an electromagnetic wave of a terahertz band have not been developed, and research is being actively conducted to develop a new terahertz generator.
For example, a terahertz generator using a solid state laser having non-linear crystals, and a terahertz generator using an electromagnetic induction method using a coil or a magnet, is being currently developed. However, currently developed terahertz generators may output terahertz waves of only a certain wavelength, or may have a narrow available band of an output terahertz wave, and thus may be restricted in terms of applicability to various fields. For example, although terahertz waves of different wavelengths are required to obtain tomographic images of different organs (heart, blood vessel, stomach, etc.) in a human body, an existing terahertz generator having a small bandwidth may not satisfy the above requirement. Also, a terahertz generator may have a large power consumption due to a principle of operation of the terahertz generator.

Electromagnetic wave generator and bit generator using oscillation of charged particles


A structure and method of maximizing the volume of low dielectric constant material between adjacent traces of a conductive interconnect structure. A semiconductor structure includes a semiconductor substrate, a first insulating layer located over the semiconductor substrate, a conductive interconnect layer having a plurality of conductive traces located over the first insulating layer, and a patterned insulating layer located over the patterned interconnect layer. One or more trenches are formed in the upper surface of the first insulating layer. These trenches, which do not extend completely through the first insulating layer, are located between adjacent traces of the interconnect layer. A dielectric material having a low dielectric constant is located in these trenches, and between adjacent traces of the patterned interconnect layer. The trenches advantageously maximize the volume of low dielectric constant material which is located between the traces.

1. Field of the Invention
The present invention relates to a semiconductor structure having an interconnect structure which includes a plurality of conductive traces. More specifically, invention relates a structure and method for maximizing the volume of a low dielectric constant material which is located between adjacent interconnect traces.
2. Description of the Prior Art
In the era of deep sub-micron semiconductor fabrication, the need to minimize interconnect capacitance is becoming more important to overcome the increased RC delay which results from shrinking geometry. One method of minimizing the capacitance of the interconnect structure of a semiconductor device is to provide a dielectric material having a low dielectric constant (K) between the conductive traces of the interconnect structure, such that intra-trace capacitance (which typically dominates the capacitance of the interconnect structure) is minimized. It would therefore be desirable to have a semiconductor structure which maximizes the volume of low dielectric constant material located between adjacent conductive traces in an interconnect structure.
U.S. Pat. No. 5,482,900 discloses the semiconductor structures illustrated in FIGS. 1-3. FIG. 1 is a cross sectional view of a semiconductor structure 1 including a metallurgy pattern 10, an insulating layer 11 and a semiconductor substrate 12. The metallurgy pattern 10 is covered with a thin conformal layer 14. A non-conformal layer 16 of spin-on-glass (SOG) 16 is deposited over layer 14. The narrow spacing between the lines of metallurgy pattern 10 can result in voids, such as void 18, between these lines. These voids exist because the spaces between the lines are so small that these spaces cannot be filled with the SOG material. As illustrated in FIG. 2, the SOG layer 16 is etched back to the upper surface of layer 14 where layer 14 extends over the metallurgy pattern 10. An oxide layer 20 is then formed over the resulting structure.
FIG. 3 is a cross sectional view of another semiconductor structure 2 disclosed in U.S. Pat. No. 5,482,900. Semiconductor structure 2 includes semiconductor substrate 12, insulating layer 11, metallurgy pattern 13, oxide layer 22, conformal oxide layer 22, SOG layer 28 and insulating layer 30. Semiconductor structure 2 is similar to semiconductor structure 1 (FIGS. 1-2), but additionally includes oxide layer 22 formed over metallurgy pattern 13.
As previously discussed, it would be desirable to have a semiconductor structure which maximizes the volume of a low dielectric constant material between conductive traces in an interconnect structure.

Maximization of low dielectric constant material between interconnect traces of a semiconductor circuit


A method and computer program product to capture expert knowledge and data using probabilistic models. A custom layered structure and nodes reduce the complexity of the model, allowing for representation of the model using tables. An editor is used for entry and verification of expert knowledge and data into tables and a probabilistic model is generated from the tables.

This invention relates to the field of decision systems, and in particular, a method for developing probabilistic models, such as Bayesian networks.
Decision systems are generally used to capture expert knowledge and/or data, assisting a user of a decision system to make decisions based on the captured expertise. For example, manufacturers of automobiles, trucks, military vehicles, locomotives, aircrafts and satellites use decision systems to express diagnostic procedures. Decision systems can also be used for medical diagnosis, intelligence data analysis, web applications such as collaborative filtering and data retrieval, and for military applications such as battlefield management and enemy command structure identification and disruption.
One way to represent and/or implement decision systems is through probabilistic models, such as Bayesian networks. Bayesian networks are graphs consisting of nodes which are connected by directed arcs and are parametrized using probabilities. However, Bayesian networks do not contain closed loops or "cycles."
The nodes of a decision Bayesian network represent observations and conclusions while the directed arcs express causal dependencies between the conclusions (e.g., failure diagnoses) and observations (e.g., tests). Bayesian networks can be used to generate decision procedures by means of an inference algorithm. Particularly, an inference algorithm can recommend a sequence of observations and, finally, a conclusion. For each step along the way, the inference algorithm can provide a ranked list of next observations based on prior observation results. The user is expected to choose the top ranking observation recommendation, but is not limited to it. A lower ranked recommendation can be selected if the user cannot or does not want to follow the top recommendation.
To provide a simple illustration, a decision system could aid an automobile mechanic with diagnosing technical problems of an automobile. For example, confronted with an automobile that fails to start, the systems could suggest to begin troubleshooting by checking the battery. Traditional decision systems using inflexible data structures (such as decision trees) often require users to adhere to a fixed sequence of suggested tests with little room for skipping tests or alternating their order. However, when using probabilistic networks, a system can support several courses of action. For example, the automobile diagnosis decision system could, in addition to suggesting checking the battery, include lower ranked observations, e.g., checking the starter, the ignition, or the fuel supply. For example, the mechanic might know that the battery tester is being used at the moment and prefer to check the spark plugs first. Depending on the outcome of this test, the system could then recommend the next best test.
Probabilistic models do not only offer increased flexibility but are also easier to modify and some classes of probabilistic models only grow linearly in size with the amount of tests contained in a decision system. Moreover, capturing expertise using a probabilistic model can be made significantly less complicated than when using inflexible data structures, such as decision trees, especially when the domain of expertise is complex and the amount of observations and conclusions is high (such as over 1000). Often, an expert must be assisted by a knowledge engineer to capture her knowledge using a probabilistic model. As a result, many experts still prefer using inflexible data structures, such as decision trees, to capture their knowledge and/or data.
Therefore, there is a need for a more efficient, less complicated method for developing probabilistic models capturing complex domains of knowledge and/or data.

Method for developing complex probabilistic models


An electromagnetically-shielded high-Q inductor may be fabricated within a multi-layer package substrate (MLS). The inductor is preferably constructed as a loop structure on a layer of the MLS, and a shielding structure is formed around the inductor to substantially enclose the inductor in a Faraday cage-like enclosure. The shielding structure includes a top plate formed above the inductor on another layer of the MLS, and a bottom plate formed on yet another layer of the MLS or on a layer of an integrated circuit die which is below and attached to the MLS, preferably using solder bumps. Shielding structure sidewalls may be formed by a ring of stacked vias or via channels. The inductor is preferably connected to stacked vias which provide a connection to the underlying integrated circuit die by way of additional solder bumps and cut-outs through the bottom plate of the shielding structure.

1. Field of the Invention
The present invention relates to integrated circuits incorporating shielded circuit structures, and more particularly to such integrated circuits incorporating inductor structures.
2. Description of the Related Art
Many modern integrated circuit devices require extremely stable oscillators to achieve desired specifications. Crystal oscillators may be employed, but typically require an off-chip crystal mounted elsewhere on a printed-wiring-board. LC oscillators offer the potential advantage of being able to incorporate such an oscillator on-chip.
To achieve an oscillator having extremely low-jitter generation, a high-Q LC oscillator is typically required. For example, a Q>30 may be required for certain applications. It is difficult to achieve such a high Q with conventional on-chip spiral inductors using the conductor and dielectric layer compositions and thicknesses which are typically encountered in traditional integrated circuit processes. For example, such on-chip spiral inductors typically achieve a Q no higher than 10–15, which is limited largely by substrate loss due to induced eddy currents in the semiconductor substrate. In addition, such spiral inductors are susceptible to electromagnetic interference from external sources of noise.
Additional improvements in high-Q LC oscillators are desired to achieve extremely stable oscillators, particularly for use as low-jitter clock sources.

Integrated circuit package configuration incorporating shielded circuit element structure


Provided is a group of rare-earth regenerator material particles having an average particle size of 0.01 to 3 mm, wherein the proportion of particles having a ratio of a long diameter to a short diameter of 2 or less is 90% or more by number, and the proportion of particles having a depressed portion having a length of 1/10 to ½ of a circumferential length on a particle surface is 30% or more by number. By forming the depressed portion on the surface of the regenerator material particles, it is possible to increase permeability of an operating medium gas and a contact surface area with the operating medium gas.

In the field of superconducting technology used in a magnetic floating train, a fracture diagnostic apparatus based on nuclear magnetic resonance, or the like, cryogenic technology has been progressed remarkably for various applications including a cryopump used in an ultra-high vacuum apparatus such as a VLSI pattern transfer apparatus. As it has come to the stage of putting the cryogenic technology to practical use, a smaller refrigerator having a higher performance has been progressively developed and realized practically. Especially, there is increasing importance in freezing and cooling techniques for developing an environment having a temperature around the absolute zero temperature (−273° C.) at which the cryopump for creating a high vacuum atmosphere in a superconducting magnet or a semiconductor manufacturing apparatus is operated, and there is a strong demand for a refrigerator exhibiting a high reliability and excellent characteristics.
Conventionally, in a superconducting MRI (nuclear magnetic resonance imaging) apparatus (image measuring apparatus) used for taking tomograms in the medical field, a small refrigerator using helium, such as a Gifford MacMahon type refrigerator (GM refrigerator) has been employed in order to cool and refrigerate the superconducting magnet.
The GM refrigerator is composed of combination of a compressor for compressing He gas, an expansion unit for expanding the compressed He gas, and a regenerator unit (cold accumulating unit) for keeping the He gas cooled in the expansion unit in the cooled state. In the refrigerator, the He gas compressed by the compressor is expanded to be cooled by about 60 cycles per minute, and then, a system to be cooled is cooled through a tip end portion of the expansion unit of the refrigerator.
Alternatively, there have been developed pulse tube refrigerators in recent years. The pulse tube refrigerator is a refrigerator in which high-pressure He gas is provided to the refrigerator in a prescribed period. Since the pulse tube refrigerator has a smaller vibration in comparison with the GM refrigerator, the pulse tube refrigerator has the advantage of suppressing noise generation at measurement in, for example, an MRI apparatus.
In refrigerators used for any purpose, the regenerator unit is filled with a regenerator material (cold accumulating material). As the regenerator material for refrigerator used in an extremely low temperature region around the absolute zero temperature, for example, of 10K or less, further of 4K or less, a rare-earth regenerator material disclosed in Japanese Patent No. 2609747 (Patent Document 1) is technically effective. The technique disclosed in the Patent Document 1 involves adjusting the particle size and the aspect ratio of rare-earth regenerator material particles, and thereby enables high-density filling of the regenerator material particles.
On the other hand, studies for employing multi-staged regenerator units have been made in view of improving performance of the refrigerator. For example, Japanese Patent Laid-Open No. 2001-272126 (Patent Document 2) discloses a two-staged pulse tube refrigerator. By employing multi-staged regenerator units, it is possible to attain a higher cooling velocity (refrigerating speed). It is also possible to attain a larger cooling amount, thereby the refrigerator can be installed in a larger-scaled apparatus. By employing the multi-staged regenerator units, He gas must be supplied in a larger amount at a higher pressure.
The refrigerating performance of a refrigerator depends on amount of He gas having contact with the surface of the regenerator material particles. As the regenerator material particles, particles having a spherical shape have been conventionally used in view of realizing high-density filling, and therefore, it is difficult to fill the particles at a higher density than ever before. Although there is a conceivable measure of filling the space between the regenerator material particles with smaller regenerator material particles, filling particles in an excessively large amount leads to a decrease in permeability of He gas serving as a cooling medium. Another measure of filling the particles under a high pressure is also conceivable; however, filling under an excessively high pressure leads to crushing of the regenerator material particles, which rather causes clogging in a cooling system. Therefore, there is a technical demand for a regenerator material capable of ensuring the high-density filling and attaining a larger contact surface area with the He gas.

Rare-earth regenerator material particles, and group of rare-earth regenerator material particles, refrigerator and measuring apparatus using the same, and method for manufacturing the same


A device for guiding pivoting of variable-pitch vanes in a turbomachine, each vane having a pivot formed by a cylindrical axial shank which is guided in a cylindrical chimney of the casing and in a cylindrical orifice of a stationary element which surrounds the outside of the casing and which is centered and fixed relative thereto. The invention improves pivotal guidance of variable-pitch vanes.

In known guide devices, each vane has one end pivotally mounted on the casing of the turbomachine about a respective axe that is radial relative to the axis of rotation of the rotor, and for this purpose the vanes have respective axial cylindrical shanks forming pivots that are pivotally guided in bearings mounted in radial cylindrical chimneys of the turbomachine casing. These bearings are generally made of bushings of material having a low coefficient of friction, such as sintered bronze, for example.
The axial chimneys of the casing are relatively short in length, such that the vanes, which are subjected to the forces exerted by the flow of gas, tend to tilt obliquely relative to their pivot axes, thereby leading to wear in the guide bushings and in the inside cylindrical surfaces of the chimneys in which the bushings are mounted. This leads to a risk of the vane pivots seizing and to an increase in the force that needs to be applied to the vanes in order to make them pivot about their pivot axes. This also leads to a risk of the radially-inner ends of the vanes coming into contact with the rotor of the turbomachine, and to corresponding risks of damage, destruction, and fire because of the intense heating that arises by the ends of the vanes rubbing against the rotor.

Device for pivotally guiding variable-pitch vanes in a turbomachine


A low dropout voltage regulator (LDO) includes a bias voltage generator, a differential error amplifier, an output driver, a controlled active load, a Double Ended Cascode Miller compensation block. The bias voltage generator produces a plurality of bias voltages. The differential error amplifier produces a differential output voltage based on the difference between a reference voltage and a function of the output voltage. The input terminal of the output driver is coupled to one output of the differential error amplifier. The substrate terminal of the output driver is capacitively coupled to the output node and resistively coupled to the input supply node. The controlled active load is coupled to the output of the output driver, and its control terminal is coupled to a function of the second output of the differential error amplifier. The inputs of the Double Ended Cascode Miller compensation block are capacitively coupled to the output node and its output is coupled to the input terminal of the output driver.

A low dropout regulator (LDO) is a DC linear voltage regulator which can operate with a very small input-output differential voltage. In conventional low dropout voltage regulators i.e. LDOs, it is necessary to couple an off-chip capacitor at the output of the LDO which generates a low frequency dominant pole at the regulated output node in order to obtain stability. The low frequency dominant pole at the output node provides stability while maintaining a good transient response, however the off-chip capacitor increases bill of material and consumes significant board area.
Current trends in technology demand miniaturization of electronic devices and thus the off-chip capacitor in a conventional LDO needs to be eliminated. The dominant pole may still be implemented on the regulated output node by replacing the off-chip capacitor by an on-chip one, however such a dominant pole varies widely with the load current due to small value of on-chip capacitance available thus rendering it ineffective for certain loads. Alternatively, when the dominant pole is realized on an internal node the slew rate is degraded resulting in a slower transient response.
FIG. 1 illustrates the ripple response of a conventional LDO for a load that generates a train of spike currents such as a clock tree network. FIG. 1(a) shows the block diagram of the conventional LDO while FIG. 1(b) shows the train of spike currents and corresponding ripple in the output voltage at each clock edge. The maximum peak current (IP) occurs at the rising edge of the clock when inverters at the final stage of the clock tree charge their load capacitances. On the falling edge of the clock, the peak current drawn from the supply is reduced by a value equivalent to the stage ratio in the clock tree (IP/N). This is due to the reduction of the number of clock tree inverters charging their load capacitances on this edge of the clock by a value equivalent to the stage ratio.
FIG. 2 illustrates a conventional technique to evaluate the transient response of the low dropout voltage regulator (LDO) for a step change in the load current. The response time (TR) is defined as the minimum time required by the LDO to attain a required output current after the application of the load. Simulation of LDO's response with load transient stimuli both in the form of a train of current spikes and step change in the load current enables the evaluation of the total transient variation on the regulated output voltage of LDO. The ripple response of LDO with a train of spike current is crucial to estimate jitter in the clock when the clock tree is optimized for minimum clock skew. On the other hand, a step change, which occurs when the clock signal suddenly starts (or stops) to propagate down the clock tree, alters the average consumption from low (or high) to a high (or low) value during the propagation delay period in the clock tree.

Fully integrated on-chip low dropout voltage regulator


A combination-type refrigerating cabinet includes a cabinet body, a refrigeration-cycle unit and a pipe system. The cabinet body internally defines at least one cold accumulation chamber and a refrigerated cabinet internally having at least one refrigeration chamber, and at least one first air passage is provided between the cold accumulation chamber and the refrigerated cabinet. The cold accumulation chamber is internally provided with at least one cold accumulator, and the cold accumulator includes a case filled with a liquid cold accumulating material. The refrigeration-cycle unit separately supplies cold energy to the cold accumulation chamber and the refrigerated cabinet. The pipe system is provided between the cabinet body and the refrigeration-cycle unit, and includes a cold accumulation chamber pipeline communicating the refrigeration-cycle unit with the cold accumulation chamber and a refrigerated cabinet pipeline communicating the refrigeration-cycle unit with the refrigerated cabinet.

A conventional refrigerating cabinet or freezing cabinet obtains required cold energy from a refrigeration-cycle device, so as to cool or freeze foods or vegetables and fruits stored or displayed therein. The refrigeration-cycle device for the refrigerating cabinet or freezing cabinet includes a compressor, a condenser, an expansion valve and an evaporator, through which a coolant sequentially passes to circulate in the refrigeration-cycle device. The condenser releases heat energy while the evaporator produces cold energy, and the produced cold energy is supplied to the refrigerating cabinet or freezing cabinet for keeping an interior thereof at required low temperatures. The conventional refrigerating cabinet or freezing cabinet obtains the cold energy completely from the evaporator, and the cold energy is delivered to the interior of the refrigerating cabinet or freezing cabinet via air passages provided inside the refrigerating cabinet or freezing cabinet.
The conventional refrigerating cabinet or freezing cabinet may be a refrigerator or a refrigerated showcase. The refrigerated showcase may be an open refrigerated showcase or a closed refrigerated showcase, and the latter is openably closed by, for example, glass doors. The refrigerated showcases have been widely used in supermarkets and hypermarkets to hold and display foods to be sold. The refrigerated showcases not only function to keep the foods displayed therein in a fresh and hydrated state, but also effectively display the foods to be sold in an eye-catching manner to attract more consumers to buy them.


The Evidentiary Imaging System (EIS) provides secure storage or transmission of a digital image into which is encoded the date, time, and location at which the image was taken, along with the camera ID and frame number. The encoding is dispersed throughout the image so that the image cannot be modified without distorting the encoding. The image may be encrypted for additional security. Annotation can be superimposed on the encoded or encoded and encrypted image to classify or identify the image to human or automated scanning systems. The annotation can also be used to key the decoding and decryption tasks. The EIS produces imagery which may be authenticated as to originality, time and location of imaging. The imagery may be stored, duplicated, and transmitted while retaining its authenticity. However, any modifications to the image, including any local changes, are readily detected because the encoding will not decode correctly.

1. Field of the Invention
The present invention generally relates to techniques for authenticating digital images, and in particular to techniques for encoding authentication information and distributing that information throughout the image.
2. Background Description
Digital cameras offer high-resolution immediate imagery which can be processed and transmitted electronically without the need for scanning and digitizing a hard copy photograph. The digital nature of the resulting imagery, however, makes it more vulnerable to undetected manipulation in whole or in part. Where the imagery has evidentiary use, it is essential to incorporate a technique by which to determine that an image has not been altered.
Since it is often essential to know the precise date, time, and location where the image was taken, what imaging device was used, and who took the image, the apparatus and method of the present invention use an encoding of that information distributed throughout the image as a secure means of providing that information as well as a certificate of originality.
The method and apparatus of the present invention does not require the use of flash correlation. However, that technique provides a computationally simple and therefore rapid capability for decoding the two-dimensional encodings of data which provide authentication. Furthermore, flash correlation is fast enough to exhaustively consider all possibilities when certain encoded information is unknown, such as the ID of the specific camera used, the ID of the user, or the frame number or exact time of day a given image was taken. Alternately, steganography can be used.
Presence of a flash correlation artifact (FCA) between a Resultant Image and an encrypted representation of the Encoded Data Array is sufficient to identify its date/time, location, and source. Each of those values can be separately identified, or all can be simultaneously verified. Presence of an FCA between a Resultant Image and an Encrypted version of the Original Image indicates that the Resultant Image is authentic, It is not necessary to decrypt the Resultant Image or to perform pixel by pixel comparison in order to authenticate the image. Authentication of an image can be performed in one operation, regardless of the complexity of the image.
Confirmation of the camera ID, the date/time, and the location can be separately made, with or without being cued by annotation on the image.
Multi-colored or multi-grey level images can be similarly authenticated. Their complement is created by inversion of the grey scale or color chart. Alternately, colored images can be broken into components and represented by three layers of grey scale values, each of which is separately encoded and encrypted.

Digital imaging system for evidentiary use


Methods and systems for inspection of a wafer or setting up an inspection process are provided. One method for inspection of a wafer includes detecting first and second sets of defects on the wafer by performing different scans of the wafer with different focus offsets. The method also includes comparing results of the different scans for a defect of the first set and a defect of the second set that are detected at approximately the same location on the wafer. The method further includes determining if the defect of the first and second sets is a defect of an underlying layer or an uppermost layer formed on the wafer based on results of the comparing step.

1. Field of the Invention
This invention generally relates to methods and systems for inspection of a wafer or setting up an inspection process. Certain embodiments relate to detecting defects on a wafer at different focus offsets and determining if the defects are defects of an underlying layer or an uppermost layer formed on the wafer.
2. Description of the Related Art
The following description and examples are not admitted to be prior art by virtue of their inclusion in this section.
Inspection processes are used at various steps during a semiconductor manufacturing process to detect defects on wafers to promote higher yield in the manufacturing process and thus higher profits. Inspection has always been an important part of fabricating semiconductor devices such as integrated circuits. However, as the dimensions of semiconductor devices decrease, inspection becomes even more important to the successful manufacture of acceptable semiconductor devices because smaller defects can cause the device to fail. For instance, as the dimensions of semiconductor devices decrease, detection of defects of decreasing size has become necessary since even relatively small defects may cause unwanted aberrations in the semiconductor devices.
Inspection tools can be categorized generally according to their optical configuration. For instance, some inspection tools are configured to perform inspection using a brightfield configuration, and other inspection tools are configured to perform inspection using a darkfield configuration. In general, a brightfield configuration is used to detect light reflected specularly from a wafer. In contrast, a darkfield configuration is used to detect light scattered from a wafer. Therefore, depending on the characteristics of the wafer and the characteristics of the defects of interest, one configuration may be more suitable for inspection of the wafer than another.
The different configurations also have different constraints on their usefulness based on their performance characteristics such as sensitivity, resolution, throughput, number of nuisance defects detected, and the like. One such constraint on the usefulness of brightfield tools is the detection of defects of underlying layers on a wafer, which can dominate the inspection results and make analysis of the inspection results difficult. For instance, different inspections are typically performed on different levels of the wafer to understand the defects that occur at various process steps. Due to the transparency of the materials that are processed in some process steps, process variations and other defects at previous process levels may be detected during inspection of these materials. The detection of these process variations at previous process levels can overwhelm the resulting defect population and make separation of the current layer defect signals from the overall signals difficult. These problems have been a constant challenge to brightfield inspection.
Many different approaches have been tried to separate prior level events from current level events. Events can be generally defined as abnormalities on a wafer that may be defects. The terms "events" and "defects" are used interchangeably herein. One such approach involves inspecting the wafer after each level is formed and performing defect source analysis (DSA) of the results of both inspections. DSA generally includes analyzing inspected features and locations of defects on the same wafer at different points in time, or in the manufacturing process. Further description of DSA can be found in U.S. Pat. No. 5,991,699 to Kulkarni et al., which is incorporated by reference as if fully set forth herein. With this approach, inspection is performed at two different levels of the wafer such that the events that are common to the two processing steps (i.e., defects detected by both inspections) can be filtered out of the results for the current level.
However, the above-described method does have some drawbacks. For instance, DSA requires lot holding and inspection at prior levels that may not be critical layers in of themselves thereby resulting in lower productivity. In addition, coordinate inaccuracy between the two inspections may result in poor DSA results, lower prior level noise suppression, and/or missing current level defects. DSA also cannot be performed unless inspection results from the prior level are available.
Another approach involves using nuisance filtering algorithms to filter defects of previous levels from results of the inspection of a current level. This approach also has inherent drawbacks. For instance, the algorithms can only be used if there are distinguishable attribute differences between events of the previous level and events of the current level. Therefore, the application of this approach may be relatively limited.
Accordingly, it would be advantageous to develop methods and systems for inspection of a wafer that can be used to discriminate between defects of an underlying layer and defects of an uppermost layer formed on a wafer, that do not use results of previous inspection of the underlying layer thereby improving productivity, that are relatively insensitive to coordinate inaccuracy, and that can be used to distinguish between defects on different layers that may or may not have different attributes.


On a data recording medium which is divided into sectors and can be accessed on the sector unit basis, when encoded data is divided every predetermined length, a header is added, the data is packetized, a header is further added to the packet to thereby form the pack data, and the resultant data is recorded, if the stuffing is necessary, the stuffing data is inserted to the last of a data area of the packet. Thus, a length of pack header can be fixed. There is no need to provide a padding packet. A situation such that a PES header is encrypted is prevented and no problem occurs when encryption is performed.

In recent years, development of an optical disc as a recording medium of a large capacity has been progressed. For example, a CD (Compact Disc) on which music information has been recorded, a CD-ROM in which data for a computer is recorded, a DVD (Digital Versatile Disc or Digital Video Disc) which handles video information, and the like are known.
The optical discs mentioned here are read only discs. In recent years, an optical disc on which data can be additionally written once or data can be rewritten like a CD-R (CD-Recordable) disc, a CD-RW (CD-Rewritable) disc, or the like has been put into practical use. Further, development of various optical discs such as double density CD whose recording capacity is increased while keeping a shape similar to that of a CD, CD2 in which an affinity of both of an ordinary CD player and a personal computer can be enhanced, and the like has been progressed.
The optical disc of CD2 has an area on the inner rim side and an area on the outer rim side. In the area on the inner rim side, for example, audio data has been recorded in a format similar to that of an ordinary CD-DA (CD digital Audio) so that it can be also reproduced by the ordinary CD player. In the area on the outer rim side, in order to realize an affinity with the personal computer, contents data is filed and recorded on the basis of the specification of the CD-ROM.
A method of recording contents data of a multimedia comprising the audio data and image data onto such an optical disc of CD2 in accordance with the specification of MPEG2-PS is considered. As a compression system of the audio data, for example, use of ATRAC3 is considered.
As a compression system of the audio data, there are known: a subband system in which the inputted audio data in the time base direction is divided into a plurality of bands by a band dividing filter and compression encoded; a transform encoding system in which the inputted audio data in the time base direction is transformed into data in the frequency base direction by an orthogonal function such as a DCT or the like and compression encoded; and a hybrid system in which both of those systems are combined. ATRAC3 is an audio compression system which belongs to the hybrid system. In ATRAC3, the audio data cut out by a predetermined time window is band divided and MDCT transformed, so that the compression encoding is executed.
When a sampling frequency of the audio data is assumed to be, for instance, 44.1 kHz and a time window is assumed to be, for instance, 11.6 msec, the audio data of 512 samples is cut out by such a time window. Assuming that one sample consists of 16 bits, the encoding is executed every 2048 bytes. In ATRAC3, since adaptive bit allocation is performed, it is possible to arbitrarily cope with a bit rate. When a transmission bit rate is equal to 66 kbps, one encode unit is compressed to 192 bytes. When the transmission bit rate is equal to 105 kbps, one encode unit is compressed to 304 bytes. When the transmission bit rate is equal to 132 kbps, one encode unit is compressed to 384 bytes.
In CD-ROM Mode-1, a subcode block consisting of 98 frames is set to a sector and data is recorded on a sector unit basis. A size of one sector is equal to 2352 bytes and a data recording capacity among them is equal to 2048 bytes. In the case of recording the stream of MPEG2-PS, a PES header of a packet layer is added to the data and, further, a pack header is added to a pack layer.
In the specification of MPEG2-PS, stuffing can be performed to the pack header. A padding packet can be inserted. That is, when an edit is performed or the like, there is a case where the recording data is dropped. There is also a case where an amount of data which is stored into one packet differs in accordance with circumstances of encoding. In such a case, to make a data length constant, the stuffing is inserted into the pack header or the padding packet is inserted.
However, if the stuffing bytes of the pack header are used, a length of header is not constant and a problem such that the start position of the packet data and the information of the PES packet cannot be easily detected.
That is, as shown in FIG. 35A, if no stuffing is inserted to the pack header, although a length in a range from the head of one pack to the head of the data of the packet is equal to LA1, when the stuffing is performed to the pack header, the length in the range from the head of one pack to the head of the data of the packet is equal to LA2. As mentioned above, if the stuffing is performed to the pack header, since the length in the range from the head of one pack to the head of the data of the packet changes, it is difficult to detect the head of the data of the packet on the basis of the length in the range from the head of one pack to the head of the data of the packet.
For example, a scrambling control flag has been described in the PES header. If the data has been encrypted in order to protect the contents, first, it is necessary to detect the scrambling control flag.
If the pack header is set to a fixed length, the scrambling control flag is certainly located at a position that is away from the head of one pack by a desired number. Therefore, the scrambling control flag can be immediately obtained by extracting the information at the position that is away from the head of one pack by a desired length.
However, as shown in FIG. 36A, if a mode to perform the stuffing to the pack header is set, although a length in a range from the head of one pack to the scrambling control flag is equal to LB1 when no stuffing is performed, by performing the stuffing to the pack header, as shown in FIG. 36B, the length in the range from the head of one pack to the scrambling control flag is equal to LB2. As mentioned above, if the mode to perform the stuffing to the pack header is set, since the length in the range from the head of one pack to the scrambling control flag changes, it is difficult to detect the scrambling control flag on the basis of the length from the head of one pack.
As mentioned above, the stuffing of the pack header causes a problem such that the header is set to a variable length and it is impossible to detect the start position of the packet data or the information of the PES packet on the basis of the length from the pack header.
As shown in FIG. 37, as a PES header, it is necessary to provide a packet start code of 32 bits and a packet length of 16 bits for the padding packet. Therefore, the padding packet has a data length of at least 6 bytes. In the padding packet, the padding or stuffing of the number of bits smaller than 6 bytes cannot be performed.
As shown in FIG. 37, only the packet start code and the packet length are described in the PES header of the padding packet, and various information such as a scrambling control flag and the like cannot be described. Therefore, the scrambling control depends on the previous PES packet.
Therefore, as shown in FIG. 38, if the previous packet has been encrypted, according to the padding packet, it is encrypted together with the PES header. However, if the PES header of the padding packet is encrypted, there is a possibility such that the start position and length of the padding packet are unclear and the correct decoding cannot be performed.
It is, therefore, an object of the invention to provide a data recording medium, data recording method and apparatus, and data transmitting method and apparatus, in which a length of header can be fixed and the head of the data and the position of the scrambling control flag can be easily detected.
Another object of the invention is to provide a data recording medium, data recording method and apparatus, and data transmitting method and apparatus, in which stuffing and padding of a small number of bits can be performed and no trouble of encryption occurs.

Data record medium, data recording method and apparatus, and data transmitting method and apparatus


This invention relates to purified sialic acid permease systems, and inhibitory agents of sialic acid permease systems.

Haemophilus influenzae is exclusively adapted to infect or colonize humans. Strains can be encapsulated or non-encapsulated (non-typeable). Non-typeable Haemophilus influenzae (NTHi) is a frequent colonizer of the nasopharynx and is an opportunistic pathogen. When the airway is compromised, NTHi can cause local infections such as otitis media in young children (24 million physician visits per year in the U.S. (Teele et al., (1983) JAMA 249, 1026-1029)) and chronic bronchitis and pneumonia in patients with chronic obstructive pulmonary disease. A major component of the outer membrane of H. influenzae, the lipooligosaccharides, plays an important role in microbial virulence and pathogenicity. N-Acetylneuraminic acid can be incorporated into the lipooligosaccharides as a terminal non-reducing sugar. Although much of the pathway of sialic acid incorporation into lipooligosaccharides is understood, the transporter responsible for N-acetylneuraminic acid uptake in H. influenzae has yet to be identified and characterized.


A noise reduction device for generating a delay frame by delaying an input frame in each frame, a first difference value between the delay frame and the input frame, a line delay frame by delaying the input frame in each line, and a second line delay frame by delaying the delay frame in each line. The device generates a second difference value between the input frame and the line delay frame, a third difference value between the delay frame and the second line delay frame, a fourth difference value between the line delay frame and the second line delay frame. The device corrects the input frame by using the first difference value based on a logical sum (or product) of the third difference value and the fourth difference value, and the delay frame based on a logical sum (or product) of the second difference value and the fourth difference value.

1. Field of the Invention
The present invention relates to a noise reduction device and a noise reduction method to remove noise generated in, for example, video information.
2. Description of the Related Art
As a noise reduction circuit reducing noise in video information, two techniques in cyclic and non-cyclic are known. Noise reduction effect of the cyclic noise reduction circuit is larger than that of the non-cyclic noise reduction circuit, and therefore, it is widely used in a video processing device such as a conventional TV (for example, JP-U61-140684(Japanese Utility Model Publication).
The cyclic noise reduction circuit reduces the noise by integrating the video information in a time axis direction. Accordingly, so-called a tailing phenomenon of video occurs on a moving video when the cyclic noise reduction circuit is used. A method, in which a motion detecting circuit is added, integration effect is decreased for a portion with a large motion among the video, and thereby, the tailing phenomenon of video is reduced, is therefore proposed. However, it is difficult to obtain enough noise reduction effect while suppressing the tailing phenomenon because there is an error in the motion detection process. In particular, in case of video information in which the tailing phenomenon is outstanding such as a high vision signal (HD signal) in high resolution, there is a problem in which the video in high resolution is blurred caused by the integration effect of the noise reduction when the noise reduction process is strongly performed.

Noise reduction device for a video signal and noise reduction method for a video signal


A TPM sensor measures the pressure of a tire and determines whether the measured pressure is greater than a predetermined threshold. When the measured pressure is greater than the predetermined threshold, an adjustment to the sensitivity is determined by the sensor. The adjustment to the sensitivity is applied to the sensor to yield an adjusted sensitivity. The TPM sensor is operated to make receptions according to the adjusted sensitivity.

Tire pressure monitoring (TPM) sensors are used in vehicles. These sensors (disposed at the tire) measure the pressure of the tire (and potentially other parameters) and transmit this to a receiver in the vehicle. When the pressure falls below a predetermined threshold, the receiver may warn the driver.
TPM sensors typically need to be triggered. This is often accomplished by a technician using an activation tool. Initiation devices in the vehicle can also be used. Low frequency (LF) commands are typically sent by these devices to the TPM sensor in order to perform the activation.
Some of the vehicle systems in which these TPM sensors are installed require the TPM Sensor be very sensitive to LF receptions. However, the heightened sensitivity may cause problems while the TPM sensor is being shipped or sitting on a shelf. If the TPM sensor is too sensitive, then it may be inadvertently activated by a LF trigger that was not intended for that sensor. This would lead to a decrease in battery life among other problems.
Because of these problems, some user dissatisfaction has developed with respect to previous approaches.
Skilled artisans will appreciate that elements in the figures are illustrated for simplicity and clarity. It will further be appreciated that certain actions and/or steps may be described or depicted in a particular order of occurrence while those skilled in the art will understand that such specificity with respect to sequence is not actually required. It will also be understood that the terms and expressions used herein have the ordinary meaning as is accorded to such terms and expressions with respect to their corresponding respective areas of inquiry and study except where specific meanings have otherwise been set forth herein.

Apparatus and method to adjust LF sensitivity of TPM sensor


A display apparatus is provided. The display apparatus includes a display which is curved such that opposite lateral ends thereof protrude forward relative to a central portion thereof. A support frame having a lower end supported on a horizontal surface and allowing the display to be disposed inside thereof is provided; wherein the support frame is curved such that opposite lateral ends thereof protrude forward relative to the central portion thereof.

1. Technical Field
Apparatuses of the exemplary embodiments relate to a curved display apparatus having a display with both lateral ends protruding forward.
2. Description of the Related Art
A display apparatus is a device that generally receives image signals and displays images. Examples of the display apparatus may include a television and a monitor.
Recently, a display apparatus having a display formed in a curved shape with both lateral ends protruding forward, relative to the central portion of the display, to make two-dimensional images look three-dimensional, to some extent, has been proposed.


An object of the invention is to provide a battery control apparatus capable of accurately obtaining permissible charging or discharging power in keeping with variation of the internal resistance of a battery. The battery control apparatus of this invention includes an internal resistance table in which the internal resistance value of single cells corresponding to the temperature and state of charge thereof are described in association with each of charging or discharging duration time of the single cells. The battery control apparatus calculates a permissible charging current or a permissible discharging current by using the internal resistance value described in the internal resistance table and controls the charging or discharging of the single cells in accordance with the current value thus obtained.

Electrically powered vehicles are mounted with storage batteries such as lead-acid batteries, nickel metal hydride batteries, and lithium-ion batteries. The power needed by hybrid vehicles or electric cars for traveling is provided by these batteries.
A storage battery mounted on the vehicle is used in a wide temperature range and has maximum permissible power commensurate with the temperature of the storage battery. If the storage battery is charged or discharged in excess of the maximum permissible power, it could be overcharged or overdischarged.
A storage battery generally has small maximum permissible power at a low temperature and large maximum permissible power at a high temperature. In spite of the large maximum permissible power at the high temperature, the use of the storage battery in the high-temperature state promotes its deterioration. Meanwhile, as the state of charge (SOC) of a storage battery becomes higher, its maximum permissible charging power becomes smaller, and its maximum permissible discharging power becomes larger; as the SOC of the storage battery becomes lower, its maximum permissible discharging power becomes lower, and its maximum permissible charging power becomes larger. To use the storage battery safely requires performing its charging and discharging control within a range of its maximum permissible power.
Patent Literature 1 cited below discloses a technique of calculating the permissible discharging power suitable for each single cell in order to perform optimum charging and discharging control even when the single cells making up a battery pack are subject to temperature variation.

Battery control device and battery system


An integrated circuit includes an output circuit having a first terminal adapted to couple to an external power supply, a second terminal adapted to couple to a reference potential, and a third, control terminal. The first and second terminals of the output circuit provide output terminals of the integrated circuit. The integrated circuit further includes an impedance measurement circuit responsive to the external power supply to generate a control signal for coupling to the control terminal of the output circuit. The control signal controls a current level associated with the output circuit. A corresponding method is also described.

Electronic circuit design relies heavily on the use of integrated circuits (ICs), circuits in which all components, passive and active, are integrated on a single semiconductor substrate. Integrated circuit performance is affected not only by internal factors, such as tolerances associated with semiconductor fabrication techniques, but is likewise influenced by external factors, such as the impedance associated with external circuits and connections. For example, the impedance, sometimes referred to as "contact resistance", associated with a connection of the integrated circuit to an external device, such as a power supply of Automatic Test Equipment (ATE), can significantly affect the integrated circuit performance. Elevated contact resistance can indicate a complete failure of a particular integrated circuit connection (i.e., a broken lead wire or solder connection) and even less significantly elevated contact resistance can degrade integrated circuit performance. For example, some integrated circuit functions require a minimum supply voltage and a high contact resistance can result in an insufficient supply voltage level at the integrated circuit for certain circuit functionality.
One technique for measuring external impedance in a test environment is a manual process whereby a supply voltage coupled to the integrated circuit is set at a first level while the current and voltage at a particular IC connection is measured, such as with a Kelvin connection. The supply voltage is thereafter set to a second level while the current and voltage at the same connection is measured and the ratio of the difference between the voltages and currents measured at the two supply voltage levels is computed to provide an indication of the contact resistance. However, this technique for measuring external impedance tends to be slow and labor intensive and therefore costly to the overall IC manufacturing process.

Integrated circuit and associated methods for measurement of an external impedance


The present disclosure provides a multi-stage compressor and an air conditioner having the same. The multi-stage compressor includes: a first-stage cylinder including a first-stage compression cavity and a first vane disposed in the first-stage compression cavity; a second-stage cylinder including a second-stage compression cavity and a second vane disposed in the second-stage compression cavity, wherein a refrigerant flowing out from the first-stage compression cavity enters the second-stage compression cavity; a linkage structure disposed between the first vane and the second vane, so that the second vane is capable of moving with a movement of the first vane and maintain contact with a roller in the second-stage compression cavity.

In a conventional two-stage rotary rotor compressor, generally one of the cylinders is a low-pressure-stage cylinder, and the other cylinder is a high-pressure-stage cylinder. An intermediate cavity is provided between the high-pressure-stage cylinder and the low-pressure-stage cylinder. A refrigerant is drawn from a suction port of an accumulator into the low-pressure-stage cylinder, and then discharged to the intermediate cavity after a first-stage compression. An enthalpy-increasing gas that has been throttled is introduced into the intermediate cavity through an enthalpy-increasing component of the refrigerating system, and is mixed with the gas discharged from the first-stage compression. The mixed gas is drawn from the intermediate cavity into the high-pressure-stage cylinder to have a second-stage compression.
Backsides of vanes in the high-pressure cavity and the low-pressure cavity of the two-stage rotary rotor compressor are both subjected to high pressures. A contact stress between the vane and a roller is mainly determined by a pressure difference between the backside of the vane and a head surface of the vane. The two-stage compressor performs two compressions. Compared with the ordinary single-stage compressor under the same condition, especially under a light load condition (e.g. when the pressure difference between suction and exhausting is small), the two-stage compressor has an intermediate gas compensation, so that the pressure difference between suction and exhausting is shared by the two cylinders, and the pressure difference between the low-pressure-stage and the high-pressure-stage is further reduced. In the low-pressure-stage, the suction is under a suction pressure, and the pressure at the backside of the vane is the exhausting pressure. The pressure difference between the backside and the head surface RB of the low-pressure-stage vane is relatively large. The contact stress between the low-pressure-stage vane and the roller is higher than that in the ordinary compressor. In the high-pressure-stage, the suction is under an intermediate pressure, and the pressure at the backside of the vane is the exhausting pressure. The pressure at the head surface of the vane is larger than that in the ordinary compressor. In the two-stage compressor, the pressure difference between the backside and the head surface of the high-pressure-stage vane is relatively small. The contact stress between the high-pressure-stage vane and the roller is much lower than that in the ordinary compressor.
The pressure difference is gradually established after the compressor is started. During a starting and a stable operation under the condition of the small pressure difference of the two-stage compressor, the high-pressure-stage vane is prone to have an insufficient contact stress to the roller, and detached from the roller. As such, the vane may strike the roller during working, which may cause an abnormal noise during the starting and the operation of the compressor. Besides, the impact between the high-pressure-stage vane and the roller may cause an abnormal trace on an outer cylinder of the roller and the head surface of the vane, which may seriously affect a long-term reliability of the compressor, which is a key and difficult problem that those skilled in the art need to solve promptly.

Multi-stage compressor and air conditioner having a linkage between the vanes of the different stages

GREEN REFRIGERATION EQUIPMENT ENGINEERING RESEARCH CENTER OF ZHUHAI GREE CO., LTD.


In a glow-discharge plasma treatment, a substrate is disposed between two opposing electrodes, at least one electrode being covered by a solid dielectric at an opposing surface. An electric field is imposed between the electrodes in an atmospheric pressure. The electric field is pulse modulated such that an onset time, prefeably an offset time as well, of a pulse is less than 100 .mu.s, and field intensity is 1 to 100 kV/cm. Thus, a stable and evenly dispersed discharge-plasma is obtained, which can treat an outer to surface of the substrate.

The invention relates to treatment methods of glow-discharge plasma near the atmospheric pressure and apparatus thereof.
Surface modification or treatment by applying glow-discharge plasma under a low pressure is known and has been practiced. However, the treatment under a low pressure is not advantageous for commercial application and has to be limited to the treatment of highly priced parts, such as electronic devices. More advantageous treatment methods which involve in discharging plasma near the atmospheric pressure have been proposed. For example, U.S. Pat. No. 5,126,164 discloses methods to treat in the atmosphere of helium gas, and U.S. Pat. No. 5,124,173 discloses methods to treat in the atmosphere of argon plus acetone and/or helium.
These methods are restrictive due to the fact that they require to generate plasma in an atmosphere containing helium or acetone as the essential component. The process will be commercially disadvantageous because of the high price of helium. Acetone can primarily be used in a hydrophilic treatment, because it would react with the surface being treated and give a hydrophilic finish.
U.S. Pat. No. 5,529,631 discloses an art of continuous web treatment under the atmospheric pressure in which air in the treating chamber is replaced by a desirable gas, such as helium, which is then continually supplied during the operation and the web is treated in this loosely sealed treating chamber where the discharge-plasma is provided. However, when the line speed exceeds 3 m/min in this process, air is engulfed into the chamber and disturbs the electric discharge to make it difficult to obtain the expected result.
It is an object of the invention to provide a stable method and an apparatus for surface treatment by electric discharge-plasma that is generated near or around the atmospheric pressure.
It is another object of the invention to provide an effective method of plasma treatment for a wide range of gas atmosphere.
It is a further object of the invention to provide a method and an apparatus of a glow-discharge plasma treatment for a continuously running web at a fast speed near the atmospheric pressure.

Treatment method in glow-discharge plasma and apparatus thereof


A powered device includes a first supply terminal, a second supply terminal, and at least one input pin coupled to the first supply terminal. The powered device further includes an external capacitor having a first terminal coupled to the first supply terminal, a switch coupled to the second supply terminal and coupled to a second terminal of the external capacitor, and power surge detection logic coupled to the switch. The external capacitor is charged in response to a detected power surge that exceeds a threshold.

In general, power over Ethernet (PoE)-refers to a technique that is outlined in the IEEE Std 802.3™-2005 clause 33 (the PoE standard) for delivering power via Ethernet cabling to a powered device, which is an electronic device adapted to derive power from the Ethernet cabling. PoE eliminates the need for a separate power source for powered devices. Powered devices may include voice over Internet protocol (VoIP) telephones, wireless routers, security devices, field devices to monitor process control parameters, data processors, and the like.
In general, power sourcing equipment delivers power to one or more powered devices via a twisted pair network cable, such as an Ethernet cable. The PoE standard specifies that the power sourcing equipment should provide a power supply voltage having a range of 36 to 57 volts direct current (DC) and having a current that is limited to less than 400 mA. The use of extended cable lengths and transformers in some applications may induce transient voltage and current surges far in excess of 57 volts and 400 mA.
Conventionally, to manage such transients and other power events, many powered devices include a high voltage transient suppressor, which may protect circuitry of the powered device from high voltages by clamping the input voltage at or below a breakdown voltage threshold during a power surge event. A typical high voltage transient suppressor may be a high voltage zener diode, such as the SMAJ58A surface mount diode, which is commercially available from a wide variety of circuit component manufacturers. The high voltage zener diode is typically connected in parallel with a diode bridge between the positive and negative voltage supply terminals to clamp transient voltages in excess of a threshold to protect associated circuitry. For example, a typical zener diode is a 58-volt zener diode, which is designed to breakdown and conduct current at voltages in excess of 58 volts.
The PoE standard specifies that powered devices are required to survive transient events up to a 1000 volt power surge and to a transient current of 5 A. A transient surge with a duration of 300 nanoseconds to 50 microseconds dissipates considerably more energy than typical zener diodes are rated to withstand. If the high voltage transient suppressor is a diode stack including a plurality of zener diodes arranged in series, the duration of the transient power surge may cause the zener diodes to undergo self-heating. Additionally, typical zener diodes exhibit significant voltage overshoot during high-current events. This overshoot may damage other circuit elements of the powered device.
Therefore, there is a need for improved transient protection in powered devices.

System and method of surge protection in a powered device