A hydraulic brake system for a vehicle includes a brake having a wheel cylinder that applies a braking force to a wheel, and a pressurizing device. The pressurizing device pressurizes the brake liquid and includes a suction portion for sucking a brake liquid, and additionally includes an output portion connected to the wheel cylinder. A linear solenoid valve includes at least one housing, and is connected to the wheel cylinder and to the suction portion of the pressurizing device. The solenoid valve includes a valve portion having a reciprocating valve member and a valve seat opposed to the valve member. A biasing member biases the valve member in one direction and a solenoid applies a drive force to the valve member in an opposite direction. In addition, a hydraulic-pressure-decrease restraining device restrains a decrease of pressure of the brake liquid in the housing.

1. Field of the Invention
The present invention relates to a hydraulic brake system and particularly to such a hydraulic brake system in which a hydraulic pressure in a wheel cylinder is increased and decreased by controlling a linear solenoid valve.
2. Discussion of Related Art
For example, Japanese Patent Application Publication No. 2003-252189 discloses a linear solenoid valve including a housing: a poppet valve provided in the housing; a spring that biases the poppet valve in a direction to close the valve; a solenoid that drives, upon supplying thereto of electric power, the poppet valve in a direction to open the valve. This linear solenoid valve is employed by, e.g., a hydraulic-pressure control device of a hydraulic brake system for use in a vehicle, and is used for controlling a hydraulic pressure in a wheel cylinder. In a hydraulic brake system including a linear solenoid valve, a degree of opening of the linear solenoid valve can be adjusted by controlling an electric power supplied to a solenoid of the valve. Therefore, a hydraulic pressure in a wheel cylinder of the hydraulic brake system can be easily controlled.
However, when the hydraulic pressure of the wheel cylinder is increased and decreased in a state in which the linear solenoid valve is opened, self-excited vibration, i.e., a phenomenon that a valve member of the valve continuously vibrates may occur. The more the amount of brake liquid that passes through the linear solenoid valve is, the more likely the self-excited vibration is to occur. The above-indicated Japanese Patent Application Publication proposes to restrain the occurrence of self-excited vibration by pre-charging, before a braking operation is started, the brake liquid into the wheel cylinder and thereby reducing the amount of brake liquid that passes through the linear solenoid valve.
Meanwhile, the self-excited vibration tends to occur more likely if the hydraulic pressure in the housing of the linear solenoid valve is excessively decreased. In particular, in the case where a pressure-decrease linear solenoid valve is communicated with a suction port of a pump via a liquid passage, a hydraulic pressure in a housing of the linear solenoid valve may be excessively decreased when the pump is operated, which leads to causing the self-excited vibration to occur more likely. In addition, it is speculated that if the air dissolved in the brake liquid in the housing separates from the brake liquid to produce air bubbles, the self-excited vibration occurs still more likely. However, the technique disclosed by the above-indicated Japanese Patent Application Publication cannot restrain the self-excited vibration caused for those reasons.
Thus, the conventional hydraulic brake system can be improved with respect to the art of increasing its utility, e.g., the art of restraining the occurrence of self-excited vibration.


An educational game for teaching arithmetic includes a game board having a travel route divided into segments, at least one arithmetic problem printed within each of at least some of the segments, several individual game tokens, each token for marking a player's location along the travel route, a chance control device for determining the extent of a single movement of each token, and an answer card providing the solution to the at least one arithmetic problem, and is offered at several levels of difficulty. A method of playing this educational game is provided, where several players take turns, one turn including the steps of a player activating the chance control device and advancing a token along the travel path a number of segments as indicated by the chance control device, offering a solution to any arithmetic problem contained within the segment on which the token comes to rest after being so advanced, comparing the solution to the correct solution appearing on the answer card, keeping the token on the segment if the offered solution matches the solution appearing on the answer card, and moving the token backward at least one segment along the travel route if the offered solution fails to match the solution appearing on the answer card.

1. Field of the Invention:
The present invention relates generally to the field of educational games, and more specifically to a game for teaching arithmetic. It includes tokens and a game board having a counterclockwise directed, marginal travel route around four playing sides. The travel route is divided into a series of rectangular spaces serving as stopping points for the tokens, including a beginning space. The game also includes a die, an arithmetic problem, preferably one of multiplication and printed horizontally within each of the majority of spaces with the smaller factor number appearing first, answer cards, and scattered spaces containing instructions rather than a problem, play money and investment cards. Also included is a method of playing the game including the steps of rolling the die, advancing a token along the travel path the number of spaces indicated on the die, offering a solution to any arithmetic problem contained within the space at which the token comes to rest, comparing the offered solution to the correct solution appearing on an answer card, keeping the token on the space if the offered solution matches the answer card solution, and returning to the beginning space if the offered solution does not match the answer card solution. The winner of the game is determined either by which player first completely travels the route around the board or by which player has the most money at that moment. The game is offered at several levels of difficulty.
2. Description of the Prior Art:
There have long been games for entertainment and instruction. Contemporary educational games have origins in various skill and chance games played over the centuries in diverse regions of the world. Games involving chance include card games, which probably originated in Hindustan about A.D. 800, and made their way to Italy by 1279. From Italy these card games spread to Germany, then to France and Spain.
The best known game of skill is probably chess. Some scholars believe chess was invented in India thousands of years ago and later introduced to Persia. The term chess in fact comes from an ancient Persian word for king. The game later appeared in China, and in the A.D. 600's was brought to Europe by the Arabs. The playing pieces were given their present form during the fifteenth century.
Various board games have also evolved in which each player is represented by a single game piece or token, and the pieces race each other across the board to a predetermined destination. According to Board & Table Games, by R. C. Bell, 1969, a great many spiral race board games were invented between 1750 and 1850, some for entertainment only, and others for teaching history, geography and scripture. An example of a spiral race board game is that of Jubilee, which dates from at least 1810. Twelve sections of paper are pasted onto a linen backing, forming a counterclockwise spiral of pictures, numbered from 1 to 150. Six players each have a colored marker which they advance an extent indicated by spinning a teetotum. The players pay fines and receive rewards as they progress through the game. The first player scoring exactly 150, referred to as Jubilee, wins the game. By 1850 an oval race game, appropriately called the Game of the Race, appeared. Players were each provided with a playing piece in the shape of a horse and jockey. Movement across the board was controlled by rolls of a six-sided die. Modern board and race games have been developed to teach academic subjects, examples of which are found in various issued patents.
Kenney, U.S. Pat. No. 3,104,106, issued on Sep. 17, 1963, discloses an educational board game having a travel path divided into stopping spaces. The travel path includes a main outer circuit and a branch path diverging inwardly therefrom for each player. Each player must travel around the outer circuit first, and then travel to the end of his branch path. Most of the stopping spaces are marked with geometric designs indicating a particular type of arithmetic problem to be solved. Other scattered spaces may contain directions. The player receives fractional disc parts from a game bank to manipulate to solve problems. To play the game, a player rolls a pair of dice and advances the number of spaces shown. Then the player draws a problem card matching the geometric design in the space on which he stops, the card having a problem to be solved on its other side. Each player receives points for correctly solving problems, and the player with the most points at the end of the game wins, the game ending when one player completes the circuit and arrives at the end of his branch path. A problem with Kenney is that it teaches dependency on using the fractional discs to solve problems. Another problem is that Kenney is offered for only one level of difficulty, so that only a narrow range of persons can benefit from it. Finally, only one player sees each problem, and only momentarily while a card is drawn, minimizing exposure and increased familiarity with the subject material.
Schoenberg, U.S. Pat. No. 2,320,832, issued on Jun. 1, 1943, discloses at least two different game boards, one being checkered with a diagonal dividing line. Numerals appear in light squares on either side of the line, and these numerals decrease to zero as they approach the line. Each player receives six tokens called men, and spins a dial which comes to rest indicating a number. The player subtracts the indicated dial number from the number in a square on which any of his men rests, and moves such man to any square which bears a number equal to the remainder. The player may move only parallel to an edge of the board. By thus moving men to lower numbered squares, the men advance toward the line. When all of a player's men are positioned in zero value squares adjacent to the line, the game ends. The score for each player is based on the number and location of each of the player's remaining men. A problem with this game is that it is not always clear who is leading, and this diminishes the excitement of the competition. And, once again, a question is only momentarily viewed. Another version of the game is played with cards and no board, and is supposed to teach the multiplication tables. A second game board is similar in design to that commonly used for SCRABBLE.TM., a trademark of the Milton Bradley Company. Blocks with numbers and operation symbols are placed on the SCRABBLE-like board to create interlocking horizontal and vertical equations rather than words. The player receives one point for each correct and complete equation. A problem with this arrangement is that there is no answer key to verify all possible combinations. Another problem is that players lose the excitement of a race around a path in which their relative positions are clearly apparent. Finally, only one level of difficulty is apparently provided.
Denalsky, U.S. Pat. No. 3,831,946, issued on Aug. 27, 1974, teaches an educational board game having a travel path extending from a start box to a finish box. Squares painted colors to contrast with adjacent squares form steps in the path. To play, a die is thrown, the player moves a token the indicated number of spaces, and then draws a card presenting a question and containing a hidden answer. If the player solves the problem correctly he rolls the die again, progressing in this way until a wrong answer is given. When the player gives a wrong answer, the token moves back three spaces and the next player takes a turn. Random free spaces are provided along the path to create rest pauses. The game continues until a player reaches the finish box. A stack of cards is selected having a difficulty level to suit a particular school grade or age group. A problem with Denalsky is that the questions are only momentarily displayed to a single player when a card is drawn, limiting exposure to the subject matter.
Calloway, U.S. Pat. No. 4,714,254, issued on Dec. 22, 1987, teaches a game board containing an outer travel path having player spaces marked with pictorial or printed indicia, an inner travel path made up of spaces indicating subject classes, sets of cards representing tests and lessons, a dial to spin to determine how many spaces along the outer path the player is to advance, and two tokens to move and indicate position. The player spins the dial and moves his first token along the outer path. Some spaces it lands on are instructional, stating that the token is to be moved ahead or back a certain number of spaces, while other spaces will say to take a lesson or a test, and the player draws a card accordingly. If the player misses a question he stays where he is. If he answers all questions on the card correctly, he advances his second token one space along the inner path, indicating mastery of a class. When a player's second token has moved through all inner spaces or classes, he wins and the game is over. Two to eight players can play at once. A problem with Calloway is that, once again, the questions are only momentarily displayed while a card is drawn. Another problem is that the game presents several subject areas at once, which could prove overwhelming and ineffective. Hausman, U.S. Pat. No. 4,029,320, issued on Jun. 14, 1977, discloses an educational game intended for teaching many different subjects. A game board is provided having its surface divided into one hundred rectangular spaces called stations, and a central area for groups of cards. A player rolls dice and advances a token the number of spaces shown on the dice clockwise on the board, and draws a card corresponding to the type of station on which it lands. Some spaces contain instructions instead, such as to advance or fall back several spaces. Some of the cards contain teaching materials, such as an arithmetic problem, and show the solution on the back of the card. A correct answer is required for advancement. Any number of persons can play. The problems presented by Hausman are the same as those identified for Calloway.
Bearing in mind the foregoing, it is a principal object of the present invention to provide an educational game which places numerous arithmetic problems in the constant view of the players to maximize their exposure to and familiarity with arithmetic expressions.
Another object of the present invention is to provide such a game which offers multiple levels of playing difficulty.
A further object of the present invention is to provide such a game for teaching a simplified way of solving a multiplication problem from memory by placing the smaller factor first.
An additional object of the present invention is to provide such a game offering the competition of a race along a path which, at a beginning level, makes readily apparent at any given moment which player leads and by how much.
One more object of the present invention is to provide such a game which is easy to understand and inexpensive to manufacture.


The downhole tool disclosed herein comprises a body, a flexible member attached to the body, and a transducer housed in the body. The flexible member compresses against one side of the wellbore and urges the body against the other side. The transducer emits a signal to the flexible member reflectable from the flexible member back to the transducer. The signal travel time from the transducer to the flexible member and back is analyzed for estimating the distance between the body and the flexible member. The standoff distance can be estimated from the distance between the body and the flexible member. From the standoff distance, the wellbore diameter is estimated. The tool may also obtain wellbore dimensions by obtaining near side wellbore standoff and using a magnetic ruler to determine bowspring flexing. The magnetic ruler results may be used in conjunction with or without the far side standoff data.

1. Field of the Invention
The disclosure herein relates generally to the field of obtaining measurements in a subterranean wellbore. More specifically, the present disclosure relates to an apparatus and method for estimating wellbore dimensions.
2. Description of Related Art
An uncased or open hole wellbore diameter can vary along its length. Many devices used for open hole borehole evaluation require accurate knowledge of the wellbore diameter. Additionally, borehole dimension variations can adversely affect data gathering by these devices unless the variations are detected and taken into account during the investigation process. Some currently known open hole interrogation tools capable of evaluating wellbore diameters employ pivoting mechanical arms that extend from the tool up against the wellbore wall. Measuring the arm extension and its pivot angle can be used to determine wellbore diameter.
Other tools include acoustic transmitters that emit an acoustic signal from the tool against the wellbore wall. The signal travels from the transmitter through the wellbore fluid and back to the tool. The signal is received and its travel time to and from the wellbore wall is measured. The tool standoff (distance between the tool housing and wellbore wall) may be calculated based on the measured travel time. The wellbore diameter can then be determined from measured standoff distances and the tool diameter. The amplitude of the reflected acoustic signal will depend on the acoustic impedance contrast between the wellbore fluid and the rock surrounding the borehole, as well as the surface (or geometrical) properties of the borehole wall. Moreover, the acoustic signal may be attenuated by the fluid in the borehole. If the acoustic impedance contrast is small, the reflected signal will be small and may be hard to detect.

Use of flexible member for borehole diameter measurement


A connector (1000) includes a housing (100), a cover (200), and a plurality of contacts (300). The housing (100) includes a housing front portion (10) having a plurality of first groove portions (20) and a housing rear portion (30) having a plurality of second groove portions (40) and a plurality of third groove portions (50) offset from the first groove portions (20). The cover (200) is configured to be combined with the housing front portion (10) and includes a plurality of fourth groove portions (210) including through holes (211). Each contact (300) includes a pressure connection portion (320) disposed in a corresponding through hole (211) and configured to contact a wire (370) inserted into the cover (200), a first section (310) disposed in the corresponding first groove portion (100, 20A, 20B, 20C, 20D, 20, 210, 211, 250, 30, 40, 50), a second section (310, 320, 330, 350, 370) disposed in the corresponding second groove portion (20) and including a first contact portion (340) at an end, and a third section (350) disposed in the corresponding third groove portion (50) and including a second contact portion (360) at an end.

There has been a connector described in Patent Document 1, for example. The known connector includes a cable housing in which a cable can be temporarily fixed between an upper cable housing and a lower cable housing and a contact housing in which a contact including a U-shape pressure contacting portion is disposed. The upper cable housing and the lower cable housing each have an upper guide slot and a lower guide slot. The cable is pressure welded by the U-shape pressure contacting portion between the upper and lower guide slots.


A semiconductor integrated circuit includes a switch unit for controlling the supply of a power source voltage to a signal amplification circuit for receiving an input signal, and a control unit for selectively turning ON and OFF the switch unit in accordance with the amplitude or frequency of the input signal. By this constitution, it is possible to provide an input circuit or an output circuit capable of being applied to an input/output interface adapted for a small amplitude operation.

1. Field of the Invention
The present invention relates to a semiconductor integrated circuit (LSI). More particularly, the invention relates to a semiconductor integrated circuit equipped with an input circuit or an output circuit adapted to an interchip input/output interface on a board mounting a plurality of LSI chips, and particularly equipped with an input circuit that can be adapted to both the data that operate with high-frequency clocks (e.g., 50 MHz or higher) (hereinafter referred to as high-speed data) and the data that operate with low-frequency clocks (e.g., 50 MHz or lower)(hereinafter referred to as low-speed data) or equipped with an output circuit that outputs very small-amplitude signals of the CTT (center tapped termination) level or the GTL (gunning transceiver logic) level.
2. Description of the Related Art
So far, the TTL or CMOS level, or the LVTTL (interface specification for 3.3 volt power supply standardized in compliance with JEDEC) has generally been used as the input/output level of the LSIs. With respect to these levels, however, the device is much affected by the reflection of signals or by the crosstalk as the frequency of the transfer data exceeds 50 MHz, and it becomes difficult to normally transfer the data since the waveforms are distorted by ringing and the like. Attention therefore has been given to input/output interfaces (CTT, GTL, rambus channel, etc.) of small amplitudes that suppress the amplitude of the transfer data to be smaller than 1 volt (about xc2x1300 to xc2x1500 Mv). These input/output interfaces make it possible to transfer the data at speeds as high as 100 MHz or more, which is well greater than 50 MHz.
However, conventional semiconductor integrated circuits equipped with such input/output interfaces involve many problems, which will be explained later in detail in contrast with the preferred embodiments of the present invention.
A main object of the present invention is to provide a semiconductor integrated circuit equipped with an input circuit or an output circuit adapted for an input/output interface suitable for a small-amplitude operation.
A first object of the present invention is to provide a semiconductor integrated circuit equipped with an input circuit that can be adapted for both the high-speed transfer (importance is placed on the transfer speed) and the low-speed transfer (importance is placed on the electric power efficiency.)
A second object of the present invention is to provide a semiconductor integrated circuit which exhibits performance adapted for various modes and excellent compatibility, by using two sets of output transistors having optimum internal resistances depending upon the signal interfaces (CTT or GTL) of very small amplitude levels and the signal interfaces (CMOS or TTL) of large amplitudes.
A third object of the present invention is to provide a semiconductor integrated circuit which is immune to noise and can be well combined with a three-state type output circuit, by optimizing the judgement reference level of a differential amplifier circuit.
A fourth object of the present invention is to provide a semiconductor integrated circuit equipped with an output circuit having excellent compatibility which can be used for every one of CTT, TTL and GTL.
A fifth object of the present invention is to provide a semiconductor integrated circuit which can be used for both the signal interface having a large logic amplitude and the signal interface having a small logic amplitude.
A sixth object of the present invention is to provide a semiconductor integrated circuit equipped with an output circuit which can realize a high-speed operation and enhance the drivability of output transistors.
According to a first aspect of the present invention, there is provided a semiconductor integrated circuit comprising a switching means which controls the supply of power-source voltage to a signal amplifier circuit that receives input signals, and a control means which selectively turns the switching means on and off depending upon the amplitude or the frequency of the input signals.
According to a second aspect of the present invention, there is provided a semiconductor integrated circuit comprising: a pair of differential transistors which apply to one control electrode an input signal that changes with a first frequency or with a second frequency lower than the first frequency and apply to the other control electrode a reference voltage that corresponds nearly to an intermediate value of the logic amplitude of the input signal; a transistor of the low-potential side disposed between said pair of differential transistors and a power source of the low-potential side; a transistor of the high-potential side disposed between the differential transistors and an active load or between the active load and a power source of the high-potential side; a first control voltage-generating means for generating a control voltage which renders both the low-potential the transistor and said high-potential side transistor conductive when the frequency of the input signal is near the first frequency; and a second control voltage-generating means for generating a control voltage which renders either the low-potential side transistor or the high-potential side transistor conductive depending upon the logic state of the input signal when the frequency of the input signal is near the second frequency.
According to a third aspect of the present invention, there is provided a semiconductor integrated circuit comprising a comparator circuit which detects the magnitude of an input voltage with respect to a voltage that serves as a reference, and an input circuit in which first and second transistors that control the power source current to the comparator circuit are connected between first and second power sources and the comparator circuit, and an input signal fed to the comparator circuit is also fed to the first and second transistors.
According to a fourth aspect of the present invention, there is provided a semiconductor integrated circuit comprising: a pair of differential transistors which apply to one control electrode an input signal which has a first logic amplitude or a second logic amplitude greater than the first logic amplitude and apply to the other control electrode a reference voltage that corresponds nearly to an intermediate value of the logic amplitude of the input signal; a transistor of the low-potential side disposed between the pair of differential transistors and a power source of the low-potential side; a transistor of the high-potential side disposed between the differential transistors and an active load or between the active load and a power source of the high-potential side; and wherein the input signal is applied to the control electrodes of the low-potential side transistor and of the high-potential side transistor.
According to a fifth aspect of the present invention, there is provided a semiconductor integrated circuit comprising: a transmission line for transmitting input signals; a voltage source for generating a voltage that corresponds nearly to an intermediate value of the logic amplitude of the input signal; a terminal resistor which is connected between the transmission line and the voltage source via a predetermined switching means; and an on/off control means which turns the switching means on when the frequency of the input signal corresponds to the first frequency and turns switching means off when the frequency of the input signal corresponds to the second frequency.
According to a sixth aspect of the present invention, there is provided a semiconductor integrated circuit comprising: a first PMOS transistor and a first NMOS transistor connected in series between a high-potential side power source and a low-potential side power source; a second PMOS transistor and a second NMOS transistor connected in series between the high-potential side power source and the low-potential side power source; and an on/off control means which selectively turns the four transistors on and off depending upon a signal logic from a circuit in the chip; wherein a point at which the first PMOS transistor and the first NMOS transistor are connected together and a point at which the second PMOS transistor and the second NMOS transistor are connected together, are both connected to a signal line outside the chip, and the signal line is connected to the high-potential side power source or to the low-potential side power source depending upon the selective on/off operations of the four transistors; the semiconductor integrated circuit further comprising a mode control means which permits the signal line to be driven by the first PMOS transistor or by the first NMOS transistor when a mode designation signal indicates a first transfer mode which is used by connecting a terminal resistor between the signal line and a predetermined constant voltage, and permits said signal line to be driven by the second PMOS transistor or by the second NMOS transistor when the mode designation signal indicates a second transfer mode that is used without connecting the terminal resistor; and, wherein on-resistances of the first PMOS transistor and the first NMOS transistor are set based upon the signal amplitude on the signal line during said first transfer mode and the value of the terminal resistor, and on-resistances or the second PMOS transistor and the second NMOS transistor are set based upon the signal amplitude on the signal line during the second transfer mode.
According to a seventh aspect of the present invention, there is provided a semiconductor integrated circuit comprising differential transistors that output a signal corresponding to a difference between an input signal of a very small amplitude and a reference potential that corresponds to an intermediate amplitude of the signal, the differential transistors having different threshold values.
According to an eighth aspect of the present invention, there is provided a semiconductor integrated circuit equipped with an output circuit comprising: a PMOS transistor and an NMOS transistor connected in series between a high-potential side power source and a low-potential side power source; an output terminal drawn from a point at which the two transistors are connected together; a first means for push-pull operating PMOS transistor and the NMOS transistor according to the logic of a signal that is to be output; and a second means for cutting the PMOS transistor off in response to a predetermined level designation signal.
According to a ninth aspect of the present invention, there is provided a semiconductor integrated circuit comprising: a differential gate which compares the potential of an input signal with a predetermined reference potential to discriminate the logic of the input signal; a selection means which selects either a first reference potential given from outside the chip or a second reference potential formed by a reference potential-generating means in the chip; and an instruction means which instructs the selection means to select the first reference potential when the first reference potential is given, and which instructs the selection means to select the second reference potential when the first reference potential is not given.
According to a tenth aspect of the present invention, there is provided a semiconductor integrated circuit comprising: a logic gate which compares an input signal with a predetermined input threshold value to discriminate the logic of the input signal; a differential gate which compares the potential of the input signal with a reference potential given from outside the chip to discriminate the logic of the input signal; a selection means which selects either the output of the logic gate or the output of the differential gate; and an instruction means which instructs the selection means to select the output of the differential gate when the reference potential is given, and which instructs the selection means to select the output of the logic gate when the reference potential is not given.
According to an eleventh aspect of the present invention, there is provided a semiconductor integrated circuit comprising: an output circuit which outputs a first output voltage that specifies an xe2x80x9cHxe2x80x9d level and a second output voltage that specifies an xe2x80x9cLxe2x80x9d level with respect to a predetermined reference voltage; and a control means which controls the first and second output voltages of under substantially no-load state to, respectively, possess predetermined voltage levels of absolute values which is smaller than the absolute value of the voltage which corresponds to the power-source voltage.

Semiconductor integrated circuit with input/output interface adapted for small-amplitude operation


An equipment storage and transport apparatus includes a bucket having an interior chamber to store and carry items of equipment, a handle terminating at opposite ends being attached at opposite upper first locations on the bucket, cup-shaped support members attached at opposite lower second locations on the bucket angularly displaced from the first locations, loop-shaped retainer members attached at opposite upper third locations on the bucket spaced above the second locations and angularly displaced from the first locations, and a seat on the bucket bottom for the user to sit on when the bucket is inverted. The handle is configured to enable a user to grip it in order to lift and carry the bucket. The support members are configured to receive and hold the ends of elongated equipment items. The retainer members are configured to position the elongated equipment items upright relative to the support members.

In the sports of baseball/softball, field hockey and lacrosse, various sizes of bats and long-handled sticks as well as of balls are employed. In the sport of fishing, various lengths of fishing rods and poles as well as varieties of fishing accessories are employed.
An organized way to both store and transport these items is highly desirable as a matter of both efficiency and convenience so as to avoid their mishandling. Some users have a propensity toward disorganized storage of these items during their periods of non-use which results in their being mislaid and a search undertaken to find them before they can be used again. Also, manual transport and handling of these items as separate pieces is an awkward practice that may result in their being dropped and lost before reaching their intended destination.
Accordingly, there remains a need in the art for an innovation that will overcome the deficiencies of past approaches and the problems that remain unsolved.

Equipment storage and transport apparatus


A communications system is provided in which a host may receive data from a slave device over a polling bus. The slave device first reports to the host an initial amount of data to be transferred. The host can then initiate a data transfer from the slave device in order to retrieve the specified amount of data. As that initial data is being transferred over the bus, if additional data to be transferred to the host is received by the slave device, the slave device will report that supplemental amount of data to the host along with the initial data. The host may then immediately schedule a supplemental data transfer from the slave device in order to retrieve the additional data. The slave device may utilize a self-decrementing counter in order to keep track of the packets that require transfer but have not yet been reported to the host. The amount of data reported by the slave device to the host device may be provided as a count of packets in which the packets have a predetermined maximum size.

The Universal Serial Bus (USB) is a serial interface standard developed to provide flexible interconnections between a host device and multiple USB functions. A USB function is contained within a device and provides a capability to the host, such as a digital microphone, speakers, a mouse, a keyboard, camera, game controller, flash drive or a network adapter. USB utilizes a master-slave architecture in which the USB host, as master, initiates all data transfers with USB functions, as slaves, both into and out of the host device. The USB architecture does not provide a mechanism for attached functions to arbitrate for use of the bus. Thus, the USB host is responsible for providing the arbitration service to attached functions. This is typically accomplished by polling the attached functions on a periodic schedule to determine whether each function has data to transfer to the host and subsequently scheduling the data transfer.
The USB architecture supports functional data and control exchange between the USB host and a USB device as a set of either uni-directional or bi-directional pipes. USB data transfers take place between host software and a particular endpoint on a USB device. Such associations between the host software and a USB device endpoint are called pipes.
The USB architecture provides four basic types of data transfers. Control transfers are used to configure a device at attach time and can be used for other device-specific purposes, including control of other pipes on the device or host access to control registers on the device. Bulk data transfers are utilized for variably sized and bursty transfers and have wide latitude in usage. Exemplary usage would be in devices that are used by a computer file system such as flash drives, thumb drives, or the other common names for mass storage USB interfaces. Interrupt data transfers are typically used for regularly scheduled delivery of data, for example, polling a USB mouse for movement or a USB keyboard for new input. Isochronous data transfers occupy a prenegotiated amount of USB bandwidth with a prenegotiated delivery latency. Isochronous data transfer are sometimes referred to as streaming real time transfers. Exemplary usage would be a USB base audio device which steadily receives audio to be played through the speakers and steadily transmits audio from a microphone. A single pipe supports only one of the types of transfers described above for any given device configuration.
One common application of USB is the use of a USB network adapter (Ethernet, WiFi, Phoneline, Powerline) for providing network connectivity to a personal computer via a USB port. Exemplary USB network adapters include the WUSB54GP Wireless-G Portable USB Adapter V4.0, the WUSB54GS Wireless-G USB Network Adapter with Speedbooster, and the WUSB54G Wireless-G USB Network Adapter V4.0, all from the Linksys division of Cisco Systems, Inc., of San Jose, Calif. However, typical USB network adapters can consume excessive bandwidth in the polling mechanism utilized for supporting packet reception. This polling mechanism involves the generation of continuous bulk-IN data transfers to poll for packet reception. For each bulk-IN data transfer process, the USB driver on the host generates a bulk-IN transfer descriptor and stores the transfer descriptor in queue. The USB host controller fetches the transfer descriptor from queue and transmits a bulk-IN token to the USB network adapter. This bulk-IN token describes the type and direction of data transfer (e.g., bulk-IN), the USB device address, and the endpoint number.
When the USB network adapter receives the bulk-IN token from the USB host, if no new network data has been received by the adapter, the adapter will respond to the bulk-IN token with a NAK handshake packet. The USB host will continuously transmit bulk-IN tokens to the USB network adapter until the USB network adapter receives network data, in which case the USB network adapter will respond to the bulk-IN token with a bulk data packet containing the network data.
Polling using the bulk-IN transfer enables reception of the data with minimal latency. However, the repeated generation of bulk-IN transfer descriptors by the USB host, even when no new network data has been received, can consume an excessive amount of host resources. In some cases, the continuous bulk-IN tokens and NAK responses may consume up to approximately 50% of the total USB bandwidth. The extra bandwidth consumed on the host side can measurably slow other transfers to/from other USB endpoints on the bus. In addition, the polling mechanism can consume transfer resources in the host computer for an indeterminate period of time. The overhead imposed by this polling mechanism decreases overall throughput on the USB bus and increases the chance that that other USB devices on the bus will operate inefficiently or even improperly.
Accordingly, there is a need for an interface providing improved data transfer between a host and a peripheral over a bus. It is desirable that the interface provide minimal data transfer latency, while not consuming an excessive amount of host resources.