Memory blocks having word lines driven into selected states independently of each other are provided in correspondence to data input/output bits respectively. Each memory cell includes a bipolar transistor and a MOS transistor. In each memory block, a current flows to a bit line only of a selected column, and a 1-bit memory cell is accessed therein. Thus, sense amplifiers and write drivers have only to be provided in numbers corresponding to that of the data bits, whereby the circuit occupying area as well as current consumption are reduced.

1. Field of the Invention
The present invention relates to a static semiconductor memory device, and more particularly, it relates to a structure for reducing power consumption, a chip occupied area and an access time in the static semiconductor memory device.
2. Description of the Prior Art
FIG. 28 schematically illustrates the overall structure of a conventional static semiconductor memory device. This figure illustrates the overall structure of an exemplary static semiconductor memory device of a 1-bit word structure for inputting/outputting 1-bit data DQ.
Referring to FIG. 28, the static semiconductor memory device includes a memory array 100 having a plurality of static memory cells arranged in rows and columns. This memory array 100, the internal structure of which is described later in detail, includes a plurality of word lines arranged in correspondence to the respective rows of the memory cells and connected with the memory cells of the corresponding rows respectively, and a plurality of bit line pairs arranged in correspondence to the respective columns of the memory cells and connected with the memory cells of the corresponding columns respectively. The memory array 100 is split into a plurality of memory blocks 101a, 101b, 101c and 101d sharing the rows (word lines) along the row direction.
In order to select any memory cell in this memory array 100, the static semiconductor memory device further includes an X address buffer 102 for receiving X address signal bits AX0 to AXm specifying a row of the memory array 100, a Y address buffer 103 for receiving Y address signal bits AY0 to AYn specifying the columns in the memory blocks 101a to 101d respectively, a Z address buffer 104 for receiving Z address signal bits AZ0 and AZ1 specifying one of the memory blocks 101a to 101d, an X decoder 105 for decoding an internal address signal from the X address buffer 102 and selecting a row in the memory array 100, a Y decoder 106 for decoding an internal address signal from the Y address buffer 103 and selecting a column in each of the memory blocks 101a to 101d, and a block selector 107 for receiving an internal address signal from the Z address buffer 104 and generating a block selection signal for specifying one of the memory blocks 101a to 101d.
The X address buffer 102 includes buffer circuits XB0 to XBm provided in correspondence to the X address signal bits AX0 to AXm respectively for receiving the corresponding address signal bits AX0 to AXm and generating complementary internal address signal bits. The Y address buffer 103 includes buffer circuits YB0 to YBn provided in correspondence to the Y address signal bits AY0 to AYn respectively for receiving the corresponding address signal bits AY0 to AYn and generating complementary internal address signal bits. The Z address buffer 104 includes buffer circuits ZB0 and ZB1 provided in correspondence to the address signal bits AZ0 and AZ1 respectively for receiving the corresponding address signal bits AZ0 and AZ1 and generating complementary internal address signal bits.
The static semiconductor memory device further includes sense amplifiers 110a, 110b, 110c and 110d provided in correspondence to the memory blocks 101a to 101d respectively for amplifying data of selected memory cells of the corresponding memory blocks 101a to 101d respectively for transmission onto a common data bus 112 when activated, and write drivers 111a to 111d for amplifying the data on the common data bus 112 for writing in the selected memory cells of the corresponding memory blocks 101a to 101d respectively when activated. One of the sense amplifiers 110a to 110d is selectively driven into an active state in response to the block selection signal from the block selector 107 in a data write operation. Only the sense amplifier or the write driver provided in correspondence to the memory block specified by the block selection signal from the block selector 107 is driven into an active state. The common data bus 112 is arranged along the entire memory blocks 101a to 101d.
The static semiconductor memory device further includes an output buffer 114 for buffering internal read data read on the common data bus 112 for transmission to a data input/output terminal 113 in data reading, and an input buffer 115 activated in data writing for buffering external write data supplied on the data input/output terminal 113, generating internal write data and transmitting the same onto the common data bus 112. The operation is now briefly described.
The X decoder 105 receives and decodes the complementary internal address signal bits supplied from the X address buffer 102, for driving a row (word line) arranged in common for the memory blocks 101a to 101d into a selected state. Thus, the data of the memory cells connected to the selected row are read on the corresponding bit line pairs in the memory blocks 101a to 101d respectively. The Y decoder 106 decodes the complementary internal address signal bits from the Y address buffer 103 and selects a column in each of the memory blocks 101a to 101d. Thus, the selected columns are electrically connected to the corresponding sense amplifiers 110a to 110d and write drivers 111a to 111d in the memory blocks 101a to 110d respectively.
In data reading, only a sense amplifier provided for the selected memory block is driven into an active state in accordance with the block selection signal from the block selector 107, and the remaining sense amplifiers are held in output high-impedance states. When the memory block 101a is specified, for example, the sense amplifier 110a is activated for amplifying the data read on the selected column of the memory block 101a for transmission to the common data bus 112. The output buffer 114 further buffers the internal read data on the common data bus 112 for transmission to the data input/output terminal 113, to generate external read data DQ.
In data writing, a write driver provided for the selected memory block is driven into an active state in accordance with the block selection signal from the block selector 107. The remaining write drivers are held in output high-impedance states. When the memory block 101a is selected, for example, the write driver 111a further amplifies internal write data transmitted from the input buffer 115 onto the common data bus 112 for transmission onto the selected column of the memory block 101a, thereby writing the data in the selected memory cell.
The block selector 107 decodes the complementary address signal bits from the Z address buffer 104 and generates the block selection signal for specifying one of the four memory blocks 101a to 101d.
As shown in FIG. 28, internal (local) data buses (not shown) provided between the memory blocks 101a to 101d and the corresponding sense amplifiers 110a to 110d and write drivers 111a to 111d can be reduced in length by splitting the memory array 100 into the four memory blocks 101a to 101d, whereby loads of the internal data buses are reduced so that the data can be read/written at a high speed. In data reading, further, the data of the selected memory cell can be reliably transmitted onto the internal data bus at a high speed due to the small load thereof.
FIG. 29 more specifically illustrates the structure of the memory array 100 shown in FIG. 28. This figure representatively shows the structure of the two memory blocks 101a and 110d.
Referring to FIG. 29, each of the memory blocks 101a and 101d has the same structure and includes memory cells MC arranged in rows and columns, bit line pairs BLP0 to BLPk arranged in correspondence to the respective columns of the memory cells MC, bit line load circuits LD0 to LDk provided in correspondence to the bit line pairs BLP0 to BLPk respectively for precharging the corresponding bit line pairs BLP0 to BLPk at a prescribed potential and supplying a current to the corresponding bit lines BLP0 to BLPk in data reading, and multiplexers MX0 to MXk provided in correspondence to the bit line pairs BLP0 to BLPk respectively for selectively conducting in response to column selection signals Y0 and /Y0 to Yk and /Yk received from the Y decoder 106 shown in FIG. 28 and electrically connecting the corresponding bit line pairs BLP0 to BLPk to corresponding local data buses IOBa (or IOBd). Each of the bit line pairs BLP0 to BLPk includes bit lines BL and /BL for transmitting complementary data signals.
Each of the bit line load circuits LD0 to LDk includes resistively connected n-channel MOS transistors T0 and T1 provided between a power supply node Vcc and the respective bit lines BL and /BL.
Each of the multiplexers MX0 to MXk comprises CMOS transmission gates provided in correspondence to the bit lines BL and /BL respectively for conducting in response to corresponding complementary column selection signals Yi and /Yi (i=0 to k).
Word lines WL0, WL1, . . . are arranged in common for the respective rows of the memory cells MC forming the memory blocks 101a to 101d. These word lines WL0, WL1, . . . are connected with the memory cells MC arranged in correspondence to the corresponding rows of the memory blocks 101a to 101d respectively. In other words, the word lines WL0, WL1, . . . are arranged in common for the respective rows of the memory blocks 101a to 101d. When any word line is driven into a selected state in accordance with a row selection signal from the X decoder 105 shown in FIG. 28, therefore, a row of memory cells MC are simultaneously driven into selected states in each of the memory blocks 101a to 101d.
The local data buses IOBa to IOBd are provided for only the corresponding memory blocks 101a to 101d respectively. The sense amplifier 110a and the write driver 111a provided for the memory block 101a are enabled when a block selection signal BSa is activated. The sense amplifier 110d and the write driver 111d provided for the memory block 101d are enabled when a block selection signal BSd is activated. The sense amplifiers 110a to 110d receive a sense amplifier activation signal SAE, and the write drivers 111a to 111d receive a write driver enable signal WDE.
These sense amplifiers 110a to 110d are driven into active states when both of the sense amplifier activation signal SAE and the corresponding block selection signals BS (BSa to BSd) are in active states, for amplifying data read from the corresponding memory blocks 101a to 101d to the corresponding local data buses IOBa to IOBd respectively. The write drivers 111a to 111d are activated when both of the corresponding block selection signals BS (BSa to BSd) and the write driver enable signal WDE are in active states, for amplifying data supplied onto the common data bus 112 and transmitting write data to the corresponding local data buses IOBa to IOBd respectively. The operation is now briefly described.
The potential of a selected word line rises in accordance with a word line selection signal from the X decoder 105 shown in FIG. 28. Consider the case of driving the word line WL0 into a selected state. In this state, data stored in the memory cells MC connected with this word line WL0 are read on the corresponding bit line pairs BLP0 to BLPk in the memory blocks 101a to 101d respectively. At this time, a potential difference according to the data stored in each memory cell MC is caused between the bit lines BL and /BL in each of the bit line pairs BLP0 to BLPk due to a supply current (column current) from each of the bit line load circuits LD0 to LDk.
Further, a column is selected in each of the memory blocks 101a to 101d in accordance with the column selection signals Yi and /Yi from the Y decoder 106 shown in FIG. 28. Consider the case of selecting the bit line pairs BLP0. In this case, the multiplexers MX0 conduct to connect the bit line pairs BLP0 to the corresponding local data buses IOBa to IOBd in the memory blocks 101a to 101d respectively. The sense amplifier activation signal SAE is activated in data reading, while the write driver enable signal WDE is activated in data writing. The sense amplifier activation signal SAE and the write driver enable signal WDE are internally generated in accordance with an output enable signal OE and a write enable signal WE externally supplied respectively.
A single memory block is selected in accordance with the block selection signal BS from the block selector 107 (see FIG. 28). Consider that the memory block 101a is selected and the block selection signal BSa is activated. In this state, the sense amplifier 110a is activated in data reading, for amplifying memory cell data read on the local data bus IOBa for transmission onto the common data bus 112. The write driver 111a is activated in data writing, for generating internal write data on the local data bus IOBa in accordance with write data on the common data bus 112 and writing the same in the memory cell MC through the multiplexer MX0.
In the non-selected memory blocks 101b to 101d, the sense amplifiers 110b to 110d and the write drivers 111b to 111d are in output high-impedance states. Thus, data are read from or written in only the memory block 101a specified by the block selection signal BSa from the block selector 107.
As shown in FIG. 29, the lengths of the local data buses IOBa to IOBd provided for the memory blocks 101a to 101d are reduced and load capacitances thereof are reduced since the memory array 100 is split into the plurality of memory blocks 101a to 101d. Thus, memory cell data read in the corresponding memory blocks 101a to 101d are correctly transmitted to the corresponding sense amplifiers 101a to 101d at a high speed, for enabling high-speed data reading. Also in data writing, the write drivers 111a to 111d, which must drive the local data buses IOBa to IOBd having small loads as well as the bit line pairs BLP0 to BLPk through the corresponding multiplexers MX0 to MXk, can drive one of the bit line pairs BLP0 to BLPk corresponding to the selected column to potential levels corresponding to write data in accordance with the write data at a high speed due to the small loads of the local data buses IOBa to IOBd, for enabling high-speed data writing.
FIG. 30 schematically illustrates the structure of a single memory cell MC. Referring to FIG. 30, the memory cell MC includes n-channel MOS transistors Qa and Qb conducting in response to a signal potential on a word line WL for connecting storage nodes SN and /SN to the bit lines BL and /BL respectively, an n-channel MOS transistor Qc connected between the storage node SN and a ground node Vss with its gate connected to the storage node /SN, an n-channel MOS transistor Qd connected between the storage node /SN and the ground node Vss with its gate connected to the storage node SN, and resistive elements Za and Zb for pulling up the storage nodes SN and /SN to a power supply voltage Vcc level respectively. The resistive elements Za and Zb are formed by polysilicon resistances or thin-film transistors. The MOS transistors Qc and Qd form a flip-flop, for latching data of the storage nodes SN and /SN. The operation of the memory cell MC shown in FIG. 30 is now described with reference to FIG. 31.
Consider that the storage nodes SN and /SN hold data of logical high and low levels respectively, as shown in FIG. 31. In this state, the MOS transistors Qc and Qd are in OFF and ON states respectively. The resistive elements Za and Zb have extremely high resistance values, and only a small current flows through the resistive elements Za and Zb.
When the word line WL is selected and its potential increases, the MOS transistors Qa and Qb conduct to electrically connect the storage nodes SN and /SN to the bit lines BL and /BL respectively. The bit lines BL and /BL are supplied with a current from the bit line load circuit LD. The potential of the storage node SN is at a high level, and no current from the bit line load circuit LD flows into the storage node SN and the bit line BL maintains the high level. Because the storage node /SN is at a low level, on the other hand, the current from the bit line load circuit LD flows through the MOS transistors Qb and Qd to reduce the potential of the bit line /BL. The potential of the bit line /BL is set by the ratio of its resistance to the ON resistances of the MOS transistors Qb and Qd. Such potential reduction of the bit line /BL results in a potential difference between the bit lines BL and /BL. The corresponding sense amplifier (any of 110a to 110d) shown in FIG. 29 senses and amplifies the potential difference between the bit lines BL and /BL.
The current, called a column current Ic, flowing from the bit line BL (/BL) to the storage node SN (/SL) storing the low level data flows in all columns in selection of the word line WL. When the word line WL makes a transition to a non-selected state, the storage nodes SN and /SN return to the original potential levels by latch circuits of the MOS transistors Qc and Qd.
In data writing, the word line WL is driven into a selected state similarly to the case of data reading, to cause a potential difference between the bit lines BL and /BL. In this case, the corresponding write driver drives the bit lines BL and /BL into high and low levels respectively in response to the write data, and sets the potentials of the storage nodes SN and /SN at levels corresponding to the write data. Thus, the data is written.
When a word line is driven into a selected state in the conventional static semiconductor memory device, the column current Ic shown in FIG. 31 flows to all memory cells MC connected with the selected word line. If a number of memory cells MC are connected to a single word line, therefore, the total value of the column current Ic is so increased that current consumption is increased and a low current consumptionization cannot be implemented. In order to reduce current consumption by such column current Ic, the number of the memory cells MC connected to a single word line must be reduced. Techniques of reducing the number of memory cells connected to a single word line include a word line driving system called a divided word line structure.
FIG. 32A schematically illustrates the structure of a memory array of the divided word line arrangement. Referring to FIG. 32A, the memory array is divided into four memory blocks a, b, c and d. Global word lines GWL0, GWL1, . . . are arranged in common for respective rows of the memory blocks a to d. A row selection signal from the X decoder 105 shown in FIG. 28 is transmitted to the global word lines GWL0, GWL1, . . .
In each of the memory blocks a to d, local word lines LWL are arranged in correspondence to respective rows of memory cells MC and connected with the memory cells MC of the corresponding rows. Referring to FIG. 32A, local word lines LWLa0, LWLb0, LWLc0 and LWLd0 are arranged in correspondence to the global word line GWL0, and local word lines LWLa1, LWLb1, LWLc1 and LWLd1 are arranged in correspondence to the global word line GWL1 in the memory blocks a to d respectively.
Local decoders LGa0 to LGd0 and LGa1 to LGd1 for receiving signal potentials from the corresponding global word lines GWL0 and GWL1 and memory block selection signals BS (BSa to BSd) are arranged in correspondence to the local word lines LWLa0 to LWLd 0, LWLa1 to LWLd1, . . . These local decoders LGa0 to LGd0, LGa1 to LGd1, . . . drive the corresponding local word lines LWL into selected states when the signal potentials on the corresponding global word lines GWL0, GWL1, . . . are in selected states and the corresponding block selection signals BS (BSa to BSd) are in active states. The block selector 107 shown in FIG. 28 supplies one of the block selection signals BSa to BSd, for specifying one of the memory blocks a to d.
In operation, a single global word line and a single block selection signal are driven into selected states. Consider the case of driving the global word line GWL0 and the block selection signal BSa into selected states. In this case, an output signal from the local decoder LGa0 enters an active state to drive the corresponding local word line LWLa0 into a selected state. Therefore, the column current Ic flows only to the memory cells MC connected to the local word line LWLa0. In the non-selected memory blocks b to d, the local word lines LWLb 0 to LWLd 0 and LWLb1 to LWLd1 are in non-selected states since all block selection signals BSb to BSd are in non-selected states. Therefore, all memory cells MC are in non-selected states and supplied with no column current Ic in the non-selected memory blocks b to d. In the memory block a, the output signal of the local decoder LGa1 is in an inactive state and the local word line LWLa1 maintains a non-selected state even if the block selection signal BSa is driven into a selected state, since the global word line GWL1 is in a non-selected state.
In the divided word line structure shown in FIG. 32A, therefore, the column current Ic flows only in the selected memory block a, and hence current consumption in selection of the memory cells MC can be reduced.
Only a single memory block is driven into a selected state in the divided word line structure, whereby only a single write driver and a single sense amplifier may be provided commonly for all the memory blocks in case of inputting/outputting 1-bit data. In a structure of inputting/outputting multi-bit data, however, a single memory block must be divided in correspondence to the data bits respectively. Namely, a single memory block # (any of a to d) is split into a plurality of subblocks IO0 to IOj as shown in FIG. 32B.
FIG. 32B shows a single global word line GWL and a local word line LWL arranged in correspondence thereto. When the block selection signal BS and the global word line GWL are driven into selected states, the local word line LWL is also driven into a selected state for selecting 1-bit memory cell in each of the subblocks IO0 to IOj. These subblocks IO0 to IOj correspond to data bits DQ0 to Dqj respectively. A column selection signal outputted from the Y decoder 106 shown in FIG. 28 simply selects 1-bit memory cell from each of the subblocks IO0 to IOj.
In case of driving only a single memory block into a selected state for inputting/outputting multi-bit data as shown in FIG. 32B, the following problems arise.
FIG. 33 schematically illustrates the overall structure of a static semiconductor memory device for inputting/outputting a 2-bit word. This static semiconductor memory device includes four memory blocks #0 to #3. Each of the memory blocks #0 to #3 is divided into two subblocks IO0 and IO1 in correspondence to 2-bit data DQ0 and DQ1 respectively. Consider that the memory blocks #0 and #1 share a global word line in the divided word line structure and the memory blocks #2 to #3 share another global word line in the divided word line structure. The global word line is driven into a selected state in the memory blocks #0 and #1 or #2 and #3. The global word lines are arranged in common for the memory blocks #0 and #1 and for the memory blocks #2 and #3 respectively, and local decoders are arranged for respective local word lines to be supplied with block selection signals, thereby implementing block splitting of the divided word line structure.
Each of the memory blocks #0 to #3 is provided with sense amplifiers and write drivers for reading/writing internal data from/in the subblocks IO0 and IO1 respectively. The memory block #0 is provided with a sense amplifier SA00 for receiving a block selection signal BS0 and a sense amplifier activation signal SAE and a write driver WD00 for receiving the block selection signal BS0 and a write driver enable signal WDE for the subblock IO0. The memory block #0 is also provided with a sense amplifier SA01 for receiving the block selection signal BS0 and the sense amplifier activation signal SAE and a write driver WD01 for receiving the block selection signal BS0 and the write driver enable signal WDE for the subblock IO1.
The memory block #1 is provided with a sense amplifier SA10 for receiving a block selection signal BS1 and the sense amplifier activation signal SAE and a write driver WD10 for receiving the block selection signal BS1 and the write driver enable signal WDE for the subblock IO0, and a sense amplifier SA11 for receiving the block selection signal BS1 and the sense amplifier activation signal SAE and a write driver WD11 for receiving the block selection signal BS1 and the write driver enable signal WDE for the subblock IO1.
The memory block #2 is provided with a sense amplifier SA20 for receiving a block selection signal BS2 and the sense amplifier activation signal SAE and a write driver WD20 for receiving the block selection signal BS2 and the write driver enable signal WDE for the subblock IO0, and a sense amplifier SA21 for receiving the block selection signal BS2 and the sense amplifier activation signal SAE and a write driver WD21 for receiving the block selection signal BS1 and the write driver enable signal WDE for the subblock IO1.
The memory block #3 is provided with a sense amplifier SA30 for receiving a block selection signal BS3 and the sense amplifier activation signal SAE and a write driver WD30 for receiving the block selection signal BS3 and the write driver enable signal WDE for the subblock IO0, and a sense amplifier SA31 for receiving the block selection signal BS3 and the sense amplifier activation signal SAE and a write driver WD31 for receiving the block selection signal BS3 and the write driver enable signal WDE for the subblock IO1.
Internal common data buses 120a and 120b are provided in common for the memory blocks #0 to #3. The internal common data bus 120a is connected with the sense amplifiers SA00, SA10, SA20 and SA30 and the write drivers WD00, WD10 WD20 and WD30 provided for the subblocks IO0, and the internal common data bus 120b is connected with the sense amplifiers SA01, SA11, SA21 and SA31 and the write drivers WD01, WD11, WD21 and WD31 provided for the subblocks IO1.
These internal common data buses 120a and 120b are connected with input/output buffers 122a and 122b provided in the vicinity of pads (data input/output nodes) 121a and 121b respectively.
Only a single memory block is driven into a selected state in the structure shown in FIG. 33, so that 1-bit memory cell is selected in each of the two subblocks IO0 and IO1 of the selected memory block and data are transferred to/received from the selected memory cells through the input/output buffers 122a and 122b and the common data buses 120 and 120b.
In the block division structure dividing the memory blocks into the subblocks in correspondence to the data bits respectively, however, the sense amplifiers and the write drivers must be provided in correspondence to the respective data bits, leading to large occupied areas by the sense amplifiers and the write drivers.
The sense amplifiers and the write drivers of the subblocks provided for the same data bits are connected to the same common data bus line 120a or 120b. The sense amplifiers and the write drivers provided for non-selected memory blocks are brought into output high-impedance states, to exert no bad influence on reading/writing of memory cell data for the selected memory block. However, a number of sense amplifiers and write drivers are connected to each internal common data bus, and hence the load capacitance of the bus is so increased that data cannot be transferred at a high speed.
Not only in the divided block structure shown in FIG. 33 but also in the array structure shown in FIG. 28, the block selection signal must be supplied to the sense amplifier or the write driver for controlling activation/inactivation thereof in case of reading/writing data from/in one of a plurality of memory blocks. Thus, the length of an interconnection line for transmitting the block selection signal is increased to increase the occupying area of the interconnection line, and the block selection signal cannot be transmitted at a high speed.
Further, each of the common data buses 120a and 120b is arranged in common for a plurality of memory blocks, and hence its length is increased, the load is increased, an internal data signal cannot be transmitted at a high speed, and high-speed access cannot be implemented. In case of employing such common data buses 120a and 120b, further, output drivability of input buffers included in the input/output buffers 122a and 122b and the sense amplifiers SA00 to SA31 must be increased for driving relatively large loads at a high speed. Thus, excessive loads must be charged/discharged in charging/discharging of signal lines, leading to increase of power consumption.
Particularly in case of increasing the output drivability of output buffers in the input/output buffers 122a and 122b in order to compensate for signal propagation delay in the common data buses 120a and 120b, the input/output pads (data input/output nodes) 121a and 121b are driven at a high speed, leading to ringing resulting from undershoot or overshoot in the input/output pads 121a and 121b. Thus, a long time is required for stably outputting definite data, and the data cannot be read at a high speed.

Static semiconductor memory device with reduced power consumption, chip occupied area and access time


A compound archery bow has an adjustable anchor in which a bracket having two arms is connected to the axle upon which the wheels rotate. The arms are interconnected by a translation mechanism for moveably locating the end of the cable along a path parallel to the axle. The translation mechanism is a cylindrical member having a helical groove in the outer surface thereof. The free end of the cable is looped over the cylindrical member and fastened to the cable. Rotating the cylindrical member causes the looped end of the cable to change position from side to side across the limb, permitting adjustment to minimize the net torque on the limb. Other embodiments of the translation mechanism include a pulley, parallel to the other pulleys, mounted on a threaded axle, or a threaded eyelet attached to the end of the cable and engaging a bolt connected to the two arms of the anchor bracket. A fixed anchor locates the cable at a predetermined position across the width of the limb to optimize the torques on the limbs for a given pair of wheels.

This invention relates to compound archery bows and, in particular, to an anchor for the cable in a compound bow.
Compound bows differ from long bows in that a block and tackle mechanism is used to bend the bow: pulleys or wheels are attached at the free ends of the limbs to obtain a mechanical advantage in bending the bow. The limbs can be made approximately three times as stiff as for a longbow. Eccentrically mounted wheels enable one to use a much higher maximum draw weight because they provide a substantial "let off" or reduction in the holding force of a drawn bow. The combination of stiffer limbs and greater draw weight applies large forces to the components of a compound bow.
Compound bows typically use two wheels or pulleys, with lacing wound from an anchor at one end of a first limb to the pulley at the end of the other limb, to the pulley at the first end, then back to an anchor at the other end. The middle span between the wheels contains the serving or region for receiving the nock of the arrow. As used herein, "lacing" can refer to a single piece bowstring or a three piece line comprising two end cables connected by a central stretch between the wheels which forms the bowstring. The serving is the central portion of the bowstring.
A compound bow typically has a three piece lacing. Each cable is fastened at one end to the free end of the bow limb and spans the length of the bow to wrap around the wheel at the other end of the bow. The cable exits the wheel and attaches to the bowstring by what is known as a teardrop connector. In some bows, the bowstring and cables are interconnected by the wheels.
For two wheel compound bows, the cables are anchored, i.e. have their free ends attached, to the end of the limb. In some cases, the end of the cable is simply looped over the axle upon which the wheels rotate. In other cases, a simple fitting connects the cable end to the axle upon which the wheels rotate. In still other cases, a U-shaped bracket has its arms attached to each end of the axle upon which the wheels rotate. The base of the U is attached to the end of the cable. The U-shaped bracket is typically made from metal. U.S. Pat. No. 4,300,521 discloses a bracket in the form of a short length of cable in a loop wound half way around an idler pulley. The ends of the short cable are attached to the axle. The end of the cable from the lacing is attached to the idler pulley. In all cases, the anchor is placed arbitrarily, i.e. without regard to the forces on the end of the limb.
The need arises not only to attach the ends of the cables to the limbs but also to avoid having the cables and bowstring rub and wear each other; such rubbing could result in inconsistent operation of the bow. Thus, the cables and string must be spaced slightly so that they are not coplanar. The wheels or pulleys at the ends of the limbs turn on a single axle, to which the anchor for the end of the cable is also attached. Thus, these components are spread out along the axle across the width of the limb.
The substantial forces involved combined with the spacing of the bowstring and cables at the ends of the limbs cause torques on the free ends of the limbs which twist the limbs. To further complicate the matter, the torques vary as the bowstring is drawn and released. In general, the tension on the bowstring is greatest when the bow is at rest and least when the bow is fully drawn. The situation is reversed in the cables: the tension is least when the bow is at rest and greatest when the bow is drawn. As a result of these changing forces, the ends of the limbs twist one way and then the other as the bow is fired such that the axles of the wheels are no longer perpendicular to the bowstring.
The torque on the end of each limb is a net torque, the result of three components: the two cables and the bowstring. Since the wheel receiving a first cable, the wheel receiving the bowstring, and the anchor for the second cable are spread out along the axle, there is a moment arm, i.e. a distance from a fixed reference point, associated with each element. Mathematically, any reference point could be chosen but the longitudinal center of the axle is convenient because it makes it easier to visualize balancing the moments.
The forces (tension) in the cables and the bowstring combined with their respective distances from center are the respective moments of these elements. The net torque from these moments tends to twist the respective limbs; however, the limbs resist twisting. This counteracts the net torque and the limbs stop twisting at some point, e.g. ten degrees of twist. As used herein, "net torque" refers to the resultant torque from the cables and the bowstring, as described above.
In view of the foregoing, it is therefore an object of the invention to provide a means for adjusting the net torque on the ends of the limbs of a compound archery bow.
Another object of the invention is to provide a means for minimizing the net torque on the end of the limbs of a compound archery bow.
A further object of the invention is to provide a means for setting the zero net torque point to any place in the draw range of a compound archery bow.
Another object of the invention is to provide a means for minimizing the average net torque on the ends of the limbs of a compound archery bow as it is drawn and fired.


A fuel system for a marine propulsion system provides a container, in addition to the fuel tank of the marine vessel, which contains fuel pumps, a filter, a pressure regulator, and possibly a fuel cooler. Some or all of these components can be submerged under the surface of a pool of liquid fuel within the container. The container is displaced physically from the fuel tank of a marine vessel.

1. Field of the Invention
The present invention relates generally to a fuel system for a marine vessel and, more particularly, to a fuel system that is disposed within a container which is removably attached to a hull of the marine vessel and disposed between a fuel tank and an engine of the marine vessel.
2. Description of the Prior Art
Many different types of fuel systems are known to those skilled in the art of marine vessels and marine propulsion systems. In a typical application of a marine propulsion system, the fuel system uses a low pressure pump, or lift pump, to draw fuel from a fuel tank and provide that fuel to a high pressure pump which pressurizes the fuel and directs it to the marine engine. In some applications, the low and high pressure pumps can be located within a fuel reservoir that serves as a fuel vapor separator. The fuel vapor separator is typically mounted to the engine. In some applications, relating to outboard motors, the fuel vapor separator is attached to a drive shaft housing of the outboard motor. Various types of fuel reservoirs, fuel pumps, and fuel vapor separators have been developed by those skilled in the art and used in various combinations to provide a fuel system for a marine vessel.
U.S. Pat. No. 4,388,896, which issued to Sheridan et al. on Jun. 21, 1983, discloses a lubricating system for a two-cycle engine. The invention provides a remote oil tank to supply oil to an oil reservoir mounted on a two-cycle, crankcase compression engine such as used for outboard motors. Crankcase pressure may be used to pressurize the remote tank to move the oil.
U.S. Pat. No. 4,846,118, which issued to Slattery et al. on Jul. 11, 1989, discloses a dual fuel pump and oil fuel mixing valve system. A marine propulsion system with an outboard engine has an oil-fuel mixing valve within the engine cowl. A first crankcase pressure driven fuel pump delivers fuel from a remote fuel tank to the mixing valve and a second crankcase pressure driven fuel pump delivers mixed oil-fuel from the mixing valve to the engine. The arrangement provides adequate fuel pressure to overcome the added pressure drop across a reduced size mixing valve, all fitting within the engine cowl.
U.S. Pat. No. 4,848,283, which issued to Garms et al. on Jul. 18, 1989, discloses a marine engine with combination vapor return, crankcase pressure, and cooled fuel line conduit. A marine propulsion system includes a two-cycle water cooled crankcase compression internal combustion engine including a vapor separator, a remote fuel tank, and a fuel pump in the tank for delivering fuel to the engine in response to crankcase pulse pressure. A combination conduit between the fuel tank and the engine includes a first passage communicating crankcase pulse pressure from the engine to the fuel pump in the tank, a second passage supplying fuel from the pump in the tank to the engine, a third passage returning fuel vapor from the vapor separator at the engine back to the tank, a fourth passage supplying cooling water from the engine towards the tank, and a fifth passage returning water from the fourth passage back to the engine.
U.S. Pat. No. 5,832,903, which issued to White et al. on Nov. 10, 1998, discloses a fuel supply system for an internal combustion engine. The system has an electronically controlled fuel injection system and eliminates the need for a vapor separator. The system pumps an excessive amount of fuel through a plumbed fuel supply loop and cools recirculated fuel to cool all the components in the plumbed fuel supply loop.
U.S. Pat. No. 6,250,287, which issued to Wickman et al. on Jun. 26, 2001, discloses a fuel delivery system for a marine engine. A fuel pump is housed within the structure of a portable fuel tank. The inlet of a pump is located at the lower portion of the tank and an outlet of the pump is connectable in fluid communication with a flexible conduit. An opposite end of the flexible conduit is connectable in fluid communication with a fuel system of an outboard motor. A water sensor and a fuel level sensor can be provided in conjunction with the pump and attached to the pump in certain embodiments.
U.S. Pat. No. 6,253,742, which issued to Wickman et al. on Jul. 3, 2001, discloses a fuel supply method for a marine propulsion engine. The method uses a lift pump to transfer fuel from a remote tank to a vapor separator tank. Only one level sensor is provided in the vapor separator tank and an engine control unit monitors the total fuel usage subsequent to the most recent filling of the tank.
U.S. Pat. No. 6,553,974, which issued to Wickman et al. on Apr. 29, 2003, discloses an engine fuel system with a fuel vapor separator and a fuel vapor vent canister. The fuel supply system provides an additional fuel chamber, associated with a fuel vapor separator, that receives fuel vapor from a vent of the fuel vapor separator. In order to prevent the flow of liquid fuel into and out of the additional fuel chamber, a valve is provided which is able to block the vent of the additional chamber.
U.S. Pat. No. 6,527,603, which issued to Wickman et al. on Mar. 4, 2003, discloses a fuel supply system for a marine propulsion device. The system includes a reservoir that defines a cavity in which first and second fuel pumps are used. The first fuel pump is a lift pump which draws fuel from a fuel tank and pumps the fuel into the cavity of the reservoir. The second fuel pump is a high pressure pump which draws fuel from the cavity and pumps the fuel at a higher pressure to a fuel rail of an engine.
U.S. Pat. No. 6,694,955, which issued to Griffiths et al. on Feb. 24, 2004, discloses a marine engine with primary and secondary fuel reservoirs. The fuel supply system comprises first and second fuel reservoirs connected in fluid communication with each other. The first fuel reservoir is a fuel vapor separator which has a vent conduit connected in fluid communication with a second fuel reservoir. Under normal operation, fuel vapor flows from the fuel vapor separator into the second fuel reservoir for eventual discharge to the atmosphere.
U.S. Pat. No. 6,718,953, which issued to Torgerud on Apr. 13, 2004, discloses a fuel vapor separator with a flow directing component within a fuel recirculating flow path. The fuel system provides first, second, and third reservoirs of a fuel vapor separator and first, second, and third pumps to cause fuel to be drawn from the fuel tank and provided to the combustion chambers of an internal combustion engine. A flow directing component is provided to inhibit recirculated fuel from mixing directly with fuel within the fuel vapor separator that has not yet been pumped to a fuel rail. The flow directing component receives recirculated fuel and also receives fuel from a second reservoir through an orifice formed through a surface of the flow directing component.
U.S. Pat. No. 6,899,580 discloses a marine fuel system with a Peltier-effect device. The marine propulsion device is provided with a thermal electric device connected in thermal communication with fuel as it flows through the fuel system of an engine. The thermal electric device can be a Peltier-effect device that uses electric current to cause heat to flow from a cold portion of the Peltier-effect device to a hot portion of the Peltier-effect device. A secondary heat exchanger removes heat from the Peltier-effect device. As a result, heat is removed from the fuel in order to inhibit the creation of a vapor lock condition in association with the engine.
The patents described above are hereby expressly incorporated by reference in the description of the present invention.

Fuel system container for a marine vessel


An exemplary aspect of the invention can provide a method for easily adjusting the distortion of a projected image. In adjusting the amount of distortion correction, values of the amount of distortion correction for a desired outline form to be formed based on desired positions are calculated after the desired positions can be specified. Then whether all the calculated values of the amount of distortion correction are within a predetermined range where an original image is transformable into a distortion correction image can be judged. If all the calculated values of the amount of distortion correction are within the predetermined range, the calculated values of the amount of distortion correction can be set in an image distortion correction part. If a value out of the calculated values of the amount of distortion correction is beyond the predetermined range, outlines corresponding to at least part of the outline form of the projected image are produced, instead of setting the calculated values of the amount of distortion correction in the image distortion correction part. An outline corresponding to the amount of distortion correction beyond the predetermined range can be made differently from an outline corresponding to the amount of distortion correction within the predetermined range, so that each is identified.

1. Field of Invention
The present invention relates to a method for correcting projected image distortion that occurs when an image is projected by a projector obliquely on a projection surface.
2. Description of Related Art
In a projector, light emitted from an illumination optical system is modulated by a spatial light modulator, such as a liquid crystal light valve (liquid crystal panel) according to an image signal. The modulated light is projected on a projection surface, and thus an image is displayed. Examples of spatial light modulators may include, but not be limited to the crystal light valve. For example, a projector may employ Digital Micromirror Device™ (a trademark of Texas Instruments Incorporated) or devices using other technologies.
When an image is projected on a projection surface with the central axis of light for forming an image (image light) emitted from a projector not corresponding to the normal of the projection surface, the image displayed on the projection surface will be distorted. Even if the projector is to project a rectangular image on the projection surface, the image displayed on the projection surface may be distorted into a shape not rectangular but rather quadrangular. The distortion of the projected image can be corrected by adjusting the shape of an image formed by image light emitted from a liquid crystal light valve, in other words, by adjusting the shape of the image formed in the area of optical modulation (imaging area) of the liquid crystal light valve.
FIG. 11 shows an exemplary method for correcting the distortion of the projected image. FIG. 11A-1 shows a rectangular image IMa "original image IMa") that is formed in a rectangular imaging area of the liquid crystal light valve in the case where no distortion correction is applied. In this case, a quadrangular image IMaS that has been distorted into a shape not rectangular is displayed on the projection surface as shown in FIG. 11A-2. Here, the image shown in FIG. 11A-2 is projected obliquely on the projection surface from the lower right to the normal of the projection surface.
FIG. 11B-1 shows a corrected image IMc that is formed in the imaging area of the liquid crystal light valve in the case where the distortion of the projected image shown in FIG. 11A-2 is corrected. The corrected image IMc consists of a distortion correction image IMc-a and a background image IMc-b. The distortion correction image IMc-a is an inverted image of the image shown in FIG. 11A-2, and is formed by transforming the original image IMa. The background image IMc-b is composed of black pixels. As the corrected image IMc is formed in the imaging area of the liquid crystal light valve, only the distortion correction image IMc-a in the corrected image IMc is projected. Consequently, a rectangular image IMcS (IMc-aS) shown in FIG. 11B-2 is displayed on the projection surface.
An exemplary method for transforming the original image IMa so as to form the distortion correction image IMc-a is disclosed in, for example, Japanese Unexamined Patent Application Publication No. 2002-6391 and Japanese Unexamined Patent Application Publication No. 2003-46907.

Adjustment in the amount of projected image distortion correction


The liquid crystal display device has a structure having substrates 200 and 300 adhered to each other by a sealing material 110 with a predetermined gap therebetween and having liquid crystal 160 enclosed in the gap. On an opposing surface of the substrate 200, transparent electrodes 214 are formed, and on an opposing surface of the substrate 300, segment electrodes 314 are formed. The common electrodes 214 are connected to wiring 350 formed on the substrate 300 via conductive particles 114 mixed in the sealing material 110, and the wiring 350 are each a laminated film of a transparent conductive film 354 composed of the same conductive layer as that of the segment electrode 314 and a low-resistance conductive film 352 composed of a low-resistance material, such as chromium, having a resistance lower than that of the transparent conductive film 354. However, the low-resistance conductive film 352 is formed at an area other than the portion connecting with the conductive particles 114.

1. Technical Field of the Invention
The present invention relates to liquid crystal devices which reduce wiring resistance, to manufacturing methods therefor, and to electronic apparatuses using the liquid crystal devices for display portions.
2. Description of the Related Art
As has been well known, since liquid crystal display devices have advantages in weight and electric power consumption compared to display devices using CRTs (cathode ray tubes), in particular, they are widely used for display portions of electronic apparatuses which are required to have portability.
Liquid crystal display devices generally have a structure in which two substrates are bonded to each other with a predetermined gap therebetween so that electrode forming surfaces thereof oppose each other, and liquid crystal is received in the gap; and when roughly classified in accordance with a driving mode, they can be classified into an active matrix type in which liquid crystal is driven by switching elements, and a passive matrix type in which liquid crystal is driven without using switching elements. In addition, the former, the active matrix type, can be further classified into a type which uses three-terminal elements, such as a thin-film transistor (TFT), as switching elements, and a type which uses two-terminal elements such as a thin-film diode (TFD).
The type which uses TFD elements as the switching elements among active matrix types and the simple passive matrix type have a structure in which scanning lines (common electrodes) are formed on one substrate and data lines (segment electrodes) are formed on the other substrate. Accordingly, in these types described above, since scanning signals (common signals) and data signals (segment signals) must be supplied by bonding an FPC substrate to each of the two substrates, problems of complicated bonding step and an increase in cost may arise. Accordingly, in the types described above, a technique has been proposed to bond one piece of FPC substrate to only one of the two substrates by using a structure in which all wirings or electrodes formed on the other substrate are connected to wirings formed on said one of the two substrates via conducting materials, that is, a structure is formed so that all wirings or electrodes formed on the other substrate are gathered on said one of the two substrates.
However, in the technique described above, the wirings formed on said one of the two substrates are composed of the same material as that used for transparent electrodes on said one of the two substrates, which apply a voltage to the liquid crystal. In this connection, as a material used for the transparent electrode mentioned above, ITO (Indium Tin Oxide) is generally used; however, the square resistivity of this transparent electrode material is high compared to that of a common metal. Accordingly, when the transparent electrode material described above is used for wirings for electrical connection in an area other than the display area, the resistance is naturally increased, and as a result, a problem may arise in that the image quality is adversely influenced.
In particular, recently, in order to reduce the number of connection points between a liquid crystal panel and a FPC substrate, driver ICs for driving the scanning lines (common electrodes) and the data lines (segment electrodes) are mounted on a glass substrate of the liquid crystal panel in some cases. In the case described above, various control signals and clock signals must be supplied to the driver ICs; however, when the transparent electrode material described above is used for wiring from the FPC substrate to the driver ICs, since the time constant is increased concomitant with an increase in wiring resistance, deformation of waveforms, a decrease in amplitude, and the like occur, and as a result, a problem may arise in that the operation margin is narrowed.
The present invention was made in view of the problems described above, and an object of the present invention is to provide a liquid crystal device which reduces resistance of wirings formed on a substrate, a manufacturing method therefor, and an electronic apparatus using the liquid crystal device for the display portion.

Liquid crystal device, manufacturing method therefor, and electronic apparatus


A device for removal of slips from a continuously transported slip web is composed of an advancement roll pair which continuously advances and holds the slip web. A blade cylinder pushes a respective lead end of a slip into an open gripper of a gripper cylinder. A device is arranged between the advancement roll pair and the blade cylinder and provides transverse perforated lines. A rotating tear-off segment cooperates with the blade cylinder. In order to enable a simple and rapid adaptation to different slip formats, the advancement speed of the advancement rolls, the transverse perforating device and the angle of action of the tear-off segment are correspondingly changed relative to the blade cylinder.

1. Field of the Invention
This invention pertains to a device for removing slips of material paper, such as from a continuously transported slip web. The device has an advancement roll pair which continuously advances and holds the slip web. A blade cylinder includes a blade, which follows a path along a surface line. A respective lead end of a slip is pushed into an open gripper of a gripper cylinder. A device is arranged between the advancement roll pair and the blade cylinder for providing transverse perforations in the slip web. A rotating tear-off segment cooperates with the blade cylinder.
2. Description of Related Art
A device of this type is known from practical operation and will be described with the aid of FIG. 2. Such a device cannot be reset to different slip formats without considerable cost since, in order to do this, the distance from the device which carries out the transverse perforation to the cooperating rotating tear-off segments or to the gripper of the gripper cylinder, respectively, must be changed. Changing this distance is costly, since the drives of the advancement rolls and of the transverse perforating device must also be adjusted to the changed format.
That is why the purpose of this invention is to create a device of the aforementioned type which can be adapted to different slip formats simply, rapidly, and with limited structural cost.

Device for removal of slips from a continuously transported slip web


A method and system to compensate for inaccuracy associated with processing values with finite precision includes a process for selecting a display value whereby an initial value is provided in a first numbering system. The initial value is then converted into an equivalent stored value in a second numbering system. Then a display value in the first numbering system is determined and selected such that the selected display value includes the least number of significant digits that convert from the first numbering system to the second numbering system exactly as the stored value. The selected display value in the first numbering system is then used for display and/or further processing when the stored value in the second numbering system is recalled.

When using many computing systems and/or computing system implemented processes, a value is entered and/or edited and/or displayed in one numbering system such as a first system of units or number base, typically in an ASCII/text decimal form. Then the value is stored in a second numbering system, such as a second system of units or number base, typically in a binary format. The value is then later accessed and/or recalled for processing and/or display again in the first numbering system. This process of entering and/or editing a value in one numbering system, storing the value in a second numbering system, and then recalling the value in the first numbering system, is often referred to as "round-tripping".
During round-tripping, the conversion or "scaling" of the initial value between the two numbering systems often results in discrepancies that can appear to users as errors and/or as cumbersome numerical values with little or no physical relevance. This error introduced by round-tripping is referred to herein as one example of "rounding error".
Due to round-tripping and rounding error, it is often the case that when a value is entered and/or edited in one unit of measure, such as inches, and then stored in a second unit of measure, such as feet, and then again recalled and/or displayed in the first unit of measure, the recalled value eventually displayed or subjected to further processing, also called a display value, does not match the value initially entered and/or edited.
As a specific example, suppose a user enters and/or edits an initial value 0.25 inches into a computing system, typically in an ASCII/text decimal form, running a computing system implemented process, such as a computing system implemented point of sale application. For this example, assume the computing system implemented point of sale application stores all values in units of feet. Consequently, in this example, the initial value 0.25 inches is multiplied by the scaling ratio (1 foot/12 inches or 0.0833333) to obtain a stored value of 0.02083 feet, which is the correct conversion of the initial value 0.25 inches using four significant digits. The stored value of 0.02083 feet is typically stored in a binary format
In this specific example, once the initial value of 0.25 inches is converted to the stored value of 0.02083 feet, it is further stipulated that the user calls up the value to be displayed again, or to be further processed as a display value in the unit of inches. In this case, the stored value 0.02083 feet is then multiplied by the scaling ratio (12 inches/1 foot or 12.000), which is the reciprocal of the original scaling ratio. However, this operation results in a recalled value of 0.24997 inches. Given that when the recalled value of 0.24997 inches is multiplied by the scaling ratio (1 foot/12 inches), the exact same stored value of 0.02083 feet results, it follows that the recalled value of 0.24997 inches is technically correct. However, as discussed above, the entered initial value of 0.25 inches also results in the stored value of 0.02083 feet and is a much more useful and aesthetically pleasing representation of the stored value and, in many cases more accurately reflects physical realities/capabilities.
The rounding error associated with round-tripping discussed above is not restricted to units of measure. The problem arises anytime a value is scaled using finite precision arithmetic, i.e., with limited precision. Consequently, the rounding error problem is equally prevalent anytime an initial value is entered and/or edited in one numbering system, converted to a stored value in a second numbering system, and then converted back to a recalled value in the first numbering system, such as: when two number bases are used, such as a decimal (base ten) system and a binary (base two) system; when a metric system and an American system are used; when different monetary systems are used; or when different sales, inventory and/or packaging units are used.

Method and system to compensate for inaccuracy associated with processing values with finite precision


[4,5]-Fused-3,6 disubstituted-pydidazines of Formula I are useful for inducing or promoting apoptosis and for arresting uncontrolled neoplastic cell proliferation, and are specifically useful in the arresting and treatment of neoplasia:

This invention relates to compounds and methods for inducing or promoting apoptosis and for arresting uncontrolled neoplastic cell proliferation, methods that are specifically useful in the arresting and treatment of neoplasias, including precancerous and cancerous lesions.
Pharmaceuticals that are effective against early stage neoplasias comprise an emerging and expanding area of research and potential commercial development. Such pharmaceuticals can delay or arrest development of precancerous lesions into cancers. Each year in the United States alone, untold numbers of people develop precancerous lesions, which exhibit a strong statistically significant tendency to develop into malignant tumors, or cancer. Such lesions include lesions of the breast (that can develop into breast cancer), lesions of the skin (that can develop into malignant melanoma or basal cell carcinoma), colonic adenomatous polyps (that can develop into colon cancer), cervical dysplasia (cervical cancer) and other such neoplasms.
Such compounds and methods are particularly beneficial to sub-populations of patients who repeatedly develop precancerous lesions, and therefore have a statistically higher probability of getting cancer. Many cancer types (e.g., breast, colon, prostate etc.) have such patient sub-populations.
The search for drugs useful for treating and preventing neoplasias in their earliest stages is intensive because chemotherapy and surgery on cancer itself is often not effective, and current cancer chemotherapy has severe side effects. Such cancer-preventative compounds are also envisaged for recovered cancer patients who retain a risk of cancer reoccurrence, and even for cancer patients who would benefit from compounds that selectively induce apoptosis in neoplastic, but substantially not in normal cells.
Because it is believed that chronic administration of cancer-preventative pharmaceuticals is necessary to inhibit or arrest the development of neoplasia, standard cancer chemotherapeutic drugs are not considered appropriate drugs for cancer chemoprevention because, whatever cancer preventative (as opposed to cancer-fighting) capabilities those drugs may possess, they do not outweigh their severe side effects. Most standard chemotherapeutics are now believed to kill cancer cells by inducing apoptosis (also sometimes referred to as xe2x80x9cprogrammed cell deathxe2x80x9d). Apoptosis naturally occurs in many tissues in the body. Apoptosis plays a critical role in tissue homeostasis, that is, it ensures that the number of new cells produced are correspondingly offset by an equal number of cells that die. Apoptosis is especially pronounced in self-renewing tissues such as bone marrow, immune cells, gut, and skin. For example, the cells in the intestinal lining divide so rapidly that the body must eliminate cells after only three days to protect and prevent the overgrowth of the intestinal lining.
Standard chemotherapeutics promote apoptosis not only in cancer cells, but also in normal human tissues, and therefore have a particularly severe effect on tissues where apoptosis is especially pronounced (e.g. hair, gut and skin). The results of those effects include hair loss, weight loss, vomiting and bone marrow immune suppression. Thus, standard chemotherapeutics are inappropriate for cancer prevention, particularly if chronic administration is indicated.
Several non-steroidal anti-inflammatory drugs (xe2x80x9cNSAIDsxe2x80x9d), originally developed to treat arthritis, have shown effectiveness in inhibiting and eliminating colonic polyps. Polyps virtually disappear when the patients take the drug, particularly when the NSAID sulindac is administered. However, the continued prophylactic use of currently available NSAIDs, even in high colon cancer-risk patients, is still marked by severe side reactions that include gastrointestinal irritations, perforations, ulcerations and kidney toxicity believed to be produced by inhibition of prostaglandin synthetase activity (xe2x80x9cPGE-2xe2x80x9d). Such inhibition is a requirement for the NSAIDs anti-inflammatory action since elevated levels of PGE-2 are associated with inflammation. PGE-2 plays a protective function in the gastrointestinal tract, which is the reason such gastric side effects arise with chronic NSAID therapy, which is rarely indicated for arthritis sufferers, acute therapy being the norm for them. However, chronic administration of sulindac is important for high cancer-risk patients to eliminate and prevent future polyps which cause gastric side effects in many such patients. Once NSAID treatment is terminated due to such complications, the neoplasms return, particularly in high risk patients.
Compounds such as those disclosed in U.S. Pat. No. 5,643,959 have exhibited advantages in the treatment of neoplastic lesions since such compounds have been shown to induce apoptosis in neoplastic cells but not in normal cells in humans (see Piazza et al. Gastroenterology Vol. 112, A629, 1997). Thus, the severe side effects due to induction of apoptosis in normal cells by conventional chemotherapeutics are avoided by these novel therapeutics (see, Piazza et al. Cancer Research Vol. 57, pp. 2452-2459, 1997). In addition, such compounds do not exhibit the gastric side effects associated with NSAIDs since such compounds do not substantially inhibit PGE-2. More potent compounds with such neoplasia specificity but without substantial PGE-2 activity are desirable.
This invention represents potent compounds that inhibit the growth of neoplastic cells, for treating patients with neoplastic lesions without substantially inhibiting PGE-2. This invention also involves methods for inducing such specific inhibition of neoplastic cells by exposing such cells to a pharmacologically effective amount of those compounds described below to a patient in need of such treatment. Such compositions are effective in modulating the growth of neoplasms.
As discussed above, the present invention includes compounds of Formula I below (as well as their pharmaceutically acceptable salts) for treating a patient with neoplastic, particularly precancerous, and cancerous lesions:
wherein
Y1 and Y2 are independently selected from the group consisting of (CH2)n, xe2x80x94C(X)xe2x80x94NHxe2x80x94, xe2x80x94(CH2)nxe2x80x94C(X)xe2x80x94Oxe2x80x94, xe2x80x94C(X)xe2x80x94Oxe2x80x94 and X is O or S;
R1 is selected from the group consisting of lower alkyl, lower alkenyl, lower alkynyl, hydrogen, and substituted or unsubstituted phenyl, pyridinyl, pyrrolyl, pyrrolidinyl, pyrazolyl, pyrazolidinyl, imidazolyl, imidazolidinyl, piperidinyl, pyrazinyl, piperazinyl, pyzimidinyl, naphthyl, morpholinyl, tetrazolyl, triazinyl, furfulyl and thiophenyl, wherein said substituents are one to three independently selected from the group consisting of halogen, lower alkyl, lower alkoxy, amino, lower alkylamino, di-lower alkylamio, hydroxy, nitro, nitrile, carboxyl, sulfonylamido, lower alkyl mercapto, and lower alkyl sulfonyl;
R2 is selected from the group consisting of substituted or unsubstituted phenyl, benzyl, pyridinyl, pyrrolyl, pyrrolidinyl, pyrazolyl, pyrazolidinyl, imidazolyl, imidazolidinyl, piperidinyl, pyrazinyl, piperazinyl, pyrimidinyl, tetrazolyl, morpholinyl, triazinyl, furfuryl and thiophenyl, wherein said substituents are one to three independently selected from the group consisting of halogen, lower alkyl, lower alkoxy, amino, lower alkylanmino, di-lower alkylamino, hydroxy, nitro, nitrile, carboxyl, aminosulfonyl, lower alkyl mercapto, and lower alkyl;
A is a ring fused with the pyridazine ring selected from the group consisting of benzene, pyndine, pyrrol, pyrtolidine, pyrazol, pyrazolidine, imidazol, imidazolidine, piperidine, pyrazine, piperazine, pyrimidine, morpholine, tetrazol, triazine, furan and thiophene; piperidine, pyrazine, piperazine, pyrimidine, morpholine, tetrazol, triazine, furan and thiophene;
(R3) are substituents replacing hydrogen on the ring fused to pyridazine. R3 is independently selected in each instance from the group consisting of halogen, lower alkyl, lower alkoxy, amino, lower alkylamino, di-lower alkylamino, hydroxy, nitro, nitrile, carboxyl, sulfonylamido, lower alkyl mercapto, and lower alkyl sulfonyl;
m is an integer from 1 to 4;
n is an integer from 0 to 3
p is 0 or 1;
q is 0, 1 or 2; and
pharmaceutically acceptable salts thereof.
Preferred compounds of this invention include those where (1) R1 is selected from the group consisting of lower alkyl, lower alkenyl, lower alkynyl, and substituted or unsubstituted phenyl, pyridinyl, pyrrolyl, pyrazolyl, imidazolyl, pyrazinyl, pyrimidinyl, morpholinyl, triazinyl, furfuryl and thiophenyl, wherein said substituents are one or two independently selected from the group consisting of halogen, lower alkoxy, di-lower alkylamino, hydroxy, nitrile, carboxyl, sulfonylamido, lower alkyl mercapto, and lower alkyl sulfonyl; (2) R2 is selected from the group consisting of substituted or unsubstituted phenyl, benzyl, pyridinyl, pyrrolyl, pyrazolyl, imidazolyl, pyrazinyl, pyrimidinyl, morpholinyl, triazinyl, furfuryl and thiophenyl, wherein said substituents are one or two independently selected from the group consisting of halogen, lower alkyl, lower alkoxy, di-lower alkylamino, hydroxy, carboxyl, aminosulfonyl, lower alkyl mercapto, and lower alkyl; (3) xe2x80x9cAxe2x80x9d is a ring fused with the pyridazine ring selected from the group consisting of benzene, pyridine, pyrrol, pyrrolidine, imidazolidine, piperidine, pyrazine, piperazine, pyrimidine, morpholine, triazine, furan and thiophene; (4) p is 0 or 1; (5) R3 is independently selected in each instance from the group consisting of halogen, lower alkyl, lower alkoxy, di-lower alkylamino, hydroxy, carboxyl, sulfonylamido, lower alkyl mercapto, and lower alkyl sulfonyl; and m is an integer from 0 to 2; and (6) n is an integer from 0 to 2.
More preferred compounds of this invention include those wherein (1) R1 is selected from the group consisting of substituted or unsubstituted phenyl, pyridinyl, pyrazinyl, pyrimidinyl, triazinyl, furfuryl and thiophenyl, wherein said substituent is one member selected from the group consisting of halogen, lower alkoxy, di-lower alkylamino, nitrile, sulfonylamido, and lower alkyl sulfonyl; (2) R2 is selected from the group consisting of substituted or unsubstituted phenyl, benzyl, pyridinyl, pyrazinyl, pyrimidinyl, triazinyl, furfuryl and thiophenyl, wherein said substituent is one member selected from the group consisting of halogen, lower alkyl, lower alkoxy, di-lower alkylamino, aminosulfonyl, and lower alkyl mercapto; (3) wherein xe2x80x9cAxe2x80x9d is a ring fused with the pyridazine ring selected from the group consisting of benzene, pyrazine, pyrimidine, furan and thiophene; (4) p is 0; (5) R3 is independently selected in each instance from the group consisting of halogen, lower alkyl, lower alkoxy, di-lower alkylamino, and lower alkyl mercapto; and m is 0 or 1; and (6) n is 0 or 1.
The present invention is also a method of treating individuals with neoplastic lesions by administering a pharmacologically effective amount of an enterically coated pharmaceutical composition that includes compounds of this invention.
Preferably, such compounds are administered without therapeutic amounts of an NSAID.
Also, the present invention is a method of inhibiting the growth of neoplastic cells by exposing the cells to an effective amount of compounds of Formula I
As used herein, the term xe2x80x9cprecancerous lesionxe2x80x9d includes syndromes represented by abnormal neoplastic, including dysplastic, changes of tissue. Examples include dysplasic growths in colonic, breast, bladder or lung tissues, or conditions such as dysplastic nevus syndrome, a precursor to malignant melanoma of the skin. Examples also include, in addition to dysplastic nevus syndromes, polyposis syndromes, colonic polyps, precancerous lesions of the cervix (i.e., cervical dysplasia), esophagus, prostatic dysplasia, bronchial dysplasia, breast, bladder and/or skin and related conditions (e.g., actinic keratosis), whether the lesions are clinically identifiable or not.
As used herein, the term xe2x80x9ccancerousxe2x80x9d refers to lesions that are malignant. Examples include malignant melanomas, breast cancer, prostate cancer and colon cancer.
As used herein, the term xe2x80x9cneoplasmxe2x80x9d refers to both precancerous and cancerous lesions and hyperplasia.
As used herein, the term xe2x80x9chaloxe2x80x9d or xe2x80x9chalogenxe2x80x9d refers to chloro, bromo, fluoro and iodo groups, and the term xe2x80x9calkylxe2x80x9d refers to straight, branched or cyclic alkyl groups and to substituted aryl alkyl groups. The term xe2x80x9clower alkylxe2x80x9d refers to C1 to C8 alkyl groups.
The term xe2x80x9clower alkoxyxe2x80x9d refers to alkoxy groups having from 1 to 8 carbons, including straight, branched or cyclic arrangements.
The term xe2x80x9clower alkylmercaptoxe2x80x9d refers to a sulfide group that is substituted with a lower alkyl group; and the term xe2x80x9clower alkyl sulfonylxe2x80x9d refers to a sulfone group that is substituted with a lower alkyl group.
The term xe2x80x9cpharmaceutically acceptable saltxe2x80x9d refers to non-toxic acid addition salts and alkaline earth metal salts of the compounds of Formula I. The salts can be prepared in situ during the final isolation and purification of such compounds, or separately by reacting the free base or acid functions with a suitable organic acid or base, for example. Representative acid addition salts include the hydrochloride, hydrobromide, sulfate, bisulfate, acetate, valerate, oleate, palmetate, stearate, laurate, borate, benzoate, lactate, phosphate, tosylate, mesylate, citrate, maleate, fumarate, succinate, tartrate, glucoheptonate, lactobionate, lauryl sulfate salts and the like. Representative alkali and alkaline earth metal salts include the sodium, calcium, potassium and magnesium salts.
It will be appreciated that certain compounds of Formula I can possess an asymmetric carbon atom and are thus capable of existing as enantiomers. Unless otherwise specified, this invention includes such enantiomers, including any racemates. The separate enantiomers may be synthesized from chiral starting materials, or the racemates can be resolved by conventional procedures that are well known in the art of chemistry such as chiral chromatography, fractional cyrstallization of diastereomeric salts and the like.
Compounds of this invention may be formulated into pharmaceutical compositions together with pharmaceutically acceptable carriers for oral administration in solid or liquid form, or for intraveneous, rectal or topical administration, although carriers for oral administration are most preferred.
Pharmaceutically acceptable carriers for oral administration include capsules, tablets, pills, powders, troches and granules. In such solid dosage forms, the carrier can comprise at least one inert diluent such as sucrose, lactose or starch. Such carriers can also comprise, as is normal practice, additional substances other than diluents, e.g., lubricating agents such as magnesium stearate. In the case of capsules, tablets, troches and pills, the carriers may also comprise buffering agents. Carriers such as tablets, pills and granules can be prepared with enteric coatings on the surfaces of the tablets, pills or granules. Alternatively, the enterically coated compound can be pressed into a tablet, pill, or granule for administration to the patient. Preferred enteric coatings include those that dissolve or disintegrate at colonic pH such as shellac or Eudraget S.
Pharmaceutically acceptable carriers include liquid dosage forms for oral administration, e.g., pharmaceutically acceptable emulsions, solutions, suspensions, syrups and elixirs containing inert diluents commonly used in the art, such as water. Besides such inert diluents, compositions can also include adjuvants such as wetting agents, emulsifying and suspending agents, and sweetening, flavoring and perfuming agents.
Pharmaceutically acceptable carriers for topical administration include DMSO, alcohol or propylene glycol and the like that can be employed with patches or other liquid-retaining material to hold the medicament in place on the skin so that the medicament will not dry out.
Pharmaceutically acceptable carriers for rectal administration are preferably suppositories that may contain, in addition to the compounds of this invention excipients such as cocoa butter or a suppository wax, or gel.
The pharmaceutically acceptable carrier and compounds of this invention are formulated into unit dosage forms for administration to a patient. The dosage levels of active ingredient (i.e., compounds of this invention) in the unit dosage may be varied so as to obtain an amount of active ingredient effective to achieve lesion-eliminating activity in accordance with the desired method of administration (i.e., oral or rectal). The selected dosage level therefore depends upon the nature of the active compound administered, the route of administration, the desired duration of treatment, and other factors. If desired, the unit dosage may be such that the daily requirement of the active compound is in one dose, or divided among multiple doses for administration, e.g., two to four times per day.
The pharmaceutical compositions of this invention are preferably packaged in a container (e.g., a box or bottle, or both) with suitable printed material (e.g., a package insert) containing indications, directions for use, etc.
The general scheme for producing compounds useful in this invention is illustrated and explained on the following page.
A xcex3-ketocarboxylic acid (b) can be obtained from a substituted or unsubstituted anhydride (a) (reaction 1) by a Friedel-Crafts reaction (OS, CV-I, 517, 1941) with a substituted or unsubstituted aromatic compound (R2xe2x80x94H, method A) or by reaction with a Grignard reagent Hal-(Mgxe2x80x94(Y2)pxe2x80x94R2), followed by acidic workup (method B).
Condensation of acid (b) with hydrazine leads to the annellated pyridazine derivative (c) (reaction 2). The hydroxy phthalazine (c) is converted to the thiophthalazine derivative (d) by stirring with Lawesson""s reagent for 2 hours at (80-90xc2x0 C.) (reaction 3). After treatment with base (e.g., KOH), a SN-reaction with a substituted alkyl or arylhalide generates the product (e)(reaction 4). Oxidation of (e) with oxone(copyright) gives the sulfone derivative (f) (reaction 5) where q=2.). Oxidation of (e) with H2O2 gives the sulfoxide derivative (g) (reaction 5) where q=1.
A number of xcex3-ketocarboxylic acids (b) are commercially available (e.g., from Aldrich Chemical Co.)
2-benzoylbenzoic acid
2[4-(dibutylamino)-2-hydroxybenzoyl]benzoic acid
3-benzoyl-2-pyridine carboxylic acid
2-(4-fluorobenzoyl)benzoic acid
2-aminobenzophenone-2xe2x80x2-carboxylic acid
2(3-amino-4-chlorobenzoyl)benzoic acid
4-[4-(2-carboxybenzoyl)phenyl]butyric acid
2-(4-chlorobenzoyl)benzoic acid
In summary, the reagents and conditions for the general schemes are as follows:
(1)
Method A: Friedel-Crafts Reaction R2xe2x80x94H and AlCl3 as a catalyst (p=0).
Method B: Grignard Reaction Hal-Mgxe2x80x94(Y2)pxe2x80x94R2, acid (p=0 or 1).
(2) NH2NH2
(3) Lawesson""s reagent (Aldrich), toluene, 80-90xc2x0 C.
(4)
a) KOH
b) Hal-Y1xe2x80x94R1
(5) Oxone(copyright) (Aldrich) DMA or H2O2

[4,5]-fused-3,6-disubstituted-pyridazines with sulfur-containing substituents in position three for the treatment of neoplasia

Abstract: wherein

Abstract: Y1 and Y2 are independently selected from the group consisting of (CH2)n,xe2x80x94C(X)xe2x80x94NHxe2x80x94,xe2x80x94(CH2)nxe2x80x94C(X)xe2x80x94Oxe2x80x94, and X is O or S;

Abstract: R1 is selected from the group consisting of lower alkyl, lower alkenyl, lower alkynyl, and substituted or unsubstituted phenyl, pyridinyl, and the like;

Abstract: R2 is selected from the group consisting of substituted or unsubstituted phenyl, benzyl, pyridinyl, and the like;

Abstract: xe2x80x9cAxe2x80x9d is a benzene ring fused with the pyridazine ring; and

Abstract: R3 is independently selected in each instance form the group consisting of halogen, lower alkyl, and the like.


A continuity bridge in a broadband signal tap for providing a make-before-break connection of an input terminal to an output terminal of the tap. The broadband signal tap comprises a housing and a cover that is removably connected to the housing. The interior of the housing has an input terminal for receiving a signal from the feeder cable and an output terminal for returning the signal to the feeder cable. The cover includes circuitry for splitting the signal and delivering a portion thereof to at least one subscriber port on the cover. The cover has an input socket and an output socket, each being removably engaged with and electrically connected to the input and output terminals, respectively, of the housing. The continuity bridge in the housing connects the input terminal to the output terminal upon the removal of the cover from the housing prior to the disengagement of the sockets from the terminals. The continuity bridge thus provides a make-before-break connection of the input terminal to the output terminal, thereby ensuring that there is no discontinuity of signal flow through the tap upon the removal of the cover from the housing.

Typical cable television system networks, such as for cable TV or CATV, are normally comprised of four main elements, a head end, a trunk system, a distribution system consisting of coaxial feeder cables bridged from the trunk system, and subscriber drops fed from broadband signal taps coupled to the feeder cables in the distribution system.
The head end, the central originating point of all signals carried on the network, receives disparate signals from satellite, over the air broadcasts, or cable transmissions and combines and transmits these signals as a broadband signal (generally within a range of between 5 MHz and 1 Ghz) to numerous distribution nodes via trunk cables. Each distribution node, in turn, distributes the broadband signal along with power via the coaxial feeder cables, each feeder cable terminating at a termination block. Each feeder cable has numerous broadband signal taps coupled between the distribution node and the termination block. Each of these broadband signal taps draws a portion of the broadband signal and power (hereinafter, reference to signal means both signal, and the power supplied through the same cable) for use by a subscriber, typically a home or business, and transmits the remaining broadband signal to the next tap in the feeder. The portion of the broadband signal drawn (or tapped) from the main signal is transmitted via one or more drops to a like number of subscribers. Typically, there are hundreds, and sometimes thousands, of end users or subscribers connected to the coaxial feeder cables from one node.
In a subscriber's home, the drop can terminate directly into the television receiver on 12-channel systems, or into a converter where more than 12 channels are provided. Many newer cable-ready receivers and videocassette recorders have such a converter integrated into the tuner, with a switch to enable the additional channel tuning capability. Systems providing pay services may require a descrambler in the subscriber's home to allow the viewer to receive the special channels. Some systems use addressable converters or descramblers, giving the cable operator control over the channels received by subscribers with a computer. Such control enables impulse viewing or pay-per-view television service without a technician visiting the home to install the special service.
While the main purpose of cable television is to deliver a greater variety of high-quality television signals to subscribers, there is a growing interest in interactive communications, which allow subscribers to interact with the program source and to request various types of information, such as video text. An interactive system also can provide monitoring capability for special services such as home security. Additional equipment is required in the subscriber's home for such services. Monitoring requires a home terminal, for example, whereas information retrieval requires a video text decoder or modem for data transmission.
The broadband signal taps are coupled in series along each feeder cable, where the downstream side of a section of feeder cable is connected to an input terminal of the broadband signal tap and an output terminal of the tap is connected to the upstream side of the next section of feeder cable and so on. Within the broadband signal tap the broadband signal is split by a broadband signal transformer into a main signal and a much smaller tapped portion. The small portion of the broadband signal is delivered to the subscriber through a subscriber drop cable port, termed an "F-port", which connects to his drop. The remainder of the main broadband signal is returned to the coaxial feeder cable via the tap.
A conventional broadband signal tap comprises two assemblies: a housing and a cover or faceplate. The housing is for environmental protection of the tap electronics and further provides mechanical and electrical connection to the feeder cable. The tap housing attaches to the feeder cable with an input terminal and an output terminal. These terminals typically include electrical connectors for engagement with corresponding electrical connectors on the cover so that, when the cover is installed to the housing, the broadband signal and power delivered by the feeder cable is then routed through the cover. The faceplate contains electronics that apportions the broadband signal, sending a small portion of the signal to the subscriber and returning the main portion to the feeder cable through the output terminal.
An advantage of prior art broadband signal taps is that they allow for the removal and reinstallation of the tap cover and its corresponding electronics, without the need to remove and reinstall the entire broadband signal tap; that is, without the need to mechanically disconnect the tap housing from the feeder cable. These prior art broadband taps allow for the changing of the covers to provide for a different number of F-ports for more subscribers per tap, to upgrade the tap electronics and to provide replacement electronics for taps which become nonoperational.
However, networks such as described above having the broadband signal taps coupled in series along the feeder cables have some shortcomings. Namely, if one of the broadband signal taps goes out of service, e.g., by having its cover removed, the subscribers downstream of that broadband signal tap can be deprived of service. Such an interruption can occur as a result of lightning, mechanical or electrical failure, or even if a service technician removes the cover from its housing in one of the broadband signal taps. Removing the cover breaks the signal and power electrical continuity between the housing input terminal and its output terminal. This problem is aggravated if telephone service is provided over the same cable network. Interruptions to telephone service being much less tolerable than interruptions to television service.
More than just an inconvenience, service interruptions, even if for just a few milliseconds, can have serious consequences for the transmission of digital data over cable systems. Unlike analog signals, the loss of even a short portion of a digital data transmission can render the transmission unintelligible, or cause a failure of the signals to reach their intended destination. This probability increases directly with the bit rate and for high speed data transmissions even a short interruption is not acceptable.
Moreover, many of the newer services, including data and telephony services are being delivered by network interface units (NIUs) which are powered from the subscriber drop and thus from the tap. These NIUs include power supplies which provide for small variations in the power supplied over the drop but can not regulate for the loss of power caused by the removal of a cover of one of the taps in its network connection. A loss of power to a NIU could result in the loss of data downloaded to the device or other service interruptions.
Therefore, with the advent of pay-per view and interactive television, and the increased use of cable systems for telephone voice and data transmission, it has become much more important to provide a broadband signal tap which maintains continuity of service to the subscribers. In addressing this problem, it should also be borne in mind the substantial existing infrastructure of broadband signal taps which are currently in use along feeder cables.
Accordingly, there is an increasing need for a broadband signal tap with a means for maintaining the continuity of the broadband signal and the power over the feeder cable when the tap cover is removed from its housing.
It would be additionally advantageous to provide such a means for maintaining the continuity of the broadband signal and the power when the tap cover is removed from its housing which is easily retrofitable into existing broadband signal taps.

Broadband signal tap with continuity bridge


The invention provides a coated tablet, a coating composition and a method of film coating. The coating is particularly useful for pharmaceutical tablets. The coating composition is composed of an aqueous solution of film forming inorganic salts which may be used with conventional coating techniques. Such film forming salts include sodium polyphosphate and sodium sulfate. This coating may be used on uncoated tablet cores, as a final coating or used as a subcoating for other coatings, such as enteric coatings. Use of this coating composition provides savings in cost of materials and in manufacturing efficiency over previous polymeric cellulose coatings.

In the pharmaceutical industry tablets and caplets have been coated in many ways to enhance their market appeal and to enhance their swallowability. Early work generally used sugar coatings. Later polymer coatings, often requiring the use of non-aqueous solutions, were popular, but because of environmental concerns were replaced at least in the United States by aqueous coating techniques. Thin coatings of cellulose polymers are commonly used to enhance swallowability and as undercoatings to facilitate the addition of other coatings, such as enteric coatings.


An exhaust gas purify catalyst includes a substrate (1), an oxidation catalyst layer (2) formed on the substrate (1) and containing zeolite and at least one catalytic metal, an LNT layer (3) formed on the oxidation catalyst layer (2) and containing an NOx storage material and at least one catalytic metal, and an NOx reduction layer (4) formed on the LNT layer (3) and containing Rh acting as a catalytic metal and at least one of alumina or zirconia, wherein the NOx reduction layer (4) has a larger content of Rh than that in each of the oxidation catalyst layer (2) and the LNT layer (3).

An exhaust gas treatment system for diesel engines generally includes a diesel oxidation catalyst (DOC) and a diesel particulate filter (DPF) which is arranged downstream of the DOC. The DOC oxidizes and purifies hydrocarbon (HC) and carbon monoxide (CO) in exhaust gas, and oxidizes, among nitrogen oxides (NOx), nitrogen monoxide (NO) into nitrogen dioxide (NO2). The heat of catalytic reaction generated by the DOC increases the temperature of the DPF, and the high oxidizability of NO2 promotes combustion of particulate matters (PMs) deposited on the DPF. Since activity of the DOC is low immediately after start-up of the engine, zeolite is provided for the DOC as an HC trapping material to prevent HC from being exhausted without being purified.
On the other hand, a lean NOx trap catalyst (LNT catalyst) is also utilized in lean-burn gasoline engines or diesel engines to purify NOx. An NOx storage material in the LNT catalyst stores NOx when the air-fuel ratio of an exhaust gas is lean. A rich purge changes the air-fuel ratio in the engine to rich, and releases NOx and reduces NOx with unburned gas. An alkali metal or an alkali earth metal may be used as the NOx storage material. However, an alkali metal forms a glass phase on the grain boundaries of cordierite forming a catalyst substrate to reduce strength of the substrate. Therefore, an alkali earth metal is actually adopted in general, because it will not cause such a problem.
As disclosed in Patent Document 1, in an exhaust gas purifying catalyst for gasoline engines which has been proposed, an HC adsorbent layer containing zeolite and a catalytic metal layer containing an NOx storage material are stacked one upon the other on a monolithic support. This can adsorb HC and NOx simultaneously in the exhaust gas immediately after start-up of the engine. Release of HC and NOx and reaction between that HC and that NOx after activation of the catalytic metal can purify both HC and NOx.

Exhaust gas purifying catalyst, method for producing same, and exhaust gas purification method using same


An illustrated view of an exemplary clock directed at a political figure. The clock is useful for providing a current time. The clock is further useful for providing a listener with a recorded speech for the purpose of comedy. The clock is also useful for providing a figure, such as a current President, such as President Trump, for deriving a comedic effect.

A dock is a device used to measure, keep, and indicate time. The dock is one of the oldest human inventions, meeting the need to measure intervals of time shorter than the natural units: the day, the lunar month, and the year. Devices operating on several physical processes have been used over the millennia.
Some predecessors to the modern clock may be considered as "docks" that are based on movement in nature: a sundial shows the time by displaying the position of a shadow on a flat surface. There is a range of duration timers, a well-known example being the hourglass. Water clocks, along with the sundials, are possibly the oldest time-measuring instruments. A major advancement occurred with the invention of the verge escapement, which made possible the first mechanical clocks around 1300 in Europe, which kept time with oscillating timekeepers like balance wheels.
Traditionally in horology, the study of timekeeping, the term clock was used for a striking clock, while a clock that did not strike the hours audibly was called a timepiece. In general usage today, a "clock" refers to any device for measuring and displaying the time. Watches and other timepieces that can be carried on one's person are often distinguished from clocks. Spring-driven clocks appeared during the 15th century. During the 15th and 16th centuries, clockmaking flourished. The next development in accuracy occurred after 1656 with the invention of the pendulum clock by Christiaan Huygens. A major stimulus to improving the accuracy and reliability of clocks was the importance of precise timekeeping for navigation. The electric clock was patented in 1840. The development of electronics in the 20th century led to clocks with no clockwork parts at all.
The timekeeping element in every modern clock is a harmonic oscillator, a physical object (resonator) that vibrates or oscillates at a particular frequency. This object can be a pendulum, a tuning fork, a quartz crystal, or the vibration of electrons in atoms as they emit microwaves.
Clocks have different ways of displaying the time. Analog clocks indicate time with a traditional clock face, with moving hands. Digital clocks display a numeric representation of time. Two numbering systems are in use; 24-hour time notation and 12-hour notation. Most digital clocks use electronic mechanisms and LCD, LED, or VFD displays. For the blind and use-over telephones, speaking clocks state the time audibly in words. There are also clocks for the blind that have displays that can be read by touch.
Traditionally, clocks have been a similar style and are used to tell time, provide an alarm to a preset time, and combined with radios for alarming or listening, etc. Clocks can also be used to be ornamental, though the ornamental clocks have not carried a message of the times or a comment on the current political climate. Clocks do not reflect a current event or a comment on the current event.
Accordingly, in light of the foregoing, there is a desire for a clock that has a political statement on the current political climate or to directly reflect an opinion of a President or other lawmaker. Further, there is a desire for the clock to have a podium, such as that used for speeches and the like.