Semiconductor device, static random access memory (SRAM), and their fabrication methods are provided. The semiconductor device includes a base substrate with first fins formed in adjacent device regions. An isolation structure is formed on the base substrate having a top lower than the first fins. The isolation structure includes a first region and a second region, on opposite sidewalls of a corresponding first fin. The first region is between the adjacent first fins. The isolation structure has a top in the first region higher than that in the second region. A first doped layer is formed in the first fin having a portion in the second region. A dielectric layer is formed over the base substrate and a first contact hole is formed in the dielectric layer to expose a top of the first doped layer and a sidewall surface of the first doped layer, in the second region.

With continuous development of digital integrated circuits, digital memory on chips has become an important part in the digital system. Static random access memory (SRAM) is a necessary and important component of digital memory because of its low power consumption and high speed. SRAM saves data without a continuous need of refreshing when supplied electrical power.
Basic SRAM includes six transistors: two pull-up transistors (PU), two pull-down transistors (PD), and two pass-gate transistors (PG). During SRAM memory processes, SRAM requires sufficiently high β ratio (Ipd/Ipg current ratio) for sufficiently high static-noise margin (SNM), and sufficiently high γ ratio (Ipg/Ipu current ratio) to accomplish good writability. Because of different requirements on the pass-gate transistors, there is a conflict between SRAM writability and read stability. However, conventional SRAM does not provide desirable performance.

Semiconductor structure and static random access memory, and fabrication methods thereof

Semiconductor Manufacturing International (Shanghai) Corporation

Semiconductor Manufacturing International (Beijing) Corporation


A nutritional supplement for enhancing mitochondrial function in cells includes 10-1000 mg of alpha-lipoic acid, 10-1000 mg acetyl-L-carnitine, 15-360 mg coenzyme Q-10, and 15-360 mg glutathione. The composition may further comprise a carrier for these components such as a liquid or tablet for oral ingestion on a daily basis.

Aging is a progressive accumulation of metabolic and physiologic changes associated with an increasing susceptibility to disease. Several explanations for the aging process are described in the contemporary literature. Among the most prominent is the dysdifferentiation hypothesis of aging and the membrane hypothesis of aging. The dysdifferentiation hypothesis proposes that aging is the result of a continued programmed differentiation leading to either a cessation of normal gene activity or a systematic activation of genes whose effects are deleterious to cellular function. Conversely, the membrane hypothesis of aging (MHA) states that aging is related to decreasing effectiveness of cellular protective and reparative mechanisms secondary to damage from oxygen radicals. This yields biochemical and metabolic errors, which progressively accumulate, resulting in cell aging and ultimately death. Therefore the MHA suggests that reactive oxygen metabolite (ROM) induced cell membrane structural damage is the primary mediator in cellular aging.
Reactive oxygen metabolites, also known as free oxygen radicals (FOR) are the putative initiators in the membrane hypothesis of aging. ROMs are a normal by-product of oxidative phosphorylation, and are also formed under conditions of ischemia, hypoperfusion and because of environmental contaminants. Among the many detrimental activities of ROM, or free oxygen radicals, is direct damage to mitochondrial DNA (mtDNA). Progressive accumulation of mtDNA damage renders cells unable to conduct oxidative phosphorylation reactions effectively, thereby leading to a bioenergetically deficient cell. Over time, mitochondrial DNA damage accumulates and leads to cellular dysfunction with subsequent organ failure, aging and ultimately death. This sequence forms the basis of the MHA. Additionally, there is evidence of a reduction in the oxidant-protective enzymes superoxide dis-mutase and catalase associated with aging. Thus not only are there increases in the deleterious effects of ROMs, but there is a reduction in the enzymes and mitochondrial metabolites necessary for protection from ROM and for effective mitochondrial function.
There is increasing support in the literature that reactive oxygen metabolites and mitochondrial dysfunction may initiate processes that lead to Alzheimer's disease, non-specific dementias and cognitive disorders. Thus, compounds that increase mitochondrial function and scavenge or block the activities of reactive oxygen metabolites may slow or even reverse the processes of these disorders.
Variation in life spans of certain mammalian and plant species is in part dependent upon free radical scavenging systems. It has been observed that animals with longer life spans had higher levels of SOD activity. Many studies have investigated dietary increases in antioxidants and have demonstrated life span increases by 13-30%.
.alpha.-lipoic acid
.alpha.-lipoic acid is a coenzyme for the pyruvate dehydrogenase complex in the mitochondrial matrix. It is an essential cofactor for metabolism in .alpha.-ketoacid dehydrogenase reactions. This vitamin-like substance has been supplemented orally for health benefits and has also been used as a therapeutic agent in a variety of hepatic and neurological disorders, as well as mushroom poisoning. Consideration has also been given to the use of .alpha.-lipoic acid in the treatment of diabetes mellitus and atherosclerosis, in which decreased levels of .alpha.-lipoic acid have been found. Interestingly, a specific 10.4 kb mitochondrial DNA deletion has been found in patients with diabetes mellitus and sensorineural hearing loss. Thus, it may also be hypothesized that patients with these disorders as well as aging might benefit from a diet supplemented with lipoic acid. Dietary supplementation of .alpha.-lipoic acid successfully prevents myocardial damage induced by ischemia-reperfusion injury. Presently its primary therapeutic use is for the treatment of diabetic polyneuropathy.
In physiological systems, .alpha.-lipoic acid usually exists as lipoamide covalently attached to lysine residue of the enzyme complexes. It functions in the transfer of the two-carbon fragment from .alpha.-hydroxyethylthiamin pyrophosphate to acetyl-CoA, and it gets reduced in the process. The reduced form of .alpha.-lipoic acid is dihydrolipoic acid (DHLA) containing a disulfihydral structure. DHLA has been found to exert some antioxidant actions. It has been shown to prevent microsomal lipid peroxidation by reducing glutathione which in turn recycles vitamin E. DHLA has also been demonstrated to be a free oxygen radical scavenger to reduce peroxyl, ascorbyl and chromanoxyl radicals, and to inhibit singlet oxygen.
Acetyl L-carnitine
Acetyl L-carnitine is the acetyl ester of carnitine, a biological compound which plays a key role in the transport of fatty acids from the cytosol into the mitochondrial matrix of B-oxidation. Acetyl L-carnitine modulates, through regulation of acetyl Co-A intracellular concentration, the metabolisms of sugars, lipids and amino acids, this way playing a pivotal role in cellular energy and turn over of cell membranes and proteins. Observations demonstrating a positive effect on survival were recently made on some rat populations treated with acetyl L-carnitine. The mechanisms of such an effect are currently unknown, but they are very similar to the survival observed in rats fed a restricted caloric diet. Chronic treatment with acetyl L-carnitine has shown enhanced stimulation of antiperoxidative systems, antagonism of the age-related effect on glucocorticoid secretion, increase in acetylcholine release and improvement in learning and memory. It has been reported that aged rat brain and heart possessed a reduced steady state level of mitochondrial transcripts due to reduced RNA synthesis. Pretreatment of senescent rats with acetyl L-carnitine was able to bring back the levels of mitochondrial transcripts to adult levels in a time and dose-dependent function.
Acetyl L-carnitine is capable of restoring the integrity of the cardiac mitochondrial membrane altered by aging (specifically the cardiolipin content), thereby restoring the normal activity of cytochrome oxidase, adenine nucleotide translocase, and phosphate carrier. This allows more efficient oxidative phosphorylation, and therefore, improves cardiac performance in aged animals.
Coenzyme Q-10
Coenzyme Q-10 (CoQ-10) is an important mitochondrial precursor and is essential in the transduction of energy. Reduced CoQ-10 functions as an antioxidant and can therefore combat the production of free oxygen radicals. There is evidence supporting an age-related decline of CoQ-10 in humans and other species, thus further supporting the membrane hypothesis of aging. CoQ-10 is currently used alone or in combination as a health/nutritional supplement. However, there is evidence suggesting that long-term supplementation of this precursor alone has no beneficial effect on lifespan or energy production. However, it is believed that when combined with acetyl L-carnitine and lipoic acid, cellular degeneration is limited and energy production is enhanced.
Glutathione
Glutathione (L-gamma-glutamyl-L-cysteinyl-glycine; GSH) is an endogenous thiol that detoxifies reactive oxygen species. It is also involved in the metabolism and detoxification of xenobiotics, drugs and their metabolites and offers protection from oxidizing ROM via reactions catalyzed by GSH-S-transferase, transpeptidases, transhydrogenases, and peroxidases and reductases. Mitochondrial glutathione is critical to cell viability, and the glutathione redox cycle is a primary antioxidant defense system within the mitochondrial matrix. Additional functions include intracellular binding, transport of lipophilic substances and prostaglandin synthesis.
Many studies have demonstrated that alterations of glutathione levels through excess or reduced production have a beneficial or harmful influence in cellular function, respectively. Specifically, it has been shown that sulfhydryl compounds reduce gentamicin induced outer hair cell damage in vitro and that gentamicin ototxicity, in vivo, may be reduced using glutathione, and diethyldithiocarbamate offers protection from cisplatin ototoxicity. Conversely, systemic inhibition of glutathione synthesis potentiates the ototoxicity of a combination of ethacrynic acid and kanamycin, and cis-platin rephrotoxicity is potentiated by GSH depletion. It has also been shown that the mechanism for toxicity of certain clinically used drugs occurs secondary to reduced glutathione levels with an increase in reactive oxygen species. Recent studies have demonstrated an 86% age-associated reduction in glutathione levels in the auditory nerve while other cochlear tissues have had stable levels.
Studies of patients with Alzheimer's disease have demonstrated age-dependent decreases of glutathione-peroxidase activities and their cofactors. Additionally, there was a significant increase in plasma glutathione peroxidase which was interpreted as an imbalance between reactive oxygen species and peripheral antioxidant opposing forces. These findings were not observed in controls. Other enzyme changes have been studied, including glutathione reductase, catalase and superoxide dismutase in patients with Alzheimer's disease. The findings demonstrated significantly elevated enzyme activity levels where lipid peroxidation was most prevelent, as documented with levels of thiobarbituric acid. It is believed that there is a compensatory elevation in antioxidant activity in response to increased free radical formation.
Piracetam
Piracetam (C.sub.6 H.sub.10 N.sub.2 O.sub.2) is a nootropic compound which exhibits cognition-enhancing properties possibly through a potentiation of neurotransmission, although the formal mechanism has not been established. Piracetam possesses a very low toxicity and lacks serious side-effects. This compound has been used in several clinical and experimental conditions including: the treatment of motion sickness, protection of hypoxia-induced amnesia and enhancement of acquisition in passive avoidance experiments with rats. In general, piracetam seems to be somewhat effective in patients with mild to moderate dementia, Alzheimer's disease, Parkinson's disease and in the psychotic state schizophrenics. Additionally, complete recovery of sudden deafness has been shown with piracetam. Piracetam demonstrates an ability to increase systemic and microvascular circulation possibly because of decreased platelet aggregation, enhancement of red blood cell deformability and adherence of erythrocytes to endothelial cells. Piracetam has been shown to increase the survival rate of rats subjected to hypoxia and also to decrease the time of recovery from hypoxia. Piracetam is absorbed very well after oral administration with a 100% bioavailability. It is excreted practically unchanged in the urine and completely eliminated after thirty hours.
These compounds together will synergistically act against the processes of cellular degradation through their antioxidant properties and their ability to upregulate mitochondrial function, as well as other physiologic and biochemical actions. The nutritional supplement of the present invention overcomes the limitations of the prior art in that it utilizes the synergistic combination of nutritionally effective amounts of the above-referenced compounds to enhance mitochondrial function. These and other advantages of the present invention will be readily apparent from the description, discussion and experimental examples which follow.

Therapeutic treatment for auditory function


An apparatus and method for cleaning components internal to an optical recording system without requiring the optical recording system to be disassembled. The apparatus is comprised of inlets through which pressurized gas is fed. The pressurized gas is directed through channels within the apparatus to various outlets. The pressurized gas is then expelled from these outlets. When the apparatus is inserted in the optical recording system, the outlets are located next to components sensitive to particle contamination. Thus, the expelled gas removes the particle contaminants from the surfaces of the components, thereby enhancing operation of the optical recording system.

Information storage applications continue to grow at a rapid rate due to the successful development of business and consumer products for processing data, video, and audio signals. Most notably, with the explosion of personal computer systems in the workplace, there exists a great need for storing digital data. Digital data is discrete in time and level and is typically stored in the form of binary 1's and 0's. Advances in digital storage products have mostly been limited to three key storage technologies: semiconductors (e.g., ROMs, RAMs, PROMs, "flash" EPROMs, etc.), magnetic recording systems (e.g., tapes, flexible disks, hard disks, etc.), and more recently to optical recording systems (e.g., tape cartridges, CD ROMs, laser disks, magneto-optical disks, etc.). Competing storage technologies have been all but eliminated due to the consequent and steady reductions in the price of semiconductor, magnetic, and optical storage systems.
Presently, optical recording systems enjoy great commercial appeal because of their high storage capacity, cost effectiveness, and reduced susceptibility to noise and data corruption. Optical recording systems are ideal for storing vast amounts of data on a permanent or long term basis. Furthermore, the advent of Write-Once-Read-Many (WORM) technology offers added flexibility and versatility for optical recording systems. WORM technology allows an optical medium to be repeatedly erased and written to many times over. In other words, old, useless data stored on an optical medium can now be erased and new data written in replacement thereof.
Typically, optical recording systems employ a laser or some other form of light source to "read" and "write" data from/to an optical medium. In a "write" operation, the light is directed by means of a lens assembly and focused onto the optical medium. The focused light causes a characteristic of the optical medium to become altered. The optical medium retains the altered characteristic, even after the light source has been removed. By pulsing the laser over various, designated portions of the media, digital data can be "written" and stored onto those portions. Later, the data can be retrieved by directing the light to the portion of the media containing the desired data. The data is "read" from the medium by detecting the signal contained in the light reflected off the media.
However, one common problem shared by virtually all optical recording systems is that of particle contaminants. Particle contaminants, such as dust, enter optical recording systems through various openings in the housing. One way in which particles typically enter is through the opening used to enter and remove the optical media. Sometimes, particles are also introduced into the device through the air vents. Due to the excessive heat generated by the internal circuits and power supply, open air vents are provided for cooling. In many cases, fans are used to circulate surrounding air within the optical recording system. Otherwise, the lifespan of the optical recording system would be greatly retarded. Furthermore, in certain types of optical recording systems, such as magneto-optical disk drives, it is highly desirous to keep the temperature constant, as the read/write process is temperature dependent.
Once these particles invade the interior of an optical recording system, they oftentimes settle onto sensitive components. Some of the components most susceptible to particle contamination are those of the lens assembly and, particularly, the focusing lens. Dust particles which settle on the lens used to collimate the light, the beam splitters, the mirror, and the focusing lens, interfere with the light beam used to read and write data. The direct result is an increase in the amount of noise in the signals during read/write operations. Increased noise significantly degrades the overall performance of the optical recording system because it introduces errors.
Additional circuits can be implemented to compensate for the particle contaminants. The disadvantage with additional circuits is that the circuits add to the complexity of the system and increase costs. Moreover, these additional compensation circuits would eventually be overwhelmed as more and more dust particles settle on the various components.
Furthermore, some of the particles settle on the rails and bearings used to physically move the lens to the correct track during seek operations. This could have dire consequences. These dust particles might interfere with the seek operation to cause the wrong track to be accessed. If the wrong track were accessed, the drive will have to do re-seek and the access time will increase.
Typical prior art solutions to the problems caused by particle build-up involved removing the optical recording system's housing and disassembling various circuit boards and other hardware to gain physical access to the system's optics and actuator assembly. A brush is then used to sweep the particles off these sensitive components. A test is performed on the unit to verify that it is in proper working condition. Afterwards, the unit is reassembled.
One disadvantage with his process is that it is labor intensive. In addition, the lenses are delicate and physical contact by the brush might damage them. Another disadvantage is the likelihood of accidentally damaging other components of the optical recording system during the disassembling, cleaning, and reassembling process. A further complication is that this process is typically performed at the manufacturer's facilities. As such, the unit has to be packed and shipped. The optical recording system is subject to being damaged during shipping.
One prior art apparatus and method involves implementing a cartridge having one or more brushes. When the cartridge is inserted into the optical recording system, the brushes are placed over and contact the lenses. The optical recording system's spindle motor is used to spin the brushes, thereby cleaning the lenses. Again, this process suffers from the fact that the lenses might be accidentally damaged by the physical contact with the brushes. Also, this implementation does not clean other parts of the optical recording system which are adversely affected by particle build-up, namely the actuator assembly.
Thus, what is needed is an apparatus and method for cleaning various internal components of an optical recording system which is quick, reliable, easy to use, and does not subject the components to being damaged.

Compressed air optical drive cleaning cartridge


A horizontally loadable carriage for an ink-jet print cartridge. The carriage scans in an ink-jet printer and includes a carriage body, a chute for receiving an ink-jet print cartridge, and a generally horizontal guide rail within the chute. The guide rail is arcuate and inclined slightly upward to facilitate loading print cartridges into the carriage. The carriage further includes a cantilever bias spring having a horizontal axis.

The present invention generally relates to ink-jet printers and, more particularly, to the components and subsystems therein.
The general design and construction of carriages that retain and align ink-jet print cartridges in printers and scan these print cartridges through print zones is well known. Examples of the patents that have issued in this field of technology include:
U.S. Pat. No. 4,755,836 entitled xe2x80x9cPrinthead Cartridge and Carriage Assemblyxe2x80x9d by Ta et al. issued Jul. 5, 1988
U.S. Pat. No. 4,872,026 entitled xe2x80x9cInk-jet Printer with Printhead Carriage Alignment Mechanismxe2x80x9d by Rasmussen et al. issued Oct. 3, 1989
U.S. Pat. No. 4,907,018 entitled xe2x80x9cPrinthead-Carriage Alignment and Electrical Interconnect Lock-in Mechanismxe2x80x9d by Pinkerpell issued Mar. 6, 1990
U.S. Pat. No. 5,392,063 entitled xe2x80x9cSpring Cartridge Clamp for Inkjet Printer Carriagexe2x80x9d by Rhoads issued Feb. 21, 1995.
Prior carriages have been designed to be loaded and unloaded either vertically or with a steep, inclined (i.e., generally vertical), arcuate motion. Such carriages have proven to be satisfactory as long as vertical access to the printer is provided. This has meant, however, that nothing could be permanently stacked on top of the printer.
Further, previous top loading ink-jet printer designs have fostered an increasing growth in printer height so that with each new printer design, the profile of the product grew and grew.
Additionally, it is believed that end users want a printer for home use that can be stacked in an entertainment center or used in living rooms. This is a printer that has flat top and bottom walls, that is front loading with all controls and status indicators on the front wall, and that is about the same size as a conventional stereo amplifier or a video cassette recorder (VCR). In other words, this is a horizontally loadable ink-jet printer with an overall height of less than four inches (4xe2x80x3).
Such requirements result in numerous design challenges. First, nearly all existing datum structures on present day ink-jet print cartridges are designed for vertical or near vertical installation. Front or horizontal loading has heretofore not been contemplated so if an existing datum structure is to be used, the print cartridge must be positioned in an entirely new manner. Second, on a front loading printer the field of view available to a user during cartridge installation is quite restricted. The user sees less of the carriage and less of the loading process. Third, physical access to the carriage is more limited. Fourth, if multiple print cartridges are used, they must sit so close together that much of their gripping surfaces is unavailable for unloading the print cartridge from the printer.
Thus, it is apparent from the foregoing that although there are many different carriage designs, designing a front loading, stackable, low height ink-jet printer presents many challenges.
Briefly and in general terms, an apparatus according to the invention includes a a carriage body translatable within an ink-jet printer, a chute mounted on the carriage body for receiving an ink-jet print cartridge, and a generally horizontal rail on one of the sidewalls of the chute for guiding an ink-jet print cartridge generally horizontally into and out of the carriage.
Other aspects and advantages of the invention will become apparent from the following detailed description, taken in conjunction with the accompanying drawings, illustrating by way of example the principles of the invention.

Horizontally loadable carriage for an ink-jet printer


Plant volatile oils have been found to have certain beneficial effects on the body of a human or non-human. The effects described relate to the maintenance of levels of polyunsaturated fatty acids (PUFAs), the prevention or mitigation of deleterious changes in nervous tissue, elevation of protein levels, and the prevention or mitigation of retinal degeneration.

This invention relates to the beneficial effects of plant volatile oils in a human or non-human body.
Oils from various sources have been known to have a beneficial effect in humans and animals and can provide vitamins, fats and other life-enhancing chemicals. Examples of such oils are fish oil, such as cod-liver oil.
Plant volatile oils, in particular from Thymus vulgaris, have been shown by the inventors to have beneficial effects on various tissues in the body.
From the present data, it appears that at least some of the beneficial effects of plant volatile oils on human or non-human bodies are connected with the levels of polyunsaturated fatty acids (PUFAs) in the bodies.

Beneficial effects of plant volatile oils


Embodiments of the present disclosure provide methods, devices, modules, and systems for healing non-volatile memory cells. One method includes biasing a first select gate transistor coupled to a string of memory cells at a first voltage, biasing a second select gate transistor coupled to the string at a second voltage, applying a first healing voltage to a first edge word line in order to extract charge accumulated between the first select gate transistor and a first edge memory cell stack of the string, and applying a second healing voltage to a second edge word line in order to extract charge accumulated between the second select gate transistor and a second edge memory cell stack of the string.

Memory devices are typically provided as internal, semiconductor, integrated circuits in computers or other electronic devices. There are many different types of memory including random-access memory (RAM), read only memory (ROM), dynamic random access memory (DRAM), synchronous dynamic random access memory (SDRAM), and flash memory, among others.
Flash memory devices are utilized as non-volatile memory for a wide range of electronic applications. Flash memory devices typically use a one-transistor memory cell that allows for high memory densities, high reliability, and low power consumption.
Uses for flash memory include memory for personal computers, personal digital assistants (PDAs), digital cameras, and cellular telephones. Program code and system data, such as a basic input/output system (BIOS), are typically stored in flash memory devices. This information can be used in personal computer systems, among others.
Two common types of flash memory array architectures are the "NAND" and "NOR" architectures, so called for the logical form in which the basic memory cell configuration of each is arranged. In the NOR array architecture, the floating gate memory cells of the memory array are typically arranged in a matrix.
Two common types of flash memory array architectures are the "NAND" and "NOR" architectures, so called for the logical form in which the basic memory cell configuration of each is arranged
A NAND array architecture arranges its array of floating gate memory cells in a matrix such that the gates of each floating gate memory cell of the array are coupled by rows to word select lines. However each memory cell is not directly coupled to a column bit line by its drain. Instead, the memory cells of the array are coupled together in series, source to drain, between a source line and a column bit line.
Memory cells in a NAND array architecture can be configured, e.g., programmed, to a desired state. That is, electric charge can be placed on, or removed from, the floating gate of a memory cell to put the cell into a number of stored states. For example, a single level cell (SLC) can represent two binary states, e.g., 1 or 0. Flash memory cells can also store more than two binary states, e.g., 1111, 0111, 0011, 1011, 1001, 0001, 0101, 1101, 1100, 0100, 0000, 1000, 1010, 0010, 0110, and 1110. Such cells may be referred to as multi state memory cells, multibit cells, or multilevel cells (MLCs). MLCs can allow the manufacture of higher density memories without increasing the number of memory cells since each cell can represent more than one bit. MLCs can have more than one programmed state, e.g., a cell capable of representing four bits can have fifteen programmed states and an erased state.
MLC memory stores multiple bits on each cell by using different threshold voltage (Vt) levels for each state that is stored. The difference between adjacent Vt distributions may be very small for a MLC memory device as compared to a SLC memory device. The reduced margins between adjacent Vt distributions, e.g., program states, can increase the difficulty associated with distinguishing between adjacent program states, which can lead to problems such as reduced data read and/or data retrieval reliability.
Various degradation mechanisms exist which can result in erroneous data reads of non-volatile memory cells. In a NAND array architecture, the state of a selected memory cell can be determined by sensing a current or voltage variation associated with a particular bit line to which the selected cell is coupled. Since the memory cells are connected in series, the current associated with reading the selected cell passes through several other unselected cells, e.g., cells biased so as to be in a conductive state, coupled to the bit line.
The cell current associated with a string of memory cells, e.g., cells coupled in series between a source line and a bit line, can become degraded over time due to factors such as program/erase cycling. Memory cells affected by current degradation mechanisms can become unreliable, e.g., the logical value read from the cells may not necessarily be the logical value written to the cells.


Disclosed herein is an electrolyte for lithium secondary batteries comprising: a chelating agent, which forms complexes with transition metal ions in the battery, and at the same time does not react and coordinate with lithium ions; a non-aqueous solvent; and an electrolyte salt, as well as a lithium secondary battery comprising the electrolyte. The chelating agent, which is contained in the electrolyte for lithium secondary batteries, can suppress a side reaction in which transition metal ions are reduced and deposited as transition metals on the anode. Also, the chelating agent can suppress internal short-circuits in the battery and the resulting voltage drop of the battery and a reduction in the safety and performance of the battery, which can occur when transition metals are deposited on the anode.

(a) Field of the Invention
The present invention relates to an electrolyte for lithium secondary batteries containing a chelating agent, and a lithium secondary battery comprising said electrolyte.
(b) Description of the Related Art
Recently, the compact and lightweight construction of electronic equipment has been realized and the use of portable electronic devices has been generalized, and thus studies on secondary batteries having high energy density have been actively conducted.
Lithium secondary batteries, which are currently mainly used, comprise cathode and anode made of materials capable of intercalating and deintercalating lithium ions, are fabricated by injecting a non-aqueous electrolyte between the cathode and anode, and produce electrical energy by oxidation and reduction reactions, which occur when lithium ions are intercalated into and deintercalated from the cathode and anode.
When the secondary battery is charged and discharged, transition metal ions in the battery can cause side reactions and can result in a reduction in the performance of the battery. For example, when the cathode contains Fe impurities, Fe can be ionized, and deposited on the anode, resulting in voltage drop. Also, some Co, which is used as the cathode active material, can be dissolved out and deposited on the anode, and when spinel Mn is used for the cathode, Mn can be dissolved. In addition, when a Fe olivine material is used, Fe can be dissolved out. Such side reactions deteriorate the stability and performance of the battery.
In a prior attempt to suppress side reactions, an expensive apparatus for purifying raw materials is used, the pretreatment of raw materials is performed, or other alternative materials having poor performance are used. However, such methods have problems in that they are expensive and deteriorate the performance of the battery.

Electrolyte for lithium secondary battery comprising chelating agent and lithium secondary battery using the same


A PLL includes a fractional divider to generate a periodic PLL output signal in response to REFHF. The fractional divider includes a digital control circuit (DDC) responsive to a digital control input signal and a multi-modulus divider (MMD), which is responsive to REFHF and a first digital control output signal generated by the DDC. A feedback divider (FD) is provided to generate a FD output signal in response to an MMD output signal generated by the MMD. A phase detector (PD) is provided to generate a PD output signal in response to the FD output signal and REF_CLK. A loop filter is provided to generate the digital control input signal in response to the PD output signal as modified by a noise cancellation signal (NCS). The NCS is generated to at least partially compensate for non-random deterministic noise in the MMD output signal.

Fractional-N frequency synthesizers can be used to overcome many limitations associated with integer-N frequency synthesizers. In fractional-N frequency synthesizers, the effective frequency divide ratio is a fractional number, which enables a relatively high frequency reference signal to be used to achieve fine resolution of frequencies in synthesizer output signals. This fractional number is typically achieved by periodically changing an integer divide ratio so that a desired fractional number can be approximated. One typical disadvantage associated with fractional-N frequency synthesis is the generation of unwanted low-frequency "spurs" by a dual-modulus (or multi-modulus) divider. These spurs make fractional-N frequency synthesizers impractical for many applications unless they are suppressed to a negligible level. Conventional spur reduction techniques include: (i) digital-to-analog (DAC) phase estimation, (ii) random jittering, which randomizes a divide ratio, (iii) sigma-delta (ΣΔ) noise shaping, which modulates a divide ratio, (iv) phase interpolation; and (v) pulse generation. Some of these spur reduction techniques are disclosed in articles by: S. Pamarti et al., entitled "A Spur Elimination Technique for Phase Interpolation-Based Fractional-N PLLs", IEEE Trans. on Circuits and Systems, Vol. 55, No. 6, pp. 1639-1647, July (2008); and Li Zhang et al., entitled "A Hybrid Spur Compensation Technique for Finite-Modulo Fractional-N Phase-Locked Loops", IEEE Journal of Solid-State Circuits, Vol. 44, No. 11, pp. 2922-2934, November (2009).
As illustrated by FIG. 1A, a frequency synthesizer 10 may include a fractional-N divider 12 within a feedback path of a phase-locked loop (PLL), which filters jitter in the output of the divider 12. This fractional-N divider 12 may operate by modulating between two or more integer values. The phase-locked loop of FIG. 1A contains a phase detector 14, which receives an input reference signal (e.g., 25 MHz), a charge pump 16, a loop filter 18 and a voltage-controlled oscillator (VCO) 20. This VCO 20 generates an output signal having a frequency that is a non-integer multiple of the frequency of the input reference signal. An integer divider 22 may also be provided for generating an output signal at a reduced frequency relative to the VCO output signal. Examples of the frequency synthesizer 10 of FIG. 1A are disclosed at U.S. Pat. No. 7,532,081 to Partridge et al., entitled "Frequency and/or Phase Compensated Microelectromechanical Oscillator," and FIG. 3 of U.S. Pat. No. 7,417,510 to Huang, entitled "Direct Digital Interpolative Synthesis".
FIG. 1B illustrates a frequency synthesizer 10′, which includes an integer divider 12′ within a feedback path of a phase-locked loop (PLL). This phase-locked loop contains a phase detector 14, which receives an input reference signal (e.g., 25 MHz), a charge pump 16, a loop filter 18 and a voltage-controlled oscillator (VCO) 20, which generates an output signal having a frequency that is an integer multiple of the frequency of the input reference signal. Multiple fractional-N dividers 22a-22d may be provided for generating output signals having different frequencies, which do not have integer relationships with the output frequency of the VCO 20. As will be understood by those skilled in the art, additional circuitry may be needed to reduce jitter in the signals generated by the dividers 22a-22d. The dividers 22a-22d may be provided as interpolative dividers as disclosed at FIGS. 4-6 of the '510 patent to Huang. For example, as shown by FIG. 5 of Huang, an interpolative divider can include a fractional-N divider, which receives a VCO clock. A first order delta sigma modulator receives a digital divide ratio (M/N). The integer portion of the digital divide ratio is supplied to the fractional-N divider as a divide control signal, which can be a stream of integers that approximate the fractional divide ratio. A digital quantization error, which corresponds to the fractional portion of the divide ratio, is supplied to a digitally controlled phase interpolator. The jitter introduced by the fractional-N divider can be canceled by interpolation in the phase interpolator, which is based on the digital quantization error supplied by the delta sigma modulator. In this manner, the input clock from the VCO is first divided down by the fractional-N divider according to the control information provided by the delta sigma modulator and then the phase interpolator operates to cancel quantization errors in the output of the fractional-N divider.
Additional examples of fractional-N frequency synthesizers, which utilize an accumulator within a numerically-controlled oscillator and a phase interpolator, are disclosed at FIG. 6 of the '510 patent to Huang and in U.S. Pat. No. 7,724,097 to Carley et al., entitled "Direct Digital Synthesizer for Reference Frequency Generation." Digitally-controlled oscillators containing interpolative dividers are also disclosed in U.S. Pat. No. 8,441,291 to Hara et al., entitled "PLL Using Interpolative Divider as Digitally Controlled Oscillator," and U.S. Pat. No. 8,248,175 to Hara, entitled "Oscillator with External Voltage Control and Interpolative Divider in the Output Path."
Still further examples of fractional-N frequency synthesizers are disclosed in commonly assigned U.S. Pat. No. 8,559,587 to Buell et al., entitled "Fractional-N Dividers Having Divider Modulation Circuits Therein with Segmented Accumulators," the disclosure of which is hereby incorporated herein by reference. In particular, in FIGS. 2A-2B of the '587 patent, a fractional-N divider circuit 100 is illustrated as including a multi-modulus divider 102, which is configured to perform at least /N and /N+1 frequency division of a first reference signal (REFHF) received at a first input thereof, where N is an integer greater than one. This multi-modulus divider 102 selectively performs a /N and /N+1 division according to a value of an overflow signal (OVERFLOW) received at a second input thereof. This overflow signal is generated by a divider modulation circuit and phase error calculator 104, which is shown as the divider modulation circuit 104a and the phase error calculator 104b. In particular, the overflow signal is generated in response to a digital code that specifies the sequence of division moduli to be used by the multi-modulus divider 102 when performing the /N and /N+1 frequency division of the first reference signal REFHF.
The divider modulation circuit and phase error calculator 104 of FIG. 2A includes an accumulator 106 having multiple serially-cascaded accumulator segments 106a-106n therein. These segments 106a-106n generate a corresponding plurality of segments of a count value having at least one period of clock latency therebetween, in response to corresponding bits (LSB, . . . , MSB) of a digital code and corresponding segment overflow signals. The segments 106a-106n may be synchronized with a clock signal, which is shown as a signal (f1) generated by the divider 102. For example, a relatively wide 16-bit segmented accumulator, which is typically needed for high resolution, may be defined by a cascaded arrangement of four 4-bit accumulator segments. The segmented accumulator 106 may provide advantages over typical accumulators within conventional delta-sigma modulators because the per cycle delay through the divider modulation circuit 104a is equivalent to the delay through a single segment (106a, . . . , 106n) of the accumulator 106, which may need to run at twice a frequency of an output signal (e.g., FOUT). In this manner, the segments of the accumulator 106 operate collectively as an adder with at least one cycle (and typically many cycles) of latency. This segmented "adder" does not generate accurate counts with each clock signal, but ultimately yields a correct, albeit delayed, sequence of final overflow signals (from segment 106n) at a potentially much higher frequency rate. As further illustrated by FIG. 2A, the phase error calculator 104b includes a segment (e.g., four-bit) delay block 105a that compensates for the latency between the accumulator segment values associated with segments 106n-1 and 106n. An additional accumulator segment 107 and delay block 105b, which are optional, may be used within the phase error calculator 104b to produce a delta-sigma modulated signal that represents the value in the lower accumulator segments that do not directly feed a phase correction circuit 110.
This phase correction circuit 110 is configured to generate a second reference signal (FOUT) in response to the divider output signal (f1) generated by the multi-modulus divider 102. The phase correction circuit 110 includes a D-type flip-flop 112, which has a data terminal responsive to the second reference signal FOUT and a synchronization terminal responsive to the divider output signal and a pulse-width locked loop 114. This pulse-width locked loop 114 may include, among other things, an analog phase interpolator and a digital phase selection circuit, as shown by FIG. 2B.
The phase correction circuit 110 is illustrated as including a pulse-width locked loop 114 that utilizes a delay line containing a plurality of voltage-controlled delay cells 116a-116e to achieve a delay of one VCO period and an additional VCO cell 116f to provide equivalent loading. The pulse-width locked loop 114 further includes an XOR gate 118, which operates as a pulse generator to generate a pulse having a width of four delay blocks from the delay line, a charge pump 120 and capacitive loop filter CL. As shown by the four inputs to each of the pair of multiplexers 122a-122b, digital phase selection in fine steps of TVCO/4 can be achieved with analog phase interpolation being performed between these finer steps by an output multiplexer 124. This configuration yields two (2) bits of resolution allocated to the multiplexers and additional bits of resolution in the analog phase interpolator. Although not wishing to be bound by any theory, because the edges of the signals provided to the phase interpolator are closely spaced, they typically do not need to be filtered. The close spacing may also yield greater linearity and preclude any need for trimming.
Referring now to FIG. 3, another conventional fractional-N divider circuit 100′ is shown as including a multi-modulus divider 102, which is configured to perform at least /N and /N+1 frequency division of a first reference signal (REFHF) received at a first input thereof, where N is an integer greater than one. This multi-modulus divider 102 selectively performs a /N and /N+1 division according to a value of an overflow signal (OVERFLOW) received at a second input thereof. This overflow signal is generated by a divider modulation circuit and phase error calculator 104. In particular, the overflow signal is generated in response to a digital code that specifies the sequence of division moduli to be used by the multi-modulus divider 102 when performing the /N and /N+1 frequency division of the first reference signal REFHF.
The divider modulation circuit 104a includes an accumulator 106 having multiple serially-cascaded accumulator segments 106a-106n therein. These segments 106a-106n generate a corresponding plurality of segments of a count value having at least one period of clock latency therebetween, in response to corresponding bits (LSB, . . . , MSB) of a digital code and corresponding segment overflow signals. The phase error calculator 104b includes a plurality of delay elements 105a-150b and an additional accumulator segment 107, which collectively generate multiple bits of a digital phase error that is provided to a phase correction circuit 110′. The accumulator segments 106a-106n and 107 are synchronized with a high frequency clock signal, which may be generated by a frequency multiplier 109.
This phase correction circuit 110′ is configured to generate a second reference signal (FOUT) in response to a divider output signal (f1) generated by the multi-modulus divider 102. The phase correction circuit 110′ is configured so that the second reference signal (FOUT) has a substantially jitter-free and uniform duty cycle. The phase correction circuit 110′ is illustrated as including a pair of latches (e.g., D-type flip-flops) 112a-112b, which have data terminals responsive to the second reference signal FOUT and synchronization terminals (e.g., clock terminals) responsive to true and complementary versions of the divider output signal f1, which operates as a duty cycle adjustment circuit, and an analog phase interpolator 114′. This phase interpolator 114′ may be configured as an analog multiplexer, which combines two edges of the signals generated by the flip-flops 112a-112b that are separate by one VCO period. Programmable filters 117a-117c are also provided for adjusting the edge rates of the input and output signals and, therefore, the linearity of the analog phase interpolator 114′.

Fractional divider based phase locked loops with digital noise cancellation


A toner conveying device includes a common conveyance path, toner input paths and blades. A screw for conveying a toner is installed in the common conveyance path. The toner input paths extend in an up-down direction and have lower ends connected to the common conveyance path. The blades are installed so as to make contact with a shaft of the screw and are configured to scrape off a toner adhering to the shaft of the screw. The blades are arranged immediately below the toner input paths so as to make contact with the shaft of the screw. The blades are disposed at a pitch of an integer multiple of a pitch of the fin of the screw.

The technology according to one aspect of the present disclosure relates to a toner conveying device.
An image forming apparatus such as, e.g., a laser printer or a multifunction peripheral, includes a toner conveying device that conveys a residual toner removed from an outer circumferential surface of the a photosensitive drum by a cleaning device.
The toner conveying device includes a common conveyance path for conveying a toner to a toner collection container, and a plurality of toner input paths connected to the common conveyance path.
The common conveyance path extends in the horizontal direction. A screw for conveying a toner is installed within the common conveyance path. The screw includes a screw shaft extending along the common conveyance path and a spiral fin one-piece formed with the screw shaft such that the spiral fin is wound around the screw shaft. The toner input paths extend in the up-down direction. The lower ends of the toner input paths are connected to the common conveyance path. The toner conveying device is configured to drop the toner from the toner input paths into the common conveyance path and to convey the toner with the rotating screw.


A boosting control method and control apparatus boosts an execution timing of an instruction to be executed as the result of the execution of a branch instruction without a need to wait for the execution of the branch instruction. A boosting control instruction that represents the position of a boosted instruction is placed in an instruction sequence including the boosted instruction. When the instruction sequence including the boosting control instruction is executed, the execution state of a boosted instruction that is represented by the boosting control instruction placed before the branch instruction corresponding to the execution result in the instruction sequence and that is executed before the branch instruction is controlled.

1. Field of the Invention
The present invention relates to boosting control technology for use with a pipeline processor apparatus.
2. Description of the Related Art
To allow a computer system to execute instructions at high speed, it should be controlled so that the idle state of an instruction pipeline of a processor is as short as possible, and that the instruction pipeline is not stalled. In particular, a VLIW (Very Long Instruction Word) system and a super scalar processor are provided with hardware that executes a plurality of operations at a time. To effectively use this hardware, operations to be executed should be supplied to the processor. To satisfy such a requirement, a compiler that generates execution code for the processor analyzes the dependency of data for a corresponding software and changes the sequence of the operations according to the analyzed result, without changing the purpose of the software, so as to optimize the execution code.
To further improve the operating efficiency of the hardware, a technology called boosting has been employed. This technology will be described, next.
FIG. 1 is a schematic diagram for explaining a fundamental pipeline process that a pipeline processor executes.
In FIG. 1, instructions A to D are executed at each instruction cycle by an instruction fetch unit, a register read unit, an arithmetic and logic unit (ALU), a memory access unit, and a register write unit (these are not shown).
At the instruction cycle 1, an instruction fetch stage (referred to as the F stage) for the instruction A is executed by the instruction fetch unit.
At the instruction cycle 2, a register read stage (referred to as the R stage) for the instruction A is executed by the register read unit. In addition, the F stage for the instruction B, which follows the instruction A, is executed by the instruction fetch unit.
At the instruction cycle 3, an arithmetic and logic operation stage (referred to as the A stage) for the instruction A is executed by the arithmetic and logic unit. The R stage for the instruction B is executed by the register read unit. In addition, the F stage for the instruction C, which follows the instruction B, is executed by the instruction fetch unit.
At the instruction cycle 4, a memory access stage (referred to as the M stage) for the instruction A is executed by the memory access unit. The A stage for the instruction B is executed by the register read unit. The R stage for the instruction C is executed by the register read unit. In addition, the F stage for the instruction D, which follows the instruction C, is executed by the instruction fetch unit.
At the instruction cycle 5, a register write stage (referred to as the W stage) for the instruction A is executed by the register write unit. The M stage for the instruction B is executed by the memory access unit. The A stage for the instruction C is executed by the arithmetic and logic unit. The R stage for the instruction D is executed by the register read unit. In addition, the F stage for an instruction E (not shown), which follows the instruction D, is executed by the instruction fetch unit.
In the pipeline process composed of five stages of the F stage, the R stage, the A stage, the M stage, and the W stage, it is assumed that the operation result for each instruction can be used after the W stage for the instruction is finished. In addition, it is assumed that a branch condition designated by a branch instruction is determined in the R stage.
Next, as example 1, the execution of an instruction sequence shown in FIG. 2 will be described.
In this example, to determine a branch instruction "br r2,0,L1", the operation result of an operation instruction "add r2,r3,r4" that operates on the value of a register r2, is required. Thus, as shown in FIG. 3, the R stage for the branch instruction cannot be executed until the W stage for the operation instruction is finished. Thus, an idle stage takes place in the pipeline process (in this state, an instruction is not executed). In FIG. 3, when the instruction sequence is executed, a non-operation instruction (referred to as a nop instruction) is inserted in the instruction sequence by an interlock portion of the hardware. Alternatively, when the compiler executes the instruction sequence, it places the non-arithmetic instruction in the instruction sequence.
In the state shown in FIG. 3, since the nop instruction is inserted, the execution speed of the entire pipeline process decreases. A technique that prevents the execution speed from decreasing is known. In this technique, the compiler moves an instruction to be branched to the position that just precedes a branch instruction, so as to execute the instruction to be branched without a need to wait until the execution of the branch instruction. In addition, when a branch condition determined as the result of the execution of the branch instruction is satisfied (taken), the execution result of the instruction to be branched that has been executed is validated. When the branch condition is not satisfied (not taken), the execution result of the instruction to be executed that has been executed is cancelled. This technique is called the boosting. An instruction that is temporarily executed in the condition that the execution thereof is not sure and that the validity/invalidity of the temporary execution thereof is determined corresponding to the determined branch condition, is referred to as a boosted instruction. The boosted instruction is detected corresponding to the analyzed result of the program and the collected result of statistic information by the compiler. The detected result affects execution code.
FIG. 4 is a list showing an instruction sequence including an instruction boosted from the taken side corresponding to the example 1 of the instruction sequence shown in FIG. 3. When an operation instruction "add r2,r5,r6" is boosted, it is executed as "add.b r2,r5,r6" before a branch instruction "br r2,0,L1". Thus, the number of nop instructions included in the instruction sequence to be executed can be decreased.
When the A stage of the operation instruction "add.b r2,r5,r6" is executed before the branch instruction "br r2,0,L1", the value to be written to the register r2 as the result of the execution is temporarily stored in the arithmetic and logic unit, but not written to the register r2. This value is written to the register r2 when the W stage of the operation instruction is executed. Thus, before the W stage of the operation instruction is executed, when the R stage of the branch instruction "br r2,0,L1" is executed, the content of the register r2 is not rewritten corresponding to the operation instruction to be executed after the branch instruction.
When the number of stages is large as in a super pipeline system, or when a plurality of operations are executed at a time as in a VLIW system or a super scalar processor, after the operated result becomes valid when a branch condition is determined, many instructions may be executable. Thus, the boosting technique works more effectively.
An instruction to be boosted is detected corresponding to the analyzed result of the program and the collected result of the statistical information by the compiler. As a result, the boosted instruction may be an instruction to be branched that just follows a branch instruction and that is executed when a branch condition of the branch instruction is not satisfied (namely, on the not-taken side) rather than when the branch condition of the branch instruction is satisfied (namely, on the taken side). For example, when the instruction sequence of the example 2 shown in FIG. 5 is executed, since an operation instruction "add r3,r5,r6" on the not-taken side is boosted, it is executed as an operation instruction "add.bn r3,r5,r6" before the branch instruction "br r2,0,L1" as shown in FIG. 6.
In addition, depending on the analyzed result by the compiler, an instruction on the taken side and another instruction on the not-taken side may be boosted at the same time. For example, when an instruction sequence shown in FIG. 7 is executed as example 3, since an operation instruction "add r3,r5,r6" on the not-taken side and an operation instruction "add r4,r7,r8" on the taken side are boosted, they are executed as operation instructions "add.bn r3,r5,r6" and "add.b r4,r7,r8" before the branch instruction "br r2,0,L1" as shown in FIG. 8.
In addition, corresponding to the analyzed result of the compiler, an instruction may be boosted after a plurality of branch instructions. For example, when an instruction sequence shown in FIG. 9 is executed as example 4, since an operation instruction "add r3,r5,r6" on the taken side corresponding to a first branch instruction "br r2,0,L1" is boosted, the operation instruction "add r3,r5,r6" is executed as an operation instruction "add.b r3,r5,r6" before the first branch instruction as shown in FIG. 10. In addition, when an operation instruction "add r4,r7,r8" on the taken side corresponding to a second branch instruction "br r3,0,L2" is boosted, the operation instruction "add r4,r7,r8" is executed as an operation instruction "add.b2 r4,r7,r8" before the second and first branch instructions.
However, in the conventional boosting method shown in FIGS. 4, 6, 8, and 10, to clearly represent the boosted instructions in the execution codes, instruction codes that represent boosted instructions other than conventional instruction codes are required.
For example, in the example shown in FIG. 4, the instruction code "add.b" is an instruction code boosted from the taken side corresponding to the conventional instruction code "add". In the example shown in FIG. 6, an instruction code "add.bn" that is boosted on the not-taken side is used. In the example shown in FIG. 8, both an instruction code "add.b" boosted from the taken side and an instruction code "add.bn" boosted from the not-taken side are used. In the example shown in FIG. 10, an instruction code "add.b2" boosted after a plurality of branch instructions is also used.
As described above, in the related art reference, instruction codes that represent boosted instructions other than conventional instruction codes are required. In addition, such instruction codes are required corresponding to types of conventional instruction codes. However, the types of instruction codes that are executable in the processor are limited by an instruction format defined by the processor. Thus, in the above-described conventional boosting method, instruction codes that represent boosted instructions may be not obtained. In particular, it is more difficult to obtain instruction codes that represent boosted instructions that maintain compatibility with conventional instruction codes. In contrast, to use more instruction codes that represent boosted instructions, the types of instruction codes should be reduced.

Boosting control method and processor apparatus having boosting control portion


This invention is intended to provide a layered structure in which Al alloy is directly connected to transparent oxide conducting layer without increasing electrical contact resistance between the two, with wiring resistance held low and galvanic corrosion being less likely to occur in developing solution or other electrolyte fluids, and the manufacturing method of such layered structure. The manufacturing method intended to provide such layered structure composed of the Al alloy and the transparent oxide conducting layer directly connected to each other, includes a first process to form the above transparent oxide conducting layer on a substrate, a second process to form, on the transparent oxide conducting layer, an Al alloy layer containing alloy components having less ionization tendency than aluminum, and a third process to heat the above Al alloy layer at a temperature equal to or higher than the temperature at which interchemical compound between aluminum and the above alloy components can be separated out.

1. Field of the Invention
This invention relates to layered structures used as source electrodes, drain electrodes, and other electrodes of thin-film transistors, reflecting electrodes, wiring for connection between these electrodes, storage capacitor electrodes, and common electrodes used in thin-type display devices, and the manufacturing method of such layered structures.
2. Description of the Related Art
Because of low specific resistance and easy workability, Al alloys are used as thin-film materials for wiring film, electrode film, reflecting electrode film, storage capacitor electrode film, and common electrode film in the fields of liquid display devices, plasma display devices, electroluminescence display devices, field-emission display devices, and other flat panel display devices (FPD).
For example, Japanese Patent Application Laid-open Publication No. 11-352515 describes a layered structure in which a layer of Al alloy, a low-resistance metal, is formed over ITO layer or transparent oxide conducting layer.
As to the electrical characteristic of such layered structures, the electrical resistivity of the Al alloy and the contact resistance between the transparent oxide conducting layer and the Al alloy are required to be low.
When a layered structure was used, for example, for the scanning line or the signal line of a liquid crystal display device, the conventional layered structure had no problem concerning the contact resistance between the Al alloy and the transparent oxide conducting layer, since the wiring width was long and wide and the area in contact with the transparent oxide conducting layer was broad. However, as the liquid crystal panels have become high-resolution, wirings have become narrow-pitched, picture cells have become of high aperture ratio, and wirings have become thinner, the contact resistance between the Al alloy and the transparent oxide conducting layer has grown to be no longer a matter negligible.
Also, in patterning the layered structure formed on the substrate and made of the Al alloy and the transparent oxide conducting layer, the use of developing solution for photoresist (for example, a solution consisting primarily of TMAH [=tetramethyl ammonium hydride]) involved galvanic corrosion taking place in the Al alloy causing Al alloy to come off from the ITO film. It is conceived that such galvanic corrosion was caused because there was a large difference in the electrode potentials between the aluminum in electrolyte fluid (for example, the above developing solution) and the transparent oxide conducting layer.
On the other hand, addition of alloy content to the aluminum is one way to reduce electrical contact resistance, but in that case, there is a problem in that the electrical resistance of the Al alloy layer itself is compelled to increase. Particularly when it is used for scanning lines and signal lines, the problem is that delay is caused in signal transfer speed. Therefore, there is a limit in the method of adding alloy content to the aluminum.

Layered structure and its manufacturing method


A telescopic element, particularly for frames of folding bicycles, comprising a sliding inner element that can be locked in an operating position within an outer element by a quick locking element, the locking element comprising a ring that is normally in the position for locking the axial movement of the inner element with respect to the outer element, the locking element being movable radially by means of a release button.

The present invention relates to a telescopic element, particularly for frames of folding bicycles.
The need has been felt for a telescopic element that can be quickly locked and released from the normal operating position but at the same time is also extremely resistant to the stresses to which it is subjected, for example when it is included in the frame of a bicycle or the like.

Telescopic element, particularly for frames of folding bicycles


A system, method and computer program product for generating a digital image. An initial image object defined in an initial coordinate system is determined from an image generation input. The initial coordinate system has at most four dimensions. At least one initial image transformation to be performed on the initial image object is also determined from the image generation input. Each initial image transformation is mapped to a corresponding six-dimensional transformation defined in a six-dimensional coordinate system. An updated image is calculated by applying the six-dimensional set of image transformations to the at least one initial image object. The updated image is then rendered on a user display.

As computer systems and data processing become more and more ubiquitous in society and daily life, continued improvements in data processing techniques are highly desirable. As data processing operations become more complex, and involve ever greater volumes of data, techniques for efficiently analyzing and processing large volumes of data are increasingly important.
Computer graphics can be used to process and display image data for a user. Computer graphics systems may generate image data for various different applications, such as data analysis, modelling, movie, video gaming, augmented reality, and virtual reality applications. As the level of detail presented in these applications continues to increase, the volume of data that needs to be analyzed and processed continues to increase.
Augmented reality (AR) and virtual reality (VR) applications in particular often require high volumes of complex data processing. As content is created for these applications with greater levels of resolution and faster frame rates, efficiency of image data processing may become paramount in order for the content to be displayed properly.

Data processing systems and methods using six-dimensional data transformations


The invention describes a system to compensate distortions caused by polarization modulation dispersion (PMD) in optical transmission systems and particularly transmission fibers, with a measuring device for distortions caused by PMD, an emulation unit for adjustable PMD values, a polarization transformation element, which adjusts the polarization of the signals coming from a transmission system to the PMD emulation unit, an analyzer and control unit, connected to the output signal of the measuring device, which unit controls the emulation unit and the polarization adjuster element. The invention is distinguished in that the emulation unit has a PMD emulator, which emulates PMD of second or higher order and matches PMD of a real transmission fiber as exactly as possible, and that the one or more PMD emulators compensate one or more transmission channels, and/or that the measuring device optically detects the PMD directly or by way of the detection of polarization conditions.

This application claims priority of German patent applications DE10021835.0 and DE10021836.9 filed on May 6, 2000, DE10033821.6 filed on Jul. 12, 2000 and DE10035083.6 filed on Jul. 17, 2000.
The invention concerns a system to compensate for distortions caused by PMD in optical transmission systems and particularly transmission fibers.
Because every glass fiber is unintentionally double-refractive to some degree, light signals of various polarization run through glass fiber at diverse collective speeds. Therefore, light particles of diverse polarization reach the receiver at different times with respect to one another; this running time effect results in a spreading of the received signal and thus a reduction of transmission quality. In particular, this can lead to a rise in bit error rates.
Polarization mode dispersion includes all polarization-dependent running time effects, in which the signal spreading can be fully described by the spreading behavior of two mutually independent, orthogonally related polarization modes. Because double refraction is constantly changing through external influences such as temperature and mechanical load, and in addition depends on the wave length, there is permanent variation both in the position of the principal states of polarization (PSP) and in the running time difference between the PSPs. This is referred to also as second-order polarization mode dispersion.
The result of the aforementioned effects is a time-fluctuating wavelength-dependent PMD behavior with time constants on the order of minutes.
Distortions in transmission systems caused by polarization mode dispersion (PMD) must be compensated for high-speed data transmissions in order to maintain signal quality.
A system whereby such PMD-induced distortions can be compensated, must include a measuring device for the PMD-induced distortions. In addition there must be (at least) one emulation unit for adjustable PMD values and (at least) one adaptor element or polarization transformation element, to adjust PSPs of the signals from a transmission system to PSPs of the PMD emulation unit. The emulation unit and the polarization transformation element are driven by an analyzer and control unit that is connected to the output signal of the measuring device.
Although systems of this kind have often been proposed in the literature and especially in patent documents, so far no systems have been commercially available which would satisfy the practical demands on such a system.
The reason for this, on the one hand, is that in the past no measuring device for PMD-induced distortions has been available that was sufficiently rapid and simple enough in design. The exact design of the measuring device is the subject of a parallel application. A second reason for this situation is that there has been no emulation unit that can match the PMD of a real transmission fiber and particularly of a D-WDM fiber with the greatest possible exactitude. A special emulation unit, which can also be implemented with the present invention, is the subject of another parallel application.
The invention fulfills the requirement to provide a system for compensating PMD-induced distortions in optical transmission systems and particularly transmission fibers, which system will allow compensation of PMD-induced distortions in a manner that is rapid and adequate for practical use.
Solutions of this requirement by means of the invention are provided in the independent Patent Claims. Refinements of these solutions can be found in the related Claims.
Both the emulation unit and the measuring device for the PMD-induced distortions (singly or in combination) can be further developed in the context of the invention.
In one solution of the invention, which concerns the emulation unit, said unit includes a PMD-emulator, which also emulates second-order PMD and matches the PMD of a real transmission fiber with the greatest possible exactitude.
Such an emulation unit is described in the parallel patent application by the same applicant and indicates a system for compensating first-order dispersion. After running through this system, the light enters an element which twists the polarization principal axes before and behind the element by a particular angle to one another. The light signal emerging from this element is fed into a device consisting of a polarization splitter/combiner element, a delaying path, and another polarization splitter/combiner element for reuniting the two signal tracks. Thanks to this device, in addition to producing a first-order polarization mode dispersion, it is also possible to produce a second-order dispersion. It is especially advantageous thatxe2x80x94on the basis of a system for compensating first-order dispersionxe2x80x94it is not even necessary to use additional components that would increase costs. Instead it is possible to produce, in line with this invention, a second-order polarization mode dispersion from the fact that the unused input connection of the second polarization splitter/combiner element serves as an input connection for the signal. This signal then runs through the delaying path and the first polarization splitter/combiner element in the opposite direction to the oncoming signal. At the fourth gate of the first polarization splitter/combiner element, this signal is then uncoupled. The uncoupled signal then shows the desired first- and second-order polarization mode dispersion.
A particular advantage, however, is the use of an emulation unit for adjustable PMD values, which has at least one delaying line, which is contacted by the input signal for at least one polarization control element unit. In particular, the emulation unit can preferably include several polarization adjustment element units. It is also preferable to stagger the delay periods between successive polarization adjustment element units to approach binary intervals.
With the PMD emulator of this invention, the PMD-induced distortions of one or more transmission channels can be compensated.
In another solution of the objective addressed by this invention, to create a measurement device for PMD-induced distortions, the device is designed so that it optically detects the PMD directly or by way of the detection of polarization conditions in one or more transmission channels of the transmission system. On the basis of this design, it is possible in particular that the output signal of the measuring device serves as an actual signal for the control of the emulation unit or, with multi-channel detection, for the control of several emulation units and of the superposed polarization transformation elements.
Here it is particularly advantageous if the measuring device, in addition to the optical registration, has at least one optoelectric transformer and at least one filter, which filters the output signal of the transformer, and that the filter""s output signal as another actual signal is connected to the analyzer and control unit or to a drive unit that is independent of the analyzer and control unit for one or more polarization transformation elements.
In every case, however, the control values for the polarization transformation elements, as defined on the basis of the measurement, are adjusted or regulated so that a control according to the trial-and-error principle, as used in the current technological status, can be omitted.
Here it is also most advantageous, again in the sense of an independent solution, if the one or more polarization transformation elements have as many as three or more polarization control elements or polarization-affecting elements, which guide the control and analyzer unit or the drive unit on the basis of the output signal of the measuring device. In particular, every polarization control element unit can have at least one polarization-affecting element, which exerts a mechanical effect on the fibers or otherwise influences the polarization.
The influence on polarization can, for instance, occur through elements such as liquid crystal polarization rotaters, yig crystals, or nematic components, although the aforementioned list is incomplete. In the context of this inventionxe2x80x94and also in the sense of an independent solutionxe2x80x94it is, however, particularly advantageous if elements are used that exert a mechanical effect. These elements can, in particular, be fiber squeezers or stretchers with electrically controllable elements such as piezo elements, which exert a mechanical effect on the fibers.
In the use of elements which exert a mechanical effect, it is particularly advantageous, to ensure distribution of the mechanical effect onto the greatest possible fiber length, if these elements have a ring around which the fiber is wound without any twisting. This makes it possible, thanks to the long effective fiber path, to work with comparatively small bridges. Thus fibers with a standard coating can be used, without the lifetime of the fibers being reduced in practice. It is necessary, on the other hand, at the current technological state of the art, to use a particularly hard coating so that the lifetime is at least not reduced excessively.
In another advantageous version, at least one pressure-exerting element is foreseen, which at one place at least exerts pressure on a number of fiber particles of the rolled-up fibers. This pressure-exerting element can, in particular, be an elongating element like a piezo element, which contacts at least one circle segment of the rolled-up fibers and is connected to the ring. Corresponding to the circle segments, opposing segments are foreseen, which are connected to the fiber particles and exert pressure on the fibers. This design has the advantage that an exertion of pressure on the fibers occurs without xe2x80x9cstretchingxe2x80x9d the fibers. In this version it is an advantage if it occurs in such a way that no thermal influences arise.
As already explained, another advantageous version foresees that every polarization control element has at least two polarization-affecting elements that influence the fibers in various directions, and that these directions are preferably (approximately) zero and 45 degrees.
These diverse directions can be produced in various ways:
It is possible, for instance, to provide elements between the polarization-affecting polarization-rotating elements, or to splice in polarization-rotating fibers. It is however particularly advantageousxe2x80x94since it is simple and thus economicalxe2x80x94if the various directions are produced by rotating or xe2x80x9ctwistingxe2x80x9d the fiber particles between two successive polarization-affecting elements.
It is theoretically possible that the measuring device for PMD-induced distortions is a polarimeter that is known in its own right. The measuring device used with this invention for PMD-induced distortions can, however, be constructed in a particular manner so that the input light signal and the signal of an optical element that is variable in its wavelength, for instance a filter or in particular a laser, are optically superposed and the polarization conditions necessary for measuring the PMD-induced distortion are produced as firm or adjustable figures.
In the event that only one transmission channel is detected, it is possible to use only an element that is only penetrable on a narrow bandwidth, for instance over plus-or-minus 0.5 nm, and in particular a laser. The laser in particular can be a temperature-powered and/or electrically powered DFB or VCSEL laser. If the PMD-induced distortions of several transmission channels are to be detected with the measuring device, then elements penetrable on a broadband, such as DBR or fiber lasers, can be used.
To produce measurement values in three, four, or more defined polarization conditions in particular, the polarization transformation elements can be arranged either in the branch of the input signals or else in the branch of the variable element.
The elements can be produced successively in time, for instance, producing polarization conditions of 0, 45, and 90 degrees and xe2x80x9ccircularly polarized.xe2x80x9d
The polarization conditions necessary for measuring PMD-induced distortions can also be produced simultaneously through a firm division of the input signals or of the variable signal through an appropriate system. Such a system can for instance have polarization beam dividers or instead of four polarization beam dividers an arrangement of four prisms, assembled in the manner of a polarization beam divider in order to reduce adjustment effort. If four prisms are attached to a cube, balance receivers can be used as receivers, with the signal split into the various polarization segments and the detection suppressed with one or more balance receiver disturbances, which are present without a use signal.
In addition it is preferable if the analyzer and control unit regulates the PMD compensation in such a way that the polarization condition of the optical data signal is held (almost) constant over the wavelength.
As already stated, the analyzer and control unit can drive the one or more polarization transformation elements. Alternatively, and especially because of the speed of regulation, it is preferable, however, if a drive unit independent of the analyzer and control unit is provided for the one or more polarization transformation elements. This drive unit can in particular be an analog switching device, which is more rapid than a digital signal processor (DSP) or a microcontroller.
Regardless of the type of drive, it is especially preferable if the polarization transformation element, which adjusts the polarization of the signals from a transmission system to the PMD emulation unit, is driven in modulated fashion, and it is most advantageous if the two or more polarization-affecting elements are modulated with diverse frequency. To do so it is possible that the output signal of the emulation unit is connected to the drive unit, and that the drive unit has electrical and/or optical filters with acceptance characteristics adjusted to the modulation frequencies.
To be able to regulate very quickly, it is of particular advantage that, to receive each time the weight and phase information and thus the regulating direction and regulating amplitude, the output signal of the drive unit is mixed each time with one of the modulation frequencies, and that the mixed signals serve to drive one polarization-affecting element in each case.
Through the use of reset algorithms in setting control values, it is possible to conduct endless transformations, not only with polarization elements in line with the invention, but also with conventional ones.
The system of this invention in any case has the additional advantage that the PMD compensation is independent of the bit rate of the optic data signal, that the measuring method is flexible so that no firm filter must be used, and that the measuring is not influenced by other dispersion effects, such as for instance chromatic dispersion.


A composition comprising (a) catalytically-active particles, (b) an organic compound having a pKa of at least about 18 and a basicity parameter, .beta., of less than 0.66, and (c) a polymeric binder. Also described is a process for preparing a membrane/electrode assembly, which comprises the sequential steps of (i) applying a layer of the composition of the invention to a solid polymer electrolyte, a carbon fiber paper, or a release substrate; (ii) heating the composition under conditions sufficient to volatilize at least 95 percent of component (b); and (iii) positioning the composition in contact with the solid polymer electrolyte, if the composition was not applied directly to the solid polymer electrolyte, forming the membrane/electrode assembly thereby. It has been discovered that the composition and process of the invention, when used to prepare a membrane electrode assembly (MEA) having a solid polymer electrolyte, provides an MEA which provides a relatively high voltage at a given current density and gas flow rate in a fuel cell.

This invention relates to a membrane and electrode structure composed of an ion exchange membrane having a plurality of electrically-conductive, catalytically-active particles present on one, or both, surfaces of an ion exchange membrane. These membrane and electrode structures are particularly useful in fuel cells and electrolytic cells.
It is known to prepare membrane and electrode structures by depositing a catalyst ink comprising catalytically-active particles, a suspension medium comprising a hydrocarbon having an ether, epoxy, or ketone linkage and an alcohol group, and a binder, onto a solid polymer electrolytic material such as a polymeric membrane as described, for example, in U.S. Pat. No. 5,330,860. U.S. Pat. No. 5,234,777 describes solid polymer electrolyte membrane assemblies consisting essentially of a solid polymer electrolyte membrane and a composite film of a supported platinum catalyst and a proton-conducting ionomer with a thickness less than about 10 .mu.m and a platinum loading of less than about 0.35 mg Pt/cm.sup.2. However, the performance of such structures in a proton exchange membrane fuel cell may be less than desirable for certain fuel cell applications.

Electrode ink for membrane electrode assembly


In a terminal for a rotating armature, each of bus rings (A-C) is structured such that each of ring main bodies is formed as a plate shape included in a plane orthogonal to an axial direction thereof, and has a plate-shaped piece folded in a direction along the axial direction from one end in a peripheral direction of each of the ring main bodies, the plate-shaped piece of each of the bus rings (A-C) protrudes from a resin portion, and a leading end side portion of the plate-shaped piece is formed as a weld connection portion to each of connection terminals of a coupler.

1. Field of the Invention
The present invention relates to a terminal for a rotating armature.
2. Description of the Related Art
In a conventional rotating armature, as described in Japanese patent Application Laid-open No. 2001-25187 (patent document 1), a stator is stored in a housing, resin bobbins are attached to a plurality of cores constituting the stator, respective U-phase, V-phase and W-phase coils are wound around a coil winding portion of the bobbins. A resin portion of a terminal is integrally formed by resin molding respective ring main bodies of three bus rings A to C and a neutral bus ring D that are attached to the resin bobbin of the stator. Further, the bus rings A to C of the terminal are respectively connected to the U-phase, V-phase and W-phase coil terminals of the stator, the neutral bus ring D is connected to common terminals of the respective coils, the coils are star connected, and respective U-phase, V-phase and W-phase connection terminals of a coupler are attached to a housing connected to a connection portion connected to the ring main bodies of the bus rings A to C of the terminal and protruding from the resin portion. The connection between the respective connection terminal of the coupler and the connection portion of the respective bus rings may be achieved by a welding in addition to a bolt fastening.
FIG. 13A shows a bus ring A in accordance with a conventional structure, and FIG. 13B shows a terminal 1. The terminal 1 is structured such that ring main bodies 2 of the respective bus rings A to D are arranged in parallel in an axial direction thereof so as to be resin molded to a resin portion 1A. In each of the bus rings A to D, a terminal portion 3 to which a coil terminal of each of the motor coils is connected is protruded to an outer side in a radial direction from an outer periphery of the resin portion 1A. In each of the respective bus rings A to C, a connection portion 4 welded to each of the connection terminals of the coupler is protruded to an outer side in an axial direction from a side portion of the resin portion LA. At this time, each of the bus rings A to C has an L-shaped plate-like piece 2A formed by including the ring main body 2 as a plate shape included in a plane orthogonal to an axial direction thereof, bending in an axial direction from a part of an inner periphery of the ring main body 2 and bent to an outer side in a radial direction, the L-shaped plate-like piece 2A is protruded from the resin portion 1A, and a leading end side portion of the L-shaped plate-like piece 2A is formed as the weld connection portion 4.
However, in the terminal 1, since a bent portion in the leading end side of the L-shaped plate-like piece 2A in each of the bus rings A to C is bent to the outer side in the radial direction, a complicated bending procedure is necessary, and it is necessary to form any slide metal mold 5 orthogonal to a dividing direction between the bent portion along the radial direction in the leading end side of the L-shaped plate-like piece 2A in the bus rings A to C and the resin portion 1A, at a time of arranging so as to insert the bus rings A to D within the metal mold, thereby insert molding, and intending to divide the metal mold along an axial direction P. Accordingly, an insert mold characteristic of the bus rings A to D is bad in addition to a bending formability of the connection terminal of the bus ring.


The present disclosure provides an apparatus for a cooling fan in a computer system. The apparatus comprises a plurality of bars, a plurality of slats, a knob, and at least one pin. Each slat of the plurality of slats pivotably couples to at least one bar in the plurality of bars. The knob is located at an option on each of bar of a plurality of bars. Rotating movements of the knob adjust the apparatus between a plurality of positions. The at least one pin can be received at an opening in the cooling fan.

Computer components produce heat, which in turn increases the ambient temperature in a computer system. Increased ambient temperature can damage computer components, and cause failure of the computer system. A cooling fan is typically used in a system to control the ambient temperature of the system, and to direct airflow. Conventional computer systems have an array of cooling fans, each fan pointing at different components. When properly operating, the cooling fans can provide balanced airflow over a chassis body. However, if one cooling fan fails, the air intake of the remaining cooling fans can draw air backwards through the failed fan. This disrupts the airflow through the computer chassis because some of the airflow is now reversed. This inverse airflow prevents the remaining cooling fans from properly cooling the chassis. As a result, heat is increased in the chassis body, which can eventually cause damage to the computer components. Therefore, systems are needed to ensure proper airflow through a computer system even when a fan fails.


A system includes a multi-sectional articulating arm including a first section pivotally secured to a second section, the second section pivotally secured to a third section, a wall mount secured to the first section opposite the second section, and a mounting bracket secured to an end of the third section opposite the second section.

The present invention relates generally to medical X-ray positioners, and more specifically to a portable X-ray.
Conventional X-ray positioners provide mechanical supports to hold an X-ray source and X-ray detector in opposition about a patient for a limited number of specific procedures. For procedures in which the patient is standing, the X-ray source may be attached to a pillar allowing adjustment in its height as directed toward an X-ray detector attached to an opposing wall or a second similar pillar. For procedures in which the patient is supine, the X-ray source and detector may be attached to opposite sides of a patient table. Alternatively the X-ray source and the detector may be attached to opposite ends of a C-arm which is supported by a sliding collar allowing the angle of the X-rays through the patient to be varied.
Such systems require complex multi-axis movement for simple adjustments of the X-ray tube and detector in angulation or translation, and appear to have limited utility for certain common X-ray procedures.


An imaging system includes an imaging body having an optical system and an imaging element, a power supplier configured to supply power to the imaging element, and a housing configured to hold the imaging body and the power supplier, wherein the optical system includes at least one optical element projecting from the housing, and a distance AP between a gravity center A of a portion including the optical system and a gravity center P of the entire imaging system and a distance BP between a gravity center B of the power supplier and the gravity center P of the entire imaging system satisfy the following condition.AP>BP

1. Field of the Invention
The present invention relates to an imaging system in which a lens surface projects from a housing.
2. Description of the Related Art
An imaging system using a plurality of wide-angle lenses such as a fisheye lens or a super-wide-angle lens is known as an imaging system which images all directions at one time. In such an imaging system, an image from each lens is projected on the same or corresponding sensor, and the projected images are combined by an image process, so as to produce an omnidirectional image.
When an imaging system is created with a small number of optical components, an angle of view assigned to each lens tends to be increased. For example, when photographing an omnidirectional image by using two fisheye lenses, each of the fisheye lenses requires a 180° or more angle of view.
A wide-angle lens, however, tends to have a small curvature radius on the incident side, and project from a housing. In an imaging system in which a lens surface projects from a housing, a lens is easily damaged when dropping the imaging system.
A technique described in Patent Document 1(JP S62-191838A), for example, is known as a technique which protects a lens from being damaged. Patent Document 1 discloses a camera with a lens cover in which a push button for opening and closing a lens cover is provided in a side face of a lens barrel cover on a grip side. Such a technique described in Patent Document 1 requires the push button for opening and closing a lens cover, resulting in an increase in costs.
In the above-described imaging systems, in particular, an imaging system having a linear housing, an optical system, shutter button, and power supplier are often linearly arranged. A photographer holds such an imaging system between the gravity center of the imaging system and the position of the shutter button. When the arrangement of an optical system and a power supplier, which account for a substantial fraction of the weight of the imaging system, is inappropriate, camera shake easily occurs in the case of pushing the shutter button. It therefore becomes difficult for a photographer to stably perform photographing.


An amebic glycoconjugate is disclosed that is recognized by an Entamoeba histolytica specific monoclonal antibody The glycoconjugate is isolated from the lysates of E. histolytica trophozoites, it is phosphorylated, lipid-containing, glycosylated, migrates as a polydisperse band on SDS-PAGE between about 65-200 kDa and is specifically recognized by monoclonal antibody CC 8.6, ATCC HB 11104.

This invention relates to a novel amebic glycoconjugate that is recognized by an Entamoeba histolyica specific monoclonal antibody.
The protozoan pathogen Entamoeba histolytica is a major cause of debilitating illness and death worldwide, infecting more than 500,000,000 people, and causing an estimated 50,000,000 cases of diarrhea, and 50,000 deaths yearly [Walsh in Amebiasis, Human Infection by Entamoeba histolytica, ed. Ravdin, J. I., John Wiley & Sons, Inc. New York, NY, pp. 93-105 (1988).
The ability of the protozoan parasite Entamoeba histolytica to adhere to target cells appears to be a critical component for pathogenesis. Studies of axenically cultured E. histolytica interacting with mammalian cell lines have shown that target cells in direct contact with trophozoites show extensive blebbing, morphologic changes, and trypan blue uptake, while neighboring cells not in direct contact remain intact [1]. The importance of adhesion in the pathogenesis of E. histolytica disease emphasizes the need for isolating surface molecules that may play a role in this critical function.

Amebic glycoconjugate and monoclonal antibody