A balanced bandpass preamplifier assembly (23) is disclosed for use in a locator (10) for locating a beacon transmitter (18) housed within an underground boring device (12). The bandpass preamplifier assembly (23) includes a balanced bandpass filter (28) of the Butterworth type with second order filter characteristics. The preamplifier assembly (23) provides reception of beacon frequencies at two distinct frequencies, preferably 29.430 KHz and 32.768 KHz. The antenna (14) of the . locator (10) forms the series inductance in the bandpass filter (28).

Directional drilling, subsurface boring, microtunneling and the like share the objective of producing a hole beneath the surface of the earth in a carefully controlled manner. The hole is usually required for installation of tubular members such as pipes (for natural gas, petroleum fluids, steam, water, other gases and liquids, slurries, or sewer connections), protective conduits (for subsequent installation of electrical wires, cable television lines or fiber optic cable), for direct burial of electric wires and fiber optic cable, and the like. All such activities, particularly those in the top most one hundred feet or so of the subsurface, are described as subsurface boring.
Subsurface boring is increasingly important because it allows rapid placement or replacement of gas and water lines, sewers, electrical service, cable television service and similar utility connections with minimal disturbance of roads, landscaping, buildings, and other surface features. Subsurface boring allows placement of pipe and utility connections where conventional surface installation by trenching is impractical or impossible as, for example, when utility connections must cross rivers, canals, major highways, or rail lines. Significant practical and economic advantages are derived from the ability to provide pipe and utility connections with minimal surface disturbance or to provide subsurface crossing of surface barriers.
Locating and communicating with the boring tool are problems that must be solved to realize all advantages of subsurface boring. In many boring tool systems, a small transmitting device called a beacon is installed immediately behind the drill bit. The electromagnetic field generated by the subsurface beacon is detected at the surface using devices variously called trackers or locators. The beacon's electromagnetic field is often modulated to convey subsurface information from the beacon to the system operator. Beacon signal amplitudes, measured by one or a plurality of surface antennas, can be used to calculate distance between the beacon and the tracker or locator. Depending on beacon modulation details, the subsurface beacon transmits on or around one of several possible frequencies. It is common to allow operation at one of at least two different frequencies, thereby allowing two boring operations to proceed simultaneously in close proximity while still being able to differentiate between the two by using different beacon frequencies.
As operating depth increases, locating and communicating become increasingly difficult because, in the near field, signal amplitude decreases according to the third power of distance. As in any communication system, the signal-to-noise ratio is a primary determinant of success in signal estimation and communication. Beacon power is limited, hence available signal is limited. Accordingly, noise reduction assumes great importance. With limited signal power, the only way to improve the signal-to-noise ratio is to reduce the noise.
The noise figure of the receiving channel in the tracker or locator is determined largely by the preamplifier. Therefore, improvements in the preamplifier relating to signal handling and noise rejection are of great significance to the art.
U.S. Pat. Nos. 5,155,442 and 5,337,002 by Mercer, disclose locator equipment for detecting the magnetic field transmitted by a boring tool of the type that forms a horizontal bore under the surface of the earth. The locator equipment is either hand held, in which case it is maneuvered over the surface to detect the magnetic field transmitted by a small battery-operated transmitter carried by the boring tool, or it is surface mounted at some location determined by the equipment operator. The locator equipment includes a conventional parallel LC resonant circuit to selectively receive the fundamental frequency associated with roll/pitch information transmitted by the boring tool. The capacitor component of the resonant circuit is apparently variable to either change the resonant frequency of the receiver, or to change the resonant frequency to compensate changes due to aging, temperature, calibration, etc. The shortcomings of such an arrangement are noted below and are overcome by the present invention.

Balanced passive bandpass filter and preamplifier for a receiver


This invention relates to drilling fluids and processes for making drilling fluids, such as for use in environmentally sensitive areas. The environmentally friendly drilling fluid includes a first fluid component having between about 5 weight percent to about 95 weight percent of olefins with a chain length in a range of between about C12 and about C48. The first fluid component includes at least about 50 weight percent trisubstituted olefin functionality. The environmentally friendly drilling fluid includes a second fluid component.

1. Technical Field
This invention relates to drilling fluids and processes for making drilling fluids, such as for use in environmentally sensitive areas.
2. Discussion of Related Art
Drilling fluids lubricate drilling components and carry cuttings to a surface of a borehole. Conventional drilling fluids include diesel and kerosene hydrocarbons which have poor biodegradability and/or toxicity when used in environmentally sensitive areas, such as marine environments. Synthetic drilling fluids seek to improve biodegradability, toxicity, and pour point properties. Even with the above improvements in the technology, there remains a need and a desire for drilling fluids with a low pour point and less polluting characteristics, such as good biodegradation and low toxicity.

Drilling fluid and process of making the same


A synchronized clock system, for use with an electronic system having several system nodes requiring a synchronized clock signal. The clock system may be formed in either discrete form or in integrated form, or in any combination, and includes a first synch bus and a second synch bus, isolated from the first synch bus, and at least one pair and preferably several pairs of SXO modules connected to the busses in alternating fashion. Each of the system nodes is connected at a different one of any number of arbitrarily selected connection points anywhere along the first bus. The points along the busses at which the SXO modules are connected are spaced roughly equidistantly apart. The system nodes are connected to the bus by means of signal conditioning circuits, which may include correction circuits, an amplifier, a frequency multiplier, a logic translator and a fan buffer.

This invention relates to clock systems using crystal oscillators, and in particular to such systems employing numerous crystal oscillators in a synchronized clock system.
Clock signals are the most important control signals in digital systems. Regardless of the modulation scheme, the timing of logic transitions is dictated by the system's clock. The performance of a system at any level—within a core or chip, across cores on an integrated chip, across chips on a board, or across boards—is predicated by the coordination of clock signals among the components. Example known applications can be described as follows.
Synchronous Systems. Synchronous systems provide clock signals that are frequency locked at every transmission/reception exchange and require a design with zero skew to set the phase relationship between signal and clock. Difficulties in coordinating clock signals in synchronous systems differ at the chip, circuit, and system levels. On a chip, a single clock is easily distributed to drive every element and data-clock skew is easily controlled. The situation is more complicated at the circuit (multi-chip) and system (multi-board) levels. Synchronization requires that either (1) a central clock be distributed across the circuit, (2) independent clocks local to circuit components be frequency locked, or (3) a low frequency reference clock be distributed across the circuit and multiplied up to the data rate at each component. Each of these solutions used in current systems introduces another layer of problems in component cost, design complexity, increased jitter and noise, and reduced reliability. Additionally, the difficulties increase further with component count and separation distance.
In an ideal synchronous circuit, every change in the logic levels of every component is defined by the level change of a common clock signal simultaneously; the timing of all events can be safely assumed, and there is no need for active components to monitor and coordinate the timing of different events. The real world, however, is nothing like the ideal. In real circuits, logic transitions have finite rise/fall times, signals take time to propagate, and registers have nonzero latch times. All of these factors and more combine to dictate the maximum possible system speed. At the chip level, the combination of the clock quality and the delay of each component on a chip set a limit on the maximum clock speed. At the circuit and system levels, things are different, all events may not be simultaneous, but conventionally the timing of every event needs to be in some way coordinated at the system level nonetheless. In inter-board systems (e.g. server blade applications), a module operating in one clock domain inevitably needs to send data to another module operating in a second clock domain
Currently the most common synchronous systems distribute a common clock signal by fanning out a master clock to each component of the system. A single input clock signal is re-driven by several output buffers. The buffers have propagation delay, though fan-outs are available that incorporate phase-locked loops (PLLs) to eliminate skews between the outputs. However, PLLs introduce jitter. When more than one fan-out part is required, it is important to include adjustable delay in the circuit to eliminate skew between fan-out models. In many current applications, a low frequency clock is fanned out across a system and the clock is multiplied to the data rate at each component. The jitter of the PLL multiplier's Voltage Controlled Oscillator (VCO) is added to the clock signal and, as a result of multiplication, the jitter of the clock itself increases as the square of the multiplication factor.
Another current technique for clock distribution is to simply daisy chain a single clock signal across the system. At each component, a well-tuned delay must be provided to synchronize the system. In practice, it is difficult to match impedances so perfectly that the clock signal isn't reflected at each tap. Multiple reflections interfere with the signal and introduce noise and jitter.
Skew is the fixed timing between two signals. The primary cause of skew is the difference in trace length, but anything that affects signal propagation can contribute: trace width and impedance, variations in dielectric constants, and temperature. If the receiver samples the data on the rising edge of the clock signal, then as long as the clock provides the receiver a rising edge at the right time, there is no relevant skew. However, taking jitter into account, assuring that the same clock edge that was used to generate a data transition is also used to strobe that transition at the receiver can dramatically decrease the effective jitter of the system. If the data system and the clock signal both have the same jitter, they can trace each other. Ensuring that the clock used in a receiver has the same jitter as the data is one of the driving motivations for adopting asynchronous architectures.
Asynchronous Systems. Asynchronous systems have more autonomous components than synchronous systems; they are not frequency-locked or phase-locked and, between components, delay and skew are not an issue. At the transmitter, the clock signal determines logic transitions and, at the receiver, rather than simple incoming data with the trivial assumption of synchronous timing, a separate clock must be at least temporarily phase-locked and frequency-locked so that bits can be sampled at their centers.
Current asynchronous architectures have several advantages over synchronous designs at the inter-board level, few advantages at the circuit level, and, except in the most rare cases, no advantages at the chip level. Asynchronous systems solve several of the problems presented by common synchronous systems: fan-out and the associated increased jitter does not present a problem, skew is not a problem, and having multiple clocks reduces the possibility of catastrophic central clock failure. The autonomous nature of asynchronous architecture provides scalability and redundancy. The reduced coordination between boards provides for easier addition and subtraction as needed.
However, different components must still communicate in the systems, and to do so, an element of synchronization is required. The first sacrifice made in moving from a synchronous to an asynchronous architecture is the seamless transparent timing of each event in the system. This amounts to surrendering the ultra-high performance that can only be attained in a system where every event occurs in harmony. One way to achieve the level of synchronization necessary for communication in an asynchronous system is to have the transmission of a data signal controlled by one clock, and its reception controlled by another. Another way is to use a clock recovery system. Here, the VCO of a PLL is locked to the transitions of the incoming data and is used to strobe the receiver; the clock used to reconstruct incoming data is embedded in the data itself. Other than within the clock recovery circuit where the positioning of the strobe must be well centered in the setup and hold comfort zone of the receiver, problems with skew are eliminated. The wider the bandwidth of the clock recovery circuit, the more that jitter on the clock tracks jitter on the data. In some designs, a low frequency clock signal is distributed to the receiver to aid the clock recovery circuit. PLL-based clock recovery circuits are expensive components, and the digital alternative, a Phase Interpolator (PI), is less expensive but more difficult to characterize. PIs are also more likely to suffer nonlinear effects and usually require a distributed clock.
The general concept of having two synchronization busses and connecting clock modules to them alternatingly was described in The Future of Multi-Clock Systems, by Ransom Stephens, Roman Boroditsky and Jorge Gomez, DesignCon 2008. That paper described a synchronous clock circuit with the Sync In of a first SXO module being connected to the Sync A bus, the Sync Out of the first SXO module being connected to the Sync B bus, the Sync In of a second SXO module being connected to the Sync B bus, the Sync Out of the SXO second module being connected to the Sync A bus.
This invention relates to improvements to the systems described above, and to solutions to some of the problems raised or not solved thereby.

System employing synchronized crystal oscillator-based clock, to be used in either discrete or integrated applications


Various methods and systems are provided for an axial turbine including a containment shroud. In one example, an axial turbine for use in an engine system comprises a turbine disc/blisk and a shroud housing the turbine disc/blisk, the shroud including a first region, a second region, and a third region. A thickness of the second region is dependent on a length between the first region and the third region, and the third region has a burst strength that under a burst condition retains one or more fragments of the turbine disc/blisk.

Turbochargers may be used in an engine system to increase a pressure of air supplied to the engine for combustion. In one example, the turbocharger includes a turbine coupled in an exhaust passage of the engine which at least partially drives a compressor via a shaft to increase the intake air pressure. Exhaust gas passing through the turbine rotates the blades of a turbine disc, which is coupled to the shaft. The performance of the turbine disc assembly (bladed disc assembly) or turbine blisk (integral bladed disc) may be achieved by controlling the blade tip clearance between the blades/buckets and a turbine shroud. Depending on operating conditions, the turbine disc may rotate at speeds exceeding 25,000 RPMs. In the event of degradation of the turbine resulting in release of part or the entire turbine disc, catastrophic damage to the turbine, as well as other system components in the vicinity of the turbine, may occur if the released turbine disc fragments are not contained.
To contain a released turbine disc, the turbine shroud, typically designed to provide turbine performance, may be designed to absorb the impact of any released disc fragments. However, material and packaging constraints may result in regions of the shroud that are unable to withstand the impact of a high-energy fragment release, particularly when the shroud is subject to the high temperatures present in the exhaust of an engine.


A ballast for an electrodeless gas discharge lamp comprises a load circuit including an r.f. inductor for generating an r.f. field for powering the electrodeless lamp and a serially connected resonant capacitance. The inductance of the r.f. inductor has a substantial effect in determining a frequency of resonance the load circuit. A d.c.-to-a.c. converter circuit is coupled to the load circuit for inducing a.c. current therein. It comprises first and second converter switches serially connected in the foregoing order between a bus node at a d.c. voltage and a reference node, and being connected together at a common node through which the a.c. load current flows. The first and second converter switches each has a control node and a reference node, the voltage between such nodes determining the conduction state of the associated switch. The respective control nodes of the first and second converter switches are interconnected. The respective reference nodes of the first and second converter switches are interconnected at the common node. A control circuit provides a control signal on the interconnected control nodes, and comprises a driving inductor coupled between the common node and the interconnected control nodes. The driving inductor is mutually coupled to the r.f. inductor for sensing voltage across the r.f. inductor.

Co-pending, commonly owned application Ser. No. 08-897,435, filed Jul. 21, 1997, entitled "Ballast Circuit for Gas Discharge Lamp," by Louis R. Nerone (the present inventor), David J. Kachmarik, and Michael M. Secen, discloses and claims a ballast for an electrodeless lamp. The ballast includes a d.c.-to-a.c. converter formed of a pair of serially connected switches having opposite conduction modes. For instance, one switch may be an n-channel enhancement mode MOSFET, and the other, a p-channel enhancement mode MOSFET, with their sources interconnected at a common node. This allows a single control voltage applied to the gates, or control nodes, of the MOSFETs, to alternately switch on one MOSFET and then the other.
The foregoing ballast includes, in a resonant load circuit, both an r.f. inductor for generating high frequency fields for energizing the electrodeless lamp, and an inductor selected to set a resonant frequency of operation of the load.
It would be desirable to provide a ballast for an electrodeless lamp which, on the one hand, benefits from the simplicity of switch control obtained by using switches of different, or complementary, conduction types, while, on the other hand, reducing the parts count of the ballast, to reduce ballast cost.

Electrodeless lamp arrangement wherein the excitation coil also forms the primary of the feedback transformer used to switch the transistors of the arrangement


A method of producing hybrid seeds for annual cotton by cultivating perennially, including the steps of: 1) planting annual cotton parent strains for hybridization and identifying the natural wintering capability thereof; 2) for annual cotton parent strains incapable of wintering naturally, taking a perennial cotton capable of wintering naturally as a rootstock and the annual cotton incapable of wintering naturally as a scionwood for grafting, and carrying out the perennial root culture of the obtained grafted plant; for annual cotton parent strains capable of wintering naturally, directly planting the strains and carrying out the perennial root culture of seedling plants thereof, or carrying out the perennial root culture of grafted plants thereof obtained according to the above grafting method; and (3) hybridizing the seedling plants and/or the grafted plants to produce seeds in the year of planting and/or grafting and period of perennial cultivation.

1. Field of the Invention
The invention relates to a method of producing hybrid seeds of crops, and more particularly to a method of producing hybrid seeds for annual cotton by cultivating perennially.
2. Description of the Related Art
Although the advantages of cotton hybridization is significant, almost all existing hybrid seeds are planted in main cotton production areas by artificial emasculation hybridization using annual upland cotton (Gossypium hirsutum) or annual Gossypium barbadense parent strain, or by hybridization of an annual male sterile line and a restorer line. The main disadvantages are summarized below:                1) land must be ploughed up annually, and parent strain seeds must be sowed and bred annually.        2) roguing for parental propagation and hybrid seed production must be carried out annually.        3) although it is easy to find a restorer line and form heterosis crosses by using a genic male sterile line, the sterile line is difficult to propagate. This could be achieved generally by hybridization of male sterile plants (genotype: msms) and fertile sister plants thereof with fertile hybrid gene (genotype: Msms) which are isolated from a dual-use genic male sterile line, and the seed collected from the sterile plants still represents 1:1 in male sterile plants and male fertile plants for propagation. Therefore, 50% of the male fertile plants in female parent area must be removed from the hybrid seed production field each year, which is a concentrated and labor-intensive work. As cotton has an indefinite inflorescence with long flowering period, once the temperature exceeds 35° C., some male sterile strains will produce small or micro amount of pollen, which will affect the purity of hybrid seeds. In addition, because of non-uniform distribution of fertile plants and sterile plants, often fertile plants have to be removed continuously. It not only causes a waste of land, but also increases seed production cost.        (4) Although backcrossing of a cytoplasmic male sterile line and maintainer line can maintain male sterility, most of the existing cytoplasmic male sterile lines has harknessii cytoplasm, in which the restorer line is less and the hybridization generation contains adverse effects of sterile cytoplasm. Other types of cytoplasmic male sterile lines are prone to have genetic drift due to years of generative propagation sexually, leading to occurrence of fertile plants in a sterile line.
In spite of the fact that artificial emasculation hybridization needs high investment and cost, since there is no other better methods for hybrid seed production, artificial emasculation hybridization is still a main method for hybrid seed production. To reduce the seed production costs, generation F2 is generally used in cotton production.

Method of producing hybrid seeds for annual cotton by cultivating perennially


Within a process for recycling of PET-material and/or objects of PET, the PET-material to be processed is heated and dried in the course of a pre-treatment step and simultaneously is crystallized at elevated temperature. This pre-treatment step is followed by a main-treatment step under vacuum. In this main-treatment step, the processed material is again dried and crystallized at a temperature that is higher than the temperature of the pre-treatment step. Preferably, also in the main-treatment step no plasticizing of the material takes place; the plasticizing or, respectively, melting of the material takes place only after the main-processing step.

The invention relates to a process and an apparatus for recycling of PET-material.
Under PET-material (material of polyethylene terephthalate) all PET-materials and/or PET-objects are to be understood, also those of BOPET (bi-oriented PET), in particular pieces, milled bottle material, foils, fibers, flakes and the like.
When recycling articles of polyethylene terephthalate or of polyethylene terephthalate materials it is of importance that the PET-material to be recycled is as dry as possible in order to avoid a hydrolytic degradation of the molecule chains by the influence of hydrogen during plastifying or during the melting step. However, an efficient drying is possible only at elevated temperature at which the amorphous PET-particles or PET-parts adhere to each other. For these reasons, a crystallization of the PET-material should be obtained before drying. Such a crystallization can be obtained by uniformly moving or mechanically treating the particles at a temperature lower than the drying temperature, in any case at a temperature that is lower than the plastifying temperature.
However, since the PET-materials to be recycled or the articles consisting of PET, in particular PET-bottles, are mostly soiled and are washed and possibly previously comminuted, at which procedure a simultaneous soiling frequently cannot be avoided, in most cases the material is discretely comminuted or milled, washed and dried. Such a pre-drying should be at least so efficient that the moisture content does not exceed a value of 1.5 weight- % of the PET-material to be treated or to be recycled.

Process and apparatus for recycling of PET-material

Abstract: An apparatus for performing this process comprises a pre-processing device (3) in which the processed material is dried and simultaneously crystallized at elevated temperature, and, if desired, is also comminuted. A main-processing device (4) is connected to this pre-processing device (3), in which main-processing device the supplied PET-material is dried, crystallized and heated to a temperature that is higher than the temperature within the pre-treatment device.


An improved transformer-less electronic isolating transformer is obtained with an output subcircuit that outputs a controlled current rather than voltage. Specifically, the improved hybrid comprises an output drive subcircuit that receives an ac signal and creates a corresponding current that is passed to the line that supports two way communication. The subcircuit not only converts the applied voltage to current but includes means for effecting gain. Signals arriving to the hybrid from the line are applied directly to a near-end echo circuit that is also responsive to the signal applied to the output drive subcircuit. Both the input of the output drive subcircuit and the output of the near-end echo subcircuit are isolated with opto-isolators that employ photodiodes in their photo-voltaic mode.

This invention relates to telephone hybrids, which are used to separate signals that flow over a line in both directions into component uni-directional signals.
FIG. 1 depicts the basic prior art arrangement for realizing a transformer-less hybrid circuit as gleaned, for example, from U.S. Pat. No. 4,056,719 issued Nov. 1, 1977 and assigned to the assignee of this invention. FIG. 1 depicts a central office driver 20 that is connected to customer apparatus 10 via impedance 21, which impedance represents the wire resistance from the customer apparatus to the central office. The customer apparatus signal that is destined to the central office is developed by driver 30, which is connected to the central office line (and impedance 21) via resistor 31. The side of resistor 31 that is closer to amplifier 30 is connected to the negative input of amplifier 40 through resistor 32 and the other side of resistor 31 is connected to the positive input of amplifier 40. The output of amplifier 40 is fed back to the negative input of amplifier 40 via resistor 33.
The signal across resistor 31 is a combination of the current induced by driver 30 and by driver 20. It can be shown, however, when R.sub.33 R.sub.32 =R.sub.32 R.sub.21, the output of amplifier 40 is equal to the output of driver 20, thus developing a signal that is devoid of the driver 30 signal. Although the FIG. 1 circuit eliminates the contribution of driver 30 from the output of amplifier 40 (this contribution is often called the "near end echo") it is also known that a portion of the signal of driver 30 that travels to driver 20 reflects off driver 20 because of an impedance mismatch and returns to the customer's apparatus. This portion, which is often called the "far end echo" can not be readily distinguished from the true output of driver 20 and cannot be easily removed from the output of amplifier 40. Far-end echoes can be canceled, however, with an echo canceler that follows amplifier 40 and which trains on the particular characteristic of the signal path from driver 20 to amplifier 40. It appropriately subtracts from the signal arriving from amplifier 40 a filtered portion of the driver 30 output signal.
Echo cancelers are linear circuits, however, and therefore, nonlinearities that are introduced into the far end echo by the transformer cannot be canceled out.
In applications where ground isolation of the central office from the customer equipment is desired, a single isolator can be inserted between resistor 31 and the central office line. As mentioned above, however, any nonlinearities that are introduced by such an isolator cannot be eliminated by the action of resistor 31 and cannot be eliminated by echo cancelers. To overcome this problem, the aforementioned U.S. Pat. No. 4,056,719 discloses a transformer-less arrangement which employs opto-isolators in both paths. In particular, one opto-isolator is placed prior to driver 30 and the other opto-isolator is placed following amplifier 40. That means, of course, that the power supply voltages used to operate driver 30 and amplifier 40 have a common ground with driver 20.
Two problems arise in this arrangement. First, the power supply for driver 30 and amplifier 40 must be developed from the signal arriving at the customer apparatus via impedance 21. Since any dc current drawn for the purpose of powering elements 30 and 40 also causes a voltage drop across impedance 21, there is a limitation on the maximum dc power supply that can usefully be created for elements 30 and 40. In turn, a limitation of the dc supply that powers driver 30 limits the voltage excursions at the output of amplifier 30. The second problem with the FIG. 1 arrangement is that the power transferred to the central office from driver 30 is further limited by the power lost in resistor 31.


An analyzing system analyzes object signals, particularly voice signals, by estimating a generation likelihood of an observation vector sequence being a time series of feature vectors with use of a Markov model having a plurality of states and given transition probabilities from state to state. A state designation section determines a state i at a time t stochastically using the Markov model. Plural predictors, each of which is composed of a neural network and is provided per each state of the Markov model, are provided for generating a predictional vector of the feature vector x.sub.t in the state i at the time t based on values of the feature vectors other than the feature vector x.sub.t. A first calculation section calculates an error vector of the predictional vector to the feature vector x.sub.T. A second calculation section calculates a generation likelihood of the error vector using a predetermined probability distribution of the error vector according to which the error vector is generated.

1. Field of the Invention
The present invention relates to a generating system using hidden Markov models for analyzing time series signals such as voice signals, and more particularly, to a system providing non-linear predictors comprised of neural networks.
2. Description of the Related Art
Conventionally, various systems for analyzing time series signals such as voice signals have been developed.
As an example of such an analyzing system for time series signals, in FIG. 8, there is shown an apparatus for speech recognition using a hidden Markov model (hereinafter, referred to as HMM).
In the system shown in FIG. 8, a speech analyzing section 101 transforms input voice signals into a series of feature vectors using a known method such as a filter bank, Fourier transformation, or LPC (Linear Predictive Calculation) analysis. Each feature vector is formed for every predetermined time period (hereinafter referred to as a "frame"), for instance, 10 msec. Accordingly, the input voice signals are transformed into a series x of feature vectors x.sub.1 to x.sub.T wherein T is a number of frames. A section 102 is denoted a "code book" and has stored therein representative vector labels.
A vector quantizing section 103 replaces respective feature vectors of the vector series x with the representative vector labels estimated to be nearest thereto, respectively, with reference to the code book 102.
The series of labels thus obtained is sent to a probability calculation section 106. This section 106 calculates a generation probability of the label series of an unknown input speech using HMMs stored in an HMM memory section 105.
These HMMs are formed in advance by an HMM forming section 104. In order to form HMMs, an architecture of the HMM such as a number of states, and transition rates allowed between individual pair of states, are first determined. Thereafter, a plurality of label series obtained by pronouncing a word many times are learned and generation probabilities of respective labels generated according to the architecture of the HMM are estimated so that generation probabilities of respective label series become as high as possible.
The generation probabilities calculated by the section 106 are compared with each other in a comparison and judging section 107 which distinguishes a word corresponding to the HMM and which provides a maximum generation probability among the HMMs corresponding to respective words.
The speech recognition using HMMs is effected in the following manner.
Assuming the label series obtained from an unknown input as O=o.sub.1, o.sub.2, . . . , o.sub.T and an arbitrary state series of a length T generated corresponding to a word v by the model .lambda..sup.v as s=s.sub.1, s.sub.2, . . . , s.sub.T,
a probability at which the label series O is generated from the model .lambda..sup.v is given by;
[exact solution] ##EQU1##
[approximate solution] ##EQU2##
or in a logarithmic form, ##EQU3##
wherein P(x,y.vertline..lambda..sup.v) is a simultaneous probability density of x and y in the model .lambda..sup.v.
Accordingly, the result of recognition is obtained using one of the equations (1) to (3), for instance the equation (1), as follows; ##EQU4## P(O,S.vertline..lambda.) is calculated in the case of the equation (1) as described below.
Assuming that a generation probability b.sub.i (O ) of a label o and a transition probability a.sub.ij from one state q.sub.i to another state q.sub.i (i,j are integers from 1 to I) are given to every state q.sub.i of the model .lambda., the generation probability of the label series O=o.sub.1, o.sub.2, . . . , o.sub.T to the state series S=s.sub.1, s.sub.2, . . . , s.sub.T in the model .lambda. is defined as follows; ##EQU5##
wherein a.sub.s0 s.sub.1 is an initial probability of the state s.sub.1 and s.sub.T+1 =q.sub.f is a final state in which no labels are generated.
Although individual input feature vectors x are transformed into labels in the above example, there is also proposed a method in which a probability density function of each feature vector x in each state is given without using labels. In this case, the probability density b.sub.i (x) of the feature vector x is used instead of b.sub.i (o) and the above equations (1), (2) and (3) are rewritten as follows;
[exact solution] ##EQU6##
[approximate solution] ##EQU7##
or, in a logarithmic form, ##EQU8##
The final recognition result v of the input voice signals x is given by the following equation in both methods provided that the model .lambda..sup.v (v=1 to V) has been prepared. ##EQU9##
in which X is a series of labels or a series of feature vectors in accordance with the method employed.
A typical conventional HMM used for speech recognition is shown in FIG. 9 in which q.sub.i, a.sub.ij and b.sub.i (x) indicates an i-th state, a transition probability from the i-th state to j-th state and a probability density of the label of the feature vector x.
In this model, the state q.sub.i is considered to correspond to a segment i of the speech corresponding to the HMM. Accordingly, the probability density b.sub.i (x) in the case that x is observed in the state q.sub.i is considered to be the probability density in the case that x is generated in the segment i and the probability density a.sub.ij is considered to be the probability in the case that x.sub.t+ 1 at time t+1 is again included in the segment i when x.sub.t at time t is included therein. According to the above, the following two points may be identified as drawbacks in the conventional HMM.
(1) Dynamic features, i.e. features in the time variation of feature vectors are not suitably represented, since parameters defining the function b.sub.i (x) are assumed to be time-invariant, for instance, in the case where the distribution of x is assumed to be a normal distribution, and accordingly they are given by a matrix covariant with average vectors.
(2) Since transition probabilities a.sub.ii and a.sub.ij are assumed to be constant regardless of the length of the tribus of the state q.sub.i in the conventional HMM, although the length t of the segment i is considered to be subject to a probability distribution, the length of the segment i is subject to an exponential distribution as the result thereof and, accordingly, this distribution can not properly represent an actual state.
In FIG. 10, a result of analysis with respect to a voice signal as shown in (a) thereof is shown in (c) thereof which is obtained by using an HMM as shown in (b) thereof.
As is apparent from comparison of (c) with (a), the resultant vectors exhibit unnatural jumps between adjacent states.
In order to solve the second problem, there have been proposed methods in which Poisson distribution and/or .GAMMA. distribution are used as a probability density function d.sub.i (.tau.) related to the length t of the tribus of the state q.sub.i.
However, these methods fail to completely solve the problems of the conventional HMM method.
In the meanwhile, it has been reported that the neural network model is very effective for pattern recognition and feed forward type neural network exhibits an excellent property to static patterns. However, it has not been impossible to apply the neural network to non-static signals, such as voice signals, accompanying non-linear expansion and contraction of the time axis.

Voice analyzing system using hidden Markov model and having plural neural network predictors

Matsushita Electric Industrial Co., Ltd.


The present invention relates to the field of computer-aided text and speech processing, and in particular to a method and respective system for converting an input text given in an incomplete language, for example a language, in which unvowelized text is used, into speech, wherein a computer-aided grapheme-phoneme conversion is used. In order to improve completion of the text, it is proposed to    a) use statistical methods including decision trees and stochastic language models for enriching, i.e. completing said input text with missing information—which may be desired for a full understanding of the input text    b) subjecting the completed input text to said grapheme-phoneme conversion to produce synthetic speech.

1.1. Field of the Invention
The present invention relates to the field of computer-aided text and speech processing, and in particular to a method and respective system for converting an input text given in an incomplete language, into speech, wherein a computer-aided grapheme-phoneme conversion is used.
1.2. Description and Disadvantages of Prior Art
The term "incomplete" language used herein shall be understood to be a language, which does not necessarily contain a complete syntactic description of phrases in its textual representation. Good examples are the "natural" semitic languages (such as Arabic and Hebrew), in which written text often lack vowels. Other examples are "artificial" languages, which may be used to abbreviate complete text.
The present invention will thus be defined from prior art by aid of the Arabic language, as it can be very advantageously applied to the processing of Arabic, a member of the family of Semitic languages, that does only occasionally make use of vowels when written.
1.2.1 Introduction to Arabic Language
Arabic is one of the Semitic languages and is an important language to religion and literature. Arabic is spoken by almost 200 million people in more than twenty two countries.
Arabic Text
The most striking difference between Arabic and other languages is that Arabic text is usually presented without vowels and other diacritical marks. Vowels, when used, are presented by diacritical marks, placed above or below the character. The process of adding vowels and other diacritical marks to Arabic text can be called Diacritization or, for simplicity, Vowelization. Vowelization defines the sense of each word, and how it will be pronounced. However, the use of vowels and other diacritics has lapsed in modern Arabic writing. It is, therefore, the norm for an entire formal Arabic newspaper to have only a dozen or so thoughtfully-used vowels and diacritics placed only where there is not enough context to know what is intended.
These zero-width optional elements are used occasionally to disambiguate homographs when there is insufficient context for the reader to do so. A good reader anticipates these potential ambiguities and inserts shorts vowels and diacritics as needed, such as to disambiguate the Arabic for "Amman" and "Oman", or to indicate the passive voice. Occasionally one hears professional news announcers pause and backtrack to re-read a passage with a different "vocalization" of a word.
Vocalization
In any vocalized language vowels play an important role since they are-the most prominent and central sound of a syllable. The vowels help us to join consonants to achieve a full sound. In English a, e, i, o and u (also y) are the vowels which are clearly spelled out in a text, whereas in Arabic they are not.
Arabic Vowels and other Diacritics
Arabic has three short vowels:                1. The Fathah sign () represents the "a" sound and is an oblique dash over a consonant like         2. The Kasra sign () represents the "i" sound and is an oblique dash under a consonant like         3. The Damma sign () represents the "u" sound and is a loop over a consonant that resembles the shape of a comma, like
In addition there are three kinds of diacritics:                1. "Sukun", written as a small circle above the Arabic consonant, is used to indicate that the letter is not vowelized. In this patent application we will refer to sukun as "0".        2. "Shadda" is a gemination mark that is placed above the Arabic letters and results in a repetition of the letter at the phonemic level. We will be referring to it here as "˜".        3. "Nunation" is expressed by one of three different diacritics (Fathatan, Dammatan, Kasratan). These are placed above the last letter of the word and have the phonetic effect of placing an "N" at the end of the word.
In the remainder of this patent application we will distinguish between vowel signs and other diacritical marks only if it is required for purposes of illustration or in cases of exception. In general, we will refer to both groups of marks as vowels, and will refer to written text that makes use of any vowel signs and/or diacritical marks as vowelized text. In contrast, all other written text is referred to as un-vowelized text or simply as text, which is often used as input to the inventional method.
Problems in Automatic Speech and Natural Language Processing
As mentioned above, almost all written Arabic text—for example all newspaper text—is un-vowelized, which may lead to ambiguity in meaning and different possibilities of pronunciation. A normal Arabic speaker can put vowels "on the fly" while reading to get the intended meaning; readers usually apply their linguistic and semantic knowledge to resolve ambiguities.
While humans perform quite well on this task, the omission of vowels in written text leads to some serious problems for automatic speech and language processing systems. For example, the language model component of an automatic speech recognition system requires vowelized text in order resolve ambiguities and to achieve very high transcription accuracy.
Even more obvious is the fact that on-line vowelization of written text is indispensable for a text-to-speech (TTS) system, in order to correctly pronounce the input text.
For the construction of such speech technology components, current state-of-the-art speech recognition applications usually use manually vowelized text, which is tedious and error prone to create and results in less reliable components.
State-of-the-art TTS systems, as represented simplified in FIG. 1 may be used for a large variety of applications 10A, 10B, etc. Examples are telephony applications used for call-centres and elsewhere. A text written in a Semitic language is input into a vowelization tool 13, which is used and developed by a plurality of highly skilled developers 14, who apply an ensemble of morpho-syntactical rules, usually including a determination of etymological roots of text components, the determination of casus, numerus, and genus, and part-of-speech tagging, i.e. the identification of word types (nomen, verbum, adjective, etc.). Usually, also a semantic analysis is performed in order to determine the meaning of a word in its context. By applying this ensemble of rules the missing vowels and other diacritical marks are inserted into the original input text.
Those rules are depicted by reference sign 15, and an exemplary plurality of exceptions is depicted with reference sign 16 in order to illustrate the empiric character of this rule collection. Rules and large exception dictionaries are often stored electronically as part of the front-end component 18 of a text-to-speech (TTS) system. As depicted in FIG. 3, which is a schematic block diagram representation illustrating some more details of the prior art TTS conversion, the TTS-front-end also generates a phonetic description (also known as "baseform") and a prosodic description (aka intonation contour) of the input text.
The TTS back-end component 19 generates synthetic speech signals 11 from the above-mentioned phonetic and prosodic description for outputting via a speaker system.
The above-mentioned TTS engine including the front-end 18 and back-end 19 thereof is implemented in prior art usually as a component of a prior art voice server, which is schematically illustrated in FIG. 2. As FIG. 2 illustrates, such prior art voice server further comprises a speech recognition engine 22, as most of the applications are operating fully bidirectional, i.e. they convert speech to text and vice-versa. Further, the voice server 22 comprises a voice browser 20 for rendering the acoustic or textual information, connected to a telephony stack 26, which handles the incoming calls. A JAVA speech application programming interface (JSAPI) component 25 receives audio signals, words and grammars corresponding to a respective telephone call structure from the voice browser component. The JSAPI component co-operates with the speech recognition engine and the text-to-speech engine 22 as it is known from prior art. The present invention basically improves the TTS engine 18, 19 and improves the training, the speech recognition engine 22 is based on.
Further, according to FIG. 2, the prior art environment comprises an interface to a co-operating web application server 24 which may be implemented on a PC system, either desktop or portable, possibly together with the before-mentioned applications or the respective application components and the voice server itself, or which may run in a client-server environment.
As mentioned above, the use of un-vowelized text is common in written Arabic. An average Arabic speaker or reader will add vowels on the fly while reading to get the intended meaning. In contrast, the use of un-vowelized text by a computer program that performs any kind of natural language processing is almost impossible, because such text is highly ambiguous: without a mechanism for vowelization, the system would simply behave unpredictable.
For an illustration of the problem, consider the following example that—for the purpose of explanation—is given in English: Imagine that English in its written form uses only consonants, but no vowels. In this case, the two words "write" and "wrote" will both be written as "wrt". When "wrt" appears in a sentence, a reader will have at least two choices:                (1) add "i" and "e" and pronounce it as "write"        (2) add "o" and "e" and pronounce it as "wrote"
A prior art morphological analyzer can only propose these two solutions, and more information is needed for disambiguation. For example, the consideration of the syntactic sentence structure can be used to obtain the correct vowelizations ("I will write a letter." vs. "Yesterday I wrote a letter.").
While this simple example illustrates the ambiguity problem of non-vowelized text, Arabic has the additional problem of non-diacritized text, where the same vowelization can lead to different meanings dependent on additional diacritical marks. For example, in Arabic a triliteral word "K T B" could have any of the following semantics:                (1) Using the vowel pattern "a a a" will result in "KaTaBa", which has the meaning "He wrote".        (2) An additional gemination mark (shadda) will result in the pattern "a ˜a a" and the vowelized text is "KaT˜aBa", which has the meaning "He has forced someone to write".        (3) The "o e a" vowel pattern results in "KoTeBa" ("It has been written").        (4) Similar to (2), the use of a gemination mark will result in the "o ˜e a", and the vowelized text is "KoT˜eBa" ("He has been forced to write").        (5) Finally, the vowel/diacritics pattern "o o 0" transforms the consonant cluster into "KoToB0" ("the books").
In prior art, a morphological analyzer analyzes the word "K T B" and will offer the 5 different vowelization patterns and solutions above; ambiguity in this case must be resolved from a combination of syntax and semantics according to the pre-established collection of rules 15, mentioned above with reference to FIG. 1. These rules 15, including the empirically found exceptions 16 are, however, disadvantageously difficult to maintain up-to-date, or to extend to a new application due to the productive nature of any "living" spoken language.
Further disadvantages of prior art are due to the fact that the development of morphological and syntactical analyzers requires a lexicon database. The lexicon should cover the entire language, and therefore its collection is not a trivial task, and requires the expertise of computational linguists. In previous efforts done by IBM Cario Scientific Center (1987) morphological, syntactical, and some semantical features for about 5700 Arabic roots have been collected.
Morphology is important because a "living" language is "productive": In any given text one will encounter words and word forms that have not been seen before and that are not in any precompiled dictionary. Many of these new words are morphologically related to known words. It is important to be able to handle morphology in almost all languages, but it is absolutely essential for highly inflected languages.
The major types of morphological processes are inflection, derivation, and compounding: Inflections are the systematic modifications of a root form by means of prefixes and suffixes to indicate grammatical distinctions like singular and plural. Derivation is less systematic. It usually results in a more radical change of syntactic category, and it often involves a change in meaning. Compounding refers to the merging of two or more words into a new word. Further, words are organized into phrases, groupings of words that are clumped as a unit. Syntax is the study of the regularities and constraints of word order and phrase structure.
The above-mentioned prior art morpho-syntactical analyzer is able to handle only two types of the Arabic sentences, namely the Arabic verbal and nominal sentences, and generating the corresponding parse trees. These two sentence types can also be vowelized completely with a certain degree of ambiguity that needs to be resolved through a semantical analyzer.
Sakhr (www.sakhr.com), a Middle East based company, has developed a system for automatic diacritization of Arabic that depends on various levels for language processing and analysis. Starting from a morphological level and ending with disambiguation of word meanings, the method relies on an extensive basic research in the area of Natural Language Processing (NLP) and large linguistic databases that Sakhr has developed over many years. Disadvantageously, in this approach the databases can be maintained up-to-date only with a large amount of manual work and highly skilled staff due to the "productive" nature of any language, as it was described above, and due to the even more problematic fact that Arabic is a highly inflected language.
1.3. Objectives of the Invention
It is thus an objective of the present invention to help overcome the above mentioned disadvantages.

Hierarchical approach for the statistical vowelization of Arabic text

Abstract: Advantageously, the text is completed according to a model hierarchy giving higher priority to longer chunks of text, ie sentences (310, 315, 320) then multiword phrases (330, 335, 340), then words (350, 355, 360) and finally character groups (370, 375, 380, 390).

International Business Machines Corporation


A nestable hanger including: a support means for supportably hanging the hanger on a display; a body supported by the support means and having two pinch grips disposed thereon for retaining a garment therein; where the hanger nests in a stack of similar hangers such that the hanger interlocks with the stack of similar hangers. The hanger can be in a plane substantially parallel with a plane of the stack of similar hangers, or alternatively, in substantially a same plane as the stack of similar hangers.

1. Field of the Invention
The present invention relates generally to hangers, and more particularly, to nestable pinch-grip hangers for shipping in containers. The pinch grip hangers are used for hanging pants and skirts for shipment to retailers and display of the same in a retail environment. The improved pinch-grip hangers are nestable in stacks and as such, are less costly to ship with or without garments attached thereto and easier to feed into automated production machinery.
2. Prior Art
Consumer taste and fashion have dictated a desire for mass-produced, but well-fitted garments, which are distributed and sold throughout the United States. Large national retailers of clothing generally contract with a plurality of clothing manufacturers to produce uniform standardized clothing, which is essentially identical from batch to batch, even though manufactured by different entities. These manufacturers in turn produce the clothing at their own plants, or in many cases, subcontract the production of the garments to manufacturers based in the Far East, for instance, in Hong Kong, Taiwan, Singapore and South Korea.
In the retail clothing industry clothing is typically suspended from hangers at the point of purchase. Such hangers are often inexpensive ship-on types and under prevailing garment-on-hanger programs, the garment is shipped from the manufacturer to the retailer while suspended from a hanger. Traditional garment-on-hanger pant and skirt hangers used spring clips that were manually pushed into a locking position to secure the pants or skirts to the hanger. In these hangers, a steel-retaining clip was manually clamped over a clamshell garment grip to secure the garment. Use of the hangers in this device required a manual operation to slide the steel clip over the clamshell to close the retention clip on the garment.
However, these hangers were not popular as the physical force needed to close a hanger on a thick waist band could result in increased time and labor costs to load the hanger and complaints of inadvertently broken finger nails were common. For these reasons, pinch grip hangers have become popular in recent years. However, pinch grip hangers generally have greater depth than clip hangers, resulting in fewer garments per rod or per loop when shipping the garments, and a tendency to inadvertently drop the garments when subjected to unexpected shipping loads, as adjacent hangers impact one another and open one or more of the pinch grips. The pinch-grip hangers of the prior art are typically recycled after purchase of the garment thereon. The hangers are generally shipped in quantity in shipping containers. The cost of the original shipping of the hangers is a function of the weight and cube (volume) of the container. Because of the size and shape of the pinch-grip hangers of the prior art, the volume of the container is not used effectively to hold the hangers. This leads to increased shipping costs.
Inadvertent opening of the pinch grips can also occur in a retail store environment, as customers push the garments to one side to better view a garment of interest. Various guards have been proposed in the prior art to prevent the inadvertent opening of the pinch grips, but these guards further contribute to increased depth for the product.


The invention is an actuator which includes at least one control element which has thermally activatable transducer material and which, in response to the supply or dissipation of energy, changes from a first shape state into a second shape state, and a mechanical energy storage, which is functionally connected to the control element. When the control element is in the second shape state, it exerts a restoring force on the control element which returns the control element to the first shape state. The mechanical energy storage includes an elastomer body, which at least in some regions is in direct physical and thermal contact with the control element. The elastomer body is connected in a spatially fixed manner to the control element in at least two spatially separated joining regions along the control element.

Field of the Invention
The invention relates to an actuator having at least one control element which has thermally activatable transducer material. The at least one control element changes from a first shape state into a second shape state. A mechanical energy storage is functionally connected to the at least one control element and when the at least one control element is in the second shape state it exerts a restoring force on the at least one control element which returns the at least one control element to the first shape state.
Description of the Prior Art
Actuators having at least one control element which utilize thermally activatable transducer material are used to perform mechanical actuation in which the control element is to be deflected in a controlled, bidirectional manner along a movement trajectory, which in most cases corresponds to along a linear axis. For a multiplicity of technical, in particular control applications, control elements are used which utilize a shape memory alloy, often in the form of shape memory wires or plates.
Such control elements are generally activated either by the ambient temperature or by artificial thermoelectrical stimulation. In the case of artificial thermoelectrical stimulation, an electrical voltage is applied to the control element including an electrically conductive shape memory alloy, (SMA). The voltage results in a flow of electrical current along the control element producing a resistance-induced ohmic heat, which heats the control element.
As a result of the heating, SMA control elements generally undergo a change in shape, preferably in the form of a shortening or change in size, which is caused by a phase transformation between the martensitic low-temperature phase to the austenitic high-temperature phase. Many of the known shape memory alloys cannot perform any more work once the austenitic high-temperature phase has been achieved. In these cases an automatic reverse deformation once the shape has changed when the shape memory alloy is heated does not occur, even when the temperature is reduced.
In order to be able to perform work again in these cases, the control element must be returned to the starting state, in which an SMA must be cooled and also deformed back to the starting state by means of an external mechanical force. It should be noted that such a restoration of shape induced by a mechanical external force is also used for shape memory actuators which can be activated correspondingly by magnetic fields.
The mechanical restoration of SMA control elements which have been deflected once or deformed once by thermal activation, for example in the form of wires or wire bundles, takes place with the aid of restoring elements functionally connected to the control elements, for example in the form of springs or weights. During the switching process, the control element thus performs mechanical work induced by a change in travel, which is partially used to deform the corresponding restoring element, for example to tension a spring or to displace a weight, for example to lift a weight counter to gravity. During restoration, the mechanical energy stored in this manner is transmitted back to the control element, as a result of which the latter can be transferred to its starting state.
A further possibility for restoring SMA control elements to the starting state can also be achieved with a plurality of SMA control elements entering into alternating functional connections, in which the switching process of an SMA control element causes a corresponding restoration of another SMA control element. Restoring elements in the form of springs and weights can be omitted in this manner.
The prerequisite for complete restoration, which can also be achieved within a short time, of an SMA control element deformed by thermal activation depends critically on the ability to conduct away or dissipate the thermal energy necessary for the single deformation process in the form of heat out of the control element after the switching process.
To support the cooling process, the convection-induced heat removal process is supported in a known per se manner, for example with the aid of an external fan, as a result of which the convective cooling process is greatly enhanced and the cooling speed of the SMA control element can be increased, in order in this manner to allow a faster return to the starting state and thus a faster repeated switching or activation of the control element.

Actuator having at least one control element which has thermal transducer material

FRAUNHOFER-GESELLSCHAFT ZUR FORDERUNG DER ANGEWANDTEN FORSCHUNG E.V.


A method of determining a factorization permutation for a natural number can include storing a canonical prime factor vector within memory of a system and storing a first basis vector within the memory. The method can include deriving a first count sequence, including a plurality of counts, from the first basis vector, wherein each count of the first count sequence is a child of the first basis vector. For each count of the first count sequence, a second basis vector can be output that is a child of the count, wherein each count of the first count sequence and child second basis vector specifies a factorization permutation of the natural number.

When designing a system, it is worthwhile to consider different circuit designs and the merits of each respective circuit design prior to selecting one circuit design as the foundation of the system. Often, each circuit design represents a particular or unique circuit architecture. As an example, consider the case of a multi-rate, multi-stage filter. Such filters are commonly used within wire-line and wireless communications, audio, and other applications. When designing a multi-rate, multi-stage filter for a selected application, a variety of different circuit architectures are likely available. Each circuit architecture can have, for example, a different number of stages. Each stage can apply a different amount of sampling rate reduction. It is often difficult to accurately recognize each circuit architecture that can be used for a given application. It can be even more difficult to adequately assess the merits of each circuit architecture that is available.

Generating factorization permutations of natural numbers and performing circuit design exploration


A surface acoustic wave (SAW) device and methods of making the same are disclosed. The surface acoustic wave device includes a piezoelectric layer coupled to a high acoustic velocity layer at a first surface of the piezoelectric layer. At least one transducer is provided over a second surface of the piezoelectric layer. The at least one transducer comprises a plurality of IDT electrodes that are formed from a substantially two-dimensional (2D) conductive material and configured to propagate a surface acoustic wave having an operating wavelength along the piezoelectric layer.

In communication systems (both terminal and base station infrastructure), surface acoustic wave (SAW) filters and resonators are widely used. For new standards such as the Evolved Universal Mobile Telecommunications System (UMTS) Terrestrial Radio Access (E-UTRA) used in the 5G-TG4-CA, there is growing demand for higher operating frequency, lower insertion loss, higher transmitting power, and/or wider channel bandwidth. New piezoelectric materials or structures are desirable to support the growing demand for higher frequency and wider channel bandwidth. In particular, a high electromechanical coupling coefficient for SAW filters may be desirable.
One of the factors that affect the filter bandwidth is the piezoelectric material's electromechanical coupling coefficient (k2). The higher the electromechanical coupling coefficient, k2, the wider the filter bandwidth may be. Aluminum Nitride (AlN)/diamond multi-layer structures have been suggested and may have a very high acoustic wave velocity of about 9500 m/s at AlN thickness of 0.35 wavelength, λ. However, the relatively small k2 of 1.2% associated with the AlN/diamond multi-layer structures may be unsuitable for wideband filter and duplexer application.
The applications of SAW filters in most of communication systems require a stable performance, for which a small temperature coefficient of frequency (TCF) of the SAW resonators is required. Various techniques, such as hybrid substrates with wafer bonding technologies, or multi-layer structures with dielectric overlay on interdigital transducers (IDT's) and lithium tantalate (LiTaO3) and lithium niobate (LiNbO3) substrates, were used to reduce the SAW filter temperature coefficients, hence the so called temperature-compensated SAW (TC-SAW).
To further enhance the device quality factor Q of SAW filters, a method is borrowed from solidly mounted resonator—bulk acoustic wave (SMR-BAW); using reflective layers to suppress the leaky SAW in the depth direction, therefore confining the wave energy in the surface of the SAW propagation path, has been implemented in the incredibly high performance SAW (IHP-SAW).
Currently photolithography apparatuses such as krypton-fluoride (KrF) stepper/scanners are used for patterning integrated circuits (IC's) onto wafers. Under the current lithography limitations of the KrF stepper/scanner, incredible high performance (IHP) SAW may be manufactured to operate at as high as 3.5 GHz. For example, Murata™ has manufactured an IHP SAW utilizing shear-horizontal (SH) leaky wave generated on 50° Y-X LiTaO3 wafer-bonded on supporting reflective multi-layer substrate. Such IHP SAW demonstrates SAW phase velocity of about 3800-4200 m/s, and relative bandwidth of 3.4% to 4%. With 0.3 μm IDT electrode width, which can be realized with a krypton-fluoride (KrF) stepper/scanner with a laser wavelength of 248 nm. However, the IHP SAW by Murtata™, even at 3.5 GHz, is insufficient to cover all the bandwidth required in the sub-6G wireless communications.
Another similar structure utilizing longitudinal leaky SAW (LLSAW) on X-cut LiNbO3 wafer-bonded on supporting substrate with reflective multi-layer, demonstrates 1.5 times higher SAW phase velocity of about 5700-6200 m/s compared to that of the above-mentioned IHP SAW. The LLSAW has a relative bandwidth of as high as 9.4% with 0.3 μm IDT electrode width, which can be realized with a KrF stepper/scanner with a laser wavelength of 248 nm. The LLSAW filter can be operated at as high as 5.0 GHz, which still struggles to cover the entire sub-6G wireless communication band.
It would be desirable to be able to further increase the SAW phase velocity, and therefore increase the SAW filter operating frequency sufficient to cover the sub-6G communication band under the same fabrication limitations, while maintaining all the benefits of the above developments (high coupling, high temperature stability, high quality factor, etc.).

Surface acoustic wave devices with ultra-thin transducers


A semiconductor device includes a substrate having first to fourth regions, a first insulating film formed on the substrate in the first region, a first epitaxial layer formed on the substrate in the second region and having an upper surface higher than an upper surface of the first insulating film, a first semiconductor layer formed on the first insulating film with a space provided with respect to the first epitaxial layer and having an upper surface set at substantially the same height as the upper surface of the first epitaxial layer, and an element isolation insulating film formed in the space and having an upper surface set at substantially the same height as the upper surface of the first epitaxial layer and the upper surface of the first semiconductor layer.

1. Field of the Invention
This invention relates to a semiconductor device using a hybrid wafer having an SOI (Silicon On Insulator) region and a bulk region and a manufacturing method thereof.
2. Description of the Related Art
Recently, various attempts for lowering the parasitic capacitance, lowering the power consumption of a logic circuit and enhancing the operation speed of the logic circuit have been made by using a thin film SOI (Silicon On Insulator) wafer instead of the conventional silicon wafer and forming elements on the SOI wafer. Further, microprocessors using the SOI wafers have been commercialized. In the future, it is predicted that the necessity for a system LSI using the above SOI logic as a core is increased.
However, since the potential of a body region in which the channel of a MOSFET on the SOI wafer is formed is set into an electrically floating state, a variation in the threshold voltage occurs and a leakage current caused by the circuit operation occurs due to the so-called floating body effect. Therefore, it is not suitable to apply the SOI wafer to a circuit such as cell transistors of a DRAM or paired transistors of a sense amplifier circuit or analog circuit which has a severe specification for a leakage current level or matching characteristic.
In order to solve the above problem, it is proposed to prepare a hybrid wafer having a bulk region formed on the SOI wafer and form a circuit such as a DRAM which is not suitable for the SOI wafer on the bulk region. More specifically, the following methods are provided, for example.
First, a method for selectively forming an SOI region on the bulk wafer by use of an SIMOX (Separation by IMplantation of Oxygen) using a mask pattern is provided (refer to "Jpn. Pat. Appln. KOKAI Publication No. 10-303385" and "Robert Hannon, et al., 2000 Symposium on VLSI Technology of Technical Papers, pp. 66–67").
Second, a method for laminating a wafer on a bulk wafer having a patterned insulating film thereon is provided (refer to Jpn. Pat. Appln. KOKAI Publication No. 8-316431).
Third, a method for selectively and partially etching and removing an SOI layer on the SOI wafer and a buried insulating film formed therein is provided (refer to Jpn. Pat. Appln. KOKAI Publication No. 7-106434, Jpn. Pat. Appln. KOKAI Publication No. 11-238860, and Jpn. Pat. Appln. KOKAI Publication No. 2000-91534).
Fourth, a method for depositing silicon on a supporting substrate of a bulk region by a selective epitaxial growth method and making the silicon layer flat by polishing as required in order to eliminate the difference in level caused between the SOI region and the bulk region in the third method is provided (refer to "Jpn. Pat. Appln. KOKAI Publication No. 2000-243944" and "T. Yamada, et al., 2002 Symposium on VLSI Technology of Technical Papers, pp. 112–113").
In the above various methods using the hybrid wafer, the fourth method is excellent in productivity of elements since the difference in level between the element surface of the SOI region and the element surface of the bulk region is eliminated. Further, the fourth method is a method which can flexibly cope with a case wherein the film thickness of the SOI layer or buried insulating film varies or the material of the SOI layer such as a silicon layer or SiGe layer is changed since a semiconductor device is manufactured by use of a ready-made SOI wafer.
However, the fourth method has a problem as described below. Before explaining the problem, the fourth method is specifically explained below.
First, as shown in FIG. 41, an SOI wafer having a supporting substrate 111, buried insulating film 112 and SOI layer 113 is prepared.
Then, as shown in FIG. 42, a first mask member (for example, SiN film) 114 is formed on the SOI layer 113 to protect the same. Next, the first mask member 114, SOI layer 113 and buried insulating film 112 in the bulk region are selectively etched and removed in this order. At this time, a thin buried insulating film 112′ is left behind on the supporting substrate 111.
After this, as shown in FIG. 43, a second mask member (for example, SiN film) 116 for protection of the side wall of the SOI layer 113 is formed on the entire surface. Then, a spacer formed of the second mask member 116 is formed on the side surface of the SOI layer 113 by an anisotropic dry-etching process. At this time, as in the step shown in FIG. 42, a thin buried insulating film 112″ is left behind on the supporting substrate 111.
Next, as shown in FIG. 44, the buried insulating films 112, 112″ are removed by using an HF solution or the like without giving damage to the supporting substrate 111. In this case, since the mask members 114, 116 on the upper portion and side surface of the SOI layer 113 are insulating films of a type different from that of the buried insulating film 112, the mask members 114, 116 can be left behind even if the buried insulating films 112, 112″ are removed.
Then, as shown in FIG. 45, an epitaxial layer 117 is formed as an element forming film of single crystal silicon or the like on an exposed portion of the supporting substrate 111 by use of the epitaxial growth technique. The epitaxial growth process is performed to adjust the heights of the upper surface of the epitaxial layer 117 and the upper surface of the SOI layer 113 so as to set the upper surface of the epitaxial layer 117 and the upper surface of the SOI layer 113 substantially equal in height to each other. In this case, a facet 161 is formed on the upper end portion of the epitaxial layer 117 which lies on the SOI region side.
Next, as shown in FIG. 46, the first mask member 114 is removed. At this time, the second mask member 116 formed on the side surface of the SOI layer 113 is removed together with the first mask member 114 since the second mask member 116 is formed of the same material as that of the first mask member 114. As a result, a concave portion 160 is formed in the boundary portion between the SOI region and the bulk region.
Then, as shown in FIG. 47, gate insulating films 120, 121, gate electrodes 122, 123, 131, and element isolation regions 118, 119, 130 of the STI (Shallow Trench Isolation) structure are formed.
With the fourth method of the prior art, the facet 161 and concave portion 160 are formed in the boundary portion between the SOI region and the bulk region. Therefore, in order to eliminate the facet 161 and concave portion 160, the space for the element isolation region 130 in the boundary portion between the SOI region and the bulk region is made large.

Semiconductor device and manufacturing method thereof


A solid state image pickup element includes a pixel unit having a plurality of pixels for photoelectric conversion disposed in a matrix shape and a pixel signal read circuit for reading pixel signals in the unit of a plurality of pixels from the pixel unit. The pixel signal read circuit includes a plurality of comparators disposed in correspondence with a pixel column layout for performing comparison judgment between a read signal potential and a reference voltage and outputting a judgment signal and a plurality of counters each for counting a comparison time of a corresponding one of the comparators, an operation being controlled by an output from a corresponding one of the comparators. The comparators include a first amplifier for performing a comparison operation between the reference voltage and the read signal potential and inverting an output at a predetermined comparison point, a second amplifier for forming a current path when an output of the first amplifier is inverted, to output an output of the first amplifier by gain up, and a current control circuit for shutting the current path of the second amplifier when an output level of the second amplifier exceeds a predetermined threshold level.

1. Field of the Invention
The present invention relates to a solid state image pickup device represented by a CMOS image sensor and a camera system.
2. Description of Related Art
A CMOS image sensor has been paid attention as a solid state image pickup device (image sensor) to be substituted for CCD.
This is because the CMOS image sensor overcomes various issues of CCD, including the necessity for dedicated processes for manufacturing CCD pixels and for a plurality of power source voltages for the operation, and a very complicated system because a plurality of peripheral IC's are required to be combined for the operation.
A CMOS image sensor has a plurality of large merits: manufacturing processes similar to those for a general CMOS type integrated circuit can be used for manufacturing CMOS image sensors, a single power source can drive a CMOS image sensor, and the number of peripheral IC's can be reduced because analog circuits and logic circuits manufactured by CMOS processes can be used by being mixed on the same chip.
A main trend of a CCD output circuit is a one channel (1-ch) output using a floating diffusion (FD) amplifier having an FD layer.
In contrast, a main trend of a CMOS image sensor is a column parallel output type in which each pixel is provided with an FD amplifier, and by selecting each row of a pixel array, outputs of FD amplifiers are read in a column direction at the same time.
It is difficult for only an FD amplifier disposed in each pixel to obtain a sufficient drive ability so that a data rate is required to be lowered. In this context, it is considered that parallel processing is advantageous.
Really a variety of types have been proposed for a signal output circuit of a column parallel output type CMOS image sensor.
As a method used for pixel signal reading of a CMOS image sensor, there is a method by which signal charges to be used as an optical signal generated by a photoelectric conversion element such as a photodiode are sampled temporarily via a MOS switch disposed near the photoelectric conversion element in a capacitor, and the signal charges are read.
Noises having inverse correlation to a sampling capacitor value are generally superposed upon a sampling circuit. In a pixel, when signal charges are transferred to the sampling capacitor, the signal charges are transferred perfectly by utilizing a potential gradient so that noises will not be generated at the sampling stage. However, noises are generated at a preceding stage where a voltage level of capacity is reset to a reference value.
A typical method of eliminating these noises is correlated double sampling (CDS). With this approach, a state (reset level) immediately before signal charges are sampled is read and stored, then a signal level after sampling is read, and noises are eliminated through subtraction.
There are a variety of specific CDS methods.
Description will be made on a general CMOS image sensor.
FIG. 1 is a diagram showing an example of a pixel of a CMOS image sensor constituted of four transistors.
This pixel 10 has a photoelectric conversion element such as photodiode 11, and four transistors as active elements for one photodiode 11. The four transistors include a transfer transistor 12, an amplifier transistor 13, a select transistor 14 and a reset transistor 15.
The photodiode 11 photoelectrically converts incidence light into charges (in this example, electrons) corresponding in amount to the quantity of the incidence light.
The transfer transistor 12 is connected between the photodiode 11 and a floating diffusion FD. Upon application of a drive signal to the gate (transfer gate) via a transfer control line LTx, electrons photoelectrically converted by the photodiode 11 is transferred to the floating diffusion FD.
A gate of the amplifier transistor 13 is connected to the floating diffusion FD. The amplifier transistor 13 is connected via the select transistor 14 to a signal line LSGN, and constitutes a source follower together with a constant current source 16 outside the pixel.
An address signal is applied to the gate of the select transistor 14 via a select control line LSEL, and when the select transistor 14 turns on, the amplifier transistor 13 amplifies a potential at the floating diffusion FD to output a voltage corresponding to the potential to the output (vertical) signal line LSGN. A signal voltage output from each pixel via the signal line LSGN is output to a pixel signal read circuit.
The reset transistor 15 is connected between a power supply line LVDD and the floating diffusion FD. When a reset signal is applied to the gate via a reset control line LRST, the reset transistor resets a potential at the floating diffusion FD to a potential at the power supply line LVDD.
More specifically, when the pixel is to be reset, the transfer transistor 12 is turned on to drain charges accumulated in the photoelectric conversion element 11, and then the transfer transistor 12 is turned off to make the photoelectric conversion element 11 convert an optical signal into charges and accumulate the charges.
When data is to be read, the reset transistor 15 is turned on to reset the floating diffusion FD, and then the reset transistor 15 is turned off to output a voltage at the floating diffusion FD via the amplifier transistor 13 and select transistor 14. This output is called a Pphase output.
Next, the transfer transistor 12 is turned on to transfer charges accumulated in the photoelectric conversion element 11 to the floating diffusion FD, and a voltage at the floating diffusion FD is output via the amplifier transistor 13. This output is called a D phase output.
By using a difference between the D phase output and P phase output as an image signal, it becomes possible to remove not only a variation in output DC components among pixels but also reset noises of the floating diffusion FD from the image signal.
These operations are performed for pixels of one row at the same time because the gates of, e.g., the transfer transistor 12, select transistor 14 and reset transistor 15 are connected on the row unit basis.
Really a variety of pixel signal read (output) circuits of a column parallel output type CMOS image sensor have been proposed. One of the most advanced types of this circuit has an analog-digital converter unit (hereinafter abbreviated to ADC (analog digital converter)) disposed at each column to output a digital signal as the image signal.
A CMOS image sensor mounting the column parallel ADC of this type is disclosed, for example, in W. Yang et. al., "An integrated 800×600 CMOS Image System" ISSCC Digest of Technical Papers, pp. 304-305, February 1999 and Japanese Patent Unexamined Publication No. 2005-278135.
FIG. 2 is a block diagram showing an example of the structure of a column parallel ADC mounting solid state image pickup device (CMOS image sensor).
As shown in FIG. 2, the solid state image pickup device 20 has a pixel unit 21 as an imaging unit, a vertical scan circuit 22, a horizontal transfer scan circuit 23, a timing control circuit 24, an ADC group 25, a digital-analog conversion unit (hereinafter abbreviated to DAC (digital-analog converter)) 26, an amplifier circuit (S/A) 27 and a signal processing circuit 28.
The pixel unit 21 includes photodiodes and intra-pixel amplifiers, and is constituted of pixels such as shown in FIG. 1 disposed in a matrix shape.
In the solid state image pickup device 20, the timing control circuit 24 for generating internal clocks, the vertical scan circuit 22 for controlling row addresses and row scan and the horizontal transfer scan circuit 23 for controlling column addresses and column scan are disposed as the control circuit for sequentially reading a signal from the pixel unit 21.
The ADC group 25 has ADCs disposed at a plurality of columns, each ADC being constituted of a comparator 25-1 for comparing a reference voltage Vslop having a ramp waveform obtained by stepwise changing a reference voltage generated by DAC 26 with an analog signal obtained from a pixel at each row via a vertical signal line, a counter 25-2 for counting a comparison time, and a latch 25-3 for holding a count result.
The ADC group 25 has an n-bit digital signal conversion function, each ADC being disposed at each vertical signal line (column line) to constitute a column parallel ADC block.
An output of each latch 25-3 is connected to a horizontal transfer line 29 having, for example, a 2n-bit width.
2n amplifier circuits 27 corresponding to the horizontal transfer line 29 and a signal processing circuit 28 are disposed.
In the ADC group 25, an analog signal (potential Vs1) read to the vertical signal line is compared with the reference voltage Vslop (a slope waveform having a certain gradient and changing linearly) at the comparator 25-1 disposed at each column.
In this case, the counter 25-2 disposed at each column similar to the comparator 25-1 is in operation and changes its count in one-to-one correspondence with the potential Vslop of the ramp waveform, to thereby convert a potential (analog signal) Vs1 at a vertical signal line into a digital signal.
A change in the reference voltage Vslop is used for converting a voltage change into a time change, and the converted time is counted at a certain period (clock) to convert the time into a digital value.
When the analog electric signal Vs1 crosses the reference voltage Vslop, an output of the comparator 25-1 is inverted to stop an input clock to the counter 25-2 and complete AD conversion.
After completion of the above-described AD conversion period, the horizontal transfer scan circuit 23 operates to input data held in the latches 25-3 to the signal processing circuit 28 via the horizontal transfer line 29 and amplifier circuit 27 to generate a two-dimensional image.
In this manner, the column parallel output process is performed.

Solid state image pickup element and camera system


Disclosed is a method for producing a crystal sensor. The method includes selecting a crystal configured to sense a property of interest. The method further includes implanting ions in the crystal using ion-implantation to produce a conductive region within the crystal where the conductive region is capable of providing a signal to sense the property of interest. Also disclosed is a method and apparatus for estimating a property of interest using the crystal sensor in a borehole penetrating the earth.

Crystal sensors are known in the earth drilling industry for being able to characterize fluids while deep in a borehole. In one example, a flexural mechanical resonator is made of a piezoelectric crystal in the shape of a tuning fork having two or more electrodes. By applying an alternating voltage to the electrodes at one or more frequencies, the flexural mechanical resonator resonates in a fluid of interest with an electrical impedance related a fluid characteristic. It is known how to relate the measured impedance to fluid characteristics such as density, viscosity and dielectric constant for example.
The two or more electrodes are typically deposited on a surface of the piezoelectric crystal. Unfortunately, such a crystal sensor can fail due to exposure to fluids at high temperatures, such as 200° C. or greater, high pressure, and chemicals that can attack it. In order to provide a level of protection to the electrodes, some crystal sensors include a thin protection layer of dielectric material over the electrodes. However, the thin protection layer can also fail, which leads to the electrodes being exposed to the fluids again. Hence, it would be well received in the drilling industry if the reliability of crystal sensors could be improved.

Crystal sensor made by ion implantation for sensing a property of interest within a borehole in the earth


A container with a detent mechanism is disclosed. In one embodiment, a container comprises a housing comprising a side wall, a lid comprising a top surface and a lip depending from the top surface, and a detent mechanism disposed between the lip and the side wall. The lid is pivotably coupled with the housing and is configured to rotate between a first position covering an open end of the housing, a second position substantially exposing the open end, and an intermediate position between the first and second positions. The detent mechanism is configured to arrest the rotation of the lid at each of the positions.

Storage containers, including boxes and cabinets, are often used in the construction industry to store tools, fasteners, and the like. Such containers are typically formed from one or more sections of aluminum or sheet steel. Typically, a storage container comprises a receptacle and a lid that is attached via a hinge to the rear wall of the receptacle. Exemplary storage containers include those sold under the name JOBOX™ by Delta Consolidated Industries, Inc. of Jonesboro, Ark.
FIG. 1 is a perspective view of a prior art container 10 in an open position. As shown, container 10 is a truck box, a type of storage container which is typically mounted in the bed of a truck, such as a pickup truck. Truck boxes are ordinarily mounted directly behind the cab of the truck and span the distance between the side walls of the truck bed.
Container 10 has a rectangular receptacle 12 and a lid 14 that opens to permit access to the interior of container 10. Lid 14 is attached to receptacle 12 via a hinge 16, which is typically a continuous or piano hinge extending the length of receptacle 12. Also, container 10 is provided with a lift cylinder or gas spring 18 mounted to the rear wall of receptacle 12. Gas spring 18 may support lid 14 in the open position shown in FIG. 1. In some prior art containers 10, two or more gas springs 18 are provided.
Storage containers also typically include a locking system to secure the lid in a closed position. For example, container 10 includes two latches 20 disposed in the front wall of receptacle 12. When lid 14 is in the closed position, locking members in latches 20 engage staples 22 on lid 14. Latches 20 include paddle handles 24 which, when lifted, cause the locking members to disengage from staples 22 to allow lid 14 to open. Locks 26 are also provided in latches 20 such that, when locks 26 are locked, paddle handles 24 cannot be lifted. Thus, lid 14 may be maintained in the closed position.
Other locking systems have also been used with storage containers. In particular, a "horizontal" locking system typically employs a padlock as a latching mechanism for the lid. The padlock, which is located at one end of the receptacle, interacts with an elongated latch rod that is slidably disposed adjacent the front wall of the receptacle. When the padlock is locked and the container is in the closed position, the padlock body blocks longitudinal movement of the latch rod. When the padlock is unlocked, an end of the latch rod can pass between the shackle of the padlock and the padlock body to move the latch rod to a release position. Typically, a lever is used to manually move the latch rod between the latched and release positions after the padlock is unlocked.
Additional background information on locking systems used with storage containers is provided in commonly-assigned U.S. Patent App. Pub. No. 2008/0110893, entitled "Lock System for a Container," and commonly-assigned U.S. Pat. No. 7,416,228, entitled "Container with Adjustable Rotary Lock," both of which are incorporated herein by reference in their entireties for all purposes.


According to one implementation, a feeding device of a hole inspection device having a probe includes an attaching jig, a movement mechanism, and a positioning jig. The probe is inserted into a hole to be inspected of an object in a central axis direction of the hole, for inspecting the hole. The attaching jig attaches the hole inspection device to the feeding device. The movement mechanism linearly reciprocates the hole inspection device together with the attaching jig. The positioning jig positions the movement mechanism to the object. A moving direction of the attaching jig and the hole inspection device is made parallel to the central axis direction of the hole by positioning the movement mechanism.

When a hole was processed on an object by a drilling tool, such as a drill, it is sometimes necessary to inspect a feature, such as surface roughness of the inside surface of the processed hole or a three dimensional shape of the processed hole. As a method of measuring surface roughness of the inside surface of a hole or a shape of the hole, a contact measuring method, in which a contact-type probe is moved while contacting the probe on the inside surface of the hole, and a non-contact measuring method, in which the inside surface of the hole is irradiated with laser light and interference light is analyzed, are known (for example, refer to Japanese Patent Application Publication JP 2014-115144).
The conventional method of inspecting a feature of a hole requires to set an object having the hole to be inspected at a right position in a three dimensional measuring device or the like. Accordingly, when the object has been drilled by a handheld drilling device, the feature of the hole cannot be inspected promptly. In particular, when the size of the object to be drilled is too large to set in a three dimensional measuring device or the like, when the drilled object is conveyed for the following process while being fixed to a jig, and when cutting, surface treatment, assembling or the like is subsequently performed to the drilled object, an inspection of the hole itself is difficult.
That is, when an object having a hole to be inspected cannot be moved easily, it is difficult to inspect a feature of the hole. As a result, in case of inspecting surface roughness of a hole, there is no choice but to adopt an inspection method in which an inspector compares the surface roughness of the hole with that of a sample by the sense of touch.
Accordingly, an object of the present invention is making it possible to inspect a feature, such as surface roughness and/or a shape, of a hole to be inspected without setting an object having the hole on a measuring device.

Feeding device of hole inspection device