A mobile lift and storage apparatus for lifting, lowering, moving, and storing objects. A combination of the mobile lift and a stationary storage apparatus forming a stationary storage system for securing the mobile lift and the stored objects.

Mobile lifts are well known in the art. The mobile lift allows an operator to lift a heavy object safely without causing back injuries. Also, the mobile lift can assist the operator in lifting loads heavier than the operator can physically lift without assistance. Storage racks and shelves are well known in the art for storing objects.
Mobile lifts typically include a boom pivotally mounted on a support structure. Commonly, the support structure is mounted on wheels for allowing the mobile lift to be easily moved. Many mobile lifts typically include a lift cable passing over the end of the boom. A first end of the lift cable is attached to the object to be lifted, and a second end of the lift cable is attached to a winch or to a counterweight apparatus. The counterweight can be adjusted to be essentially about the same weight as the weight of the object being lifted. Since the weight being lifted is essentially counterbalanced by the counterweight, the operator can easily lift the object, because the operator is only lifting a small portion of the total weight of the object. When the object weight changes, the operator is required to lift and to remove or add different counterweights. This lifting of the counterweights can cause back injuries to the operator.
Many fork lift trucks are powered by engines that are fueled by liquid petroleum (LP) gas or propane. The gas is typically stored in a container commonly referred to as a "cylinder." The cylinders are removably attached to a platform on one end of the fork lift truck. Commonly, the cylinders are located four or more feet above the ground. When empty, an LP tank must be manually lowered from the fork lift truck platform to the floor. Next, a filled cylinder must be manually lifted to the fork lift truck platform.
Additionally, the empty and full cylinders must be carried to and from a central storage rack where the cylinders are safely stored. Since each filled cylinder weighs between about 60 and 80 pounds, there is a risk of injury to the operator when lifting and moving the cylinder. Furthermore, some operators may not be physically strong enough to lift and move the cylinder.


A conveyor belt assembly including a flexible belt body with a plurality of spaced flexible teeth and at least one hardened tooth coupled to the belt body. The flexible belt body and flexible teeth comprise a resilient material. The hardened tooth comprises hardened plastic or metal. The flexible belt body also includes at least one reinforcing member within the belt body. A guide member is coupled to the flexible belt body and the hardened tooth to assist in transporting objects on the conveyor belt assembly. A pivotable clamping device clamps the ends of the belt body together to form a continuous belt. The clamping device clamps the reinforcing member to ensure a strong connection.

The invention relates to conveyor belts, and more particularly to methods of attaching objects to conveyor belts.
It is known in industries utilizing conveyor belt systems to mechanically attach items, such as baskets or bins, to conveyor belts to assist in moving objects from one point to another. The prevalent method of making attachments to conveyor belts is to glue or "weld" the attachments onto the belt. However, the bond created in this type of attachment often fails under heavy loads.
Another issue with conveyor belt systems is facilitating the removal and replacement of conveyor belts to replace worn or broken segments of the belt. In systems where an endless belt is used, an "endless" belt is commonly formed by splicing two ends of a belt together by serrating the edges and gluing the ends together. By gluing the ends together, it becomes difficult to remove and replace a conveyor belt. Often, the conveying machine must be disassembled to allow for removal and replacement of the belt.


The microetching and cleaning of copper clad substrates in printed wiring board production with solutions containing alkali metal persulfate and sulfuric acid is controlled to provide slower and more consistent copper etch rates by the presence of high proportions of alkali metal sulfate or an alkali metal sulfate/bisulfate mixture in the solutions, in a mole ratio of persulfate to sulfate or sulfate/bisulfate mixture of 1:0.1 to 1:10. When bisulfate is present with the sulfate, the sulfate will comprise at least about 10 mole % of the sulfate/bisulfate mixture. A surfactant may be present in the solutions to aid wettability on the copper clad substrates.

The production of modem printed wiring boards ("PWBs") for developing the desired electrically conductive pattern onto plastic substrates clad with copper foil, is a complex process. In the process, electrical interconnections are made by selectively removing unwanted copper foil or adding additional copper to the plastic substrates. The process requires careful removal of excess copper, reagents remaining from the copper deposition, powder, dust, oxides, and other debris or residuals after each construction step. It is not unusual for the process to require 100 or more individual steps because of the complexity of electrical circuitry configurations.
The removal of residual copper is termed "microetching" to emphasize the controlled nature of the action, that is, careful, gentle removal, as contrasted with energetic, bulk removal of copper by use of highly active chemicals, sometimes under extreme conditions of temperature, pH and/or modes of application. The microetching must be combined with cleaning action for efficient and economical processing. Microetching copper is a critical step in manufacturing PWB's because it insures that plating or resist layers will adhere to the substrate each time they are applied. The rate of residual copper removal by application of the microetchant is termed "etch rate".
Alkali metal persulfates such as sodium persulfate (sodium peroxydisulfate) are known to provide a superior copper topography when used as microetchants and cleaners in PWB manufacture. The topography is characterized by a rougher metallurgical surface than results from use of other microetchants, thereby providing a sufficient number of keying sites to ensure good adhesion for plating, resist and lamination. The pH of the persulfate solution can be lowered and surface texture can be varied by the addition of a mineral acid to the solution; phosphoric acid produces a relatively smoother topography whereas sulfuric acid increases roughness. Typically, about 1-2 percent mineral acid by volume of persulfate solution is used. Persulfates also are effective at lower temperatures than other microetchants. For example, persulfates are effective at about 75.degree.-90.degree. F. whereas hydrogen peroxide/sulfuric acid solutions require temperatures of about 115.degree.-130.degree. F.
Despite such advantages, persulfate microetchants tend to decompose rapidly in the presence of copper and exhibit irregular etch rates. This requires frequent microetchant/cleaner bath monitoring and adjustment of oxidizer concentration, particularly as the persulfate nears depletion. To some extent the etch rate can be controlled by adjusting the bath temperature and/or speed of the conveyor transporting PWBs or precursor copper clad substrates through the bath. However, the inevitable consequences are substantial amounts of waste product due to irregular microetching/cleaning and the formation of undesirable copper surfaces. In addition, copper solubilized in the bath must be removed to avoid precipitation of copper sulfate. Although most of the copper may be reclaimed from the baths by electrowinning procedures in order to satisfy environmental regulations, such procedures are time consuming and costly.
Further, because of the difficulty of controlling etch rate when using persulfates, it is routine to prepare, apply and dispose of microetchant/cleaner baths in batch mode. For efficiency of operation and reasonable cost, including reduction of downtime for cleaning and/or replenishing baths, PWB fabricators wish to replace such batch operations with continuous processing, including systems for continuously delivering reagents to the microetchant/cleaner baths and for regulating strength and other bath conditions relative to etch rate.
Japanese patent 86/435 to Komatsu et al and assigned to Mitsubishi Gas Chemicals KK, granted Aug. 1, 1986 on application 81/173606 (filed Oct. 29, 1981 and published May 4, 1983), discloses the addition of sulfuric acid and/or bisulfate ions to sodium or potasssium persulfate solutions for use in pre-etching ("soft" etching) during the production of printed circuit boards, in place of ammonium persulfate or sodium/potassium persulfate alone. Sulfate ion can be supplied by sulfates as well as by sulfuric acid. The mole ratios and concentrations of reagents in the solutions are such as to equal or exceed the copper dissolution rate (etch rate) as compared with that achieved with ammonium persulfate. It has been observed that the compositions of the patent do not provide sufficient control of etch rate.
U.S. Pat. No. 3,373,114 to Grunwald and assigned to MacDermid Inc. discloses dry compositions for desmutting aluminum and aluminum alloys in preparation for subsequent metal finishing operations. The compositions comprise mixtures of sodium, potassium or ammonium persulfate and a soluble acid salt of an acid selected from acid salts of sodium, potassium and ammonium acid salts of sulfuric acid, in a mole ratio of 1:1 to 10:1. A typical composition is a dry mixture of ammonium persulfate and sodium bisulfate. Baths prepared from the dry mixtures must have a pH not exceeding 2.0 for success in desmutting aluminum. It has been determined that such compositions are not useful in the microetching and cleaning of copper clad PWB substrates because the high acidity and hygroscopic nature of the bisulfate renders the compositions unstable and diminishes etch rate control.

Microetching and cleaning of printed wiring boards


A gas handling system capable of simultaneous sample analysis and multi-point sample acquisition is provided. An exemplary system has N gas inlets and N+1 sample storage loops (having a high aspect ratio), where N≧2. The high aspect ratio of the sample storage loop prevents significant sample diffusion along the length of the loop. Therefore each loop preserves a time axis for its contents. The sample loops can be disposed to simultaneously admit samples from different points in space. A gas switching manifold can be employed to connect the sample storage loops sequentially and one at a time to the gas analysis instrument for analysis. A common time axis for all samples can be reconstructed from the switching and flow conditions. Thus a simultaneous multi-point measurement using a single analysis instrument is provided.

Measurements of gaseous species in air are of considerable interest for applications such as environmental monitoring etc. However, it can be difficult to perform such measurements accurately and inexpensively. Most emissions sources will result in a plume of the species of interest being emitted into the atmosphere, with the direction and spread of the plume being determined in complex and highly variable manner by the (turbulent) transport of the atmosphere. A single-point measurement is not likely to provide an accurate estimate of the total emission in the plume, and multiple sequential measurements at different locations are subject to errors caused by motion of the plume (e.g., as local wind conditions vary). Simultaneous measurements using an analyzer at each measurement location can address this issue, but this approach has the disadvantage of being costly (i.e., expensive analyzer hardware is duplicated).

Gas analysis system providing simultaneous analysis and multi-point sample acquisition


A coupling circuit for coupling a first signal generated in a first circuit operating in a first clock domain to a second circuit operating in a second clock domain. The coupling circuit includes a first gate for coupling the first signal to a first logic circuit unless the coupling circuit has already applied a signal to the second circuit. The first logic circuit includes a pair of second gates that are enabled by respective rising and falling edges of the first clock signal. Thus, each of the second gates generates an output signal on respective transitions of the first clock signal as long as the first gate is coupling the first signal to the first logic circuit. The first logic circuit also includes a pair of latches coupled to respective outputs of the second gates. Each of the latches is set by its respective second gate generating the output signal. The second logic gates are coupled to a second logic circuit having a pair of third gates that are enabled by respective rising and falling edges of the second clock signal. Thus, each of the second gates generates an output signal on respective transitions of the second clock signal if the latch to which it is connected is generating an output signal. The output signal is also used as the reset signal to disable the first gate and reset the latches. Since the output signal is generated on the first transition of the first clock signal after the first signal is applied to the coupling circuit, the coupling circuit generates a single output signal that is synchronized to the second clock signal.

Many electronic devices operate in a synchronous manner in which the timing of signals in the device are controlled by a clock signal. The transitions of the clock signal occur at substantially the same time throughout the circuit, thereby ensuring that signals coupled or created responsive to the transitions of the clock signal are properly synchronized to each other.
Although synchronism between signals can be maintained when the same clock signal, or clock signals derived from the same clock signal, are used throughout a circuit. It is substantially more difficult to properly synchronize signals coupled from one electronic device to another when the electronic devices operate in different clock domains defined by different clock signals.
With reference to FIG. 1, a first electronic device 10 receives a signal S.sub.i and a clock signal CLKA. The electronic device outputs a signal S.sub.2 responsive to the input signal S.sub.i and transitions of the clock signal CLKA. The signal S.sub.2 is coupled to the input of a second electronic device 12 through a line 14. The second electronic device 12 also receives a second clock signal CLKB. The second clock signal CLKB may have a phase that is different from the phase of the first clock signal CLKA, and it may even have a frequency that is different from the frequency of the first clock signal CLKA. The problem encountered when coupling the signal S.sub.2 from the output of the first device 10 to the input of the second device 12 is illustrated in FIG. 2.
The clock signal CLKA for the first electronic device 10 is shown in FIG. 2A, and the input signal S.sub.i is shown in FIG. 2B as going high at time t.sub.0. By way of example, the first electronic device 10 simply performs a logical AND function of the input signal S.sub.i and the clock signal CLKA to generate the signal S.sub.2. The signal S.sub.2 is shown in FIG. 2C with exponentially rising and falling edges because of the capacitive loading on the line 14 coupling the first electronic device 10 to the second electronic device 12.
An example of a clock signal CLKB.sub.1 having a first phase is illustrated in FIG. 2D. As shown by comparing FIG. 2A with FIG. 2D, the clock signal CLKA for the first electronic device 10 lags the clock signal CLKB.sub.1 for the second electronic device 12. By way of example, it is assumed that the second electronic device 14 simply functions to clock the signal S.sub.2 (FIG. 2C) on either the rising edge of the clock signal CLKB.sub.1 (FIG. 2F) or the falling edge of the clock signal CLKB.sub.1 (FIG. 2G). As shown in FIG. 2F, the second electronic device 12 is incapable of detecting the signal S.sub.2 when the device 12 is clocked on the rising edge of CLKB.sub.1 because the signal S.sub.2 is not present at the input to the electronic device 12 on the rising edge of CLKB.sub.1. However, as shown in FIG. 2G, the second electronic device 14 is able to detect the signal S.sub.2 if the electronic device 12 clocks the signal S.sub.2 on the falling edge of the clock signal CLKB.sub.1. Thus, the second electronic device 12 can function with the first electronic device 10 despite having different clock domains, but only as long as the clock signal CLKB.sub.1 leads the clock signal CLKA. If the electronic device 12 clocks the signal S.sub.2 on the falling edge of CLKB.sub.1, it will not be able to detect the signal S.sub.2 if the clock signal CLKB lags the clock signal CLKA.
An example of a clock signal CLKB.sub.2 that lags the clock signal CLKA is illustrated in FIG. 2E. The first clock signal CLKA is considered to lag the second clock signal CLKB if any transition of the first clock signal CLKA occurs more than 0 degrees and less than 180 degrees after the corresponding transition of the second clock signal CLKB. The first clock signal CLKA is considered to leasd the second clock signal CLKB if any transition of the first clock signal CLKA occurs more than 180 degrees and less than 0 degrees after the corresponding transition of the second clock signal CLKB. Again, it is first assumed that the second electronic device 12 functions to clock the signal S.sub.2 on the rising edge of the clock signal CLKB.sub.2 (FIG. 2H) or the falling edge of the clock signal CLKB.sub.2 (FIG. 2I). As shown in FIG. 2H, the second electronic device 12 is able to detect the signal S.sub.2 if the electronic device 12 clocks the signal S.sub.2 on the rising edge of the clock signal CLKB.sub.2. However, as shown in FIG. 2I, the second electronic device 12 is incapable of detecting the signal S.sub.2 if the electronic device 12 clocks the signal on the falling edge of the clock signal CLKB.sub.2 because the signal S.sub.2 is not present at the input to the electronic device 12 on the falling edge of the clock signal CLKB.sub.2.
It will be apparent from the above discussion that the second electronic device 12 is able to detect the signal S.sub.2 generated by the first electronic device 10 as long as either the second clock signal CLKB leads the first clock signal CLKA and the second electronic device 12 clocks the signal S.sub.2 on the falling edge of CLKB, or the second clock signal CLKB lags the first clock signal and the second electronic device 12 clocks the signal S.sub.2 on the rising edge of CLKB. However, because the first and second electronic devices 10, 12, respectively, are operating in different clock domains, the phase relationship between CLKA and CLKB can change. Therefore, if the choice is made to make the second electronic device 12 clock the signal S.sub.2 on the falling edge of CLKB, it is possible for the clock signal CLKB to lag the first clock signal CLKA. As explained above, the second electronic device 12 will be unable to detect the signal S.sub.2 under these conditions. Similarly, if the choice is made for the second electronic device 12 to clock the signal S.sub.2 on the rising edge of CLKB, it is possible for the clock signal CLKB to lead the first clock signal CLKA. Again, the second electronic device 12 will be unable to detect the signal S.sub.2.
A more concrete example of the problem illustrated FIGS. 1 and 2 is exemplified by a memory device 20 shown in FIG. 3. The memory device 20 illustrated in FIG. 3 is a packetized dynamic random access memory ("DRAM") having an architecture known as SyncLink. However, the problem may also exist to varying degrees with other types of memory devices, such as synchronous DRAMs. The packetized memory device 20 is shown in somewhat generalized form because the specific structure of the memory device 20 is somewhat peripheral to the inventions described herein. However, packetized memory devices 20 are explained in greater detail in the U.S. patent applications Ser. No. 08/877,191 and 08/874,690.626 to Troy A. Manning which are incorporated herein by reference.
The memory device 20 includes a controller 22 that receives a command packet CA, generally containing several multi-bit packet words, a flag signal F indicating the start are a command packet, and a command clock CMDCLK synchronized to the packet words. The command packet CA includes both memory commands, such as read, write, etc., and bank, row and column address information, as well as other information used to initialize or operate the memory device 20.
The memory device 20 also includes a clock generator 24 that receives the command clock CMDCLK as well as control signals from the controller 22. The clock generator 24 produces several clock signals from the command clock CMDCLK, including an internal clock signal ICLK and a read clock signal RCLK. The phase of the internal clock signal ICLK and the phase of the read clock signal RCLK are determined by control signals from the controller 22. The controller 22 uses the internal clock signal ICLK to generate an initiate signal INIT to start the transfer of read data out to the memory device 20 and write data into the memory device 20. The controller 22 also generates a write phase command signal WPHASE that is used in a manner to be explained below.
Address portions of the command packet CA are coupled to address circuitry 28. The address circuitry 28 then applies bank and row addresses to bank/row circuitry 30 and column addresses to column circuitry 32. The structure and operation of this circuitry 30, 32 is well known to one skilled in the art. Basically, the bank/row circuitry 30 selects a memory array 36 or a portion of a memory array 36, and a row of memory cells in that array. The column circuitry 32 selects a column of memory cells in the array, and data is written to or read from the memory cell in the selected row than intersects the selected column.
Data are coupled between an externally accessible data bus terminal DQ and the column circuitry 32 through a data path 40 that includes a read data path 40a and a write data path 40b. The read data path 40a includes a read register 42 and an output buffer 46 that couple read data from the array 36 via the column circuitry 32 to the data bus terminal DQ. The write data path 40b includes an input buffer 50 and a write register 52 that couple write data from the data bus terminal DQ to the array 36 via the column circuitry 32. During a read operation, read data are applied to a data input of the read register 42 and clocked through the read register 42 by the read clock signal RCLK after the initiate signal INIT from the controller 22 has transitioned active high. During a write operation, write data are applied to the write register 52 and clocked through the write register 52 by a clock signal from a phase shift circuit 56 after the initiate signal INIT has transitioned active high. The phase shift circuit 56 generates the clock signal from a data clock signal DCLK applied to the memory device 20 from an external device, such as a memory controller (not shown). The phase of the clock signal applied to the write register 52 relative to the phase of the data clock DCLK is controlled by the phase command signal WPHASE from the controller 22.
In operation, an external device, such as a memory controller, provides a command packet CA to the memory device 20 to set the timing of the read clock RCLK relative to the command clock CMDCLK. Thus, the phase of the read clock RCLK is controlled by the external device. In a similar manner, the phase of the data clock signal DCLK is determined by the external device, such as a memory controller, generating the data clock signal DCLK. In this manner, the external device controls the timing of the memory device 20 applying read data to the external device.
The memory device 20 shown in FIG. 3, when coupled to external devices, such as memory controllers, must operate in two clock domains. The first clock domain is defined by the internal clock signal ICLK, which corresponds to the timing of the control signals from the controller 22. Thus, the functions carried out by the controller 22, such as receiving data from and outputting data to the array 36, and initiating data transfers responsive to the initiate signals INIT, are in the first clock domain. The coupling of data through the read register 42 is in a second clock domain because the coupling of signals through the read register 42 is controlled by the read clock signal RCLK, and the phase of the read clock RCLK is determined by the external device. Similarly, the coupling of signals through the write register 52 is in the second clock domain because the coupling of signals through the write register 52 is controlled by the data clock signal DCLK, and the phase of the data clock signal DCLK is determined by the external device. Operation of the memory device 20 in two clock domains can cause problems of the type explained above with reference to FIGS. 1 and 2. In fact, it is particularly difficult to avoid such problems when operating at the high data rates that are the goal of the SyncLink packetized DRAM.
There is therefore a need to provide a method and apparatus that is capable of coupling signals from a first electronic device to a second electronic device, and to allow first and second electronic devices to operate together, despite the first and second electronic devices being in different clock domains.

Method and apparatus for coupling signals between two circuits operating in different clock domains


Disclosed are a network control device and an operation method of the network control device for dynamically constructing an end-to-end virtual dedicated network slice based on a software-defined network (SDN) over the entire wired and wireless network section of a private network and a public network.

A 4G network is a network that uses the same network for all services and determines and interferes with a transmission path for each node, and thus cannot implement an ultra-high-speed and low-latency network. On the other hand, a 5G network is centralized based on an SDN, and thus may implement an ultra-high-speed and low-latency network by shortening a processing time for determining a transmission path of nodes.
Meanwhile, as 5G technology spreads to various industries, construction of private 5G networks such as smart factories and smart offices is accelerating in recent years. However, the current private 5G network system does not deviate from the form of the existing public network despite having advantages of openness, which is a characteristic of the 5G network based on the SDN, and overcoming dependency on a network device vendor. In other words, there is a limit to spread of the private 5G networks due to a complicated configuration, cost, and difficulty of operation resulting from construction of a public network-based system.

Dynamic construction of virtual dedicated network slice based on software-defined network

KOREA INSTITUTE OF SCIENCE & TECHNOLOGY INFORMATION


A mixing faucet equipped with a diverter valve assembly having a specially designed seal sleeve has multiple discharge outlets. A pipe combination set having a closed end in communication with a hot and cold water tube and provided with a number of outlet tubes is mounted to a faucet body. The seal sleeve having a number of tubular discharge protrusions in conformance to the outlet tubes of the pipe combination set is housed in the pipe combination set. A diverter valve having an opened end and a water outlet is engaged with the seat sleeve that are housed in the pipe combination set. The diverter valve is controllably rotated so as to make the water outlet selectively register with one of the tubular discharge protrusions of the seal sleeve for control of the discharge path of a faucet. Besides, the diverter valve is provided with a spring biased retaining pin that is selectively engaged with one of a number of positioning holes on a knob so as to make the operation of the knob quick and precise. The seal sleeve has a number of axial ribs and each tubular discharge protrusion has two concentric circular ribs and radial secondary ribs for protecting leakage from happening in the seal sleeve.

The present invention relates to a diverter valve assembly having multiple discharge outlets for use in a mixing faucet. A pipe combination set having a closed end in communication with a hot and cold water tube is provided with a number of outlet tubes is mounted to faucet body. A seal sleeve having a number of tubular discharge protrusion in conformance the outlet tubes of the pipe combination set is housed in the pipe combination set. A diverter valve having a opened end and a water outlet is engaged with the seal sleeve that are housed in the pipe combination set. The diverter valve is controllably rotated so as to make the water outlet selectively register with one of the tubular discharge protrusions of the seal sleeve for control of the discharge path of a faucet. Besides, the diverter valve is provided with a spring biased retaining pin that is selectively engaged with one of a number of positioning holes on a knob so as to make the operation of the knob quick and precise. The seal sleeve has a number of axial ribs and each tubular discharge protrusion has two concentric circular ribs and radial secondary ribs for protecting leakage from happening in the seal sleeve.
There are various faucets having differently designing diverter valves available on the markets that generally can only discharge mixed cold and hot water via two outlets in one aspect; and the sealing ribs defined in a seal sleeve housed in the faucet body are not properly designed, so, leakage can still take place when deformation of a seal sleeve resulting from frictional wearing on the diverter valve is made in another aspect.

Diverter valve assembly for control of multiple discharge in a mixing faucet


An iron core is configured as a winding iron core block group that is obtained in such a manner that winding iron core blocks having rectangular cross-sections each of which is obtained by laminating magnetic metal ribbons with a predetermined width and which have plural widths and laminated thicknesses are arranged in the width direction of the magnetic metal ribbons. The laminated thickness of the winding iron core block located in the middle of the width direction of the magnetic metal ribbons is larger, and the cross-section of each iron core leg is configured substantially in a circular shape by centering the winding iron core blocks in the laminated direction of the magnetic metal ribbons. Upper and lower yokes are arranged in such a manner that the bottom faces of the winding iron core blocks are aligned, and an in-window support member supports the upper yoke on a plane.

The present invention relates to a stationary induction electric apparatus such as a transformer or a reactor, and particularly to a stationary induction electric apparatus in which an iron core is configured using a winding iron core.
Most of stationary induction electric apparatuses such as transformers or reactors have iron cores configured using magnetic material, and a structure called "winding iron core" has been widely used, particularly, for an iron core of a stationary induction electric apparatus with a relatively-small capacity of a few MVAs or lower to improve workability. The winding iron core is generally configured by circularly bending laminated magnetic metal ribbons cut in a strip shape. In the case of a winding iron core having the simplest structure, the magnetic metal ribbons with the same width are laminated to configure the winding iron core. In this case, the cross-section of the winding iron core that is orthogonal to a closed curve drawing the circle of the iron core is generally formed in a rectangular shape.
The winding of the stationary induction electric apparatus having the iron core is wound around the outer edge of the cross-section of the iron core as close as possible. It is reasonable to maximize the space factor that is a ratio of the area occupied by the cross-section of the iron core to the area occupied by the winding. The dimension of the main body of the stationary induction electric apparatus and the loss can be reduced by maximizing the space factor. Accordingly, a winding is wound in a rectangular shape in many cases in the case of a winding iron core having a rectangular cross-section. Alternatively, a winding is wound in an oval shape or in a racetrack manner in many cases due to workability such as bending of electric wires configuring the winding.
Further, it is required for a winding to withstand electromagnetic force generated when current accidentally flows. In general, when the capacity of the stationary induction electric apparatus is increased, the electromagnetic force becomes large. When the electromagnetic force to withstand becomes large, a circular winding is generally economical to satisfy the electromagnetic force resistance as compared to that formed in a rectangular, oval, or racetrack shape.
Thus, a circular winding is selected for a stationary induction electric apparatus with a relatively-large capacity of a few MVAs or larger, and the space factor is considerably reduced in the case of an iron core having a rectangular cross-section. Accordingly, the cross-section of the iron core is required to be formed nearly in a circular shape, and an iron core with substantially a circular cross-section of a laminated iron core is adopted for a stationary induction electric apparatus with a large capacity. The laminated iron core configures an iron core circle by combining elements obtained in such a manner that magnetic metal ribbons having various shapes are combined and laminated in a circle of a frame shape. The iron core circle is generally in a frame shape, and the widths of the magnetic metal ribbons configured by laminating the iron core circle are changed to realize an iron core with substantially a circular cross-section.
As described in Japanese Unexamined Patent Application Publication No. 2009-296005, there is a well-known method for a winding iron core in which an iron core with substantially a circular cross-section is realized by changing the widths of magnetic metal ribbons while laminating the same as similar to the laminated iron core, and the iron core is wound in a circular shape to configure a winding iron core with substantially a circular cross-section. Further, the iron core is divided into plural sections in the middle of the circle as described in Japanese Unexamined Patent Application Publication No. 2009-296005.


The present disclosure relates to the field of liquid crystal display, and particularly to a frame seal structure on a substrate, a substrate, and a liquid crystal display device. The frame seal structure comprises a primary seal and an assembly process dummy seal. The assembly process dummy seal is formed in an area between the primary seal and an edge of the substrate, and consists of a plurality of sub-seals which are arranged discontinuously. The present frame seal structure is a novel frame seal structure which is proposed with respect to drawbacks of the process dummy seal during assembling with a VIF process in a liquid crystal display device with post spacers. By virtue of the novel frame seal, the peripheral region of the substrate will not be pressed airtight during assembling, so that the gas can be discharged, and poor sealing in a certain area is avoided. Thus the present disclosure can solve the problem of poor pressing of frame seal, particularly the problems like seal brush and seal narrow, and can be better adapted to the VIF process and improve the yield.

In a backlight source system of a liquid crystal display device, a vacuum infusion (VIF) process can be used to fabricate an array substrate. A sealant adopted in the VIF process is a mixture which contains epoxy resin as the main component and is further mixed with specific diluents. The sealant generally has a viscosity of 20-50 Pa·s, contains nonvolatile matter of 70%-90% by weight, and has a curing duration of 80-180 seconds at 150° C. Namely, it is necessary to perform thermal curing on the sealant during assembling.
In the VIF process, due to the design of a thermal pressing apparatus, a soft rubber cushion is applied over and under a substrate to be assembled (e.g., a glass plate) for thermal pressing, so that the sealant is cured upon reaching a specified width. During production of a liquid crystal display device with ball spacers, ball spacers are arranged uniformly between two glass plates to be assembled and up to edges of the glass plates. Once the two glass plates are assembled, a gap remains between glass plates for discharging gas in the panel during assembling, so that the frame seal will not suffer from obvious sealing defects in a thermal pressing process. These defects primarily comprise seal brush and seal narrow.
However, when a liquid crystal display device with post spacers (PS) is subject to the thermal pressing process, even the liquid crystal display device is provided with dummy PS and conventional process dummy seal, defects like seal brush and seal narrow still occur in the VIF process. The main reasons follow. In the process for forming post spacers, the color film (C/F) substrate is subject to an edge bead removal (EBR) process, in which the redundant sealant at a peripheral region of the glass plate is removed. After the process of dummy PS is completed, no sealant remains in an area at a distance of about 1 cm from the edge of substrate. In the thermal pressing process, the edge of the substrate is pressed airtight completely during assembling, so that the gas between two assembled glass plates can not be discharged, thus resulting in seal brush and seal narrow.

Frame seal structure on substrate, substrate, and liquid crystal display device


Methods, systems, and computer program products for using a personal conference to privately establish and control media connections with a telephony device are disclosed. According to one method, a media connection is established between a first user and a personal conference instance. The first user is connected to the personal conference instance via a telephony device, such as a PSTN phone. A plurality of second media connections is established between a plurality of second users and the personal conference instance in a manner that conceals existence of the personal conference instance to at least one of the second users. Media packets from the second users are mixed and sent to the first user. Media packets from the first user are sent to the second users. The first user dynamically controls at least one aspect of the personal conference call instance.

In telephony networks, it may be desirable to provide a mechanism where more than two media streams can be privately mixed and sent to a general purpose PSTN telephony device. Conventional telephony devices, such as PSTN phones, are limited in that they can only handle two different incoming media streams. If it is desirable to send more than two media streams from a local PSTN phone to a remote PSTN phone or to receive more than two media streams from the remote PSTN phone, it is necessary to use a conference bridge. However, using a conference bridge requires that all parties connected to the conference bridge hear each other.
In some instances, it may be desirable for the local PSTN phone to receive more than two media streams without requiring that the mixed media streams be delivered to all users or devices connected to the local PSTN phone. For example, if a business manager is communicating with multiple employees in the field, it may be desirable for the manager to be able to simultaneously hear multiple employees in the field. However, it may not be necessary that the employees in the field know that the manager can hear all of them or that they be able to hear each other. In another example, one user may desire to listen to music while communicating with other users but may not desire to transmit the music to the other users. In yet another example it may be desirable for an administrator or supervisor at a call center to hear multiple calls with customers, to selectively adjust features of the calls, and to prevent the customers from hearing each other. Conventional conference bridges lack the flexibility to implement these scenarios.
FIG. 1 illustrates a conventional meet-me conference that uses a conference bridge, which mixes and sends audio packets from all parties to all parties. In FIG. 1, a conference host or moderator 100 informs users 102 of a DID number for a conference bridge 104. Each user 102 dials the DID number for conference bridge 104 and bidirectional media streams 106 are established between each user and conference bridge 104. In this example, each user hears the audio stream of every other user. Moderator 100 can adjust volume of a connection through floor control application software. Some floor control application software even allows the moderator to selectively mute participants in the conference call for privacy purposes. However, such systems still require that the users be aware of the conference call and that audio streams from users who are not muted be presented to all other users.
Accordingly, in light of these shortcomings, there exists a long felt need for methods, systems, and computer program products for privately establishing and controlling media connections with a PSTN telephony device.


A disc drive apparatus is comprised of an opening portion which can insert/eject a large disc shaped medium and a small disc shaped medium, a feeding roller which pulls in a disc shaped medium being inserted to the opening portion, oscillating links which have convex portions against which an end surface of the disc shaped medium which is guided inside the apparatus by the feeding roller, a locking plate which fixes the oscillating links, an actuating lever which is connected to one of the oscillating link, and a slide cam which starts moving toward the opening portion in conjunction with an oscillation of the actuating lever.

1. Field of the Invention
The present invention relates to disc drive apparatuses which are used for erasing and filling with data on a disc shaped medium (a disc type recording medium) such as a compact disc (CD) and the like, and more particularly to a disc drive apparatus which can read and/or write two kinds of large and small disc shaped media having different diameters.
2. Description of the Related Art
In recent years, disc shaped media such as CD, DVD and the like have come into wide use as a recording medium for a voice and a screen image. Most of the CD and the DVD are unified in a diameter of 12 cm (a large-diameter disc), however, there are disc shaped media having a diameter of 8 cm which are called as a single CD (a small-diameter disc). The two kinds of large and small discs can be generally driven by one apparatus, however, apart from an apparatus structured such that the disc is set manually on a turn table, it is required to accurately position the two kinds of large and small disc shaped media in the disc drive apparatus using a transfer system by means of a feeding roller.
In the disc drive apparatus provided with the feeding roller, after discriminating a size of the disc shaped media which is guided to an inner portion of the apparatus by the feeding roller by means of a plurality of photo sensors, a solenoid is driven based on a discriminated signal from the photo sensors. In this type of disc drive apparatus, a position of a stopper pin is changed in correspondence to the size of the disc based on a series of operations.
However, in the disc drive apparatus having the structure mentioned above, since a lot of photo sensors are required for discriminating the size of the disc, there are problems that a high cost is required, and a complex control program is required. Further, there is a defect that a control system generates a malfunction if the photo sensors detect any foreign matter.
Accordingly, in another related art disk drive apparatus, the large and small disc shaped media are guided to a predetermined position by a link mechanism including a first switch actuating lever actuated by the small-diameter disc shaped media reaching a predetermined position, and a second switch actuating lever actuated by the large-diameter disc shaped media reaching a predetermined position, and a disc clamping motion and the like are executed by a switching operation by the first and second switch actuating levers (for example, Japanese Utility Model Application Publication No. H6-48603).
However, in the apparatus disclosed in the publication mentioned above, since a lot of parts are required for accurately position the large and small disc shaped media, in addition to the first and second switch actuating levers, there is a problem that the structure of the disc drive apparatus becomes complex. Further, since an end surface of the disc shaped media is brought into contact with the switch actuating lever, there is a requirement of a mechanism for moving the switch actuating lever apart from the disc end surface at a time of driving the disc shaped media.
The present invention is made by taking the circumstances mentioned above into consideration, and a main object of the present invention is to provide a disc drive apparatus which can position two kinds of large and small discs and read the discs well based on a simpler structure than the conventional one.

Disc drive apparatus with loading mechanism for different sized discs


A four transistor XOR or XNOR gate includes an inverting stage and a non-inverting stage. The transistors in each stage are coupled so as to enable changing inputs and existing inputs to drive the output in the same direction. The XOR gate and XNOR gate take advantage of a known order or inputs to reduce the delay of the gate.

The present invention relates generally to the field of logic elements, and more particularly to the field of exclusive OR and exclusive NOR logic elements having alternating inputs.
FIG. 1A shows a conventional exclusive OR (XOR) circuit 100. The circuit includes eight transistors 105, 110, 115, 120, 125, 130, 135, and 140, four input signals A, B, and their corresponding inverted signals, A and B, and an output signal, OUT. The "" signal indicates an inverse operation. Two of the transistors, 105 and 125, are coupled to voltage line Vdd, and two transistors, 120 and 140, are coupled to ground line Gnd.
The eight transistors in XOR gate 100 typically occupy a large area. This, of course, reduces the number of circuits that can be placed on a single chip and increases production costs.
Some attempts have been made to improve this problem. FIG. 1B shows a conventional XOR/exclusive NOR (XNOR) gate 170 in differential form. Gate 170 includes twelve transistors, all of the transistors of gate 100 plus four more transistors, 145, 150, 155, and 160. The gate also produces another output signal, OUT. By using the differential form, gate 170 takes advantage of the overlapping use of the transistors coupled to Vdd and Gnd to reduce the number of transistors for both gates from sixteen (eight plus eight) to twelve. Gate 170, however, still occupies a large area.
Conventional XOR and XNOR circuits have other limitations. By coupling transistors directly to Vdd and Gnd to produce output levels, both XOR gate 100 and XOR/XNOR gate 170 suffer from poor transition responses. For each gate, either the Vdd line or Gnd line drives the output. When an input changes, the transistors that are conducting turn off to remove the conduction from the line currently driving the output. Other transistors, corresponding to the input transition, turn on to supply the conduction from the other line to drive the output. The transistors turning off, however, drain current from the output, thereby increasing delay. For both gates, the early part of the transition is wasted waiting for the gates of the turning on transistors to surpass the threshold. This waiting reduces the performance of the circuits.


In a method of manufacturing a laminate type electronic component, while the distance between adjacent exposed ends of a plurality of internal electrodes is adjusted preferably to be about 50 μm or less, a plurality of conductive particles composed of Pd, Pt, Cu, Au, or Ag are provided on the surface of a component main body. The conductive particles have an average particle size of about 0.1 nm to about 100 nm, which are distributed in island-shaped configurations over the entire surface of the component main body, while the average distance between the respective conductive particles is adjusted to fall within the range of about 10 nm to about 100 nm. The component main body is subjected to electrolytic plating such that plating growth develops in and around a region including the respective exposed ends of the plurality of internal electrodes.

1. Field of the Invention
The present invention relates to a laminate type electronic component and a method for manufacturing the laminate type electronic component, and more particularly, relates to a laminate type electronic component with an external electrode formed directly by plating in such a way that the external electrode is at least partially connected electrically to a plurality of internal electrodes, and a method for manufacturing the laminate type electronic component.
2. Description of the Related Art
Laminate type electronic components typified by laminated ceramic capacitors are, in general, provided with a component main body which has a stacked structure including, for example, a plurality of stacked functional material layers composed of a dielectric ceramic, and a plurality of layered internal electrodes formed along the interfaces between the functional material layers. The respective ends of the plurality of internal electrodes are exposed at each of two end surfaces of the component main body, and external electrodes are formed so as to electrically connect the respective ends of the internal electrodes to each other.
For the formation of the external electrodes, typically, a conductive paste including a metal constituent and a glass constituent is applied onto the end surfaces of the component main body, and then subjected to firing, thereby forming paste electrode layers first. The paste electrode layers serve to electrically connect the internal electrodes to each other. Next, a first plating layer containing, for example, nickel as its main constituent is formed on the paste electrode layers, and a second plating layer containing, for example, tin or gold as its main constituent is further formed thereon. The second plating layer is intended to ensure solderability, whereas the first plating layer serves to prevent solder erosion in the case of a solder joint.
As described above, the external electrode is typically composed of the three-layer structure of the paste electrode layer, the first plating layer, and the second plating layer.
However, the paste electrode layer has a large thickness of several tens μm to several hundreds of μm. Therefore, in order to limit the dimensions of the laminate type electronic component up to certain specifications, there is undesirably a need to reduce the effective volume for ensuring a capacitance, because there is a need to ensure the volume for the paste electrode layers. On the other hand, the plating layers each have a thickness on the order of several μm. Thus, if the external electrodes can be composed only of plating layers, a larger effective volume can be ensured for ensuring the capacitance.
For example, Japanese Patent Application Laid-Open No. 63-104314 discloses a method in which a metal thin film formed by an electroless plating method is used as an external electrode. More specifically, Japanese Patent Application Laid-Open No. 63-104314 discloses a process of subjecting the entire surface of a component main body to an activation treatment, then carrying out electroless plating to form a metal thin film on the entire surface of the component main body, and then carrying out masking-etching to remove an unnecessary section of the metal thin film and using the left section thereof as external electrodes.
According to the method disclosed in Japanese Patent Application Laid-Open No. 63-104314, the metal thin film may be tentatively formed on the entire surface of the component main body, and thus, the process from the activation treatment to the electroless plating can be carried out by a batch treatment (for example, a barrel plating method) which can efficiently treat a large number of chips of component main bodies. Therefore, in this regard, the method disclosed in Japanese Patent Application Laid-Open No. 63-104314 can be considered advantageous in terms of productivity and cost.
On the other hand, in the method disclosed in Japanese Patent Application Laid-Open No. 63-104314, the metal thin film is formed on the entire surface of the component main body as a result of the electroless plating, and thus, it is then necessary to remove an unnecessary section of the metal thin film. However, it is not possible to adopt the batch treatment simply in the masking-etching process to remove a specific section of the metal thin film. More specifically, this is because there is a need for steps such as aligning and retaining component main bodies to be subjected to masking-etching, and providing an etching resist to specific sections of the aligned and retained component main bodies, which are not able to be handled by the batch treatment. Accordingly, after all, the method disclosed in Japanese Patent Application Laid-Open No. 63-104314 will not be able to enjoy the advantages of the batch treatment, such as the ability to efficiently treat a large number of chips of component main bodies.

Laminate type electronic component and manufacturing method therefor


An enclosed multi-user telecommunications tower covering multiple antennas at various heights with communication passages allowing an operator to move internally between modules containing antennas. Individual adjustment and orientation of the antennas for each provider (or their replacement) is thus readily possible within the tower. The tower preferably comprises lower support modules of reinforced concrete and a steel tower for supporting the antenna systems. The latter is covered with a RF transparent skin covering of a fiber reinforced plastic. The communication means takes the form of an annular space between the steel tower support and the RF transparent skin covering wherein the multiple antennas are supported.

The present invention relates to an improved tower for telecommunication signals, such as used for microwave, electromagnetic, light wave, television, etc.
Prior art telecommunication towers have generally been of an open grid structure with antennas mounted in fixed position at the top of the support. Such open structures have many disadvantages. They are difficult to maintain. They require cables to prevent excessive swaying due to wind and are open to adverse weather conditions. They are additionally susceptible to vandalism, especially the cutting of the cables securing the tower in place.
Such traditional lattice towers are generally considered to be unattractive and may devalue surrounding property as well as presenting a hazard to birds flying into the cable supports.
Lattice towers or monopoles present a particular problem when designing a multi-provider facility at one location. In such a system each antenna must be tailored in its orientation and direction to the requirements of each user. Due to the different orientations of the different providers systems, ie different azimuths (horizontal angular distances from a fixed reference direction), this typically requires the frames supporting the antennas to be turned in different directions on the tower to be set to the proper azimuths.
As time passes the system becomes over crowded. The antennas must be adjusted or replaced to accommodate new cell sites. This is a difficult task in such systems, often requiring cranes or similar units to reach the antenna sites and to permit the necessary modifications. In addition to the physical problems, change of equipment and antennas on the tower requires reanalysis of loads versus the original design specification in order to comply with building codes.
There has been some movement away from such lattice towers for use as a telecommunication facility. Substantially totally enclosed towers with architecturally pleasing exteriors have recently come into use. The outside appearance is that of a building, church tower or the like rather than that of a telecommunications tower. However, such units do not offer flexibility of rearranging antennas, ready access thereto, as well as the ability to handle multi-users with different orientations.
The basic concept of forming a communications tower out of prefabricated modular units is shown in U.S. Pat. No. 3,768,016 to Townsend et al. (1973). It is noted that in the Townsend et al. system their antennas A are mounted outside of the tower and thus are exposed to the elements. Access to the antennas requires descending from the tower roof to these outside locations--a rather dangerous operation.
The present invention is directed to overcoming the disadvantages of the preceding systems and to providing a particularly desirable multi-user antenna telecommunications tower.

Multi-user antenna telecommunication tower


Systematic methods to detect, verify, and repair a collinear model are presented. After detecting collinearity in a model or subsets of a model, a directional test is carried out to verify if the collinearity is real. The model can then be adjusted in either direction to making a near collinear model exactly collinear or less collinear, subject to model uncertainty bounds or other linear constraints. When doing the model adjustment, deviations from the original model are minimized and the directionality of the model is kept unchanged.

Model Predictive Control (herein referred to as "MPC") is a technology utilized in various Advanced Process Control (herein referred to as "APC") systems. MPC-based systems have been implemented on thousands of refining and chemical processes over the past two decades. DMCplus®, and the earlier version, DMC, (both available from Aspen Technology, Inc. of Cambridge, Mass.) is a widely used MPC-based system. In an MPC-based system, a model is used to predict the future behavior of a process, given the current and history input information (e.g., measurements of process conditions). An optimized control plan is calculated such that the predicted future response and the control action needed to achieve the response will satisfy certain predefined criteria. Once the calculated control plan is implemented (e.g., after the first point of the control move is implemented), the process measurements are collected and fed back to the controller to update the model predictions. A new control plan calculation is then initiated.
In an MPC-based controller, the model plays a central role. The model not only dictates the accuracy of the predictions, but it also affects the control actions. Model uncertainty is inevitable in practice, so the quality of the model should be evaluated based on its relevant application (i.e., not just the model's predictive ability, but also its control performance).
Collinearity in the model impacts control performance significantly. Excessive control action is one problem associated with unsolved collinearity in a model. The action of the controller, at least to some extent, mirrors the response from the model universe. When the model is nearly collinear, but is not perfectly collinear, excess control action may be generated in response to changes in system constraints or to achieve insignificant objective function improvements. A second problem associated with unsolved collinearity is that of unstable closed-loop control. If both the model and the underneath process are nearly collinear, but they have different directionality, the closed-loop system will become unstable. A third problem associated with unsolved collinearity is poor process performance. If the underlying process being modeled is not collinear, but the model is, then the controller will treat the process as if it has fewer degrees of freedom in the controlled variables and will not explore the full potential of the process. Poor control performance can even cause damage to the normal operation of the process.
Numerous attempts have been made to alleviate the problems posed by collinearity to MPC implementations. For example, some tools developed by the APC community detect a collinear model, or model subsets, through the use of either Relative Gain Array (herein referred to as RGA) or Singular Value Decomposition (herein referred to as SVD) to detect a collinear model or model subsets. See, for example, J. M. Maciejowski's "Multivariable Feedback Design," published by Addison-Wesley Publishing Company, 1990, ISBN 0-201-18243-2, the entire teachings of which, are incorporated herein by reference. Some of those tools also adjust the model to minimize the RGA number; however, those approaches are limited to a 2×2 system.
A need exists for methods and articles for systematically detecting, verifying, and repairing collinear models.

Methods and articles for detecting, verifying, and repairing collinearity in a model or subsets of a model


There is provided a method of detecting a presence of a luminophore in a detection volume comprising providing excitation radiation in said detection volume. A luminophore is provided in said detection volume being excitable by said excitation radiation. The luminescent radiation is detected to identify the presence of said luminophore in said detection volume. In one aspect of the invention, said luminophore is selected to emit luminescent radiation having a wavelength in said medium that is larger than twice said smallest dimension; and wherein said luminophore is selected to be excitable by excitation radiation having a wavelength in said medium that is smaller than twice said smallest dimension. Accordingly, luminescent radiation is blocked from entering the detector but for the portion present on an interface of the aperture.

US2005244863 discloses a configuration for excitation of luminophores by means of an evanescent wave. An evanescent wave is a rapidly decaying electromagnetic field which cannot propagate due to a sub-wavelength aperture. In this disclosure, exciting radiation is provided to penetrate as an evanescent wave in a bio-molecule containing mixture. The evanescent wave is created by a structure having sub wavelength apertures. However, the apertures only allow a small portion of the generated radiation to be transmitted. This causes a limited yield of luminescent light to be used for detection purposes.


A low pass filter circuit (100) structure is provided. The low pass filter circuit structure includes first and second dominant inductor (114, 116)s, a first capacitor (120) and first and second shunt capacitors (122, 124). The first dominant inductor has a first end and a second end and the second dominant inductor has a first end and a second end. The second end of the first dominant inductor is electrically connected to the second end of the second dominant inductor. The first capacitor is electrically coupled between the first end of the first dominant inductor and the first end of the second dominant inductor. The first shunt capacitor is electrically coupled between the first end of the first dominant inductor and a ground potential, and the second shunt capacitor is electrically coupled between the first end of the second dominant inductor and the group potential. The first dominant inductor and the second dominant inductor are further coupled by one or both of magnetic coupling and parasitic mutual capacitive coupling.

Low pass filters are utilized in radio frequency (RF) front end circuits to remove undesired harmonics or spurious signals resulting from the mixing of signals in the RF front end circuit. It is important to design low pass filters with a wide stopband and a high stopband rejection to improve the linearity of the RF front end circuit and to reduce the bit-error-rate (BER) in high date rate communication systems. It is also important for the low pass filter to have a compact size and an integration ability to reduce cost of the RF integrated circuit.
While stepped impedance low pass filters and open stub low pass filters are commonly used for low pass filter implementation, the stepped impedance low pass filters and open stub low pass filters have a disadvantage in that both implementations provide a gradual cut-off response. By increasing the number of sections of the step impedance low pass filters or the open stub low pass filters, the rejection characteristics of the low pass filters can be improved. However, increasing the number of sections will increase passband insertion loss as well as the physical dimensions of the low pass filters. Some low pass filters employ a semi-lumped element composed of a lumped capacitor and a section of transmission line to cope with this problem. However, the use of multiple lumped elements will increase the component cost of the low pass filters as well as increasing the assembly cost of the RF integrated circuit, especially for low pass filters operating in a high RF frequency range. Multi-section low pass filters using microstrip line and microstrip elements such as interdigital capacitors, coupled lines and stepped-impedance hairpin resonators are other effective approaches. A stepped-impedance hairpin resonator allows design of low pass filters of relative smaller size and with an additional zero point in the stopband (e.g., achieved through an additional electric coupling path). In addition, defected ground structure (DGS) microstrip line structures have been utilized in low pass filters to implement wide stopband. However, the DGS microstrip line structure introduces disadvantages. For example, DGS microstrip line structure increase radiation due to a partially open ground plane, requiring a metallic enclosure to shield the DGS structure, and thereby increasing the cost of the low pass filters.
Generally, most of the prior art low pass filter designs are quite bulky, which is not economic to use with other circuits, especially they are not possible to be integrated with RF integrated circuits. Active low pass filter designs have been proposed to overcome the cost and integration issues. However, active low pass filters usually contribute more noise than their passive counterparts and have very limited stopband performance. Another important drawback is that active low pass filters consume power.
Thus, what is needed is a low pass filter design which successfully and simultaneously addresses the problems of compactness, in-band matching, insertion loss, stopband rejection and stopband bandwidth. Furthermore, other desirable features and characteristics will become apparent from the subsequent detailed description and the appended claims, taken in conjunction with the accompanying drawings and this background of the disclosure.


A user requesting authentication is presented a keypad that includes multiple keys and respective keys include a character that is associated with a shape. Responsive to selection of a key, a first set of attributes is activated for selection. Responsive to determining a selection of an attribute from the first set of attributes, activating one or more additional sets of attributes associated with the first key. Responsive to determining a selection from the one or more additional sets of attributes, determining whether a selection of an additional key is made. Responsive to determining the selection of the additional key, activating for selection a first set of attributes and one or more additional sets of attributes of the additional key, and responsive to determining selections of keys and corresponding attributes associated with the selection of respective keys, determining the validity of the authentication code.

The use of passcodes and personal identification numbers (PINs) as authentication of access to personal devices, accounts, and services is intended to offer security. In some cases, authentication methods include use of multiple devices, longer character strings, or variations of upper case, lower case, numeric, and special character requirements to improve security. Advancement in efforts to improve security are on-going, keeping pace with advancement of technological capabilities.

International Business Machines Corporation


A memory device comprises memory banks, power gates, and bank wake-up circuits. Each of the memory banks has a core voltage supply. The power gates are coupled to the memory banks for charging the core voltage supplies and have a plurality of powering modes. The bank wake-up circuits are coupled to the power gates for selecting one of the plurality of power modes for charging the memory banks during a wake-up mode. The bank wake-up circuits sense the core voltage supplies during the wake-up mode. The bank wake-up circuits serially charge the memory banks as a function of the sensed core voltage supplies of the memory banks.

A memory device may include a deep sleep or light sleep mode, which is an operating mode in which the memory banks of the memory device are in a reduced power state or altogether completely shut off. The use of a sleep mode reduces the amount of electrical power consumed in comparison to an awake or normal operating mode of the memory device.
FIG. 1 illustrates a prior art block diagram of a memory device with some memory instances in a deep-sleep mode. A memory device 10 comprises memory instances 8 and 12. The memory instances 8 are in a deep-sleep mode and the memory instances 12 are in a normal active mode (also referred to as a functional mode). When some or all of the memory instances 8 are woken up, there is a pull down effect on the power supply to the memory device.
For instance, when the memory instances 8 are switched to an active state, the internal core voltage supplies for these instances 8 are woken up by charging them. This causes a current surge on the power supply, which can be very large. The current from the power supply can significantly droop due to the instantaneous current consumed to charge the memory instances. The power supply can droop low enough that the currently active memory instances 12 may fail.
Furthermore, there is typically a switch that gates the power supply to each of the memory instances. When the switch is opened (meaning the respective instance is not being powered), the internal core voltage supply of the respective instance drains to ground due to voltage leakage. Eventually, the bitcells of the memory instance will lose its contents since the internal power will drop below a minimum voltage to keep the contents stored in the bitcells. In order to gain power savings, power gating or a light sleep mode is applied in which the internal core voltage supply is intentionally dropped a little in voltage (e.g., dropped about 100 mV).
FIG. 2 illustrates a graph of a power supply that is pulled down by memory instances being woken up. The graph of a power supply has two voltage rails one set at a voltage VCS and one set at ground. When the memory instances are woken up, the power surge will cause the VCS and ground voltages to droop below a minimum operating voltage range Vmin Fail. The memory instances must be operated at a range greater than the minimum operating voltage range to perform reliably. Due to the power source drooping below the minimum operating voltage range, the already active memory instances may undesirably fail and lose its stored data.
In order to combat such issues, prior art has developed various methods for preventing active memory failures. In one method, the current surge from waking the memory banks is reduced by having an inverter delay chain that charges one bank first, and then a next bank after a preset amount of time has elapsed. The delay can be programmed into the inverter delay chain. In other words, the banks are turned on in a stagger manner using delay elements to provide time delays for such staggering. However, a drawback of this method is that it's slow. Additionally, the performance of the inverter delay chain elements can undesirably change the wake-up current profile due to the process characteristics of the device.
Another prior art method provides for the charging of bit lines of a memory bank for waking up that memory bank. First, the bit lines are allowed to discharge to ground. Next, the bit lines are powered up sequentially using the power supply. The power supply droop is thereby minimized by slowly charging up each of the bit lines one at a time for each of the memory banks. However, in actual application this is not useful since there are a tremendous number of bit lines in each of the memory banks. The amount of circuit overhead alone to individually charge each one of the bit lines is untenable; not to mention the amount of time needed to sequentially charge each bit line is very long.
Therefore, it is desirable to provide new methods, circuits, and systems for waking up memory banks of a memory device to prevent a steep drop in the current of a power supply for the memory device.


A bottom-emitting nitride light-emitting device with enhanced light extraction efficiency is provided. The increased light output is provided by the reflector that redirects upward-going light towards the bottom output. A mesh contact area, in one form, spreads current across the entire carrier injection area without occupying the entire top surface of the device.

Light Emitting Diodes (LEDs) take many different forms and are increasingly used in varied applications ranging from display backlighting, to traffic lights, to street signs, to indicator lamps, to general lighting, to UV curing of adhesives, to spectroscopy, and to water purification. In recent years, there have been significant technical advances leading to improved LED brightness. However, the ability to efficiently extract light out of LED structures has typically been a challenge in the design of high efficiency LEDs.
In the case of nitride-based UV LEDs, light is usually extracted out of the backside of the wafer because one or more layers above the light generating active layer are typically absorbing. Moreover, layers having high aluminum content in the nitride system are exceedingly resistive, so a current spreading top layer positioned above the current injection area of the wafer is typically used. Nitride-based light-emitting diodes (LEDs) usually feature such a top layer that fully covers the current injection area. This top layer can be an opaque metal or a transparent Indium Tin Oxide film. Its purpose is to spread current across the entire current injection area. It is also desirable to make these top layers highly reflecting, so upward going light can be reflected downward towards the backside or bottom output.
However, highly reflective top layers are difficult to attain. A good p-type contact requires that the noted current spreading metal contact layer that covers the entire current injection area of the device be alloyed to the p-type layer. The rough interface between the alloyed contact and the p-type layer causes large amounts of light scattering and absorption.
FIG. 1 shows a top view of a typical nitride-based LED 10 having a top p-contact layer 12 having a metal contact 14 formed thereon and an n-contact layer 16 having an n-contact pad 18. The p-contact layer 12 is covered by the metal contact 14 which is typically formed of a Ni/Au metal alloy formed thereon. This metal contact 14 is formed by initially depositing Ni and Au as separate metal layers. The layers are then annealed to alloy them into an underlying GaN epitaxial contact layer (not shown in FIG. 1). The metal contact 14 serves as a current spreading layer that distributes current across the entire current injection area. The alloyed interface between the metal contact and the underlying epitaxial layer allows electrical injection into the device. Unfortunately, as noted above, the alloying process results in a rough interface that scatters light and leads to low top-side reflectivity.
FIG. 2 shows a cross section illustration of the device 10 in FIG. 1. Light generated at an active region (e.g., the InAlGaN heterostructure multiple quantum well layers) within the epitaxial layers 20 is reflected by the top metal contact 14, so light has to be emitted out of the structure through the wafer backside (e.g., sapphire substrate 22 and AlN template 24). In the case of ultraviolet (UV) LEDs, a portion of the upward-directed light would be lost through absorption because the top contact layer 12 is absorbing. Although higher bandgap materials would be transparent to UV light, they are not well suited as contact layers because high aluminum-containing p-type AlGaN films are very resistive.
In connection with other technologies such as GaAs surface-emitting laser devices, the use of annular rings is not uncommon. However, for nitride based light emitting diodes contemplated above, if an annular ring were used as a top metal contact, the highly resistive upper p-type layers would prevent current from spreading into the center region of the device under the "hole" of the ring. Most of the current would be channeled into the area directly below the annular ring portion where the metal is alloyed to the layer below. This poor current distribution would result in most of the light being emitted from only those areas. Of course, it is desirable to emit light from the entire p-contact area, not just from areas below the location of the metal.


A memory device that includes an internal bus for the transfer of data and reporting signals from and to the memory and output pre-buffers for the transfer of data to output terminals of said memory, a pulse generation circuit for the synchronized loading of data in an output pre-buffer. Additional circuitry is provided that includes a synchronization circuit; a transmission path delay reproduction circuit for reproducing the propagation delays of the data transmitted to the output terminals; and a pre-buffer delay reproduction circuit for reproducing the propagation delays of the output pre-buffers. The synchronization circuit is adapted to synchronize the generation of at least one pulse that is synchronized with the propagation delays reproduced by the transmission path delay reproduction circuit, and the pulse is adapted to enable the loading of the data in the output pre-buffers. The synchronization of the pulse is provided as a consequence of the assured presence of the data, and the synchronous pulse is restored after a time that is equal to the delay introduced by the pre-buffer delay reproduction circuit for reproducing the propagation delays of the output pre-buffers, so as to update the configuration of the output pre-buffers in the time interval determined by the synchronous pulse.

1. Field of the Invention
The present invention relates to a pulse generation circuit and method for data loading in an output pre-buffer, particularly for memory devices.
2. Discussion of the Related Art
It is known that in a memory device the data present inside the memory device must, during the reading step, be transferred to output terminals of the memory device to make the data available to the outside world. Usually, the output terminals are not directly connected to the memory matrix, however, the output terminals present to the outside world the data related to the last reading operation performed on the memory device.
When a reading operation is performed, it is therefore necessary to activate the connecting path between the the memory matrix and the output terminals for data transmission.
A drawback that can often be observed is that noise, which is either present on the supply lines or generated by the switching of the memory outputs, may be superimposed on the data that has just been transmitted. Also, the noise may possess oscillatory characteristics which further interfere with the transmitted data.
When the data is loaded into an output pre-buffer, pre-buffer switches and assumes the mode dictated by the data. Once the data has been loaded into the output pre-buffer for discharge onto the output terminal, any other possible switching (not produced by an actual address transition) that occurs at the input node of the pre-buffer is associated with a new data reading operation, can undesirably alter the configuration of pre-buffer, thus corrupting the data produced by the reading operation.
By introducing an internal bus into the architecture of a memory device, a problem of determining the right moment for synchronization of the data arriving from the memory matrix, over the internal bus is created. Also, the operation of the internal bus must be transparent to external devices.

Pulse generation circuit and method for synchronized data loading in an output pre-buffer


Agencies issue recording devices to personnel for administrating and monitoring controlled calls during the course of their duties. To provide flexible capabilities to agencies, a virtual number is provisioned and configured to enable an operator to administrate controlled calls without dedicated recording devices. Using the virtual number, the operator may setup a controlled call between a victim and a baddie. The victim is contacted via the virtual number by the operator and optionally informed about the controlled call process. In turn, the baddie is contacted using number information of the victim's phone and connected with the victim. Call audio between the victim and baddie is transmitted to the operator. When necessary, the operator may terminate the call remotely from the telephonic device the operator used to setup the call.

1. Field of Art
The present disclosure generally relates to the field of administrating controlled calls.
2. Background of the Invention
Police officers and other agents "operators" oftentimes conduct investigations during the course of their duties. In many cases, these investigations require the operator administrate a controlled call between two parties. Typically, an operator administrates a controlled call by sitting in with one of the parties to monitor and control a telephone call between the two parties. For example, the operator may work a domestic violence case which hinges on a confession from the offender, or baddie. In order to solicit the confession in a covert manner, the operator may work with a victim in a controlled environment such as a police station or the victim's home. The operator then instructs the victim throughout the course of a call placed to the baddie from the victim's phone. The operator may terminate the call if needed by physically taking the phone of the victim and ending the call or otherwise physically disrupting the line. Typically, the operator will utilize a physical recorder to document the call for evidence. In such instances, the operator will require physical hardware for connecting to the victim's phone, tapping into the victim's phone line, or recording audio when the victim's phone is in a speaker phone setting.
These configurations are less than ideal. Specifically, the physical hardware for connecting to the victim's phone may be cumbersome and have incompatibilities with different phone models or a lengthy setup process. Tapping into the victim's phone line typically requires access to a physical phone line which may be difficult with voice over internet protocol (VoIP) lines and wireless cellular phones. Additionally, the simplest option, putting the baddie on speaker, may tip off the baddie and present difficulties with audio recording quality.
Moreover, operators may not carry the necessary equipment to record a phone call during the course of their usual duties and agencies oftentimes lack the ability to issue every operator the appropriate recording hardware. Accordingly, the recording of the call between the victim and baddie may be delayed from an opportune time of collecting evidence or worse. While these difficulties are discussed with respect to an operator, private individuals (e.g., a business owner) and other entities may face similar difficulties in their respective environments.

This patent is subject to a terminal disclaimer.


A cutting device for an electric shaver comprising an outer cutter and a plurality inner blades that are made of a ferrous alloy comprising a substrate of an Fe-Cr stainless steel and a hardened layer of improved hardness and wear resistance. The substrate has a Vickers hardness of 400 or more. The hardened layer has a Vickers hardness of at least 700 and a thickness of 2 to 15 .mu.m. In particular, it is preferred that the hardened layer is a diffusion layer comprising at least 90 vol % of intermetallic compounds of Al and Fe relative to a total volume of the diffusion layer, and Al content included within a depth of at least 2 .mu.m of the diffusion layer is 35 to 65% by weight based upon total weight of a region of the diffusion layer ranging up to the thickness of at least 2 .mu.m. When the ferrous alloy is polished to form the outer cutter and inner blades, it is possible to provide sharp cutting edges of the outer cutter and inner blades, while preventing the occurrence of burrs or micro-chippings at the cutting edges.

1. Field of the Invention
The present invention is directed to a cutting device for use in an electric shaver, and more particularly to a set of an outer cutter and a plurality of inner cutter blades all made of like material having improved surface hardness.
2. Disclosure of the Prior Art
In the past, martensite stainless steels or precipitation-hardening stainless steels have been used for blades of cutting tools such as electric shavers or hair clippers. Those steels exhibit excellent mechanical toughness and shockproof, although, the surface hardness and wear resistance of the steels are not always enough to provide the cutting tools having an extended service life. In addition, when the stainless steels are polished to form blades of the cutting tools, there is a problem that burrs occur at the cutting edges of the blades. As shown in FIG. 9, as a blade angle .theta. defined between a top face 2 and side face 4 of a blade 1 is smaller, the occurrence of burrs 5 increases. Therefore, the burrs must be removed from the cutting edges after the polishing step. However, since the cutting edges often receive damages during the removing step of the burrs, it is difficult to make the cutting edge sharp.
To improve this problem, it is proposed to use ceramic materials such as aluminum oxide (Al.sub.2 O.sub.3) or zirconium oxide (ZrO.sub.2) of excellent hardness and wear resistance. However, there is another problem that the mechanical toughness of the ceramic materials is much lower than that of the steels. In addition, it is not easy to machine the ceramic materials to various shapes of the cutting tools.

Cutter combination for an electric shaver


A vehicle includes a resisting force change mechanism that changes a resisting force exerted against a turning operation of each of an upper cross member and a lower cross member with respect to a body frame, and a resisting force that occurs when the upper cross member and the lower cross member are displaced from respective positions relative to the body frame in at least two different magnitudes. The resisting force change mechanism includes a first portion and a second portion that change a resisting force against a relative turning therebetween about a resisting force change axis which is parallel or substantially parallel with an upper middle axis. The first portion is non-turnably fixed to one member and the second portion is supported by another member, at least a portion of which is turnably supported by the one member, and the second portion turns relative to the first portion.

1. Field of the Invention
The present invention relates to a vehicle equipped with a leanable body frame and two front wheels.
2. Description of the Related Art
A known vehicle includes a body frame that leans leftward or rightward while the vehicle is cornering and two front wheels that are aligned side by side in a left-and-right direction of the body frame (for example, refer to Japanese Patent Unexamined publication JP-A-2005-313876, German Patent Application No. 102010052716, U.S. Design Pat. D547,242S, and Catalogo partidi ricambio, MP3 300 64102 ie LT Mod. ZAPM64102, Piaggio).
The vehicle including the body frame that can lean and the two front wheels includes a link mechanism. The link mechanism includes an upper cross member and a lower cross member. In addition, the link mechanism also includes a right side member which supports right end portions of the upper cross member and the lower cross member and a left side member which supports left end portions of the upper cross member and the lower cross member. The upper cross member and the lower cross member are supported on the body frame at their middle portions in front of a steering shaft. The upper cross member and the lower cross member are supported on the body frame so as to be turnable about axes extending substantially in a front-and-rear direction of the body frame. The upper cross member and the lower cross member turn relative to the body frame as the body frame leans, such that the relative positions of the two front wheels in an up-and-down of the body frame change. The upper cross member and the lower cross member are arranged above the two front wheels in the up-and-down direction of the body frame in an upright state of the body frame.
The vehicle including the body frame that can lean and the two front wheels includes a right shock absorbing device which supports the right front wheel so as to move in the up-and-down direction of the body frame and a left shock absorbing device which supports the left front wheel so as to move in the up-and-down direction of the body frame. The right shock absorbing device is supported on the right side member so as to turn about the axis of the right side member. The left shock absorbing device is supported on the left side member so as to turn about the axis of the left side member. Vehicles described in Japanese Patent Unexamined publication JP-A-2005-313876 and German Patent Application No. 102010052716 further include a handlebar, a steering shaft, and a turn transfer mechanism. The handlebar is fixed to the steering shaft. The steering shaft is supported on the body frame so as to turn relative thereto. When the handlebar is turned, the steering shaft also turns. The turn transfer mechanism transfers the turning motion of the steering shaft to the right shock absorbing device and the left shock absorbing device.
The vehicle including the body frame that can lean and the two front wheels includes a number of on-board components which are provided around the periphery of the steering shaft. The on-board components include lamps such as a headlamp, a radiator, a reservoir tank, electric components such as a horn, and a main switch of the vehicle, a storage box, a storage pocket and the like.
The vehicles described in Japanese Patent Unexamined publication JP-A-2005-313876 and German Patent Application No. 102010052716 include a resisting force change mechanism. The resisting force change mechanism suppresses the leaning of the body frame and the change in relative position of the two front wheels in the vertical direction of the body frame by increasing a resisting force against the operation of the link mechanism.
In the vehicle described in Japanese Patent Unexamined publication JP-A-2005-313876, the resisting force change mechanism includes a brake disc and a caliper. The brake disc is fixed to the upper cross member of the link mechanism. The caliper changes the resisting force that is exerted on the link mechanism by controlling the frictional force between the caliper and the brake disc. The caliper is attached to the body frame at a location above the upper cross member. The link mechanism operates when the resisting force exerted by the resisting force change mechanism is zero or small. When the resisting force exerted by the resisting force change mechanism is large, the operation of the link mechanism is suppressed or stopped. When the resisting force exerted by the resisting force change mechanism is zero or small, the brake disc and the upper cross member move together relative to the body frame.
In the vehicle described in German Patent Application No. 102010052716, the resisting force change mechanism includes a rod, a piston that is provided at one end of the rod, and a cylinder in which the piston moves. In the resisting force change mechanism, the rod extends or contracts in relation to the cylinder as a result of the piston moving within the cylinder. The rod stays stationary in relation to the cylinder as a result of the piston stopping within the cylinder. The other end of the rod is supported on the left member. The cylinder is supported on the body frame at a location above the upper cross member. The resisting force change mechanism changes the resisting force against the link mechanism by changing the moving state of the piston within the cylinder. The link mechanism operates when the resisting force exerted by the resisting force change mechanism is zero or small. When the resisting force exerted by the resisting force change mechanism is large, the operation of the link mechanism is suppressed or stopped. The rod and the cylinder also move as the link mechanism operates when the resisting force exerted by the resisting force change mechanism is zero or small.
The vehicles described in Japanese Patent Unexamined publication JP-A-2005-313876 and German Patent Application No. 102010052716 include a link mechanism that is located around the periphery of the steering shaft, and this link mechanism moves as the body frame leans. In addition, the vehicles include around the periphery of the steering shaft the resisting force change mechanism which operates as the body frame leans and the link mechanism operates. Because of this, in the vehicle including the body frame that can lean and the two front wheels, the resisting force change mechanism needs to be arranged so that the movable range of the link mechanism and the large movable range of the resisting force change mechanism do not interfere with each other. Further, in providing on-board components, it is necessary that the on-board components are arranged so as to avoid interference with both the movable range of the link mechanism and the movable range of the resisting force change mechanism. Because of this, in the vehicle including the body frame that can lean and the two front wheels, the construction around the periphery of the steering shaft tends to be large.


Location information of each device connected to a network is managed in a hierarchical structure to display the location of each device in a manner easy to be recognized by a user. The location information of each device connected to the network is managed in the hierarchical structure and layout bit maps are stored in each client. When a client issues a device search request, the hierarchical location of the device whose location search was requested can be identified, and the identified location of the device can be displayed in a way to be easily recognized. If the layout bit map corresponding to the search result does not exists, the device can be displayed and registered through visual operations at a desired position. When the client displays the map information, it is unnecessary for a sever to transmit the map information to the client.

1. Field of the Invention
The present invention relates to a system for searching a device on a network, and more particularly to a device searching system which can plainly display a searched device and its location information.
2. Related Background Art
Directory service has been provided as a method of efficiently searching and utilizing various resources (such as printers, servers and scanners) connected to a network.
Such directory service is, so to speak, a telephone directory of a network which stores various information. A specific example of a directory system using the directory service is LDAP (Lightweight Directory Access Protocol). The specifications of LDAP are described in RFC (Request For Comments) 1777 which is standard specifications issued by IETF (Internet Engineering Task Force).
For example, by searching device terminals connected to a network by using the directory service, a list of device terminals usable by the network can be obtained.
However, this list does not provide location information of a device terminal in a way easy to recognize.
A device search system has been desired which is suitable for notifying a user of device hierarchical location information in a way easy to confirm. For example, if the device is a network printer, the device hierarchical location information may be "location of a printer nearest to the user on this floor", "location of a color printer in a building" and the like.

System for setting location information in a device on a network