The present invention provides a solder ball printing apparatus in which solder balls are uniformly dispersed on a mask surface and are loaded into an opening area of the mask. A solder ball shaking and discharging unit includes a solder ball reception unit which receives solder balls from a solder ball reservoir unit, a wire member in a convex shape which is attached to surround a solder ball shaking and discharging port of the solder ball shaking and discharging unit and in which a plurality of wire members are arranged at predetermined intervals, and solder ball rotating and collecting mechanisms which sweep and collect the solder balls at the wire member in a convex shape.

(1) Field of the Invention
The present invention relates to a printing apparatus for forming solder balls on an electrode of a substrate such as a semiconductor by a printing method, and particularly to a solder ball printing apparatus for printing using solder balls.
(2) Description of the Related Art
In a conventional solder ball printing apparatus, there have been proposed various configurations in which a mask used for printing solder balls is placed on a substrate such as a semiconductor, the solder balls are fed onto a mask surface, and the fed solder balls are pressed from an opening area provided at the mask into a surface of the substrate such as a semiconductor.
As described in, for example, Japanese Patent Application Laid-Open No. 2005-101502, there is disclosed a printing apparatus configured in such a manner that a solder ball feeding unit for feeding solder balls onto a mask surface and a plurality of wire members provided at a sieve are moved in the horizontal direction while being pressed into the mask surface in order to press the solder balls fed onto the mask surface into a surface of a substrate from an opening area provided at the mask.
In the printing apparatus, it is described that at a left end of the mask, there is provided a solder ball sucking port where the solder balls remaining on the mask surface are sucked and removed.
Further, Japanese Patent Application Laid-Open No. 2008-142775 discloses that when solder balls are squeezed into an opening area of a mask by moving a squeegee head in the horizontal direction while rotating the same, a predetermined amount of solder balls is fed to a rotational shaft portion of the squeegee head from a measuring unit provided at an upper portion of the squeegee head, and the solder balls are fed from the rotational shaft onto a mask surface.
In the configuration of Japanese Patent Application Laid-Open No. 2005-101502, when the mask is placed on a table, a solder ball feeding apparatus is disposed at an inlet port to which the mask is carried, and the mask is moved on the mask while feeding the solder balls onto the mask surface from the solder ball feeding apparatus.
Accordingly, the solder balls are uniformly dispersed and arranged on the mask surface. Thereafter, the sieve is moved in the horizontal direction, and the solder balls are fed into the opening area of the mask. When the solder balls are dispersed and arranged on the mask in this method, there is a risk that the dispersed and arranged solder balls vary in amount due to fluctuations caused when the mask is moved and oscillation when the movement of the mask stops.
Further, since the solder balls are fed before the mask is set in the printing apparatus, it is necessary to move the mask for each printing process, resulting in the problem of a long tact time.
Further, solder balls unused in printing are sucked through the sucking port provided separately from a solder ball feeding head. In this case, when the extra solder ball can not be held by the first wire member of the sieve in a wire shape, the extra solder ball is held by the subsequent wire member to be carried near the sucking port. However, there is a possibility that the solder ball held by the subsequent wire member and the solder ball which is previously fed are fed to an opening area of the mask at the same time.
In the method of feeding the solder balls onto the mask surface from the rotational shaft portion as disclosed in Japanese Patent Application Laid-Open No. 2008-142775, the solder balls are dispersed and arranged on the mask surface along with the rotation of the squeegee head. Accordingly, the solder balls can not be always uniformly dispersed and arranged, and printing defects are generated. Thus, a repairing step is essential.
As described above, when the solder balls are dispersed and arranged on the mask, there is a risk that the dispersed and arranged solder balls vary in amount due to fluctuations caused when the mask is moved and oscillation when the movement of the mask stops. In addition, since the solder balls are dispersed and arranged on the mask surface along with the rotation of the squeegee head, the solder balls can not be uniformly dispersed and arranged. Thus, there are problems in aspects of the configuration of the apparatus and printing methods.
Accordingly, a first object of the present invention is to provide a solder ball printing apparatus for uniformly printing solder balls with a high degree of accuracy.
A second object of the present invention is to provide a solder ball printing apparatus for shortening a tact time in solder ball printing.
A third object of the present invention is to provide a small-sized solder ball printing apparatus with a simple configuration.
A fourth object of the present invention is to provide a solder ball printing apparatus in which solder balls unloaded into an opening area of a mask are collected for reuse by solder ball rotating and collecting mechanisms.
A fifth object of the present invention is to provide a solder ball printing apparatus in which when solder balls are fed to a solder ball shaking and discharging unit from a solder ball reservoir unit, the solder balls are reliably fed to the solder ball shaking and discharging unit while preventing the solder balls from being spread around.
A sixth object of the present invention is to provide a solder ball printing apparatus which reduces a period of time when solder balls are exposed to the atmosphere to prevent the solder balls from being oxidized.


A transport belt, in particular for machines for the production of web material such as paper or paperboard, which on a web material contact side (18) includes at least two material layers (20, 22, 24) of different material arranged one above the other, wherein prior to starting up for the first time the transport belt (10) is subjected on its web material contact side (18), at least in some regions, to a material-removing process such that the transport belt (10) has on its web material contact side (18) a web material contact surface (26) provided by various material layers (20, 22, 24).

1. Field of the Invention
This invention relates to a transport belt such as can be used on machines for the production of web material for example, such as paper or paperboard for example. In particular, the present invention relates to a transport or process belt with variably adjustable release characteristics, and a method of manufacturing the transport or process belt.
2. Background and Related Information
Transport belts of this type are used in the production of paper, for example in regions in which the still wet paper material is passed through press sections in order to remove liquid still present in said material. For example, en route through two press rollers between the transport belt and the web material passes the still wet paper material, meaning the paper or the starting material for the paper, a thin liquid film from the water is pressed out of said material. Generally the transport belt is impermeable to water in order to provide as smooth a surface as possible and produce an accordingly unstructured image of this surface on the web material; hence the problem arises at the point where the transport belt is led away from web material that the existing thin film of liquid or water produces an adhesive effect. This impairs the releasing of the transport belt from the web material.
A method known from U.S. Pat. No. 6,962,885 B1, incorporated herein by reference in its entirety, to combat this problem is to provide, on the side of the transport belt which comes into contact with the web material, a thin layer which does not have a flat or smooth surface structure but a multiplicity of small depressions. The latter can be formed during the production of this thin layer by embedding grains of salt in the material. Where the gains of salt are not fully embedded they can be subsequently removed by dissolving in water, thus obtaining hollow spaces or depressions open to the surface. Water pressed out of the web material can be collected in these depressions and the adhesive effect can be at least lessened.
An approach known from EPO 576 115 B1, incorporated herein by reference in its entirety, is for the surface of the transport belt which comes into contact with the web material to be provided with a comparatively rough structure and at the same time to form this region of the transport belt from an elastic material. When the paper material is being pressed between two press rollers the comparatively rough surface is compressed. After it has passed through this press roller region the compressed transport belt relaxes, with the result that the serrated elevations forming the surface roughness create a disturbance in the existing water film, thus making it easier for the transport belt to detach from the web material.

Process belt with variably adjustable release characteristics


The zirconium content of the alloy composition of a copper alloy wire is 3.0 to 7.0 atomic percent; and the copper alloy wire includes copper matrix phases and composite phases composed of copper-zirconium compound phases and copper phases. The copper matrix phases and the composite phases form a matrix phase-composite phase fibrous structure and are arranged alternately parallel to an axial direction as viewed in a cross-section parallel to the axial direction and including a central axis. The copper-zirconium compound phases and the copper phases in the composite phases also form a composite phase inner fibrous structure and are arranged alternately parallel to the axial direction at a phase pitch of 50 nm or less as viewed in the above cross-section. This double fibrous structure presumably makes the copper alloy wire densely fibrous to provide a strengthening mechanism similar to the rule of mixture for fiber-reinforced composite materials.

1. Technical Field
The present invention relates to copper alloy wires and methods for producing copper alloy wires.
2. Description of Related Art
Known copper alloys for wires include copper-zirconium alloys. For example, PTL 1 proposes a copper alloy wire with improved electrical conductivity and ultimate tensile strength produced by subjecting an alloy containing 0.01% to 0.50% by weight of zirconium to solution treatment, drawing the alloy to the final diameter, and subjecting the wire to predetermined aging treatment. This copper alloy wire has Cu3Zr precipitated in copper matrix phases to achieve a high strength up to 730 MPa. In PTL 2, on the other hand, the present inventors have proposed a copper alloy containing 0.05 to 8.0 atomic percent of zirconium and having a two-phase structure in which copper matrix phases and eutectic phases of copper and a copper-zirconium compound are layered on top of each other and in which the adjacent copper matrix phase crystal grains contact intermittently, thus achieving a high strength up to 1,250 MPa.

Copper alloy wire and method for producing the same


The invention provides isolated polypeptide and nucleic acid sequences derived from Bacteroides fragilis that are useful in diagnosis and therapy of pathological conditions; antibodies against the polypeptides; and methods for the production of the polypeptides. The invention also provides methods for the detection, prevention and treatment of pathological conditions resulting from bacterial infection.

The genus Bacteroides is a member of the family Bacteroidaceae. They are Gram-negative, obligately anaerobic, nonsporeforming rods. The genus contains at least 39 species, and are often isolated from sewage as well as the digestive tract of man, animals, and insects. Bacteroides fragilis was first described in 1898 by Veillon and Zuber, but was called Bacillus fragilis. In 1919, Castellani and Chalmers transferred it to the Bacteroides genus. The "B. fragilis group" refers to the saccharoelastic bacteroids that grow well in bile. Members of this group were previously subspecies of B. fragilis and include B. fragilis, B. distasonis, B. ovatus, B. thetaiotaomicron, and B. vulgatus (Castellani and Chalmers. 1984. Genus I. Bacteroides 1919, 959. Krieg and Holt (editors) In Bergey's Manual of Systematic Bacteriology, 1:604–631).
Bacteroides fragilis accounts for only 1% of the normal flora of the human colon, but is the most common anaerobe isolated from clinical specimens. It is associated with soft tissue infections, abscesses and bacteremia (Moncrief J., et al, 1998. Infect. Immun. 66:1735–1739). B. fragilis has also been associated with infection of the skeletal muscle (Katagiri, K., et al, 1996. J. Dermatology. 23:129–132), and meningitis (Aucher, P., et al, 1996. Eur. J. Clin. Microbiol. Infect. Dis. 15:820–823). The B. fragilis group is responsible for 65% of all anaerobic bacteremia cases, with mortality rates in excess of 19% (Redondo, M., et al, 1995. Clinical Infectious Disease. 20:1492–1496).
In 1984, strains of B. fragilis were found to cause diarrhea in newborn lambs (Myers, L., et al, 1984. Infect. Immun. 44:241–244). Subsequently, it has been shown that B. fragilis is associated with diarrhea in other livestock and young children. These strains are called enterotoxigenic strains, because they produced a 20 KD metalloprotease enterotoxin with intestinal secretory activity (Moncrief J., et al, 1995. Infect. Immun. 63:175–181).
There has been an increase in antibiotic resistance within the Bacteroides fragilis group. While there is still excellent activity of many antibiotics, even some of the most potent agents, the carbapenems and the β-lactamase-inhibitor combinations, are losing activity (Snydman, D., et al, 1996. Clinical Infectious Diseases. 23:S54–65). The cefoxitin resistance rate has increased from 0% in 1987 to 22% in 1995 (Bianchini, H., et al, 1997. Clinical Infectious Diseases. 25:S268–269). Resistance to metronidazole, co-amoxiclav, and imipenem is rare, but strains have been found that are resistant to one or all of these antibiotics. (Turner, P., et al, 1995. The Lancet. 345:1275–1277). Clindaycin resistance has been shown to be transferred between strains by either plasmid or transposon mechanisms. (Dalmau, D., et al, 1997. Clinical Infectious Diseases. 24:874–877). The increasing resistance to antibiotics commonly used against Bacteroides species may eventually lead to failures of these treatments.
Sequencing and analysis of this genome is crucial for the identification of essential genes for development of drug targets and to reduce the emerging health threat this organism poses.


The present invention provides a process for the preparation of asenapine maleate of Formula (I), comprising: intra-molecular cyclization of the intermediate of Formula (II) to obtain the intermediate of Formula (III) using aluminium halide.

Asenapine and its pharmaceutically acceptable salts, including asenapine maleate, are known from U.S. Pat. No. 4,145,434. Asenapine maleate is chemically (3aRS,12bRS)-5-chloro-2-methyl-2,3,3a,12b-tetrahydro-1H-dibenzo [2,3:6,7]oxepino[4,5-c]pyrrole (2Z)-2-butenedioate (1:1), having the structure as represented by Formula I.

Asenapine maleate is marketed in the United States under the brand name SAPHRIS®, for the treatment of schizophrenia.
U.S. Pat. No. 4,145,434 describes a process for the preparation of asenapine by the cyclization of 3-(5-chloro-2-phenoxyphenyl)-1-methylpyrrolidine-2,4-dione (Formula II) to 11-chloro-2-methyl-2,3-dihydro-1H-dibenzo [2,3:6,7] oxepino [4,5-c]pyrrol-1-one (Formula III) using polyphosphoric acid at a temperature of 125° C.

U.S. Pat. No. 7,956,202 describes a process for the preparation of asenapine by the cyclization of the intermediate of Formula II to the intermediate of Formula III using hypophosphoric acid and a catalyst.
The drawbacks associated with the preparation of asenapine by the cyclization of the intermediate of Formula II to the intermediate of Formula III using prior art processes include difficulty in complete removal of phosphoric acid from the reaction mixture. This requires the use of a large amount of water for work-up and also adversely affects the yield at the next step.
Thus, there exists a need in the art for an improved and more efficient process for the cyclization of the intermediate of Formula II to the intermediate of Formula III.

Process for the preparation of asenapine maleate


A ball rebound device for ball games comprising: a frame structure, a sheet being detachably attached to the front of the frame structure and adjusting means connected to the frame structure, the adjusting means being able to move part of the frame structure, whereby the tension of the sheet can increase or decrease. By stretching the sheet, it is possible to increase the rebound force of the sheet by ball impact. Similarly, the rebound force can be decreased when the sheet is slackened.

Rebound walls are today used for training and practicing a wide range of ball games. Soccer (European football) will hereafter be used as an example of an application. A person skilled in the art would be able to see potential use for other ball games.
A ball rebound device with only one tension setting may be acceptable for practice by users at one level of skill, but wholly unacceptable for practice by others of substantially different skills. For example, a rebound device that has a loose, nonadjustable return tension level appropriately set for a beginning or child player would most likely be unacceptable to skilled players. On the other hand, a ball rebound device that has a tight nonadjustable return tension level appropriate for practice by a skilled player may prove too dangerous for use by a child or a beginner. An inexperienced ball player can easily be hurt by a fast returning ball, particularly if the user is standing too close to the ball rebound device.
An optimal rebound wall is a wall that can be used by both beginners and experienced persons and for training of various skills. There is therefore a need for a wall which can relatively easily be adjusted to the desired application.
There exists today a number of different rebound devices consisting of a metal or plastic frame with a net material lashed to the frame structure. U.S. Pat. No. 5,857,679 discloses such a rebound net using a tension adjustable elastic net material lashed to a frame structure. Adjusting the tension of the elastic netting material allows the user to alter the return speed of a ball hit against the rebound net. The frame structure can be supported with variable tilting. The net is tied with elastics or in elastically adjustable cord spirally wound around the edge of the elastic net and the frame structure. By tightening or loosing the cord, the rebound force is increased or decreased respectively.
U.S. Pat. No. 6,209,877 discloses a rebound device comprising an outer frame fitted with an inner frame. The inner frame consists of four frame parts individually bolted to the inside of the outer frame. The inner frame is provided with through-holes from the inside to the outside of the frame. Through these holes are led one string horizontally back and forth and one string vertically up and down. The two strings are weaved across each other in the same way as we know it from a stringed tennis racket. The tensions of the device increases by tightening the bolts whereby the inner frame parts are pulled closer to the inside of the outer frame and similarly is the tension of the device decreased by slackening the bolts whereby the inner frame moves away from the inside of the outer frame, thereby creating a space between the outer frame and the inner frame.
U.S. Pat. No. 4,489,941 discloses another rebound device with a net and a frame. The frame includes inner frame members. The inner frame has two adjusting rods each attached by spring elements to a side of the netting. The outer frame is attached by spring elements to the two other sides of the netting material. Adjustable screws attach each adjusting rod to outer frame.
The above-described rebound devices suffer from the disadvantages that a ball which hits the frame will achieve a significantly reduced rebound compared to a ball which hits the strings. Furthermore, the ball contact with the frame will result in an unforeseeable rebound.
The applicability of the device for training of ballgames where delivery along the ground is important, such as in soccer (European football) will be reduced. Instead of jumping back with good speed along the ground, a ball which hits the frame will jump both up and back with reduced force.
A further disadvantage of the above devices is that replacing the net is not user-friendly at all.


A generator for acoustic waves has a source of acoustic waves with which acoustic waves can be introduced into an acoustic propagation medium and a liquid lens having a variable focal length which is arranged in the acoustic propagation medium, the liquid lens having two lens walls and a lens liquid situated therebetween. At least one of the lens walls is deformable for the purpose of varying the focal length. The liquid lens has a central opening, so that the lens walls have an outer and an inner edge, and the outer edge of the deformable lens wall is fixed and the inner edge is displaceable in the direction of the center axis of the liquid lens for the purpose of varying the focal length.

1. Field of the Invention
The present invention is directed to an apparatus for generating acoustic waves of the type having a liquid lens for focusing the acoustic waves.
2. Description of the Prior Art
Generators for generating acoustic waves are known which include a source of acoustic waves with which the acoustic waves can be introduced into an acoustic propagation medium, and a variable focal length liquid lens arranged in the acoustic propagation medium. The liquid lens has two lens walls and a lens liquid situated therebetween and it is known to employ means for deforming at least one of the lens walls for the purpose of varying the focal length.
Such generators, for example can be designed as pressure pulse generators for medical purposes, for example for treating stone pathologies (lithotripsy), tumors or bone conditions (osteorestoration). Such generators, moreover, can be designed as pressure pulse generators utilized in testing materials, with which specimens of material are charged with pressure pulses. Further, such generators can be designed as medical ultrasound generators for diagnostic purposes (for example, ultrasound imaging) or therapeutic purposes (for example, hyperthermia) as well as other types ultrasound generators that serve the purpose, for example, of testing materials or other purposes. In all cases, the acoustic propagation medium serves the purpose of conducting the generated acoustic waves from the source of acoustic waves in the direction of the subject to be acoustically irradiated. The generator and the subject to be acoustically irradiated must be aligned relative to one another such that the specific region of the subject to be acoustically irradiated is situated in the focal region of the acoustic waves, i.e. in the focal region of the liquid lens. The focal length of the liquid lens can be varied in order to be able to match the distance of the focal region of the acoustic waves from the surface of the subject to be acoustically irradiated to the respective requirements. German Published Application 37 39 393 discloses a generator fashioned as a medical pressure pulse generator, namely as a lithotriptor. In the case of the known generator, the means for deforming at least one lens wall are fashioned as a mechanical adjustment device that has a complicated structure and tends to malfunction under certain circumstances. A solution disclosed by German Utility Model 85 23 024, corresponding to U.S. Pat. No. 4,718,421 improves upon this, by providing means for deformation that are actuated by pressurized agents instead of using mechanical adjustment. It is often desirable, however, to employ a locating system in combination with the acoustic wave source, in which case an opening preferably a central opening, must be provided for the component, such as an ultrasound scanner, which generates the locating field. Since the deformable lens wall in the aforementioned known system is executed as a flexible membrane, it is not possible without further complications to provide a central opening for the acceptance of the ultrasound head of an ultrasound locating systems.

Apparatus for generating acoustic wave having a liquid lens with an adjustable focal length


An improved surface P-channel transistor includes providing a semiconductor substrate, forming a gate oxide layer over the semiconductor substrate, subjecting the gate oxide layer to a remote plasma nitrogen hardening treatment followed by an oxidative anneal, and forming a polysilicon layer over the resulting gate oxide layer. Significantly, the present invention does not require nitrogen implantation through the polysilicon layer overlying the gate oxide and provides a surface P-channel transistor having a polysilicon electrode free of nitrogen and a hardened gate oxide layer characterized by a large concentration of nitrogen at the polysilicon electrode/gate oxide interface and a small concentration of nitrogen at the gate oxide/semiconductor substrate interface. The present invention is easily incorporated into fabrication processes and provides an enhanced surface P-channel transistor that resists hot electron degradation, is substantially impermeable to dopants included in overlying layers, and is characterized by a greatly increased extrapolated time dependent dielectric breakdown value.

1. Field of the Invention
The present invention relates to semiconductor devices and methods for their fabrication. Specifically, the present invention relates to surface P-channel transistors, including hardened gate oxides, possessing enhanced performance and reliability characteristics.
2. State of the Art
Higher performance, enhanced reliability, and greater packaging density of integrated circuits are constant goals of the semiconductor industry. However, as components become smaller and smaller to meet these goals, it becomes increasingly difficult to produce semiconductor devices capable of reliable, long-term operation, particularly in light of the operational stresses each component of a state of the art semiconductor device must endure. For example, as state of the art surface P-channel transistors decrease in size, the size and thickness of the gate oxides included in these transistors must also decrease, but as gate oxides shrink, they become more permeable to dopants included in overlying polysilicon electrodes, less resistant to hot electron degradation, and more susceptible to breakdown at voltages below normal operating parameters.
To combat such problems, various processes for hardening gate oxides have become essential to the fabrication of state of the art semiconductor devices, and several hardening processes are well-known in the art. For example, both furnace-based nitrogen processing and remote plasma-based nitrogen hardening ("RPN") may be used to harden gate oxides. Relative to nonhardened devices, gate oxides hardened by known methods are generally less permeable to dopants included in polysilicon electrodes, more resistant to hot electron degradation, and less susceptible to breakdown at voltages below normal operating voltages. However, known processes for hardening gate oxides also have drawbacks. For example, after being subjected to such processes, gate oxides often contain a significant amount of unbound, or interstitial, nitrogen, which is mobile and may diffuse out of the gate oxide, reducing the effectiveness of the hardening procedure and contaminating the overlying polysilicon electrode. Further, in order to prevent diffusion of dopants from the polysilicon electrode and into and through the gate oxide, known hardening processes often provide a high concentration of nitrogen at the interface of the gate oxide and the underlying semiconductor substrate. However, as is known, excessive nitrogen at the gate oxide/substrate interface significantly degrades transistor performance.
In terms of device performance and reliability, it has been found to be advantageous to fabricate a gate oxide having a large nitrogen concentration (about 2.5% or greater nitrogen by atomic weight) at the interface of the gate oxide and the overlying polysilicon electrode while having a small nitrogen concentration (about 0.5% nitrogen by atomic weight) at the gate oxide/substrate interface. The large nitrogen concentration at the polysilicon electrode/gate oxide interface effectively prevents diffusion of dopants from the polysilicon electrode and into and through the gate oxide, while the small nitrogen concentration at the gate oxide/substrate interface confers resistance to hot electron degradation without substantially effecting device performance. Yet known processing techniques do not reliably provide surface P-channel transistors including a gate oxide having a large nitrogen concentration at the polysilicon electrode/gate oxide interface and a small nitrogen concentration at the gate oxide/substrate interface.
At least one method has been developed in an attempt to provide a transistor including a gate oxide having similar characteristics. U.S. Pat. No. 6,017,808 to Wang et al. (hereinafter "the '808 Patent") describes a method for hardening a gate oxide designed to provide a transistor wherein a large peak of nitrogen exists within the polysilicon and oxide layers at the interface of the gate oxide and the overlying polysilicon electrode, while a relatively smaller nitrogen peak occurs within the oxide layer and the underlying semiconductor substrate at the interface of the gate oxide and the underlying semiconductor substrate. To achieve this structure, the method of the '808 Patent requires implanting nitrogen through the polysilicon layer and into the gate oxide layer followed by an anneal step. After the implantation and annealing steps, a first nitrogen peak occurs entirely within the polysilicon layer, a second nitrogen peak occurs within the polysilicon layer and the gate oxide at the polysilicon/gate oxide interface, and a third nitrogen peak occurs within the gate oxide layer and underlying substrate at the gate oxide/substrate interface. However, the first nitrogen peak located entirely within the polysilicon layer is problematic because it retards diffusion of subsequently implanted dopants, such as boron, within the polysilicon layer. Therefore, the method of the '808 Patent requires removal of only the portion of the polysilicon layer including the first nitrogen peak without removing the portion of the polysilicon layer including the second nitrogen peak. Once the portion of the polysilicon layer including the first nitrogen peak is removed, an additional, nitrogen-free polysilicon layer may be optionally formed over the remaining portion of the nitrogen implanted polysilicon layer.
As will be readily appreciated, achieving the structure disclosed in the '808 Patent using the methods described therein is at best problematic, particularly in light of the continually decreasing thicknesses of polysilicon electrodes included in state of the art semiconductor devices. One of the most problematic aspects of the method described in the '808 Patent is the need to remove only the portion of the nitrogen implanted polysilicon layer including the first nitrogen peak. The reference teaches that this task may be accomplished using known wet etch, dry etch, or chemical mechanical polishing processes. However, the polysilicon layers used for polysilicon electrodes in state of the art transistors are exceedingly thin. The polysilicon electrodes of some state of the art devices may be as thin as seven or fewer molecular monolayers, and known etching and polishing processes are difficult to control with sufficient precision to remove only predetermined portions of material layers of such minute thicknesses. Moreover, in this context, the polysilicon layer will include varying concentrations of nitrogen at any given depth, and as the nitrogen concentration varies, the etch rate will also vary, making precise control of the etching process even more difficult. Thus, removing only the portion of the polysilicon layer including the first nitrogen peak is extremely difficult, and known removal processes will most likely result in removal of too much or too little polysilicon material, resulting in transistors exhibiting impaired performance or reduced reliability.
It would, therefore, be desirable to provide a method for fabricating a surface P-channel transistor which provides a surface P-channel transistor including a hardened gate oxide characterized by a large nitrogen concentration at the polysilicon/gate oxide interface and a small nitrogen concentration at the gate oxide/substrate interface, and which can be accomplished without the need to partially remove the polysilicon layer overlying the gate oxide. Ideally, such a method could be easily incorporated into current fabrication processes and would reliably produce state of the art surface P-channel transistors exhibiting enhanced performance and reliability.

Transistor with nitrogen-hardened gate oxide


In methods and devices for scheduling uplink transmission in a cellular radio system for a number of user equipments transmitting data over an air-interface each user equipment is associated with an individual uplink load factor. Further a cost function is formed based on the load factor for each user equipment that is to be scheduled for uplink transmission, wherein the cost function is approximated by a quadratic function. The throughput of all scheduled user equipments is maximized using a convex optimization of the sum of the individual cost functions, and the grant for uplink transmission is scheduled in accordance with the optimized cost functions.

The scheduler for the enhanced uplink (EUL) schedules EUL traffic of multiple users. EUL serves as a counterpart to the high speed downlink packed access (HSDPA) service in the Wideband Code Division Multiple Access (WCDMA) downlink. Together, EUL and HSDPA provide the backbone for the mobile broadband for a WCDMA cellular system. The scheduler operates in a closed loop fashion, where transmission grants, i.e. control signals, are issued in response to transmission requests and air interface load (measurements). The third generation partnership project (3GPP) standard provides channels with certain associated capacity, range and delay properties. Notably, the control loop is dynamic, with nonlinear constraints and plenty of discrete ranges of various states.
In this context the load on the uplink is of central importance. The task of the scheduler is to schedule as much traffic as possible, at the same time as the uplink coverage and stability needs to be maintained. In case a too large amount of traffic is scheduled, the interference from other terminals can make it impossible for terminals at the cell edge to maintain communication—the coverage of the cell becomes too low. The cell may also become unstable in case too much traffic is scheduled. In order to avoid these two problems the scheduler schedules traffic under the constraint that the air interface load is held below a specific value. The load factor of a cell is defined as the fraction of the own cell uplink power, and the total uplink interference. The total uplink interference consists of the sum of the own cell power, the neighbor cell interference and the thermal noise floor. The load factor of a user is equivalently given by the quotient of the user power and the total wideband received power (P_u/P_RTWP).
Enhanced Uplink in WCDMA
The WCDMA enhanced uplink aims at scheduling traffic to times when the uplink interference situation is favorable, thereby utilizing air interface resources in a better way than before. The air interface load is measured by the noise rise, over the thermal level, a quantity denoted rise over thermal (RoT). This is illustrated in FIG. 1, which illustrates the air interface load. The pole capacity is the limiting theoretical bit rate of the uplink, corresponding to an infinite noise rise.
The uplink data channel is denoted E-DPDCH. This channel supports a high rate. It is however not involved in the scheduling control as such, this is the task of the corresponding control channel, denoted E-DPCCH. This channel e.g. carries rate requests (measurement signals) from the User equipments (UEs) to the EUL scheduler. There are also some downlink channels supporting EUL. The first of these is the E-AGCH channel which carries absolute grants (control signals) to each UE. More peripheral is the E-RGCH channel which carries relative grants (also control signals) from the radio base station node B to the UE. Finally, the E-HICH channel carries ACK/NACK information.
The grants mentioned above are the quantities signaled to the UE indicating what rate (actually power) it may use for its transmission. The UE can, but need not, use its complete grant. Relative grants are used to control the interference in neighbor cells—these can only decrease the current grant of the UE one step. It is stressed that there are only a discrete number of grant levels that can be used.
Scheduling in Enhanced Uplink
The task of the scheduler is to schedule EUL user traffic, to enhance user and cell capacity, at the same time as it:                Keeps track of the air interface cell load, avoiding over-scheduling that may cause cell instability and loss of coverage.        Keeps track of other available traffic, like transport resources and hardware.        Receives, measures and estimates quantities relevant for its scheduling operation.        Transmits orders to UEs, primarily in the form of granted power/bitrates.
When doing this the scheduler needs to operate within the constraints induced by the 3GPP standard, these constraints being e.g.                Limited grant transmission capacity.        Grant transmission delays.        Grant step up rate limitations.        Standard limited UE status information.
Conventional schedulers are designed with different objectives in mind. UEs are e.g. given the maximum rate as long as there are resources available, in an order defined by a priority list. Then, in case of lack of resources, overload handling is invoked. This overload handling reduces the priority of the UE with the best grant to a very low priority, thereby resulting in switching in case of conflicting high rate users. Since there is a dead time until re-scheduling takes effect, this results in a loss of capacity.
UEs in EUL Scheduling
The UEs form an integral part of the scheduling loop. In this case it is not the data transfer on the E-DPDCH channel that is of interest; rather it is the operation of the UE according to the 3GPP standard that is the focal point. The UE performs e.g. the following tasks:                Reception of absolute grants on the E-AGCH channel (control signal). There are 4 of these channels, however only one absolute grant can be transmitted per Transmission time Interval (TTI) on each channel.        Reception of relative grants on the E-RGCH channel (control signal). The relative grants can only reduce the scheduled grant of the UE by 1 step.        Formation of the scheduled grant of the UE, from the absolute and relative grants. The scheduled grant is the actual grant used by the UE for transmission.        Using the absolute grants and the relative grants, for computation of the power to be used for data transmission. This is expressed using beta factors that are computed as nonlinear functions of the scheduled grant, accounting also for the absolute output power level of the UE.        Transmission of user data, in accordance with the computed beta factor.        Determination and signaling of the happy bit (measurement signal) to the scheduler of the Radio Base Station (RBS). If not happy the UE requests a higher bit rate.        Determination and signaling of scheduled information (measurement signal) to the scheduler of the RBS. The scheduled information is based on the amount of data in the Radio Link Control (RLC) buffer, which allows the scheduler to make scheduling decisions for the UE.        Determination and signaling of the transport format used (E-TFCI). This carries e.g. the actual beta factor applied by the UE, thereby supporting the load estimator that provides the scheduler with information of the current air-interface load.
UEs are divided into different categories depending on whether they support 10 ms TTIs (TTI is roughly the scheduling sampling period) only, or also 2 ms TTIs. Their maximal bit rates also affect the category of the UEs. The details appear in Table 1,
TABLE 1UE categories in EUL.PeakPeakE-DCHSupport forData Rate,Data Rate,categoryMinimum SF2 ms TTI10 ms TTI2 ms TTICategory 11 × SF4—0.73 Mbit/s—Category 22 × SF4γ1.46 Mbit/s1.46 Mbit/sCategory 32 × SF4—1.46 Mbit/s—Category 42 × SF2γ  2 Mbit/s 2.9 Mbit/sCategory 52 × SF2—  2 Mbit/s—Category 62 × SF4 +γ  2 Mbit/s5.76 Mbit/s2 × SF2Existing Formulation of the Scheduling Problem
In existing cellular systems, scheduling schemes are often designed in an ad hoc manner. This leads to suboptimal performance in terms of throughput and may manifest itself in problems with stability. A reason for the ad hoc design has been the difficulty in computing a solution in real time. A key to overcome this difficulty is to convert the problem to a problem involving maximization of a convex function over a convex polytope. A maximization of a convex function over a convex polytope will also be referred to as a convex maximization/optimization herein.
Further, several papers in the literature consider the problem of scheduling the transmission powers instead of grants, see e.g. Kumaran, K. and Qian, L. (2003), Uplink scheduling in CDMA packet-data systems, in 'Proc. Twenty-Second Annual Joint Conference of the IEEE Computer and Communications (INFOCOM 2003)', Vol. 1, pp. 292-300, Lau, V. and Kwok, Y.-K. (2004), 'Performance analysis of SIMO space-time scheduling with convex utility function: zero-forcing linear processing', IEEE Transactions on Vehicular Technology, 53(2), 339-350, Oh, S.-J. and Wasserman, K. (1999a), Adaptive resource allocation in power constrained CDMA mobile networks, in 'Proc. 1999 IEEE Wireless Communications and Networking Conference', Vol. 1, pp. 510-514, Oh, S.-J. and Wasserman, K. M. (1999b), Optimality of greedy power control and variable spreading gain in multi-class CDMA mobile networks, in 'MobiCom '99: Proceedings of the 5th annual ACM/IEEE international conference on Mobile computing and networking', ACM, New York, N.Y., USA, pp. 102-112, Oh, S.-J., Zhang, D. and Wasserman, K. (2003), 'Optimal resource allocation in multiservice CDMA networks', IEEE Transactions on Wireless Communications, 2(4), 811-821, Shu, T. and Niu, Z. (2003), A channel-adaptive and throughput-efficient scheduling scheme in voice/data DS-CDMA networks with constrained transmission power, in 'Proc. 2003 IEEE International Conference on Communications (ICC '03)', Vol. 3, pp. 2229-2233, Zhang, D., Oh, S.-J. and Bhushan, N. (2007), 'Optimal resource allocation for data service in CDMA reverse link', IEEE Transactions on Wireless Communications, 6(10), 3648-3656, Zhang, D., Sambhwani, S. and Mohanty, B. (2008), HSUPA scheduling algorithms utilizing RoT measurements and interference cancellations, in 'Proc. 2008 IEEE International Conference on Communications (ICC '08)', pp. 5033-5037.
A typical basic formulation involves maximizing the throughput subject to power saturation limits at the UEs. This requires that the channel gains from the UEs to the Node B be known by the scheduler. The algorithms in these papers typically involve greedy-type strategies. In some cases, the problem of optimizing with respect to the scheduled interference is dealt with by generating a number of candidate (greedy) solutions (each with a different total interference), and then selecting the best one.
In Kumaran and Qian (2003), the problem of scheduling the transmission powers of the users to maximize total throughput is considered. The problem formulation includes constraints on the transmission power of each user as well as a constraint to ensure feasibility. It is assumed that the channel gains are known, and hence that the constraints on the transmission powers can be converted to constraints on the received powers. The throughput is expressed as a weighted sum of user rates, where the weights are chosen to ensure queue stability (boundedness of queue lengths).
The resulting solution has the property that each user transmits at full power or not at all. For a certain given level of interference, the scheduling algorithm in Kumaran and Qian (2003) involves ordering the users according to a particular ranking metric and then allocating full power to the user with the highest ranking. The remaining users are then re-ordered to take into account the previous allocation. The process of re-ordering and allocating to the highest ranking user is repeated until the scheduled interference equals the given level interference. The optimal level of interference is determined by performing the preceding algorithm for a number of allowable interference levels, and then selecting the best one.
In Zhang (2008), a scheduling algorithm which allows a tradeoff between throughput and fairness is described. The algorithm involves sorting the users according to the following priority metric:
      Priority              (      k      )        =                    [                              r            req                                          (            k            )                          ]                    1        /        β                            r        ~                          (        k        )            where {tilde over (r)}(k) is the filtered throughput for the user, rreq(k) is the rate requested by the user and β is a parameter, which determines the relative degree of fairness between the users. Rate allocation is then done by greedy filling the available load starting from the user with the highest priority. This implies that each user transmits at their requested rate or not at all. The algorithm has the property that it maximizes a function which is closely related to the total throughput.
The existing technologies for scheduling are associated with a number of disadvantages and problems, such as non-optimal throughput, risk for instability, and a risk for coverage loss.
Hence there exist a need for new methods and devices providing improved scheduling in cellular radio systems, in particular WCDMA systems.

Methods and devices for scheduling uplink transmission in a cellular radio system


The invention relates to a boring machine, particularly for woodworking, for boring rows of holes and structural bores in plateshaped workpieces such as cabinet sidewalls, cabinet doors, etc. with a machine frame having a workpiece holder and a boring assembly displaceable on guide rails, in which machine the workpiece holder. a workpiece stop and a stop arrangement with position fingers adjustable and lockable in the displacement direction of the boring assembly, which, in connection with the boring assembly, determine the boring position along the displacement path of the boring assembly.. Presetting of boring patterns with a number of bore rows is carried out by means of position rollers having a number of holding rails in which fingers can be prepositioned. The fingers cooperate with finger receivers to determine the positions of the boring assembly.

The invention relates to a boring machine for woodworking, for boring rows of holes and structural bores in plate-shaped workpieces such as cabinet sidewalls, cabinet doors, etc. with a machine frame having a workpiece holder and a boring assembly displaceable on guide rails, in which machine the workpiece holder, a workpiece stop and a stop arrangement with position fingers adjustable and lockable in the displacement direction of the boring assembly, which, in connection with the boring assembly, determine the boring positions along the displacement path of the boring assembly.
A boring machine of this kind is known from DE-GM 76 19 306. With this known boring machine, the boring assembly is arranged under the workpiece holder so that one cannot see into the blind-end bores. This makes operation of the known boring machine difficult. In addition, the boring assembly can be displaced in only one direction, hence the workpiece must be positioned again and again on the workpiece holder for making a number of rows of bores. For positioning the boring assembly, a slide that can be moved in the direction of displacement of the boring assembly is provided and on which a number of sensing fingers having different lengths and running in the displacement direction of the boring assembly are held in a spaced arrangement next to each other. A number of stop fingers, which can be moved vertically and which are at an angle to the sensing fingers, are provided on a supporting block fixed on guides. With this known boring machine, only one given bore is optimal with the positioned sensing and stop fingers. The change-over to another bore row is quite complicated and time-consuming.

Boring machine, particularly for woodworking


An outage device and a surge-protection that uses the outage device, wherein the outage device is formed by connecting an overcurrent protection and an overheat protection in series, and packaged as a single device. As soon as either the current flowing through the overcurrent protection is too high or the temperature detected by the overheat protection is to high, the outage device forms a open circuit immediately to ensure that no currents are fed into the circuit. The surge protection is formed by connecting the foregoing outage device and a surge-absorbing device in series. The outage device and the surge-absorbing device have to be placed as close as possible, so that the outage device can open the circuit immediately as the temperature of the surge-absorbing device is to high to ensure that no currents are fed into the surge-absorbing device.

1. Field of the Invention
This invention relates to a circuit protection device, and more particularly, to an outage device having an overcurrent protection and an overheat protection, and to a surge protection using the outage device.
2. Description of Related Art
As the electronics circuits have become more complicated, and electronics devices have become more precise nowadays, a power supply has to meet a stricter requirement to work with a electronics circuit. Ideally, the current and voltage from a power supply are supposed to be perfect sine or cosine waves, but this perfect power supply doesn't exist in reality. Normally, the voltage output of a power supply is not very steady, and sometimes, there are even power surge accompanied with the output voltage. This accompanied power surge often causes errors on precise electronics devices or even burns down those electronics devices. To resolve this problem, a surge-absorbing device is normally added into circuit designs to absorb power surge for ensuring the regular operations of the loads. In a real world application, a metal oxide varistor (MOV) is often in parallel with the power supply as a surge-absorbing device. The impedance of a MOV is very high when its cross voltage is below a certain predetermined voltage level, that is, there is almost no current flowing through the MOV, that is, the MOV doesn't affect the load at all. As soon as the cross voltage of the MOV, such as a power surge, exceeds the certain predetermined voltage level, the impedance of the MOV toboggans immediately, and most of the supplied current including the power surge is bypassed by the MOV, as a result, the load is protected by the MOV from receiving a power surge, and the load voltage is then remained under a predetermined voltage level.
Referring to FIG. 1A, a MOV 100 is in parallel with the load. In the presence of a power surge, most of the current from power supply including the power surge bypasses the load through the MOV because the impedance of the MOV toboggans immediately. The voltage across the load is then remained under a predetermined voltage level by using a MOV to bypass power surges.
Generally, the temperature on the MOV is increased because the MOV executes the surge-absorbing operation frequently when the supplied voltage is not steady. The MOV will be burned down if the temperature exceeds a certain value. Hence, how to maintain the continuous operation of a circuit under the protection of a MOV has become a pretty important topic. Not only a high temperature can burn down a MOV, a strong current can damage a MOV as well. Furthermore, the circuit is not certainly opened, that is, the burned MOV can still possibly short the circuit and causes a large current. Moreover, since the characteristics of the MOV are changed after it is burned down, a leaking current might happen and affect the circuit near by. Because the MOV is in parallel with the power supply and used as a circuit protection, it is very important to have the MOV pass the test of UL1449 safety regulation to ensure the quality for providing a better protection to the circuits.
However, the previous UL1449 safety regulation was not very rigid, as a result, burning down and explosion still happened on some passed MOV devices. A burned MOV might short the circuit and further generate an arc that can cause more damage to a circuit. Hence, the UL1449 safety regulation has been reviewed and improved into the currently used second edition UL1449 safety regulation.
Within the new UL1449 safety regulation, there are two additional destructive tests. The first test is to feed a huge pulse (1000 A, 240V) into a MOV to blow it and then observe the damage on the MOV. The second test is to feed a gradual increased current (240V, 0.125 A, 0.5 A, 2.5 A, 5 A) to a MOV, and then check the responses of the MOV. The leaking current has to be below 0.5 mV to pass the safety regulation.
Referring to FIG. 1B, a current fuse 120 is in series with a MOV 100. A current flows through a properly selected current fuse 120 before it is fed into the MOV 100, wherein the current fuse 120 is used as a overcurrent protection of the MOV 100. The specification of the current fuse is selected to meet the actual requirement. When the current from the power supply is higher than a predetermined value, i.e., the breaking point of the current fuse, the current fuse is burned down to open the circuit and current can no longer be fed into the MOV 100. Even though the MOV 100 is also burned down by a big current, the circuit is protected from being damaged by a short current created by a broken MOV. Hence, the primary function of the current fuse 120 is to be used as a fast-breaking fuse that breaks itself immediately in the presence of a big current for avoiding a short current.
Referring to FIG. 1C, a temperature fuse 140 is in series with the MOV 100, so a current fed into the MOV 100 has to flow through the temperature fuse first. On the circuit board layout, the temperature fuse and the MOV are separated by a small distance. The temperature fuse 140 is used to detect the temperature on the MOV 100, because the temperature fuse 140 and the MOV 100 are very close to each other. The specification of the temperature fuse 140, which is used as an overheat protection of the MOV 100, is selected properly according to the actual requirement. As soon as the a detected temperature on the MOV 100 exceed the predetermined temperature, the breaking point of the temperature fuse, the temperature fuse is burned down to open the circuit for preventing the temperature over the MOV 100 from increasing. The distance between the temperature fuse 140 and the MOV 100 can be very small, or even zero that means the temperature fuse 140 is on contact with the MOV 100 for detecting the temperature over the MOV directly. Since the increment of temperature is gradual, the primary function of the temperature fuse 140 is to be used as a slow-breaking fuse which breaks itself when the detected temperature is too high to open the circuit for preventing the MOV 100 from being burned down by high temperature.
In a real application, normally a current fuse or a temperature fuse is in series with a MOV as a fast-breaking overcurrent protection or a slow-breaking overheat protection. Conventionally, besides using current fuse as the overcurrent protection, a fine conductive wire on the circuit board can be used as an overcurrent protection as well. When a high current flows through the fine conductive wire, the fine conductive wire is melted and then forms a outage circuit for protecting the MOV from damage. However, the quality of this method is difficult to be controlled which often leads to a result that the characteristics of the circuit cannot be followed precisely. Furthermore, melting the conductive wire causes a permanent damage that makes it difficult to recover and maintain damaged devices. In addition, a conventional method normally has only either a current fuse or temperature fuse in series with the MOV as a protection, which cannot effectively protect the circuit from both overcurrent and overheat. Even though it is possible that having both current fuse and temperature fuse built into a circuit to provide overcurrent and overheat protection, it increases the complication of a circuit, storing and managing cost, and decreases the competition of products.
According to the foregoing, the conventional method includes at least the following disadvantages:
1. the conventional method can only provide either overcurrent or overheat protection to a circuit, wherein the protection is not enough to protect a circuit. PA1 2. using both current fuse and temperature fuse provides a circuit with a double protection, but it increases the complication of a circuit, storing and managing cost, and decreases the competition of products. PA1 3. using a fine conductive wire on the circuit board as a current fuse is difficult to control the quality of protection and characteristics of a circuit, and causes the difficulty on maintenance.

Outage device and surge protection using the same


A computer system including a write protection circuit and a write poster is disclosed. The write protection circuit provides page description information to the computer system for controlling various operations. Illegal write operations as defined by the page description information are prevented from reaching a system bus and external cache. Internal cache invalidate operations may also be performed transparently to system operation. The write poster accepts write operations in zero wait states and assembles them into fewer more efficient writes to memory. A unique method and apparatus for programming a descriptor random access memory (RAM) is also provided.

The present invention relates generally to the field of personal and desk top computers and more specifically to computers based upon the INTEL i486 microprocessor. The principles of the present invention however may be extended advantageously to other processors and computing environments.
The i486 employs several performance enhancing mechanisms to increase system throughput. In addition to having a full 32 bit architecture, the i486 microprocessor has an 8KByte internal cache as well as a virtual memory management unit with paging capability. The processor (i486) is also equipped to perform burst read cycles wherein a contiguous range of addresses are read from memory in a single extended bus cycle. These and other features of the i486 will be discussed briefly in the following description of applicants, preferred embodiment of their invention. The reader is referred to the i486 literature which is available from INTEL Corporation 3065 Bowers Avenue, Santa Clara, Calif. 95051. A basic understanding of the i486 processor, including the various interface signals and modes of operation, is assumed throughout.
Increased performance and code compatibility with earlier 8086, 80286, and 80386 microprocessors are reasons for the popularity of the i486 in new system designs. Unfortunately, many of the advanced features of the i486 cannot be exploited by the earlier software and thus the i486 is somewhat crippled while running the earlier code.
MS-DOS (Microsoft-Disk Operating System), a very popular operating system in the personal computer market, was written for the 8086 and 8088 microprocessors (Microsoft Corp., Redmond, Wash.) Those microprocessors did not have the memory management or multitasking capabilities of the i486. Because the virtual memory implementation in the i486 requires software to setup and manage its resources, DOS does not support and in fact is unable to use/the virtual memory management or multitasking features of the i486. Therefore, MS-DOS necessarily operates the i486 in its real (rather than protected) mode of operation in which the memory management functions are not available.
In the i486 protected mode of operation, various areas of memory may be designated as write protected in the access rights portion of the segment descriptor registers and in the page table entries used by the segmentation unit and the paging unit respectively. Both units are a part of the i486 memory manager. In the event that a program tries to write to a protected region in violation of a write protected designation, the i486 generates an exception thus allowing software to correct for the violation and reload the data if necessary. In the real mode of operation in which MS-DOS runs, these protection mechanisms are not supported. Although the internal cache may be operated transparently to software, limitations on the type of memory which may be cached are implicitly imposed when the segment and page level protections are not available.
The i486 allows write operations to alter the contents of the internal cache whether or not the data is read from a read only device such as read only memory ("ROM"). The only hardware provision for preventing such an illegal write operation is to designate all read only memory addresses as non-cacheable. If this is done, the i486 will not load the read only data into its internal cache. While this prevents the undesirable alteration of read only data, it does so at the expense of increased memory accesses. The processor and system are thus slowed down because the processor must perform memory reads every time such data is required. Aggravating the situation is the fact that accesses to read only memory, ROM, are generally slower than to the read write memory, RAM (for random access memory).
While in protected mode, the segment and page level protection mechanisms may be employed allowing the i486 to cache the read only portions of memory. Read only areas are designated as such in the appropriate attribute tables. Then if an illegal write operation occurs, an exception will be generated by the i486 and the exception handling routine can invalidate the cache entry and reload the data if necessary. While the protected mode software approach allows caching of normally non-cacheable regions of memory, it also presents a load (Central Processing Unit (CPU) time) on the processor which decreases throughput.
In the i486 real mode, the page and segment level protections are not available. The read only portions of memory, therefore, are not cacheable in real mode. Since MS-DOS operates in the real mode, the write protected regions of memory may not be cached at all if data integrity is to be ensured.
Each cache entry is called a line. The process by which the internal cache fetches data from memory is called a "line fill". A line is 16 bytes long, i.e., four Dwords (double words) (a byte is 8 bits; a word is 2 bytes or 16 bits; and a Dword is 2 words, 4 bytes, or 32 bits). The Dword is the maximum single transfer that the i486 is capable of performing by virtue of its 32 bit wide data bus. The typical i486 bus access requires a minimum of 2 clocks in a zero wait state system. During the first clock cycle the processor outputs the address and various other control signals to indicate which device is being addressed and the type of operation that is being performed. The addressed device will either send data to or receive data from the processor during the second clock cycle in a zero wait state system i.e., a system operating at maximum speed as determined by the processor clock frequency. In a i486 system, a single byte, a word, or a Dword may be transferred in this two clock bus access depending upon the instruction. If the device cannot operate at the maximum processor speed, then wait states are inserted extending the cycle to more than two clocks.
In order to speed up the line fill process, the i486 can perform burst read cycles from memory. As mentioned earlier, each line is composed of four contiguous Dwords, i.e. four adjacent 32 bit memory locations. In a burst read, the i486 reads the first Dword from memory in a two clock cycle. The address and control signals, indicating a burst read request beginning at the addressed location, are output in the first clock cycle. The first Dword is received at the processor in the second clock cycle. Then each Dword after that is received in the third, fourth, and fifth clock cycles of a burst read operation. The burst read thus differ from other read operations in that the address asserting first clock cycle is omitted in all but the first Dword transfer of the burst read cycle. The total 16 byte transfer requires only 5 clock cycles in a burst read in contrast to the 8 clocks that would be required in the ordinary i486 read.
Memory systems designed to allow burst read cycles require faster RAM than if only conventional reads were supported because data must be available in less than one clock after the address is asserted in the second, third, and fourth Dword transfers of a burst line fill.
The read performance of the i486 is greatly improved by the cache and by the burst read capability and the write performance is enhanced when there is a write hit in the cache. But the cache will not generate a line fill in response to a write miss. Thus, a very large percentage of the i486 bus accesses are memory write operations. Memory write operations to successive locations are common, particularly in the older 16 bit software. One example is where the contents of the registers are pushed onto a stack. One such instruction sequence might look like PUSH BX, PUSH CX, PUSH DX, PUSH CS, PUSH SP . . . and so on.

Computer system including a write protection circuit for preventing illegal write operations and a write poster with improved memory


Disclosed is a method comprising the step of checking a defect on a surface of a thin film formed by a step or steps of forming the thin film to be an x-ray membrane 12, wherein the thin film is formed by the thin film forming step or steps so that the thin film checked by the defect checking step may have a surface roughness of 1.0 nm or less in terms of Ra (center-line average roughness).

1. Field of the Invention
The present invention relates to a method of manufacturing an x-ray mask blank which is a material of an x-ray mask used as a mask in an x-ray lithography method and a method of manufacturing an x-ray membrane for the x-ray mask.
2. Description of the Related Art
In a semiconductor industry, as a technique for forming an integrated circuit constituted of a fine pattern on a silicon substrate or the like, a photolithography method for transferring the fine pattern by the use of a visible light and an ultraviolet light as an exposing electromagnetic wave is well known. However, a recent advance in a semiconductor technique greatly promotes a high integration of a semiconductor device such as VLSI, and this results in a requirement for the technique for transferring the fine pattern with high accuracy beyond a transfer limit (a principled limit due to a wavelength) of the visible light and the ultraviolet light for use in the conventional photolithography method. In order to transfer such a fine pattern, an x-ray lithography method using an x-ray whose wavelength is shorter than the wavelength of the visible light and the ultraviolet light is attempted.
FIG. 1 is a cross sectional view showing a structure of an x-ray mask for use in the x-ray lithography. FIG. 2 is a cross sectional view showing the structure of an example of an x-ray mask blank as an intermediate product obtained in an intermediate process during manufacturing the x-ray mask.
As shown in FIG. 1, an x-ray mask 1 comprises an x-ray membrane 12 for transmitting the x-ray and an x-ray absorbing film pattern 13a formed on the x-ray membrane 12. The x-ray membrane 12 is supported by a silicon frame body 11a which is formed by removing the other portion so that the periphery alone of the silicon substrate may remain. When this x-ray mask 1 is manufactured, the x-ray mask blank to be the intermediate product is manufactured in the intermediate process. This x-ray mask blank is further processed, so that the x-ray mask is obtained. In this industry, although, of course, the x-ray mask which is a finished product is to be dealt in, the x-ray mask blank which is the intermediate product is also often to be independently dealt in.
As shown in FIG. 2, an x-ray mask blank 2 comprises the x-ray membrane 12 formed on a silicon substrate 11 and an x-ray absorbing film 13 formed on the x-ray membrane.
Silicon nitride, silicon carbide, diamond or the like is generally used as the x-ray membrane 12. An amorphous material including tantalum (Ta) having an excellent resistance to x-ray radiation is often used as the x-ray absorbing film 13.
For the process of manufacturing the x-ray mask 1 from the x-ray mask blank 2, for example, the following method is used. That is, a resist film on which a desired pattern is formed is arranged on the x-ray mask blank 2 shown in FIG. 2. This pattern is then used as a mask so as to perform a dry etching, so that the x-ray absorbing film pattern is formed. After that, a center area formed on a rear surface and to be a window area of the x-ray membrane 12 is removed by a reactive ion etching (RIE) using 4-fluorocarbon (CF.sub.4) as etching gas. The remaining film (12a: see FIG. 1) is then used as the mask so as to etch the silicon by an etching liquid constituted of a mixed liquid of fluoric acid and nitric acid, whereby the x-ray mask 1 (see FIG. 1) is obtained. In this case, an electron beam (EB) resist is generally used as the resist, and the pattern is formed by means of an EB lithography.
For the x-ray membrane 12, a high transmittance to the x-ray, a high Young's modulus of elasticity, a proper tensile stress, a resistance to x-ray radiation, the high transmittance within a visible light range and the like are required. The characteristics will be described below. The transmittance to the x-ray is required during an exposure. The higher the transmittance is, the shorter a time required for the exposure can become. This is effective for improving throughput. The Young's modulus of elasticity has an influence on a strength of the film and a deformation of an absorber pattern. The higher the Young's modulus of elasticity is, the higher the film strength becomes. This is effective for suppressing misalignment. The proper tensile stress is needed in order that the film is self-supported. The resistance to x-ray radiation is required to cause no damage due to the x-ray radiation, because the x-ray membrane is irradiated with the x-ray during the exposure. As regards the transmittance within the visible light range, since an alignment of the mask attached to an x-ray stepper and a wafer is accomplished by the use of a light source within the visible light range, the high transmittance to an alignment light source is needed in order to achieve a highly accurate alignment. Furthermore, a film surface is required to be smooth. A surface smoothness is needed for a highly accurate pattern formation on the absorber.
In order to satisfy these requirements, various materials and manufacturing methods have been studied. Since it is confirmed that the silicon carbide has the highest Young's modulus of elasticity and causes no damage due to the x-ray in the silicon nitride, the silicon carbide (SiC) and the diamond which have been heretofore used as the x-ray membrane, it may safely be said that the silicon carbide is the most promising material. However, since the SiC film for the general use has a polycrystalline structure, the SiC film has the film surface which is rougher than 6 nm (Ra: a center-line average roughness) due to a crystalline structure. For smoothing of the surface of this SiC film, an etch back method and a mechanical polishing method are carried out after the film formation. The etch back method is the technique in which the rough SiC film is coated with the resist and the thus obtained smooth resist surface is transferred onto the SiC film by the dry etching. The mechanical polishing is the method in which a hard grain such as the diamond and alumina is used as an abrasive material so as to physically grind an unevenness on the surface of the SiC film. For example, according to Japanese Patent Publication No. 7-75219, the surface roughness of 20 nm or less is obtained by the etch back and the mechanical polishing. Although a definition of the surface roughness is not clear in this publication, this roughness is expected to be a maximum height (Rmax) and corresponds to about 2 nm or less in terms of Ra.
Recently, due to the advance in the photolithography technique, an introduction of the x-ray lithography has been performed later. At present, the introduction from a generation of 1 G bit-DRAM (design rule: 0.18 .mu.m) is anticipated. Even if the x-ray lithography is introduced from 1 G, the x-ray lithography is characterized by that it can be used through a plurality of generations up to 4 G, 16 G and 64 G. Assuming that the x-ray lithography is used for 64 G, a position precision required for the x-ray mask becomes severer, and the position precision is required to be as high as 10 nm. Furthermore, a mask pattern is required to have no defect regardless of a pattern size. Although the pattern defect can be corrected by a defect correcting unit, the number of practically correctable defects is limited to about 10 or less on the mask surface. A factor of the pattern defect is mainly caused due to the defect of the x-ray absorbing film, and more specifically, the important factor is the defect of the x-ray membrane. That is, if the defect (a contaminant or the like) is caused on the membrane, the defect is also inherited on the absorbing film formed on the membrane. Moreover, this faulty absorbing film causes the pattern defect after a mask processing. Therefore, it is necessary to exactly check the defect on the x-ray membrane and to process so that no defect or the least defect may be on the membrane. Furthermore, as regards the thin film such as an etching stop layer and a reflection preventing film formed as a sublayer of the x-ray absorbing film or the thin film such as an etching mask layer formed as a top layer of the x-ray absorbing film, since a presence of the defect on these thin films causes the pattern defect, it is necessary to check whether or not the defect is on these thin films. A minimum size of the defect affecting the pattern defect corresponds to a width of a minimum line of the pattern. Therefore, in case of the x-ray mask, it is necessary to exactly check the defect size of about 0.2 .mu.m. As a defect checking unit, the method of detecting a light scattering from the surface defect by the use of a laser light is generally used. For example, by Surfscan 6220 (KLA-Tencor), a minimum sensitivity of 0.09 .mu.m can be realized on a silicon wafer. However, in such a surface defect checking unit using the laser light, the detecting sensitivity to the defect is sensitively influenced by the surface roughness. Therefore, if the surface is rough, the roughness causes the light to be scattered, and thus the fine defect cannot be disadvantageously recognized (distinguished).

Method of manufacturing x-ray mask blank and method of manufacturing x-ray membrane for x-ray mask


A planar lighting device is capable of keeping the light entrance plane of the light guide plate spaced a constant distance from the light source and the light guide plate spaced a constant distance from the liquid crystal display panel even when the light guide plate expands, contracts or warps. This prevents break of the light source, decrease of light admission efficiency, occurrence of uneven brightness, and break of the liquid crystal display panel and permits a thin, larger, and lightweight design. The planar lighting device includes a fixing member for keeping them spaced from each other, a housing for accommodating the light source and the light guide plate, a sliding mechanism to elastically hold the fixing means against the housing while keeping the light source spaced a constant distance from the light guide plate, and a reinforcing member for reinforcing the housing.

The present invention relates to a planar lighting device including light sources and a light guide plate for admitting light emitted by the light sources and emitting a light through the light exit plane thereof. The inventive planar lighting device is used for indoor and outdoor illumination or as a backlight to illuminate the liquid crystal display panel used in liquid crystal display devices or a backlight used for advertising panels, advertising towers, advertising signs, and the like.
Liquid crystal display devices use a backlight unit for radiating light from behind the liquid crystal display panel to illuminate the liquid crystal display panel. A backlight unit is configured using optical members including a light guide plate for admitting light emitted by an illuminating light source and diffusing the light within the inside thereof to emit the light through a light exit plane, irradiating the liquid crystal display panel, a prism sheet, and a diffusion sheet.
Currently, large liquid crystal display televisions predominantly use a so-called direct illumination type backlight unit having no light guide plate but including optical members such as a diffusion plate disposed immediately above the illuminating light source. This type of planar lighting device includes cold cathode tubes serving as a light source provided on the rear side of the liquid crystal display panel whereas the inside of the backlight unit provides white reflection surfaces to secure uniform light amount distribution and a necessary brightness.
To achieve uniform light amount distribution with the direct illumination type backlight unit, however, the backlight unit needs to have a given thickness, say about 30 mm, in a direction perpendicular to the liquid crystal display panel. While demands of still thinner backlight units are expected to grow in the future, achieving a further reduced thickness of say 10 mm or less with a backlight unit is deemed difficult in view of uneven light amount distribution expected to accompany the direct illumination type.
Among backlight units that allow reduction of thickness thereof is a backlight unit using a light guide plate for admitting light emitted by light sources from its side face to diffuse it, and emitting the light through a light exit plane positioned on a front side different from the plane through which the light has been admitted.
There has been proposed a backlight of a type described above using a light guide plate formed of a material prepared by mixing scattering particles for scattering light into a transparent resin, for which reference may be had, for example, to JP 07-36037 A, JP 08-248233 A, JP 08-271739 A, and JP 11-153963 A.
JP 07-36037 A, discloses a light diffusion light guide light source device including a light diffusion light guide member having at least one light entrance plane region, and at least one light exit plane region and light source means for admitting light through the light entrance plane region, the light diffusion light guide member having a region that has a tendency to decrease in thickness with the increasing distance from the light entrance plane.
JP 08-248233 A discloses a planar light source device including a light diffusion light guide member, light source means for supplying light through at least one side of the light diffusion light guide member, a prism sheet provided on the side of the light diffusion light guide member closer to a light exit plane, and a reflector provided on the rear side of the light diffusion light guide member. JP 08-271739 A discloses a liquid crystal display including a light emission direction correcting element formed of sheet optical materials provided with a light entrance plane having a repeated undulate pattern of prism arrays and a light exit plane given light diffusing properties. JP 11-153963 A discloses a light source device including a light diffusion light guide member having a scattering power therein and light supply means for supplying light through an end plane of the light diffusion light guide member.
In the planar lighting devices provided with a light diffusion light guide plate containing light scatterers mixed therein as disclosed in the above prior art literature, light emitted by the light source and admitted through the light entrance plane into the light diffusion light guide member receives scattering effects of the light scattering particles to be scattered as the light propagates through the inside of the light diffusion light guide member. However, only a portion of the scattered light having a predetermined angle or more to the light exit plane of the diffusion light guide member is emitted from the light exit plane, while portions of the scattered light having a predetermined angle or less and the light directed to the reflector of the rear side are fully reflected, and a significant proportion of the light that has reached is returned back into the diffusion light guide member.
The above composite process produces light that propagates with a directivity to travel obliquely forward as viewed from the light source, and is highly efficiently emitted as almost uniformly bright light through the full light exit plane. Briefly, light radiated by the light source can be extracted as almost uniformly bright light through the light exit plane of the light diffusion light guide member.
Thus, the prior art literature described above purportedly states that a light guide plate containing light scattering particles mixed therein is capable of emitting uniform light with a high light emission efficiency.
As regards the light guide plate used in the planar lighting device, there have been disclosed a light guide plate in the form of a flat plate, and a light guide plate composed of a portion shaped to have a region with a tendency to grow thinner with the increasing distance from the light entrance plane attached to the other portion, in addition to the light guide plate described above that is shaped to have a region with a tendency to grow thinner with the increasing distance from the light entrance plane.
However, in the planar lighting device using any of the light guide plates disclosed in the above prior art literature, the light guide plate is expanded/contracted or warped due to effects of temperature and humidity. The expansion/contraction or the warp of the light guide plate occurs to a greater extent as its size increases. Thus, the effect of expansion/contraction of the light guide plate becomes conspicuous when the planar lighting device using the light guide plate has greater dimensions.
Thus, when the light guide plate is expanded/contracted, if the light guide plate and the light source such as a light emitting diode (LED) disposed adjacent to its light entrance plane are fixed to different support members such as housings, during expansion of the light guide plate, the expanded light guide plate presses the adjacent light source such as an LED to destroy it.
When the light guide plate is contracted, a distance between the light entrance plane of the light guide plate and the light source such as an LED is increased to lower efficiency of admitting the light emitted from the light source into the light entrance plane of the light guide plate, thus causing a problem of a reduction in use efficiency of the light emitted from the light source.
When the light guide plate is warped, a distance from the liquid crystal display panel illuminated by the planar lighting device is partially changed to disable uniform illumination, resulting in uneven brightness. Moreover, when the warp is enlarged, the light guide plate comes into contact with the liquid crystal display panel to destroy it.
In the planar lighting device disclosed in the prior art literature, no consideration is given to the problems caused by the expansion/contraction or the warp of the light guide plate. Thus, it is impossible to solve the problems.


The present invention provides a paste electrolyte comprising an organic solvent of not high dielectric constant, soluble lithium salts, and clays, with the clays being swollen by the solvent, and rechargeable lithium batteries containing the paste electrolyte. The paste electrolyte according to the present invention can improve the electrochemical properties and cycling stability of rechargeable lithium batteries by limiting the anionic transport between anode and cathode without significantly decreasing the lithium transport rate, particularly during fast charge and discharge.

Liquid electrolyte is applied in most commercial rechargeable lithium batteries. Alternatively, a so-called gel polymer, i.e. polymer with a very large fraction of liquid electrolyte is applied. These electrolytes have relatively high ionic conductivity, whereas the Li transference number thereof is typically below 0.5, i.e., tLi+<0.5. As a result, anionic diffusion dominates during fast charge and discharge.
This low Li transference number causes dramatic and undesired effects. More specifically, during fast charge or discharge, anions counter-diffuse and a gradient of salt concentration is established in the electrolyte, whereby the electrolyte kinetically depletes. Consequently, the electrolyte conductivity decreases to cause poor rate performance. Furthermore, the electronic potential of lithium plating is altered, and particularly during fast charge in a region near to the anode, the electrolyte may exceed the electronic stability window, causing accelerated reductive electrolyte decomposition.
As a result, it is strongly desired to slow down the anionic diffusion. In an ideal case, a Li-ion conductive membrane with the Li transference number, tLi+=1, separates the electrolyte-soaked anode and cathode; however, no practical ways that are able to achieve it have been found yet. Generally, the charge transfer of lithium at the solid electrolyte-liquid electrolyte interface of such membranes is too slow.
Numerous patents suggest composites of polymer (e.g., PEO) with inorganic fillers (e.g., nano-Al2O2 or silica) to create solid electrolytes with improved conductivity and an increased Li-transference number. However, in spite of the significant progress, the achieved transport properties are far away from real commercial requirements. It is doubtful if further progress can be achieved. The improvement in these composites is attributed to structural changes (less crystallinity) of the polymer near to the filler particle, and thus, further significant improvements are not likely.
Another approach is known in the area of solid electrolytes. Here metal-halogenite solid electrolyte ionic conductors like lithium iodite (LiI) or silver halogenides (AgCl, AgBr, AgI) tc.) are "heterogeneously doped" using submicrometer particles (e.g., Al2O3). In this approach, the transport properties can be improved because the grain boundary conduction exceeds the bulk conduction. The increase of grain boundary conductivity is explained by the concept of space charge. This concept has in detail been summarized in "Ionic conduction in space charge regions" (J. Maier, Prog. Solid State Chem, 23, 171).
A similar concept has been applied to liquid electrolytes. "Heterogeneous doping" of liquid electrolytes has been described in "Second phase effects on the conductivity of non-aqueous salt solutions: soggy sand electrolytes" (A. J. Bhattacharya and J Mair, Advanced Materials 2004, 16, 811) and "Improved Li-battery Electrolytes by heterogeneous Doping of Nonaqueous Li-salt solution" (A. J. Bhattacharya, Mockael Dolle and J Mair, Electroch. Sol. State Letters 7 (11) A432). In these cases, addition of fine particles such as Al2O3, TiO2, SiO2, etc. to the electrolyte results in "soggy sand electrolytes". Soggy sand means that rigid solid particles (which may have small sizes) coexist with a liquid phase. Among them, in the case of SiO2, an improvement of transport properties is achieved; however, it is not recommended to apply SiO2 because in real batteries it causes undesired side reactions consuming lithium, which has been investigated and described in detail in chapter 6 of Zhaohui Chen's PhD thesis (Dalhousie university, Halifax, 2003).
Therefore, there is strong need for liquid electrolyte being able to allow the fast diffusion of lithium ions but that hinders a fast anionic diffusion.

Paste electrolyte and rechargeable lithium battery containing the same


A membrane electrode assembly includes an MEA structure unit and a resin frame member. The MEA structure unit includes a cathode, an anode, and a solid polymer electrolyte membrane interposed between the cathode and the anode. The resin frame member is formed around the MEA structure unit, and joined to the MEA structure unit. An adhesive layer is provided between an outer marginal portion of the solid polymer electrolyte membrane extending outward beyond an outer end of a second gas diffusion layer and an inner extension of the resin frame member. The adhesive layer includes an overlapped portion overlapped on an outer marginal end of the second gas diffusion layer.

Field of the Invention
The present invention relates to a fuel cell membrane electrode assembly (MEA) having a protection member for different sizes of components of the MEA (stepped MEA).
Description of the Related Art
In general, a solid polymer electrolyte fuel cell employs a solid polymer electrolyte membrane. The solid polymer electrolyte membrane is a polymer ion exchange membrane. The fuel cell includes a membrane electrode assembly (MEA) where an anode is provided on one side of the solid polymer electrolyte membrane, and a cathode is provided on the other side of the solid polymer electrolyte membrane. Each of the anode and the cathode includes a catalyst layer (electrode catalyst layer) and a gas diffusion layer (porous carbon).
In the fuel cell, the membrane electrode assembly is sandwiched between separators (bipolar plates). A predetermined number of the fuel cells are stacked together to form a fuel cell stack. For example, the fuel cell stack is mounted in a fuel cell electric vehicle as an in-vehicle fuel cell stack.
In some cases, the membrane electrode assembly has structure where components of the MEA have different sizes, i.e., the surface size of one of diffusion layers is smaller than the surface size of the solid polymer electrolyte membrane, and the surface size of the other of the gas diffusion layers is the same as the surface size of the solid polymer electrolyte membrane (stepped MEA). In this regard, reduction in the thickness of the solid polymer electrolyte membrane is attempted to reduce the amount of relatively expensive material used for the solid polymer electrolyte membrane. Therefore, in order to protect the thin solid polymer electrolyte membrane having insufficient strength, as a protection member, for example, a frame equipped MEA including a resin frame member is adopted.
As the frame equipped MEA, for example a membrane electrode assembly disclosed in Japanese Laid-Open Patent Publication No. 2007-066766 (hereinafter referred to as conventional technique 1) is known. In the membrane electrode assembly, as shown in FIG. 17, an anode catalyst layer 2a and an anode diffusion layer 2b are provided on one side of a membrane 1, and a cathode catalyst layer 3a and a cathode diffusion layer 3b are provided on the other side of the membrane 1 to form an MEA 4 having different sizes of components (stepped MEA).
The surface area of the anode diffusion layer 2b is larger than the surface area of the cathode diffusion layer 3b. The outer end of the membrane 1 where the cathode diffusion layer 3b is provided is joined to a gasket structure body 5 through an adhesive layer 6.


To provide a seal for a conducting element (3) which is positioned eccentrically in a through-hole (2) in a housing wall (1), a proposal is made for a sealing body (8) which can be moved in a radial direction (11) and which can be fixed after assembly of the conducting element (3) by means of a clamping device (19).

Sealing devices of this type are used in particular to effect an oil-tight seal on the through-hole for a connector in the wall of a gearbox housing. Because the connectors which pass through the wall of the gearbox housing have fixed connections to electronic circuits on the inside of the housing, the longitudinal axis of the connector does not always coincide with the longitudinal axis of the through-hole. The familiar way of sealing the through-hole in spite of this eccentricity is to provide a very large and soft circumferential seal around the connector, which can largely accommodate the eccentricity between the connector and the housing.
A disadvantage of this familiar sealing device is the unequal distribution of the sealing force around its perimeter, between the connector and the housing. Furthermore, very high total forces are required to ensure an adequate seal.
For this reason, connectors have been developed which can be mounted concentrically in the through-hole. However, these require an expensive mechanical compensation mechanism in the mechanical connector system.

Sealing device and method for assembling the sealing device


A bow storage and hoop substitute device 10 for a doll's skirt 20 includes a tubular member 14 having open lateral sides 34 for inserting a predetermined quantity of bow 18 into the member 14, the tubular member 14 being secured to a doll's waist 28 via a drawstring 12 interwoven with a first edge 17 of two-plys of net material used to fabricate the member 14, the tubular member 14 including a second edge 19 sized in conjunction with the lateral sides 34 to provide the tubular member 14 a hoop characteristic having a diameter corresponding to a desired configuration for the doll's shirt 20.

1. Filed of the Invention
The present invention relates to a bow display, storage and hoop substitute device for a doll's skirt, and more particularly, to a device used to store bows from bridal shower and wedding gifts and substitute as a hoop to expand a bride doll's wedding skirt.
2. Background of the Prior Art
It is traditional for a soon-to-be bride to save bows attached to gifts given to her at her bridal shower and wedding. The problem that the future bride faces is where to store the bows. One method of storing the bows is under the bride doll's wedding skirt.
Prior art designs, as disclosed in Bridal Crafts magazine, January, 1996, pages 33-36, utilize a circular cardboard base with a small orifice at the center. The base is set on a planar surface, the doll's feet are positioned in the orifice, a slip attached to the dolls waist is glued to the edge of the orifice. Next, a skirt made from lace material is attached to the doll's waist, then glued around the perimeter of the cardboard base except for a small opening to insert the bows therein. Once the bows have been placed within the chamber the lace perimeter is completely glued to the cardboard base. Thus, the lace and cardboard form the doll's skirt and a bow storage chamber that allows the box to be viewed.
The problem with the aforementioned design is that it is very difficult to remove the bows. One must detach the lace at the dolls waist to get to the bows. Further, one must "guess" at the cardboard base diameter which is dependent upon the quantity of bows that need to be stored. If the base diameter is to small, the storage chamber will not accept all the bows. If the base diameter is to large, there won't be enough bows to fill the chamber thereby allowing the lace material and skirt to "sag" on the doll. This "sag" diminishes the hoop skirt characteristic that provides elegance to the doll's skirt.
Other prior art doll accessories are disclosed in U.S. Pat. Nos. 5,433,643; 5,040,679; and 4,749,088; however, these patents do not teach one how to store bows under a bridal doll's wedding dress.
A need exists in the art for a bow storage device that is inexpensive, easily attaches to a bridal doll, provides for easy insertion and removal of bows from the device, and is hidden under the skirt yet lifts the skirt outward without using a base thereby presenting a hoop skirt characteristic.

Bow display, storage and hoop substitute device for a doll's skirt