An apparatus for estimating a disparity map based on at least two images is provided. The apparatus includes at least two processing units, which include a pixel recursion unit configured to determine a disparity value as a pixel recursion disparity candidate based on a plurality of pixel values of the at least two images and a selector configured to select a selected disparity candidate to determine at least one of the disparity map values of the disparity map. The selector is adapted to select the selected disparity candidate from a candidate group assigned to the selector. The candidate group assigned to the selector includes the pixel recursion disparity candidate, a second disparity candidate and a third disparity candidate. Moreover, the selector is adapted to select the selected disparity candidate independently from a different selector of a different processing unit of the at least two processing units.

The present invention relates to video processing, and, in particular, an apparatus and a method for real-time capable disparity estimation for virtual view rendering suitable for multi-threaded execution.
Video applications and the processing of video data becomes more and more important. In this context, the role of 3D videos increases. The next generation of 3D displays will be autostereoscopic. In contrast to conventional glasses-based displays, which have two views, autostereoscopic displays have an arbitrary number of views. With the advent of multi-view autostereoscopic displays, an apparatus and a method for generating an arbitrary number of views from stereoscopic content would be of great importance. Since most current and future content will only be available with two views, the missing views have to be calculated from the available ones. A well-known way to create virtual views is Depth Image Based Rendering (DIBR). Depth Image Based Rendering can generate these views from stereoscopic images and corresponding disparity maps.
Disparity maps will now be explained with reference to FIG. 13. On the left side of FIG. 13, two cameras 2, 3 are illustrated. The cameras are directed towards two objects 11, 12. The first object 11 is arranged close to the cameras 2, 3. The second object 12 is further away from the cameras 2, 3. Both cameras now create an image of the scene. The first (left) camera 2 creates image 20. The second (right) camera 3 creates image 30, as illustrated on the right side of FIG. 13. It should be noted that in video applications, a plurality of subsequent images are recorded by the cameras employed.
On the right side of FIG. 13, image 20 and image 30 illustrate the same scene from different perspectives, namely, image 20 illustrates the scene from the perspective of the left camera 2, while image 30 illustrates the scene from the perspective of the right camera 3. By this, the objects 11, 12 appear at different positions in the images 20, 30. In particular, the first object 11 is illustrated as object 21 in image 20 and as object 31 in image 30, while the second object 12 appears as object 22 in image 20 and as object 32 in image 30. As can be seen, the position of object 21 in image 20 differs more from the position of object 31 in image 30, than the position of object 22 in image 20 differs from the position of object 32 in image 30. This results from the fact that object 11 is located closer to the cameras 2, 3 than object 12, which is further away from the cameras 2, 3.
A corresponding disparity map 40 is illustrated in FIG. 13 below images 20 and 30. Portion 41 of the disparity map 40 indicates by how many positions the object 21 in FIG. 13 has to be shifted, to be at a position corresponding to the position of object 31 in image 30. The disparity map 40 indicates that all four pixels of the object 21 have to be shifted by three pixels, such that object 21 is shifted to the position of object 31. This is indicated by the four pixel disparity values in portion 41 n the disparity map 40. It should be noted, that in reality, a real image normally comprises much more pixels than the images 20 and 30, and, as a consequence, pixel disparity values may be much greater.
Portion 42 of the disparity map 40 indicates by how many positions the object 22 in FIG. 13 has to be shifted, to be at a position corresponding to the position of object 32 in image 30. The two pixel disparity values in the portion 42 of the disparity map 40 indicate that the two pixels of the object 22 have to be shifted by one pixel, such that object 22 is shifted to the position of object 32.
The disparity map 40 in FIG. 13 illustrates by how many pixels the corresponding pixel has to be shifted in a horizontal directions. Other disparity maps may also indicate that a pixel of a first image has to be shifted by a certain number of pixels in a vertical direction to be at a position of a corresponding pixel in a second image.
Depth Image Based Rendering needs disparity maps to render virtual views. To estimate these disparity maps in real-time at the consumer site, a fast and reliable disparity estimator has to be available which is also suitable to be implemented in hardware like Field-Programmable Gate Arrays (FPGAs) or Application-Specific Integrated Circuits (ASICs).
The state of the art provides a hybrid recursive matcher (HRM) described in:    Atzpadin, N., Kauff, P., Schreer, O. (2004): Stereo Analysis by Hybrid Recursive Matching for Real-Time Immersive Video Conferencing. IEEE Trans. on Circuits and Systems for Video Technology, Special Issue on Immersive Telecommunications, Vol. 14, No. 4, 321-334.
The hybrid recursive matcher (HRM) described in Atzpadin, N., Kauff, P., Schreer, O. (2004) utilizes the original concept of recursive block matching for motion compensation explained in:    De Haan, G., Biezen, P. W. A. C., Huijgen, H., Ojo, O. A. (1993): True-Motion Estimation with 3-D Recursive Search Block Matching. IEEE Trans. on Circuits and Systems for Video Technology, Vol. 3, No. 5, 368-379.
Furthermore, the hybrid recursive matcher (HRM) of Atzpadin, N., Kauff, P., Schreer, O. (2004) utilizes the extension of De Haan, G., Biezen, P. W. A. C., Huijgen, H., Ojo, O. A. (1993) towards hybrid recursive matching proposed by:    Kauff, P., Schreer, O., Ohm, J.-R. (2001): An Universal Algorithm for Real-Time Estimation of Dense Displacement Vector Fields. Proc. of Int. Conf. on Media Futures, Florence, May 2011,which is protected for disparity estimation since 2002, see:    Atzpadin, N., Karl, M., Kauff, P., Schreer, O. (2002), European Patent Application, Publication Number: EP 1 229 741 A2.
According to the state of the art presented in Atzpadin, N., Kauff, P., Schreer, O. (2004), it is proposed to determine disparity values of pixels by conducting a block recursion. This state of the art proposes to determine the disparity values of the pixels of an image by employing a special meander-like recursive structure, wherein a meander scan is conducted on images of arbitrarily shaped video objects. According to this teaching, for each pixel on the meander path, the previous disparity value on the meander scan path has to be calculated before, as it is needed to determine the disparity value of the actual pixel on the meander scan path. By this, the disparity values of the pixels have to be determined one after the other in subsequent order along the meander scan path.
The HRM presented in Atzpadin, N., Kauff, P., Schreer, O. (2004) has already been used in real-time for image sizes up to SD (Standard Definition) resolution. However, e.g., HD (High Definition) resolution necessitates fast processing, and it would therefore be highly desirable that an apparatus and method with the ability to create disparity maps in short time would be available.

Apparatus and method for real-time capable disparity estimation for virtual view rendering suitable for multi-threaded execution

Fraunhofer-Gesellschaft zur Foerderung der angewandten Forschung e.V.


An apparatus for aiding a user in raising and lowering of a tailgate includes a handle and a connector for connecting the handle to the tailgate to allow for movement of the handle rearwardly relative to the tailgate as the tailgate is initially lowered by the user and forwardly to a position above the tailgate as the lowering of the tailgate is continued. A tailgate lift assembly includes a housing extending along a predetermined length, a spring anchored at one end at a first end of the housing, a connector having a first end affixed to the opposite end of said spring and extending through said housing, and a first fixed guide around which the connector extends. A bumper for covering a corner of a tailgate is also provided.

Tailgates are useful in conjunction with vehicles, such as trailers, for multiple purposes. Among these is the ability to prevent cargo from falling off during transportation. In addition, tailgates may be provided with a hinged connection, so that the tailgate in a lowered position may act as a ramp to aid in loading and unloading of cargo, such as tools and/or vehicles.
Due to the stability required by these functions, the tailgate material is normally quite substantial, and may be heavy, thereby presenting a challenge to the user. Specifically, raising and lowering the tailgate may require a user to bend over to the ground and lift the heavy tailgate to pivot the tailgate into a raised position. Similarly, when the tailgate is being pivoted to a lowered position, the user may have to support the weight of the tailgate in a bending position, as the tailgate is positioned on the ground. This range of motion of the body may be undesirable, as supporting significant weight (such as the weight of the tailgate) in a bent position may cause stress on the user's back. Tailgates also often have sharp corners that can cause injuries during the raising and lowering process if not kept in check.
Accordingly, a need is identified for solutions to these and other possible issues relating to the operation of tailgates and similar devices for vehicles.

Tailgate lift handle, lift assembly, and related apparatus


A disk drive is disclosed comprising a head actuated over a disk comprising a plurality of tracks, each track comprising a plurality of data sectors. A circular buffer is defined comprising a plurality of the tracks. During a garbage collection operation, write data is read from previously written valid data sectors corresponding to a tail of the circular buffer and stored in a non-volatile cache. During a flush operation, the write data is flushed from the non-volatile cache to the disk.

Disk drives comprise a disk and a head connected to a distal end of an actuator arm which is rotated about a pivot by a voice coil motor (VCM) to position the head radially over the disk. The disk comprises a plurality of radially spaced, concentric tracks for recording user data sectors and servo sectors. The servo sectors comprise head positioning information (e.g., a track address) which is read by the head and processed by a servo control system to control the velocity of the actuator arm as it seeks from track to track.
The data sectors are accessed indirectly using logical block addresses (LBAs) mapped to physical block addresses (PBAs) representing the physical location of each data sector. This indirect accessing facilitates mapping out defective data sectors during manufacturing as well as while the disk drive is deployed in the field. Access commands (read/write) received from the host include LBAs which the disk drive maps to corresponding PBAs using any suitable mapping technique.
The LBA to PBA mapping may also facilitate log structured writes wherein at least part of the disk is written as a circular buffer. For example, the circular buffer may be written from an outer diameter track toward an inner diameter track, and then circle back to the outer diameter track. Data is written to the head of the circular buffer such that the LBAs of new write commands are mapped to the PBAs of the corresponding data sectors. When the same LBA is written by the host, the data is written to a new PBA at the head of the circular buffer and the old PBA is marked invalid so that it may be overwritten. During a garbage collection operation, valid PBAs previously written in the circular buffer may be relocated to the head of the circular buffer so that the old PBAs may be overwritten.

Disk drive using non-volatile cache when garbage collecting log structured writes


A method of operating an intrusion detection system. The system determines occurrence of a signature event indicative of a denial of service intrusion on a protected device. A value of a signature event counter is increased. The value of the signature event counter is adjusted to not include a count of signature events past a sliding window. The value of the signature event counter is determined to exceed a signature threshold quantity, followed by generation of an alert at a time subsequently recorded in a log. The log is cleared of entries past a permissible age. A present alert generation rate is determined as a ratio of the total number of timestamps in the log to the permissible age. The present alert generation rate is ascertained to exceed an alert generation rate threshold. A selected element of the signature set is altered to decrease the alert generation rate.

Computer-based activities are now subject to electronic vandalism. A vandal, who is sometimes called a hacker in this context, may attempt to intrude upon a computer system in order to steal information in an act of industrial espionage, or to alter records to the detriment or the benefit of another party's interests or reputation, or to impede the operation of the computer by implanting a virus or by flooding the computer with bogus information.
Computers are often protected against vandals' intrusions by intrusion detection systems. An intrusion detection system monitors the activities of users and would-be users for particular events or patterns of events generally known as signatures. A signature is a set of events and transition functions that define a sequence of actions that constitute misuse or unauthorized use of the computer. For example, a misuse engine that relies upon signature monitoring is described in detail in U.S. Pat. No. 5,557,742.
More specifically, a signature may include a signature event such as a particular pattern of bits. For example, the pattern may identify an incoming message that is designed to induce a deliberate violation of a communication protocol, where the kind of violation may be indicative of a malicious attack. Associated with a signature event there may be a signature event counter for counting the number of times the signature event occurs. Associated with the signature event and the signature event counter there may be a signature threshold that may be used to differentiate between attempted intrusions and uneventful occurrences of the signature event. For example, the signature event may be required to occur J times in K minutes before an intrusion is suspected. Thus, for example, more than five occurrences in twenty minutes of the signature event "protocol violation 3" may be used as an indicator that an unauthorized party may be attempting to intrude upon the operation of the protected computer.
An alert is generated when the intrusion detection system observes activity that is suggestive of an intrusion. The purpose of the alert is to inform a network administrator of the suspected attack, so that the administrator may take action to minimize the damage done by the intruder. Often, alerts from a number of intrusion detection sensors may be sent through an intrusion detection server that functions as an intermediary between the sensors and the network administrator. An unfortunate consequence of this architecture is that the intrusion detection server may impose an upper bound on the performance of the intrusion detection system.
This bound becomes critical when a vandal or hacker attacks a target such as an Internet web server by flooding the target with a torrential flow of disruptive messages that overload the target to the point of functional failure. Attacks of this kind are called "denial of service" attacks. During a denial of service attack, the vandal may fraudulently assume a number of different electronic identities, often by including messages in the disruptive flow that have a variety of source addresses. Such a vandal may be called a spoofer.
In one kind of denial-of-service attack, a spoofer may send the target a large number of Internet Control Message Protocol (ICMP) messages called Packet INternet Gropers (PINGS), which are normally used to query whether a particular Internet address is accessible to the sender. Upon receiving a PING, the target responds to the spoofed device rather than the vandal, as the PING bears the fraudulently used identity of the spoofed device. By flooding the target with PINGS, the vandal may divert the target's resources to generating responses and consequently away from its legitimate tasks, and may also cause unproductive network congestion by triggering a flood of response messages.
In another kind of denial-of-service attack, the vandal may send the target a large number of TCP SYN messages. A TCP SYN message is normally used to initiate a TCP connection. Upon receiving a SYN massage, the target sends a SYN/ACK message to the spoofed device rather than the vandal, as the SYN message bears the fraudulently used identity of the spoofed device. Further, the target reserves an internal data structure presumably to be used in supporting a connection with the spoofed device. So, by flooding the target with a large number of SYN messages, the vandal causes not only the problems mentioned above—resource diversion and network congestion—but also exhausts the target's capacity to support the data structures needed to establish other connections. Thus, the target is left unable to establish connections with any device except the spoofed device.
To combat such attacks, a computer may rely upon protective equipment that filters incoming messages according to information provided by the intrusion detection system. The intrusion detection system's intrusion detection sensors detect the onslaught of a vandal's attack, read the source addresses or other markings that the vandal usurps and fraudulently re-uses, and sends out alerts, through the intrusion detection server, intended to inform the network administrator of the attack. The administrator may then configure the filtering equipment to block incoming messages that seem to originate from the malicious source.
When a typical denial-of-service attack involves an onslaught of incoming messages, the intrusion detection sensors produce an intense outpouring of alerts, which are typically funneled through the intrusion detection server for correlation on behalf of the network administrator. Due to the intensity of the flow of alerts, the intrusion detection server may itself become overwhelmed. As a result, the intrusion detection system may fail when it is most critically needed, or queues and delays may result that prevent the server or the administrator from receiving crucial information in a timely way. Consequently, the capability of the intrusion detection system to defend against a denial-of-service attack is significantly limited.
Thus there is a need for improving the operation of an intrusion detection system, so that it may provide a stronger and more reliable defense against denial-of-service attacks by vandals intended to overwhelm both the protected device and the intrusion detection system itself by flooding them with a torrent of disruptive inbound messages.

This patent is subject to a terminal disclaimer.

Method of operating an intrusion detection system

International Business Machines Corporation


The invention relates to a method for treating disease such as viral infections, tumors, and cancers, comprising administering a TLR7 agonist or TLR7 agonist prodrug according to a cyclical dosing schedule having a dosing period and a resting period. For example, the method encompasses treating disease with:

Pharmacological enhancement of immune responses for the treatment of disease, particularly viral and bacterial infections and cancer, is attractive for several reasons. Beyond the obvious observation that the immune system is generally responsible for clearing pathogens, the breadth of an immune response offers the potential to react to infectious disease with a low risk of developing drug resistance. Also, immune-based therapy offers the potential to address the treatment of infections where direct replication inhibitors are either absent or unsatisfactory. Some viruses offer only poor prospects for development of effective agents directed at virally encoded targets due to their replication strategies, while others are so genetically plastic that the inhibitory effect of a direct replication inhibitor is lost rapidly, unless effective strategies are taken to suppress the evolution of resistant variants.
Several clinical observations support the importance of tumor immune surveillance in humans. The increased risk of tumor development in immunosuppressed patients, cases of spontaneous tumor regression, and the presence of tumor-reactive T cells and B cells correlating with improved prognosis all point to a role for the immune system in controlling tumor growth. Studies comparing histopathology with clinical outcome for early-stage lesions in several cancer types have demonstrated that intratumoral lymphocyte infiltrates are strongly correlated with reduced frequencies of metastasis (Taylor et al. J. CLIN. ONC. 25(7):869-75 (2007)) and improved patient survival (Sharma et al. PNAS 104(10):3967-72 (2007)). It is clear that the balance between stimulation and suppression of the host immune response plays an essential role in the ability of cancer cells to grow, invade, and metastasize. Recognition and elimination of these malignant cells is a major challenge for the host immune system. Two reasons that immune control of tumor growth is inadequate are that tumors are capable of locally suppressing host immunity and many tumors are intrinsically poorly immunogenic. Immunotherapy has had some success in treating selected tumors and the potential to harness the immune system as a therapeutic modality remains of great interest to many oncologists. First generation immunotherapies were single cytokines, such as Interferon-α (IFN-α) for the treatment of melanoma and renal cell carcinoma (Moschos et al. CANCER TREAT. RES. 126:207-41 (2005)). With this approach, the number of patients who responded to therapy was small, but for those who did, the response could be profound and sometimes curative.
The advent of molecular biology has enabled products based on interferon ("IFN"), an immune cytokine, which is a component in the treatment of hepatitis C virus ("HCV") infection and in the treatment of some tumors. The biological importance of IFN in antiviral host defense and in cancer therapy has spawned many efforts to identify agents that stimulate endogenous IFN production. Stimulation of IFN production has been reported with agonists of Toll-like receptors ("TLRs"), which has accelerated efforts to exploit them for therapeutic benefit. TLRs are a family of pathogen-recognition receptors that when activated by appropriate agonists (e.g., LPS, viral double-stranded RNA, flagellin, etc.) activate the innate immune response (Iwasaki and Medzhitov, NAT. IMMUNOL. 5(10):987-95 (2004)). Stimulation of TLRs either directly or indirectly leads to: (i) the release of multiple cytokines, including type I and type II interferons; (ii) the induction of pathways and enzymes that destroy intracellular pathogens; and (iii) the maturation of professional antigen-presenting cells, resulting in the activation of the innate and adaptive immune response. The benefit of many of these responses in the treatment of viral diseases and cancers, notably stimulation of type I and type II interferons and NK and T cell activation, is well-recognized. To date, 10 functional TLRs have been identified in humans.
In general, drugs are administered as immediate-release dosage forms so that the entire dose of the drug is released within a very short period of time following administration. As the bolus of released drug is absorbed, the plasma drug concentration rapidly rises to a maximal or peak concentration and subsequently declines as the drug undergoes "clearance". During some portion of the time period in which the plasma drug concentration rises, peaks and subsequently declines, the drug provides its therapeutic effects, i.e., the plasma drug concentration achieves or exceeds a therapeutically effective concentration for the disease or condition being treated. Likewise, the therapeutic effect disappears when the plasma drug concentration and physiological response thereto declines to a level that is below a certain threshold. These principals hold true not only for drugs administered orally but also for drugs administered by intravenous bolus and for many small molecules when administered by subcutaneous injection.
In certain instances, drugs are delivered in slow-release form, in an attempt to sustain plasma drug levels so as to sustain the duration of benefits. In these cases, the duration of benefit again tracks with the duration of drug exposure. In other instances, typically with agonists that activate rather than inhibit their respective targets, benefit persists beyond the duration of drug exposure. For example, activation of a host receptor can lead to activation of cellular responses, the benefit of which can persist beyond the period of time in which the receptor is activated by circulating drug levels.
In all the cases cited above, immediate release, sustained release and agonists with a durable period of action, it is expected that the magnitude of beneficial effects correlates with the amount of drug administered, i.e. more administered drug leads to more benefit.
For drugs administered in this fashion, relatively high peaks and low valleys of plasma concentrations cannot be avoided. Accordingly, doses and dosing intervals can be selected to help obtain an acceptable balance between average steady-state plasma drug concentrations that provide effective therapy and avoiding, as much as possible, problematical peak and/or trough plasma concentrations during each dosing interval. Typically the minimal acceptable dosing frequency for a particular drug is set by constraints imposed by toxicity and efficacy. Dosing too often results in toxicity, and dosing too infrequently is inefficacious. For example, the response in genotype 1 infected HCV patients to administration of IFN-α in combination with ribavirin demonstrates that benefit increases with duration of exposure during a standard treatment interval. Specifically, daily dosing of standard interferons induces a substantially more rapid initial decline in viral load than does three times weekly ("TIW") administration of the same agent (deLedinghen et al., J. HEPATOL., 36(6):819-26 (2002); Perez et al., J. VIRAL HEPAT., 10(6):437-45 (2003)). Furthermore, sustained viral response increases with use of sustained exposure interferon (e.g. pegylated interferon) when compared to TIW administration of standard interferons, which are cleared relatively rapidly (33-36% for standard interferons to 42-46% for sustained exposure interferons (Maims et al., NAT. REV. DRUG DISCOV., 6(12):991-1000 (2007)). Surprisingly, while daily dosing or continuous exposure is optimal for IFN-α, it is suboptimal for TLR agonists generally, TLR7 agonists and TLR7 agonist prodrugs and the treatment of viral infection in particular.

Abstract: 5-amino-3-(2′-O-acetyl-3′-deoxy-β-D-ribofuranosyl)-3H-thiazolo[4,5-d]pyrimidin-2-one Tosylateaccording to a dosing schedule of every-other-day or a dosing schedule of three consecutive days of dosing followed by four consecutive days of not dosing.


A technique for interpolating a series of samples includes constructing a mathematical model of the series that describes its large signal behavior. The model is subtracted from the original series to yield a residue. A discrete Fourier transform (DFT) is taken of the residue, and the DFT is zero-padded. An inverse DFT of the padded result yields an interpolated residue, which is then added back to the mathematical model to construct an interpolated version of the series of samples. Using this technique, accurate interpolation can generally be attained even when the series of samples is not coherently sampled.

1. Field of the Invention
This invention relates generally to interpolation of uniformly sampled data, and, more particularly, to interpolation of sampled data acquired from electronic signals for instrumentation and measurement.
2. Description of Related Art
Interpolation is a commonly used technique for estimating signal levels in gaps that fall between discretely sampled values. Consider a series of sampled values x(n) that represent an electronic signal x(t) sampled at a rate FS.
Various methods have been used to estimate the level of x(t) between samples. One technique is to construct straight lines between consecutive samples, or simply to "connect the dots." Values that fall between samples can be computed by linear estimation.
More sophisticated techniques involve connecting adjacent samples with second, third, or higher order polynomials. These methods take into account not only the samples being connected, but also neighboring samples. Interpolation using polynomials provides smoother, more continuous results than straight line interpolation.
Yet another method involves the use of the Discrete Fourier transform (DFT). A DFT is taken of the sampled signal, x(n), to yield a discrete Fourier series, X(m). The series X(m) has a length equal to FS and has Hermitian symmetry. The series X(m) is expanded in its space, creating a void in that space directly after the value corresponding to FS/2, the Nyquist rate. Zeros are inserted into that void, and the series X(m) is padded with zeros. An inverse DFT is then taken of the zero-padded X(m), to yield an interpolated sequence, x′(n). If the original series x(n) consists of N samples, and K zeroes are added to X(m), the interpolated sequence x′(n) consists of N+K samples, K more than the original series.
FIG. 1 shows an example of this type of interpolation. Graph 110 shows a sampled series, x(n), consisting of 64 samples. A DFT is taken of x(n) to produce X(m). Graph 112 shows the magnitude of X(m). The graph 112 reveals two frequency components within the Nyquist rate (m=1 to 32), a lower frequency component 120 and a higher frequency component 122. Above the Nyquist rate (m=33 to 64), the spectrum repeats in reverse order, with component 124 corresponding to component 122 and component 126 corresponding to component 120.
The DFT sequence X(m) is then zero-padded. As shown in graph 114, zeros 130 are inserted immediately after the 32nd sample of X(m), placing them precisely in the middle of the sequence. Values of X(m) greater than Nyquist are simply shifted to the right. In this example, 192 zeros are added to X(m) to create a sequence X′(m) of 256 values, 4 times longer than the original sequence.
An inverse DFT is then taken of X′(m) to produce an interpolated series, x′(n). The interpolated series x′(n) is shown in graph 116. It can be seen that x′(n) represents the original series, x(n), but with four times as many data points. With significant added detail, the wave shape of graph 116 stands out very clearly.
Interpolation using this zero-padding, DFT technique provides nearly perfect results assuming the signal x(t) is periodic and band limited to the Nyquist rate. An arbitrarily large number of zeros can be added to provide any desired level of interpolated fidelity.
Zero-padding, DFT interpolation is clearly an effective technique. We have recognized, however, that its accuracy breaks down under certain conditions. First, the technique only works for periodic signals. Non-periodic signals are not amenable to Fourier analysis. Along a similar line, the technique is accurate only for signals that are coherent. As is known, signals are "coherent" when each of their frequency components completes exactly an integer number of cycles within the sampling interval. If an input signal is not coherent, i.e., if it completes only a partial cycle of any component, an error called "leakage" arises. Leakage causes erroneous broadening of spectral lines, as well as other false structure. In the interpolation context, leakage causes errors in X(m) and therefore in X′(m), which in turn causes the interpolated signal, x′(n), to inaccurately represent the original sequence, x(n).
The need for interpolation of sampled data commonly arises in the context of Instrumentation and Measurement (I&M), including automatic test equipment (ATE). I&M systems are customarily employed for digitizing and analyzing electronic signals, and are typically supplied with numerous digital signal processing (DSP) engines, which are well-suited for performing DFTs. Zero-padding, DFT interpolation is therefore a natural fit for these test systems. However, signals sampled with I&M systems are often not periodic or coherent.
It would be desirable to find a way to use zero-padding, DFT interpolation in I&M applications for signals that are not periodic, without significantly compromising accuracy.

Residual Fourier-padding interpolation for instrumentation and measurement


The present exemplary system and method relates to a feature upon the exterior of a corrugated package that allows an access secondary to the primary opening feature for the inclusion of sample materials that are added after the package has been sealed at the contents' (e.g., appliance) place of manufacture. The benefits of the invention are reduced unit operations and labor to include sample materials. Additionally, the packaging feature will deter theft of sample materials from the product to the point of sale. The theft deterrence is achieved via a tamper-evident label covering the feature after sample materials have been inserted.

Historically, small consumer appliances and other fully assembled machines (e.g., Keurig coffee makers) are manufactured in countries with reduced manufacturing and labor costs (such as Asia or Mexico), are packaged, and are then shipped to the United States or another country for distribution. Prior to shipment to final retail locations, sample materials or adjunct components, such as ingredients, supplies, or beverage pods (produced in North America) are included within the appliance package.
Traditional appliance packaging designs require a disassembly of the pallet load of appliances, re-opening of the appliance's typically corrugated package, insertion of the sample or adjunct materials, resealing of the appliance packaging, and reassembly of the pallet load for further processing and delivery. This process consumes a high degree of both time and labor.
Further, manufacturing constraints, such as location, distribution channels, and existing manufacturing assemblies, often discourage (i) shipping sample materials or adjunct components to Asia, Mexico, or other appliance manufacturing centers because efficient use of a finite shelf-life of product is not always accomplished due to inefficient logistics, or (ii) a process with few unit operations or limited labor to include sample materials.
Therefore, there is a need for an efficient and economical way to add sample materials or adjunct components to a factory sealed primary packaging.

Secondary insertion feature for assembled package


An upper framed portion of a building structure may be anchored to a lower masonry wall by using a conventional concrete anchor and an anchor retainer. The anchor retainer may have a body portion longer than the width of the wall and both upper and lower reference surfaces. An anchor retainer assembly is temporarily formed by inserting the anchor through a throughhole in the retainer body so that the threaded upper portion of the anchor extends above the upper reference surface of the retainer by a first selected height, so as to leave enough of the threaded end exposed above the retainer for at least one nut to be securely attached to the anchor. No unthreaded portion of the anchor extends above the lower reference surface by more than a second amount that is generally selected to be equal to the actual thickness of the framing member, so as to ensure that no substantial unthreaded portion of the anchor can extend above that member.

1. Field of the Invention
The invention relates to a tie or anchoring arrangement assembled in situ to anchor an upper framed portion of a building structure to a lower masonry wall portion
2. Background Information
Concrete masonry walls can be formed of vertically stacked concrete blocks having internal, vertical, mutually aligned cavities that form channels extending vertically through the wall. These may be reinforced by placing rebar through the vertically aligned cavities and filling the channels about the bars with a wet cementitious mixture known as grout. The grout, when set, locks the bars to the blocks and thus provides the wall with increased resistance to applied loads.
Frame structures are often erected on top of reinforced or non-reinforced masonry walls. These may be roofs, wooden frame portions of composite walls, or a combination of a framed upper wall and a roof. Composite walls having a framed upper portion are popular in the construction of multi-story, multi-family residential buildings. The upper frame portion of the overall structure may be constructed in situ at the job site, may be prefabricated off site, or may be assembled on-site from prefabricated components (e.g., the combination of a prefabricated wall and a roof formed from prefabricated trusses). Regardless of the exact nature of its construction, the frame portion of such a structure is preferably firmly connected to the underlying masonry wall. In many locales, where hurricanes and other windstorms are a concern, building codes mandate that framework above a masonry wall be tied to the underlying wall by means suitable to withstand a substantial vertical force, as is expected from hurricane force winds.
One method for anchoring structural framework to the top of a masonry wall involves embedding anchors having threaded upper end portions into grout filling the vertical channels. Each of these anchors is preferably emplaced so that its shank and threaded upper end portions are vertical. Moreover, the anchors are set at pre-selected positions along the wall that accord with mating holes drilled through or otherwise formed in a sill plate or other lowermost portion of the framework. An initial step in erecting the framework may then consist of placing the lowermost piece of a wall frame over the protruding anchors, placing suitable washers and nuts on the threaded shafts of the anchors and turning the nuts to attach those two portions of the composite structure together.
This method relies on anchors being reliably emplaced in vertical settings at pre-selected positions along the wall. If an anchor is tilted or displaced from its predetermined position, erection of the framework will be delayed until that anchor is cut off and possibly replaced. Unfortunately, the prior art does not provide a reliable means for emplacing an entire array of anchors along a wall. If anchors are emplaced by being manually inserted into wet, unset grout, some of those anchors may fall over into unacceptable orientations as the grout sets. If anchors are vertically suspended from wire hangers prior to pouring the grout, some fraction of the anchors are often accidentally moved from their desired locations during grouting.
Queen, in U.S. Pat. No. 6,571,526, teaches apparatus for setting a reinforcing rod at a preselected position within a vertical channel in a concrete masonry wall. His devices generally provide a vertically extensive support for the rod at the top of a channel. Queen's devices, however, all extend downward an appreciable distance from the top of a block into the vertical channel. While this may be acceptable for setting the position and vertical orientation of a long rebar that extends the full height of the wall, it is unacceptable for embedding relatively short anchors at the top of the wall. Because his plastic device remains in the grout, Queen's approach would seriously degrade a short anchor's ability to withstand the vertical hold-down force specified by building codes.


A water treatment device f or use with evaporative coolers provides treatment of the water supply for such coolers. The device may be installed in series with the cooler in the water supply line and does not require any modification to the evaporative cooler itself. The device has a central housing having an interior divided by a longitudinal baffle, which provides a water inlet side and a water treatment side. A chemical insert, preferably formed to closely fit the interior of the treatment side, is installed in the treatment side of the device, and water is caused to flow from the water supply line to the inlet of the device, downward through the inlet side, and then upward through and past the chemical insert in order to provide maximum exposure of the surface of the insert to the water to be treated. The treated water then f lows through an outlet and then through to the evaporative cooler. The chemical insert preferably includes one or more salt compounds for the prevention of mineral deposit buildup in the pads of the evaporative cooler, but may include antibacterial and/or fungicidal agents, scents, etc.

While refrigerated air conditioning systems are almost universally known, the earliest mechanized method of cooling a space was by means of the evaporative cooler. Such coolers operate by wetting down a porous pad or pads with water, and forcing air through the wet pads. The evaporation of the moisture from the pads due to the air moving through the pads, results in a reduction of the temperature of the air. Such systems are relatively efficient in areas where the climate is relatively dry, due to the greater amount of moisture the air can absorb and therefore a relatively large drop in temperature as the air is humidified by the evaporating moisture, and further due to the additional humidity which is added to the air during the process. In dry climates the additional humidity can prove beneficial in many circumstances.
However, in areas such as the southwest where such evaporative cooling systems can operate at their greatest efficiency, it is common for water supplies to be relatively "hard," i.e., for the water to contain a relatively high level of dissolved minerals. When evaporation occurs, such hard water will leave deposits of the previously dissolved or suspended minerals, such as various compounds of iron, calcium, etc.
Such deposits will, over the course of time, block water flow through relatively small passages. This is well known in such devices as shower heads and the like. Much the same phenomenon occurs in the pads contained in evaporative coolers under similar circumstances, in that the evaporation of the hard water in the cooler pads will leave mineral deposits which eventually at least partially block the passage of air through the pads. Moreover, the surface area of the pad material is reduced due to the mineral buildup, resulting in less efficient evaporation. Other cooler components may also be blocked or corroded due to deposit buildup.
While water softening devices are known, they are generally intended for use in an entire household water system, or in combination with the line supply for a specific location, such as at a kitchen sink. Applicant is aware of only one other device intended for use with an evaporative cooler, which device is installed within the cooler, as will be discussed further below.
The need arises for a water softening or treatment device for the treatment of the water supply for an evaporative cooler. The device must be capable of being added to an existing evaporative cooler without modification to the cooler. A relatively simple inline installation is desirable, in order to confirm delivery of a treated water supply to all components of the cooler.

Evaporative cooler water treatment device


A rim tie connection for building structures including a wood post member, first and second wood rim members and a sheet metal connector. One specialized use of the rim tie connection is in constructing the floor support framing in gazebo structures. In such structures the wood post member is generally in a vertical position and the wood rim members are in a generally horizontal position. The sheet metal connector ties the ends of the wood rim members together and to the wood post member. The sheet metal connector includes a seat member, for holding the wood rim members and a back member for attachment to the front face of the wood post member. Floor boards attached to and supported by the wood rim members need not be notched to fit around the post member as in prior practice.

This invention relates to a rim tie connection in a building structure. This connection is found where two abutting wood members are each connected to the face of an upright member such as a post. This connection may specifically be found in such applications as attaching wood rails to wood fence posts or in an even more specific application of attaching the bottom rim wood members to the face of a post in constructing a multi-sided gazebo structure.
Present practice is to attach the wood rim members directly to the post member with nails or screws without the use of any sheet metal connector. Because there is limited end distance in the abutting wood rim members, and limited edge distance in the post member, wood splitting is common in driving the attaching nails.
In constructing a gazebo structure, because the wood rim members form an obtuse angle with the wood post and an obtuse angle with each other, it is necessary to make angle cuts in the ends of the abutting wood rim members.


A condensation trap comprising an inlet chamber, a vent chamber and an outlet chamber. The inlet chamber is configured to receive condensate fluid through an external opening therein. The vent chamber is in fluid communication with the inlet chamber via a first passageway that includes an internal opening of the inlet chamber. The internal opening is located substantially at an opposite end of the vent chamber as the external opening. The outlet chamber is in fluid communication with the vent chamber via a second passageway that includes an internal opening in a sidewall of the vent chamber and an interior opening in an end of the outlet chamber. The outlet chamber is configured to transmit the condensate fluid through an exterior opening located at an opposite end of the outlet chamber. A vent volume portion is greater than a total volume of an internal space of the inlet chamber.

Heating-cooling systems, such as heating, ventilating and air conditioning (HVAC) systems often include a furnace and heat exchanger to heat the air circulated by the system. As air flows through the system, condensation can form. Water condensate can potentially cause the malfunction of, or damage to, components of the system, and therefore it is desirable to remove condensate from the system. Typically, a condensate box and trap are provided to facilitate the draining of condensation fluids from furnace components through which products of combustion are exhausted from the furnace, such as header boxes and exhaust vents.
In some systems, an increase in furnace vent lengths means the trap has to operate under conditions where the atmospheric pressure on the trap undergoes large changes when a furnace transitions between a neutral or "off" state to an operating or "on" state. Additionally, some furnace condensate traps designs can have two or more input connection points and can have a large internal volume. Such design features tend to increase the minimum size of the trap, which in turn, undesirably reduces installation flexibility.

Condensate trap for heating-cooling systems


A method and system for learning. Items to be learned are distributed among an unmastered pool, a ready pool, a mastered pool, and a delayed pool. Items from the unmastered pool are placed in the ready pool. A current item randomly selected from the ready pool is presented to a user who responds to the item. The current item is sent to the mastered pool if the user's response is correct and (the current item was not previously presented to the user or the user responded correctly to the current item during the last J times that the user responded to the current item). Otherwise, the current item is sent to the delayed pool followed by transferring the current item to the ready pool after K additional items are presented to by the user. J and K are each at least 1.

1. Technical Field
The present invention relates to a method and system for facilitating a learning of items by a user.
2. Related Art
Learning objectives may comprise memorization. Examples of such memorization may include multiplication tables, foreign language vocabulary, historical events and dates, etc. Known methods of memorization are inefficient. For example, if one wants to memorize the capital cities of all 50 states in the USA, one might create 50 flash cards, each with the name of a state on one side and the capital city on the other. However, running through the stack of 50 flash cards, from start to finish, multiple times is not a very efficient way to memorize the capital cities of all 50 states in the USA.
Thus, there is a need for an efficient method and system for facilitating memorization.

Mastery-based drill and practice algorithm


The present invention is directed to devices for mixing and expressing a multi-component sealant or hemostat or adhesive comprising at least two containers configured to contain and express two reactive components into separate lumens of a cannula. An elongated expression tip having a main channel that is open at a proximal end with the cannula slidably fits into the main channel. The tip contains a plurality of separate mixing chambers open at the distal end of the tip, wherein each of the mixing chambers is in fluid communication with the main channel via an individual connecting channel. Openings for each of the connecting channels are provided at different distances from the distal end. The tip is configured to slide on the cannula and advance distally when the main channel is pressurized due to an obstruction in at least one of the mixing chambers.

Drip or spray devices for dispensing two or more synthetic or biologics based sealant components are known. In the medical device field, such devices are typically used for applying bioadhesives, polymers and other synthetic materials used as wound closures. Because of the reactant nature of the biocomponents used to form the bioadhesive blends, mixing of the components does not occur until the solution is ready to be applied. Mixing of the components too soon before application may result in premature hardening of the mixture, thereby making application of the solution impossible. Thus, in known spray or drip devices, the two or more components are maintained separately until just prior to application. The drip devices include one or more mixing means for mixing the two or more components prior to application. The mixing means may be passive, i.e., spiral configuration in the tubing, or instead may be active, i.e., mixing blade or impeller, with active mixing requiring more complex devices design. Once mixed, the solution may be applied through a needle-like output or may instead be ejected through a spray assembly. Thorough mixing of the two or more components prior to application is important to ensure that the solution will perform as intended.
An exemplary device is taught in U.S. Pat. No. 5,116,315, entitled "Biological Syringe System", which discloses a system for delivery two fluids in a mixed composition, comprising a manifold and a discharge assembly. The discharge assembly mixes fluids in a mixing space and then atomizes the mixed fluids in a spray delivered from the assembly. Similarly, the device shown in U.S. Pat. No. 5,605,255, entitled, "Apparatus for Spraying a mixture of Two Components", is an apparatus for spraying a liquid mixture having two syringes, a connecting piece, a premixing chamber, and a reduced volume section downstream from premixing chamber, and an exit aperture for spraying the mixture. The reduced volume section terminates in a homogenization region. U.S. Pat. No. 6,063,055, entitled "Turbulence Mixing Head for a Tissue Sealant Applicator and Spray Head for Same", illustrates a device in which the mixing is performed in a mixing head.
Intermittent use of a biologics spray device, as may be required during a procedure, tends to clog the outlet of the applicator tip. As a result, most applicator assemblies are provided with a number of replacement tips for use when clogging of the tip occurs. Replacing clogged applicator tips interrupts the flow of a procedure, is time consuming and is an added expense. The device in published U.S. Publication 2010/0096481, "Self-Cleaning Spray Tip", is described as having the distal end of spray cap assembly with an outlet that changes its configuration—at rest and at a second condition (e.g. during expression). The distal end is described as comprised of a material that permits flexion and expansion. The first and second reactive components are introduced into swirl chambers before mixing and are atomized as ejected through the outlet in a cone-shaped spray
U.S. Pat. No. 5,605,541 "Fibrin sealant applicator" discloses a device for applying a fibrin sealant comprising two components which will form said sealant when combined, which device comprises commonly actuable reservoirs for each of said components and a source of gas, wherein each of said reservoirs and said gas in separate fluid communication via a discrete channel to a spray head, said spray head having a first aperture located centrally in an exit end of said spray head through which said gas is discharged, said spray head having a first annular aperture in the exit end of said spray head within first annular aperture is concentric with said first aperture and through which one of said fibrin-sealant-forming components is discharged, and a second annular aperture in the exit end of said spray head being concentric with said first aperture and concentric with, and having a radius larger than said first annular aperture through which the second of said fibrin-sealant-forming components is discharged wherein all of said apertures are in a common plane.
U.S. Pat. No. 6,773,414 "Device and method for dispensing at least two mutually reactive components" discloses a device for dispensing at least two mutually reactive components, comprising a component supplier having primary channels for supplying respective ones of said at least two reactive components to a component dispenser having secondary channels for separately discharging said at least two reactive components through orifices opening into a free target area at a distal tip end of the dispenser for external intimate mixing of the respective reactive components outside a distal tip end of said dispenser, wherein distributors are interposed between said primary and secondary channels for multiplying the number of each respective primary channel with at least a factor 2, adjacent ones of said orifices of said secondary channels being adjoined to said primary channels intended for supply of reactive components of different kind.
U.S. Pat. No. 7,018,357 "External mixer assembly" discloses a fluid delivery system for dispensing a multicomponent biological adhesive having at least a first component and a second component, the system comprising:
a housing configured to receive a plurality of reservoirs;
a discharge nozzle housing a conduit assembly having a plurality of conduits with a proximal end thereof in respective fluid communication with separate of said reservoirs, a distal end of said conduits defining at least two exit openings, wherein each of said plurality of reservoirs includes a sealable opening configured for being penetrated by a proximal end of a respective one of said plurality of conduits; anda deflector assembly provided on said housing, said deflector assembly having a deflector plate substantially parallel with said at least two exit openings, said deflector plate displaced at a distance from a distal-most end of said housing and oriented to deflect said first and second components after exiting from said at least two exit openings.
U.S. Pat. No. 8,616,468 "Spray applicator" discloses a spray assembly for dispensing a mixture, the assembly comprising: a connector configured for operable engagement with a first source of component and a second source of component; an elongated member operably connected to and extending distally from the connector, the elongated member including an inner shaft and an outer sleeve, and defining a vent lumen between the inner shaft and outer sleeve, the inner shaft defines at least a first lumen configured for fluid communication with the first source of component and a second lumen configured for fluid communication with the second source of component; a tip operably connected to the connector, the tip including an opening and defining a mixing chamber between a distal end of the elongated member and the opening of the tip; and an insert member configured to be received in the mixing chamber, the insert member defining at least one radially extending slot on a first end of the insert member and at least one radially extending slot on a second end of the insert member, each of the radially extending slots being configured to mix the first and second components prior to the combination exiting the opening in the tip.
There is a need in conveniently changing spray or drip tips to avoid procedure interruption if/when clogging of the tip occurs. Particularly in laparoscopic procedures, clogged tips may result in significant and undesirable delays in delivery of the sealant or hemostat.

Spray or drip tips having multiple outlet channels


A resource selection method includes monitoring, by a first terminal, a first subframe, where a quantity of the first subframes is less than or equal to a quantity of second subframes; receiving, by the first terminal, indication information in the first subframe; determining, by the first terminal, a first resource in the second subframe according to the indication information; and selecting, according to the first resource, a resource in the second subframe for the first terminal to send data. There may be one or more first subframes; the second subframe may be a candidate subframe, and there may be one or more candidate subframes. The indication information includes information that can indicate a resource reserved by a second terminal, that is, indication information that can indicate a resource excluded by the second terminal.

Device-to-device (Device-to-Device, D2D) communication based on a cellular network, also referred to as a proximity service (Proximity Service, ProSe) in the 3GPP, is a new technology that allows, under system control, terminals to directly communicate with each other by reusing cell resources. The new technology can increase spectrum efficiency of a cellular communications system, reduce transmit power of a terminal, and to some extent, alleviate a problem of spectrum resource shortage of a wireless communications system.
In V2X communication, service traffic of a terminal is periodic. For example, for a cooperative awareness message (Cooperative Awareness Message, CAM), a shortest period is 100 ms and a longest period is 1 s. The terminal is capable of predicting a traffic periodicity. Therefore, a UE resource reservation solution is added in V2X, and the terminal may notify another terminal that the terminal needs to reserve a future time-frequency resource. In addition, when selecting a time-frequency resource for sending data, the terminal needs to consider a resource reserved by another terminal, so as to avoid selecting the resource that has been reserved by the another terminal as much as possible. That is, the terminal needs to perform monitoring when selecting a time-frequency resource.
In a time domain, there is an interval between a monitoring subframe of a terminal a and a subframe in which a candidate resource is located. Therefore, as shown in FIG. 1, if a terminal b indicates, in a subframe in which a resource X is located, that a frequency resource Y after 20 ms is reserved, the frequency resource Y is in a candidate resource of the terminal a, and the resource X is not in the monitoring subframe of the terminal a. Because the terminal a does not perform monitoring in the subframe in which the resource X is located, the terminal a does not know that the resource Y has been reserved. If the terminal a selects the resource Y to send data, a collision occurs.


An electronic mail file access system (100) and associated methods permit a person (102) who originates or maintains a file to allow a person (198) authorized to view or edit a file to access the file by transmitting an electronic message to the file accessor. The file manager can conveniently select whether the file accessor will be able to modify the file or just view it. A file manager can grant one or more accessors viewing or editing access to a file (or multiple files) through transmission of a common electronic message, or through transmission of a separate message for each file or accessor. Variations and methods with different advantageous features are also described.

Colleagues in workgroups increasingly rely on electronic messaging to exchange and collaborate on electronic files. With the increased use of the Internet to connect remote participants in workgroups, colleagues often find themselves unable to reach a common point at which they can safely and conveniently store and access shared files. Even where such access is possible (e.g., within a local area network or via an Internet-based virtual private network), workgroup participants often gravitate to the convenience and familiar interface of electronic mail and wind up passing files back and forth as electronic mail (e-mail) attachments.
Collaborative access to electronic files via e-mail attachments can be inefficient for a number of reasons. Transmission of files as attachments consumes significant network resources. This problem is worsened due to the inefficient base-64 encoding that e-mail systems conventionally employ. Recipients of electronic mail messages with large attachments may become annoyed at experiencing lengthy download times when checking their e-mail, particularly when connecting over slower telephone lines. Many users may prefer to access shared files when and if they wish, rather than having files "pushed" into their e-mail in-boxes.
In a collaborative workgroup, managing access and version control of shared files can pose an even more significant problem for simple attachment-based file sharing. After sending a version of a file to a colleague via e-mail attachment, a file originator or author loses control of edits made to that version by the colleague. Implementing such edits in the "official" version of the file requires the file originator to overwrite the original file with an edited version sent back to the originator via another e-mail attachment. Implementing edits made by multiple colleagues requires the originator to merge edits manually.
International Patent Application No. WO 00/60503 of Serbinis et al. discloses a document-management system in which a file originator uploads it to a document-management system store and lists users authorized to access the document. But even with the disclosure of Serbinis, there remains a need to more seamlessly integrate document management with e-mail systems, to promote convenience and help discourage users from falling back on the familiar but inefficient system of sending files by attachment. Better e-mail/document integration would provide the convenience and familiar interface of sending files as attachments while maintaining the benefits of network access to shared files.


In a device for biological fluid treatment, fluid is led along surfaces coated with microorganisms, which form parts of disks drivable about a rotation axis. The surfaces are formed by recesses lying in the disks and the disks are arranged to one another such that the leading of the fluid is effected through the recesses, and a recess of one disk is delimited in a channel-forming manner by the adjacent other disk movable relative to this.

1. Field of the Invention
The invention relates to a device for biological fluid treatment, i.e., waste water treatment, in which a fluid to be treated is led along surfaces coated with microorganisms.
2. Description of the Prior Art
Biological cleaning stages which function aerobically or anaerobically are applied in particular when treating waste-water. With this it is the case of so-called substrate biologies, i.e. of microorganisms with are fixed on a substrate material with a large surface, along which the fluid to be treated is led. Such a method is known for example from EP 0 470 931 A2.
One problem with this surface coated with microorganisms is the fact that the surface activity changes with a growing layer thickness, since with an increasing layer thickness, the microorganisms lying at the bottom are more poorly supplied, and thus may not take part so actively in the process. The excess microorganisms therefore need to be removed from the surfaces at regular intervals and the sludge which settles from this needs to be led away, which is usually effected by back-rinsing or by way of a scraper. Such scraper devices are known for example from GB 1418348 A and DE 44 41 866 A1.
A further problem with closed reactors with which the fluid is led in channels and with which the mostly filigree channel walling serves as adhering surfaces for the microorganisms lies in the fact that the channels clog with an increasing layer thickness of the microorganisms, and a through-flow occurs only with an increased resistance, by which means the activity likewise reduces. In contrast to this, with open reactors as for example are known from U.S. Pat. No. 3,466,241 A1 or U.S. Pat. No. 4,157,303 A1, the fluid flow is led past stacks of disks which form a comparatively large surface for carrying the microorganisms, which however are comparatively poorly used due to the fact that the disks are only partly immersed in the waste-water.


An exemplary method for locating sound sources is disclosed. The method includes the steps of: loading a sound source location program into a handheld device; activating the sound source location program; calculating a total voltage representing sound waves received by a microphone array via a waveform computation algorithm; calculating energy intensities of the total voltage according to the total voltage; and selecting a maximum energy intensity from the calculated energy intensities, and determining the location of the maximum energy intensity, the location of the maximum energy intensity is the location of the sound source. A related system is also disclosed.

1. Field of the Invention
The present invention generally relates to a system and method for locating sound sources.
2. Description of Related Art
Currently, sound source localization, in handheld devices, is enhanced by microphone arrays. Although, a microphone array in a handheld device is shown as one mouthpiece, in actuality, a number of microphones (sound receptors) are spaced apart and under the mouthpiece.
However, if the underlying microphones, of the mouthpiece, are too close together, the microphones may not be able to localize sound waves. Thus the microphones may pick up and enhanced background noise. That is, when sound waves are emitted from a plurality of directions simultaneously, the incoming locations of the sound waves from the respective sources cannot be determined. For example, when the mobile phone is being used in a crowded room, there are many voices from different persons, and the accurate locations of the pertinent voice cannot be determined.
Therefore, what is needed is a system and method for accurately locating sound sources so as to improve the receptive quality of sound waves.

System and method for locating sound sources


A control method utilizing a PID controller includes detecting the position of an object and obtaining the position deviation by comparison with a predetermined position value, detecting the vibration of the object and obtaining a vibration value, adjusting the control parameters of the PID controller by analyzing the position deviation, the vibration value, and a predetermined performance of the PID controller, and the PID controller responding to the adjusted control parameters.

1. Technical Field
The present disclosure generally relates to automatic control technology, and particularly to a control method and a device utilizing a PID controller, and a robot applying the device.
2. Description of the Related Art
A proportional-integral-derivation controller (PID controller) is a generic control loop feedback device widely used in industrial control systems, such as robot manipulator controlling systems. The popularity of PID controllers can be attributed partly to their robust performance in a wide range of operating conditions and partly to their functional simplicity, which allows engineers to operate them in a simple, straightforward manner.
A PID controller attempts to correct an error between a measured process variable and a desired setpoint by calculating and then outputting a corrective action that can adjust the process accordingly and rapidly, to keep the error minimal. The PID controller calculation (algorithm) involves three basic coefficients: the proportional (Kp), the integral (Ki) and derivative (Kd). The proportional value determines the reaction to the current error, the integral value determines the reaction based on the sum of recent errors, and the derivative value determines the reaction based on the rate at which the error has been changing. The weighted sum of these three actions is used to adjust the process via a control element such as the position of a control valve or the power supply of a driving element. By tuning the three coefficients in the PID controller algorithm, the controller can provide control actions designed for specific process requirements.
A commonly used method for adjusting the three coefficients of a PID controller is manual tuning. For example, when adjusting the PID controller applied by a robot manipulator, Kp is increased to shorten response time and minimize oscillation. However, too much Kp will cause instability, and the manipulator will vibrate intensely. Therefore Kp is adjusted to an optimize PID controller performance while manually controlling the vibration. After repeated manual tunings, an optimum Kp is obtained. However, this adjustment of the Kp wastes time and is dependent upon tester intuition and experience. Additionally, in the case of the same system, the reference variables and the reference values applied to a specific operation state are not applied optimally to another state of the same system.
Therefore, there is room for improvement within the art.

Device utilizing a PID controller, control method thereof, and robot utilizing the controller

Hong Fu Jin Precision Industry (ShenZhen) Co., Ltd.


A method for fabricating a stack capacitor with a hemi-spherical grain (HSG) structure is provided. A dielectric layer with a cave is first formed on a substrate. A conformal multi-layer amorphous silicon layer with low dopant concentration is formed over the substrate to cover the cave surface. An amorphous silicon layer with a sufficiently high dopant concentration is formed on the multi-layer amorphous silicon layer to fill the cave. After a planarization process, a remaining portion of the multi-layer amorphous silicon layer and the amorphous silicon layer form a storage node to fill the cave. The dielectric layer is removed to expose the storage node. A HSG is formed on the exposed surface of the storage node. An annealing process is performed to obtain a uniform dopant concentration. A dielectric thin film is formed over the storage node and the HSG layer. An upper electrode is formed to accomplish the stack capacitor.

1. Field of the Invention
This invention relates to semiconductor fabrication, and more particularly to a method for fabricating a stack capacitor with a hemi-spherical grain (HSG) structure.
2. Description of Related Art
A semiconductor memory, such as a dynamic random access memory (DRAM), typically includes a transistor and a capacitor. Quality of a memory does strongly depend on performance of both the transistor and the capacitor. Intentions to improve the semiconductor memory are concentrated on how to improve abilities of the transistor and the capacitor.
As semiconductor fabrication technology achieves a deep sub-micron level, device dimension is greatly reduced. For a memory structure, as the structure dimension is reduced, it means that the capacitor dimension is also reduced, causing a smaller capacitance. On the other hand, since the computer application software size also increases a lot, it needs to be supported by a large number of memory cells. It becomes a trend to reduce the memory dimension to satisfy the need of software. In this situation, it is a challenge to fabricate a greatly reduced memory dimension with sufficient capacitance.
Currently, there are two main considering points to improve capacitance with reduced dimension. One is using a dielectric material with high dielectric constant K, and the other one is increasing the capacitor surface. The dielectric material with high dielectric constant includes, for example, tantalum oxide (Ta.sub.2 O.sub.5) with K about equal to 25 or Barium titanate (BaTiO.sub.3) with K even as high as about 1000.
About the solution of increasing the capacitor surface, there are also two main methods. One is called a deep-trench type and the other one is called a stack type. The deep-trench capacitor typically includes a trench with a depth of about 6-7 microns. After filling the deep trench with a dielectric material, a deep-trench capacitor is formed. The deep-trench capacitor can have a large capacitance but it is difficult to be formed. The deep-trench capacitor may be a main trend in the future but not now.
The stack-type capacitor is the main type for the current fabrication trend. Since the stack-type capacitor still has its advantages, semiconductor manufacturers, such as NEC company in Japan or Sumsung company in Korea, have made a lot of efforts to develop a memory device with few mega bits of memory cells at a fabrication level less than 0.25 microns. In this manner, the HSG technology is one of the main technologies being used.
FIGS. 1A-1C are cross-sectional views, schematically illustrating a conventional fabrication process to form a stack capacitor.
In FIG. 1A, an amorphous silicon layer 102 formed over a substrate 100. The substrate 100 includes a semiconductor substrate 101, an oxide layer 104 on the semiconductor substrate 101, and a conductive plug 104 in the substrate 100 serving as a lower electrode of a capacitor. The conductive plug 104, for example, is a Si plug 104.
The amorphous silicon layer 102 is formed by low pressure chemical vapor deposition (LPCVD) at a temperature of 520.degree. C. for 13 hours so as to obtain a thickness of 6000 angstroms. During the formation of the amorphous silicon layer 102, phosphorous ions are in-situ doped. The dopant concentration is about 2.times.10.sup.20 atoms/cm.sup.3.
In FIG. 1B, the amorphous silicon layer 102 is patterned to form a storage node 102a, which is a remaining portion of the amorphous silicon layer 102 covering the Si plug 14. A HSG layer 108 is formed over an exposed surface of the storage node 102a. The formation of the HSG layer 108 includes performing a seeding process at an ultra high vacuum environment with silane (SiH.sub.4) gas. A large number of HSG crystal nuclei are formed on the exposed surface of the storage node 102a. Then, still at the high vacuum environment, a thermal process is performed so as to allow the silicon atoms of the storage node 102a to be migrated to the HSG nuclei. As a result, the HSG layer 108 is formed on the exposed surface of the storage node 102a. The HSG layer produces more charge storage surface.
In FIG. 1C, a capacitor dielectric layer 110 conformal to the surface of the storage node 102a and the HSG layer 108 is formed by LPCVD. The capacitor dielectric layer 110 includes silicon oxide or a structure of silicon-oxide/silicon-nitride/silicon-oxide (O/N/O). A conductive layer 112 serving as an upper electrode of the capacitor is formed to cover the capacitor dielectric layer 110.
In this conventional method, it take long to form the amorphous silicon layer 102. The throughput is strongly affected. The amorphous silicon layer 102 may also be easily converted to a polysilicon structure, causing difficulty to form the HSG layer 108.
Moreover, since the dopant concentration in the amorphous silicon layer 102 is not sufficiently large, an undoped silicon film may often form on the surface of the HSG layer 108 while the HSG layer is formed. The undoped silicon film causes a capacitance depletion effect. Usually, the capacitance is degraded by about 15% if the undoped silicon film occurs.
Even though the capacitance depletion effect can be reduced by increasing the dopant concentration in the storage node 108, the silicon atom migration performance is degraded. It becomes more difficult to form the HSG layer.

Method for fabricating a stack capacitor

Worldwide Semiconductor Manufacturing Corp.


A detection apparatus for light-emitting diode chips comprises a transparent chuck with the light-concentration capability, a probing device and a light-sensing device. The transparent chuck comprises a light-incident plane and a light-emitting plane. The light-incident plane is used to bear a plurality of light-emitting diode chips under detection. The probing device comprises two probe pins and a power supply. The two ends of each probe pin is electrically connected to one of the light-emitting diode chips and the power supply, respectively, to make the light-emitting diode chip emit a plurality of light beams. The light beams penetrate through the transparent chuck by emitting into the incident plane of the transparent chuck. The light-sensing device is disposed on one side of the light-emitting plane of the transparent chuck to receive the light beams which penetrate through the transparent chuck.

1. Field of the Invention
The present invention relates to a detection apparatus, and particularly, a detection apparatus for detecting the light-emitting diode chips.
2. Description of the Related Art
Due to the technology improvements and the elevation of life quality, modern people pay more and more attention to illumination. From the ancient illumination measures of burning material, such as fire torches, oil lamps, candles, and kerosene lamps, using electricity, such as incandescent lamps and fluorescent lamps, to the light-emitting diode (LED), it all shows that illumination plays an important role in people's ordinary life.
Due to the combination of electrons and holes, light-emitting diode emits light to provide illumination or alerting. Compared with the traditional light sources, light-emitting diode has the advantages of high light-emitting efficiency, long service life, robust, fast response time, etc. In recent years thanks to the great promotion of governments and the increasing scale of the light-emitting diode street lamps in cities, using light-emitting diode as the illumination source is available everywhere.
Normally, a probe detector is used to detect the light-emitting efficiency of a light-emitting diode chip. A probe detector provides an electric voltage as the light-emitting power source of a light-emitting diode chip through probe pins. The light emitted by the light-emitting diode chip penetrates through the chuck which supports the light-emitting diode chip and is gathered by the light-sensing device of the probe detector to determine the light-emitting efficiency of the light-emitting diode chip. However, the limited detection range of the light-sensing device to the light emitted by a light-emitting diode chip can influence the accuracy of detecting the light-emitting efficiency of the light-emitting diode chip.

Detection apparatus for light-emitting diode chips having a light sensing device receiving light beams penetrated through a transparent chuck


A segmented ring forms a set of latches for a tendon top connector on a floating platform. The latches reside in a housing and have either a groove or thread profile on an upper internal surface. The grooves interface with a mating groove profile on the tendon. The latches rotationally pivot backward and forward from the outer portion of the bottom surface. When the latches are forward, the profile in the internal surface engages the mating profile of the tendon top joint. When the latches are swung out, these profiles clear and permit the top joint to pass through the connector. Retraction of the latches is provided by application of force on the inside surface of an annular extension on the outer portion of the latches. This force can be provided by a variety of actuators. This top connector allows for passive dynamic engagement of the connector to the tendon top joint. When the latches are permitted to move inward, contact is made with the mating profile on the tendon top joint. Downward movement of the tendon relative to the connector causes the passing profile of the top joint to engage the profile of the latches and engage the latches into the top joint. Upward movement of the tendon relative to the connector causes the latches to be pivoted out of the way, allowing the top joint to pass through the connector unrestricted.

The concept described in this disclosure is primarily used for connection of a mooring tendon to the hull of a tension leg platform. However, this concept also has use for attachment of drilling or production risers of any type of floating platform (TLP, Spar, etc.) to the riser tensioning or support system on the platform. Both of these systems must make an attachment of a top tubular member to the platform support structure and provide for adjustment in overall length of the tendon or riser.
Previous systems have typically made use of some form of slip segments that had a threaded or grooved interface to the top joint of the tendon. These slip segments typically slide down the taper, or slide and rotate in combination to engage the tendon top section. These systems have used either elaborate internal drive systems and/or actuation tools to engage and disengage the connector on and off of the tendon top joint. In addition, these systems have either required the tendon to be statically restrained or substantially over-tensioned and then relieved for engagement.


A dye and a heat transfer sheet for use in a heat transfer printing method employing a sublimable dye, capable of producing an image which has a sufficiently high density and is excellent in sharpness, fastness properties and, in particular, resistance to light are provided. The dye has the following formula (I): ##STR1## The heat transfer sheet includes a substrate sheet, and a dye layer including the dye having formula (I), provided on one surface of the substrate sheet.

Heretofore, a variety of heat transfer printing methods have been known. Of these methods, a sublimation-type heat transfer printing method is now prevailing. In this method, a heat transfer sheet comprising as a coloring agent (printing agent) a sublimable dye which is retained by a substrate sheet such as paper is superposed on a heat transfer image-receiving sheet such as polyester woven cloth which can be dyed with the sublimable dye, and thermal energy is applied imagewise to the back surface of the heat transfer sheet to transfer the sublimable dye to the heat transfer image-receiving sheet, thereby producing an image on the image-receiving sheet.
Recently, there has been proposed a heat transfer printing method of the sublimation type, capable of producing various full-colored images on an image-receiving sheet such as a sheet of paper or a plastic film. In this method, a thermal head of a printer is employed as a heat application means, and a large number of dots in three or four colors are transferred to the image-receiving sheet in an extremely short heat application time. A full-colored image can thus be successfully reproduced on the image-receiving sheet.
The image thus obtained is very sharp and excellent in transparency because a dye is used as a coloring agent. Therefore, the heat transfer printing method of this type can produce an excellent half-tone image with continuous gradation, comparable to an image obtained by offset printing or gravure printing. Moreover, the quality of the image is as high as that of a full-colored photograph.
However, the image produced by the above heat transfer printing method is poor in both color density (image density) and resistance to light. This is a serious problem in this method.
To conduct high-speed printing, it is required that thermal energy be applied to the heat transfer sheet in an extremely short time of several seconds or less. However, both the sublimable dye contained in the heat transfer sheet and the heat transfer image-receiving sheet are not thoroughly heated within such a short heat application time. The resulting image, therefore, cannot have a sufficiently high density.
A sublimable dye which is excellent in sublimation ability has been developed in order to successfully conduct high-speed printing. In general, however, a highly sublimable dye has a low molecular weight. Fro this reason, an image produced on an image-receiving sheet using such a dye is poor in resistance to light, and the color of the image fades easily.
To solve the above problem, a sublimable dye having a relatively high molecular weight may be employed. Such a sublimable dye, however, cannot sublime instantly when heat is applied thereto, so that an image having a satisfactorily high density cannot be obtained by the above high-speed printing method.
Accordingly, an object of the present invention is to provide a dye and a heat transfer sheet for use in a heat transfer printing method employing a sublimable dye, capable of producing an image which has a sufficiently high density and is excellent in sharpness, fastness properties, and, in particular, resistance to light.


A carrier for an optoelectronic component includes a main body, wherein the main body includes a first electrically conductive heating layer arrangement, a first solder layer for soldering an optoelectronic component to the main body is arranged on a first side of the main body, the first electrically conductive heating layer arrangement is electrically insulated from the first solder layer and thermally connected to the first solder layer, and the first heating layer arrangement has an exposed portion on which molten solder of the first solder layer can flow to reduce an electrical resistance of the first heating layer arrangement.

Optoelectronic components are usually soldered onto a carrier. Usually, the component and/or the carrier has a solder layer that has to be heated for soldering purposes. The thermal energy required is provided by a gripping tool or heating plate, for example.
There is thus a need to provide an efficient concept that facilitates efficient soldering of an optoelectronic component onto a main body of a carrier.

Carrier for an optoelectronic component, method of producing a carrier for an optoelectronic component, wafer and soldering method


A circuit for amplifying an input voltage (VIN) into an output voltage (VOUT) with an overall gain factor, which is a product of a first gain factor (S) and a second gain factor (R1), comprises means for generating an intermediate signal (I2) from the input voltage (VIN) and the first gain factor (S) and means for generating the output voltage (VOUT) from the intermediate signal (I2) and the second gain factor (R1). The first gain factor (S) and the second gain factor (R1) have opposite temperature dependencies.

Amplifier circuits often have the problem that they contain temperature-dependent components, the consequence of which is that the output signals of the amplifier circuit are likewise a function of the operating temperature.
FIG. 1 shows a schematic circuit diagram of an amplifier circuit based on CMOS (Complementary Metal Oxide Semiconductor) technology. The amplifier circuit contains a transconductance amplifier OTA, which converts an input voltage VIN into a current I2. The current I2 is converted into an output voltage VOUT by an operational amplifier OPA, which is connected up with a resistor R1 as a current-voltage converter CVC.
In addition to high-impedance inputs 1 and 2, the transconductance amplifier OTA also has a high-impedance output 3. The transconductance amplifier OTA therefore behaves like a current source so that the current I2 that can be coupled out at the output 3 is controlled by the input voltage VIN in accordance with the following equation (1):I2=S*VIN,  (1)where S denotes the transconductance of the transconductance amplifier OTA and is given by the differential of the current I2 with respect to the input voltage VIN at the operating point.
Within the transconductance amplifier OTA, the latter has a differential amplifier stage comprising a current source IREF and also transistors T1 and T2. The input voltage VIN is present at the gate terminals of the transistors T1 and T2. Furthermore, the transconductance amplifier OTA comprises three current mirrors constructed with transistors T3 and T4, T5 and T6, and T7 and T8. The transistors T1, T2, T7 and T8 are n-channel MOSFETs, while the transistors T3, T4, T5 and T6 are p-channel MOSFETs.
The current I2 is converted into the output voltage VOUT by the operational amplifier OPA by means of the resistor R1 in accordance with the following equation (2):VOUT=R1*I2+VCM,  (2)where VCM specifies the center voltage. A combination of equations (1) and (2) yields equation (3) as the transfer function of the present amplifier circuit:VOUT=S*R1*VIN+VCM,  (3)where the product of the transconductance S and the resistance R1 specifies the gain factor of the amplifier circuit.
In CMOS fabrication processes, linear resistors are often produced by deposition of polysilicon material. The temperature coefficient of such resistors which specifies the change in resistance with temperature, is correlated with the resistance per unit area of the polysilicon. In the case of only small resistances per unit area, the temperature coefficient is positive. The temperature coefficient decreases as the resistance per unit area rises and becomes negative for large resistances per unit area.
In the case of the present amplifier circuit, the resistor R1 must have a high resistance. Otherwise, the transconductance S of the transconductance amplifier OTA would have to be large in order nonetheless to obtain an acceptable gain factor of the amplifier circuit. However, this would in turn entail an unacceptably large current consumption of the transconductance amplifier OTA.
A high-value resistor R1 is fabricated by means of polysilicon with a high resistance per unit area in CMOS technology in order to avoid an excessively large area consumption. What is disadvantageous about this, however, is the resulting negative temperature coefficient of the resistor R1. Since the transconductance S of the transconductance amplifier OTA likewise decreases as the temperature rises the gain factor of the present amplifier circuit is greatly temperature-dependent. This property of the amplifier circuit is particularly disadvantageous if the amplifier circuit is operated in a wide temperature range. Moreover, fabrication tolerances of the high-value resistor R1 also influence the gain factor.
The present amplifier circuit is also utilized to amplify AC voltages. The open-circuit frequency of the amplifier circuit likewise depends on the gain factor. In the case of a gain factor that is unstable over a certain temperature range, this leads to stability problems in the amplifier circuit.
Previous solutions to the abovementioned problems comprise the use of a resistor R1 with only a small temperature coefficient and low fabrication tolerances and also the use of a temperature-independent current source IREF, thus resulting in only a low temperature-dependent transconductance S of the transconductance amplifier OTA. Although the temperature dependence of the gain factor is minimized by this solution approach, the area of the circuit becomes large because it is necessary to use polysilicon resistors with a low resistivity, or else it is necessary to produce temperature-stable high-value resistors by means of additional process steps. Both measures are complicated and cost-intensive.
In a further solution approach, in contrast to the solution approach just described, the temperature independence of the current source IREF is dispensed with and only a resistor R1 with a small temperature coefficient and low fabrication tolerances is used. However, the amplifier circuit is permitted to be operated only in a relatively small temperature range in this case.


A method for performing rotational speed synchronisation of a first transmission component having a first initial rotational speed with a second transmission component having a second initial rotational speed, so that they rotate with the same final rotational speed during a gear switch from an initial driving gear to a final driving gear in a stepped gear transmission for a hybrid electric or electric drive train having an electric traction motor. The method including calculating a total frictional work resulting from performing the total rotational speed synchronisation by means of a mechanical synchroniser of the stepped gear transmission only, and if the calculated total frictional work exceeds a maximal frictional work of the mechanical synchroniser, performing the rotational speed synchronisation by means of both the electric traction motor and the mechanical synchroniser.

Drive trains for hybrid electric vehicles or pure electric vehicles comprising an automatic stepped gear transmission and an electric traction motor, may depending on the circumstances and/or the specific transmission design be required to perform torque interrupt gear shifts, because a mechanical synchroniser of the transmission must disengage from the previous gear, synchronise with the next gear and subsequently engage and become rotatably connected with the next gear, and no traction torque can be transmitted to the driving wheels during these activities.
Furthermore, the electric traction motor that is drivingly connected to a shaft of the drive train has a relatively large moment of inertia compared with gears and shafts of a conventional transmission of a non-electric drive train. The relatively large inertia of the electric traction motor typically results in increased gear shift time of the transmission in order to preserve the mechanical synchroniser life, but long gear shift time result in in distinct torque interrupt shifts which is an undesirable gear shifting behaviour. Long gear shift times degrade the drivability of a vehicle having such a drive train, since gear shifts at least in electric mode are torque interrupt shifts.
There is thus in the field of hybrid electric vehicles or pure electric vehicles comprising an automatic stepped gear transmission and an electric traction motor, an increasing demand for improved drivability.
Document DE 10 2010 035 776 A1, which comprises a drive train with an automatic stepped transmission and an electric traction motor, discloses a gear shift method that aims at reducing the load on the mechanical synchroniser.
Despite the activities in the field, there is a demand for an improved drivability of the drive trains for hybrid electric vehicles or pure electric vehicles comprising an automatic stepped gear transmission and an electric traction motor.

Method for synchronisation of a first transmission component

NINGBO GEELY AUTOMOBILE RESEARCH & DEVELOPMENT CO., LTD.


In certain embodiments, transaction-subset-assignment of computer processing nodes may be facilitated to perform collateral allocation. In some embodiments, a query may be performed to obtain a set of transactions. Computer processing nodes may be selected from a set of available nodes for performing collateral allocations. Collateral allocation rules associated with a lender may be obtained, and each of the computer processing nodes may be caused to perform collateral allocations for one subset of the transaction set in accordance with the collateral allocation rules by assigning transactions of the transaction set respectively to the computer processing nodes such that the computer processing nodes collectively perform collateral allocations for the transaction set. In some embodiments, each of the computer processing nodes may be configured to transmit parameter updates to be provided to the other computer processing nodes and perform its respective collateral allocation based on the other computer processing nodes' parameter updates.

With the advent of computers, collateral allocation computer systems to automate the management of numerous collateral assets have proliferated. As the amount of collateral assets and the complexity of given transactions grow, however, typical allocation systems face frequent processing delays related to collateral allocations. Among other things, what is needed is a computer-implemented system and method that simplifies and improves the allocations of collateral associated with Tri-Party Repos.

System and method for optimizing collateral management