An electrical series terminal having a terminal housing, conductor connector elements, and current bars, the current bars each having a connector section and a first contact section, the connector sections being assigned to a conductor connector element and the first contact sections together forming a resilient contact region to receive the plug of the test or power plug. A switchable transverse bridge is producible by each current bar having a second contact section, two further current bar pieces being arranged in the terminal housing, and a recess being formed in a current bar piece for insertion of a branch of a jumper. A current bar piece is assigned to a respective current bar so that the second contact section of a current bar is connected to the assigned current bar piece when no plug is inserted and is spaced from the assigned current bar piece when a plug is inserted.

1. Field of the Invention
The invention relates to an electrical modular terminal, especially for connection of a current transformer, with a terminal housing, with at least two conductor connector elements which are located in the latter, and with at least two current bars, the current bars each having a connector section and a first contact section, the connector sections being assigned to a respective conductor connector element and the first contact sections together forming an elastic contact zone for accommodating the plug of a test plug or power plug, the first contact sections being spaced apart from one another and only with the plug inserted being connected to one another in an electrically conductive manner via the plug. In addition, the invention relates to a modular terminal block formed of at least two electrical modular terminals which are located next to one another and of at least one plug-in jumper which has at least two legs.
2. Description of Related Art
Electrical modular terminals have been known for decades and are used in the millions in wiring of electrical systems and devices. The terminals are often locked onto mounting rails which for their part can be located in a plurality in a switchgear cabinet. In addition, the modular terminals can, however, also be attached alone or in general severally as a modular terminal block in a wall opening, especially in an opening in a switchgear cabinet wall. This has the advantage that one side of the terminals, the operator side, is accessible from outside the switchgear cabinet without the switchgear cabinet having to be opened and only the other side of the terminal, the connecting side, is accessible only when the switchgear cabinet has been opened.
Conductor connector elements in modular terminals are predominantly screw terminals or tension spring terminals. The terminal principle for tension spring terminals is similar to that of the screw technology. While in a screw terminal a tension sleeve draws the conductor against the current bar by the actuation of the terminal screw, in the tension spring terminal this task is assumed by the tension spring. In addition however insulation piercing connecting terminals or leg spring terminals can also be used.
Electrical terminals are generally connecting terminals so that they have at least two conductor connector elements which are electrically connected to one another via an electrically conductive connecting bar, the current bar. In addition to this basic type of modular terminal which is often also called a feed-through terminal, there are a plurality of different modular terminal types which are specially matched to the respective applications (compare, Phoenix Contact Catalog Modular Terminals CLIPLINE 2011, pages 2-11). Examples are protective conductor terminals, isolating blade terminals and installation terminals.
In switching, measuring and control technology feed-through terminals with a disconnect possibility are the standard. The disconnection possibility which is implemented in the electrical modular terminal, i.e., the disconnect provided in the current bar makes it possible to insert different plugs with different function into the terminal housing of the modular terminal which then make contact with the current bar at the disconnect. In addition to simple disconnect plugs or through connectors, plugs can also be especially test plugs which can have special components and which enable testing of proper operation of the circuit which is connected to the modular terminal. Since the electrical modular terminals are generally made disk-shaped, they are generally mated to several other electrical modular terminals into a modular terminal block. A number of test plugs which corresponds to the number of modular terminals can then be plugged into such a modular terminal block.
German Patent 10 2005 025 108 B3 discloses a device for testing of a protective, measuring or counting apparatus, for example, a protective line relay of a high voltage or medium voltage system, which has a pole strip which can be connected to the electrical apparatus with several successively arranged pole openings and one plug block with a number of pole tongues which corresponds to the number of pole openings. An individual pole strip module of the pole strip consists of a housing in which there are two insert contacts for connecting the lines and spring-loaded contact clips which are connected to the insert contacts. The two contact clips can make contact with the pole tongue of a plug, the pole tongue of the plug having two pole segments which are separated from one another by an insulating segment. The insulating segment together with the corresponding pole opening in the pole strip module forms a polarization which ensures that only one plug with a certain pole tongue can be inserted into a certain pole opening of a pole strip.
In the state of the plug or the pole tongue not inserted into the pole strip, the two contact clips make contact with one another so that the two insert contacts are electrically connected to one another in an electrically conductive manner and a current can flow via a connected pole strip. If the plug with its pole tongue has been pushed completely into the pole opening, the two contact clips are electrically isolated from one another and the current flow is routed via the plug so that a test process can be carried out.
German Patent Application DE 10 2006 052 894 A1 and corresponding U.S. Pat. No. 7,666,037 B2 discloses a modular terminal, a test plug and a test terminal block consisting of a plurality of modular terminals located next to one another and a corresponding number of test plugs, the individual modular terminals and the individual test plugs being similar in basic principle to the pole strip modules and pole plugs known from DE 10 2005 025 108 B3.
In order to ensure reliable and defined contact states when the test plug is plugged into the test opening, in this known electrical modular terminal, the current bars are made such that they form two contact zones which are located in succession in the insertion direction of the contact plug of a test plug. Forming a defined second contact zone which is located in the insertion direction of the contact plug upstream of the first contact zone ensures that when the contact plug is inserted first a reliable electrical connection between the contact plug and the two current bars takes place before the first contact zone is opened as the contact plug continues to be inserted, as a result of which the two current bars are then electrically isolated from one another.
It is common to the above described known modular terminals or test terminal blocks that the two current bars make contact with one another so that the conductor connector elements are connected to one another in an electrically conductive manner if a plug is not plugged into the modular terminal. Conversely, if a plug is (completely) plugged into the modular terminal, the contact zone is interrupted so that the conductor connector elements are also electrically isolated from one another.
In addition to these modular terminals or test terminal blocks, test isolation blocks are also known, especially those from the Russian company Cheaz in which the elastic contact sections of the current bars which together form an elastic contact zone are spaced apart from one another and are only connected to one another in an electrically conductive manner when a plug of a power plug or test plug is plugged into the contact zone. The electrically conductive connection between the contact sections or between the current bars takes place via the inserted plug which for this purpose has two interconnected contact sections which make contact with the contact sections of the current bars when the plug has been plugged in.
In these test isolation blocks which are common especially in Eastern Europe and Russia, the conductor connector elements which are assigned to one another are only connected to one another in an electrically conductive manner when a corresponding power plug is plugged into the modular terminal or into the terminal block. These modular terminals or terminal blocks are used especially for connection of current transformers. One important functional feature consists in that the power transformers are shorted as soon as the test plug or the power plug is pulled out of the modular terminal or the terminal block.
For this purpose, in the known test isolation blocks, there are jumper plugs via which at least two adjacent current bars are connected to one another in an electrically conductive manner so that the assigned conductor connector elements are short-circuited. In this way, then the current transformers which are connected to the conductor connector elements are also short-circuited. The jumper plugs are located between the contact sections of the current bars, which sections are opposite one another, such that they make contact with one contact section of a current bar when a plug has not been plugged in. If a test plug or power plug is plugged into the electrical modular terminal or into a test terminal block, the contact sections of two current bars, which sections are opposite one another, are forced somewhat apart. This leads first of all to the contact sections being connected to one another via the electrically conductive plug. Moreover, the insertion of the plug into the contact zone however also leads to the connection between the contact section and one leg of the jumper plug being interrupted since the elastic contact section is forced away from the rigidly arranged jumper plugs by inserting the plug.
In the test terminal blocks which are known from the prior art, an electrically conductive connection between adjacent contact sections or current bars is thus ensured by the jumper plugs. This transverse bridging is automatically interrupted when a test plug or power plug is plugged in, at the same time the contact sections which are assigned to one another being electrically connected to one another in an electrically conductive manner via the plug.
Although these test isolation blocks have proven themselves in practice for decades, they also have some disadvantages. The disadvantages consist especially in that the structure and the mounting of the test isolation blocks are relatively involved. In particular, the mounting of the jumper plugs on the bottom of the housing of the test terminal block is relatively laborious, since the elastic contact zones must be deflected against their spring force for this purpose. At the same time, the jumper plugs must be fastened with a screw to the bottom of the housing, to ensure that the contact sections which have made contact with the jumper plug are deflected equally so far that equally good contact between the jumper plug and the contact sections is also ensured later. Finally there is the risk that the elastic current bars which are held only by a threaded rod will twist in the mounting of the jumper plugs; this can likewise have an adverse effect on the electrical contact between the contact section and the jumper plug.

Electrical modular terminal and modular terminal block


A system displays a graphical element in a graphical user interface, and receives a command to display the at least one graphical sub-element associated with the graphical element. The system replaces the display of the graphical element with a display of at least one graphical sub-element associated with the graphical element, and implements the graphical sub-element such that execution of the graphical element invokes execution of the graphical sub-element associated with the graphical element.

Conventional computerized devices, such as personal computers, laptop computers, and the like utilize graphical user interface in applications, such as operating systems, and graphical editors (i.e., web page editors, document editors, etc.) that enable users to quickly provide input and create documents and/or projects using "What You See Is What You Get" (WYSIWYG) technology. In general, using a graphical user interface, a user operates an input device such as a mouse or keyboard to manipulate graphical objects on a computer display. The graphical objects are often represented as icons, and the user can operate an input device such as a mouse to move a mouse pointer onto an icon (i.e., graphically overlapping the icon) on the graphical user interface. By depressing a mouse button, the application (such as the operating system desktop) selects the icon, and if the user maintains the mouse button in a depressed state, the user can drag the icon across the graphical user interface. By releasing the mouse button, the icon is placed on the graphical user interface at the current position of the mouse pointer.
Using graphical user interface technology, users can create and update documents (i.e., web pages, brochures, etc) and/or projects, such as a storyboard, by dragging and dropping graphical objects (i.e., text, text boxes, images, etc) into the document and/or project. A storyboard is a digital visual overview of a sequence of events, where each event is an element in the storyboard, usually represented by a thumbnail image or icon. There may be different visual items in the storyboard to represent different types of elements. Each type of element is identically sized regardless of the length of time of the entry (unlike a timeline where the physical size denotes length of time). This is usually used when creating a video or a slideshow, but can be used to for other purposes as well, such as planning a process. Sub-elements (such as timelines, videos, additional information about the element, etc) can be attached to an element in the storyboard, and invoked during execution of the storyboard. For example, a sub-element, such as a video, can be attached to an element, such as a thumbnail image. During execution of the storyboard, when the sequence of events reaches the element (i.e., the thumbnail image), the video (i.e., the sub-element attached to the element) is played. It is this association of sub-elements to elements in the storyboard that work together to create a more interesting tale for the storyboard.

This patent is subject to a terminal disclaimer.

Methods and apparatus for graphical object implementation


A synchronous semiconductor device being operated in synchronism with an external clock signal includes an internal clock controller and an internal clock generator. The internal clock controller is responsive to an externally applied signal indicative of a beginning of an operation and generates an internal control signal in synchronism with the external clock signal. The internal control signal is only activated for a predetermined time interval long enough to carry out the operation. The internal clock generator serves to generate an internal clock signal synchronized with the external clock signal while the internal control signal is activated. An internal buffer circuit is operated in synchronism with the internal clock signal. Accordingly, power consumption can be reduced while in a standby mode.

Recently, low-power circuit design is attracting a great deal of attention because of the rapidly emerging battery-powered portable electronic devices, such as notebook computers, mobile telephones, personal digital assistants (PDAs), etc. Since these portable devices are primarily in a standby mode (sometimes called a "sleep mode"), wherein they are powered but not operating, it is very important to make efforts to reduce their power consumption while in the standby mode as well as while in their various operating modes. Because semiconductor devices are frequently in the standby mode, standby mode power consumption of a semiconductor device is at least important than its operating power consumption.
Even as their operating frequencies have been increasing due to the rapid development of semiconductor fabrication technologies, there have been various attempts to lower the power consumption of semiconductor devices. Generally, in a standby mode of a semiconductor device, all components except for the input buffers (such as clock buffers and data input buffers) stop operating. Therefore, in order to reduce overall device power consumption, the power consumption of the input buffers must be taken into consideration.
FIG. 1 shows a conventional internal clock generation circuit for a synchronous semiconductor device according to the prior art. Referring to FIG. 1, the internal clock generation circuit includes a clock buffer 10 which drives a considerable amount of load. An external clock signal ECLK is simply converted into internal clock signals ICLK0-ICLKn by way of the clock buffer 10. The internal clock signals ICLK0-ICLKn are delivered to a control block 20, a data input buffer 30, a data output buffer 40, an echo clock output buffer 50, and other buffers 60, respectively. These internal buffer circuits are supplied with the internal clock signals ICLK0-ICLKn only when the external clock signal ECLK is applied to the clock buffer 10.
Unfortunately, in a synchronous semiconductor device using this internal clock generation circuit, it is impossible to operate the data input buffer 30, which is used to receive commands for switching the standby mode over to the operating mode, without the external clock signal ECLK. Therefore, the data input buffer 30 is supplied with an internal clock signal ICLK1 during the standby mode. Furthermore, the external clock signal ECLK must be supplied to the clock buffer 10 even in its standby mode. Accordingly, in this prior art internal clock generation circuit, each of the internal buffer circuits, including the data input buffer 30, is clocked during the standby mode. This presents a significant limitation on the ability to reduce power consumption in the standby mode. The industry is therefore in need of a synchronous semiconductor device having an internal clock generation circuit which operates with reduced power consumption while in a standby mode.

Internal clock generation circuit for synchronous semiconductor device


A focused electron-bombarded (FEB) ion detector comprising an MCP, focusing means, and a collection anode disposed in a detector body. The collection anode includes a diode for receiving the focused output electron beam from the MCP. The gain between the input ion current to the MCP and the detector output signal from the diode is on the order of 1-100 million, depending on the device configuration and applied biasing voltages.

This invention relates to focused, electron-bombarded (FEB) detectors, particularly to FEB ion detectors.
Ion detectors are used to measure charged particle flux or current in a vacuum. When used in mass spectrometers, for example, ion detectors measure the flux of charged particles moving through an orthogonal magnetic field of a predetermined magnitude and bending according to their charge to mass ratios. Other applications include scanning electron microscopy; UV and X-ray spectroscopy; E-beam/X-ray lithography; field ion microscopy; and charged particle/photon imaging. Prior art mass spectrometers and other devices use channeltrons or stacks of microchannel plates (MCPs) as ion detectors.
A channeltron or channel multiplier is based on the continuous dynode electron multiplier concept first suggested by P. T. Farnsworth in U.S. Pat. No. 1,969,399. The channel multiplier consists of a hollow tube coated on the interior surface by a secondary electron emitting semiconductor layer. This layer emits secondary electrons in response to bombardment by electromagnetic radiation or particles such as electrons. Input and output electrodes are provided on each end of the tube to create a bias voltage which accelerates the emitted secondary electrons down the channel. Secondary electrons also strike the wall, releasing additional secondary electrons. The resulting amplification of the input photon or particle is called the device's gain.
MCPs operate on the same basic principles as channeltrons. A typical MCP is comprised of a million parallel channels 4-20 microns in diameter and 40-500 microns long. The channels are typically formed at a small angle of a few degrees relative to the normal MCP surface to ensure that ions generated at the tube anode cannot be accelerated down the channel but instead strike the channel wall near the back of the MCP. MCPs may be stacked to multiply the effect of their gains. When stacked, the channel angles of alternating plates are reversed, giving rise to the designation "Chevron" or "Z" stack.
One drawback of prior art ion detectors such as channeltrons and MCP stacks is their relatively large capacitance, which limits their bandwidth and response time. Another drawback of prior art ion detectors is their limited dynamic range. This second drawback is due, in part, to the high gains needed for certain applications. At high bias voltages, channeltrons and MCP stacks can become nonlinear in their output current responses to input currents.
Yet another drawback of current detectors is the need to operate the MCP stack or channeltron at high bias voltages. High bias voltages accelerate the degradation of the electron-emitting channel surfaces. In addition, operation of the devices under high biases requires the maintenance of a high vacuum to minimize the effect of ion feedback on the performance of the devices.
What is needed, therefore, is an ion detector that has increased dynamic range, bandwidth and shorter response time.


A latch circuit includes a voltage driven type data reading unit and a voltage driven type data holding unit, and operates based on a clock signal that is supplied from an outside source. The data reading unit reads both a first input data and a second input data, and outputs both a first output data and a second output data based on both the first input data and the second input data, while the data holding unit holds both the first output data and the second output data. Both the first input data and the second input data are differential signals, and both the first output data and the second output data are differential signals that have phases that are inverted.

1) Field of the Invention
The present invention relates to a latch circuit, a 4-phase clock generator, and a receiving circuit, and particularly to a latch circuit, a 4-phase clock generator, and a receiving circuit which are used in radio communication technique such as IQ receiving method using 4-phase clock signals that have phases that are shifted by 90 degree.
2) Description of the Related Art
Radio waves are used for various applications. Much demand of usage of radio waves causes the shortage of frequency resources, and many signals are thereby present in a remarkably small frequency range. When signals are in such a situation, the signals often come under the inference of interference with near-by frequency and jamming signal called image signal. Consequently, a new technique comes to be required to eliminate this influence. An IQ receiving method is one of such techniques. In this method, phases of clock signals are shifted by 90 degree and the clock signals are used to compensate for an interference component between a target main signal and a jamming signal. On the other hand, in the field of portable terminals, lower power consumption in devices or circuits has been strongly desired along with spread and enhancement of the portable terminal.
There have been disclosed several 4-phase clock generators that generate clock signals with phases shifted by 90 degree. Some 4-phase clock generators use a plurality of RC filters or CR filters called polyphase filter. Some use a fixed delay block, and others acquire an output from an appropriate node in the DLL circuit. These 4-phase clock generators are suitable for applications in a single frequency or narrow frequency range, however, are not suitable for applications in a remarkably large frequency setting range such as a receiving terminal of TV broadcasting.
Some 4-phase clock generators, used for applications in a large frequency range, use a feature that a phase in an intermediate node in the 2-frequency-divider circuit is shifted by 90 degree for a phase of the final output signal. The 2-frequency-divider circuit is generally realized by interconnecting two latch circuits or latch circuits, as disclosed in IEEE Journal of Solid State Circuit, Unite States, 1997, volume 32, No. 1, pp. 62-69, "New Single-Clock CMOS Latches and Flip-flop with Improved Speed and Power Saving" by Jiren Yuan et al. In some latch circuits, a bipolar transistor and a constant current source are combined. However, a disadvantage of such latch circuits is that this configuration causes a current to always flow, and is not suitable for application which requires low power consumption such as portable terminal.
Some latch circuits, called inverter type, do not use a constant current source. FIG. 1 is a circuit diagram of a conventional inverter-type latch circuit, and FIG. 2 is a schematic of output waveforms of the conventional latch circuit shown in FIG. 1. The conventional latch circuit 2200 includes an input-timing-control MOS transistor 2201, a first input transistor 2202, a second input transistor 2203, and a pair of CMOS inverter circuits 1704 and 1705. The input-timing-control MOS transistor 2201, the first input transistor 2202, and the second input transistor 2203 are MOS transistors.
When a clock signal CK is input into the data input-timing-control MOS transistor 2201 and the clock signal CK transits from a relatively low potential level (hereinafter, "L level") to a relatively high potential level (hereinafter, "H level"), if input data D of the first input transistor 2202 is at L level and input data DX of the second input transistor 2203 is at H level, output data Q of the second inverter circuit 1705, which is connected to the second input transistor 2203, gets to be at L level. The input data DX corresponds to inverted data of the data D.
At the same time, input data of the first inverter circuit 1704 connected to the first input transistor 2202 gets to be at L level, and therefore, output data QX of the first inverter circuit 1704 gets to be at H level. The output data QX corresponds to inverted data of the data Q. This state is maintained after the clock signal CK transits to L level until it transits to H level again.
When the clock signal CK transits to H level, the input data D is at H level and the input data DX is at L level, and therefore, the output data QX of the first inverter circuit 1704 gets to be at L level. At the same time, the input data of the second inverter circuit 1705 gets to be at L level, and therefore, the output data Q of the second inverter circuit 1705 gets to be at H level. This state is maintained until the clock signal CK transits from L level to H level next time.
However, the conventional latch circuit 2200 has some problems. In the conventional latch circuit 2200, the output data Q (or QX) of one inverter circuit 2204 (or 2205) transits from H level to L level, and then, the output data QX (or Q) transits from L level to H level due to the inverting operation of the other inverter circuit 1705 (or 1704). Therefore, as shown in FIG. 23, there is a time delay t between the timing of the transition from L level to H level and the timing of the transition from H level to L level. A problem is that a phase difference by one stage of inverter circuit in the latch circuit 2200 occurs between the output data Q and the output data QX. Further, another problem is that the duty ratios of the output data Q and QX are shifted from 50%, and fast operation or highly accurate phase generation is prevented.
There is still another problem. Even when such latch circuit 2200 is used to configure the 4-phase clock generator, it is difficult to accurately set the phase difference of the 4-phase clock signals at 90 degree, and unwanted components cannot be eliminated completely by the IQ receiving method. Consequently, the reception characteristics deteriorate.

Latch circuit, 4-phase clock generator, and receiving circuit


In an amplitude detecting circuit, a phase shifter, into which an alternating current signal that is outputted from an AGC circuit is inputted, outputs first and second alternating current signals between which there is a phase difference. In addition, full wave rectifying is carried out in a first full wave rectifier on the first alternating current signal that is outputted from the phase shifter and in the same manner full wave rectifying is carried out in a second full wave rectifier on the second alternating current signal. Furthermore, in an averaging circuit, output signals of the first and second full wave rectifiers are averaged so as to generate an amplitude detection signal.

1. Field of the Invention
The present invention relates to an amplitude detecting method for detecting the amplitude of an alternating current signal, and an AGC circuit gain controlling method for controlling the gain of an AGC circuit by using the amplitude detecting method.
In addition, the present invention relates to an amplitude detecting apparatus for detecting the amplitude of an alternating current signal, and an AGC amplifier circuit which includes an amplitude detecting apparatus as a component, and which controls the gain of an AGC circuit.
2. Prior Art
An AGC amplifier circuit according to the prior art has a function of outputting an alternating current signal having a constant amplitude in response to fluctuations in the amplitude of an inputted transmission signal (alternating current signal). In order to implement this function, the AGC amplifier circuit has an AGC circuit and an amplitude detecting circuit for detecting the amplitude of an output signal of the AGC circuit, and is provided with an automatic gain controlling (AGC) mechanism where an amplitude detection signal of the amplitude detecting circuit is fed back to the AGC circuit.
In the above described configuration, when the DC voltage, which is the amplitude detection signal of the amplitude detecting circuit, is not constant, but rather fluctuates, the gain of the AGC circuit also fluctuates, and the waveform of the transmission signal that is outputted from the AGC circuit is distorted, because the time constant of the feedback loop is significantly small.
Next, FIG. 8 shows the configuration of an AGC amplifier circuit according to the prior art using a smoothing condenser. This AGC amplifier circuit is formed of an input terminal 1, an AGC circuit 2, an output terminal 3 and an amplitude detecting circuit 10.
AGC circuit 2 amplifies a transmission signal a that has been inputted into input terminal 1 by the gain in accordance with the gain control signal and outputs the resulting signal, and thereby, the amplitude of output signal b is made constant, irrespectively of the fluctuation in the amplitude of transmission signal a.
Amplitude detecting circuit 10 that is used to detect the amplitude of output signal b of AGC circuit 2 is formed of an input terminal 4 of the amplitude detecting circuit, an output terminal 5 of the amplitude detecting circuit, a full wave rectifier 11 and a smoothing condenser 12.
Thus, in this configuration, full wave rectifying is carried out on output signal b of AGC circuit 2, and in addition, the signal is smoothed, and thereby, an amplitude detection signal c1 which corresponds to the amplitude of output signal b is outputted. This amplification detection signal c1 is supplied to AGC circuit 2 as a gain control signal.
FIG. 9 shows operation waves in each portion of the AGC amplifier circuit of FIG. 8. FIG. 9 shows the waveform of transmission signal a, the waveform of output signal b of AGC circuit 2, the waveform of amplitude detection signal c1 of amplitude detecting circuit 10 and a change in gain G of AGC circuit 2, respectively. Here, in the waveform of amplitude detection signal c1, the broken line indicates a case where there is no smoothing condenser, and the solid line indicates a case where there is a smoothing condenser.
When smoothing condenser 12 is not utilized, the time constant of the feedback loop formed of AGC circuit 2 and amplitude detecting circuit 10 is small. Therefore, the wavelength of amplitude detection signal c1 becomes the same as the waveform of the output of the full wave rectifier, as shown by the broken line. As a result of this, gain G of AGC circuit 1 fluctuates a great deal, and thereby, the waveform of transmission signal b that is outputted from AGC circuit 2 is distorted.
In contrast to this, when smoothing condenser 12 is used, the time constant of the above described feedback loop increases, and the fluctuation in the waveform of amplitude detection signal c1 decreases, as shown by the solid line. As a result of this, the fluctuation in gain G of AGC circuit 1 is reduced, and thereby, the distortion in the waveform of transmission signal b that is outputted from AGC circuit 1 is reduced.
Patent Document 1: Japanese Unexamined Patent Publication H08 (1996)-172330
In the configuration of FIG. 8 according to the prior art, smoothing condenser 12 is used in order to improve the waveform so as to reduce distortion, and therefore, a problem arises, where the time constant of the feedback loop is increased, and the speed of response of the AGC amplifier is lowered.

Amplitude detecting method, AGC circuit gain controlling method, amplitude detecting apparatus and AGC amplifier circuit

Matsushita Electric Industrial Co., Ltd.


A method and apparatus for controlling access to a logic circuit in a battery by one or more components connected to the battery includes the components initially providing no voltage to a data contact, and sampling a voltage level at the data contact to determine if another component is presently connected to the logic circuit. When the sampled voltage indicates no other component is presently accessing the logic circuit, the component applies a voltage to the logic circuit via the data contact and access the logic circuit. When the sampled voltage indicates that a prior-connected component is connected to the battery, the component uses a voltage level provided by the prior-connected component to access the logic circuit.

A battery in a rechargeable system refers to a package containing several circuit elements, including one or more electrochemical cells, and can often include other circuitry. The package is mechanically adapted to attach to a device that is powered by the battery and to a charger that can recharge the battery while it is attached to the device, or by itself. It is common in some industries to include circuitry in the battery that can provide information to components such as a charger and a device powered by the battery. In some cases the circuitry can include a memory device that stores battery data.
Providing access to a circuit in the battery is a way that it can be accessed by both a charger and a device powered by the battery presents several problems. For one, different components (e.g. charger, device) can apply different voltage levels to the circuit being accessed. As such, if both components attempt to access the circuit, the difference in voltage could interfere with the operation of the circuit or output of the circuit as read by one or both components. In some cases the voltage difference could damage one of the components. In addition, even if all components were able to use identical voltage levels, each component being essentially an initiator and the logic circuit in the battery being a responder, there can be collisions in communication where both components attempt access at the same time.
Accordingly, there is a need for a method and apparatus for controlling access to a logic circuit in a battery by multiple components.
Skilled artisans will appreciate that elements in the figures are illustrated for simplicity and clarity and have not necessarily been drawn to scale. For example, the dimensions of some of the elements in the figures may be exaggerated relative to other elements to help to improve understanding of embodiments of the present invention.
The apparatus and method components have been represented where appropriate by conventional symbols in the drawings, showing only those specific details that are pertinent to understanding the embodiments of the present invention so as not to obscure the disclosure with details that will be readily apparent to those of ordinary skill in the art having the benefit of the description herein.

Method and apparatus for controlling access to a logic circuit in a battery by multiple components connected to the battery


A communication control equipment connected between a computer and a network so as to perform protocol processing at a high speed, has a buffer memory connected between a computer interface circuit and a network interface circuit through a first path for data transfer, so as to temporarily store communication data, and a protocol processor connected between the computer interface circuit and the network interface circuit through a second path for control information transfer. The protocol processor is also connected to the buffer memory through a third path so as to effect protocol processing on the communication data within the buffer memory. The protocol processor includes a plurality of processor units connected in series in the second path so as to respond to control information received from the second path to make access to the buffer memory through the third path and to execute a first category of protocol processing necessary in normal data transfer on the communication data stored in the buffer memory. If protocol processing other than the first category of protocol processing on the communication data is necessary, the processor units supply the control information to the third path. The protocol processing also includes a second processor which operates as a backend processor for the processor units and which is connected to the third path so as to respond to the control information received from the third path to execute protocol processing other than the first category of protocol processing on the communication data stored in the buffer memory.

This invention relates to communication control equipment, and particularly to a high speed protocol processing apparatus for processing a layered communication protocol having a plurality of layers.
In general, when the layered communication protocol of a seven-layer OSI model is processed, a particular layer (for example, layer 2 or above) protocol is processed by hardware of high-speed LSIs, and the other-layer (layer 3 or above) protocol is processed by a general-purpose CPU using software.
The reason for this is that the communication protocol processing is complicated, and the protocol processor is required to have a general-purpose applicability for various different protocols and a flexibility for application to various different network environments.
In other words, heretofore, it was difficult to process a complicated communication protocol by hardware having a general-purpose applicability and flexibility.
One example of the system for processing the layered communication protocol at high speed is proposed in, for example, JP-A 62-117050, in which a protocol processor is provided for each layer so that a layered protocol is processed by a pipe-line system, thereby achieving a high throughput.
In the above protocol processor, a plurality of microprocessors are used so that one protocol processor processes one-layer protocol. In addition, the operation of each microprocessor is controlled by a microprogram down-loaded from an external device.
According to the conventional protocol processor, however, although a high throughput can be obtained as compared with the processor for processing all layers using a single microprocessor, it is difficult to greatly reduce the protocol processing time because the protocol of each layer is processed by one processor for each layer in a software manner.

Protocol processing apparatus for use in interfacing network connected computer systems utilizing separate paths for control information and data transfer


A method and an apparatus optimize performance of a motor drive system. The method according to one embodiment comprises: selecting a property for a rated operation point; selecting inverter system characteristics and motor characteristics such that a motor drive system including an inverter system having the selected inverter system characteristics operatively connected to a motor having the selected motor characteristics will have a rated operation point exhibiting the property; providing an inverter system having the selected inverter system characteristics; operatively connecting a motor having the selected motor characteristics to the inverter system; and minimizing current of the motor drive system including the motor operatively connected to the inverter system in entire operating range of the motor drive system.

1. Field of the Invention
The present invention relates to motor drive systems, and more particularly to a technique for design/control of a motor drive system including a DC-AC inverter and a synchronous motor.
2. Description of the Related Art
Large vehicles such as aircraft and ships include a multitude of electrical and mechanical systems that perform complex tasks and require large amounts of energy. Synchronous motor drive systems are suitable for large vehicles. Synchronous motor drives are energy conversion systems that can produce large amounts of energy at high power and high speed, as needed for complex equipment onboard large vehicles. Synchronous motor drive systems are especially efficient with the use of permanent magnet synchronous motor (PMSM) systems due to reduced resulting size and weight.
A typical motor drive system topology for advanced system environments such as "more electric" aircraft with "fly-by-wire" systems is a three phase voltage source DC-AC inverter-driven synchronous motor. The inverter could be installed remotely from the motor, which is integrated into a system such as a cabin air compressor. When the inverter is not in close proximity to the motor, an output AC differential LC filter is used to mitigate high voltage variations occurring on the motor end. Such high voltage variations correspond to high voltage-time derivatives and are caused by long cables connecting the motor to the inverter. The output AC differential LC filter reduces the stress on the motor and helps meet electromagnetic compatibility requirements.
A motor drive system usually needs to accommodate various input DC bus voltage ranges, which ultimately cause variations in the limits of the inverter output AC voltage range. A motor drive system also needs to accommodate various load conditions. The variability in inverter output AC voltage range and load conditions impacts motor drive system performance.
Commercial motor drive systems are generally designed for constant torque operation below the rated operation speed, and constant power operation above the rated operation speed. The rated operating point for the motor drive system is located at the rated speed, where maximum power is achieved. Hence, the inverter and the motor are optimized separately based on the rated operation point.
When high power from a motor drive system is required, the DC bus voltage applied to the motor drive system needs to be increased accordingly, to accommodate the increased back electromotive force resulting from the motor design. The motor current rating is limited by the motor design, which includes the design of motor winding. The winding included in a motor drive system can be large and heavy. Installing, reinstalling, or replacing the winding inside the motor is a difficult task. The DC bus voltage is used to compensate for motor design limitations. For example, medium and high voltage DC buses are designed for megawatts motor drive systems used in commercial applications.
However, in many applications such as the more electric aircraft, the DC bus voltage that can be used to drive high power motor drive systems is limited. In these applications, separate design optimization of motor and inverter typically results in over-designing of the inverter and the motor to accommodate the peak power/peak current requirements. An additional drawback of separate optimization of motor and inverter design is that the motor drive system design is not optimized for overall system efficiency/power density, especially when an output LC filter is installed between the inverter and the motor. Such a filter is often required in applications such as the more electric aircraft, etc.
A few publications have studied improved efficiency schemes for motor drive systems. One such technique is described in "Method and System for Improving Efficiency of Rotating, Synchronous, Electrical Machine Interacting with Power Converter", Roman Bida, US Patent Application 2002/0149336 A1. With the method described in this work, the efficiency of a motor drive is improved by introducing a spectrum of harmonic components in a power converter supplying energy to the motor. The harmonic components control the current of the power converter so that the current becomes identical in shape and phase to the back electromotive force (back EMF) of the motor. This concept, however, does not provide overall optimization of the motor drive system, as it optimizes only the motor section of the system.
Another technique is described in "Back EMF Controlled Permanent Magnet Motor", D. Fulton and W. Curtiss, U.S. Pat. No. 4,275,343. In this publication, however, only the back EMF control of the motor is optimized. Again, no overall optimization of the motor drive system for design and control of both inverter and motor is performed.
A disclosed embodiment of the application addresses these and other issues by utilizing a high power density/limited DC link voltage motor drive system, with design and control optimization achieved for the combination of inverter and motor system.

High power density/limited DC link voltage synchronous motor drive


Systems and methods are presented to disclose a gamified startup ecosystem wherein the participants comprising various real and role-playing stakeholders of the startup ecosystem are enabled and incentivized to interact with each other in their respective roles in a plurality of ways that draw upon gamification to make the participants' experiences interactive, valuable, interesting, educational, and rewarding for them in their various roles.

When taking their innovations to the market, entrepreneurs experience many struggles, with one of them being lack of resources to develop their products, test their ideas, find product-market fit, promote their products, and fundraise. To carry out these activities, they seek to raise capital, which is difficult to access for most startups. On the other side of the table, there's an increasing excitement among retail investors to participate in the investment process in startups and reap the upside when the startups go public. However, investing in startups is a high risk investment. With regulations now allowing even unaccredited investors to invest in startups, there's been an increase in crowdfunding activity with more crowd investors and more deals getting funded on crowdfunding platforms. Research shows that almost ninety percent of startups fail and, resultantly, most of these investments are also likely to fail.
Learning how to attract investors for a startup business may be a daunting and intimidating task that may only be learned through experience. Learning how to invest in startups can also be a high risk activity that may be better for aspiring investors to learn or become acquainted with before investing than after having invested and probably lost their hard earned money. It would therefore be desirable to provide a game-like simulated environment in which aspiring entrepreneurs can gain experience in how to attract investors for a startup business, and aspiring investors gain experience in evaluating new ideas, evaluating new ventures and evaluating the risks involved in investing in new ventures.

Methods and systems for a gamified startup ecosystem


A plasma processing apparatus comprising a plurality of plasma processing units is provided. Each of the plasma processing units has a matching circuit connected between a radiofrequency generator and a plasma excitation electrode. Among these plasma processing units, a variation <RA> between the maximum and minimum values of input-terminal-side AC resistances RA of the matching circuits defined by <RA>=(RAmax−RAmin)/(RAmax+RAmin) is adjusted to be less than 0.5. A variation between the maximum and minimum values of output-terminal-side AC resistances RB of the matching circuits defined by <RB>=(RBmax−RBmin)/(RBmax+RBmin) is also adjusted to be less than 0.5. The plasma processing units can be adjusted to achieve substantially uniform plasma results in a shorter period of time.

1. Field of the Invention
The present invention relates to a plasma processing apparatus, a plasma processing system, a performance validation system, and an inspection method therefor. The present invention can be suitably applied to a plasma processing apparatus having a plurality of plasma processing units so as to minimize the variation among the plurality of the plasma processing chambers and to improve the deposition characteristics using a power of higher frequencies.
2. Description of the Related Art
FIG. 33 illustrates a typical conventional dual-frequency excitation plasma processing unit which constitutes a plasma processing apparatus and performs a plasma process such as a chemical vapor deposition (CVD) process, a sputtering process, a dry etching process, or an ashing process.
In the plasma processing unit shown in FIG. 33, a matching circuit 2A is connected between a radiofrequency generator 1 and a plasma excitation electrode 4. The matching circuit 2A matches the impedances of the radiofrequency generator 1 and the excitation electrode 4.
Radiofrequency power generated from the radiofrequency generator 1 is supplied to the plasma excitation electrode 4 through the matching circuit 2A and a feed plate 3. The matching circuit 2A is accommodated in a matching box 2 which is a housing composed of a conductive material. The plasma excitation electrode 4 and the feed plate 3 are covered by a chassis 21 made of a conductor.
An annular projection 4a is provided on the bottom face of the plasma excitation electrode (cathode) 4, and a shower plate 5 having many holes 7 comes into contact with the projection 4a below the plasma excitation electrode 4. The plasma excitation electrode 4 and the shower plate 5 define a space 6. A gas feeding tube 17 comprising a conductor is connected to the space 6 and is provided with an insulator 17a at the middle thereof so as to insulate the plasma excitation electrode 4 and the gas source.
Gas from the gas feeding tube 17 is introduced inside a plasma processing chamber 60 composed of a chamber wall 10, via the holes 7 in the shower plate 5. An insulator 9 is disposed between the chamber wall 10 and the plasma excitation electrode (cathode) 4 to provide insulation therebetween. The exhaust system is omitted from the drawing.
A wafer susceptor (susceptor electrode) 8 which holds a substrate 16 and also functions as another plasma excitation electrode is installed inside the plasma processing chamber 60. A susceptor shield 12 is disposed under the wafer susceptor 8.
The susceptor shield 12 comprises a shield supporting plate 12A for supporting the susceptor electrode 8 and a supporting cylinder 12B extending downward from the center of the shield supporting plate 12A. The supporting cylinder 12B extends through a chamber bottom 10A, and the lower portion of the supporting cylinder 12B and the chamber bottom 10A are hermetically sealed with bellows 11.
The shaft 13 and the susceptor electrode 8 are electrically isolated from the susceptor shield 12 by a gap between the susceptor shield 12 and the susceptor electrode 8 and by insulators 12C provided around the shaft 13. The insulators 12C also serve to maintain high vacuum in the plasma processing chamber 60. The susceptor electrode 8 and the susceptor shield 12 can be moved vertically by the bellows 11 so as to control the distance between plasma excitation electrodes 4 and the susceptor electrode 8.
The susceptor electrode 8 is connected to a second radiofrequency generator 15 via the shaft 13 and a matching circuit accommodated in a matching box 14. The chamber wall 10 and the susceptor shield 12 have the same DC potential.
FIG. 34 illustrates another conventional plasma processing unit. Unlike the plasma processing unit shown in FIG. 33, the plasma processing unit shown in FIG. 34 is of a single-frequency excitation type. In other words, radiofrequency power is supplied only to the cathode electrode 4 and the susceptor electrode 8 is grounded. Moreover, the matching box 14 and the radiofrequency generator 15 shown in FIG. 33 are not provided. The susceptor electrode 8 and the chamber wall 10 have the same DC potential.
In these plasma processing units, power with a frequency of approximately 13.56 MHz is generally supplied in order to generate a plasma between the electrodes 4 and 8. A plasma process such as a plasma-enhanced CVD process, a sputtering process, a dry etching process, or an ashing process is then performed using the plasma.
The operation validation and performance evaluation of the above-described plasma processing units have been conducted by actually performing the process such as deposition and then evaluating the deposition characteristics thereof according to following Procedures:
Procedure (1) Deposition Rate and Planar Uniformity
Step 1: Depositing a desired layer on a 6-inch substrate by a plasma-enhanced CVD process.
Step 2: Patterning a resist layer.
Step 3: Dry-etching the layer.
Step 4: Removing the resist layer by ashing.
Step 5: Measuring the surface roughness using a contact displacement meter to determine the layer thickness.
Step 6: Calculating the deposition rate from the deposition time and the layer thickness.
Step 7: Measuring the planar uniformity at 16 points on the substrate surface.
Procedure (2) BHF ERching rate
A resist mask is patterned as in Steps 1 and 2 in (1) above.
Step 3: Immersing the substrate in a buffered hydrofluoric acid (BHF) solution for one minute to etch the layer.
Step 4: Rinsing the substrate with deionized water, drying the substrate, and separating the resist mask using a mixture of sulfuric acid and hydrogen peroxide (H2SO4+H2O2)
Step 5: Measuring the surface roughness as in Step 5 in Procedure (1) to determine the layer thickness after the etching.
Step 6: Calculating the etching rate from the immersion time and the reduced layer thickness.
Procedure (3) Isolation Voltage
Step 1: Depositing a conductive layer on a glass substrate by a sputtering method and patterning the conductive layer to form a lower electrode.
Step 2: Depositing an insulating layer by a plasma-enhanced CVD method.
Step 3: Forming an upper electrode as in Step 1.
Step 4: Forming a contact hole for the lower electrode.
Step 5: Measuring the current-voltage characteristics (I–V characteristics) of the upper and lower electrodes by using probes while applying a voltage up to approximately 200 V.
Step 6: Defining the isolation voltage as the voltage V at 100 pA corresponding 1 μA/cm2 in a 100 μm square electrode.
The plasma processing apparatus has been required to achieve a higher plasma processing rate (the deposition rate or the processing speed), increased productivity, and improved planar uniformity of the plasma processing (uniformity in the distribution of the layer thickness in a planar direction and uniformity in the distribution of the process variation in the planar direction). As the size of substrates has been increasing in recent years, the requirement of planar uniformity has become tighter. Moreover, as the size of the substrate is increased, the power required is also increased to the order of kilowatts, thus increasing the power consumption. Accordingly, as the capacity of the power supply increases, both the cost for developing the power supply and the power consumption during the operation of the apparatus are increased. In this respect, it is desirable to reduce the operation costs.
Furthermore, an increase in power consumption leads to an increase in emission of carbon dioxide which places a burden on the environment. Since the power consumption is increased by the combination of increase in the size of substrates and a low power consumption efficiency, reduction of the carbon dioxide emission is desired.
The density of the plasma generated can be improved by increasing the plasma excitation frequency. For example, a frequency in the VHF band of 30 MHz or more can be used instead of the conventional 13.56 MHz. Thus, one possible way to improve the deposition rate of a deposition apparatus such as a plasma-enhanced CVD apparatus is to employ a higher plasma excitation frequency.
In a plasma processing apparatus having a plurality of the above-described plasma processing units, variation in plasma processing among the plasma processing units and their matching circuits is required to be reduced, so that the plasma processing rate (deposition rate when applied to a deposition process), productivity, and uniformity in the plasma process in the planar direction of a workpiece (planar distribution in the layer thickness) can be made substantially the same among the workpieces plasma-treated in different plasma processing units.
The plasma processing apparatus is also required to yield substantially the same process results by applying the same process recipe specifying external parameters for respective plasma processing units such as gas flow, gas pressure, power supply, and process time.
It is desired to both reduce the time required for adjusting the plasma processing apparatus newly installed or subjected to maintenance to achieve substantially the same process results by applying the same recipe and eliminate the variation among the plurality of plasma processing units, as well as the cost required for such adjustment.
Furthermore, reduction in the variation among the plasma processing units has also been required for a plasma processing system comprising a plurality of such plasma processing apparatuses.
The above-described plasma processing unit is designed to use power with a frequency of approximately 13.56 MHz and is not suited for power of higher frequencies. Specifically, radiofrequency characteristics such as impedance and resonant frequency characteristics of the plasma processing unit as a whole, and more specifically, the radiofrequency characteristics of the plasma processing chamber and the matching circuit have been neglected; consequently, no improvement in the electrical consumption efficiency has been achieved when power of a frequency higher than approximately 13.56 MHz is employed, resulting in decrease in the deposition rate rather than improvement. Moreover, although the density of a generated plasma increases as the frequency increases, the density starts to decrease once its peak value is reached, eventually reaching a level at which glow-discharge is no longer possible, thus rendering further increases in frequency undesirable.
In a plasma processing apparatus and a plasma processing system comprising a plurality of plasma processing apparatuses, the radiofrequency characteristics of the plasma processing units including the matching circuits are defined by their mechanical dimensions such as shape. However, the components constituting the plasma processing unit inevitably have differences in size, etc., due to the mechanical tolerance during manufacture. When these components are assembled to make a plasma processing unit, the tolerance due to the assembly is added to the tolerance in the mechanical dimensions. Furthermore, some portions of the plasma processing chamber may not be measurable after assembly of the components; consequently, whether the plasma chamber as a whole has designed radiofrequency characteristics may not be quantitatively validated. Thus, means for examining the variation in the radiofrequency characteristics of the plasma processing chambers has not been available.
Thus, conventional plasma processing apparatuses suffer from the following disadvantages.
Conventional plasma processing apparatuses and systems are not designed to eliminate the differences in electrical radiofrequency characteristics such as impedance and resonant frequency characteristics among the plasma processing units constituting the plasma processing apparatus or system. Thus, the effective power consumed in the plasma generating spaces of the plasma processing units and the density of the generated plasma vary between different plasma processing units.
As a consequence, uniformity in plasma process results may not be achieved when the same process recipe is applied to these plasma processing units.
In order to obtain uniform plasma process results, external parameters such as gas flow, gas pressure, power supply, process time, and the like must be compared with the process results according to Procedures (1) to (3) described above for each of the plasma processing units so as to determine the correlation between them. However, the amount of data is enormous and it is impossible to completely carry out the comparison.
In order to validate and evaluate the operation of the plasma processing apparatus using Procedures (1) to (3) above, the plasma processing apparatus needs to be operated and deposited substrates need to be examined by an ex-situ inspecting method requiring many steps.
Since such an inspection requires several days to several weeks to yield evaluation results, the characteristics of the plasma-treated substrates processed during that period, supposing that the production line is not stopped, remain unknown during that period. If the performance of the plasma processing apparatus is poor, products not satisfying a required level may be manufactured. In this respect, a method for easily maintaining the operation of the plasma processing apparatus at the required level has been desired.
Moreover, when Procedures (1) to (3) described above are employed to inspect the plasma processing units constituting the plasma processing apparatus or system, the time required for adjusting the plasma processing units so as to eliminate the difference in performance and variation in processing among the plasma processing units to achieve the same process results using the same process recipe may be months. The time required for such adjustment needs to be reduced. Also, the cost of substrates for inspection, the cost of processing the substrates for inspection, the labor cost for workers involved with the adjustment, and so forth are significantly high.

Plasma processing apparatus including a plurality of plasma processing units having reduced variation


An array substrate and a manufacturing method thereof and a display are disclosed. The array substrate includes a base substrate, a plurality of sub-pixels disposed on the base substrate, and a phase shift pattern disposed on the base substrate to separate the sub-pixels; the phase shift pattern is disposed to allow light passing through the phase shift pattern to undergo phase shift, and positions corresponding to the phase shift pattern are substantially opaque to light. Lateral light leakage is reduced by the phase shift pattern, and transmission rate of products become uniform, and therefore stability of products are increased.

TFT-LCDs (Thin Film Transistor Liquid Crystal Displays) are more and more used in high-performance display field as flat panel display devices because of the following features such as small size, low power consumption, no radiation and relatively lower manufacturing cost.
A TFT-LCD panel usually includes an array substrate and a color filter substrate that are cell-assembled together. A liquid crystal layer is disposed between the array substrate and the color filter substrate. For example, an array substrate includes a plurality of scanning signal lines (S1-Sn) and a plurality of data signal lines (D1-Dn), the plurality of scanning signal lines and the plurality of data signal lines cross each other along a horizontal direction and a vertical direction respectively to define a plurality of sub-pixels. A color filter substrate can include a color film layer and a black matrix pattern, the black matrix pattern correspond to opaque portions for light, such as scanning signal lines and data signal lines, on the array substrate. The color film layer is divided into a plurality of color units by the black matrix pattern. The color units on the color filter substrate and the sub-pixels on the array substrate correspond in a one-one relationship.
However, in a manufacturing process of TFT-LCD devices, a position deviation can happens in the cell-assembling process of an array substrate and a color filter substrate, and light transmission rate of a product is reduced. At the same time, uniformity of light transmission rate is bad between different products, and also between products in different batches because of different cell-assembled precision. Especially with regard to products with high PPI (Pixels Per Inch), fluctuation of light transmission rate can reach up to 30%, and better customer experience cannot be obtained.

Array substrate and manufacturing method thereof and display device

BEIJING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.


A device and method for determining the viscosity of a fluid, preferably molten glass. The apparatus and method uses the velocity of rising bubbles, preferably helium bubbles, within the molten glass to determine the viscosity of the molten glass. The bubbles are released from a tube positioned below the surface of the molten glass so that the bubbles pass successively between two sets of electrodes, one above the other, that are continuously monitoring the conductivity of the molten glass. The measured conductivity will change as a bubble passes between the electrodes enabling an accurate determination of when a bubble has passed between the electrodes. The velocity of rising bubbles can be determined from the time interval between a change in conductivity of the first electrode pair and the second, upper electrode pair. The velocity of the rise of the bubbles in the glass melt is used in conjunction with other physical characteristics, obtained by known methods, to determine the viscosity of the glass melt fluid and, hence, glass quality.

1. Field of the Invention:
The present invention relates to devices and methods for determining physical properties of a conductive fluid. More particularly, the present invention relates to determining the viscosity and specific gravity of molten glass, particularly glass used for encapsulating wastes.
2. Discussion of Background:
Devices and methods for measuring physical properties of electrically conductive fluids such as molten glass are well known. The prior art includes measurement techniques for determining density, specific gravity, and conductivity (or resistivity) of various kinds of fluids, including the constituents added to make glass in a melter.
In U.S. Pat. No. 4,871,000, Ritter describes a method for continually measuring the depth of radioactive glass melt flowing into a mold. The method is based on the electrical resistivity of the glass melt.
Another U.S. Pat. No. 4,422,326 issued to Sasaki, describes a method for measuring density and depth of a glass melt that includes radioactive constituents. Sasaki uses a bubble-type level measuring method to find the minimum pressures required for releasing bubbles into the fluid for density and depth measurements.
Similarly, Baumert, in U.S. Pat. No. 4,359,211, describes the use of bubbles in metallurgical melts for determining the level of a slag layer in a melt. He mentions, but does not describe, determination of melt viscosity and consistency.
In U.S. Pat. No. 2,933,094, Cunniff, et al uses a Wheatstone bridge to determine concentrations of the contents, specific gravity and conductivity of a pickling solution.
Despite the numerous methods and devices existing in the prior art for determining various physical parameters of fluids such as molten glass, since glass quality, especially glass encapsulating waste, is determined by its physical characteristics, there is a need for an accurate method and device for determining the viscosity.

Monitoring and analyzing waste glass compositions

The United States of America as represented by the United States Department of Energy


An ink cartridge includes a bag filled with ink and sealed. The bag is housed in a cartridge case. The bag is formed out of a laminate including a ductile film and a rigid film which are laminated together. The case has a hole, through which a hollow needle can protrude from the outside into the case and pierce the bag to take out ink from the bag. The laminate has such a sealing effect that, when it is pierced by the needle, the pierced hole is blocked. The cartridge is suitable for an ink jet printer.

1. Field of the Invention
The present invention relates to an ink cartridge for storing liquid ink for use with an ink jet head or another print head, and supplying the ink to the head. The invention also relates to a printer with which such a cartridge can be used.
2. Description of Related Art
Ink cartridges for use with ink jet printers etc. are classified into a group of cartridges each fixed to a print head, and another group of cartridges each removably fitted to a print head. The removable cartridges each include an ink tank made of resin. The tank houses a foamed or porous member impregnated with ink. The tank has an ink supply port through which ink can be discharged to the head. The tank also has an air vent hole through which air is taken in from the outside when ink is consumed.
For example, U.S. Pat. No. 5,631,682 discloses an ink supply device including a case which houses a foamed or porous member. This member is impregnated with ink and wrapped in a film in bag form. The case has an ink supply port projecting into it and connected to the print head of a printer. When the impregnated and wrapped member is inserted into the case, the projecting port presses the member, piercing the film so that ink is supplied through the port to the head. It is possible to exchange ink by replacing only the impregnated and wrapped member, without throwing away the case, and without the user's hands being smeared with ink.
Recently, a very small portable ink jet printer has been invented as disclosed in Japanese Patent Laid-Open Publications No. 8-295096, No. 8-298568, No. 9-85994 and U.S. Pat. No. 5,634,730. For such a small printer, a cartridge of the foregoing type is not suitable which needs relatively large volume to house in a case a foamed member impregnated with ink. In order that a printer may be portable, it is necessary to completely prevent ink from leaking out of the connection between the print head of the printer and the ink cartridge mounted on the printer, whichever positioned the printer is.


Systems and methods for identifying the relative contribution of fat and water signals in a magnetic resonance (“MR”) image including an algorithm operable for selecting an image signal model, selecting a scan parameter, forming a bias field estimate, applying a bias correction to a phase image, estimating the signal fraction of fat and water at each of a plurality of voxels, and forming a fat-suppressed image, a water-suppressed image, or a combination of a fat-based image and a water-based image. The (“MRI”) fat suppression systems and methods requiring only a single image acquisition including an algorithm operable for selecting a relative phase of approximately θ=π/2 or another suitable relative phase, employing an expectation maximization algorithm to classify the phase of the complex image, and projecting complex vectors into fat and water components to obtain fat and water images.

Magnetic resonance imaging ("MRI") collects data in the Fourier domain, typically referred to as k-space, from the magnetic signals of protons precessing in a magnetic field. The spin frequency, also referred to as the resonance frequency, is a function of a material's gyromagnetic ratio and the strength of the magnetic field. In order to spatially position the collected signal, MRI systems and methods make an underlying assumption about this spin frequency: that the signal is composed primarily of protons in water. Typically, in the human body, this assumption is valid; however, protons in fat resonate at a lower frequency than protons in water. This resonance frequency difference is referred to as the chemical shift. When water and fat signals are imaged together, a resulting shift of the fat signal occurs. This frequency change in k-space results in a spatial shift in image space. During frequency encoding, the off resonance fat signal is interpreted to occur at a different spatial location from where the actual signal originated, producing a superposition of two offset images: an image of water and an image of fat response.
The chemical shift artifact ("CSA") presents a significant barrier to the quantitative MR image analysis of small features, in which the amount of shift is comparable to the dimension of the object. The CSA appears as a "shadowing" effect in the read direction of MR images. This shadowing effect is illustrated in FIG. 1. The resonance frequency of fat is lower than that of water (by approximately 220 Hz given a 1.5 T field). The fat signal is reconstructed with a spatial shift proportional to the B0 field, the field of view ("FOV") of the image, and the bandwidth used to acquire the signal. For example, given a 1.5 T magnet, a 20 cm FOV, a 256-pixel matrix, and a 20 kHz bandwidth, the resulting shift is 2.81 pixels, or 2.2 mm. Thus, an object composed of a water signal that is approximately 2.2 mm in size may be completely obscured. The borders of objects may also be corrupted by this artifact.
Typically, the resulting CSA corruption is "read through" by radiologists, however, by corrupting the borders between adjacent regions, it foils quantitative measurements of small water signal features surrounded by fat-containing tissue. The magnitude of the shift increases proportionally to the strength of the magnetic field, thus as B0 field strength increases, the artifact's effects may also increase. This shift occurs primarily in the frequency encoding or read-out direction of the image; a secondary effect is present in the slice select direction of the image. Referring to FIG. 1, in the zoomed view (FIG. 1(b)), the CSA on the right leg appears as a void signal, as indicated by the arrow. In the left leg, the CSA appears as a high-intensity region where the fat and water signals superimpose, resulting in increased signal magnitude.
Although the CSA may be useful for diagnostic purposes, such as "fatty liver," etc., several methods have been proposed to counteract it. These are broadly categorized into two classes: fat saturation or suppression and the Dixon method.
Since its inception in 1984, the Dixon method has received much attention. The Dixon method seeks to remove the effects of the CSA by exploiting the phase relationships caused by the different resonance frequencies to produce two images: one with fat and water in phase and one with opposed phase. By choosing an echo time, TE, based on the chemical shift between fat and water, Dixon collected two images, one composed of fat and water signal in phase, and one with fat and water signals 180 degrees out of phase. The two images are added and subtracted to produce an image of the fat signal and of the water signal. In the following equations:I0=Sfat+SwaterIπ=Sfat−Swater,  (1)I0 is the image collected with fat and water in phase and Iπ is the image collected with fat and water at opposed phases. The fat and water images may be formed from the two images by the following equations:Ifat=(I0+Iπ)/2Iwater=|I0−Iπ|/2.  (2)
Dixon's original paper employed a simple method of addition and subtraction assuming that the only source of phase difference between the two signals was chemical shift. Intensity inhomogeneities, however, confound the two-point method, resulting in errors in the reconstructed images. This problem was addressed by Skinner and Glover and Coombs et al. Lodes et al. suggest the use of three images acquired at θε[−π, 0, π] to calculate the intensity inhomogeneities. This method has been extended to include a correction algorithm that fits a polynomial to the collected phase and performs trend analysis on the phase.
Inhomogeneity correction is a pivotal component of any proposed single-point Dixon method. As used herein, the terms bias or bias field mean the magnetic field inhomogeneities and magnetic susceptibility of the human body that cause spatially varying shading across MRI images. The bias filed affects both the magnitude and the phase of the collected signal. Although the bias field effects have been studied and simulated, in practice the bias field in MRI images is approached by fitting approximations to the field rather than understanding the underlying mechanisms. A substantial body of literature has been centered around intensity bias correction in MRI. Meyer et al. use an LCJ algorithm for intensity bias correction. Several authors use a polynomial fit or thin-plate splines. Non-parametric correction schemes have also shown promise in coping with bias correction. Rather than retrospectively correct the artifact, Schomberg incorporates correction steps in the MRI reconstruction process. Information theory methods and homomorphic unsharp masking have also been applied to the problem. Prima presented a comparison of model-based methods and several authors have coupled segmentation with intensity correction. It is an adaptation of coupled segmentation that forms the core of the fat suppression technique described herein.
In addition to the issues described above, to characterize tissues, the pixel values in two images are typically compared by division for T2*, T2, and diffusion. Although division may cancel some untoward effects, it is still necessary to remove/reduce the influences of surrounding and/or included fat. Fat may affect a plurality of surface voxels in small or thin tissue regions. The CSA moves fat in the slice select and read directions, producing overlap which may be several pixels wide. High bandwidth limits may alleviate this overlap, but increase noise.
Ideally, calculations would provide correct tissue properties (T2*, etc.) at partial volume fractions below a relatively large, critical value, and the correct values for fat at relatively large volume fractions. Because fat and water signal phases may affect results, TE choice may be used to minimize partial volume effects.
Thus what is still needed is a novel algorithm for distinguishing fat and water signals utilizing only one image, provided the correct phase information from the complex image may be accurately estimated. What is also needed is a novel algorithm for the robust estimation of parameters such as T2* that are adjacent to fat.

Fat/water separation and fat minimization magnetic resonance imaging systems and methods


A bracket comprises a mounting base, a landing riser attached to the mounting base, a landing attached to the landing riser, a slot-defining structure riser attached to the mounting base and a slot-defining structure attached to the slot-defining structure riser. A first landing surface of the landing is parallel to at least a portion of a first mounting base surface of the mounting base. A slot is defined between first and second slot-defining surfaces of the slot-defining structure. The first slot-defining surface is parallel to the first landing surface. A method of making a bracket, comprises forming a unitary element and bending the unitary element to produce a bracket. A method of mounting a rooftop element on a rooftop structure comprises attaching at least two brackets to the rooftop structure, and positioning a rooftop element on the brackets. A rooftop array comprises a rooftop structure, a plurality of brackets attached to the rooftop structure and a plurality of rooftop elements.

Many communities prohibit the mounting of rooftop elements, such as conventional photovoltaic (PV) modules, on a visible roof structure of commercial or residential structures because of what is considered by some to be poor aesthetics of these installations. Additionally, modular systems have been difficult to install securely to roof structures constructed of standard roofing materials and have often resulted in damage to the roofing structure.
In addition, there is an ever-increasing demand for "alternative" energy (i.e., non-fossil fuel energy) sources due to the political ramifications, limitations and environmental concerns associated with existing fossil fuel sources of energy. This demand possibly could be satisfied at least in part by using solar energy as an alternative energy source, except that many communities prohibit the mounting of conventional photovoltaic elements on the front (visible) roofs of small commercial and residential roof structures.
Previously, photovoltaic elements have been deployed in a wide variety of ways, including deployment on the roofs of buildings, including private residential homes. However, such photovoltaic elements have not been capable of being securely mounted onto roof structures constructed of standard roofing materials in an aesthetically pleasing manner, thereby placing a limitation on the usage of photovoltaic elements in a variety of locations where solar energy could otherwise be collected.

Bracket, method of making, and method of mounting rooftop elements on rooftop structure


A duct connected to an air-conditioning apparatus includes a portion positioned closer to a side window than a console when viewed from above. A tray is arranged on the console on a side close to the side window, and covers an area above the duct. A lower end of the side window is positioned lower than an upper end of the console positioned on the side close to the side window in terms of height from a floor surface. The tray is positioned on or below an imaginary straight line A-A connecting the upper end to the lower end of the side window, and is not positioned above imaginary straight line A-A. Accordingly, high visibility can be ensured in an obliquely downward direction lateral to an operator while a satisfactory aesthetic appearance of indoor space in a cab is maintained.

In recent years, an air-conditioning apparatus has been arranged in a cab (operator's compartment) in order to improve working environment of an operator of a construction machine. The air conditioned by this air-conditioning apparatus is supplied through a duct to a prescribed outlet inside the cab. If this duct is exposed to the inside of the cab, the aesthetic appearance of indoor space in the cab is compromised.
Such a duct arranged in a cab is disclosed in Japanese Patent Laying-Open No. 2005-178480 (Patent Document 1), for example. In Japanese Patent Laying-Open No. 2005-178480, a duct is arranged so as to extend in a front-rear direction between a console and a side portion of a cab. A panel body extending longitudinally in the front-rear direction of the cab is provided above the duct.

Cab for construction machine and construction machine


A numeric keypad (100) for entering ideographic characters is provided. The numeric keypad (100) comprises a first set of input keys (102) corresponding to numerals 1, 2, 3, 4, and 5, and a second set of input keys (104) corresponding to numeral 6, 7, 8, 9, and 0. Each of the first set of input keys (102) has a predefined single character stroke, which complies with the GB18031 standard. The second set of input keys (104) is assigned a first particular sequence of the predefined single character strokes and a second particular sequence of the predefined single character strokes different from the first particular sequence of the predefined single character strokes.

To standardize input methods for selecting Chinese characters in mobile devices, the Chinese Government has promulgated a national standard, GB18031, for inputting Chinese characters, and a national standard GB18030 specifying available Chinese characters. Under the GB18031 standard, a numeric keypad of a mobile device has a set of predefined keys from 1 through 5, each of which has a particular Chinese character stroke associated with it. To select a desired Chinese character from the available Chinese characters, one or more of the GB18031 standard predefined numeric keys 1 through 5 are sequentially pressed and the corresponding strokes are entered. A set of Chinese characters matching the entered sequence of strokes is progressively narrowed after each stroke entry. The desired Chinese character is finally selected when a sufficient number of strokes to define the desired Chinese character has been entered such that the set of Chinese characters matching the entered strokes is small enough for a user to easily select the desired Chinese character. Although, the predefined numeric keys 1 through 5 of the GB18031 standard are adequate in selecting a desired Chinese character from the available Chinese characters, it requires multiple key strokes, each of which provides a single corresponding Chinese character stroke, to narrow candidate Chinese characters matching the entered stroke sequence sufficient enough such that a user can finally select the desired Chinese character.

Numeric keypad having keys assigned multiple-strokes for ideographic character input


The present invention is directed to serve ligand screening apparatuses, ligand screening methods, programs and a recording medium for studying the binding analysis between a receptor including an induced-fit type receptor and a ligand. First, analysis and calculation of normal mode are conducted, and then fluctuation of a dihedral angle of a main chain in a steady state is calculated. Then by carrying out a molecular dynamic calculation while imposing constraint on each atom based on the fluctuation, a dynamic structure of the receptor is predicted more accurately. By using the dynamic structure obtained in the molecular dynamic calculation and an interaction function, receptor/ligand binding which is also applicable to an induced-fit type receptor is predicted with high accuracy.

Proteins required for maintenance of biological functions such as enzymes and receptors have properties called "substrate specificity", and such proteins are classified into "Lock&Key" type wherein an active site constantly remains unchanged to details of structure of substrate molecule, and "Induced-Fit" (induced-bonding) type wherein an active site is in a random inactive state in the absence of a substrate, and the active site changes into an active state in the presence of a substrate for capturing the coming substrate. By the term induced-fit type, such a receptor is contemplated that the 3D structure of a ligand binding site changes in binding with a ligand to allow intake of the ligand.
As a computational chemical technique for screening for ligand molecules using a 3D structure of a protein, 3D compound database screening (Virtual Screening) as reported in AutoDocK ("Morris, G. M. Goodsell, D. S. Halliday, R. S. Huey, R. Hart, W. E. Belew, R. K. Olson, A. J. (1998) Automated docking using a Lamarckian genetic algorithm and an empirical biding free energy function. J. Comput. Chem. 19:1639-1662; Goodsell, D. S. Morris, G. M. Olson, A. J. (1996) Automated docking of flexible ligands: applications of AutoDock. J. Mol. Recognit, 9: 1-5"), DOCK ("Ewing, T. J. I Makino, S. Skillman, A. G. Kuntz I. D. (2001) DOCK 4.0: search strategies for automated molecular docking of flexible molecule databases. J. Comput. Aided Mol. Des. 15: 411-28"), FlexX ("Rarey, M, Kramer, B, Lengauer, T, Klebe G. (1996) A fast flexible docking method using an incremental construction algorithm. J. Mol. Biol. 261: 470-89; Rarey, M. Wefing, S. Lengauer, T. (1996) Placement of medium-sized molecular fragments into active sites of proteins. J. Comput. Aided Mol. Des. 10: 41-54"), GOLD ("Jones, G. Willett, P. Glen, R. C. (1995) Molecular recognition of receptor sites using a genetic algorithm with a description of desolvation. J. Mol. Biol. 245:43-53; Jones, G. Willett, P. Glen, R. C, Leach, A. R. Taylor, R. (1997) Development and validation of a genetic algorithm for flexible docking. J. Mol. Biol. 267: 727-48"), ADAM&EVE ("Mizutani, M. Y. Itai, A. (2004) Efficient method for high-throughput virtual screening based on flexible docking: discovery of novel acetylcholinesterase inhibitors. J. Med. Chem. 47: 4818-4828") are known. These are also called "High-performance docking study" and enable a mass-scale compound library screening. However, the ability of these techniques to predict binding conformation and binding energy is poor because rough approximation is used for evaluation. In addition, since they fail to consider computational expression parameters corresponding to "induced-binding" which is very important for binding between a protein and a ligand, and even if such consideration is made, it is to such an extent that random numbers are generated and side chains of receptor are moved, and accuracy of the computation result is not sufficient.
As a method for simulating "induced-binding" which is important for binding between protein and ligand, MD (molecular dynamic calculation), MM (molecular mechanical calculation), and MC (Monte Carlo method) are known. These methods provide relatively high accuracy, and enable prediction of binding conformation and binding energy. Here, the technique called "molecular dynamic method (MD)" calculates dynamic structure of a molecule by sequentially solving dynamic equation based on the classical dynamics for each atom constituting the molecule, and enables the simulation of dynamic behavior of a protein with high accuracy. However, it is not necessarily a useful means because it requires significant time for calculation and has difficulty in handling many molecules. Further, molecular dynamic calculation executed for a target protein according to such a conventional method results in a protein 3D structure whose coordinates are largely different from those analyzed by X-ray, NMR and the like. Although such a difference includes a physicochemical description of dynamic behavior of a protein, it sometimes behaves contradictorily to an experimental result of dynamic behavior proved by NMR or the like, and hence it often fails to provide an accurate simulation result.
As described above, in respect of the conventional "in silico screening", since computational expression parameters corresponding to "induced-binding" which is very important for binding between protein and ligand are not sufficiently considered, it does not deem that the accuracy of the calculation result is adequate.
On the other hand, in molecular simulation, it is possible to express and analyze the above induced-binding; however, significant time is required for obtaining an accurate result. Many results will be influenced by the initial structure coordinates.
Inventors of the present invention examined the way of screening for a ligand that will bind to a target protein when the 3D structure of a certain protein is given. As described above, some currently available receptor-ligand binding analyzing software takes flexibility of a ligand into account, but most of such software fails to consider flexibility of a receptor. Even though there is software that considers flexibility of a receptor, such consideration just moves a side chain of the receptor by generation of random numbers, and most of the software are dedicated to a Lock&Key type receptor. In such circumstances, we attempted to develop receptor-ligand binding analyzing software dedicated to an Induced-Fit type receptor.
The problem to be solved by the present invention is to provide a ligand screening apparatus, a ligand screening method, a program and a recording medium capable of screening for a ligand that binds to a certain protein which is a particularly important key to development of agricultural chemicals and pharmaceuticals and the like, with significantly higher efficiency and accuracy than conventional methods. It is also an object to provide a ligand screening apparatus, a ligand screening method, a program and a recording medium which carry out various modifications of ligand molecules and modifications of proteins such as receptors rapidly and effectively. It is also an object of the present invention to clarify a mode of interaction between a ligand and a protein and make the recognition mechanism of the interaction clear, thereby identifying a cause of disease, and promoting development of related drugs.

Ligand searching device, ligand searching method, program, and recording medium