A semiconductor producing apparatus is capable of quickly and accurately changing a controlled variable to a target value to thereby make the controlled variable quickly follow the target value. Moreover, the controlled variable and target value can be adjusted automatically, thus improving the productivity of a process. The semiconductor producing apparatus includes a PID adjustment section to which a target value and a detected control value are inputted through an adder, a pattern generation section having an approximate function for calculating a pattern output and making it possible to change the pattern output in accordance wit parameter values of the approximate function, and a switcher for switching between an output including at least an output of the pattern generation section and an output of the PID adjustment section to thereby generate an output.

1. Field of the Invention
The present invention relates to a semiconductor producing apparatus equipped with a heat treatment device such as a diffusion devices a CVD, etc., capable of heat-treating semiconductor wafers in batches, and it also relates to a temperature control method for such a semiconductor producing apparatus.
2. Description of the Related Art
In a heat treatment device for a semiconductor producing apparatus such as a diffusion device, a CVD, etc., having an electric furnace for example, it is necessary to maintain the temperature of the electric furnace at an appropriate temperature, or make the interior of the electric furnace follow a dictated temperature change. Such a temperature control is required to have high precision or high performance with respect to compensation against external disturbances, and followability against a change in a target temperature. Conventionally, a control method as illustrated in FIG. 28 for example has been used for the temperature control on such a heat treatment device.
The control method of FIG. 28 employs an adder 1 having a target temperature input end IN and outputting a deviation or diference between a target temperature inputted to the target temperature input end IN and a detected temperature (controlled quantity or variable) from a heat treatment furnace 3 to be described later, a PID adjuster in the form of a PID adjustment section 2 provided at an output side of the adder 1 for performing PID calculations (e.g., proportioning, integrating and differentiating calculations) based on an output of the adder 1 and outputting a manipulated quantity or variable for the heat treatment furnace or device 3 thus calculated, and the heat treatment furnace 3 provided at an output side of the PID adjustment section 2 and having an input end a for receiving an output of the PID adjustment season 2 as a manipulated variable and an output end h for outputting the detected temperature (controlled variable), whereby the detected temperature (controlled variable) outputted from the output end b of the heat treatment furnace 3 can be controlled to a desired value.
The PID adjustment section 2 may include, as required, a known function of coping with integration anti-wind-ups or bumpless technique. The heat treatment furnace 3 among various components of FIG. 28 is schematically configured as illustrated in FIGS. 29(a) for example. Specifically, the heat treatment furnace 3 of FIG. 29(a) includes an electric furnace 31 having an input end a for inputting a manipulated quantity or variable, an output end b for outputting a controlled variable and an introduction port through which semiconductor wafers are to be introduced or loaded into the electric furnace 31, a boat 32 for holding the semiconductor wafers in the electric furnace 31, a cap 33 for closing the introduction port of the electric furnace 31 and supporting the boat 32, a heater 34 adapted to be supplied, though not shown, with electric power in response to a control signal from the input end a to heat the interior of the electric furnace 31, and a temperature sensor 35 for detecting the temperature of the interior of the electric furnace 31 and outputting the detected temperature to the output end b, whereby the interior temperature of the electric furnace 31 is controlled to follow or maintain a specific temperature pattern, thus chemically processing the semiconductor wafers held by the boat 32.
Also, for the purpose of temperature control, the electric furnace 31 as representatively illustrated in FIGS. 20(a) and 29(b) has a heating element divided into a plurality of heating zones to each of which electric power is supplied independently of each other to control the temperature thereof. For example, in the case of FIG. 29(a), the heating element takes, if divided into four zones, such a configuration as shown in FIG. 30.
Similar to FIG. 29(a), the heat treatment furnace 3A of FIG. 30 includes, as its constructional components, an electric furnace 31, a boat 32, a cap 33 and a heater 44. The heater 44, being divided into four sections, is constructed such that it is provided with four manipulated variable input ends a1 through a4, a temperature sensor 45 for measuring the temperatures of the respective four-divided zones, and four controlled variable output ends b1 through b4 corresponding to the four zones a1 through a4, respectively.
In the following description, a collection of components provided in a route extending from the manipulated variable input end a1 to the controlled variable output end b1 may be designated at zone 1, and similarly, another collection of components in another route from a2 to b2, a further collection of components in a further route from a3 to b3 and so on may be respectively designated at zone 2, zone 3 and so on.
In the case of a heat treatment furnace of the configuration having a plurality of heating zones, for example four-divided zones as illustrated in FIG. 30, there has often been used a control scheme in which the configuration of FIG. 28 is simply formed into a plurality of heating zones in parallel with each other, as illustrated in FIG. 31. The heat treatment furnace 3A among the components of FIG. 31 has four manipulated variable input ends at through a4 and four manipulated variable output ends b1 through b4, as shown in FIG. 30. Here, reference symbols 1-1 through 1-4 designate a plurality of parallel adders, and reference symbols 2-1 through 2-4 designate a plurality of parallel PID adjustment sections.
The heat treatment furnaces as illustrated in FIGS. 30 and 31 carry out a process treatment in accordance with a temperature control procedure as shown in FIGS. 32(a) and 32(b) for example.
Here, a description will be made of an example of the process treatment carried out by such a conventional heat treatment furnace described above, while referring to FIGS. 32(a) and 32(b). FIG. 32(a) is a flowchart illustrating such an example of heat treatment carried out by the above-mentioned heat treatment furnace, and FIG. 32(b) schematically shows the temperature of the heat treatment furnace during the heat treatment. In FIG. 32(b), symbols designate processings indicated by the same symbols in FIG. 32(a).
In FIG. 32(a), a step S101 is to maintain and stabilize the temperature in the interior of the electric furnace 31 at a relatively low temperature T0. In step S101, the boat 32 has not yet been introduced into the electric furnace 31. A step 8102 is to introduce or load the boat 32 holding semiconductor wafers into the electric furnace 31. As a result of the boat 32 having been loaded into the electric furnace 31, due to the fact that the semiconductor wafers are generally lower in temperature than the temperature T0 of the electric furnace 31, the temperature of the electric furnace 31 temporally becomes lower than the temperature T0, but it is restored and stabilized to that temperature T0 in a certain period of time under the above-described temperature control.
A step S103 is to gradually raise the temperature of the electric furnace 31 from the temperature T0 to a temperature T1, which is suitable for a process treatment such as a film forming treatment on the semiconductor wafers (e.g., forming a thin layer or film on each semiconductor wafer). A step S104 is to maintain and stabilize the Interior temperature of the electric furnace 31 at the temperature T1 in order to perform a process treatment on the semiconductor wafers. A step S105 is to gradually lower, after the process treatment having been finished, the temperature of the electric furnace 31 from the temperature T1 to the relatively lower temperature T0. Thereafter, a step S106 is carried out which is to take the boat 32 holding the process-treated semiconductor wafers out of the electric furnace 31 for replacement of the process-treated wafers with new untreated wafers. All of these series of processings from step S101 to step S106 are then performed on all the untreated wafers.
When all the semiconductor wafers have been subjected to the process treatment, the series of temperature control is finished but otherwise, the semiconductor wafers on the boat having been process-treated are replaced with new untreated wafers, and the flow or process is again returned to the step S101, and the processings from step S101 to S106 are again repeated. Here, note that the processings in steps S101, S102, S104 and S106 are allowed to proceed to the following steps, respectively, after a stable state of temperature is attained in which the interior temperature of the electric furnace 31 is in a predetermined limited temperature range with respect to the target temperature and such a temperature condition continues for a predetermined period of time.
With the use of the conventional temperature control system and method as described above and illustrated in FIG. 28 or FIG. 31, however, there arises the following problem. Specifically, in the event that the target temperature rapidly changes, it becomes impossible to maintain the detected temperature (controlled variable), giving rise to a delay in the process of the controlled variable to follow the target value, as a consequence of which it takes a long time until the controlled variable reaches an allowable range with respect to the target value, thus attaining a stable state.
For example, it is necessary to finish in a short period of time the step S103 in the process treatment as illustrated in FIGS. 32(a) and 32(b) in order to enhance the time-related production efficiency of the entire heat treatment system. For this reason, it is desired to increase the rising speed of the target value, so the delay in following the target value according to the conventional temperature control system and method as referred to above becomes too great to be ignored.
In order to solve this problem, there has been known another method which is capable of improving the followability without impairing control preciseness by performing control according to a configuration as shown in FIG. 33.
The control blocks shown in FIG. 33 includes, as like components of FIG. 28, a target value input end IN, an adder 1, a PID adjustment section 2 and a heat treatment furnace 3, and as different components therefrom, a pattern generator in the form of a pattern generation section 5 for outputting, as a controlled variable for the heat treatment furnace 3, an optimal signal which is deemed suited as such, a switch in the form of a switcher 6 for selecting either one of an output of the PID adjustment section 2 and an output of the pattern generation section 5 in response to a switch control signal and outputting it as a manipulated variable, and a switch control section 7 for supervising the output of the adder 1 and outputting a switch control signal to control the switcher 6 in correspondence with a specific condition (e.g., a later-mentioned predetermined point of time, or a later-mentioned change in the output of the adder 1 exceeding a predetermined value), whereby the detected temperature (controlled variable) outputted from the output end b of the heat treatment furnace 3 is properly controlled. The pattern generation section 5 and the switch control section 7 each incorporate therein a clock timed to indicate the same time point and store a period of time from the beginning of temperature control to the time when a rapid change in the target value has occurred, from which one can know the exact time point of such a rapid change.
In the control method carried out by the control blocks shown in FIG. 33, feed-back control is carried out on the target temperature from the target input end IN and the detected temperature (controlled variable) from the output end b of the heat treatment furnace 3, which is a control target, by means of the adder 1 and the PID adjustment section 2. When an abrupt change in the target value from the target input end IN takes place, the switch control section 7 outputs a switch control signal to the switcher 6, whereby the output of the switcher 6 is switched from the PID adjustment section 2 side to the pattern generation section 5 side. As a result, open loop control is started in accordance with the output of the pattern generation section 5. At a predetermined point in time at which the output of the adder 1 again becomes nearly zero, the switch control section 7 outputs a switch control signal to the switcher 6 again, so that the output of the switcher 6 is switched over from the pattern generation section 5 side to the PID adjustment section 2 output side, thus resuming feed-back control.
More specifically, according to the control method shown in FIG. 33, when the target value has abruptly changed as in step S103 of the process treatment of FIGS. 32(a) and 32(b) for example, the switch control section 7 expects or forecasts the time point of such an abrupt change beforehand, and switches, at the expected time point, the output of the switcher 6 from the PID adjustment section 2 side to the pattern generation section 5 side, so that an optimal signal is outputted from the pattern generation section 5 at an appropriate timing, thereby temporally cutting off the feed-back loop to carry out open-loop control for improved followability. Thereafter, at a time point at which the output of the adder 1 is expected to become substantially zero, or when the output of the adder 1 actually becomes substantially zero through supervision thereof, the output of the switcher 6 can be switched to the output of the PID adjustment section 2, thus enabling the same feedback control as conventionally done.
In this connection, it is to be noted that the control method performed by the control blocks as shown in FIG. 33 can be similarly applied to another control method carried out by control blocks illustrated in FIGS. 34 and 35. Here, the control blocks of FIG. 34 further include a second PID adjustment section 12 provided at a downstream side or stage of the switcher 6 in the control blocks of FIG. 33, and a second adder 4 disposed between the switcher 6 and the second PID adjustment section 12 for feeding back a second detected temperature value (auxiliary controlled variable) to form a feed-back loop 20 for cascade control. In this case, the heat treatment furnace 3 is constructed as illustrated in FIG. 29(b), but it is further provided with a second output end c for outputting the second detected temperature value (auxiliary controlled variable) in addition to a first output end b for outputting a first detected temperature value (main controlled variable). Here, note that the first and second detected temperature values are obtained by detecting the interior temperature of the reaction tube and the temperature in the vicinity of the heater, respectively, According to this method, when the response of the heat treatment furnace 3 has changed, such a change can be alleviated by the feed-back loop 20 to enhance the control response through effective utilization of the auxiliary controlled variable, thereby improving overall control performance of the system.
Moreover, a control block configuration shown in FIG. 35 has a second adder 14 and a second PID adjustment section 15 both disposed between the pattern generation section 5 and the switcher 6 in the control blocks of FIG. 33 to form a feed-back loop 21.
With this method, a controlled variable can be outputted to the heat treatment furnace 3 while adjusting the output of the pattern generation section 5 based on the feed-back control of the second detected temperature value (auxiliary controlled variable), so that a manipulated variable can be properly and adjustably controlled based on the actual control target, thereby alleviating a change thereof, In this regard, note that the output of the pattern generation section 5 is given by outputting a recorded value stored in a memory and the like.
In cases where control is effected using the pattern generation section of the configuration as illustrated in FIGS. 33 through 35, however, it is necessary for a specific skilled engineer to repeatedly effect the process treatments as illustrated in FIGS. 32(a) and 32(b) a number of times so as to adjust the output (i.e., stored values) of the pattern generation section 5, thus requiring a lot of labor and time. Besides, such adjustments are varied depending upon the skill of the engineer, differences among individuals, etc., so control quality after adjustments varies according to the adjusting person.
In particular, in cases where a plurality of control blocks as illustrated in FIGS. 33 through 35 are connected in parallel with each other as in the control blocks of FIG. 31 comprising a plurality of control blocks as shown in FIG. 28, there arises another problem that the outputs of the plurality of pattern generation sections 5 have to be adjusted, requiring a still longer time of adjustment and further increasing variations in the controlled variable. Moreover, if the output of each pattern generation section 5 is to be obtained from the previously stored values, a further problem will arise in that a tremendous capacity of memory is required.
In view of the above, the present invention is intended to obviate the above-mentioned various problems encountered with the prior art, and has for its object to provide a novel and improved semiconductor producing apparatus and a temperature control method therefor which are capable of making a detected temperature (controlled variable) follow a target value so as to be maintained at that value even if there takes place a rapid change in the target temperature.
Another object of the present invention is to provide a novel and improved semiconductor producing apparatus and a temperature control method therefor which do not require a great memory capacity.
Bearing the above objects in mind, according to a first aspect of the present invention, there is provided a semiconductor producing apparatus with a temperature control system, comprising: an adjuster for receiving a target value and a detected control value through an adder; a pattern generator having an approximate function for calculating a pattern output and capable of changing the pattern output in accordance with parameters of the approximate function; and a switch for switching between an output at least including the output of the pattern generator and an output of the adjuster to generate an output.
In a preferred form of the invention, the semiconductor producing apparatus further comprises an external disturbance adjuster for receiving the target value and the detected control value through another adder and generating an output which is to be added to the output of the pattern generator so as to adjust it against an external disturbance.
Such an arrangement is achieved, for example, by adding an output of an adjuster (external disturbance adjuster 202) to an output of a pattern generation section 8E, as shown in FIGS. 23 through 26.
According to a second aspect of the present invention, there is provided a semiconductor producing apparatus with a temperature control system, comprising: an adjuster provided with an I adjusting section for receiving a target value and a detected control value through an adder; a pattern generator having an approximate function for calculating a pattern output and capable of changing the pattern output in accordance with parameters of the approximate function; and a switch for switching between an output including the output of the pattern generator and an output of the adjuster including the I adjusting section to generate an output.
Here, the adjuster provided with an I adjusting section is indicated by reference numerals 201, 201A in FIGS. 23 through 26.
According to a third aspect of the present invention, there is provided a semiconductor producing apparatus with a temperature control system, comprising: a first adjuster for receiving a target temperature value of a heat treatment furnace and a first detected temperature value from the heat treatment furnace through an adder, a pattern generator having an approximate function for calculating a pattern output and capable of changing the pattern output in accordance with parameters of the approximate function; and a switch for switching between the output of the pattern generator and an output of the first adjuster to generate an output as a manipulated variable to the heat treatment furnace.
Such an arrangement is shown, for example, in FIG. 1 in which it includes a first adjuster (PID adjustment section 2) for receiving a first detected temperature value (output at b) from a heat treatment furnace 3, a pattern generator (pattern generation section 8), and a switch (switcher 6) for switching between outputs of the first adjuster (PID adjustment section 2) and the pattern generator (pattern generation section 8).
According to a fourth aspect of the present invention, there is provided a semiconductor producing apparatus with a temperature control system, comprising: a first adjuster for receiving, through a first adder, a target temperature value of a heat treatment furnace and a first detected temperature value from the heat treatment furnace; a pattern generator having an approximate function for calculating a pattern output and capable of changing the pattern output in accordance with parameters of the approximate function; a switch for switching between the output of the pattern generator and an output of the first adjuster to generate an output; and a second adjuster provided at an output side of the switch for receiving, through a second adder, the output of the switch and a second detected temperature value from the heat treatment furnace and generating an output as a manipulated variable to the heat treatment furnace.
Such an arrangement is shown in FIG. 9 in which a PID adjuster (second adjuster) 12 is illustrated as receiving an output of an adder (first adder) 6 via another adder (second adder) 4 and generating an output as a manipulated variable to a heat treatment furnace 3B.
According to a fifth aspect of the present invention, there is provided a semiconductor producing apparatus with a temperature control system, comprising: a first adjuster for receiving, through a first adder, a target temperature value of a heat treatment furnace and a first detected temperature value from the heat treatment furnace; a pattern generator having an approximate function for calculating a pattern output and capable of changing the pattern output in accordance with parameters of the approximate function; a second adjuster for receiving, through a second adder, the output of the pattern generator and a second detected temperature value from the heat treatment furnace; and a switch for switching between an output of the second adjuster and an output of the first adjuster to generate an output as a manipulated variable to the heat treatment furnace.
Such an arrangement is shown in FIG. 19 in which the first adjuster is illustrated as a PID adjustment section 2, and the second adjuster is illustrated as a PID adjustment section 12A.
According to a sixth aspect of the present invention, there is provided a semiconductor producing apparatus with a temperature control system, comprising: a third adjuster provided with an I element and a fourth adjuster unprovided with an I element each for receiving, through a first adder, a target temperature value of a heat treatment furnace and a first detected temperature value from the heat treatment furnace, a pattern generator having an approximate function for calculating a pattern output and capable of changing the pattern output in accordance with parameters of the approximate function; a switch for switching between an output at least including an output of the third adjuster and a sum of the output of the pattern generator and an output of the fourth adjuster; and a second adjuster for receiving, through a second adder, the output of the switch and a second detected temperature value from the heat treatment furnace and generating a manipulated variable to the heat treatment furnace.
Such an arrangement is shown in FIG. 23 or FIG. 24, in which the third adjuster provided with an I element is illustrated as an I adjustment section 201 or a PID adjustment section 201A, and me fourth adjuster unprovided with an I element is illustrated as a PD adjustment section 202. Also, the switch is illustrated as a switcher 203 and an adder 204 in FIG. 23, and as an adder 205 and a switcher 6 in FIG. 24.
According to a seventh aspect of the present invention, there is provided a semiconductor producing apparatus with a temperature control system, comprising: a third adjuster provided with an I element and a fourth adjuster unprovided with an I element each for receiving, through a first adder, a target temperature value of a heat treatment furnace and a first detected temperature value from the heat treatment furnace to generate an adjuster output; a pattern generator having an approximate function for calculating a pattern output and capable of changing the pattern output in accordance with parameters of the approximate function; a second adjuster for receiving, through a second adder, a sum of an output of the fourth adjuster and the output of the pattern generator, and a second detected temperature value from the heat treatment furnace; and a switch for switching between an output of the third adjuster and an output of the second adjuster to generate an output as a manipulated variable to the heat treatment furnace.
Such an arrangement is shown in FIG. 25 in which the third adjuster is illustrated as a PID adjustment section 201A, the fourth adjuster as a PID adjustment section 202, and the second adjuster as a PID adjustment section 12E, and a switcher 6 serves to switch over between outputs of the two PID adjustment sections 12E, 201A.
According to an eighth aspect of the present invention, there is provided a semiconductor producing apparatus with a temperature control system, comprising: a third adjuster provided with an I element and a fourth adjuster unprovided with an I element each for receiving, through a first adder, a target temperature value of a heat treatment furnace and a first detected temperature value from the heat treatment furnace; a pattern generator having an approximate function for calculating a pattern output and capable of changing the pattern output in accordance with parameters of the approximate function; a switch for switching among an output of the third adjuster, a sum of an output of the fourth adjuster and the output of the pattern generator, and the output of the pattern generator, and a second adjuster for receiving, through a second adder, the output of the switch and a second detected temperature value from the heat treatment furnace and generating an output as a manipulated variable to the heat treatment furnace.
Such an arrangement is shown in FIG. 26 in which a switch (switcher 6E) serves to switch over between an output of the fourth adjuster (PD adjustment section 202), an output of a pattern generator (pattern generation section 8E), and a summed output formed of an output of the third adjuster (PID adjustment section 201A) and an output of the pattern generator (pattern generation section 8E) whereas the second adjuster (PID adjustment section 12E) outputs a manipulated variable to a heat treatment furnace 3 bas on an output of the switch (switcher 6E) and a second detected temperature value (output at c) inputted thereto via a second adder 4E.
In another preferred form of the invention, the fourth adjuster unprovided with an I element comprises a PD adjuster, and the third adjuster provided with an I element comprises an adjuster including a PID factor or a PI factor or an adjuster including an I element alone.
In a further preferred form of the invention, the first detected temperature value is an average value obtained by averaging temperature values detected at a plurality of locations of an object to be controlled with a predetermined ratio.
Such an arrangement is shown in FIG. 8 in which an averaging section 17 serves to average temperature values detected at a plurality of locations of an object (heat treatment furnace 3B) to be controlled with a predetermined ratio.
In a yet further preferred form of the invention, the semiconductor producing apparatus further comprises a parameter compensator for generating a compensation value which is used for compensating the parameters of the approximate function of the pattern generator based on the first detected temperature value.
In a still further preferred form of the invention, the parameter compensator sets an evaluation value E having a correlation with the parameters of the approximate function and evaluating whether the temperature control is good or bad, previously determines an interference matrix M (Mxc3x97xcex94P=xcex94E) representative of a relation between a minimal change xcex94P of a parameter P and a minimal change xcex94E of the evaluation value E which is caused by the minimal change xcex94P given to the parameter P, and calculates, as a parameter compensation value, such an amount of change of the parameter P as to make the evaluation value E to be a desired value by using the interference matrix M.
In a further preferred form of the invention, the semiconductor producing apparatus further comprises a parameter compensator for generating a compensation value which is used for compensating the parameters of the approximate function of the pattern generator based on the first detected temperature value, wherein the parameter compensator has an interference matrix M for calculating, as a parameter compensation value, such an amount of change in a parameter as to make the evaluation value lo be a desired value, the interference matrix having, as its factors, transfer gains each representative of a relation between a manipulated variable to the heat treatment furnace and the detected temperature value from the heat treatment furnace, whereby the parameter is compensated by the parameter compensation value thus obtained, so that the pattern generator generates a functional output by use of the compensated parameter, the switch being operable to select the output of the adjuster when a change of the target value over time is relatively limited, and the output of the pattern generator when a change in the target value over time is relatively great, so as to use it for control operation.
In a further preferred form of the invention, the semiconductor producing apparatus further comprises a parameter compensator for generating a compensation value which is used for compensating the parameters of the approximate function of the pattern generator based on the first detected temperature value; wherein the parameter compensator has an interference matrix M for calculating, as a parameter compensation value, such an amount of change in a parameter as to make an evaluation value E, which has a correlation with the parameter, to be a desired value; the interference matrix M is calculated by the following formula;
M=(Eu+Gxc3x97Kp)xe2x88x921xc3x97G
where G is a matrix having, as its factors, transfer gains each representative of a relation between a manipulated variable to the heat treatment furnace and the detected temperature value from the heat treatment furnace; and Kp is a diagonal matrix having, as its diagonal factors. constants of a P factor of the fourth adjuster inclusive of no integral factor; and Eu is an unit matrix; the parameter is compensated by the parameter compensation value thus obtained, so that the pattern generator generates a functional output by use of the compensated parameter; and the switch is operated to select the output of the adjuster when a change of the target value over time is relatively limited, and the output of the pattern generator when a change in the target value over time is relatively great, so as to use it for control operation.
In a further preferred form of the invention, upon switching of the adjuster, the output of the switch immediately after the switching is adjusted based on the output of the switch immediately before the switching, for example as shown in FIGS. 17 and 18.
In a further preferred form of the invention, when the output of the switch is switched over from the output of the first adjuster into the output of the pattern generator, the output of the pattern generator is adjusted in accordance with the output of the first adjuster immediately before the switching, for example as shown in FIG. 18.
In a further preferred form of the invention, when the output of the adjuster is switched over from the output of the first adjuster into the output of the second adjuster, the output of the pattern generator is adjusted in accordance with the output of the second detected temperature value immediately before the switching, for example as shown in FIG. 22.
In a further preferred form of the invention, the object to be controlled is a temperature in the heat treatment furnace; in a temperature control process in which the temperature in the heat treatment furnace is raised to a process temperature, the approximate function f of the pattern generator is expressed as follows;
ƒ(txe2x88x92t0, TIi, YIi, YGi, YFi)
  =                              Max          ,                                                  t            0                    ≤          t           less than                                     t              0                        +                          TI              i                                                                                YI              i                        +                                          YG                i                            ·                              (                                  t                  -                                      t                    0                                                  )                                              ,                                                                t              0                        +                          TI              i                                ≤          t           less than                       t            2                                                        Min          ,                                                  t            2                    ≤          t
where t is a time variable; t0 is a start time at which the target temperature begins to rise; t2 is a time at which the function (YIi+YGixc2x7(txe2x88x92t0)) reaches YF1; and TIi, YIi, YGi and YFi are parameters.
In a further preferred form of the invention, the object to be controlled is a temperature in the heat treatment furnace; in a temperature control process in which the temperature in the heat treatment furnace is raised to a process temperature, the approximate function ƒ of the pattern generator is expressed as follows;
ƒ(txe2x88x92t0, YIi, YGi, YFi)
  =                                                        YI              i                        +                                          YG                i                            ·                              (                                  t                  -                                      t                    0                                                  )                                              ,                                                  t            0                    ≤          t           less than                       t            2                                                                    YF            i                    ,                                                  t            2                    ≤          t
where t is a time variable; t0 is a start time at which the target temperature begins to rise; t2 is a time at which the function (YIi+YGixc2x7(txe2x88x92t0)) reaches YFi; and YIi, YGi and YFi are parameters.
In a further preferred form of the invention, the object to be controlled is a temperature in the heat treatment furnace; in a temperature control process at the time when a boat is loaded into the heat treatment furnace, the approximate function ƒ of the pattern generator is expressed as follows;
ƒ(txe2x88x92t0, YIi, YGi)=YIi+YGixc2x7(txe2x88x92t0), t0xe2x89xa6t
where t is a time variable; t0 is a start time at which the boat begins to be loaded into the furnace; and YIi and YGi are parameters.
In a further preferred form of the invention, the object to be controlled is a temperature in the heat treatment furnace; in a temperature control process at the time when a boat is loaded into the heat treatment furnace, the approximate function ƒ of the pattern generator is expressed as follows;
ƒ(txe2x88x92t0, xcex94YIi, YGi)=xcex94YIi+YGixc2x7(txe2x88x92t0)+Y0, t0xe2x89xa6t, i=1,2 . . . , M
where t is a time variable; t0 is a start time at which the boat begins to be loaded into the furnace; xcex94YIi is a difference between YIi and Y0 upon switching; and Y0 is an output value of the first adjuster upon switching.
In a further preferred form of the invention, the object to be controlled is a temperature in the heat treatment furnace; in a temperature control process in which the temperature in the heat treatment furnace is raised to a process temperature, the approximate function of the pattern generator is expressed as follows;
ƒ(txe2x88x92t0, xcex94YIi, YGi, xcex94YFi)
  =                                                        Δ                                            xe2x80x83                                                          YI                i                                      +                                          YG                i                            ·                              (                                  t                  -                                      t                    0                                                  )                                      +                          Y              0                                ,                                                  t            0                    ≤          t           less than                       t            2                                                                                Δ                                            xe2x80x83                                                          YF                i                                      +                          Y              0                                ,                                                  t            2                    ≤          t
where t is a time variable; t0 is a start time at which the target temperature begins to rise; t2 is a time at which the function (YIi+YGixc2x7(txe2x88x92t0)) reaches YF1; xcex94YIi is a difference between YIi and Y0); xcex94YFi is a difference between YFi and Y0; and Y0 is an output value of the first adjuster upon switching.
With the semiconductor producing apparatus as described above, even if there takes place an abrupt change in the target temperature value, it is possible to make the detected temperature value (controlled variable) quickly follow the target temperature value so as to be maintained at that temperature. As a result, the time-related production efficiency can be improved, and a semiconductor producing apparatus can be provided which does not require any tremendous memory capacity.
According to a ninth aspect of the present invention, there is provided a temperature control method for a semiconductor producing apparatus wherein upon determining the interference matrix, a heat treatment is carried out to obtain a first evaluation value for a prescribed evaluation item with a specified parameter being temporally set to a first value, then another heat treatment is carried out to obtain a second evaluation value for the prescribed evaluation item with the specified parameter being temporally set to a second value, and an interference matrix is previously calculated based on the temporally set first and second values and the first and second evaluation values; upon compensating the specified parameter, a third evaluation value is determined by effecting a further heat treatment after the determination of the interference matrix, so that a compensated value of the specified parameter is calculated based on a difference between the thus determined third evaluation value and a desired evaluation value using the interference matrix to thereby compensate the specified parameter, and generates, as the output of the pattern generator, a functional output using the compensated specified parameter; and upon performing temperature control, in the case where a change in the target value over time is relatively limited, the output of the adjuster is selected for use with control operation, whereas in the case where a change over time of the target value is relatively large, the output of the pattern generator is selected for use with control operation.
In a further preferred form of the invention, the compensated specified parameter is further compensated based on a difference between an actually measured evaluation value obtained upon the heat treatment using the compensated parameter and a desired evaluation value.
In a further preferred form of the invention, the pattern generation output of the function is previously calculated and stored, and the stored value is used as the output value of the pattern generator.
In a further preferred form of the invention, the output of the adjuster is selected when a change in the target value over time is relatively limited, whereas the output of the pattern generator is selected when a change in the target value over time is relatively great.
In a further preferred form of the invention, the output of at least the I adjusting section of the adjuster is selected when a change in the target value over time is relatively limited, whereas the output of the pattern generator is selected when a change in the target value over time is relatively great.
In a further preferred form of the invention, the first adjuster is provided at least with an I adjusting section; the switch is constructed so as to switch between an output including the output of the pattern generator and at least the output of the I adjusting section of the adjuster; and the output of at least the I adjusting section of the adjuster is selected when a change in the target value over time is relatively limited, whereas the output of the pattern generator is selected when a change in the target value over time is relatively great.
In a further preferred form of the invention, a parameter compensator is provided for generating a compensation value for compensating the parameters of an approximate function of the pattern generator based on the detected control value.
According to a tenth aspect of the invention, there is provided a temperature control method for a semiconductor producing apparatus including: a third adjuster provided with an I element and a fourth adjuster unprovided with an I element each for receiving, through a first adder, a target temperature value of a heat treatment furnace and a first detected temperature value from the heat treatment furnace; a pattern generator having an approximate function for calculating a pattern output and capable of changing the pattern output in accordance with parameters of the approximate function; and a switch for switching between a first output of the third adjuster, a second output in the form of a sum of an output of the fourth adjuster and the output of the pattern generator, and a third output of the pattern generator; wherein the switch is operated in such a manner that it selects the first output to carry out temperature control when a change in the target value over time is relatively limited, the second output to carry out temperature control when a change in the target value over time is relatively great, and the third output to carry out temperature control in a transient period in which a change in the target value over time transfers or shifts from a relatively great state to a relatively limited state.
In a further preferred form of the invention, the state of a change in the target value over time being relatively great is a ramp-up period, and the transient period of a change in the target value over time transferring from a relatively great state into a relatively limited state is an end point of the ramp-up period.
With the temperature control method as described above, even in the event an abrupt change takes place in the target temperature value, it is possible to make the detected temperature value (controlled variable) quickly follow the target temperature value so as to be maintained at that temperature Consequently, the time-related production efficiency can be improved, and a temperature control method can be provided which does not require any tremendous memory capacity.
According to an eleventh aspect of the invention, there is provided a method for producing a semiconductor device by using the temperature control method for a semiconductor producing apparatus as described above.

Semiconductor producing apparatus and temperature control method therefor


A service offering system is disclosed which includes a recording element for recording a unique identifier to each of a plurality of storage media issued, a database for storing and managing the identifiers, a reading element for reading the recorded identifier from any of the storage media, a checking element for checking the identifier read by the reading element against the identifiers managed in the database and a service offering element for offering a service to the storage medium identified by the checked identifier depending on a result of the check by the checking element.

The present invention relates to a service offering system and, more particularly, to a service offering system designed to provide services relative to package media such as Mini-discs (trademark).
In recent years, network services offered illustratively by Internet service providers have rapidly become available, prompted by the widespread use of the Internet or similar networks. One of such services involves allowing content data such as digital audio data to be downloaded by customers for a fee.
Once disadvantage of that type of service is that preparatory to getting payable service offerings over the network, users must enter their credit card numbers for subsequent settlement of charges for the service rendered. The practice has inspired fears that personal information could be diverted off the network and abused.
A system proposed as a solution to the problem above requires that media, not the users who purchased them, be considered eligible for services offered by the system over the network. This system, however, is incapable of distinguishing between legitimately marketed media and their illegal copies; the system has no means of predicting the amount of services that are to be eventually offered over the network.
Other conventional systems have required that each user contract with a particular service provider before getting network services therefrom. In establishing a connection with the service provider, the user must make entries to complete such settings as a personal ID, a password and an access point. The process can often be a tedious, time-consuming chore.
The present invention has been made in view of the above circumstances and provides a service offering system that allows a service provider to offer diverse services with respect to media.

Service offering system, management server, server provider, terminal device, storage medium issuing apparatus, server offering method, and storage medium


A walking cane having a multifunctional handle, where the handle, which outwardly appears to be a conventional handle, is comprised of articulating elements which can be rotated outwardly, therein transforming the handle into a tripod like structure. The cane then becomes self-standing when inverted. Magnets are used to hold the articulating elements in position in the unified form, and the proximity of these magnets may have some therapeutic value.

The invention relates generally to walking canes, and more particularly to walking canes having a handle that has articulating elements.
Walking canes, also know as walking sticks, have a colorful history of being modified to secretly house guns and switchblades. In addition to these romantic adaptations there have been a number of practical improvements. One such example is Mason""s xe2x80x9cPickup Canexe2x80x9d, disclosed in U.S. Pat. No. 2,346,038, which is a walking cane that has an articulating xe2x80x9cfingerxe2x80x9d at the tip of the cane. The xe2x80x9cfingerxe2x80x9d, which is normally recessed in the shaft, can be actuated using a trigger in the handle to grasp items at the tip of cane, therein eliminating the need for the user to have to bend or stoop down. Another example of a walking cane having a practical improvement is disclosed by Van Helvoort in U.S. Pat. No. 5,755,245. Van Helvoort""s invention is a cane that can be made self-standing. The shaft of the cane has small legs near the tip that can be sprung outward by depressing a button near the base of the handle. The button unlocks a spring loaded two piece shaft causing the shaft to telescope, and on telescoping the legs rotate outward. To reposition the legs back in the shaft, the cane has to be reloaded by compressing the shaft together, and this action causes the legs to rotate upward back into a recess in the shaft.
An improved invention would be a self-standing cane that didn""t elongate when the supporting elements are deployed, and that could not automatically deploy if a button is accidentally pushed. While the concept of a button is appealing, the practical advantages of automatic deployment of the supporting legs, when weighed against the frequency of the need to do so and the difficulty of retrieving the legs, for most people probably does not offset the conveniences especially in light of a heightened accidental risk associated with an unplanned deployment. Another consideration is the safety of the deployed legs. Ideally, the legs should be blunt in the event that someone inadvertently fell on to the cane. Additionally, pointed legs will tend to puncture a surface rather than be supported by it, so that sharp legs would tend to penetrate an earthen surface. A third consideration is the weight and styling of the walking cane. If the walking cane is too heavy to be easily carried, then people will quickly give it up. An example of a very stable, heavy, multi-legged cane is illustrated by DiCarlo""s invention, U.S. Pat. No. 4,997,001. A self-standing walking cane that is conventional in appearance and relatively light weight is desired. Furthermore, a preferred cane would be one that is not only a walking aid and self-standing, but also a cane that has ergonomic features. Specifically, ergonomic features would include a handle that is easy to grip and a grip that could have potential health benefits to the user""s hand. A walking cane having recreational utility would also be a valuable feature. By way of illustration, Richter discloses his invention in U.S. Pat. No. 5,871,025, where Richter""s cane converts to a portable chair. These chairs/canes are often carried to golf tournaments.
The Invention is a walking cane having a multifunctional handle. The handle is comprised of a base and a pair of articulating elements, a right element and a left element, where the elements are hingedly connected to the base. The elements can be articulated as a pair or separately, having an angular motion that is substantially opposite in rotation, and radial from a centerline of the base. On a bottom face of the base, the base is fitted with a reducing connector which rigidly attaches the base to a longitudinal perpendicular member. The longitudinal member is a shaft of the walking cane, and it is normally a straight section. The handle, having a shape which could be generally described as an ellipsoidal cylinder, is sized and optimized in curvature so as to easily fit a hand. The handle is functionally, and by all cursory appearances solid in form, when the handle is in the unified, collapsed form. The base and the pair of articulating elements are derivative subsections of the handle. The right element is generally an elongated polyhedron having a curved-side and two straight sides that intersect at a right angle; where the straight sides form close fitting interior walls that are in contact with opposing walls of the base. The ends of the polyhedron are complex, with the anterior end being rounded and suitable for angular rotation, and the posterior end being blunt with an interior indentation suitable for as a pry point. The polyhedron is sectioned out of the handle lengthwise. The left element is the mirror image of the right element. The base is a larger, remaining section. The anterior end of the right element is hingedly connected to the base by an axial pin that projects upward from a right shelf of the base, where the pin is coaxial to the axis of the shaft, and the pin is near the anterior end of the right shelf. The pin is centered and slightly offset from the anterior end of the shelf, said arrangement of right shelf, right pin and right element enabling the right element to pivot off the shelf. The left element is connected similarly to an opposing, left pin. Viewed from the top, the right element can rotate counterclockwise in a plane that is parallel to the bottom face of the right shelf of the base. The arc swept by the rotation is approximately 120 degrees. Rotation is constrained where the right element abuts the anterior end of the right shelf. Visually, the motion of the right element is not dissimilar from the motion of a flapping right wing of a bird. The left element pivots clockwise in an opposing fashion. The right shelf and the left shelf of the base are separated by a spine that runs longitudinally down the centerline of the base. At the posterior end of the right element, embedded in the face of the interior straight side of the right element, is a right magnet. Opposing the right magnet, located in a posterior portion of the spine of the base, is a magnetic component. The magnetic component is preferably a magnet of opposing polarity or a magnetizable metal. The left element is configured similarly. The close proximity of the magnets to the hand could have some therapeutic value.
The instant invention serves as a normal walking cane with the handle in the unexpanded mode. There are three expanded modes. In the fully expanded mode the pair of elements are articulated outward, angularly, and the handle transforms into a tripod. The cane can then be inverted and it will stand upright on its on.
In the partially expanded mode, only one of the elements is articulated, and the cane be laid on its side. The partially expanded mode has the advantage that only a minimum portion of the handle will come in contact with the ground. If the ground is wet the handle stays dry.
In the unexpanded mode, or unified mode, the handle provides a sturdy, ergonomic grip; and an excellent walking cane.
It is anticipated that the invention, particularly in the partially expanded mode, could be used as a dry resting area to keep other gripped devices, such as umbrellas and golf clubs, off the ground. A dry resting area is particularly useful when one is laying down a putter while hitting a wedge just off the green.

Walking cane having a multifunctional, expandable handle


A built-up plug includes a first portion and a second portion. The first portion includes a first shell, a first metal foot and at least one fixing mass on the first shell. The second portion includes a second shell, a second metal foot and at least one fixing groove on the second shell. The first metal foot protrudes from a top portion of the first shell. The second metal foot protrudes from a top portion of the second shell. The fixing mass is placed in the fixing groove to combine the first portion and the second portion.

1. Technical Field
The present disclosure relates to plugs, and more particularly to a built-up plug.
2. Description of Related Art
Two-phase plug or three-phase plug is used in electronic device, and is engaged with two-phase jack or three-phase jack. The two-phase jack is needed when two-phase plug is used. The three-phase jack is needed when three-phase plug is used. However, if only has a three-phase jack when two-phase plug is mounted in electronic device or just have a two-phase jack when a three-phase plug is mounted in electronic device, the plug will not engage with the jack.


A method for determining a minimization factor for improving linearity of an analog-to-digital converter including a plurality of components includes the steps of: (a) Evaluating integral non-linearity response of the apparatus to identify significant departures of the response greater than a predetermined amplitude and to relate each respective significant departure with a respective identified component. (b) Determining magnitude of each significant departure. (c) Identifying a trimming factor related with each component. (d) Determining a residual gap magnitude for each significant departure. The residual gap magnitude comprises the magnitude of the respective significant departure less the trimming factor related with the identified component. (e) Determining the minimization factor as a sum of the residual gap magnitudes for a selected plurality of the identified components.

The present invention is directed to analog-to-digital converter apparatuses, and especially to a method for improving linearity of performance for an analog-to-digital converter apparatus.
The so-called "pipelined" architectures for Analog-to-Digital Conversion (ADC) rely on the concept of simultaneous data sub-conversion in multiple stages in order to progressively refine the digital representation of an analog signal. There are two fundamental approaches to pipelined ADC: switched-capacitor and switched-current. In both of these approaches, ADC apparatuses are impacted by the matching of components employed in the local quantization path of each stage.
Switched-current designs will suffer from mismatches between the elements of the folding sub-ADC, and from mismatches among the current source elements constituting the reconstruction DAC (Digital-to-Analog Converter). The DAC could be segmented in different ways to vary the impact of the mismatch. However, once the mismatch between the elementary DAC elements has been minimized, the relative current mismatch between first ADC stage and the second ADC stage (and between later stage-pairs) will remain to be addressed.
In switched-capacitor ADC implementations the relative size of the capacitors determines the gain of the stage and also determines the size of the voltage steps in the reconstruction MDAC (Multiplying Digital-to-Analog Converter), directly impacting the integral non-linearity (INL). These technology-related mismatches have become increasingly critical in the latest releases of minimum-feature CMOS (Complementary Metal Oxide Semiconductor) and BiCMOS (Bipolar Complementary Metal Oxide Semiconductor) processes, because the lithographic control over both active and passive devices is more difficult to attain. This technological problem is expected to be exacerbated in the future. The answer by the design community to this challenge led to develop at least two classes of techniques which employ analog rather than digital solutions in order to correct for these mismatches.
All-digital bit-redundancy techniques have proven effective to tackle the sub-ADC imperfections. The sub-DAC non-idealities have been addressed using digital calibration methods (e.g., one-time adjustments or continuous background calibration) or using analog "trimming" of devices impacted by a statistical mismatch.
Non-brute-force trimming techniques depend upon a preliminary identification of the errors affecting the INL (Integral Non-Linearity; measure of departure from the ideal linear transfer curve for an ADC) such as positive or negative gaps. Once the errors have been assessed, the passive components that determine such an ADC behavior can be adjusted to compensate for their non-ideality. For example, selective laser cuts can trim the value of resistors in a DAC to linearize the analog signal translation from the digital word. Alternatively, tiny parasitic capacitors can be switched in parallel to the signal capacitors of a quantizer's stages to counter a process-induced mismatch.
Unless time-consuming, computer processing-consuming and memory-consuming brute force or iterative approaches are followed, the algorithms used to configure the trim circuitry for reducing component mismatches must have available a reliable identification of the INL errors in order to work. For example, in the case of a 16-bit switched-capacitor pipeline ADC, trying out all the different combinations of the trim values, collecting INL or SFDR (Spurious Free Dynamic Range; difference between the Root Mean Square (RMS) value of a desired output signal and the highest amplitude output frequency that is not present in the input) measurements in every instance and finding the best trim code is not a reasonable approach. If every trim device controlled one and one only error the optimization problems would be completely decoupled, and they could be solved with minimal effort. Indeed, especially in the switched-capacitor paradigm where a feedback capacitor controls the gain of the stage and therefore affects mismatches and trimming for a plurality of other components, the passive component change that fixes one mismatch could make other errors or mismatches worse. To properly arrive at a solution, the solutions to every mismatch of an apparatus are coupled and must be found considering all the mismatch errors simultaneously. Unfortunately, for example, a simple 4 bits accurate trim over a 2.5 bit per stage quantizer (4 capacitors (caps) for each stage) produces a string of 4 bits×4 caps=16 bit-long trim word, for a total of 216=65,536 permutations for each stage. The simultaneous trimming of the first 2 stages of such a pipeline requires as many as 232=4,294,967,296 attempts. Each attempt involves a trim programming and re-measurement process with possible follow-up retrimming and measurement steps. Such an approach is therefore impracticable for most if not all the high-resolution systems available to date.
There is a need for a method for improving linearity of an analog-to-digital converter (ADC) that employs other than brute force to solve mismatch problems.
There is a need for a method for improving linearity of an analog-to-digital converter (ADC) that is non-iterative in that no repetitive trim-and-measure operations are required for its implementation.

Method for determining minimization factor for improving linearity of an analog-to-digital converter


A silicon nitride layer having a silicon-rich sub-layer and a standard sub-layer is formed on a copper surface to obtain excellent electromigration characteristics due to the standard sub-layer that is in contact with the copper, while maintaining a superior diffusion barrier behavior due to the silicon-rich sub-layer. By combining these sub-layers, the overall thickness of the silicon nitride layer may be kept small compared to conventional silicon nitride barrier layers, thereby reducing the capacitive coupling of adjacent copper lines.

1. Field of the Invention
Generally, the present invention relates to the formation of integrated circuits, and, more particularly, to the formation of metallization layers including highly conductive metals, such as copper, embedded into a dielectric material.
2. Description of the Related Art
In modern integrated circuits, minimum feature sizes, such as the channel length of field effect transistors, have reached the deep sub-micron range, thereby steadily increasing performance of these circuits in terms of speed and power consumption. As the size of the individual circuit elements is significantly reduced, thereby improving, for example, the switching speed of the transistor elements, the available floor space for interconnect lines electrically connecting the individual circuit elements is also decreased. Consequently, the dimensions of these interconnect lines have to be reduced to compensate for a reduced amount of available floor space and for an increased number of circuit elements provided per chip. In integrated circuits having minimum dimensions of approximately 0.35 μm and less, a limiting factor of device performance is the signal propagation delay caused by the switching speed of the transistor elements. As the channel length of these transistor elements has now reached 0.18 μm and less, it turns out, however, that the signal propagation delay is no longer limited by the field effect transistors, but is limited, owing to the increased circuit density, by the close proximity of the interconnect lines, since the line-to-line capacitance is increased in combination with a reduced conductivity of the lines due to their reduced cross-sectional area. The parasitic RC time constants therefore require the introduction of a new type of material for forming the metallization layer.
Traditionally, metallization layers are formed by a dielectric layer stack including, for example, silicon dioxide and/or silicon nitride with aluminum as the typical metal. Since aluminum exhibits significant electromigration at higher current densities than may be necessary in integrated circuits having extremely scaled feature sizes, aluminum is being replaced by copper, which has a significantly lower electrical resistance and a higher resistivity against electromigration.
The introduction of copper, however, entails a plurality of issues to be dealt with. For example, copper may not be deposited in higher amounts in an efficient manner by well-established deposition methods, such as chemical and physical vapor deposition. Moreover, copper may not be efficiently patterned by well-established anisotropic etch processes and therefore the so-called damascene technique is employed in forming metallization layers including copper lines. Typically, in the damascene technique, the dielectric layer is deposited and then patterned with trenches and vias that are subsequently filled with copper by plating methods, such as electroplating or electroless plating.
A further issue is the ability of copper to readily diffuse in silicon dioxide. Therefore, copper diffusion may negatively affect device performance, or may even lead to a complete failure of the device. It is therefore necessary to provide a diffusion barrier layer between the copper surfaces and the neighboring materials to substantially prevent copper from migrating to sensitive device regions.
Silicon nitride is known as an effective copper diffusion barrier, and is thus frequently used as a dielectric barrier material separating a copper surface from an interlayer dielectric, such as silicon dioxide.
Although copper exhibits superior characteristics with respect to resistance to electromigration compared to, for example, aluminum, the ongoing shrinkage of feature sizes, however, leads to a reduction in copper lines and thus to increased current densities in these lines, thereby causing a non-acceptable degree of electromigration. Electromigration is a diffusion phenomenon occurring under the influence of an electric field, which leads to a copper diffusion in the direction of the moving charge carriers, thereby finally producing voids in the copper lines that may cause device failure. It has been confirmed that these voids typically originate at the copper silicon nitride interface and represent one of the most dominant diffusion paths in copper metallization structures. It is therefore of great importance to produce high quality interfaces between the copper and the silicon nitride barrier layer to reduce the electromigration to an acceptable degree.
As previously noted, the device performance of extremely scaled integrated circuits is substantially limited by the parasitic capacitances of adjacent interconnect lines, which may be reduced by decreasing the resistivity thereof and by decreasing the capacitive coupling in that the overall dielectric constant of the dielectric layer is maintained as low as possible. Since silicon nitride has a relatively high dielectric constant k of approximately 7 compared to silicon dioxide (k∓4) or other silicon dioxide based low-k dielectric layers (k<4), it is generally preferable to form the silicon nitride layer with a minimum thickness. It turns out, however, that the barrier characteristics of the silicon nitride layer depend on the thickness thereof so that thinning the silicon nitride layer, as would be desirable for a reduced overall dielectric constant, may not be practical to an extent as required for further scaling semiconductor devices including copper metallization layers without compromising device performance.
In light of the above-specified problems, a need exists for an improved technique that allows the formation of a dielectric barrier layer on the basis of silicon nitride, exhibiting an improvement with respect to diffusion barrier efficiency and/or resistance to electromigration.

Dielectric barrier layer for a copper metallization layer having a varying silicon concentration along its thickness


A new and distinct Rhododendron cultivar named ‘HOMLED’ is disclosed, characterized by distinctive large, single lavender flowers and a narrow, upright plant form. Plants bloom Spring, Summer and Fall. The new cultivar is a Rhododendron, suitable for ornamental garden purposes.

The new cultivar is a product of a planned breeding program by the inventor, Robert Edward Lee. The inventor's intention was to develop compact growing Rhododendron hybrid plants with re-blooming characteristics. This new variety, hereinafter referred to as 'HOMLED', was discovered as a seedling, resulting from the crossing of Rhododendron 'Watchet', unpatented with the pollen parent Rhododendron 'Conleb' U.S. Plant Pat. No. 10,581. The cross was performed during the Spring of 1996, and the new variety selected by the inventor during the Fall of 2002 in Independence, La.
After identifying the new variety as a potentially interesting selection, the inventor first organized propagation of 'HOMLED' by vegetative cuttings during Fall 2002 at a commercial nursery in Independence, La. The inventor continued confidential, controlled testing and propagation, assessing stability of the unique characteristics of this variety. Multiple generations have been reproduced and have shown that the unique features of this cultivar are stable and reproduced true to type.


A rotatable picture frame apparatus which is made up of a plurality of picture frames, a turntable for supporting the picture frames, a casing for supporting the turntable and a base for supporting the casing. The apparatus contains a motor which is connected to the turntable by a rotating shaft and a switch for turning the motor on and off. The apparatus may contain its own electrical supply in the form of batteries contained in the casing or it may be adapted to be connected to an external power source.

1. Field of the Invention
The present invention relates generally to picture frames, and more particularly, to an apparatus containing a plurality of picture frames mounted on a turntable supported by a casing and a base. The apparatus contains a motor which can slowly rotate the turntable.
2. Description of the Prior Art
Picture frames in the form of a plurality of connected picture frames are well known. For example, U.S. Pat. No. Des. 285,751 shows an apparatus containing a plurality of picture frames facing in a single direction. This apparatus is designed to remain stationary and is intended to be mounted on a wall. Similarly, U.S. Pat. No. 4,034,496 discloses an apparatus containing a plurality of picture frames facing in a single direction, which apparatus is adapted to be mounted on a wall. Also, picture holders in the form of cubes are known. These picture holders may contain one or more pictures on each face of the cube. Such picture holders may be placed on a desk or table and are designed to remain stationary.
Thus, while the foregoing body of prior art indicates it to be well known to use multiple-frame picture holders in a single apparatus, the provision of a simple and cost effective rotatable device is not contemplated. Nor does the prior art described above teach or suggest a multiframe picture-holding device which may conveniently be kept on a desk top and may be used by individuals who wish to view all of the pictures without manually moving the device. The foregoing disadvantages are overcome by the unique rotatable picture frame apparatus of the present invention as will be made apparent from the following description thereof. Other advantages of the present invention over the prior art also will be rendered evident.


The present invention relates to terphenyl dihydroxy monomers containing fluorine and fluorinated poly(arylene ether sulfide)s prepared by using the monomers, more particularly, terphenyl dihydroxy monomers containing both two hydroxy functional groups and fluorine and fluorinated poly(arylene ether sulfide)s prepared by an aromatic nucleophilic substitution polymerization (SNAr) using the monomers, which are thus useful as optical materials in the field of information telecommunications.

It is an essential condition to transmit a big volume of data at high speed in image processing, transmission media and telephone network. There is a need for several hundreds Mbps (mega bit per second) for mass storage of data at high speed and transmission speed at the rate of Tbps (tera bit per second) will be requested in the future.
Optical communication has been addressed as a solution for rapid processing of a huge volume of data. Particularly, wavelength division or frequency division multiplexing system utilizing parallellism of light of optical communication systems has been more in the spotlight than time division multiplexing system. Typical elements for optical communications include optical output splitter, wavelength division multiplexer, high speed optical modulator, switch, and so on. It is required that elements for optical waveguides have stabilities against optical loss, heat and humidity, polarization-dependent gain (PDG), easiness in processing and packaging, and so on. Silica has been widely used in the preparation of passive optical waveguides so far but studies in development using polymers containing hydrogen or fluoride have recently extensively increased.
Poly(arylene ether) is engineering plastic used widely in electronic materials and aerospace materials. Generally, fluorine-containing poly(arylene ether) or polyimide exhibits high thermal stability, chemical stability, low optical loss, low refractive index, low birefringence, low dielectric constant, easy processability, and low moisture absorption rate. It has been thus suitable for manufacturing elements used in information telecommunication field as well as use in thermoplastic polymer, membrane elastomer and so on. Especially, poly(arylene ether sulfide) (hereinafter referred to as 'PAESIs') has been introduced with a sulfur group for providing mechanical stability, thermal stability, resistance against fire, chemical stability, low birefringence, and low moisture absorption rate and an ether group for providing flexibility thereby providing superior advantage in manufacturing elements, while exhibiting similar properties of polyimides. Udel™ (poly ether sulfone), Kadel™ (poly ether ketone), PEEK™ [Poly (ether ether ketone)], and Victrex™ have been commercialized. Fluorinated poly(arylene ether sulfide) (hereinafter referred as to 'FPAESIs') has been in the spotlight because ether bond offers flexibility to the polymer main chain and kink structure of the polymer main chain. Thus, it provides high glass transition temperature due to correlation/canceling effect between irregular and regular structure. Aromatic nucleophilic substitution reaction (SNAr) is usually performed to prepare the FPAESIs, where monomers with dihydroxy functional group are used. A typical example of the dihydroxy monomer used in the preparation of FPAESIs is 4,4′-(hexafluoroisoproylidene)diphenol. Although other examples of fluorine-containing dihydroxy monomer include 9,9′-bis(4-hydroxyphenyl)fluorene, 2,2′,3,3′,5,5′6,6′-octafluoro-4,4′-biphenol hydrate, 4,4′-isopropylidenediphenol, 4,4′-(hexafluoroisoproylidene)diphenol, there are limited for FPAESIs.

Terphenyl dihydroxy monomers containing fluorine and fluorinated poly(arylene ether sulfide)s

Gwangju Institute of Science of Technology


An image capturing system utilizes a plurality of image capturing apparatus to capture first image data for an object. A processor is utilized to combine the first images to produce first three-dimensional digital image data. The processor then utilizes a second algorithm to combine the intermediate digital image information to produce a complete three-dimensional digital image of the object. The three-dimensional image may be viewed on a display and viewed from any point on a three dimensional surface surrounding the object. The object can be non-stationary.

Various systems are known for the capturing of images of objects including live objects. One category of such systems typically utilizes a scanning technology with lasers or other beam emitting sources. The difficulty with systems of this type is that to scan a three-dimensional object, the scan times limit use of the systems to stationary objects.
A second category of image captures systems utilizes triangulated cameras with or without projection of structured light patterns on the object. However, these systems typically are arranged to capture a three-dimensional image of only a portion of the object. Typically such systems also are used only with stationary objects.
It is highly desirable to provide an image capturing system that will capture three-dimensional images of objects that are not stationary, but which may move. It is also desirable that the three-dimensional image has high resolution and high accuracy. It is particularly desirable that the three-dimensional image captures the totality of the object.
It is particularly desirable to provide an image capturing system that will have the ability to capture an accurate three-dimensional image of an infant's head. Capturing of such an image has not been possible with prior image capturing systems for a variety of reasons, one of which being that infants are not stationary for the times that prior systems require to scan or capture the data necessary to produce a three-dimensional image. Another reason is that prior systems could only acquire a partial three-dimensional imager portion. The need for such a system is for producing cranial remodeling bands is great.
Treatment of infants with deformational plagiocephaly with cranial remodeling bands has become a standard of care in the United States. The process by which a cranial remodeling band is fabricated requires obtaining a negative or 'cast' impression of the child's head. This is accomplished by first pulling a cotton stockinet over the child's head, and then casting the head with quick setting, low temperature plaster splints.
The casting technique takes approximately 7 to 10 minutes. After the initial casting, a plaster model of the infant's head is made and is used for the fabrication of the cranial remodeling band.
It is highly desirable to simplify the process by utilizing digitization techniques to produce useful digital three-dimensional images of the entire head. We undertook an exhaustive search to identify and evaluate different digitization techniques. Numerous laser scanning, structured light, Moire, and triangulated CCD camera systems were evaluated and rejected as inadequate for one reason or another.
Prior digitization techniques and systems fail to recognize the particular unique challenges and requirements necessary for a system for the digitization of infants. The infant patients to be digitized range in age from three to eighteen months of age. The younger infants are not able to follow verbal instructions and are not able to demonstrate head control while the older infants are difficult to control to more than a brief moment of time. A wide variety of head configurations, skin tone, and hair configurations also needed to be captured. A digitization system must acquire the image in a fraction of a second so that the child would not need to be restrained during image capture, and so that movement during image acquisition would not affect the data. The system data capture must be repeatable, accurate and safe for regular repeated use. In addition, to be used in a clinical setting the system had to be robust, easy to use, and easy to calibrate and maintain without the need for hiring additional technical staff to run the equipment. Image acquisition, processing, and viewing of the data had to be performed in real time in order to ensure that no data was missing before allowing the patient to leave the office.
Numerous existing digitization techniques were evaluated. Laser scanning methods have the disadvantage of the long time, typically 14–20 seconds, that is required to scan an object. Because of the long time, an infant being scanned would have to be restrained in a specific orientation for the scan time. Recent advances in laser scanning have produced scan systems that can perform a scan in 1–2 seconds. However even this scan rate is too slow for an unrestrained infant. The use of lasers also raises concerns regarding their appropriateness and safety for use with an infant population. While many prior digitization systems use 'eye safe' lasers, the use of protective goggles is still frequently recommended.
Structured-light Moire and phase-shifted Moire systems used in certain 3D imaging systems are difficult to calibrate, are costly, and are relatively slow and therefore are not suitable for use in obtaining images of infants. In addition these systems are incapable of capturing the entirety of an object in one time instant.
Computed Tomography (CT) and Magnetic Resonance Imaging (MRI) are not particularly useful for the present application simply due to size, expense and concerns regarding radiation and the need to anesthetize the infant.
Prior systems that rely solely on triangulation of digital cameras proved to have insufficient accuracies, particularly as the object being imaged varied in shape and size from a calibration standard.
Structured light systems that combined triangulated digital cameras with a projected grid or line pattern can capture only one surface at a time because the grids projected by multiple projectors interfered with each other resulting in a loss of data. In addition, the images captured by this structured light systems need to be fit together like a three-dimensional jigsaw puzzle, and required that markers be placed on the subject in order to facilitate this registration process.


An apparatus supplies power to a communication unit that communicates with an external apparatus, and manages history information for each communication sequence in the communication unit in a mode where power supplied to a control unit is stopped. At that time, the apparatus assigns identification information unique to the communication unit to the history information when the apparatus is in a mode where power supplied to the control unit is stopped, and makes control when power supplied to the control unit is stopped or when the apparatus returns to the mode in which power is supplied to the control unit so that continuity of the history information managed by the control unit is ensured.

1. Field of the Invention
The present invention relates to an image communication apparatus, a control method, and a storage medium.
2. Description of the Related Art
Generally, image communication apparatuses including digital multifunction peripherals (MFP) require maintenance management (maintenance operation) for performance retention and functional advancement. Each function unit of the MFP is checked and components necessary to be replaced are replaced in the maintenance operation.
Normally, the power to the MFP is temporarily stopped while the maintenance operation is performed so that the MFP does not fail during the operation. Thus, although it is desirable to keep the MFP in a state where communication of facsimile or electronic mail is always possible from the viewpoint of business operations, communication is not possible with the MFP while it is under the maintenance operation.
Japanese Patent Application Laid-Open No. 2002-264455 discusses a method to be used when a problem occurs with a function of an image communication apparatus including a facsimile communication function. By rendering only the failure-detected function inoperable, the maintenance operation of the image communication apparatus is performed without stopping the operation of other functions. According to this method, facsimile communication is possible even if power to each unit is stopped while the maintenance operation is performed, as power is continuously supplied to the communication unit that performs the facsimile communication.
However, according to the above-described conventional technique, if power to a unit, which manages communication history information of facsimile, or electronic mail communication is stopped, continuity of the communication history information managed by such a unit and communication history information which is generated if facsimile or electronic mail communication is performed by a communication unit while the maintenance operation is performed cannot be obtained.

Image communication apparatus, control method, and storage medium


A data recording and playback device to perform focusing control on each recording layer of a multi-layer recording medium having a plurality of recording layers. The data recording and playback device includes a focus control device having a focusing movement device to set a position of a light spot, which illuminates a data recording medium having a plurality of recording layers, with respect to a direction perpendicular to the data recording medium. A focus error signal forming device forms a focus error signal based on a relative displacement of the position of the light spot set by the focusing movement device and the recording surface of the medium. A position signal forming device forms a position signal based on a displacement of the focusing movement device in a direction perpendicular to the recording medium surface, the position signal forming device having a detection range wider than that of the focus error signal forming device. A control device forms a control signal at the time of a focus jump operation to move the light spot from a recording layer to a target recording layer based chiefly on the position signal, and forms a control signal to control the focusing movement device at the time of a focusing operation to move the light spot to follow a target recording layer based chiefly on the focus error signal.

1. Field of the Invention
The present invention relates to a focus control device for recording or playback of data from a recording medium such as a magneto-optic disk, an optical disk or the like, and, more particularly, the present invention relates to a focus control device to perform focus control with respect to a multi-layer recording medium having a plurality of recording layers.
2. Description of the Related Art
Devices are known for recording data on or playing back data recorded on a conventional type of magneto-optic disk, or the like data recording medium, using a condensed light beam to illuminate a recording surface of the recording medium. During recording or playback of data, focus control is performed such that the condensed light beam has a focus position on the recording surface of the medium.
Various attempts have been made to increase the data capacity of the magneto-optic data recording medium and the like data recording media. For example, one technique considered for attaining a higher data density on a data recording medium is to use multiple data recording layers. However, the focus control with the conventional data recording and playback device cannot be performed to correspond to each recording layer of a multi-layer recording medium because the prior art data recording and playback device has as its object of control a recording medium having a single recording layer.
Therefore, what is needed is a data recording and playback device to control focusing on each recording layer of a multi-layer recording medium.

Focus control device to perform focus control for a multi-layer recording medium


According to one embodiment, an image processing device includes an obtaining unit, a separating unit, a processing unit and a combining unit. The obtaining unit obtains a depth value of a subject imaged on an input image. The separating unit separates the input image into a first component that is a component including a gradation and a second component that is a component other than the first component. The processing unit enhances the first component in accordance with the depth value to generate a processed component. The combining unit combines the processed component and the second component to generate a combined component.

A captured image can be viewed three dimensionally by binocular stereopsis if a distance from an imaging device such as a camera to a subject of the captured image is known. This can be made by generating two images that are shifted from each other to an extent corresponding to a binocular disparity based on the distance and by observing the images with the right eye and the left eye, respectively. In order to implement such a system, however, it is necessary to provide a display configured to divide pictures for the right eye and the left eye spatially or temporally and display the divided pictures, for example. In addition, the configuration is complex since a viewer has to wear glasses for the system, for example. Thus, if pictures can be displayed two-dimensionally with an enhanced three-dimensional appearance, simplified stereoscopic pictures can be viewed, which is advantageous to viewers.
Enhancement of shades of a subject increases uneven impression thereof and produces an effect of enhancing the three-dimensional appearance of the image. Uneven impression is defined herein as expressiveness of the unevenness of a subject surface. A technique of enhancing the gradation of an image, which is one element to express shades, is known as a technique for producing uneven impression. In this technique, a gradient of an image is calculated and a component with a gradient whose magnitude is small is enhanced to produce the effect.
In the conventional technology, however, the shades are enhanced uniformly on the entire screen. Thus, the uneven impression of a distant background, for example, is also increased. A subject with increased uneven impression is perceived to be nearer than that before being processed. Therefore, there has been a disadvantage that the distance between the foreground and the background is perceived to be small, which results in an image having a flat composition with a low depth feel. A depth feel is defined herein as expressiveness of a distance in the depth direction between subjects. Uneven impression and a depth feel are both considered to be main components providing a three-dimensional appearance of an image.