An antenna window with a high-frequency electric component placed fixedly on one of its surfaces, which is electrically connected to a conductor structure provided on the same surface of the window. The high-frequency component has at least one flat coupling electrode, which is kept at a specific distance from the flat conductor structure conducting high-frequency antenna signals, by an intermediate dielectric layer, to form the electrical connection.

1. Field of the Invention
The invention relates to an antenna window with a high-frequency component with the characteristics of the preamble of claim 1.
2. Discussion of the Background
Document DE-A1-198 23 202 describes an antenna device for a vehicle, in which the foot connections of all the antennas placed on a transparent (glass) window connected at contact points of a contact field are surrounded by a plastic mount placed on the surface of the window, and in which a high-frequency component, for example an amplifier, is removably fixed. In this case spring contacts are used for the electrical connections between the high-frequency component and the contact points. The latter are, of course, simple to mount and remove, but at the same time they are relatively sensitive to the corrosion and mechanical vibrations which occur.
Document DE-A1-198 56 663 discloses a device for bringing an antenna placed on a windowpane in contact with an amplifier housing fixed to the windowpane. The connection zone is surrounded by a layer of adhesive, while the electrical contacts are preferably produced by soldering. Document U.S. Pat. No. 6,087,996 shows a similar arrangement with spring contacts, in which the amplifier housing is removably fastened to the surface of the window by means of a velcro assembly.
It is known from DE-A1-197 35 395 to capacitively couple a flat conducting layer acting as an antenna on a transparent (glass) window to a connection conductor, through which the antenna signal is routed to the radio receiver. In this case, the capacitive coupling is accomplished by printing a strip-like electrode on the face of a laminated window turned toward the passenger compartment, while placing the conducting layer on a surface located within the composite. The length of the strip-like electrode must be more than 5 cm, and its width from 5 to 10 mm.
Document DE-A1-198 58 299 shows an antenna system for a data communication device in a vehicle: two sides of a dielectric mounting surface, such as a glazing unit, may be connected together by capacitively coupling the components of the antenna system placed on the flat coupling electrodes.
Documents U.S. Pat. No. 4,931,805 and U.S. Pat. No. 4,931,806 describe a telephone antenna placed on the window of a vehicle: an external module supports the antenna while an internal module is connected to this antenna by capacitive signal transmission. The glazing unit is used as a dielectric. The two modules are fastened to the surfaces of the glazing unit by double-sided adhesive tape.

Antenna window with high-frequency component


There is disclosed a mobile terminal including a display panel, a frame comprising a front surface where the display panel is disposed, a rear case coupled to one surface of the frame, to form an electric/electronic control unit there between the frame and the rear case, a heat spreader module provided between the display panel and the frame, wherein the heat spreader module includes a metallic plate in contact with the display panel, a heat spreading material layer disposed on a rear surface of the metallic plate and an adhesive layer disposed between the heat spreading material layer and the metallic plate to bond the metallic plate and the heat spreading material layer with each other. Even when the frame is partially eliminated, the mobile terminal may support the display panel and securing the heat spreading performance simultaneously, using the heat spreader module having a preset rigidity.

1. Field
Embodiments of the present disclosure relates to a mobile terminal which may maintain a heat spreading performance and realize a slim thickness simultaneously, improving a heat spreader module having a preset rigidity.
2. Background
Generally, terminals can be classified into mobile terminals and stationary terminals. In addition, the mobile terminals can be further classified into handheld terminals and vehicle mount terminals.
Further, a mobile terminal can perform various functions such as data and voice communications, capturing images and video via a camera, recording audio, playing music files and outputting music via a speaker system, and displaying images and video on a display.
There are ongoing efforts to support and increase the functionality of mobile terminals. Such efforts include software and hardware improvements, as well as changes and improvements in the structural components which form the mobile terminal.
It is important to emit the heat generated in the mobile terminal and to lessen the size of the mobile terminal, as a user is carrying the mobile terminal in his or her hand. With a variety of functions, users use such mobile terminals for a longer time and a heat radiation performance is much more important in the mobile terminals. Also, the portability has become a big issue.

Mobile terminal and manufacturing method for heat spreader module


A multilayer heating body (1) includes a ceramic substrate (3), an electrode (4), heaters (5, 7), terminals (11, 13, 15, 17), and an electricity supply path (19). Through vias which constitute the electricity supply path include at least one combination of through vias α, β, γ, and δ which meets the following conditions (1) and (2). Condition (1): when the ceramic substrate is viewed from the front surface (3a) side toward the back surface (3b) side, the through via δ is located at a position where the through via δ overlaps the through via β, or in the vicinity of the through via β. Condition (2): when the ceramic substrate is viewed from the front surface side toward the back surface side, the through via γ is located at a position between the through via α and the through via δ, or located at a position where the through via γ overlaps the through via α, or in the vicinity of the through via α.

Conventionally, for example, in a semiconductor manufacturing apparatus, an electrostatic chuck is used for fixing a semiconductor wafer (e.g., a silicon wafer) in dry etching or like processing, for fixedly chucking a semiconductor wafer to correct warpage, for chucking a semiconductor wafer for transportation, etc.
In the case of using the electrostatic chuck in a dry etching apparatus of the semiconductor fabrication system, if the temperature of a semiconductor wafer fixed to the electrostatic chuck varies from position to position, etching accuracy deteriorates. Thus, in order to enhance accuracy in processing on the semiconductor wafer, the temperature of the semiconductor wafer must be rendered uniform. Thus, the electrostatic chuck includes an internal heater for uniformly heating the semiconductor wafer.
The electrostatic chuck having a built-in heater includes an electricity supply path for supplying electricity to the heater from a terminal attached to one end of the electrostatic chuck on the back surface side thereof. The electricity supply path has a structure in which a plurality of conductive layers and a plurality of through vias are alternately stacked. A conductive layer adjacent to the heater and partially constituting the electricity supply path generates a large amount of heat. The generation of heat by the conductive layer causes the surface temperature of the electrostatic chuck to become nonuniform; as a result, the temperature of a semiconductor wafer becomes nonuniform.
In order to cope with the above problem, there has been proposed a method in which the electricity supply path is divided into a plurality of layers in the vicinity of the conductive layer adjacent to the heater to thereby reduce current density in the layers, whereby the generation of heat is restrained (see Patent Document 1).


Systems and methods applicable, for instance, in session provision. A node and/or other computer may, for example, dispatch to one or more servers and/or the like a message including a provided value and a value obtained, for instance, from a storage element. The one or more servers and/or the like may, for example, having performed various registration checks, act to create a token for provision to the node and/or other computer. Messages sent by the node and/or other computer including the token could, for instance, be considered to be associated with a session.

In recent years, there has been an increase in the use of computers (e.g., portable computers) by various individuals. For example, delivery workers sometimes use computers to provide data regarding their performance of delivery tasks. As another example, medical workers sometimes use portable computers to provide data regarding their performance of patient care tasks.
Accordingly, there may be interest in technologies that, for example, facilitate the use of computers by workers and/or other individuals.


PtMn films are used as antiferromagnetic layers of a dual spin-valve type magnetoresistive sensor. An exchange anisotropic magnetic field is achieved regardless of whether the PtMn film is formed over or under the pinned magnetic layer. Also, an effective exchange anisotropic magnetic field is produced even with heat treatment at a relatively low temperature. Alternatively, a PtMn film is used as an antiferromagnetic layer of a spin-valve film laminate. The use of a PtMn film enables a sufficient exchange anisotropic magnetic field to be produced even with a relatively low heat treatment temperature and a relatively small film thickness. Therefore, the number of total layers of the spin-valve film laminate can be increased to increase a magnetoresistance ratio, and a total thickness of the spin-valve film laminate can be made relatively small.

1. Field of the Invention
The present invention relates to a spin-valve type magnetoresistive sensor wherein electrical resistance is changed depending on the relationship between the magnetization direction of a pinned magnetic layer and the magnetization direction of a free magnetic layer affected by an external magnetic field. More particularly, the present invention relates to a spin-valve type magnetoresistive sensor which has higher sensitivity of detection and is adaptable for high-density recording as the result of an improvement in structure and material properties of a spin-valve film laminate, as well as to a spin-valve type magnetoresistive head using the sensor.
2. Description of the Related Art
There are known spin-valve type and multilayer type as laminated structures capable of developing a GMR (Giant Magnetoresistive) effect.
FIG. 12 is a sectional view showing a conventional multilayer type GMR sensor.
The multilayer type GMR sensor has a laminated structure comprising pairs of a ferromagnetic material layer 9 and a non-magnetic electrically conductive layer 2 which are formed in plural number repeatedly from the bottom.
Generally, the ferromagnetic material layer 9 is made of a NiFe (nickel-iron) alloy or a CoFe (cobalt-iron) alloy, and the non-magnetic electrically conductive layer 2 is made of Cu (copper).
The ferromagnetic material layers 9 are positioned over and under the non-magnetic electrically conductive layer 2 in a laminated structure. Particularly, when the non-magnetic electrically conductive layer 2 is formed in a thickness on the order of 10-20 angstroms, the upper and lower ferromagnetic material layers 9 are magnetized into a single domain state in anti-parallel relation uniformly due to the RKKY interaction.
In the multilayer type GMR sensor, when the sensor is subject to a leakage magnetic field from a magnetic recording medium such as a hard disk, the magnetization direction of the ferromagnetic material layer 9 is varied to the same direction as the leakage magnetic field. A variation in the magnetization direction of the ferromagnetic material layer 9 changes electrical resistance, and this change in value of the electrical resistance results in a voltage change. The leakage magnetic field from the magnetic recording medium is detected based on the resulting voltage change.
Meanwhile, a magnetoresistance ratio (MR ratio) of the multilayer type GMR sensor amounts to the order of about 10-30% when an external magnetic field is in the range of several tens Oe (oersted) to several thousands Oe. The reason why the magnetoresistance ratio has a very large value is that there are a very large number of places where electrons scattering can occur. Further, a very strong external magnetic field is required to achieve such a high magnetoresistance ratio. This is because the magnetization direction of the ferromagnetic material layer 9 is firmly fixed in anti-parallel relation due to the RKKY interaction. It has been found from calculation of plane recording density based on the magnetoresistance ratio in the above range that the multilayer type GMR sensor is adaptable for the plane recording density up to value on the order of 100 Cb/in.sup.2. But it has also been confirmed that when a relatively weak external magnetic field on the order of several Oe is applied, the magnetoresistance ratio of the multilayer type GMR sensor becomes smaller than that of a spin-valve type magnetoresistive sensor.
FIG. 13 shows a conventional single spin-valve type magnetoresistive sensor. This sensor comprises four layers, i.e., a free magnetic layer 1, a non-magnetic electrically conductive layer 2, a pinned magnetic layer 3 and an antiferromagnetic layer 4 from the top. Numerals 5, 5 on both sides denote hard bias layers. Denoted by 6, 7 are respectively a buffer layer and a barrier layer made of non-magnetic material, such as Ta (tantalum), and 8 is an electrically conductive layer. The pinned magnetic layer 3 is selected to have a greater coercive force than the free magnetic layer 1.
Because the pinned magnetic layer 3 and the antiferromagnetic layer 4 are formed in contact with each other, the pinned magnetic layer 3 is put into a single domain state in the Y-direction and has the magnetization direction fixed in the Y-direction under an exchange anisotropic magnetic field produced by exchange coupling at the boundary surface between the pinned magnetic layer 3 and the antiferromagnetic layer 4. By heat-treating (annealing) the sensor under a magnetic field applied thereto, the exchange anisotropic magnetic field can be produced at the boundary surface between the pinned magnetic layer 3 and the antiferromagnetic layer 4.
Also, the hard bias layers 5 magnetized in the X-direction affects the free magnetic layer 1 so that the magnetization direction of the free magnetic layer 1 is uniformly set in the X-direction. In other words, since the free magnetic layer 1 is put into a single domain state in the predetermined direction by the presence of the hard bias layers 5, the occurrence of Barkhausen noise can be prevented.
In the above single spin-valve type magnetoresistive sensor, a steady electric current is applied from the electrically conductive layers 8 to the free magnetic layer 1, the non-magnetic electrically conductive layer 2 and the pinned magnetic layer 3. A magnetic recording medium such as a hard disk runs in the Z-direction. When a leakage magnetic field from the magnetic recording medium is applied to the sensor in the Y-direction, the magnetization direction of the free magnetic layer 1 is varied from the X-direction to the Y-direction. Thus, electrical resistance is changed depending on the relationship between a variation in the magnetization direction of the free magnetic layer 1 and the fixed magnetization direction of the pinned magnetic layer 3. This change in value of electrical resistance result in a voltage change. The leakage magnetic field from the magnetic recording medium is detected based on the resulting voltage change.
FIG. 14 is a sectional view showing a conventional dual spin-valve type magnetoresistive sensor.
In the dual spin-valve type magnetoresistive sensor, non-magnetic electrically conductive layers 2, 2, pinned magnetic layers 3, 3 and antiferromagnetic layers 4, 4 are formed into laminated structures on both sides of a free magnetic layer 1 at the middle in vertically symmetric relation. The magnetization direction of the free magnetic layer 1 is uniformly set in the X-direction by the presence of hard bias layers 5 magnetized in the X-direction. Also, the pinned magnetic layers 3, 3 are each put into a single domain state in the Y-direction and have the magnetization direction fixed in the Y-direction under an exchange anisotropic magnetic field produced by exchange coupling at the boundary surface between itself and the antiferromagnetic layer 4.
When a leakage magnetic field from the magnetic recording medium is applied to the sensor in the Y-direction, the magnetization direction of the free magnetic layer 1 is varied from the X-direction to the Y-direction, whereupon a value of electrical resistance is changed.
In the spin-valve type magnetoresistive sensor, when the magnetization direction of the free magnetic layer 1 is varied from the X-direction to the Y-direction, electrons existing between the free magnetic layer 1 and the pinned magnetic layer 3 and tending to move from one to the other are scattered at the boundary surface between the non-magnetic electrically conductive layer 2 and the free magnetic layer 1 and at the boundary surface between the non-magnetic electrically conductive layer 2 and the pinned magnetic layer 3. As a result, the value of electrical resistance is changed and the leakage magnetic field from the magnetic recording medium is detected based on the resulting voltage change.
The electrical resistance shows a maximum value when an angle formed between the magnetization direction of the free magnetic layer 1 and the magnetization direction of the pinned magnetic layer 3 is maximized, i.e., when these two layers are magnetized in anti-parallel relation, and shows a minimum value when the magnetization direction of the free magnetic layer 1 and the magnetization direction of the pinned magnetic layer 3 are the same. Thus, as a magnetoresistance ratio, i.e., {(maximum voltage value-minimum voltage value)/minimum voltage value}, has a larger value when subject to the leakage magnetic field from the magnetic recording medium, the spin-valve type magnetoresistive sensor and hence a spin-valve type magnetoresistive head using the sensor have better characteristics.
Further, a detection output of the leakage magnetic field also greatly depends on the magnitude of a steady electric current (sensing electric current). The larger the steady electric current, the larger will be the detection output. However, if the density of the electric current flowing through the free magnetic layer 1, the non-magnetic electrically conductive layer 2 and the pinned magnetic layer 3 is too large, resulting Joule heat would give rise to problems of reducing the detection output, reliability and durability, and hence deteriorating characteristics of the spin-valve type magnetoresistive sensor. It has been confirmed that an upper limit value of the steady electric current allowing the spin-valve type magnetoresistive sensor to have satisfactory characteristics is 3.times.10.sup.7 A/cm.sup.2. Incidentally, the upper limit value of the steady electric current can be raised by increasing the total number of layers making up the structure of the spin-valve type magnetoresistive sensor.
In the single spin-valve type magnetoresistive sensor shown in FIG. 13, electron scattering occurs at two places, i.e., the boundary surface between the non-magnetic electrically conductive layer 2 and the free magnetic layer 1 and the boundary surface between the non-magnetic electrically conductive layer 2 and the pinned magnetic layer 3. On the other hand, in the dual spin-valve type magnetoresistive sensor shown in FIG. 14, electron scattering occurs at four places in total, i.e., the two boundary surfaces between the non-magnetic electrically conductive layers 2 and the free magnetic layer 1 and the two boundary surfaces between the non-magnetic electrically conductive layers 2 and the pinned magnetic layers 3. Therefore, the dual spin-valve type magnetoresistive sensor has a larger magnetoresistance ratio than the single spin-valve type magnetoresistive sensor.
To make the sensor adaptable for high-density recording, it is important to improve the plane recording density. To improve the plane recording density, it is required to increase an output reproduced by the sensor. Further, to increase the reproduction output, it is required to raise the magnetoresistance ratio which is proportional to the reproduction output.
As mentioned above, the multilayer type GMR sensor shown in FIG. 12 can provide the magnetoresistance ratio of about 30% at maximum when the external magnetic field of several thousands Oe is applied to the sensor. However, when the external magnetic field is very weak, the magnetoresistance ratio of the multilayer type GMR sensor becomes smaller than that of the spin-valve type magnetoresistive sensor.
Further, for the multilayer type GMR sensor, it is impossible to provide the hard bias layers and suppress the occurrence of Barkhausen noise unlike the spin-valve type magnetoresistive sensor.
The reason is that if the hard bias layers are provided in the multilayer type GMR sensor, all the layers of ferromagnetic material would be magnetized uniformly in the same direction as the magnetization direction of the hard bias layers, and hence that if the external magnetic field is applied to the multilayer type GMR sensor, the electrical resistance would not be changed and the sensor could not detect the leakage magnetic field of the magnetic recording medium.
In the conventional spin-valve type magnetoresistive sensors, generally, the free magnetic layer 1 and the pinned magnetic layer 3 are each formed of, e.g., a FeNi (iron-nickel) alloy film, and the non-magnetic electrically conductive layer 2 is formed of, e.g., a Cu (copper) film. In the conventional single spin-valve type magnetoresistive sensor, a FeMn (iron-manganese) alloy film is generally used as antiferromagnetic material of the antiferromagnetic layer 4.
However, the FeMn film has a disadvantage that it is susceptible to corrosion and would be rusted soon if exposed to air containing moisture. Further, the blocking temperature for exchange coupling between the FeMn alloy film as ferromagnetic material and the FeNi alloy film constituting the pinned magnetic layer is as low as on the order of about 150.degree. C. This raises another disadvantage that if the temperature of a magnetoresistive head becomes high due to the heat generated by itself and the ambient temperature during operation, the exchange anisotropic magnetic field is weakened and noise in the detection output is increased.
As ferromagnetic material substitutable for the FeMn alloy, there are an IrMn (iridium-manganese) alloy, a RhMn (rhodium-manganese) alloy, etc.
However, films of the FeMn (iron-manganese) alloy, the IrMn (iridium-manganese) alloy, the RhMn (rhodium-manganese) alloy, etc. have properties as follows. When these alloy films are formed over the ferromagnetic material, such as an FeNi alloy, constituting the pinned magnetic layer 3, any alloy film can develop exchange coupling at the boundary surface between itself and the pinned magnetic layer 3. But those antiferromagnetic materials have such features that they are easily affected by underlying layers and their films are hard to exhibit antiferromagnetic characteristics in the vicinity of their upper surfaces. Accordingly, when the pinned magnetic layer 3 is formed over any film of those antiferromagnetic materials, it is difficult for the film of the antiferromagnetic material to develop exchange coupling.
On the contrary, films of other antiferromagnetic materials such as a CoO (cobalt oxide) alloy and a NiO (nickel oxide) alloy can each develop exchange coupling at the boundary surface between itself and the pinned magnetic layer 3 when the film is formed under the ferromagnetic material constituting the pinned magnetic layer 3. However, the films of those antiferromagnetic materials such as a CoO alloy and a NiO alloy have a feature of showing dependency in degree of crystallinity. More specifically, each film of those antiferromagnetic materials is hard to develop a satisfactory degree of crystallization in the vicinity of the boundary surface between itself and an underlying layer at start-up of a vacuum film forming process using the sputtering method, for example, attains better growth of crystals at a position farther away from the buffer layer, and hence has a difficulty in exhibiting satisfactory antiferromagnetic characteristics in the vicinity of its lower surface. Accordingly, when the pinned magnetic layer 3 is formed under any film of those antiferromagnetic materials, it is difficult for the film of the antiferromagnetic material to develop exchange coupling.
Thus, the above-mentioned antiferromagnetic materials can develop effective exchange coupling only when formed on one side of, i.e., either over or under, the pinned magnetic layer 3. Therefore, the above-mentioned antiferromagnetic materials cannot be employed in the structure of the dual spin-valve type magnetoresistive sensor shown in FIG. 14 wherein the antiferromagnetic layers 4, 4 are formed over and under the pinned magnetic layers 3, 3.
There is known a NiMn (nickel-manganese) alloy as material capable of producing an exchange anisotropic magnetic field regardless of whether its film is formed over or under the pinned magnetic layer 3. This antiferromagnetic material can be formed on both sides of, i.e., over and under, the pinned magnetic layer 3 and can be used in the dual spin-valve type magnetoresistive sensor shown in FIG. 14.
To develop effective exchange coupling between a NiMn alloy film and a FeNi alloy film (pinned magnetic layer 3), however, annealing is required to be carried out at a relatively high temperature. Generally, to produce an exchange anisotropic magnetic field, it is necessary to apply a magnetic field and carry out annealing after the antiferromagnetic layer 4 and the pinned magnetic layer 3 are formed in contact relation. In the case where the antiferromagnetic layer 4 is formed of a NiMn alloy film and the pinned magnetic layer 3 is formed of a FeNi alloy film, the annealing temperature as high as about 250.degree. C. or above is required to develop effective exchange coupling therebetween.
But the annealing at a high temperature of about 250.degree. C. or above would raise a problem below. There occurs diffusion of metallic elements at the boundary surfaces of the free magnetic layer 1 and the pinned magnetic layer 3 adjacent to the non-magnetic electrically conductive layer 2 of Cu. This affects the magnetoresistive effect due to electron diffusion occurred at the boundary surface between the free magnetic layer 1 and the non-magnetic electrically conductive layer 2 and the boundary surface between the pinned magnetic layer 3 and the non-magnetic electrically conductive layer 2. The magnetoresistance ratio depending on the external magnetic field is thereby reduced.
Meanwhile, to make the sensor adaptable for high-density recording, it is important to not only improve the plane recording density, but also reduce a magnetic gap length G1. When the antiferromagnetic layer is formed of a NiMn alloy film, a good exchange anisotropic magnetic field cannot be achieved unless the antiferromagnetic layer must have a film thickness on the order of several hundreds angstroms. Therefore, a thickness h' of the multilayered films shown in FIG. 14 is necessarily increased and hence the magnetic gap length G1 cannot be made small. Incidentally, the free magnetic layer 1, the non-magnetic electrically conductive layer 2 and the pinned magnetic layer 3 have each a film thickness on the order of several tens angstroms.
The magnetoresistance ratio of the single spin-valve type magnetoresistive sensor is in the range of 3 to 9%. Calculation of plane recording density based on the magnetoresistance ratio in the above range results in that the single spin-valve type magnetoresistive sensor is adaptable for the plane recording density up to values on the order of 10 Cb/in.sup.2.


A telecommunications switching apparatus (10) includes optical paths (16-19) coupled to interface cards (26-29), which in turn are coupled to a switching circuit (41-42). The switching circuit is coupled to a plurality of universal connectors (71-74), each of which is coupled to an auxiliary connector (77-78). The universal connectors can each removably receive any one of several types of switching circuit cards (101-104), which each utilize a respective one of several different communication protocols. An auxiliary circuit card (107-108) may be provided in the associated auxiliary connector, in order to support switching circuit cards that use certain communication protocols. The optically transmitted information includes segments formatted according to respective communication protocols, and is converted from optical to electrical form by the interface cards. The switching circuit then routes each segment to a respective universal connector containing a switching circuit card that effects switching according to the communication protocol of that segment.

This invention relates in general to a method and apparatus for switching telecommunications signals and, more particularly, to such a method and apparatus which implement a hybrid transport capable of handling both synchronous and asynchronous communication protocols.
In existing telecommunication networks, various different communication protocols may be used. One such protocol is known as the virtual tributary (VT) protocol. According to this protocol, which is a synchronous protocol, a given user of a communication path is allocated time slices at predetermined periodic intervals. Another common communication protocol, which is an asynchronous protocol, is known as the asynchronous transport mode (ATM). Yet another asynchronous communication protocol is the Internet protocol (IP). According to each of the ATM and IP communication protocols, a given user of a communication path receives time slices which are not periodic, but which instead occur at variable or random points in time.
Until recently, the amount of asynchronous traffic in telecommunications networks was small in comparison to the amount of synchronous traffic. More recently, however, due in part to the popularity of personal computers and the Internet, the amount of asynchronous traffic traveling through telecommunications networks has been progressively and rapidly increasing. The traditional hardware approach was to provide completely separate switching systems for synchronous traffic and asynchronous traffic. However, as the amount of asynchronous traffic has increased, this has become a less desirable approach. In particular, there has been a progressively increasing demand from network users and telecommunications companies for hybrid switching systems which are capable of efficiently and reliably handling both synchronous traffic and asynchronous traffic.
One existing system uses a line card to terminate a fiber optic path which carries information formatted according to the SONET (Synchronous Optical NETwork) industry standard. According to the SONET standard, information is transmitted in packets known as frames, where each frame includes some overhead information and several data segments. Each data segment includes data formatted according to one of several different industry standard communication protocols, and different data segments in the same frame may conform to different communication protocols. In this existing system, the line card is coupled by respective different interfaces to respective dedicated connectors, where each connector corresponds to a respective communication protocol and can each be detachably coupled to a switching circuit card that effects switching according to that respective protocol. The line card terminates the optical path by converting the transmitted information from an optical format to an electrical format. Further, the line card terminates the SONET communication by demapping the SONET frame, so as to organize the data segments according to the specific communication protocols by which the data is formatted. The line card then routes each data segment to the connector and switching circuit card that correspond to the same communication protocol as that data segment. While this existing approach has been generally adequate for its intended purposes, it has not been satisfactory in all respects.
More specifically, because each connector must be dedicated to a particular communication protocol, extra connectors must be provided for each communication protocol of interest, which leads to a relatively large number of extra connectors of various types in any given system, which in turn increases the overall system size. The larger the system, the more space it takes up in a central facility, a terminal application, or the like. Further, providing separate and different types of electrical interfaces to the respective types of connectors for the various communication protocols has the effect of increasing the complexity and cost of the backplane wiring in the system. Moreover, maintenance of the system is complicated by the fact that maintenance personnel must be careful to plug a given switching circuit card only into the proper connector, not just to ensure proper system operation, but also to avoid possible damage to system circuitry. In addition, due to the fact that each line card not only terminates a fiber optic path, but also has to terminate the SONET frame and then route the data segments to respective different switching circuits, the circuitry of the line cards is relatively sophisticated and expensive.
From the foregoing, it may be appreciated that a need has arisen for a method and apparatus which facilitate switching of data according to multiple communication protocols, while minimizing the size, complexity and cost of the system hardware. According to the present invention, a method and apparatus are provided to address this need, and involve switching communication information containing information segments that each conform to one of a plurality of different communication protocols, in particular by: transmitting the communication information through a communication path section which includes a plurality of communication paths, each of the communication paths carrying a respective portion of the communication information; providing a plurality of universal connectors which are each adapted to be selectively detachably electrically coupled to any of a plurality of types of switching circuits, each type of switching circuit carrying out switching according to a respective one of the communication protocols; and causing a switching section to route the information segments which conform to each respective communication protocol through a respective interface to a respective universal connector having detachably coupled thereto one of the switching circuits which effects switching according to that respective communication protocol, the interfaces being effectively the same.

Method and apparatus for switching signals of multiple different communication protocols


A linear actuator with an electric drive device includes a stator and a rotor, wherein the stator is arranged in a fixed location in a drive housing and the rotor is mounted for rotary motion relative to the stator and with a transmission arrangement which is arranged coaxial with an axis of rotation of the drive device to convert the rotary movement of the rotor into a linear movement, wherein a threaded spindle of the transmission arrangement is non-rotatably connected to the rotor and positively coupled to a spindle nut slidably accommodated in the drive housing and connected to a torque tube, which extends along the axis of rotation, and wherein a brake device is assigned to the rotor and/or to the threaded spindle.

The invention relates to a linear actuator with an electric drive device which comprises a stator and a rotor, wherein the stator is arranged in a fixed location in a drive housing and the rotor is mounted for rotary motion relative to the stator and designed for providing a rotary movement, and with a transmission arrangement which is arranged coaxial with an axis of rotation of the drive device and which is designed for converting the rotary movement of the rotor into a linear movement, wherein a threaded spindle of the transmission arrangement is non-rotatably connected to the rotor and positively coupled in the axial direction to a spindle nut slidably accommodated in the drive housing and connected to a torque tube, wherein the torque tube is mounted rotatably and slidably relative to the threaded spindle and extends along the axis of rotation, and wherein the rotor has a recess which is designed for accommodating the threaded spindle, the spindle nut and the torque tube.
From U.S. Pat. No. 7,541,707 B2, an electrically driven actuator is known in which a spindle drive comprising a threaded spindle and a spindle nut placed thereon are located in a central recess of a rotor of an electric motor designed as a hollow-shaft motor, the rotor being rotatably mounted relative to a stator which surrounds the rotor. For the rotatable mounting of the rotor relative to the stator, bearing means which can be designed as ball bearings are provided in opposite end regions of the rotor. A first bearing means is located in a first end block and a second bearing means is located in a second end block arranged at a distance from the first end block, with a protective sleeve in which the stator of the electric motor is accommodated and which is designed for a mechanical connection of the first and second end blocks extending between the end blocks.


The load/sense control of the setting value that corresponds to the processor core for CMP, etc. processors that have multi-cores realize, for such processors with multi-core structures, the shortening of system boot time during multi-core operation, flexible debugging methods, and improvement of yield with the aid of partial core quality product chips at time of semiconductor production, by equipping a core selection flag register that maintains the status of each core, and controlling the output to the core block from the processor common block through that core selection flag register status.

1. Field of the Invention
The present invention is related to processor control methods of multiple execution processing cores ("cores") of CPUs (Central Processing Units), MPUs (Micro Processing Units), DSPs (Digital Signal Processors), and GPUs (Graphics Processing Units, or graphic processing LSIs, or geometry engines), etc., or other applicable processors.
2. Description of the Related Art
Conventionally, computer systems such as servers that demand particularly high processing abilities such as mission-critical processing for enterprises have improved their processing ability by connecting to multiple processors by being structured using a loosely coupled cluster structure, or a tightly coupled structure through an SMP (Symmetrical Multi-Processor) structure.
However, for loosely coupled cluster structures the communication overhead between server nodes is an issue, and for tightly coupled SMP structures the complexity of server hardware is an issue, so either case has limitations regarding the improvement of performance for singular computer systems using current architecture.
Here, in the field of high-end processors, multi-core processors such as CMPs (Chip Multi-Processors), etc. that make performance improvement possible are currently becoming mainstream by applying a multi-core structure that implements multiple cores within one processor.
However, in the case of a multi-core structure such as that of a CMP, etc., in exchange for the improvement of processing performance through an increase in core numbers, problems such as complication of controls by implementing multiple cores and a decrease in yield during semiconductor production due to the increase in die size have occurred. In particular, the decrease in yield during semiconductor production due to the increase in die size is a very important issue for multi-core processors that use multi-cores such as CMPs, etc.
FIG. 1 shows the basic hardware structure conventional in single-core processors.
Processor 101 is comprised of common block 102 structured from secondary shared cache 111 and local interconnect interface 111 [sic], and core block 103 structured from primary command cache 112, primary data cache 113, command branch unit 114, command issuance unit 115, load/store unit 116, general-purpose register file 117, integer arithmetic unit 118, unit for integer arithmetic 119, floating point register file 120, floating point operation unit 121, and floating point operation completion unit 122. Processor 101 connects to other processors and main memory through local interconnect interface 110, and instructions or data is supplied from the main memory.
The instructions supplied from local interconnect interface 110 are supplied to general-purpose register file 117 or floating point register file 120 through secondary cache 111, primary command cache 112, and command branch unit 114, and instructions are given to integer arithmetic unit 118 or floating point operation unit 120.
Data supplied from local interconnect interface 110 gives data to integer arithmetic unit 118 or floating point operation unit 121 by being supplied to general-purpose register file 117 or floating point register file 120 through secondary sharing cache 111, primary data cache 113, and load/store unit 116.
The data that corresponds to operations for the aforementioned integer arithmetic unit 118, or the operation result for integer arithmetic unit 118, is rewritten to the general-purpose register file 117 through integer arithmetic completion unit 119, and is retained. The data that corresponds to operations for floating point operation unit 120, or the operation result for floating point operation unit 120, is rewritten to floating point register file 121 through floating point operation completion unit 122, and is stored.
Thus, to improve processing performance of computer systems such as servers, there is a method to increase the number of operations included within a computer system.
Also, FIG. 2 shows a server structure that uses conventional symmetrical multiprocessors. Processor 201 is structured from singular CORE block 211 and secondary cache block 212.
Also, the server system is structured from the aforementioned multiple processors 201 connected via the processor local interconnect, processor local interconnect arbiter 202, service processor 203 connected via the (Joint Test Action Group) JTAG interface standardized through IEEE 1149.1, and the system back plane crossbar controller 206 connected via the system back plane crossbar. Processor local interconnect arbiter 202 performs arbitration controls between each processor connected to the processor local interconnect. Also, system back plane crossbar controller 206 performs interface controls between each system board connected to the system back plane crossbar.
For CORE blocks 211 within the aforementioned multiple processors 201, settings are made for the register and scan FF, etc. within each CPU by controlling service processor 203 through service processor program 204 and service processor terminal 205, and by performing a scan through the JTAG interface.
Next, as one example of multi-core processor application, FIG. 3 shows a server system structure that uses 2 CMP multi-core processors and thus has 2 cores. Processor 301 is comprised of CORE 0 block 311, CORE 1 block 312, and CMP common block 310. Also, the server system comprises the aforementioned multiple processor 301 connected through processor local interconnect, and processor local interconnect arbiter 202, service processor 203 connected through the JTAG interface, and system back plane crossbar controller 206 connected through the system back plane crossbar. For CORE 0 block 311 and CORE 1 block 312 within the aforementioned multiple processor 301, by controlling service processor 203 through service processor program 204 and service processor terminal 205, and performing a scan through the JTAG interface, the register and scan FF, etc. within each CPU are set.
Also, FIG. 4 shows conventional multi-core processor structure number 1. Processor 401 is a 2-core multi-core processor comprised of CORE 0 block 411, CORE 1 block 412, and CMP common block 410.
Also, the JTAG controller includes Test Access Port (TAP) controller 413, decoder 415, load controller 416, and load register 417 each on the CMP common block side, CORE 0 register controller 418 and CORE 0 setup register 419 each on the CORE 0 block side, and CORE 1 register controller 420 and CORE 1 setup register 421 each on the CORE 1 block side.
TAP controller 413 performs setting of the load data (scan data) for the core by scan controls for load register 417. Then, JTAG command 414 issued from TAP controller 413 is decoded by decoder 415, and using those decoded results, load controller 416 controls CORE 0 register controller 418 and CORE 1 register controller 419 using a load control signal (load valid) of load data scan set to load register 417, and the same load data settings are simultaneously done to CORE 0 setup register 419 and CORE 1 setup register 420.
In this conventional structure number 1, since only the same load data can be set to CORE 0 setup register 419 and CORE 1 setup register 420, there was a problem of being unable to set individual settings on each core.
Next, FIG. 5 shows conventional multi-core processor structure number 2. Processor 501 is a 2-core multi-core processor comprised of CORE 0 block 411, CORE 1 block 412, and CMP common block 410. Also, the JTAG controller includes TAP controller 413, decoder for CORE 0 515, load controller for CORE 0 516, load register for CORE 0 517, decoder for CORE 1 519, load controller 520 for CORE 1, and load register for CORE 1 521 each on the CMP common block side, CORE 0 register controller 418 and CORE 0 setup register 419 each on the CORE 0 block side, and CORE 1 register controller 420 and CORE 1 setup register 421 each on the CORE 1 block side.
TAP controller 413 performs setting of the load data for the core by scan controlling load register for CORE 0 517 and load register for CORE 1.
First, JTAG command-0 514 issued from TAP controller 413 is decoded by decoder for CORE 0 515, and through those decoded results, load controller for CORE 0 516 controls CORE 0 register controller 418 using a load control signal (load valid) signal on the load data scan set to load register for CORE 0 517, and by controlling CORE 0 register controller 418, the aforementioned load data setting is done on CORE 0 setup register 419.
Next, JTAG command-1 518 issued from TAP controller 413 is decoded with decoder for CORE 1 519, and from these decoded results, load controller for CORE 1 520 controls CORE 1 register controller 420 using a load control signal (load valid) signal on the load data scan set to load register for CORE 1 521, and by controlling CORE 1 register controller 420, the aforementioned load data setting is done on CORE 1 setup register 421.
In this conventional structure number 2, similar to decoder for CORE 0 515, load controller for CORE 0 516, load register for CORE 0 517, decoder for CORE 1 519, load controller for CORE 1 520, and load register for CORE 1 521, the same number of hardware for core controls as the number of cores is required. Due to this, there has been an issue of difficult applicability, since multi-core control logic must become large-scale for large-scale multi-core processors that are likely to become mainstream in the future.
Also, FIG. 6 shows conventional multi-core processor structure number 3. Processor 601 is a 2-core multi-core processor comprised of CORE 0 block 411, CORE 1 block 412, and CMP common block 410. Also, the JTAG controller includes TAP controller 413, decoder 616, load controller 617, and load register 618 each on the CMP common block side, and CORE 0 register controller 418 and CORE 0 setup register 419 each on the CORE 0 block side, and CORE 1 register controller 420 and CORE 1 setup register 421 each on the CORE 1 block side.
First, TAP controller 413 performs settings of load data for CORE 0 through scan control of load register 618. JTAG command-0 614 issued from TAP controller 413 is decoded by decoder 616, and from those decoded results, load controller 617 controls CORE 0 register controller 418 using a load control signal (load valid-0) of the scan set load data on load register 618, and the aforementioned load data is set on CORE 0 setup register 419.
Next, TAP controller 413 performs settings of load data for CORE 1 through scan control of load register 618. JTAG command-1 615 issued from TAP controller 413 is decoded by decoder 616, and from those decoded results, load controller 617 controls CORE 1 register controller 420 using a load control signal (load valid-1) of the scan set load data on load register 618, and the aforementioned load data is set on CORE 1 setup register 421.
In this conventional structure number 3, similar to JTAG command-0 614 and JTAG command-1 615, the same number of JTAG commands as the number of cores is required. Due to this, there has been an issue of difficult applicability, since decode logic must become large-scale for large-scale multi-core processors that are likely to become mainstream in the future.
Other patent literature for chip multiprocessors includes Japanese Unexamined Patent Application Publication 2001-51957.
As described above, conventional technology of processors with multi-core structures through CMP, etc., has problems such as complication of controls for multiple cores and a decrease of yield due to an increase in die size. A need arises for a technique by which controls for multiple processors can be provided without undue complication or decrease of yield.


A hydraulic oscillator having a stator defining an axis of rotation; rotor means; annular-shaped operating chamber between said stator and said rotor; rotary piston associated with said rotor means and disposed within said operating chamber for rotation about said axis of rotation of said stator.

Motion converting apparatus or devices are used in a wide variety of environments. In particular, oscillating fluid-driven actuators can be used when a device is required to impart rotational force to another member. Such oscillating fluid-driven actuator can be manufactured in a variety of sizes depending on their application.
These actuators are ideal, although not limited to, equipment that requires high torque to rotate, such as for example bulk material handling systems. Hydraulic oscillators are utilized at mining sites that use large conveyer booms to load silos, trucks, trains or ships. The rotation of the boom is essential for the efficient positioning and loading and unloading of the material.
Oscillating fluid-driven actuators can be located at one end of the boom and can be rotationally driven about an axis to locate the conveyor boom at the desired location. Rotational movement of these oscillators is generally accomplished by rotational movement of a piston within an annular chamber. Trunnion hubs have been added to the actuator to permit vertical movement of the boom.
Oscillating fluid-driven actuators may be secured to land, on ships or other vehicles, or the like. Generally speaking oscillating fluid-driven actuators that have been secured to ships having large conveyor booms in their bulk material handling systems also utilize rack and pinion arrangements with the actuators when rotating the boom as such heavy output booms require high torque to rotate the booms during operation.
However, actuators having rack and pinion arrangements require large surface areas and therefore restrict the ships capacity due to size and space limitations of the deck covers. Such deck covers are required to be opened for loading, yet the size of the covers is limited by the external turning dimensions of the actuator due to its close proximity to the deck. The loading capacity of the ship may be increased by reducing the turning radius of the equipment.
Conventional ship steering can also be accomplished by rack and pinion structure or hydraulic cylinders. These units require hydraulic induced force. In such applications, the oscillator is fixed while allowing the internal pin or shaft to rotate about an axis which accordingly is attached to the rudder giving the ship's steering capability.
Various devices have heretofore been designed incorporating the actuators generally described above. For example. U.S. Pat. No. 4,982,680 relates to an hydraulic wing actuator for turning movement of a spindle comprising a lower part fixed to the ship hull and an upper part secured to the lower part and which together define a substantially torus shaped guiding path.
Moreover, U.S. Pat. No. 3,446,120 relates to an oscillating fluid-driven actuator having an annular segment-shaped piston slidable mounted in an annular segment-shaped chamber. The piston is integrally formed with an arm and a hub which in turn is operatively connected to a rotary shaft. A fitting plate carries a sealing member at one end or both ends of the piston and is connected to the piston to allow the plate radial movement on the pistons, whereby the sealing member is maintained in central bearing engagement with the chamber.
Furthermore, U.S. Pat. No. 3,731,597 illustrates another rotary actuator.
It is an object of this invention to provide an improved oscillating fluid-driven actuator. Furthermore, it is an object of this invention to provide a oscillating fluid-driven actuator having improved turning characteristics when utilized on ships.
Another difficulty experienced by prior art actuators resides in the leaking characteristics experienced by the fluid mechanisms utilized in the high pressure fluid systems. Many of the prior art actuators include sealing structure in the corners of an annular chamber which are difficult to accurately manufacture and assemble, and therefore eventually leak or ultimately fail in operation. Various attempts have been made to improve such seals. For example, U.S. Pat. No. 3,750,535 relates to a rotary actuator having seal material of synthetic resin which is provided in the internal periphery of the cylinder and the shaft. However, leaking of the seals still plague actuators manufactured in accordance with present standards.
It is a further object of this invention to provide an improved sealing structure when utilized with the actuator described herein.


A logic circuit includes a potential coupled to a node and a first transistor coupled between a first input and the output with its gate coupled to the node. At least a second transistor is coupled between the node and ground with its gate coupled to a second input. At least a third transistor is coupled between the output terminal and ground with its gate connected to the second input.

The present invention relates generally to the field of solid state electronics and specifically to integrated circuitry for digital logic applications.
There is a universal need for digital logic circuits that operate at higher speed and consume less power.
In many applications there is a need to provide an inverter function. In the past this has been accomplished with a separate inverter which requires chip area and power. Thus a need exists for a logic circuit that is functionally equivalent to inverting one of the inputs without requiring the investment in the extra logic gate to perform the function.


In one embodiment, a forend for a firearm includes an adapter module configured to mount below a barrel and in front of a receiver of a specific model of a firearm, such as a shotgun, and a universal firearm accessory module coupled to one or more surfaces of the adapter module. The adapter module can include an upper surface that substantially conforms to a lower surface of the barrel, a longitudinal bore configured to receive a tubular magazine of the firearm concentrically therein, and lower and external side surfaces defining a plug. The accessory module can include a firearm accessory and an upper and internal side surfaces defining a socket configured to receive the plug of the adapter module in a complementary plug-in engagement. The accessory can be a source of a light useful for illuminating a target or aiming the firearm.

1. Technical Field
This invention relates to firearms in general, and in particular, to modular fore-end grips, or "forends," for firearms that are contoured as an accessory-mounting handgrip and useful for gripping and aiming the firearm.
2. Related Art
Long guns, such as rifles and shotguns, typically include two gunstock portions, viz., a buttstock or shoulder stock portion, located at the rear end of the gun, which the shooter grasps with one hand and places against a shoulder during the aiming and firing of the gun, and a forend portion, which is typically located below the barrel of the gun and ahead of its receiver, which the shooter grasps with the other hand and uses to support the barrel and to traverse it in azimuth and elevation, i.e., to aim the gun. In some guns, the shoulder stock and forend of long guns are merged into a single continuous piece, and in others, the forend comprises a separate piece that, in some embodiments, e.g., such as pump-action shotguns and rifles, is slid rearward and then forward on the gun to extract spent shells from the gun and to chamber fresh ones in it. Handguns, such as pistols, typically do not incorporate a forend, but do include one or more handgrips located at a rear portion of the gun on either side of or surrounding a downwardly protruding butt or magazine portion thereof.
Accordingly, over time, the market has seen offerings of a number of accessory-mounting forends for both handguns and long guns. For example, firearm forends incorporating light beam aim-assisting devices for both handguns and long guns are described in U.S. Pat. Nos. 4,777,754 and 4,856,218, both of which are hereby incorporated by reference in their entirety.
Some prior art forends are not without some drawbacks. For example, they are typically configured for and can be used only on a specific model of firearm. Thus, if a user wishes to obtain the same functionality provided by the forend on a different model of firearm, he or she must purchase another complete forend that is specifically configured for use on that model.
Another drawback of some prior art forends relates to their chirality, i.e., they are typically configured for use, particularly their actuating switches, by either a right-handed shooter or a left-handed shooter, but not both, i.e., they lack ambidexterity. Another drawback is that some prior art forends are typically relatively monolithic in construction, with the result that access to the accessory portion of the forend, e.g., for battery replacement or wiring replacement or repair can be difficult.


An optical fiber sensor enabling simpler detection of a state of an external environment and a measuring apparatus using the same are provided. At a front end of an optical fiber portion 20a for transmitting the light a hetero core having a different diameter from that of a core of the optical fiber portion 20a is melt bonded so as to form a tip type optical fiber sensor 9 having a sensor portion 4 comprised of the hetero core on its front end. An end of the optical fiber portion 20a side of this tip type optical fiber sensor 9 has a light source 1 connected to it. Returned light striking the optical fiber portion 20a from the light source 1 and subjected to interaction with a measurement medium MD at the sensor portion 4 is split by an optical fiber coupler 2 and received at a photodiode or spectrum analyzer 6, thereby an optical fiber sensor measuring apparatus 100 is constructed.

Attempts at utilizing-an optical fiber for the purpose of for example sensing a liquid and detecting the concentration of that liquid have been known.
As one type of sensor utilizing an optical fiber, a "hetero core" type optical fiber sensor comprised of an optical fiber at the middle of which a portion of a different core diameter known as a "hetero core" is melt bonded is known. By providing this hetero core, it becomes easier to generate interaction between light used for the sensing and the outside of the sensor.
For example, Patent Document 1 discloses an example of a hetero core type optical fiber sensor.
In Patent Document 1, a hetero core is melt bonded to the front end of an optical fiber. Then, the optical fiber side end of this hetero core type optical fiber sensor at the front end of which the hetero core is bonded is connected to an OTDR (Optical Time-Domain Reflectometer).
By making light strike the hetero core type optical fiber sensor from the OTDR and measuring an intensity of backward scattered light generated in the hetero core by the OTDR, the presence of a liquid, the concentration of the liquid, or other aspects of the state of the external environment can be detected in accordance with the change in intensity of the backward scattered light.
Patent Document 1: Japanese Patent Publication (A) No. 2002-350335 (FIG. 4)
Non-patent Document 1: Kasai, "Bio-sensor utilizing Surface Plasmon Resonance (SPR)" Protein Nucleic Acid Enzymes, vol. 37, no. 15 (1992) pp. 2977-2984

Optical fiber sensor and measuring apparatus using same


The present disclosure discloses an intelligent hair growth helmet, and relates to the field of medical instruments. The intelligent hair growth helmet includes a helmet outer shell; an inner housing is fixedly mounted in the helmet outer shell; a plurality of supporting pipes are uniformly and fixedly mounted on the inner housing; U-shaped supporting plates are fixedly mounted on inner walls of two sides of the inner housing; a plurality of mounting holes are formed in the two U-shaped supporting plates; the same cushion block is slidably sleeved in two mounting holes on the same side; two mounting shafts are symmetrically and fixedly mounted on the cushion block.

In laser hair growth, a low-energy laser with a wavelength of 650 nm, and a light-emitting diode (LED) red light are mainly used. It has been medically proven that the laser hair growth can stimulate the growth of basic energy ATP of human cells. Laser can penetrate the scalp by 3 to 5 mm and directly reach the roots of hair follicles, thus generating the cell growth ability, enhancing the hair follicle metabolism, improving the hair follicle cell proliferation ability, improving the hair follicle growth ability, resisting invasion of DHT to the hair follicles, and causing thicker hairs to grow in an alopecia area.
In the existing art, the hair growth helmet has a poor effect, so an intelligent hair growth helmet is needed to meet people's needs.


An apparatus (UEA) may generate a zero-tail signal to be transmitted in an LTE/LTE-A cell, by introducing time domain samples with zero power or very low power in specific positions of a time symbol tail. The apparatus (UEA) may transmit the generated zero-tail signal to a base station (eNB), such that a first user terminal (UEA) is located in the cell farther away (e.g. on a cell edge) from the base station (eNB) than a second user terminal (UEB). Thus coexistence of signals sent by user terminals (UEA, UEB) located at different distances from the base station (eNB) within a same receiver window is enabled without inter-symbol interference. The generated zero-tail signal may also be transmitted from the first user terminal (UEA) or from the base station (eNB) in an outdoor system that is detectable by a neighboring indoor system.

The following description of background art may include insights, discoveries, understandings or disclosures, or associations together with dis-closures not known to the relevant art prior to the present invention but provided by the invention. Some such contributions of the invention may be specifically pointed out below, whereas other such contributions of the invention will be apparent from their context.
OFDM (orthogonal frequency division multiplexing) is a form of FDM where carrier signals are orthogonal to each other. Thus cross-talk between sub-channels is eliminated. Since low symbol rate modulation schemes suffer less from inter-symbol interference caused by multi-path propagation, a number of low-rate data streams are transmitted in parallel instead of a single high-rate stream. Since the duration of each symbol is long, a guard interval may be inserted between the OFDM symbols, thus eliminating the inter-symbol interference. A cyclic prefix transmitted during the guard interval comprises the end of the OFDM symbol copied into the guard interval, and the guard interval is transmitted followed by the OFDM symbol.

Zero insertion for ISI free OFDM reception


Network communications are secured on clients that do not have a user properly logged in and authenticated. The clients have transmit and/or receive functionality disabled. When a user logs into the client and is properly authenticated, the transmit and/or receive functionality is enabled. In some embodiments, the client can then download firewall policy information to prevent the client from communicating on certain ports or with certain clients. The firewall policy information may be specific to a role that a user logged into the client has. For example, administrators, executives and employee roles may each use different firewall policy information.

1. The Field of the Invention
The invention generally relates to the field of network security. More specifically, the invention relates to securing network traffic by preventing host devices from responding to queries until the host has been authenticated.
2. Description of the Related Art
A computer network allows data to be sent and received between computers on the network. Examples of data that may be shared within a network includes financial information, personal information, word processing data, etc. In addition, text, voice and multimedia data may be sent on a network. Networks have become common in many locations and varied in size. For example at the smaller level, many homes now include a home network for sharing multimedia and other data on the network. These networks are traditionally smaller including a relatively small number of connection points that are all in one location (i.e. the home). Smaller networks, such as those in homes, small businesses, and other localized venues, are commonly referred to as local area networks (LANs). At a larger level, many corporations and other large organizations have large networks with numerous connection points. Often the connection points are in a number of different locations up to and including connection points throughout the globe. Some networks allow users to connect from remote locations through an internet connection. Larger networks are often referred to as wide area networks (WANs).
Commonly, a network may be designed such that there are various tools for controlling access to the network and monitoring what computers are on a network. For example, each computer that is connected to a network has a network device such as a network interface card (NIC) installed on it. The network device may be in the form of, for example, a PCI card for desktop computers or a PCMCIA or CardBus card for laptops. Among other network interface devices are USB network adapters for desktop or laptop computers. Each network device has assigned to it a unique (for the particular network) IP address. In many cases, the unique IP addresses allows a network administrator or network hardware to decipher what computers are on the network. Also, the network can be configured such that certain IP addresses have certain restrictions. The restrictions can prevent certain types of data from traveling to and/or from certain IP addresses. An IP address is typically assigned by a software mechanism such that each network device can have the IP address assigned for the particular network on which the network device resides.
Each network device also has a unique media access control (MAC) address that is permanently assigned to the network device in the hardware of the network device. This MAC address can be used to control access to network resources as well. For example, some network resources can be controlled by restricting access to only MAC addresses that have been previously pre-approved for access to the specific resource.
Communications on networks often involve an authentication procedure. Before data is delivered to a computer, the computer requests the data. When a request for data is sent, the request may include the IP address or MAC address of the network device on which the computer sending the request is installed. A repository storing the data can check the IP or MAC address against a list of approved addresses, and if the IP or MAC address is on the approved list, the repository sends the requested data.
One challenge that arises in modem networking is maintaining appropriate security for the network. Most networks have sensitive data that needs to be protected. Financial institutions are especially concerned about protecting financial information to prevent theft and financial loss. Government agencies are interested in protecting military and other secret information. Corporations are interested in protecting trade secrets and other information. Even home users have an interest in protecting data on computers in a network to protect credit card numbers, passwords and other information that may be stored on computers in the network.
Intruders often invade a network for misappropriating data by gaining access to the network using information specific network devices and computers on the network. In one scenario, the intruder can "spoof" an IP or MAC address for a network device that has been granted access to certain network resources. Spoofing includes sending false identification information when requesting data from a repository on the network. Spoofing an IP or MAC address for a network device that is on a list of approved addresses can result in confidential information being sent on the network and being misappropriated by an intruder.
Intruders can often come into possession of IP and MAC addresses by randomly or systematically "pinging" IP and MAC address on a network. Pinging involves sending a request for a response from a device at a particular IP or MAC address. Pinging is used by network administrators and technicians to troubleshoot network connectivity problems. However, an intruder may use this same tool to discover valid IP and MAC address on a network which can then be used to spoof.
Some computer systems include an internal firewall such that the computer systems prevent the network device from responding to a ping except when that ping comes from a known or trusted source such as other network devices that are known to be on the network. These firewalls are fairly effective against random or systematic pinging by an intruder. Generally, however, these firewalls depend on software installed on the host computer that has the network device installed in it. Thus, the firewalls only prevent the network device from responding when the computer on which the network device is installed has been properly booted and logged into. If a computer on a network provides power to the network device, the network devices will generally respond to pings from any device, including one in use by an intruder, on the network. Appropriate correction is needed to prevent intruders form obtaining identification information about computers on a network by random and systematic attacks.

Enabling network communication from role based authentication


A fixed wireless system (FWS) utilizing Orthogonal Frequency Division Multiplexing (OFDM) communication techniques is spectrally efficient and responsive to communications involving both voice and high speed data, such as Internet data. The FWS includes a wireless base unit; a plurality of fixed wireless remote units; a plurality of wireless data traffic channels available between the wireless base unit and the plurality of fixed wireless remote units; and a plurality of wireless voice traffic channels available between the wireless base unit and the plurality of fixed wireless remote units. Each wireless traffic channel is identifiable by a unique combination of frequency and time slots. Each wireless data traffic channel is used for carrying high speed data in addressed data packets to and from the plurality of fixed wireless remote units. On the other hand, each wireless voice traffic channel can be assigned and dedicated to a particular voice communication call involving one of the plurality of fixed wireless remote units for carrying voice data of the call.

1. Field of the Invention
This present invention relates generally to wireless communication systems, and more particularly to wireless communication systems utilizing Orthogonal Frequency Division Multiplexing (OFDM) techniques.
2. Description of the Related Art
In conventional telephone systems, voice communication between users is realized using a dedicated physical channel in a "circuit-switched" network. In wireless communication systems, such as analog cellular telephone systems, voice communication is similarly realized with the use of a dedicated frequency channel, for example, with the use of Frequency Division Duplex (FDD) communications. In digital cellular telephone systems, voice communication is similarly realized using a dedicated time slot channel, for example, with the use of Time Division Duplex (TDD) communications.
Movement over the past several years, however, has been in the direction of "packet-switched" communications. Packet-switched communications involve small data packets which carry data and are addressed to particular recipients. The physical channel over which the data packets are sent is shared between multiple users, and therefore multiple data packets from multiple users may adversely affect (i.e., slow down) the transmission of data packets. Packet-switched communications have become popular due to the popularity of the Internet. Wireless communication systems, such as cellular and personal communication systems (PCS), have begun to embrace packet-switched communications so that high speed data, such as data available over the Internet, may be obtained. Even for communications involving voice, packet-switched methods have been advocated with use of, for example, Voice Over IP (VoIP).
Wireless communications systems in particular operate over limited spectral bandwidths. These systems must make highly efficient use of the scarce bandwidth resource to provide good service to a large population of users. Good services require that the system have sufficient capacity and be highly responsive to its user requests. Accordingly, what is needed is a wireless communication system that is spectrally efficient and responsive in communications involving voice and/or high speed data.

Methods and apparatus for use in communicating voice and high speed data in a wireless communication system


An optical fiber cable (1) or an optical fiber element has a number of superimposed and adjacent stacks of optical fiber ribbons (3) containing optical fiber ribbons (11), as well as an outer jacket (7). The stacks of optical fiber ribbons (3) are arranged over and/or adjacent to each other and in parallel. Such a construction of an optical fiber cable or an optical fiber element makes a particularly high packing density of the optical fibers possible, so that the optical fiber cable or the optical fiber element can have small outside dimensions even when it contains a large number of optical fibers.

1. Technical Field
The invention concerns an optical fiber cable or an optical fiber element with several superimposed and joined stacks of optical fiber ribbons and an outer jacket.
2. Description of the Prior Art
Optical fiber ribbons comprise a large number of optical fibers which run flat and parallel to each other in one plane and are enclosed between two adhesive films or are bonded together with a material that can be hardened with UV light. Such optical fiber ribbons are used worldwide and to an increasing degree in the manufacture of optical fiber cables or optical fiber elements. As compared to known hollow or bundled conductors with individual optical fibers placed loosely therein, optical fiber ribbons have a significantly higher packing density and the defined position of the individual optical fibers with respect to each other enables the use of simpler joining techniques such as the mass splicing technique.
To arrange optical fiber ribbons in optical fiber cables or optical fiber elements, it is known to superimpose and join several optical fiber ribbons in a stack and enclose it in a tube-shaped protective jacket. Such an optical fiber element can be used as a central conductor or a number of such optical fiber elements can be twisted around a central strength element. It is also known to arrange stacks of optical fiber ribbons in the grooves of a core running lengthwise in a straight or a helical manner.
All of these known constructions of optical fiber cables or elements have in common that by arranging the square stacks of optical fiber ribbons inside the cable or element, there are large unused cross sections which unnecessarily increase the outside diameter and the weight of the optical fiber cable or element.

Optical fiber cable with stacks of optical fiber ribbons


MUX and DEMUX circuits using a photo gate transistor having a pair of thin film electrodes respectively serving as emission and collector electrodes. When photons with at least critical energy are irradiated onto the emission electrode, electrons are emitted from the emission electrode, so that the associated photo gate transistor can carry out a gating operation. The MUX circuit divides a plurality of electrical signals in a time division manner so that the transmission of those signals can be carried out through a single transmission line. The DEMUX circuit recovers an original signal from signals transmitted in a time division manner via a single transmission line. Input signals are received to emission electrodes while being limited in voltage level by input resistor pairs. An optical source irradiates photons to an emission electrode in sync with the application of an input signal. By the irradiation of photons, the emission electrode emits electrons which are transmitted to a collector electrode. As a result, output voltage is output. The output voltage corresponds to the quantity of current of the transmitted signal which is determined by an output resistor in accordance with voltage from a voltage source and the intensity of the irradiated photons.

1. Field of the Invention
The present invention relates to MUX and DEMUX circuits using a photo gate transistor utilizing a field emission process adapted to emit electrons by applying an electric field between two adjacent electrodes in a vacuum or gas, such as the atmosphere, and a photoelectric effect adapted to emit electrons by irradiating photons with at least critical energy onto the surface of a particular material layer.
2. Description of the Prior Art
The recent development of electronic devices capable of achieving a high-speed operation, high integration and high reliability is based on the development of the physics relating to solid semiconductors. Such a demand on high-speed operation, high integration and high reliability is continuously increasing.
However, the development of such electronic devices has reached the limit of ultra-microprocessing techniques. As a result, various problematic factors are exhibited.
In particular, the conduction phenomenon of electrons occurring in a solid electronic device is determined by a scattering phenomenon of electrons resulting from electrons striking against grains in the solid electronic device. Accordingly, the mobility of electrons which is indicative of the degree of the conduction phenomenon is a very important physical quantity.
For this reason, electron mobility became the factor for determining electrical characteristics of semiconductor devices and materials of those semiconductor devices.
In the case of transistors using a silicon substrate, the mobility of electrons and holes in the silicon substrate is fixedly determined. As a result, the performance of such transistors is fixedly determined.
FIG. 1 is a sectional view illustrating a typical MOSFET as a conventional solid electronic device. This MOSFET includes a gate electrode 1, a source 2, a drain 3, a gate insulating film 4 and a silicon substrate 5.
In accordance with the operation principle of the MOSFET shown in FIG. 1, the greater part of the silicon substrate 5 serves only as a support. Actually, the movement of electrons is carried out in a channel induced in a portion of the silicon substrate disposed beneath a gate insulating film.
Also, the operation speed of the MOSFET is determined by the mobility of electrons in the silicon substrate 5.
As a result, MUX/DEMUX circuits using such a solid electronic device have a problem in that the limit of the high-speed operation is determined by the characteristic of the solid electronic device.

Mux and demux circuits using photo gate transistor

Electronics and Telecommunications Research Research Institute


A system implemented for example in the form of an SoC comprises a first demodulator for generating a first data stream to be decoded, and a second demodulator for generating a second data stream to be decoded, and a block decoder. The block decoder comprises an input memory for storing blocks of data from the first data stream and blocks of data from the second data stream, and a block decoding unit for processing, from the input memory, the blocks of data from the first and second data streams.

LDPC codes are a class of error correction codes invented in 1960 by Robert Gallager of MIT ("Massachusetts Institute of Technology"), constituting an alternative to the Viterbi codes as well as to the more recent turbo codes. LDPC codes are block codes which allow approaching the Shannon Limit. The first commercial standard stipulating the use of an LDPC code is the DVB-S2 standard, which is the second-generation ETSI ("European Telecommunication Standardization Institute") standard for satellite digital video broadcasting. LDPC coding is included in it for channel coding, to protect the sent data from noise affecting the transmission channel.
With reference to FIG. 1, a generic transmission subsystem contains, on the side of the sender 10, a data source 11 (denoted DAT_SRC in the figure), followed by a source encoder 12 (denoted SCR_ENC in the figure), a channel encoder 13 (denoted CH_ENC in the figure), and a modulator 14 (denoted MOD in the figure). The source encoder 12 compresses the data (for example using a standard such as MPEG, H264, etc.) so as to reduce the bit rate of the data to be transmitted. The channel encoder adds redundancy (for example by using an LDPC code) to enable the receiver 30 to correct potential errors due to the noise introduced into the transmission channel 20. The modulator 14 adapts the signal to the transmission channel (for example, satellite transmission channel, radio transmission channel, etc.). On the receiver side 30, a demodulator 34 (denoted DEMOD in the figure), followed by a channel decoder 33 (denoted CH_DEC in the figure), and a source decoder 32 (denoted SRC_DEC in the figure), perform operations dual to those performed by the modulator 14, the encoder 13, and the encoder 12, respectively. The demodulated and decoded data are then restored to the entity that uses the data 31 (denoted DAT_U in the figure).
When the channel coding uses a block coding algorithm, as is the case for LDPC codes, the channel decoder comprises an input memory, or channel memory, for storing the data to be decoded. In the known decoders, this memory may comprise a first single port storage element configured for storing a block of bits corresponding to a previously received code word which is currently being decoded, and a second single port storage element configured for storing another block of bits corresponding to a code word currently being received. The processes of receiving and decoding may thus be simultaneous. To avoid the input memory of the decoder becoming full, the block decoding time must be less than the block receiving time. In order to have the highest possible bit rate, the block receiving time must be as low as possible. Therefore, as a general rule, the block decoding time is close to the block receiving time while being less than this receiving time.

Decoding of multiple data streams encoded using a block coding algorithm


A sleeping unit for furnishing a standardized room having two dresser units thereunder is disclosed. Each dresser unit comprises a rectangular box-like frame constructed of 1.times.1 aluminum tubing and welded joints. The frame has a base which is constructed of 1.times.2 aluminum tubing and welded joints connected to the 1.times.1 tubing. The tubing has flanges thereon for the attachment of two panels which are inserted into the frame to form outer surfaces thereon, and each panel has a durable coating thereon. Each dresser unit also comprises a pair of inner frames with drawer slides thereon, wherein the inner frames are attached inside and thereto the box-like frame, and a rear inner frame having two openings therein defining two slots. Each slide has a single screw secured onto a front end thereof. A rear of each slide rests in a respective slot of the rear inner frame whereby each slide is easily removable for repair by removing the screw on the front of the slide. This allows each slide to be removed without further effort. A pair of drawers is mounted to the drawer slides.

The furnishing of dormitory style rooms, in the past, has been very expensive when one desired durable furniture, attractive furniture and maintainable furniture.
For example, in the past, furniture used in the dormitory style rooms was of particle board construction and plastic laminate with some items such as chairs, tables and ladders being made of real wood. In the loft system, this furniture was very heavy and weighed over 1200 pounds per unit and thus was difficult to move for any reason. The plastic laminate is prone to separating and breaking and thus the system becomes a maintenance nightmare. The wooden furniture is further prone to joint failure and general marring of the surface. Because of these problems, a full time staff is required to repair and replace this style of furniture and if there are many rooms, in the hundreds, this becomes a very large and expansive task.
Thus, there exists a need for a means of furnishing standardized rooms in a flexible manner preventing many of the problems associated with less adaptable furniture.

The United States of America as represented by the Secretary of the Air Force

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The invention relates to a method for producing high-purity 1,2-dichloroethane from dissolved chlorine and dissolved ethylene which are brought into contact with each other using a circulating liquid reaction medium which essentially consists of 1,2-dichloroethane and a catalyst and passes through at least one reaction loop. The two limbs of the loop are connected to a gas-phase stripping container which is arranged at the top and from which the reaction product is outwardly transferred either in a gaseous or liquid form or both in a gaseous form and in a liquid form. The addition points for the addition of chlorine and dissolved ethylene are arranged in the limb of the loop in which the liquid rises. The addition point for dissolved chlorine is always arranged downstream of the ethylene addition point. At least one addition point for liquid 1,2-dichloroethane follows each chlorine addition point, and the addition of the liquid 1,2-dichloroethane is carried out under kinetic energy which is high enough to enable a vigorous mixture of 1,2-dichloroethane, dissolved chlorine and ethylene to be carried out. Preferably, the liquid 1,2-dichloroethane is added by means of at least one jet mixer.

The invention relates to a process for the production of 1,2 dichloroethane, hereinafter referred to as EDC, which primarily serves as an intermediate product in the production of monomer vinyl chloride, hereinafter referred to as VCM, which, in turn, is used to produce polyvinyl chloride (PVC). When EDC reacts to form VCM, hydrogen chloride (HCl) is obtained. Hence, EDC is preferably produced from ethylene (C2H4) and chlorine (Cl2) in a manner such as to maintain a balance between the hydrogen chloride (HCl) produced and consumed in the various reactions, as represented by the following reaction equations:Cl2+C2H4→C2H4Cl2 (pure EDC)+180 kJ/Mol  (1)C2H4Cl2 (cracked EDC)→C2H3Cl (VCM)+HCl−71 kJ/Mol  (2)C2H4+2 HCl+½O2→C2H4Cl2 (raw EDC)+H2O+238 kj/Mol  (3)
The process for the production of VCM with an adequate HCl balance —hereinafter referred to as "balanced VCM process"—comprises the following process steps:                direct chlorination in which one portion of the required EDC is produced from ethylene (C2H4) and chlorine (Cl2) in the presence of a homogeneous catalyst and is made available as so-called pure EDC;        oxichlorination in which the remaining portion of the required EDC is produced from ethylene (C2H4), hydrogen chloride (HCl) and oxygen (O2) and made available as so-called raw EDC;        fractionating EDC purification in which the raw EDC, together with the recycle EDC returned from the VCM fractionation step and, optionally, together with the pure EDC is freed from the secondary products formed in the oxichlorination and EDC pyrolysis steps in order to obtain a so-called feed EDC suitable for use in the EDC pyrolysis step; as an option, it is also possible to distil the pure EDC from the direct chlorination step in the heavy-ends column of the EDC distillation section;        EDC pyrolysis in which the feed EDC is thermally cracked, the mixture leaving the reactor, known as cracked gas, consists of VCM, hydrogen chloride (HCl) and non-reacted EDC as well as secondary products;        VCM fractionation in which the desired pure VCM product is separated from the cracked gas while the other essential substances, viz. hydrogen chloride (HCl) and non-reacted EDC contained in the cracked gas, are separately recovered as valuable materials and returned as recycle HCl or recycle EDC to the balanced VCM process.
In most industrial processes, a circulating stream of EDC reaction product is used as the reaction agent in direct chlorination. This can be accomplished in a loop-type reactor with external or internal circulation. The circulation can also be accomplished in a system with natural or forced circulation. In most cases ferric chloride is used as catalyst and in addition, sodium chloride which is able to inhibit the formation of heavy ends, may be admixed as an additive.
The state of the art as regards direct chlorination is, for instance, described in DE 199 10 964 A1. The process according to DE 199 10 964 A1 aims at suppressing side reactions, especially the continuation of the chlorination process of EDC to 1,1,2 trichloroethane, by making most of the chlorination reaction take place in the homogeneous liquid phase. The ethylene, which is less readily soluble in EDC than chlorine, is completely dissolved in the main stream of the circulating EDC reaction fluid in a co-current bubble column. The chlorine, which is more readily soluble in EDC than ethylene, is dissolved in a supercooled EDC part-stream and the resulting solution of chlorine in EDC is fed to the circulating main stream which already contains the dissolved ethylene.
Reaction (1), as a rule, is run with a slight ethylene surplus in order to avoid in any case any corrosion in the reaction system, the formation of secondary products at the end of the direct chlorination reaction and other problems associated with the treatment of chlorine-bearing outlet streams. Chlorine and ethylene are fed to the reactor by means of a ratio controller, the control variable being the ethylene content of the reaction outlet stream. In this case the aim is always to minimise the ethylene surplus at the reactor outlet to the extent possible in order to preclude too large an ethylene loss.
It was also found that reaction (1) produced a particularly high rate of secondary products when it was run as liquid phase reaction as shown in WO 03/070673 A1. This necessitates that ethylene is completely dissolved in the reaction tube prior to adding chlorine. The small gas bubbles generated by the gas distributor slowly grow by coalescence when travelling along this section and they finally reach a constant equilibrium size as a result of coalescence and decomposition activities. This impact adversely affects the mass transfer as the enlargement of the bubble diameter at a given total gas volume reduces the surface area available for mass transfer.
The kinetics of reaction (1) which takes place in the adjacent reaction zone in a largely homogeneous manner follows the velocity principle of the second order, hence at a very high velocity. The reaction velocity sharply drops at the end of the reaction zone when the ethylene and chlorine concentrations diminish gradually.
The overlapping effects that affect the ethylene solution behaviour, the reaction itself and the start of boiling clearly govern the sizing of a state-of-the-art boiling reactor and render a subsequent increase in capacity more difficult.

Method for producing 1,2-dichloroethane by means of direct chlorination


A method for setting a wellbore casing in a subterranean formation is described. The method includes: drilling a test wellbore in the subterranean formation; generating a density profile of a plurality of geological layers above a salt formation in the subterranean formation based on observations from the test wellbore; calculating an overburden stress imposed on the salt formation by weight of overlying formation based on the density profile of the plurality of geological layers; performing creep mechanical behavior tests on core samples from the salt formation to generate a strain-time curve for the salt formation; calibrating multiple analytical creep models with mechanical properties of the salt data generated by the creep mechanical behavior tests; implementing a wellbore closure model based on a best-fit analytical model and mechanical properties of the multiple analytical creep models; drilling a well; and setting a casing through the salt formation.

Salt formations exhibit viscoelastic behavior making them continuously deform under pressure even if they are initially stable. This deformation is called creep and occurs over time once the salt has been disturbed into a non-hydrostatic stress state. During drilling, creep begins as soon as the salt formation is penetrated and occurs as a result of excavation of a borehole in the salt formation and the differential stresses caused by the weight of overlying formation and the stress release due to remove of formation from the borehole. Completions in salt formations can be difficult because of this creep behavior that the salt formations exhibit. Mud designed using conventional methods inside the wellbore does not stop creep of the salt formation and wellbore closure can occur. This is one of the major challenges encountered while drilling in salt formations.
At time of drilling, the weight of the mud in the wellbore is sufficient to maintain the stability of the drilled well. However, the wellbore diameter is gradually reduced while the mud pressure remains the same after drilling. In some salt formations, the wellbore diameter can contract by inches in only few hours. As a result, the borehole size reduces significantly and another drilling operation may be necessary to set a casing.

Setting a wellbore casing in a salt formation