When a resist film formed on a substrate is exposed in a predetermined pattern and thereafter an exposed pattern is developed, a substance capable of decreasing fluidity of the developing solution is added to the developing solution, the developing solution to which the substance is added is caused to become low-fluid under a predetermined condition, the developing solution is applied onto the exposed resist film on the substrate, and thereafter a predetermined trigger is given to the developing solution to cause the developing solution to become high-fluid so as to allow developing to progress. Thereby, line width can be made uniform and defects do not tend to occur during coating of the developing solution.

1. Field of the Invention
The present invention relates to a developing method and a developing apparatus each for developing an exposed pattern after a resist film formed on a substrate such as a semiconductor wafer, an LCD substrate, or the like is exposed in a predetermined pattern.
2. Description of the Related Art
In a coating and developing system for a photolithography process in processes of semiconductor device fabrication, for example, resist coating processing for forming a resist film on the front surface of a semiconductor wafer and developing processing for developing the wafer after performance of exposure processing for the resist-coated semiconductor wafer are performed.
In the developing processing, the wafer which has undergone exposure in a predetermined pattern, post-exposure bake processing and cooling processing is carried into a developing unit to be mounted on a spin chuck. A developing solution is supplied from a developing solution supply nozzle and applied (heaped up) so as to have a thickness of 1 mm, for example, on the entire surface of the semiconductor wafer, and thus a developing solution puddle is formed. The wafer stands still for a predetermined period of time with the developing solution puddle being formed, and developing processing progresses by natural convection. Thereafter, the developing solution is blown off by the semiconductor wafer being rotated by the spin chuck, and then a rinse solution is discharged from a rinse solution supply nozzle to wash away the developing solution remaining on the wafer. Subsequently, the spin chuck is rotated at a high speed, whereby the developing solution and the rinse solution remaining on the semiconductor wafer are blown away so that the wafer is dried. Thus, a series of developing processing is completed.
When the developing solution puddle is formed in this developing processing, nozzles of various shapes are used for applying the developing solution onto the entire surface of the semiconductor wafer, and the wafer is rotated and the nozzle is scan-moved while the developing solution is being discharged from the nozzle.
In the aforesaid prior developing method, however, the time to heap up the developing solution, impact at the time of supply of the developing solution, displacement speed of the developing solution, and the like are uneven in the surface of the semiconductor wafer by any means when the developing solution puddle is formed on the semiconductor wafer, thereby making it difficult to obtain uniformity of line width. Moreover, defects are prone to occur due to entrance of bubbles in heaping up the liquid and the like.
Recently, with high integration of devices from 64 megabytes to 256 megabytes, it is increasingly demanded to make circuit patterns more minute, and the minimum line width almost reaches a super-submicron region of not more than 0.2 xcexcm. In order to meet the demand, a chemically amplified resist is used as a resist capable of micromachining, but the chemically amplified resist has poor wettability for the developing solution, so that the aforesaid defects are prone to occur. When micromachining is performed with the chemically amplified resist, the ununiformity of line width due to the aforesaid unevenness becomes remarkable because of quite high sensitivity of the chemically amplified resist for the developing solution.
An object of the present invention is to provide a developing method and developing apparatus in each of which line width can be made uniform and defects do not tend to occur during coating of the developing solution.
To attain the above object, a first aspect of the present invention is a developing method for developing an exposed pattern after a resist film formed on a substrate is exposed in a predetermined pattern, comprising the steps of: adding a substance capable of decreasing fluidity of a developing solution to the developing solution; causing the developing solution to which the substance is added to become low-fluid under a predetermined condition and applying the developing solution onto the exposed resist film on the substrate; and thereafter giving a predetermined trigger to the developing solution to cause the developing solution to become high-fluid to allow developing to progress.
According to the present invention, the substance capable of decreasing fluidity of the developing solution is added to the developing solution, the developing solution to which the substance is added is caused to become low-fluid under a predetermined condition, and the developing solution is applied onto the exposed resist film on the substrate, whereby developing scarcely progresses at a point of time when the developing solution is applied. The developing solution is caused to become high-fluid after application to allow developing to progress, whereby the developing progresses on the entire substrate all at once. Consequently, time difference in the start time of developing does not occur in the surface of the substrate, thereby enabling uniform developing and improving line width uniformity (CD value uniformity) in the surface of the substrate. Further, since developing progresses all at once after the developing solution is applied and the developing solution is applied in a low-fluid state, the method to heap up the developing solution is not restricted. Furthermore, the developing solution does not directly attack the resist film, thereby decreasing defects.
A second aspect of the present invention is a developing method for developing an exposed pattern after a resist film formed on a substrate is exposed in a predetermined pattern, comprising the steps of: adding a substance changeable from a low-fluid state to a high-fluid state with an increase in temperature to a developing solution; causing the developing solution to which the substance is added to become low-fluid at a predetermined temperature and applying the developing solution onto the exposed resist film on the substrate; and thereafter increasing the temperature of the developing solution to cause the developing solution to become high-fluid to allow developing to progress.
According to the present invention, the substance changeable from a low-fluid state to a high-fluid state with an increase in temperature is added to the developing solution, the developing solution to which the substance is added is caused to become low-fluid at a predetermined temperature, and the developing solution is applied onto the exposed resist film on the substrate, whereby developing scarcely progresses at a point of time when the developing solution is applied. The developing solution is caused to become high-fluid by increasing temperature of the developing solution after application to allow developing to progress, whereby the developing progresses on the entire substrate all at once. Consequently, the same effect as the above can be obtained.
A third aspect of the present invention is a developing apparatus for developing an exposed pattern after a resist film formed on a substrate is exposed in a predetermined pattern, comprising: means for causing a developing solution to which a substance capable of decreasing fluidity of the developing solution is added to become low-fluid under a predetermined condition and applying the developing solution onto the exposed resist film on the substrate; and means for giving a predetermined trigger to the developing solution to cause the developing solution to become high-fluid to allow developing to progress.
A fourth aspect of the present invention is a developing apparatus for developing an exposed pattern after a resist film formed on a substrate is exposed in a predetermined pattern, comprising: means for applying a developing solution to which gelatin is added and which is made a first temperature onto the exposed resist film on the substrate; and means for increasing the temperature of the substrate coated with the resist film from the first temperature to a second temperature which is higher than the first temperature.
These objects and still other objects and advantages of the present invention will become apparent upon reading the following specification when taken in conjunction with the accompanying drawings.

Developing method and developing apparatus


Method and apparatus for positioning bead cores during a building of a radial tire carcass in a tire-building machine. The method includes positioning first and second bead cores on respective first and second core-centering devices, on a first side of a carcass drum and centering the first and second bead cores. Further, the method includes grasping, with a second core-setting device, the second bead core and transporting the second core-setting device and the second bead core to a second side of the carcass drum. Additionally, the method includes grasping, with a first core-setting device, the first bead core; and setting the first and second bead cores onto the tire carcass by the first and second core-setting devices.

1. Field of the Invention
The invention relates to a method for positioning bead cores during the building of a tire carcass of a radial tire on the first step of a tire-building machine which has an expandable carcass drum featuring a cylindrical outer circumference, two bellows supports with bellows and two core-setting devices displaceable in the axial direction of the carcass drum, whereby the core-setting devices pick up the cores from one of the sides of the carcass drum and one of the core-setting devices transports the core picked up by it to the other side of the carcass drum.
The invention further relates to a device for positioning bead cores during the building of a tire carcass of a radial tire on the first step of a tire-building machine which has an expandable carcass drum featuring a cylindrical outer circumference, two bellows supports with inflatable bellows and two core-setting devices displaceable in the axial direction of the carcass drum to pick up the cores from one side of the carcass drum, whereby one of the core-setting devices is displaceable over the carcass drum to the other side of the carcass drum.
2. Discussion of Background Information
It is known to produce green tires by one-step or two-step tire-building machines. In a two-step method, on the first step of the tire-building machine, the inner liner and subsequently the carcass ply is placed and spliced on an expandable carcass drum featuring a cylindrical outer circumference. With the drum expanded, the bead cores are set together with the core profiles. Then the projections of the carcass ply extending beyond the carcass drum are turned up around the bead cores and the core profiles, which is carried out with the aid of inflatable bellows. After the placing of further tire parts, if applicable, and the placing and rolling of sidewall profiles, the tire carcass is finished and is removed from the carcass drum now retracted. The tire carcass is transported to a second building drum via a transfer device. The belt layers are completed to form the belt assembly on a separate belt drum, and subsequently the one-piece or multi-piece tread rubber is applied. A transfer device transports the belt/tread rubber assembly to the tire carcass and positions it over the carcass. By shaping the tire carcass is joined together with the belt/tread rubber assembly and connected by rolling. In a one-step method the production of the carcass and the finishing of the green tire takes place on a single drum by completing with the belt/tread rubber assembly.
With two-step tire-building machines operating according to an expansion-drum method, the cores are set, e.g., from one side of the carcass drum in that the one core is blown over the carcass drum from left to right or vice versa with air nozzles. This measure is unpleasantly loud and works only insufficiently with cores with small core profiles. With tire-building machines operating according to the finger-ply-down method, there is no device at present that would facilitate or accelerate the setting of bead cores. The bead cores are placed into the tire-building machine left and right by hand. The cycle time of the tire-building machine is thus relatively long.
A method and a device for setting bead cores onto a tire carcass are known from EP-A2-1 295 708, in which a tire-building machine with a carcass drum is used, which is clamped on the one side so that both bead cores must be set from the free end of the drum. The two bead cores are grasped at the side of the free area of the carcass drum by one core-setting device each, whereby the one core-setting device is moved over the carcass drum in order to bring this bead core into a "parking position" on the carcass drum. As the core diameter is larger than the outer diameter of the drum, the core is first set onto holding parts arranged over the circumference of the carcass drum, and the core-setting device is removed. In order to set this core, the core-setting device grasps the core again and moves it onto the tire carcass built up in the meantime. When this core-setting device has been removed, it can be brought into its original position again on the other side of the carcass drum. To this ends it is provided that the core-setting device is assembled from segments which can open in a forcipate manner in order to be able to lift the device off the carcass drum.

Method and device for positioning bead wires


A dimming system comprises a controller and an AC-to-DC converter. The controller outputs a control signal in response to a dimming signal. The controller comprises a frequency adjustment circuit and a duty cycle adjustment circuit. The frequency adjustment circuit adjusts the frequency of the control signal in response to the dimming signal. The duty cycle adjustment circuit adjusts the duty cycle of the control signal in response to the dimming signal. The AC-to-DC converter converts an external power and to output a DC signal in response to the control signal so as to drive a light source by the DC signal. When the controller is operated at a first mode, the control signal has a first frequency and a first duty cycle. When the controller switches to a second mode, the control signal has a second frequency and a second duty cycle.

Generally, dimming technology can be divided into Pulse Width Modulation (PWM) dimming and amplitude-modulation (AM) dimming. In PWM dimming, the current of the light source consists of high and low levels and has a frequency of about 1 kHz. Accordingly, for specific situations or products (e.g., photographing, screen and etc.), the PWM dimming causes dark region and visual flicker. On the other hand, in AM dimming, when the magnitude of loading varies significantly, the driving circuit may produce an unstable light source current due to the too-low duty cycle, which flickers the light and limits the dimming range of AM dimming.
Therefore, there is a need for providing a dimming technology to make circuits have larger dimming range under a simple, low-interference and low cost configuration.

Dimming system and operating method thereof

INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE


A panel assembly for a vehicle door has trim panel coupled to the door and having at least a portion thereof that is spaced from the door's outboard frame. The trim panel has first and second impact areas. A plurality of energy absorbing structures is arranged in an array between the trim panel and the door frame. Each energy absorbing structure has a base end, an outboard end, and at least one sidewall. The base end is adjacent to the trim panel. The outboard end engages the vehicle door. The sidewall may include either or both of a reinforcement structure and a weakening structure that are sized and configured so that the energy absorbing structure has a predetermined range of energy absorption against the occupant during a side-impact collision. Energy absorbing structures having different energy absorption characteristics are located adjacent to the first and second impact areas.

Doors for motor vehicles include side impact counter measures such as foam pads or brackets that are placed between a trim panel and a door frame or a bolster that is attached to the door frame. The padding or brackets are capable of absorbing significant amounts energy at a force-deflection rate safe for occupants. In a side-impact collision, the occupant strikes the door and experiences a reaction force. The foam pads or brackets exert a reaction force through a range of displacement during a collision.
To reduce the risk of serious injury, the reaction force exerted upon the occupant should be kept below 6 kN through at least 55 mm. The force exerted upon the vehicle occupant will depend upon a number of factors, including the severity of the impact, the structural characteristics of the side impact counter measures, and the mass of the occupant.

Nissan Technical Center North America, Inc.


The purpose of the present invention is to provide a thermoplastic resin composition for a reflector plate with which it is possible to obtain a molded article having excellent moldability, high mechanical strength, excellent heat resistance and a high reflectance that is stable over time, and it is possible to obtain a reflector plate with which there is little reduction in reflectance due to heating. The thermoplastic resin composition for a reflector of the invention comprises 30 to 80 weight % of a thermoplastic resin (A) having structural units containing carbonyl groups and a melting point or glass transition temperature of 250° C. or higher, 10 to 50 weight % of an inorganic filler (B) containing an inorganic filler (B-1) that comprises a carbonyl structure and has an aspect ratio of 10 to 100, and 5 to 50 weight % of a white pigment (C).

A reflector plate is used in various situations in order to use light efficiently. In recent years, the switchover of a light source to a semiconductor-based one, that is, to a semiconductor laser or a light emitting diode (hereinafter referred to as LED) for the reduction in the size of an apparatus and a light source has been advancing. Therefore, the reflector plate is required to have not only mechanical strength, but also good heat resistance and precision moldability because it is, for example, surface-mounted on a printed-circuit board or the like. The reflector plate is also required to have stable high reflectance because of its function to reflect light, and in particular, it is necessary to suppress the reduction in reflectance due to heating in the steps of assembling LED and reflow soldering.
Further, cost reduction requirements for products have been increasing in recent years. The number of LED packages to be mounted on a finished product such as TV and a monitor is reduced, and the luminance is increased accompanying it. In addition, the reduction in the size of a product is also required. Therefore, cost reduction is achieved by increasing the number of obtainable parts in the production of LED packages by injection molding. In addition, there is required a molding material which not only offers improvement in reflectance but has high melt-flowability.
Glass fibers are generally used in wide applications as a reinforcing material (inorganic filler). However, for example, in the case of molding in which a large number of small molded articles are molded by one shot of injection molding from a molding material containing glass fibers, melt-flowability may tend to be insufficient. Further, a molded article of a molding material containing glass fibers may have a coarse gate cut surface, and since the area ratio which a gate cut surface occupies is relatively large particularly in a small-sized product, the coarse gate cut surface may significantly reduce product appearance. Therefore, an improvement in the melt-flowability of a molding material containing an inorganic filler is required.
Various improvements have been attempted in order to solve this problem. Examples of inorganic fillers particularly shown include Wollastonite (PTL 1), a potassium titanate-containing compound (PTL 2), and a combined use system of potassium titanate and titanium oxide (PTL 3).
However, there is concern that these techniques cause a reduction in reflectance and a reduction in mechanical strength due to the poor dispersion of an inorganic filler in a base polymer by using a plurality of inorganic fillers. Further, in order to disperse an inorganic filler in a base polymer, special screw configuration and temperature setting are used in melt mixing, which increases a load to the base polymer. This may pose the problem of causing a reduction in function due to the decomposition of the base polymer or easily leading to a cost increase.
On the other hand, a technique of suppressing a reduction in reflectance by the improvement of a base polymer is also shown (PTL 4). In many examples, a polyamide material is used for a reflector plate, but discoloration derived from a terminal amino group or an amide bond may occur, resulting in causing a reduction in reflectance. On the other hand, a heat-resistant polyester is attempted to be used instead of a polyamide resin. However, there is no disclosure with respect to the flowability of a resin composition containing a heat-resistant polyester as a base polymer and the mechanical strength of the molded article, and the performance balance as a reflection material is unknown.

Thermoplastic resin composition for reflector, reflector plate, and light-emitting diode element


Customer relationship management (‘CRM’) implemented in a computer system, including administering, by an artificial intelligence agent (‘AIA’) of a CRM application of the computer system, with a customer representative on behalf of a tele-agent, as structure of computer memory of the computer system, a communications session comprising one or more communications contacts with the customer representative; and effecting by the AIA communications with the tele-agent in support of the communications session.

Customer Relationship Management ('CRM') is an approach to managing a company's interaction with current and potential customers. CRM implements data analysis of customers' history with a company to improve business relationships with customers, specifically focusing on customer retention and sales growth. CRM systems compile data from a range of communication channels, including telephone, email, live chat, text messaging, marketing materials, websites, and social media. Through the CRM approach and the systems used to facilitate it, businesses learn more about their target audiences and how to best address their needs.
Enterprise CRM systems can be huge. Such systems can include data warehouse technology, used to aggregate transaction information, to merge the information with information regarding CRM products and services, and to provide key performance indicators. CRM systems aid managing volatile growth and demand and implement forecasting models that integrate sales history with sales projections. CRM systems track and measure marketing campaigns over multiple networks, tracking customer analysis by customer clicks and sales. Some CRM software is available through cloud systems, software as a service (SaaS), delivered via network and accessed via a browser instead of installed on a local computer. Businesses using cloud-based CRM SaaS typically subscribe to such CRM systems, paying a recurring subscription fee, rather than purchasing the system outright.
Despite their sheer size, many CRM systems today lack the infrastructure to make full use of the information they can access. Customer contacts alone, for example can be difficult to track. A tele-agent today does not limit customer contacts merely to phone calls from a desk in a call center. Such contacts are often administered through contact centers that can administer multiple modes of contact, phone, text, email, and so on, among multiple agents across multiple locations. When a particular tele-agent representing a contact center on behalf of a marketing client accepts a phone call from a customer representative, it is entirely possible that there can have been multiple intervening contacts with that customer representative, including text messages and emails or even automated messages from artificial intelligence agents, very difficult for the current tele-agent to know or sort.

This patent is subject to a terminal disclaimer.


The system and method autonomously and selectively jams frequency-hopping signals in near real-time by incorporating a fundamental change in the detection and reaction technology, to provide a reaction time that is short enough, within milliseconds or less, to capture and then jam even the fastest frequency hopping radios in use today, without relying on prior art methods of using standard CPU driven technology.

1. Field of the Invention
This invention relates to advanced military grade communications jamming systems and, more specifically, to a System and Method to Autonomously and Selectively Jam Frequency Hopping Signals in Near Real-time. This unique state-of-the-art invention will have widespread use in any modem military organization that wants to achieve communications dominance and information superiority over any battlefield. The invention will add an essential, and much needed, communications and electronic warfare capability to any respective governments' national defense program.
2. Description of Related Art
Modem military grade communication systems today employ short, burst type transmissions that constantly cycle through a secret sequence of frequencies in order to prevent detection and jamming. Such systems are commonly known as frequency hoppers. Typically, these systems (both foreign and domestic) only transmit on a particular frequency for no more than a few milliseconds at the most. This creates a problem for those who want to detect and jam such transmissions as they happen so quickly. Practically, it is not feasible to simply "splash" the radio frequency spectrum with random noise in order to jam such transmissions. The reasons are that it requires an unpractical amount of power to apply sufficient RF energy to wash out all transmissions. In addition, there may be friendly transmissions that should not be jammed. Also, since the duration of the target transmissions is so short, it is not practical to have (for instance) a CPU that is programmed to evaluate signals, make a determination, and then command transmitters to jam. There is simply not enough time to engage the frequency hopping signals before they have moved on to a new frequency.
What is needed therefore in order to feasibly detect and jam these modem fast hopping transmissions is a System that has: 1) The ability to capture wide bandwidth regions of the RF spectrum instantaneously; 2) The ability to automatically discover (without CPU intervention) sudden, short duration signals as they appear; 3) The ability to automatically determine (without CPU intervention) if the signal should be jammed or not; 4) The ability to autonomously command (without CPU intervention) the jamming equipment to transmit on the appropriate frequencies; and 5) The ability to do all of these functions in near real time from the moment the signal is received.
The prior-art of FIG. 1 is a present-day jamming system. In order to find a target signal, an operator tunes the receiver. It is then up to the radio operator to manually determine if this newly captured signal should be jammed or not. If not, then the radio operator continues to search for new signals. But if the signal is determined to be a target that should be jammed, then the operator sets the controls of his jamming equipment and transmits appropriately. Periodically, the operator stops jamming to see if the signal is still present. Such an operation is called a "look-through" and is necessary in case the target has moved to a new frequency.
Such a traditional setup is suitable for the detection of relatively long duration communication signals such as voice or a low speed data links. But this simple system has several drawbacks including the fact that sudden, short duration signals are extremely unlikely to be captured. In addition, even if a short-duration signal is captured, it is impossible for the radio operator to manually jam the transmission in such a short period of time. Such systems are the oldest kind and are inadequate to jam today's modern military grade frequency hopping radios.
FIG. 2 is a flowchart depicting the functional method 76 of the system of FIG. 1. First, the operator detects a target signal 300 (manually); after deciding to jam the target signal 302, the operator must tune the jamming transmitter to the target signal's frequency 304. When ready, the operator turns on the jamming transmitter to transmit a jamming signal on the target signal frequency 306. As discussed above, periodically the operator must cease transmitting for a short time 308 so that he or she can "look through" for the target signal to see whether or not it is still transmitting on the original frequency 310. If it is still transmitting 312, the operator will re-commence transmitting a jamming signal on the original frequency 306. If, however, the target signal is not up on the same frequency 314, the operator will recommence detect/listen mode 300 and attempt to find the target signal on a new frequency (or another target transmitter).
The prior-art of FIG. 3 is a more elaborate present-day jamming system. The typical system uses a fast scanning receiver to quickly sweep through the RF spectrum looking for signals. Once captured, the frequency setting of that signal is "handed-off" to a CPU whose purpose is to determine if the signal should be jammed or not. This function is typically pre-programmed so as to not require manual intervention and speed up the turnaround time. The CPU then commands the jamming equipment to transmit as programmed.
But again, this prior-art system has many of the same drawbacks as the system of FIG. 1, including the fact that sudden, short duration signals are still very unlikely to be captured. The frequency hopping signals are on the order of milliseconds or less per "hop". Thus, the sweeping receiver must be sweeping past at the right time and at the right place where the signal appears, otherwise the hop will be missed. Also, the CPU cannot process and execute functions in less than a millisecond. Thus, the latency of this system is inadequate to jam short duration signals.

System and method to autonomously and selectively jam frequency hopping signals in near real-time

Abstract: The system automatically determines if detected signal(s) should be jammed, and subsequently to automatically end extremely quickly activates the jamming transmitter on the frequency-hopper transmitter's frequency. Finally, the system provides a programmable user interface so that operators can set up the system to act autonomously as intended, such that operator intervention is unnecessary when the system is placed in jamming operation mode.


A rotor assembly for a gas turbine engine includes a turbine shaft disposed about a longitudinal axis, a first rotor and a second rotor configured for rotation about the longitudinal axis, and an intermediate shaft positioned radially between the turbine shaft and the second rotor. The second rotor is mounted to and axially adjacent the first rotor. The intermediate shaft is mounted to the turbine shaft on an inner radial side of the intermediate shaft. The intermediate shaft is mounted to the second rotor on an outer radial side of the intermediate shaft.

Gas turbine engines, such as those used for aircraft propulsion, may include turbine rotor assemblies which can be attached together and stacked in series axially along a turbine shaft. The use of conventional attachment mechanisms for assembling such rotor assemblies can sometimes result in rotor assemblies having significant axial length and weight. Additionally, rotor assemblies may be directly coupled to the turbine shaft which can make manufacturing of rotor assembly mating features more difficult and can complicate connection of rotor assembly components. Accordingly, there is a need for improved turbine rotor assemblies.

Rotor assembly for a gas turbine engine and method for assembling same


Construction and use of an instrument test fixture for capturing performance data for stimulation or fracturing treatments. The test fixture includes a target material, such as concrete, which includes embedded sensors surrounding a casing. An energetic stimulation treatment, such as a dynamic pulse fracturing technique, is applied through the casing to the target material to simulate a treatment that would be performed in a wellbore. During application of the treatment, the sensors capture measurements which are recorded for analysis by a data collection system. The sensors allow for the measurement of key performance indicators including static and dynamic pressure, generated temperature, and resulting strain energy. The captured data can be analyzed and used to design and optimize stimulation treatments for field applications.

Fracturing is utilized to stimulate the production of hydrocarbons from subterranean formations penetrated by well bores. For example, when performing hydraulic fracturing treatments, a portion of a formation to be fractured is isolated using conventional packers or the like, and a fracturing fluid is pumped through the wellbore into the isolated portion of the formation to be stimulated at a rate and pressure such that fractures are formed and extended in the formation. The fractures provide conductive channels in the formation through which produced fluids can readily flow to the well bore. To facilitate the fracturing operation, a casing placed in the wellbore can be perforated using an explosive charge. The perforation and fracturing techniques utilized can vary depending upon features and properties of the formation.

Instrumented fracturing target for data capture of simulated well


The present disclosure relates to a travel kit which includes a carrying case including a bottom portion and a top portion. The top portion connects to the bottom portion via a fastening means. The kit includes a plurality of containers for the carrying and storage of liquid and similar substances. The containers include a lid with a locking mechanism. The case includes a plurality of securing means attached to the interior wall of the top portion of the carrying case which corresponds to the shape of the plurality of containers and receives the plurality of containers. The case includes a plurality of raised edges attached to the interior bottom wall of the bottom portion of the carrying case. The plurality of raised edges correspond to the shape of the plurality of containers and receives the plurality of containers. The kit includes an instrument for transferring liquid or similar substances into the plurality of containers which is secured to the interior of the carrying case.

1. Field
The present application relates to a travel carrying case for liquid based products used in personal care.
2. Description of Related Art
In August 2006, the Transportation Security Administration (hereinafter TSA) enacted the "311" rules that stipulate any liquids passing through security checkpoints must be only for personal use, and must be placed in containers of 3.4 ounce or less, and all containers must fit into a 1 quart (QT) bag. The TSA 311 rule=3 ounces (oz.) liquid, 1 QT plastic baggie, per 1 person.
The TSA's focus has been, and will continue to remain, squarely on managing liquid carry-ons to find explosive weapons, such as those that are carried in ordinary skin cream jars and in liquids containers. For this reason, it is not expected that the TSA will loosen the restrictions on the liquid 311 rules in the near future. In addition, large consumer brands in the personal product space spend millions on developing and enhancing brand loyalty to their products, but they rarely manufacture their products in small convenient travel sizes.
Current inexpensively made travel tubes are hard to fill, difficult to clean, and usually not meant to store liquid products contents over long periods. If the traveler has liquid product left over in the container after the trip, the unused lotion may have to be discarded, thus wasting valuable and expensive skin-care products. Additionally, these travel bottles and tubes may not be watertight sealed and may leak into travel bags. Moreover, other travel tubes and bottles containers currently available are sometimes made from unidentified types of plastics (unless there is a recycling symbol on the bottom) and are made, look and feel inexpensive and are usually not dishwasher safe. The present application provides improvements over the state of the art as described herein.


A system and method for accurately modeling a fault log is provided for validating one or more elements of fault detection and logging logic for a real-time fault log of a digital system such as, for instance, a computer processor. The method includes injecting one or more known faults into a data path and/or a control path of the computer processor and spawning an individual tracking thread for each of the injected faults. The tracking threads may be synchronized at a predefined synchronization point that is selected as a function of a collective logging delay representing the time required for each of the injected faults to reach a real-time logging point within the computer processor. Once synchronized, the tracking threads may be input into a fault logging specification for fault behavior and/or system impact modeling and fault prioritization for use in generating a fault log model for comparison to the real-time fault log maintained within the computer processor.

There has been significant progress made in recent years to facilitate accurate monitoring of the operation of computer or digital systems that experience faults or errors. Today's digital systems (e.g., computer processors, microprocessors) employ fault management techniques that involve the detection, isolation, and correction of faults or errors. For instance, computer processors generally include a combination of system hardware, software, and/or firmware for detecting faults in real time and logging those faults according to a fault logging specification that provides instructions regarding the recognition and prioritization of faults. Generally, the fault logging specification mandates logging of the most severe or detrimental fault so that the most severe error may be addressed or corrected in a timely manner. For example, if a computer processor accesses a data cache (e.g., SRAM) to carry out a read request, and ten bits of data provided in response to the request contain a first error including one incorrect bit and a second error including two incorrect bits, the fault logging specification implemented within the processor may mandate logging the second, more severe error in the computer processor's real-time fault log. In instances where there are multiple faults of equal severity, the design specification may mandate logging the first fault seen by the real-time fault log.
Fault log modeling is often used to validate the digital system's fault detection and logging logic and real-time fault log. That is, fault log modeling is used to verify that the digital system's fault detection and logging logic correctly implements the fault logging specification. To validate the system's fault detection and logging logic, designers seek to confirm whether the system is correctly implementing the fault logging specification such that the system consistently selects the correct or "right" fault for recording in the real-time fault log. Returning to the computer processor example discussed above, one or more faults may be purposefully injected into a data path of the processor. The fault detection logic within the processor may detect the faults and pass them to the fault logging logic, which may apply the fault logging specification to select one of the faults for logging in the processor's real-time fault log. In parallel, an independent fault log modeler may separately analyze the faults to determine which of the injected faults should be selected by the processor for logging in the real-time fault log if the processor's ability to log faults is correctly implemented according to the fault logging specification. This fault is represented in a fault log model. The processor's real-time fault log may then be compared against the fault log model. If the real-time fault log matches the fault log model, then the processor's fault detection and logging logic is correctly implemented according to the fault logging specification.
While existing fault log modeling techniques provide a mechanism for testing a digital system's real-time fault log, they lack the sophistication to stress the system's ability to correctly recognize, prioritize, and log multiple faults occurring in close temporal proximity. That is, existing fault log modeling techniques involve a simplistic cause and effect relationship between fault injection and fault logging, making these techniques useful only in predicting simple fault log behaviors under isolated circumstances in which the injected faults are known. The simplified nature of existing fault modeling methods does not allow for accurate fault modeling of complex, randomized sequences of faults that involve numerous different types of faults or errors, numerous faults occurring over a limited period of time, or both.
Hence, there remains a need for methods and systems for providing more accurate fault log modeling for use in testing and validating a digital system's fault detection and logging logic and real-time fault log under a variety of system conditions, including circumstances in which multiple faults and/or various types of faults occur within close temporal proximity.

Cycle accurate fault log modeling for a digital system


A high-frequency module can be used in communication satellites. The high-frequency module contains an electronic unit and a housing. The housing at least partially encloses the electronic unit, and the electronic unit is arranged at least partially in an interior space of the housing. An internal connector is arranged on the housing, which is coupled to the electronic unit such that electrical signals can be transmitted between the electronic unit and the internal connector. The internal connector is constructed integrally with at least a part of the housing. This allows a thermo-mechanical stress on the electronic unit to be reduced.

Systems in the field of high-frequency technology are used to transmit signals and data from a transmission system to a receiving system. High-frequency technology is preferably used when data needs to be transferred over a large distance (up to several hundred or several thousand kilometers).
Before signals are transferred to the air interface (e.g. antenna), they can require, for example, processing or conditioning. High-frequency technology is used on communications satellites, for example, in order to amplify, combine and filter communication signals. A high-frequency system often includes individual modules (low-noise amplifiers, known as LNA, filters, couplers, insulators, pre-amplifiers, power amplifiers, etc.) that are connected to each other.
Interfaces are provided between these modules in order to create a mechanical and electrical coupling between the modules. These interfaces are designed to fulfil different functions, for example to minimize the electrical losses and/or to configure the mechanical strength of the interface in accordance with specifications.
EP 2 775 612 A1 and U.S. Pat. No. 9,530,604 B2 describe a signal transmission unit, which is used in the high-frequency range and, in particular, is used in a communications satellite.

High-frequency module with connection interface


Multiple gate stack portions are formed in a gate cavity by direct metal gate patterning to provide FinFETs having different threshold voltages. The different threshold voltages are obtained by selectively incorporating metal layers with different work functions in different gate stack portions.

The present application relates to semiconductor structures, and more particularly to field effect transistors (FETs) having multiple metal gates with different threshold voltages and methods of manufacturing the same.
In advanced semiconductor chips, multiple types of field effect transistors (FETs) with different threshold voltages are used to realize circuit function. A challenge, however, associated with integrating different types of transistors is that each type of transistor generally requires a threshold voltage that is different from what the other types of transistors require. For example, static random access memory (SRAM) transistors typically require a higher threshold voltage than logic transistors due to the relatively lower power requirements of SRAM transistors as compared to logic transistors.
In traditional planar FET technology, threshold voltage adjustment can be achieved through channel doping. Specifically, ion implantation is performed to alter the threshold voltage of SRAM transistors relative to logic transistors, and vice versa. However, when the threshold voltage of a device is increased by increasing the doping concentration in the channel region, carrier mobility decreases, and device performances deteriorate. Moreover, the highly-doped ions in the channel region may compensate the ions in the region where a source or a drain region meets the channel region, thus decreasing the doping concentration in such region and increasing the device resistance.
The conventional channel doping approach is not applicable to adjust the threshold voltage of fin FETs (FinFETs). Due to three-dimensional geometry and static electricity of semiconductor fins, channel doping in FinFET technology leads to dopant fluctuations and threshold voltage variation, which in turn causes the degradation of the device performance. Therefore, there remains a need for improved device structure and method that allow better manipulating threshold voltages for different types of FETs without degrading device performance.

Alternative threshold voltage scheme via direct metal gate patterning for high performance CMOS FinFETs


A computing system can be configured to input model input that includes context data into a machine-learned model and receive model output that describes one or more semantic entities referenced by the context data. The computing system can be configured to provide data descriptive of the semantic entity or entities to the computer application(s) and receive application output(s) respectively from the computing application(s) in response to providing the data descriptive of semantic entity or entities to the computer application(s). The application output(s) received from each computer application can describe available action(s) of the corresponding computer application with respect to the semantic entity or entities. The computing system can be configured to provide at least one indicator to a user that describes the available action(s) of the corresponding computer applications with respect to the semantic entity or entities.

Computing devices (e.g., desktop computers, laptop computers, tablet computers, smartphones, wearable computing devices, and/or the like) are ubiquitous in modern society. They can support communications between their users, provide their users with information about their environments, current events, the world at large, and/or the like. A myriad of different computer applications are operable on such computing devices for performing a wide variety of actions. The user typically must manually select a particular computer application according to the action that the user wishes to perform.

System and method for selecting and providing available actions from one or more computer applications to a user


A collapsible personal watercraft canopy which when extended, provides protection from the weather and support for the watercraft occupants, and also provides lift when the watercraft is in motion, reducing water resistance and which when closed is folded forward and stored on the forward upper hull surface of the watercraft, thus providing protection from sea spray while remaining attractive.

The use of folding canopies which utilize folding frame structures which are covered with a fabric cover on boats to shield the occupants from the effects of the sun, rain or water spray are well known in the art. The canopy frames are suitably affixed to the boat surface and are secured thereto by a combination of cylindrical members, fittings and straps.
Examples of the prior art can be found in U.S. Pat. No. 2,817,345 granted to R. S. Woodruff Sr. on Dec. 24, 1957 entitled "Boat Canopy Support"; U.S. Pat. No. 2,823,684 granted to O. F. Sartori Feb. 18, 1958, entitled "canopy For Boats"; U.S. Pat. No. 4,582,016 granted to Hansen on Apr. 16, 1986 entitled "Collapsible Frame Structure For Boat Roof"; U.S. Pat. No. 4,683,900 granted to Carmichael, Apr. 4, 1987 entitled "Boat Canopy.
Many types of canopies are available in the prior art for providing protection for the boat operator from the effects of the sun or inclement weather. The shelter afforded by these canopies is particularly important when the operator is using his boat for a prolonged period of time or when other shelters are not nearby.
A major problem with folding boat canopies of the prior art may be described as follows: When the canopy is folded or collapsed, there is no convenient manner or location in which the canopy can be stored. In some designs such as U.S. Pat. No. 5,016,558, granted to Oehler, on May 21, 1991, the collapsed roof canopy is allowed to lie on the normal boat rails which are located on the aft and starboard side of the boat.
In patent '558, the collapsed canopy and the support members occupy the major portion of the vessel and greatly restrict the space available for the boat operator and passengers.
U.S. Pat. No. 5.6,697,320 granted to Robert W. Murray in 1997 shows another personal watercraft folding canopy. Unlike the present invention, this patent describes a folding canopy which is stored at the stem of the watercraft. This invention is shown in FIG. 16. At the time of this application, the above referenced patent has not been printed for general use, but the notice of issue has been received by this office, and is application Ser. No. 08/618,633.
U.S. Pat. No. 5,361,717 granted to Kobayashi on Nov. 8, 1994 describes a folding canopy on a small watercraft, having a first poson which shields the passengers from the sun, and having a second position in which the canopy extends above the rear of the boat when collapsed and stored. U.S. Pat. No. 3,195,549 granted to M. T. Stevens on Jul. 20, 1965 illustrates a folding canopy arrangement wherein the canopies lay flat on the rear end of the boat hull. This arrangement often reduces the free space available on the vessel.
The prior art discloses many different types of collapsible canopies on boats. One of the major problems with these types of collapsing canopies, is that they interference with boat access and degrade vessel performance when the canopies are collapsed. This is especially true in small boats such as "Jet Ski" types of watercraft, more commonly referred to as a "Personal Watercraft". These high speed watercraft are found on lakes, oceans, and bodies of water where people play at boating. Because of the higher speed involved, the aforementioned defects become of major importance to the boat owner. The added air resistance of the canopy in both the upright and collapsed position contributes to air resistance and increases the drag of the boat when the boat is in operation. The increased drag coefficient reduces the speed of the vehicle and contributes to poor fuel economy.


A method and system for monitoring a health condition of an individual. At least one physiological parameter of the individual is measured and measured data is then processed in order to detect a potential danger in the measured parameter. Upon detecting the potential danger, a warning signal representative of the potential danger is generated, and a signal for indicating to the individual to actuate a personal communication unit is provided during a predetermined period of time. Upon actuating the personal communication unit, an information message representative of the warning signal is transmitted to the individual. In the absence of actuating the personal communication unit during the predetermined period of time, data indicative of the warning signal is transmitted to a central monitoring station.

Patients suffering from chronic diseases, particularly cardiovascular diseases, should continuously or periodically be monitored by medical specialists to stave off danger of death. Needless to say, reaction time to cardiovascular changes of cardiac patients is a very important, and, even, determinant, factor in effective prevention of fatal attack.
There is a great variety of systems having a common goal of immediately detecting danger of health conditions of a patient and notifying a clinician without any action on the part of the patient. Such a system is disclosed in U.S. Pat. No. 5,339,821, which relates to a home medical system and a medical apparatus for use therewith by which a patient having a disease or a healthy person can measure the daily condition of the disease, or the condition of health, at home. The system thus enables the patient to check certain physiological parameters, such as blood pressure and pulse, by following on-line instructions coming from a medical specialist at central medical station site.
U.S. Pat. No. 5,544,661 discloses a portable device attached to a patient and a central monitoring station. The portable device typically provides access to one or more physiological parameters of the patient and transmits them to a clinician at the central monitoring station, when emergency attention is required. The clinician has both voice contact with the patient and access to interventional therapeutic devices attached to the patient.
Hence, in both of the above examples, continuous direct interaction between the patient and the clinician is required during the monitoring process. However, it is often the case that an individual, either suffering from disease, in particular heart disease, or not, needs to check his health condition. If it appears that the individual is sufficiently well and does not need emergency assistance, communication with a clinician at a central monitoring station is clearly unnecessary. On the other hand, if either a dangerous situation really occurs, or the individual himself feels need for assistance, immediate contact with medical specialists must be made.

System for monitoring health conditions of an individual and a method thereof


An initialization setting circuit (20) is adapted to set an initial condition of a latch circuit in a semiconductor device upon ON-set of the power supply, comprises a detecting circuit (TR1, TR2, R, 21) responsive to ON-set of power supply to detect the power source voltage (Vcc) reaching a given voltage, and an output level control circuit (22) responsive to the detecting signal output from the detecting circuit, for elevating up the level of an output signal of the initialization setting circuit to a high potential level or lowering the level of the output signal of the initialization setting circuit to a low potential level. By supplying the output signal controlled by said output level control circuit of the latch circuit as the power source voltage; the operation of the latch circuit is synchronized when the power source voltage is shut down, and a malfunction can be successfully prevented upon resetting of the power supply.

In the conventional semiconductor memory device, as in the construction shown in FIG. 1, for example, an external address signal Add is input to a row decoder 8 and a column decoder 9 as respective row address signal AD1 and column address signal AD2, through an address register 7. Respective decoders produce decode signals based on respective address signals to select a memory cell of the corresponding address in a memory cell array 1, and writing and reading of data is performed.
In this case, the address register 7 receives an activation signal CS from a chip activation register 4 to control the transmission of the address signal ADD for the internal circuit. The activation signal CS is generated, when reference is made to the construction in FIG. 3, by a chip activation register on the basis of a chip selection signal CSX of an active row, the chip selection signal of which is supplied externally. In this case, the chip selection signal CSX is input to a latch circuit 30 formed by two inverters 34 and 35 connected in a reverse parallel relationship, through two stage inverters 31 and 32 and a transfer gate 33, and is further output as the activation signal CS through two stage inverters 36 and 37. In this construction, when the chip selection signal CSX is "H" level, an "H" level signal is input to the latch circuit 30 and a "L" level signal is output from the latch circuit 30. Therefore, the activation circuit CS becomes "L" level to maintain the address register 7 in an inactive state. Conversely, when the chip selection signal CSX is "L" level, since a "H" level signal is output from the latch circuit 30, the activation signal CS becomes "H" level to activate the address register 7.
On the other hand, for one of the inverter 34 of the latch circuit, a power source voltage Vout is supplied from an initialization setting circuit 20a which will be discussed later (see FIG. 3). For the other inverter 35, power source voltage Vcc is directly supplied from a high potential power source line (not shown) similarly to other circuits. Upon ON set of power (Vcc) supply for such semiconductor memory device, by an operation of the initialization setting circuit 20a, the power source voltage Vout is supplied to the inverter 34 with a delay from the supply of the power source voltage Vcc for the inverter 35. Therefore, upon ON-set of the power supply, because of the operation of the inverter 35 in advance of initiation of the operation of the inverter 34 in the latch circuit 30, the potential at the input terminal A of the latch circuit 30 becomes "H" level, and by this operation of the inverter 35, the output signal of the latch circuit 30 is latched at "H" level after the power supply for the inverter 34.
FIG. 2 shows one example of construction of the above-mentioned initialization setting circuit 20a.
In this figure, for the input terminal of a CMOS inventer 21 (p channel transistor TR3 and n channel transistor TR4), the source of an n channel transistor TR1 is connected. The drain and the gate of the n channel transistor TR1 are connected to a high potential power source line Vcc. On the other hand, to the input terminal of the inverter 21, the drain of a p channel transistor TR2 is connected, which has the source connected to the power source line Vcc, and the gate connected to the output terminal of the inverter 21. Further, a resistor R is disposed between the input terminal of the inverter 21 and a low potential power source line Vss. On the other hand, the output terminal of the inverter 21 is output to the gas of a p channel transistor TR5, the transistor of which has the source connected to the power source line Vcc, and the drain connected to the output terminal (output voltage Vout) of the initialization setting circuit 20a.
When the power source Vcc is allied to the initialization circuit 20a constructed as set forth above, a voltage lower than the power source voltage Vcc by a magnitude corresponding to the threshold level (VthN) of the transistor TR1, is applied to the input terminal of the inverter 21. Subsequently, after a given period from the rise of the power source voltage Vcc, the inverter 21 makes a decision for "H" level for the level of (Vcc-VthN) to output a "L" level output signal to the transistor TR5. By this, the transistor TR5 is turned ON to output the output signal Vout equal to the power source voltage Vcc at the output terminal. On the other hand, at the same time, the transistor TR2 is turned ON to maintain the level at the input terminal of the inverter 21 at "H" level.
Accordingly, the initialization setting circuit 20a is responsive to ON-set of the power supply voltage Vcc and outputs the output signal Vout more rapidly than the power source voltage Vcc at the output terminal with a given period of delay from ON-set. Through the operation set forth above, the power supply for the inverter 34 of the latch circuit 30 is slightly delayed.
However, in the initialization setting circuit 20a as set forth above, a problem will be arise when power source voltage Vcc is shut down at the condition in which the voltage Vout is supplied to the inverter 34 of the latch circuit 30 from the output terminal by ON-set of the power supply (namely, the condition that the signal line connected to the drain of the transistor TR5 is charged at a level substantially corresponding to the power source voltage Vcc).
Namely, the charge accumulated at the output terminal cannot be discharged, and as a result, the voltage level (level of the output signal Vout) at the output terminal is floating at an intermediate level. Accordingly, if power source voltage Vcc is again applied to respective circuits, due the level of the output signal Vout (intermediate level) of the initialization setting circuit 20a, the inverters 34 and 35 of the latch circuit 30 start operation simultaneously. As a result, it becomes possible that the potential at the output terminal B of the latch circuit 30 becomes "H" level. Therefore, the problem of malfunction can arise upon writing in and reading out data.

Initialization setting circuit and semiconductor memory device using the same


A switching device for being connected to switch optical input signals received on a plurality of optical input signal lines into optical output signals on a plurality of optical output signal lines; each device has a time slot interchanger or a wavelength converter in combination with a space-division switching stage for freely exchanging signals on different lines, wherein, according to the invention, such a switching device has multiple stages, including both a time slot interchanger stage and a wavelength converter stage in combination with two space-division switching stages and wherein between every two of the space-division switching stages a time slot interchanging or wavelength converting stage is inserted; the time slot interchanger stages may alternate with wavelength converter stages with a space-division switching network stage in between.; the stages may be combined, such as space-division switching stages and time-slot-interchanging or wavelength-converting stages forming a single functional unit. The apparatus may comprise a module for use in a system having a plurality of such modules.

One of the problems encountered in optical switching is the buffering of signals. To switch time-division-multiplexed signals, it is almost always necessary to interchange the time slots and, hence, to buffer the signals. In packet switches, which are currently of particular interest with regard to future ATM systems (ATM = asynchronous transfer mode), signals have to be buffered whenever two packets, called "cells" in ATM, are present simultaneously for transfer in a particular channel. Because of the random traffic volume, the possibility of two packets having to be forwarded simultaneously on the same path cannot be ruled out.
From J.S. Turner, "Design of a Broadcast Packet Network", published in "Proceedings of INFOCOM '86", April 1986, pages 667 to 675, it is known to combine Links of an ATM switching network into link groups. The links of each group run parallel and are completely equivalent. Besides increasing capacity, this compensates for random traffic variations, which reduces the number of buffers required.
DE 37 42 941 C2 (corresponding to U.S. Pat. No. 4,922,487 discloses an ATM exchange in which fixed numbers of cells or packets to be switched are combined into a frame, and all packets are divided into subpackets of equal length and distributed to subframes. Switching takes place on the basis of subframes using synchronous time-division multiplexing. Use is made of the fact that all time slots on a line represent equivalent serving channels, whereby random variations are largely compensated for. The buffers are those which are required for synchronous time-multiplexed switching anyhow. The storage space required in the switching network is reduced in the ratio of frames : subframes.
From D. W. Smith et al, "Multidimensional Optical Switching Networks", IEEE 1989it is known to combine the conventional multiplexing methods, which, in optical switching, also includes wavelength- or frequency-division multiplexing besides time- and space-division multiplexing, for the purpose of increasing the capacity of an optical exchange. The addition of wavelength- or frequency-division multiplex as a further dimension increases not only the capacity of the exchange but also, to the same extent, the number of equivalent serving channels. However, the total capacity of this exchange is quite limited.
With a sufficient number of equivalent serving channels, random variations are compensated for to the point that buffers can be dispensed with except those required for time-slot interchanging during time-division multiplexing. Even in those cases where buffers are used, there are Limits to the compensation of random variations.

Optical switch and switching module therefor


A method of producing refastenable side seams in an absorbent garment results in an absorbent garment that is adapted to easy application and removal. The refastenable side seams can be produced in either a cross direction, wherein the width of the product is the machine direction, or a machine direction wherein the length of the product is the machine direction. Each of the refastenable side seams includes a lap side seam, which puts the seams under shear strain, as opposed to peel forces. The resulting garment can be opened and closed on either a left side or a right side of the garment.

Pant-like absorbent garments, such as adult incontinence wear as well as infant and children's diapers, swim wear and training pants, typically have adhesive fasteners on the sides for donning and removal, or else rely on the waist opening and leg openings to slide on and off the wearer. Adhesive fasteners wear out in as little as one use. Therefore, if a care giver checks the status of the wearer's absorbent garment contents by unfastening an adhesive fastener, the garment often must be replaced due to a worn out adhesive fastener even if the absorbent garment itself is not in need of changing.
Absorbent garments that slide on and off a wearer are often messy when full. Furthermore, in order to remove such absorbent garments, the wearer's clothing covering the absorbent garments, such as pants, must be completely removed. Checking the status of the wearer's absorbent garment contents is often just as cumbersome as changing the absorbent garment.
There is a need or desire for a process for making pant-like, personal care absorbent garments that have refastenable side seams for ease of removal and donning without complete removal of a wearer's clothing.

Process for making a garment with refastenable sides


A stateful cache layer is created at a mobile device client that tracks the state on both the mobile device and management service. The states are synchronized between the mobile device and the management service on every management session. Through the statefulness of the cache layer, unauthorized changes on the mobile device are detected and accordingly handled such as internal correction or reporting to the management service for actionable instructions. A cache layer on the management server is configured to identify organizational policy changes that affect specific devices and initiate unsolicited immediate management sessions to update the configuration to the specific devices.

A mobile device managed by an organization is typically configured and controlled by a management service to ensure compliance. The mobile device may connect periodically over the air to the management service and send/receive management related information during a management session such as send status, send inventory, receive configuration, or receive policy.
In a conventional system, where the mobile device and the management service may not be aware of the other one's state, same information may be transmitted periodically between the two entities. This may result in excessive traffic, since duplicate information is sent repeatedly. While some powerful devices such as PCs may not be disadvantaged by the excessive traffic, for mobile devices with relatively limited connectivity, bandwidth, and/or battery life this approach may have severe implications due to the device limitations and degrade overall user experience as well as increase total cost of ownership (e.g. cause lag time while performing a management session).
Moreover, the lack of awareness of the mobile device's state by the management service results in lack of trust the management service has in the mobile device that it is correctly configured at any given time. If an on-device configuration or policy changes, that change may not be detected until the next management session, which can take place a long time after the actual change occurs on the device. Similarly, the management service may be unable to determine if an organizational configuration or policy change actually affects a specific device.

Node monitor client cache synchronization for mobile device management


A method and system for utilizing a telematics unit on a telematics-equipped vehicle as a register for ECU Critical Information (ECI) associated with the ECUs in the vehicle, which may include their serial numbers, configurations, software images, and other data includes the telematics unit querying ECUs within the telematics-equipped vehicle such as, for example, when the vehicle is started. The ECUs may then provide the telematics unit with the ECI associated with each ECU. The ECI may be encrypted, and the telematics unit may provide each module that it queries with a nonce used in the encryption process. The telematics unit may then decrypt the ECI received from each of the ECUs and compare the received ECI to previously stored ECI. If the received ECI is different from the previously stored ECI, the telematics unit may send the new ECI to a TSP call center. Both the telematics unit and the call center may replace the previously stored ECI with the new ECI and may maintain records of previously stored ECI and updates to the ECI.

Manufacturers and owners of conventional mobile vehicles such as cars, trucks, motorcycles, and so on face many certain problems associated with the security of the mobile vehicle. In particular, one problem associated with mobile vehicles has traditionally been theft. Stolen vehicles can be hard to locate, and when stolen vehicles are disassembled and sold for parts, it may become even more difficult to track down the parts and identify the parties responsible for stealing or processing the vehicle. The sale of stolen vehicle parts is a problem for manufacturers as well, as it introduces illicit competition from used and worn parts, and harms the industry and consumers generally.
In addition to the problem of theft, manufacturers may encounter warranty issues with owners who may tamper with certain components of the vehicle. For example, an owner or professional "tuner shop" may reprogram the electric control unit (ECU) responsible for the vehicle engine with performance mappings that increase the engine performance ("tuner updates"). However this "tuning" also results in a greatly shortened engine life. Once the engine breaks, the ECU will be re-programmed with the original settings so that the manufacturer cannot determine that the warranty is no longer valid due to "tuner" tampering.
The inventors observe that telematics units within telematics-equipped mobile vehicles may control and monitor various components of the vehicles, as well as provide subscribers with connectivity to a telematics service provider (TSP). The TSP provides the subscriber with an array of services ranging from emergency call handling and stolen vehicle recovery to diagnostics monitoring and turn-by-turn navigation. Telematics units are often provisioned and activated at a point of sale when a subscriber purchases a telematics-equipped vehicle. Upon activation, the telematics unit can be utilized to provide a subscriber with telematics services.
It is an object in part of certain implementations of the present invention to utilize the telematics unit on mobile vehicles to address the problems of tampering and theft. However, while this is an object underlying certain implementations of the invention, it will be appreciated that the invention is not limited to systems that solve the problems noted herein. Moreover, the inventors have created the above body of information for the convenience of the reader and expressly disclaim all of the foregoing as prior art; the foregoing is a discussion of problems discovered and/or appreciated by the inventors, and is not an attempt to review or catalog the prior art.

Vehicle component identification and configuration registry reporting system


A coating composition comprising                a polyester blend comprising                    a first polyester material having a Tg of from 55 to 105° C., the first polyester material being present in the polyester blend in an amount of 60 to 90 wt % (based on solids);            a second polyester material having a Tg of from −10 to 25° C., the second polyester material being present in the polyester blend in an amount of 10 to 40 wt % (based on solids); and                        a crosslinking system comprising                    a) an amine crosslinking material;            b) a phenolic crosslinking material;            c) an isocyanate crosslinking material.

A wide variety of coatings have been used to coat metal cans, such as food and/or beverage cans. The coating systems typically have certain properties such as being capable of high speed application, having acceptable adhesion to the substrate, being safe for food contact and/or having properties that are suitable for their end use.
Many coating compositions contain bisphenol A (BPA). BPA is perceived as being harmful to human health and it is therefore desirable to eliminate it from coatings. Derivatives of BPA such as diglycidyl ethers of bisphenol A (BADGE), epoxy novolak resins and polyols prepared from BPA and bisphenol F (BPF) are also perceived to be problematic. Therefore, there is a desire to provide coating compositions which are free from BPA, BADGE and/or other derivatives, but which retain the required properties as described above.


In a microcomputer including a program memory (1) and a CPU (2) operable in one of high-speed and low-speed modes in which the CPU carries out high-speed and low-speed operations when supplied with high-speed and low-speed clock signals (CKH and CKL), respectively, the program memory includes high-speed and low-speed operation memories (11 and 12) for memorizing high-speed and low-speed mode programs which are read by first and second predetermined address ranges of a program address of a program counter (21) of the CPU and which make the CPU carry out the high-speed and the low-speed operations, respectively. A memory controller (3) produces, when detects the second predetermined address range of the program address, a high-speed operation stop signal for stopping operation of the high-speed operation memory. A clock supplying circuit (4) supplies the CPU with one of the high-speed and the low-speed clock signals that corresponds to one of the high-speed and the low-speed modes. The CPU 2 includes an operation mode setting register (22) for setting a different one of the high-speed and the low-speed modes as an operation mode signal (M). In response to the operation mode signal, the clock supplying circuit supplies the CPU 2 with a different one of the high-speed and the low-speed clock signals.

This invention relates to a microcomputer and, in particular, to a microcomputer of a variable operation speed type for use in a mobile apparatus such as a mobile telephone and a digital video camera.
In recent years, a microcomputer variable in operation speed is used in various kinds of mobile apparatuses such as a mobile telephone and a digital video camera. With an improvement in function of a mobile apparatus of the type, the microcomputer is also required to be improved in function. Presently, an operation frequency is also increased to the order of 10 times that of the prior art. If a high-speed operation is continuously carried out, power consumption is so large that the life of a battery is shortened. This brings about a decrease in commercial value of the mobile apparatus. As well known in the art, power consumption of a logical circuit portion comprising CMOSs (Complementary Metal Oxide Semiconductors) is increased in proportion to the operation frequency. This means that the power consumption can be suppressed by a low-speed operation. Taking this into account, a low-speed operation mode on the order of 32 KHz is introduced in order to decrease the power consumption. Thus, the power consumption is decreased in a standby period.
For example, in the mobile telephone, the high-speed operation such as speech conversion and communication processing is carried out upon speech communication while the low-speed operation such as a clock function and a key input function alone is performed during the standby period. Typically, the stand-by period is substantially longer than a high-speed operation period. Therefore, a continuous usable time duration of the mobile apparatus can be prolonged to thereby increase the commercial value.
On the other hand, the microcomputer uses as a memory readout circuit an analog circuit such as a sense amplifier in which a high-speed operation is realized by flowing the continuous current. With such analog circuit included, the continuous current flows even during the low-speed operation. Therefore, the power consumption can not be decreased during the low-speed operation. Thus, a problem arises in view of the decrease in power consumption.
As an approach to solve the above-mentioned problem, Japanese Unexamined Patent Publication (JP-A) No. 7296/1990 (Reference 1) discloses a memory circuit included in a conventional microcomputer and intended to reduce power consumption of a read only memory (ROM). During the high-speed operation, a high-speed readout operation is carried out by the use of a current-sensing amplifier which is inherently operable at a high speed although a continuous current path is required. During the low-speed operation, low power consumption is achieved by the use of a dynamic readout circuit which has no continuous current path although the operation speed is low.
FIG. 1 shows, in blocks, the memory circuit included in the conventional microcomputer disclosed in Reference 1. The illustrated memory circuit includes ROM cells M3 and M5, each consisting of an N-channel MOS transistor, and a current-sensing amplifier 101. The current-sensing amplifier 101 includes N-channel MOS transistors N12 and N9, P-channel MOS transistors P7 and P8, and an inverter I11 for inverting an electric potential of a node X10 as a common connection point of drains of the transistors N9 and P8 to produce a data signal DI.
The memory circuit further includes N-channel MOS transistors N13, N15, and N16, each forming a switching circuit, P-channel MOS transistors P14, P17, P21, P22, and P28, AND circuits A29 and A30. The AND circuits A29 and A30 have first inputs connected to address lines Al and A2, respectively, second inputs connected to an output of an OR circuit O27 in common, and outputs connected to gates of the transistors M3 and M5, respectively.
An NOR circuit O23 has a first input connected to a data line D4, a second input supplied with an inverted control signal BCS, and an output connected to a gate of the transistor N12. An NOR circuit O24 has a first input connected to a drain of the transistor N16, a second input supplied with the inverted control signal BCS, and an output connected to a gate of the transistor N16.
An inverter I25 inverts a control signal CS to produce the inverted control signal BCS. An OR circuit O27 calculates a logical sum of a precharge signal .o slashed. and the control signal CS. A selection circuit S26 calculates a logical sum of a logical product of a data signal DS on the data line D4 and the inverted control signal BCS and another logical product of the data signal DI and the control signal CS to produce an output signal RO.
The operation will be described with reference to FIG. 1. At first, when the control signal CS has the H level, the transistors P21 and P22 are put in an off state and the OR circuit O27 produces an output of the H level. Therefore, each of the AND circuits A29 and A30 outputs information on each of the address lines Al and A2 as it is and the transistor P28 is put in an off state. On the other hand, the selection circuit S26 is responsive to the control signal CS of the H level and selectively outputs an output of the inverter Ill, i.e., an output of the amplifier 101.
Next, when the control signal CS has the L level, the inverted control signal BCS has the H level. Therefore, the NOR circuits O23 and O24 produce outputs of the L level and the transistors N12 and N16 are turned into an off state to interrupt the continuous current path passing through the transistors N12 and N13 and the transistor P17. On the other hand, the transistors P21 and P22 are turned into an on state so that the H level is supplied to gates of the transistors P8 and P14 so that the transistors P8 and P14 are turned off. As a result, the continuous current passing through the transistors P14 and N13 and the transistors P8 and N9 is interrupted also. On the other hand, the selection circuit S26 is responsive to the control signal CS of the L level and selectively outputs the data DS as an output of a dynamic readout circuit 102. If the precharge signal .o slashed. has the L level, each of the AND circuits A29 and A30 produces an output of the L level. Therefore, the ROM cells M3 and M5 are put in an off state. In this period, the selection circuit S26 outputs the data on the data line D4 precharged, i.e., the H level. Subsequently, if the precharge signal .o slashed. is turned into the H level, the transistor P28 is turned off. If the address line A1 has the H level, the AND circuit A29 produces an output of the H level. However, since the drain of the ROM cell M3 is not connected to the data line D4, the data line D4 holds the precharged H level as memorized data and outputs the memorized data.
As described above, in the memory unit included in the conventional microcomputer, the control signal CS is set at the H level when the high-speed operation such as the operation at 20 MHz is required. Thus, a high-speed readout circuit using the current-sensing amplifier 101 is operated as a memory readout circuit to read from the memory at a high speed a program to be executed.
If a low-power-consumption operation is required in a low-speed operation such as on the order of 32 KHz, the control signal CS is set at the L level to switch the readout circuit into the dynamic readout circuit 102 which reads from the memory the program to be executed. The dynamic readout circuit 102 is substantially equivalent to a part which is formed by removing the current-sensing amplifier 101 from the memory circuit illustrated in FIG. 1. Considering the power consumption of the memory, power supply to the amplifier 101 consuming large electric power is stopped in response to the control signal CS. Accordingly, the dynamic readout circuit 102 requires current consumption corresponding to charge/discharge current of the bit lines alone. Thus, a low-power-consumption operation can be realized in the low-speed operation.
With the improvement in function of the microcomputer following the recent improvement in function of the mobile apparatus, the operation frequency is presently increased to the order of 10 times that of the prior art. If the high-speed operation is continuously carried out, the life of the battery is shortened due to large power consumption. This brings about the decrease in commercial value of the mobile apparatus. Taking the above into account, the low-speed operation mode on the order of 32 KHz is introduced as described in the foregoing in order to reduce the power consumption. Thus, the power consumption is reduced during the stand-by period.
In addition, development of programs in the C language as a high-grade language and increase in function of the mobile apparatus lead to the recent increase in program size. In order to cope with this, the memory (ROM) contained in the microcomputer is increased in size to the order of 10 times that of the prior art. Under the circumstances, even if the readout circuit for the program storage memory is implemented by the current-sensing amplifier and the dynamic readout circuit used in the high-speed operation and the low-speed operation, respectively, the power consumption during the low-speed operation is greater than that of the prior art because of the large memory size.
The reason why the power consumption is increased even in the low-speed operation will be described in the following.
Taking the charge and the discharge into consideration, the current consumption IB per bit line is given by: EQU IB=f(operation frequency KHz).multidot.C (load capacity PF).multidot.V.times.2
In case of an actual high-end microcomputer, an instruction code is read by every 32 bits (4 bytes) equal to a word length. It is therefore presumed that the number of data lines to be charged and discharged is equal to 16 on average.
In case of an ROM having a small memory size of several tens Kbytes, the load capacity per data line is about 5 pF. Assuming that the operation frequency during the low-power-consumption operation is equal to 32 KHz and that the operation voltage is equal to 3 V, the current consumption IBS is given by: EQU IBS=32.times.5.times.3.times.16(number of data lines).times.2=about 15 .mu. A
However, the size of the ROM is increased in recent years as described above. For example, in case of a typical latest ROM having a size of several hundreds Kbytes, a load capacity per data line is about 20 pF. In this event, the current consumption IBL is given by: EQU IBL=32.times.20.times.3.times.16.times.2=about 61 .mu.A
Even if the reading means similar to the memory of the conventional microcomputer is adopted, the current consumption is at least equal to about 61 .mu.A which corresponds to the power consumption of four times that of the prior art.
The conventional microcomputer described above has a structure such that an entire area of the program storage memory can be accessed even during the low-speed operation corresponding to the low power consumption. Therefore, with the increase in capacity of the program storage memory as a result of the increase in function, the current consumption corresponding to the charge/discharge current in memory access is increased to become unignorable.

Microcomputer capable of suppressing power consumption even if a program memory is increased in capacity


A system is disclosed that includes a component, a fault table configured to receive fault information associated with the component, and a diagnosis processor configured to read the fault information from the fault table and initiate corrective action as a function of the fault information. A method for handling faults in the system is also disclosed.

In conventional computer systems, when a system fails, technicians may examine log files to diagnose the problem, after the problem occurs. Conventional fault-tolerant systems may include methods for diagnosing faults after a component fails, while preventing system failure from being caused by the component failure. For example, conventional fault-tolerant systems may include pair and spare systems, where two duplicated components run in lock step, receiving the same inputs. When the outputs from the pair of components differ, one of the components of the pair is known to have failed, although not which one, and both components are shut down and replaced by a spare, possibly without any human intervention. Alternatively, three components may be used that run in lock step, receiving the same inputs. When one of the outputs from the three components differs from the other two, the component that differs is considered to have failed, and may be replaced.
Redundancy and failover mechanisms may be employed which reduces downtime if a primary system fails. A system may be configured in an N+1 or N+i configuration with hot and/or cold standbys. If a primary system fails, the standby system becomes the primary. The amount of downtime caused by such an occurrence may depend on how quickly the system can be failed over to the standby and on how closely the standby was synchronized with the primary system which has failed. Currently, in telephone communication systems, it generally takes a few seconds to fail over a failed system and restore service after the failure is detected. The telephone communication OEMs (Original Equipment Manufacturers) are seeking lower downtime in their systems.
Individual components in a system may also be fault-tolerant. For example, error correcting codes may correct faults, which occur in a memory. When these faults are successfully corrected, they may be invisible to the system as a whole. When these faults continue to build up without being detected or corrected, a system failure may occur. System downtime may be needed for replacing the memory chip.
An increased frequency of correctable errors may suggest that an uncorrectable failure is imminent, or at least that the risk of such a failure has increased. Predicting component failures before they occur may reduce the chance of system failure and the resultant system downtime. Predicting component failures before they occur may also allow maintenance to be performed more efficiently.
Conventional fault handling systems are generally "reactive" in nature. In other words, after a fault happens, an alert is triggered, and fail over is achieved to a known good system, after which diagnosing the problem can begin. As the demand for more and more uptime increases for all applications like e-commerce, electronic trading, etc., the system design challenges becomes almost insurmountable with the reactive failover architectures. In a cost conscious environment when lockstep methods may not be cost justifiable, this reactive mode of fault handling is not sufficient to meet these requirements.

System and method to detect errors and predict potential failures


A system and associated method measures anomalous diffusion of biomolecules in cell membranes of intact cells and includes a laser that illuminates a cell membrane within an intact cell to express fluorescently tagged biomolecules. The laser photobleaches a region of interest and illuminates the region of interest over time. A detector detects the fluorescence recovery over time within the region of interest to yield fluorescence recovery after photobleaching (FRAP) data. A controller computes the mean square displacement (MSD) of diffusing biomolecules and a time-dependent diffusion coefficient D(t) from a plurality of time points of the FRAP data and determines the anomalous diffusion in the cell membrane.

Living organisms depend on the cell signaling system in live, intact cells to transport signal molecules to the correct location and trigger, switch, and modulate a new biological event. Under physiological conditions, cell signaling events are tightly controlled to guarantee that the signaling events occur in the correct location at the right time. When a cell loses control over cell signaling, very often pathological diseases may occur. Therefore, to find the time scales, or kinetic rates such as diffusion coefficients, it is necessary to understand both the physiology and pathology of cells. A majority of cells use diffusion as a major mechanism to transport signaling molecules to desirable locations in extra-/intro-cellular spaces, and especially on cell membranes where various signals are initiated and internalized.
Different techniques have been established to measure cellular diffusion. Fluorescence microscopy is a well-known technique using biomolecules as particles tagged with a fluorescence marker. For example, fluorescence microscopy using fluorescently tagged proteins is proven to work well for non-invasively studying living cells. This fluorescence imaging technique helps determine the localization of cellular structures. A number of other microscopy methods have been developed to investigate the mobility of cellular structures and their interactions, and used to retrieve valuable mechanistic information on the dynamic nature of cellular components.
Fluorescence Recovery After Photobleaching (FRAP) is a well-known technique for analyzing cellular diffusion. In FRAP, a portion of the sample is bleached in a first scan process of a scanning laser microscope. In a subsequent "post-bleach" scanning process, for example, fluorescence images of the sample are recorded. In each scan process, individual locations of a probe are scanned, which correspond to a pixel-wise scan to record a pixelized image of the fluorescence intensity. Each individual scan process usually corresponds to one image frame in which each pixel of a region of interest is scanned at least once. By repeating the scan process, consecutive image frames can be recorded. In FRAP, the recovery of the fluorescence after a photobleaching event between consecutive image frames, i.e., as the function of time, is analyzed, thereby assessing the mobility of the particles.
How fast signaling molecules are transported in cells is measured via diffusion coefficients, D (μm2/sec). Under theoretically ideal conditions, diffusion is a memoryless process and constant in time. However, due to the heterogeneity and complexity of cell membranes, diffusion in cell membranes depends on the history of a trajectory of a diffusing molecule, and therefore, is often described by a time-dependent diffusion coefficient, D(t), which is not only able to give the history of a trajectory of a diffusing molecule, but also give the landscape of membrane environments where the diffusion occurred. It is desirable if time-dependent diffusion characteristics in analyzing cellular dynamics can be further quantified such as with anomalous diffusion using techniques such as fluorescence recovery after photobleaching (FRAP).

System for measuring anomalous diffusion using fluorescence recovery after photobleaching and associated method


Provided is an electrical system including an intelligent learning terminal to analyze biometric information associated with a user and calculate an intensity of electrical stimulation for the user based on a result of the analyzing, and at least one wireless electrical stimulator to provide electrical stimulation to the user based on the calculated intensity of electrical stimulation, wherein the intelligent learning terminal is connected to the at least one wireless electrical stimulator based on wired or wireless communication.

1. Field of the Invention
The present invention relates to an electrical stimulation system including an intelligent learning terminal connected to at least one wireless electrical stimulator based on wired or wireless communication, and a control method of the electrical stimulation system.
2. Description of the Related Art
A body has characteristics of generating an infinitesimal amount of electricity and sensitively changing in response to electrical stimulation provided from an external source. Recently, due to an increased public interest in alleviating chronic pain, treatment devices based on such characteristics of the body have been developed.
However, an effectiveness of such treatment devices may be maximized for predetermined body parts having a high frequency of usage, for example, a shoulder, a waist, an abdomen, arms, legs, and the like. In addition, a user may face an inconvenience of adjusting an intensity of electrical stimulation each time a treatment device is used. Also, a degree of difficulty in manipulation of the treatment devices may result due to a physical disability resulting from application of an inappropriate intensity of electrical stimulation.
In a case of devices designed for use in a hospital setting, since adjustment of an intensity of electrical stimulation is performed by a doctor or a physiotherapist while listening to feedback from a patient, a substantial amount of time and human resources may be required. From the perspective of a patient, placing the responsibility of making direct, suitable adjustments to an intensity of electrical stimulation on the patient may be inconvenient. Also, providing an appropriate intensity of electrical stimulation to a patient experiencing communication difficulties may be complicated.

Electrical stimulation system and control method of electrical stimulation system

ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE