An artificial stone wall panel comprises: an artificial stone, composition of which comprises an inorganic fine powder component with a size of from 9.5 mm to 180 μm, an inorganic finely divided component with a size of less than 180 μm, and a resin component in an amount of from 7 to 30% by weight based on a total artificial stone composition, with a weight ratio of the inorganic fine powder component to the inorganic finely divided component (inorganic fine powder component:inorganic finely divided component) being in a range of from 1:1 to 5:1; and a support for installing the artificial stone onto a wall surface, embedded in the artificial stone, wherein part of the support is exposed at a back surface or edge surface of the artificial stone. This artificial stone wall panel is realized by mold-integrating an artificial stone and structure for installing such artificial stone to an external wall surface, and may be used as an external wall material with excellent design having clear contrast and natural texture.

External walls of large structures such as buildings have been finished by directly applying a coating or tiling to a surface of a concrete body at a construction site or, as in a curtain wall, by precast-molding or connecting a concrete body and a finishing material at a factory and fabricating at the construction site.
On the other hand, for an external wall of a structure such as a house, large panels, such as siding boards subjected to premolding and precoating to form an irregular external surface, fixed on a stud or a base panel made of wood or steel, has been generally widespread.
For example, in case of ceramic siding boards which are most frequently used as external wall materials of houses, the boards are generally installed by adhering or connecting through post treatment engagement fittings on a wall of the house through a stud or a base panel made of wood or steel.
Although use of such siding boards improves a design of external walls and allows a variety in terms of selection of design, adhesion or connection of the engagement fittings through post treatment and installation of the boards onto a surface of an external wall were laborious and costly, and were great restriction factors in terms of construction and cost.
Thus, mold-integrating of the engagement fittings during molding of the siding boards has been studied. However, ordinary cement or ceramic sidings have been problematic in that, in such mold-integrating, warpage and cracks could not be avoided during cure shrinkage of these products.
Meanwhile, in some ALC panels and precast concrete panels having a thickness of more than 50 mm, an example of mold-integrating and embedding by first welding and fixing an engagement fitting to reinforcement steel and then pouring ready-mixed concrete, is known. Here, the reinforcement steel and fittings to be embedded are located on a surface and a back at a nearly central position, or a nearly symmetrical position from a center of a cured product, to prevent warpage and cracks by cure shrinkage. However, such ALC panels and pre-cast concrete panels have an artificial appearance with little natural texture, and are also heavy in terms of weight. Also, a shape and position of the fittings were characteristically restricted.
Under these circumstances, as a product that can realize designs with a more natural texture, an artificial stone, which is a molded product of a mixture of resin, natural stone and mineral, has attracted much attention, and attempts have been made to mold-integrate engagement fittings on such an artificial stone. For example, JP-A-6-106549 proposes a method in which a fitting for engagement is held from both a surface and back by mold-laminating with a molten material obtained by kneading a thermosetting resin and a stone powder. Balance of cure shrinkage of the surface and the back is attempted to suppress warpage. Nevertheless, in this case, only a simple mold-lamination process is attempted, and this molding method is limited. Further, because a relationship between composition of a molded product and integration with a fitting has not been taken into consideration, occurrence of warpage and cracks following integration is not satisfactorily suppressed. Moreover, design properties and physical properties such as strength for using this artificial stone as an external wall material is not actually taken into consideration.
Consequently, an object of the invention of this application is to provide, upon solving the foregoing problems associated with the prior art, a novel artificial stone wall panel as an external wall material with excellent design, while also simplifying installation to an external wall, thereby being advantageous in view of productivity, workability and cost, by mold-integrating an artificial stone and structure for installing such artificial stone to an external wall surface. An object of the invention of this application is also to provide a process for producing the artificial stone wall panel.


An image scaling circuit and a method for scaling an image into images with different ratios are provided. The image scaling circuit includes a line buffer memory apparatus, a line buffer control apparatus, a first and a second scaling circuit. The first scaling circuit is coupled to the line buffer memory apparatus, and performs a first image scaling interpolation operation on the data output by the line buffer memory apparatus. The second scaling circuit is coupled to the line buffer memory apparatus, and performs a second image scaling interpolation operation on the data output by the line buffer memory apparatus. The line buffer control apparatus is coupled to the line buffer memory apparatus, the first scaling circuit and the second scaling circuit, for controlling the line buffer memory apparatus to receive or output a scan line data according to the operation status of the first and second scaling circuits.

1. Field of the Invention
The present invention relates to an image scaling control circuit and a method thereof. More particularly, the present invention relates to the architecture of an image scaling control circuit for scaling an image into at least two images with different scaling ratios at the same time, and a memory control method thereof.
2. Description of Related Art
Recently, flat panel displays (FPDs), for example, LCDs are widely used. Along with the improvement in semiconductor technology, an LCD has various advantages, such as low electric power consumption, light and thin, high resolution, high color saturation and long life span. Therefore, LCDs are widely used in electronic products indispensable to people's life, such as the liquid crystal screens of notebooks or desktop computers and LCD TVs.
As an FPD usually has only one rated resolution, an image scaling circuit must be provided between an input image signal and a panel to scale the resolution of the input image signal to fit the rated resolution of the FPD. For example, if the resolution of the input image signal is 640*480 while the rated resolution of the FPD is 1024*768, the image scaling circuit is needed to convert the input image signal with the resolution of 640*480 into a signal with the resolution of 1024*768 required by the panel through an interpolation operation.
Generally, a set of line buffer memories are built in a conventional image scaling circuit for the use of operation registration of the image scaling circuit. When applied to a dual-display panel, a digital camera or a dual-screen handset, etc. with different resolutions, and the same image must be scaled to two images with different ratios, two sets of image scaling circuits are needed, wherein each set includes a set of line buffer memories. As such, the cost is undoubtedly increased. In addition, if two sets of image scaling circuits should be disposed on a circuit board, the circuit layout will unavoidably become more difficult, and interference may occur easily.
Therefore, an apparatus and a method thereof are needed to solve the above problems, wherein the two sets of image scaling circuits are integrated and share a set of line buffer memories.

Image scaling circuit and method thereof


A semiconductor memory device is constituted such that, when a first wiring layer provides a bit line of a first common complementary data line pair and a third wiring layer provides a bit line of a second common complementary data line pair, a second wiring layer makes an overlapped area between the bit line and the bit bar line of the second common complementary dada line pair equal to the bit line of the first common complementary data line pair and also an overlapped area between the bit line and the bit bar line of the first common complementary data line pair equal to the bit line of the second common complementary data line pair.

1. Field of the Invention
The present invention generally relates to a semiconductor memory device and, more particularly, to a pair of adjacent common complementary data lines, namely the wiring between a pair of global I/O lines.
2. Description of Prior Art
Referring to FIG. 12, there is shown a circuit diagram (for a reading operation in this case) illustrating a memory array of a conventional semiconductor memory device and its peripheral circuits. In the drawing, reference numerals 11 through 14 denote memory cell transistors, reference numerals 15 through 20 denote switching transistors for row decoding, reference numerals 21 and 22 denote output transistors (main amplifiers), reference numerals 23 through 26 denote memory cell capacitors, reference numerals 27 and 28 denote sense amplifiers, reference numeral 29 denotes an output preamplifier, reference symbols BL1 and BL2 denote bit lines, reference symbols ZBL1 and ZBL2 denote bit bar lines, reference symbol GIO denotes a global I/O line, reference symbol ZGIO denotes a global I/O bar line, and reference symbols WL0 and WL1 denote word lines. The BL1 and the ZBL1 are paired and the BL2 and the ZBL2 are paired. The GIO and the ZGIO are paired in global I/O line. The switch transistors 15 through 20 constitute selector switches.
The following describes the operation of the above-mentioned conventional semiconductor memory device.
A bit line selected at reading a device using a memory cell of one-transistor type such as shown in FIG. 12 is connected one of the pair of global I/O lines through the row decoder switching transistors 15 to 20. At this moment, because the common data I/O line possibly gives a noise to the bit line pair, the row decoder starts operating after the sense amplifiers 27 and 28 detect an infinitesimal signal and amplifies the detected signal. Information read from the bit line is supplied to the global I/O line pair connected by the switch transistors 15 through 20, the supplied information is amplified by the output preamplifier 29, and the amplified information is transmitted by the output transistors (main amplifiers) 21 and 22.
Referring to FIG. 13, there is shown a plan view illustrating the common complementary data pair namely the global I/O line pair of the conventional semiconductor memory device. Referring to FIG. 14, there is shown a cross section of the wiring layer of FIG. 13 along line 14--14. In the drawing, reference numeral 4 denotes a semiconductor substrate, reference numeral 5 denotes an insulation layer such as a field oxide film, and reference symbols GIO(n) and ZGIO(n) denote a global I/O line (n) and a global I/O bar line (n) respectively which constitute a global I/O line pair (n) (n being a natural number). If one of the GIO(n) and the ZGIO(n) is a bit line, the other is a bit bar line. Namely, a GIO(1) and a ZGIO(1) constitute a global I/O pair (1) and a GIO(2) and a ZGIO(2) constitute a global I/O line pair (2).
In the conventional example, a single wiring layer is used for the bit line and the bit bar line of the global I/O line pair (n) as shown in FIGS. 13 and 14. This global I/O line pair (n) is connected via a selector switch for selecting one of a plurality of bit lines to be connected to a plurality of memory cells.
Referring to FIG. 15, there is shown a diagram illustrating the coupling capacitors between wirings of the bit line GIO(1) and the bit bar line ZGIO(1) of the global I/O line pair (1) and the bit line GIO(2) and the bit bar line ZGIO(2) of the global I/O line pair (2). In the drawing, C101 denotes the coupling capacitor between the bit line GIO(1) and the bit bar line ZGIO(1), C102 denotes the coupling capacitor between the bit bar line ZGIO(1) and the bit line GIO(2), and C103 denotes the coupling capacitor between the bit line GIO(2) and the bit bar line ZGIO(2).
Referring to FIG. 16, there is shown a diagram illustrating an influence of the coupling capacitor C102 between the bit bar line of the global I/O line pair (1) and the bit line of the global I/O line pair (2) shown in FIG. 15 to be given to the potential of the bit bar line of the global I/O line pair (1) relative to the potential variation of the bit line of the global I/O line pair (2).
The following describes the operation of the above-mentioned conventional constitution.
The bit bar line ZGIO(1) of the global I/O line pair has the coupling capacitor C102 with the bit line GIO(2) of the global I/O line pair (2). When the potential of the bit line GIO(2) of the global I/O line pair (2) changes, the bit bar line ZGIO(1) of the global I/O line pair (1) is influenced by the rise (at changing of the bit line potential of the global I/O line pair (2) from low to high) and the fall (at changing of the bit line potential of the global I/O line pair (2) from high to low) in the bit line potential of the global I/O line pair (2) by the coupling capacitor between the bit lines. This influence interferes with the operation of the bit bar line ZGIO(1) of the global I/O line pair (1). This holds true with the influence to be given by the potential change of the bit bar line ZGIO(1) of the global I/O line pair (1) to the bit line potential of the global I/O line pair (2).
Therefore, in order to protect the bit bar line ZGIO(1) of the global I/O line pair (1) from being influenced by the bit line GIO(2) of the global I/O line pair (2) and the bit line GIO(2) of the global I/O line pair (2) from being influenced by the bit bar line ZGIO(1) of the global I/O line pair (1), the wiring pitch between the bit line GIO(n) and the bit bar line ZGIO(n) must be widened. However, if the wiring pitch is widened, it prevents the efficiency of wiring area from being enhanced, which imposes a problem to the future trend of narrower wiring pitches required by ever higher device integration.

Semiconductor memory device having improved bit line structure

Mitsubishi Electric System LSI Design Corporation


A disposable, toilet flush handle protection device, and mountable dispensing mechanism for minimizing the spread of germs in public facilities, from one user to another. The device comprises an elongated disposable tubular member of a diametric size to be removably placed on and off a conventional, perpendicularly mounted flush handle member of a toilet. A first end of the device is closed, while the second end includes an outwardly flared portion, where the flared portion is preferably formed by plural longitudinal slots to segment the second end. The dispensing mechanism comprises a semi-rigid tube, such as may be formed of a thin walled plastic, open at the top end for receiving a plurality of nestable devices, and open at the bottom end. The bottom end includes an inwardly directed flange to selectively contact and temporarily retain the flared portions of the devices so as to limit the dispensing of a single device at desired intervals.

This invention is directed to sanitizing devices and a dispensing mechanism of the type that may be used in public facilities to minimize the transfer of germs from other users of such facilities.
The present invention relates to a disposable toilet flush handle protector and dispensing mechanism that has particular utility in public restrooms to prevent or minimize the spread of germs, in such facilities as one may find on interstate highways and shopping centers.
In today""s society we are familiar with a variety of sanitizing devices, such as sprays and cleansers, which are common products in one""s household. All to often we are reminded by numerous TV commercials of the problem and spread of germs in the home, where the control thereof is a primary focus of home owners, especially those with children. Unfortunately, we don""t have the same control over public facilities despite attempts by the operators thereof to provide safe and clean facilities. At least one area of concern to those operators is to provide throw away toilet seat protectors, or other means of protection. In this regard the prior art offers a number of devices or practices to minimize one""s contact with the seat of a toilet. The following U.S. patents illustrate some of such devices or practices:
a.) No. 1,563,236, to Smith, teaches a portable toilet seat which utilizes a pair of U-shaped pivotal legs, pivotal from the underside of a circular toilet seat.
b.) U.S. Pat. No. 1,379,374, to Wagner, relates a folding chair having a seat with a central commode opening, and four individually pivotal legs.
c.) U.S. Pat. No. 1,223,065, to Meyer, discloses a portable toilet seat similar to that taught by Smith.
d.) U.S. Pat No. DE 1,051,467, to Elgin, teaches a child""s fixed stool which is adapted to be positioned over a conventional toilet.
A very recent patent, though still one addressing the concern of the spread of germs associated with toilet seats of public restrooms, is U.S. Pat. No. 6,000,068, to Chavis. The patent is directed to a portable and removable commode seat that comprises a commode seat and a series of extendable and foldable legs secured to the commode seat and extending therefrom. When the legs are extended generally vertically from the commode seat, the commode seat can be placed over a conventional commode and utilized without the person ever coming in contact with the underlying fixed commode. After use, the legs can be folded to extend adjacent the underside of the commode seat for convenient handling or storage. A modification thereof is a commode seat having plural J-shaped supports to rest on and be supported by the conventional commode. In each case, a preferred feature is the provision of plural, thin, peelable and removable sheets of paper, or other suitable material, overlying the seating surface to allow the user thereof to expose a fresh and germ free surface when desired.
Unfortunately the foregoing prior art deals only with the single source of germs, and the protection thereagainst, that one can encounter in a public facility. A secondary source of germs, and the spread thereof, but which has received no recognition, is the flush handle of a toilet. Typically, especially in public facilities, toilet flush handles comprise a depressible, elongated handle that is manually operated by the user. With thousands of flushes per month at popular highway rest sites, and only periodic cleansing and possible sanitizing, germs can easily spread, germinate and present major problems to those who follow. This invention addresses the latter concern by providing a disposable sleeve member, and dispenser, that insulates the user from the potential germs which may be present on the flush handle. The manner by which this invention meets this secondary source of germs will become apparent in the description which follows, particularly when read in conjunction with the accompanying drawings.
This invention relates to a disposable, toilet flush handle protection device and mountable dispensing mechanism therefore, where the device has particular utility for minimizing the spread of germs in public facilities, from one user to another. The device comprises an elongated tapered disposable tubular member of a diametric size to be slidably received onto and off a conventional, perpendicularly mounted flush handle member. A first end of the device is closed, while the second end includes an outwardly flared portion, where the flared portion is preferably formed by plural longitudinal slots to segment the second end. The dispensing mechanism comprises a semi-rigid tube, such as may be formed of a thin walled plastic, open at the top end for receiving a plurality of nestable said devices, and open at the bottom end. The bottom end includes an inwardly directed flange to selectively contact and temporarily retain the flared portions of the devices so as to limit the dispensing of a single said device at selected intervals.
Accordingly, an object of this invention is to give comfort and security to users of the invention against the spread of germs in public restroom facilities.
Another object hereof is the provision of disposable, biodegradable items that protect users thereof against the spread of germs, without adversely impacting the environment.
A further object of the invention is a convenient and simple dispensing mechanism that can be readily mounted to a wall or other fixed structure within easy reach of the user.
These and other objects will become more apparent in the description which follows, especially by those skilled in the art, when read in conjunction with the accompanying drawings.

Toilet flush handle protector and dispensing mechanism


Examples described herein relate to method and system for determining a response time for an action. A request for an action may be communicated from a source entity to a target entity. The action is generated by the source entity and which is to be responded by the target entity. Further, a response time corresponding to the action may be determined based on prior execution experience of one or more jobs associated with the action and a learning rate. Thereafter, the source entity may be allowed to wait for a response corresponding to a completion of the action from the target entity for at least a time duration corresponding to the response time.

After a source entity sends a request for an action to be fulfilled by a target entity, a wait state mechanism of the source entity may wait for a response from the target entity for a certain time period that is usually set to a predefined or fixed wait time value. A request timeout may occur when a response has not been received from the target entity within a designated time period after communicating the request to the target entity.
It is emphasized that, in the drawings, various features are not drawn to scale. In fact, in the drawings, the dimensions of the various features have been arbitrarily increased or reduced for clarity of discussion.

Hewlett Packard Enterprise Development LP


A method of authenticating a text document with links to a plurality of files by modifying at least a selected attribute of invisible characters on a plurality of inter-word intervals of the text document, this method comprising the steps of computing (step 10) a one-way hash function of each file in order to obtain a hash value composed of a subset of hash digits for each one, encoding (step 16) each subset of a plurality of subsets of space characters in the document by replacing in each subset of space characters, the value of the selected attribute for each space character by a corresponding encoded hash digit of each subset of hash digits corresponding to each file, computing (step 18) the electronic signature of the encoded text document by using a public-key algorithm composed of a subset of signature digits, and encoding (step 20) another subset of space characters in the encoded document by replacing the value of the selected attribute for each space character by a corresponding encoded signature digit.

With the increasing use of open networked environments, such as the Internet, the demand for more secure systems for transferring shared information among networked computers has correspondingly increased. Today, the most serious risk associated to electronic information exchange on open, unsecured, networks, particularly on the Internet, is that digital data may be much more easily modified than ever before.
Most of today's transactions on the Internet, involve the access by the user to files on Web servers or mail servers directly from textual documents. On those open, unsecured networks, when a user selects and triggers an hyperlink on a Web page from a Web browser, or when a user clicks on the icon of a file attached to a received e-mail, it is becoming of the out most importance to authenticate the received data files prior to using them as intended. Such data files may include, but are not limited to, computer programs, text, graphics, pictures, audio, video, or other information that is suitable for use within a computer system.
By way of example of those security concerns, if an e-mail includes an attachment to an executable file or software program, the user may wish to be sure that it has been sent by a trustworthy party prior to exposing his computer system to a program file that might include a "Trojan Horse" or that could infect the user's computer with a virus. Thus, when a user on the Internet receives data from a server or from another user, it may be necessary for the receiving user to verify that the data received has not been corrupted or otherwise altered in some manner. Furthermore, the receiving user may need to verify that the data received was actually sent by the proper sending user rather than by an impostor.
To improve the security of data transmitted over computer networks while preventing for digital forgeries and impersonations, document authentication and signer authentication safeguards are being utilized.
Nowadays, digital signatures are the main cryptographic tools employed to provide document and signer authentication and integrity verification. Digital signatures are basically mechanisms through which users may authenticate the source of a received data file. Digital signatures achieve these results through cryptographic-key based algorithms, the security in these algorithms being based on the key (or keys), not in the details of the algorithm. In fact, the algorithms may be freely published and analyzed.
There are two general types of key based authentication algorithms well known in the art: symmetric and public-key. On symmetric algorithms the encryption key and the decryption key are the same and must be kept in secrecy by both parties, the sender and the receiver. On public-key algorithms digital signatures are derived through the use of "public keys". Public key algorithms, also called asymmetric algorithms, are designed for using two different keys, so that one key, used for signing, is different from the second key, used for verification. Those algorithms are called "public-key" algorithms because the verification key can be made public. In contrast, the signature key needs to be kept secret by its owner, the signer. By the properties of cryptographic digital signatures there is no way to extract someone's digital signature from one document and attach it to another, nor is it possible to alter a signed message in any way without the change being detected. The slightest change in the signed document will cause the digital signature verification process to fail. Furthermore, the signing key cannot, in any reasonable amount of time, be calculated from the verification key.
Thus, using digital signatures involves two processes, one performed by the signer, which is the generation of the digital signature, and the other by the receiver of the digital signature, which is the verification of the signature. The signer creates a digital signature for the document by using his private signing key, and transmits both, the document and the digital signature to the receiver. Verification is the process of checking the digital signature by reference to the received signed document and the public verification key.
In practical implementations, public-key algorithms are often too inefficient to digitally sign long documents. To save time, digital signature protocols (i.e., RSA, DSA) are often implemented with secure (one-way) hash functions. Basically, instead of signing a complete document, the signer computes a hash-value of the document and signs the computed hash. Many signature algorithms use one-way hash functions as internal building blocks.
A hash function is a function that maps a variable-length input string (i.e. a document) and converts it to a fixed-length output string, usually smaller, called a hash-value. The hash-value serves as a compact representative image of the input string. Computing a one-way hash function usually does not require a key. As such, when the document is received, the hash function may be used to verify that none of the data within the document has been altered since the generation of the hash function. Thus, hash functions are typically limited in that the user may not necessarily infer anything about the associated data file, such as who sent it. In order to preserve the non-repudiation and unforgeability properties of digital signatures, when used in conjunction with a hash function, the hash function needs to be collision resistant. That is, it must be computationally unfeasible to find two messages for which the hash maps to the same value.
For authenticating a document that includes a plurality of attachments or links to other files, not only the document, but all the files that are linked to it must be authenticated. To deal with those very frequent cases, typically a single digital signature is generated by applying the digital signature algorithm to an aggregate of the document and all the files attached. When such signed document and attached files are received, the verification algorithm must be also applied to the same aggregate of the received document and attached files.
Now, the process of signing and verifying, and/or generating hash functions places an additional overhead on sending and receiving computational resources. Particularly, when a user receives a document that contains many attachments to large files, the verification of the aggregate of the received document and all attached files would imply a tremendous burden on the receiving computer resources and unacceptable delays on such a computer network environment.
In the prior art, there are methods for efficiently securing and verifying the authenticity of a plurality of data files, such as data files intended to be transferred over computer networks. Those methods for verifying the authenticity of groups of data files involve providing, along with the group of data files, a separate signature file which includes individual check-values for all data files (e.g., hash-values) as well as a digital signature for the group. The digital signature of the group of files is then verified using a computer system, and check-values in the signature file are compared with the corresponding values computed from the data files using the computer system. This class of methods that generate a separate signature file for groups of data files is represented by the approach described in U.S. Pat. No. 5,958,051.
Obviously, all those methods that assume the addition of checking information to a separate file have the drawback of indeed separating checked and checking information (i.e., the signature file). Thus, the latter can easily be isolated and removed intentionally, in an attempt to cheat, or accidentally just because the intermediate pieces of equipment or the communication protocols in charge of forwarding electronic documents and data files are not devised to manipulate this extra piece of information. Then, when authenticating a document having file attachments or links to other files, the checking information of the document and all attached files should rather be encoded transparently into the body of the document itself (i.e., in a manner that does not affect document's text format and readability whatsoever), so that it would remain intact across the various manipulations it is exposed to on its way to destination still enabling the end-recipient to verify the authenticity and integrity of the received document and the attached or linked files.

Method of authenticating a plurality of files linked to a text document

International Business Machines Corporation


A technique for post-processing media content on a network by a GPU cloud computing system is provided. The system includes a plurality of computer systems providing a content submission connection for uploading the media content. The system includes a processor configured to receive descriptive information related to the media content via the network, receive the media content via the content submission connection which has a quicker uploading bandwidth than the network, process the media content; and distribute processed media content via the network that is separated from the content submission connection. The system further includes a distributed GPU cloud computing platform to perform parallel post-processing of the media content, and an immersive 3D interface.

High Definition (HD) video content distribution over a network requires a high bandwidth for both download and upload. Full HD (1080p) video content in a common compression format, such as H.264, has around five times the amount of data of a comparable Standard Definition (SD) video content. A video content in 720p (720 horizontal lines, progressive scan) has around 2.5 times the amount of data compared with SD content. Most broadband data communication technologies, such as, for example, DSL or cable, are asymmetric, meaning that the downstream speed is higher than the upstream speed as seen from a users point of view. The limited upstream bandwidth is a critical bottleneck for HD content delivery over the internet. Network architectures using optical fiber to replace all or part of the usual copper local loop used for telecommunications, such as symmetric fiber-to-the-home (FTTH), provide faster upload speeds, but are expensive and not very widespread.
HD video data may be converted to a different format and/or edited in order for the video data to be suitable for streaming over the internet. However, processing of HD video data is computing-intensive and may be difficult for a user to achieve.
The foregoing examples of the related art and limitations related therewith are intended to be illustrative and not exclusive. Other limitations of the related art will become apparent to those of skill in the art upon a reading of the specification and a study of the drawings.

System and methods for transmitting and distributing media content


A focused ion beam system includes a gas field ion source which generates gas ions, an ion gun unit which accelerates the gas ions and radiates the gas ions as an ion beam, a beam optical system which includes at least a focusing lens electrode and radiates the ion beam onto a sample, and an image acquiring mechanism which acquires an FIM image of a tip of an emitter based on the ion beam. The image acquiring mechanism includes an alignment electrode which is disposed between the ion gun unit and the focusing lens electrode and adjusts a radiation direction of the ion beam, an alignment control unit which applies an alignment voltage to the alignment electrode, and an image processing unit which combines a plurality of FIM images acquired when applying different alignment voltages to generate one composite FIM image.

There has been known a focused ion beam system as a system for performing observation, various evaluation or analysis, or the like on a sample such as a semiconductor device, and for preparing a TEM sample by taking a fine and thin sample fragment from a sample and fixing the thin sample fragment to a sample holder.
This focused ion beam system includes an ion source for generating ions and accelerates the ions generated in the ion source to generate an ion beam, and focuses the ion beam to radiate the ion beam as a focused ion beam (FIB).
There are many types of ion sources. In many cases, a focused ion beam system having been put to practical use includes a liquid-metal ion source (particularly, liquid-gallium ion source). However, a transmittance of a sample such as a photomask may be reduced due to injection of gallium, and therefore, countermeasures such as low acceleration have been employed. Incidentally, there is a need for performing observation on a sample having a nanometer size with low damages, and thus it is required to further reduce a diameter of the beam.
Accordingly, in recent years, there has been employed a gas field ion source (GFIS) as a non-contaminating ion source. The gas field ion source uses noble gases as ion species and is capable of generating ion beams having a smaller diameter and higher luminance as compared to liquid-metal ion sources. It has been confirmed that the gas field ion source has certain effects against the above-described problem.
A gas field ion source includes an aciculate emitter with a tip which is sharpened at an atomic level. This emitter is an important member for ionizing a gas, and thus the surface structure of the emitter is important. In order to achieve a high-luminance ion source, it is necessary to make the tip of the emitter as sharp as possible and arrange the shape of the tip such that an ionization area is formed by several atoms. Accordingly, it is possible to locally ionize a gas into gas ions, and thus it is possible to generate an ion beam having a small beam diameter.
There have been known some methods of sharpening a tip of an emitter. As one of those methods, there has been known a field-assisted gas etching method of locally etching a tip of an emitter while supplying oxygen or nitrogen to the vicinity of the emitter (see, for example, US2007/0025907A).
According to this method, it is possible to acquire an emission pattern image (i.e. field ion microscope (FIM) image) of the tip of the emitter and grasp the progress status of etching while observing the FIM (FIM observation), and thus it becomes easy to perform sharpening, so that this method is regarded as a promising method.
In order to acquire an FIM image, a device including a micro-channel plate (MCP) which has a fluorescent surface at a back side and is disposed on a light path of an ion beam is generally used. This device can be incorporated in a beam lens barrel, and can amplify a received ion beam (or focused ion beam) by the MCP and make the amplified beam enter the fluorescent surface, thereby projecting an FIM image onto the fluorescent surface. Accordingly, FIM observation on the tip of the emitter is performed.
In addition to the above-described MCP method, there has been known a method of performing FIM observation on a tip of an emitter by a scanning-FIM (see, for example, JP-A-2012-98293).
According to this method, an axis alignment deflector is used to perform raster scanning on a diaphragm surface, thereby capable of acquiring a field emission pattern image of a tip of an emitter. Accordingly, FIM observation on the tip of the emitter is performed.
Incidentally, when performing field-assisted gas etching, in order to accurately grasp the progress status of etching on a tip of an emitter, it is necessary to confirm the tip of the emitter over a wide visual field. Specifically, the emitter after electric field polishing needs to be confirmed at a visible field of about several tens of atoms or more.
Further, when incorporating the device including the MCP in a focused ion beam system, it is desired to dispose a condenser lens (a focusing lens electrode) 101 close to an emitter 100 which is an ion source, and then dispose an MCP 102 immediately below the condenser lens 101, as shown in FIG. 12. This is because it is necessary to reduce a distance between the emitter 100 and the condenser lens 101 for securing the performance of the focused ion beam system.
However, if the emitter 100 and the condenser lens 101 are disposed close to each other, since a structure such as the condenser lens 101 is disposed immediately above MCP 102, the peripheral component (oblique portions shown in FIG. 12) of an ion beam 103 may be blocked by the structure, so that the amount of ion beam 103 incident on the MCP 102 would be reduced. Therefore, the visual field would narrow, and it would be difficult to confirm the tip of the emitter 100 over a wide range.
Additionally, if the MCP 102 is used to observe an FIM image for a long time, the multiplication factor of the MCP 102 or the fluorescent surface may be deteriorated, so that the FIM image may become darker. Therefore, it may become difficult to clearly observe the tip of the emitter 100, and it may become difficult to accurately perform FIM observation.
Meanwhile, according to the method using the scanning-FIM disclosed in JP-A-2012-98293, since no MCP is used, even if an FIM image is observed for a long time, the FIM image does not become dark. However, even in the scanning-FIM, similarly, a visual field may be restricted by a structure such as a condenser lens.


A direct bonding method for infrared focal plane arrays, includes steps of depositing a thin adhesion layer on infrared radiation detecting material, removing a portion of the thin adhesion layer with a chemical-mechanical polishing process, forming a bonding layer at a bonding interface, and bonding the infrared radiation detecting material to a silicon wafer with the thin adhesion layer as a bonding layer. The thin adhesion layer may include SiOx, where x ranges between 1.0 and 2.0. The thickness of the thin adhesion layer to form the bonding layer is 500 angstrom or less.

An infrared sensing system is an imaging system that detects photons in the infrared spectrum. Infrared focal plane arrays (FPAs) are widely used in imaging systems. An FPA includes an array of photodetector pixels capable of detecting photons in the infrared spectrum. A material that is sensitive to infrared radiation, such as indium antimonide (InSb), gallium arsenide and indium gallium arsenide, or other infrared-sensitive materials, may be used for fabricating an infrared detector wafer.
Conventionally, infrared detector arrays have been manufactured by being grown and patterned directly on an epitaxial substrate. Then, infrared detector arrays are connected to a readout integrated circuit via indium bonding bumps. Subsequently, additional processes for removing the epitaxial substrate are needed. As a result, a thin infrared absorbing material (i.e., the infrared detector) connected to a silicon integrated circuit has been fabricated. However, the finished infrared detector device is not bonded to a silicon wafer and does not have a structure having a silicon substrate present on top of the infrared detector.
Many of conventionally available infrared detectors are backside-illuminated detectors. The backside-illuminated detectors have the top surface where detector materials are grown and an interconnect structure is arranged on the top surface. There are frontside-illuminated infrared detectors that invert the structure of the backside-illuminated detectors. On the top surface of the frontside-illuminated infrared detectors, a silicon substrate is present. In the frontside-illuminated infrared detectors, infrared radiation enters through the front side rather than the back side. Due to the structure, the frontside-illuminated infrared detectors may provide manufacturing advantages. For example, the frontside-illuminated infrared detectors may enable more processing at the wafer level.
Conventional wafer bonding methods have been available to bond IR detector materials to an optical silicon wafer. Conventional wafer bonding methods use epoxies as an adhesive layer at the bonding interface. In other words, conventional wafer bonding methods do not directly bond the infrared detector materials to the silicon wafer.
Generally, epoxies are by nature organic polymer materials and thus absorb infrared (IR) radiation to a significant degree in the IR spectral regions of interest. More specifically, epoxy absorbs infrared radiation in a long-wave infrared (LWIR) band and reduces infrared transmission across a bonding interface, as shown in FIG. 1. FIG. 1 also shows that the mid-wave infrared (MWIR) band affected by use of epoxies. The optical interference by epoxies in the LWIR and MWIR bands may impact the overall performance of infrared detector devices, which need to have excellent sensitivity in those infrared bands.
Epoxies also have relatively lower refractive index functions than IR detector materials and silicon wafers. Many detector materials, such as InSb and SLS wafers, have high refractive index values (3.6-4.0), and they are closely matched to the refractive index for silicon (3.5). Thus, the conventional bonding process using epoxy requires anti-reflective coatings to be used at the wafer bonding interface to optimize IR radiation transmission into the detector materials. Accordingly, there is a need to provide improved bonding processes for directly bonding IR detector materials such as InSb and SLS wafers to silicon wafers without using epoxy such that optical interference from epoxy may be eliminated. There is also a need to provide direct bonding processes for bonding IR detector materials to silicon wafers without requiring anti-reflective coatings at the bonding interface, which may reduce manufacturing cost and simplify manufacturing processes of infrared detector devices.

Infrared detector having a directly bonded silicon substrate present on top thereof

L3HARRIS CINCINNATI ELECTRONICS CORPORATION


A semiconductor memory device includes a memory cell array, a decoder circuit configured to assert a decoding signal for selecting an access position in the memory cell array in response to an address signal supplied from an exterior, and a first circuit configured to put the decoding signal of the decoder circuit in an asserted state regardless of a value of the address signal in response to assertion of a standby signal supplied from the exterior.

1. Field of the Invention
The present invention generally relates to semiconductor memory devices, and particularly relates to a semiconductor memory device provided with a decoder circuit for selectively activating a selection line in response to an address signal.
2. Description of the Related Art
In semiconductor memory devices such as SRAMs (static random access memories) and DRAMs (dynamic random access memories), a plurality of memory cells are arranged in matrix form having rows and columns to form a cell array, with each memory cell storing data therein. At the time of read operation and write operation, access is made to a memory cell positioned at the row address and column address specified by an address signal.
In read operation, the address signal is decoded, followed by selectively activating a word line corresponding to the row address selected by the decoding result. Among the plurality of memory cells of the cell array, memory cells connected to the selectively activated word line provide their data to complementary bit lines. A voltage difference generated between the complementary bit lines responsive to the read data is amplified by sense amplifiers. Among the data amplified by the sense amplifiers, data corresponding to the column address selected by the decoding result of the address signal is output to the exterior of the semiconductor memory device as read data. In write operation, data is written from the exterior to the sense amplifier corresponding to a specified column address. Thereafter, the data stored in the sense amplifier is stored in the memory cell connected to a selectively activated word line.
FIG. 1 is a circuit diagram showing the configuration of the last stage of a related-art decoder circuit. The circuit of FIG. 1 includes a NAND circuit 11, PMOS transistors 12-1 through 12-3, and NMOS transistors 13-1 through 13-3. The NAND circuit 11 is the last stage of the decoder circuit that decodes an address signal, and corresponds to a single address. Namely, the selection of a particular address by an address signal results in the output of the NAND circuit 11 being LOW. The PMOS transistor 12-1 and the NMOS transistor 13-1 constitute a first-stage inverter, the PMOS transistor 12-2 and the NMOS transistor 13-2 constituting a second-stage inverter, and the PMOS transistor 12-3 and the NMOS transistor 13-3 constituting a third-stage inverter. The drive power of the transistors is progressively increased from the first inverter to the third inverter. This makes it possible to drive an output signal serving as a word selection signal or column selection signal with a large drive power at high speed.
Conventionally, the transistors that are selected in the output portion of the decoder circuit are implemented by use of transistors having a small threshold value in order to achieve a faster access time. Here, the selected transistors are the transistors that become conductive at the time of selecting the specified address. In the example shown in FIG. 1, the word selection signal (or column selection signal) is set to HIGH and put in a selected state when the output of the NAND circuit 11 is LOW. It thus follows that the PMOS transistor 12-1, the NMOS transistor 13-2, and the PMOS transistor 12-3 are the selected transistors.
In this manner, the transistors that are selected in the output portion of the decoder circuit are implemented by use of transistors having a small threshold value. This shortens a signal delay from the output of the NAND circuit 11 to the word selection signal (or column selection signal), thereby making it possible to drive the selection signal at high speed.    [Patent Document 1] Japanese Patent Application Publication No. 2001-143477    [Patent Document 2] Japanese Patent Application Publication No. 10-275465
In the configuration as described above, the transistors having a small threshold value are turns off at the time of standby (at the time of an unselected state). Unfortunately, transistors having a small threshold value have a problem in that a leak current is large. Namely, a large leak current flows at the time of standby (at the time of an unselected state), resulting in excessive power consumption.
In order to obviate this problem, a transistor having a large threshold value may be inserted between the power supply potential and the source node of the transistors having a small threshold value, and may be turned off to shut off the leak current at the time of standby (at the time of an unselected state). Such configuration, however, requires that the transistor having a large threshold value be made in a large size for the purpose of achieving high-speed operations. This is not preferable as it results in an increase in chip size.
Accordingly, there is a need for a semiconductor memory device which can reduce a leak current in the decoder circuit at the time of an unselected state.

Semiconductor memory device with reduced leak current


The invention relates to a device for removably fixing a conductor (10) to a current transformer housing (12), comprising a fixing element (18) which runs through a retaining element (16) lying on the current transformer housing (12) and which sits at least partly against the surface of the conductor (10) when the conductor (10) is fixed on the current transformer housing (12). The invention is characterized in that the fixing element (18) runs around the circumferential surface of the conductor (10) in a looped manner when fixed.

A conductor is usually routed through an opening that is provided on the transformer housing. The conductor is attached on the transformer housing with two screws or threaded pins, which are routed in two holding elements arranged on the transformer housing. For the purpose of fastening, the screws and/or threaded pins are turned inside of the holding element with a purely rotating movement in the direction of the conductor until their cross section is placed onto the surface of the conductor. Continued turning of the screws and/or threaded pins will result in securing the conductor in the transformer housing.
The disadvantage is hereby that the threaded pins and/or screws must travel a relatively long path for fastening on the conductor, whereby this occurs exclusively with a purely rotating movement, which requires a lot of force and time, especially with a larger number of transformer housings to be secured on a conductor.
Therefore, the innovation is based on the task to provide a device to fasten a conductor on a transformer housing, which is marked by a more simplified and faster installation.

Looped fastening element for removably fixing a conductor to a current transformer housing


Melanin concentrating hormone receptor ligands (especially 1-benzyl-4-aryl-piperazines, 1-benzyl-4-aryl-piperidines and related compounds), capable of modulating MCH receptor activity, are provided. Such ligands may be used to modulate MCH binding to MCH receptors in vivo or in vitro, and are particularly useful in the treatment of a variety of metabolic, feeding and sexual disorders in humans, domesticated companion animals and livestock animals. Pharmaceutical compositions and methods for treating such disorders are provided, as are methods for using such ligands for detecting MCH receptors (e.g., receptor localization studies).

Melanin concentrating hormone, or MCH, is a cyclic 19 amino acid neuropeptide that functions as a regulator of food intake and energy balance. MCH is produced in the hypothalamus of many vertebrate species, including humans, and serves as a neurotransmitter in the lateral and posterior hypothalamus. Both of these regions have been associated with behaviors such as eating, drinking, aggression and sexual behavior. MCH is also produced at various peripheral sites, including the gastrointestinal tract and testis.
The postulated role of MCH in feeding behavior and body weight has been confirmed by the finding that I.C.V. injection of MCH into the lateral ventricle of the hypothalamus increases caloric consumption in rats over similarly treated control animals. Furthermore, rats having the ob/ob genotype exhibit a 50–80% increase in MCH mRNA expression as compared to leaner ob/+ genotype mice. MCH knockout mice are leaner than their MCH-producing siblings due to hypophagia and an increased metabolic rate.
MCH activity is mediated via binding to specific receptors. The MCH type 1 receptor (MCHR1) is a 353 amino acid, 7-transmembrane, alpha-helical, G-coupled protein receptor, first reported by Lakaye, et al. (BBA (1998) 1401:216–220). MCHR1 has also been known as SLC-1. Immunohistochemistry studies of rat brain sections indicate that the MCHR1 receptor is widely expressed in the brain. MCHR1 receptor expression has been found in the olfactory tubercle, cerebral cortex, substantia nigra, basal forebrain CA1, CA2, and CA3 field of the hippocampus, amygdala, and in nuclei in the hypothalamus, thalamus, midbrain and hindbrain. Strong signals have been observed in the ventromedial and dorsomedial nuclei of the hypothalamus, two areas of the brain known to be involved in feeding behavior. Upon binding MCH, MCHR1 receptors expressed in HEK 293 cell mediate a dose dependent release of intracellular calcium. Cells expressing MCH receptors have also been shown to exhibit a pertussis toxin sensitive dose-dependent inhibition of forskolin-elevated cyclic AMP, indicating that the receptor couples to a Gi/o G-protein alpha subunit.
Recently, a second MCH receptor (MCHR2) has been identified (An et al., Proc. Natl. Acad. Sci. USA (2001) 98:7576–7581; Sailer et al., Proc. Natl. Acad. Sci. USA (2001) 98:7564–7569; Hill et al., J. Biol. Chem. (2001) 276:20125–20129; Mori et al., Biochem. Biophys. Res. Commun. (2001) 283:1013–1018). MCHR2 has an overall amino acid identity of more than 30% with MCHR1, and is detected specifically in most regions of the brain, with an expression pattern similar to that of MCHR1.
Because MCH is an important regulator of food intake and energy balance, agents capable of modulating MCH receptor activity, especially MCHR1, are highly desirable for the treatment of obesity, eating disorders (e.g., bulimia and anorexia), sexual disorders (e.g., anorgasmic or psychogenic impotence) and metabolic disorders, such as diabetes. Small molecule, non-peptide antagonists of MCH receptors would be of particular value for such therapies. The present invention fulfills this need, and provides further related advantages.

Melanin concentrating hormone receptor ligands: substituted 1-benzyl-4-aryl piperazine analogues


An apparatus for supporting concrete reinforcement bar within a form. The apparatus comprises a plurality of legs so formed that, when the apparatus is placed in any random orientation on a surface of the form, the ends of at least three legs contact the surface of the form and at least two legs extend upwardly to receive the reinforcement bar. Preferably, any given leg is adjacent to four legs and is non-adjacent to one leg, where the angle between the given leg and any adjacent leg is 90.degree. and the angle between the given leg and any non-adjacent leg is 180.degree..

Steel bars, referred to as reinforcement bars, are often provided in concrete structures to provide greater structural strength to these structures. The present invention relates to a method and apparatus for supporting such reinforcement bars. The present invention is generally applicable to any concrete structure containing reinforcement bars; however, the present invention is particularly useful when used to support reinforcement bars used in preformed concrete structures and that application will be discussed in detail herein. The scope of the invention should nonetheless be determined by the attached claims and not the following detailed description.
In preformed concrete structures, such as highway dividers and wall panels, reinforcement bars are first placed within a form for creating the finished concrete structure. The concrete is then poured into the form and allowed to harden so that the resulting solidified concrete structure takes the general shape of the interior of the form. The solidified structure may then be removed from the form and used as desired.
Ideally, the concrete in its liquid state completely surrounds the reinforcement bars within the form; however, if the reinforcement bars are touching the bottom of the form, they will not be completely surrounded by concrete. The resulting solidified concrete structure thus has reinforcement bar that is exposed to the environment. The exposed reinforcement bar may rust, and the rust may eat into the reinforcement bar within the solidified structure, eventually destroying the structural integrity of the solidified concrete structure.
The above-described problem can be alleviated by supporting the reinforcement bar within the mold while the liquid concrete is poured therein. Such support prevents the reinforcement bar from contacting the bottom of the mold and thereby ensures that the concrete will completely surround the bar. The reinforcement bar in the solidified concrete structure will thus not be exposed to the environment and will not be susceptible to rust.

Concrete reinforcement bar support member


A method of controlling issuance of alerts involves a server receiving notification of occurrence of an event at an account, saving in an events history the event occurrence, receiving device information from a mobile device associated with the account, and determining a position and/or speed from the device information. The server maintains at least one event definition defining particulars of suspension of notifications of events at an account. Upon the position or speed correlating with one of the event definitions, the server saves in the events history an occurrence of at least one additional event occurring at the account subsequent to the event, and suspends notification of the saved occurrences to the mobile device. The server transmits to the mobile device a notification of the occurrences saved in the events history and clears the events history upon the position and speed no longer correlating with any of the event definitions.

To allow customers of financial institutions to better manage their respective financial accounts, many financial institutions offer notification services whereby alert messages are issued notifying their customers of activities (e.g. debit or credit card transactions, low deposit account balance) that have occurred on their respective financial accounts. To allow the customer to have timely receipt of the alerts, typically the customer configures the service to issue the alerts to the customer's mobile electronic device (e.g. mobile phone, smart phone, personal digital assistant). When the customer enters a zone in which audible alerts are prohibited (e.g. cinemas) or undesirable, (e.g. hospitals), the customer must either manually deactivate the sound/vibrate functions of the mobile phone or manually reconfigure the notification service to terminate the issuance of alerts. When the customer leaves the zone, the customer must then either manually reactivate the sound/vibrate functions of the mobile phone or manually reconfigure the notification service to continue the issuance of alerts. Since the customer might forget to deactivate/reactivate the sound/vibrate functions or to reconfigure the notification service, these approaches to controlling alert notifications are inconvenient.
Nadler (US 2009/0131080) describes automatically providing content and services to mobile devices based on the identity of the user and the location of the mobile device. The owner of a presence zone may provide to a presence zone service provider various parameters such as the coordinates of the presence zone, and the services that may be provided to a mobile device while in the presence zone. Mobile device users and presence zone owners may also provide a presence server with preference information. The presence zone service provider determines the location of the mobile device and associates the location with one or more presence zones. A presence detector tailors the content and services to be provided to the mobile device based on the presence zone, the properties of the zone (e.g. a restaurant), the identity of the mobile device user, and the specified preferences.
As examples, Nadler discloses that the presence zone may define a retail location in which the mobile device user may receive promotional messages for services that are available in the retail location. The presence zone may define a mandatory silence zone in which the mobile device is prohibited from originating phone calls and directs incoming calls to voice-mail or an alternate destination. The presence zone may define a quiet zone in which the mobile device is prevented from ringing unless over-ridden by the mobile device user. Incoming calls to the mobile device may be directed to the alternate destination while the device is in the quiet zone, and then directed to the mobile device when the device leaves the quiet zone.


A method, system, and medium are provided for taking port inventories over a network. The process uses a web form which receives either an IP address or a device name for a particular piece of equipment, e.g., a network switch. After submission of this identifier, the system uses a Perl script to access an inventory management application associated with the piece of equipment and extract port information. The port information extracted reveals the number of ports which are both unconnected and unconfigured. This number is then used for resource management or other purposes.

Large pieces of computing equipment, e.g., network switches, routers, typically have a multiplicity of what are called "ports" thereon. Ports are physical interfaces between the equipment and a circuit. The other end of the circuit may be another computing device, or some other kind of electronic equipment.
It is important for both technical and business reasons that a systems administrator know which ports on which switches are available, and which ports are not. When an entity becomes responsible for managing numerous switches and other large computing devices, inventories must be periodically taken to determine port availability. Determining port availability—from an asset-management standpoint—can become a daunting task.
Conventionally, port inventories are taken by accessing the equipment, e.g., a switch, using some form of direct IP connection. Oftentimes the equipment will have a server associated with it. At least a portion of this server will be devoted to maintaining port-status information. A user may access this server via a PC or other computing means. Normally software is provided which enables the user to navigate through directories in the server to find the relevant port-status information.
This is an okay technique for small operations, e.g., to determine the availability of only a few ports. But where the entity manages a significant number of devices, it becomes cumbersome to undergo the burden of obtaining the necessary port-availability information using the existing applications to locate the necessary information.
FIG. 1 shows an environment in which the conventional process might take place. Referring to the figure, we see that a prior art system 100 includes numerous components. First, system 100 usually incorporates a workstation 102, a server 104, and a piece of equipment 106, such as a network switch. Network switches normally have hundreds of ports. For the purpose of simplifying matters, however, only a few ports have been shown on the exemplary switch 106 in FIG. 1.
These ports are identified as Port 1, Port 2, Port 3, and Port N. Of these ports, Ports 1 and 2 are shown being connected to devices Dev. 1 and Dev. 2. Port 3 is shown as being not connected to any device. Port N is disclosed as being connected to Dev. N. The use of the variable "N" here is used to indicate that numerous ports would more likely be included on switch 106.
Oftentimes, it will be desirable for a network administrator to monitor exactly which of these ports on equipment 106 are configured, and also which of these ports are connected to a device. Either scenario typically makes a port unavailable for new uses. When availability information is desired, the prior art method of obtaining this information is rather painstaking.
The process involves accessing server 104 using workstation 102. A software package running on server 104 is likely a program designed with the capability of performing inventory management, among other things. One such conventional software application which may be used to do port inventories is known as Ciscoworks™. Ciscoworks™ enables, when accessed by a user on workstation 102, allows the user (by navigating through directories) to access ports information regarding equipment 106. This information must be obtained one port at a time. For example, the user may want to know whether certain ports on device 106 are available. To do so, the user would navigate through Ciscoworks™ to access inventory information regarding one of the hundreds of ports, e.g., Port 1. Ciscoworks™ would then inform the user that a device (Dev. 1) is existent on that port. With respect to Port 3, however, the user would, by navigation, be able to pull up the information on Port 3 and determine that it is disconnected, or not connected to a device. Another ability of Ciscoworks™ is to determine whether ports, even though not connected, might be configured.
Ciscoworks™ requires the user to obtain individually the information for each port. Next, the user must maintain a record of whether each port is or is not connected. If multiple devices such as equipment 106 are being inventoried—as is commonly the case—this will be a lot of information to write down.
Other methods and devices for conducting inventories of equipment are available. Ciscoworks™, however, is arguably the most commonly used conventional product.
These prior-art techniques have their limitations. First of all, the port-inventory-taking process takes a lot of time. This is because the person doing the inventory, with the conventional methods, has to count the free ports one at a time and keep a running tally. Because the prior art systems require making inquiries, and then counting ports one at a time, the process takes a considerable amount of time. Oftentimes 15-20 minutes per switch. When analyzing numerous switches, this time can become very significant.
Further, the user is required to document exactly which ports are available on each switch as he or she goes. This requires extensive record keeping so that the person taking the inventory doesn't forget which ports are free and which are in use. It also presents great potential for error because of the extensive human involvement in the note-taking process.
Thus, there is a need in the art for a system for taking equipment-port inventories that does not have these, and other disadvantages of the conventional methods.

Networked port-inventory system and method


Footwear includes an insole with at least one covered opening in the insole.

1. Field of the Invention
This invention relates to footwear and more specifically to footwear having an improved insole.
2. Brief Description of the Prior Art
It is known in the prior art to produce footwear by the lasting process. In one type of lasting, referred to in the industry as flat lasting, an upper is placed on a last and the end portion of the upper is tightened around the periphery of the insole and cemented to the bottom of the insole. The insole provides a platform during this lasting process and it must be of sufficient thickness, rigidity and strength to withstand the force of the upper end portion as it is tightened around the periphery of the insole and cemented to the insole bottom. At the same time, it is desirable that the insole be light and flexible. There have been various approaches to providing improved insoles for use in such footwear lasting including, for example, the insoles disclosed in U.S. Pat. Nos. 2,144,340; 2,809,450; and 5,105,564.
After the upper and insole are lasted, an outsole is attached to the insole by molding the outsole to the insole, or by other means, and the last is removed from the completed shoe. Other intermediate steps that may occur during the lasting process include softening the upper in a heat chamber, forming a box toe, and trimming excess cement from the bottom of the insole.
It is also known in the prior art to include a cushioned insert on an insole to provide cushioning for the wearer of the footwear. In one such prior art footwear sold by Georgia Boot Inc., (the predecessor of the assignee of the present invention) under the name "Comfort Core Welt", a bottom extension on a cushioned insert was inserted into an opening in the insole. This footwear was produced by a lasting method known as the welt lasting method and the footwear included an outsole which was cemented to the footwear.
In the past, footwear outsoles were formed of light weight blown polyurethane material. However, no such footwear which included an insole having an opening therein included a polyurethane outsole. It is believed that the reason such otherwise desirable light weight polyurethane outsoles were not used with insoles having openings therein, was because an objectionable amount of polyurethane would enter the footwear through the openings in the insole when the polyurethane formed the outsole.


A plasma display apparatus comprises a plasma display panel, a temperature detector and driver. The plasma display panel comprises a plurality of first electrodes and a plurality of second electrodes formed in parallel to each other. The temperature detector for detecting a temperature of the plasma display panel to output a temperature information signal. The driver which receives the temperature information signal from the temperature detector, and if the temperature of the plasma display panel is lower than a reference temperature, clamps a first sustain signal, which is supplied to at least one of the first electrodes and second electrodes, at a first clamping time, and if the temperature of the plasma display panel is higher than the reference temperature, clamps a second sustain signal, which is supplied to at least one of the first electrodes and the second electrodes, at a second clamping time different from the first clamping time.

1. Field
This document relates to a plasma display apparatus and a method of driving thereof.
2. Related Art
Plasma display apparatus comprises a plasma display panel having electrodes and a driver for applying a driving signal to the electrodes of the plasma display panel.
Typically, in the plasma display panel, a phosphor layer is formed in discharge cells defined by barrier ribs, and a plurality of electrodes is formed.
The driver applies a driving signal to the discharge cells via the electrodes.
Then, a discharge occurs in the discharge cells by an applied driving signal. When a discharge occurs in the discharge cells by a driving signal, a discharge gas filled in the discharge cells generates light, such as ultraviolet rays, and this light, such as ultraviolet rays, excite the phosphor formed in the discharge cells to emit visible light. By this visible light, images are displayed on the screen of the plasma display panel.

Plasma display apparatus with temperature compensation and method of driving thereof


A system and method that facilitates and effectuates in situ search for active note taking. The system and method includes receiving gestures from a stylus and a tablet associated with the system. Upon recognizing the gesture as belonging to a set of known and recognized gestures, the system creates an embeddable object, initiates a search with terms indicated by the gesture, associates the search results with the created object and inserts the object in close proximity with the terms that instigated the search.

The convergence of direct pen input devices, full text indexing of personal stores, and Internet search engines offers tremendous unexplored opportunities to design fluid user interfaces for active note taking. Active note taking can be considered to be, for example, the combination of pen-and-ink note taking with searching, linking, collecting, and sensemaking activities. This is in contrast to simple note taking, which is characterized by moment-to-moment transcription. Active note taking for example is typically performed by knowledge workers engaged in challenging creative work such as scientific research, product design, or planning complex activities, and the like. The knowledge workers often create informal pre-production work artifacts on paper, in notebooks, or on whiteboards, sketching preliminary plans and manipulating their notes to find solutions to difficult problems.
Further it has been observed that people tend to surround themselves with "task detritus" to help trigger extensions, variations, and associations on ideas. For example, messy physical desks subtly structure information and remind users of work to do; virtual 3D desktops enable users to create personally meaningful spatial arrangements by piling together document thumbnails. An unstructured notebook page is also effective in this regard as it imposes no formalism, thus allowing users to manipulate spatial arrangements of information to assist in sensemaking tasks and activities.


A coating for the protection of optical surfaces exposed to a high energy erosive plasma. A gas that can be decomposed by the high energy plasma, such as the xenon plasma used for extreme ultraviolet lithography (EUVL), is injected into the EUVL machine. The decomposition products coat the optical surfaces with a protective coating maintained at less than about 100 Å thick by periodic injections of the gas. Gases that can be used include hydrocarbon gases, particularly methane, PH3 and H2S. The use of PH3 and H2S is particularly advantageous since films of the plasma-induced decomposition products S and P cannot grow to greater than 10 Å thick in a vacuum atmosphere such as found in an EUVL machine.

Extreme ultraviolet lithography (EUVL) uses 10-14 nm photons to print integrated circuit features having dimensions in the range of 100 nm or smaller. The photons are generated by illuminating xenon with a laser system in a source chamber. A complete description of an EUVL machine can be found in U.S. Pat. No. 6,031,598, issued to Tichenor et al. Feb. 29, 2000.
Referring now to FIG. 1 that illustrates the arrangement of the source chamber 4. Laser beam 30 is directed by turning mirror 32 into the source chamber that is at sub-atmospheric pressure. Xenon, at high density, as a liquid or molecular clusters, created by cooling of the gas as it expands through a nozzle, is injected into a plasma generator 36. Interaction of laser beam 30 with the xenon gas creates a plasma that produces the extreme ultraviolet (EUV) radiation used for EUVL. The EUV radiation is collected by segmented collector 38 and directed toward pupil optics 42.
Segmented collector 38 is composed of a plurality of segments, typically six, each which is a Mo/Si multilayer mirror (MLM). A typical Mo/Si MLM used in EUVL is made by sputter depositing 40 pairs of alternating Mo and Si thin films, with a total (Si+Mo) bilayer thickness of ˜7 nm and a ratio of (Mo)/(Mo+Si) thickness of ˜0.4. It is preferred that the topmost layer be Si in order to minimize surface oxidation during routine handling. The thickness of this topmost or "capping" layer is ≈4.3 nm. However, these MLM segments, being proximate the region where the xenon plasma is generated 36, are exposed to energized atoms, ions, and particles from the plasma that erode, oxidize and thereby degrade the mirror quality and shorten its useful life. A method is required for protecting the plasma-facing optics used in EUVL from the degrading effects of the proximate plasma.

Method for the protection of extreme ultraviolet lithography optics


A system for detecting the presence of a magnetic field emanating from a video display terminal (VDT) in which a current induced through a sensing element is first amplified by a high gain amplifier stage having a very broad low band frequency response curve then rectified by a precision rectifier to convert the AC signal induced through the sensing element to DC current. The DC current is used as one input to a comparator, the other input being set by means of a potentiometer to provide flexibility in setting a threshold input voltage differential representative of a harmful magnetic field radiation level. The output of the threshold comparator triggers a driver which is connected to a battery powered solenoid. The solenoid actuates an indicator flag in the presence of a magnetic field which exceeds the threshold magnetic radiation level. To conserve battery energy, the energized solenoid also functions as a relay to break electrical contact between itself and the batteries simultaneously with actuating the flag indicator. An alternative embodiment invention replaces the pickup coil of the preferred embodiment with a Hall effect current sensor to sense the strength of the magnetic field. In a third embodiment of the invention a radiation detector is produced having astable multi-vibrators 250 and 256 which respectively produce an audible and visual warning signal.

Video display terminals (VDTs) used with computers and in television sets give off propagating electromagnetic radiation composed of electric and magnetic components and an associated static electric field. Recently, the magnetic field component of this electromagnetic radiation has become the cause of public concern resulting in governmental regulation as to acceptable levels. Although others in the past have attempted to provide electromagnetic radiation detectors which measured harmful levels of energy emanating from microwave ovens and other high-power microwave devices used in domestic, industrial, medical and military applications, none of these prior devices are adapted to measure the extremely low frequency (ELF ranging from 5 to 2,000 hertz) and very low frequency (VLF ranging from 2,000 to 400,000 hertz) magnetic radiation which emanates from video display terminals.
Thus, an urgent need exists for a simple reliable device which can be attached to a video display terminal to warn people who work or live near video display terminals that a particular terminal emits a harmful level of low frequency magnetic radiation. Such a device should provide a low cost but foolproof method which is readily usable by lay persons to determine whether low frequency magnetic radiation leakage from a video display terminal exceeds the level proscribed by governmental standards.
It is a principal object of the present invention to provide a low cost device which is easily utilized by lay persons and is adapted to measure ELF and VLF magnetic radiation levels.
Another object of the present invention is to provide a a device adapted to indicate whether the level of magnetic radiation leakage from a video display terminal exceeds governmental standards.

Electromagnetic field radiation detector having audible and visual indicators for detecting frequencies within the range of five hertz to four hundred kilohertz


A method of forming a buried aperture in a nitride light emitting device is described. The method involves forming an aperture layer, typically an amorphous or polycrystalline material over an active layer that includes a nitride material. The aperture layer material typically also includes nitride. The aperture layer is etched to create an aperture which is then filled with a conducting material by epitaxial regrowth. The amorphous layer is crystallized forming an electrically resistive material during or before regrowth. The conducting aperture in the electrically resistive material is well suited for directing current into a light emitting region of the active layer.

GaAs and InP optoelectronic devices, including vertical cavity surface-emitting lasers (VCSELs) and high performance diodes, often use a more electrically conducting "aperture" in a nonconducting layer to direct electrical current into a central light-emitting region or "active" region. In most of these GaAs and InP systems, aperture materials are also selected to have a higher refractive index than the nonconducting layer material, thereby enabling the aperture to also confine the generated optical fields. See U.S. Pat. No. 7,160,749 entitled "Method and Structure for Eliminating Polarization Instability in Laterally Oxidized VCSELs" by Chua et al. which is hereby incorporated by reference in its entirety. In some "anti-resonant" structures, the refractive index of the aperture is designed to have a lower value than surrounding areas to controllably induce losses to higher order modes.
Various methods are available for forming the conducting aperture. In one method, a chemical etch to form a pattern followed by a regrowth of the aperture material in the patterned layer openings is used to form the aperture. Such a procedure is described in D. Zhou and L. J. Mawst, Appl. Phys. Lett., v. 76 (13), 2000, pp. 1659-1661_which is hereby incorporated by reference. Alternate methods of forming a conducting aperture in an AlGaAs layer include converting select non-aperture regions of the AlGaAs layer into an insulating oxide through selective wet thermal oxidation. The oxidized material also has a lower refractive index than the unoxidized material.
Although conducting apertures and/or light guiding apertures would benefit an indium aluminum gallium nitride (InAlGaN) light emitting device, a suitable means for forming such apertures has not been available. Chemical etching of nitride heterostructures followed by subsequent regrowth in patterned layer openings has proved difficult because InAlGaN crystalline alloys are very stable and are therefore resistant to chemical attack. Oxidation techniques have also been difficult to implement because nitride based materials are not easily oxidized.
Thus a method of forming apertures that channel current and/or confine optically generated fields in a nitride based light emitting structure is needed.

Method of forming a buried aperture nitride light emitting device


Methods and apparatus for implementing charge skimming and variable integration time in focal plane arrays formed in a silicon substrate. The present invention provides for pulsing a field plate that lies over a diode disposed in the substrate in order to provide for charge skimming and variable integration time. The field plate is normally dc biased to suppress diode edge leakage. No additional structure is needed in the silicon substrate, and basic readout clocking is unaffected. Any interline transfer focal plane array can benefit from using the principles of the present invention.

The present invention relates generally to Schottky barrier focal plane arrays, and more particularly, to Schottky barrier focal plane arrays having charge skimming and variable integration time, and methods of achieving such charge skimming and variable integration time.
Platinum silicide (PtSi) on P-silicon Schottky-barrier diodes have been proposed since 1973 for detecting infrared (IR) radiation, and large two-dimensional focal plane arrays are routinely fabricated in this technology. Schottky-barrier diodes are described in a paper by F. D. Shepherd et at. entitled "Silicon Schottky retinas for infrared imaging" in IEDM Tech. Dig., 1973, pp. 310-313, and a paper by F. D. Shepherd entitled "Recent advances in platinum silicide infrared focal plane arrays." in IEDM Tech. Dig., 1984, pp. 370-373. Fabrication of such devices is described in papers by W. F. Kosonocky et al. entitled "160.times.244-element PtSi Schottky barrier IR-CCD image sensor" in IEEE Trans. Electron Devices, vol. ED-32, pp. 1564-1573, 1985; M. Kimata et al. entitled "A 512.times.512-element PtSi Schottky-barrier infrared image sensor" in IEEE J. Solid-State Circuits, vol. SC-22, pp. 1124-1129, 1989; H. Elabd et al. entitled "488.times.512- and 244.times.256-element monolithic PtSi Schottky IR focal plane arrays." in Proc. SPIE, vol. 1107, 1989; E. T. Nelson et al. entitled "Wide field of view PtSi infrared focal plane array" Proc. SPIE, vol. 1308pp. 36-44, 1990; and M. J. McNutt, et al. entitled "Schottky-barrier infrared focal plane arrays with novel readout structures," IEEE J. Solid-State Circuits, vol. 25, pp. 602-608, 1990.
At the same time, the use of back-side illumination and a front-side reflecting cavity have improved diode quantum efficiency to the point where temperature resolution better than 0.1.degree. K. is achieved as is described by H. Elabd et al. in "Theory and measurements of photoresponse for thin film PdSi and PtSi infrared Schottky-barrier detectors with optical cavity." in RCA Rev., vol. 43. pp. 569-589, 1982. Recently, iridium silicide has been proposed for extended wavelength sensitivity, and large arrays have been demonstrated in the long-wave infrared spectrum. These are discussed in papers by P. W. Pellegrini, et al. entitled "IrSi Schottky-barrier diodes for infrared detection" in IEDM Tech. Dig., 1982, pp. 157-160, B.-Y. Tsaur et al. entitled "IrSi Schottky-barrier infrared detectors with 10 .mu.m cutoff wavelength" in IEEE Electron Device Lett., vol. 9, pp. 650-653, 1988, and B.-Y. Tsaur et al. entitled "128.times.128-element IrSi Schottky-barrier focal plane arrays for long-wavelength infrared imaging" in IEEE Electron Device Lett., vol. 10, pp. 361-363, 1989.
Nevertheless, the relatively low quantum efficiency of Schottky-barrier diodes places a premium on relative diode area or fill factor. The reflecting plate may be dc biased as a field plate to control dime edge leakage as is described in a paper by M. J. McNutt entitled "Edge-leakage control in platinum silicide Schottky-barrier diodes used for infrared detection" in IEEE Electron Device Lett., vol. 9, pp. 394-396, 1988, and in U.S. Pat. No. 4,857,979 entitled "Platinum Silicide Imager" issued to M. J. McNutt. This eliminates the N guard-ring structure commonly used for leakage suppression as is discussed in some of the above references, and increases the focal plane array area available for the sensor diode. The increased fill factor captures more photons and improves the focal plane array sensitivity.
The provision of variable integration time provides an electronic shutter function that is a desirable addition to any focal plane array. However, it normally requires a common gate and drain adjacent to each sensor diode to drain off charge such that the diode potential is pinned and signal charge integration is temporarily suppressed. This has the disadvantage of using chip area that could be allocated to the diode, thus reducing fill factor. Another conventional approach is discussed in a paper by K. Konuma et al. entitled "324.times.487 Schottky-barrier infrared imager" in IEEE Trans. Electron Devices, vol. 37, pp. 629-635, 1990, in which the device sweeps out excess charge through a separate readout cycle, but this requires higher clock frequencies and limits the range over which the integration time can be varied. The normal readout and the charge sweep-out functions have to be compressed into the time otherwise allowed for readout only.
U.S. Pat. No. 4,866,496 issued to Audier discloses a charge skimming function that is similar in concept to that of the present invention. However, the charge skimming of the Audier patent is achieved through the use of multiple additional gates that partition the signal charge into a part that is saved and a part that is discarded. This circuit is predominantly aimed at mercury-cadmium-telluride detectors. However, besides providing the additional function of variable integration time, the present invention eliminates the need for the additional gate circuitry that is required by Audier. The efficient use of space is critical in monolithic focal plane arrays (e.g. Schottky barrier arrays).
U.S. Pat. No. 4,896,340 issued to Caro describes a general scheme for the partial input of signal charge into a charge coupled device. This patent is directed to hybrid mercury-cadmium-telluride focal plane arrays which have specific input requirements for biasing the diode and handling the large current. The Caro patent is similar to Audier in that it eliminates part of the signal charge, thus having a function similar to the present charge skimming function, but the implementation requires additional circuitry on the chip and is quite different in its execution.
U.S. Pat. No. 4,994,876 issued to Hiss describes a three dimensional storage structure that is used to increase the storage capacity of a readout circuit. This patent discloses increasing the mount or charge that can be handled, and is also aimed at hybrid mercury-cadmium-telluride arrays.
U.S. Pat. No. 5,003,565 issued to Yoshida describes a method for supplying individual control voltages to charge skimming circuits at each sensor site in the array. This is useful for eliminating the differences in diode sensitivity. This charge skimming technique is commonly used in the art. The present invention is not directed at tuning the charge skimming at each diode, and the thrust of the present invention is toward eliminating the charge skimming apparatus that is used in the Yoshida patent and elsewhere.
Accordingly, it is an objective of the present invention to provide for a focal plane array, and more particularly a Schottky-barrier diode focal plane array, having charge skimming and variable integration time that does not require additional readout circuit structure as is required in conventional circuit designs, and to methods for providing charge skimming and variable integration time in Schottky-barrier diode focal plane arrays.

Charge skimming and variable integration time in focal plane arrays