A reversible flow valve, a corresponding method of fluid flow control and a Generator-Absorber-Heat Exchanger (GAX) system utilizing such a reversible flow valve and method of fluid flow control are provided. The flow valve includes a shaft rotatable relative to the valve housing to place valve seals mounted onto the shaft in a closing and sealing relationship with selected of the flow ports in the housing.

This invention relates generally to cooling and heating refrigeration systems and, more particularly, to a flow valve such as for use in an absorption cooling and heating refrigeration system to appropriately reverse fluid flow in the system.
Absorption cooling and heating systems are well known. In such a system operated in a cooling mode, a generator heats a refrigerant solution comprising a "strong" or concentrated solution of a more-volatile or refrigerant component in a less-volatile or solvent component. The heat drives the refrigerant from the strong solution to separate a refrigerant vapor, leaving a "weak solution" that is depleted of the refrigerant.
Where the refrigerant solution is a solution of a non-volatile solute in a volatile solvent, such as lithium bromide in water, the "weak solution" contains a higher concentration of the solute but a lower concentration of the solvent than the corresponding "strong solution." Where the refrigerant solution is a solution of a more volatile solute in a less-volatile solvent, such as ammonia in water, the "weak solution" is depleted of ammonia and is mostly water, while the "strong solution" is a more concentrated ammonia solution.
After being separated in the generator, the refrigerant vapor leaves the generator, flowing to a first phase change heat exchange device operated as a condenser. In the condenser the refrigerant vapor is placed under pressure and heat is removed to an external heat sink. As a result, the vapor condenses to form a refrigerant liquid. After leaving the condenser, the refrigerant liquid flows to a second phase change heat exchange device operated as an evaporator. The evaporator relieves the pressure on the refrigerant liquid and the refrigerant evaporates, again forming a vapor. This evaporation of the refrigerant draws heat from a heat load and creates the cooling effect of a refrigerator or air conditioner.
The refrigerant vapor from the evaporator flows to an absorber. The weak solution formed in the generator also flows to the absorber. In the absorber, the weak solution reabsorbs the refrigerant, reforming the strong solution. The strong solution then flows back to the generator and the cycle repeats.
The same system can be operated in a heating mode by reversing operation of the first and second phase change heat exchange devices such that the first phase change heat exchange device now operates as an evaporator and the second phase change heat exchange device operates as a condenser, with the associated heat inputs and outputs correspondingly also being reversed.
For a heating and cooling system to capably operate efficiently alternatively in both heating and cooling modes will generally require the utilization of flow control means whereby the fluid flow through particular system components can be appropriately reversed with no more than minimal or acceptable fluid leakage. As a result, there is a need and a demand for a flow control valve for use in such systems whereby the fluid flow through particular system components can be efficiently and appropriately reversed while avoiding undesired or excessive fluid leakage.

Absorption cooling and heating refrigeration system flow valve


The invention provides a driving method suitable for a solid-state imaging device provided with a blooming prevention structure by which the dynamic range of the solid-state imaging device can be varied suitably. Each pixel section of a solid-state imaging device includes a reset gate for controlling a resetting operation for discharging accumulated charge from a charge accumulation portion of the pixel section. By performing reset gate voltage driving so that the voltage to be applied to the reset gate may vary midway in a charge accumulation period of the pixel section, the overflow level can be raised midway in the charge accumulation period of the pixel section to expand the dynamic range. Or, the voltage to be applied to a transfer gate for controlling a transferring operation of forwarding accumulated charge from a charge accumulation portion into a floating diffusion portion or the voltage to be applied to a bias gate for controlling the potential of a floating gate is varied.

This invention relates to a driving method for a solid-state imaging device provided with a blooming prevention structure.
In solid-state imaging devices which are used widely such as CCD type solid-state imaging devices and MOS type solid-state imaging devices, each pixel photoelectrically converts incident light into charge and accumulates the charge, and then the accumulated charge is read out as signal charge.
A solid-state imaging device of the type mentioned is normally provided with a blooming prevention structure. Blooming is a phenomenon wherein, when strong light is irradiated upon a certain pixel and a large amount of charge is generated in the pixel, the charge overflows from the pixel and enters pixels around the pixel thereby to cause an image at a high light location to look in an expanded condition.
The blooming prevention structure is a structure which causes charge generated by photoelectric conversion by each pixel section to overflow so that the accumulated charge of the pixel section may remain at an overflow level which is a given maximum accumulation charge amount to prevent occurrence of blooming.
However, if the maximum accumulated charge amount is determined in this manner, then the dynamic range is limited by it. Consequently, if a large amount of light which causes charge which exceeds the overflow level to be generated is inputted to some pixel sections, then all of the levels of output signals of the pixel sections exhibit an equal value, resulting in loss of light amount information.
In order to moderate this problem, a method has been proposed wherein the overflow level is varied from a low level to a high level midway in a charge accumulation period of each pixel so that the light amount to output signal characteristic may have a KNEE characteristic.
A MOS type solid state imaging device to which the method just described is applied is disclosed in Japanese Patent Publication Application No. 4-32589, wherein a MOS type solid state imaging device provided with a longitudinal overflow drain structure is constructed such that the overflow level is raised by varying the potential of a p-well with respect to an n-type substrate.
However, with the method just described, since the overflow level rises simultaneously at all pixels of a same solid-state imaging device, the start and end timings of charge accumulation must be adjusted among all of the pixels, and use of a lens shutter is essentially required.
The fact that the start and end timings of charge accumulation must be adjusted among all pixels signifies that the sensitivity drops because it is not possible to perform, while reading out of signals from a certain line is proceeding, charge accumulation in another line. Further, the fact that a lens shutter is essentially required narrows applications of the solid-state imaging device.

Driving method for solid-state imaging device provided with blooming prevention structure


The invention relates to carbon supported crack- and tear-free graphene membranes of large area useful for selective gas separation, method of preparation and uses thereof. In particular, the invention relates to carbon supported crack- and tear-free graphene membranes having good gas separation performance, in particular high H2 permeance and H2/CH4 selectivities.

In the frame of addressing the global warming issues and identified contributing factors, one option that has been developed is the reduction of greenhouse gas emissions by the capture of carbon dioxide from gaseous streams followed by underground sequestration. Carbon capture and storage is a strategy for mitigating CO2 emissions from large point sources, such as coal-fired power plants. Further, effective separation of CO2/CH4 is also necessary for biogas processing which mainly contain about 60 vol. % CH4 and 40 vol. % CO2 and large scale H2 processing needs cost effective and efficient means to separate it from other less desirable species, notably CO2 Polymeric membranes have been applied in industrial gas separation for decades and gas-selective have been commercialized for various gas separation (Sanders et al., 2013, Polymer., 54, 4729-4761) but they face performance limitations due to an inherent selectivity performance trade-off (Park et al., 2017, Science 356) and physical ageing, mainly involving plasticization of the polymer films overtime of gas passage which affects the filtration free volume (Sanders et al., 2013, supra?).
Atom-thick graphene film hosting molecular selective nanopores is the thinnest possible molecular barrier, and therefore can be regarded as the ultimate membrane for the molecular separation. Several molecular simulations have shown that the two-dimensional nanopores in graphene can yield unprecedented gas permeance, orders of magnitude higher than that attainable with the conventional membranes (Blankenburg et al., 2010, Small 6, 2266-2271; Du et al., 2011, J. Phys. Chem. C, 115, 23261-23266; Liu et al., 2013, Solid State Commun., 175-176, 101-105). Such high-flux membranes can substantially decrease the membrane area needed for separating a volume of gas mixture, providing a new solution to the problem of membrane scale-up, a longstanding challenge in the field. Therefore, the chemical robustness and the high mechanical strength of the graphene lattice, even with porosity as high as 5% and makes it highly attractive for the gas separation. Recently, several etching methods for drilling sub-nanometer pores in graphene have been developed leading to promising sieving performances for liquids and dissolved ions. However, demonstration of gas sieving ability has been limited. The only concrete evidence was provided by measuring deflation rate of a bilayer graphene micro-balloon, where pores were created on the micromechanically exfoliated graphene by UV treatment (Koenig et al., 2012, Nat. Nanotechnol., 7, 728-32). In general, most of the liquid, ion and gas transport studies have been carried out on micron-sized graphene domains, attributing to the limitations of the micromechanical exfoliation and generation of tears and cracks during transfer of chemical vapor deposition (CVD) derived graphene.
In fact, CVD derived single-layer graphene has been considered as particularly adapted for the fabrication of large-area membranes attributed to the scalability of the CVD process (Polsen et al., 2015, Sci. Rep. 5, 10257). However, post-CVD, one needs to transfer graphene from the non-porous catalytic metal foil (e.g. Cu) to a porous substrate for the fabrication of a membrane and conventional transfer methods invariably introduce cracks and tears in the graphene film, and therefore, so far the suspended, crack- and tear-free, single-layer graphene membranes have been limited the membrane area of a few μm (Suk et al., 2011, ACS Nano, 5, 6916-6924). Among several transfer techniques developed so far, the wet-transfer technique has been investigated the most due to its versatility allowing graphene transfer on a wide-range of support (Zhang et al., 2017, Adv. Mater. 29, 1-7). Briefly, the graphene film is coated with a mechanically reinforcing polymer layer such as a 100-200 nm thick poly(methyl methacrylate) (PMMA) film. Subsequently, the metal foil is etched in an etchant bath leaving the polymer coated graphene floating on the bath. Finally, the floating film is scooped on top of the desired substrate, and the polymer film is dissolved away to expose the surface of graphene. However, significant cracks and tear develop in the graphene film when a porous support is used, primarily because of a strong capillary force on the suspended graphene film during the solvent drying stage (Lee et al., 2014, ACS Nano, 8, 2336-2344).
Celebi et al. 2014, Science, 344, 289-292 reported a 2'500 μm2 film obtained by over-coating a graphene layer by another graphene layer (double layer graphene membrane) for masking cracks in the individual layers. Using focused-ion beam (FIB), they drilled relatively large pores in graphene (>7.6 nm) and observed effusive gas transport for this perforated double-layer graphene membrane. The effusive transport led to gas selectivities expected from the Knudsen diffusion (H2/CO2 selectivity up to 4) and gigantic H2 permeance (ca. 10−2 mol m−2 s−1 Pa−1). Recently, Boutilier et al., 2017, ACS Nano, 11, 5726-5736 have reported the fabrication of a centimeter-scale single-layer nanoporous graphene with a combination of ion-bombardment and O2 plasma. However, the presence of cracks generated during transfer in the graphene film limited the separation selectivity close to that expected from the Knudsen diffusion (He/SF6 and H2/CH4 separation selectivities of 8 and 3.2, respectively). Nonetheless, using transport modeling, they demonstrated presence of molecular sieving nanopores in their film, which are highly attractive for gas separation. Graphene oxide (GO) films have been successfully used for H2/CO2 separation (Li et al, 2013, Science, 342, 95-8) with a modest H2 permeance (10−7 mol m−2 s−1 Pa−1). However, the reproducible synthesis and stability of GO membranes is questionable due to the difficulty in predicting the precise structure of the GO flakes and unstable angling bonds in the GO lattice. Overall, the demonstration of gas mixture separation from sufficiently-scaled single-layer graphene membranes has remained elusive, as it necessitates development of methods to a) transfer large-area graphene onto porous supports without generating cracks and tears, and b) generate narrow pore-size-distribution in graphene (PSD) (Wang et al., 2017, Nat. Nanotechnol., 12, 509-522).
Therefore, the development of new methods of fabricating crack- and tear-free suspended graphene films that possess size-selective pores with a narrow pore-size-distribution is highly attractive in view of the large-scale deployment of the nanoporous two-dimensional membranes that has been hampered so far by the above described technical limitations.

Graphene membrane filter for gas separation


A BD-ROM has a video stream, playlist information, and an entry map recorded thereon. The playlist information defines a playback path by indicating a sequence of one or more pairs of a playback start time (In_time) and a playback end time (Out_time) within the video stream. The entry map (EP_map) indicates positions (SPN_EP_start) and playback times (PTS_EP_start) of a plurality of intra pictures in the video stream, in one-to-on correspondence with flags (is_angle_change_point). Each flag indicates whether a corresponding intra picture is an intra picture (IDR picture) for causing decoder refresh or an intra picture (Non-IDR picture) having reference to a preceding picture.

A playback path is a logical unit of a digital stream recorded on a recording medium and defined by playback path information also recorded on the recording medium. A playback apparatus executes playback of the digital stream in accordance with the playback path information. With this technique, simply by defining a plurality of pieces of playback path information, the same digital stream can be played back with variations. With this advantage, the technique is considered essential in creating multi-story movies.
Playback path information may be defined using addresses on the recording medium or time information. In the case of playback path information defined using time information, the time information needs to be converted into address information of a specific point on the stream. The conversion is carried out by converting the time information specifying the start point of playback path (In_time) to the address of an I picture. Here, the address derived from the same In_time differs depending on the GOP structure of the video stream. In the case where the video stream is an MPEG2-Video stream and the In_time corresponds to a Closed-GOP, the first I picture of the GOP shall be read. Thus, the address of the first I picture in the GOP to which In_time belongs needs to be derived as a result of the conversion.
On the other hand, an Open-GOP has reference to the previous GOP and is not independently decodable. In order to correctly start playback from an Open-GOP corresponding to In_time, the playback apparatus needs to start reading the video stream from the immediately preceding GOP to the GOP corresponding to the In_time. As described above, playback of an Open-GOP requires the playback apparatus to read an extra GOP before reading the Open-GOP.
The following patent literature discloses a data structure for facilitating playback of a playback path defined using time information.
Patent Literature 1: JP Patent Application Publication No. 2001-169247 (Application No. 2000-228656)

Recording medium, reproduction device, program


An electrical connector assembly is adapted to be moved by a vacuum-suction device, and includes an electrical connector that has an insulating housing having opposite top and bottom surfaces. The top surface is formed with a receiving space that is defined by a surrounding wall and a bottom wall. The surrounding wall has an outer surface formed with engaging blocks. The bottom wall is formed with terminal-mounting holes mounted respectively with conductive terminals. A plate member is mounted on the insulating housing, and has a plate body disposed on the top surface of the insulating housing and adapted to be sucked by the vacuum-suction device, and a plurality of engaging hooks attached to the plate body and engaging detachably and respectively the engaging blocks.

1. Field of the Invention
The invention relates to an electrical connector assembly, more particularly to an electrical connector assembly capable of being moved by a vacuum-suction device.
2. Description of the Related Art
In an automated assembly process, an electrical connector assembly can be accurately and rapidly assembled to a predetermined position on a circuit board by means of a vacuum-suction device.
FIG. 1 illustrates a conventional electrical connector assembly that is capable of being moved by a vacuum-suction device (not shown), and that includes an electrical connector 3, a plate member 4, and an anchoring device 5.
The anchoring device 5 includes a mounting frame 51, a top cover 52 connected pivotally to a first side of the mounting frame 51 and having a central opening 520, and an L-shaped anchoring rod 53 having a coupling rod portion 531 that is mounted pivotally on a second side of the mounting frame 51 opposite to the first side, and an anchoring rod portion 532 connected to the coupling rod portion 531 and operable so as to engage detachably a third side of the mounting frame 51. The top cover 52 has an engaging tongue 521 that is pressed by a bent central section 5311 of the coupling rod portion 531 of the anchoring rod 53 when the anchoring rod portion 532 of the anchoring rod 53 engages the third side of the mounting frame 51.
The electrical connector 3 includes an insulating housing 30 mounted in the mounting frame 51 and confining a receiving space 33 that is defined by a surrounding wall 32, and a bottom wall 31 connected to a lower end of the surrounding wall 32 and formed with a plurality of through holes, and a plurality of conductive terminals 34 mounted respectively in the through holes in the bottom wall 31 of the insulating housing 30. Each conductive terminal 34 has a contacting and extending outwardly of a corresponding one of the through holes into the receiving space 33. The surrounding wall 32 of the insulating housing 30 has an inner surface formed with a plurality of positioning grooves 311, 312.
The plate member 4 is disposed within the receiving space 33 in the insulating housing 30, and can be sucked by a vacuum-suction nozzle of the vacuum suction device. The top cover 52 of the anchoring device 5 abuts against the plate member 4 when the anchoring rod portion 532 of the anchoring rod 53 engages the third side of the mounting frame 51. The plate member 4 has a plate body 40, and a plurality of positioning extensions 41, 42 extending outwardly from a periphery of the plate body 40 and engaged respectively in the positioning grooves 311, 312 in the insulating housing 30 such that the plate member 4 is positioned relative to the insulating housing 30. However, the insulating housing 30 is made at relatively high costs.

Electrical connector assembly capable of being moved by vacuum-suction device


A device for inserting holding and sealing a brain scan probe in a cranial opening has a screw in the cranial opening, an insertion catheter with a probe therein extending through a bore in the screw and a pinch seal in the screw for hermetically sealing the probe in the catheter when it is in position. A protection tube surrounds the catheter and is attached distally to the screw and proximally to a coupling connector. The insertion catheter has an opening which permits longitudinal adjustment of the insertion catheter along the probe and permits introduction of the probe into the catheter and longitudinal movement of the probe.

A device of this kind is known from the brochure
"Camino Neurosurgical Products" of Messrs Camino Laboratories, San Diego, Calif., U.S.A. PA1 Inside page 1:
The Camino ICP Monitoring KIT.
The device shown serves for the insertion of a probe in the form of a catheter which measures the brain pressure in the tissue and which, after a screw has been fixed in the cranial perforation, is inserted through the protective flexible tube and the screw passage bore into the brain tissue to the required scanning depth. The probe in this known construction has an adequate natural rigidity to enable it to be advanced while being aimed toward the target without any deviations in the direction predetermined by the passage bore. When the insertion position is reached, the probe is fixed on the screw by a pinch seal, with sterile closure of the passage bore. In this construction, the protective flexible tube provides only protective action against lateral incursions on the probe. An electric coupling plug provided at the proximal end of the probe is rigidly connected only to the probe, which in the known construction has sufficient resistance to tension.
The known device offers the possibility of providing a patient with a brain probe over a relatively long period, the brain being protected against infection and the external part of the probe being movable arbitrarily, for example in the event of the patient's shifting, without any risk of electrical malfunction.
There has long been the need to carry out long-term measurements of the tissue pO2, i.e., the oxygen partial pressure in the tissue, in the brain. Probes in the form of catheters suitable for the purpose are available, e.g. Clark type oxygen measuring probes. Probes of this kind suitable for use in brain tissue, however, must be extraordinarily thin and highly flexible, since otherwise they cannot follow the tissue movements during the natural movements of the brain (respiration, pulse beat) and they would injure the tissue. On the one hand, injuries of this kind are harmful to the brain and on the other hand they falsify the oxygen measurement.
With known devices it is not possible to introduce such probes into the brain tissue, since they do not have sufficient natural rigidity for progress into the brain tissue and because they are not sufficiently tension-resistant, so that they would break between the coupling plug and the screw in the event of movements by the patient or manipulation being carried out on the patient.


A pixel cell allows both correlated double sampling (CDS) and automatic light control (ALC) operations through a non-destructive, parallel readout. An image sensor may include an array of pixel cells, some or all of which include a photosensor with two readout circuits attached; peripheral circuitry can sample charges generated from the photosensor through one readout circuit, then perform array readout through the other. One readout circuit connected to the photosensor provides a non-destructive readout of the generated charge. The other readout circuit can, for example, be a multiple-transistor circuit that transfers charge from the photosensor to a floating diffusion node for readout. The image sensor's readout circuitry may thus monitor the light reaching the photosensor of the cell to determine when to read out signals from the entire array.

Typically, a digital imager array includes a focal plane array of pixel cells, each one of the cells including a photo-conversion device such as, e.g., a photogate, photoconductor, or a photodiode. In a complementary metal oxide semiconductor (CMOS) imager, each pixel cell also has a readout circuit that typically includes a source follower output transistor. The photo-conversion device converts photons to electrons which are typically transferred to a floating diffusion region connected to the gate of the source follower output transistor. A charge transfer device (e.g., transistor) can be included for transferring charge from the photo-conversion device to the floating diffusion region. In addition, such imager cells typically have a transistor for resetting the floating diffusion region to a predetermined charge level prior to charge transfer. The output of the source follower transistor is a voltage output on a column line when a row select transistor for the row containing the pixel is activated.
Exemplary CMOS imaging circuits, processing steps thereof, and detailed descriptions of the functions of various CMOS elements of an imaging circuit are described, for example, in U.S. Pat. No. 6,140,630 to Rhodes, U.S. Pat. No. 6,376,868 to Rhodes, U.S. Pat. No. 6,310,366 to Rhodes et al., U.S. Pat. No. 6,326,652 to Rhodes, U.S. Pat. No. 6,204,524 to Rhodes, and U.S. Pat. No. 6,333,205 to Rhodes. The disclosures of each of the foregoing are hereby incorporated by reference herein in their entirety.
One typical CMOS imager pixel circuit, the three-transistor (3T) pixel, contains a photo-conversion device for supplying photo-generated charge to a diffusion region; a reset transistor for resetting the diffusion region; a source follower transistor having a gate connected to the diffusion region, for producing an output-signal; and a row select transistor for selectively connecting the source follower transistor to a column line of a pixel array. Three-transistor pixel cells have been used to support automatic light control (ALC) operations. ALC is used to control the amount of light integrated by a pixel cell. In a 3T pixel cell, the charge accumulated by a photo-conversion device may be read out prior to resetting the photo-conversion device to a predetermined voltage. Therefore, ALC operations may determine a time for readout based on the amount of charge generated by the photo-conversion device and may adjust the amount of charge further generated by the photo-conversion device in response to the charge present on the photo-conversion device at a particular time.
Another typical CMOS imager pixel employs a four-transistor (4T) configuration, which is similar to the 3T configuration, but utilizes a transfer transistor to gate charge carrier flow from the photo-conversion device to a sensing node, typically a floating diffusion region. In a 4T configuration, the source follower transistor gate is connected to the floating diffusion region. In contrast to the 3T configuration, the 4T configuration facilitates correlated double sampling (CDS), a technique that reduces noise.
A top view of a portion of a semiconductor wafer fragment containing a CMOS 4T pixel cell 100 is shown in FIG. 1. A cross-sectional view of a portion of the pixel is illustrated in FIG. 2. CMOS pixel cell 100 generally comprises a photo-conversion device 120, in the form of a p-n-p photodiode, for generating free charge carriers in response to external light 187 incident on the pixel, and a transfer gate 106′ of transistor 106 for transferring photo-generated charge carriers from the region 122 of photo-conversion device 120 to a sensing node, typically a floating diffusion region 110. The floating diffusion region 110 is electrically connected to the gate 108′ of an output source follower transistor 108. The pixel cell 100 also includes a reset transistor 107 having a gate 107′ for resetting the floating diffusion region 110 to a predetermined voltage before sensing a signal; and a row select transistor 109 having a gate 109′ for outputting a signal from the source follower transistor 108 to an output terminal 111 in response to a row select signal. There are also source/drain regions 115 for the reset, source follower, and row select transistors.
As noted, FIG. 2 is a cross-sectional view of the pixel cell 100 of FIG. 1 taken along line 1-1′. The CMOS pixel cell 100 has a pinned p-n-p photodiode 120 as the photosensor device. Pinned photodiode 120 is adjacent to the gate 106′ of a transfer transistor 106 and has a p-type surface layer 123 and an n-type photodiode collection region 122 within a p-type substrate 101.
In the CMOS pixel cell 100 depicted in FIGS. 1 and 2, free electrons are generated by incident light, represented by arrows 187, and accumulate in the n-type photodiode collection region 122. This photo-generated charge is transferred to the floating diffusion region 110 when gate 106′ receives a signal that turns on the transfer transistor 106. The source follower transistor 108 produces an output signal from the transferred charge in response to the voltage level received by gate 108′.
Pixel cell 100 is capable of supporting correlated double sampling (CDS) to reduce noise and obtain a more accurate pixel signal. For CDS, the floating diffusion region 110 begins at a predetermined reset voltage level by turning on reset gate 107′; thereafter, the reset voltage produced by the source follower transistor 108 is read out through the row select transistor 109 as a pixel reset signal Vrst. Then, integrated photo-generated charge from pinned photodiode 120 is transferred to the floating diffusion region 110 by operation of transfer gate 106′ and a pixel image signal Vsig is read out via the source follower transistor 108. The two values, Vrst and Vsig, are subtracted thereby reducing noise. Additionally, 4T pixel cell 100 provides lower dark current, which also reduces noise.
Although 4T pixel cells, and other similarly configured pixel cells, make it possible to perform correlated double sampling (CDS), they also may interfere with ALC. In a conventional 4T pixel cell 100, because the transfer gate 106′ gates the flow of photo-generated charge from the photo-conversion device 120 to the floating diffusion region 110 and, therefore, to readout circuitry, it is not possible to read out photo-generated charge without altering the charge on the photo-conversion device 120. When a 4T readout path is employed to monitor charge level in an ALC operation, the transfer of charge carriers through the transfer transistor therefore tends to destroy or alter the image signal, thus resulting in a degraded image. Therefore, ALC is not readily used with a conventional 4T pixel cell.
It would be advantageous to have improved techniques for measuring pixel light levels reaching a photo-conversion device and to obtain a non-destructive readout of this measurement during the charge integration time of the photo-conversion device.

Pixel circuit with non-destructive readout circuit and methods of operation thereof


A method for determining a desired anisotropy axis angle for a magnetic random access memory (MRAM) device includes selecting a plurality of initial values for the anisotropy axis angle and determining, for each selected initial value, a minimum thickness for at least one ferromagnetic layer of the MRAM device. The minimum thickness corresponds to a predefined activation energy of an individual cell within the MRAM device. For each selected value, a minimum applied magnetic field value in a wordline direction and a bitline direction of the MRAM device is also determined so as maintain the predefined activation energy. For each selected value, an applied power per bit value is calculated, wherein the desired anisotropy axis angle is the selected anisotropy axis angle corresponding to a minimum power per bit value.

The present invention relates generally to magnetic random access memory devices, and, more particularly, to a method and structure for selecting the anisotropy axis angle of an MRAM device for reduced power consumption.
Magnetic (or magneto-resistive) random access memory (MRAM) is a non-volatile random access memory technology that could potentially replace the dynamic random access memory (DRAM) as the standard memory for computing devices. The use of MRAM as a non-volatile RAM will eventually allow for "instant on" systems that come to life as soon as the system is turned on, thus saving the amount of time needed for a conventional PC, for example, to transfer boot data from a hard disk drive to volatile DRAM during system power up.
A magnetic memory element (also referred to as a tunneling magneto-resistive, or TMR device) includes a structure having ferromagnetic layers separated by a non-magnetic layer (barrier), and arranged into a magnetic tunnel junction (MTJ). Digital information is stored and represented in the memory element as directions of magnetization vectors in the magnetic layers. More specifically, the magnetic moment of one magnetic layer (also referred to as a reference layer) is fixed or pinned, while the magnetic moment of the other magnetic layer (also referred to as a "free" layer) may be switched between the same direction and the opposite direction with respect to the fixed magnetization direction of the reference layer. The orientations of the magnetic moment of the free layer are also known as "parallel" and "antiparallel" states, wherein a parallel state refers to the same magnetic alignment of the free and reference layers, while an antiparallel state refers to opposing magnetic alignments there between.
Depending upon the magnetic state of the free layer (parallel or antiparallel), the magnetic memory element exhibits two different resistance values in response to a voltage applied across the tunnel junction barrier. The particular resistance of the TMR device thus reflects the magnetization state of the free layer, wherein resistance is "low" when the magnetization is parallel, and "high" when the magnetization is antiparallel. Accordingly, a detection of changes in resistance allows a MRAM device to provide information stored in the magnetic memory element (i.e., a read operation). There are different methods for writing a MRAM cell; for example, a Stoner-Wohlfarth astroid MRAM cell is written to through the application of a bidirectional current in a particular direction, in order to magnetically align the free layer in a parallel or antiparallel state. The free layer is fabricated to have a preferred axis for the direction of magnetization called the "easy axis" (EA), and is typically set by a combination of intrinsic anisotropy, strain induced anisotropy and shape anisotropy of the MTJ.
When a sufficiently large current is passed through both a wordline and a bitline of the MRAM, the combined fields of these currents at the intersection of the write and bit lines will rotate the magnetization of the free layer of the particular MTJ located at the intersection of the energized write and bit lines. The current levels are selected such that the combined fields exceed the switching threshold of the free layer. For a Stoner-Wohlfarth astroid MRAM structure, the EA is aligned with the orientation of either the bitline or the wordline.
As the lateral dimension of an MRAM device decreases, several problems can occur. First, the switching field increases for a given shape and film thickness, thus requiring a larger magnetic field for switching. Second, the total switching volume is reduced such that the energy barrier for reversal also decreases, wherein the energy barrier refers to the amount of energy needed to switch the magnetic moment vector from one state to the other. The energy barrier determines the data retention and error rate of the MRAM device, and thus unintended reversals can occur due to thermofluctuations if the barrier is too small. Furthermore, with a small energy barrier it becomes extremely difficult to selectively switch a single MRAM device in an array without inadvertently switching other MRAM devices. Thirdly, because the switching field is produced by shape, the switching field becomes more sensitive to shape variations as the MRAM devices decreases in size.
In this regard, there has been introduced an MRAM device in which the free layer of ferromagnetic material includes multiple (e.g., two) ferromagnetic layers. Due to magnetostatic coupling, the magnetic moments of the two ferromagnetic layers are antiparallel to one another such that there is a net resultant magnetic moment oriented in the anisotropy easy axis. This configuration allows for a different method of writing that has improved selectivity. More specifically, the writing method relies on a "spinflop" phenomenon that lowers the total magnetic energy in an applied field by rotating the magnetic moment vectors of the ferromagnetic layers such that they are nominally orthogonal to the applied field direction but still predominately anti-parallel to one another. A rotation, or flop, in combination with a small deflection of each ferromagnetic magnetic moment vector in the direction of the applied field accounts for the decrease in total magnetic energy. Current waveforms applied to the wordline and bitline in a timed sequence cause a magnetic field flux to rotate the effective magnetic moment of the device by approximately 180 degrees.
In the rotational method of MRAM writing, the device is constructed such that the magnetic anisotropy axis is at a 45° angle with respect to the orientation of the word and bitlines. From a power consumption standpoint, a 45° angle orientation of the anisotropy axis is optimal only for architectures in which the field generation capability of the word and bitlines are essentially equivalent to one another. However, in real world MRAM architectures, it is often the case that the field generating efficiency of the word and bitlines are not equivalent. For example, there may be variations in the resistance of the lines and/or variations of the position of the lines relative to the MTJ. In addition, magnetic liners may be used to enhance the writing efficiency of one set of lines as opposed to the other. Moreover, for architectures where an entire line of bits in an array are to be written simultaneously, it may be more advantageous to apply a relatively large current to a wordline and to reduce the amount of current applied to the several bitlines.
Accordingly, it would be desirable to be able to determine a customized anisotropy axis angle for a given MRAM architecture that provides a reduction in power consumption, but that still maintains a threshold activation energy such that the MRAM device maintains selectivity.

Method and structure for selecting anisotropy axis angle of MRAM device for reduced power consumption

International Business Machines Corporation


The invention relates to a method for producing very fine particles by means of a jet mill using compressed gases as the grinding gas, characterized in that the grinding gas is under pressure of ≦4.5 bar(abs).

The material to be sieved or milled consists of coarser and finer particles which are entrained in an air stream, and which form the product stream that is introduced into a housing of an air classifier of the jet mill. The product stream reaches, in the radial direction, a sieve wheel of the air classifier. In the sieve wheel, the coarser particles are separated from the air stream, and the air stream with the fine particles axially leave the sieve wheel through an outflow pipe. The air stream with the fine particles to be removed by filtration or to be produced can then be fed to a filter, in which a fluid, for example, air, and fine particles are separated from each other.
From DE 198 24 062 A1, a jet mill is known into whose milling chamber moreover at least one energy-rich grinding stream made of hot steam with high flow energy is introduced, where the milling chamber has, besides the inlet device for the at least one milling jet, an inlet for the mill material and an outlet for the product, and where, in the area where the mill material and at least one milling jet made of hot steam and mill material have at least approximately the same temperature in the area where they converge.
Furthermore, a corresponding air classifier is known particularly for a jet mill, for example, from EP 0 472 930 B1. This air classifier and its operating procedure are quite satisfactory in principle.

Method for producing very fine particles by means of a jet mill


A method of locking tubular components in end to end relation. A first tubular body is provided having a tongue with an outwardly facing groove protruding past one end along an interior surface that has a keyway. A second tubular body is provided having a tongue with an inwardly facing groove protruding past one end along an exterior surface. A split ring is positioned in the grooves to connect the bodies. The split ring has a tapered outer surface to permit removal by an axial force. A tubular insert carries a locking key which engages the axial keyway. When the tubular insert is fully inserted into the first tubular body, the key underlies the split ring and prevents the split ring from having sufficient clearance to be withdrawn.

U.S. Pat. No. 5,052,501 discloses an earth drilling tool known as an "adjustable bent housing" fabricated from tubular components. The angle of deviation of this tool is adjustable by loosening a threaded connection and effecting a relative rotation of components. It is important that the remaining tubular components do not separate during adjustment.

Method of locking tubular components in end to end relation


A projection device includes on a chassis a liquid crystal panel for irradiation with light from a light source, a polarizing plate opposing the liquid crystal panel, and an optical compensation sheet provided between the liquid crystal panel and the polarizing plate, for compensating a twist angle of polarized light. The optical compensation sheet is attached to a rotational adjusting mechanism provided on the chassis so that it can be rotatively adjusted within a plane perpendicular to an optical axis L.

1. Field of the Invention
The present invention relates to projection devices in which an optical compensation sheet is arranged between a liquid crystal panel and a light polarizing plate.
2. Description of Related Art
FIGS. 8(a) and 8(b) are exploded oblique views of a liquid crystal panel 7 and light polarizing plates 73 and 74 that sandwich the liquid crystal panel 7. FIG. 8(a) shows a state in which no electric field is applied across the liquid crystal panel 7, whereas FIG. 8(b) shows a state in which an electric field is applied across the liquid crystal panel 7. As is well-known, each of the polarizing plates 73 and 74 allows the passage of only one of two polarized light components perpendicular to each other, and the polarizing plates 73 and 74 are arranged so that the oscillation planes of the polarized light components that are allowed to pass through them are 90 degrees apart from each other. The oscillation planes of the polarizing plates 73 and 74 must be exactly 90 degrees apart. In view of this, a configuration is known in which the polarizing plates 73 and 74 are rotationally adjusted within a plane perpendicular to the optical axis of the liquid crystal panel 7 (see Japanese Laid-Open Pat. App. Pub. No. 2000-39591).
The liquid crystal panel 7 is configured by enclosing liquid crystal molecules 57 between transparent display substrates 70 and 71. The two display substrates 70 and 71 are subjected to a rubbing process, and the rod-like liquid crystal molecules 57 are contained between the two display substrates 70 and 71 with the director of the molecules being twisted.
The liquid crystal panel 7 is of a so-called normally white type, in which, when no electric field is applied between the display substrates 70 and 71, the polarized light that has been transmitted through polarizing plate 73, the incident side, passes through polarizing plate 74, the output side, with its direction being bent 90 degrees due to the twist of the directors of the liquid crystal molecules 57, as shown in FIG. 8(a). As a consequence, the liquid crystal panel 7 appears bright, i.e., white.
As shown in FIG. 8(b), when an electric field is applied between the display substrates 70 and 71, the liquid crystal molecules 57 align vertically, and consequently the polarized light that has been transmitted through the incident-side polarizing plate 73 passes through the interstices between the liquid crystal molecules 57. The polarized light is blocked by the output-side polarizing plate 74, and thus the liquid crystal panel 7 appears black. The liquid crystal panel 7 displays an image by switching the presence/absence of the electric field in each of the microspaces.
It is known that in practice, however, in the liquid crystal panel 7, when an electric field is applied between the display substrates 70 and 71, the tilt angles of the liquid crystal molecules 57 continuously change along the thickness direction of the liquid crystal panel 7, as shown in FIG. 9. As a consequence, when an electric field is applied between the display substrates 70 and 71, light leakage occurs due to the birefringence of the liquid crystal molecules 57 in the vicinity of the substrates 70 and 71, causing contrast reduction, as is known.
In recent years, there has been a demand for greater image resolution. The devices that display such high-resolution images are required to maximize the contrast between black color and white color in projected images and project images clearly. If due to the birefringence of the liquid crystal molecules 57 just mentioned, the polarized light that should be blocked is transmitted through the liquid crystal panel 7 as indicated by the dot-dashed line in FIG. 8(b), black colors are not completely displayed black. Herein, "birefringence" indicates that the speed at which light propagates differs depending on the orientation of the plane in which it oscillates, and the orientation in which the speed is fast will be referred to as the "fast axis," whereas the direction in which the speed is slow will be referred to as the "slow axis."
In view of this, it has been suggested to provide optical compensation sheets 8 and 8a in which liquid crystal molecules 58 are arrayed along the thickness direction between the liquid crystal panel 7 and the incident/output-side polarizing plates 73 and 74, as shown in FIG. 9.
These are transparent sheets in which approximately disk-shaped liquid crystal molecules 58 composed of a discotic liquid crystal compound are aligned. The discotic liquid crystal compound is a chemical compound in which ester molecules are layered with benzene rings serving as cores.
The tilt angles of the liquid crystal molecules 58 change continuously along the thickness direction of the sheet, and the outermost liquid crystal molecules 58 are arranged substantially horizontally. As a result, the birefringence of the liquid crystal molecules 57 in the liquid crystal panel 7 is compensated, and thus light leaking from the liquid crystal panel 7 is not transmitted through the polarizing plate 74. Consequently, black colors can be reproduced completely black on the liquid crystal panel 7, maximizing the contrast.
These optical compensation sheets 8 and 8a are attached on to the polarizing plates 73 and 74 in many cases. The alignment orientation of the liquid crystal molecules 58 in the optical compensation sheets 8 and 8a needs to be parallel to the orientation of the display substrates 70 and 71.
The applicant, however, has found the following problems.
The optical compensation sheets 8 and 8a should be attached on to the polarizing plates 73 and 74 so that the alignment orientation of the liquid crystal molecules 58 is parallel to the orientation of the display substrates 70 and 71.
Nevertheless, there are cases in which the alignment orientation of the liquid crystal molecules 58 in the optical compensation sheets 8 and 8a does not turn out parallel to the orientation of the substrates because of error in attaching the optical compensation sheets 8 and 8a to the polarizing plates 73 and 74.
What is more, the optical compensation sheets 8 are cut out from a film sheet 85 into a desired dimension, but, as shown in FIG. 10, there are cases in which the cutting lines accidentally deviate, as indicated by the dotted lines, from the proper position.
In the optical compensations sheets 8 thus produced, the alignment orientation of the liquid crystal molecules 58 deviate from the originally intended orientation. As a result, light that must be blocked is allowed to pass through. Consequently, partial leakage of light occurs, into an area is essentially supposed to display black, causing display patchiness. Furthermore, since the optical compensation sheets 8 are affixed to the polarizing plates 73 and 74, if contrast reduction or display patchiness occurs it has been necessary to replace the optical compensation sheets 8 with different optical compensation sheets 8 having different optical axes. This makes it necessary to stock a variety of optical compensation sheets 8 having various optical axes, inviting adverse consequences such incidents of unneeded stock.
The applicant has conceived rotatively adjusting the alignment orientation of the liquid crystal molecules 58 in the optical compensation sheet 8 within a plane orthogonal to the optical axis to project uniform images having distinct contrast between black and white colors.

Projection device and liquid crystal panel unit for use in the projection device


The present disclosure relates to methods for improving the quality of diamonds by eliminating internal defects, such as cracks and vacant volumes, without the use of filler materials such as glass, thereby improving the diamond's optical performance or appearance. More particularly, the disclosure relates to a method of curing defects in a genuine or synthetic diamond or other gemstone by using Atomic Layer Deposition (“ALD”) processes to form atomic layers within vacant volumes or cracks in the diamond or gemstone. Alternatively, ALD may be used to form crystalline layers of a new diamond or other gemstone.

Diamonds and other gemstones are commonly used both for cosmetic applications in the jewelry industry and for industrial applications, such as cutting, drilling, grinding, and polishing.
We will refer below mostly to diamonds, however, the discussion is the same for other gemstones made of other materials. Due in part to the increased demand for such applications and the relatively high price for even small sized diamonds, synthetic diamond industries are rapidly growing. Despite the growth in the synthetic diamond market, sales of natural diamonds have remained steady or have grown over the past 10 years. As such, there is a large market demand for both natural and synthetic diamonds.
In the jewelry industry, the value of a diamond, sapphire, etc., depends at least partially on its optical performance, or clarity. Diamonds that are absolutely clear are typically the most expensive and the most sought-after. However, most diamonds have internal imperfections, such as cracks, inclusions and vacant volumes that detract from the diamond's value and beauty. These defects reflect or absorb light incident on the defect's surface and are visible to the consumer. A crack has two surfaces that reflect light, and approximately 17% of the light incident on a crack is reflected due to the high refractive index of the diamond. Such defects reduce the value of a diamond significantly. These defects may also reduce a diamond's value in industrial applications too, including by increasing the risk of failure due to breaking along cracks or flaw lines.
It is therefore often necessary or desirable to improve the quality of a diamond or other gemstone by eliminating internal defects, and thereby improve a diamond's optical performance. Typically, inclusions inside diamonds are treated by drilling a hole to the defect with a laser and dissolving the inclused material with hot acids. This process leaves a vacant volume. Some diamond dealers fill cracks and vacant volumes with high refractive index glass to minimize the reflection and the visibility of these defects. However, diamonds having fillers are less valuable then diamonds without fillers. There are known chemical processes relied upon in the jewelry industry for improving a diamond's appearance. CVD has previously been used to grow single crystal diamonds. CVD involves feeding various amounts of gases into a chamber while providing the conditions necessary for carbon atoms in a gas to settle on a substrate in crystalline form. However, CVD diamond layer thickness may not be accurate and is frequently difficult to control.
Current efforts have been made to grow a single crystal diamond (outside of the high pressure furnace crystallization) using CVD technology. For example, the Carnegie Institute's Geophysical Laboratory can produce a 10 carat (2 g) single-crystal diamond rapidly (28 nm/s) by CVD, as well as a colorless single-crystal diamond. Growth of colorless diamonds up to 60 g (300 carats) is believed achievable using their method. (See http://www.scienceblog.com/cms/node/7908, which is incorporated herein by reference in its entirety.)
But despite the above mentioned methods, there remains a need for a relatively simple, repeatable, inexpensive and otherwise economical method for improving the quality of diamonds and other precious stones.

Method and apparatus for improving the quality of diamonds and other gemstones


Provided is a test apparatus in which a test for bacterial identification or antimicrobial susceptibility can be promptly determined. A division state of bacteria is monitored by performing microscopic observation of shapes and the number of the bacteria in each of wells in a culture plate for bacterial identification culture or an antimicrobial susceptibility test, and it is determined whether or not the bacteria grow in a stage shifted from an induction phase to a logarithmic phase, with reference to an image obtained through microscopic observation. In addition, determination performed based on turbidity in the related art may be combined with determination performed based on microscopic observation in which change and the like in the shapes of the bacteria are monitored. Accordingly, it is possible to realize a highly accurate test result.

Recently, antibiotics have been overused with respect to infectious disease patients, resulting in an increase of the proportion of drug-resistant bacteria. Accordingly, the number of instances of hospital acquired infection tends to increase as well. However, the development of new antibiotics has decreased due to slimmer profit margins, and the number of types of the antibiotics approved by US FDA has been decreasing every year. Therefore, when an infectious disease occurs, it is vitally important to achieve early recovery of patients, to prevent the spread of hospital acquired infection, and to suppress the emergence of drug-resistant bacteria by carrying out an identification test and an antimicrobial susceptibility test of the bacterial species of the causative bacteria thereof and using antibiotics properly.
In a test method which is generally carried out in bacteriological test laboratories, a causative bacterium of an infectious disease is cultured and identification and antimicrobial susceptibility of the bacterial species are determined based on the presence or absence of growth thereof. First, a specimen such as blood, a throat swab, and sputum is collected from a patient. Then, isolation culture for obtaining the infection causative bacterium in a single colony is performed for twenty-four hours. A bacterial suspension is prepared from the single colony, and culture for examining identification culture or antimicrobial susceptibility is performed for twenty-four hours. The determination result of the antimicrobial susceptibility test is obtained and appropriate medication is performed after three days, for example, after the specimen is collected from the patient. An infection causative bacterium which has a slow growth rate and needs to be cultured for a long time requires more days.
For example, as a test apparatus for achieving automation and energy-saving in isolation culture, a test apparatus which acquires an image of bacterial colonies in a culture dish and measures micro-organisms or cells, and the like have been developed (refer to PTL 1).


A second heating device heats an inner wall of an ink chamber of a print head to a temperature not lower than the melting point but not higher than evaporating temperature of ink 3, for a prescribed time period after the end of printing, based on a signal from a second heating control device. Consequently, the ink solidified and deposited on the inner wall of ink chamber and not used for printing is liquefied and recovered to the ink chamber to be used for the next printing.

1. Field of the Invention
The present invention relates to a method and apparatus for image recording such as a copying machine, a facsimile and a printer. More specifically, the present invention relates to a method and apparatus for recording a prescribed image by emitting evaporated ink onto a recording medium.
2. Description of the Background Art
Conventional emitting type image recording apparatuses include ones employing ink jet method and ones employing electrostatic recording method. In the ink jet method, a liquid ink contained in a tank is pressurized by using a piezoelectric element or the like by an electric signal corresponding to image data, and the pressurized ink is emitted from a nozzle for printing. In the electrostatic recording method, powder or liquid (mist) ink is charged, the ink is drawn out from the nozzle by electrostatic attraction, and printing is done by opening/closing a shutter provided at a tip end of the nozzle by an electric signal corresponding to the image data. However, in the ink jet method, when air enters the ink tank, it becomes impossible to sufficiently pressurize the ink, so that printing fails. Further, this method suffers from clogging of the nozzle with ink and inferior image quality caused by bleeding of the ink on the recording medium, since liquid ink is used. The electrostatic recording method suffers from the problem of nozzle clogging when the ink is in the form of powder as the ink particles are caked by blocking. If the ink is liquid ink, this method also suffers from the problems of nozzle clogging and ink bleeding as in the ink jet method.
A method in which gaseous ink is emitted and adhere on a recording medium has been proposed as a method of solving the above described problems. In this method, nozzle clogging is less likely, since what is emitted is a gas. Further, since pixels are recorded by molecules, printing with higher resolution, high gradient and less ink bleeding is possible. This method is disclosed in Japanese Patent Publication No. 56-2020. The conventional image recording apparatus will be described in detail with reference to FIG. 14, which is a block diagram showing the structure of the conventional ink recording apparatus.
Referring to FIG. 14, the image recording apparatus includes a print head 101, a heating device 102, a charging electrode 103, electrostatic lenses 104, 105, an electrostatic shutter 106, a back plate 107, a power source 110 and a signal source 111. The heating device 102 includes a power source 108 and an electric heater 109.
Ink I1 in print head 1 is heated and evaporated by heating device 102 including electric heater 109 and power source 108. The evaporated gaseous ink Ig is shoot forth from print head 1. Gaseous ink Ig is charged by power source 110 inserted between charging electrode 103 and print head 101 when it passes through charging electrode 103 as it is shoot out. The charged gaseous ink Ig is focused by electrostatic lenses 104 and 105. Thereafter, the amount of emission of the focused gaseous ink Ig is controlled to be a prescribed amount, by electrostatic shutter 106 of which operation is controlled by signal source 111. The ink of which amount is thus controlled travels to back plate electrode 11, whereby an image is formed on a recording medium RM.
However, in the conventional image recording apparatus, the gaseous ink Ig is emitted continuously from print head 101, and the ink not actually used for recording is wasted, increasing running cost.

Method and apparatus for image recording by emitting evaporated ink onto a recording medium


In a double side stack packaging a plurality of chips, a hole is formed in a substrate. A first chip is attached to a bottom surface of the substrate by using a thermo compression and is electrically interconnected to terminals formed at sidewall of the hole using a wire bonding. Next, an epoxy is coated on the substrate and the first chip and a first heat spreader is installed thereon and then the epoxy is cured. Thereafter, a second chip is attached to a top surface of the substrate by using the epoxy and is electrically interconnected to terminals formed on the substrate using the wire bonding. And then, an encapsulation resin is coated on the substrate and the first chip and a second heat spreader is installed thereon and then the epoxy is cured.

FIG. 1 illustrates a cross sectional view of a conventional multi-stack chip size package (CSP).
Referring to FIG. 1, a first chip (or die) 21 is adhered on a substrate 11, e.g., a printed circuit board, with an epoxy and a second die 31 is stacked on the first chip 21 with the epoxy. Bonding pads on the first and the second chip 21 and 31 are electrically connected with terminals on the printed circuit board 11 by conductive wires 51. A resin, e.g., an epoxy molding compound (EMC) 41 is used to mold the first and the second chip 21 and 31, and the electrical connection between the whole package and another printed circuit board can be achieved by a ball grid array using solder balls 61.
The drawback of this conventional multi-stack chip size packaged device is that a thickness thereof is to be enlarged, e.g., about 1.4 mm, because of the molding material of the multi-stack CSP, i.e., the resin, to thereby require a long conductive wires 51, i.e., a long signal transmission path. Therefore, the characteristics of the multi-stack chip size packaged device are deteriorated and the applicability thereof is also reduced. In addition, heat dissipation thereof is not effective.


A cluster management system sends a first message over a communications network to detect a server node which runs a base operating system image configured to communicate with the cluster management system to enable discovery and network configuration of the server node. In response to receiving the first message, the base operating system image sends a second message to the cluster management system, wherein the second message includes node identifying information associated with the server node. The cluster management system and the base operating system image communicate to configure network settings of the server node based on server cluster specifications and the node identifying information. Subsequent to completion of the network configuration, the cluster management system automatically provisions the server node for inclusion in a server cluster by re-imaging the server node with a server operating system to enable operation of the server node in the server cluster.

Various types of engineered software solutions such as software-defined storage (SDS) solutions are constructed using a cluster of server nodes that are configured and provisioned to perform various functions. A cluster management system is typically implemented to manage the operation of the server cluster and allow an administrator to, e.g., construct a new server cluster, expand an existing server cluster with new server nodes, etc., using an application programming interface associated with the cluster management system. In many instances, configuring and provisioning server nodes requires manual operations by the system administrator, which is time consuming and can lead to misconfigurations due to human error. Indeed, before a server node can be included in a server cluster, the server node needs to be properly configured in accordance with specifications of the software solution stack of the server cluster.
Some software solutions follow a model in which server nodes are pre-configured, tested, and certified (in the factory) to run a given software solution stack. While these pre-configured server nodes can save installation time at the customer site, such server nodes still require manual network configuration and discovery before they can join a server cluster. Furthermore, while some software solutions implement functions to support automated switch and network configuration for ease of use to the customer, such solutions still require a data center administrator to manually configure management IP addresses for the server nodes after racking and stacking the server nodes, which can lead to network misconfigurations due to human error.

Automatic discovery and configuration of server nodes


A method for forming an electronic device on a substrate, the device including a first electrically conductive region, a second electrically conductive region spaced from the first electrically conductive region and a region of an semiconductor material between the first and second electrically conductive regions and in contact with the first electrically conductive region, the method comprising doping an interfacial zone comprising least part of the periphery of the semiconductor material at the interface between the semiconductor material and the first electrically conductive region by means of a dopant contained in the first conductive material and capable of doping the semiconducting material so as to thereby enhance the conductivity of the interfacial zone.

(1) Field of the Invention
This invention relates to electronic devices, especially solution-processed devices, and methods for forming such devices.
(2) Description of the Related Art
Semiconducting conjugated polymer thin-film transistors (TFTs) have recently become of interest for applications in cheap, logic circuits integrated on plastic substrates (C. Drury, et al., APL 73, 108 (1998)) and optoelectronic integrated devices and pixel transistor switches in high-resolution active-matrix displays (H. Sirringhaus, et al., Science 280, 1741 (1998), A. Dodabalapur, et al. Appl. Phys. Lett. 73, 142 (1998)). In test device configurations with a polymer semiconductor and inorganic metal electrodes and gate dielectric layers high-performance TFTs have been demonstrated. Charge carrier mobilities up to 0.1 cm2/Vs and ON-OFF current ratios of 106–108 have been reached, which is comparable to the performance of amorphous silicon TFTs (H. Sirringhaus, et al., Advances in Solid State Physics 39, 101 (1999)).
In PCT/GB00/04934 techniques are disclosed that allow fabrication of polymer TFTs by a combination of direct printing and solution processing. These manufacturing techniques offer the possibility of inherently lower cost than inorganic semiconductor manufacturing techniques based on vacuum deposition and photolithographic patterning, and can be well suited for fabrication of low cost electronic circuits on large areas and flexible substrates.
One of the key factors that determines the performance of a polymer TFT is the parasitic contact resistance associated with the injection of charge carriers from the source electrode into the accumulation layer at the semiconductor-dielectric interface as well as the transport of the exiting charge carriers from the accumulation layer to the drain electrode. A finite contact resistance results in a fraction of the applied source-drain voltage dropping across the contacts and in a corresponding reduction of the transistor current, and the linear field-effect mobility, respectively. This is particularly relevant in the so-called linear regime of the transistor where the source-drain voltage is small compared to the gate voltage. A suppression of the current in the linear regime significantly degrades the switching speed of the TFT. In an active matrix display application, for example, the linear operating regime of the transistor determines the switching speed, as the voltage difference between the signal on the data line, and the voltage on the pixel to be addressed approaches zero.
Several factors may contribute to the source and drain contact resistances.                The conductivity of the conducting material that is in contact with the semiconducting polymer and forms the source and drain contacts.        The existence of insulating layers on the surface of the source-drain contacts, such as unintentional oxide layers.        At most metal-semiconductor interfaces a potential barrier exists. The shape of this potential barrier is determined by the difference between the Fermi energy of the metal and the ionisation potential (p-type semiconductor) and electron affinity (n-type), respectively, the image force experienced by a charge carrier in the semiconductor by image charges on the surface of the metal, as well as by the applied electric field. In normal operation of the TFT this so-called Schottky diode is reverse biased at the source, and forward biased at the drain.        In a device configuration where the source-drain contacts are formed on the same side of the semiconducting layer as the accumulation layer (see FIG. 1(a)) the Schottky potential barrier results in a short region between both the source and drain contacts and the accumulation layer in the channel in which no accumulation is possible, and in which the carrier concentration is low. In this region the current is ultimately limited by space-charge limited bulk conduction.        In a device configuration where the source-drain contacts are formed on the opposite side of the accumulation layer (see FIG. 1(b)) transport needs to occur through unaccumulated bulk of the semiconducting polymer layer. To minimize this contribution to the contact resistance the thickness of the semiconducting polymer film should be as small as possible.
In any particular device configuration several of the above factors might be contributing to the contact resistance, and the total parasitic contact resistance might be considered to be made up of a series combination of the individual contact resistances associated with the different factors.
One of the techniques that has been applied successfully to minimize contact resistance in inorganic semiconductor devices such as amorphous silicon (a-Si) TFTs is the use of highly-doped p+ and n+ semiconductor contacts. In the so-called inverted-staggered (bottom-gate) configuration of an a-Si TFT, the intrinsic a-Si semiconducting layer is formed directly on top of the SiN dielectric layer. Then a highly doped n+ a-Si layer is deposited followed by the deposition of a metal layer such as Cr. The Cr and n+ a-Si layer are then patterned by photolithography and subsequent wet (Cr) and dry etching (n+ a-Si). In this structure efficient electron injection into the intrinsic a-Si layer is from n+ a-Si source/drain contacts with Cr interconnects. The use of a highly doped semiconducting contact of the same material from which the semiconducting channel is formed minimizes both the height of the potential barrier and the width of any carrier depleted region at the contacts, and results in efficient carrier injection.
For inorganic semiconductor devices formation of the highly doped p+/n+ contacts to the semiconductor is usually associated with additional processing steps such as deposition of a highly doped layer, ion implantation steps and additional patterning steps. For polymer TFTs such processing steps are often difficult to perform, partly because of polymer degradation during ion implantation or solvent compatibility problems associated with photolithographic patterning. Furthermore, in general techniques to perform controlled doping with well-defined doping profiles are not established for polymer semiconductors.


A disposable pull-on garment has a front waist region and a back waist region opposite the front waist region. The disposable pull-on garment also has a chassis and front and back waist members attached to the chassis in the front and back waist regions, respectively. The front waist member has a first retraction force and the back waist member has a second retraction force. The disposable pull-on garment also has a pair of side members attaching the front waist region to the back waist region, thereby forming a waist opening and a pair of leg openings. Each of the pair of side members includes a waist zone and a hip zone. The waist zones have retraction forces which are about equal to the first retraction force, and the hip zones have retraction forces which are greater than the first or second retraction forces.

It has long been known that absorbent articles such as conventional taped diapers, pull-on diapers, training pants, sanitary napkins, pantiliners, incontinence briefs, and the like, offer the benefit of receiving and containing urine and/or other bodily exudates. For children who are able to walk and who may be engaged in toilet training, the pull-on diaper has become very popular.
Pull-on diapers are generally designed to effectively contain exudates and can be designed to facilitate self-application. Pull-on diapers generally include a front waist region, a back waist region, and a crotch region between the front waist region and the back waist region. Typically, the front waist region and the back waist region can be attached via pairs of side panels to form a waist opening and a pair of leg openings. Pull-on diapers can be manufactured in a pre-joined configuration such that the front and rear waist regions do not need to be attached by a wearer or caregiver prior to donning the article on the wearer.
Typically, pull-on diapers are also designed to provide sustained fit of the pull-on diaper while the wearer moves. For example, in order to prevent the pull-on diaper from sagging or slipping about the waist of the wearer, pull-on diapers may utilize elastic elements in the waist opening and leg openings. The elastic elements in the waist opening can contract the waist opening around the waist of the wearer while the elastic elements in the leg openings can contract the pull-on diaper around the legs of the wearer. However, for many wearers of pull-on diapers, the waist of the wearer may not necessarily be the narrowest portion of the wearer's torso which is covered by the pull-on diaper. A hip region, just below the waist of the wearer, often has a smaller perimeter than the perimeter of the waist of the wearer. In an attempt to maintain the waist opening of the pull-on diaper at the waist of the wearer, most pull-on diapers utilize elastic elements in the waist opening that provide a relatively high contractive force against the waist of the wearer. However, if the waist opening of the pull-on diaper does slip down to the hip region, the smaller perimeter of the hip region can reduce the contractive force applied by the elastic elements in the waist opening thereby making the pull-on diaper more susceptible to sagging or slipping on the wearer.
Unfortunately, the relatively high contractive force of the elastic elements in the waist opening may tend to mark the skin of the wearer. Additionally, this problem may be exacerbated if the elastic elements utilize thin elastic members which can increase localized forces against the waist of the wearer.
Another problem is that a high contractive force in an elastic element in the waist opening can make the pull-on diaper difficult to apply for either the caregiver or the wearer. In addition, for pull-on diapers which are refastenable, an elastic element in the waist opening with a relatively high contractive force may give the caregiver a false perception that the pull-on diaper is too small for the wearer.
Other pull-on diapers, may position elastic strands across the front waist region, back waist region, and a portion of the crotch region, of the pull-on diaper in order to prevent the pull-on diaper from sagging or slipping about the waist of the wearer. However, while these additional elastic strands may contract the front and back waist regions of the pull-on diaper, they can also contract a portion of the crotch region of the pull-on diaper. The contracting of the portion of the crotch region may cause the absorbent core to be gathered and bunched in the crotch region. Unfortunately, this gathering and bunching of the absorbent core can result in a higher risk of leakage from the pull-on diaper. Moreover, this gathering of the absorbent core can also detrimentally affect the aesthetic appeal and comfort of the pull-on diaper.
Consequently, a need exists for a disposable pull-on garment which facilitates donning the pull-on garment on a wearer while still providing sustained fit. There is also a need for a disposable pull-on garment which reduces the possibility of leakage from the disposable pull-on garment while providing sustained fit.

Absorbent article providing a better fit and more comfort to a wearer


Techniques and mechanisms to improve potential well characteristics in a pixel cell. In an embodiment, a coupling portion of a pixel cell couples a reset transistor of the pixel cell to a floating diffusion node of the pixel cell, the reset transistor to reset a voltage of the floating diffusion node. In another embodiment, the pixel cell includes a shield line which extends athwart the coupling portion, where the shield line is to reduce a parasitic capacitance of the reset transistor to the floating diffusion node.

1. Technical Field
This disclosure relates generally to image sensors, and in particular, but not exclusively to complementary metal-oxide semiconductor ("CMOS") image sensors.
2. Background Art
Image sensors have become ubiquitous. They are widely used in digital still cameras, cellular phones, security cameras, as well as, medical, automobile and other applications. The technology used to manufacture image sensors, and in particular complementary metal-oxide semiconductor ("CMOS") image sensor, has continued to advance at a great pace. For example, the demands of higher resolution and lower power consumption have encouraged the further miniaturization and integration of these image sensors.
FIG. 1A is a circuit diagram illustrating pixel circuitry of two four-transistor ("4T") pixel cells Pa and Pb (collectively pixel cells 100) within a conventional image sensor array. Pixel cells Pa and Pb are arranged in two rows and one column and time share a single readout line. Each pixel 100 includes photodiode 101, transfer transistor 102, reset transistor 103, source-follower transistor 104 and row select transistor 105.
During operation, transfer transistor 102 receives transfer signal TX which transfers the charge accumulated in photodiode 101 to floating diffusion node 106. Reset transistor 103 is coupled between power rail VDD and floating diffusion node 106 to reset the pixel (e.g. discharge or charge floating diffusion node 106 and photodiode 101 to a preset voltage) under the control of reset signals RST. Floating diffusion node 106 is coupled to the gate terminal of source-follower transistor 104. Source-follower transistor 104 is coupled between power rail VDD and row select transistor 105. Source-follower transistor 104 operates as a source-follower, providing a high impedance connect to floating diffusion node 106. Row select transistor 105 selectively couples the output of pixel cell 100 to readout column line or bit line under the control of signal RS.
In normal operation, photodiode 101 and floating diffusion node 106 are reset during a reset phase by temporarily asserting reset signal RST and transfer signal TX. After the reset phase, the integration phase is commenced by de-asserting transfer signal TX and reset signal RST and permitting incident light to charge photodiode 101. The voltage or charge on photodiode 101 is indicative of the intensity of light incident of photodiode 101 during the integration phase. The readout phase is commenced before the end of the integration phase by asserting reset signal RST to reset floating diffusion node 106 to reset voltage RST. RST approximately equals power rail VDD minus the threshold voltage of reset transistor 103. After floating diffusion node 106 has been reset, row select signal RS and a sample signal are asserted, which couples floating diffusion node 106 to a sample and hold circuit (not shown). After the reset voltage is sampled, the sample signal is de-asserted. The end of the integration phase occurs after the de-assertion of the sample signal. Transfer signal TX is then asserted to couple photodiode 101 to floating diffusion node 106 and the gate terminal of source-follower transistor 104. As the accumulated electrons on photodiode 101 is transferred to floating diffusion node 106, the voltage at floating diffusion node 106 decrease since electrons are negative charge carriers. After charge transfer is complete, transfer signal TX is de-asserted. After transfer signal TX is de-asserted, sample signal RS is asserted and the voltage at floating diffusion node 106 is sampled.
When reset signal RST is asserted during the reset phase and the beginning of the readout phase, the channel region of reset transistor 103 is inverted and electrons are injected into the channel. When reset signal RST is de-asserted, some charges will be injected to the terminal coupled to power rail VDD and other charges will be injected to the terminal coupled to floating diffusion node 106.
The voltage potential well at floating diffusion node 106 after a pixel is reset strongly relates to the occurrence of image lag at a high signal level. Consequently, a decrease in the potential well of floating diffusion node 106 would decrease the voltage swing and the conversion gain of the pixel cell (and therefore the image sensor). The post-reset potential well at floating diffusion nodes tends to become shallower as successively smaller-sized pixels are developed. These shallow potential well characteristics pose a serious limitation on improving image sensor performance.

CMOS image sensor with reset shield line


A new cultivar of Hydrangea macrophylla named ‘Lapis Lazuli’ that is characterized by its strong blooming habit, its ability to re-bloom on new growth after deadheading, its consistently formed, hortensia type inflorescences with sterile flower sepals that are rounded to broadly ovate in shape and dark blue in color with a white central area when grown under acidic soil conditions and bright pink in color with a white central area when grown under alkaline soil conditions, its compact growth habit with strong stems that enable pot culture without the need for staking, its dark green glossy foliage and its hardiness at least in U.S.D.A. Zones 5 to 9.

The present invention relates to a new and distinct cultivar of Hydrangea macrophylla and will be referred to hereafter by its cultivar name, 'Lapis Lazuli'. 'Lapis Lazuli' represents a new hortensia type bigleaf hydrangea, a deciduous shrub grown for ornamental use in the shaded landscape and for use as a potted plant. 'Lapis Lazuli' was derived from an ongoing controlled breeding program in a nursery that focuses on new cultivars of Hydrangea for container and landscape use. 'Lapis Lazuli' originated as a seedling from seed sown of Hydrangea macrophylla by the Inventor in 1994 in Shizuoka, Japan. The parents of 'Lapis Lazuli' are unknown. The new Hydrangea was selected as a unique single plant from amongst the seedling evaluated in June of 2001.
Asexual reproduction of the new cultivar was first accomplished by softwood stem cuttings by the Inventor in Shizuoka, Japan in March 2006. The characteristics of this cultivar have been determined to be stable and are reproduced true to type in successive generations.