A plane light source structure for planar display includes a light guide plate and a light source. Material of the light guide plate is transparent plastic. The light guide plate is regarded as the lower plate of LCD panel when it is used as back light. On the other hand, the light guide plate is regarded as the upper plate of LCD panel when it is used as front light.

1. Field of the Invention
The present invention generally relates to a plane light source structure, and more particularly to a plane light source structure for planar display.
2. Description of the Prior Art
Typically, plane light source is always for liquid crystal display devices. Plane light source projected from rear end of the liquid crystal display devices is called back light source, while plane light source projected from the front side of the liquid crystal display devices is called front light source. Liquid crystal display devices using back light source are called transmissive-type, while using front light source are called reflective-type. No matter the transmissive-type or reflective-type liquid crystal display devices are used, a high brightness and stable light source is necessary.
A conventional transmissive-type liquid crystal display device, as shown in FIG. 1, has a flat light guide plate 102 that is used to guide light rays from two light sources 104-1 and 104-2 at the two opposite ends of the light guide plate 102 to light-emitting surface thereof and to liquid crystal panel. There are many convex/concave dots on the bottom of the light guide plate 102 in FIG. 1 to reflect light rays to the upper side. Another way for reflecting upward light rays is to utilize a plurality of slanted portions (V-cuts). A reflector 106 below the opposite surface of light-emitting surface of the light guide plat 102 reflects all refractive downward light rays to the light-emitting surface of the light guide plate 102. A polarizing plate 108 and a lower substrate 110 are sequentially on the light guide plate 102. The material of conventional lower substrate 110 uses transparent glass, which thin film transistors 112 are directly formed thereon. A passivation layer 114 and transparent electrodes 116 are formed sequentially on the lower substrate 110 to form a lower plate of the liquid crystal panel. Next, a color filter 122 and transparent electrodes 120 are formed sequentially on another transparent glass, which is upper substrate 124 of the liquid crystal panel, to form upper plate of the liquid crystal panel. Then, upper plate and lower plate are sealed with transparent electrode layers 116, 120 face to face and vacuumed, and liquid crystal 118 is injected into the space between the upper and lower plates to form the liquid crystal panel. Finally, a polarizing plate 126 is placed on the upper substrate 124 to form a transmissive-type liquid crystal display device 100. Transmissive-type liquid crystal display devices are usually for television or monitor of a computer, especially for large-scale display devices.
The light guide plate 102 in FIG. 1 is flat. However, there is another type light guide plate, such as the wedge light guide plat 103, as shown in FIG. 2. Reflecting light manner of the wedge light guide plate 103 can only use a plurality of slanted portions (V-cuts) to guide the light rays to the light-emitting surface vertically. It has an advantage for the wedge light guide plate 103 that only single light source 104 is needed.
As shown in FIG. 3, a technique of hollow light guide plate announced by Fujitsu is disclosed. Light rays from a plurality of light sources 202 passing through mirrors 204 enter reflection zone in-between. There are four control plates 206 in the reflection zone to guide light rays to light-emitting surface appropriately. Reflectors 208 are located below the control plates 206 to reflect light rays back to the light-emitting surface. Finally, light rays illuminate liquid crystal display panel through the lenses 210. This kind of plane light source structure is very complicated, and will not be used due to manufacturing cost as well as yield.
Another conventional reflective-type liquid crystal display device is shown in FIG. 4, wherein light guide plate 102 is located on the liquid crystal display panel, and thin film transistors 112 are formed on the lower substrate 110 directly. A passivation layer 114 and a reflective film 115 are formed on the lower substrate 110 sequentially to form so called lower plate of the liquid crystal display panel. Then, color filter 122 and transparent electrode layer 120 are formed on another transparent glass, which is upper substrate 124 of the liquid crystal display panel, to form so called upper plate of the liquid crystal display panel. The transparent electrode layer of the upper plate and the reflective film of the lower plate are sealed face to face and vacuumed, and then liquid crystal 118 is injected into the space between the upper and lower plates to form the so called liquid crystal display panel. A retardation film 127, a polarizing plate 126, and a light guide plate 102 are sequentially on the upper substrate 124. A light source 104 is at one end surface of the light guide plate 102. The retardation film 127 is to retard phase of incident light usually by quarter wavelength, and called retardation film of quarter wavelength.
The light source of reflective-type liquid crystal display device is on the front side of liquid crystal display panel, and also called front light source. Light rays from the light source 104 are guided downward by the light guide plate 102 and reflected upward to user by reflective film 115. Reflective-type liquid crystal display devices are usually used for display panel of watches or mobile phones, especially for small-scale display devices.
Planar display devices now are toward to minimized volume and reduced weight. It is difficult to achieve minimized volume of the planar display devices, and particularly to apply the planar display devices to dual display module. Moreover, light rays in the liquid crystal panel pass through many media, and energy of the light rays is substantially lost. Illumination of light rays emitted from the light source is thus decreased when the light rays are received by eyes of user. It is necessary to develop another planar display device that can minimize volume, reduce weight of the display device and increase illumination of light rays.

Plane light source structure for planar display


At least three incoming light beams (10a-c) are combined partly combined into a null beam and partly into fringe tracking beams. The relative phase difference between the incoming beams (10a-c) is controlled so that a phase relationship between in the null beam corresponds to destructive interference of the main beam components in the null beam. In the fringe tracker beams this leads at least partly to constructive interference between the main beam components, with an intensity that depends on the phase differences. Measurements of the intensities of the fringe tracker beams are used to control the relative phase differences of the incoming beams (10a-c) to realize destructive interference of the main components in the null beam. To form the null beam successively more of the light beams are combined into the null beam in a series of beam combiners (14a, 14 b). Part of the light is split from the incoming light beams into the fringe tracking beams, said splitting occurring at least partly between a start and end of said series (14a, 14b) or at said start.

An apparatus for optically combining at least three light beams can be applied for example in a telescope arrangement that is arranged to make light from a main direction interfere destructively at a null output. This can be used to observe light received from a different direction when a dominant light source is present in said main direction. In astronomy, for example, the light from a planet could be observed near a star, by making the light from the star interfere destructively.
To ensure destructive interference for light from the main direction it is desirable to use a control loop for adjusting the optical path lengths for the different beams relative to one another. Controllable optical path lengths are provided in front of the beam combiners where the beams are combined. The control loop ensures that before they enter the beam combiners the beams have relative phases for light from the main direction so that this light will interfere destructively in the null path.
In one possible set-up of the control loop, the control loop contains beam splitters to split off fringe tracking parts of the beams before the remainder of the beams is combined. The split off fringe tracking beams are combined so that they interfere at least partly constructively. The measured intensity of the constructively interfering fringe tracking beams depends on the phase relation between the beams for light from the main direction. This measured intensity is used to determine whether the beams have the proper phase relation for destructive interference in the null path and, if not, how to change the optical path length to reach the proper phase relationship.
However, this possible set-up has the disadvantage that it requires close control over the properties of the part of the beam paths beyond the point where the fringe tracking beams are split off, as far as these properties affect the light. This part of the optical system must be extremely stable, or it must be kept stable at the expense of a complex metrology system. This makes such a set-up heavy, expensive and complex.

Apparatus and method for optically combining at least three light beams

Nederlandse Organisatie Voor Toegepast-Natuurwetenschappelijk Onderzoek TNO


A voltage regulator circuit includes a regulator circuit and a short-circuit protection circuit. The regulator circuit includes a first transistor and a first amplifier. The first amplifier outputs a gate voltage to a gate of the first transistor in response to a reference potential and a feedback potential such that the feedback potential coincides with the reference potential. The feedback potential is a fed back potential from the first transistor. The short-circuit protection circuit includes a second transistor, a first resistance, a second resistance and a second amplifier. The gate voltage is supplied to a gate of the second transistor. The first resistance connects a first terminal of the second transistor with a ground. The second resistance connects a second terminal of the second transistor with a power source. The second amplifier outputs a control voltage to the first amplifier in response to a bias potential and a potential of the first terminal to control the gate voltage.

1. Field of the Invention
The present invention relates to a voltage regulator circuit having a short-circuit protection circuit. More particularly, the present invention relates to a voltage regulator circuit having a short-circuit protection circuit which can limit an output current.
2. Description of the Related Art
A voltage regulator circuit which outputs a predetermined current at a predetermined voltage in response to an input voltage is widely used in electronic devices.
The voltage regulator circuit is the circuit which converts an output current of a driver into a voltage, feeds the voltage back to a differential amplifier, compares the feedback voltage with a reference voltage, and adjusts a drive voltage of the driver based on a comparison result, and then outputs a predetermined current at a predetermined voltage from an output terminal.
In such a voltage regulator circuit, if any reason (for example, solder bridge) causes the short-circuit between the output terminal of the driver and a ground, the feedback voltage becomes 0V. In this case, the differential amplifier continues the action to increase the drive voltage of the driver. If the differential amplifier continues this action, there may be a case that the circuit is broken by Joule heat generation.
For this reason, typically, the voltage regulator circuit has a short-circuit protection circuit for stopping the operation of the differential amplifier if a trouble such as an earth fault of the output terminal or the like occurs. Here, the earth fault of the output terminal is the short-circuit to the ground.
In conjunction with the voltage regulator circuit having the short-circuit protection circuit, a conventional technique of a regulator is disclosed in Japanese Laid Open Patent Application JP 2003-173211A.
FIG. 1 is a circuit diagram showing the configuration of the voltage regulator circuit having the short-circuit protection circuit according to the conventional technique. This voltage regulator circuit 101 includes a regulator circuit 102 and a short-circuit protection circuit 103. The regulator circuit 102 includes a reference voltage source 111, an amplifier 112, a MOS transistor 113, a resistance 114 and a resistance 115. The short-circuit protection circuit 103 includes an amplifier 122, a MOS transistor 123 and a resistance 124.
This voltage regulator circuit 101 divides the output voltage from the MOS transistor 113 and feeds a divided voltage Vb back to the amplifier 112. The amplifier 112 controls a gate voltage of the MOS transistor 113 such that a reference voltage VREF supplied from the reference voltage source 111 coincides with the feedback voltage Vb.
The output voltage VIN from the amplifier 112 is supplied to both of the MOS transistor 113 and the MOS transistor 123 as a gate voltage Vg.
A current value IL based on the output current of the MOS transistor 123 is voltage-converted into a voltage Va based on the resistance 124 and supplied to the amplifier 122. Also, the feedback voltage Vb that is fed through a voltage division resistor 114 to the amplifier 112 is also supplied to the amplifier 122. In the voltage regulator circuit 101 having the above-mentioned configuration, an output current IOUT of the MOS transistor 113 when the short-circuit protection circuit 102 is operated is represented by an equation (1). Incidentally, in the equation (1), μ indicates an electron mobility in the MOS transistors 113, 123. COX indicates a fixed capacity of the gate insulating films in the MOS transistors 113, 123. W1 and L1 indicate a channel width and a channel length of the MOS transistors 113. W2 and L2 indicate a channel width and a channel length of the MOS transistors 123. Ra1 indicates a resistance value of the resistance 124.
[Equation (1)]
                                                                        I                OUT                            =                                                                    W                    1                                                        L                    1                                                  ·                k                ·                                                                            V                      b                                        ·                                          L                      2                                                                                R                      a1                                        ·                                          W                      2                                        ·                    k                                                                                k              =                              μ                ·                                  C                                      0                                        X                                                  ·                                  1                  2                                                                                (        1        )
As can be seen from the equation (1), in the voltage regulator circuit 101 having the above-mentioned configuration, the output current IOUT from the MOS transistor 113 is a function inversely proportional to the resistance value Ra1 of the resistance 124 in the short-circuit protection circuit 103.
In a manufacturing process of a semiconductor device, an absolute value of a circuit element is largely varied. For example, since a variation in a patterning process and a variation in a diffusing process are overlapped, it is difficult to attain the values in a design. The actually produced circuit element contains an error of about ±30%.
In the voltage regulator circuit 101 having the conventional short-circuit protection circuit 103, the output current IOUT from the MOS transistor 113 serving as the driver is represented as the function inversely proportional to the resistance value Ra1 of the resistance 124. It has now been discovered that the variation in the resistance value Ra1 directly corresponds to the variation in the output current IOUT.
FIG. 2 is a graph showing the output property of the voltage regulator circuit having the short-circuit protection circuit according to the conventional technique. Incidentally, a curve "a" in the graph indicates a designed standard value of a short-circuit current, a curve "b" in the graph indicates the minimum condition of the short-circuit current, and a curve "c" in the graph indicates the maximum condition of the short-circuit current.
As illustrated, in the voltage regulator circuit 101 having the short-circuit protection circuit 103 according to the conventional technique, even if the drive currents of the driver are equal, there is a large variation in the values of the output currents IOUT actually outputted from the MOS transistor 113.
In order to remove such variation, the trimming must be performed to the resistance value Ra1 to adjust the resistor value. This causes the problems of the increase in the number of the processes in the manufacturing process of the voltage regulator circuit and the increase in the manufacturing cost.
Incidentally, the invention, which is disclosed in the JP 2003-173211A and is the short-circuit protection circuit having a blocking property, similarly to the above-mentioned case, the variation in the resistance value of the resistance results in the variation in the output current.
In this way, the voltage regulator circuit having the conventional short-circuit protection circuit has a problem that it is difficult to obtain the desirable circuit property because it receives the influence of the manufacture variation in the resistance value of the resistance.

Voltage regulator circuit having short-circuit protection circuit


In a print system comprising a computer and a printer connected directly or indirectly via a network to the computer, the printer stores documents prepared by the computer, has a page/document layout processing section for the stored documents, and can output document data undergoing page/document layout, provided by the page/document layout processing section.

1. Field of the Invention
This invention relates to a print system consisting of a computer such as a personal computer or a workstation and a printer.
2. Description of the Related Art
Japanese Application No. Hei 09-54212 is named as an example of a related art of a print system. In the related art, documents are stored in the print system and an edit function of taking notes, adding check marks, etc., is provided for the stored documents.
However, the print system in the related art does not provide any page/document layout (n up, saddle stitch, dual page print such as a covered binding, etc.,) function for stored documents for the user. Therefore, before storing print data in the print system, the user needs to previously perform page/document layout and create print data with the page/document layout performed. In such a print system, processing of page/document layout, etc., takes time and labor and efficiency of reprinting involves a problem.


A switched-mode power supply comprises a transformer (2) having a primary winding (4) connected to a first pair of direct voltage terminals (8, 10) via a switching transistor (6) and having a secondary winding (22) which powers a load (24) via a diode (26). The switched-mode power supply further comprises a second switching transistor (34) which, together with the secondary winding (22), the load (24) the diode (26) and a second pair of direct voltage terminals (38, 40) is configured as a forward converter to power the load from a comparatively low direct voltage (12 V d.c.) supply.

The invention relates to a switched-mode power supply comprising a transformer having a primary winding connected to a first pair of direct voltage terminals in a primary circuit via a first controllable switching element and having a secondary winding included in a secondary circuit via a unidirectional element and a load to be powered.
A switched-mode power supply of the type defined in the opening paragraph is known from U.S. Pat. No. 4,652,984 and can be used for charging batteries and for powering electrical equipment. Such a power-supply circuit is particularly suitable for an electric shaver having rechargeable batteries, the power-supply circuit supplying the charging current for the batteries and the current for powering the motor of the shaver. Said Patent discloses a flyback-type self-oscillating switched-mode power supply having a transformer. The transformer permits an adaptation between the comparatively low voltage of the rechargeable battery and/or of the shaver motor and the comparatively high rectified mains voltage. The duty cycle of the first controllable switching element, generally a switching transistor, can thus remain within practical limits. It is possible to operate this known switched-mode power supply with a lower input voltage, for example 12 V d.c. or 24 V d.c., instead of the normal mains voltage though, on account of the transformation ratio, the maximum possible charging current for the rechargeable battery is smaller than attainable in the case of a transformation ratio adapted to this end.
In the International Application No. WO 95/01000 this problem is remedied by means of a switched-mode power supply which uses a transformer having two primary windings, each having a separate switching element. The associated primary winding and switching element are put into operation depending on the applied input voltage, i.e. the rectified mains voltage or 12 V direct voltage. This results in an optimum adaptation for the different input voltages. However, a drawback of this solution is that it requires a transformer having two separate primary windings, which complicates the design of the transformer.


A hydraulic braking system includes: a cylinder device including a pressurizing piston, a rear chamber, and a front pressure chamber on opposite sides of the pressurizing piston; a brake cylinder coupled to the front pressure chamber; a regulator including a control piston, an input chamber provided at a rear of the control piston, and an output chamber coupled to the rear chamber in front of the control piston; and an input-hydraulic-pressure control device including a high-flow-rate supply unit configured, when an operation of the regulator is started, to supply the working fluid to the input chamber at a set flow rate; and a low-flow-rate supply unit configured, when the supply is finished, to supply the working fluid to the input chamber at a flow rate less than the set flow rate.

Patent document 1 discloses a hydraulic braking system including: (i) a cylinder device including (a) a housing, (b) a pressurizing piston fluid-tightly and slidably fitted in the housing, (c) a front pressure chamber provided in front of the pressurizing piston, and (d) a rear chamber provided at a rear of the pressurizing piston; and (ii) a brake cylinder, coupled to the front pressure chamber, for a hydraulic brake for restraining rotation of a wheel.
When the pressurizing piston is located at its back end position in this cylinder device, the front pressure chamber communicates with the reservoir. Brake fluid is supplied to the rear chamber to advance the pressurizing piston, causing the front pressure chamber to be disconnected from the reservoir to produce hydraulic pressure. This hydraulic pressure is supplied to the brake cylinder to activate the hydraulic brake.


A method of glass edge coating includes supplying a coating material to a jetting dispenser. Droplets are jetted from a nozzle of the jetting dispenser. Beads of coating material are deposited on a perimeter edge of the glass article by arranging for the droplets to drop on the perimeter edge after falling through a standoff distance between the nozzle and the perimeter edge, whereafter each bead flows in a plurality of directions on the perimeter edge, thereby forming a coating on the perimeter edge. During the jetting, a relative motion is effected between the nozzle and the perimeter edge such that the beads are deposited at a plurality of locations along the perimeter edge.

U.S. Pat. No. 6,120,908 issued to Papanu et al. ("the '908 patent") describes a method of strengthening or restoring strength to flat glass that has been weakened by surface flaws, such as when the glass is cut by scoring and breaking, by coating the glass edges with a strengthening composition. The '908 patent discloses that particularly useful strengthening compositions are aqueous solutions containing silane-based compositions, especially polymerized cross-linked siloxane. The '908 patent further discloses that the strengthening compositions can be applied by spraying, dripping, dipping, painting, or any other techniques suited to the application of liquids, vapors, or aerosols, with painting or brushing being preferred.
U.S. Patent Application Publication No. 2012/040146 describes preserving the high bend strength of a thin glass substrate by coating the edges of the glass substrate with a polymeric material with coating thickness in a range from 5 μm to about 50 μm using methods such as dipping, painting, spraying, dispensing from a die, or the like.
U.S. Patent Application Publication No. 2010/0285260 to Bookbinder et al. describes a method of strengthening glass edges by over-molding the glass edges with a polymer using processes such as injection molding.
U.S. Patent Application Publication No. 2010/0285277 to Edwards et al. describes a method of strengthening glass edges by bonding a metallic material to the glass edges.
U.S. Patent Application Publication No. 2010/0221501 to Chen et al. describes a method of strengthening glass edges by bonding a shaped fiber to the glass edges.


A reusable business envelope having an initial mailing modality where it is initially used and a return mailing modality where it is again used. The envelope includes a front panel, a pair of side panels, a rear panel, a first detachable strip, a return flap, and a second detachable strip. The pair of side flaps and the rear panel are foldably mounted to the front panel. The first detachable strip is detachably mounted to the rear panel. The return flap is foldably mounted to the front panel. The second detachable strip is detachably mounted to the return flap. The second detachable strip is folded downwardly onto the outer surface of the first detachable strip and is adhered thereto by adhesive on the inner surface of the second detachable strip when the reusable business envelope is in its initial mailing modality, with the reusable business envelope achieving its return mailing modality by the sideward pulling of one tab of the pair of first pull tabs of the first detachable strip and an adhered tab of the pair of second pull tabs of the second detachable strip as a unit, causing the first detachable strip and the adhered second detachable strip to be removed as a unit by severing the first and second perforation lines and thereby exposing the open top of the receptacle for insertion of another piece of correspondence, with the return flap folded downwardly onto the outer surface of the rear panel, and adhered thereto by the adhesive on the inner surface of the return flap.

1. Field of the Invention
The present invention relates to an envelope. More particularly, the present invention relates to a reusable business envelope.
2. Description of the Prior Art
Numerous innovations for reusable envelopes have been provided in the prior art that will be described. Even though these innovations may be suitable for the specific individual purposes to which they address, however, they differ from the present invention
FOR EXAMPLE, U.S. Pat. No. 4,715,531 to Stewart et al. teaches a remailable envelope that is constructed of a single sheet folded in half having perforations spaced inward from the non-folded edges. A flap fold is spaced inward parallel to the perforation at the perforation at the free edge of the back. Adhesive extends between the centerfold and the flap fold on the inner surface of the detachable lateral portions between the perforations and the lateral edges. Adhesive strips with release sheets are attached to the outer back face inside the perforations. Adhesives strips with release sheets are attached to an inside of the flap on the detachable portion between the perforation and the terminal edge. Adhesive strips with release covers are applied to the outer face of the flap inside the perforations. The envelope is preaddressed on the outer front face and may be preaddressed and stamped as a return envelope on the inner front face. In use the flap is folded down and material is placed inside the envelope. The release strip is peeled from the inside of the flap portion and the flap is folded up and the detachable portions outside the perforation at the terminal edges are pressed together. The envelope is mailed. Upon receipt one tears the envelope at the perforations and removes the peripheral portions. To reuse the envelope, one removes the release sheets on the lateral adhesive strips, reverses the central fold, exposing the new face, and presses the lateral portions together making a remailable envelope.
ANOTHER EXAMPLE, U.S. Pat. No. 4,730,768 to Gendron teaches a remailable envelope which comprises first and second extensions attached to the front and rear panels and first and second closure flaps attached to the first and second extensions. The nominal height of the rear wall is greater than the nominal height of the front wall, however, by selectively folding the envelope panels about the score lines provided for the first and second extensions, and first and second closure flaps, the envelope structure for the remailing can be made smaller than the envelope structure for the first mailing use.
STILL ANOTHER EXAMPLE, U.S. Pat. No. 5,277,362 to Wilson teaches a reusable envelope for the delivery of mail and the return delivery of a response. The reusable envelope includes a single sheet of a selected material with various folds to achieve an envelope similar to a standard envelope. A front panel is defined at a central portion of the sheet. A first wing portion and a back portion are folded and secured to one another. A top flap portion extends from the front panel and may be folded toward the back portion to facilitate sealing the reusable envelope for original delivery. A second wing portion extends from the back portion and is folded and removably secured to a portion of the front panel. An opening is revealed for the withdrawal and placement of selected articles to be delivered upon removal of the second wing portion. A sealing flap is provided for sealing the opening for return delivery of the reusable envelope. Windows may be provided at selected locations along the front panel and second wing portion to facilitate the viewing of send and/or return addresses printed upon the contents within the reusable envelope.
YET ANOTHER EXAMPLE, U.S. Pat. No. 5,328,092 to File teaches a reusable mailer type business form that has an initial mailing configuration addressed to an outgoing addressee and a reply mailing configuration addressed to a reply addressee. The mailer complies with the postal requirement that no part of the outgoing address or postage (including postal service applied bar coding) appear on the mailer in the reply configuration. The mailer includes a front opaque ply with at least one cut-out, and at least one removable strip adjacent an edge, including a perforation line. Postage indicia are visible at the upper right-hand corner of the front ply. A rear opaque ply has a fold line adjacent an edge, and coincident with the perforation line of the front ply. A flap is defined between the fold line and the adjacent edge. At least one insert ply (between the front and rear plies) having outgoing address information visible through the cutout when the mailer is in the initial mailing configuration is provided. Various structures are provided for rendering non-viewable all outgoing addressee postage information when the mailer is converted between the initial and reply configurations. Such structure can be a second removable strip adjacent a different edge than the first removable strip, or a second cutout provided in the front ply for viewing the outgoing postage (on the insert ply).
FINALLY, STILL YET ANOTHER EXAMPLE, U.S. Pat. No. 5,400,957 to Stude teaches a reusable mailing envelope that is constructed from a blank comprising a front panel having an inner surface and an outer surface and a rear panel having an inner surface and an outer surface and being connected to the front panel along a first fold line. A seal flap formation is coupled to one of the panels along a second line spaced from the first fold line and includes a seal flap having adhesive on an inner surface thereof for adhering the seal flap to one of the panels in a first mailing condition. The seal flap formation further includes a first seal flap section having an inner surface and an outer surface and being connected along a third line to the seal flap and a second seal flap section having an inner surface and an outer surface and being connected along a fourth fold line to the first seal flap section and being coupled along the second line to one of the panels. Structure is provided for securing the front and rear panels together along adjacent side edges thereof. Also, reusable structure is provided for allowing the envelope to be reused as a mailing envelope and is coupled to one of the panels. The reusable structure includes at least a part of at least one of the first or second seal flap sections. The reusable structure has the first mailing condition when initially mailed and a second condition wherein at least a portion of one of the seal flap sections of the reusable structure forms a resealing flap which is sealed to at least one surface of the envelope for remailing the reusable envelope. At least one of the first and second seal flap sections having adhesive on and extending at least partially across said inner surface thereof parallel to said third and fourth lines and at least a part of at least one of the seal flap sections being detachable from the envelope.
It is apparent that numerous innovations for reusable envelopes have been provided in the prior art that are adapted to be used. Furthermore, even though these innovations may be suitable for the specific individual purposes to which they address, however, they would not be suitable for the Purposes of the present invention as heretofore described.


A method and apparatus (10) for determining a best focus position of an object (30) relative to a reference position (e.g., axis A) of a dark-field optical imaging system (20), with an effective focusing range up to 10 times of the depth of field of the system. The method includes the steps of first forming a dark-field image of the object at different focus positions (zm). Each dark-field image has a corresponding image intensity distribution with an average intensity and a variance of intensity. The next step is forming a set of contrast values by calculating a contrast value (Cm) for each dark-field image based on the variance and the average intensity. The last step is determining the best focus position by fitting a Lorentzian function to the set of contrast values plotted as a function of the different focus positions and identifying the focus position associated with the maximum contract value (Cmax). The second step includes digitizing each dark-field image such that the image intensity distribution for each the dark-field image is a digitized image intensity distribution comprising discrete gray-scale intensity levels (In) corresponding to a discrete plurality of n pixels, and then arranging each the digitized image intensity distribution into a histogram (H(In)) of an amount of the pixels having a given the gray-scale intensity level (In).

Determining the best focus position ("best focus") is an age-old problem for optical apparatus ranging from photographic cameras, to binoculars, to printing apparatus. Determining best focus is particularly troublesome and time consuming in optical apparatus used to manufacture devices. For example, many applications involve processing substrates where the substrate needs to be located within a depth of focus of the optical apparatus that is on the order of microns, and where best focus needs to be determined to up to a fraction of a micron over numerous exposure fields on a substrate.
For example, in photolithography, features on a mask are imaged onto a photosensitive substrate. Many of the mask features are at the resolution limit of the imaging lens (e.g., 0.7λ/NA, where NA is the numerical aperture of the imaging lens). These features will only print over a depth of focus of approximately ±λ/NA2, which is typically only several microns or less. Specific features on the wafer are often used to determine best focus. Sometimes this process involves the time-consuming method of exposing fields on a single substrate at different focus settings, developing the wafer, and then evaluating the sharpness of the printed features.
In laser thermal processing (LTP), high-irradiance radiation (light) is imaged onto individual fields on a highly reflective substrate to be processed. The substrate needs to be within the imaging lens depth of focus of the LTP apparatus, which is generally on the order of tens of microns (e.g., 15 microns).
There are many known methods for determining best focus. Many of the known methods include the steps of forming a bright-field image of a feature at a particular focus position {say, at a point zm along z} and calculating a maximum intensity value Imax and a minimum intensity value Imin. The next step is calculating a contrast function F=(Imax−Imin)/(Imax+Imin). This process is repeated for different focus positions {z1, z2, z3, . . . } surrounding what is thought to be best focus. A maximum value of F versus z is then determined by fitting a curve to the F versus z data points. The value of z that provides the maximum value of F (Fmax) from this curve fit is taken as the best focus position.
Other techniques include comparing the modulation of two objects at different focus positions and determining how to shift focus so that their modulation is equal (e.g., U.S. Pat. No. 4,549,084), a method that compares the image of a second object as formed by a projection optical imaging system at a predetermined plane to a first object (e.g., U.S. Pat. No. 4,952,970), and a method that involves calculating correlation values between images of an object to a pre-stored reference pattern (e.g., U.S. Pat. No. 5,369,430).
However, the need to determine best focus has recently evolved from photolithographic applications, where a predetermined pattern on the substrate is imaged at various focus positions and analyzed, to LTP applications, where a reflective substrate which may not have a pre-determined pattern to be imaged, needs to be placed at best focus quickly and accurately. Unfortunately, highly reflective substrates are difficult to focus using known techniques, because it is difficult to form an image of an object located on a reflective substrate due to the large amount of reflected light.
In addition, best-focus techniques presently applicable to photolithography have several limitations, including being limited to imaging certain patterns having a size at or near the resolution limit of the imaging lens. Further, the methods are not suited for all imaging situations. One such situation is where focus is preferably determined without having to remove the substrate from the imaging field, or where the object (e.g., an alignment mark) is imaged to determine best focus is present on the wafer but the substrate is highly reflective, so that bright-field imaging is not effective. Also, present techniques tend to be time consuming, which limits the ability to process devices or substrates in a timely manner (i.e., limits through-put), and is not generally accurate enough for the most demanding focus situations.

Method and apparatus for determining best focus using dark-field imaging


Disclosed are systems, methods, and non-transitory computer-readable media for a hybrid physical layer that supports data communications using both Ethernet and ASA. Ethernet and ASA are communication standards that are commonly used in automotive environments; however, are not interoperable. The hybrid physical layer supports data communications using both Ethernet and ASA. For example, the hybrid physical layer may be configured into either a first mode of operation to support data communications using Ethernet or a second mode of operation to support data communications using ASA. Devices utilizing the hybrid physical layer can therefore be used with other components that utilize either communication standard.

High-speed data communication systems over physical copper wire has found increasingly more applications in automotive environments. Currently, there are several organizations that define standard specifications for such communication systems. For example, IEEE Ethernet 802.3ch and Automotive Serdes Alliance (ASA) are standards that are commonly used in automotive environments to provide a means for interoperability of the compliant systems from various vendors. Systems that are built based on different standards, however, are not necessarily interoperable. As a result, the applications of systems and components using the different standards is limited. Accordingly, improvements are needed.

Hybrid physical layer for Ethernet and automotive serdes alliance (ASA) communications


A plug for sealing holes includes a body and at least three sealing ribs. The body is preferably hollow to save material and molding cycle time. A thickened area is formed at a rear of the body such that a screw driver may be used to insert the plug into a hole. The first sealing rib is formed at substantially a front of the body such that a lead-in area is formed on the body to facilitate easy insertion of the plug into a hole. The distance between each sealing rib is at least twice the greatest thickness of a single sealing rib.

1. Field of the Invention
The present invention relates generally to plugs and more specifically to a single plug which may be used to seal more than one size of hole.
2. Discussion of the Prior Art
Currently, there are numerous plugs available for sealing openings. There are at least two patents which disclose plugs that could be used for sealing a hole drilled in a building for spraying an insecticide. English Patent No. 914,647 to Hunt discloses a plug for sealing a bore-hole. U.S. Pat. No. 5,327,942 to Black discloses a sealing plug for apertures.
Accordingly, there is a clearly felt need in the art for a a single size of plug which may be used to seal more than one size of hole, has multiple sealing ridges, has a lead-in area in a front, and a thickened area at a rear.
The present invention provides a plug for sealing more than one size of hole which has numerous advantages over prior art plugs. The plug for sealing holes includes a body and at least three sealing ribs. The body is preferably hollow to save material and molding cycle time. A thickened area is formed at a rear of the body such that a screw driver may be used to insert the plug into a hole. The first sealing rib is formed at substantially a front of the body such that a lead-in area is formed on the body to facilitate easy insertion of the plug into a hole. The distance between each sealing rib is at least as thick as the greatest thickness of each sealing rib. The plug for sealing holes is preferably fabricated from a polyethylene plastic or other suitable material. The plug for sealing holes is rigid enough to seal a hole while being flexible enough to accommodate a variation in hole size of at least 20%.
Accordingly, it is an object of the present invention to provide a plug for sealing holes which may be used to seal more than one size of hole.
It is a further object of the present invention to provide a plug for sealing holes which may has a lead-in area for easy insertion into a hole.
Finally, it is another object of the present invention to provide a plug for sealing holes which may be inserted into a hole utilizing a blade end of a screw driver.
These and additional objects, advantages, features and benefits of the present invention will become apparent from the following specification.

Plug for sealing more than one size of hole


Technologies are provided for acquisition of an item or service based on a directed content campaign. Embodiments include a computing system that can detect selection of directed content presented at a user device. The directed content identifies a mobile application and an action that results in the item being granted. After installation of the mobile application, the computing system can receive a device identifier of the user device in response to execution of the mobile application. The computing system can then generate data identifying events within the mobile application. The computing system can determine, using the user activity data, that a particular one of those events corresponds to the action, and can then generate a message that identifies the action and the item or service. The message also includes address data for a user interface to obtain the item or service. The computing system can then cause the user device to present the message.

Promotional campaigns typically offer an item in exchange for subscribing to a service or acquiring a product. For example, a streaming service platform can offer a device to access streaming content in exchange for subscribing to a streaming service provided by the streaming platform. Such an exchange can be offered in an advertisement campaign. Some potential consumers can receive an impression of the advertisement campaign and, as a result, can subscribe to the streaming service. The device offered in the advertisement campaign can be provided to those potential consumers. Other potential consumers may subscribe to the streaming service without having received an impression of the advertisement campaign. Notwithstanding, those other potential consumers may also receive the offered device because commonplace technologies may not distinguish those other potential customers from those who received an impression with the offer.
Therefore, improved technologies for granting an item or service based on a directed content campaign may be desired.

Acquisition of an item or service based on a directed content campaign


A non-volatile memory array including a plurality of memory units is provided. Each memory unit is serially connected with a select transistor and a memory cell. A source region is next to the select transistor while a drain region is next to the memory cell. The drain lines are arranged in parallel in column direction and connected with the drain regions of the memory units in one column. The bit lines are arranged in parallel in row direction and connected with the source regions of the memory units in one row. The word lines are arranged in parallel in column direction and connected with the select gates of the memory units in one column. The control lines are arranged in parallel in column direction and connected with the control gates of the memory units in one column. The control lines are grouped by two and electrically connected with each other.

1. Field of the Invention
The present invention relates to a semiconductor device. More particularly, the present invention relates to a non-volatile memory array.
2. Description of Related Art
Electrically erasable programmable read only memory (EEPROM) is one type of non-volatile memory that allows multiple data writing, reading and erasing operations. Furthermore, the stored data will be retained even after power to the device is removed. With these advantages, EEPROM has been broadly applied in personal computer and electronic equipment.
A conventional EEPROM has a floating gate and a control gate, which are manufactured by doped polysilicon. Such non-volatile memory is having a double layer gate which is hard to integrate with general CMOS Logic Process. Furthermore, the fabricating cost of the whole embedded non-volatile memory increases due to the double layer gate which is unfavorable in competition at an advantageous position.
In addition, when programming the memory, the electrons are injected into the floating gate and uniformly distributed in the whole polysilicon floating gate layer. However, if the tunneling oxide layer under the polysilicon floating gate layer has defects, it can easily cause a leakage current of the device, affecting the reliability of the device.
In order to solve the problem of the leakage current of the EEPROM device, a charge trapping material is adopted to replace the polysilicon. Such charge trapping material is silicon nitride, for example. Since the silicon nitride has capable of trapping electrons, the electrons injected into the silicon nitride layer just concentrate in local region, it is not so sensitive to the defects of the tunneling oxide layer, and thus lessening the leakage current of the device. The silicon nitride layer usually has a silicon oxide layer on its top surface and bottom surface respectively, thus forming an oxide-nitride-oxide (ONO) composite layer.
On the other hand, in order to prevent the problem of data error due to over-erase/write phenomenon when the typical EEPROM erases/writes, a select transistor serially connected at one side of the memory cells to form the two transistors (2T) structure. The programming and reading of the memory cells can be controlled by the select transistor.
A memory unit of the aforementioned 2T structure is serially connected by a select transistor and a memory cell. A bit line is connected next to the memory cell and a source line is connected next to the select transistor. While operating the non-volatile memory array having the 2T structure, the unselected memory unit connected with the selected bit line of the selected memory unit might have the situation of program disturb or erase disturb which cause the memory unit to be mistakenly written or erased. For example, when performing programming operation by channel hot carrier injection, a high voltage is applied to the bit line of the selected memory unit because the bit lines in the same row are connected together; namely, all memory units in the same row effect by the program disturb. When performing erasing operation by Fowler-Nordheim (FN) tunneling effect, a high voltage is applied to the bit line of the selected memory unit because the bit lines in the same row are connected together. One high voltage is cross between the control line and the bit line and cause all memory units to generate the soft erasure and to lower the reliability of the memory unit.


The invention provides a CMOS integrated circuit capable of carrying out an operation at a comparatively high supply voltage, comprising a first MOS type transistor having a drain profile to come in contact with a gate through a low concentration region having an impurity concentration which is equal to or lower than a predetermined concentration at a drain end, and a second MOS type transistor and transfer gate having the same polarity which is connected to a gate of the first MOS type transistor, wherein a gate voltage is applied to the gate of the first MOS type transistor through the second MOS type transistor and transfer gate to which a predetermined potential (a shielding voltage) is applied.

1. Field of the Invention
The present invention relates to a semiconductor integrated circuit device and a manufacturing method thereof, and more particularly to a semiconductor integrated circuit device for constituting a CMOS logic circuit capable of driving a high voltage without an additional thick oxide film step in a CMOS unit manufacturing process by using a transistor of a low voltage type.
2. Description of the Related Art
The microfabrication of a semiconductor integrated circuit device using a CMOS transistor has been advanced and the degree of integration has been increased more and more. With the microfabrication, the supply voltage of the semiconductor integrated circuit device is dropped in accordance with the scaling rule. For example, in a 0.18 μm process, the standard working voltage of a standard MOS transistor is standard 1.8V, and a MOS transistor having a gate oxide film thickness of approximately 4 nm is used. Most of units to be used in the semiconductor integrated circuit device in the 0.18 μm process are semiconductor devices using a circuit utilizing a MOS transistor having a 1.8V specification and having the degree of integration increased. In a whole system, a semiconductor integrated circuit device having a 3.3V specification created in a former process is mixed or the driving voltage of a motor or an LCD cannot be dropped in some components. In a connection to the components, a breakdown voltage cannot be obtained in the transistor having the 1.8V specification. For this reason, it is necessary to further prepare, as a separate process, a MOS transistor having a high voltage specification for driving a high voltage.
The following needs the care. In the case in which a voltage system transistor of a new type is to be introduced, it is necessary to introduce a transistor having a film thickness corresponding to the voltage system. For example, in the 0.18 μm process, there is provided a transistor having a 3.3V specification in the thickness of the gate oxide film of approximately 8 nm which drives 3.3 V of the semiconductor integrated circuit device (0.35 μm process) created in the former process described above. The 8 nm gate oxide film is generally formed by a method referred to as a double oxidation and the whole Si surface of a portion in which the transistor is formed is once oxidized at a gate oxide film forming step to form an oxide film having a certain thickness, and only the oxide film in the portion in which a transistor having a 1.8 V specification is formed is etched, and thereafter, the whole surface is further oxidized, which will not be described in detail. Therefore, the oxide film of the transistor having the 3.3 V specification is formed by the oxidation carried out twice which puts an etching step therebetween. In the case in which a high voltage transistor of another type is further required, a triple gate oxide film is formed.
There is the following problem. More specifically, the double and triple gate oxide films have variations in thicknesses increased. In addition, in a transistor having a kind of thinnest oxide film, the etching step is carried out so that an increase in a diffusion length is caused by a variation in a channel concentration and an impurity diffusion due to a heating step of forming an oxide film and it is hard to form and control a transistor having a very small dimension.
In other words, it is difficult to carelessly increase the type of a transistor having a working voltage corresponding to a voltage to be used. Due to this restriction, a voltage which can be used in the semiconductor integrated circuit device is limited. For such a problem, there has been proposed a semiconductor integrated circuit device using a CMOS transistor handling a signal having a higher supply voltage by utilizing a transistor of a low voltage type (for example, see U.S. Pat. No. 5,465,054 and Japanese Patent No. 3190915).
FIG. 8 shows a semiconductor integrated circuit device using a CMOS transistor handling a signal having a higher supply voltage by utilizing a transistor of a low voltage type. An input signal IN is given to the gate of an N-type transistor M102 connected to GND through an N-type transistor and transfer gate M101 having a gate to which a shielding voltage VSHLD is applied, while the input signal IN is given to the gate of a P-type transistor M104 connected to a power supply VDD through a P-type transistor and transfer gate M103 having a gate to which the shielding voltage VSHLD is applied, and the drains of the N- and P-type transistors M102 and M104 are connected to an output terminal OUT through transfer gates M105 and M106 having gates to which the shielding voltage VSHLD is applied, respectively.
The composite unit logically serves as a CMOS inverter and has an allowable voltage which is approximately a double of that of each unit.
(1) Referring to the Breakdown Voltage of a Gate Oxide Film
In case of the N-type transistor M102 to be the main component of a CMOS inverter, a voltage which is equal to or higher than a voltage of the shielding voltage VSHLD−threshold voltage Vtn which is the gate voltage of the N-type transistor and transfer gate M101 connected to a gate thereof is not applied, and a voltage which is equal to or higher than the former voltage (the shielding voltage VSHLD−threshold voltage Vtn) is not applied even if a supply voltage VDD having a logical level in a circuit with a VDD system power supply is applied. When the shielding voltage VSHLD is set to be approximately VDD/2, moreover, only a voltage which is equal to or lower than the breakdown voltage of the N-type transistor is applied to the gate of the N-type transistor M102 even if a double of the breakdown voltage is applied as the supply voltage VDD. Referring to the N-type transistor and transfer gate M101, furthermore, a voltage of VDD/2 is applied to the gate itself. Even if a signal having an amplitude on supply voltage VDD and GND levels is input to the input terminal IN, therefore, only a half of the supply voltage is applied as a stress to a gate oxide film. Referring to the P-type transistors M104 and M103, similarly, only a half of the supply voltage is applied as the stress. Also in a general system having a supply voltage which is a double of a breakdown voltage, therefore, a composite unit having such a structure can satisfy the breakdown voltage of the gate oxide film and a deterioration in the reliability of the gate oxide film can be avoided.
In addition, the argument about the breakdown voltage of the gate oxide film applies to all transistors including the drain voltage limiting transistors M105 and M106.
(2) A Drain-Source Breakdown Voltage (a Channel Breakdown Voltage)
The N-type transistor M102 to be the main component of the CMOS inverter has a source connected to the GND and a drain connected to the output terminal OUT for outputting a voltage of the supply voltage VDD-GND through the N-type transfer gate transistor M105 having the gate to which the shielding voltage VSHLD is input. The drain voltage of the N-type transistor M102 has an upper limit voltage which is limited by the N-type transfer gate M105 and is lower than the shielding voltage VSHLD-threshold voltage Vtn, and the shielding voltage VSHLD is a half of the supply voltage VDD. For this reason, a voltage to be applied to the drain of the N-type transistor M102 can be prevented from exceeding the half of the supply voltage VDD. Even if a double of the N-type transistor breakdown voltage is applied as the supply voltage VDD in the same manner as in the argument, therefore, only a voltage which is equal to or lower than the breakdown voltage is applied as the drain-source voltage of the N-type transistor M102. Referring to other N-type transistors (the two N-type transfer gates M101 and M105), consequently, it is possible to maintain the drain-source voltage to be equal to or lower than the breakdown voltage by properly holding the transition speed of the input signal IN and the size of a device. Furthermore, this applies to the P-type transistors M104, M103 and M106.
Although it is possible to drive a high voltage by using a transistor of a low voltage type in the technique as described above, there are the following problems.
(1) A transfer gate transistor for an increase in a voltage is added to a current path for driving an output and they are connected in series. For this reason, an extra transistor arrangement is required. Consequently, the size of a driver is increased by double causes.
(2) When the supply voltage VDD is set to be equal to or higher than a double of the breakdown voltage of each unit, a voltage to be applied to each unit is equal to or higher than the breakdown voltage. With the conventional structure, therefore, the supply voltage VDD cannot be increased to be a double of the breakdown voltage of the unit or more.


A handheld wireless communication device includes features that make it easier to differentiate among various keys and to correctly select a desired key. It also includes features that make the device more comfortable to use. In particular, corner keys have decreasing height profiles to make above-adjacent keys easier to reach and distinguish. Additionally, lowermost, outermost portions of the corner keys may be somewhat truncated. Flanking keys in a navigation row slant toward and are flush with peripheral edges of a navigation tool assembly and have outer edges that are higher than inner edges of adjacent outer keys. The outer edges of the flanking keys may be hump-shaped or crowned. The longitudinally central portion of the device is narrower than the ends of the device, and the corners of the device are contoured to enhance comfort in a user's hand. Soft-touch materials are employed in hand-contacting portions of the device.

With the proliferation of wireless communication systems, compatible handheld communication devices are becoming more prevalent, as well as advanced. Whereas in the past such handheld communication devices were typically limited to either voice transmission (cell phones) or text transmission (pagers and PDAs), today's consumer often demands a multifunctional device capable of performing both types of transmissions, including even sending and receiving e-mail. Furthermore, these higher-performance devices can also be capable of sending and receiving other types of data including that which allows the viewing and use of Internet websites. These higher level functionalities necessarily require greater user interaction with the devices through included user interfaces (UIs) which may have originally been designed to accommodate making and receiving telephone calls and sending messages over a related Short Messaging Service (SMS). As might be expected, suppliers of such mobile communication devices and the related service providers are anxious to meet these customer requirements, but the demands of these more advanced functionalities have in many circumstances rendered the traditional user interfaces unsatisfactory, a situation that has caused designers to have to improve the UIs through which users input information and control these sophisticated operations.
Keyboards are used on many handheld devices, including telephones and mobile communication devices. The size of keyboards has been reduced over the years, as newer, smaller devices have become popular. Cell phones, for example, are now sized to fit in one's pocket or the palm of the hand. As the size of the devices has decreased, the more important it has become to utilize the entire keyboard surface as efficiently as possible.
Many keyboards on mobile devices have an input device for navigation through the graphical user interface. These interfaces include such devices as trackballs and rotating wheels which can be used to effect movement of a cursor or pointer, or to scroll up, down and about a displayed page. These navigation devices often occupy a relatively large amount of space on the incorporating mobile device. Because the navigation device is frequently used and often requires fine control, a lower end size limitation will normally be observed by device designers. To accommodate such larger, more convenient navigation devices on the housing of the mobile device, the amount of space that is available for the keys of the keyboard is correspondingly reduced if the keyboard and navigational device are proximately located to one another.
Another keyboard spacing problem is that of finger overlap and key differentiation when keys are smaller than the user's finger and are spaced closely together—a situation that arises particularly if a full keyboard (as opposed to a reduced-format keyboard) arrangement is implemented. Furthermore, as handheld wireless communication devices become used more and more frequently by a given user, and as they become smaller, comfort within the user's hand becomes a bigger concern. The present disclosure provides solutions to these concerns.

Outwardly decreasing height keys for a handheld electronic device keyboard


A hydraulic ski binding comprises a hydraulic fluid-containing cylinder divided into two spaced-apart chambers by a piston attached to a piston rod, the piston and cylinder being slidable relative to each other, and either the cylinder or piston rod being associated with ski boot attachment structure to connect a ski boot to a ski. The attachment structure is biased by a spring into its ski boot attachment mode. Shock-absorbing structure is provided comprising ducts connecting the chambers, one including a check valve, another a choke, and a further a shut-off valve. Battery-powered electronic circuitry is provided which includes transducers, the circuitry opening the shut-off valve by activating an electromagnet associated therewith when a predetermined force acting on the binding is detected by the transducers. When the shut-off valve is thus opened, the shock-absorbing structure provided by the choke is, in effect, deactivated, allowing the spring to control release of the ski boot directly.

Safety ski bindings of the foregoing type are, for instance, described in German Patent 3,307,003 A1 in which when the ski boot is not inserted into the binding, a choke included therewith is positioned in a mode in which its cross-section is at a maximum. When the ski boot is placed in the binding, however, the electronic circuitry is activated and a blocking member, actuated by an electromagnet, causes a reduction of the choke's cross-section. In its latter condition, the cross-section constitutes a reference control value.
The release spring of such a binding is designed so that it opposes the release forces acting on the sole holder of the binding with the minimum resistance required for skiing, the cross-sections of the ducts associated with the bindings being suitably dimensioned to ensure the attainment of a small shock-absorbing effect independent of the choke. Additional forces transmitted by the ski boot to the sole holder or to the ski, that is forces which do not directly act on the sole holder with a releasing effect, are detected by sensors and lead to an increase in the passage cross-section, and thus to a reduction of the choke's resistance to the flow of hydraulic fluid therethrough. In this way there is a regulation or automatic control of the overall resistance to binding release which is dependent on the loads being experienced by the bindings.
If as a consequence of some failure, the electromagnet is not supplied with the appropriate electric current, a return spring presses the blocking member back so that the maximum passage cross-section is reset to a value greater than the reference control value. This condition is even more hazardous for well-trained, expert skiers, however, since unintended releases may result, with the consequence that non-typical accidents and resultant injuries can occur to the skier.
If on the contrary there is a malfunction of the electronic circuitry such that there is no necessary decrease in current to the electromagnet to accommodate a load, no desired reduction of the damping resistance of the choke occurs, and the skier may experience an overloading of his or her leg and thus suffer a typical skiing injury.
With reference to the general state of the art concerning safety ski bindings with hydraulic components, reference may also be had to the Austrian Patent 373,159 as one of a series of publications.

Hydraulic ski binding incorporating electronically-controlled bypass


The present invention relates to a separation matrix comprised of ligands coupled to the surfaces of a porous support, such as one or more porous particles, wherein the ligands provide at least one chemical gradient within the support. In the most advantageous embodiment, the chemical gradient is a ligand density gradient. The invention also relates to a method of providing a separation matrix comprising ligands coupled to the surfaces of a porous support, in which method at least one ligand density gradient is provided by solvent-controlled diffusion of at least one reagent into the porous support.

Biotechnological methods are used to an increasing extent in the production of proteins, peptides, nucleic acids and other biological compounds, for research purposes as well as in order to prepare novel kinds of drugs. Due to its versatility and sensitivity to the compounds, chromatography is often the preferred purification method in this context. The term chromatography embraces a family of closely related separation methods, which are all based on the principle that two mutually immiscible phases are brought into contact. More specifically, the target compound is introduced into a mobile phase, which is contacted with a stationary phase. The target compound will then undergo a series of interactions between the stationary and mobile phases as it is being carried through the system by the mobile phase. The interactions exploit differences in the physical or chemical properties of the components in the sample.
In liquid chromatography, the target compound is present in a liquid together with one or more contaminants or undesired substances. Said liquid is contacted with a stationary phase, known as a matrix, which is commonly comprised of either a collection of homogenous, porous or non-porous particles or a monolith of organic or inorganic origin. The properties of the separation matrix will in large decide the efficiency obtained when used in a separation process, such as chromatography. Usually, a separation matrix is comprised of a support to which groups capable of interaction with the target and known as ligands have been coupled. Thus, the ligands will impart to the supports the ability to effect the separation, identification, and/or purification of molecules of interest. In the prior art, a number of different techniques for controlling the density of ligands on a support have been suggested, which techniques generally fall into one of the following four categories:    a) Manipulation of reaction conditions which activate the matrix, i.e. which introduce a reactive group which can couple the ligand. This often involves varying the concentration of activating reagents, reaction time, reaction temperature, pH, or combinations of these variables. Thus, the efficiency of the reaction, i.e. the extent of desired reaction as opposed to competing side reactions, will be strongly influenced by reaction conditions.    b) Manipulation of reaction conditions during the actual coupling of the ligand to the support. This may involve varying the concentration and/or the total amount of ligand the support is challenged with, ionic strength of the coupling buffer, and type of salt in the coupling buffer as well as the variables of time, temperature, pH, etc., mentioned above. Similarly to the technology described above, due to the strong influence of the reaction conditions, this method may also prove difficult to apply in a practical and reproducible manner.    c) Manipulation of the amount of reactive or activatable groups incorporated into the support by varying composition at the time of its formation. For a polymeric support, this would include varying the nature and/or amount of monomer during the polymerisation. Obviously, one should subsequently apply the techniques of a and/or b above in a second step to couple the ligand.    d) For polymeric ligands, manipulation of the amount of ligand incorporated into the polymer by preparation of a polymerisable ligand monomer and varying the concentration of this monomer in the monomer feed during polymerisation. A drawback with this technology is that many ligands useful for chromatographic separations contain functional groups which are incompatible with the conditions necessary for formation of the desired polymer, such as by being unstable under the contemplated polymerisation conditions or by interfering with the polymerisation reaction.
A different method of controlling the density of ligands on a support was suggested in U.S. Pat. No. 5,561,097 (Gleason et al.), which relates to a method of providing an optimised ligand density on a polymeric support, which method is stated to be obtained in a practical and reproducible manner. This can be achieved by a method comprising a step of reacting ligand and a quencher molecule with activated sites on an azlactone functional support under conditions that promote competition of ligand with quencher for the activated sites. One advantage presented is that the method is a single step procedure, without any need of a separate step to activate or deactivate reaction sites on the support. The method disclosed is stated to be especially advantageous for the coupling of small molecules. A disadvantage of this method is that in order not to favour ligand over quencher, an understanding of the reaction kinetics for ligand and reaction kinetics for quencher will be required, including the rate constant for coupling, the concentration of ligand, the nucleophilicity of ligand and quencher, etc.
Further, in biotechnological preparation of target molecules such as proteins, it is well known that to enable an efficient purification thereof, a series of two or more process steps utilising different kinds of separation matrices is often required. U.S. Pat. No. 6,426,315 (Bergström et al.) suggests to replace such a series of steps by using a multifunctional porous separation matrix, i.e. to present the different kind of matrices on a single separation matrix. More specifically, U.S. Pat. No. 6,426,315 relates to a process for preparing such multifunctional porous separation matrices by introducing different functionalities in different layers of the matrix. In brief, the process includes contacting a separation matrix that comprises reactive groups with a reagent, the amount of which is not sufficient for reaction with all groups present in the matrix, and wherein the reaction between the reagent and said reactive groups is rapid compared to the mass transport of the reagent within the matrix. The reactive groups may e.g. be hydroxyl groups, double bonds etc, while the reagent may be a compound that introduces a desired functionality within the matrix, directly or indirectly. In the last mentioned case, the reagent is a compound known as an activating agent, such as a halogenating agent, and the desired functionality is then introduced in a subsequent step. The most preferred functionalities are groups that provide desired separation characteristics to the matrix, commonly known as ligands. Alternatively, the functionalities introduced are the degree of crosslinking, the density or the porosity of the matrix. In order to provide further layers, the reactive groups may be further reacted with another reagent. Thus, the method according to U.S. Pat. No. 6,426,315 may exhibit the drawbacks discussed above under a) and b). In addition, even though the teachings of U.S. Pat. No. 6,426,315 enable the construction of a separation matrix which exhibits a multitude of functions, each one of which will provide different properties as regards binding and diffusion in a separation process, there is no guidance in U.S. Pat. No. 6,426,315 with regard to how to manufacture a separation matrix to that provides an optimal mass transport within the matrix. Thus, there is still a need in this field of alternative methods of producing separation matrices with improved such properties.
In U.S. Pat. No. 5,945,520 (Burton et al.), it is stated that a problem with the known kind of multi or mixed mode chromatography matrices that adsorb a target compound via hydrophobic interactions is that binding efficiencies of less hydrophobic targets will be low unless high salt concentrations are used. To avoid such necessary addition of salt, U.S. Pat. No. 5,945,520 suggests a chromatographic resin, which presents an ionisable ligand comprised of an ionisable functionality and a spacer arm, which attaches said functionality to a solid support matrix. The ionisable functionality is partially electrostatically charged at the pH of adsorption of the target compound to the resin, and is either further charged or of opposite charge at the pH of desorption of the compound from the resin. The ionisable functionalities are selected from a specified group of possible functionalities. In one embodiment, the ionisable functional group is derived from either 2-mercapto-1-methylimidazole or (−)phenylpropanolamine and coupled to a density of at least 150 μmol per milliliter of resin. Such a high ligand density is stated to provide a sufficient hydrophobicity to adsorb target compounds without the need of adding excessive amounts of salt to the liquid. Thus, U.S. Pat. No. 5,945,520 discloses multifunctional ligands evenly coupled to a resin, which consequently can be described as a homogenous separation matrix.
U.S. Pat. No. 6,528,322 (Carlsson et al) relates to an analytical method for qualitative, semi-quantitative or quantitative determination of at least two analytes in an aqueous sample by thin layer chromatography (TLC). More specifically, a method is disclosed wherein analytes, such as isoforms, in an aqueous sample are separated in a flow matrix which permits capillary force assisted fluid flow therethrough, especially a planar flow matrix such as a chromatographic membrane. The gist of the invention is stated to be that the separated analytes are eluted from the separation area of the flow matrix in a direction substantially transverse to the separation direction to migrate to a capture zone. Optionally, the separation zone may have a different ligand density or a gradient of ligand densities along the separation direction. Thus, such a density gradient would be parallel to the flow during use. Furthermore, in this embodiment, there will be a single gradient within each membrane.
Finally, U.S. Pat. No. 5,977,345 relates to an inside-out spatial installation method for a bifunctional reagent that crosslinks a polymer matrix. More specifically, this reference relates to an activated matrix, which can accommodate and optimize the spatial installation of affinity ligands while preventing the immobilization of excess ligand in the outer strata of the hydrogel bead.
However, there is a need in this field of novel separation matrices, which avoid one or more of the problems associated with the prior art. For practical and economical reasons, there is a need in this field of separation matrices that provides an improved mass transport of target molecules.

Separation matrix having a ligand density gradient


An exemplary embodiment is a method and apparatus for planarization. The planarization tool has a base which provides the support for the planarization tool. The base has a support hinge mounted on it along with dampening posts and rest posts which support a pivot plate hinged to the support hinge. A pressure assembly is mounted to the pivot plate by retention hardware. The pressure assembly loads a device under test board assembly that is mounted to the pressure assembly with the retention hardware.

Semi-conductor components are generally produced in large quantities. To rapidly test large quantities of components, automatic test equipment (generally xe2x80x9ctestersxe2x80x9d) is used. A tester rapidly generates input signals for application to the integrated circuit and can determine whether the appropriate response signals are generated. Because testers are highly automated, they can run through a series of millions of test cases in a few seconds.
To efficiently test integrated circuits, some device is needed to move and quickly connect the device being tested to the tester. To move wafers, a device called a xe2x80x9cprober xe2x80x9dis used. To move packaged parts a device called xe2x80x9ca handlerxe2x80x9d is used. These devices precisely position the component being tested so that it makes electrical contact with outputs of the tester. Probers, handlers, and other devices for positioning a device under test relative to the test head are called xe2x80x9chandling devicesxe2x80x9d.
Semi-conductor test systems are used for testing integrated circuit devices to verify their performance characteristics. For limited volume testing, the integrated circuit device can be placed in a test fixture that is mounted on a device-under-test (DUT) board, or the DUT board can be docked with a semi-conductor wafer prober or package handler for high volume production testing. Conventional testing employs a probe card that is provided with a large number of small tungsten blades or needles that are mechanically and electrically connected to a circuit board and act as test probe contacts. Electrical leads extend from the contacts to the outer edge of the board for connecting the probe card to test circuitry. In use, the blades or needles are moved into engagement with the pads of an integrated circuit. The ends of the test needles or blades must all fall in the same plane in order to assure that each blade or pin makes electrical contact with a pad of the integrated circuit. In order to ensure proper electrical contact, the blades or needles must be adjusted after they have been mounted on the probe card. This adjustment is time consuming and expensive. Even after such adjustment, a loss of adjustment can come about from the pressure of the needles against the chips. As a result, constant maintenance is necessary or the probe cards will not perform their intended function.
A problem arises when the xe2x80x9ctest headxe2x80x9d assembly, currently used on industry testers, docks (comes in contact) with the DUT board assembly. In a wafer test set-up, a test frame is cabled to a movable test head. The movable test head docks with a prober. The prober holds the DUT board assembly and moves product wafers to the probe tips and removes wafers after test. Typical test head assemblies contain electronics and cooling hardware and subsequently are quite heavy (800 to 1200lbs). When the test head assemblies dock with a prober, the hardware which holds the DUT board assembly gets deflected. This deflection causes non-symmetrical distortion of the probe tip plane. The probe mechanism must be adjusted in order to maintain a constant plane between the probe tip plane and the DUT board assembly. In the test head assemblies, once the DUT board assembly is installed into a prober and once a test head has docked, the probe mechanism is very difficult to see, reach and adjust. Because of the time consuming process of adjusting the probe tip plane and the probe mechanism and the difficulty in observing and manipulating the probe mechanism, current systems are inefficient and difficult to use. The non-symmetrical distortion of the probe tip plane and the probe mechanism creates time consuming adjustments. Accordingly, there exists a need for a planarization tool of improved construction.
An exemplary embodiment is a method and apparatus for planarization. The planarization tool has a base which provides the support for the planarization tool. The base has a support hinge mounted on it along with dampening posts and rest posts which support a pivot plate hinged to the support hinge. A pressure assembly is mounted to the pivot plate by retention hardware. The pressure assembly loads a device under test board assembly that is mounted to the pressure assembly with the retention hardware.

System and method for probe mechanism planarization

International Business Machines Corporation


Phosphor compositions, white phosphor compositions, methods of making white phosphor compositions, tinted white phosphor compositions, methods of making tinted white phosphor compositions, LEDs, methods of making LEDs, light bulb structures, paints including phosphor compositions, polymer compositions including phosphor compositions, ceramics including phosphor compositions, and the like are provided.

White light is light mixed from a plurality of lights of different colors. Visible white light is generated by mixing at least two lights of different wavelengths. For example, when the eyes are simultaneously stimulated by either red, blue and yellow lights or red and green lights, they recognize the incident light as a white light. It would be advantageous to produce light-emitting diodes (LED) and other products using a combination of phosphors emitting light at different colors.

White phosphors, methods of making white phosphors, white light emitting LEDS, methods of making white light emitting LEDS, and light bulb structures

University of Georgia Research Foundation, Inc.


Cosmetic compositions containing water having a mineralization of at least 400 mg/l and an active agent having an irritant side effect exhibit a reduced irritant effect; the water is especially a thermal spring water and/or mineral water and the active agent is especially a keratolytic agent of the salicylic acid derivative type.

1. Field of the Invention
The present invention relates to cosmetic and/or dermatological compositions based on thermal spring water and/or mineral water for mildly treating the skin of the human body and/or face, including the scalp, while at the same time hydrating it. The present invention also relates to the use of such compositions for the cosmetic treatment of acne, wrinkles and/or fine lines on the skin.
2. Discussion of the Background
The active agents commonly used for the treatment of acne, wrinkles, and/or fine lines on the skin include keratolytic agents chosen from .alpha.- and .beta.-hydroxy acids and derivatives thereof, retinoids and derivatives thereof and especially retinoic acid (all-trans and 13-cis) and retinol, and benzoyl peroxide.
Among the .beta.-hydroxy acids are, in particular, salicylic acid and derivatives thereof. Salicylic acid is known for the treatment of acne (see EP-A-281,812) and wrinkles (see WO-A 93/10755), and some of the derivatives of this acid are known for the treatment of ageing of the skin and especially for delaying and/or attenuating the appearance of wrinkles and fine lines (see EP-A-378,936).
Retinoic acid is also known for preventing the appearance of wrinkles and/or fine lines on the skin.
Moreover, these keratolytic agents are known to modify the complexion of the skin, which appears rosier, to fade out pigmented marks present at the surface, to eliminate squama and to improve the elasticity of the skin.
Unfortunately, once applied to the skin, these keratolytic agents cause itching, stinging and tightness which may lead to considerable discomfort, owing to the attack on the keratin in the skin caused by such agents.
Furthermore, the use of these products by consumers with sensitive skin is often prevented.
Mineral water present in the form of liposomes in cosmetic compositions is already known for the purpose of hydrating the surface and deep layers of the skin (see FR-A-2,608,426).
Moreover, FR-2,668,063 teaches the use of liposomes of thermal spring water which are stabilized in a DNA gel for the preparation of cosmetic compositions. Such a form of use of thermal spring water allows, according to this document, its targeted penetration into the dermis and epidermis of the skin.
Unfortunately, these liposomal compositions based on thermal spring water or on mineral water do not allow the treatment of wrinkles, fine lines and/or acne present on the skin of the human body and/or face or on the scalp.
Thus, there remains a need for cosmetic and/or dermatological compositions based on thermal spring water and/or mineral water which allow the skin to be rejuvenated and which allow acne spots to be removed, while at the same time avoiding the drawbacks mentioned above and in particular while promoting the hydration of the skin at the surface and deep down.

Cosmetic and/or dermatological composition containing thermal spring water or mineral water and an active agent, in order to combat acne or aging


An environment information acquisition unit acquires an image in which environment around a vehicle has been imaged, information indicating a contact with the vehicle or an impact on the vehicle, surround sounds, approach identification information for enabling an approach of an emergency vehicle to be identified, and the like as surrounding environment information of the vehicle. A vehicle control processing unit recognizes predetermined external stimulation information included in the surrounding environment information, for example, a specific signal or a movement with a specific pattern, a contact to a specific part, and a specific sound. The vehicle control processing unit uses the recognized predetermined external stimulation information as a vehicle brake instruction from outside and starts a vehicle braking sequence to stop the vehicle. Even if an abnormality occurs in an automatically driven vehicle and the like, vehicle brake control is easily applied to a traveling vehicle from outside.

In recent years, various technologies for assisting a drive of a vehicle have been developed. For example, a technology is disclosed in Patent Document 1, such that, in a case where it has been determined that a driver has an abnormality, control to follow a preceding vehicle is automatically started, and secondary damage is avoided by stopping the vehicle when stop information of the preceding vehicle is acquired during the follow-up control.

Vehicle control device and vehicle control method


In general, embodiments of the invention relates to a method for analyzing a topology of a multiprotocol label switching (MPLS)/Virtual Private Network (VPN) network. The method includes obtaining logical communication channel information for a plurality of virtual routing and forwarding (VRF) instances, wherein each of the plurality of VRF instances are located on one of a plurality of routers, wherein the logical communication channel information specifies a plurality of logical communication channels between the plurality of VRF instances, and wherein at least two VRF instances are located on one of the plurality of routers. The method further includes constructing an audit matrix representing the logical communication channel information, wherein the audit matrix specifies the topology of the MPLS/VPN network, analyzing the audit matrix to obtain an analysis result, and presenting the analysis result.

A network corresponds to an interconnection of two or more computer systems. For example, one type of network is a home network. A home network may include two or more personal computers that can exchange data with each other and the Internet. Different types of networks exist throughout society. For example, large organizations often have data centers, servers, and various personal computer systems to exchange information between users, and to provide processing power to a single user.
Each large organization may have one or more locations. The locations may be interconnected using, for example, a virtual private network (VPN). A VPN is a secure tunnel over a shared network (e.g., the Internet) into a private network.
One method for implementing a VPN is using a multi-protocol label switching (MPLS) network (MPLS/VPN network). In an MPLS network, customer edges, belonging to an organization or business for which the VPN is provided, transfer frames within the VPN. Typically, a customer edge is only aware of the single VPN. In order to transfer frames, each customer edge is connected to a VRF instance on a provider edge router. The provider edge routers are configured to attach and remove labels as required to route the frame.
Typically, a frame is transferred with an inner label and an outer label. The inner label is assigned by an ingress provider edge router to identify a VRF instance on an egress provider edge router. The ingress provider edge router is the incoming router that receives the frame into the MPLS/VPN network. The egress provider edge router is the last MPLS router that the packet traverses before exiting the MPLS network. Thus, the ingress provider edge router has the VRF instance connected to the customer edge that sends the frame. The egress provider edge router is the router that has the VRF instance connected to the customer edge that receives the frame. The inner label typically does not change as the frame traverses the MPLS/VPN network.
In contrast, the outer label is used to let any MPLS router (e.g., provider router or provider edge router) know the next MPLS router that should be sent the frame. The outer label may be changed at each hop through the MPLS network.
In order to ensure the security of the VPN, MPLS requires each provider edge router to have a separate Virtual Routing and Forwarding (VRF) instance for each VPN that uses the provider edge router. The VRF instance identifies which label should be added to the frame based on the destination of the frame. Because the VRF instances are established on a per VPN basis, frames received by the VRF instance will typically have a label that is unique for the VPN on the provider edge router. Once the proper label is identified using the VRF instance, the label is attached to the frame and the frame is forwarded as discussed above.
In certain cases, two customer edges in different VPNs may require communication. In such cases, communication may be allowed by specifying in the VRF instances for both customer edges that communication may be sent to and received from the other VRF instance. When communication is allowed between two VRF instances, regardless of whether the VRF instances are in the same VPN, a logical communication channel is considered to exist between the two VRF instances. The collection of logical communication channels forms a network topology.

Method and system for analyzing the topology of a multiprotocol label switching (MPLS)/virtual private network (VPN) network