A pressure-limiting device in the hydraulic path for a clutch including at least one restrictor member having a central restrictor bore for pressure reduction and a cup-shaped retaining ring to which pressure is applied by a spring and the bottom of which has a central bore and, radially spaced therefrom, a plurality of radially spaced openings arranged on a reference circle. At least one of the restrictor member and the central restrictor bore is activatable when a predetermined volumetric flow rate of the fluid is exceeded during clutch engagement and the plurality of radially spaced openings is closable when a predetermined pressure drop is exceeded. The central restrictor bore can be activated independently of temperature because the surface area acting on the retaining ring is smaller in the unshifted state than during shifting, resulting with the temperature-dependent pressure losses caused by leakage between the retaining ring and housing being compensated for.

The hydraulic actuation of the clutch pedal leads to sputtering phenomena of the engine when abruptly removing the foot from the clutch pedal, especially when operating the vehicle in the lower gears of the engine. To solve this problem, German Publication DE 1785 882 discloses an actuating device for vehicle clutches, which starts from an approach in which the slave cylinder is connected to an upstream non-return valve whose valve stem is provided with a return-flow hole for the hydraulic fluid in order that, when the clutch pedal is abruptly released, the return movement of the piston located in the slave cylinder is slowed down as a result of the throttling by the return flow movement. However, the deceleration cannot be achieved very effectively by throttle bores of this kind since the throttle bores must be kept very small in diameter because of the strong clutch spring forces. For that reason, German Publication DE 1 785 882 describes a solution where in the slave cylinder, a restricting plate is disposed between the cylinder bottom having the inlet bore and the slave piston, the restricting plate being acted upon by an energy storage device in a direction from the slave piston to the cylinder bottom. The restricting plate has a plurality of radially extending throttling grooves for decelerating the fluid flow so as to avoid sputtering phenomena of the engine in response to sudden movements of the clutch pedal.
In German Publication DE 37 36 584 A1, the objective of designing a hydraulic actuator such that peak loads are avoided even during extreme driving, which is associated with extreme clutch engagement speeds, and thus, with torque peaks, is attained by providing a throttle valve in the hydraulic line between the master cylinder and the slave cylinder. In this manner, the fluid flow is throttled.
Moreover, German Patent DE 43 34 551 C2 discloses a further hydraulic actuator for a clutch in the drivetrain of a motor vehicle. The objective achieved in this document is to provide, between the master cylinder and the slave cylinder in the hydraulic line connected to the actuator, a valve body in the form of a throttle valve whose closure member can be moved in a reliable way when lifting it off the sealing surface. This objective is achieved in that the closure member is provided with a cup-shaped extension in which is carried the compression spring, and in that the outer contour of the closure member facing the inner wall of the valve housing is designed such that hydraulic fluid may pass through in-between in an unhindered manner.
With these prior art solutions for an additional device disposed in the hydraulic path for actuating a vehicle clutch, the engagement speed of the clutch is reduced when the clutch is engaged with extremely rapid return movements of the pedal. This is done by throttling the fluid flow toward the master cylinder, thereby reducing the clutch engagement speed. The proposed solutions for throttling may possibly reduce rapid return movements. However, during normal operation, additional pressure reductions occur, which are perceived by the driver as an unpleasant decrease in pedal force. Moreover, this kind of throttling results in that the pressure reductions produced by these devices are temperature-dependent. This may lead to unwanted, greater pressure reductions, especially at low temperatures.

Pressure-limiting device in a hydraulic path for clutch actuation

Luk Lamellen und Kupplungsbau Beteiligungs KG


A dial for a watch has a transmissive substrate (11) and a series of projections and recesses (11a, 11b). A nontransmissive film (12) is formed in each of the recesses with a metallic film.

In order to provide a solar cell watch in which the dial of the solar cell watch is visible as a metal plate and the deep purple of the solar cell is invisible, there is proposed a dial of solar cell shown in FIG. 49. The dial comprises a transmissive substrate 1 made of transparent plastic and a metal film 2 formed on the underside of the substrate and having a plurality of small apertures 2a disposed at regular intervals. The diameter of the aperture 2a is smaller than 30 μm. If the diameter is smaller than 30 μm, the aperture is invisible, and hence the solar cell disposed under the dial is also invisible.
Generally, the solar cell is equally divided into four divisions A1, A2, A3 and A4 as shown in FIG. 50. The quantity of light passing through the dial is equally irradiated to the four divisions. By disposing the small apertures 2a at regular intervals, four divisions are equally irradiated by the transmission light. The total area of small aperture is set to a range between 25 and 50% of the total area of the dial. If the total area of the small aperture 2a is set to 25%, transmittance of 25% is secured, which ensures sufficient generated energy. If the total area of the small aperture exceeds 50%, the deep purple of the solar cell is visible.
In a manufacturing process for such a dial for the solar cell, a number of steps and a high manufacturing cost are necessary. Furthermore, since the aperture is very small, it is difficult to make the dial at high accuracy. Consequently, the manufacturing process is low in yield and improper in mass production. Further, etching agent and stripping agent used in the process are ill for the human body.
An object of the present invention is to provide a dial for a watch and a manufacturing method for the dial may be manufactured by a simple process at a low cost at high accuracy without injury to the human body.

Timepiece dial and production method therefor


Trading cards are made interactive with the user by concealing under a coating the secondary indicia portion of an image comprising both primary and secondary indicia, and selectively altering the coating to reveal the secondary indicia in the presence of the primary indicia to complete the image. A thermochromic coating material responsive to temperature change from ambient temperature, as by rubbing the coating with the fingers, enables the local exposure of the secondary indicia.

Trading cards are printed with pictorial, graphic and text information relating to a subject of general or secular public interest. For example, baseball trading cards typically will have the picture of a ballplayer and his lifetime statistics. This combination of informational images is static. The primary indicium of the ballplayer picture and the secondary indicium of statistical text are unchanging.

Trading cards and method of concealing and revealing information thereon


The aim of the invention is to produce stainless steel for all stainless steel products both in the austenitic and the ferritic range, based on liquid pig-iron and FeCr solids, without using a supply of electrical energy. According to the invention, the liquid pig-iron, after being pre-treated in a blast furnace (1), is subjected to a DDD treatment (dephosphorization, desiliconization and desulphuration), is heated, finished or alloyed and deoxidated. The quantity of slag-free liquid pig-iron that has been pre-treated in the blast furnace (1) and a DDD device (2) is separated and introduced into two classic “twin” AOD-L converters (3, 4), where the required chemical process steps (of the heating, decarburization and alloying stages) take place in parallel contrary processes using autogenous chemical energy, the heating stage being carried out first in the first twin AOD-L converter (3) and the decarburization being carried out first in the second twin AOD-L converter (4).

The present invention relates to a method and a device for stainless steel production without electrical energy supply on the basis of liquid pig-iron and FeCr solids, wherein, after a pretreatment in a blast furnace and a DDD treatment (dephosphorization, desiliconization, desulpherization) in a DDD installation, the liquid pig-iron is subsequently heated, refined or alloyed in an AOD converter, is reduced and finally an adaptation/adjustment of the treated steel melt is carried out in a ladle furnace.
The use of an AOD converter for manufacturing noble steels is already known. Thus WO 02/075003 describes a control method based on a continuous measurement of exhaust gases in combination with a computer and a dynamic model by means of which the necessary blow rates of oxygen and inert gas as well as the material charges are controlled.
EP 1 310 573 A2 discloses a method for manufacturing a metal melt, particularly for quenching a metal melt for manufacturing, for example, alloyed stainless steel or noble steel in an AOD converter, wherein the method is based on a computer technology which takes place in accordance with a processed model and which controls the metallurgical installation, the process model describes the behavior for at least one variable process parameter between a first process value, an adjusting value, and a final process value. An example describes the process sequence for manufacturing a steel of the class AISI 304.
Stainless steels of the ferritic steel group AISI 4xx are conventionally always manufactured from scrap of the same type in the EAF and are later additionally alloyed and decarbonized in the AOD converter. In order to utilize the use of pig-iron, pig-iron pretreated in a steel mill with scrap and alloy melted into the pig-iron is mixed in a ladle outside of the furnace and is then charged into the converter.
WO 2006/050963 A2 proposes a method for producing stainless steel of the ferritic steel group AISI 4xx, particularly the steel group AISI 430, on the basis of liquid pig-iron and FeCr solids, with a DDD process line and the AOD converter with successively carried out method steps:                Pretreatment of the liquid pig-iron in the blast furnace, DDD treatment of the pig-iron in a suitable DDD installation, and charging the AOD converter with slag-free liquid pig-iron,        Heating, refining/alloying, and reducing the liquid pig-iron in the AOD converter,        Final adaptation/adjustment of the treated steel melt in the casting ladle.
In this known method, the manufacture of the stainless steel is carried out advantageously with the use of the AOD converter without the use of an EAF, i.e., without the supply of electrical energy. However, this known method has the disadvantage that finally, because of the lack of energy in this method, only the manufacture of ferritic steels is possible.

Method and device for producing stainless steel without using a supply of electrical energy, based on pig-iron that has been pre-treated in a DDD installation


The present invention discloses an integrated process scheme for producing (i) high-octane gasoline blending stream (ii) high aromatic heavy naphtha stream which is a suitable feedstock for benzene, toluene, and xylene (BTX) production and (iii) high cetane ultra-low sulphur diesel (ULSD) stream suitable for blending in refinery diesel pool.

The middle distillate boiling range stream from fluid catalytic cracking (FCC) units and resid fluid catalytic cracking (RFCC) units are called light cycle oil (LCO). In a typical refinery configuration, the LCO stream is routed to the diesel pool after reducing sulphur through high pressure hydro-treating. Currently in most refinery configurations, LCO is the second highest contributor to the refinery diesel pool after straight run diesel. However, because of its property, LCO only adds volume to the pool without contributing anything to its quality; in fact, it deteriorates some of the important pool properties such as cetane number (CN) and density. LCO is in the diesel boiling range and has 95 vol. % recovery temperatures at about 360° C. However, due to high aromatics content, hydro-treating of LCO at high pressure only reduces the sulphur content but does not significantly improve CN and in most cases it is 10-15 units lower as compared to that required for meeting the EURO-VI diesel specification. Further, the specific gravity of the hydrotreated LCO is in the range of 0.87 to 0.89, whereas for EURO-VI diesel, the specific gravity requirement is only 0.845 (maximum). Therefore, hydrotreating LCO at very high pressure (90-105 bar g H2 partial pressure) and converting the aromatics to naphthenes with only moderate improvement in CN is inefficient utilization of costly hydrogen.
An alternate approach for utilizing the LCO stream is to convert it to feedstock for aromatic complex for production of valuable chemicals such as benzene, toluene and xylene (BTX). In this process, the di- and tri-aromatics present in the LCO steam are selectively converted to alkyl benzene by saturating the second and the third ring respectively and then opening the saturated ring by mild hydrocracking. In this route, the chemical potential of the LCO stream is utilized to its fullest extent. However, in this route, moderate hydrogen pressure (25-75 bar g) needs to be maintained for maximizing the alkyl benzene concentration in the product stream for protecting the mono-aromatics already present in the LCO stream and those formed during the course of reaction. Therefore, the CN of the unconverted oil (UCO) generated in the process is considerably low. As the unconverted stream is in the diesel boiling range and has sulphur content below 10 ppmw, it is blended in the refinery diesel pool. However, only because of low CN and high density this stream requires further hydro-processing.
High aromatic content in the middle distillate streams of any thermal or catalytic cracker unit is the major hurdle in incorporating these streams into the refinery diesel pool. On hydrotreating these streams, the multi-ring aromatics get converted to mono-aromatics but with fused naphthenic ring (i.e., naphtha, benzene). The saturation of first or second ring occurs at very low hydrogen partial pressure; whereas the saturation of last aromatic ring requires very high hydrogen partial pressure. Even on saturating all the aromatic rings, the CN improvement is very insignificant compared to the hydrogen consumption. Therefore, efforts are being made for profitably utilizing these types of streams. Some of the previous works closely related to the present invention have been discussed in brief.
U.S. Pat. No. 8,404,103 by Honeywell UOP LLC discloses a technique for converting high aromatic stream into ultra-low sulphur gasoline and diesel by optimizing hydro-treater severity and allowing nitrogen slippage in the range of 20 to 60 ppmw into hydrocracker feed for enhancing the research octane number (RON) of the gasoline. The gasoline cut has a RON value of at least 85 and the diesel cut has less than 10 ppmw of sulphur, but no disclosure is provided on the cetane number of the diesel.
U.S. Pat. No. 8,142,645 by Hydrocarbon Technology & Innovation LLC discloses a method for conversion of poly-nuclear aromatics of cycle oil and pyrolysis fuel oil into higher value mono-aromatic compounds, such as benzene, toluene, xylenes, and ethyl benzene. The catalytic metal in the catalyst complexes is in the center surrounded by organic ligands. During hydrocracking procedure, the organic ligand preserves one of the aromatic rings of the poly-nuclear aromatic compounds, while the catalytic metal breaks the other aromatic rings thereby yielding a mono-aromatic compound. The process for the conversion of LCO to BTX exemplified has been carried out at higher pressure (˜96 bar g) and the monoaromatic/alkyl aromatic concentration in the product is very low (˜20 wt. %). It mainly focuses on catalyst preparation and does not describe the properties of the diesel/gasoline produced in the process. The process uses homogenous catalyst system which will lead to complication in separation of the metals from the products.
U.S. Pat. No. 9,644,155 by Indian Oil Corp Ltd. describes an integrated process to produce high-octane gasoline, high aromatic naphtha and high cetane diesel. The feedstock used in this process is a cracked middle distillate such as LCO from an FCC unit containing at least 30 wt. % of multi-ring aromatics. The RON of gasoline cut obtained in this process is at least 85. Also, this process produces a high aromatics naphtha cut with a RON of 91. The main disadvantage associated with the process is that the diesel stream obtained by this process has cetane number of at least 42 units and further oxidation reaction needs to be done to lower the cetane number by another 8-9 units.
WO patent publication WO2007039047A1 by Haldor Topsoe A/S discloses a partial conversion hydrocracking process and an apparatus whereby heavy petroleum feed is hydrotreated and hydrocracked and produces ultra-low sulphur diesel (ULSD) and high-quality FCC feed. Particularly, it also refers to the use of different catalyst beds in a hydrocracking reactor. Although, no advantage has been linked to use of different catalyst beds.
From the referred prior arts, attempts have been made for profitably utilizing the middle distillate boiling range streams obtained from catalytic as well as thermal cracker units. The main disadvantages associated with the processes known in the art are not being able to achieve an optimum cetane number, homogenous catalyst system leading to complication in separation of the metals from the products, oxidation required to lower the cetane number, etc. Therefore, a process for converting middle distillate boiling range streams from catalytic as well as thermal cracker units is needed to overcome the disadvantages.

Simultaneous processing of catalytic and thermally cracked middle distillate for petrochemical feedstock


The present invention relates to an organic electroluminescent (OEL) compound that comprises at least one fluorene derivative and at least one carbazole derivative. The compound has good electrical properties, light emitting properties and charge transport ability, and thus is suitable as a host material suitable for fluorescent and phosphorescent dopants of all colors including red, green, blue, white, etc., and as a charge transport material. An OEL display device that uses an organic layer that includes the OEL compound has a high efficiency, a low voltage, a high luminance, and a long lifespan because it has superior current density.

1. Field of the Invention
The present invention relates to a fluorene-based compound and an organic electroluminescent (OEL) display device that uses the same. In particular, the present invention relates to an OtL compound that has a structure that comprises at least one fluorene derivative and at least one carbazole derivative. The present invention also relates to an OEL display device with an organic emission layer or a hole transport layer that includes the OEL compound.
2. Description of the Background
In general, an OEL display device (OEL device) has an anode, a hole transport layer (HTL), an emission layer (EML), an electron transport layer (ETL), and a cathode that are sequentially formed on a substrate. The HTL, the EML, and the ETL are organic thin films.
The OEL device with the structure described above operates as follows. When a voltage is applied to the anode and the cathode, holes injected from the anode migrate to the EML via the HTL. Meanwhile, electrons from the cathode are injected in the EML via the ETL. Carriers are recombined in the EML to generate excitons. When these excitons fall from an excited state to a ground state, they emit light in the EML, which forms an image. The light that is emitted when excitons drop to the ground state from a singlet excitation state is referred to as "fluorescence." The light that is emitted when excitons drop to the ground state from a triplet excitation state is referred to as "phosphorescence." Fluorescence with a probability of the singlet excitation state of 25% (triplet excitation state: 75%) has a low luminous efficiency, whereas phosphorescence using a singlet excitation state of 25% and a triplet excitation state of 75% can theoretically have an internal quantum efficiency of about 100%.
A green and red high-efficiency OEL device has been developed that uses Ir(ppy)3 and PtOEP which are phosphorescent pigments that have heavy elements Ir and Pt with a high spin-orbital coupling energy at their central positions as dopants. These pigments effectively emit light even in a triple state (phosphorescent) OEL. In this type of device, 4,4′-N,N′-dicarbazole biphenyl (CBP) is used as a host. CBP has a low glass transition temperature of 110° C. or less and is easily crystallized. Due to CBP's unstable properties, this OEL device has a short life span of only 150 hours or less and is thus unsuitable for commercial use.

This patent is subject to a terminal disclaimer.

Fluorene-based compound and organic electroluminescent display device using the same


A linear regulator includes a pass transistor, a buffer transistor, and a low-pass filter circuit. The pass transistor is configured to pass a current from an input terminal to an output terminal. The buffer transistor is coupled to the input terminal and the pass transistor, and is configured to control the pass transistor. The low-pass filter circuit is coupled to the input terminal and the buffer transistor, and is configured to modulate a threshold voltage of the buffer transistor responsive to a transient at the input terminal.

A low dropout or LDO linear voltage regulator is an electronic circuit that is designed to provide a stable DC output voltage regardless of input voltage variations and bad impedance. An LDO linear voltage regulator is able to maintain output regulation even for a relatively small difference between the input voltage and the output voltage. For example, when regulating the voltage from a battery, an LDO regulator can maintain a steady output voltage for input voltages ranging from high battery voltages down to voltage levels just above the output voltage.

Line transient improvement through threshold voltage modulation of buffer-FET in linear regulators


This invention discloses a tracking and positioning system including a plurality of transmitters distributed within a working space, and at least one sensors attached to at least one moving object and operative to sense transmissions arriving from the plurality of transmitters, a dynamic transmission activator operative to track at least one position parameters of at least one of said sensors and to selectively activate and deactivate individual sets of at least one transmitters from among the plurality of transmitters, at least partly responsively to at leas one position parameters of at least one of the sensors.

This application contains Microfiche of one page, 21 frames.
The present invention relates generally, to positioning systems and more particularly to positioning systems employing alternating electromagnetic fields, as well as to apparatus for localization and tracking.
Various types of positioning systems which employ alternating electromagnetic fields are known. The following U.S. Patents and foreign patent documents are believed to represent the state of the art for positioning systems:
U.S. Pat. Nos. 4,054,881 and 4,314,251 to Raab; U.S. Pat. No. 4,622,644 to Hansen; U.S. Pat. No. 4,737,794 to Jones; U.S. Pat. Nos. 4,613,866, 4,945,305 and 4,849,692 to Blood, U.S. Pat. Nos. 4,017,858 and 4,298,874 and 4,742,356 to Kuipers; U.S. Pat. No. 5,168,222 to Volsin et al; U.S. Pat. No. 5,0170,172 to Weinstein; and U.S. Pat. No. 5,453,686 to Anderson; WO 94/04938 to Bladen; U.S. Pat. No. 5,953,683 to Hansen; U.S. Pat. No. 5,831,260 to Hansen; U.S. Pat. No. 5,767,960 to Orman; U.S. Pat. No. 5,767,669 to Hansen; U.S. Pat. No. 5,744,953 to Hansen; U.S. Pat. No. 5,742,394 to Hansen; U.S. Pat. No. 5,640,170 to Anderson; U.S. Pat. No. 5,600,330 to Blood; U.S. Pat. No. 5,307,072 to Jones; U.S. Pat. No. 4,945,305 to Blood; U.S. Pat. No. 4,710,708 to Rorden; U.S. Pat. No. 4,346,384 to Raab; U.S. Pat. No. 4,328,548 to Crow; U.S. Pat. No. 4,298,874 to Kuipers; U.S. Pat. No. 3,983,474 to Kuipers; U.S. Pat. No. 3,868,565 to Kuipers; 3,644,825 to Davis
U.S. Pat. No. 4,710,708 to Rorden describes a positioning system which employs only one magnetic coil.
Genetic algorithms are described in Genetic algorithms in search: optimization and machine learning, D. Goldberg, 1989; and
An introduction to genetic algorithms, Melanie Mitchell, 1996.
PLL technology is described in Phase locked loop: simulation and applications, by Roland E. Best, McGraw-Hill Book Company, ISBN 0070060517.
The theory of non-linear filtering and its applications are discussed in:
H. J. Kushner, xe2x80x9cApproximations to Optimal Nonlinear Filtersxe2x80x9d. IEEE Trans. A C., Vol. AC-12, No. 5, October 1967;
A. Gelb, J. F. Kaspar,. Jr., R. A. Nash, Jr., C. E. Price, and A. A. Southerland, Jr.,xe2x80x9cApplied Optimal Estimationxe2x80x9d, M.I.T. Press, Cambridge, Mass., 1974;
B. D. O. Anderson, and J. B. Moore, xe2x80x9cOptimal Filteringxe2x80x9d, Prentice-Hall, Englewood Cliffs, N.J., 1979;
A. H. Jazwinski, xe2x80x9cStochastic Processes and Filtering Theoryxe2x80x9d, Academic Press, New York 1971, and
M. S. Grewal, and A. P. Andrews, xe2x80x9cKalman Filteringxe2x80x9d, Prentice-Hall, Upper Saddle River, N.J., 1993,
The field equation law is discussed in:
J. D. Jackson, xe2x80x9cClassical Electrodynamicsxe2x80x9d, John Wiley and Sons, New York New York, 1975.
The application of Extended Kalman Filters (EKF) to tracking in the context of radar is discussed, for example, in U.S. Pat. Nos. 5,075,694, 4,179,696, 3,952,304 and 3,935,572. Other tracking systems are discussed, for example, in U.S. Pat. Nos. 5,095, 467 and 4,855,932.
The Kalman Filter is a standard tool for xe2x80x9cdata fusionxe2x80x9d of different sensors. In U.S. Pat. No. 5,416,712 GPS signals and dead reckoning are combined by a Kalman Filter, and where the gyro bias is also calibrated. In U.S. Pat. No. 5,645,077 automatic drift compensation is discussed,
Simulated annealing-based algorithms are described in:
B. Aarts and J. Korst, xe2x80x9cSimulated Annealing and Boltzman Machines: A Stochastic Ap1proach to Combinatorial Optimization and Neural Computingxe2x80x9d, John Wiley and Sons Ltd. (ISBN: 0471921467);
M. E. Johnson (Ed.) xe2x80x9cSimulated Annealing (Sa and Optimization: Modem Algorithms with VLSI, Optimal Design and Missile Defense Applications)xe2x80x9d, Amer. Sciences Pr. (ISBN: 0935950184); and
R. Azencott (Ed.), xe2x80x9cSimulated Annealing: Parallelization Techniquesxe2x80x9d, Wiley Interscience Series in Discrete Mathematics, John Wiley and Sons Ltd. (ISBN: 0471532312),
The disclosures of all publications mentioned in the specification and of the publications cited therein are hereby incorporated by reference,
The present invention provides improved apparatus and method for positioning and tracking objects, and also to a non-linear Kalman Filter tracker.
A genetic algorithm is typically employed for solving the position equation to obtain the position and orientation of the detector.
A particular advantage of a preferred embodiment of the present invention is conservation of bandwidth by cessation of operation of transmitters, which are not providing useful information.
Selective activation of the transmitters is preferably performed periodically. The period is preferably selected automatically by the system to match the expected pace of change in the location of the moving body and the estimated distance between transmitters.
There is thus provided in accordance with a preferred embodiment of the present invention a tracking and positioning system including a plurality of transmitters distributed within a working space, and at least one sensors attached to at least one moving object and operative to sense transmissions arriving from the plurality of transmitters, a dynamic transmission activator operative to track at least one position parameters of at least one of the sensors and to selectively activate and deactivate individual sets of at least one transmitters from among the plurality of transmitters, at least partly responsively to at least one position parameters of at least one of the sensors.
Further in accordance with a preferred embodiment of the present invention the dynamic transmission activator is operative to activate at least one individual transmitter from among the plurality of transmitters if and only if at least one sensor is within the operating range of the individual transmitter.
Still further in accordance with a preferred embodiment of the present invention the dynamic transmission activator is operative to deactivate at least one individual transmitter from among the plurality of transmitters if and only if all sensors are outside of the operating range of the individual transmitter.
There is also provided in accordance with yet another preferred embodiment of the present invention a tracking method for tracking a moving object whose initial position is substantially unknown, the method including the steps of using a genetic algorithm to initially position the moving object, and tracking the moving object using a Kalman filter tracking method.
Further in accordance with a preferred embodiment of the present invention, the tracking method also includes at least once repositioning the moving object, during tracking, using the genetic algorithm.
A block diagram of the disclosed system, for positioning and tracking objects, is shown in FIG. 1d. In accordance with a preferred embodiment of the present invention a system comprises of N transmitters, where Nxe2x89xa76, and at least one probe sensor which detects at least 6 electromagnetic signals, each characterized by its own frequency. The probe sensor typically comprises a single magnetic field detector that is connected to a digital signal processing circuit. The analog output of the magnetic signal detector is a voltage signal proportional to the superposition of the N magnetic field transmitters at the coordinates xi, yi, zi, xcex8i, xcfx86i, where the index i denotes the position of the magnetic coil i. It is a particular feature of a preferred embodiment of the present invention that the antenna coils need not be exactly mutually orthogonal and certainly need not be arranged such that the centers of the antenna coils coincide.
The analog signal is digitized and is introduced to an integrated digital signal processor block, as an input data. The digitized input data from one of the magnetic detectors is then used by the digital signal processor unit to compute the position and orientation coordinates of the magnetic detector. The output from the digital signal processor unit is then transferred to the Data Communication unit and then to the System Control Unit. The refresh rate of the output data is typically of the order of few times per second to a few hundred times per second.
The detector may comprise a one-axis antenna coil, as illustrated in FIG. 2, or may alternatively comprise any other suitable type of one-axis magnetic field detector, such as a Hall-effect detector or a solid state component e.g. a magneto-resistive detector or a magneto-diode or a magneto-transistor. The digital signal processor unit typically comprises three modules: a tracking and control module, an envelope detector module and a position determination unit. The tracking and control subsystem is operative to increase the precision of the position determinations by decreasing the dynamic range of the input signal to the AID converter.
The output of the tracking and control module is supplied to an envelope detector, which is operative to determine the received envelope amplitudes (magnitude and sign) C1, . . . , CN of the N magnetic signals received from the N RF transmitters. The tracking and control subsystem preferably comprises a Linear Predictive Coding (LPC) module. The envelope detector module typically comprises of N identical envelope detectors (EDs) working in parallel. Optionally, each of the ED modules comprises two sub-modules: a Phase Lock Loop (hereafter PLL), and a System Synchronization Unit, which is called during the operation of the ED module to define the absolute sign of the signal amplitude. Alternatively, each ED module comprises three sub-modules operating in parallel and another sub-module that is called when a system synchronization is needed. The three modules are: a Phase Lock Loop, a Non-coherent absolute value envelope-detector, and a Sign Detection Unit. A fourth sub-module, System synchronization unit, is then called to define the absolute sign of the signal amplitude.
The output of the envelope detector is supplied to the position determination unit which is operative, based on the signed amplitude values supplied by the envelope detector, to provide an output indication of the position of the magnetic field detector in the sensor.
The operation of the position determination unit is typically based on solving N analytic equations with N unknowns.
There is further provided in accordance with a preferred embodiment of the present invention a system for monitoring of the position of at least one portions of an object, the system including a plurality of transmitters operative to transmit alternating magnetic fields within a three-dimensional space, and at least one positioning sensors arranged to be fixed to at least one corresponding portions of the object whose positions it is sought to monitor, each of the at least one positioning sensors including a magnetic field receiver having at least one active axes and operative to receive at least one component, lying along the at least one active axes respectively, of the alternating magnetic fields, and at least one digital signal processors for storing at least one characteristic of the magnetic fields as transmitted by the plurality of transmitters and comparing the at least one characteristic to at least one characteristic of the magnetic fields as received by at least a corresponding one of the at least one positioning sensors and, accordingly, determining and providing an output indication of at least one position characteristic of at least one corresponding portions of the object.
Further in accordance with a preferred embodiment of the present invention at least one sensors comprise a single sensor arranged to be fixed to a single portion of the object whose position it is sought to monitor.
Still further in accordance with a preferred embodiment of the present invention the at least one position characteristic comprises at least one dimension of the spatial position of the object portion. Preferably the at least one position characteristic also includes at least one dimension of the angular position of the object portion.
Additionally in accordance with a preferred embodiment of the present invention the at least one sensors comprise a plurality of sensors arranged to be fixed to a corresponding plurality of portions of the object whose positions it is sought to monitor.
Moreover in accordance with a preferred embodiment of the present invention the magnetic field receiver has a single (detection) active axis and is operative to receive the component of the alternating magnetic fields lying along the single (detection) active axis.
Preferably the plurality of transmitters are operative to continuously transmit said alternating magnetic fields.
There is also provided in accordance with another preferred embodiment of the present invention a system for monitoring the position of at least one portions of an object in three-dimensional space having three axes, the system including at least six magnetic transmitters each having a center and each operative to transmit alternating magnetic fields within a three-dimensional space, a transmitter orientation maintainer operative to maintain at least three of the transmitters in orientations such that at least a component of the magnetic field of at least one of the transmitters falls within each of the 3 axes of the 3-dimensional space, and wherein less than all of the centers of the transmitters coincide, at least one positioning sensors arranged to be fixed to at least one corresponding portions of the object whose positions it is sought to monitor, each of the at least one positioning sensors comprising a magnetic field receiver receiving the alternating magnetic fields from the at least six transmitters, and at least one digital signal processor for storing at least one characteristic of the magnetic fields as transmitted by the plurality of at least six transmitters and comparing the at least one characteristic to at least one characteristic of the magnetic fields as received by at least a corresponding one of the at least one positioning sensors and, accordingly, determining at least one position characteristic of at least one object portion.
Further in accordance with a preferred embodiment of the present invention the at least one digital signal processor is provided integrally with a corresponding one of the at least one positioning sensors.
Additionally in accordance with a preferred embodiment of the present invention at least 3 of the transmitters are separate physical units such that the at least three transmitters can be positioned at any 3 user-selected locations.
There is also provided in accordance with yet another preferred embodiment of the present invention a system for monitoring the position of at least one portions of an object in three-dimensional space having three axes, the system including at least six magnetic transmitters each having an active axial direction and each operative to transmit alternating magnetic fields within a three-dimensional space, a transmitter orientation maintainer operative to maintain at least three of the transmitters in orientations such that at least a component of the magnetic field of at least one of the transmitters falls within each of the 3 axes of the 3-dimensional space, and wherein less than all of the transmitters"" active axial directions are mutually orthogonal, at least one positioning sensors arranged to be fixed to at least one corresponding portions of the object whose positions it is sought to monitor, each of said at least one positioning sensors comprising a magnetic field receiver receiving said alternating magnetic fields from the at least six transmitters, and at least one digital signal processor for storing at least one characteristic of the magnetic fields as transmitted by the plurality of at least six transmitters and comparing said at least one characteristic to at least one characteristic of the magnetic fields as received by at least a corresponding one of the at least one positioning sensors and, accordingly, determining at least one position characteristic of at least one object portion.
Further in accordance with a preferred embodiment of the present invention at least first and second transmitters from among the at least six transmitters transmit in different frequencies.
Preferably at least first and second transmitters from among the at least six transmitters transmit in different phases.
Additionally in accordance with a preferred embodiment of the present invention at least one of the at least one digital signal processors is operative to simultaneously process magnetic field characteristics arriving from more than one of the at least six transmitters.
Still further in accordance with a preferred embodiment of the present invention comprising an RF trigger which is operative to trigger all of the transmitters, thereby to synchronize the transmitters. Additionally or alternatively the RF trigger provides a timing signal to at least one of the at least one sensors. Preferably at least one of the sensors computes the absolute phase of the at least six transmitters, based on said timing signal.
There is also provided in accordance with a preferred embodiment of the present invention a method for monitoring of the position of at least one portions of an object, the method including affixing at least one positioning sensors to at least one corresponding portions of the object whose positions it is sought to monitor, the sensors being operative to receive alternating magnetic fields existing within a three dimensional space containing the object, comparing at least one characteristic of the magnetic fields as transmitted to at least one characteristic of the magnetic fields as received by the sensors, and using a result of the comparing step as an input to a genetic natural selection process for determining and providing an output indication of at least one position characteristic of at least one corresponding portions of the object.
Further in accordance with a preferred embodiment of the present invention at least one of the sensors comprises a Linear Predicted Coding control loop operative to increase the dynamic range of incoming signals. Preferably at least one of the sensors comprises a solid-state component. Additionally or alternatively at least one of the sensors comprises a control loop to improve the dynamic range of the signal intensity without the use of electronic components common in the art.
Further in accordance with a preferred embodiment of the present invention, at least one of the sensors comprises a PLL configuration whose output is relatively insensitive to its input amplitude.
Still further in accordance with a preferred embodiment of the present invention, at least one dynamic property of the PLL apparatus does not substantially depend on the input amplitude of the PLL apparatus.
Still further in accordance with a preferred embodiment of the present invention, the bandwidth of the PLL apparatus does not substantially depend on the input amplitude of the PLL apparatus.
Additionally in accordance with a preferred embodiment of the present invention, the relaxation time constant of the PLL apparatus does not substantially depend on the input amplitude of the PLL apparatus.
The dynamic properties of the PLL, specifically bandwidth, and its relaxation time constant typically do not depend on the input amplitude.
There is also provided in accordance with a preferred embodiment of the present invention a method for monitoring of the position of at least one portions of an object, the method including positioning a plurality of transmitters operative to transmit alternating magnetic fields within a three-dimensional space and affixing at least one positioning sensors arranged to be fixed to at least one corresponding portions of the object whose positions it is sought to monitor, each of the at least one positioning sensors comprising a magnetic field receiver having at least one active axes and operative to receive at least one component, lying along the at least one active axes respectively, of the alternating magnetic fields and storing at least one characteristic of the magnetic fields as transmitted by the plurality of transmitters and comparing the at least one characteristic to at least one characteristic of the magnetic fields as received by at least a corresponding one of the at least one positioning sensors and, accordingly, determining and providing an output indication of at least one position characteristic of at least one corresponding portions of the object, wherein the storing, comparing, determining and providing step is performed locally rather than remotely.
There is also provided in accordance with yet another preferred embodiment of the present invention a method for monitoring the position of at least one portions of an object in three-dimensional space having three axes, the method including positioning at least six magnetic transmitters each having a center and each operative to transmit alternating magnetic fields within a three-dimensional space, including maintaining at least three of the transmitters in orientations such that at least a component of the magnetic field of at least one of the transmitters falls within each of the 3 axes of the 3-dimensional space, and wherein less than all of the centers of the transmitters coincide, affixing at least one positioning sensor to at least one corresponding portions of the object whose positions it is sought to monitor, each of the at least one positioning sensors comprising a magnetic field receiver receiving said alternating magnetic fields from the at least six transmitters, and storing at least one characteristic of the magnetic fields as transmitted by the plurality of at least six transmitters and comparing the at least one characteristic to at least one characteristic of the magnetic fields as received by at least a corresponding one of the at least one positioning sensors and, accordingly, determining at least one position characteristic of at least one object portion.
There is also provided in accordance with another preferred embodiment of the present invention a method for monitoring the position of at least one portions of an object in three-dimensional space having three axes, the method including positioning at least six magnetic transmitters each having an active axial direction and each operative to transmit alternating magnetic fields within a three-dimensional space, including maintaining at least three of the transmitters in orientations such that at least a component of the magnetic field of at least one of the transmitters falls within each of the 3 axes of the 3-dimensional space, and wherein less than all of the transmitters"" active axial directions are mutually orthogonal, affixing at least one positioning sensors arranged to be fixed to at least one corresponding portions of the object whose positions it is sought to monitor, each of said at least one positioning sensors comprising a magnetic field receiver receiving the alternating magnetic fields from the at least six transmitters, and storing at least one characteristic of the magnetic fields as transmitted by the plurality of at least six transmitters and comparing said at least one characteristic to at least one characteristic of the magnetic fields as received by at least a corresponding one of the at least one positioning sensors and, accordingly, determining at least one position characteristic of at least one object portion.
There is thus further provided in accordance with yet another preferred embodiment of the present invention pose tracking apparatus operative to track the pose of a moving object based on magnetic flux measurements taken in the vicinity of the moving object, the pose tracking apparatus including a non-linear Kalman filter-based tracker operative to receive magnetic flux measurements performed in the vicinity of the moving object, to operate a non-linear Kalman-type filter on the measurements, thereby to generate information regarding the pose of the moving object, and a pose indicator operative to provide an output indication of the information regarding the pose of the moving object.
Further in accordance with a preferred embodiment of the present invention the non-linear tracker includes an EKF (extended Kalman filter).
Additionally in accordance with a preferred embodiment of the present invention, the non-linear filter operates on a state vector whose components include pose coordinates and first time-derivatives of the pose coordinates.
Further in accordance with a preferred embodiment of the present invention the pose coordinates include 3 spatial coordinates and 2 orientation coordinates.
Further in accordance with a preferred embodiment of the present invention the apparatus also includes a transmitter array, which may include less than six operative transmitters, inducing magnetic flux in the vicinity of the moving object.
Still further in accordance with a preferred embodiment of the present invention the non-linear tracker employs a field equations transformation from the pose of the moving object to the magnetic flux measurements taken in its vicinity.
Still further in accordance with a preferred embodiment of the present invention the step of employing the field equation transformation includes computing a function h of a state vector "xgr", as follows:       h              (      ξ      )        =                    C        0                    R        3                        (                                    3                                      A              1                                                  A              2                                            R            2                          -                  A          3                    )
where
Co is a coefficient,
R is the distance between a detector detecting the magnetic flux measurements and a transmitter within the transmitter array; and
A1=xcex4x sin(xcex8)cos(xcfx86s)+xcex4y sin(xcex8s)sin(xcfx86s)+xcex4z cos(xcex8s)
A2=xcex4x sin(xcex8d)cos(xcfx86d)+xcex4y sin(xcex8d)sin(xcfx86d)+xcex4z cos(xcex8d)
A3=sin(xcex8s)cos(xcfx86s)sin (xcex8d)cos(xcfx86d)+sin(xcex8s)sin(xcfx86s)sin(xcex8d)sin(xcfx86d)+cos(xcfx86s)cos(xcfx86d)
and wherein the pose of the detector is (xd, yd, zd, xcex8d, xcfx86d) and the pose of the transmitter is (xs, ys, zs, xcex8s, xcfx86s), and where xcex4x, xcex4y and xcex4z denote the distance between the x, y and z components, respectively, of the detector""s pose and the transmitter""s pose.
Additionally in accordance with a preferred embodiment of the present invention the non-linear tracker approximates an elliptic integral, at least when the moving object is close to a transmitter within the transmitter array, by computing first and second terms of a Taylor series representing the elliptic integral.
Additionally in accordance with a preferred embodiment of the present invention, the approximated elliptic integral includes a correction to the above mentioned A1 and A3,             A      1        ⇒                  A        1                          (                  1          -          δ                )                        A      3        ⇒                  A        3                          (                  1          -          η                )                        δ      xe2x80x2        =                  5        8                                    (                      ρ            R                    )                2                          (                              7                                                      A                1                2                                            R                2                                              -          3                )                  η    =                  9        8                                    (                      ρ            R                    )                2                          (                              5                                                      A                1                2                                            R                2                                              -          1                )
and where xcfx81 is the radius of the transmitter.
Still further in accordance with a preferred embodiment of the present invention the orientation component of the pose of the moving object is represented by two angles, continuous over time xcex8xe2x80x2 and xcfx86xe2x80x2, whose relationship with conventional polar coordinates xcex8xe2x80x2 and xcfx86 is as follows:   θ  =      {                                                                      θ                xe2x80x2                                                                                if                                                        xe2x80x83                                                                          mod                                                              (                                              θ                        ,                                                  2                                                                                xe2x80x83                                                                              π                                                                    )                                                                      ≤                π                                                                                -                                  θ                  xe2x80x2                                                                                if                                                        xe2x80x83                                                                          mod                                                              (                                              θ                        ,                                                  2                                                                                xe2x80x83                                                                              π                                                                    )                                                                       greater than                 π
                        ϕ            =              {                                                            ϕ                xe2x80x2                                                                                if                                                        xe2x80x83                                                      θ                                =                                  θ                  xe2x80x2                                                                                ϕ                  xe2x80x2                                +                π                                                                                if                                                        xe2x80x83                                                      θ                                =                                  -                                      θ                    xe2x80x2
Still further in accordance with a preferred embodiment of the present invention, in order to avoid singularity, a dynamic offset is described by the following transformation:
xcex8=cosxe2x88x921[cos(xcex8xe2x80x2)cos(xcfx86xe2x80x2)]
xcfx86=cosxe2x88x921[{square root over (cos2(xcex8)+sin2(xcfx86xe2x80x2)cos2(xcex8xe2x80x2))}]
where xcex8 and xcfx86 include the orientation component of the moving object""s pose after the dynamic offset, and xcex8 and xcfx86xe2x80x2 include the orientation component of the moving object""s pose before the dynamic offset,
Still further in accordance with a preferred embodiment of the present invention the non-linear filter employs the following matrices and operations:
"xgr"k(xe2x88x92)="PHgr""xgr"kxe2x88x921(+)
where k is a time index, "xgr"k(xe2x88x92) is a state vector predictor, "xgr"k(+) is a state vector corrector, and "PHgr" is a state transition matrix,
Pk(xe2x88x92)="PHgr"Pkxe2x88x921(+)"PHgr"T+Q
where P(xe2x88x92) is an estimate error covariance matrix predictor, P(+) is an estimate error covariance matrix corrector and Q is a process noise covariance matrix,       H    k    =                    ∂                  h                                (                          ξ              _                        )                                      ∂                  ξ          _                                "LeftBracketingBar"                        ξ          k                                  (          -          )
where h is a sensitivity function and "xgr" is a state vector,
xe2x80x83Kk=Pk(xe2x88x92)HkT[HkPk(xe2x88x92)HkT+Rk]xe2x88x921
where Rk is a measurement noise covariance matrix,
"xgr"k(+)="xgr"k(xe2x88x92)+Kk{xcex6kxe2x88x92h["xgr"k(xe2x88x92)]}
where xcex6 denotes the magnetic flux measurements taken in the vicinity of the moving object, and
Pk(+)=[Ixe2x88x92KkHk]Pk(xe2x88x92)
Still further in accordance with a preferred embodiment of the present invention the magnetic flux measurements may include less than six magnetic flux measurements in the vicinity of the moving object.
Additionally in accordance with a preferred embodiment of the present invention, the non-linear tracker is operative to time-vary a measurement-noise covariance matrix R and a process-noise covariance matrix Q.
Further in accordance with a preferred embodiment of the present invention the time-varying R and Q includes:             R      k      dec        =                  R                  k          -          1                dec                          ⅇ                                            T              k                        -                          T                              k                -                1                                                          τ            decay                                          R      k        =                  R        k        dec            +              R        inf                        Q      k      dec        =                  Q                  k          -          1                dec                          ⅇ                                            T              k                        -                          T                              k                -                1                                                          τ            decay                                          Q      k        =                  Q        k        dec            +              Q        inf
Still further in accordance with a preferred embodiment of the present invention at least one of the transmitters inducing a magnetic flux sampled by the measurements is self-calibrated.
Additionally in accordance with a preferred embodiment of the present invention, the non-linear filter is operative to calibrate the location of each of the self-calibrating transmitters.
Further in accordance with a preferred embodiment of the present invention the non-linear filter is operative to calibrate the intensity of each of the self-calibrating transmitters.
Still further in accordance with a preferred embodiment of the present invention the non-linear filter is operative to calibrate the radius of each of the self-calibrating transmitters.
Additionally in accordance with a preferred embodiment of the present invention, the non-linear filter is operative to calibrate the orientation of each of the self-calibrating transmitters.
Further in accordance with a preferred embodiment of the present invention, the tracker uses a state vector whose components comprise characteristic the self-calibrated transmitters inducing a magnetic flux sampled by the measurements, and wherein at least one of the characteristics is self-calibrated.
Still further in accordance with a preferred embodiment of the present invention, the non-linear tracker employs a measurement noise matrix R and a process noise covariance matrix Q at least one of which is generated by an adaptive process.
Additionally in accordance with a preferred embodiment of the present invention the adaptive process for Q comprises       Q    k    scc    =                    (                  α                                (                                                                                ξ                    k                    velocity                                                                          (                    +                    )                                                  -                                                      ξ                                          k                      -                      1                                        velocity                                                                          (                    +                    )                                                                                T                  k                                -                                  T                                      k                    -                    1                                                                        )                          )            2        +                  (                  1          -          α                )                          Q                  k          -          1                scc            xe2x80x83Qk=Qkacc+Q0acc
"xgr"kvelocity(+)=estimate of {{dot over (x)}, {dot over (y)}, {dot over (z)}, {dot over (xcfx86)}, {dot over (xcex8)}}
Further in accordance with a preferred embodiment of the present invention the adaptive process for R comprises
Rks,s=xcex2{xcex6ksxe2x88x92hs["xgr"k(xe2x88x92)]}2+(1xe2x88x92xcex2)Rkxe2x88x921s,s
RkRks,s+R0s,s

System for three dimensional positioning and tracking with dynamic range extension

Abstract: A tracking method for tracking a moving object whose initial position is substantially unknown is also disclosed.


One inventive aspect relates to a method of determining an estimate of system-level yield loss for an electronic system comprising individual components subject to manufacturing process variability leading to manufacturing defects. The method comprises obtaining a description of the composition of the electronic system in terms of which individual components are used. The method further comprises obtaining statistical properties of the performance of individual components of the electronic system with respect to first and second performance variables, e.g. energy consumption and delay, the statistical properties including correlation information of the first and second performance variables. The method further comprises obtaining information about execution of an application on the system, e.g. a number of accesses of a component by an application. The method further comprises propagating the statistical properties of the first and second performance variables of the individual components to the electronic system so that the correlations between the first and second performance variables are preserved, the propagating taking into account the application information.

1. Field of the Invention
The invention relates to methods for exploring feasibility of an electronic system design and to electronic systems selected in accordance with such exploration method. The methods in accordance with embodiments of the present invention are particularly suited for electronic systems being fabricated in nanometer technology.
2. Description of the Related Technology
Yield, i.e. the proportion of devices produced which function correctly, can be classified into two different types, functional and parametric yield. Functional yield can be defined as the percentage of samples that produce the correct output for all the possible inputs. Similarly parametric yield can be defined as the percentage of samples that produce the correct output for all the possible inputs under a constraint on one of its performance parameters. Usual constraints are either timing constraints or energy budgets that need to be met.
Process variability in nanometer technology has a detrimental impact on the performance of electronic systems (like or including memories). The impact of process variability on the energy consumption and performance of integrated circuits is significant already now, and is predicted to grow still more as technology scales further. This impact is directly translated into functional and parametric yield loss at the system component level. Although at the component level the parameter variation due to process variability may not be fatal, timing yield loss at the component level may result in functional yield loss at the system level for synchronous systems, due to timing violations.
Conventional yield models do not allow accurately analyzing this, at least not at the system level.
Several approaches exist to turn this functional yield loss at least partly into parametric timing yield loss at the system level, for example by frequency binning at manufacturing-time, as described by M. Mani et al. in "A new statistical optimization algorithm for gate sizing", Intl. Conf. on Computer Design, pp. 272-277, October 2004. Each chip is tested at-speed after fabrication and the maximum clock frequency it can sustain without loss of functionality is determined. This means that all the system components of the chip, or the respective clock domain, should be operational under this clock frequency for the chip to yield. The system timing parametric yield is defined as the percentage of chips that can run at a given clock frequency. This technique significantly increases the number of chips that are functionally operational, but most of them cannot meet the initial target clock frequency. This is not a problem in the general purpose processor domain, but it will result in application deadline misses for embedded real-time systems, which is one of the reasons why frequency binning is not used in the embedded domain.
Embedded systems that run real-time, power sensitive applications are becoming an important part of the consumer electronic product market. System level design in the embedded systems domain has primarily been concerned with three main cost metrics: timing, energy consumption and area. Timing is important because embedded system typically run applications with hard real-time deadlines, such as communication services and multimedia applications. Minimizing energy consumption, on the other hand, can not only extend the time between battery recharges, but also enables new handheld applications and high-end mobile computing. A lot of research has been performed on how to minimize energy consumption, by employing run-time techniques such as voltage scaling for instance. These two metrics, together with area, which has a direct proportional impact on cost, define the quality of the design.
Estimating both energy and timing parametric yield at the system level during the design trajectory can give valuable information about technical and financial aspects of the design. D. Blaauw et al., in "CAD tools for variation tolerance", Design Automation Conference, p. 766, 2005, have already identified the lack of yield estimation tools before synthesis and the necessity to have them. Parametric yield is conventionally evaluated on a component per component basis. Currently, system parametric yield is estimated as the product of the parametric yield of all the system components. This leads to a pessimistic worst-case estimation, because it assumes that all the components must meet the same performance requirements. This is an option mostly used in the context of general purpose architecture design, where the processors need to handle any application that is ran on them. The main assumption so far at the system level design abstraction has been that timing and energy consumption of the individual system components and the final system implementation itself are deterministic and predictable.
However, in the portable battery-operated real-time embedded system domain, where the applications that are going to run on the system are known and the most important constraint is meeting the application deadlines and not whether the system components meet their nominal clock period specifications, the system level parametric yield estimation can be significantly improved.
The fact that, for battery-operated systems the utilization scenarios can be predicted at design-time because the applications are known a priori, gives an opportunity to meet the real-time application deadlines, without having to be so strict that all the components have to meet the nominal parametric specifications all of the time. Design techniques exist today that can allow to globally re-decide on the distribution of the available time until the application deadline and on the configuration of the components in order to meet the application deadlines. One of the most prominent techniques is Dynamic Voltage and Frequency Scaling (DVFS), as described by T. Okuma et al. in "Real-time task scheduling for a variable voltage processor", Intl. Symposium on System Synthesis, pp. 24-29, November 1999. Dynamic Voltage and Frequency Scaling uses the supply voltage as a configuration parameter in order to minimize energy/power consumption and the clock frequency as a constraint to guarantee meeting the application deadlines. Another technique is Vth-hopping, as described by K. Nose et al. in "Vth-hopping scheme to reduce subthreshold leakage for low-power processors", IEEE J. of Solid-State Circuits, vol. 37, no. 3, pp. 413-419, March 2002, which uses the threshold voltage of the transistors as a configuration parameter. The basic idea behind all these techniques is that the clock frequency will be defined based on the predicted system workload [I. Hong, M. Potkonjak, M. Srivastava, "On-line scheduling of hard real-time tasks on variable voltage processors", Intl. Conf. on Computer Aided Design, pp. 653-656, November 1998] so as to just meet the next application deadline and a configuration parameter, e.g. Vdd or Vth will be configured in order to minimize energy consumption for the given clock frequency. Other techniques could also be used to optimize the energy-performance trade-offs.
Two important assumptions are supporting the fore-mentioned techniques. The first is that the relation between the configuration parameter and the speed of each component is deterministic and known at design-time. Process variability, however, introduces non-determinism in these relations and jeopardizes the applicability of these techniques. The second assumption is that relaxing the clock frequency does not degrade the parametric yield of the system, because the application deadlines will be met. But, they still use the nominal target clock frequency as the timing reference for the calculation of the system parametric yield. If the slowest system component cannot meet this nominal target, the system is considered as non-functional, because the slow component would cause timing violations. Hence, the conventional parametric yield metrics cannot fully capture the effect of frequency scaling, especially in case the operating frequency is tuned to be faster than the nominal frequency.
Limited variations due to process variability have been tackled by embedding worst-case margins in the design of the system components, such as e.g. processors and memories, so that the specified performance and energy consumption can be guaranteed for use by the system designers.
Technology scaling past the 90 nm technology node, however, introduces a lot more unpredictability in the timing and energy consumption of the designs due to process variability. Treating these metrics at the system design level as deterministic values requires the design margins to become so large that they can cat up all the benefits of moving to a more advanced technology node. Therefore some degree of uncertainty will always have to be tolerated in the component. This has to be considered during circuit and even architecture design. This has to lead to new statistical design paradigms [S. Borkar, "Designing reliable systems from unreliable components: the challenges of transistor variability and degradation", IEEE Micro, vol. 25, iss. 6, November-December 2005.] such as statistical timing analysis or even more general, yield-aware design [A. Agarwal et al., "Process variation in embedded memories: failure analysis and variation aware architecture" IEEE Journal of Solid-State Circuits, vol 40, iss 9, September 2005 pp. 1804-1814, M. Mani et al, "An efficient algorithm for statistical minimization of total power under timing yield constraints", Design Automation Conference, 2005.].
Depending on the component being considered (e.g. memory or datapath), energy and/or performance vs. area trade-off decisions have to be made [C. Visweswariah, "Statistical Timing of Digital Integrated Circuits" Microprocessor Circuit Design Forum at ISSCC 2004]. However, for embedded system design the most critical trade-offs are not made at the component or IP block level, but at the architecture or even at the application level. Therefore solutions for (parametric) yield aware design have started being developed that tackle the problem at the architecture level while allowing some degree of uncertainty in the parametric energy and performance figures of the IP blocks [T. Austin et al., "Making typical silicon matter with Razor", IEEE Computer, pp. 57, March 2004, A. Papanikolaou et al., "A System-Level Methodology for Fully Compensating Process Variability Impact of Memory Organizations in Periodic Applications", Intl. Conference on HW/SW Co-design and System Synthesis (CODES+ISSS), September 2005]. These solutions aim to tackle the system-level yield loss that is the result of timing violations due to the parametric drift in the performance of the individual system components caused by random process variability.
At the circuit-level, statistical timing analysis has been proposed as a method to analyze the parametric timing yield of the circuits, as described by E. Jacobs et al. in "Gate sizing using a statistical delay models", Design, Automation and Test in Europe, 2000. A lot of research has been done on analysis of timing yield, for instance by K. Antreich et al. in "Circuit analysis and optimization driven by worst-case distances", IEEE Trans. on CAD, January 1994, and by A. Srivastava et al. in "Statistical optimization of leakage power considering process variations using dual-Vh and sizing", Design Automation Conference, June 2004. Lately the focus has been shifted toward optimization of the circuits in order to achieve a larger timing yield, as described by A. Agarwal et al. in "Statistical timing analysis using bounds and selective enumeration", IEEE Trans. on CAD, vol 22, no. 9, September 2003. Only very recently, statistical timing analysis has been combined with a power optimization methodology based on the allocation of high or low Vth gates in the circuits in order to meet a given timing and minimize power consumption, as described by H. Chang et al. in "Statistical timing analysis considering spatial correlations using a single PERT-like traversal", Intl. Conf on Computer Aided Design, 2003.
Design for Yield and Design for Manufacturing have become very popular research issues in the recent years. The bulk of the work, however, has been concentrated either at the printing level using post processing techniques or at the standard cell level by characterizing the yield of particular layout styles [J. Yang et al, "Advanced timing analysis based on post-OPC extraction of critical dimensions" DAC, 359-364, 2005.]. Techniques of the fist type such as Optical Proximity Correction aim to counteract the imperfections in the manufacturing process and to increase the device-level functional yield of the chips by improving the quality of the drawn features.
At higher abstraction levels, research has been focused on the gate-level abstraction level of the circuits. Statistical timing analysis [C. Viswewariah, "Death, taxes and failing chips", Design Automation Conference, pp. 343, 2003.] aims at estimating the parametric performance of the circuit. More recent research has introduced circuit level timing optimizations [A. Srivastava et al, "Concurrent Sizing, Vdd and Vth Assignment for low power design", DATE, 718-719, 2004.] and combined power and timing optimization [M. Mani et al, "An efficient algorithm for statistical minimization of total power under timing yield constraints", Design Automation Conference, 2005.] on top of statistical timing analysis.
A gate level approach has been proposed which can accurately estimate the bivariate timing/leakage power distribution of a combinatorial circuit [A. Sriristava et al., "Accurate and efficient gate-level parametric yield estimation considering correlated variations in leakage power and performance", Design Automation Conference, pp. 535-540, June 2005]. The correlations between leakage power and performance are taken into account and the resulting joint distribution at the circuit level is generated. The assumption made in this work is that the underlying gate distributions are Gaussian. Such a technique could be properly adapted to handle the yield estimation of a memory organization, if the memory level distributions are assumed to be Gaussian. It cannot handle the case of configurable memories/components, however, or the case of any kind of component with non-Gaussian energy/performance distribution.
The fore-mentioned methods are applicable only at the circuit level, where each circuit is a collection of interconnected logic gates. The methods that perform optimization rely on design-time decisions, such as high-Vth gate allocation and gate sizing. As a result, all of them use the conventional parametric yield metric, which for embedded systems completely ignores the impact of the application that is running and the mapping of that application on the platform. Furthermore, the energy overhead resulting from the design margins introduced at the circuit level to improve parametric yield become prohibitive for battery operated embedded systems.
Parametric yield has not been studied at the application level, especially not for systems that can adapt their clock frequency and energy consumption at run-time. Timing parametric yield can only be defined conventionally for a given timing reference which is assumed to be the clock period.

Method for exploring feasibility of an electronic system design


A liquid crystal display and a shift register unit thereof are provided. The shift register unit includes a first switch, a second switch, and a level shift circuit. The first switch has a first input terminal, a first control terminal, and a first output terminal. The second switch has a second input terminal, a second control terminal, and a second output terminal. The second control terminal is coupled to the first output terminal and the level shift circuit. When the first switch is enabled, the first input terminal receives an input signal converting the voltage of the second control terminal into a first voltage for turning on the second switch. The second output terminal outputs a first clock signal to a scan signal line. When the level shift circuit is enabled, the voltage of the second control terminal is converted into a second voltage for turning off the second switch.

1. Field of the Invention
The invention relates in general to a liquid crystal display and a shift register unit thereof, and more particularly to a liquid crystal display and a shift register unit thereof capable of improving operating frequency.
2. Description of the Related Art
In order to reduce the manufacturing cost of a-Si liquid crystal display, the chip on glass (COG) technology is provided and used in the semi-conductor industry. According to the COG technology, the driving circuits such as the scan driver or the data driver are disposed on an
a-Si display panel so as to simplify the manufacturing process of a-Si liquid crystal display and further bring the manufacturing cost down.
Referring to FIG. 1, a schematic diagram of a conventional a-Si liquid crystal display is shown. The conventional a-Si liquid crystal display 10 includes a scan driver 110, a scan signal line 120, a data driver 130, a data line 140, and a display panel 150. The display panel 150 includes a pixel 152. The scan driver 110 and the data driver 130 are disposed on the display panel 150 with the COG technology.
The scan driver 110 is coupled to a power voltage Vss. The scan driver 110 sequentially outputs a scan driving signal Sscan(n) according to a starting signal ST, a clock signal CK, and a clock signal XCK, where n is a positive integer. The scan driving signal Sscan(n) sequentially activates the pixel 152 in each row via the scan signal line 120. The data driver 130 inputs an image data to the pixel 152 via the data line 140 to generate a corresponding display frame.
Referring to FIG. 2, a schematic diagram of a scan driver is shown. Furthermore, the scan driver 110 includes a number of shift register units 112. Each shift register unit 112 is coupled to the power voltage Vss. The first level shift register unit 112 outputs a scan driving signal Sscan(1) according to a starting signal ST, a clock signal CK and a clock signal XCK. The second level shift register unit 112 outputs a scan driving signal Sscan(2) according to the scan driving signal Sscan(1), the clock signal CK and the clock signal XCK. Likewise, each level shift register unit 112 sequentially outputs a corresponding scan driving signal Sscan(n).
Referring to FIG. 3, a schematic diagram of a clock signal is shown. The duty cycle of the clock signal CK and the duty cycle of the clock signal XCK are 50%. The clock signal CK and the clock signal XCK can not at enabled level or non-enabled level at the same time.
The shift register unit 112 is made from a-Si thin film transistors. Since the a-Si thin film transistors have low mobilityso that the operating frequency of the scan driver 110 is restricted, thus a correct scan driving signal can not be outputted.
Referring to FIG. 4, a timing diagram of a conventional the scan driving signal is shown. Since the a-Si thin film transistor has low mobility, when the scan driver 110 is applied in a high-resolution liquid crystal display, the scan driver 110 is unable to output a correct scan driving signal.
For example, when the starting time of the scan signal line 120 is 5 us, the scan driver 110 still generates a scan driving signal beyond the starting time, causing error to the liquid crystal display and affecting the quality of display frame.
Besides, the shift register unit 112 occupies a large area and is difficult to be disposed, thus making the design of the circuit layout more difficult.

Liquid crystal display and shift register unit thereof


A compilation system can define, at compile time, the data blocks to be managed by an Even Driven Task (EDT) based runtime/platform, and can also guide the runtime/platform on when to create and/or destroy the data blocks, so as to improve the performance of the runtime/platform. The compilation system can also guide, at compile time, how different tasks may access the data blocks they need in a manner that can improve performance of the tasks.

Due to hardware scaling and low-power requirements, new processor and system architectures are being investigated, designed, and developed for exascale and extreme-scale computing. As a common theme, these architectures have a large numbers (e.g., tens, hundreds, or thousands) of cores that can react heterogeneously to their environment, and may be constrained by their global energy consumption. The computing devices may be operated at "near threshold voltage" (NTV), as lowering supply voltage can produce a quadratic improvement in power efficiency of computing devices with generally only a linear slowdown in throughput. Consequently it is possible to get improved power utilization as long as an increase in parallelism can be found to offset the linear slowdown. Another important consequence of lowering the supply voltage near threshold is that variations in device performance are exacerbated. Thus, beyond any intrinsic imbalance from the application itself, the hardware often creates imbalance.
The need for extracting more concurrency, reducing synchronization, and addressing the hardware imbalance generally imposes tall requirements on the software. The software to be executed desirably should be as parallel as possible to take advantage of the cores, and/or adaptable to changing core capabilities, and desirably should avoid wasting energy or should minimize wasted energy.
One way to address this problem is to depart from the Bulk-Synchronous Programming (BSP) model. While BSP model has promoted parallelism by enabling simple programming models such as loop parallelism and Single Program Multiple Data (SPMD) computations, the model may stand in the way of amounts of parallelism sought out. First, bulk synchronizations (across iterations of a "for" loop, for instance) often express an over-approximation of the actual dependences among computation instances (whether they are tasks or loop iterations). Also, synchrony often results in a loss of parallelism and a waste of energy, since cores spend a portion of their time waiting for some condition to occur (e.g., a barrier to be reached by other cores, a spawned task to return, etc.).
Event-driven task (EDT) model is emerging as an effective solution for new extreme-scale architectures. In this model, programs may be written as graphs of event-driven tasks, and can be asynchronous and non-bulk. Tasks are "scheduled" for asynchronous execution and they become runnable whenever their input data is ready. In this model, the more accurate the inter-task dependences are with respect to the semantics of the program, the more parallelism can be exposed. This model can improves dynamic load balancing, which makes it an attractive choice for extreme-scale systems, especially, near threshold computing (NTC) systems.
It is impractical, however, to expect programmers to write directly in the EDT form; the expression of explicit dependences between tasks is cumbersome, requiring a significant expansion in the number of lines of code, and making the code opaque to visual inspection and/or debugging. Therefore, in general a high-level compiler and optimization tool is a key component of an extreme-scale/exascale software stack, to attain performance, programmability, productivity, and sustainability for such application software.
Previously Published and Commercialized Version of R-Stream™ Compiler
A previously published and commercialized version of R-Stream™ (referred to as "Published R-Stream™") is an example of a source-to-source automatic parallelization and optimization tool targeted at a wide range of architectures including multicores, GPGPU, and other hierarchical, heterogeneous architectures including exascale architectures such as Traleika Glacier. Without automatic mapping, the management of extreme scale features would generally require writing longer software programs (having more lines of code), thus requiring more effort to produce software, and such programs may be less portable, and may be error-prone. Published R-Stream™ provides advanced polyhedral optimization methods and is known for features that can transform programs to find more concurrency and locality, and for features that can manage communications and memory hardware explicitly as a way of saving energy.
Published R-Stream™ is a high-level automatic parallelization tool, performing mapping tasks, which may include parallelism extraction, locality improvement, processor assignment, managing the data layout, and generating explicit data movements. Published R-Stream™ can read sequential programs written in C as input, automatically determine the mapping of the code portions to processing units, based on the target machine, and output transformed code. Published R-Stream™ can handle high-level transformations described above, and the resulting source code output by Published R-Stream™ generally needs to be compiled using a traditional low-level compiler.
Published R-Stream™ typically works by creating a polyhedral abstraction from the input source code. This abstraction is encapsulated by a generalized dependence graph (GDG), the representation used in the Published R-Stream™ polyhedral mapper. Published R-Stream™ can explore an unified space of all semantically legal sequences of traditional loop transformations. From a statement-centric point of view in the polyhedral abstraction, such a sequence of transformations can be represented by a single schedule (e.g., a rectangular parametric integer matrix). The Published R-Stream™ optimizer may add capabilities to express the mathematical link between high-level abstract program properties and variables in this unified space. These properties include parallelism, locality, contiguity of memory references, vectorization/SIMDization, and data layout permutations.
Event-Driven Task (EDT) Based Runtimes/Platforms
There are several EDT-based runtimes (generally referred to as EDT platforms) that are being developed in the community for exascale systems such as Open Community Runtime (OCR), Concurrent Collections (CnC), SWift Adaptive Runtime Machine (SWARM), Realm, Charm++, and others. We have developed a hierarchical mapping solution using auto-parallelizing compiler technology to target three different EDT runtimes, namely, OCR, CnC, and SWARM. Specifically, we developed (1) a mapping strategy with selective trade-offs between parallelism and locality to extract fine-grained EDTs, and (2) a retargetable runtime API that captures common aspects of the EDT programming model and allows for uniform translation, porting, and comparisons between the different runtimes. We also developed a generic polyhedral compilation approach to compile programs for execution of EDT platforms.
OCR
OCR is an open-source EDT runtime platform that presents a set of runtime APIs for asynchronous task-based parallel programming models suited for exascale systems. The main paradigms in OCR are: (1) Event-driven tasks (EDTs), (2) Data Blocks (DBs), and (3) Events. All EDTs, DBs, and events have a global unique ID (GUID) that identifies them across the platform. EDTs are the units of computation in OCR. All EDTs need to declare a set of dependencies to which DBs or events can be associated. An EDT does not begin execution until all its dependencies have been satisfied. EDTs are intended to be non-blocking pieces of code and they are expected to communicate with other EDTs through the DBs (which are the units of storage) and events. All user data needs to be in the form of DBs and to be controlled by the runtime since the runtime can relocate and replicate DBs for performance, power, or resilience reasons.
Events provide a mechanism for creating data and control dependencies in OCR. An event can be associated with a DB or can be empty. An event that is associated with a DB can be used to pass data to the EDTs waiting on that event. This dependence can be understood as control+data dependence. An event without a DB associated therewith can be used to trigger EDTs waiting on the event. This dependence can be understood as control dependence. Pure data dependence can be encoded by attaching a DB in a dependence slot to an EDT.
A compiler generally creates an OCR program by constructing a dynamic acyclic graph of EDTs, DBs, and events. To this end, a compiler such as Published R-Stream™ can generate tasks (EDTs) and events from the specified program source code. Data blocks, however, generally need to be defined in the source code. Moreover, various known compilation and manual techniques that can guide the creation of data blocks by the EDT runtime/platform do not guide the EDT platform as to when the DBs may be created and/or destroyed. The known techniques also do not customize access to the DBs based on their usage by the tasks, and rely simply on the access mechanisms provided by the EDT runtime/platform. This can limit the performance of the EDT platform while executing a platform, e.g., in terms of speed of execution, memory load, and/or power and/or energy consumption.

Systems and methods for automatic data management for an asynchronous task-based runtime


Disclosed is a circuit for preventing damage to a controllable switching circuit as a result of a reverse recovery current originating from a rectifier circuit coupled to the controllable switching element during recovery of the rectifier circuit. The damage prevention circuit includes a reactive impedance circuit coupled in parallel with the rectifier circuit for controlling a reverse recovery current from the rectifier circuit during recovery of the rectifier circuit. A second controllable switching element is employed to direct the reverse recovery current to the reactive impedance circuit in response to recovery of the rectifier. The second controllable switch also directs the reverse recovery current from the reactive impedance circuit to a load, wherein the reverse recovery current may be safely diminished.

1. Technical Field
The present invention generally relates to power supply circuits and in particular to voltage regulated power supplies for semiconductor based electronics. More specifically, the present invention provides a switching regulator with reduced reverse recovery currents.
2. Description of the Related Art
Power processing is an important feature in most electrical equipment. Differences in voltage and current requirements for various applications have resulted in the design of specific power converters to meet these requirements. Generally, power conversion involves the process of converting alternating current (AC) to direct current (DC) where converting the DC of one voltage level to the DC of another voltage level or both.
Linear regulators and switching regulators are the two basic varieties of power or voltage regulated converters. Although the switching regulator is not new concept, this type of regulator was not made practical until fast-switching high voltage transistors, low loss ferrite materials, and metallic glass materials became available. These developments allowed for practical and reliable construction of switching regulators.
Significant differences between linear and switching regulators include efficiency, size, weight, thermal requirements, response time, and noise characteristics. Switching regulators are generally preferred over linear regulators.
Switching regulators are commonly classified as one of three basic topologies: (1) buck; (2) boost; and (3) buck-boost. These switching regulators may be constructed from various arrangements of a switch, a diode, an inductor, and a capacitor.
FIGS. 1A-1C illustrate schematic diagrams of basic switching regulators well known in the prior art. FIG. 1A depicts a boost converter; FIG. 1B illustrates a buck converter; and FIG. 1C depicts a buck-boost converter. All three of these switching regulators are well known in the prior art. Each of these regulators has a switch S1, inductor L1, diode D1, and capacitor C1. A load 10 is coupled in parallel with the capacitor C1.
Referring again to FIG. 1A, inductor L1, diode D1, and capacitor C1 are connected in series to supply voltage Vs in the boost converter. Diode D1 serves as the rectifier in this circuit. Load 10 is connected in parallel with capacitor C1. Point P is connected to the negative pole of supply voltage source Vs by switching element S1. Switching element S1 preferably is a transistor, such as a metal oxide semiconductor field effect transistor (MOSFET). By switching the MOSFET into alternating on and off states, the voltage across capacitor C1 and load 10 will be higher than supply voltage Vs. As a result, this switching regulator functions as a voltage increasing circuit.
Since capacitor C1 will be positively charged on the side or plate facing diode D1, diode D1 will be biased in the reversed direction each time switching element S1 is in the on-state. Before the diode D1 blocks in the reverse direction, a charge stored during its "on" state in the forward direction gives rise to a reverse recovery current during the diode reverse recovery time. "Reverse recovery time" is the time that it takes to turn off a forward-biased diode through dissipating the stored charge in the diode.
More specifically, a boost converter typically involves the output rectifier being turned off directly by the MOSFET switch without a limiting impedance in series with the MOSFET switch. As the MOSFET switch turns on, the inductor acts as a current source and the MOSFET switch shifts the current from the output rectifier through the MOSFET switch itself. As the current in the rectifier drops to zero, the rectifier does not immediately shut off because charge is stored in the rectifier device. During the reverse recovery time, the rectifier actually conducts in the reverse direction, resulting in a reverse recovery current. In a boost topology, the output rectifier is connected directly to an output capacitor. Consequently, when the MOSFET switch turns on and reverse recovers the rectifier, the MOSFET switch is effectively turning on into the capacitor. In such situations the MOSFET switch may be subjected to large currents, thus possibly damaging the MOSFET switch.
The amount of reverse recovery current that may occur during recovery of the rectifier may be limited by: (1) the stored charge in the rectifier, which is dependent on device characteristics and operating current and (2) the potential reverse recovery current, which is dependent on switch turn on rate, output voltage, and output impedance. Depending on the switching regulator requirement, reverse recovery current problems may be solved by employing a fast rectifier and a switch capable of absorbing the reverse recovery current. This solution works for low voltage applications, such as applications which employ less than fifty volts.
Many applications however may require switching regulators with a high voltage output, such as three-hundred-ninety volts. In such a situation, reverse recovery currents are still a problem that must be dealt with in constructing efficient and reliable switching regulators.
Therefore, it would be desirable to have a switching regulator in which a reverse recovery current may be reduced or eliminated to avoid damaging the switch.

Zero current switching reverse recovery circuit

International Business Machines Corporation