A semiconductor memory device includes a memory cell array having a plurality of memory cells, a redundancy cell array having a plurality of redundancy cells, and a detection circuit which detects a bad bit line at an end of a bad column of the memory cell array. The semiconductor memory device further includes a repair circuit which repairs the bad column of the memory cell array by use of the redundancy cell array and repairs an adjacent column which lies adjacent to the bad column on the bad bit line side detected by the detection circuit by use of the redundancy cell array.

1. Field of the Invention
This invention relates to a semiconductor memory device, and more particularly, to a NAND flash memory in which the RD of a bad column is repaired by using a BIST (built in self test) function.
2. Description of the Related Art
At present, in a NAND flash memory, a bad column can be repaired by use of a redundancy cell array by using the BIST function (for example, refer to Jpn. Pat. Appln. KOKAI Publication No. 2002-269997). As a result, the simultaneous measurement can be performed for a large number of devices, the test time consumed by the measurement can be reduced and the test cost can be lowered.
However, when a bit line (BL) at the end of the column becomes bad, it is necessary to perform the RD repair process of the adjacent column on the bad bit line side according to an instruction manual. This is because a bit line which lies at the end of the column and is open gives a bad influence on the sense operation at the read time for the adjacent column. Therefore, at present, whether the bit line at the end of the column is open or not is checked according to an input/output (I/O) signal of a tester. If the bit line at the end of the column is open, an adjacent column on the side of the bit line which is open is repaired by use of a redundancy cell array according to an instruction manual by using a tester. If this method is used, it becomes impossible to simultaneously measure a large number of devices and it becomes necessary to use a high-performance tester, and therefore, there occurs a problem that the test time is lengthened and the test cost is raised.

Semiconductor memory device in which redundancy (RD) of adjacent column is automatically repaired


An analysis-by-synthesis linear predictive speech coder is described. This speech coder has a synthesis part including an adaptive codebook for generating an adaptive excitation, means for generating a multi-pulse excitation and means for generating a transformed binary pulse excitation. The multi-pulse excitation generating means comprises means for generating pulses in restricted pulse positions. The multi-pulse excitation and the transformed binary pulse excitation are combined.

An analysis-by-synthesis speech coder [1] consists of three main components in the synthesis part, namely a linear predictive coding (LPC) synthesis filter, an adaptive code book and some type of fixed excitation. The synthesis of the speech is done by filtering an excitation vector through the LPC synthesis filter to produce the synthetic speech signal. The excitation vector is formed by adding together scaled versions of vectors coming from the adaptive code book and the fixed excitation. The analysis part of an analysis-by-synthesis coder consists mainly of the LPC analysis and the excitation analysis. The excitation analysis is a search for the indices or other parameters for the excitation, e.g. indices for the code book, gain parameters for the excitation or the amplitudes and positions for excitation pulses.
The used excitation structure in an analysis-by-synthesis speech coder is essential for the quality of the reconstructed speech, the complexity of the search and the robustness to bit errors. To achieve high quality the excitation needs to be rich, i.e. contain both pulse-like and noise-like components. To achieve low complexity the excitation needs to be somewhat structured, due to the fact that the search for the excitation code tends to be of low complexity in a structured code book. To achieve high robustness in a mobile radio environment the bit error sensitivity for the unprotected bits of the excitation code must be low.
To achieve excitation richness so called mixed excitation procedures have been proposed [2-8]. The mix usually consists of pulse and noise sequences. Pulse-like excitations are needed in onsets, plosive and voiced sections of the speech. Noise-like sequences are needed for unvoiced sounds.
To achieve low complexity structured excitation several methods have been proposed. Multi-pulse excitation (MPE) has been described in [9] and consists of pulses described by a position and an amplitude. Regular pulse excitation (RPE) has been described in [10] and consists of a sequence of regularly (equidistant) spaced pulses described by a grid (position of the first pulse) and pulse amplitudes. Transformed binary pulse excitation (TBPE) is described in [11-12] and consists of a binary sequence of pulses that are transformed by a shaping matrix to obtain a gaussian-like sequence of regularly spaced pulses. Vector sum excitation (VSE) is described in [13] and consists of a number of basis vectors that are combined into an output vector. The basis vectors are multiplied with either +1 or -1 and summed to form the excitation vector. Low complexity search methods exist for all these structured excitations.
To achieve robustness protection of the most significant bit [14], index assignment [15] and phase position coding [16] have been proposed.

Analysis-by-synthesis linear predictive speech coder with restricted-position multipulse and transformed binary pulse excitation


A cover-gasket assembly for a hard disk device which comprises a gasket applied to a predetermined position of a cover for the hard disk device, wherein the gasket is formed essentially of a cured product of a fluorosilicone rubber composition. The assembly is particularly excellent in sealing property against permeation of water vapor, and can be used extremely effectively for hard disk devices for handy office-automation apparatuses such as laptop or pocket-size personal computers, word processors and the like which are expected to be used under various temperature and humidity conditions.

1. Field of the Invention
The present invention relates to a cover-gasket assembly obtained by direct formation and adhesion of a rubber gasket onto a cover member for a hard disk device.
2. Description of the Prior Art
A hard disk device generally comprises hard disks, namely, disks of an aluminum alloy or the like coated with a magnetic material which are enclosed in a sealed container, and magnetic heads each disposed close to the disk, with an about 0.1- to 0.5-.mu.m gap therebetween, for recording and reproduction of information into and from the disks.
If dust is generated in the sealed container or comes into the container from the outside, therefore, magnetic surfaces of the disks or the magnetic heads can be broken. In order to obviate such troubles, an air circulator comprising a high performance filter is installed in the sealed container to catch dust, whether generated internally or coming from the outside, thereby keeping clean air inside the container.
For preventing the penetration of dust or the like from the outside of the sealed container, however, any gap between a cover and a body of the container must be sealed with a gasket. Therefore, it is necessary for the gasket to have both cleanness such that the gasket itself does not generate dust or the like, and sealing properties sufficient for preventing the external penetration of dust or the like.
As the known gasket of this type, there have hitherto been gasket members molded from, or die-cut from a molded sheet of, neoprene rubber, urethane rubber, silicone rubber, nitrile-butadiene rubber or the like, and gasket members die-cut from foam sheets of these rubbers, polyolefin (e.g., polyethylene) or the like.
In use of these conventional gaskets for constructing a cover-gasket assembly, it has been a common practice to store the gasket with a release paper attached thereto through a pressure sensitive adhesive and thereafter adhere the gasket to a predetermined position of a cover member for a hard disk device by removing the release paper, or to adhere the gasket to the cover member with an adhesive. The use of a pressure sensitive adhesive or an adhesive has been the cause of such troubles as staining of the cover for the hard disk device, generation of dust inside the hard disk device, and the like.
In addition, accurate positioning in adhering the gasket member to a predetermined position of joint between the cover member and the container body of a hard disk device is extremely difficult to accomplish and requires skill, leading to higher manufacturing costs of cover-gasket assemblies.
Furthermore, production of the die-cut gaskets needs cutting dies, and inevitably generates waste sheets (cutting wastes) which cannot be utilized. Thus, there arise an added increase in production cost and difficulties associated with disposal of waste sheets.
The molded gaskets, on the other hand, not only need molds for the production thereof, leading to high production costs, but also have the disadvantage that an unsatisfactory deflashing upon molding will cause generation of dust in the hard disk device.
In consideration of the above, the present inventors have made a proposal to apply a liquid addition-curable type silicone rubber composition, as a gasket, directly to a joint portion of a cover for a hard disk device (Refer to U.S. Pat. No. 4,950,521 and U.S. Pat. No. 5,147,691). According to the proposal, the gasket is formed without using a pressure sensitive adhesive, an adhesive or the like; therefore, the problem of generation of dust inside the hard disk device can be obviated effectively. In addition, neither a cutting die nor a mold is used for obtaining the gasket, which is advantageous economically and offers freedom from the generation of cutting wastes, flashes or the like. Thus, the gasket according to the proposal is highly advantageous over the conventional gaskets.
However, in recent years there is a trend toward the use of hard disks with a sputtered magnetic film thereon and, in addition, the head-disk gaps have come to be set extremely narrow. As a result, there have been an increasing number of cases where troubles at head-disk gaps are caused not only by dust but also by bleedings, bloomings or condensates of volatile components coming out of the gasket material or the like. Of common gasket materials, silicone rubber is said to be the least liable to cause these troubles. Even in the case of silicone rubber gaskets, however, ordinary cured products of silicone rubber have the problem that low molecular weight siloxanes contained in the silicone rubber are evaporated and diffused in the hard disk device and are thereafter recondensed in head-disk gaps, leading to insufficient floating of the head above the disk surface and, eventually, to such troubles as head crash and destruction of magnetic disk surfaces.
Besides, silicone rubbers have comparatively high moisture permeability coefficients on the order of 100 g.mm/m.sup.2.24 hr, and are unsatisfactory as to sealing properties against permeation of water vapor. Therefore, use of a silicone rubber gasket for a cover of a hard disk device restricts the environments in which the hard disk device can be used.

Cover-gasket assembly for hard disk device


A hand held aerosol actuator involving an aerosol source and a chamber having walls defining a constriction aperture. The aerosol source communicates with the chamber and directs an aerosol dose along an axis into the chamber. The constriction aperture is coaxial with the exit orifice and is dimensioned such that the respirable mass of the aerosol dose is increased relative to the respirable mass of an aerosol dose expelled through a like actuator not having the constriction aperture.

1. Field of the Invention
This invention relates to actuators for use in connection with medicinal aerosol formulations.
2. Description of the Related Art
Pulmonary disorders such as asthma, chronic bronchitis, emphysema, and chronic obstructive pulmonary disease are often treated with drugs contained in medicinal aerosol formulations. Such formulations are commonly delivered using a metered dose inhaler ("MDI") that is designed to expel a dose of the drug in a form that can be inhaled into the lung, where the drug can exert its desired local therapeutic effect. With MDIs involving propellant based formulations the dose is expelled at a high velocity and in the form of particles or droplets from which the propellant preferably evaporates prior to inhalation. With many such MDIs a significant fraction of the expelled dose does not reach the lung; rather it is deposited in the mouth, the throat, or the upper airways where it is not therapeutically effective.
The turbulent nature of the fluid flow in an aerosol actuator when taken together with the presence of particles (and the variable size of such particles) in the aerosol dose makes difficult the design of improved actuators. Devices have been designed to increase the fraction of the expelled dose that can reach the lungs. Spacers, which allow the expelled dose to decelerate and allow time for evaporation of propellant, have been used to some advantage. These devices, however, are rather large and relatively inconvenient. U.S. Pat. No. 5,115,803 (Sioutas) describes a device that uses the energy of the expelled dose to create shear forces that break up particle agglomerates, thereby increasing the fraction of the drug that is present in the form of particles of respirable size. This device also decelerates the particles such that they are present in the form of a cloud that can be inhaled. Other problems have been addressed through actuator design. For example, U.S. Pat. No. 5,048,729 (Pritchard) describes an aerosol dispenser involving an applicator that includes a frustoconical diverter with a small orifice of diameter 0.5 mm facing a valve orifice. Aerosol droplets are said to predominantly pass through the orifice, decelerate, and be inhaled, while the propellant gas is predominantly diverted out of the dispenser.

Minnesota Mining and Manufacturing Company


A virtual memory management system for a vector based processing system detects early page or segment faults allowing pipelined instructions to be halted and resumed once the pages or segments required for a job are available in main storage. A multiplier is used for stride accesses, and min and max registers are used for gather/scatter instructions to provide a range of addresses to be accessed during a job. These ranges are determined early enough in execution of instructions related to a job to allow saving the state of the processor and resuming execution of the instructions once the data is available in main storage.

Many scientific data processing tasks involve extensive arithmetic manipulation of ordered arrays of data. Commonly, this type of manipulation or "vector" processing involves performing the same operation repetitively on each successive element of a set of data. Most computers are organized with an arithmetic unit which can communicate with a memory and with input-output (I/O). To perform an arithmetic function, each operand (numbers to be added, subtracted or multiplied or otherwise operated upon) must be successively brought to the arithmetic unit from memory, the functions must be performed, and the result must be returned to the memory. Machines utilizing this type of organization, called scalar machines, have been found inefficient for practical use in large scale vector processing tasks.
In order to increase processing speed and hardware efficiency when dealing with ordered arrays of data, vector machines have been developed. A vector machine is one which deals with ordered arrays of data by virtue of its hardware organization, rather than by a software program and indexing, thus attaining higher speed of operation. One such vector machine is disclosed in U.S. Pat. No. 4,128,880, issued Dec. 5, 1978 and incorporated herein by reference. The vector processing machine of this patent employs one or more registers for receiving vector data sets from a central memory and supplying the data to segmented functional units, wherein arithmetic operations are performed. More particularly, eight vector registers, each adapted for holding up to sixty-four vector elements, are provided. Each of these registers may be selectively connected to any one of a plurality of functional units and one or more operands may be supplied thereto on each clock period. Similarly, each of the vector registers may be selectively connected for receiving results. In a typical operation, two vector registers are employed to provide operands to a functional unit and a third vector register is employed to receive the results from the functional unit.
Further vector type machines are described in U.S. Pat. No. 4,661,900, issued Apr. 28, 1987 and incorporated herein by reference wherein multiple processors are each connected to a central memory through a plurality of memory reference ports. The processors are further each connected to a plurality of shared registers which may be directly addressed by the processors at the faster access rates commensurate with intraprocessor operation. A vector register design provides each register with at least two independently addressable memories, to deliver data to or accept data from a functional unit.
A better memory architecture is desired for vector computers to perform well. Many modern operating systems and application programs assume and rely on virtual memory functions. In a virtual memory organization, programs running as jobs in a computer identify data by means of a virtual address. These addresses must be mapped or translated by the computer into real addresses to find the data identified by the virtual address. The real address corresponds to real storage, such as fast physical random access memory used by the computer. This mapping must be done quickly so the processors do not have to wait long for the data. Some computers use a small associative mapping in which a table of pairs of real and virtual addresses is accessed in one step. This is fairly expensive to implement in hardware, so it is usually combined with a complete table of virtual and real addresses residing in main memory and managed by the operating system. Such tables take longer to search and find the corresponding address given one of the virtual or real addresses.
In virtual memory organizations, data is organized into blocks, referred to as segments. Some systems use segments of varying lengths, while others may use segments of one or more fixed lengths. Since the real storage is usually much smaller than the virtual address range, blocks of data are transferred back and forth between real storage and a secondary storage such as disk drives, tape drives, optical storage and other slower, cheaper forms of long term storage. The blocks of data are transferred back and forth between real and secondary storage in accordance with whether the computer will likely need the data in the near future, or whether other data will be needed sooner that is not yet in real storage. The virtual address structure in such memory organizations comprises a segment portion and an offset within the segment portion directly pointing to the address of the data. Some systems use segments of varying lengths, making management of the memory system more complex.
A major criterion used for evaluating a memory addressing organization or architecture is performance. In many cases, the value of an architecture feature can be judged in terms of clock periods gained or lost when executing a sequence of instructions. However, features of the memory system organization often affect performance in ways that only can be measured on a larger scale. Large blocks of virtual memory address ranges compete for the same real memory resources. Contending requirements must be arbitrated and managed efficiently by the operating system, and such management profoundly affects system performance.
Virtual memory organization provided by operating systems are well known in the art for their ability to optimize the use of memory in a hierarchical memory system. Virtual memory managers can produce system memory access speeds that approach the access speed of the fastest memory components in the system. They do this by keeping active blocks such as pages in real memory which has the fastest access speed, and as the blocks of data become inactive, migrating them back to lower speed memory. When a job tries to access data and the corresponding virtual address does not have a real address assigned to it, a page fault is generated. On page faults, the virtual memory manager transfers data contained in that page to real memory. This can take a significant number of clock periods to occur.
Vector processing supercomputers have special memory needs that are not met by standard virtual memory system. Vector machines employ pipelining techniques to hide memory latency through the prefetching of instructions and data.
The use of pipelining in vector machines places an additional burden on an operating system. System exceptions can incur substantial time penalties as the operating system software attempts to determine the state of the system at the time of the exception. Additional hardware may be required to track the state of the machine through all stages of pipelining. The difficulty of determining (and saving) the state of a pipelined vector machine has led designers of past systems to minimize hardware impact by designing many exceptions as non-recoverable. A non-recoverable exception results in aborting a job because correct execution cannot be resumed.
Demand-paged virtual memory systems are difficult to implement in a vector supercomputer. In conventional virtual memory systems, the virtual to real memory mapping tables reside in main or real memory. For reasonable performance, a recently-used subset of memory mapping information is cached via a translation lookaside buffer (TLB). This requires extra hardware to control the loading to the buffers from memory-resident page tables, or special traps and privileged instructions have to be provided to support a software-managed lookaside buffer effectively. A second drawback in virtual memory systems lies in the fact that, even with lookaside buffers, memory mapping hardware may require additional pipeline stages. It is necessary to translate virtual addresses to real address, and to check for translation faults caused by unmapped addresses. Finally, addressing exceptions (traps) occur at times that are difficult for the hardware to handle. Potentially any memory reference can result in a trap. This causes problems in a highly pipelined processor where a trap condition is not detected until several clock periods after an instruction issues. Particularly difficult cases occur with vectors where a trap can occur in the middle of a vector load or store (or multiple traps within the same load or store). While not impossible, handling addressing exceptions adds to hardware complexity, and can easily lead to reduced performance.
It is evident that there is a need for a memory management system for a vector based computer system that provides some of the mapping capabilities of virtual memory management, but is tailored for a vector processing environment. There is a need for such a system to anticipate potential page faults near the beginning of execution of an operation on a vector. Such a system should be designed such that addressing errors are detected as soon as possible after instruction execution begins.

Virtual memory system for vector based computer systems


A system and method including registering state information capable of being published by an Event Publication Agent (EPA) using a Media Feature Tag according to Session Initiation Protocol (SIP); sending a Publication Rule for target state information from a Ruler to an associated EPA; routing the Publication Rule to the EPA; receiving, by the EPA, the Publication Rule; performing publication to an Event State Compositer (ESC) according to the Publication Rule; requesting to update or cancel the Publication Rule; receiving the request from the Ruler and modifying the Publication Rule accordingly; performing publication from the EPA to the ESC according to the modified Publication Rule; sending a Publication Rule synchronization request from the Ruler to the EPA using an event package; sending a response message to the Publication Rule synchronization request from the EPA; and sending notification of further updates of the Publication Rule from the EPA.

1. Field of the Invention
The present invention generally relates to Presence Services, and more particularly to a system and method for controlling an operation of a Presence Source through external objects including a Presence Server.
2. Description of the Related Art
Conventionally, a Presence Service is a service that appropriately provides a set of objects with, for example, information about an ability and willingness of communication and a current status of a user or group corresponding to a target of interest, through a set of devices. The objects can detect the current status of the interest target based on received status information thereof, and can attempt contact with the interest target by selecting the best communication scheme.
FIG. 1 shows a Presence Service according to the prior art. A target of interest in the Presence Service is referred to as a Presentity. Information about the Presentity, i.e., Presence Information (PI), is published to a Presence Server 102 through Presence Sources 104. The Presence Server 102 composes the PI, generates the composed PI of the Presentity, and selectively sends notification of authorized PI to a subscribed Watcher 100 having an interest to the Presentity.
A signal flow between entities of Presence Service according to the prior art will be described with reference to FIG. 2A publication mechanism defined in Request for Comments (RFC) 3856 ("A Presence Event Package for the Session Initiation Protocol (SIP)", by J. Rosenberg, August 2004), is applied between the Presence Sources 104 and the Presence Server 102. The Presence Source 104 or Event Publication Agents (EPA) transfers the PI about the Presentity to the Presence Server 102 or an Event State Compositor (ESC) using a Session Initiation Protocol (SIP) PUBLISH message in steps 204 and 205, steps 208 and 209, and steps 210 and 211. The Presence Server 102 for performing a composition function for the PI is referred to as the ESC. Further, the Presence Source 104 for performing a function for providing the PI is referred to as the EPA.
On the other hand, a Presence Event Package defined in RFC 3856 is applied between the Watcher 100 and the Presence Server 102. The Watcher 100 requests the PI for the Presentity using an SIP SUBSCRIBE message for a Presence Event in steps 200 to 203.
The Presence Server 102 or a Presence Agent (PA) transfers the PI received from the Presence Source 104 or a Presence User Agent (PUA) to the Watcher 100 using a SIP NOTIFY message in steps 204, 208, and 210.
An example of formats of messages used for the signal flow of FIG. 2 is illustrated in FIGS. 3A to 3D. Messages capable of being sent in steps 200 to 213 correspond to (a) to (n) of FIGS. 3A to 3D, respectively.
The Presence Service as described above can be implemented in Open Mobile al.liance (OMA) Presence SIMPLE V1.0. The architecture of OMA Presence SIMPLE V1.0 for supporting a Presence Service according to the prior art is shown in FIG. 4.
In the conventional Presence Service architecture, the Presence Source 104 maintains up-to-date PI about the Presentity viewed from a point-of-view thereof and transfers the PI to the Presence Server 102 through a SIP PUBLISH message whenever the PI is updated or changed. The Presence Server 102 composes the PI received from the Presence Sources 104 according to a predefined mechanism and maintains up-to-date composed PI. Further, the Presence Server 102 properly distributes the PI according to predefined policy using a SIP NOTIFY message in response to a SIP SUBSCRIBE request using a Presence Event Package of the Watcher 100. The SIP SUBSCRIBE request using the Presence Event Package of the Watcher 100 is a request for receiving the PI whenever the PI is updated.
FIG. 5 shows an operation of the Presence Source 104 according to the prior art.
When the Presence Source 104 is enabled in step 500, the Presence Source 104 determines whether PI about the Presentity is present in step 502. If the PI is present, the Presence Source 104 proceeds to step 504 to publish the PI to the Presence Server 102. Then, if the published PI is updated in step 506, the Presence Source 104 proceeds to step 508 and publishes the updated PI to the Presence Server 102.
Accordingly, the following behaviors are observed in the Presence Source 104.
The behavior of the Presence Source 104 is implicit. In the Presence Service shown in FIG. 1, it is assumed that the Presence Source 104 constantly performs a proper operation. Because there is not a method for enabling or disabling the operation of the Presence Source 104, the behavior of the Presence Source 104 is implicit.
The behavior of the Presence Source 104 is also independent. The Presence Source 104 independently determines whether update of the PI about the Presentity is present. Whenever the PI is updated, the Presence Source 104 determines and performs publication. That is, because the Presence Source 104 independently performs a determination or control without an external request or control, the behavior of the Presence Source 104 is independent.
As described in PDM (Draft-Ietf-Simple-Presence-Data-Model-06, "A Data Model for Presence", by J. Rosenberg on Oct. 23, 2005), the above-described observations on the behaviors of the Presence Source 104 can be regarded negligible in the conventional architecture in relation to the existing purpose of the Presence Service for notification of the ability and willingness of communication using a set of devices of a predetermined user (i.e., Presentity). This is because, in the existing architecture, the PI is mostly composed of such discrete information as the communication ability and willingness, rather than continuous one. The Presence Sources for publication in the existing architecture are mostly configured with such persistent network entities as a user terminal or Home Subscriber Server (HSS). As such, the operation of the Presence Sources 104 is directly enabled/disabled and is independent.
However, as seen also in RPID (Draft-Ietf-Simple-Rpid-09, "RPID: Rich Presence Extensions to the Presence Information Data format", H. Schulzrine et al., Sep. 24, 2005), the observed behaviors of the Presence Source 104 have the following problems when it is considered that the inherent purpose of the Presence Service for transferring information about the communication ability and willingness of a Presentity is being extended to a mechanism for providing various information about the Presentity, such as the current status thereof.
The implicit behavior of the Presence Source 104 disables a selective PI request and publication for the PI. For example, if the Presentity desires to know a snapshot of a used device at a particular time, the Presentity should transfer a PI publication request to an associated Presence Source so the snapshot of the associated PI can be published. In the Presence Service shown in FIG. 1, the Watcher can selectively send a request for a particular part of the PI using a filter method as described in Draft-Ietf-Simple-Event-Filter-Funct-05, "Functional Description of Event Notification Filtering", H. Khartabil et al., Mar. 15, 2005. If the Presence Source responsible for publishing the associated information to the Presence Server 104 is not pre-activated, the Watcher cannot know the requested PI.
The independent behavior of the Presence Source 104 can cause an uncontrollable result. For example, when PI corresponding to a target of publication of a predetermined Presence Source is location information, the Presence Source 104 will publish the associated PI to the Presence Server 102 whenever the location information is updated. However, characteristics of quasi-continuous location information cause too frequent PI update and publication to give burden to an SIP based network and require high processing capability of the Presence Source 104 and the Presence Server 102. In RFC 3903 ("Session Initiation Protocol (SIP) Extension for Event State Publication", A. Niemi et al., October 2004), a mechanism is proposed in which the Presence Server 102 can indirectly control a publication rate of the Presence Source 104 using a method for adjusting a publication expiration interval and including a Retry-After SIP header in a 503 Server Unavailable SIP response. However, the method for adjusting the publication expiration interval is used only for controlling the publication rate to refresh PI, but is not used for updating the PI. The method using the Retry-After SIP header is applied only to the next publication. Thus, the methods proposed in RFC 3903 are very limited for use and cannot be a fundamental resolution.

System and method for providing a presence service


An example apparatus includes a controller operatively coupled to an electric actuator via a network. The controller is configured to obtain torque curve data over the network from the electric actuator, the torque curve data being associated with actuation of an electric motor of the electric actuator, the actuation to cause a flow control member of a motor-operated valve to move, the flow control member being mechanically coupled to the electric motor and being movable between an open position and a closed position. The controller is configured to determine an area under a torque curve based on the torque curve data, determine a variance between the area under the torque curve and an area under a reference curve, and generate a first control signal indicating that the electric actuator is healthy when it is determined that the variance does not exceed the variance threshold.

Motor-operated valves commonly include an electric actuator having an electric motor, and further include a flow control member (e.g., a disc, a ball, a plug, a piston, etc.) mechanically coupled (e.g., via a shaft) to the electric motor of the electric actuator. The electric motor can be actuated and/or commanded (e.g., via one or more electrical control signal(s)) to move (e.g., rotate, slide, etc.) the flow control member of the motor-operated valve between an open position and a closed position (e.g., an opening stroke, a closing stroke, etc.).
Some known electric actuators generate torque curve data in conjunction with the above-described actuation(s) and/or movement(s) of the electric motor and/or the flow control member. As used herein, the term "torque curve data" refers to data providing measured torque as a function of and/or correlated with measured position, with the measured torque corresponding to a torque of one of the electric motor, the shaft mechanically coupled to the electric motor, or the flow control member mechanically coupled to the shaft, and the measured position corresponding to a position of one of the electric motor, the shaft, or the flow control member. Torque curve data generated and/or stored by the electric actuator can be transferred to a computing device located remotely from the electric actuator for further analysis and/or post-processing.
Process control systems including such known electric actuators and computing devices typically analyze and/or post-process the torque curve data subsequent to the electric actuator becoming unhealthy, as can occur when one or more component(s) of the electric motor and/or, more generally, of the electric actuator fail(s), break(s), and/or otherwise cease(s) to operate or function according to its/their intended purpose.

Methods and apparatus for determining health status of electric actuators based on torque trend data


A soldering assembly comprises a heater, a lock member, and a bias member. The lock member is moveable relative to the heater, includes a ramp feature, and is configured to receive a tip or a tip holder. The bias member is configured to urge movement of the lock member away from a distal segment of the heater.

Soldering tools are used to manufacture a wide range of products. The working tip of a soldering tool often becomes oxidized and requires replacement. Replacement is usually accomplished by removing the working tip from the soldering tool, which often requires the use of tools and handling of ancillary parts such as nuts and screws. The use of tools and handling of ancillary parts add to manufacturing costs since tools must be procured and extra pieces of the ancillary parts needed in the event of inadvertent loss. Removal of the working tip can also require a person to handle the working tip or parts of the soldering tool which are normally too hot to handle. The person must then wait for the soldering tool to cool down to a safe temperature, which increasing manufacturing down time. Accordingly, there is a need for a soldering assembly that allows for rapid and convenient removal of a working tip.


The present invention has been made in order to manufacture a silicon semiconductor substrate used for a semiconductor integrated circuit device, higher in carrier mobility, especially in electron mobility, which is a carrier of an n-type FET, on a {100} plane as a main surface, and provides a silicon semiconductor substrate and a method for manufacturing the same, wherein the conventional RCA cleaning is employed without the use of special cleaning and the surface of the substrate is planarized at an atomic level to thereby decrease the surface roughness thereof without the use of the radical oxidation. The present invention provides a silicon semiconductor substrate comprising: a {110} plane or a plane inclined from a {110} plane as a main surface of the substrate; and steps arranged at an atomic level along a <110> orientation on the main surface.

A gate insulating film of an MISFET (Metal Insulator Semiconductor Field Effect Transistor) fabricated using a single crystal silicon wafer requires a high performance electric characteristics such as a low leakage current characteristic, a low interface state density and a high resistance to ion implantation and a high reliability. The main stream in techniques for forming a gate insulating film satisfying the requirements is a technique for formation of a silicon dioxide film (hereinafter also simply referred to as an oxide film) using a thermal oxidation. This technique is a so-called MOSFET (Metal-Oxide-Semiconductor Field Effect Transistor). With the thermal oxidation, in a case where a silicon wafer with a {100} plane as a main surface thereof, a good oxide film of a silicon interface characteristic, a dielectric breakdown voltage characteristic and a leakage current characteristic can be ensured. A major reason why a silicon wafers with a {110} plane or a {111} plane other than the {100} plane as a main surface is not used as a substrate of an integrated circuit device is that an interface state density of an oxide film formed on the {110} plane or the {111} plane is high. A wafer with a high interface state density is poor in electric characteristics such as a dielectric breakdown voltage characteristic and a leakage current characteristic.
Hence, a silicon wafer substrate on which MOSFETs are fabricated has been a wafer having a main surface having a {100} plane or an inclined plane with an off-angle of about 4 degrees against the {100} plane.
In a semiconductor device fabricated on a substrate having a {100} plane as a main surface, however, there has been a problem that a p-type FET has current driving ability, that is carrier mobility, about 0.3 time as large as an n-type FET. In recent years, there has been developed a method for forming a good quality insulating film without dependence on a plane orientation of a silicon wafer, that is a radical oxidation method, or a radical nitriding method (2000 Symposium on VLSI Technology, Honolulu, Hi., Jun. 13 to 15, 2000, "Advanced of Radical Oxidation for Improving Reliability of Ultra-Thin Gate Oxide"). With this method applied, a good insulating film can be formed on a wafer surface with a plane other than {100}.
Hence, there is highly feasible a semiconductor integrated circuit device fabricated using a silicon semiconductor substrate having a {110} plane as a main surface thereof on which a carrier mobility in a channel direction of MOSFET may be raised. The inventors fabricated a semiconductor device having a main surface of the {110} plane and evaluated characteristics thereof, whereby various kinds of findings were obtained.
The current driving ability of the above p-type FET on a substrate with a {110} plane is increased against the one on a substrate with a {100} plane by about 2.5 times, while the current driving ability of the n-type FET on a substrate with a {110} plane is reduced against the one on a substrate with a {100} plane, which is contrary to expectation. If the electron mobility in the n-type FET can be raised to a value equal to or more than that in a {100} plane, a semiconductor integrated circuit device using a substrate with a {110} plane will be practically and widely used.
There have effects on carrier mobility impurity scattering, phonon scattering (lattice vibration scattering), and surface roughness scattering. When the influences of these scattering are large, the carrier mobility is decreased. Electron mobility on a surface with a {100} plane is greatly affected by roughness of a silicon surface and it has been made definite that the worse the roughness, the lower the electron mobility (T. Ohmi et al.: IEEE Trans Electron Devices, vol. 137, p. 537, 1992). Thereafter, the following two methods have been proposed for the purpose to reduce the surface roughness. That is, (1) formation of an oxide film on a surface of a semiconductor substrate in an atmosphere including oxygen radicals (M. Nagamine et al., IEDM Tech. Dig. p. 593, 1998) and (2) a cleaning method for a substrate surface except for RCA cleaning (W. Kern et al.: RCA Review, vol. 31, p. 187, 1970).
In the radical oxidation adopted by the above method (1), by the synergistic effects that the oxygen radicals, which are oxidation species, have a high probability of attaching to projections on a silicon surface and oxygen ions of O+ and O2+ are attracted to the projections charged negatively, the projections are conceivably oxidized with priority, whereby the surface roughness is reduced. By the oxidation in a conventional atmosphere of dry oxygen, the surface roughness is degraded by about 20%, whereas by the radical oxidation, the surface roughness is reduced by about 40%.
The above cleaning method (2) has been disclosed in JP A No. 11-057636. Since a cleaning step with an alkali solution in the RCA cleaning, which has conventionally been widely used, degrades the surface roughness, the cleaning method disclosed in JP A No. 11-057636 is a cleaning process including no alkali solution and has an ability of removing particles, organic contaminant, and metallic impurities, equal to or more than the RCA cleaning. Since this new cleaning process is constituted of 5 (five) steps, the process is hereinafter referred to as five-step cleaning for short in the present specification.
The reason why the surface roughness is degraded in a cleaning step including an alkali solution in the RCA cleaning is that a portion with a weak Si—Si bond is preferentially etched by hydroxide ions (OH ions).
Of the above two methods for decreasing the surface roughness, the radical oxidation method (1) is a method for reducing the surface roughness, whereas the five step cleaning (2) is a method for suppressing roughening in the RCA leaning rather than a method for reducing a surface roughness. In fact, while the surface roughness is degraded by about 50% in the conventional RCA cleaning, the five step cleaning can restrict degradation of the surface roughness to 0% to 10%.
Since the surface roughness is reduced by the radical oxygen method, the surface roughness can be further reduced by repetition of the radical oxidation prior to formation of a gate oxide film, but the repetition may leads to an ill effect. The radical oxidation is conducted at a low temperature of the order in the range of from 300° C. to 500° C. At this temperature, an oxygen donor is formed to change electric resistivity in the interior of a substrate. If oxidation is performed at a temperature of 500° C. or higher, formation and growth of oxygen precipitation nuclei also occur in a surface layer of a substrate, which leads leakage current and dielectric breakdown of a gate oxide film.
To decrease the surface roughness of a silicon semiconductor substrate is to planarize the surface thereof at an atomic level. A mirror polished and cleaned surface of a silicon wafer having a specific crystal plane has numberless irregularities at an atomic level, which lead to surface roughness called microroughness. The microroughness is formed by generation of many microfacets different from the cutting plane by a chemical reaction of a chemical solution used in polishing and cleaning with a silicon surface.
Since a silicon wafer sliced so as to have a {111} plane as a cutting plane is easy to form a planar surface at an atomic level since a {111} plane itself is a facet plane. Y. J. Chabal et al. have publicly reported that dangling bonds (covalent bonds without counterparts) of silicon atoms at a surface are stabilized at terminating portions by joining hydrogen atoms thereto, thereby the surface being planarized (Y. J. Chabal et al., J. Vac. Sci. & Technol. Vol. A7, pp. 2104, 1989).
It has been made clear that a main surface of a substrate having a {111} plane as the main surface thereof is slightly inclined toward a [112] orientation or a [112] orientation by a few degrees, and is cleaned with an ammonium fluoride aqueous solution, whereby steps and terraces are formed on the surface at an atomic level with the result that the surface is allowed to be flat at an atomic level (H. Sakaue et al., Appl. Phys. Lett. Vol. 78, p. 309, 2001). There has been no report, however, that planarization of a mirror polished silicon substrate having a {100} plane as a main surface, which has been most widely used, is realized at an atomic level only by cleaning the substrate.
There has been a report that in an epitaxial silicon semiconductor substrate epitaxially grown on the main surface thereof having an orientation slightly inclined from a {100} plane, the surface roughness is reduced by forming steps and terraces on the main surface thereof (K. Izunome et al.: Jpn. J. Appl. Phys. Vol. 31, pp. L1277.1992). Besides, there has also been a report that steps and terraces are formed on a silicon semiconductor substrate by applying high temperature heat treatment in a hydrogen atmosphere to thereby reduce the surface roughness (O. Vatel et al,: Jpn, J, Appl. Phys. Vol. 32, pp. L1489, 1993). There has been no report, however, on planarization of a surface with a {100} plane at an atomic level to which the present inventors pay attention.
There have been many reports on planarization of a surface with a {100} plane by heat treatment under an ultra-high vacuum. It is difficult to introduce such a technique into a manufacturing process for a large diameter silicon substrate with a diameter of 200 mm or larger because of scale-up of a heat treatment furnace and decrease in productivity.
In aspects of manufacture and supply of silicon semiconductor substrates, an improvement on the surface roughness by the radical oxidation increases the number of the steps to thereby reduce productivity. In the current silicon substrate manufacturing process, it is general to adopt a process to apply the RCA cleaning after mirror polishing. Hereinafter, a silicon semiconductor substrate that is polished and cleaned is referred to as a mirror polished silicon semiconductor substrate. A silicon semiconductor substrate as a general term collectively includes an epitaxial silicon semiconductor substrate and the like. The surface roughness of a mirror polished silicon semiconductor substrate has a root mean square roughness (Rms) of the order of 0.12 nm. A device maker fabricating semiconductor integrated circuit devices applies the RCA cleaning to a silicon semiconductor substrate after accepting it. As described above, the RCA cleaning treatment generally leads to degradation of the surface roughness.
The Rms of a silicon semiconductor substrate after RCA cleaning in device makers is generally on the order of 0.18 nm. In a case where, in order to form a gate oxide film on the substrate, an oxide film with a thickness of the order of 5 nm is formed in a conventional dry oxygen atmosphere, the Rms of the interface is degraded to 0.22 nm. On the other hand, in a case where an oxide film with a thickness of the order of 5 nm is formed by radical oxidation after the radical sacrifice oxidation, the Rms is of the order of 0.08 nm, thereby the surface roughness being greatly reduced. While it could also be one method for decreasing the surface roughness to introduce the radical sacrifice oxidation step into a silicon semiconductor substrate maker, it leads to increase in number of steps with reduction in productivity. Accordingly, in a case of manufacturing a silicon semiconductor substrate used in fabrication of a semiconductor integrated device, it is necessary to manufacture a silicon semiconductor substrate low in surface roughness without applying sacrifice oxidation such as radical oxidation or special cleaning.

Silicon semiconductor substrate and its manufacturing method


A device includes a first thermally conductive substrate having a first patterned electrode disposed thereon and a second thermally conductive substrate having a second patterned electrode disposed thereon, wherein the first and second thermally conductive substrates are arranged such that the first and second patterned electrodes are adjacent to one another. The device includes a plurality of nanowires disposed between the first and second patterned electrodes, wherein the plurality of nanowires is formed of a thermoelectric material. The device also includes a joining material disposed between the plurality of nanowires and at least one of the first and second patterned electrodes.

The invention relates generally to heat transfer and power generation devices, and more particularly, to solid-state heat transfer devices.
Heat transfer devices may be used for a variety of heating/cooling and power generation/heat recovery systems, such as refrigeration, air conditioning, electronics cooling, industrial temperature control, waste heat recovery, and power generation. These heat transfer devices are also scalable to meet the thermal management needs of a particular system and environment. However, existing heat transfer devices, such as those relying on refrigeration cycles, are environmentally unfriendly, have limited lifetime, and are bulky due to mechanical components such as compressors and the use of refrigerants.
In contrast, solid-state heat transfer devices offer certain advantages, such as, high reliability, reduced size and weight, reduced noise, low maintenance, and a more environmentally friendly device. For example, thermoelectric devices transfer heat by flow of electrons and holes through pairs of p-type and n-type semiconductor thermoelements forming structures that are connected electrically in series and thermally in parallel. However, due to the relatively high cost and low efficiency of the existing thermoelectric devices, they are restricted to small scale applications, such as automotive seat coolers, generators in satellites and space probes, and for local heat management in electronic devices.
At a given operating temperature, the heat transfer efficiency of thermoelectric devices can be characterized by the figure-of-merit that depends on the Seebeck coefficient, electrical conductivity and the thermal conductivity of the thermoelectric materials employed for such devices. Many techniques have been used to increase the heat transfer efficiency of the thermoelectric devices through improving the figure-of-merit value. For example, in some heat transfer devices two-dimensional superlattice thermoelectric materials have been employed for increasing the figure-of-merit value of such devices. Such devices may require deposition of two-dimensional superlattice thermoelectric materials through techniques, such as molecular beam epitaxy or vapor phase deposition. However, such techniques are time consuming, are relatively expensive, are limited to small-scale applications, and require significant expertise.
Accordingly, there is a need to provide a thermal transfer device that has enhanced efficiency achieved through improved figure-of-merit of the thermal transfer device. It would also be advantageous to provide a device that is scalable to meet the thermal management needs of a particular system and environment.

Thermal transfer and power generation devices and methods of making the same


A system is disclosed in which a user's personal computer may access a variety of information regarding products and services, through a computer network, in real time. The computer network collects product/service information from various sources, such as gift stores, clothiers, computer dealers, etc. and formats the information in a recognizable manner to enable the information to be viewed by a user at the user's personal computer. The network performs a single search from a single search command from the user.

The present invention relates generally to a system for use in on-line shopping, and more particularly, to a computer system that enables a user to have real time access to product/service information and direct product/service ordering from multiple merchants.
On-line shopping is typically conducted through a network host that maintains product/service information from a variety of merchants, takes orders from the network host's customers and forwards the orders to the respective merchant. However, this is merely one step in a multiple step process. Before this transaction may take place, several preliminary steps must be accomplished. First, each participating merchant forwards product information and pricing to the network host for posting to the network to solicit purchasers. This product information and pricing is usually transferred to the network host through conventional mail, telephone service or by sending such information to the appropriate on-line address at the network host. The network host then compiles, classifies, sorts, stores and displays the product information on-line to network host customers that request such information.
For several reasons, the product information may vary from day-to-day. The above described process may involve a significant time lag between the time that the merchant sends the product information to the network host and the time the potential consumer receives the product information. Therefore, merchants must account for such a time lag and must provide conservative estimates on the product information. Merchants must anticipate market fluctuations in pricing and availability and must hedge against such market changes. For example, a merchant may send product information to the network host regarding a specific product. Customer demand for such a product may dramatically increase and more orders for the product may be placed with the merchant through the network host than was anticipated by the merchant. The merchant may then receive more orders for the product than the merchant can readily provide. Product orders must then be placed on back-order or remain unfilled indefinitely. The merchant is unhappy at his inability to fill the orders and receive the profits based on the orders received but unfilled. Customers are unhappy at not receiving their merchandise on a timely basis and may be forced to acquire such products elsewhere at a higher cost or they may forgo the purchase altogether.
Additional problems exist for the customer who wants to purchase a given product or service. Previously, such customers were required to "shop" one merchant at a time. A customer had to access the database of one merchant, collect information regarding the desired product or service, store the information, access another merchant's database and again collect information regarding the desired product or service. This process had to be repeated for each merchant. Thus, the process required the customer to "shop" all available merchants before deciding the merchant from whom the customer was going to purchase. This process is complicated by the fact that many customers may have vague or indefinite parameters defining the selection criteria and parameters. For instance, a customer may know that pants are required but may not be able to sufficiently narrow the criteria into styles of pants or name brands. Here, the customer would need to browse each individual merchant's wares and by that scan many undesirable pants. Additionally, as the customer successively "shops" individual merchants, the customer may learn to narrow or change the parameters for the search. The customer may then want to repeat the shopping already accomplished. The above described process is time consuming. Such time consumption can be especially important when accessing an on-line service that charges the user based on on-line time.
There is a need to provide product/service information for multiple merchants in real time to a potential customer that would otherwise not be available for weeks or months. In this age of daily market fluctuations, it is advantageous to a potential customer to be able to have accurate, real time information concerning product availability and pricing for multiple merchants. As product pricing and availability fluctuate and differ between merchants, the importance to the customer of being able to respond to those fluctuations and differences on a timely basis increases. A customer can decide in real time whether to purchase one product over another product or whether to purchase a product from one merchant over another merchant.
The present invention is designed to provide a user with real time product/service information, from a variety of merchants, in a format that is understandable and informative. The present invention is unique in that never before has there been a network system that conducts a search of multiple sources of shopping information, in substantially real time, and presents the results to the user in one organized presentation.
The present invention is a sophisticated computerized system by which various merchants may be electronically connected to a computer network such as the CompuServe.RTM. network. Value added software is provided at the network to assimilate the data collected from various and multiple merchants in real time, to place the data in an understandable format for preferably a single presentation to the user. The user receives the assimilated data from the various and multiple merchants through an electronic connection (via modems) between the user's computer and the network. A program on the user's computer can capture the formatted data supplied by the network and prepare it for display or analysis. In an alternate configuration the merchant is electronically connected to a regional host. The regional host is equipped to receive product/service information from the merchant. The regional host is then electronically connected to the computer network.
The system of the present invention has many advantages over known product/service information management methods. First, the present invention offers a "real time" picture of available products and/or services from multiple and varied merchants. Second, the present invention allows a merchant the ability to react in "real time" to the demand. Third, the present invention offers the capability to a user of acquiring various merchants' product/service information in one understandable format that is currently not available by other methods.
These and other advantages will be apparent from the following detailed description of the invention, drawings, and claims.


An improved structure of straight-out controllable ceramic valve of anti-freezing faucet, which is comprised by cover water-receiving valve seat with open bottom, cylinder water-controlling shaft bolt that one end is covered into shaft hole at center of water-receiving valve seat and a plurality of butterfly outlet control valves, wherein bottom of water-controlling shaft bolt has a protruding tongue embedding into top of bottom butterfly porcelain shard in order to adjust outlets of top and bottom porcelain shard; its features are as follows: an inlet channel extending to middle section of shaft bolt is made at middle section of bottom of water-controlling shaft bolt, horizontal through outlet channel is made at two sides of inlet channel. This straight-out water supply channel structure, because of ceramic valve of top porcelain shard, water can directly flow upward into inlet channel at middle section of the continuous shaft bolt when outlet of bottom porcelain shard is not closed properly, and then enter into pipe of faucet from outlet set around shaft hole at top of cover water-receiving valve seat via horizontal through outlet channel, so that this straight-out channel can supply water directly, no reduction of hydraulic pressure during supplying because of curve of water channel.

1) Field of the Invention
This invention relates to an improved structure of straight-out controllable ceramic valve of anti-freezing faucet, which is to set an inlet channel extending to middle section of shaft bolt from bottom to upward at middle section of bottom of water-controlling shaft bolt in water-receiving valve seat, and horizontal through outlet channel is also set at two sides of inlet channel so that water in ceramic valve can directly flow upward and enter into inlet channel at middle section of shaft bolt, and then, flow into water pipe of faucet from outlets set around top of water-receiving valve, therefore, such faucet can supply water smoothly without reduction of hydraulic pressure.
2) Description of the Prior Art
In recent years, the outdoor anti-freezing faucet connected out from ground has been equipped with ceramic valve instead of the traditional check copper bolt as control components to adjust water supply (please refer to FIG. 1), which is comprised by cover water-receiving valve seat 2 with outlet 21 at its side and cylinder water-controlling shaft bolt 3 with a protruding tongue 31 at bottom to embed into top of side-out top porcelain shard 41 so as to aim at outlet 411, 421 of top and bottom porcelain shard 41 &42 for adjustment, meanwhile, its top is covered into shaft hole 22 at middle section of top of water-receiving valve seat 2; when outlet 421 of bottom porcelain shard 42 is not aimed at and closed, water may flow out outlet 411 of top porcelain shard 41 and then flow upward, after pass through side of water-controlling shaft bolt 3, water flow out outlet 21 of water-receiving valve seat 2 and then turn upward, finally, enter into water pipe S of faucet S to flow out. Thus, water must pass through several right angles of channel during adjusting, hydraulic pressure may be reduced, so that water can not flow out smoothly, therefore, such structure is required to get improved.

Structure of straight-out controllable ceramic valve of anti-freezing faucet


A golf club having a head equipped with a visible elongated angle guide, said head having a club face, and said visible elongated angle guide is in a predetermined position with respect to the said club face, whereby the golfer is able to align to the proper position and desired relationship the said elongated angle guide and the said club face with respect to a fixed visible line marker on the ground and the ground surface before the swing, at the address position and during the swing before and after the said club strikes the ball. The elongated angle guide may be removable and easily disassembled from the club head to fit in the golf bag.

This invention relates to a golf training device developed for the purpose of training a golfer to develop a correct and effective swing, with the principal purpose being to show the golfer an instantaneous visual geometric results of his swing.
Most golfers swing their golf club to hit the ball hoping they will create a good swing. A golf swing is very complicated inasmuch as almost all parts of the moving body are involved, including the head, arms, legs, hips, shoulders, and feet of the golfer.
The relative position of the golf club with respect to the body is also very important. To execute a correct golf swing, it is necessary to maintain the correct static position and to maintain the correct dynamic positions and alignment of the body and club during the swing. The only way a golfer can see if he or she has made a mistake is by looking at the flight of the ball. A guess on swing adjustment is normally accomplished by the golfer changing a single aspect of his or her swing without taking fully into consideration, the fact that there are not one but many factors affecting the swing.
Except for the putter, almost all clubs have grooves, and every golf ball has dimples on its surface. The physical contact between the clubface and the ball generate friction, making the ball spin. If the club face is not maintained by the golfer in a square relationship with the ball, different flights of the golf ball can result, bringing about a slice, hook, fade, cut, etc.
Various attempts have been made to design a golf trainer, but up into the present time, none has been successful due to practicality, such as physical sizes of the trainer, weight of the trainer, and limitation of the trainer, not to mention cost. Some trainers require a room full of apparatus to be used only indoors, and some require wall restraints, and still others restrict only some parts of the body.
In contrast with the prior art devices, the instant invention is practical and simple, and it can be used anywhere.


A slewing bearing having two rings and rollers arranged between the rings, wherein one of the rings is provided with a through-hole for inserting the rollers for assembly and maintenance, and with a plug for closing the through-hole. The through-hole is formed as a bore including an inner portion with a smaller bore diameter and an outer portion with a larger bore diameter. The smaller diameter portion is reduced in order to facilitate the assembly, while avoiding an increased diameter in the innermost part of the thorough hole in order to secure stability and robustness.

Slewing bearings are sometimes formed as large-scale bearings with diameters of several tens of centimeters up to meters, in particular in the form of tapered roller bearings. Rollers, preferably cylindrical rollers, may be inserted between the raceways using a through-hole in one of the rings, wherein the through-hole leads directly to a raceway of the ring. The rollers are usually pushed through the through-hole by hand using a finger or two fingers and the diameter of the through-hole is larger than the diameter of the rollers, preferably even larger than the largest distance between two opposing points on the rolling surfaces of the rollers, but at least 1.5 cm to 2 cm such that at least one finger of the assembly worker can be fitted in.
Once the assembly is completed, the through-hole is closed with a plug, and the plug may be fixed with a pin inserted into a small bore in a direction transverse to the through-hole.
A bearing of this type is disclosed e.g. in the document FR 7123270.
The axially inner surface of the plug forms a part of the raceway and completes the latter.
The above method of assembly is currently limited by the length of a finger of a worker and it is impossible to push the roller through the through-hole when the depth of the latter is considerably longer than the length of the finger, e.g. deeper than 7 cm to 9 cm. In the case of tapered raceways, the depth of the through-hole shall refer to the distance between an outer surface of the ring from which the through-hole extends inward to the point of intersection between the through-hole and the raceway which is closest to that outer surface.

Slewing bearing with a through-hole and plug


An interference canceller (500) includes an interference cancellation coefficient calculator (510) configured to calculate an interference cancellation coefficient using a received value located in a location of a reference signal (RS) from a channel estimate H calculated by a channel estimator and a received signal r delivered from an FFT, an interference cancellation filter (520) configured to cancel interference in the received signal and the channel estimate using the calculated interference cancellation coefficient, an increment or decrement operator (530) configured to increase or decrease the received signal and the channel estimate by λ times; an interference cancellation output controller (540) configured to receive a channel estimate before interference cancellation and a channel estimate after interference cancellation to compare a signal before the interference cancellation with a signal after the interference cancellation and then determine whether to deliver the signal before applying the interference cancellation or the signal after applying the interference cancellation, and a switch (550) configured to receive a control signal from the interference cancellation output controller (540).

1. Field
The following description relates to technology for canceling interference in a multiple-input multiple-output (MIMO) receiver, which is used, for example, in a multi-cell wireless communication system.
2. Discussion of Related Art
Wireless communication systems are configured to provide a data service in addition to a voice service, and are configured by service providers to suit a multi-cell environment. Examples of the systems include 2nd and 3rd generation mobile communication systems such as CDMA2000, 1xEVDO, and WCDMA, which are based on CDMA, and 3.5th and 4th generation mobile communication systems such as IEEE 802.16, LTE, and LTE-A, which are base on orthogonal frequency-division multiplexing (OFDM).
Signals from an adjacent cell act as interference to a terminal connected to a serving cell when the signals from the adjacent cell have the same frequency as those from the serving cell. Actually, since a 3rd or later generation mobile communication system has a channel bandwidth of several MHz or more, service providers have a limited number of channels such that they often cannot avoid using the same frequency between adjacent cells when systems are established. When there are adjacent cells using the same frequency, a signal transmitted from a base station in one adjacent cell acts as interference to a terminal that is located in a cell boundary, thereby reducing a received signal quality for the other cell (serving cell) and thus causing cell coverage and data rate to be degraded.
In particular, for a heterogeneous network having pico cells and femto cells that are available in an LTE-A system, which is a 4th generation mobile communication, interference between adjacent cells occurs frequently. This causes a macro cell coverage and a reception performance to be degraded.
In order to minimize the interference between cells, a method has been proposed in which allocation of resources to a terminal located in a cell boundary is avoided between a serving base station and an adjacent base station according to a time or frequency axis, thereby enhancing the coverage and data rate in the cell boundary. However, this method has limitations in that an additional system for exchanging resource allocation information between base stations should be established to share the resource allocation information, and spectral efficiency is decreased in a section where resource allocation is avoided between base stations or terminals because all frequency resources are not used.
An existing interference canceller uses a method of finding a covariance matrix for a signal with interference and noise among received signals and its inverse matrix to utilize the inverse matrix as an interference cancellation filter that is applied to the received signals and channel estimates, or a method of assuming that an interference signal is also a received signal and finding a minimum mean square error (MMSE) weight matrix in a higher order than that of multiple-input multiple-output (MIMO) between an original serving base station and a terminal.

Apparatus for interference cancellation in MIMO receiver, method for interference cancellation in MIMO receiver and MIMO receiver


Disclosed is a fisheye lens comprised of the first through the seventh lens elements: wherein a field of view is larger than 180° a calibrated distortion is 10% or less, a relative illumination is 80% or more, all the refractive surfaces of the lens elements are spherical surfaces, the first lens element is a negative meniscus lens element having a convex surface facing an object side, the second lens element is a bi-concave lens element, the third lens element is a positive meniscus lens element having a convex surface facing an image side, a stop is located between the third and the fourth lens elements, the fourth lens element is a bi-convex lens element, the fifth lens element is a bi-concave lens element, the sixth and the seventh lens elements are bi-convex lens elements.

A fisheye lens generally refers to a lens where the Field of View (FOV) is 160° or more, and the incidence angle of an incident ray is approximately proportional to the image height on the image plane. There are many application examples where a fisheye lens with FOV of 180° or more is required such as security-surveillance and entertainment. However, fisheye lenses of prior arts often contain more than 10 pieces of lens elements to achieve 180° or more FOV, or the fisheye lenses were very difficult to manufacture because the shape of some of the lens surfaces of lens elements are close to hemispherical surfaces. Also, some lenses use relatively small number of lens elements between 6 and 8. However, the modulation transfer function characteristics are not good, and consequently the lenses do not have enough resolution to obtain sharp images. Also, optical glasses with high refractive indexes are often used to keep the number of lens elements small, and the production cost arises as the result.
Other point of consideration is about projection schemes. Desirable projection schemes of a fisheye lens include an equidistance projection scheme. In an equidistance projection scheme, the incidence angle δ of an incident ray, the effective focal length f of the fisheye lens, and the image height red on the image plane satisfy a proportionality relation given in Eq. 1.red(δ)=fδ  [math figure 1]
Real projection scheme of a lens shows certain amount of deviation from the theoretical projection scheme given in Eq. 1. Although the real projection scheme of a lens can be experimentally measured, it can be theoretically predicted using dedicated lens design software once given the complete lens prescription. For example, image height in the y-axis direction for an incident ray having a given incident angle can be obtained using 'Reay' perator in 'Zemax' which is dedicated lens design software. Similarly, image height in the x-axis direction can be obtained using 'Reax' operator. If the real image height on the image plane for a lens is given as rrp, then the error between the real projection scheme of a lens and an ideal equidistance projection scheme can be calculated as in Eq. 2.
                              distortion                                                                          (            δ            )                          =                                                                              r                  ed                                                                  (                  δ                  )                                            -                                                r                  rp                                                                  (                  δ                  )                                                                                r                ed                                                          (                                  δ                  _                                )                                              ×          100                    %                                    [                  math                                                              figure                                                              2                ]
The distortion of a fisheye lens is generally measured as an f-O distortion given in Eq. 2, and a high-end fisheye lens faithfully follows the equidistance projection scheme given in Eq. 1. It is relatively easy to design a fisheye lens simply having a FOV of 180° or more, but it is considerably more difficult to design a lens that has a FOV of 180° or more and the discrepancy from an equidistance projection scheme is less than 10%.
However, what is important in the industrial use of a fisheye lens is the fact that the incidence angle of an incident ray is proportional to the image height on the image plane, and it is not necessary that the proportionality constant is the effective focal length. Therefore, calibrated distortion, which involves a fictitious focal length fc that minimizes the f-O distortion given by Eq. 2 over the entire range of incidence angle, is often used as a measure of lens performance. Here, the fictitious focal length fc is not related to the actual effective focal length of the lens, and given as an optimum fitting constant by least square error method. In other words, calibrated distortion indicates how close is the functional relation between the incidence angle of an incident ray and the image height on the image plane to a first order equation passing through the origin given by Eq. 1.
Another point of consideration is to secure enough back focal length while keeping the overall length of the lens short. Furthermore, another difficulty is to keep the relative illumination difference between the center and the periphery of the image plane small. If the relative illumination differs greatly, then brightness at the center and at the periphery of the image plane is significantly different.
Even though all these requirements are satisfied, still it is difficult to obtain a design that has enough manufacturing tolerance so that neither fabrication is too difficult nor production cost is overly excessive.
To take a specific example, reference 1 discloses a fisheye lens with 262° FOV.
However, since this is a dark lens with F-number of 14.94, it cannot be used unless the surrounding is brightly lit. Reference 2 discloses a fisheye lens with 170.8° FOV. However, this is also a dark lens with F-number of 7.98. Further, the lens structure makes this lens difficult to be mass produced because the shape of the second lens surface of the first lens element is nearly hemi-spherical. Reference 3 discloses fisheye lenses with 220° and 270° FOV. These lenses are relatively dark with F-number of 5.6, the shapes of the second lens surfaces of the first lens elements are nearly hemispherical, and modulation transfer function characteristics are not good enough to obtain high-resolution images. Reference 4 discloses a fisheye lens with F-number of 2.8 and 180° FOV. Although this lens has relatively high resolution, the calibrated distortion is higher than 15%, and consequently distortion is severe. Reference 5 discloses a fisheye lens with F-number of 2.8, and 220° FOV. However, the shape of the second lens surface of the first lens element is also close to hemi-spherical surface, and modulation transfer function characteristic is not sufficiently good. Reference 6 discloses a fisheye lens for projector with F-number of 2.4, and 163° FOV. However, relative illumination at the maximum incidence angle is low around 60%. Reference 7 provides a remarkable infrared fisheye lens with F-number of 0.7 and 270° FOV. Still, the number of lens element is only 4. Such an astonishing characteristic is partly due to the high refractive index of Germanium that is employed as the lens material in the infrared wavelength region. However, the shape of the second lens surface of the first lens element is hyper-hemispherical, and it is very difficult to be mass produced. Reference 8 concisely summarizes characteristic features of various commercial fisheye lenses. For most of the fisheye lenses, however, it can be seen that relative illuminations at the maximum incidence angles are 60% or less, and calibrated distortions are high, typically 10% or more. Reference 9 discloses an extraordinary fisheye lens with F-number of 2.0, and 180° FOV, and still using only 6 pieces of lens elements. However, this fisheye lens uses ultra high refractive index glass with a refractive index of 1.91, and consequently production cost is high. Furthermore, modulation transfer function characteristic is not sufficiently good. Reference 10 discloses a fisheye lens with F-number of 2.8 and 182° FOV, and following a projection scheme described by a special functional relation. However, this lens employs 11 pieces of lens elements, and therefore structure is complicated and production cost is high. Furthermore, modulation transfer function characteristic is not sufficiently good. Reference 11 discloses a fisheye lens with F-number of 2.8, and 180° FOV. This lens also uses only 6 pieces of lens elements, but production cost is high because aspherical lens element is used. Furthermore, modulation transfer function characteristic is not sufficiently good, and relative illumination at the maximum field angle is relatively low around 70%. On the other hand, reference 12 provides various embodiments of wide-angle lenses satisfying desirable projection schemes which can be implemented by wide-angle lenses.    [Reference 1] A. C. S. van Heel, G. J. Beernink, and H. J. Raterink, "Wide-angle objective lens", U.S. Pat. No. 2,947,219, date of registration Aug. 2, 1960.    [Reference 2] K. Miyamoto, "Fish eye lens", J. Opt. Soc. Am., vol. 54, pp. 1060-1061 (1964).    [Reference 3] M. Isshiki and K. Matsuki, "Achromatic super wide-angle lens", U.S. Pat. No. 3,524,697, date of registration Aug. 18, 1970.    [Reference 4] T. Ogura, "Wide-angle lens system with corrected lateral aberration", U.S. Pat. No. 3,589,798, date of registration Jun. 29, 1971.    [Reference 5] Y. Shimizu, "Wide-angle fisheye lens", U.S. Pat. No. 3,737,214, date of registration Sep. 29, 1971.    [Reference 6] R. Doshi, "Fisheye projection lens for large format film", Proc. SPIE, vol. 2000, pp. 53-61 (1993).    [Reference 7] J. B. Caldwell, "Fast IR fisheye lens with hyper-hemispherical field of view", Optics & Photonics News, p. 47 (July, 1999).    [Reference 8] J. J. Kumler and M. Bauer, "Fisheye lens designs and their relative performance", Proc. SPIE, vol. 4093, pp. 360-369 (2000).    [Reference 9] A. Ning, "Compact fisheye objective lens", U.S. Pat. No. 7,023,628, date of registration Apr. 4, 2006.    [Reference 10] K. Yasuhiro and Y. Kazuyoshi, "Fisheye lens and photographing apparatus with the same", Japanese patent publication no. 2006-098942, date of publication Apr. 13, 2006.    [Reference H] M. Kawada, "Fisheye lens unit", U.S. Pat. No. 7,283,312, date of registration Oct. 16, 2007.    [Reference 12] G. Kweon, and M. Laikin, "Wide-angle lens", Korean patent application no. 10-2007-0106725, date of application Oct. 23, 2007.


A traffic shaping drive method and a driver are described. The method includes that: when traffic shaping is executed, timing time is set, and a data packet in a cache queue is sent at a preset constant rate in the timing time; when the timing time is reached, sending the data packet is stopped, and sending an ACK acknowledgement packet in the cache queue is started; and after the ACK acknowledgement packet is sent, returning to execute the traffic shaping. By conducting the traffic shaping on a drive layer, the disclosure enables the data packet to be sent at the constant rate, and reserves a certain bandwidth to send the ACK acknowledgement packet in time, thereby avoiding network congestion caused by delayed sending of the ACK acknowledgement packet, and improving the user experience.

In a Transmission Control Protocol/Internet Protocol (TCP/IP) transmission process, before new data is sent each time, it is needed to acknowledge whether the other side has received previous data, namely an ACK acknowledgement packet. However, in case of delay or low transmission rate, these ACK acknowledgement packets will be forced to delay to reach the destination. At this point, a data sending side has to waste a certain period of time to wait for receiving these ACK acknowledgement packets. Especially for a user of Digital Subscriber Line (DSL) and cable connection, when an uploading speed reaches a certain degree, uplink data is likely to slow or a downloading speed is obviously reduced, which is more serious especially for the user having a low uplink rate. This is because as an uplink is occupied completely, the acknowledgment of data will be delayed because of congestion of these uplink data.
With the development of a wireless terminal, e.g., a 4G wireless terminal, because its bandwidth is relatively wide, for making better use of bandwidths of uplink and downlink channels, a ratio of its bandwidths of uplink and downlink channels is usually greater than 1:2, even 1:9. So, when there is no any traffic shaping measure in the whole communication link, the downlink ACK acknowledge packet must be delayed, thereby the downlink channel is congested. FIG. 1 is a diagram of congestion of a downlink channel; as shown in FIG. 1, S101 is a downlink channel, and data types are: a data packet sent from a server normally and an uplink ACK acknowledge packet; S102 is an uplink channel, and data types are: a data packet sent from a client normally and a downlink ACK acknowledge packet. The two channels S101 and S102 are parallel; in the TCP/IP transmission process, before the new data is sent each time, it is needed to acknowledge whether the other side has received the previous data, so when the uplink channel reaches the limit of traffic capacity, namely there are more data packets to be sent in a buffer, a sending bandwidth cannot be provided for a new downlink ACK acknowledge packet, and then the data packets in the downlink channel will wait until a downlink ACK acknowledgement packet is received, thereby network congestion is caused.
The above situations can be collectively called a network with asymmetric uplink and downlink bandwidths. So far, in the general case, it is enabled to send more data once without need of immediate acknowledgement by increasing the capacity of TCP data packet. The main problem at the point is that: such a modifying way will cause a Ping value to stay at a high level (which causes a network lag phenomenon, commonly known as Lag), which is likely to cause serious consequences for the user browsing the Web, especially the user playing online games. For the data packet in which a TCP packet size is 512 k, it is so abnormal if the lag approaches 2 seconds. Generally speaking, only increasing the capacity of the TCP data packet cannot make the downloading speed reach a limit value of the bandwidth, and the situation that the sending of the ACK acknowledgement packet is delayed will not be improved better.


Kxc3x97K optical switch unit according to the present invention is comprised of input ports 1-1, . . . 1-36, 1xc3x97M optical matrix switches 5-1-1, . . . 5-4-9 connected with the input ports 1-1, . . . 1-36, Nxc3x97N optical matrix switches 7-1-1, . . . 7-4-2, and 10-1-1, . . . 10-4-2 connected with the 1xc3x97M optical matrix switches 5-1-1, . . . 5-4-9, an Mxc3x971 optical matrix switches 13-1-1, . . . 13-4-9 connected with the Nxc3x97N optical matrix switches 7-1-1, . . . 7-4-2, and 10-1-1, . . . 10-4-2, and output ports 2-1, . . . 2-36 connected with the Mxc3x971 optical matrix switches 13-1-1, . . . 13-4-9, where K=Mxc3x97N, M and N are integers more than 1.

The invention relates to an optical switch unit having input-ports and output-ports for optical signals. Then, the optical switch unit can selectively switch inner switch elements for connecting an optical input port to an optical port.
In recent years, large scale optical switch units having comparatively many input ports have been proposed. For example, a 32xc3x9732 optical switch unit has 32 input ports and 32 output ports. And, an optical signal inputted in any one of the input ports can be selectively output from any one of the output ports.
These large scale optical switch units are comprised of some smaller scale waveguide-type optical matrix switches, e.g., waveguide-type 8xc3x978 optical matrix switches. In order to increase the number of output ports, these smaller waveguide-type optical matrix switches form multistage-connections.
Regarding these multistage waveguide-type optical matrix switches, a three-stage construction applying to a cross-network is used generally, e.g., xe2x80x9cOptical Switch Architectures for Optical Path Cross-Connectxe2x80x9d; Tetuya Nishi, Satoshi Kuroyanagi and Tomohiro Ishihara; Proceedings of the 1998 IEICE General Conference, B-10-97(March 1998) discloses these constructions.
Though, these present optical switch units constructed by multistage-connecting of the waveguide-type optical matrix switches have a problem that the present optical switch units have comparative large insertion losses because they need three-stage-connecting of the waveguide-type optical matrix switches and each of them has large insertion loss.
Therefore, the present optical switch units additionally need optical amplifiers for compensating the insertion loss.
For example, each of silica-based 8xc3x978 matrix switches has about 5 dB insertion loss, then three-stage-connecting of the 8xc3x978 matrix switches has more than 15 dB insertion loss totally.
Also in Clos-networks, the present optical switch units need three-stage constructions, and three-stage boards were needed for containing the optical matrix switches. For inter-board connection of the three-stage boards, connections occur at two sections and each of the two sections needs about r2 lines for inter-board connection, where r is a port number of an optical matrix switch.
Consequently, because a large number lines are centralized in limited area of the optical switch unit, a production process of the optical switch unit is more complicated.
Furthermore, in connection with the complicated production process, when expanding the optical switch unit""s scale, each of the three-stages of the optical switch unit needs additional boards.
It is an object of the invention to provide an large scale optical switch unit having a simple construction and low insertion loss.
To resolve the above problems, a Kxc3x97K optical switch unit according to the present invention is comprised of an input port, a 1xc3x97M optical matrix switch connected with the input port, an Nxc3x97N optical matrix switch connected with the 1xc3x97M optical matrix switch, an Mxc3x971 optical matrix switch connected with the Nxc3x97N optical matrix switch, and an output port connected with the Mxc3x971 optical matrix switch, where K=Mxc3x97N, M and N are integers more than 1.


Disclosed are vaccines capable of achieving protection against RSV while avoiding vaccine-enhanced disease (VED). In particular, vaccine constructs have been molecularly designed and genetically engineered to comprise RSV fusion (F) protein displayed on the surface of a particle, such as a virus-like particles (VLP) and low temperature-prepared split RSV. In some embodiments, the RSV F protein is in a pre-fusion F conformation. Also disclosed a variants and combinations of split RSV and RSV F DNA vaccine with pre-fusion F and enhanced efficacy. In addition, disclosed split RSV vaccines containing pre-fusion F conformation and combination adjuvants MPL and CpG.

Respiratory syncytial virus (RSV) is an enveloped virus with lipid membrane bilayers. RSV is a non-segmented, negative strand ribonucleic acid (RNA) genome of 15,222 nucleotides that codes for 11 messenger RNAs, each coding for a single polypeptide protein. RSV has lipid membranes that are derived from infected host cells or mammalian cell culture substrates. Three of the eleven RSV genome-encoded proteins are transmembrane surface proteins: the F (fusion), G (attachment), and SH proteins. RSV F proteins are conserved whereas RSV G proteins are variable depending on the strains. Other RSV gene products include nonstructural (NS1 and NS2) proteins, and transcription regulator M2-1 and M2-2 proteins.
RSV infection occurs in seasonal outbreaks, peaking during the winter in temperate climates and during the rainy season in warmer climates. Respiratory syncytial virus (RSV) infects over 30 million people each year, and is a major cause of bronchiolitis in infants and in the elderly, resulting in 160,000 deaths annually worldwide. Patients related to RSV infections were associated with substantial morbidity, as evidenced by prolonged hospital stays, high intensive care admission rates, and high ventilatory support rates. RSV causes lower respiratory tract illness, particularly in young children and babies. Epidemiology reports suggest that RSV is also an important pathogen in adults, particularly in the elderly. Symptomatic reinfection is common throughout life and it has become increasingly apparent that RSV is an important adult pathogen as well, especially for the elderly.
Alum adjuvanted formalin-inactivated whole RSV (FI-RSV) vaccination of children resulted in vaccine enhanced disease (VED) upon the vaccinees' exposure to natural RSV infection (Kapikian A Z, M. R., et al., 1969. American journal of epidemiology 89:405-421; Kim, H. W., et al., 1969. American journal of epidemiology 89:422-434). Split virion vaccines retain immunogenic properties but have less reactogenicity than inactivated whole virus vaccines (al-Mazrou, A., et al., 1991. Cmaj 145:213-218; Cate, T. R., et al., 1977. J Infect Dis 136 Suppl:S450-455; Quinnan, G. V., et al., 1983. Rev Infect Dis 5:748-757; Wright, P. F., et al., 1983. Rev Infect Dis 5:758-764). A desirable RSV vaccine should elicit protective levels of neutralizing antibodies and avoid VED. RSV vaccines based on virus-like particles (VLP) containing virus surface proteins were shown to provide protective immune responses in preclinical animal studies (Quan, F. S., et al., 2011. J Infect Dis 204: 987-995; Lee, Y. T. et al., 2015. Int J Nanomedicine 10:4491-4505).
Vaccines are needed that are capable of achieving protection against RSV while avoiding vaccine-enhanced disease (VED).

Respiratory syncytial virus (RSV) vaccines

Georgia State University Research Foundation, Inc.


A mounting apparatus includes a bracket, fasteners, and a positioning member. The bracket includes an end member, and a pair of side plates perpendicular to the end member. The positioning member is pivotably attached to the end member. A pair of mounting holes is defined in each side plate. Each mounting hole includes an entry portion extending through an edge portion of the side plate, and a locating portion communicating with the entry portion. The entry portion is closer to the end member than the locating portion. The fasteners are attached to two sidewalls of a storage device. Each fastener includes a gasket received in the entry portion of a mounting hole to abut against the storage device. The positioning member is pivoted to abut against the storage device when the gaskets move from the entry portions to the locating portions of the mounting holes.

1. Technical Field
The present disclosure relates to a storage device mounting apparatus.
2. Description of Related Art
An electronic device, such as a computer, generally includes a bracket to fix a storage device, such as a hard disk drive (HDD), or a compact disk read-only memory (CD-ROM) drive. The storage device is directly inserted into the bracket, and a number of fasteners extend through sidewalls of the bracket to engage in the storage device. However, during operation, vibrations generated by the storage device may cause the storage device to strike against the bracket and cause an annoying sound.