A Serially Concatenated Convolutional Code (SCCC) decoding system includes an outer decoder module (208), permutation module (104), and data store (114). The outer decoder module is configured to generate a first sequence of soft-decision bits x[n] for n=0, 1, 2, . . . , N−1. The permutation module is configured to permute the first sequence of soft-decision bits x[n] to generate a second sequence of soft-decision bits y[n]. The first sequence of soft-decision bits x[n] is generated by the outer decoder module in accordance with a mapping v[n]. The second sequence of soft-decision bits y[n] is generated for communication to an inner decoder module (204). The data store contains a mapping v[n]. The mapping v[n] satisfies a mathematical equation v[k+m·(N/M)] modulo (N/M)=v[k] modulo (N/M) for m=0, . . . , M−1 and k=0, . . . , (N/M−1). (NM) is an integer.

1. Statement of the Technical Field
The inventive arrangements relate to digital communication equipment using an error correction technique. More particularly, the inventive arrangements relate to a serially concatenated convolutional code decoder.
2. Description of the Related Art
A serially concatenated convolutional code (SCCC) decoder provides a means for recovering information bits from a codeword. A codeword is often comprised of a bitstream that has been encoded using a forward error correction (FEC) technique based on at least one convolutional code. A codeword may be a relatively large sequence of information bits (for example, a few thousand information bits) to provide a high recoverability of encoded information contained therein.
One algorithm that is conventionally used in SCCC decoders for decoding coded sequences is the MAP algorithm. MAP is an acronym for the phrase "Maximum Aposteriori Probability." The MAP algorithm provides a method for determining the most probable information bits which were transmitted based on a noisy signal received over a communication channel. It is known in the art that the MAP algorithm is an inherently Soft-Input, Soft-Output (SISO) algorithm. Soft information refers to soft-values (which are represented by soft-decision bits) that comprise information about the bits contained in a coded sequence. In particular, soft-values are values that represent the probability that a particular bit in a coded sequence is either a one (1) or a zero (0). For example, a soft-decision value for a particular bit can indicate that a probability of a bit being a one (1) is p(1)=0.3. Conversely, the same bit can have a probability of being a zero (0) which is p(0)=0.7. The most commonly used soft values are log-likelihood ratios (LLR's). An LLR which is a positive value suggests that the bit is most likely to be a one (1) whereas a negative LLR suggests that the value of the bit is most likely a zero (0).
It is known that soft values can be used in SCCC devices for decoding concatenated codes. In general, concatenated codes use two codes (an inner code and an outer code) with some interleaving between them. Accordingly, SCCC decoders are commonly implemented with two separate decoders that are each utilizing MAP algorithms for the decoding process. An inner decoder decodes the inner code and an outer decoder decodes the outer code. The decoders are commonly configured for operation in an iterative process where the outputs of one decoder is repeatedly communicated to the other decoder. Since the MAP algorithm is a SISO type algorithm, the soft-values (represented by soft decision bits) generated by the MAP algorithm in one decoder can be used as inputs to the MAP algorithm in the other decoder.
During a first iteration of a concatenated code, an inner decoder processes soft-decision value approximations to bits output from an inner encoder. As a result of this processing, the inner decoder outputs soft-decision value approximations to the bits that were input to the inner encoder in an encoding process. Similarly, the outer decoder uses soft-decision value approximations to bits output from an outer encoder. Since the bits output from the outer encoder were permuted or interleaved (as explained in the preceding paragraph), the soft-decision value approximations are derived by applying a reverse permutation to the soft-decision value approximations output from the inner decoder prior to being communicated to the outer decoder. This reverse permutation is known in the art as depermutation. The outer decoder can produce two different outputs. One is a soft-decision value approximation to data that was input to the outer encoder. This data is the original, unencoded data, and is not of interest until a final iteration. This data need not be permuted or depermuted. The other output of the outer decoder is a refinement to soft-decision value approximations to bits output from an outer encoder. This output is interleaved (i.e., re-arranged) in the same manner as an encoder permuted output bits of the outer encoder prior to communicating the bits to the inner encoder. These permuted soft-decision value approximation outputs from the outer decoder approximate the bits input to the inner encoder and can therefore be used in a second iteration of the decoding process.
During the second iteration of the decoding process, the permuted soft-decision value approximation outputs are communicated to the inner decoder. In this regard, it should be appreciated that the inner decoder uses the permuted soft-decision values approximations of bits input to the inner encoder to produce refined soft-decision value approximations of bits input to the inner encoder. The inner decoder also uses the soft-decision value approximations of bits output from the inner encoder to produce refined soft-decision value approximations of bits input to the inner encoder.
A plurality of SCCC decoders can be implemented in a parallel configuration on a field programmable gate array (FPGA) or an application specific integrated circuit (ASIC). Each of the SCCC decoders is coupled to a respective random access memory (RAM) data store via a system bus. Each RAM data store contains data needed by a respective SCCC decoder to sequentially write sets of serially linked soft-decision bits to a depermutation and/or a permutation buffer memory for storage. Each RAM data store also contains data needed by a respective SCCC decoder to non-sequentially read sets of serially linked soft-decision bits from the depermutation and/or permutation buffer memory.
Each SCCC decoder is comprised of an input buffer memory, a processing loop module, and an output buffer memory. The input buffer memory is comprised of hardware and firmware configured to receive encoded soft-decision bits from an external device and to temporarily store the same. The processing loop module is comprised of hardware and firmware configured to decode soft-decision bits using an iterative process (described in greater detail below). In this regard, it should be appreciated that the processing loop module is often comprised of an inner decoder module, a depermutation module, an outer decoder module, and a permutation module. The output buffer memory is comprised of hardware and firmware configured to receive decoded soft-decision bits from the processing loop module and to temporarily store the same.
With regard to the processing loop module, the burden of decoding information contained within a codeword is split between the inner decoder module and the outer decoder module. In this regard, it should be appreciated that the inner decoder module and the outer decoder module employ methods of maximum a posteriori (MAP) decoding or max-log approximations to MAP decoding. MAP decoding and max-log approximations to MAP decoding are well known to persons skilled in the art. Thus, such methods will not be described in great detail herein.
The inner decoder module is often comprised of hardware and firmware configured to obtain a sequence of soft-decision bits from the input buffer memory and/or the permutation module. Upon receipt of all or a portion of a soft-decision bit sequence, the inner decoder module begins processing the received soft-decision bits. This processing typically involves performing a relatively simple decoding operation based on a corresponding convolutional inner code. After processing the soft-decision bits, the inner decoder communicates the processed soft-decision bits to the depermutation module for depermutation (i.e., rearrangement or reorganization) and storage in a depermutation buffer memory. In this regard, if should be understood that the depermutation of processed soft-decision bits is accomplished by reading the stored soft-decision bits from the depermutation buffer memory in an order different from an order in which the soft-decision bits were written to the depermutation buffer memory for storage. It should also be understood that depermutation of soft-decision bits is necessary to reverse a permutation of information bits that occurred in an encoding process.
The outer decoder module is comprised of hardware and firmware configured to receive a sequence of depermuted soft-decision bits communicated from the depermutation module. Upon receipt of all or a portion of a soft-decision bit sequence, the outer decoder module begins processing the received soft-decision bits. This processing typically involves performing a relatively simple decoding operation based on a corresponding conventional outer code. After processing the soft-decision bits, the outer decoder module communicates the processed soft-decision bits to the permutation module for permutation (i.e., rearrangement or reorganization) and storage in a permutation buffer memory. It should be understood that permutation is necessary to realign the soft-decision bits to the permutation that occurred in an encoding process. The permutation of processed soft-decision bits is accomplished by reading the stored soft-decision bits from the permutation buffer memory in an order different from an order in which the soft-decision bits were written to the permutation buffer memory for storage. Thereafter, a sequence of permuted soft-decision bits is communicated, along with the original codeword, to the inner decoder module.
The above described process is performed for 'M' iterations. After 'M' iterations, the outer decoder module produces decoded information bits. Subsequently, the outer decoder module forwards the decoded information bits to the output buffer memory for storage.
Despite the advantages of such a conventional SCCC decoder, it suffers from certain drawbacks. For example, the above-described decoding system employing a number of parallel processing SCCC decoders and associated RAM data stores is hardware resource intensive. Furthermore, the above described decoding process requires a relatively large amount of time to complete. As such, there also remains a need for a SCCC decoder having an improved processing time with a negligible performance loss.

Serially concatenated convolutional code decoder with a constrained permutation table


A write control driver circuit stores a data in a high speed chip by causing an enabling timing of a write control signal to become faster. The circuit includes a first logic circuit for receiving a peri-top address transition detection signal and a peri-bottom address transition detection signal, and a second logic circuit for receiving a combined address transition detection signal, a coding signal and a write driver signal, each having a predetermined width. The combined address transition detection signal is generated based on a delay unit having a prescribed pulse width. The second logic circuit outputs a write control signal that is not controlled by the peri-top address transition detection signal and the peri-bottom address transition detection signal.

1. Field of the Invention
The present invention relates to a semiconductor device and in particular, to a write control driver circuit for a high speed semiconductor device.
2. Background of the Related Art
FIG. 1 illustrates a related art write control driver circuit that includes a NAND-gate NAND 11 for receiving a peri-top address transition detection signal ATDST and a peri-bottom address transition detection signal ATDSB, respectively. An inverter IN11 inverts an output signal from the NAND11 to output an address transition detection signal ATDS. A NAND-gate NAND12 receives a write enable signal WE and a chip selection signal CS. An inverter IN12 inverts an output signal from the NAND-gate NAND12 to output a write driver signal WD. A NAND-gate NAND13 receives a coding signal WEZ, the write driver signal WD and the combined address transition detection signal ATDS. An inverter IN13 inverts an output signal from the NAND-gate NAND13 to output a write control signal WC to a data transmission unit DT.
The peri-top address transition detection signal ATDST is a signal that is obtained by adding the address transition detection signals at the peri-top, and the peri-bottom address transition detection signal ATDSB is a signal that is obtained by adding the address transition detection signals at a peri-bottom. The write control signal WC is used to control the write operation where data from a data input buffer (not shown) is written onto a cell. In other words, the write control signal WC is a signal for enabling the data transmission unit DT.
The operation of the related art write control driver circuit will now be described. First, as shown in FIGS. 2D-2E, the peri-top address transition detection signal ATDST and the peri-bottom address transition detection signal ATDSB are generated by an address signal ADD, which is shown in FIG. 2A. The peri-top address transition detection signal ATDST and the peri-bottom address transition signal ATDSB are NANDed by the NAND-gate NAND 11 and the result is inverted by the inverter IN11 to output the combined address transition detection signal ATDS. As shown in FIG. 2F, the pulse width of the combined address transition detection signal ATDS becomes wider than that of the individual peri-top address transition detection signal ATDST and the peri-bottom address transition detection signal ATDSB by a loading difference between the peri-top address transition detection signal ATDST and the peri-bottom address transition detection signal ATDSB.
In addition, the write enable signal WE and the chip selection signal CS are NANDed by the NAND-gate Nand12 and the result is inverted by the inverter In12 to output the write driver signal WD. The write driver signal WD, the combined address transition detection signal ATDS, and the coding signal WEZ are NANDed by the NAND-gate NAND 13, and the result is inverted by the inverter In13 to output the write control signal WC. The coding signal WEZ is preferably a signal output when the write enable signal WE and the signal from a Z-decoder (not shown) are combined by a NAND-gate (not shown).
When the write control signal WC is transited to a high level as shown in FIG. 2G, the data transmission unit DT is enabled and controlled by the write transmission transistor enable signal CWE. Accordingly, input data DATAIN from a data input buffer (not shown) is transmitted to and written into a cell as output data DATA and DATAB as shown in FIG. 2H.
Therefore, in the related art write control driver circuit, the write control signal WC is triggered when the combined address transition detection signal ATDS is transited to a high level. Since the pulse width of the combined address transition detection signal ATDS is wider than that of the two address transition detection signals ATDST and ATDSB, the write control signal WC is delayed by as much as the pulse width difference before being outputted. For example, assume that the pulse width of the two address transition detection signals ATDST and ATDSB is 4ns, and the peri-top address transition detection signal ATDST is delayed by 2ns (rather than the peri-bottom address transition detection signal ATDSB) and then is loaded. In this case, the pulse width of the combined address transition detection signal ATDS is increased to 6ns.
Therefore, in a high speed chip, it is becomes very difficult to accurately write the data onto the cells. For example, assuming that an AC parameter tAw is 12ns in an operational requirements specification of a 1M SRAM in the related art write control drive circuit, the signals are delayed by the combined address transition detection signal ATDS by 6ns, a cell loading by 5ns, and a write AC parameter margin tAs by 2ns, respectively. Accordingly, the total delay time becomes 13ns, which exceeds the write AC parameter tAw specification.
The above references are incorporated by reference herein where appropriate for appropriate teachings of additional or alternative details, features and/or technical background.


An apparatus and method are disclosed having a stage reticle safety feature. The apparatus includes a reticle stage and an optical stage. The reticle stage supports a reticle and is capable of moving the reticle in x-y-z directions. The optical stage includes a plurality of components to direct light reflected from the reticle onto a wafer substrate and a safety mechanism to move one or more components of the optical stage away from the reticle stage.

Reticles or masks with patterned images are essential components used in photolithography tools. Conventional tools use transmissive reticles. Specifically, for a transmissive reticle, a light source directs light through the reticle to project a patterned image on a semiconductor substrate covered with light-sensitive photoresist. The captured image in the photoresist defines integrated circuits on the substrate. Typically, tools using transmissive reticles can project features having line widths of 150 to 200 nanometer (nm) that form integrated circuits on the substrate.
In a conventional tool, when a substrate or wafer is ready for receiving a patterned image, the reticle is mounted on a reticle stage that supports and moves the reticle with a certain degree of freedom in the x and y directions. To protect the reticle from contamination, a pellicle can be used, which is a protective membrane that seals off the reticle. The pellicle, however, is not designed to prevent components from colliding with the reticle stage and damaging the reticle.
As integrated circuits become even more compact, the features of a patterned image projected on a substrate require smaller and finer detail. One photolithography technique capable of projecting such features with line widths of 30 nm or less is extreme ultraviolet (EUV) lithography. Instead of using a transmissive reticle, EUV lithography uses a reflective reticle in a vacuum chamber that reflects light with a wavelength in the range of 10 to 14 nm from the reticle to a substrate. A vacuum chamber is needed for EUV lithography to prevent EUV beam attenuation. EUV lithography also requires a number of mirrors and optical components that direct reflected light to the substrate. Such components can form an optical train or stage located below the reticle stage.
For EUV lithography, the reticle stage may require moving the reticle in close proximity to the optical stage. As a result, the reticle stage may move in the z direction as well as in the x and y directions for optical reasons. Consequently, safety features are necessary to prevent components in the optical stage from colliding with the reticle stage and causing irreparable damage to the reticle.
Since reticles are extremely expensive, there is a need to provide safety measures that protect the reticle stage and reticle from colliding with other components.

Method and apparatus having a reticle stage safety feature


A method of producing high quality GaN powder by combining high purity gallium and high purity ammonia in a tube reactor under controlled conditions. A reaction between the ammonia and gallium under the controlled conditions produces a porous gallium melt and to a full reaction, yielding high purity crystalline GaN powders with a stoichiometric nitrogen concentration and a hexagonal wurtzite structure.

Gallium nitride semiconductors are useful in, among other things, high power electronic and optoelectronics, such as flat panel displays, light emitting diodes, and laser diodes. While most gallium nitride ("GaN") materials are produced as thin films, GaN powders have applications as electroluminescent phosphor. The first reported synthesis of GaN powder was described by Johnson, W. C., Parsons, J. B., Crew, M. C., "Nitrogen Compounds of Gallium" J. Phys. Chem., 36, 2651-54 (1932) by flowing ammonia over molten gallium heated between 900-1000° C., which caused the following reaction:2Ga(s)+2NH3(g)→2GaN(s)+3H2(g)
Subsequent research described the efficiency of the above-described process. Pichugin, I. G., Yaskov, D. A., "Preparation of Gallium Nitride," Inorg. Mater., 6, 1732-34 (1972) reported an experiment that caused a reaction on the surface of gallium melt (also referred herein as "Ga melt") resulting in the formation of grayish colored GaN. Despite an excess of available ammonia much of the gallium melt remained under the crust of GaN created by the reaction, thus requiring several additional stages in order to achieve full reaction. Moreover, impurities such as residual gallium metal and gallium oxide were present in the as synthesized GaN powder, which adversely affected its optoelectronic properties.

Systems and methods for synthesis of gallium nitride powders


An overcurrent tripping device which is included in a circuit breaker is constituted by a pre-assembly unit of a holder with a conductor, a fixed core for generating a magnetic attraction force responding to an overcurrent, and a bimetal warping responding to the temperature rise of the conductor, and an operation arm rotatably borne on the holder and having a moving core which is to be attracted to the fixed core by the magnetic attraction force.

1. Field of the Invention
The present invention relates to a circuit breaker with an overcurrent tripping device which operates a time limit tripping by a bimetal and an instantaneous tripping by an electromagnet.
2. Description of the Prior Art
A conventional circuit breaker with an overcurrent tripping device, which is, for example, shown in a Gazette of Unexamined Japanese Utility Model Application Hei 3-19236, is described referring to FIG. 4. FIG. 4 is a sectional side view schematically showing a constitution of the conventional circuit breaker, and especially showing the conventional overcurrent tripping device of the circuit breaker.
As shown in FIG. 4, the conventional circuit breaker comprises a housing 1 made of a resin. The housing 1 consists of a base member 1a and a cover member 1b. A conductor 2, whereon a load current flows, is fixed on the base member 1. An end 2a of the conductor 2 is connected to a known moving contact mechanism (which is not shown in the figure) and the other end 2b is connected to a terminal member 3. A fixed core 4, which has substantially U-letter shaped section in a plane vertical to the paper sheet of FIG. 4, is provided on the conductor 2 for generating a magnetic force by the load current flowing on the conductor 2. A bimetal 5 is fixed to the conductor 2 on an end 5a thereof. An adjustable screw 6 is provided on the other free end 5b of the bimetal 5 in a manner that an end 6a of the screw 6 faces to a trip lever 7. The trip lever 7 is rotatably borne by a pivot 8. An operation arm 9 is rotatably borne by another pivot 11 and has a moving core 10 which is fixed on an end 9b and a pushing part 9a which is formed on the other end 9a for pushing the trip lever 7 when the operation arm 9 rotates in clockwise direction in the figure. An extension spring 12 is provided for supplying a rotation force to the operation arm 9 in a direction to make the moving core 10 separate from the fixed core 4. Another adjustable screw 13 is provided on a fixed part 14 for adjusting a gap between the fixed core 4 and the moving core 10. The above-mentioned pivots 8 and 11 and the fixed part 14 are provided on a frame which is not shown in the figure.
A tripping operation of the above-mentioned conventional circuit breaker with the overcurrent tripping device is described as follows.
When an overload current which is a little larger than a rated current of the conductor 2 flows, the bimetal 5 warps. And thereby, the end 6a of the screw 6 contacts the trip lever 7. As a result, the trip lever 7 rotates in clockwise direction in the figure.
When an overload current which is larger than a predetermined value flows on the conductor 2, the fixed core 4 generates a magnetic attraction force, and the moving core 10 is momentarily attracted to the fixed core 4. Thereby, the operation arm 9 rotates in clockwise direction in the figure. When the operation arm 9 rotates, the end 9a of the operation lever 9 pushes the trip lever 7. As a result, the trip lever 7 rotates in clockwise direction in FIG. 4.
When the trip lever 7 rotates in clockwise direction in the figure, a latch of a tripping device (which is not shown in the figure) is released. And thereby, the conventional circuit breaker is tripped, and the current is cut off.
In the conventional circuit breaker with overcurrent tripping device configured above, since the fixed core 4 and the moving core 10 are respectively fixed on the independent members such as the base member 1a and the frame (not shown in the figure), there are dimensional tolerance limits in the mass-produced parts. Therefore, for making the operation arm 9 to start to rotate by a current of a predetermined value, the gap between the fixed core 4 and the moving core 10 must be adjusted by provision of the adjustable screw 13. Furthermore, since the fixed core 4, the operation arm 9 and so on are respectively held on different independent members, the total size of the overcurrent tripping device becomes larger. And thereby, a larger space is necessary for containing the overcurrent tripping device in the housing 1 of the circuit breaker.

Circuit breaker with overcurrent tripping device


A slave mobile plate accelerometer using variations of capacitance to detect the movement of a mass. The apparatus comprises at least one pair of fixed electrodes rigidly attached to an armature, and at least one mobile electrode suspended by springs from the armature, between the two fixed electrodes of each pair of fixed electrodes, to form two capacitors, each mobile electrode being adapted to move between the fixed electrodes of each pair of fixed electrodes, due to the effect of acceleration, so causing a variation of the capacitance of each capacitor. The accelerometer further includes an electronic circuit for adjusting the electrostatic stiffness of at least one combination of a fixed electrode and a mobile electrode and a control system for detecting the variation of the capacitance of each capacitor.

The invention relates to the field of acceleration sensors. The invention is more particularly a slaved mobile plate accelerometer using capacitance variations to detect the movement of a mass.
Micromachined accelerometers are now well known in the sensor industry. They generally comprise a mobile plate, referred to as the seismic plate, suspended from a fixed armature by springs; the mobile plate/armature/spring assembly is obtained by chemically etching a silicon wafer.
The mobile plate comprises an electrode, for example. The fixed armature comprises two electrodes. The mobile electrode forms a capacitor with each of the two fixed electrodes. If acceleration is applied to the sensor, the mobile plate moves relative to the fixed armature, so creating an imbalance of the capacitances. A control circuit detects the difference between the two capacitances and reacts by applying a feedback voltage, and therefore an electrostatic force, between the mobile plate electrode and the fixed armature electrodes, in order to return the mobile plate to its original position. This provides an electrostatic feedback motor.
The electrostatic stiffness is known to be a function of the electrostatic force. For a sensor of the above kind, the principle of adjusting the electrostatic stiffness is as follows.
In the absence of electric field, a force Fm tends to return the mobile electrode to its rest position by virtue of the stiffness km of the springs (km is the derivative of the return force with respect to the displacement). However, in the presence of an electric field (voltage between the fixed electrodes and the mobile electrode), an electrostatic force Fe attracts the mobile electrode towards one or other of the fixed electrodes. This force is the sum of two forces in opposite directions proportional to the square of the electric field between the electrodes:
Fe=xcex50xc2x7(S1xc2x7E12xe2x88x92S2xc2x7E22), where Si is the surface area of the capacitor formed by the fixed electrode i and the mobile electrode, E=Vi/di, Vi is the voltage between the fixed plate electrode i and the electrode of the facing mobile plate, and di is the distance between the electrode i and the mobile plate electrode (i=1 or 2).
The electrostatic force is a function of the distance between the electrodes, and therefore of the displacement, like the spring return force, but in the opposite direction. Its derivative with respect to the displacement is the electrostatic stiffness ke.
It is also known that the frequency frm of mechanical resonance is related to the mass m of the mobile plate and to the stiffness km of the springs:       f    rm    =            1              2                π                                          k          m                m
The mass of the mobile plate is generally known accurately and closely controlled in manufacture, but this is not the case with the stiffness km of the springs. Performance therefore varies greatly from one manufacturing batch to another. This makes it necessary to solve a difficult problem in the manufacture of such accelerometers, namely that of obtaining a precise and reproducible frequency of mechanical resonance of the mobile plate/spring cell. The dynamic range (maximum signal-to-noise ratio) of this type of sensor is highly dependent on this frequency.
There is also another problem to be solved for accelerometers sensitive to the vertical component: sagging of the mobile mass due to the effect of gravity.
In vertical accelerometers (i.e. ones sensitive to the vertical component of acceleration), the mass sags due to its own weight by an amount xcex94z=mxc2x7g/km (m=mass of mobile plate, g=acceleration due to gravity, km=mechanical stiffness of springs).
Moreover, as the dynamic range of the accelerometer is proportional to the mass divided by the stiffness (S=m/k), a high mass and a low stiffness are required to achieve good performance. This leads to a large sag due to gravity.
In the vertical position, for a system with free deformation, the distance between the fixed plates and the mobile plates must be at least equal to the sag, as otherwise return systems must be used. However, too great a distance between the electrodes leads to poor performance because of problems with obtaining sufficient electric fields. The sagging therefore limits the performance of the sensor.
The mobile mass is generally centred on the armature in an attempt to solve these problems, which imposes the use of relatively complex manufacturing techniques such as:
1. prestressing the springs,
2. additional compensator springs,
3. electrostatic return (see U.S. Pat. No. 5,345,824),
4. remote electromagnetic return, and
5. additional fabrication steps (see U.S. Pat. No. 4,922,756).
U.S. Pat. No. 4,922,756 describes the fabrication of a micromachined sensor with the stiffness constants of the springs precisely controlled during the fabrication process. However, this is achieved at the price of additional fabrication technology steps.
U.S. Pat. No. 5,345,824 addresses the problem of the spread of the stiffness constant of the springs by minimizing the mechanical stiffness constant km but centring the mass by means of a small percentage of the total available electrostatic force. The output signal is therefore independent of the constant km because the springs are not deflected. However, this modifies the sensitivity of the accelerometer.
The skilled person therefore usually seeks a compromise between optimizing performance by reducing the stiffness constant, which increases the sag, optimizing performance by reducing the distance between the electrodes to obtain sufficiently high electric fields, which limits the possibilities of sagging, and optimizing the usable range of frequencies.
The device according to the invention is a slaved mobile plate accelerometer using variations of capacitance to detect the movement of a mass, it comprises:
at least one fixed electrode rigidly attached to an armature,
at least one mobile electrode suspended by springs from the armature and facing each fixed electrode to form at least one capacitor, each mobile electrode being adapted to move relative to each fixed electrode due to the effect of acceleration, so causing a variation of the capacitance of each capacitor, and
an electronic circuit for adjusting the electrostatic stiffness and comprising a control system for detecting the variation of the capacitance of each capacitor and reacting by applying a feedback voltage between each mobile electrode and the fixed electrode facing said mobile electrode,
characterized in that the springs have a stiffness chosen intentionally to place the mechanical resonant frequency beyond the top frequency of the band of interest and the circuit for adjusting the electrostatic stiffness is adapted to return the apparent resonant frequency into the band of interest.
A stiffness-adjusting device according to the invention of the above kind improves the performance of the system since it simultaneously:
1. compensates the spread of the mechanical stiffness of the springs suspending the mobile plate,
2. limits the sagging of vertical accelerometers by using a high mechanical stiffness, compensated by a high electrostatic stiffness, and
3. optimizes performance in the wanted band.
Note that deliberately placing the frequency of mechanical resonance beyond the top frequency of the wanted band overcomes the prejudices of the skilled person, this solution being at first sight unfavourable to the dynamic range, which is proportional to S=m/km.
In an advantageous embodiment of the accelerometer according to the invention, the accelerometer includes two fixed electrodes electrically insulated from each other.
In another advantageous embodiment of the accelerometer according to the invention the accelerometer includes a single mobile electrode.
In another advantageous embodiment, the electronic circuit of the accelerometer according to the invention enables time-division multiplexing of each mobile electrode.
In a further advantageous embodiment, the accelerometer according to the invention has a time-division multiplexing cycle which includes four steps:
a first step during which a voltage sample and its symmetrical counterpart relative to ground are respectively applied between each fixed electrode and the mobile electrode,
a second step during which the capacitor constituted by one of said two fixed electrodes and the mobile electrode and the capacitor constituted by the other fixed electrode and the mobile electrode are discharged,
a third step during which a feedback voltage is applied to one or the other of the capacitors constituted by the mobile electrode and one of the fixed electrodes, as a function of a decision taken by the control system, and
a fourth step during which the operation of the second step is repeated.
In another advantageous embodiment, the electronic circuit of the accelerometer according to the invention varies the amplitudes of the voltages between each fixed electrode and each mobile electrode to adjust the electrostatic stiffness.
A further advantageous embodiment of the electronic circuit of the accelerometer according to the invention enables the duration of the time-division multiplexing steps to be adjusted.
In a further advantageous embodiment of the accelerometer according to the invention, the duration of the time-division multiplexing steps is adjusted to adjust the electrostatic stiffness.
In a further advantageous embodiment of the accelerometer according to the invention, the electrostatic stiffness is adjusted to compensate the spread of the mechanical stiffness of the springs.
In another advantageous embodiment of the accelerometer according to the invention, the electrostatic stiffness is adjusted to reduce sagging when the accelerometer is in a vertical position, without loss of performance.
In another embodiment of the accelerometer according to the invention, the electrostatic stiffness is adjusted to optimize performance as a function of the wanted band.
The accelerometer according to the invention can also be a component of another, more complex device.

Mobile plate accelerometer with electrostatic feedback motor


A medical imaging apparatus includes: a casing configured to form an exterior; an imaging unit housed in the casing and configured to capture a subject image; a manipulation ring rotatably provided on an outer surface of the casing; a detection unit configured to detect rotation of the manipulation ring; a manipulation calculation unit configured to calculate a rotation direction and a rotation angle of the manipulation ring based on a detection result of the detection unit; a function execution unit configured to execute a first or second function depending on the rotation direction and the rotation angle of the manipulation ring calculated by the manipulation calculation unit; and a function switch unit configured to switch a function executed by the function execution unit to the first or second function.

The present disclosure relates to a medical imaging apparatus.
In the related art, there is known a medical imaging apparatus having a casing that forms an exterior and an imaging unit housed in the casing to capture a subject image (for example, see JP 2006-320481 A).
The medical imaging apparatus discussed in JP 2006-320481 A (endoscope imaging apparatus) includes a manipulation ring (focus operating unit) rotatably provided on an outer surface of the casing. In addition, in this medical imaging apparatus, a focusing position of the optical system provided in the casing is changed by rotating the manipulation ring (to adjust a focus of the subject image).
Meanwhile, the manipulation ring may also be used to adjust an angle of view of the optical system (zoom in/out of the subject image), an aperture (exposure), or the like in addition to the focus adjustment. By adjusting focus, zoom, exposure, or the like in this manner using the manipulation ring, it is possible to delicately perform adjustment and improve convenience.

Medical imaging apparatus with rotatable manipulation ring


An integrator for integrating a deviation signal and generating an integral control signal includes an operational amplifier for receiving a deviation signal through a first resistor, a capacitor connected between an inverting input terminal and an output terminal of the operational amplifier, and a series circuit constituted of a diode and a second resistor connected in parallel to the first resistor. If a probe and a sample approach each other and the deviation signal becomes is 0.7 V or more, charges are accumulated in the capacitor through the diode and second resistor as well as the first resistor. Thus, the voltage of the integral control signal is suddenly changed to the negative to separate the probe and sample from each other. If the probe and sample are separated from each other, the deviation signal becomes negative, and the charges are removed from the capacitor through the first resistor. The voltage of the integral control signal is thus changed to the positive to allow the probe and sample to approach each other. Since the diode prevents the charges from being removed through the second resistor, the change of the integral control signal to the positive is gentler than that of the integral control signal to the negative.

1. Field of the Invention
The present invention generally relates to a scanning probe microscope such as a scanning tunnel microscope and an atomic force microscope and, more particularly, to a servo circuit for keeping a constant distance between a probe of the scanning probe microscope and a sample.
2. Description of the Related Art
A scanning probe microscope such as a scanning tunnel microscope (STM), an atomic force microscope (AFM), and a magnetic force microscope (MFM) has recently been used as a microscope having resolution on an atomic scale. The scanning probe microscope is disclosed in Elings et al., "Feedback Control for Scanning Tunnel Microscopes," U.S. Pat. No. 4,889,988 and in Elings et al., "Method to Increase the Speed of a Scanning Probe Microscope," U.S. Pat. No. 4,954,704.
A probe whose tip has a radius of about 100 nm, is brought close to a conductive sample at a distance of 1 nm. If a voltage of several volts is applied between the probe and sample in this state, tunnel current of several nanoamperes flows between one of the atoms of the tip of the probe and one of the atoms of the sample which is the closest to the tip. The tunnel current reduces logarithmically as the distance between the probe and sample increases. The STM, which makes use of this phenomenon, causes the probe to scan the surface of the sample, and then outputs atomic arrangement of the surface of the sample as an image in accordance with an amount of the flowing tunnel current.
In the STM, generally, a piezoelectric device for driving the sample or probe is controlled by the output of a tunnel current servo circuit to keep the distance between the sample and probe constant in accordance with irregularities of the surface of the sample when the probe scans the surface of the sample.
At the beginning of development of the STM, its feature was that atomic arrangement could be observed in a sample having a simple atomic structure such as carbon and silicon. The servo technique of the STM allows a three-dimensional image to be formed from the pit structure of an optical disk serving as a sample having a nm-scale structure. The servo technique has an advantage which cannot be obtained from optical microscopes or electron microscopes.
There is a great demand that a scanning range of a probe be widened up to several square micrometers in a sample having a nm-scale structure. Further, the probe is greatly moved in its up-and-down direction (Z direction).
If, however, time required for forming one image of an STM is several tens of seconds which is equal to that required for forming that of a conventional STM, a relative speed of the probe of the STM has to be several tens of times as high as that of the probe of the conventional STM. To correctly respond to the irregularities of the surface of the sample, the cut-off frequency of the response of the servo circuit has to be heightened.
If there is a change in the movement of the probe in the up-and-down direction or there are great undulations on the sample, a high-speed response is required. If the high-speed response is not performed, the probe will collide with the undulations on the sample. Since the piezoelectric device used in a mechanism for slightly moving the probe of the STM has its natural frequency, if the band of a servo gain is easily broadened, the piezoelectric device resonates and the servo circuit will be made unstable.
The above is true of all scanning probe microscopes such as the AFM and MFM.

Servo circuit of scanning probe microscope


A magnetoelastic torque sensor for providing an output signal indicative of the torque applied to a member includes a ferromagnetic, magnetostrictive, magnetoelastically active region on or in the member, the region begin proportionally subjected to the torque applied to the member. The region is endowed with an effective uniaxial magnetic anisotropy having the circumferential direction as the easy axis and is magnetically polarized in a single circumferential direction. When torque is applied to the member, the magnetoelastically active region produces a magnetic field varying with the torque, which field is sensed by magnetic field sensors arranged proximate the region.

The present invention relates to torque sensors and, more particularly, to non-contacting magnetoelastic torque transducers for providing a measure of the torque applied to a rotating shaft.
In the control of systems having rotating drive shafts, torque and speed are the fundamental parameters of interest. Therefore, the sensing and measurement of torque in an accurate, reliable and inexpensive manner has been a primary objective of workers for several decades. With the relatively recent development of prototype electric power steering systems in which an electric motor driven in response to the operation of a vehicle steering wheel controls the production torque by control of the supply current thereto, the need for a torque sensing apparatus which can accurately detect a torque produced by a steering shaft has been highlighted. Although great strides have been made, there remains a compelling need for inexpensive torque sensing devices which are capable of continuous torque measurements over extended periods of time despite severe environments and operating conditions.
Previously, torque measurement was accomplished using contact-type sensors directly attached to the shaft. One such sensor is a xe2x80x9cstrain gaugexe2x80x9d type torque detection apparatus, in which one or more strain gauges are directly attached to the outer peripheral surface of the shaft and a change in resistance caused by strain is measured by a bridge circuit or other well known means. However, contact-type sensors are relatively unstable and of limited reliability due to the direct contact with the rotating shaft. In addition, they are very expensive and are thus commercially impractical for competitive use on vehicle steering systems.
More recently, non-contact torque sensors of the magnetostrictive type have been developed for use with rotating shafts. For example, U.S. Pat. No. 4,896,544 to Garshelis discloses a sensor comprising a torque carrying member, with an appropriately ferromagnetic and magnetostrictive surface, two axially distinct circumferential bands within the member that are endowed with respectively symmetrical, helically directed residual stress induced magnetic anisotropy, and a magnetic discriminator device for detecting, without contacting the torqued member, differences in the response of the two bands to equal, axial magnetizing forces. Most typically, magnetization and sensing are accomplished by providing a pair of excitation or magnetizing coils overlying and surrounding the bands, with the coils connected in series and driven by alternating current. Torque is sensed using a pair of oppositely connected sensing coils for measuring a difference signal resulting from the fluxes of the two bands. Unfortunately, providing sufficient space for the requisite excitation and sensing coils on and around the device on which the sensor is used has created practical problems in applications where space is at a premium. Also, such sensors appear to be impractically expensive for use on highly cost-competitive devices such as vehicle steering systems.
The output signals of prior art non-contact magnetoelastic torque transducers arise as a result of changes in a magnetic property of a member which is so positioned as to be mechanically stressed, in a usefully correlative manner, by the torque of interest. In all such prior art devices the magnetic property effectively sensed is a permeability xcexc, of one form or another. This can be understood from the fact that the output signals of these devices are derived from a magnetic flux density B of a flux which arises in response to an excitation field H with B=xcexcH. While xcexc is clearly alterable by the stress and hence by the transmitted torque, its actual value for any particular stress is largely dependent on both intrinsic and structural properties of the magnetoelastically active material forming the member as well as on its temperature. Moreover xcexc is also strongly dependent on H, in a manner that is neither linear nor monotonic. The effective field H is itself sensitive to the amplitude and frequency of the electric currents from which it is generally derived as well as the distribution of permeances of the associated magnetic circuit. Temperature effects on coil resistance, air gap dimensions, leakage flux associated with permeabilities of yokes and other ancillary portions of the magnetic circuit, dielectric constants of parasitic capacitances between windings and other conductive elements and other factors as well, can all have significant influence on the sensed value of B independently of variations in torque. The basic weakness in this prior art approach to magnetoelastic torque transducers is thus seen to be that the sensed quantity, i.e., B, has a large and complex dependence on many variables and a comparatively small dependence on torsional stress with the undesirable result that the sensed variations in B do not unambiguously indicate a variation in torque.
Attempts to overcome this problem with prior art devices employ constructions providing two distinct B dependent signals, having equal quiescent values but opposite responses to torque, with means for combining the two signals differentially; the idea being to reject common mode variations in B while doubling the sensitivity to changes associated with the torque. The requirement for a zero output signal with zero applied torque demands great care in establishing precise symmetry in the two B sensors and precise equality in both the quiescent xcexc in the two regions of the member being probed and in the exciting fields. The complexities associated with realizing the sought for benefits of these constructions, in the sensor portion itself as well as in the associated electronic circuits required for providing temperature compensating excitation currents and signal conditioning, increases both the cost and the size of a complete transducer while also generally reducing its adaptability, maintainability and reliability.
Therefore, it is an object of the present invention to provide a magnetoelastic torque transducer which depends for its operation on the sensing of a quantity that is inherently zero when the torque being measured is zero and which changes in both direction and magnitude in a correlative manner with the torque being measured.
Another object of the invention to provide a magnetoelastic torque transducer in which the zero value of the sensed quantity under zero torque conditions is substantially unaffected by temperature, angular position of a rotating torqued member, its rotational velocity and any radial or longitudinal air gaps between the torqued member and the quantity sensing means.
It is a still further object of this invention to provide a magnetoelastic torque transducer which requires no excitation field.
Yet another object of the invention is to provide a magnetoelastic torque transducer which requires neither exciting currents nor coils.
It is still another object of the invention to provide a magnetoelastic torque transducer comprising a magnetoelastically active portion which has been endowed with an effective uniaxial magnetic anisotropy having the circumferential direction as the easy axis, and magnetically polarized in a substantially circumferential direction.
A further object of this invention is to provide a magnetoelastic torque transducer which requires neither exciting currents nor coils, and in which the sensed quantity is converted into an electrical output signal by solid state devices.
It is also an object of the invention to provide a magnetoelastic torque transducer which requires neither exciting currents nor coils, in which the integrated circuit device includes means for compensating for variations in the transfer function arising from variations in temperature.
Another object of the invention is to provide a magnetoelastic torque transducer which requires neither exciting currents nor coils, in which an integrated circuit device provides compensation for expanding the range over which output is linear.
An additional object of the invention is to provide a magnetoelastic torque transducer which requires neither exciting currents nor coils, is simple, can be constructed at low cost, is suitable for applications requiring extreme reliability, e.g., for sensing the torque input to a steering system of a motor vehicle.
A further object of the present invention is to provide a non-contact method for measuring torque comprising the steps of: attaching to a rotating torqued member a circumferential transducer endowed with an effective uniaxial magnetoelastic anisotropy and magnetically polarized in the circumferential direction, which produces a field varying in response to stress on the transducer, and measuring a component of field output of the transducer as an indication of torque on the rotating torqued member.
These objects and others are achieved by providing a torque sensor comprising a magnetoelastically active element, and a magnetic sensor, such as a Hall effect sensor, responsive to the field of the magnetoelastically active portion. In the preferred embodiment, the magnetoelastically active portion comprises a ring of material endowed with an effective uniaxial magnetic anisotropy such that the circumferential direction is the easy axis, and magnetically polarized in a substantially circumferential direction. The ring is attached to the torqued member, such as a rotating shaft, so that application of a torque to the shaft is transmitted to the ring. The torque on the ring reorients the circumferential magnetic orientation of the ring, producing a helical magnetic orientation having both circumferential and axial components. A magnetic field vector sensor is mounted in a fixed position relative to the ring and oriented so that it responds to the field arising from the axial component of the magnetization within the ring. The magnetic field vector sensor may be mounted on a flux collector if desired. The output of the sensor is thus proportional to the change in orientation of magnetization in the ring resulting from torque applied to the shaft and transmitted to the ring.

Circularly magnetized non-contact torque sensor and method for measuring torque using the same


A display card holder which securely holds and displays a directory card or the like for use in connection with shopping baskets. The holder has releasable outer frame member which clamps the card to a backing member. The backing member is coupled to the shopping basket by means of a fastening device. The fastening device has a portion which engages the card and in combination with the outer frame member further ensures the clamping of the card to the backing member.

1. Field of the Invention
The present invention relates generally to a directory frame for use in combination with a shopping cart, and more particularly to a directory frame of a display card holder which receives a shopping directory card or advertisement placard and which may be removably attached to a shopping cart.
2. Description of Related Art
In general, large shopping centers and food markets typically have thousands of items of products stacked on shelves and arranged in aisles. These thousands of products are typically grouped together wherein they are essentially the same product but differ in brand or manufacturer. As is often the case, the department store or food store can assist the shopper by indicating in which aisles particular items my be found. For example, a shopping directory may be hung from a ceiling or placed in a stand at either end of an aisle. There are several problems associated with directories which must be hung from the ceiling over a particular area of the store or above a certain aisle. For example, in a very large store it is often difficult to see what is in a particular aisle or in a particular section of the store when one is located at the opposite end of the store. Also, because the printing on such directories must be large enough to be readable from a distance, fewer items can be listed on such a directory. Finally if the store relocates a certain product, the directory will have to be changed or replaced.
In an effort to solve such problems, the applicant's co-pending application No. 08/093,514, filed Jul. 19, 1993, describes a directory holder which may be mounted directly on a shopping cart. The directory holder of this reference allows directory and advertising placards or cards to be carried directly on the shopping cart for easy reference by a shopper. The directory holder may comprise a pair of backing members which are mounted back-to-back in the area of the basket of the shopping cart, with a vertical wire wall of the cart positioned between the pair of directory holders. In particular, the directory holder has a frame member which is removably attached to each of the backing member with the aid of a coupling device. Moreover, the directory holder is designed so that the frame member can withstand frequent collisions with other shopping carts and yet allow the placard retained between the backing member and the frame member to be easily changed to substitute a revised directory or a new advertisement.
However, for some applications, it may be desirable that the directory holder be much more compact and thinner without sacrificing the durability and the ability to easily change the placard. In addition, it may also be desirable to simplify the structure of a mechanism to clamp the placard between the backing member and the frame member without sacrificing the effectiveness in clamping the placard therebetween.


In purge processing, ink ejected from a head weeps from a cap unit due to weight of the ink during the movement of a maintenance unit to a retraction position. Then, the ink is absorbed into a primary recovery portion mounted on a movable body. When the maintenance unit reaches the retraction position, the primary recovery portion comes into contact with an ink absorber of the secondary recovery portion so that the ink migrates from the primary recovery portion to the secondary recovery portion due to a capillary phenomenon. Also, when the maintenance unit moves to a maintenance position, the primary recovery portion comes into contact with an ink absorber of the secondary recovery portion so that the ink migrates from the primary recovery portion to the secondary recovery portion due to a capillary phenomenon.

1. Field of the Invention
The present invention relates to an inkjet printer and a cap unit for maintenance unit of the inkjet printer.
2. Description of the Related Art
In a head of an inkjet printer, a large number of nozzles are formed to eject ink there from so that printing can be carried out on recording paper or various sheet-like recording media (hereinafter also referred to collectively as "paper-like recording medium"). When ink is ejected through the nozzles, ink is supplied thereto. Therefore, the nozzles are always filled with ink.
When such a head is exposed to the atmosphere for a long time without carrying out printing, a solvent component evaporates gradually from the ink in the nozzles so that the ink in the nozzles may increase in concentration or the inside of each nozzle may be dried. In such a state, ink cannot be ejected properly from the nozzles. Thus, the quality of printing is deteriorated.
Therefore, the inkjet printer is provided with a cap, which comes into close contact with the head when the head does not engage in printing, in order to prevent the ink in the nozzles from increasing in concentration or the inside of each nozzle from being dried (for example, see JP-A-2001-301186 and JP-A-2002-301831).
Even though such a cap is provided, passage of a long time may result in evaporation of the solvent component from the ink so that the ink charged into the nozzles may increase in concentration. At a time of starting printing, processing for bringing the cap into close contact with the head while ejecting ink from the head to thereby eliminate high-concentration ink from the head (hereinafter also referred to as "purge processing") is therefore performed (see the paragraph [0010] in JP-A-2001-301186 and the paragraph [0035] in JP-A-2002-301831).
JP-A-2001-301186 and JP-A-2002-301831 disclose the following purge processing system. In the disclosed purge processing system, a negative pressure is generated in a cap by use of a suction pump so as to generate a difference in pressure between an ink flow channel on the upstream side of the head and the inside of the cap, by which ink is ejected from the head. In the following description, this purge processing system will be referred to as "suction system".
On the other hand, the present inventor has examined another purge processing system in which the pressure is increased in an ink flow channel on the upstream side of the head by use of a pressure pump so as to generate a different in pressure between the ink flow channel on the upstream side of the head and the inside of the cap, by which ink is ejected from the head. In the following description, this purge processing system will be referred to as "pressure system".
However, in a case of performing the purge processing in the pressure system, there has been a problem as will described below.
In the case of the suction-system purge processing, ink ejected from the head is sucked by the suction pump so that the ink can be discharged to the outside of the cap. Accordingly, waste ink in the cap can be eliminated comparatively easily.
However, in the case of the pressure-system purge processing, if the system is not provided with the suction pump for generating a negative pressure in the cap, there occurs a problem that the ink ejected from the head stays in the cap so that the ink cannot be discharged to the outside of the cap effectually.
As for this problem, it is not impossible to provide a suction pump even when the pressure-system purge processing is performed. Indeed, there is a solution that a suction pump is provided to eliminate the ink from the cap.
However, in such a solution, the suction pump is provided separately in addition to the pressure pump. Thus, there occurs another problem that the number of pumps increases, thereby causing disadvantages in terms of both the cost and the number of man-hours in comparison with the suction system in which ink suction and negative pressure generation in the cap can be performed with a single pump.
In addition, the inventor has examined a structure in which a cap has a large displacement between a time when the cap is in close contact with the head and a time when the cap is at a distance from the head. In this case, when the suction pump is fixed to a main body side as in the inkjet printer according to JP-A-2002-301831, it is necessary to provide a counter measure such as a sufficiently long flexible tube for connecting the cap having the large displacement and the suction pump having no displacement.
However, the longer such a flexible tube is, the lower the suction capability of the pump is. It is therefore necessary to provide a pump having higher performance, causing increase in size or cost of the pump. In addition, as the flexible tube is longer, the risk that the flexible tube moving following the cap is caught or entangled by something becomes higher. Further, when a barrier-free space for allowing the flexible tube to move smoothly is secured to prevent the flexible tube from being caught or entangled by something, the size of the printer may be increased correspondingly to the secured barrier-free space.
When, for example, a structure is adopted in which a suction pump moves retaining the position relationship with a cap, such an excessively long flexible tube is dispensed with. Accordingly, these problems may be solved.
However, for such a countermeasure, it is also necessary to secure a space for allowing the pump to move, still causing increase in the size of the printer. In addition, the movement of the pump may provoke a failure of the pump.

Inkjet printer and cap unit for maintenance unit of inkjet printer


A switching control circuit having detection terminal, input terminal, ramp generator, program terminal, error amplifier, mix circuit, and delay circuit for power factor control is provided. The detection terminal generates a detection signal in response to the inductor discharge. An input terminal is connected for detecting a switching current signal. The program terminal determines the slew rate of the ramp signal and the maximum on-time of the switching signal. An error amplifier generates an error signal for regulating the output. A mix circuit generates a mixing signal proportional to ramp signal and the switching current signal. The switching signal is turned on in response to the detection signal, and is turned off based on the error signal. The slew rate of the mixing signal is increased in response to the increase of the input voltage. The on-time of the switching signal is increased inversely proportional to the input voltage.

Most power factor correction techniques incorporate a boost topology, which is operated in either continuous or discontinuous inductor current mode and is operated at a fixed or variable switching frequency. Due to a lower peak current, the continuous inductor current mode, which operated at a fixed switching frequency, is used for higher power applications. For lower power applications, the discontinuous inductor current mode, which is operated in a variable switching frequency, provides several advantages including smaller inductor size, lower costs, simpler circuitry, and zero current switching (ZCS).
FIG. 1 illustrates a conventional PFC converter, in which a switching signal VG is connected to a transistor 10 to switch an inductor 20 and to control an input current IIN. An input current IAC of the PFC converter is controlled to achieve a lower current harmonic distortion.
FIGS. 2A and 2B illustrate the input current waveforms IAC and IIN in response to the input voltages VAC and VIN for the conventional PFC converter. The pulse width of the PFC controller is controlled by a voltage error amplifier, which is compared to a saw-tooth waveform generated by a control circuit. The pulse width varies with the line and load conditions but should be maintained at a constant for a half line cycle. Therefore the voltage error amplifier is necessary to have a lower frequency bandwidth that is below the line frequency. The ZCS includes several application advantages. For example, the inductor current is released to zero before the next switching cycle is started thus producing higher switching efficiency. Because the change of the inductor current is equal to the peak inductor current and the current starts and returns to zero on each cycle, the current waveform has a triangular shape with an average value equal to one-half of the peak current multiplied by its time. Since ZCS is switched right on edge between continuous and discontinuous current modes; therefore, variable switching frequency is resulted. The low-bandwidth pulse width modulation (PWM) incorporating ZCS provides a natural power factor correction for an input current.
FIG. 3 illustrates the input current (IIN) waveform, which is increased in response to the enabling of the switching signal (VG), for the conventional PFC converter. The on-time (TON) and the off-time (TOFF) represent a charge period and a discharge period of the inductor 20, respectively.
FIGS. 4A, 4B, and 4C illustrate the three control stages T1–T3 of the conventional PFC converter. The inductor 20 is charged when the transistor 10 is turned on. The energy of the inductor 20 is discharged to the capacitor 50 through a rectifier 30 once the transistor 10 is turned off. The output voltage (VO) of the PFC converter is normally set to a higher voltage, such as 400V, to achieve a better power factor control. Therefore, a parasitic capacitor 15 of the transistor 10 shall be charged up to the higher voltage VO during the discharge period of the inductor 20. As illustrated in FIG. 4C, the energy stored in the parasitic capacitor 15 shall be discharged to the capacitor 16 (or a parasitic capacitor) after the inductor 20 is fully discharged and before the transistor 10 is turned on. A voltage VOS is thus produced on the capacitor 16. The voltage VOS therefore inhibits the input current IAC which flows through the bridge rectifier 40 during the lower VAC period.
FIGS. 5A and 5B illustrate the input current distortion that is caused by the voltage VOS. Recently a variety of discontinuous current PFC controllers have been developed for the power factor control, such as ST6561 of ST-Microelectronics, France; and TDA4862 of Siemens, Germany.
FIG. 6A illustrates the circuit schematic of the aforementioned conventional PFC controllers, in which a multiplier terminal (VM) is connected to sense the input waveform VIN via a plurality of resistors 21 and 22. The voltage sensed on the multiplier terminal (VM) is applied to modulate the on-time (TON) as illustrated in FIG. 6B. The modulated on-time (TON) shall reduce the voltage VOS and improve the input current waveform. However, the drawbacks of the foregoing approach are a higher power consumption of the resistor 21 and complexity of the control circuitry. In addition, another drawback of the aforementioned controllers is without under-voltage protection, which causes the PFC converter to overload in case of brownout conditions.

Switching control circuit for discontinuous mode PFC converters


A task obtained by a communications processor is decomposed into one or more requests that form a request group. The requests of the request group are sent to main memory and responses to those requests are expected. There may be requests for a plurality of request groups being processed concurrently. However, responses to the request groups are to be returned to the communications processor in the order in which the request groups were sent from the communications processor. To ensure this ordering, dependencies between the request groups are tracked by hardware coupled to the communications processor.

In various communications environments, the passing of data packets between communications units of an environment is performed using a specialized, dedicated communications processor. Each communications unit of the environment has such a processor, which is used to send or receive data packets over an external connection. In the case of a sending unit, the communications processor gathers the data of a packet from the host system's main memory into a temporary staging buffer. Then, when the gather is complete, the communications processor initiates the sending of the data packet over the external connection. In the case of a receiving system, after a packet has been received over an external connection into a temporary staging buffer, the communications processor scatters the packet data out to the host system's main memory.
To achieve enhanced throughput of the communications environment, the communications processor may be at various stages of processing for multiple data packets at any given time. Thus, it is possible that the data returned to the communications processor from the main memory may be in an order that differs from the order in which the requests for the data were sent to the main memory.
In some systems, however, it is important that the data sent by the communications processor over the external connection correspond to the same order in which the requests were issued by the communications processor to the main memory. Thus, previously, the communications processor had the responsibility of ensuring that the memory responses were placed in proper order and then sent over the external connection in proper order. This required that code be added to the specialized communications processor, which increased the complexity and cost of the communications processor and degraded its performance.
Based on the foregoing, a need still exists for an enhanced capability for managing out-of-order data packets. In particular, a need exists for a capability that enables the grouping of data packet requests into request groups, and the tracking of dependencies between the request groups in order to ensure proper ordering of the data packets.

This patent is subject to a terminal disclaimer.

Use of hardware to manage dependencies between groups of network data packets

International Business Machines Corporation


A conveyance device, which conveys wafers in a casing 30, includes a primary blowing fan 17 that generates airflow within the casing 30 in a first direction; a discharge opening 26 that is located at a downstream side of the airflow generated by the primary blowing fan 17, is interconnected with the interior of the casing 30, and discharges gases at the interior of the casing 30 outside of the casing 30; a base 18d that is supported by a gate-shaped conveyance arm 22 disposed within the casing 30 and moves within the casing 30 at the upstream side of the discharge opening 26 and at the downstream side of the primary blowing fan 17; an end effector 21 that is located at the base 18d and that carries wafers; and a blowing fan 19 that is located at the base and that generates airflow in the first direction.

In the related art, there is known a device which conveys a conveyance object within a casing (see, e.g., Patent Document 1). The device disclosed in Patent Document 1, which is a device that conveys a workpiece such as a semiconductor wafer or the like, includes an accommodating box, a conveyance chamber, a load lock and a processing chamber. A semiconductor wafer accommodated within the accommodating box is carried out by a conveyance unit disposed within the conveyance chamber, and carried into the load lock to be subjected to specified processing within the processing chamber. The semiconductor wafer thus processed is carried out from the load lock by the conveyance unit, and carried into the accommodating box or conveyed to a load lock connected to another processing chamber. A blowing fan that generates airflow (a down-flow) from an upper side toward a lower side of the conveyance chamber and a filter are located in an upper area within the conveyance chamber. A ventilation outlet is provided in a bottom portion of the conveyance chamber. The conveyance chamber is configured such that clean gas is circulated by the blowing fan and the ventilation outlet.

Conveyance device and substrate processing system


The disclosed invention is a control system for the systematic testing, calibration, and operation of weighting apparatus having multiple inputs. The invention also provides a fault alarm.. The system utilizes a summing network of resistors and switches to isolate and test or calibrate selected load cells controlled by the system Additionally, the summing network and the isolation switches of the control system provide a means for continued operation of defective scales having substantially equal load inputs. This is accomplished by electrically isolating those load cells which have become defective.

1. Field of the Invention
This invention relates to a control system for the testing, calibration and enhanced operation of industrial scales having multiple weight inputs.
2. Description of Related Art
Multiple input electronic scales have three basic elements; multiple load cells, a device referred to in the industry as a junction box, and a weight indicator. In its most simple form a load cell is constructed by sandwiching an electrical type strain gage between layers of rigid material. As weight is applied to the layers, current flow through the electrical strain gage varies in response to the amount of weight applied. A junction box receives input signals from the multiple load cells, sums and averages the signals and transmits the averaged signal to the weight indicator. The weight indicator receives the averaged signal from the junction box and electrically converts the signal to a readable form indicating the weight being applied to the scale.
More specifically, load cells are precision machined metallic devices which will deflect under load and return to normal state when unloaded. The normal rating of signal output on a load cell is stated as a millivolt signal, most typically 2 or 3 millivolts per volt of excitation. Typically excitation is 10 volts D.C. Therefore, a 3 millivolts per volt of excitation load cell being powered by a 10 volt D.C. power supply will output a 30 millivolt signal when loaded to its full rated capacity. For example, a load cell having a 1000 pound capacity will output 3 millivolts per volt of excitation or 30 millivolts of signal when loaded 100 percent,i.e., 1000 pounds. Likewise, the millivolt signal will be 15 millivolts at 500 pounds. The output is both proportional and linear to the weight applied to the scale.
When multiple load cells are used, for example, under the four legs of a tank, the voltage signals are summed in a junction box located at the base of the tank. The junction box is located in close proximity to the load cells to minimize the lengths of the cables connecting the load cells to the junction box. This is done in part because the cable is quite expensive. More importantly, a considerable loss of signal is experienced as the length of the cables increase. Any signal loss greatly reduces the accuracy of the scale system.
A typical prior art junction box distributes a 10 volt excitation power to each of the load cells. The excitation power is provided by a power supply which is often a part of the scale display. The junction box receives a signal output from each load cell. Through the application of electrical resistors, it sums and averages the signals. The averaged signal is then transmitted to the weight indicator. It will be readily appreciated that accurate calibration of each load cell is of utmost importance, because the resultant average analog signal is fed directly to the weight indicator.
Thus, in a properly calibrated four input system having four 1000 pound load cells at full capacity, each load cell would output a 30 millivolt signal. The junction box would receive, sum, and average the signals and would output the resultant average voltage. This average voltage would result from the 30 millivolt output from each load cell multiplied by 4 load cells for a total output of 120 millivolts which would be divided by 4, again the number of load cells, for a resultant average of 30 millivolts. This 30 millivolt signal would then be transmitted to the digital weight indicator which would be calibrated to read 4000 pounds with an input of 30 millivolts.
To illustrate the effect of a defective or uncalibrated load cell, let us assume that one cell failed completely. In this case the total input to the junction box would fall from 120 to 90 millivolts which when averaged by the number of load cells (4) results in an average of 22.5 rather than 30 millivolts. The 22.5 millivolts when transmitted to the digital weight indicator will result in a reading of 3000 pounds rather than the actual weight of 4000 pounds, a resultant error of 25 percent.
Once the load cell signals have been summed, a digital indicator cannot indicate that one or more load cells have failed or drifted out of calibration and that the displayed weight is incorrect. As indicated in the example set forth above, digital type indicators which are universally used, are calibrated over a range of zero to full span capacity. The primary function of the indicator is to convert from an analog millivolt signal to a scaled digital display shown as units of weight. Some digital indicators have the capability to detect a significant zero shift, but only when the weight vessel returns to a true zero.
The calibration of such prior art scales is quite involved For example, tanks and hopper scales, because of their size and design limitations, are extremely difficult to calibrate precisely during initial installation. Periodic recalibration or accuracy verification of such industrial type scales is even more costly, difficult and time consuming, because of the interruption of service and the requirement that the scales be unloaded. Therefore, a great many electronic scales are never retested for accuracy unless they fail completely. However, scales licensed by law must normally be tested at least once a year. In many applications, such as the weighing of explosives or other dangerous chemicals, frequent calibration is critical, since the average life expectancy of a load cell is only about six years. The major causes of load cell failure are shock loading, moisture, vibration, and heat. Moisture often enters a load cell through a cracked or deteriorated cable and shorts out the load cell.
Prior art scales of the type described above have no alarm means for notifying the user that a load cell has failed. Thus, without the knowledge of the scale operator a load cell may fail causing the digital indicator to be off by 25 percent. Accordingly, a scale which should be reading 100,000 pounds may be reading only 75,000 pounds and the scale operator would have no way of knowing that the scale was in error. It follows that the prior art devices provide no means for the scale user to quickly and easily verify the operability or calibration of the scale. In such prior art scales, operability or calibration tests require specialized electronic equipment not normally owned by scale users. Therefore, verification of an industrial scale's accuracy has been a procedure which could be accomplished only by scale specialist. Calibration verification of these scales is quite complicated, costly and time consuming. When possible calibration of industrial scales is done on weekends or other off-production times so as to minimize interference with production.

Control system for multiple input scales


Amplifier circuits that generate CM currents are provided. Amplifier circuits that generator DM currents are also provided. Fully differential current feedback amplifier circuits with separate CM and DM inputs are also provided. Such amplifier circuits combine the benefits of CFA designs, such as high slew rate and bandwidth, with independent control of DM and CM signals. This description is not intended to be a complete description of, or limit the scope of, the invention. Other features, aspects, and objects of the invention can be obtained from a review of the specification, the figures and the claims.

FIG. 1A is a macro level diagram of a basic current feedback amplifier (CFA) 100. FIG. 1B, which is a high level circuit diagram, will be used to describe the basic operation of the current feedback amplifier (CFA) 100, which can be modeled as two ideal voltage buffers 106 and 108, a complementary pair of current mirrors 110 and 112 and feedback and gain resistors RF and RG. When a voltage is applied to the non-inverting input 102, it is immediately buffered to the inverting input 104. Assuming a standard non-inverting op-amp configuration, this voltage causes a change in the current flowing through the feedback and gain resistors RF and RG. The input voltage buffer 106 must supply this current; therefore the current must flow through the current mirrors 110 and 112 and is duplicated, causing a ΔI to be applied to a high-impedance node 114. This current, flowing into the high impedance node 114, causes a change in voltage that is then transferred to the CFA output 116 by the second buffer 108. The key thing to focus on in this case is that the amplifier's operation depends on correctly sensing and mirroring the change in current caused by the initial change in input voltage. This creates the "current feedback" nature of the amplifier.
Referring now to FIG. 2, a symmetrical pair of CFAs, labeled 100a and 100b, are hooked up in a standard differential gain configuration to form a differential amplifier circuit 200. Standard analysis using the concept of half-circuits leads to the ability to analyze the differential circuit in terms of two signal paths, one for differential-mode signals and one for common-mode signals (hereafter referred to as DM and CM, respectively). Any arbitrary input to the amplifier circuit 200 can be expressed as a sum of DM and CM components. Half-circuits 300a and 300b are shown explicitly in FIG. 3.
It is immediately apparent that the DM and CM signal paths will have different voltage gains and different loading effects, and that therefore optimizing the amplifier circuit 200 for one of the paths will inevitably compromise optimal performance on the other path. More generally it may be desirable to send completely different signals on the DM and CM signal paths. It may also be desirable to cancel out part or all of either the CM or DM signals. Therefore, the ability to tune the CM and DM paths independently is desirable.


A lid assembly for a refuse container includes a lid member pivotally attached to the upper surface of the refuse container, a lid prop and a mechanism for pivotally attaching the lid prop to the container. The lid member includes a cam-shaped lobe which contacts the upper surface of the container when the lid member is in an open position limiting the range of pivoting motion of the lid member. The lid member further includes a bottom surface and a front surface. When pivoted to a lid supporting position, a lid supporting surface of the lid prop contacts the bottom surface of the lid member and a flange of the lid prop faces the front surface of the lid member. The lid prop is pivotally coupled to the refuse container such that gravity forces the flange toward the front surface of the lid member when the container is in its upright position.

1. Field of the Invention
The present invention relates to a lid assembly including a lid prop and, more particularly, a lid assembly for a refuse container wherein the lid assembly includes at least one lid member pivotally secured to the container and configured to pivot within a predetermined range of motion and a pivotally-attached lid prop mechanism adapted to support the lid member in an open position and to automatically release the lid member after the container has been turned over to dump refuse from the container.
2. Description of the Related Art
Prior art lid assemblies for use with refuse containers such as dumpsters suffer from a number of deficiencies. When containers are raised and turned over to empty their contents into a garbage truck, there is a danger that their lids will swing out too far and be damaged or even sheared off from colliding with the garbage truck. Thus, it would be desirable to provide a mechanism which ensures that lid members which are attached to a refuse container are not damaged during the refuse dumping process. Furthermore, it would be desirable if such a mechanism were configured to ensure that the lid members closed automatically after the refuse is dumped from the container and the container is returned to its upright position. Additionally, it would be desirable if the same mechanism also allowed a person to manually prop open a lid member--so that refuse can be put into the container--and, if desired, leave the lid member propped open without interfering with any of the other aforementioned operational goals. Thus, an object of the present invention is to provide a simple, durable and economical lid assembly for a refuse container embodying these features.

Lid assembly including pivotally-attached lid prop member


A method of manufacturing an EEPROM cell includes growing a first oxide layer on a semiconductor substrate; forming a first conductive layer on the first oxide layer; forming a first conductive pattern and a tunneling oxide layer by patterning the first conductive layer and the first oxide layer, the tunneling oxide layer being disposed under the first conductive pattern; forming a gate oxide layer on sidewalls of the first conductive pattern and the substrate and forming a second conductive pattern on both sides of the first conductive pattern; forming a conductive layer for a floating gate by electrically connecting the first conductive pattern to the second conductive pattern; forming a coupling oxide layer on the conductive layer for the floating gate; forming a third conductive layer on the coupling oxide layer; and forming a select transistor and a control transistor by patterning the third conductive layer, the coupling oxide layer, and the conductive layer for the floating gate. The select transistor is spaced apart from the control transistor. The select transistor, which is formed on the tunneling oxide layer, includes a gate stack formed of a select gate, a first coupling oxide pattern, and a first floating gate, and the control transistor includes a gate stack formed of a control gate, a second coupling oxide pattern, and a second floating gate.

1. Field of the Invention
The present invention relates to a method of manufacturing an electrically erasable programmable read only memory (EEPROM) cell, and more particularly, to a method of manufacturing an EEPROM cell, which forms a tunneling oxide layer using an improved process so as to enhance the write/erase efficiency of the EEPROM cell.
2. Description of the Related Art
A typical EEPROM cell includes a floating gate, a select gate, a tunneling oxide layer, a coupling oxide layer, a control gate, and a bit line. The floating gate stores charge in the form of electrons, and the select gate is formed on the floating gate to control the floating gate. The tunneling oxide layer functions as a path through which electrons are moved based on the Fowler-Nordheim tunneling (F-N tunneling) mechanism during a write or erase operation. The coupling oxide layer transmits a voltage applied to the select gate to the floating gate. The control gate transmits a bit line voltage during the write or erase operation. The bit line transmits data.
During a read or write operation, the control gate transmits data from the bit line to a cell or transmits data from the cell to the bit line. Since this control gate is connected to several cells orthogonal to the bit line and includes one or more words, it is referred to as a word line. The coupling oxide layer, which is formed on the floating gate, couples the voltage applied to the select gate during an erase operation to elevate the electric potential of the floating gate. In a typical EEPROM cell, an oxide-nitride-oxide (ONO) layer is used as a coupling oxide layer. Under the floating gate, a thick oxide region and a thin oxide region (i.e., a tunneling oxide region) are disposed. The thick oxide region reduces the coupling ratio between the voltage applied from the bit line and the voltage of the floating gate to maintain a large electric potential therebetween. Also, the thin oxide region functions as a path through which electrons move based on the F-N tunneling mechanism during a write or erase operation.
Hereinafter, a method of manufacturing a conventional EEPROM cell will be described with reference to FIGS. 1 through 5.
Referring to FIG. 1, a thick oxide layer 11 is grown on a silicon substrate 10 to a thickness of about 250 Å.
Referring to FIG. 2, a first photoresist mask 12 is formed such that the substrate 10 and the thick oxide layer 11 are exposed in a predetermined region. Impurity ions 13 are implanted into the exposed portion, thereby forming a floating junction 14 in the substrate 10. Then, the first photoresist mask 12 is removed.
Referring to FIG. 3, a second photoresist mask 16 is formed on the thick oxide layer 11 to define a tunneling oxide layer forming region 15. The thick oxide layer 11 in the tunneling oxide layer forming region 15 is wet etched using the second photoresist mask 16 as an etch mask so as to expose the floating junction 14. Then, the second photoresist mask 16 is removed.
Thereafter, a thin oxide layer is grown in the tunneling oxide layer forming region 15, thereby forming a tunneling oxide layer 17 as shown in FIG. 4. Over the substrate 10 on which the tunneling oxide layer 17 is formed, a first polysilicon layer 18 for a floating gate is formed. A coupling oxide layer 19, for example, an ONO layer, is formed thereon, and a second polysilicon layer 20 is formed to an appropriate thickness.
The second polysilicon layer 20, the ONO layer 19, and the first polysilicon layer 18 are patterned using a photolithography process. As a result, referring to FIG. 5, a select transistor S and a control transistor C are formed. The select transistor has a gate stack, which includes a select gate 20a, an ONO pattern 19a, and a floating gate 18a, and the control transistor C has a gate stack, which includes a control gate 20b, an ONO pattern 19b, and a floating gate 18b. Thereafter, an appropriate ion implantation process is performed to form a cell source junction 21 and a bit line junction 22. Consequently, an EEPROM cell is completed.
However, in the conventional EEPROM cell, the tunneling oxide layer 17 is formed on a portion of the substrate 10 from which a portion of the thick oxide layer 11 is removed using wet etching. Accordingly, the tunneling oxide layer 17 is not actually formed to the same size as that of the tunneling oxide layer forming region 15 defined by the second photoresist mask 16 and at a predetermined thickness. This is because after the thick oxide layer 11 is wet etched, not only the exposed portion in the tunneling oxide layer forming region 15 is etched, but also an adjacent region can be over-etched or an undercut can be formed. As shown in FIG. 6, which is an exploded view of the select transistor S shown in FIG. 5, the resultant tunneling oxide layer 17 has a greater size B than a size A of the tunneling oxide layer forming region 15 defined in FIG. 5. Also, an etching profile obtained by wet etching the thick oxide layer 11 is inclined so that the thickness of the tunneling oxide layer 17 is greater near the edge portions than in the center portion. Thus, the coupling ratio is reduced, which can deteriorate the write/erase efficiency of the EEPROM cell.
In general, the coupling ratio is a factor that determines the voltage that is to be applied to the tunneling oxide layer 17 during a write or erase operation. The voltage applied to the tunneling oxide layer 17 during a write operation (i.e., Vtun(write)) and the voltage applied to the tunneling oxide layer 17 during an erase operation (i.e., Vtun(erase)) are expressed as shown in Equations 1 and 2.Vtun(write)=Vfg+Kw×Vbl  (1)Vtun(erase)=Vfg+Ke×Vsl  (2)
Herein, Vfg refers to a voltage applied to the floating gate 18a, Kw refers to a coupling ratio during a write operation, Vbl refers to a bit line voltage, Ke refers to a coupling ratio during an erase operation, and Vsl is a voltage applied to the select gate 20a. Kw and Ke are expressed as shown in Equation 3.Kw=1−Ctun/(Cono+Cgox+Ctun)Ke=Cono/(Cono+Cgox+Ctun)  (3)
Herein, Cono refers to the capacitance of the ONO pattern 19a, Cgox refers to the capacitance of the thick oxide layer 11, and Ctun refers to the capacitance of the tunneling oxide layer 17.
As can be seen from Equations 1, 2, and 3, the coupling ratio depends on the capacitance of a capacitor constituting the select transistor S. As a capacitance Ctun increases, both Kw and Ke decrease to lower write/erase efficiency. To prevent this problem, it is required to form the tunneling oxide layer 17 to a small size and thickness. However, in the conventional method using wet etching, the tunneling oxide layer 17 is formed to a relatively large size and thickness to reduce the coupling ratio. As a result, write/erase efficiency is deteriorated.
Also, when the tunneling oxide layer 17 is formed to a large size, the overlap margin between the tunneling oxide layer 17 and the floating junction 14 decreases so that the resulting cell size cannot be sufficiently reduced. Further, if a boundary of the floating junction 14 is positioned under the tunneling oxide layer 17 due to the small overlap margin, the EEPROM cell becomes unreliable due to band-to-band tunneling (BTBT).