A method and device for using a partial public key in a cryptosystem. The cryptosystem may be based on a group, such as an elliptic curve over a finite field. The device includes a first memory for storing system parameters of the cryptosystem and a second memory for storing a portion of a public key of the cryptosystem. The device receives the complete public key, or the remainder of the public key, via communication with another device. The received portion of the public key is used to form a validated public key. A processor of the device uses the validated public key for encrypting messages and/or verifying signatures. The size of the second memory is reduced since only part of the public key is stored.

Embedded Devices are increasingly being used to communicate sensitive information and are required to include security measures. Usually, embedded devices have limited resources as they are desired to be small. Therefore security mechanisms, such as encryption, authentication and verification, implemented on an embedded device need to be very efficient in terms of memory and computation requirements.
It is well known that data can be encrypted and then decrypted by utilizing a pair of keys, one of which is public and one of which is private. The keys are mathematically related such that data encrypted using the public key can be decrypted using the private key. It is also well known that a signature created with the private key can be verified utilizing the public key, and that anyone without the private key cannot generate a signature that will be validated.
The most well-known public key cryptosystems are those based on integer factorization and discrete logarithms in finite groups. It is also well known that by using computations in an elliptic curve defined over a finite field, it is possible to achieve an increased security level for the same key size or, conversely, the same security level for a shorter key.
Thus, elliptic curve encryption schemes are very suitable for the embedded environment, as the key sizes are much smaller than in the widely-used RSA schemes and require less memory. RSA is a registered trademark or trademark of RSA Security, Inc.
In an elliptic curve based public-key scheme, there are a number of system parameters that must be shared by all participants in order to make the scheme work. We shall term this information a set of system parameters. The set of system parameters typically consists of the definitional terms of the elliptic curve to be used, as well as a designated generator point G, represented by x- and y-coordinates. The elliptic curve defining parameters are typically designated a and b, where the group of points on the elliptic curve is defined by the equation Ep(a,b) for which y2=x3+ax+b, modulo p or the group E2m(a,b) for which y2+xy=x3+ax2+b, modulo 2m. The parameter p or m (which defines the finite field of definition) is also part of the set of system parameters. In another embodiment, the group is a finite field and the system parameters are the order of the field and the generator element. The system parameters can be programmed on the device during manufacturing and may be defined during design phase, as they can be shared by all users safely. In an embedded device, a memory (a first memory) holding the system parameters should be tamper resistant. An example of a temper resistant memory is unchangeable ROM.
In addition to the system parameters, an embedded device must store a public key consisting of a point on the elliptic curve, P, defined by x and y coordinates. The public key (P) is a scalar multiplication of that generator point by a private key, n. The corresponding private key may be held by a signing or decrypting party, not the embedded device. The point P, however, has to be programmed into the device later, when the public-private key pair is generated, to ensure secure key distribution process and to allow for multiple users with different keys on the same system. This programming will be done outside of the device manufacturer environment, and therefore the technology supporting this capability must be different. Memory must be provided that is one-time programmable in a post device-manufacturing environment. This type of memory is very expensive with current technology.
US patent "Elliptic Curve Encryption" U.S. Pat. No. 6,618,483B1 explores a concept of reducing transmission bandwidth by transmitting only one coordinate plus one bit of a public key in elliptic curve encryption. This scheme is used in a system where the encrypting party uses a key provided by a trusted party. The encrypting party is capable of recovering the complete public key, since the given information, one coordinate plus one bit of information about the other coordinate is sufficient for an elliptic curve point reconstruction.
Other techniques for using partial key information exist include, for example, hashing the key and storing only the hash of the key or a portion of the hash of the key. However, this technique requires additional functionality on the device, namely that of a cryptographically strong hash (for RSA use).

Encryption and verification using partial public key


A method for determining an acceptable spinal surgical plan for a subject using pathology prediction, comprising generating a potential spinal surgical plan, obtaining clinically relevant data of the subject, obtaining pre-operative three-dimensional images of a spinal region of the subject, determining relationships between pairs of vertebrae in the images, predicting relationships between pairs of vertebrae that are expected from the surgical plan, accessing a multiple patient database, obtaining sets of data from the database for patients with similar characteristics to the subject, determining risks of pathology types for the subject, using artificial intelligence to combine the determined risks to calculate an overall risk for pathology types for the subject, and if the overall risks are unacceptable, selecting an alternative spinal surgical plan, and if the said overall risks are acceptable, determining that said surgical plan is acceptable.

Long term surgical outcomes of spinal surgery are difficult to predict due to the many factors involved and their sophisticated relationships. Avoiding the development of post-operative junctional complications and pathologies is an important challenge in spinal deformity surgeries. Among the pathologies that may develop post operatively over time, some common pathologies are:                Adjacent level degeneration—Advanced disc degeneration or segmental instability above a surgical fusion        Adjacent segment disease—Pathology adjacent to a surgical fusion that creates symptoms of pain and/or nerve compression that leads to revision surgery        Proximal junctional kyphosis—Radiographic measure of greater than 5 degrees of progression of segmental kyphosis above a fusion        Proximal Junctional Failure—10° post-operative increase in kyphosis between upper instrumented vertebra (UIV) and UIV+2        Kyphotic Decompensation Syndrome—Progressive sagittal deformity requiring revision surgery for realignment of the spine
These pathologies may develop many months, years or even decades after a surgery, often requiring revision surgery. Furthermore, after a period of time following the surgery, post-operative instrumentation failures may occur, such as screw pull-out and implant breakage.
Today it is understood that the development of pathologies and instrumentation failures, such as those listed above, is strongly related to preoperative and post-operative spinal parameters as may be determined from three-dimensional images, as well as to the degree of anatomical adjustment during the surgery, and that a planned spinal surgical technique should take these factors into consideration, in addition to other clinically relevant patient specific risk factors.
Some references describe image based prediction methods that use comparison of image derived and non-image derived subject data to databases. For example, U.S. Pat. No. 8,818,484 to S-W Liew et al, for "Methods of predicting musculoskeletal disease" discloses methods of predicting bone or joint disease in a subject. U.S. Pat. No. 8,073,521 to S-W Liew et al, for Method for bone structure prognosis and simulated bone remodeling" discloses, among other methods, methods for estimating fracture risk in a subject. U.S. Pat. No. 6,980,922 for "Computer simulation model for determining damage to the human central nervous system" to S. C. Henderson describes a computerized model that simulates the human spinal cord and makes it possible to draw inferences about the probability of future injury. However, these references do not attempt to make correlations between a proposed surgical plan and its associated risk of pathology or instrument failure, nor does it provide a method for determining an acceptable surgical plan using image based pathology or instrument failure prediction.
Other references explore risk factors for development of pathologies, but such references usually focus on only one specific category of risk factors. For example, the article "Predictive factors for proximal junctional kyphosis in long fusions to the sacrum in adult spinal deformity" by Maruo K. et al published in SPINE, Vol. 38, No. 23, pp E1469-E1476, explores the relationships between pre-operative and post-operative spinal parameters and the risk of pathology onset. This reference states "Fracture at the UIV was the most common mechanism for PJK. Change in LL more than 30° and pre-existing TK more than 30° were identified as independent risk factors. Optimal postoperative alignment of the spine protects against the development of PJK. A surgical strategy to minimize PJK may include preoperative planning for reconstructions with a goal of optimal postoperative alignment." Another reference, "Minimally Invasive Spinal Deformity Surgery: An Evolution of Modern Techniques", edited by Michael Y. Wang et al, published by Springer-Verlag Wien 2014, focuses on past medical history and previous surgeries of a subject as important risk factors to consider when planning a spinal surgery.
"Biomechanics of spinal deformity" by Shlenk et al, Neurosurg. Focus, Vol. 14, January, 2003 states "Pathological spinal deformation, either in an acute or chronic form, is usually a result of at least one unstable motion segment." This reference describes "six fundamental segmental movements of the spine along or around the IAR [Instantaneous Axis of Rotation] can occur: 1) rotation or translation around the long axis; 2) rotation or translation around the coronal axis; 3) rotation or translation around the sagittal axis of the spine; 4) translation along the long axis of the spine; 5) translation along the coronal axis; and 6) translation along the sagittal axis of the spine (FIG. 2). Each movement may result in deformation in one of two directions involving one or many spinal segments as a result of acute chronically applied loads." However, this reference simply categorizes the deformity types, and does not provide a method for determining an acceptable surgical plan using image based pathology or instrument failure prediction.
U.S. Pat. No. 9,700,292 for "Systems and methods for surgical and interventional planning, support, post-operative follow-up, and functional recovery tracking" to N. Nawana et al, describes a system that "can provide recommendations regarding diagnosis, non-surgical treatment, surgical treatment, and recovery from the surgical treatment based on data gathered from the patient and the medical professional(s)." This reference describes methods for surgical planning including use of databases, but does not appear to provide specific methods for defining vertebral pair relationships, or to use such defined relationships in a spinal surgical planning method that predicts the likelihood of one or more pathology types, and optionally the likelihood of one or more instrument failure types, associated with a specific surgical plan for a selected subject.
The article entitled "Proximal junctional kyphosis and failure-diagnosis, prevention, and treatment" by Ngoc-Lam M. Nguyen et al, Published online 9 Jun. 2016 by Springer Science and Business Media, New York 2016, summarizes the problem in stating "Agreement on the definition, classification, and pathophysiology of PJK and PJF remains incomplete, and an understanding of the risk factors, means of prevention, and treatment of this problem remains to be elucidated." Thus, a comprehensive approach for spinal surgical planning is needed that takes into account the many types of pathology risk factors involved, and especially that accurately predicts long term outcomes of a spinal surgical plan.
There therefore exists a need for a method of predicting future pathologies based on image analysis, using predictive modeling such as machine learning, deep learning or any other statistical method that can be used to predict outcomes, operating on large databases of previously obtained data for similar procedures, which overcomes at least some of the disadvantages of existing methods.
The disclosures of each of the publications mentioned in this section and in other sections of the specification, are hereby incorporated by reference, each in its entirety.

Image based pathology prediction using artificial intelligence


A bike stroller includes a front bike stroller frame equipped with two front wheels and providing a connecting tube, a handlebar fastened to the front bike stroller frame, a rear bike stroller frame equipped with a rear wheel and providing a connecting tube and adjustably connected to the front bike stroller frame between a first position for enabling the bike stroller to be used for riding and a second position for enabling the bike stroller to be used as a baby stroller, a seat post frame selectively and detachably fastenable to the connecting tube of the front bike stroller frame or rear bike stroller frame, and a bicycle saddle selectively and detachably fastenable to the connecting tube of the front bike stroller frame or rear bike stroller frame.

1. Field of the Invention
The present invention relates to bicycle technology and more particularly, to a bike stroller, which can be selectively arranged in a first form for riding, or a second form for use as a baby stroller.
2. Description of the Related Art
U.S. Pat. No. 8,118,322B2 discloses a cycling apparatus that is constructed as a tricycle with a contractible and extendable wheel base, which can carry a child and/or a shopping basket, and which can be converted into a standard-size stroller or a standard-size shopping cart, and be steered like a standard stroller or a standard shopping cart. According to this design, it is inconvenient to change the cycling apparatus between a standard-size stroller and a standard-size shopping car. Further, the front-to-back length of this cycling apparatus is not adjustable. If the cycling apparatus is converted into a standard-size stroller for riding and carrying a baby, the user cannot pedal the cycling apparatus comfortably.


There is disclosed an improved optically readable disk having an optically readable portion arranged on said disk so as to be readable by an optical reading unit and a magnetically readable and writable portion arranged on said disk so as to be both readable and writable by a magnetic read/write unit. The magnetically readable and writable portion of the disk preferably includes data or information recorded thereon defining a desired playback parameter and/or sequence for the data or information optically recorded on the optically readable portion of the disk. Also disclosed is an improved optical disk playback apparatus comprising a drive unit for rotatably driving an optical disk, an optical reading unit operatively arranged for reading data optically recorded on said disk as said disk is rotated and a magnetic read/write unit operatively arranged for both magnetically reading data from and magnetically writing data to a magnetically readable and writable portion of said disk as said disk is rotated. An improved method of playing back data or information optically recorded on a magneto-optical disk is also disclosed.

Optically readable disks and mechanisms for playing back optically readable disks are well known in the art. Optically readable disks are produced in various forms and formats and are known by various terms in the art. Optically readable disks which include optically readable audio signals or data (such as PCM audio data) digitally recorded thereon are generally known as compact disks or "CDs." Optically readable disks which include both optically readable audio and video signals or data (frequently referred to as CD-V, CLV and CAV) digitally recorded thereon are generally known as laser disks. Optically readable disks which include computer data digitally recorded thereon are generally known as compact disk read only memory or "CD-ROM." Optically readable disks which include computer data which can be written to or recorded on a disk once and read many times are generally known in the art as write once read many disks or "WORM" disks. Optically readable disks which can be written to several times and read several times are known as magneto-optical disks.
Playback mechanisms for each of these foregoing optically readable disks are also well known in the art. Those mechanisms each include, among other things, means for rotating said optically readable disk and an optical read unit for reading the optically readable data or information recorded on said optically readable disk. Optical read units for reading the optically readable data or information recorded on said optically readable disks generally include a laser light source for illuminating the optically readable data or information recorded on said optically readable disks and a light detector for detecting the laser light reflected from the surface of said optically readable disks. The variation of the light detected by the light detector can be translated into digitally readable signals which can thereafter be decoded into digital computer readable data, digital or analog video signals and/or digital or analog audio signals. Examples of such optically readable playback mechanisms are disclosed in U.S. Pat. Nos. 4,680,748; 4,817,068; 4,627,038; 4,730,299; 4,706,237; 4,740,938; 4,873,586 and 4,894,814 (the disclosures of which are all incorporated herein by reference).
Magneto-optically readable and writable disks and playback/recording units are well known in the art, such as those disclosed in U.S. Pat. No. 4,862,439 (the disclosure of which is incorporated herein by reference). Such a magneto-optical recorder/player includes an optical head and a magnet oppositely mounted with the recordable disk placed therebetween. The magnet applies a magnetic field to the recordable disk for information recording and erasure using the magneto-optical effect. Such disks and recorder/players permit the optical recording, erasure and rerecording of optically readable data or information, such as musical selections, computer data and the like.
Optically readable disks have revolutionized the video, audio and computer industry. Optically readable disks have many advantages over other previously known recorded playback media, such as vinyl records, video tape, audio tape computer tape and computer disks (magnetic floppy disks and hard disks). The information storage density of optically readable disks is relatively high. Also, the integrity of the data or information recorded on optically readable disks is not degraded by repeated reading of said data or information from said optically readable disk. Additionally, digital data or information recorded on optically readable disks is often better suited for recording and/or reproducing original source material. Specifically, optically readable disks can reproduce audio and/or video signals better than analog recording media because of the greater dynamic range which can be recorded and reproduced on a digitally recorded optically readable disk. Computer applications of optically readable disks have permitted the relatively permanent storage of vast amounts of information or data in a relatively compact storage medium. Furthermore, for certain optically readable disks, the data or information recorded thereon is not erasable by conventional means. Accordingly, optically readable disks and mechanisms for playing back the data or information recorded on said optically readable disks are in great demand.
Optically readable disks and the mechanisms for playing back the information recorded on said optically readable disks, however, have several disadvantages. Since the data or information recorded on said optically readable disks is permanently recorded on said disks (except magneto-optical disks), the order of said data or information on said optically readable disks cannot be altered. Furthermore, with the exception of "WORM" disks and magneto-optical disks, additional data or information cannot be recorded on said optically readable disks after said disks are initially prepared. Additionally, although data or information recorded on said optically readable disks can be optically read from said disks and recorded on a separate magnetically recordable media, such as onto a magnetically recordable disk (such as a floppy disk or a hard disk), magnetically recordable tape or magnetic random access memory, such separate recording media can become lost or is difficult to associate with the optically readable disk from which said data or information was taken.
Another specific problem exists with respect to compact disks having musical selections or audio information recorded thereon. Music compact disks, as they are commonly produced today, include multiple musical selections recorded thereon. For example, a popular music compact disk may include between six and twenty different musical selection recorded on a single compact disk. A classical compact disk may also include multiple selections or may include a single musical selection. For long musical selections, such as classical music, some compact disks include recorded index points which separate the single musical selection into separate segments, such as separating a classical selection into separate movements.
In playing back the musical selections recorded on a compact disk, it is sometimes desirable to alter the sequence of the playback of the musical selections from the order that said selections were originally recorded on said compact disk. For example, one may desire to play the different selections in a different order, to play one or more selections one or more times in a playback sequence or to skip certain selections on said compact disk during a playback session.
The desirability of altering the playback sequence of data or information recorded on recording media, such as an optically readable disks, specifically musical compact disks, has been recognized in the art. For example, U.S. Pat. Nos. 4,210,940 and 4,210,785 disclose methods and apparatus for playing back in a desired sequence segments of prerecorded tapes, such as video tape.
Similarly, compact disk players (Compact Disk Digital Audio Systems) are well known in the art to be user programmable so as to play back portions of the music recorded thereon in a desired sequence. For example, U.S. Pat. Nos. 4,894,814 and 4,740,938 disclose compact disk players which can be programmed by the user to play back musical selections in a desired sequence. Generally, such compact disk players include an input unit, a logic processing unit, a memory unit and a disk reproducing unit. Within the disk player, the input unit comprises, for example, a plurality of key switches (keypad or keyboard) for entering a number representing the position of a selected piece of music on the optically readable disk to the logic processing unit. By use of the key switches, a user enters numbers corresponding to the positions of the music which one wishes to reproduce (listen to) in a desired order. The logic processing unit is, for example, a microprocessor and it transmits input signals from the input unit to the memory unit for storage and later read out. The memory unit comprises, for example, read only memories for storing an operation program and random access memories for storing data and the input signals from the key switches. The disk reproducing unit controls the position of a pick-up device relative to the disk for orderly reproduction of the data on the disk, such as music, as requested from the memory unit.
Although such prior art optical disk playback units permit a user to temporarily program a desired sequence of playback of the data recorded on optical disk, such devices must be reprogrammed when a different optical disk is inserted in the player or after the electrical power has been turned off. In other words, the optically readable disk player must be reprogrammed each time a disk is inserted into it.
The disadvantage of having to reprogram an optically readable disk player for a playback sequence for each different optical disk has also been recognized in the art. For example, U.S. Pat. No. 4,779,252 (the disclosure of which is incorporated herein by reference) discloses a compact disk player which stores in nonvolatile memory multiple playback sequence programs for different compact disks. The compact disk player reads unique subcodes prerecorded on compact disks to associate a particular compact disk with a particular program sequence stored in the player's memory. The player then retrieves the desired program sequence from its memory and executes said program sequence for playing back the compact disk inserted therein.
Although a compact disk playback system, such as disclosed in U.S. Pat. No. 4,779,252, permits multiple program sequences to be stored in memory for later use with the corresponding compact disk, such a system is not completely desirable and has several disadvantages. Such an optical disk playback system is usable only for a particular preprogrammed optical disk player. In other words, if a compact disk which had a program sequence stored in a particular playback unit, such as a home unit, is played back in a different playback unit, such as a playback unit located in an automobile or a portable playback unit, the other playback unit would have to be reprogrammed with the desired playback program sequence. The disadvantages of such a system are apparent.
Furthermore, the optical disk playback systems disclosed in U.S. Pat. Nos. 4,894,814; 4,740,938 and 4,779,252 only store playback sequence data. Heretofore, it has been unknown in the art to store on an optically readable disk user selectable playback parameters, such as program sequence, volume settings, equalization settings, bias settings, brightness settings, color balance settings, contrast settings and the like. Additionally, it has been heretofore unknown in the art to readably and writably record or store on an optically readable disk data relating to the playback of said optically readable disk, such as search logic for CD-ROMs, user alterable software for optical disk playback, select segments of data read from said optical disk and the like.

Optical disk having playback parameters recorded thereon and method for using same


A device is disclosed for securing a spinal rod to the spine which includes a head portion configured to receive a spinal rod, a locking cap configured to engage the head portion and the spinal rod upon rotation of the locking cap relative to the head portion to secure the position of the head portion relative to the spinal rod, and a fastener portion depending from the head portion and configured to engage the spine. Methods of utilizing such a device are also disclosed.

The subject disclosure relates to implantable spinal stabilization systems for surgical treatment of spinal disorders, and more particularly, to a device for connecting cylindrical spinal rods of a spinal stabilization system to the spine.
The spinal column is a complex system of bones and connective tissue which protects critical elements of the nervous system. Despite these complexities, the spine is a highly flexible structure, capable of a high degree of curvature and twist through a wide range of motion. Trauma or developmental irregularities can result in spinal pathologies which limit this range of motion.
For many years, orthopedic surgeons have attempted to correct spinal irregularities and restore stability to traumatized areas of the spine through immobilization. Over the past ten years, spinal implant systems have been developed to achieve immobilization. Examples of such systems are disclosed in U.S. Pat. Nos. 5,102,412 and 5,181,917 to Rogozinski. Such systems often include spinal instrumentation having connective structures such as elongated rods which are placed on opposite sides of the portion of the spinal column intended to be immobilized. Screws and hooks are commonly utilized to facilitate segmental attachment of such connective structures to the posterior surfaces of the spinal laminae, through the pedicles, and into the vertebral bodies. These components provide the necessary stability both in tension and compression to achieve immobilization.
Various fastening mechanisms have been provided in the prior art to facilitate securement of screws and hooks to the connective structures of a spinal stabilization system. For example, U.S. Pat. No. 5,257,993 to Asher discloses an apparatus for use in retaining a spinal hook on an elongated spinal rod. The apparatus includes a body extending upwardly from a hook portion and having an open ended recess for receiving a spinal rod and an end cap engageable with the body to close the recess. A set screw is disposed in the center of the end cap to clamp the rod in the recess of the body. The end cap and body are interconnectable by different types of connectors including a bayonet connector, a linear cam connector or a threaded connector. Other examples of fastening mechanism for facilitating attachment of screws and hooks to the connective structures of a spinal stabilization system are disclosed in U.S. Pat. No. 5,437,669 to Yuan et al. and U.S. Pat. No. 5,437,670 to Sherman et al.
In each of these prior art examples, threaded fasteners are used to facilitate securement of the connector to the spinal rod. Yet it is well known that threaded fasteners can become loosened under the influence of cyclically applied loads commonly encountered by the spinal column. Furthermore, during assembly, excessive torque applied to a threaded fastener can cause damage to the fastener as well as to the connective device with which it is associated.
It would be beneficial to provide a more reliable and effective mechanism for facilitating the attachment of screws, hooks and clamps to the connective structures of a spinal stabilization system.


The invention improves processing time when accessing information in a byte stream and avoids the step of deserializing unneeded portions of the byte stream when the byte stream encodes an information structure corresponding to a schema with arbitrarily nested lists and tuples. It facilitates efficient keyed access when lists of tuples represent tables with key columns by storing tables in nested column order, which extends the well-known concept of column-order so as to apply to arbitrarily nested tables. Using well-known offset calculation techniques within the nested lists that result from nested column order, the invention achieves greater efficiency by grouping together all scalar information items that correspond to the same node in a tree representation of the schema.

Content-based publish/subscribe messaging requires access to arbitrary message fields in each network node in order to route messages. Messages arrive as byte streams and only a few of the message's fields need to be accessed. However, the fields used to make routing decisions may be anywhere in a complex structured message. The property of random access to fields in a byte stream enables routing decisions to be organized optimally without regard to the order in which information is extracted from the byte stream, and it completely avoids any overhead associated with parsing information that isn't needed. The same property of random access to information structures stored in a byte stream form is useful in other systems as well, for example, database systems.
It is well known that untagged binary formats can provide constant time random access to fields in a byte stream by using offset calculations (perhaps indirected through offsets stored in the byte stream). However, this only works when the information structure is "flat" (does not involve any nesting of information). In practice, most information structures are not flat.
An information structure with a flat structure may be characterized as a tuple (or "structure" or "record"). The schema for such an information structure calls for a fixed sequence of fields. In this description, we use the notation [ . . . , . . . , . . . ] for tuple schemas. So, [int, string, boolean] might be the schema for an information structure containing an integer followed by a string followed by a boolean.
Ways in which information structures such as messages nest information and therefore deviate from flatness include at least the following.
Tuples may be nested. That is, the schema for an information structure might be [int, [int, string, [string, boolean]]].
Any schema element may be repeated zero or more times, forming a list. In this description, we use the notation *( . . . )* for a list in a schema. So, *(int)* means a list of zero or more integers. A list of tuples (often called a "table" or "relation") is also possible. So, *([int, string, boolean])* is the schema for a table with three columns (an integer column, a string column and a boolean column) and zero or more rows. In most relational databases, each row is a flat structure. But, in messages and advanced databases, each row may have nested tuples and embedded tables, with no intrinsic limit to how deep such nesting can go. Tuples and lists must be allowed to nest in arbitrary ways to accurately describe information structures in general.
Information structures may be recursive. For example, a field of a tuple may be defined as another instance of the tuple itself or of an encompassing tuple or list (this cannot be illustrated readily with the present notation).
Information structures may include variants in additions to tuples and lists. A variant indicates that either one type of information or another (not both) may appear. Information structures may also include dynamically typed areas in which any kind of information may appear.
It is common to define certain columns of a table as key colums. A lookup in the information structure requires finding a particular value in a particular column of the table, after which only that row (or only a specific field from the row) is accessed. In a database, an index might be built in order to do this efficiently. In messages, the tables are rarely large enough to benefit from a precomputed index, and transmitting such an index in the message adds unacceptable overhead. So, for utility in the messaging domain a processor should be able to scan just the key column (sequentially) and then randomly access just the information in its row.
In addition to what is known about using offset calculations to provide constant time access to completely flat information structures like [int, string, boolean] said techniques are readily extended to encompass just nested tuples (with no lists) such as [int, [int, string, [string, boolean]]] (by treating it as if it were [int, int, string, string, boolean]. This is what is done, for example, in an optimizing compiler when compiling code for nested struct declarations in (for example) the C language.
A tuple containing fields of varying length requires some pointer indirection in order that all the offsets are still known. For example, if int and boolean have a fixed-length representation but string does not, then we might represent the two string values in [int, int, string, string, boolean] as fixed-length pointers to strings stored elsewhere in memory. That way, the last two fields of the tuple are still at a fixed distance from its start (which is how programming languages solve the problem). It is well-known that a pointer to elsewhere in memory can be represented as a stored offset to elsewhere in a byte stream. So, this issue is solvable for byte streams as well as computer memories. Solutions like this are embodied in many Internet protocols to speed up access to information following a varying length field.
A simple table (where each row is flat because there are no nested tuples or lists) can be stored in either row order or column order. Varying the storage order for simple multi-dimensional arrays is a well-known technique for optimizing compilers. Relational databases often store tables in column order, since this can improve scan time for key columns that lack indices. However, in messaging, the representation is usually a tree structure and serialization of messages is done by recursive descent, which results in storing all tables in row order. In any case, the well-known technique of storing tables in column order must be extended in non-obvious ways to be useful when schemas use arbitrary nesting of lists within tuples within lists.
Schemas whose structure is inconvenient can sometimes be transformed into isomorphic schemas that are more convenient. The flattening of [int, [int, string, [string, boolean]]] to [lint, int, string, string, boolean] is an example of one such isomorphism. The same kind of flattening can be applied to variants. It is also known to those skilled in the field of type theory that tuples can be distributed over variants to yield an isomorphic schema. If we use the notation {int|boolean } to mean the variant whose cases are int or boolean, then [string, {int|boolean }] is isomorphic to {[string, int]|[string, boolean]}. This observation has been used to improve message processing time in IBM web sites employing the Gryphon system since 2001, and also in the IBM Event Broker product.

Byte stream organization with improved random and keyed access to information structures

International Business Machines Corporation


An interface circuit outputting a clock signal and data to a data register configured to serially read in the data synchronously with the clock signal, in response to a change of a control signal for outputting the clock signal and the data from one logic level to the other logic level, the interface circuit comprising a clock output circuit configured to: detect a logic level of the clock signal when the control signal changes from the one logic level to the other logic level; output the clock signal on an as-is basis to the data register, when detecting one logic level of the clock signal; and output the clock signal after having changed from the other logic level to the one logic level, to the data register, when detecting the other logic level of the clock signal.

1. Field of the invention
The present invention relates to an interface circuit and a clock output method for the interface circuit.
2. Description of the Related Art
Apparatus sets such as car audio and home audio have a plurality of data processing circuits for data processing associated with audio incorporated therein. These data processing circuits are connected in parallel via a controller such as a microcomputer and buses as needed, and by the controller supplying data, each of them executes data processing synchronously with data processing being executed by the other data processing circuits.
With reference to FIG. 9, a data processing system comprising a plurality of data processing circuits and a controller will be described. FIG. 9 is a block diagram for explaining a data processing system comprising a plurality of data processing circuits and a controller. The plurality of data processing circuits include, but not limited to, a PLL (Phase Locked Loop), an LCD (Liquid Crystal Display) driver, a DSP (Digital Signal Processor), an FM multiple receive circuit.
The PLL 4, LCD driver 6, DSP 8, and FM multiple receive circuit 10 are connected to the controller 2 via a data bus DB1 for transmitting a control signal CE, a data bus DB2 for transmitting a clock signal CL (or clock CL), a data bus DB3 for transmitting data DI, and a data bus DB3 for transmitting data D0 as needed.
The controller 2 outputs control signal CL, clock CL, and data DI to the PLL 4, LCD driver 6, DSP 8, and FM multiple receive circuit 10. Also, the controller 2 has data D0 from the PLL 4, LCD driver 6, DSP 8, or FM multiple receive circuit 10 inputted therein while outputting control signal CE and clock CL. The PLL 4, LCD driver 6, DSP 8, or FM multiple receive circuit 10 may not be connected to the controller 2 via data bus DB4. In this embodiment, for example, the controller 2 and the LCD driver 6 are not connected via data bus DB4.
The PLL 4 is for executing tuning of an electronic tuner, and has an interface circuit 4A that performs data input/output with the controller 2 and a data register 4B that holds data output from the interface circuit 4A. The LCD driver 6 is for executing frequency display processing for the electronic tuner, and has an interface circuit 6A that receives data input from the controller 2 and a data register 6B that holds data output from the interface circuit 6A. The DSP 8 is for executing digital processing on audio data, for example, and has an interface circuit 8A that performs data input/output with the controller 2 and a data register 8B that holds data output from the interface circuit 8A. The FM multiple receive circuit 10 is for decoding. FM-multiple, multiple, superposed data, and has an interface circuit 10A that performs data input/output with the controller 2 and a data register 10B that holds data output from the interface circuit 10A.
===Example of the Interface Circuit===
With reference to FIGS. 9, 10, and 11, an example of the interface circuit used in the PLL 4, LCD driver 6, DSP 8, and FM multiple receive circuit 10 of FIG. 9 will be described. FIG. 10 is a circuit diagram showing an example of the interface circuit. FIG. 11 is a time chart for explaining the operation of the interface circuit of FIG. 10. Note that the interface circuit of FIG. 10 does not have data bus DB4 for outputting data D0 to the controller 2.
The interface circuit has control signal CE, clock CL, and data DI inputted therein, and outputs clock SCL and data SDI. The interface circuit comprises an AND gate 102 and an AND gate 104 (clock output circuit). The AND gate 102 outputs data DI as data SDI depending on the level of control signal CE. That is, the AND gate 102 closes when control signal CE is at "L" (low level), and opens and outputs data DI as data SDI when control signal CE is at "H" (high level). The AND gate 104 outputs clock CL as clock SCL depending on the level of control signal CE. That is, when control signal CE is at "L", the AND gate 104 closes and, when control signal CE is at "H", opens and outputs clock CL as clock SCL.
The controller 2 holds clock CL at "L" and lets data DI be indefinite when control signal CE is at "L". The controller 2 outputs clock CL and data DI synchronous with the clock CL when control signal CE is at "H". That is, when control signal CE is at "L", the AND gate 102 outputs data SDI of "L" and the AND gate 104 outputs clock SCL of "L". When control signal CE is at "H", the AND gate 102 outputs data SDI that is the same as data DI and the AND gate 104 outputs clock SCL that is the same as clock CL. By this means, the data register serially reads in data SDI synchronously with clock SCL and holds the data. The data processing circuit performs required data processing on the bit value held in the data register. Note that when outputting clock CL and data DI, the controller 2 has to enable a data processing circuit as a target and disable the other data processing circuits, which are not a target. Hence, the program processing load of the controller 2 itself is large.
===Another Example of the Interface Circuit===
With reference to FIGS. 9, 13, and 14, another example of the interface circuit used in the PLL 4, LCD driver 6, DSP 8, and FM multiple receive circuit 10 of FIG. 9 will be described. FIG. 13 is a circuit diagram showing another example of the interface circuit. FIG. 14 is a time chart for explaining the operation of the interface circuit of FIG. 13. Note that the interface circuit of FIG. 13 does not have data bus DB4 for outputting data DO to the controller 2. The interface circuit of FIG. 13 identifies a data processing circuit as a target with hardware, thereby reducing the program processing load of the controller 2 itself.
The PLL 4, LCD driver 6, DSP 8, and FM multiple receive circuit 10 have respective intrinsic address codes to identify them. When control signal CE is at "L", the controller 2 outputs clock CL and data DI (address code A0 to A7) synchronous therewith, and when control signal CE is at "H", the controller 2 outputs clock CL and data DI (data D0 to Dn−1) synchronous therewith and subsequent to data DI (address code A0 to A7). Note that when control signal CE is at "L", the controller 2 holds clock CL at "L" except while data DI (address code A0 to A7) is output, and that the address code is not limited to an 8-bit code.
The interface circuit has control signal CE, clock CL, and data DI inputted therein, and outputs clock SCL and data SDI. The interface circuit comprises an address register 202, an address decoder 204, a delay circuit 206, an inverter 208, an AND gate 210, an OR gate 212, a D flip-flop 214, an AND gate 216, and an AND gate 218 (clock output circuit). The address register 202 serially reads in data DI (address code A0 to A7) at the rise timings of clock CL. The address decoder 204 checks whether the 8-bit address code A0 to A7 inputted in the address register 202 matches the intrinsic address code, and when both match, outputs "H", for example. Note that the address decoder 204 is hardware including a PLA (Programmable Logic Array), logic gates and the like. The OR gate 212 outputs "L" only for the delay time of the delay circuit 206 after the change point of control signal CE from "H" to "L". The AND gate 210 outputs "H" only for the delay time of the delay circuit 206 after the change point of control signal CE from "L" to "H". By this means, the D flip-flop 214 is reset at the change point of control signal CE from "H" to "L", and at the change point of control signal CE from "L" to "H", reads in and holds the decode output of the address decoder 204 with outputting data EN, which is the same as the decode output. Specifically, when the 8-bit address code A0 to A7 inputted in the address register 202 matches the preset intrinsic address code assigned to the data processing circuit such as the PLL 4, LCD driver 6, DSP 8, or FM multiple receive circuit 10, the D flip-flop 214 outputs data EN of "H". The AND gate 216 outputs data DI (data D0 to Dn−1) as data SDI depending on the level of data EN. That is, when data EN is at "L", the AND gate 216 closes, and when data EN is at "H", opens and outputs data DI (data D0 to Dn−1) as data SDI. The AND gate 218 outputs clock CL as clock SCL depending on the levels of control signal CE and data EN. That is, when either control signal CE or data EN is at "L", the AND gate 218 closes, and when control signal CE and data EN are at "H", opens and outputs clock CL as clock SCL.
When control signal CE is at "L", data EN is also at "L". Hence, the AND gate 216 outputs data SDI of "L", and the AND gate 218 outputs clock SCL of "L". When control signal CE is at "H", data EN is also at "H". Hence, the AND gate 216 outputs data SDI that is the same as data DI (data D) to DN−1), and the AND gate 218 outputs clock SCL that is the same as clock CL. By this means, the data register serially reads in data SDI synchronously with clock SCL and holds the data. The data processing circuit performs required data processing on the bit value held in the data register. The above is described, for example, in Japanese Patent Application Examined (KOKOKU) Publication No. Hei 3-31298.
According to the specification of controllers 2 themselves, when stopping clock CL, some controllers 2 hold clock CL at "L" while the others hold clock CL at "H".
FIG. 11 is a time chart for explaining the operation of the interface circuit of FIG. 10 for the specification that the controller 2 holds clock CL at "L". In contrast, FIG. 12 is a time chart for explaining the operation of the interface circuit of FIG. 10 for the specification that the controller 2 holds clock CL at "H". For the latter specification that the controller 2 holds clock CL at "H", the AND gate 104 outputs one clock (dummy clock) at a timing just before the AND gate 102 outputs data D0, and thereby the data register may read in data of "L" before data D0 and hold it, thus causing wrong data processing by the data processing circuit.
Furthermore, FIG. 14 is a time chart for explaining the operation of the interface circuit of FIG. 13 for the specification that the controller 2 holds clock CL at "L". In contrast, FIG. 15 is a time chart for explaining the operation of the interface circuit of FIG. 13 for the specification that the controller 2 holds clock CL at "H". For the latter specification that the controller 2 holds clock CL at "H", the AND gate 216 outputs address code A7 just before data DO and the AND gate 218 outputs one clock (dummy clock) at a timing while the AND gate 216 outputs address code A7, and thereby the data register may read in address code A7, thus causing wrong data processing by the data processing circuit.
Moreover, even if the data processing circuit or the interface circuit is provided with a clock counter for counting the number of clocks of clock SCL, clocks of clock SCL that are the same in number as bits of data SDI may not be able to be output depending the specification of the controller 2, thus causing wrong data processing by the data processing circuit. Furthermore, even if the data processing circuit or the interface circuit is provided with a plurality of clock counters or a complex clock counter according to the specification of the controller 2, the problem occurs inevitably that the circuit scale becomes extremely large.

This patent is subject to a terminal disclaimer.

Interface circuit and a clock output method therefor


A surface acoustic wave apparatus includes an input terminal, an output terminal, a plurality of acoustically coupled interdigital transducers (IDT), and a phase rotating element (line or inductor) connected in parallel with one or more IDT's. The acoustically coupled IDT's are connected in series between the input and output terminals. Alternatively, the acoustically coupled IDT's may include a series IDT to which the phase rotating element is connected and which is connected in series between the input and output terminals, and a branch IDT acoustically coupled to the series IDT, and disposed on a transmission path which branches from a transmission path between the input and output terminals to a reference potential. Among the plurality of IDT's, λa≧λb is established, where λa represents an electrode finger pitch of the IDT to which the phase rotating element is connected, and λb represents an electrode finger pitch of the IDT to which no phase rotating element is connected.

The present invention relates to a surface acoustic wave apparatus, and more particularly, to an acoustic-coupling surface acoustic wave apparatus which includes a resonator composed of a plurality of acoustically coupled interdigital transducers.
Surface acoustic wave apparatuses which utilize a surface acoustic wave (SAW) generated by the piezo-electric effect have been recently used in wide applications, including a transceiver filter, an antenna duplexer and the like for portable telephones because of their advantages of small size, light weight, and high reliability.
The SAW apparatus comprises a plurality of interdigital transducers (hereinafter called "IDT") for exciting surface acoustic waves, and reflectors for confining the surface acoustic waves excited by the associated IDT's. The IDT's and reflectors are formed on a piezo-electric substrate, where the IDT's are electrically or acoustically connected to the associated reflectors.
Known IDT connecting structures include a ladder-based structure for connecting a plurality of IDT's in a ladder shape, and an acoustic coupling type structure for acoustically coupling a plurality of IDT's which are disposed within a propagation path of a surface acoustic wave. While the number of connections for the IDT's is selected as appropriate in accordance with particular characteristics intended by the SAW apparatus, the acoustic-coupling type structure is generally advantageous over the ladder-based structure in a reduction in size resulting from a smaller number of reflectors contained therein and a shorter electrode length (shorter wiring pattern length) for connecting the resonators to each other, and the ability to omit losses within the reflectors and due to the connection electrode resistance (wiring resistance) to keep an insertion loss small.
Such SAW apparatuses have also been disclosed by JP-A-8-242140 (Patent Document 1), JP-A-9-505974 (Patent Document 2), and JP-A-2004-112238 (Patent Document 3).


The clamp circuit of the present invention includes a comparator 10, a pulse signal generating circuit 10, an integrating circuit 17 and a subtractor 17. The comparator compares a composite video signal with a threshold potential and detects a composite synchronizing signal. The pulse signal generating circuit generates pulse signals indicative of which of the detected composite synchronizing signal and a reference time period is larger. The integrating circuit corrects a threshold potential in response to the pulse signals and such that the pulse width of the horizontal synchronizing signal of the composite video signal corresponds to the reference time period t. The subtractor subtracts the threshold potential from the composite video signal, so as to fix the DC level of the composite video signal at a prescribed potential. Since a threshold potential which makes constant the pulse width of the synchronizing pulse signals is generated and the video signal is clamped by using this threshold potential, the video signal including the synchronizing signal is made less susceptible to the influence of noise and the like, and clamping operation of the video signal can be done more accurately.

1. Field of the Invention
The present invention relates to an improvement of a circuit for clamping a DC level of a video signal including a synchronizing signal at a prescribed potential.
2. Description of the Background Art
FIG. 18 is a schematic block diagram showing an example of a conventional television receiver. FIG. 19 is a waveform diagram of a composite video signal.
For simplicity of drawing, an antenna, high frequency circuitry and so on of the television receiver are not shown in FIG. 18. Referring to FIG. 18, the television receiver includes an input terminal 1 to which a composite video signal is input, a feedback type clamp circuit 100, a video amplifying circuit 101, a video output circuit 102, a CRT 103, a color signal circuit 104, a synchronizing deflection circuit 105, and a clamp pulse generating circuit 106. The composite video signal input to the input terminal 1 has its DC level clamped at a prescribed level by the clamp circuit 100, and thereafter it is applied to the video amplifying circuit 101. The video amplifying circuit 101 amplifies a color signal after separation of color subcarrier and the synchronizing signal. The color signal circuit 104 forms a color difference signal from the color subcarrier. The video output circuit 102 adds the color difference signal to a luminance signal to form a signal to be applied to three electrodes, that is, the R, G and B electrodes of a CRT 103. The sync deflection circuit 105 separates the synchronizing signal, synchronizes vertical and horizontal oscillations and generates a signal to form an image. The clamp pulse generating circuit 106 generates a clamp pulse during a certain DC level period of the composite video signal, in response to the synchronizing signal which has been subjected to amplitude separation by the sync deflection circuit 105. Generally, the clamp pulse is inserted to the back porch of the composite video signal shown in FIG. 19.
FIG. 20 is a block diagram showing an example of such a clamp circuit. The clamp circuit shown in FIG. 20 includes an input terminal 1 to which a composite video signal is input, a level shift circuit 2 for clamping the DC level of the composite video signal at a prescribed potential, an output terminal 3 from which the composite video signal clamped by the level shift circuit 2 is output, a clamp pulse input terminal 5 to which the clamp pulse is input, a constant voltage source 6 generating a constant DC voltage, a comparator 4 for comparing the output from the level shift circuit 2 and the voltage from the constant voltage source 6 in response to a clamp pulse, and a capacitor 7 charging/discharging of which is controlled by the comparator 4.
In operation, the composite video signal is applied through the input terminal 1 to the level shift circuit 2. The level shift circuit 2 adds a certain potential to the composite video signal to shift the level of the composite video signal, the composite video signal having its level shifted is output from the output terminal 3. The potential applied to the composite video signal is to make constant the DC level of the composite video signal which fluctuates. The method for generating the potential to be added is as follows. The comparator 4 compares the level of the composite video signal from the level shift circuit 2 with the potential of the constant voltage source 6 connected to the comparator 4 in response to a clamp pulse from the clamp pulse input terminal 5, and generates a difference current corresponding to the difference between the DC level of the composite video signal and the potential of the constant voltage source 6. The period in which the clamp pulse is input corresponds to the period of the DC level in the composite video signal, which is generally the period of the back porch. The generated difference current is output to the level shift circuit 2. By this difference current, the capacitor 7 connected between the level shift circuit 2 and the ground terminal is charged or discharged, and voltages at both ends of the capacitor 7 are maintained until the next clamp pulse is input. By the voltages at both ends of the capacitor 7 provided in this manner, the amount of level shift by the level shift circuit 2 is controlled. By these operations, a certain DC level of the composite video signal is corrected to be equal to the potential of the constant voltage source 6.
High definition television systems (HDTV) have come to be commercially available very recently.
FIG. 21 is a waveform diagram of a video signal including a three value synchronizing signal (which is a proposed standard synchronizing signal for realizing high vision broadcasting) such as a HDTV video signal. In FIG. 21, the solid line represents the original waveform on the transmitting side, while the dotted line represents the waveform at the receiving end (corresponding to the input terminal 1 of FIG. 20) such as a VTR reproduction, which waveform is a little moderate because of transmission loss through the transmission path.
In the above described circuitry, a clamp pulse forming circuit must be separately provided in addition to the clamp circuit, resulting in a large scale circuitry. In the composite video signal reproduced by a VTR or the like, cross talk from adjacent tracks, leaked FM carrier and other noise are output superposed on the video signal Further, in the weak electric field such as in the case of receiving television broadcasting, there is caused degradation of S/N ratio.
If there is, for example, a noise at a certain DC level portion of the input composite video signal, accurate level comparison cannot be done, and as a result, accurate clamping operation becomes impossible. It is possible to remove the color burst signal successive to the synchronizing signal by means of a low pass filter and setting the position of the clamp pulse at that portion However, by this method, the color burst cannot be completely removed, and therefore level comparison is not very accurate.
Such problem similarly occurs in the video signals for HDTV. Further, the DC level period of the video signal is quite short in the HDTV video signal, and precision in level detection is not sufficient. Alternatively, the three value synchronizing signal portion may be integrated by an integrating circuit for providing an average and the position of the clamp pulse may be set at that portion. However, the waveform of the three value synchronizing signal cannot be completely removed, and the level comparison is not very accurate. Clamping using negative peak value (bottom level of the synchronizing pulse of negative polarity) in the video signal is known as another method. However, accurate clamping is not achieved because of the influence of noise or degradation of amplitude characteristic dependent on conditions of the transmission path.

Clamp circuit for clamping video signal including synchronizing signal at a prescribed potential


Methods and compositions for controlling plant pests, particularly weeds and/or plant phytopathogens using sarmentine and/or analogs thereof are disclosed.

Utilization of synthetic herbicides not only prevents economic loss in food production, but also improves quality of crop products (Gianessi, L. P.; Reigner, N. P. The value of herbicides in U.S. crop production, Weed Technol. 2007, 21, 559-566). However, the use of synthetic herbicides may cause side-effects on environment and human health (Solomon, G. M.; and Schettler, T. Environment and health: 6. Endocrine disruption and potential human health implications, CMAJ, 2000, 163, 1471-1476; Stillerman, K. P.; Mattison, D. R.; Giudice, L. C.; Woodruff, T. J. Environmental exposures and adverse pregnancy outcomes: A review of the science. Reproductive Sci. 2008, 15, 631-650.) except that it also leads to an increasing resistance among many weed species (Whaley, C. M.; Wilson, H. P.; Westwood, J. H. A new mutation in plant ALS confers resistance to five classes of ALS-inhibiting herbicides, Weed Sci. 2007, 55, 83-90.). Therefore, it is very necessary to develop alternative means for weed management that are eco-friendly, cost-effective and bio-efficacious (Duke, S. O.; Dayan, F. E.; Rimando, A. M.; Schrader, K. K.; Aliotta, G.; Oliva, A.; Romagni, J. G. Chemicals from nature for weed management. Weed Sci. 2002, 50, 138-151).
The use of natural phytochemicals is one of these alternative means (Batish, D. R.; Setia, N.; Singh, H. P.; Kohli, R. K. Phytotoxicity of lemon-scented eucalypt oil and its potential use as a bioherbicide, Crop Protection, 2004, 23, 1209-1214). Due to allelopathic properties, many of these chemicals are either released in air or soil to kill neighboring weeds or to inhibit their germination and/or growth. These phytotoxic chemicals include phenolic compounds (e.g., catechin, ellagic acid, sorgoleone, juglone, ceratiolin, usnic acid), terpenoids (e.g., 1,8-cineole, geranial, neral, cinmethylin, solstitiolide), quassinoids (e.g., ailanthone, chaparrine, ailanthinol B), benzoxazinoids (e.g., hydroxamic acids), glucoinolates (e.g., glucohirsutin, hirsutin, arabin), and some amino acids such as meta-tyrosine (Macias, F. A.; Molinillo, J. M. G.; Varela, R. M.; Galindo, J. C. J. Allelopathy—a natural alternative for weed control. Pest Manag Sci., 2007, 63, 327-348; Bertin, C.; Weston, L. A.; Huang, T.; Jander, G.; Owens, T.; Meinwald, J.; Schroeder, F. C. Grass roots chemistry: meta-Tyrosine, an herbicidal nonprotein amino acid. PNAS, 2007, 104, 16964-16969). Commercially available herbicides include products based on clove oil, lemongrass oil and d-limonene.
The Genus Piper
The genus Piper in the Piperaceae family contains approximately 2000 species found primarily in tropical regions. Plants of this genus are normally slender aromatic climbers with perennial woody roots. The fruits commonly known as "pippali" in India and "Bi Bo" in China are used as a spice and also as a preservative in pickles. They are also used as cattle feed.
In traditional medicinal practice, P. longum fruits have been advocated to be beneficial in treatment of diseases such as gonorrhea, menstrual pain, tuberculosis, sleeping problems, respiratory tract infections, chronic gut-related pain, and arthritic conditions (Krishnamurthi, A. 1969. The Wealth of India Raw Materials, vol. 8. CSIR, New Delhi, India, p. 96; Ghoshal, S.; Prasad, B. N. K.; Lakshmi, V. Antiamoebic activity of Piper longum fruits against Entamoeba histolytica in vitro and in vivo, J. Ethanopharmacol. 1996, 50, 167-170; Choi, E. M.; Hwang, J. K. Investigations of anti-inflammatory and antinociceptive activities of Piper cubeba, Physalis angulata and Rosa hybrid, J. Ethanopharmacol. 2003, 89, 171-175, Mata, R.; Morales, I.; Perez, O.; Rivero-Cruz, I.; Acevedo, L.; Enriquez-Mendoza, I.; Bye, R.; Franzblau, S.; Timmermann, B. Antimycobacterial compounds from Piper sanctum, J. Nat. Prod. 2004, 67, 1961-1968). Other reported beneficial effects of P. longum include analgesic and diuretic effects, relaxation of muscle tension, and alleviation of anxiety (Vedhanayaki, G.; Shastri, G. V.; Kuruvilla, A. Analgesic activity of Piper longum Linn. Root, Ind. J. Exp. Biol. 2003, 41, 649-651; Das, Biswanath, D.; Kashinatham, A.; Srinivas, K. V. N. S. Alkamides and other constituents of Piper longum, Planta Med, 1996, 62, 582). In addition, pipernonaline from P. longum has been found to possess mosquito larvicidal activity (Yang, Y. C.; Lee, S. G.; Lee, H. K.; Kim, M. K.; Lee, S. H.; Lee, H. S. A piperidine amide extracted from Piper longum L. fruit shows activity against Aedes aegypti Mosquito Larvae, J. Agric. Food Chem., 2002, 50, 3765-3767).
An alkaloid has been isolated from Piper nigrum (pepper) which is an alkenylene piperidine amide containing a C18 alkenylene with two or more double bonds. This compound has been found to inhibit mycotoxin biosynthesis. (U.S. Pat. No. 6,825,216).
Sarmentine
N-(2E,4E-Decadienoyl) pyrrolidine (also called sarmentine) was originally separated from the fruit of Piper sarmentosum in 1987 [Likhitwitayawuid, K., Ruangrungsi, N, Lange, G and Decicco, C., Structural Elucidation and Synthesis of New Components isolated from Piper Samentosum, Tetrahedron 1987 (43) 3689-3694] and also from Piper nigrum in 1988 [Kiuchi, F., Nakamura, N., Tsuda, Y., Kondo, K and Yoshimura, H. Studies on Crude Drugs Effective on Visceral Larva Migrans. IV. Isolation and Identification of Larvicidal Principles in Pepper Chemical and Pharmaceutical Bulletin 1988(36):2452], and first synthesized in 1995 [Bernabeu, M., Chinchilla, R. and Najera, C., (2E,4E)-5-Tosyl-2,4-pentadienamides: New Dienic Sulfones for the Stereoselective Synthesis of (2E,4E)-Dienamides, Tetrahedron Letter, 1995 (36)3901-3904]. Sarmentine has been found to be in vivo skin antioxidant protecting photoaged skin [Cornacchione, S.; Sadick, N. S.; Neveu, M.; Talbourdet, S.; Lazou, K.; Viron, C.; Renimel, I.; de Quéral, D.; Kurfurst, R.; Schnebert, S.; Heusèle, C.; André, P.; Perrier E. In vivo skin antioxidant effect of a new combination based on a specific Vitis vinifera shoots extract and a biotechnological extract. J. Drugs in Dermatol. 2007, 6S, 8-13], display antiplatelet aggregation activity [Li, C. Y.; Tsai, W.; Damu, A. G.; Lee, E. J.; Wu, T. S.; Dung. N. X.; Thang, T. D.; Thanh, L. Isolation and identification of antiplatelet aggregatory principles from the leaves of Piper lolot, J. Agric. Food Chem. 2007, 55, 9436-9442], antiplasmodial and antimycobacterial activities [Tuntiwachwuttikul, P.; Phansa, P.; Pootaeng-on, Y.; Taylor, W. C. Chemical constituents of the roots of Piper Sarmentosum, Chem. Pharm. Bull. 2006, 54, 149-151] and antituberculosis activity [Rukachaisirikul, T.; Siriwattanakit, P.; Sukcharoenphol, K.; Wongvein, C.; Ruttanaweang, P.; Wongwattanavuch, P.; Suksamrarn, A. Chemical constituents and bioactivity of Piper sarmentosum, J. Ethnopharmacol., 2004, 93, 173-176]. Sarmentine is used as a solubilizer of hydrophobic compounds in cosmetics and pharmaceuticals (Stephen, T.; Andrew, H. Compositions comprising macromolecular assembles of lipid surfactant, PCT Publication No. WO/2008/065451).

Use of sarmentine and its analogs for controlling plant pests


A dumping type vehicle having a body which is semicircular in cross section and wherein the body is provided with a plurality of removable floor units each of which spans the body in spaced relationship to its upper and lower portions and each of which is moveable individually from a loading end forwardly of the body with cargo placed thereon by way of a mechanical loading system.

1. Field of the Invention
This invention relates to truck or trailer bodies used for hauling cargo and more particularly to such bodies which are selectively adapted for hauling either comminuted or unitary or palletized cargo placed on pallets.
The invention particularly relates to vehicles of the general type described in my previous U.S. Pat. No. 5,022,809 which include a dumping body which is adapted to haul material such as construction type aggregate in one direction and, unitary cargo such as blocks made from such aggregate, in another direction.
2. History of the Related Art
As described in my earlier patent, a considerable savings can be realized if a vehicle used for hauling either aggregate or construction blocks, may be utilized for both purposes, thereby saving the down time of a vehicle returning empty. For a general overview of the prior art, reference is made to the references of record in that patent. Other patents of possible relevance include Bouffard U.S. Pat. No. 2,745,566 and Davis U.S. Pat. No. 2,820,560, each of which describes a cargo carrier which may be connected to a cable system and pulled up a ramp onto a vehicle, for the purpose of loading objects such as pallets and their loads or other equipment.

Truck for alternately handling comminuted and palletized cargo


In one example, an apparatus is provided to store data in one or more data storage systems by selecting from among at least a first operating mode and a delta replication operating mode. The apparatus comprises a means for storing data pursuant to the first operating mode and a means for ascertaining a first status of a criterion pertaining to an activity performed by the one or more data storage systems while operating in the first operating mode. The apparatus further comprises a means for detecting a change in the criterion to a second status, and a means for storing data pursuant to the delta replication operating mode in response to the change.

1. Field of the Invention
The invention relates generally to a system and method for storing data, and more particularly, to a method and system for backing up data stored on a primary storage system.
2. Description of the Related Art
In many computing environments, large amounts of data are written to and retrieved from storage devices connected to one or more computers. As more data is stored on and accessed from storage devices, it becomes increasingly difficult to reproduce data if the storage devices fail. One way of protecting data is by backing up the data on backup media (e.g., tapes or disks).
One well-known approach to backing up data is to produce the backup copy at or near the site of the primary storage device, and then move the backup media to a safe location, where they are stored. For example, a technique known as mirroring can use this arrangement to generate a backup version of data. Specifically, in accordance with one form of mirroring, referred to as "synchronous mirroring," a first copy of data received from a client is written directly to an assigned location on the primary system, and a second copy of the data is written directly on the backup system. Typically, in a synchronous mirroring arrangement, additional data processing requests received from the client are not processed until the data is successfully stored on both systems.
Where the primary system and backup system are located at the same site, or are linked by a high-speed communication link, synchronous mirroring techniques can offer near instantaneous, up-to-date backup service. However, because transmissions from the client cannot be processed while data is being stored on the primary system and on the backup system, under some conditions, a synchronous mirroring arrangement can create significant delays for the client. If, for example, the backup system is located at a remote site, and/or the communication link from the primary system to the backup system is slow or susceptible to interruptions in service, the resultant delay may be unacceptable.
More recently, with the increasing availability of high-speed communication links, and of networking technology, it has become more common to locate a backup storage system at a site that is remote from the primary storage system. Since the advent of such remote storage systems, alternative approaches to mirroring have been developed.
One such method is known as "asynchronous mirroring." According to this method, data received from a client is inserted into a cache memory, which stores the data temporarily. After the data is inserted into the cache, additional data processing requests received from the client are processed. The data is flushed from the cache and stored on the primary system. Subsequently, when system resources allow, the data is flushed to the backup system and stored.
Because data processing requests, including data write commands, received from the client can be processed before the data is written to both the primary and backup systems, asynchronous mirroring offers more convenience to the client. However, the remote location of the backup system carries with it unique risks. For example, if a problem occurs in the communication link between the primary and backup systems and prevents data from being transmitted from the cache memory to the backup system, the data stored on the backup system may soon become out-of-sync with the data stored on the primary system.
A third method for backing up data is known as the delta replication method. Delta replication is not a form of mirroring. Using this approach, when data is received from a client, it is written to its assigned location on the primary system, but is not sent to the backup system. Instead, a record is kept of the data blocks in the primary system that are overwritten. From time to time a "delta replication" is performed, which includes copying to the backup system only those data blocks that have been overwritten.
Several disadvantages are associated with the delta replication method. If a problem occurs in the communication link between the primary system and the backup system during a delta replication, the backup copy stored on the backup system may become corrupted. To mitigate this risk, a snapshot of the backup disk is often generated immediately prior to performing each delta replication. Similarly, if the data stored on the primary system becomes corrupted during a delta replication (e.g., due to a hardware failure), then the only up-to-date version of the data would be lost. For this reason, a snapshot of the data stored on the primary system is often performed immediately prior to each delta replication.


A regressive suspension spring system for a farm implement including a spring arm, a rocker arm, a wheel arm rotatably coupled to the farm implement at a first end and rotatably coupled to the rocker arm at a second end at a first pivot, one or more dogbone links rotatably coupled to the spring arm at a first end of the one or more dogbone links at a second pivot and rotatably coupled to the rocker arm at a second end of the one or more dogbone links at a third pivot; and a spring disposed between the rocker arm and the spring arm. An attachable farm implement including a regressive suspension spring system, such as a rotary cutter. A powered machine including a regressive suspension spring system.

Powered equipment is used by those who live in agricultural or rural areas to keep the weeds, brush, and high-growing grasses under control. For larger areas, vehicle driven rotary cutters, are a preferred machine for this task. Because the ground where these rotary cutters are used is typically not entirely flat, many rotary cutters use trailing wheels to keep the blades of the cutter at a selected height. However, one of the problems encountered with the trailing wheels is the transmission of shock from the rough or uneven surface to the body of the rotary cutter and the wear and tear it causes. To deal with this problem spring systems have been developed that absorb some of the shock. However, these systems are typically progressive in nature, meaning that the greater the load and/or displacement placed on the system, the more shock is transmitted to the cutter body. This is not ideal because as the load increases one may want more shock absorption, not less. These and other problems are overcome by the current disclosure.


A flexible package that can include first and second sidewalls. The first and second sidewalls being joined by a bottom portion and seams that define first and second sides. The package can have an opening opposite the bottom portion, a first plurality of magnetic regions, and a second plurality of magnetic regions. The first plurality of magnetic regions can be disposed on the first sidewall near the opening and include discrete magnetic regions. A second plurality of magnetic regions can be disposed on the second sidewall near the access opening and include opposed discrete magnetic regions. The second plurality of magnetic regions being opposite the first plurality of magnetic regions. The discrete magnetic regions and the opposed discrete magnetic regions can be magnetically engageable with a magnetic force to close the opening of the package in a configuration having M petals, where M is an integer from 2 to 8.

Packaging for containing dispensable items finds use in a wide variety of consumer and business products. Often such packaging is intended to contain products that can be removed and consumed in partial quantities, leaving the package partially filled. Some products are packaged and used in a manner that require one-handed opening. Being able to effectively open or close a package using one hand can be challenging. For example, flexible packaging with "zipper" type closures are difficult to open or close with one hand.
There remains an unmet need, therefore, for packaging that permits effective one-handed closure of a package.
Further, there remains an unmet need for flexible packaging that permits effective one-handed opening and closure of an opening of the package.


A strategy is provided using feedback control algorithms to monitor and dynamically modify front and rear braking torque to maintain controllability in a vehicle that initially favors regenerative braking. Simple proportional-integral-derivative feedback controllers can be used. The controller can monitor wheel speed, lateral acceleration, yaw rate, and brake position to selectively activate non-regenerative braking independently for each individual wheel and regenerative braking in varying proportion based on at least one actual vehicle controllability value and at least one predetermined target value for controllability and optimization of energy recovery. Controllability factors can include predetermined longitudinal slip ratio, comparison of tire slip angle or yaw rate. For rear wheel drive configurations, the non-regenerative brakes can be applied to just one front axle wheel on the outside of a turn. For front wheel drive configurations, the non-regenerative brakes can be applied to just one rear axle wheel on the inside of a turn.

The need to reduce fossil fuel consumption and emissions in automobiles and other vehicles predominately powered by internal combustion engines (ICEs) is well known. Vehicles powered by electric motors attempt to address these needs. Another alternative solution is to combine a smaller ICE with electric motors into one vehicle. Such vehicles combine the advantages of an ICE vehicle and an electric vehicle and are typically called hybrid electric vehicles (HEVs). See generally, U.S. Pat. No. 5,343,970 to Severinsky.
The HEV is described in a variety of configurations. Many HEV patents disclose systems where an operator is required to select between electric and internal combustion operation. In other configurations, the electric motor drives one set of wheels and the ICE drives a different set.
Other, more useful, configurations have developed. For example, a series hybrid electric vehicle (SHEV) configuration is a vehicle with an engine (most typically an ICE) connected to an electric motor called a generator. The generator, in turn, provides electricity to a battery and another motor, called a traction motor. In the SHEV, the traction motor is the sole source of wheel torque. There is no mechanical connection between the engine and the drive wheels. A parallel hybrid electrical vehicle (PHEV) configuration has an engine (most typically an ICE) and an electric motor that work together in varying degrees to provide the necessary wheel torque to drive the vehicle. Additionally, in the PHEV configuration, the motor can be used as a generator to charge the battery from the power produced by the ICE.
A parallel/series hybrid electric vehicle (PSHEV) has characteristics of both PHEV and SHEV configurations and is sometimes referred to as a "split" parallel/series configuration. In one of several types of PSHEV configurations, the ICE is mechanically coupled to two electric motors in a planetary gear-set transaxle. A first electric motor, the generator, is connected to a sun gear. The ICE is connected to a carrier gear. A second electric motor, a traction motor, is connected to a ring (output) gear via additional gearing in a transaxle. Engine torque can power the generator to charge the battery. The generator can also contribute to the necessary wheel (output shaft) torque if the system has a one-way clutch. The traction motor is used to contribute wheel torque and to recover braking energy to charge the battery. In this configuration, the generator can selectively provide a reaction torque that may be used to control engine speed. In fact, the engine, generator motor and traction motor can provide a continuous variable transmission (CVT) effect. Further, the HEV presents an opportunity to better control engine idle speed over conventional vehicles by using the generator to control engine speed.
The desirability of combining an ICE with electric motors is clear. There is great potential for reducing vehicle fuel consumption and emissions with no appreciable loss of vehicle performance or driveability. The HEV allows the use of smaller engines, regenerative braking, electric boost, and even operating the vehicle with the engine shutdown. Nevertheless, new ways must be developed to optimize the HEV's potential benefits.
One such area of HEV development is optimizing the braking and stability system of the HEV or any other type of vehicle using regenerative braking technology. Regenerative braking (regen) captures the kinetic energy of the vehicle as it decelerates. In conventional vehicles, kinetic energy usually dissipates as heat in a vehicle's brakes or engine during deceleration. Regen converts the captured kinetic energy through a generator into electrical energy in the form of a stored charge in a vehicle's battery. This stored energy is later used to power the electric motor. Consequently, regen also reduces fuel usage and emission production. In certain vehicle configurations, the engine can be disconnected from the rest of the powertrain thereby allowing more of the kinetic energy to be converted into stored electrical energy.
On most vehicles with regenerative braking, the regenerative braking torque is applied to, or predominantly to, the wheels of only one axle. When regenerative braking is applied to the wheels of only one axle, non-regenerative braking methods may be used at the wheels of the other axles. The desire to recover energy through regenerative braking can result in different braking torques being applied to the wheels of the different axles. The difference between the braking torques can cause unbalanced braking that may degrade vehicle controllability. Degraded controllability can be in the form of either reduced stability or reduced steerability. For example, when excessive regenerative braking torque is applied at the front axle, such as a front wheel drive vehicle, the ability of the front wheels to steer the vehicle may be reduced. The reduced steerability is a condition known as understeer. When excessive regenerative braking torque is applied at the rear axle, for rear wheel drive vehicles, the lateral friction of the rear tires may be reduced. The reduced stability is a condition known as oversteer. Both of these effects, understeer due to excessive levels of regenerative braking at the front axle and oversteer due to excessive levels of regenerative braking at the rear axle, can become greater on low friction surfaces such as ice and snow. The requirement for controllability on low friction surfaces typically forces regenerative braking levels to be reduced, resulting in a corresponding loss of energy recovery.
There are HEV patents directed to control of regenerative braking functions in various driving conditions. Koga et al. (U.S. Pat. No. 6,033,041) describes a regenerative braking control system for an electric vehicle where the regenerative braking varies as a function of vehicle inclination. Okamatsu (U.S. Pat. No. 4,335,337) describes a control system for an electric powered vehicle. This invention attempts to improve tire grip performance by adjusting the frequency of the rotations of the induction motors based on the slip frequency of the vehicle without regard to regenerative braking.
Ohtsu et al., (U.S. Pat. No. 5,476,310) also attempts to improve braking performance through the cooperation of mechanical anti-lock brakes and regenerative braking. This invention regulates excessive braking force and slip with a controller using a predetermined slip ratio. Other inventions also attempt to regulate excessive slip. See Asa et al. (U.S. Pat. No. 5,654,887) and Kidston et al. (U.S. Pat. No. 5,615,933). Unfortunately, while these inventions do reduce excessive slip, they do not provide an adequate level of stability because they focus mainly on the maximization of straight line stopping.
Asanuma et al. (U.S. Pat. No. 5,318,355), describes a switchover mode from a regenerative or friction braking mode of operation. Unfortunately, this invention is susceptible to false activation of the mode switchover.
Thus, the ability to distribute brake torque between regenerative and non-regenerative braking while optimizing energy recovery and vehicle controllability constitutes an unmet need in the art.

Independent braking and controllability control method and system for a vehicle with regenerative braking


An apparatus includes an optical gain fiber having a core, a cladding surrounding the core, the core and cladding defining an optical gain fiber numerical aperture, and a multimode fiber having a core with a larger radius than a radius of the optical gain fiber core, a cladding surrounding the core, the core and cladding of the multimode fiber defining a multimode fiber stable numerical aperture that is larger than the optical gain fiber numerical aperture, the multimode fiber being optically coupled to the optical gain fiber so as to receive an optical beam propagating in the optical gain fiber and to stably propagate the received optical beam in the multimode fiber core with low optical loss associated with the optical coupling.

Conventional continuous-wave fiber sources are typically designed to achieve high average powers, such as several 100 s of W to several kW, in output beams exhibiting superior beam quality. In most cases, an output beam at or near the diffraction limit is highly desirable since it can be focused to a smaller spot resulting in higher irradiance capabilities. Due to various practical benefits, such beams are typically obtained with single-mode fiber laser system architectures using cascaded fiber gain stages. Even for cascaded fiber laser systems, however, single-mode performance is only achieved by making various tradeoffs with respect to cost, reliability, and performance.
Cascaded systems typically include a single-mode seed source, such as a single-mode fiber oscillator, one or more fiber oscillator or fiber amplifier stages coupled to the seed beam in order to scale its power, and a delivery fiber for delivering the beam to a target. In typical systems, the seed beam propagates in a core of a double clad fiber while pump light coupled into the cladding of the fiber provides an energy source for amplification of the seed beam. Subsequent amplification or delivery fiber stages use larger fiber cores to prevent the onset of detrimental non-linear effects associated with the beam and to increase pump absorption, but increasing fiber core size detrimentally allows the beam to propagate in various transverse modes higher than the preferred single, fundamental mode. Hence, various techniques are employed to maintain single-mode beam performance in large mode area (LMA) fibers.
One way to maintain single-mode performance between gain stages is to coil one or more stages, including the current, previous, or subsequent stage, so that the higher order modes are suppressed. Gain stages can also be carefully coupled to each other, such as with adiabatic fiber tapers, mode field adapters, or precision alignment so that the fundamental mode of the beam in a preceding gain stage is carefully matched or launched into the fundamental mode of the subsequent gain stage. A design in which the core diameter is simply increased with no other change in fiber parameters can cause excess splice loss because of modal mismatch between the fibers. Also, an increased core diameter can support additional modes, encouraging multimode propagation, unless the numerical aperture is decreased to compensate. In general, power coupling efficiency degradation or other optical loss associated with various gain stage couplings are necessary hindrances of achieving single-mode performance despite the increased cost of components (MFAs, thermal management) and attendant decrease in reliability from the additional components and lossy connections. A need therefore exists for innovation in high power continuous-wave systems without the aforementioned drawbacks.

Fiber source with cascaded gain stages and/or multimode delivery fiber with low splice loss


Dual-motor sewing machine with automatic timing adjustment. In some embodiments, a sewing machine may include a frame, a needle bar configured to have a needle, a first motor configured to cause the needle bar to linearly reciprocate the needle with respect to the frame and into and out of a fabric, a first sensor configured to continuously sense a current position of the needle, a bobbin hook configured to function in connection with a bobbin, a second motor configured to cause the bobbin hook to rotate with respect to the frame, a second sensor configured to continuously sense a current position of the bobbin hook, and one or more motor controllers. The one or more motor controllers may be configured, based on the current positions sensed by the first sensor and the second sensor, to continuously and automatically adjust and synchronize timing of the first motor and/or the second motor.

Sewing machines generally function to form a row of stitches in one or more layers of fabric using a combination of thread from a spool, also known as top thread, and thread from a bobbin, also known as bottom thread. A sewing machine generally operates using a needle threaded with the top thread and a bobbin threaded with the bottom thread.
Once threaded, the sewing machine generally forms a row of stitches by repeatedly reciprocating the needle through the one or more layers of fabric while simultaneously rotating a bobbin hook underneath the one or more layers of fabric. In order to properly form the row of stitches, the reciprocating of the needle and the rotating of the bobbin hook must be precisely synchronized. This precise synchronization is generally accomplished using fixed mechanical linkages that link the needle to the bobbin hook so that a single motor can simultaneously reciprocate the needle and rotate the bobbin hook.
Unfortunately, however, the mechanical linkages that link the needle to the bobbin hook increase the parts, noise, vibration, and maintenance, and associated costs, of the sewing machine.
The subject matter claimed herein is not limited to embodiments that solve any disadvantages or that operate only in environments such as those described above. Rather, this background is only provided to illustrate one example technology area where some embodiments described herein may be practiced.


In a distributed, multi-node system for communicating between a plurality of distributed terminals and one or more central computers, some of which specify command and control information to the nodes, intelligent means are provided in the nodes to enable the nodes to test their internal communication channels and the communication channels to their associated distributed terminals independently of the central computers, and to reconfigure themselves independently of the central computers, substituting spare channels for identified malfunctioning ones. Conditions detectable by or within the node may initiate such testing. This means comprises a script interpreter which causes the node to execute scripts previously provided to it. New scripts may be provided to the nodes from a central computer.

Distributed transaction processing networks, accepting transactions from widely dispersed POS (point of service) terminals, are known in the prior art. Typically such networks are provided with a distributed set of local line concentrators and a centralized means of monitoring and control; typically the centralized monitoring and control means initiate testing at far-flung points in the network and initiate actions to work around any detected faults.
As such networks become larger in geographical scope (on the order of entire continents), the centralized monitoring and control means are able to focus their attention on each particular point in the network less and less frequently (in practice, in the present embodiment, on the order of once every ten minutes); thus, a failure in a POS terminal, a line concentrator, or the path interconnecting them might go undetected by the central control means and therefore uncorrected for a period of time that is unacceptably long in a retail POS setting.

Intelligent node resident failure test and response in a multi-node system