A method and system for providing personalized services to a mobile vehicle includes receiving broadcast data at a telematics unit of the vehicle, sending the received broadcast data from the telematics unit to a portable processing device via short range wireless connection, and providing at least one personalized service at the portable processing device based on the received broadcast data. A computer usable medium with suitable computer program code is employed for providing personalized services to a mobile vehicle.

Data can be broadcast over a satellite radio channel. In particular audio information is broadcast with accompanying data. Satellite radio provides a high bandwidth channel enabling data services. Along with audio content satellite radio operators are broadcasting increasing amounts of supplemental data.
Satellite radio subscribers have interest in only a select portion of the data broadcast over satellite radio. Limited methods exist for providing only the data of interest to a subscriber and displaying that data for the subscriber. Current satellite radio receivers have limited display capabilities and may not have the processing power necessary to extract only that select portion of the data that is of interest to the subscriber.
Software for telematics systems and satellite radio receivers is more costly to develop and implement than software for portable devices such as personal digital assistants (PDAs) and PC based systems. A PDA or PC platform provides a standardized application platform on which to provide an application for managing satellite broadcast data. Distribution channels for these platforms currently exist, for example, a user can install an application on a PDA or PC by simply downloading it directly from the internet. Satellite radio receivers and telematics units require specialized update services to maintain embedded software.
As an alternative to satellite broadcast data, data can be transmitted over cellular connections. Higher latencies and higher transmission costs as compared to a satellite radio transmissions limit the cellular connection.
Portable processing devices, such as PDAs, can connect to public and private networks using one of the many LAN hotspots being implemented around the world. These hotspots allow the portable processing device to access content when the device is within the limited coverage area provided by the hotspot. LAN hotspots are not available nor are they feasible for delivering content to a person while that person is traveling in a mobile vehicle.
It is therefore desirable to provide a method and system for providing personalized services to a mobile vehicle that overcomes the limitations, challenges, and obstacles described above.

Method and system for providing personalized services to a mobile vehicle


The present invention is a drain adapter for adapting a flushing device to a drainpipe. The adapter has a main body including an indent portion for retaining the flushing device during operation. The main body also includes an enlarged portion. The enlarged portion corresponds to a sink recess and expands under pressure to retain the adapter within the drainpipe.

The present invention relates to adapting a flushing device to a drainpipe.
Drainpipes in sinks occasionally become blocked and require cleaning. Flushing devices have been designed to remove debris from the drainpipe when traditional cleaning methods do not work. The flushing device is inserted into a drainpipe. The flushing device is also connected to a water source, such as a hose. Water is sent through the flushing device and a valve creates a pulsing action to the water, which removes the debris from the drain. This type of flushing device should be inserted into the drainpipe several inches in order to operate correctly. However, to deter debris from entering the drainpipe, cross-members are located just inside the drainpipe entrance. The cross-members restrict the insertion depth of the flushing device.
Adapters are used with the flushing devices to accommodate for the abbreviated insertion distance resulting from the crosshatches. For one style of adapter, a first end of the adapter is inserted into the sink drain while the other end receives the flushing device. The adapter increases the allowable insertion distance for the flushing device such that it is sufficient to allow proper operation.
During operation, water pressure builds between the blockage and the flushing device until the blockage is removed. For blockages that are difficult to remove, the increasing water pressure creates an upward force on the adapter pushing it from the pipe. Due to the short insertion distance of the adapter, it is difficult to retain the adapter in position. Additionally, when the flushing device and water source fill with fluid. The adapter becomes top heavy and may dislodge during operation. Thus, large amounts of physical exertion by the user are needed to retain the adapter in position. Also, because of the short sealing distance between the adapter and the pipe, the increasing water pressure may cause leaks to occur between the pipe and the adapter. Thus, an adapter which has enhanced sealing capability and that is easily retained in the drainpipe is needed.

Sink drain adapter for drain cleaning device


There is now provided a method of manufacturing a sintered body of titanium-based carbonitride alloy comprising hard constituents in 5-25% binder phase where the hard constituents contain, in addition to Ti, one or more of the metals V, Nb, Ta, Cr, Mo or W and the binder phase is based on cobalt and/or nickel by powder metallurgical methods, i.e., milling, pressing and sintering. The composition of the hard constituents is:. 0.88<a<0.96; PA0 0.04<b<0.08; PA0 0.ltoreq.c<0.04; PA0 0.ltoreq.d<0.04; PA0 0.60<f<0.73; PA0 0.80<x<0.90; and PA0 0.31<h<0.40. PA0 23-28% by weight Ti(C,N) with a nitrogen content between 9 and 13% by weight; PA0 13-17% by weight (Ti,Ta)(C,N) with a Ti/Ta ratio of 80/20; PA0 14-18% by weight (Ti,Ta)C with a Ti/Ta ratio of 50/50; PA0 15-20% by weight WC; and PA0 3-7% by weight Mo.sub.2 C provided that the total amount of said five powders is >78% by weight and <83% by weight.. and the overall composition of the hard constituents phase is expressed by the formula: EQU (Ti.sub.a,Ta.sub.b,Nb.sub.c,V.sub.d).sub.x (Mo.sub.e,W.sub.f).sub.y (C.sub.g,N.sub.h).sub.z.. Favorable properties are obtained if the alloy is made from a powder mixture comprising:

The present invention relates to a sintered carbonitride alloy with titanium as the main component, so-called cermets, intended for milling, drilling and turning of metal, which alloy has a very good toughness behavior in combination with good wear resistance.
Classic titanium-based cutting tool material was based on titanium carbide, molybdenum carbide and nickel. These materials were used for high speed finishing owing to their extraordinary wear resistance at high cutting temperatures. The toughness behavior and resistance against plastic deformation were not satisfactory, however, and so the area of application was rather limited.
Development has proceeded and the range of application for sintered titanium carbonitride based alloys has been considerably enlarged. The toughness behavior and the resistance against plastic deformation for these alloys have been considerably improved.
An important development of titanium-based hard alloys is the substitution of carbon by nitrogen in the hard constituents. This decreases the grain size, usually 1-2 .mu.m, of the hard constituent in the alloy which leads to the possibility of increasing the toughness behavior.
In general, nitrides are more chemically stable than carbides which results in lower tendencies to sticking of workpiece material or wear by dissolution of the tool (so-called diffusional wear).
For the binder phase, the metals of the iron group are used, often Co and Ni in combination. The amount of binder phase is generally 5-25% by weight. Besides titanium, the other metals of the group IVA, VA, VIA are normally used as hard phase formers such as carbides, nitrides and/or carbonitrides. There are also other metals used, for example, Al, which sometimes are said to harden the binder phase and sometimes improve the wetting behavior between hard phase and binder phase.
A very common or even normal microstructure of sintered carbonitride alloy consists of a core-rim structure. For example, U.S. Pat. No. 3,971,656 discloses a sintered carbonitride alloy which comprises Ti- and N-rich cores and rims rich in Mo, W and C. From Swedish patent application no. 8902306-3, it is known that different combinations of duplex core-rim structures in well balanced proportions give improved wear resistance or toughness behavior properties. The distribution of hard constituent particles containing titanium, tantalum and tungsten especially affects the cutting properties for different sintered titanium-based carbonitride alloys with the same overall chemical composition. The difference in cutting behavior remains even when the overall carbon content varies.
From the literature on titanium-based carbonitride alloys, it is apparent that the trend of substituting carbon by nitrogen is very common. It has been shown that properties related to toughness behavior in metal cutting operations (turning, milling and drilling) in general have been improved by substituting titanium carbide by titanium nitride or titanium carbonitride. This holds for a nitrogen content up to a certain level where the wetting properties no longer permit a sintered material without pores. Although diffusional wear (crater wear) resistance is improved with increasing nitrogen content, wear resistance in general decreases with increasing nitrogen content.
The microstructure and the metal cutting properties of sintered titanium-based carbonitrides with the same overall chemical composition vary. For a production process similar to the process generally used in the production of cemented carbides, including pressing and vacuum sintering, different hard constituents behave differently during the liquid phase sintering. Some of the hard constituent particles remain as cores in the sintered carbonitride alloy and inherent more or less completely their metallic composition, while others are completely dissolved and affect the rim structure formation.
U.S. Pat. No. 4,935,057 discloses a method of making a titanium-based carbonitride alloy characterized by the steps of preparing a first powder for forming the core, preparing second powders for forming the rims and preparing a third powder for forming the binder phase. Said powders are milled, compacted and sintered. The first powder is formed of at least one compound selected from the group consisting of TiC, TiCN, (Ti,Ta)C and (Ti,Ta)(C,N).

Sintered carbonitride alloy with improved toughness behavior and method of producing same


A thin film transistor substrate integrated with a driver circuit is provided for use in a liquid crystal display. The thin film transistor substrate includes a substrate having a pixel region and a driver region, a plurality of pixel driving thin film transistors formed in the pixel region, and a CMOS thin film transistor circuit formed in the driver region. Each of the plurality of pixel driving thin film transistors includes a channel region formed of an amorphous semiconductor, source and drain regions in contact with the channel region and formed of a polycrystalline semiconductor, and first and second transparent electrodes in contact with the source and drain regions, respectively. The CMOS thin transistor circuit includes a P-type thin film transistor and an N-type thin film transistor. Each of the P-type and N-type thin film transistors includes a channel region formed of a polycrystalline semiconductor and source and drain regions in contact with the channel region and formed of a polycrystalline semiconductor. Each of the P-type and N-type thin film transistors further includes third and fourth transparent electrodes in contact with the source and drain regions of the corresponding type thin film transistor, respectively, and source and drain electrodes in contact with the third and fourth transparent electrodes, respectively.

1. Field of the Invention
This invention relates to a liquid crystal display device, and more particularly, to a liquid crystal display device in which a pixel driving thin film transistor(TFT) and a driver circuit are integrated on the same panel.
2. Discussion of the Related Art
An active matrix liquid crystal display has been used for a liquid crystal display(LCD) that has large area and high resolution. Such an active matrix LCD includes pixel driving TFTs for driving pixels of the display pixels and driver circuit TFTs for applying signals to gate bus lines and data bus lines coupled to the pixel driving TFTs.
There are two types of driver circuit units. In the first type, the driver circuit unit is a separate integrated circuit chip and is attached to the substrate of a liquid crystal panel. Thus, the driver circuit is not formed on the liquid crystal panel. In the second type, the driver circuit unit is formed on the LC panel as one piece. In general, complementary metal oxide semiconductor TFTs(CMOS TFTs) using a polycrystalline silicon(p-Si) with high electric field effect mobility have been used for that purpose, with the resultant switching speed being much higher than that for amorphous silicon TFTs. Further, because the driver circuit TFTs and the pixel driving TFTs are fabricated at the same time, the manufacturing cost can be reduced.
FIGS. 1A to 1H are drawings which show a method of fabricating a conventional liquid crystal display device integrated with a driver circuit. A substrate 1 is divided into a pixel region and a driver circuit region. The driver circuit region is divided into a part A having N-channel metal oxide semiconductor TFTs(NMOS TFTs) and a part B having P-channel metal oxide semiconductor TFTs(PMOS TFTs).
As shown in FIG. 1A, a buffer layer 3 is provided on the substrate 1, and then p-Si is deposited on the buffer layer 3 and patterned to form semiconductor layers 4a, 4b, 4c in the pixel and driver circuit regions. As shown in the figure, one semiconductor layer 4a is provided in the pixel region, and two semiconductor layers 4b, 4c are formed in the driver circuit region. The semiconductor layer 4a in the pixel region is formed for a TFT for driving each pixel. The semiconductor layers 4b, 4c are formed for NMOS and PMOS TFTs, respectively.
As shown in FIG. 1B, an insulating layer 5 such as SiO.sub.2 or SiNx, a metal layer 6, such as Al, Al alloy, or Cr, and a photoresist 20a are successively formed over the substrate 1. The insulating layer 5 and the metal layer 6 are patterned by photolithography to form a gate insulating layer 5 and gate electrodes 6a, 6b, 6c, as shown in FIG. 1C. Further, as shown in FIG. 1D, n.sup.- doping (doping for forming an n.sup.- layer) in low impurity-concentration is performed onto the entire surface of the substrate 1. As a result, n.sup.- layers 12b and channel layers 12a are formed in the semiconductor layers 4a, 4b, 4c. (The n.sup.- ions are blocked by the gate electrodes 6a, 6b, 6c.)
Thereafter, as shown in FIG. 1E, n.sup.+ doping in high impurity-concentration is performed to form a lightly doped drain(LDD) structure after the photoresist layer 20b is deposited over the substrate and patterned to cover the part B in the driver circuit region, the gate electrode 6a, and some parts of the semiconductor layer 4a in the pixel region. In this case, the photoresist layer 20b in the pixel region blocks some parts of the gate electrode 6a and the semiconductor layer 4a so that n.sup.+ type ions are introduced into only a portion of n.sup.- layer 12b. Accordingly, an n.sup.+ layer 12c is formed by the n.sup.+ doping in the semiconductor layers 4a of the pixel region and 4b of part A of the driver circuit region. Especially, an LDD (lightly-doped drain) structure is constructed by forming n.sup.+ layer 12c with high impurity-concentration and n.sup.- layer 12b with low impurity-concentration in the semiconductor layer 4a in the pixel region.
As shown in FIG. 1F, the photoresist layer 20b is removed, and another photoresist layer 20c is deposited and patterned to block the pixel region and part A of the driver circuit region. Subsequently, high impurity-concentration p.sup.+ doping is executed to form a p.sup.+ layer 12d in part B of the driver circuit region.
This doping method is called a counter doping method. When the n.sup.- doping is executed, the concentration of impurity-ions doped in the semiconductor layers is about 10.sup.16 -10.sup.18 atoms/cm.sup.3, whereas the concentration of impurity-ions doped in the semiconductor layer in the p.sup.+ doping is about 10.sup.19 -10.sup.21 atoms/cm.sup.3. Therefore, the n.sup.- layer becomes a p.sup.+ layer by the p.sup.+ doping (hence called counter doping).
Accordingly, TFTs having an LDD structure including the n.sup.+ layers 12c and n.sup.- layers 12b are formed in the pixel region, and CMOS TFTs having NMOS TFTs including the n.sup.+ layers 12c and PMOS TFTs including the p.sup.+ layers 12d are formed in the driver circuit region.
As shown in FIG. 1G, after the photoresist layer 20c is removed, an insulating layer 7, such as SiNx or SiO.sub.2, is deposited over the entire surface of the substrate 1. Contact holes are formed by patterning the insulating layer 7, and a metal such as Al is deposited and patterned to form source/drain electrodes 8.
As shown in FIG. 1H, a passivation layer 10 is deposited, and indium tin oxide(ITO) is deposited and patterned to form a transparent electrode 9. As a result, TFTs having LDD structures are formed in the pixel region and CMOS TFTs are formed in the driver circuit region, thereby completing a liquid crystal display device integrated with a driver circuit.
Further, an alignment layer is formed over the passivation layer 10, and is rubbed mechanically to provide an alignment direction for the liquid crystal. This completes the liquid crystal panel. Also, if necessary, a black matrix is formed to prevent light leakage from an upper substrate.
However, the above mentioned method for fabricating the liquid crystal display device integrated with a driver circuit requires complex processes, and has the problem that the source/drain electrode formed on the TFT and the metal lines are often disconnected due to defects or the like.

Liquid crystal display device integrated with driving circuit and method for fabricating the same


To provide a magnetic disk excellent in floating and sliding characteristics in a low floating area. A magnetic disk having a feature that variations in the height of the projections on each surface of protective films in floating ensured areas on both sides of the magnetic disk are .+-.15%, and a magnetic disk device on which the magnetic disk is mounted. A surface processing apparatus for a magnetic disk, including: a first electrode for fixing the magnetic disk, the first electrode having an inside diameter larger than the inside diameter of the non-magnetic substrate; an electrically grounded shield for shielding the first electrode; a second electrode, disposed in parallel to the surface of the magnetic disk, for generating plasma against the surface of the magnetic disk; and a plasma control member, disposed at a position separated from the outer edge of the magnetic disk by a specified distance, for controlling plasma generated against the surface of the magnetic disk; wherein a power is applied between the first and second electrodes for plasma-etching the surface of the magnetic disk.

A recent tendency in magnetic storage devices used for computers and the like has been toward small size and large capacity. With such a tendency, magnetic recording media having high density recording and high reliability have been required. In general, reducing the recording density requires achieving a reduction in the distance between the magnetic recording film and the magnetic head provided on a magnetic head slider. To reduce such a distance, it is necessary to lower the floating height of the magnetic head above the magnetic disk, and to prevent attraction between the magnetic head and the magnetic disk upon CSS (contact, start, stop) for preventing generation of head crush upon sliding.
In other words, to reduce the distance between the magnetic recording film and a magnetic head, a magnetic disk requires an anti-sliding strength and a floating height stability of a magnetic head. It is well known that an anti-sliding strength and a floating characteristic of a magnetic head slider are improved by forming fine irregularities on the surface of a magnetic disk. Japanese Patent Laid-open No. Hei 3-252922 discloses a method of arranging projections, each having a specified shape, in accordance with a specified rule for improving an anti-sliding strength and a floating characteristic of a magnetic head.

Magnetic disk and method of and apparatus for manufacturing magnetic disk


This invention relates to methods and apparatus for carrying out affinity separations of proteins under conditions optimized for recovering biologically active protein. The method utilizes a membrane-bound ligand first to capture and separate a ligate from a fluid mixture and subsequently to release said ligate in purified form. The present methods enhance the yield of active ligate recovered in the process. The invention has particular relevance to the recovery and purification of proteins from mixtures.

Affinity Separations
Of the separation technologies available today, those based on affinity interactions are ever more popular, particularly at the laboratory scale. Affinity separation has become the preferred method for purifying proteins and other biomolecules from complex, biologically derived fluids. Affinity Chromatography and Biological Recognition, I. M. Chaiken, M. Wilchek and I. Parikh (eds.), Academic Press, New York, 1983; Hill, E. A. and M. D. Hirtenstein, "Affinity chromatography: its application to industrial scale processes", Advances in Biotechnological Processes, Alan R. Liss, Inc., New York, 1983). The key to the method's attractiveness is its unequaled degree of selectivity.
Affinity separations, as they are conventionally practiced, typically involve a number of sequential steps. First, a solution containing a component to be separated from the solution (a component of interest) is passed through a column containing a highly specific ligand which will reversibly bind the compound of interest immobilized on a support, usually high-surface-area beads or particles. As the fluid passes through the column in this loading step, the desired component binds selectively and reversibly to the immobilized ligand, while most impurities pass unhindered. Residual impurities are removed by flushing the column with an appropriate buffer solution in a subsequent washing step. The component, now purified but still bound to the immobilized ligand, is then recovered by passing an eluent solution through the column that has the effect of disrupting the ligand-to-ligate binding interaction. Generally, the pH, concentration of a salt, or some other chemical characteristic of this eluent solution is altered significantly from the corresponding values of the loading and wash solutions, and it is this change that is responsible for weakening the affinity interaction and thereby causing desorption and elution of the ligate molecule.
Many types of molecules can serve as ligands, including antibodies, antigens, enzyme inhibitors, isolated receptors, and more recently, cloned receptors. Bailon, P. et al., Bio/Technology 5:1195 (1987). In contrast, however, the choice of materials to support the ligand has been somewhat limited. Agarose gel beads (e.g., 50 to 150 microns diameter) have traditionally received the most attention as affinity ligand supports, particularly on the laboratory scale. Within recent years, cross-linked and accordingly more rigid versions of these and other polysaccharide-based gel beads have been developed and introduced, as have various microporous support particles based on synthetic polymer compositions. These polymeric support materials are now complemented by various inorganic materials. For example, porous silica packed in high-pressure columns is used to perform affinity separations in an HPLC-like process. Typical pore diameters in the silica support range from about 200 to about 1000 Angstroms, whereas silica particle diameters are generally in the range of about 5 to 25 microns.
Affinity Membranes
Affinity separation processes for the recovery and purification of proteins are conventionally carried out using sorbent beads or particles packed in columns, as discussed above. The adsorption process is carried out in a cyclical fashion comprising four steps:
1. Load: A solution of target component in a mixture is made to pass through a packed column; target component ("ligate") is recognized and captured by the immobilized sorbent ("ligand"), while most contaminants pass through. PA1 2. Wash: A wash solution is passed through the column to flush out contaminants present in the column void volume as well as to displace non-specifically bound contaminating substances. PA1 3. Elute: An eluent solution is passed through the column to disrupt the affinity binding between immobilized ligand and reversibly bound ligate, causing elution of the latter from the column in a purified condition. PA1 4. Regenerate: A regeneration solution is passed through the column in order to return it to conditions (e.g., pH and/or ionic strength) that favor ligand/ligate binding.
Despite the high selectivity that affinity processes provide, however, their application on the process scale has been hampered by the inability of affinity columns to handle high flowrates at reasonable ligand utilization efficiencies.
Affinity membrane devices are based on microporous membranes, preferably hollow fibers activated by covalent attachment of affinity ligands to the interior surfaces of the membrane's pore walls. In operation, feed solution is made to flow through the membrane from one of its surfaces to the other, during which process the target molecule is recognized and captured by the immobilized ligand which it encounters, leaving the filtrate devoid of ligate. Like columns, these affinity membranes can be operated in a cyclic affinity adsorption process to produce high-purity protein in a single step. However, unlike columns based on particulate affinity ligand supports, affinity membranes are not hampered by the serious pressure drop and mass transfer limitations from which columns suffer. As a result, affinity membranes are capable of operating at higher volumetric throughputs and ligand utilization efficiencies than are columns.
Both polymeric and inorganic affinity support particles suffer from hydrodynamic or pressure drop limitations when used in columns. With the former (e.g., soft agarose gel beads), particle compressibility is a problem, inasmuch as attempts to increase flowrate through a column packed with agarose are normally met by increased pressure drops. This leads in turn to further compression of the particles and reduced bed permeability. Clonis, Y.D., Bio/Technology 5:1290(1987). It is only by resorting to very shallow but large-diameter packed columns (i.e., columns with a relatively large ratio of bed diameter to depth) that practical volumetric throughputs can be obtained. Alternatively, one can resort to more rigid particles (e.g., silica, controlled-pore glass), but here the small size of the support particles limits volumetric throughput unless high operating pressure is employed.
In contrast, affinity membranes with adsorptive pore walls provide extremely short fluid-flow path lengths in comparison to the superficial area provided for flow. This unique geometry of affinity membranes thus leads to very high fluid throughputs per unit of applied pressure difference as compared to affinity columns.
Another important consideration in evaluating the merits of membranes vs. columns as affinity ligand supports is the matter of their relative mass transfer efficiency. Efficient capture of a target protein in an affinity column requires that the characteristic time for diffusion of protein to the immobilized ligand be short as compared to the residence time of fluid in the column. If this condition is not met, premature breakthrough is encountered and the "dynamic" sorption capacity of the bed will not approach its "static" or equilibrium capacity.
A characteristic diffusion time for the encounter between diffusing ligate and immobilized ligand can be defined as the ratio of the square of a characteristic diffusion distance to the diffusivity of the ligate molecule. The required residence time of fluid in the affinity device during the loading step will increase in proportion to this characteristic diffusion time. Thus, in order to keep the characteristic distance for ligate diffusion into the support as small as possible (and thereby to maximize device throughput during loading), it is necessary to use support particles that are as small as practical (e.g., fine silica or synthetic polymeric particles). However, doing so tends to aggravate the above-mentioned pressure drop problem, forcing one away from low-pressure operation towards a high-pressure liquid chromatography process.
In contrast, affinity membranes obviate the need to work with small (e.g., micron-sized) particles in order to minimize diffusion distances and diffusion times. Where protein-containing solutions are pumped across affinity membranes, the characteristic distance across which ligate must diffuse in order to meet membrane-bound ligand is of the order of a quarter of the pore diameter; typically, this diffusion distance is only a fraction of a micron. Because diffusion time varies with the square of diffusion distance, the impact of the reduction in diffusion distance afforded by affinity membranes on improved mass transfer efficiency and volumetric productivity is dramatic. These and other aspects of affinity membrane performance have been discussed by S. Brandt et al., Bio/Technology 6:152 (1988) and in co-pending U.S. applications Ser. No. 07/265,061 and No. 07/428,263, referred to above.

Method and apparatus for eluting proteins in affinity membrane process


A depth-based image enhancement system is disclosed. A depth estimation unit generates three-dimensional (3D) depth information from a two-dimensional (2D) image. Subsequently, an image enhancement unit enhances the 2D image according to the 3D depth information.

1. Field of the Invention
The present invention generally relates to image enhancement, and more particularly to depth-based image or video enhancement.
2. Description of the Prior Art
When three-dimensional (3D) objects are mapped onto a two-dimensional (2D) image plane by prospective projection, such as an image taken by a still camera or video captured by a video camera, a lot of information, such as the 3D depth information, disappears because of this non-unique many-to-one transformation. That is, an image point cannot uniquely determine its depth. Recapture or generation of the 3D depth information is thus a challenging task that is crucial in recovering a full, or at least an approximate, 3D representation, which may be used in image enhancement, image restoration or image synthesis, and ultimately in image display.
Image enhancement is an important aspect in the processing of both digital image and video information. To a large extent, image enhancement is applied in nearly all digital image processing tasks. In one hand, the image enhancement is utilized to improve the image quality, such as the contrast and the brightness. On the other hand, the image enhancement is utilized to prepare or preprocess an image for subsequent image processing.
Image edge enhancement or detection is one of the important image enhancement operations. Typical image edge enhancement emphasizes and shows the edge details of an image, such as the outlines of objects within the image, while retaining or even suppressing other portions of the image.
Two-dimensional (2D) frequency transform is conventionally applied to a 2D image that is to be edge-enhanced. The frequency transform converts an image from a spatial-domain representation of brightness into a frequency-domain representation of frequency components. The magnitude of the high-frequency component(s), or the edge information, of the frequency-transformed image is then increased or enhanced, resulting in an edge-enhanced image. This method disadvantageously gives little consideration to the distinct depth information among different edges. Accordingly, the respective edges are monotonously assigned the same depth value.
For reasons including the that conventional methods could not faithfully enhance an image, a need has arisen to propose a system and method of depth-based image/video enhancement that can enhance an image while considering respective 3D depth information.


Disclosed a semiconductor memory device in which an access to a memory cell is designated according to a command, and a common data terminal is used as an input terminal to which a write signal to the memory cell is input and an output terminal from which a read signal from the memory cell is output. The semiconductor memory device includes: a first input circuit having input capacitance corresponding to the input terminal to which the command is input; and a second input circuit having input capacitance corresponding to the data terminal. A mask signal for checking the write signal input from the data terminal is input by either the first or second input circuit by a bonding option technique.

The present invention relates to a semiconductor memory device and, more particularly, a technique effective for use in a semiconductor memory device used in a plurality of modes by using a common chip as a base.
Bonding option is effective means by which products adapted to the market trend can be supplied without a delay by storing products subjected to a preceding process and realizing products according to a selected product specification by bonding in a following process. In a dynamic RAM (Random Access Memory) (hereinbelow, simply called a DRAM), the bonding option is used for selection of a word configuration (bit configuration) such as xc3x974, xc3x978, or xc3x9716 configuration. A metal option technique of changing a circuit function by selective layout of metal wires is also known.
Japanese Unexamined Patent Application No. Hei 10(1998)-302465 (corresponding to U.S. Pat. No. 6,060,916) discloses a technique of enabling a single data rate (SDR) mode or a double data rate (DDR) mode to be selected on a memory chip in accordance with an output signal of a mode selection unit 301 constructed by either a photo mask or fuse.
Japanese Unexamined Patent Application No. Hei 11(1999)-203868 (corresponding to U.S. Pat. No. 6,094,375) discloses a technique of selecting the SDR mode or the DDR mode in accordance with an output signal of a mode selection signal generating unit constructed by a fuse, accessing a memory cell by a group of column addresses in the SDR mode, and accessing a memory cell by the remaining column addresses except for a specific column address in the DDR mode.
Japanese Unexamined Patent Application No. Hei 11(1999)-213668 (corresponding to U.S. Pat. No. 6,151,271) discloses a technique of programming a DDR or SDR operation mode of a synchronous DRAM by a manufacturer or user, holding a mode selection signal in a mode register, outputting the mode selection signal from the mode register to a control signal generating unit, and outputting, as an internal clock, either a first clock having a cycle of an integral multiple of that of an external system clock and a second clock having a cycle which is double of the first clock. The DDR or SDR operation mode is fixed by, for example, metal option, mask option, bonding option, or a fuse by a manufacturer in a manufacturing process.
Japanese Unexamined Patent Application No. 2000-67577 discloses a synchronous semiconductor memory device in which, in a SDR SDRAM operation mode, an input/output buffer circuit operates synchronously with an external clock signal and, in a DDR SDRAM operation mode, an internal clock signal of a frequency twice as high as that of the external clock signal is generated, and the input/output buffer circuit operates synchronously with the internal clock signal.
Japanese Unexamined Patent Application No. 2000-40398 (corresponding to U.S. Pat. No. 6,151,272) discloses a technique of testing a DDR synchronous DRAM integrated circuit device by a low-speed tester by activating a SDR mode signal to operate the DDR synchronous DRAM integrated circuit device in a SDR mode.
Japanese Unexamined Patent Application No. Hei 11(1999)-191292 (corresponding to U.S. Pat. No. 6,011,751) discloses a synchronous semiconductor memory device capable of selectively generating a burst address signal in a linear mode or an interleave mode so as to be selectively adapted to the SDR operation mode or the DDR operation mode by selecting either a configuration in which multiplexers are provided at ante stages of a plurality of registers, and a connection relation of the registers is selected, thereby incrementing an address or a configuration of selecting a signal obtained by inverting a register output by a multiplexer.
In order to be adapted to a high speed memory system of the next generation, a DDR-SDRAM (Double Data Rate Synchronous DRAM) is proposed. Since the DDR-SDRAM is obtained by improving an SDRAM (Synchronous DRAM) in order to achieve higher performances, the DDR-SDRAM and the SDRAM have many common portions from a circuit viewpoint. The inventors of the present invention paid attention on the commonality between the SDRAM and the DDR-SDRAM and examined the possibility of improving developed TAT, reduction in manufacturing cost as a total, and so on by realizing formation of the SDRAM and the DDR-SDRAM on the same chip.
During the examination, a large difference was found between an input interface in a final product specification of the DDR-SDRAM and that of the SDRAM. Specifically, in the SDRAM, a mask signal is input in response to a command input. On the other hand, in the DDR-SDRAM, a mask signal is input in response to a write signal. Regarding such inputs of the mask signals, not only just signal input timings but also input capacitances of signal pins seen from the host side have to be made different from each other. For example, the standard of the input capacitance of a data mask signal pin in the SDRAM is set in a range from 2.5 to 3.8 pF which is the same as that of a command pin such as /CS or /RAS and that of an address pin. In contrast, in the DDR-SDRAM, it is set in a range from 4.0 to 5.5 pF which is the same as that of a data pin. Consequently, there is no common area of an input capacitance value between the SDRAM and DDR-SDRAM. In addition to the difference in the input capacitances, the input timings are also different from each other as described above. Consequently, internal timing adjustment is necessary. It was made clear by the inventors that, when two kinds of circuits for the DDR-SDRAM and the SDRAM are mounted on the same chip, a problem such that the circuit scale is enlarged occurs.
An object of the invention is to provide a semiconductor memory device having an input circuit adapted for two kinds of input specifications while suppressing enlargement of the circuit scale. Another object of the invention is to provide an SDRAM and a DDR-SDRAM formed by using a common chip. The above and other objects and novel features of the invention will become apparent from the description of the specification and the appended claims.
A representative one of inventions disclosed in the application will be briefly described as follows. In a semiconductor memory device in which an access to a memory cell is designated according to a command, and a common data terminal is used as an input terminal to which a write signal to the memory cell is input and an output terminal from which a read signal from the memory cell is output, a first input circuit having input capacitance corresponding to the input terminal to which the command is input and a second input circuit having input capacitance corresponding to the data terminal are formed. A mask signal for checking the write signal input from the data terminal is input by either the first or second input circuit by a bonding option technique.
Another representative one of inventions disclosed in the application will be briefly described as follows. In a semiconductor memory device in which an access to any of the memory cells is designated according to a command, and a common data terminal is used as an input terminal to which a write signal to the memory cell is input and an output terminal from which a read signal from the memory cell is output, an input circuit having addition capacitance corresponding to a difference between first input capacitance corresponding to the input terminal to which the command is input and second input capacitance corresponding to the data terminal is formed. By a metal option technique, the addition capacitance is not connected in a configuration of inputting the mask signal in response to the command, or the addition capacitance is connected to the input circuit in a configuration of inputting the mask signal in response to the write signal.


A memory arrangement includes: a first line for applying a reference voltage, a second line for applying an operating voltage, and a plurality of resistive memory elements, each element includes a resistive memory cell and a MOS memory cell selection transistor. A NOR memory arrangement is configured with each memory element including the resistive memory cell and selection transistor connected in series with the transistor connected to the first line, and the memory cell connected to the second line. A NAND memory arrangement is configured with a series of resistive memory elements forming a chain with each memory element including the resistive memory cell and selection transistor connected in parallel. The chain is connected to the first line disposed on a side of the memory cells facing the selection transistors and the second line disposed on a side of the memory cells which is remote from the selection transistors.

Resistive memory materials can be used to construct memory cells in which one bit of information, i.e., a logic "1" or "0", is in each case represented by different electrical resistance values.
In recent years, phase change materials have been investigated, in particular, which can be brought to crystalline or amorphous phase states having different electrical resistances by heating. Typical phase change materials, such as those used in CDs and DVDs, are made of chalcogenides. Chalcogenides are distinguished in particular by the fact that their electrical resistance changes by several orders of magnitude if a change in the phase state between the amorphous phase and the crystalline phase is induced. A change in the phase state can be brought about via Joule heat, for example, by application of electric currents. By contrast, in polymer memory cells, the excitability of specific proteins, such as bacteriorhodopsin, embedded in a polymer layer is utilized for storing items of information, each alteration of the state of the proteins being accompanied by a different electrical resistance of the layer.
The current-voltage characteristic of such a polymer memory cell is shown, for example, in FIG. 1. In this case, the logic values "0" and "1" are represented by different electrical resistance values RC0 and RC1, respectively, of the memory cell. The two resistance values correspond to the high-resistance and the low-resistance straight line, respectively, in the current-voltage characteristic.
In the example of FIG. 1, a logic "0" is written by application of a voltage of +1V, wherein a logic "1" is written by application of a voltage of −1V. Writing to a resistive memory cell is also referred to as "programming" of the memory cell. If the state of the memory cell is intended to be read, a read voltage is applied whose value lies below the voltages for writing to the memory cell, in order to avoid an inadvertent reprogramming of the memory cell. In the present example, a read voltage of 0.5 V is applied and, in accordance with the different resistance values RC0 and RC1, a high and low current are respectively measured in order to detect the logic values "0" and "1".
A typical NOR architecture of a memory arrangement comprising a plurality of resistive memory cells is shown in FIGS. 2A, 2B and 2C. In this case, each resistive memory cell 1 is connected, on the one hand, via the source-drain path of a MOS memory cell selection transistor 2 to a bit line (BL). On the other hand, each resistive memory cell 1 is connected to a so-called cell plate or cell plate line 3 for applying a reference potential. The reference potential is applied as a reference point with respect to the potential of the bit line. Furthermore, each MOS memory cell selection transistor is connected via its gate terminal to a word line (WL) for the control thereof.
FIGS. 2A to 2C illustrate examples of writing and reading operation of a resistive memory cell in the NOR architecture. FIG. 2A schematically illustrates a first writing method. Accordingly, a fixed voltage of 1 V, for example, is present at the cell plate line 3, and different operating voltages of 0 V and 2 V, for example, are applied to the bit line for the purpose of switching the resistive memory cell 1 into the different states. In a second writing method, which is illustrated schematically in FIG. 2B, voltage is applied to the cell plate line 3 in a complementary manner with respect to the bit line, where in a case in which, for example, 0 V is applied to the bit line and, for example, 1 V is applied to the cell plate. Meanwhile, in a case wherein, for example, 1 V is applied to the bit line, for example, 0 V is applied to the cell plate. FIG. 2C illustrates the reading operation. Accordingly, the programmed state of a resistive memory cell 1 can be read via a reference voltage of 0 V, for example, being applied to the cell plate line 3, while a read voltage of 0.5 V, for example, is applied to the bit line.
In order to select the resistive memory cell 1 for writing or reading, the word line connected to the MOS memory cell selection transistor 2 of the selected memory cell 1 is put at 3 V, for example, during the reading or writing operation in order to put the associated MOS memory cell selection transistor 2 into its ON state, while the rest of the word lines are put at 0 V, for example, with the result that the associated MOS memory cell selection transistors 2 are in their OFF state.
FIGS. 3A and 3B schematically show a sectional illustration and plan view, respectively, associated with this typical NOR architecture of memory elements. Accordingly, for example, n+-doped source regions 4 and likewise n+-doped drain regions 5 are provided in the surface of a p-conducting semiconductor body. The drain regions 5 are in each case connected to the bottom electrodes 7 of resistive memory cells 1 via contact plugs 6 composed of polycrystalline silicon, for example. Consequently, a resistive memory material 9 is on the one hand connected to a drain region 5, while on the other hand it is connected to a cell plate line 3, which simultaneously acts as top electrode of the resistive memory cell 1. Respective word lines WL are arranged in a position disposed opposite channel zones (not specifically shown here) that are arranged between the source and drain regions and serve for controlling the MOS memory cell selection transistors. Furthermore, each source region 4 is connected to a bit line BL via contact plugs 8. As can be gathered from FIG. 3A, in particular, a source region 4 is in each case associated with a pair of drain regions 5, two adjacent pairs of drain regions 5 being insulated from one another by STI (Shallow Trench Isolation) trenches 10. Furthermore, the structures above the semiconductor plate are embedded in a dielectric material (not specifically illustrated) composed of SiO2, for example. Only the bit line BL is illustrated in FIG. 3B, while the plate line (not illustrated) is to be imagined as running above the bit line. In FIG. 3B, the insulation clearance between contact plug and bit line is indicated by a dashed square around the contact plugs 6 connecting the MOS memory cell selection transistors to the memory cells.
In the conventional NOR architecture, the resistive memory cell 1 and the cell plate line 3 are arranged the furthest away from the surface of the semiconductor body having the source and drain regions. It is conventional or standard that the word and bit lines are led perpendicular to one another, which has the consequence of the bit lines having to be led parallel to the cell plate lines. However, a minimum circuit layout is not possible in this arrangement. Rather, the minimum area per memory cell (memory cell area) that can be achieved in the conventional NOR architecture is at best approximately 9 F2, where F denotes the minimum feature size of the technology used for producing the circuit structures.
A further reduction of the minimum memory cell area that can be achieved is extremely desirable, primarily with regard to advancing miniaturization and an increase in performance of memory components.

NOR and NAND memory arrangement of resistive memory elements


The techniques disclosed herein improve existing computing systems by providing consistent interaction models during communication sessions. A system configured according to the disclosure presented herein can improve user engagement during communication sessions and conserve computing resources by enabling users to define arrangements of display areas in a user interface (UI) for presenting content during a communication session and to utilize the same pre-defined arrangement during multiple communication sessions. The arrangement can be presented to all or some of the participants in a communication session. By providing a consistent arrangement of display areas that render content to participants in communication sessions, the participants can be more engaged and productive, thereby improving human-computer interaction and conserving computing resources.

There are a number of different systems and applications that allow users to collaborate. For example, some systems provide collaborative environments that allow participants to exchange files, live video, live audio, and other forms of content within a communication session. In other examples, some systems allow users to post messages to a channel having access permissions for a select group of individuals for the purposes of enabling team-focused or subject-focused conversations.
Systems providing collaboration environments such as those described above commonly arrange the on-screen presentation of content automatically. For example, some systems will automatically arrange the on-screen presentation of live video streams based upon the activity of meeting participants, such as by making a portion of a user interface showing an active speaker larger than other the portions showing other participants. A video stream showing an active speaker might also be made full screen in other examples. In these cases, other content can be made smaller or removed from the display altogether.
Automatic arrangement of content presented during a communication session also results in different arrangements of content from meeting-to-meeting. For instance, content shown in one meeting between a group of participants might be shown in a different location or hidden altogether in a subsequent meeting between the same group of participants.
Changes in the layout of content during or between communication sessions such as those described above can be confusing and distracting to users, thereby resulting in less productive meetings and inefficient use of computing resources. For example, if a system does not display an optimized and consistent arrangement of shared content, users might not be able to readily identify the salient aspects of the shared content. In some scenarios, if shared content is not displayed properly or consistently, users might miss important details altogether.
Systems such as those described above can also work against the general principle that proper timing and consistent arrangement of content are essential for the optimization of user engagement. The issues described above might not only cause users to miss important content, such issues can also impact user engagement. The optimization of user engagement for any software application is essential for user productivity and efficient use of computing resources. Productivity loss and inefficiencies with respect to computing resources can be exacerbated when software applications do not optimize user engagement, particularly when used to provide a collaborative environment for a large number of participants.

Providing consistent interaction models in communication sessions


Embodiments disclosed herein describe systems, methods, and products for concurrently placing and optimizing input-output (IO) pins and internal components of an integrated circuit (IC) design. In an illustrative process flow, the computer (executing an illustrative EDA tool) may import the IC design and unplace the IO pins of the imported IC design. The computer may set one or more constraints for the IO pins with more degrees of freedom than the conventional pre-fixed locations. The computer may then concurrently place the IO pins and the internal components such that the IO pins obey the one or more constraints. The computer may iteratively optimize the placement of the IO pins and the internal components while ensuring that the one or more constraints are not violated.

Modern semiconductor based integrated circuits (ICs) are incredibly complex and contain millions of circuit devices, such as transistors, and millions of interconnections between the circuit devices. Designing such complex circuits cannot be accomplished manually, and circuit designers use computer based Electronic Design Automation (EDA) tools for synthesis, debugging, and functional verification of the ICs. EDA tools provide various functionality to facilitate different processes for IC design. One of the processes that EDA tools facilitate is placement and placement optimization of various components within an IC design.
However, conventional EDA tools provide a limited component placement functionality. For example, a conventional EDA tool places input/output (TO) pins at pre-fixed locations before allowing for placement of macros and standard cells. This limitation generally has a large impact on downstream placement processes, the overall IC design flow, and the final IC design. For example, a downstream placement optimization algorithm, which has to start with the inflexibility of the pre-fixed IO pin locations, may have severely restricted options for moving one or more components of the IC design. On the quality-of-results (QoR) metric (a design quality metric based upon the overall wirelength and instances of negative slacks in the IC design), the IC design generated the conventional EDA has an inferior performance.
In addition, the IC design generated by conventional EDA tools may also cause split modules (or a bad module distribution). For example, a circuit designer may specify a module to be connected to ten IO pins. The pre-fixed locations of the IO pins may cause the ten IO pins to be at different boundary edges of the IC design. Therefore, signals through a first subset of the ten IO pins at a first boundary edge may arrive at the module at a different time than signals through a second subset of the ten IO pins at a second boundary edge resulting in a split module. Split modules may cause undesirable timing violations that may have to be remedied before the IC design is taped out. In other words, split modules cause a significant delay in the convergence of the IC design.
As such, a significant improvement upon component placement methods in IC design is therefore desired.

Systems and methods of concurrent placement of input-output pins and internal components in an integrated circuit design


A system for analyzing data organized into data sets and for transforming the data sets into a visual representation of the data sets is provided. The system includes a memory, a first processor, and an output device. The memory is configured with a data structure for maintaining an arrangement of cells in a grid of rows and columns and for storing the data sets. The first processor is configured to map attributes of the data sets into visual representations of the data sets. The output device displays the visual representations of the data sets in the cells. A user can extract meaning from the data by visually comprehending the relationships between the data sets.

The present invention generally relates to systems for analyzing data, and in particular, to systems for analyzing data where data sets are transformed into visual representations using an arrangement of cells.
The task of data analysis often involves complex data sets that are not easily comprehensible. Spreadsheets have proven to be highly successful tools for interacting with data. Typical spreadsheets can apply algebraic operations, manipulate rows or columns, and explore xe2x80x9cwhat-ifxe2x80x9d scenarios, but they are limited in the complexity of information that can be manipulated. Furthermore, typical spreadsheets are limited in their graphical representations of the data. Complex data sets involve multiple data dimensions or variables that are beyond the limitations of typical spreadsheets.
Visualization techniques exist for representing various forms of complex data sets. Visualization techniques allow complex data sets to be transformed into graphical representations so that users can explore these complex data sets more easily. However, current visualization techniques are also limited. During analysis of complex data sets, it is often desirable to combine, select, or manipulate several different data sets at the same time, such as exploring different views of the data interactively, applying operations like rotation or data filtering to a view or group of views, and comparing two or more related data sets. Current visualization techniques do not support these capabilities. Accordingly, improvements in systems for analyzing complex data sets are desirable.
In one aspect of the present invention, one example embodiment involves a system for analyzing data organized into data sets and for transforming the data sets into a visual representation of the data sets. The system includes a memory, a first processor, and an output device. The memory is configured with a data structure for maintaining an arrangement of cells in a grid of rows and columns and for storing the data sets. The first processor is configured to map attributes of the data sets into visual representations of the data sets. The output device displays the visual representations of the data sets in the cells. A user can extract meaning from the data by visually comprehending the relationships between the data sets.
In another aspect, the system may also include a selection module for selecting a data set, or data sets, and an operator module for selecting an algorithmic operator for manipulating the selected data set, or data sets. The system applies the selected algorithmic operator to modify the selected data set, or data sets, or generate at least one new data set.
In another aspect, the system may also include a dependency module by which the system determines dependencies between the selected data sets.
In another aspect, a method of analyzing data organized into data sets and for transforming the data sets into a visual representation of the data sets is described. The method includes maintaining an arrangement of cells in a grid of rows and columns and for storing the data sets; mapping attributes of the data sets into visual representations of the data sets; and displaying the visual representations of the data sets in the cells.
In another aspect, a computer-readable medium encoded with data representing a computer program, that can cause a computer, having memory and an output device, to analyze data organized into data sets and for transforming the data sets into a visual representation of the data sets, is described. The computer program comprising a method for maintaining an arrangement of cells in a grid of rows and columns and for storing the data sets, mapping attributes of the data sets into visual representations of the data sets, and displaying the visual representations of the data sets in the cells.


In the preferred embodiment, the transmission length of the non-full rate frame is shortened frame in order for the mobile terminal 100 to monitor other frequencies with a single receiver. Modulated symbols of non-full rate frame are transmitted with reduced repetition maintaining the sum of repeated symbol energy. Generally, for 1/n (n=2,4,8) length transmission, 1/m (m≧n) rate frame repeated m/n times and transmitted with n/m symbol energy of the full rate frame. The system may use rate limitation to generate a non-full rate frame. A position of the transmitted symbols may be randomized by a mobile specific predetermined random code to minimize interference between terminals different from each other. For intensive frequency scanning and synchronization signal transmission, non-transmitting period can be assigned for successive frames of some interval. For 1/n (n=2,4,8) length successive transmission, the starting position of the transmitted symbols are staggered by 1/n frame time in each frame. If there is no part of the frame to be staggered, the starting position is the beginning of the frame. Such implementation minimizes guard time overhead for frequency switching and resynchronization.

1. Field of the Invention
The present invention relates to a telephone system, and more particularly, to a method for controlling an inter-frequency handoff in a code division multiple access (CDMA) cellular telephone system.
2. Background of the Related Art
Generally, a cellular telephone system includes a service area which is divided into a plurality of cells. Each cell provides many mobile terminals with a radio communication service through a base station. To maintain high quality communication when the mobile terminal moves between cells, a handoff, which changes a communication link or channel with one base station to another base station, must be timely established. Therefore, the mobile terminal has to be able to measure the quality of signals from other peripheral base stations during communication, and the base station system is provided with the quality of signal information to timely perform the handoff. Such a hand off is referred to as a mobile-assisted handoff.
In particular, the CDMA system can perform the communication while using the same frequency and varying an offset of a common pseudo-random code that spreads bandwidth of transmitting signal. The CDMA system has a first digital receiver, which Is referred to a searcher for searching a different CDMA signal of the same frequency, and a second digital receiver for demodulating the data. Typically, the CDMA system uses a plurality of second digital receivers, which are referred to "RAKE" receiver, to receive the data transmitted via multiple path. Accordingly, the mobile terminal can measure the quality of a different base station signal of the same frequency during the communication. In the CDMA method, the transmission rate of the data can be varied in multilevel, and the overall radio capacity within the transmission frequency can be increased by reducing an interference between different channels, which use the same frequency as the transmission rate is reduced. For example, voice data has an information amount variable with the time, and half of the communication is used for listening, i.e., receiving voice data, and the rest is used for speaking, i.e., transmitting voice data. If a variable rate transmission is used, a fifty percent or more increase in capacity may be produced.
The system capacity in the cellular telephone system may be increased by reducing the size of the cell to increase the number of the cells within the service area. However, if the size of the cell is reduced, the handoff is too often occurred generated when moving at a high speed. Hence, the base station has difficulty in properly processing the handoff.
Accordingly, a hierarchical cell structure or a layered cell structure is used, where a macro-cell of a larger size is placed upon a micro-cell of smaller size which serves the terminal moving at high-speed, is placed. In this cell structure, the handoff between the micro-cell and macro-cell according to a moving speed of the terminal, as well as the handoff between macro-cells, has to be provided.
In the hierarchical cell structure, the signal strength of the base station of the macro-cell may be much larger than that of the base station of the micro-cell, and therefore various problems, such as cocktail party effect, egg phenomenon, etc., may occur even in the CDMA system. To provide the hierarchical cell structure on different frequencies, in the CDMA system has to provide a (mobile-assisted) inter-frequency handoff.
To perform the (mobile-assisted) inter-frequency mobile-assisted handoff, the mobile terminal has to be able to receive the base station signal of different frequency during the communication and therefore, it has to be provided with an additional radio frequency RF receiver, or alternatively, the mobile terminal has to use a single RF receiver in a time-division multiplexing (TDM) method for receiving the signal of a different frequency.
The above-mentioned related CDMA cellular telephone system continuously transmits a forward signal from the base station toward she mobile terminal, the mobile terminal may have two or more RF receivers for receiving the base station signal of different frequencies during the communication. However, this method is undesirable since the cost and size of the mobile terminal increase.
For the alternate method in the CDMA system, the time period where the mobile terminal breaks a part of reception signal and receives the signal of the different frequency may be used for providing the inter-frequency handoff with a single RF receiver. However, such a method may cause the degradation of the communication quality and the communication may be dropped as the required signaling data is not received.

This patent is subject to a terminal disclaimer.

Method and system for providing inter-frequency handoff in a telephone system


An improved sport goggle for skiing, motorcycling, paintball, racing, and other sports featuring apertures communicating with a pressurized air flow provided by focusing channels in a ledge projecting from the goggle body thereby increasing air flow into the eye cavity of the goggle through the apertures. Venting of the eye cavity of the sport goggle is aided by forming of the goggle body shape to create low pressure zones adjacent to side and top venting apertures that communicate with the eye cavity. During use by a user, wind and forward motion creates air flow onto the focusing channel which focuses the divergent entering air upon a point adjacent to lower intake apertures thereby increasing the air pressure entering the goggle. Air circulation through the eye cavity is additionally aided by the curved shape of the goggle body creating low pressure zones adjacent to venting apertures to pull air from the eye cavity thereby increasing air flow and eliminating fogging. Additional utility is provided by aperture gates which are cooperatively engageable with the venting apertures to regulate air flow and/or absorb moisture.

1. Field of the Invention
The present invention relates to an improved goggle for sports and other activities where eye protection and improved vision are desirable. More particularly it relates to a goggle which incorporates a system of high and low pressure venting using focused air flow and goggle exhaust to facilitate the rapid circulation of air through the enclosed goggle thereby preventing fogging and other problems caused by conventional goggles with limited or no air flow through the eye cavity behind the lens. The device also features optional moisture absorbing, or air flow control filters dimensioned for cooperative attachment at an exhaust aperture to increase or decrease the venting of moisture from the device and to absorb moisture during use and storage.
2. Prior Art
Skiing, motorcycling, and other sports which incorporate goggles for eye protection have become an ever more popular recreational pastime in the United States and throughout the world. Goggles are also especially popular for the military in areas with blowing sand or during parachute jumps and similar operations.
Since goggles are generally worn over the eyes of a user, it is most important that the eyesight of the user not be impaired by the goggles being worn and if possible, be improved by the goggles covering the eyes. In cold climates and in freezing venues such as ski slopes and high altitudes an inherent problem encountering goggle wearing individuals is that of fogging.
Fogging is caused by the temperature differential created in the enclosed area formed behind the goggle lens and in front of the face of the wearer and the air exterior to the goggle. The face of the user radiates heat and tends to heat the air inside the goggle and behind the lens much like the windshield of a car tends to fog when the air inside the car is warmer than the air outside the car, thus causing fog or condensation on the window. Consequently, venting of the air inside the lens of a goggle is desirable to help overcome and prevent fogging of the lens that would inhibit the view of the wearer. Various patents have attempted to overcome the inherent tendency of goggles to fog in a cold environment.
U.S. Pat. No. 6,009,564, (Tackles) teaches a vented goggle; however, Tackles requires a plurality of tunnels or slots be formed in the mask portion of the goggle which are easily plugged by snow and especially ice if the skier falls or by dirt in a blowing sand environment. Tackles also lacks a low pressure system to pull air from the face cavity.
U.S. Pat. No. 5,652,965 (Crooks) teaches a non-fogging goggle, but Crooks also uses an elongated slot formed in the mask portion below the lens that is easily clogged and also lacks negative pressure venting.
U.S. Pat. No. 5,542,130 (Grabos) discloses a goggle with a ventilation adjustment assembly having a plurality of apertures in the lens with a shutter to close them to adjust the flow of air. Grabos lacks a focused air flow on the apertures and any negative pressure to pull air from the cavity.
U.S. Pat. No. 4,670,914 (Harris) teaches venting of a goggle like device. However, Harris lacks any positive pressure or negative pressure to aid in the flow.
U.S. Pat. No. 4,290,673 (Yamamoto) discloses ski goggles which have a heating means to heat the space between two lenses but lacks any pressurized ingress of air or low pressure evacuation of air from the internal cavity.
As such, there is a pressing need for a non-fogging goggle that will work in cold and harsh environments. Such a goggle should have air venting that is aided by focusing air moving toward the lens into the interior cavity at increased pressure. However, such a device should not be easily clogged or hard to clean. Additionally, such a goggle device should provide additional ventilation of the interior cavity by creating negative pressure at exit apertures from the interior cavity to help evacuate the air therefrom. Such a device would be further enhanced by the provision of filters to absorb moisture or regulate the amount of air moving through the device and allow for adjustment thereof.


A new Pelargonium plant named ‘PEQZ0100’ particularly distinguished by vivid bright deep rose colored inflorescences with single florets and vivid purple spots on the petals, on a vigorous, mounding plant.

The present invention comprises a new Pelargonium, botanically known as Pelargonium interspecific, and hereinafter referred to by the variety name 'PEQZ0100'.
'PEQZ0100' is a product of a planned breeding program. The new cultivar 'PEQZ0100' has vivid bright deep rose colored inflorescences with single florets and vivid purple spots on the petals, on a vigorous, mounding plant.
'PEQZ0100' originates from a hybridization in a controlled breeding program made in July 2016 in a greenhouse in Gilroy, Calif. The female parent was an unpatented plant of P. x interspecific parentage identified as '11599-1V' with larger florets, and lighter green foliage when compared to 'PEQZ0100'.
The male parent of 'PEQZ0100' was an unpatented, proprietary plant of P. x hortorum parentage, identified as 'PEIB1012-1V' with more intense colored upper petals when compared to 'PEQZ0100'. The resultant seed was sown in December 2016.
'PEQZ0100' was selected as one flowering plant within the progeny of the stated cross in May 2017 in a greenhouse in Gilroy, Calif.
The first act of asexual reproduction of 'PEQZ0100' was accomplished when vegetative stem cuttings were propagated from the initial selection in June 2017 in a greenhouse in Gilroy, Calif.


A battery pack including: a first terminal; a second terminal; a battery module coupled between the first terminal and the second terminal, the battery module having a state of charge; a sensor configured to measure a swelling of the battery module and to generate a swelling data value; and a battery management system configured to control a charging and a discharging of the battery module to reduce a swelling rate of the battery module or to correct the swelling of the battery module according to the swelling data value and the state of charge.

1. Field
One or more embodiments of the present invention relate to a battery pack.
2. Description of Related Art
In general, unlike primary batteries, secondary batteries are rechargeable. According to the types of external devices to which the secondary batteries are applied, the secondary batteries may be used as a single battery or in a battery module in which a plurality of batteries are coupled as a unit.
According to the conventional art, a lead storage battery is used as a power supply for starting up an engine. Recently, an Idle Stop & Go (ISG) system has been applied to engines to improve fuel efficiency, and the use of the ISG system is gradually increasing. A power supply that supports an ISG system, which is an idling limiting device, should maintain strong charging and discharging characteristics despite high output demands for engine start up and frequent start ups, and should have a long life span. Charging and discharging characteristics of lead storage batteries, however, deteriorate due to repeated engine stops or restarts under the ISG system, and accordingly, have a short life span.

Battery pack including a battery management system configured to control charging and discharging thereof


A method of creating an image file in an imaging device, and an imaging device are provided. The method comprises providing an image sensor comprising pixels with an infrared filter arrangement so that some of the pixels of the sensor may be exposed to all wavelengths and some of the pixels of the sensor are blocked from infrared wavelengths. The pixels of the sensor that may be exposed to all wavelengths are utilized when taking an infrared image and the pixels of the sensor that are blocked from infrared wavelengths are utilized when taking a normal image.

The popularity of photography is continuously increasing. This applies especially to digital photography as the supply of inexpensive digital cameras has improved. Also the integrated cameras in mobile phones have contributed to the increase in the popularity of photography.
Digital imaging and image manipulation have many advantages over conventional film photography. Digital images can be archived and manipulated electronically and the digital form of images offers several possibilities.
Digital imaging devices utilize an imaging sensor, which is a light sensitive device. An imaging sensor detects light and outputs an electrical current which is in proportion to the detected light. Sensors are typically based on silicon technology. A problem with imaging sensors is that it is sensitive not only to visible light but also to infrared radiation. Infrared radiation, or infrared light, is typically defines as light having a wavelength longer than 780 nm. Infrared light distorts images in daytime conditions. Color balance in color images or the balance of dark and light areas in black and white imaging distorts if infrared light reaches the imaging sensor. Thus, in daytime conditions infrared light is blocked from reaching the imaging sensor by placing an infrared blocking filter in front of the imaging sensor.
However, sometimes in dark conditions, when there is very little or no visible light, it is possible to take images by utilizing infrared light. By utilizing an external infrared light source it is possible to take images even without the subject of imaging being aware of the imaging process. This may be advantageous especially in observation cameras, which are used as burglar alarms, for example.
Thus, imaging devices should block infrared light from reaching the sensor in daytime conditions but yet enable infrared imaging in dark conditions. In prior art solutions, a removable infrared block filter or a leaky infrared filter has been used. An infrared filter may be a separate part in an objective of a camera. In dark conditions, the infrared filter may be mechanically removed in front of the objective or the sensor of the camera. This removal may be realized automatically or manually. A drawback of this solution is that it is quite expensive and the long term durability is uncertain because of the moving parts required in the solution. In some infrared filter solutions, some of the infrared light is passed to the sensor. For example, when an external infrared light source is used in dark conditions, the infrared filter is designed to pass the wavelength of the light emitted by the light source through but block all other wavelengths. This solution is a compromise in both daylight and dark conditions and the resulting images are not optimal.

Imaging device and method of creating image file


A system, and computer program product for subsidizing wireless services in geo-fenced zones are provided in the illustrative embodiments. A geo-fenced zone is configured, the geo-fenced zone comprising a boundary defined by a set of fixed points in space. A subsidized pricing is configured for the wireless service when the wireless service is consumed by a mobile device within the geo-fenced zone, forming a subsidized wireless service. The mobile device is detected in the geo-fenced zone. The mobile device is provided the subsidized wireless service. A billing entry is applied to an account associated with the mobile device, wherein the billing entry charges the account a subsidized amount corresponding to a measured amount of subsidized wireless service used by the mobile device while the mobile device remains within the geo-fenced zone.

Mobile devices such as laptop computers, tablet computers, smartphones, digital book readers, and many such devices utilize various modes of wireless communication reaching the internet. Wi-Fi network from a wireless access point, and wireless broadband such as 3G or 4G data service over a wireless service provider's network are the two most commonly used wireless methods for connecting to the internet from a mobile device.
Many places offer free Wi-Fi access to mobile devices when they are within range of a Wi-Fi access point device. For example, certain coffee shops offer free use of their Wi-Fi network to their patrons. Unintentionally, persons who are not patrons, and not even present in the place of business, can also detect the free Wi-Fi network and use the free Wi-Fi services.
Some entities that provide free Wi-Fi access also employ some method of controlling that access. For example, the coffee shop may require a password that can only be obtained on a sales receipt upon purchase of some product. As another example, some public places, such as libraries, limit the use of free Wi-Fi access to preset durations. Some other entities configure their access points to allow only a certain number of devices to connect at any given time.

Subsidizing wireless services in geo-fenced zones

INTERNATIONAL BUSINESS MACHINES CORPORATION


According to one embodiment, an acquisition unit acquires a pixel block having a predetermined size from image data to be coded. A comparison unit calculates a distance between a color of a target pixel in the pixel block and each of a plurality of typical colors, and selects a typical color of which the distance is a minimum distance from the plurality of typical colors. A decision unit assigns a first index representing the selected typical color to the target pixel if the minimum distance is smaller than a first threshold, assigns a second index representing a new typical color to the target pixel if the minimum distance is larger than the first threshold, and adds the color of the target pixel as the new typical color when the second index is assigned. A coding unit codes the selected typical color, the new typical color, the first index and the second index.

When natural image data is coded, by using JPEG for a static image, or by using MPEG for a moving image, effective data compression can be performed. On the other hand, as for CG image data such as a PC screen, in comparison with above method, by using a color palette-image coding method (each pixel is represented by a plurality of typical colors (palettes)), the data compression can be more effectively performed.
In the color palette-image coding method, following decisions are important, i.e., the target image is represented by which typical colors, and each pixel therein is represented by which typical color.
For example, by calculating a histogram of each color in an image block, conventional technique to determine a typical color of the image block based on the histogram is well known. In this technique, the histogram is calculated whenever one typical color is generated. Accordingly, great many calculation costs thereof are necessary. Furthermore, the histogram is calculated for all colors in the image block. Accordingly, in order to calculate the histogram, a memory having a very large capacity is necessary. As a result, for example, hardware-packaging of the memory (such as LSI) is difficult.

Apparatus and method for generating typical colors for image coding


Reduction of multiple access interference, in one example for asynchronous CDMA systems using long codes. In one aspect, parallel interference cancellation (PIC) implements a decoupled estimate, preferably non-linear and applied at chip intervals. According to another aspect, interference is cancelled using a technique that estimates bits for a symbol by interpolating signature waveforms for users to a common sampling lattice of the received data. According to another aspect, multi-stage, hybrid multi-stage, and reconfigurable recursive multi-stage multi-user detection architectures and corresponding processes are provided.

1. Field of the Invention:
This invention relates generally to communications, more particularly to improving communication system performance through interference cancellation, and still more particularly to improved cancellation of multiple access interference in a code division multiple access communications environment.
2. Description of the Related Art:
Code Division Multiple Access ("CDMA") provides an effective communications technique for several users to share a communications channel. Unfortunately, when the channel becomes overcrowded, the conventional CDMA receiver performs poorly and multiple access interference ("MAI") can severely degrade performance. Although the optimal maximum likelihood receiver in this case is easy to describe, it is nearly impossible to implement.
Various conventional techniques examine interference cancellation at the symbol level. Symbol-level matched filters can provide a sufficient statistic for multi-user detection ("MUD") in an additive white Gaussian noise channel. This well known result concludes that the optimal user bit estimation procedure can be written at the symbol level. Accordingly, these various conventional MUD approaches use symbol-level estimation and cancellation approaches. However, these symbol-level techniques are only approximations to the optimal estimator, and there is no guarantee that these symbol level approximations fully exploit the signal structure.
Additionally, conventional procedures can involve the following computationally expensive process for canceling interference: (1) interpolating the data for each source (base station) to the sampling lattice of the signature waveform (chip center), (2) computing the bit estimates for each user, (3) synthesizing the entire symbol's binary waveform and (4) interpolating the waveform of the whole symbol back to the sampling grid of the data to perform the cancellation.
Some sample-level approaches have been proposed. One example uses a continuous time (i.e., analog) maximum likelihood estimator ("MLE") approach, which can be used as continuous decision feedback. This MLE approach can be purposed as a single-stage analog process using filters controlled by relative user power levels. Although relatively easy to implement, these approaches are not a good theoretical match to the interference cancellation problem. To remedy such shortcomings, linear minimum mean squared error (MMSE) techniques, such as those based on standard applications of the Kalman filter and other least-squares generalizations, could be used to reduce un-cancelled interference. These techniques fully couple the users (resulting in large matrix computations) and perform interference cancellations in the innovation term in the filter. Accordingly, they remain quite computationally expensive.
The above described techniques are also considered to be single stage algorithms. Multiple stage designs have also been considered. For example, in parallel with the development of symbol-level MMSE receivers, multi-stage parallel interference-cancellation (PIC) methods have been developed. In multi-stage PIC formulations, code matched filters are applied to the difference between the receive signal and the sum of the interference signals estimated from the previous stage. These multiple stage designs remain inadequate.
Each of the conventional techniques have been found to either be too complicated to embody in practical applications, or inadequate in terms of actual MAI cancellation in actual usage. Thus, techniques for canceling MAI that can be practically implemented while still providing effective cancellation remain needed.

Sub-symbol parallel interference cancellation


A security or automation system for domestic or business premises has plural units connected into a network by a communications bus, the units including one master unit and at least one user interface unit remote from the master unit that interprets and responds to forms, containing information for display, data capture, annunciation and timeout specification, as stored in and transmitted from the master unit. The system may be expanded by one or more application units, which have their own forms that are transmitted to the user interface unit, in order to communicate with the user and using a common format specified for the system and interpreted by the user interface, in order for the application unit to display data on and capture data from the user interface so that it may enhance its own operation and that of master unit through communications provided by a communications protocol managed by the master unit. The system may be further expanded by slave units used to capture inputs from sensors and actuate outputs, and issue messages to the master unit and receive messages from the master unit.

Computer based control of such systems has long been known, and has reached a considerable level of sophistication, as exemplified by U.S. Pat. No. 5,086,385 (Launey et al). A concern with such systems is to provide a capability for exercising a range of monitoring and control functions through peripheral units of widely differing types, as well as providing for future expansion of the system to allow for additional peripherals, possibly of types not contemplated when the system was originally designed. Any attempt to provide a wholly comprehensive control program to provide for all anticipated eventualities will result in a complex program and system which is difficult to program and maintain. Even then, new types of peripherals will still require reprogramming, while if the program is simplified to provide only for installed peripherals, expansion of the system will always require a revised control program.

Control system for automated security and control systems


A resizing unit resizes a captured image or an inputted image and outputs a resized image. A first conversion unit converts the resized image into an RGB image or an image for a TV monitor. A second conversion unit converts the RGB image or the image for the TV monitor into a plurality of serial data.

1. Field of the Invention
The present invention relates to an image (or video) signal processing apparatus for image display which is suitable for an image pickup apparatus such as a digital camera or the like.
2. Related Background Art
FIG. 27 is a block diagram showing a schematic structure of a conventional image pickup apparatus. In FIG. 27, an image pickup element 1010 converts an optical image into an image signal, and an A/D (analog-to-digital) converter 1012 converts the analog output of the image pickup element 1010 into a digital signal. An image pickup signal processing circuit 1014 creates a brightness signal by performing color carrier elimination, aperture correction, a gamma process and the like to the output data of the A/D converter 1012, and simultaneously creates a color difference signal by performing color interpolation, matrix conversion, a gamma process, gain adjustment and the like to the output data of the A/D converter 1012, whereby image data of YUV format is created.
A memory I/F (interface) 1016 which includes writing and reading circuits 1016a and 1016b for a memory 1018, writes the image data from the image pickup signal processing circuit 1014 in the memory 1018, reads image data from the memory 1018, and outputs the read image data to a display system signal processing circuit 1020.
The display system signal processing circuit 1020 separates from the image data of YUV format a brightness component Y and a modified color difference component, i.e., a modified chroma component signal C, and then outputs them respectively to D/A (digital-to-analog) converters 1022Y and 1022C. The D/A converter 1022Y converts the brightness data from the display system signal processing circuit 1020 into an analog signal, and an LPF (low-pass filter) 1024Y eliminates a high-frequency noise component from the output of the D/A converter 1022Y. The output signal from the LPF 1024Y is transferred to a mixture circuit 1026 and an LCD (liquid crystal display) control circuit 1028. The D/A converter 1022C converts the modified chroma data from the display system signal processing circuit 1020 into an analog signal, and a BPF (band-pass filter) 1024C extracts only a frequency component of a modified chroma component from the output of the D/A converter 1022C. The output signal from the BPF 1024C is transferred to the mixture circuit 1026 and the LCD control circuit 1028.
The mixture circuit 1026 adds the brightness signal from the LPF 1024Y and the modified chroma signal from the BPF 1024C together to create a composite video signal. A video amplifier 1030 amplifies the composite video signal output from the mixture circuit 1026, and transfers the amplified signal to a TV monitor 1032, whereby the image obtained by the image pickup element 1010 is displayed on a screen of the TV monitor 1032.
The LCD control circuit 1028 converts the brightness signal Y from the LPF 1024Y and the modified chroma signal C from the BPF 1024C into an RGB signal composed of R (red), G (green) and B (blue) components, in accordance with a subcarrier frequency from a quartz oscillator 1034. The RGB signal is transferred to an LCD panel 1036 together with a driving pulse, whereby the image obtained by the image pickup element 1010 is displayed on a screen of the LCD panel 1036.
FIG. 28 is a block diagram showing a schematic structure of another conventional image pickup apparatus. In FIG. 28, operations of an image pickup element 1110, an A/D converter 1112, an image pickup signal processing circuit 1114, a memory I/F 1116, a writing circuit 1116a, a reading circuit 1116b and a memory 1118 are respectively the same of the operations of the image pickup element 1010, the A/D converter 1012, the image pickup signal processing circuit 1014, the memory I/F 1016, the writing circuit 1016a, the reading circuit 1016b and the memory 1018, respectively. Thus, a YUV-system image data is similarly transferred to a display-system signal processing circuit 1120.
The display-system signal processing circuit 1120 creates and outputs, from the YUV-system image data, a brightness signal Y, a composite video signal CV by adding the brightness component and a modified chroma signal C, a color difference signal U (=B−Y) by eliminating the brightness component from the B component, and a color difference signal V (=R−Y) by eliminating the brightness component from the R component.
A D/A converter 1122a converts the composite video data from the display-system signal processing circuit 1120 into an analog signal, and an LPF 1124a eliminates a high-frequency noise component from the output of the D/A converter 1122a. A video amplifier 1126 amplifies the output of the LPF 1124a and transfers the amplified signal to a TV monitor 1128.
D/A converters 1122b, 1122c and 1122d convert the brightness data Y, the color difference data U and the color difference data V from the display-system signal processing circuit 1120 into analog signals, respectively. LPF's 1124b, 1124c and 1124d eliminate high-frequency noise components from the outputs of the D/A converters 1122b, 1122c and 1122d, respectively. The outputs from the LPF's 1124b, 1124c and 1124d are transferred to an LCD control circuit 1130. It should be noted that each of the LPF's 1124c and 1124d ordinarily has a pass band of 1.5 MHz to 2.0 MHz.
The LCD control circuit 1130 creates an RGB signal from the brightness signal Y from the LPF 1124b, the color difference signal U from the LPF 1124c, and the color difference signal V from the LPF 1124d. The RGB signal is transferred to an LCD panel 1132 together with a driving pulse, whereby the image obtained by the image pickup element 1110 is displayed on a screen of the LCD panel 1132.
However, in the conventional image pickup apparatus shown in FIG. 27, since the RGB signal is created from the modified chroma signal C, the quartz oscillator 1034 generating subcarrier frequency is necessary, whereby the number of parts is increased. Further, in order to deal with plural different image signal systems, the circuit structure must be made different according to each image signal system.
As color television image signal systems, as well known, there are an NTSC (National Television System Committee) system adopted in Japan, United States and the like, and a PAL (Phase Alternation by Line color television) system adopted in European nations and the like. Since a carrier frequency of subcarrier is about 3.58 MHz in the NTSC system and about 4.43 MHz in the PAL system, the same crystal oscillator can not be used for the NTSC system and the PAL system. As a result, the circuit structure must be made different between these two image signal systems, whereby the number of parts is increased. Further, different adjustment is necessary for each of these different circuit structures, whereby production efficiency (mass productivity) decreases.
Further, in the conventional image pickup apparatus shown in FIG. 28, since the RGB signal is created from the brightness signal Y and the two color difference signals U and V, any quartz oscillator for generating subcarrier frequency is not necessary, whereby the number of parts can be decreased. Further, the structure of the LCD control circuit 1130 can be made the same irrespective of the image signal system. Therefore, this image pickup apparatus is excellent in the point of mass productivity as compared with the conventional image pickup apparatus shown in FIG. 27. Further, the image pickup apparatus shown in FIG. 28 can achieve high image quality.
However, in the conventional image pickup apparatus shown in FIG. 28, as described above, since the RGB signal is created from the brightness signal Y and the color difference signals U and V, the three D/A converters 1122b, 1122c and 1122d are necessary for the liquid crystal display operation. Further, in order to simultaneously display the image on the TV monitor and the LCD panel, the four kinds of signals CV, Y, U and V must be output in total, whereby the four D/A converters 1122a, 1122b, 1122c and 1122d are necessary in this case. When ASIC (application specific IC (integrated circuit)) is achieved with three or four D/A converters, there is a problem that the dimensions of circuits become large.
Further, if circuit miniaturization or downsizing due to the ASIC advances, since a power supply voltage of the ASIC core becomes lower, the circuit dimensions of the D/A converter to which a predetermined-level analog output is always necessary become relatively large. Thus, it is actually difficult to achieve ASIC's with many D/A converters.