The present invention relates to a dispersant having a tertiary or quaternary amine anchoring group and a solubilizing polymer selected from C8-50 fatty acid; a C8-50 ak(en)yl substituted succinic acid, anhydride or partial ester; a dimer or trimer fatty acid; and/or polymers from repeating units of polyesters, polyethers, polyacrylate, polyamides, polyurethanes or mixtures of said repeating units in a random or blocky copolymer. The dispersants are an improvement in that the alkylene connecting group between the tertiary or quaternized amine and the solubilizing polymer lacks abstractable hydrogen atoms at the geminal carbon atom from the nitrogen of the tertiary or quaternized amine over the prior art. The dispersants are useful as dispersants with improved thermal stability and low amounts yellow color after aging at elevated temperatures.

Many formulations such as inks, paints, mill-bases and plastics materials require effective dispersants for uniformly distributing a particulate solid in a non-polar organic medium.
Numerous publications disclose dispersants that comprise tertiary amine groups or quaternized amine groups. However, these amine groups historically are known to be subject to degradation reactions at elevated temperatures that reduce the effectiveness of the dispersant and/or generate yellow degradation products. US 2014/0114019 discloses dispersants from polyesters containing tertiary amines which are quaternized with a hydrocarbyl epoxide in combination with an acid.

Polymeric dispersants containing one or two quaternary amine anchoring groups with improved chemical and thermal stability


The present application discloses a display panel and a display apparatus. The display panel includes a first substrate including a first buckle portion, and a second substrate arranged opposite to the first substrate, where a second buckle portion matched with the first buckle portion in a buckle manner is disposed on the second substrate.

The descriptions herein provide only background information related to the present application, and do not necessarily constitute the prior art.
Display apparatuses have numerous advantages, such as a thin body, power saving, no radiation, and are widely used. Most display apparatuses in the market are backlit display apparatuses, each including a display panel and a backlight module. Working principle of the display panel is that liquid crystals are put in two parallel substrates, and a driving voltage is applied to the two substrates to control a rotational direction of the liquid crystals, to refract light rays of the backlight module to generate a picture.
Thin film transistor liquid crystal display apparatuses (TFT-LCD) currently maintain a leading status in the display field because of low power consumption, excellent picture quality, high production yield, and other properties. Similarly the TFT-LCD apparatus includes a display panel and a backlight module. The display panel includes a color filter substrate (CF substrate), a thin film transistor substrate (TFT substrate) and transparent electrodes on relative inner sides of the above substrates. A layer of liquid crystals (LC) is positioned between two substrates. The display panel changes a polarized state of light by controlling the direction of the LCs through an electric field, for penetration and obstruction of a light path via a polarized plate to display.
The CF substrate and the TFT substrate may have position deviation before a sealant is cured, causing light leakage or scrapping and other bad conditions of the panel after assembling via an assembly machine in a panel manufacturing process.

CHONGQING HKC OPTOELECTRONICS TECHNOLOGY CO., LTD.


According to one embodiment, a measuring apparatus includes a first calculation unit and a second calculation unit. The first calculation unit calculates, as a communication delay for each request packet, a half of a round trip time based on first time information included in the request packet and second time information included in a response packet, the request packet requesting a notification of a reference time, the response packet being a response to the request packet. The second calculation unit calculates one of one or more communication delays not more than a threshold among a plurality of communication delays as an estimated delay of each response packet to be transmitted from the one or more second devices.

At an electric power substation, for example, there is a technique for detecting malfunctions by comparing an electrical current value and a voltage value transmitted alternately from a protection relay. To perform the comparison accurately, accurate time synchronization is required.
As a conventional time synchronization technique, there is a time synchronization technique wherein an existing communication delay and an immediately previous communication delay are compared, and if an immediately previous inter-network communication delay is small, time synchronization is performed using time information when a communication delay is small.


The present invention provides flexible and efficient memory configuration that is capable of economically addressing both resource consumption and ECC concerns. A memory system facilitates transparent ECC operations without dedicated ECC connections. A first dynamic random access memory structure stores data, wherein the data connections to the memory system are limited to the width of the first dynamic random access memory structure. A second dynamic random access memory structure dedicated to storing error correction code information, wherein the error correction code information is accessed via the data connections. In one exemplary implementation, the first memory structure and the second memory structure the data and ECC are included in the same memory bank. In an alternate implementation, the first memory structure and the second memory structure the data and ECC are included in the different memory banks and are accessed in parallel.

Electronic systems and circuits have made a significant contribution towards the advancement of modern society and are utilized in a number of applications to achieve advantageous results. Numerous electronic technologies such as digital computers, calculators, audio devices, video equipment, and telephone systems have facilitated increased productivity and reduced costs in analyzing and communicating data, ideas and trends in most areas of business, science, education and entertainment. Frequently, these advantageous results are realized through the use of information stored on a memory media and manipulated by a processing device. The accuracy of the information stored in the memory often has a significant impact on the usefulness of the results. Providing greater accuracy typically requires memory components capable of supporting error correction activities. Traditional approaches to error correction usually require components to include additional dedicated connections or pins for error correcting information. These additional connection pins consume resources and increase the difficulty of manufacturing a memory component or chipset.
The information stored in a memory usually includes software programs comprising a series of instructions for manipulating data in the performance of useful tasks associated with a particular application. Generally, a certain level of accuracy in the information is required for the application to perform properly. The information is usually represented by bits comprising logical values (e.g., a string of ones and zeroes) stored in a memory. However, there is a possibility that the bit values are altered when the information is stored in memory. It is relatively common for at least some logical one values to be erroneous stored as a logical zero or vise versa. The impact that these erroneous inversions have typically depends upon the application which the information is utilized with.
Some applications do not require significant memory accuracy. For example, erroneous bits do not generally have a significant impact on graphics applications. Most graphics systems are directed to providing a visual display on a monitor. The visual display typically includes a very large number of pixels and a slight variation in a few of the pixels due to erroneous bits is not typically detected by the naked eye. Thus, the possibility that some of the pixel information may get distorted in memory does not have a perceptible impact on the final performance of the system.
Other applications however, often require a relatively high degree of information and memory reliability. If the data is sensitive, valuable, or utilized in a critical activity, a high degree of memory reliability is usually required. For example, applications that can impact public safety (e.g., applications used to design bridges, cars, planes, etc.) or are related to financial activities (e.g. banking, stock trading, etc.) usually require a high level of reliability. It is desirable to ensure that there is no erroneous changes in the information associated with these applications. Thus, the ability to detect erroneous information is very important in some applications.
Providing features that improve information reliability usually results in more resources being consumed when a memory component and/or chipset is manufactured. Providing connection pins dedicated for data communication and separate pins dedicated to communicating error correction information associated with the data increases the complexity of manufacturing operations. More complicated error correction schemes usually require a large number of dedicated pins to accommodate communication of the information. Although it is important to provide error correction capabilities, providing dedicated input and output (IO) pins for error correction code (ECC) operations takes up precious connections and expends valuable placement resources. Thus, a designer often has to expend significant chip resources for error correction operations or leave out the advantageous features.
Deciding whether to invest the additional resources for an error capable system or to opt for a normal memory system is usually very hard. It is difficult to predict the applications that will be utilized on a particular system with a great degree of certainty. Thus, for systems that typically do not engage in activities involving sensitive information, expensive connections dedicated for error correction operations are rarely utilized. However, if a user opts for a traditional memory that does not have dedicated error correction capabilities then they run the risk of unreliable memory storage when they do engage in sensitive activities. The dilemma of whether to provide an error correcting memory or a more economical memory increases fabrication problems for manufacturers also. As a practical matter, manufactures usually expend resources designing and manufacturing both types of memories and/or chipsets to respond to the respective conflicting market demands. Providing separate designs and manufacturing facilities is very expensive.
What is required is a flexible and efficient memory capable of addressing both pin resource consumption and error correction concerns.

Transparent error correction code memory system and method


In certain examples an integrated circuit protection circuit can include a circuit module, and an isolation device. The isolation device can be configured to couple a ground node of the circuit module to a power ground in an on state, and to isolate the ground node of the circuit module from the power ground in an off state, wherein the isolation module is configured to enter the off state when the IC receives a negative input voltage.

With the rapid development of the electronics, more and more integrated circuits (ICs) are applied to a variety of communication and electronic devices. The ICs integrate active components such as transistors, diodes etc. and passive components such as resistors, capacitors etc. on a wafer through certain circuit interconnections. IC wafers can use a P-type doping substrate (P-sub), which is generally connected to a power ground (grounded) by default.
When an input voltage of the IC is a negative voltage, −6 volts (V) for example, a P-sub in a wafer of the IC can be grounded and the voltage coupled to a N-well can the input voltage, a forward bias voltage of 6V, for example, can occur at a PN junction in the IC, e.g., between the P-sub and the Nwell, leading to a large current passing through the PN junction and possibly damaging or burning out the IC.

Method and apparatus for integrated circuit protection


A method of forming an apparatus having a captured washer includes the step of forming a shaft with a first end, a second end, a shaft diameter, and an axis. A stop element is provided on the shaft. An integral washer is formed on the shaft spaced from the stop element. The washer has a thickness and a diameter greater than the shaft diameter. The washer extends generally perpendicular to and radially outward from the shaft. The washer has a first surface facing the stop element and opposite surface facing opposite the first surface. A button is formed on and extends axially from the washer opposite. The button has a diameter greater than the shaft diameter and less than the washer diameter. A groove is formed into the first surface of the washer and defines a washer opening having an inside diameter less than the button diameter. The groove is formed so that the washer remains attached to the button by a material bridge extending between the button and. The washer is then separated from the button at the material bridge and retained on the shaft of the apparatus by the diameter difference between the button diameter and the diameter of the washer opening and by the stop element.

This invention relates generally to fasteners and other devices utilizing washers, and more particularly to such a device having a captured washer thereon and a method of producing such a device.
It is known to produce devices such as fasteners which include a washer captured on the device so that it may not be easily removed. One example of such a device includes a captive nut and washer assembly disclosed in U.S. Pat. No. 4,654,913 issued to Grube. A method of forming this device includes forming the nut and washer as a single blank. A frusto-conical groove is formed at an oblique angle to the axis of symmetry defining a separation between the nut and washer. An axial compression force is applied separating the washer from the nut along a frusto-conical fracture defined between the bottom of the groove and a concave or angled inner diameter of the washer. The orientation of the fractured surface causes the washer to be captured on the nut.
Another example is disclosed in U.S. Pat. No. 4,157,725 issued to Stanaitis. This type of fastener includes a hex head and an elongate shaft having a smooth outer surface. A washer is preassembled onto the smooth shaft after which threads are roll formed into the smooth surface. The formation of the threads increases the diameter of the shaft to the major diameter of the threads to capture the washer on the fastener.
A further example is disclosed in U.S. Pat. No. 5,308,285 issued to Malen. In this type of fastener, the shaft of the fastener includes a raised portion having an outer diameter which is slightly greater than an inside diameter of an opening of a washer. The washer is forced over the raised portion wherein it elastically deforms. Once thc washer passes over the raised portion, its inside diameter returns to a diameter slightly smaller than the raised portion to capture the washer on the shaft of the fastener.
One problem with the fastener of the Grube reference is that the fractured surface is formed on an angle. In order to prevent the washer from being removed from the nut over the frusto-conical surface of the fracture, the length of the fracture must be significantly large. If this is not so, the washer may be forced over the frusto-conical surface with relative ease. The large or longer the surface fracture, the more difficult it will be to break the washer from the nut which also may result in an improper fracture.
One problem with the Stanaitis fastener is that it requires additional steps in forming the fastener. The washer and the bolt are formed separately and then assembled to one another prior to the additional steps of forming the threads on the fastener. Additionally, the washer of this type of fastener may sometimes be removed from the fastener simply by rotating it in order to utilize the threads to drive the washer toward the free end of the fastener. One other problem with this type of fastener is that again, the difference in the inside diameter of the washer opening and the outside diameter of the threads is relatively small which may permit the washer to be forced from the fastener over the threads.
One problem with the Malen et al. fastener is that since the washer is elastically forced over the raised bump in order to place the washer on the fastener, it may be forced back over the raised bump and removed from the fastener at least as easily. Additionally, with this type of fastener the washer and the fastener are formed separately as with the Stanaitis type fastener.

Method of forming a device having a captured washer


A specification of an operation to perform one or more element-wise sums of specified portions of a matrix is received. The specification of the operation is analyzed to select a type of processing load partitioning to be applied. Based on the selected type of processing load partitioning to be applied, processing required to perform the operation is partitioned across a plurality of physical processing elements in parallel. The partitioned processing is distributed to the physical hardware processing elements to perform in parallel the element-wise sums of the specified portions of the matrix.

Matrix operations are central components in many numerical algorithms used in scientific and engineering computations. For example, summing elements along one or more dimensions in a matrix is an important part of artificial intelligence computations, such as inference. Matrix operations are often computationally intensive, requiring significant computer memory, processor, and data transfer resources. Many operations are associated with heavy compute and data movement components. There exists a need for hardware and techniques to reduce the computational burden of matrix operations.

Distributed physical processing of matrix sum operation


An image forming apparatus capable of effectively cooling down a recording medium heated by a toner fixing unit includes a cooling mechanism having a duct, a radiating fin, and a heat pipe. The duct includes two air flow structures, each including an air inlet, an air supply path, an air exhaust path, and an air outlet. The radiating fin is arranged between the air supply path and the air exhaust path of each air flow structure. The radiating fin has a plurality of fins each radially extending in parallel to a flow of air in the duct. The heat pipe has one side connected to the radiating fin and another side arranged in a vicinity to an exit of a toner fixing mechanism. The heat pile rotates to draw heat from the heated recording sheet having a fixed toner image.

1. Field of the Invention
The present invention relates to an image forming apparatus, and more particularly to an image forming apparatus capable of effectively cooling down a recording medium after a fixing process with heat and pressure.
2. Discussion of the Background Art
In general, an electrophotographic method is widly used in an image forming apparatus such as a copying machine, a facsimile machine, a printer, a multi-function machine, and the like. The electrophotographic method employs a series of processes such as charging, exposing, developing, transferring, fixing, and so on, to finally produce an image on a recording medium (e.g., a recording sheet). The discussion here focuses on the fixing process that follows the transferring process. In the transferring process, a recording medium receives a toner image from a photosensitive member generally by an electrostatic force. The toner image transferred onto the recording medium is unfixed but is held on the surface of the recording medium by the electrostatic force. Such a recording medium carrying an unfixed toner image thereon is then subjected to the fixing process. The fixing process typically apply heat and pressure to melt the toner and to press the melted toner onto the recording medium.
As such, the recording medium usually has a relatively high temperature after the fixing process. This phenomenon becomes evident, particularly when image are reproduced at a relatively high speed. Therefore, a high-speed image forming apparatus has been facing a problem called a blocking. This problem occurs on recording sheets having a relatively high temperature after the fixing process. More specifically, the toner image carried on the recording medium may partly be still melted and therefore fixed to another sheet. That is, the recording sheets are adhered to each other.
Several attempts to address this problem may be referred to Japanese Utility Patent No. 2542935 and Japanese Unexamined Patent Application Publication No. JP2003-241623, for example. These references describe a cooling system which uses a heat pipe for drawing heat from the heated recording medium, and a radiating fin connected to the heat pipe and radiating heat transmitted from the heat pipe. The radiating fin is encased in a duct which has an air inlet for taking in a fresh air and an air outlet for ejecting a heated air.
In this cooling system using the heat pipe and the radiating fin, in particular, a forced air cooling to cool off the radiating fin has the largest terminal resistance among other components. Accordingly, efficiently cooling the radiating fin is needed to improve a total cooling efficiency of the cooling system. Although using a cooling fan of a higher rating may be an instant solution, it may lead to an environmental problem such as an increase of a manufacturing cost and a noise.
In a conventional background image forming apparatus, a radiating fin having a plurality of disc-like-shaped fins is encased in a cooling duct and is connected to a heat pipe which rotates together with the radiating fin when drawing heat from a recording sheet. The heat of the recording sheet is transmitted through the heat pipe to the plurality of fins of the radiating fin. In the cooling duct, air is blown to the plurality of fins of the radiating fin so as to cool down the fins.
FIG. 1 illustrates a typical air flow in a cooling duct encasing a radiating fin 1. As illustrated in FIG. 1, the air flow is divided into two air streams when impinging on the radiating fin 1 in the cooling duct. One air stream clearly appears to enter into gaps between fins of the radiating fin 1. In this part of the radiating fin 1, the air stream flows in a direction substantially same as a rotation direction of the radiating fin 1. However, the other air stream appears to flow away from the radiating fin 1. In this part of the radiating fin 1, the air stream flows in a direction substantially opposite to a rotation direction of the radiating fin 1. That is, it is experimentally understood that the forced air cooling does not use almost a half of the air flow.
In addition, FIG. 2 illustrates a profile of an air flow speed generated by a cooling fan 2. As illustrated in FIG. 2, the air flow speed is not flat, that is, two peaks on edges sandwiches a flat hollow. Specifically, the air flow speed has a peak on a circumferential region of the cooling fan, and stays a relatively low level in an inner radius region. When such an air flow having an uneven speed impinges on the radiating fin, a middle part of the radiating fin may not efficiently be cooled down.

Image forming apparatus capable of effectively cooling down a recording medium after a fixing process with heat


An electrostatic discharge (ESD) protection structure and a method for forming the same are provided. The structure includes a substrate having a buried layer, and a first and a second high-voltage well region on the buried layer. The first and second high-voltage well regions have opposite conductivity types and physically contact each other. The structure further includes a field region extending from the first high-voltage well region into the second high-voltage well region, a first doped region in the first high-voltage well region and physically contacting the field region, and a second doped region in the second high-voltage well region and physically contacting the field region. The first and second doped regions and the first high-voltage well region form a bipolar transistor that can protect an integrated circuit from ESD.

It is well known that extremely high voltages can develop in the vicinity of an integrated circuit due to the build-up of static charge. A high potential may be generated to an input or output buffer of an integrated circuit, which may be caused by a person simply touching a package pin. When the electrostatic energy is discharged, a high current is produced through devices of the integrated circuit. Electrostatic discharge (ESD) is a serious problem for semiconductor devices, since it has the potential to destroy the device and the entire integrated circuit.
ESD protection devices are generally integrated into integrated circuits. An ESD protection device can provide a current path so that when an ESD transient occurs, the ESD current is conducted through the ESD protection device without going through the devices to be protected. High-voltage N-type metal-oxide-semiconductor (HVNMOS) devices are conventionally used as ESD protection devices, particularly for protecting high voltage semiconductor devices. FIG. 1 illustrates a conventional HVNMOS 2 that is used for ESD protection. The HVNMOS 2 includes a gate electrode 10, a gate dielectric 12, a drain region 4 in a high voltage N-well (HVNW) 16, and a source region 6 in a high voltage P-well (HVPW) 14. A shallow trench isolation (STI) region 8 isolates the drain region 4 and the gate electrode 10 so that high drain-gate voltage can be applied.
When used for ESD protection, the source region 6 is typically coupled to a power supply VSS, which is typically grounded, and the drain region 4 is coupled to an integrated circuit to be protected. If an electrostatic transient occurs and a reference voltage Vref at the drain region 4 increases, the HVNMOS 2 is turned on and the ESD current flows from the drain region 4 to the source region 6, so that the integrated circuit coupled to the drain region 4 is protected.
The ESD protection device formed by a HVNMOS 2 suffers drawbacks, however. The gate dielectric 12 traps charges when ESD occurs. Since HVNMOS transistors are commonly used under high operational voltage, the resulting high electric field leads to the incurrence of hot electrons around the junction of the channel and drain region. These hot electrons affect covalent electrons around the drain region by producing electron-hole pairs through the lifting of the electrons around the drain to conductive bands. When electrons travel between drain region 4 and source region 6, a small portion of the electrons are injected into and become trapped in the gate dielectric 12. Trapped charges cause the gate dielectric 12 to degrade. As a result, the HVNMOS's leakage current increases and breakdown voltage decreases. The HVNMOS may eventually fail when the maximum voltage it can sustain is lower than the electrostatic voltages.

Taiwan Semiconductor Manufacturing Company, Ltd.


A mounting mechanism is provided for retaining a slide rail to a chassis with an anchor member extending from a side thereof. The rail includes a mounting slot defined therein for receiving the anchor member of the slide rail. The mounting mechanism includes a resilient retaining member secured to the slide rail and a releasing member pivotably engaged with the retaining member. The retaining member includes a protrusion formed thereon capable of retaining the anchor member in the mounting slot of the slide rail. The releasing member is capable of being pivoted to urge the retaining member to disengage the protrusion thereof from the anchor member.

1. Field of the Invention
The present invention relates to mounting mechanisms, and more particularly to a mounting mechanism for mounting a slide rail to a chassis.
2. Description of Related Art
A typical slide rail assembly for a server chassis and a rack includes an outer slide rail mounted to the rack, an inner slide rail mounted to the chassis, and an intermediate slide rail mounted between the outer and inner slide rails. The intermediate slide rail is extendable relative to the outer slide rail, and the inner slide rail is extendable relative to the intermediate slide rail, thus the chassis can be extended a distance out from the rack. Conventionally, the inner rail is secured to a side of the chassis with a plurality of screws. Therefore, a tool such as a screwdriver is needed for installing and detaching the slide rail, and the processes are tedious and time consuming.

Mounting mechanism for retaining a slide rail to a chassis

Hong Fu Jin Precision Industry (ShenZhen) Co., Ltd.


The present invention provides systems, methods, and devices related to target tracking by UAVs. The UAV may be configured to receive target information from a control terminal related to a target to be tracked by an imaging device coupled to the UAV. The target information may be used by the UAV to automatically track the target so as to maintain predetermined position and/or size of the target within one or more images captured by the imaging device. The control terminal may be configured to display images from the imaging device as well as allowing user input related to the target information.

Aerial vehicles such as unmanned aerial vehicles (UAVs) can be used for performing surveillance, reconnaissance, and exploration tasks for military and civilian applications. Such aerial vehicles may carry a payload configured to perform a specific function such as capturing images of surrounding environment.
In some instances, it may be desirable for aerial vehicles to track a specific target. For small-sized aerial vehicles, such tracking is traditionally achieved via control commands from a user-operated remote control terminal or device. Such manual tracking control may become difficult in certain circumstances, such as when the movable object or target is moving quickly or when the movable object is at least partially blocked from view of the user. Furthermore, the attention necessary for such manual tracking typically requires a dedicated user that controls a camera that onboard the aerial vehicle separate from a user that controls the navigation of the aerial vehicle, thereby increasing the cost for aerial photography and other applications of the aerial vehicles.


One embodiment is a computer-implemented method for safe conditional operation when storage access cannot be proven safe. The method includes receiving a portion of source code for a transaction by an enhanced compiler and. The portion of source code received is analyzed, by the enhanced compiler, to determine whether the portion of source code is a candidate for transformation. Responsive to a determination that the portion of source code analyzed by the enhanced compiler is a candidate for transformation, the portion of the source code analyzed is transformed, by a computer processor, to use a conditional operation in a first portion of the transformed code. The conditional operation uses hardware transaction memory to invoke retry operations within hardware. A branch is added, directed to an original code portion, in a second portion of transformed code, where the branch is a recovery portion containing the original code portion.

This disclosure relates generally to conditional-load and conditional-store operations in a data processing system and, more specifically, to performing safe conditional-load and conditional-store operations in conditions when storage access cannot be proven safe in the data processing system.
Conditional operations in the form of LOAD_ON_COND and STORE_ON_COND operations typically provide a significant performance advantage for data-driven branches that are difficult for branch predictors of program code compilers to predict reliably. In some instances, LOAD_ON_COND and STORE_ON_COND operations can provide fairly dramatic improvements to the performance of a program because penalties□associated with mispredicted branches are removed.
For example, using the following code snippet representative of a common code pattern for a LOAD_ON_COND operation of:
x = 0;if (a > 10)## data-driven and poorlypredicted{x = *ptr;}a typical implementation of the code snippet is:
LOAD_IMMRx, 0## x=0COMPARERa, 10## Cond <= (Ra > 10)BRANCHGT, Label## Branch is poorlypredictedLOADRx, 0(Rptr)## Load *ptr into XLabel:The typical implementation can be further transformed into a reduced form of:
LOAD_IMMRx, 0## x=0COMPARERa, 10;□##□LOAD_ON_CONDRx, GT, 0(Rptr)## Load *ptr into X if Ra>10The transformation thereby avoids the branch prediction through predication of the assignment of *ptr to x.
There is however an important limitation to the use of the transformation. The LOAD_ON_COND can only be used safely in situations in which the source of the load is proven to not cause an access violation independently of an outcome of the conditional operation. Implementations of LOAD_ON_COND typically perform the load operation implicitly independent of the respective condition and, accordingly, cause an access violation even when the respective condition for the load is false. For example, in the following implementation:
LOAD_IMMRt, 1COMPARERptr, NULL ## sets condition code□LOAD_ON_CONDRt, NE, 0(Rptr)## Loads value at storagelocation 0(Rptr) into Rtcondition code NEan access violation will occur on systems where page 0 is not readable when Rptr is NULL.
For a Load-on-Condition transformation to work correctly, a compiler must therefore have sufficient contextual information about *ptr to prove that the source of the load will not cause an illegal access exception independently of whether the respective condition for the load is true or false.
In a similar manner a Store-on-Condition can only be used safely in situations in which a location into which a storing operation is performed does not cause an access violation. For example, using the following implementation:
MOVE0(array),H'0'COMPARERa, 10STORE_ON_CONDRx, GT, 0(array)When the address of the array variable is invalid, an access violation will occur on systems using the example implementation.
Some previous attempted solutions use hardware transaction memory, as a mechanism to detect bad access to the physical memory. In another example of previous attempted solutions, a technique in which speculative elimination of null checks in regions is used. However, the technique is only useful in the presence of a virtual memory subsystem, such as used in an implementation of a Java virtual machine to detect null references. In another previous attempted solution, new hardware logic is utilized to improve branch prediction.

Safe conditional-load and conditional-store operations

International Business Machines Corporation


The invention relates to an electronic board (1) comprising: —a printed circuit (2) having a connection face (3) defining a plane (X, Y) comprising at least one transfer area (4), —an electronic component (5) comprising at least one contact terminal (6), each contact terminal (6) being brazed or sintered on an associated transfer area (4) by means of a brazing joint or of a sintering joint (7), the electronic board being characterised in that an orthogonal projection of the contact terminal (6) of the electronic component (5) on the connection face (3) of the printed circuit does not overlap the associated area (4).

In a manner known per se, an electronic board can comprise surface-mount components (SMC), i.e. electronic components soldered directly to the surface of the printed circuit of an electronic board.
Customarily, SMC are surface mounted either by reflow soldering, or by wave soldering, or by the use of a conductive adhesive, or by sintering.
In the case of reflow soldering, the bare printed circuit is first screen printed by covering the conductive layers of the printed circuit (generally made of copper) with a solder paste using a screen (or stencil) so that only the locations intended to receive the terminals of the components are covered by the solder paste. The solder paste comprises, in a manner known per se, a metal alloy in suspension in a soldering flux. Then the terminals of the (SMC) components are laid on the solder paste before undergoing a thermal reflow treatment, during which the heat melts the alloy and evaporates the soldering flux so as to form solder joints from the metal alloy present in the solder paste.
In the case of assembly by silver sintering, the bare printed circuit is also screen printed by covering the conductive layers of the printed circuit with a paste by means of a screen (or stencil) so that only the locations intended to receive the terminals of the components are covered by the paste. The paste comprises, in a manner known per se, particles of silver and organic elements serving as binders, dispersers and diluents. Then the terminals of the (SMC) components are positioned on the paste before undergoing a thermal sintering treatment, during which the heat welds the grains together without leading them to melting, thus producing the joint.
The joints thus obtained (whether by soldering or by sintering) are however subjected to significant stresses. In particular, the portion of the joints which is positioned between the component and the solder pad is very thin, as can be seen in FIG. 1. The joints are therefore subjected to very strong stresses, particularly in shear, and therefore risk cracking rapidly when the electronic board undergoes extreme environments of temperature and/or vibration. This therefore reduces sharply the lifetime of the electronic board.
Moreover, in use, the electronic boards can be subjected to extreme temperature environments creating relative displacements (in the plane of the surface) between the SMCs and the printed circuit. These relative displacements are generally due to a differential expansion between the SMCs and the printed circuit, resulting from a variation of temperature, the SMCs and the printed circuit generally having different thermal expansion coefficients in the plane. Yet these relative displacements have the effect of generating stresses which damage the solder joints, thus limiting their lifetime and their reliability.
In order to reduce these stresses, it has been proposed to increase the vertical height (usually designated by the term "standoff") between the upper face of the solder pad (which can be of copper, of copper covered with nickel-gold or of any other suitable material) and the lower point of the conductive terminals of the SMCs once soldered, in order to increase the height of the alloy at the interface between the SMCs and the solder pads. The solder joints thus obtained are then more flexible and therefore more robust.
However, the aeronautics and space industry keeps constantly searching for improvements in electronic boards, and therefore is still searching for inventions to improve the reliability and the lifetime of SMC solder joints.

Removal of high stress zones in electronic assemblies


In an ESD protection structure, dual direction ESD protection is provided by forming an n-well isolation ring around an NMOS device so that the p-well in which the NMOS drain is formed is isolated from the underlying p-substrate by the n-well isolation ring. By forming the n-well isolation ring the p-n-p-n structure of an embedded SCR for reverse ESD protection is provided. The width of the n-well isolation ring and its spacing from the NMOS drain are adjusted to provide the desired SCR parameters.

A number of analog applications, such as display column drivers, level shifters and circuits used in the automotive industry require dual direction voltage tolerance. ESD clamps such as snapback NMOS devices and SCRs work well in providing forward ESD protection but do not provide a current path when reverse biased. The present invention seeks to provide a structure that will provide a current path both when the device is forward biased as well as when it is reverse biased.

Dual direction ESD clamp based on snapback NMOS cell with embedded SCR


Event data for an application execution is accessed from a table of logged events, the event data comprising a sequence, a hierarchy, and a start time and duration for each event. Dependency data for each event is also accessed to determine whether the start time for an event is dependent on the prior completion of at least one other event. A waterfall representation is then generated, the representation including an entry for each event in the sequence, with a start time and duration represented for each event. Based on the dependencies and hierarchy, it is determined, for each event with a start time that is later than the start time of an event which precedes it in the sequence, whether the event's start time is dependent on the prior completion of at least one preceding event. The start time for each event may then be advanced based on the determination.

Many applications include instrumentation, which refers to an ability to: monitor or measure the application's level of performance, diagnose errors or record information regarding the execution of the application. The instrumentation can consist of application code for monitoring specific components in a system, for example, the code may output logged measurements associated with the performance of a system component to a log repository. An event log is a file (e.g., a table) with entries for events taking place in the execution of an application, such as transactions between a server and users of the application. The entry for each of the transactions (or other application activities) logged in the file is referred to as an "event". An event log can include sequential entries for successive application activities as a series of nested events to indicate a hierarchy of events (e.g., an application activity that invokes another activity), with each entry describing a type, content, start time, end time, or other attribute of the application activities.
Event logs are important for understanding the activities of complex systems. However in complex client-server systems the number of transactions can be very large and it may be difficult to analyze the large volume of data in an event log for an execution of an application of such a system. For example, parallel processing of client-server transactions is often desired, however a failure to process application transactions in parallel (e.g., due to application misconfiguration or faulty application logic) can be difficult to detect from a simple examination of an event log for an execution of the application.

Optimization of parallel processing using waterfall representations


Methods and systems for optimizing performance of a machine vision system are disclosed herein. An example method includes obtaining one or more first and second images of a target object, where each of the one or more first and second images include a pass indication and a fail indication, respectively. The example method further includes conducting, by a feasibility setup tool, a feasibility setup analysis by (i) performing machine vision techniques on each of the one or more first and second images and (ii) generating a respective updated result indication for each of the one or more first and second images. The example method further includes comparing the respective updated result indication to the respective pass indications and fail indications for the one or more first and second images, respectively; and based on the comparing, generating one or more suggestions to optimize the performance of the machine vision system.

Ever since the introduction of machine vision systems to industrial settings, developers have been attempting to reduce their corresponding cost requirements. These systems are capable of executing machine vision jobs to provide high fidelity image analysis at a cost of capturing images under finely tuned imaging settings (e.g., exposure length, imaging system orientation/positioning). Typically, a technician may spend hours or more tuning these imaging settings, and may never reach an adequate configuration. For example, an operator may include multiple machine vision tools in each machine vision job, and an operator may be unable to determine specific imaging setting adjustments for each machine vision tool. When a machine vision job fails to sufficiently perform the high fidelity image analysis, a user/operator may place the machine vision system into a bypass mode or the entire line (e.g., a production line) may be stopped so the technician can attempt to manually diagnose (e.g., troubleshoot) the problem.
Unfortunately, stopping the entire line for any amount of time or placing the machine vision system into bypass mode can create a myriad of problems. For example, stopping the entire line, such as an industrial manufacturing or shipping line, normally results in massive economic losses and can take hours/days to start again. Moreover, placing the machine vision system into bypass mode allows parts to pass the system without being inspected. As a result, bypass mode allows low quality or otherwise bad parts to make it out of the production facility.
Thus, there is a need for systems and methods to optimize the performance of a machine vision system that allow for proactive, real-time system adjustments to the machine vision system.

Systems and methods to optimize performance of a machine vision system


Presented herein are system(s) and method(s) for frequency domain audio speed up or slow down, while maintaining pitch. An encoded audio signal is received. Frames from the encoded audio signal are retrieved. The frames of the audio signal are transformed into a frequency domain, wherein each of said frames are associated with a plurality of initial phases, and a corresponding plurality of ending phases. The initial phases of at least one of the frames are replaced with the ending phases of another frame.

In many audio applications, an audio signal may be modified or processed to achieve a desired characteristic or quality. One of the characteristics of an audio signal that is frequently processed or modified is the speed of the signal. When sounds are recorded, they are often recorded at the normal speed and frequency at which the source plays or produces the signal. When the speed of the signal is modified, however, the frequency often changes, which may be noticed in a changed pitch. For example, if the voice of a woman is recorded at a normal level then played back at a slower rate, the woman's voice will resemble that of a man, or a voice at a lower frequency. Similarly, if the voice of a man is recorded at a normal level then played back at a faster rate, the man's voice will resemble that of a woman, or a voice at a higher frequency.
Some applications may require that an audio signal be played at a slower rate, while maintaining the same frequency, i.e. keeping the pitch of the sound at the same level as when played back at the normal speed.
Further limitations and disadvantages of conventional and traditional approaches will become apparent to one of ordinary skill in the art through comparison of such systems with the present invention as set forth in the remainder of the present application with reference to the drawings.

This patent is subject to a terminal disclaimer.

System and method for frequency domain audio speed up or slow down, while maintaining pitch


An apparatus for road vehicles includes a sealed housing (07) which mounts the shafts (11 & 12) in bearings (10). Closed chain or belt loops (13) are driven by sprockets or pulleys (29) which are supported on the shafts (11 & 12) by one direction clutch bearings (09) such that the shafts (11 & 12) can only transmit power in a single direction (15). A multiple array of active elements (14) are activated by the vehicle wheels and have suitable means or geometry such that they transmit force to cause displacement of the chains or belts (13) and drive a generator (06) when activated but slip in the opposite return direction independently and without further effect to the chains or belts (13). A gearbox (28) may be used to change the shafts orientations. A multiple of chain or belt loops (13) are mounted to the shafts (11 & 12) at a suitable spacing in a direction perpendicular to the vehicle travel direction (04). The active elements (14) have means to bias them to return to their non-activated position after activation. The active elements (14) may operate further active elements having a means of one direction transmission of force to cause the chains or belts (13) to displace.

Currently there are numerous pieces of apparatus which capture energy from natural sources, such as sunlight, wind, rain, tides and waves and geothermal heat. These can be summarised into the mainstream forms of renewable energy as below:—
Wind power, Hydropower, Solar power, Biomass, Bio fuel, Geothermal.
When vehicles, each with different weights, travel along a road surface, then the road surface must support the weight of the vehicle and therefore, potential energy is present because the road surface is preventing the vehicle moving under gravity in a vertical direction. This potential energy can be captured and converted into electrical energy. It would be beneficial to capture as much potential energy as possible, at any particular location, which may be desired, where road vehicles may drive frequently, and in large volumes. It would also be beneficial if the road vehicles driving path on the road surface, were not influenced by the means of capturing the energy.


A method of tracking a pilot channel to discipline an oscillator includes: downconverting the RF signal to a low frequency that is of the order of, but greater than the chip rate; converting the signal into digital format; computing complex correlations between the received digital signal and local replicas of the PN codes; and establishing from the correlation values what is the nominal frequency error of the local oscillator. Correlation values between the digital signal {s(n)} and at least one locally generated version of I-channel and Q-channel PN signals {IPN(n)} and {QPN(n)} are averaged over multiple periods of the PN signals. Pilot signal tracking accuracy is improved, computational load is reduced without degradation in performance, and the technique is simple enough to be incorporated in an off-the-shelf FPGA.

1. Field of the Invention
The invention relates generally to the field of code division multiple access (CDMA). More particularly, the invention relates to CDMA pilot tracking for synchronization.
2. Discussion of the Related Art
Cellular telephony based on CDMA operates in two frequency bands in the US. The first band is the regular cellular band wherein base stations transmit using RF carrier frequencies of approximately 870 MHz. The second band is the PCS band wherein base stations transmit using RF carrier frequencies of approximately 1960 MHz. The principles of CDMA are well known and detailed specifications are established.(1-3)
Fundamental to the operation of CDMA is the notion of the pilot channel which is transmitted by the base station. The sole purpose of the pilot channel is to allow the mobile station to acquire synchronization which is a prerequisite for extraction of any data (such as encoded speech). All CDMA base stations derive their timing from GPS (global positioning system) signals. Thus, any timing derived from the base station transmitted signal, namely the pilot channel is traceable to the GPS, provided the base station is not in a holdover mode of operation.
The pilot channel is a "constant" signal which, because of its deterministic nature, is suitable for acquisition and tracking. The "information" carried by the pilot channel is solely that of timing. It is generated by modulating a constant pattern onto the RF carrier. The construction of the pilot channel is depicted in FIG. 1.
The pilot channel is obtained by taking a constant pattern (e.g., all−1s) and spreading it using the I-channel and Q-channel PN (Pseudo Noise) sequences which have a chip-rate of 1.2288 Mcps. For convenience, the chip values are chosen as +1 and −1 though in an actual digital implementation the values would correspond to a logic-1 and logic-0, respectively. Following the spreading operation, the I and Q impulses are processed by identical baseband filters which provide the bandwidth limitation (intentional inter-symbol-interference) and pulse shaping functions. The I and Q channels are modulated onto the in-phase and quadrature RF carriers and summed to create the pilot channel signal s(t). The pilot channel and other channels (speech, paging, synchronization., etc.) are combined as a weighted sum so as the create the composite transmit signal whose power is nominally a constant. Thus, depending on the traffic, the radiated signal power associated with the pilot signal can be variable. Normal practice is to ensure that the pilot signal power is at least 10% of the radiated power.
The properties associated with the pilot channel are reflected directly in the ability of a receiver to extract proper synchronization. The fundamental aspects of the pilot channel are discussed below.
The I-channel and Q-channel PN sequences are periodic "noise-like" sequences which have a period of 215 chips. They are derived from PRBS (pseudo-random binary sequence; also referred to as maximum length linear feedback shift register sequences) which can be generated using 15-bit shift registers with appropriate feedback. A PRBS sequence has a period of (215−1) bits (i.e. chips) and is characterized by having strings of 1s of all lengths upto 15 but strings of 0s up to length 14. A PN sequence is created from the underlying PRBS sequence by inserting an additional 0 after the string of 14 zeros, which occurs only once per period in the PRBS. The period of the PN sequence is thus one more than the PRBS, or 215 bits (chips).
In IS-95 CDMA, the maximum length shift register sequences from which the PN sequences are derived are specified by the recursion relations:
i(n)=i(n−15)⊕i(n−10)⊕i(n−8)⊕(i(n−7)⊕i(n−6)⊕i(n−2)
q(n)=q(n−15)⊕q(n−12)⊕q(n−11)⊕q(n−10)⊕q(n−9)⊕q(n−5)⊕q(n−4)⊕q(n−3)
where i(n) and q(n) are binary-valued ('0' and '1') and the additions are modulo-2. The '0' inserted after the 14-th zero of the string of 14 consecutive zeros in the PRBS is, by definition, the "last" bit of the period; the subsequent '1' is considered the first bit of the next period. The start of this first bit (chip) interval is aligned with CDMA system time.
The correlation between two sequences, {α(n)} and {β(n)}, where {α(n)} is assumed to be periodic with length N (bit-times), is defined as
      R          α                                      β        =            ∑              n        =        0                    N        -        1                                                  α                          (          n          )                    ·              β                          (          n          )                    This can be extended to the notion of an auto-correlation sequence and a cross-correlation sequence if it is assumed that the periods of the two sequences are the same. These extensions take the form
                                          R            αα                                          (            k            )                          =                              ∑                          n              =              0                                      N              -              1                                                                                α                                            (                n                )                                      ·                          α                                            (                                  n                  -                  k                                )                                                                                R            αβ                                          (            k            )                          =                              ∑                          n              =              0                                      N              -              1                                                                                α                                            (                n                )                                      ·                          β                                            (                                  n                  -                  k                                )                                                        where the correlation lag, k, indicates the delay introduced for the second sequence prior to computing the correlation.
PRBS sequences, generated using linear feedback shift registers, have an especially nice auto-correlation property. In particular, if {α(n)} is a PRBS sequence of length N=2K−1, and the values are treated as +1 and −1 (for '1' and '0'), then the sequence Rαα(K) will be two-valued (and of course periodic) with Rαα(K)=N for k=0 and Rαα(K)=−1 for other values of correlation lag. That is, the auto-correlation sequence is (approximately) a Kronecker Delta function. This is the basis for considering such sequences "white-noise" or "white-noise-like." Furthermore, the cross-correlation between two different PRBS sequences of the same length is approximately zero. Extending the PRBS sequences to the PN sequences by inserting an extra '0' (or −1, depending on one's convention) does not alter the auto-correlation and cross-correlation properties to any great degree. Hence, the particular choice in IS-95 CDMA for generating the I-channel and Q-channel PN sequences.
For reference, the auto-correlation and cross-correlation properties of the I-channel and Q-channel sequences for IS-95 CDMA are listed directly below:
PRBS sequences:                Auto-correlation at zero-lag=32767        Maximum auto-correlation (magnitude) non-zero-lag=1        Maximum (magnitude) cross-correlation=257 (between I and Q) PN sequences:        Auto-correlation at zero lag=32768        Maximum auto-correlation (mag.) non-zero-lag=420 (I-channel)        Maximum auto-correlation (mag.) non-zero-lag=288 (Q-channel)        Maximum (magnitude) cross-correlation=676 (between I and Q)What is implied by these numbers is that the extension of the sequences from PRBS to PN in the manner chosen "degrades" the noise-like behavior of the sequences. Defining a figure of merit for a sequence as the ratio of auto-correlation at zero lag to the (magnitude) of the (largest) auto-correlation at non-zero lags, it can be appreciated that there is a minor degradation. A second figure of merit relates to the distinguishability between the two sequences and can be defined as the ratio of the auto-correlation at zero lag to the (largest magnitude) cross-correlation (for any lag). There is a degradation of about 8 dB inherent in the extension of the PRBS to PN sequences.
The auto-correlation properties of the PN sequences allows for the determination of the presence as well as the position of the pilot in the received radio frequency (RF) signal. Where the RF signal has been translated to baseband and sampled at the chip-rate, and denoting by {α(n)} the (periodic) normalized I-channel PN sequence (with values +1 and −1), the received signal can be modeled asr(n)=A α(n−K)+η(n)where {η(n)} represents the signal component other than the I-channel pilot and is modeled, for simplicity, as a white noise sequence of power σ2. The signal-to-noise ratio is, therefore, given by
  SNR  =                    A        2                    σ        2                                    or                                20      ·                        log          10                                  (                      A            σ                    )                          dB  The operation of correlating this received signal with (delayed) versions of the known I-channel sequence (or "template") will now be considered. The computed correlation sequence will be designated as {R(k)} and is given by
      R              (      k      )        =                    ∑                  n          =          0                          N          -          1                                                                      r                                (            n            )                          ·                  α                                (                          n              -              K                        )                                =                  N        ·        A        ·                  δ                                (                          k              -              K                        )                              +                        ∑                      n            =            0                                N            -            1                                                                                η                                      (              n              )                                ·                      α                                      (                              n                -                k                            )                                          assuming the auto-correlation of the I-channel sequence takes the form of a Kronecker Delta function. Thus, the correlation will "peak" at a lag of K chips. But, this peak may be obscured somewhat by the contribution of the correlation between the template and the noise component of the received signal (everything other than the I-channel pilot sequence component). If the "noise" component is white and uncorrelated with the I-channel sequence, then the obfuscation of the true peak has a mean value of zero and a variance equal to Nσ2. The "signal" power, namely the power associated with the correlation peak, is N2A2 and thus the "despreading" of the code provides an SNR improvement of 10 log10(N) dB, or about 45 dB.
IS-95 CDMA specifies a pulse-shaping filter; the baseband filter depicted in FIG. 1. The pulse shaping filter functions as a spectrum conditioning filter and is nominally a lowpass filter whose passband extends to 590 kHz and stopband starts at 740 kHz (the transition band is 590 kHz to 740 kHz). The passband ripple must be less than 1.5 dB and minimum stopband attenuation must be 40 dB. The manner in which it is specified indicates that Qualcomm Inc. (who originated IS-95) implements this filter as an FIR filter operating at a sampling rate of 4*1.2288 MHz (4 times chip rate). In fact the FIR filter is described as a length 48 FIR filter with even symmetry and the coefficients, {h(n); n=0,1, . . . , 47}, provided in IS-95.
The generation of the filtered I-channel and Q-channel signals is depicted in FIG. 2 explicitly shows just the I-channel. The Q-channel is similar.
The chip-rate PN sequence, {i(n)}, is oversampled by inserting 3 zeros between successive samples to yield the signal {α(n)} at the higher sampling rate of 4.9152 MHz (4 times the chip-rate). The output of the 48-point FIR filter provides {γ(n)}, the spectrum-shaped I-channel pilot signal (still at base-band). The period is now 4*215=217 samples (4 samples per chip). The auto-correlation of the signal {α(n)} is much the same as the correlation of the PN sequence itself and can be approximated by the Kronecker Delta function. The cross-correlation between {α(n)} and {γ(n)} is not, however, a Delta function but takes on the shape of the impulse response of the FIR filter. Specifically,
            R              α                                                  γ                        (      k      )        =                    ∑                  n          =          0                          N          -          1                                                                      α                                (            n            )                          ·                  γ                                (                          n              -              k                        )                                =                            ∑                      m            =            0                    47                                                                                ∑                          N              =              0                                      N              -              1                                                                                α                                                  (                  n                  )                                            ·                              α                                                  (                                      n                    -                    k                    -                    m                                    )                                                                                h                                            (                m                )                                                        =              h                          (          k          )                    using the approximation that the auto-correlation of {α(n)} is indeed a Delta function. Thus, the correlation sequence follows the impulse response of the filter. The filter, having symmetric coefficients, introduces a flat delay of 23.5 samples, effectively moving the peak of the correlation sequence. It also introduces a spread; the correlation sequence is not a Delta function anymore. The filter coefficients, normalized to a maximum of unity, have the following behavior around the mid-point:h(19)=h(28)=−0.1405; h(20)=h(27)=0.0946; h(21)=h(26)=0.4414 h(22)=h(25)=0.7858; h(23)=h(24)=1.0The implication of this spread is that if the correlation is done at the chip-rate without a "matched" filter, then there will be an uncertainty as to the true "peak" since two correlation values will be nominally equal and the presence of any noise may cause a shift one way or the other, introducing a systemic uncertainty of (¼)-chip in the estimate of the peak.
The matched filter is used prior to computing the correlation. Since the baseband filter is symmetric, the matched filter is the same and thus the correlation spread is governed by the impulse response of the filter obtained by convolving {h(n)} with itself. It can be shown that the operation of matched filtering improves the situation by providing a unique peak. For the filter specified in IS-95, the result of convolving the filter with itself gives rise to impulse response coefficients which are described below for 10 lags around the peak (the filter is symmetric):
h*h(0)=3.94; h*h(1)=3.54; h*h(2)=2.48; h*h(3)=1.14 h*h(4)=−0.029
h*h(5)=−0.697; h*h(6)=−0.772; h*h(7)=−0.408; h*h(8)=0.101 h*h(9)=0.465
If these values are normalized to a maximum (central peak=unity), the following results are obtained:
h*h(0)=1.0; h*h(1)=0.898; h*h(2)=0.629; h*h(3)=0.289 h*h(4)=−0.007
h*h(5)=−0.177; h*h(6)=−0.196; h*h(7)=−0.104; h*h(8)=0.026 h*h(9)=0.118
It is seen that the peak value (un-normalized) and the correlation value offset by one sample (which is a quarter-chip) are 3.94 and 3.54, respectively. Consequently, the presence of noise may cause an error in picking the correct peak but if the post-correlation SNR is greater than 20 dB, the probability of this occurring is less than about 0.33 (33% of the time). Secondary peaks are also present but the highest secondary peak (greater than 4 lags from the true peak) is down about 14 dB.
However, implementing this matched filter, even assuming undersampling by a factor of 4 to reduce the sampling rate to the chip-rate, requires roughly 60 million multiplies per second for each of the I- and Q-channels. This is well beyond the capabilities of any current off-the-shelf DSP, especially if the DSP has to do any other task at all! When integrated into an ASIC as a specialized function it is feasible and may be performed in the Qualcomm chip-set.
The pilot tracking method is depicted in the simplified block diagram shown in FIG. 3. The RF signal is translated down to baseband (center frequency=0 Hz, i.e., dc). FIG. 3 shows a single translation whereas in practice a dual down-conversion scheme will be employed with an IF frequency where a (usually SAW) filter is used to define the channel selected. The term (t-τ) relating to the LO signal indicates that the LO phase and the transmitter carrier phase may be different. The in-phase and quadrature demodulated signals are passed through a matched filter, denoted by H*(f), and sampled at the chip-rate (1.2288 MHz) though the phase of the sampling clock may be adjustable. This is indicated by showing the sampling "starting" at time=t0 with samples taken every Tc units of time (Tc is the chip-interval). The sampled in-phase and quadrature signals are correlated using the I-channel and Q-channel PN sequences as templates in a "complex" fashion which is necessitated since the relative phase of the LO and transmit oscillators is an unknown (but assumed fixed) value. The value t0 is varied over the range required (one period of the PN sequences, i.e., 215 chips). During the "acquisition" phase, to speed up the time for acquisition, the correlation may be done over a partial period.
The Qualcomm Reference design, which is used by all CDMA mobile handsets uses a 19.68 MHz VCXO which is "locked" to the code-rate by the pilot tracking method which uses a conventional "early", "late", and "on-time" correlation mechanism. The RF signal is translated to in-phase and quadrature signals centered at dc and lowpass filtered prior to A/D conversion (one converter for the in-phase and one for the quadrature). The conversion clock is derived from the 19.68 MHz VCXO and it has been observed that this derived sampling clock is not smooth but does have some jitter. The "matched filter" is implemented using DSP. A general block diagram depicting the Qualcomm reference design is shown in FIG. 4.
The sampling jitter and the imperfection of matching between the two A/D converters and the mismatch between the two lowpass filters (pre-A/D-conversion filters) cause errors in the tracking of the pilot. Therefore, what is needed is an approach that tracks the pilot signal with greater accuracy.
The IS-95 specification calls for the base-station signal processing chain to include an allpass filter, ostensibly to compensate for the non-linear-phase characteristics of the pre-A/D filter called for in the Qualcomm reference design. Any design not using the Qualcomm reference design and integrated circuits (for which a significant license fee is charged) must circumvent the impact of this allpass filter which Qualcomm has mandated for the base-station in the IS-95 specification. Therefore, what is also needed is an approach that avoids the Qualcomm reference design and integrated circuits and simultaneously circumvents the impact of the allpass filter.

Pilot tracking for synchronization using correlation between digital signal and locally generated version of PN signal


A method for determining rotational position of a target in a target tracking System is disclosed. The target comprises a plurality of light emitting elements arranged circumferentially around the target. The target tracking System further comprises a tracker unit capable of detecting light emitted by said light emitting elements. The method comprises the Steps of emitting from said light emitting elements an omni-directional synchronization signal; detecting in the tracker unit said synchronization signal; activating said light emitting elements sequentially starting from a reference direction, wherein each light emitting element is activated for a predetermined time and emits light during the time it is activated; detecting in the tracker unit a time when a maximum amount of light is received from the target; and calculating the reference direction for the target relative to a coordinate System based on the time interval between detection of the synchronization signal and the detection of a maximum amount of light received from the target. An active target for use in the method is also disclosed.

In the construction industry, there is an increasing demand for high-precision positioning of machines such as graders and dozers. At a building site, both logistics and construction accuracy may call for individual tracking of each machine or vehicle at the site.
To this end, there are systems based on advanced tracking sensors and robotic total stations, which remotely track and measure a kinetic moving target and continuously send measured data to a controlling computer or the like.
Recently, three-dimensional (3D) machine control operations have become increasingly important. Three-dimensional data from design software is employed onboard a construction machine, facilitating a comprehensive site control. The kinetic movement of the construction machine is continuously monitored by means of surveying apparatus, and the position, orientation, attitude, etc. of the machine is forwarded to an on-board controlling computer. The on-board computer calculates control data for the construction machine, based on the current position and orientation as compared to the three-dimensional design.
If the construction machine is manually controlled by an operator, the operator is provided with an indication about the correctness of machine position. For example, the operator may be given information about height and angle for an earth-moving blade. Based on such information, the operator may alter the position of the blade accordingly, if required.
For an automated machine control system, a controlling computer controls the entire system and automatically changes the position of the construction machine according to the three-dimensional design by providing appropriate control signals for example to hydraulic valve control systems of the machine.
Various types of construction machines can be equipped with a machine control system of this kind. Graders and dozers have been the typical earth-moving machines which were controlled and monitored by such systems. More recently, pavers, rollers and excavators have also been controlled in this manner. However, machine control systems are not limited to just construction machines. Three-dimensional control systems may be used also in hydrographical marine applications and in real-time kinetic railroad measurements, to name a few.
In order to obtain the positional data about the construction machine, or an earth-moving blade attached to such machine, a target is typically mounted on the machine or on a blade or similar attached to the machine. The target may, for example, include retro-reflecting prisms which are used as targets for an electronic distance measurement beam emitted from a total station. Suitably, such prisms are circumferentially arranged in the target, in order to provide for the possibility of measuring target position from any direction. The target may alternatively, instead of using prisms, be provided with other reflecting surfaces, such as a reflecting tape. Various suitable types of targets for distance measurement are known in the art.
Moreover, in order to facilitate tracking of the target by means of a robotic total station, the target may comprise emitters, such as light emitting diodes or the like. Such emitters may be designed to emit a coded signal to the robotic total station in order to identify the target. For example, each construction machine or target at a site may be given a unique identity, and information about this identity may be emitted by means of these emitters. Any receiving total station may then compare this identity with a known set of identities, in order to determine which unique construction machine (or which target) it is currently tracking.
An active target having emitters according to the above also facilitates the robotic tracking, since a tracking function can be implemented in the total station separate from its distance measuring capabilities.
Hence, there are known systems for real-time tracking of machines and tools, as described above, at a work site. This is particularly convenient when using three-dimensional design, as explained.
However, although these systems have indeed been successful, there is still room for improvement. For example, when a robotic total station continuously tracks for example a blade on a vehicle, it can determine its kinetic movement but there is no way of knowing if the vehicle is moving in a forward direction or if it is reversing. In addition, if the vehicle is not moving at all, there is no way of determining the forward direction thereof. The prior art has required a plurality of targets mounted on a single machine or vehicle in order to allow determination of its rotational (or directional) position.

Method for target tracking, and associated target


A continuous process for the production of an elastomer-modified thermoplastic is disclosed. The process entails (i) obtaining graft elastomer (D) having residual moisture content of 1 to 50 wt. %, particularly 5 to 50 wt. %, particularly preferably 10 to 40 wt. %, (ii) introducing (D) and thermoplastic resin (B) through an inlet to a reactor operating under conditions calculated to melt (D) and (B) and to remove organic volatile components C) to produce a molten blend, the reactor being equipped with a plurality of kneading bars, that convey a portion of the molten blend towards the reactor inlet.

Polymers always have a residual content of monomers from which they are synthesized, and an inherent color. The removal of the residual monomers from the molding compositions frequently involves exposure to high temperatures, which leads to an undesirable intensification of the inherent color. In order to improve the properties it is essential to remove the residual monomers in a suitable way.
In practice a light inherent color is generally desirable. In the case of colored products this also generates an economic benefit, because the amount of dye needed for coloration may be reduced rather than having to be increased in order to conceal a yellowish inherent color.
A removal of residual monomers by the chemical route is described for example in EP-A1-0 768 337. Here the residual monomers are removed by addition of CH-acid organic compounds. Through this known process monomers such as styrene and acrylonitrile can be removed reliably, but not solvents or secondary polymerization products. The same deficiency occurs in the process to reduce residual monomers with alkali (bi)sulfide (DE-A1-2 546 182). In some circumstances, however, the chemical transformation of residual monomers leads to products having an undesirable ecological relevance, which significantly complicates the use of these products in practice.
In another known process the residual monomers are removed under vacuum in an additional process step in extruders with or without the addition of water. The additional process step leads to higher costs and to a further undesirable deepening of the product color.
A process for the removal of residual monomers by injection of supercritical solvents into the polymer melt (EP-A1-0 798 314) has proven costly.
Another process for the production of elastomer-modified thermoplastics is described in EP-A1-0 867 463. Wet polybutadiene powder grafted with styrene and acrylonitrile and containing residual monomers is blended with polystyrene-acrylonitrile melt in a mixing compounder and freed from residual monomers with simultaneous evaporation of the water. The finished ABS is discharged from the end of the evaporating equipment and converted into pellet form. The disadvantage of this process is that the achievable throughput is limited. With a high throughput the powder is to a considerable extent not incorporated into the melt but entrained with the vapors. This leads to loss of yield and to unstable operating conditions. To counteract this mode of operation of the mixing compounder can be adjusted so that a back-up of melt is generated at the exit from the mixing compounder. This melt is supposed to bind the powder and prevent it from being discharged. This procedure is only of limited use, however.
Starting from this known process, the object of the present invention is to provide a process that does not have the disadvantages described.

Process and device for the production of elastomer-modified thermoplastics


An optical disk (10) of the present invention has a substrate (11) included a resin-impregnated paper, in which resin is impregnated into paper, or resin-coated paper, in which the paper surface is coated with a resin, and a recording layer (13) formed on at least one side of the substrate (11). This type of optical disk (10) has performance equal to that of conventional optical disks and has a minimal effect on the environment during disposal. In addition, a manufacturing method of an optical disk of the present invention has a recording layer sheet fabrication step in which a recording layer sheet is fabricated by forming tracks on a recording layer base material, and a recording layer sheet lamination step in which a recording layer (13) included the recording layer sheet is provided on a substrate (11) included resin-impregnated paper or resin-coated paper by laminating the recording layer sheet with the resin-impregnated paper in which a resin is impregnated into paper or the resin-coated paper in which the surface of the paper is coated with a resin. This type of manufacturing method of an optical disk allows optical disk (10) to be produced inexpensively.

Polycarbonate, epoxy resin and so forth have frequently been used as the substrate materials of conventional optical disks since these substrate materials are required to have low contents of extraneous materials and impurities, high permeability and low double refractive index to enable stable reading and writing, a low moisture absorption rate and superior heat resistance to prevent deformation of the optical disk, as well as high fluidity and superior mold release to facilitate molding processing (Japanese Unexamined Patent Application, First Publication No. 05-258349).
However, since bisphenol A is used as monomer for the aforementioned polycarbonate and epoxy resin substrate materials, unreacted bisphenol A remained even after polymerization. Due to the growing interest in environmental issues in recent years, materials containing bisphenol A have tended to be shunned, and studies have been conducted on substrate materials that do not contain bisphenol A.
The use of glass has been considered for use as a substrate material since it does not contain bisphenol A and satisfactory optical characteristics in the form of high transmittance. However, glass substrates have problems in terms of strength in that they are unable to accommodate the pressure and stress during production and use due to limitations on disk thickness.
Another problem with conventional optical disks is that, although silk screen printing has mainly been used in the case of printing characters or images on the surface, there is the problem of the difficulty in obtaining highly detailed images with silk screen printing.
In addition, in the case of silk screen printing, in order to print serial numbers or other different characters and images for each disk, it is necessary to change the form plate each time, thereby resulting in the problem of being unable to in fact impart variable information by printing to conventional optical disks.
Accordingly, an object of the present invention is to provide an optical disk, and manufacturing method of the same, which has performance equal to that of conventional optical disks and has a minimal effect on the environment during disposal.
In addition, another object of the present invention is to provide an optical disk on which highly detailed images are printed, and manufacturing method of an optical disk that enables highly detailed images to be printed inexpensively and impart variable information by printing.

Optical disk and its manufacturing method


A panel assembly for reflecting and shielding rays of a light source (20), includes a panel (10) and a light-reflecting member (30) pivotably mounted to the panel. The panel includes a base (11) and a bent plate (13) perpendicular to the base. A light-pervious board (131) is disposed on the panel. The light-reflecting member defines an opening (32) facing the light pervious area, for reflecting light rays to be incident on the light-pervious area through the opening, wherein the light-reflecting member is rotatable to change position of the opening of the light-reflecting member relative to the light-pervious area, thereby adjusting the brightness of the light-previous area.

1. Technical Field
The present invention relates to front panels of computer systems, and more particularly to a front panel of a computer system with a light-reflecting and light-shielding apparatus.
2. General Background
Usually, a light source, such as a light-emitting diode, is installed on a front panel of a computer system, in order to display the working state of the computer system. Generally, a light-pervious switch button is positioned on the front panel. When the switch button is pushed to press an electrical switch, the power supply switches on and the light source emits light, and the switch button is illuminated. However, in conventional computer systems, one light source corresponds to only one switch button. If another switch button or light-pervious member needs illumination, additional light-emitting diodes should be provided. In addition, the light-emitting diode as a spot light source, lights only a limited area.
Another conventional apparatus is provided for illuminating more light-pervious members and enlarging the lit area of the light source, which includes an arcuate flat light-reflecting member mounted on a computer panel. The light-reflecting member includes a light incident surface, a light-guiding portion, and a light-showing portion. A bracket is disposed above the light incident surface for receiving a light source. Rays emitted by the light source are reflected by the light-guiding portion, and illuminate a larger area of the computer panel via the light-showing portion. However, the light of the computer panel cannot be shielded when users don't want to see the light while the computer is running.
What is needed, therefore, is a front panel of a computer system with a light-reflecting and light-shielding apparatus allowing a larger area of the computer panel to be lit and also shield the light when so desired.

Light-reflecting and light-shielding apparatus of computer panel


The invention relates to a connector comprising at least a contact element, which has at least an unconnected state and a connected state; and a pre-loading element, which has at least a first position and a second position. When the pre-loading element is in the first position, it forces the contact element into the unconnected state and when the pre-loading element is in the second position, it allows the contact element to transfer to the connected state.

An integrated circuit (IC) card electronic apparatus is a type of equipment in which information is electrically transferred between circuitry on the electronic apparatus and an IC circuit in a card with desired functions or programs, which card is inserted into a card receptacle slot of the apparatus. The apparatus is common in mobile phones, personal computers, hand-held computers, hand-held media devices, game machines and other electronic equipment.
An IC card consists of a compact, thin, inflexible card body, typically about 0.8-2.0 mm thick. An IC chip (integrated circuit device) having the desired functions is built into such a rigid or semi-rigid card body made of plastic or reinforced cardboard, and numerous contacts (i.e. connecting terminals) are arranged along an edge on the surface of the card.
An IC card may be inserted into the card receiving slot on the electronic equipment, with the card edge having the contacts oriented toward the card receiving slot and with the card face, on which the contacts are arranged, oriented toward the operator, until the card edge abuts the bottom of the connector slot. Thus, the contacts come into full contact with the corresponding contact springs of the slot, so that the IC circuit on the card is electrically interconnected to the control circuit on the electronic equipment to allow information to be transferred between them. Contact springs in card readers have a shape where the end of the spring is bent first up, then down. Therefore, the connector structure is much thicker than the card.


A radially expanding bolt assembly has a hollow element insertable into a hole of an object and having an inner surface with at least one inner surface portion which is tapered, an expanding element insertable in the hollow element and having an outer surface with at least one outer surface portion which is tapered and cooperates with the inner tapered surface portion of the hollow element, additional elements for displacing the expanding element in opposite axial directions for tightening and loosening the bolt assembly, and a washer positionable between the object and one of the additional elements at one of the axial ends, so that the one additional element displaces the expanding element in one axial direction and due to cooperation of the tapered surface portions expands the hollow element to clamp it in the hole of the object, while the other additional element displaces the expanding element in an opposite axial direction and the tapered surface portions disengage from one another so that the hollow element contracts and the radially expanding bolt assembly can be removed from the hole of the object.

The present invention relates to a bolt assembly, and in particular to a radially expanding bolt assembly.
Radially expansible bolt assemblies are known in the art. The known radially expanding bolt assembly includes an outer tubular expansible element formed as a sleeve with an inner tapered portion and a mating inner expanding element formed as an inner stud with an outer tapered portion cooperating with the tapered portion of the sleeve. The outer sleeve is inserted in a hole of an object to be tensioned, for example two adjoining flanges to be connected with one another. After this, the inner stud is inserted into the outer sleeve and pulled by external means to force the tapered portions to slide over one another and therefore to expand the outer sleeve.
Presently, hydraulic tools or a plurality of jack screws are used as external means for applying a tensile load to the radially expanding bolt assembly. It is believed that the existing radially expanding bolt assemblies can be further improved.