A method for assisting a user with one or more desired tasks is disclosed. For example, an executable, generic language understanding module and an executable, generic task reasoning module are provided for execution in the computer processing system. A set of run-time specifications is provided to the generic language understanding module and the generic task reasoning module, comprising one or more models specific to a domain. A language input is then received from a user, an intention of the user is determined with respect to one or more desired tasks, and the user is assisted with the one or more desired tasks, in accordance with the intention of the user.

Various interactive applications allow a user to speak or enter text, sometimes including natural language, and have a dialog with a computational entity. For example, an airline information system may comprise a natural language interactive voice response (IVR) system which interacts with a customer by providing a series of choices for the customer (e.g., by a recorded voice). The customer may select from among various options by speaking a natural language response. For example, a customer may request flight status information, reward mileage balance information and upgrade status information. Additional options may be presented to the customer in response to a selection of a prior option. For example, if a customer requests flight status information in response to an initial prerecorded greeting from the IVR system, another prerecorded announcement may prompt the user to state the flight number, date, departure and destination cities, or other pertinent information. In general, such interactive voice response systems are designed and built with significant investment of time and money. In addition, the design of such systems often require specialized knowledge of computer programming and network design in addition to knowledge of specific subject matter in which the system is deployed (e.g., in-depth knowledge of airline services).

This patent is subject to a terminal disclaimer.

Generic virtual personal assistant platform


The invention relates generally to ophthalmic molds and methods useful for casting ophthalmic moldings. In one aspect, the invention relates to a mold for casting an ophthalmic molding formed from a first mold half detachably affixed to a second mold half, whereby the mold has a top and bottom; and a cavity formed by the first and second mold halves, wherein the cavity receives a lens forming material through an opening at the bottom of the mold and vents gas and excess lens forming material from an opening at the top of the mold. In another aspect, this invention relates to methods for casting opthalmic moldings, particularly intraocular lenses.

Artificial intraccular lenses (IOLs), used to replace damaged or diseased natural lenses in the eye, have been widely used in the last two decades. Typically, such intraocular lenses comprise an optical element and one or more haptics coupled thereto for properly positioning and centering the intraocular lens within the eye. These lenses have typically included hard polymeric or glass optical elements with metallic or polymeric supports.
During the past decade, the medical profession has made widespread use of intraocular lenses comprising polymethyl methacrylate (PMMA), a hard plastic composition. In general, PMMA lenses are cut on a precision lathe, using diamond cutters or injection molded, and then carefully post polished by a critical tumbling process in which the edges of the lenses are radiused and polished. Recently, workers in the art have utilized IOLs comprising a soft, biocompatible material, such as silicone. Silicone lenses have the advantage of being lighter in situ than PMMA lenses, and because they are flexible, they can be folded or rolled to reduce their size during implantation into the eye in accordance with conventional surgical procedures.
Methods of producing optical or ophthalmic components, such as IOLs, have not changed in principle in many years. The main requirements are that the optical surface be polished to a highly accurate shape. Currently, most IOLs are manufactured using the time-consuming, expensive, and quality-varying process of lathing. The hand or automated lathing processes for IOLs, as well as the steps currently necessary prior to the lathing process, which include sheet or rod forming, machining, button coring, tumble polishing, extraction, etc., are quite inefficient and require additional machinery for manufacturing the lenses.
Previously known techniques for casting molded concave-convex lenses, such as contact lenses, generally are not well suited for casting convex-convex IOLs. Known casting methods typically employ a male mold half and a female mold half, which interengage to form the mold space. The female mold half is horizontally disposed and upwardly facing. Lens material is deposited in the open female mold half, and the male mold half is pressed into engagement with the female mold half. The lens material is cured, the mold halves are separated, and the lens is removed from the mold. Casting a convex-convex lens requires filling a mold space formed between opposed female mold halves with lens-forming material, which has proven difficult or impossible using previously known techniques. Lens material deposited into the lower mold half typically is insufficient to fill the upper mold half, resulting in a void in the upper portion of the mold space and producing an inferior or defective lens.
Accordingly, there is a need in the art for improved molds and methods for casting ophthalmic lenses, and for lenses formed by such molds and methods.

Mold and method for casting ophthalmic lenses


An apparatus for administering electrical aversive stimulus is provided. The apparatus includes a remote transmitter, a receiver/stimulator, and an electrode. The receiver/stimulator is activated by an electromagnetic signal generated by the transmitter. In response, the receiver/stimulator generates an electrical stimulus pulse which is administered to the individual through the electrode. The receiver/stimulator and electrode are worn by the individual. Stimulation indicator means on the receiver/stimulator provides a positive indication that the stimulation has been administered to the individual. Various characteristics of the electrical stimulus pulse may be adjusted to vary the individual's perceived averseness of the stimulus. A method of treatment utilizing the apparatus of this invention is also provided.

1. Field of the Invention
This invention relates to an apparatus and method for deterring or decelerating undesirable behavior by an individual through the use of aversive stimulus. More specifically, this invention relates to a remotely controlled apparatus for administering electrical aversive stimulus to an individual and a method of treatment using the apparatus.
2. Description of Prior Art
It is well known to use aversive stimulus, such as the application of an electric shock, to deter certain types of undesirable behavior. For example, therapists have used electrical aversive stimulus to deter or decelerate self-injurious behavior in individuals. Electrical aversive stimulation has also been used to educate or train individuals. For example, aversive stimulus has been used to educate or train individual using a method known as "behavior rehersal". Behavior rehersal is typically used on individual who have exhibited undesired behavior in the past. Often, the undesired behavior that the individuals exhibited in the past was extreme, such as exhibiting violence against others. With behavior rehersal, the individual is prompted to engage in a form of the undesired behavior or is vividly reminded of the past undesired behavior. When the individual engages in the behavior or when it is clear that the individual recalls the behavior, aversive stimulus is administered to the individual in order to remind him or her of what will occur if he or she engaged in that type of behavior in the future.
Aversive stimulation has also been used to train animals.
U.S. Pat. No. 4,440,160 discloses an apparatus that may be worn on the body of the individual to be treated. The apparatus is said to automatically sense the types of patient movements associated with self-injurious behavior. In response to those movements, an electrical aversive stimulus is automatically administered.
When aversive stimulus is used to educate or train an individual, such as when behavior rehersal is used, it may be desirable to utilize a stimulus in which the aversiveness, as perceived by the individual being treated, is less than that of a stimulus which is used to deter or decelerate the individual's present behavior.
There remains a need for a compact apparatus for administering aversive stimulus which may be remotely activated by a therapist, and which provides an indication that the stimulus has been administered. There also remains a need for an apparatus which generates a stimulus having various characteristics which may be adjusted in order to vary the aversiveness of the stimulus as perceived by the individual.
In addition, there remains a need for a method of administering aversive stimulus in which the actual administration of the stimulus may be monitored and in which various characteristics of the stimulus may be adjusted in order to vary the relative aversiveness of the stimulus.

Apparatus for administering electrical aversive stimulus and associated method


A semiconductor device (20) makes contact between a first metal line (22) and an overlying second metal line (24) without the need for a conductive landing pad. Sidewall spacers (30) are formed adjacent sides of metal lines (22) such that during formation of a via (34) in an overlying dielectric layer (32), the sidewall spacer prevent trenching of underlying dielectric layer (28) if the via is misaligned. The sidewall spacers are formed of a dielectric material which has an etch rate which is significantly slower than the etch rate of dielectric layer (32). In another embodiment, portions of the sidewall spacers are selectively removed prior to depositing a second metal layer (42). Upon depositing the second metal layer, the side of metal line (22) is locally clad with the second metal to increase contact area and lowering contact resistance.

As semiconductor devices, such as integrated circuits, become more and more complex, additional individual components are included in the device for increased performance and cost effectiveness. It is necessary that individual components in devices be made increasingly small and tightly packed to avoid excessive increases in the size of the devices as the number of individual components increases. For example, integrated circuits which were once made with conductive lines having widths on the order of 2 .mu.m had hundreds of thousands of transistors. Many integrated circuits now have over a million transistors. To prevent the integrated circuit size from growing proportionately with the number of transistors, the width of conductive lines used to make the transistor was reduced to on the order of 0.5 .mu.m. As device performance and complexity increases, these line widths are expected to be made even narrower.
With feature sizes decreasing, it is becoming more difficult for semiconductor manufactures to align one feature relative to another and to control size tolerance as a function of nominal feature size. To overcome this difficulty, manufacturers try to incorporate as many self-aligned features in the manufacturing process as possible. However, some features make self-alignment or alignment insensitivity very complex or expensive to achieve. For instance, semiconductor devices often include two or more metal layers which are separated by one or more dielectric layers. In some portions of the device, it is necessary to make contact between the two metal layers. Most conventional device manufacturing processes do not have self-aligned processes for making contact between a first metal layer and a second metal layer. Because self-aligned first metal-to-second metal contacts are not typically used, and because features sizes of the first and second metal layers are becoming smaller, contact alignment is exceedingly critical and difficult. Any misalignment of the contact may result in short circuiting the second metal layer to a conductive feature other than, or in addition to, the first metal layer.
One method in which semiconductor manufacturers have overcome alignment difficulties is by creating a conductive landing pad in a metal line of the first metal layer. The conductive landing pad is made wider than the minimum metal width to provide additional contacting area, thereby establishing an additional alignment tolerance. A semiconductor device 10 utilizing a conductive landing pad is illustrated in FIG. 1. A cross-sectional view of device 10 taken along the line 2--2 of FIG. 1 is illustrated in FIG. 2. Device 10 includes a first metal line 12 made from a first metal layer and an overlying second metal line 14 made from a second metal layer. As indicated in FIG. 2, the two metal lines overly a substrate 11, which is typically silicon or another semiconducting material. A first dielectric layer 13 electrically isolates first metal line 12 from substrate 11, and a second dielectric layer 15 electrically isolates the first metal line from overlying conductive layers which may be present. In conventional semiconductor devices there may also be several other intervening layers between the first and second metal layers and the substrate, but for the sake of clarity only first and second dielectric layers 13 and 15, respectively, are illustrated. To make contact between the first and second metal lines, a contact opening or via 16 is formed in second dielectric layer 15 using conventional lithography and etching techniques. Upon depositing the second metal layer, the second metal fills via 16, thereby creating an electrical contact between first metal line 12 and second metal line 14.
In order to establish a good and reliable electrical contact between the two layers, it is desirable to make via 16 as large as possible to maximize the contact area between the two metal layers. A maximum contact area minimizes contact resistance and improves signal quality and speed between conductive layers. As illustrated in FIG. 1, the diameter of via 16 is nearly equal to the minimum width of first metal line 12. Because the size of the via is very close to that of a minimum line, there is very little alignment tolerance in forming the via. As illustrated in FIG. 3, if via 16 is slightly misaligned, trenching of underlying dielectric layers, such as first dielectric layer 13, may occur during formation of the via. After depositing the second metal layer, metal line 14 fills in the trenched portion of dielectric layer 13, making unwanted contact with substrate 11, or to another conductive region (not illustrated).
As mentioned above, some manufacturers include a conductive landing pad, such as landing pad 18 of device 10 in FIG. 1, to reduce the chances of short circuiting the second metal line 14 to underlying conductive features as a result of via misalignment. Landing pad 18 is formed as part of first metal line 12, and is positioned directly beneath via 16. Since the landing pad is wider than the minimum width of metal line 12, misalignment of via 16 will not be detrimental. As illustrated in FIG. 2, via 16 can be slightly misaligned to either the right or left, yet still lie completely over landing pad 18. With the additional conductive area available, it is less likely that via 16 will fall off the landing pad and trench into underlying dielectric layers.
Although landing pads significantly improve the ability to make reliable contacts between two conductive layers, utilization of landing pads also has a disadvantage. Because a landing pad essentially increases the width of a portion of a metal line, landing pads limit contacted metal line density in a device. Device design rules typically require metal lines to be separated by at least a minimum distance in order to lithographically define and etch the space between adjacent metal lines and to prohibit excessive capacitive coupling between adjacent lines. Since a landing pad is more or less an extended region of a metal line, the minimum distance to an adjacent metal line must be measured from the edge of the landing pad, not from the narrower region of the line. Metal lines with landing pads cannot be formed on as tight a pitch as metal lines without landing pads. For a given number of contacted metal lines, a device which includes landing pads will therefore be larger in area than a device which does not utilize landing pads. Therefore, it would be beneficial if contact between overlying conductive lines could be accomplished reliably without using landing pads and without otherwise increasing device size.

Method for forming a via structure and semiconductor device having the same


Processor instruction scheduling by: providing a set of program instructions, selecting instructions for reordering from the set of program instructions, reordering the instructions according to instruction properties, assigning sequential instruction tags to the instructions, tagging the instructions for completion as a group in a completion table; and executing the instructions.

The disclosure relates generally to scheduling and executing processor instructions to improve processor performance in terms of time and energy consumption, and specifically to dynamically reordering processor instructions for processor execution.
Program instructions are typically written in an order which supports the logic of the program. System resources review and process instructions using algorithms designed to efficiently utilize system resources. The algorithms may process the instructions in program order, or out of program order, depending upon the algorithm, the instructions, and available system resources.
At run time, a block of instructions may be loaded in memory. The block may be pre-decoded, and information associated with executing the instructions may be added to the instructions. Branching instructions may be identified and relevant register addresses may be added to the instructions at the pre-decode step for use at the decode step. The instructions may then be fetched, decoded, reordered, executed, and completed.

International Business Machines Corporation


The invention refers to a transport system with a minimum of two supporting points disposed on opposite sides of inter-connected ring frames, where within the annular tube (21) along tracks travel light rail vehicles with a passenger cabin. The structure of the cabin is similar to that of an airplane fuselage, where the cabins are at the same time supported by the lower and upper rotating bases which are disposed in the shape of rails (2,3) which include the side rails (10) also bonded to the opposite sides of the basic rings (1). The basic rings (1) are inter-connected by side supports (18) bonded by side bonds (19) for longitudinal central supports (12,13) and longitudinal side supports (14,15) disposed on horizontal frame beams (11) of double columns (10) as vertical supports (4b) of the support structure system.

The present invention relates to a transport system having at least two supporting points disposed on opposite sides of inter-connected ring frames.
The technical problem which is solved by this invention is how to reduce drive energy as well as to rationalize the available space, together with the increase in safety and stability of transport vehicles at greater speeds, to create a transport system with light passenger rail carriages of the specified type. These vehicles will at the same time be supported by at least one lower rail and hanged on at least one upper rail, which will be the adequate support of the multi-rail railway with tracks disposed in annular rib shaped i.e. grille tubes with interconnected longitudinal base annular systems disposed on the above ground, ground level and underground supporting structure.
Today exist various transport systems with rail carriages moving on tracks resting on rails which act as lower supports, or else carriages are hanged on a carrying rail with at least one elevated support, as is the case with the single rail.
The German patent DE 36 12 847 A1, offers a solution for the transport system with lower supports of a magnetic rail of an electromagnetic or electrodynamic system with passenger carriages on tracks disposed in tunnel tubes which are equiped with carrying magnets. The transport system also includes beams with leading magnets connected with controllers on which are disposed directly or by means of platforms passenger carriages which move in tunnel tubes.
A similar transport system with lower supports on a magnetc rail as decribed in the German patent DE 36 12 848 A1, in which air resistance formed in front of the passenger carriage in motion at relatively high speed is carried out through special canals and it can also be sent to the adjacent tunnel tube where cabins move in the opposite direction.
Another solution relative to this problem is shown in the German patent DE 36 40 779 A1. This solution consists of a system of closed tubes with a railway, placed above or underground, in which a vacuum is maintained, in order to reduce air resistance. Because of this, these vehicles must be built resistant to suction pressure i.e. underpressure of the surrounding air and sealed the same way as the tube in which the rail is disposed. Vehicles would have to enter and leave these tubes through special chambers i.e. sealed slide gates accompanied by special security measures.
Another German patent DE 35 03 504 A1 provides another solution of the transport system with hanged passenger carriages. With this system, a rail is set high above ground level, across horizontal special shaped steel or armoured concrete beams, over which rolling bases with leading and drive wheels move, on which passenger carriages are set by the roof in the hanging position.
The basic deficiencies of all these known solutions from the point of view of engineering, lie in the fact that transporting vehicles i.e. passenger rail carriages are propped only by lower supports or only by the upper supports of the suspended rail. Also, since these transport systems move at a relatively high translatory speed, at which they enter curves, which cannot be avoided, these vehicles require an adequately strong bearing structure being relatively heavy, which would be capable of handling and transporting all relatively big e.g. centrifugal and inertial forces. This situation is made even more difficult if the vehicle structure should be placed under relatively strong forces which appear as a result of differences in air pressure within and out of the transport vehicle. On the other hand the great weight of these vehicles require adequate dimensions of rail elements such as: supports, columns, tube elements and others, while at the same time for moving these vehicles, a relatively great amount of drive energy is used for overcoming all resistance of friction and movement, as well as the inertial force.

Transport system with a minimum of two supporting points disposed on opposite sides of inter-connected ring frames


The present invention provides a method of fabricating a patterned silicon-on-insulator substrate which includes dual depth SOI regions or both SOI and non-SOI regions within the same substrate. The method of the present invention includes forming a silicon mask having at least one opening on a surface of Si-containing material, recessing the Si-containing material through the at least one opening using an etching process to provide a structure having at least one recess region and a non-recessed region, and forming a first buried insulating region in the non-recessed region and a second buried insulating region in the recessed region. In accordance with the present invention, the first buried insulating region in the non-recessed region is located above the second buried isolation region in the recessed region. A lift-off step can be employed to remove the first buried insulating region and the material that lies above to provide a substrate containing both SOI and non-SOI regions.

As semiconductor technologies become more complex, there is a demand for providing semiconductor structures that have more functionality associated therewith. For example, in order to provide customers with the optimum designs, it may be required to build high performance complementary metal oxide semiconductor (CMOS) devices as well as to add additional functions such as dynamic random access memory (DRAM) or radio frequency (RF) applications. All of the devices are optimized under different conditions. For example, RF and DRAM applications have traditionally been built on bulk semiconductor substrates, while higher performance CMOS devices are typically built on silicon-on-insulator (SOI) substrates.
In CMOS devices built on SOI for instance, performance characteristics are known to be greatly improved. Specifically, CMOS devices built on SOI can exhibit less junction capacitance and leakage, greater resistance to ionizing radiation, and immunity to latch up.
In order to achieve optimum performance however, it would be desirable to provide a substrate that has SOI like properties in some regions of the substrate, while having non-SOI like, i.e., bulk, properties in other regions of the substrate.
A semiconductor substrate having a bulk region and an SOI region has the advantages of excellent crystallization of the bulk region and excellent element insulation of the SOI region. For example, logic memory circuits are preferably formed in bulk element regions while high performance logic circuits are preferably formed in the SOI region. It is desirable, therefore, for a semiconductor device to have areas of SOI and bulk silicon adjacent on the same semiconductor substrate.
Numerous techniques have been developed to form SOI and bulk regions. One of the most manufacturable techniques is ion implantation which involves the implantation of high energy ions into a solid surface to form a buried layer. Because the implanted dopants are generally not in the proper lattice position and are mostly inactive, a high temperature annealing process is often used to repair crystal damage and electrically activate the dopants. Implantation of oxygen into silicon is generally a preferred process for building SOI substrates. The separation by implanted oxygen (SIMOX) process can be used, for example, in very large scale integration (VLSI) devices.
Unfortunately, masked or patterned ion implantation produces a region of partial implantation, referred to as the transition region, in the semiconductor substrate. The transition region forms between the area that receives the full ion implant dose and the region that was shielded from implantation, known as the mask region. As a result of this partial dose, the transition region is highly defective, containing crystal defects that may propagate to other regions of the semiconductor silicon layer.
U.S. Pat. No. 5,740,099 issued to Tanigawa teaches building areas of SOI and bulk silicon wafers on a substrate and building different types of circuits in each area. Tanigawa discusses the concept of making multiple regions of SOI and bulk, on the same wafer, using a patterned ion implant. This method is known to cause defects at all of the patterned edge regions.
U.S. Pat. No. 5,612,246 issued to Ahn describes a method and structure in which standard SIMOX SOI wafers are patterned and then the silicon and buried oxide are etched down to the bulk silicon substrate. Ahn then builds devices on the bulk silicon substrate. One problem with this method is that the structure is non-planar and, therefore, the levels or heights of the bulk and SOI devices are different on the wafer. Consequently, every film that is deposited and etched will leave a sidewall or rail around the step between the two levels of silicon.
U.S. Pat. No. 5,364,800 and U.S. Pat. No. 5,548,149, both issued to Joyner, teach a technique using masking oxide of various thickness to produce a buried oxide layer of differing depths. At the extreme ends of the ranges of the mask thickness, Joyner can create thick SOI, thin SOI, or bulk silicon regions. Thus, Joyner can create a substrate with both SOI and bulk regions.
U.S. Pat. No. 4,889,829 issued to Kawai describes a method of making bulk and SOI regions on the same substrate. Kawai builds the bulk in the original substrate and then deposits, using chemical vapor deposition or CVD, an oxide on top to form the buried oxide. Silicon (polysilicon) is then deposited on top of the oxide. Because high-quality devices cannot be built on polysilicon, Kawai then recrystallizes the poly with a laser to form a single crystal. SOI devices are then built on this layer. The final structure is non-planar, as is the structure taught by Ahn, with the inherent problems of such a structure. In addition, the process described by Kawai is impractical because control over recrystallization of the poly is poor.
U.S. Pat. No. 5,143,862 issued to Moslehi teaches SOI wafer fabrication by selective epitaxial growth. Moslehi etches wide trenches, deposits a buried oxide by CVD, removes the oxide from the sidewalls of the trench, then uses selective epitaxial growth to grow the silicon over the oxide region. Moslehi then isolates the region by forming sidewalls on the epitaxial mask, continues to grow the silicon to the surface, and, finally, removes the sidewalls and etches a trench filled with dielectric to isolate devices.
U.S. Pat. No. 5,399,507 issued to Sun also describes a method and structure for forming bulk and SOI regions on a single substrate. The method starts with blanket SOI (formed by SIMOX) and then etches away the silicon and buried substrate layer down to the silicon substrate. At this step of the method, the structure is similar to the structure disclosed by Ahn in that the structure has an exposed bulk silicon region at a different level than the top of the SOI region. Sun goes further, however, and places a sidewall on the etched opening then uses selective epitaxial growth on the silicon which is a continuation of the single crystal silicon. The epitaxial growth continues up to the surface of the SOI region so that the region is planar. Sun may also use a planarizing step to ensure that the two regions are on the same plane. Sun fails either to improve the patterned implants or to remove any defect regions which may exist.
U.S. Pat. No. 6,255,145 to Ajmera, et al. provides a process for forming a planar SOI substrate comprising a patterned SOI region and a bulk region, in which the substrate is free of transitional defects. The process disclosed in Ajmera, et al. comprises removing the transitional defects by creating a self-aligned trench adjacent the SOI region between the SOI region and the bulk region.
U.S. Pat. No. 6,724,046 to Oyamatsu discloses yet another method of forming a substrate that has SOI like and bulk like regions. This prior art method includes the steps of forming a first insulation film, a first semiconductor layer, and a second insulation film in sequence in first to third regions of a semiconductor substrate; removing the first insulation film, the first semiconductor layer, and the second insulation film in the first region and the second insulation film in the third region; selectively forming a second semiconductor layer in the first region of the semiconductor substrate and on the first semiconductor layer in the third region; and removing the second insulation film.
In view of the state of the art mentioned above, there is still a need for providing a simple method that can be used for forming a semiconductor substrate that has SOI like regions and bulk like regions. Also, there is a need for providing a method of forming a dual depth SOI substrate.

Patterning SOI with silicon mask to create box at different depths


An RF power package includes a substrate having a metallized part and an insulating part, an RF power transistor die embedded in or attached to the substrate, the RF power transistor die having a die input terminal, a die output terminal, an input impedance and an output impedance, a package input terminal formed in the metallized part or attached to the insulating part of the substrate, a package output terminal formed in the metallized part or attached to the insulating part of the substrate, and a first plurality of planar tuning lines formed in the metallized part of the substrate and electrically connecting the die output terminal to the package output terminal. The first plurality of planar tuning lines is shaped so as to transform the output impedance at the die output terminal to a higher target level at the package output terminal.

Impedance matching is needed in RF power packages for moving the very low impedance of the power transistors to higher impedances so as to facilitate customer matching. Wire bonds are conventionally used for impedance matching/transformation, by changing impedances to different levels. Wire bonds are complex and expensive to implement, especially for tight tolerances required for low impedance matching. Wire bonding also requires special precise equipment and assembly procedures. It is difficult and costly to achieve and maintain consistent bonding and hence performance across many parts/wafers, and low-loss wire bond materials like gold are expensive. Hence, there is a need for an alternative impedance matching/transformation solution for RF power packages.

RF power package having planar tuning lines


A system and method for replaying writes in a replication log is provided. The replay of writes in the replication log can begin at some point after detecting an imminent overflow condition is detected. One method involves detecting the imminent overflow condition, performing a first synchronization for regions of the first volume based upon information in a first subset of the replication log, processing information in a second subset of the replication log while the first synchronization is ongoing, and performing a second synchronization for regions of the first volume based upon information in the second subset of the replication log, subsequent to the first synchronization and subsequent to processing the information in the second subset of the replication log.

1. Field of the Invention
This invention relates to replaying writes, and more particularly, to replaying writes in a replication log.
2. Description of the Related Art
A replication system typically sends application writes performed on a primary volume to a secondary volume for replication. This replication is performed in order to maintain a consistent copy of application data at the secondary volume.
Some types of replication involve application writes being queued in a replication log before an application write is sent to the secondary volume for replication. Problems may arise when the number of application writes queued in a replication log increases to an amount close to or beyond the capacity of a replication log. When this occurs, the application data within the secondary volume may become unsynchronized with the primary volume. A replay of the application writes within the replication log is then performed to resynchronize the application data between the primary and secondary volume. During a replay, the regions of the application data that differ between a primary volume and secondary volume are identified and resynchronized.
Typically, this replay process is lengthy and may consume large amounts of computing resources. In addition, the replay process may also delay the completion of subsequent application writes to a primary volume.


An autonomously controlled greenhouse cultivation system includes a fuel cell module, an environment detection and control module, and environment set-up devices. The fuel cell module includes input terminals and output terminals. After fuel and air are received through the input terminals, the output terminals supply, respectively, various environmental products, including electrical power, thermal energy, carbon dioxide, and water, which are fed to the environment detection and control module that controls the output of these environmental products and includes detection units and control units to detect and effect feedback control of illumination, temperature, humidity, carbon dioxide concentration, and water level. Each environment set-up device is arranged inside a greenhouse and is connected to the environment detection and control module to receive the environmental to set up the environment of growth in respect of illumination, temperature, humidity, carbon dioxide, and water supply of irrigation for the plants cultivated in the greenhouse.

1. Field of the Invention
The present invention relates to an autonomously controlled greenhouse cultivation system, and in particular to a control and cultivation system that is applied to an enclosed or semi-enclosed greenhouse to use fuel cells to create, in a green-energy manner, various growth environments and conditions for greenhouse plants.
2. The Related Arts
In the traditional agricultures, plants are exposed to the natural environments and are thus affected by insect damage and surrounding pollutions so that the growth environments of the plants cannot be effectively controlled and are totally rely upon the natural weather. This is quite a challenge to the agricultural people. In addition, in the traditional agricultures, the growth environments of plants are not readily controllable so that plants are easily subjected to chilling injury or diseases caused by hotness. Further, a large amount of chemical fertilizer and pesticides of stronger toxicity must be commonly used in order to improve the growth speed and suppress the occurrences of diseases and pest damages, so that the plants so cultivated, after being eaten, may cause severer threatens to human health. Thus, greenhouse cultivating is now the new trend of green agriculture for it can overcome the issues of chemical fertilizers and pesticide pollutions of the traditional agriculture.
However, in the conventional greenhouse cultivation, photosynthesis of the plants carried out inside a clean greenhouse must be taken into serious consideration and mimicking of environmental factors, such as illumination, temperature, humidity, watering and irrigation, and natural change of weather, must be carefully exercised for plants in order to allow the plants to grow normally inside the greenhouse in the same as they will outdoors. For example, the photosynthesis of plant can be expressed in chemical formula as follows: 12H2O+6CO2→C6H12O6+6O2+6H2O. In other words, plants need proper amounts of water and carbon dioxide to be converted into organic carbohydrate (C6H12O6), oxygen, and water through the photosynthetic reactions carried out by chlorophyll of the plants and illumination. This means the plants, even being cultivated in a greenhouse, still needs a proper amount of water supply and carbon dioxide of suitable concentration in order to allow the plants to carry out photosynthetic reactions in exactly the same way as if they were growing in the nature and thus ensuring normal growth of the plants. Further, the harvest of the plants can be increased, if the illumination time, the switching sequence, the light spectrum used (such as blue light and the likes), concentration of carbon dioxide, time period of application, and temperature control are properly adjusted. Some plants may provide an increase of at least 30% of the harvest. This is not achievable by the conventional greenhouse cultivation.
Thus, conventional greenhouse cultivation needs electricity supply from for example an electrical main or solar cells that are claimed to be "green energy" to serve as a power source for generating illumination that resembles the natural environment and to create environmental factors, such as temperature, humidity, and watering and irrigation by consuming a large amount of power from such an electricity supply to generate heat or supply and spray water or mist. This consumes a great amount of electrical power and such a consumption of electrical power is generally a heavy economic burden of operation cost for greenhouse cultivation that is operated with emphasis on green energy. Further, the conventional greenhouse must supply organic fertilizer for the growth of plants and allows the microorganism of the natural environments to naturally decompose the organic substance to generate carbon dioxide or employs a direct supply of carbon dioxide from a gas canister in order to maintain the sufficient concentration of carbon dioxide for the greenhouse plant to carry out photosynthesis. Consequently, besides supply of electrical power and illumination, the conventional greenhouse cultivation facility also needs to additionally prepare and supply environmental resources required for plant growth and photosynthesis in respect of the above described factors of temperature, humidity, water supply and irrigation, and carbon dioxide. It is thus difficult to integrate and use collectively the supply of environmental resources of illumination, temperature, humidity, water supply and irrigation, and carbon dioxide and individual investment must be done separately for the facility expense and unnecessary consumption of a large amount of electrical power. This leads to a complicated structure of the conventional greenhouse based plant cultivation facility of which the installation and cultivation costs are both high. The price of the agricultural product of greenhouse cultivation is thus excessively high, making it limited to a small group of high-price consumers and impossible to be popular for general consumers. This is a serious issue to be addressed for the greenhouse cultivation.
Prior art patent documents in this field are known, such as Taiwan Utility Model No. M442023, which discloses a plant cultivation system, Taiwan Patent No. 1365711, which discloses a solar energy based greenhouse, Taiwan Utility Model No. M423999, which relates to an automatic flower caring device, Taiwan Patent Publication No. 201309190, which discloses a green-energy water-saving planting greenhouse system, and Taiwan Patent Publication No. 201038190, which discloses a greenhouse or agricultural shed containing thin-film solar cells. These documents disclose facility that uses solar cells or storage batteries to provide primary power supply for supplying of electrical power to illumination of the greenhouse and also supply electrical power for the operation of equipment that converts electrical power to provide temperature, humidity, and water supply and irrigation. However, in the process of conversion, there is still a great amount of unnecessary electrical power is lost, so that the operation efficiency of the solar cells is undesirably reduced. In case that the supply of electrical power from these sources is insufficient, an additional supply of electrical power from for example the electrical main is required. This makes it not possible for the greenhouse cultivation to achieve the economic benefit of true greenhouse based high-quality agriculture.
Similarly, in the known techniques of the prior art patent documents and the above described conventional greenhouse cultivation system, besides the illumination equipment can be directly operated with the supply of electrical power from for example electrical main or solar cells, there is generally no way to directly handle the issue of supply of environmental resources in respect of for example temperature, humidity, water supply and irrigation, and carbon dioxide. Additional equipment and resources must be separately installed and provided for the supply of temperature, humidity, water and irrigation, and carbon dioxide. This leads to the same problems and shortcomings of complicated facility, high cultivation cost, and great loss caused by conversion of electrical power as those found in the conventional greenhouse cultivation systems.

Autonomously controlled greenhouse cultivation system


A method for surface modification of a fluorine resin by irradiating the surface of the fluorine resin containing a heat-resistant light-absorbing polymeric material and/or a light-absorbing material is with laser light. Surface properties of the fluorine resin molded articles, particularly adhesion and wetting properties, can be greatly improved by a simple operation with high efficiency.

Fluorine resins have such excellent heat resistance, chemical resistance and electrical characteristics that can never be obtained from other synthetic resins. However, because of their inactive surface, they have poor receptivity to adhesives, coatings or inks and are thus difficult to combine with other materials. Several surface treating method have hitherto been proposed for activating the surface of fluorine resins as disclosed, for example, in (1) E. R. Nelson, et al., Ind. Eng. Chem., 50, 329 (1958), (2) Tsunoda and Koishi, Kogyo Zairyo, 29 (2), 105 (1981), (3) Japanese Patent Publication No. 53-22108, and (4) Japanese Patent Publication No. 2-196834. Attention is now given to these known methods.
Method (1) is a current spread method. This method involves various operational problems arising from use of hazardous chemicals such as sodium metal and tetrahydrofuran. That is, (i) there is a danger of fire during the treatment; (ii) much care should be taken after the treatment in handling the waste solution containing complexes; (iii) the treating solution has a short working life; and (iv) fears are entertained as to environmental pollution. Besides, the treated surface undergoes a great reduction in adhesion when exposed to sunlight or heat for a long time.
Method (2) is disadvantageous in that the effect of the surface treatment on a fluorine resin is considerably lower than that obtained on polymers containing no fluorine, such as polyethylene.
Method (3), which forms unevenness on the surface of a fluorine resin, does not produce any functional group, so that the effect of surface modification is insufficient for application of adhesives having low fluidity. Further, the surface unevenness is readily lost by friction so that care should be taken in handling. Furthermore, since an apparatus to be used for the surface modification includes the vacuum system, it is large scale and the treatment speed is slow, resulting in poor productivity. In addition, a resinous component resulting from etching tends to be deposited on inner walls of the apparatus.
Method (4) uses B(CH.sub.3).sub.3 or Al(CH.sub.3).sub.3 so that the laser light irradiation should be conducted in a closed system or a reduced pressure system. As a result, the apparatus to be used is large scale, resulting in poor productivity. Moreover, these gases are highly toxic, restricting the working environment and requiring much care in handling.
In addition, since a fluorine resin generally has a very low absorption coefficient to ultraviolet and visible light, it is very difficult to induce a surface chemical reaction even when irradiated with ultraviolet light of high intensity such as a KrF excimer laser beam.

Surface modification of fluorine resin with laser light


Arrays of planar solid state batteries are stacked in an aligned arrangement for subsequent separation into individual battery stacks. Prior to stacking, a redistribution layer (RDL) is formed over a surface of each wafer that contains an array; each RDL includes first and second groups of conductive traces, each of the first extending laterally from a corresponding positive battery contact, and each of the second extending laterally from a corresponding negative battery contact. Conductive vias, formed before or after stacking, ultimately couple together corresponding contacts of aligned batteries. If before, each via extends through a corresponding battery contact of each wafer and is coupled to a corresponding conductive layer that is included in another RDL formed over an opposite surface of each wafer. If after, each via extends through corresponding aligned conductive traces and, upon separation of individual battery stacks, becomes an exposed conductive channel of a corresponding battery stack.

FIG. 1 is a schematic showing a typical IMD 100, which is suitable for therapy delivery, implanted at a subcutaneous pectoral site in a patient 102. FIG. 1 illustrates IMD 100 including a hermetically sealed and biocompatible canister 104, for example, formed from a Titanium alloy, which houses a power source and electronic circuitry, and one or more electrical leads 106, which are coupled to the circuitry and extend distally from canister 104, through the venous system 110 and into the heart 108 of patient 102, for example, the right ventricle (RV). Those skilled in the art understand that the one or more leads 106 preferably include sensing and therapy delivery electrodes, which are coupled to the IMD circuitry via one or more lead connectors that terminate elongate insulated conductors of the electrodes, at a proximal end of lead(s) 106; the one or more lead connectors are plugged into a connector module 105, which is mounted on canister 104, to make electrical contact with the contained IMD circuitry via hermetically sealed feedthroughs.
FIG. 2 is a simplified circuit diagram of a portion of power source circuitry that may be employed by IMD 100. In particular FIG. 2 illustrates a plurality of batteries 22 in combination with switching circuitry 24, which may form one of a number of battery modules selectively connected in either a parallel or a series configuration and employed by the power source to store and discharge energy for pacing and/or defibrillation therapy, for example, through lead(s) 106 (FIG. 1). FIG. 2 further illustrates switching circuitry 24 including a solid state switch 241 and a switch driver unit 243 that receives trigger pulses, for example, from sensing circuitry (not shown), and, in response, provides a voltage output to cause switch 241 to conduct for discharge of the power source.
Each of batteries 22 may be a planar solid state type, for example, like a battery 32 shown in FIGS. 3A-B. United States Patent Application Publication No. 2006/0129192 and commonly assigned U.S. Pat. No. 6,782,290 describe, to different degrees, the general construction of exemplary planar solid state batteries and the arrangement of such batteries in modules or stacks, as a means to create a more compact/higher density power source in implantable medical devices. However, there is still a need for improved stack configurations and methods facilitating more efficient fabrication of relatively high density power sources from a plurality of solid state planar batteries.

Power sources suitable for use in implantable medical devices and corresponding fabrication methods


An optical time domain reflectometer (OTDR) launches an optical pulse emitted from a pulse light source to one end side of an optical fiber, receives light returning to the one end side with an optical receiver, inputs an output signal of the optical receiver to an A/D converting unit so as to convert the signal to an N bit (N is the plural number) digital signal, implements a process for the N bit digital signal, and measures the transmission characteristics of the optical fiber. The A/D converting unit has the number of bits that is greater than the N bits by the number of A bits, wherein A is an integer greater than “0”. The A/D converting unit converts an input signal to an N+A bit digital signal, and compresses the N+A bit digital signal to N bit data.

1. Field of the Invention
The present invention relates to a technique for reducing the noise occurring in an A/D converting process, in an optical time domain reflectometer (OTDR) for measuring the transmission characteristics of an optical fiber from its one end side.
2. Description of the Related Art
Conventionally, an optical time domain reflectometer (OTDR) 10 shown in FIG. 5 has been used for measuring the transmission characteristics of an optical fiber from its one end side.
This OTDR 10 launches an optical pulse emitted from a pulse light source 11 to one end side of an optical fiber 1 as a target object to be tested, through an optical coupler 12 and a port 10a. The OTDR receives the light (backscattered light or Fresnel reflection, etc.) returning to the one end side of the optical fiber 1 in response to the optical pulse, and transmits the light through the optical coupler 12 to an optical receiver 13. An amplifier 14 amplifies an output signal of the optical receiver 13, and inputs the amplified signal to an A/D converter 15. The A/D converter converts the signal to a digital signal having a predetermined number N of bits.
A memory 16 stores a series of digital signals obtained in a predetermined time period beginning from the launch of the optical pulse to the optical fiber 1 until the elapse of a predetermined period of time. A display unit 17 displays waveform data on its display screen, based on the stored N bit digital signals, as shown in FIG. 6. The displayed waveform data gives the attenuation characteristics at each position along the optical fiber 1 or the connection loss.
A controller 18 controls the emission timing of the optical pulse from the pulse light source 11, controls the gain of the amplifier 14, controls the sampling time of the A/D converter 15, and controls the address specification of the memory 16. Further, the controller 18 implements a calculation process (logarithmic process, etc.) for N bit data so as to generate waveform data to be displayed by the display unit 17.
For example, Japanese Patent No. 3002343 discloses the OTDR having the above configuration.
The A/D converter 15 of the thus formed OTDR 10 outputs a voltage in the range of 0 to 1023 mV, for example, where N=10 and a 1 bit equivalent voltage Vr is 1 mV, thus having a dynamic range of 1000 times. However, such the dynamic range of the A/D converter 15 is insufficient by itself for a high optical feedback from a near end of the optical fiber 1 and a low optical feedback from a far end thereof. Therefore, the amplifier 14 amplifies the output signal of the optical receiver 13 using its variable gain, and inputs the signal to the A/D converter 15.
That is, the dynamic range is increased, by decreasing the gain of the amplifier 14 with respect to a high optical feedback from the near end of the optical fiber 1 and by increasing the gain of the amplifier 14 with respect to a low optical feedback from the far end thereof.
The level of Fresnel reflection is greater than that of the backscattered light at least by 40 dB. Because the level of the Fresnel reflection rises so suddenly, it may be difficult to adjust the gain of the amplifier 14 so as to suitably respond to the level of this Fresnel reflection. At this time, an excessive signal which is greater than the maximum input value (2N−1)Vr in the design is input to the A/D converter 15.
When this excessive signal is input, some A/D converter may output a wrong digital signal. Particularly, pipeline A/D converters may output large noise n in the downward direction, as shown by a broken line of FIG. 6. This noise remarkably interferes the measurement. Flash-type A/D converters do not output such noise. However, flash-type A/D converters use a larger amount of power than that used by the pipeline A/D converters, and are expensive, thus are not commonly available or adopted.
One method for preventing the occurrence of the noise in the pipeline A/D converter is to decrease the entire level of the signal to be input to the A/D converter. However, this method involves deterioration of the S/N ratio, and results in a difficulty in analysis of particularly the characteristics of the far end.
Another possible method is to use some A/D converter whose maximum input voltage is larger. In this case however, the number N of bits of output data inevitably needs to be increased in order to obtain required voltage resolution. In addition, it is necessary to newly design following circuits (memory 16 and controller 18) which handle the output data. As a result, this method causes a new problem that the current resources (such as the hardware, software, etc.) cannot be reused.


Presented are methods for forming a predetermined pattern in a predetermined area of an elongated sheet material. The methods include applying a two-dimensional tension to a portion including the predetermined area of the sheet material, and allowing a flat reference surface to adsorb a rear surface portion corresponding to the predetermined area of the sheet material applied with the two-dimensional tension. The methods then illuminate an energy beam corresponding to the pattern to the predetermined area of the sheet material adsorbed to the reference surface.

1. Field of the Invention
The present invention relates to a pattern forming device, a pattern forming method, and a device manufacturing device, and more particularly, to a pattern forming device and a pattern forming method of forming a pattern in a plurality of areas of a surface of an elongated sheet material through a scanning exposure, and to a device manufacturing method of manufacturing an electronic device by using the pattern forming method.
2. Description of Related Art
The size of a flat display panel such as a liquid crystal display panel and a plasma display panel has been increased. For example, in the case of the liquid crystal display panel, as a glass substrate (large substrate) used for the manufacture thereof, a large substrate of which the length of a side is more than 3 m is used in order to efficiently manufacture a plurality of displays as a whole. For this reason, a stage device for holding the substrate increases in size in accordance with an increase in size of the substrate. In the stage device for treating a substrate weighing several tens of kg, the weight of a movable portion is almost equal to 10 tons, and the entire weight of the device exceeds 100 tons. For this reason, in the near future, the manufacture and the delivery of the substrate can be difficult due to a further increase in size of the substrate. In addition, it is certain that a large amount of investment is necessary for the infrastructure improvement due to a further increase in size of the stage device.
Meanwhile, there is known an exposure device which is mainly used in the field of manufacturing a printed interconnection substrate, and a roll-sheet-like recording medium is set as an exposure target object. When such an exposure device is applied to manufacture, for example, a liquid crystal display element, various problems caused by an increase in size of the above-described glass substrate can be solved. For this reason, this exposure device can be used as one of the exposure devices for manufacturing the liquid crystal display element in the future.
As the existing exposure devices for a sheet-like recording medium, for example, there are known exposure devices disclosed in Patent Documents (U.S. Pat. No. 5,652,645, US Patent Application Publication No. 2006/0066715, U.S. Pat. No. 6,243,160). However, even when such exposure devices are directly used to manufacture the liquid crystal display element, it is difficult to manufacture the liquid crystal display element with desired precision. For example, in the liquid crystal display element, patterns are overlapped in a plurality of layers through an exposure. However, since each of the layers is subjected to a process, a phenomenon arises in that the sheet is contracted by heat or the like. Accordingly, such a phenomenon needs to be handled.

Pattern forming device, pattern forming method, and device manufacturing method


An interconnect switch provides full PCI compatibility while increasing performance via concurrency. The switch contains a primary bridge on a primary port. Secondary ports of the switch can be connected to secondary bridges and end devices. The switch can shadow registers associated with the secondary bridges. A transaction with a target address behind a secondary bridge is directly routed to the secondary port associated with the secondary bridge, using the shadowed registers. A transaction with a target address not behind a secondary bridge is routed to each of the other secondary ports. The transaction can be broadcast to all of the non-bridge secondary ports or can be routed successively to each of the non-bridge secondary ports until accepted. A tuning process can use positive acknowledgment of a transaction by an end device connected to a secondary port to directly route similar transactions to the same secondary port.

1. Field of the Invention
The present invention relates to computer interconnect architectures and in particular to a technique for providing a concurrent switch interconnect while maintaining compatibility with existing interconnect protocols.
2. Description of the Related Art
Conventional computer systems have used interconnect busses such as Peripheral Component Interconnect (PCI) busses to connect multiple devices to the computer system. In many configurations, bridges are used to segment a single logical interconnect system into multiple bus segments. Recently, the availability of switching technology has introduced devices, such as crossbar switches, which can be placed between two interconnect bus segments similar to a PCI-PCI bridge, providing compatibility with the PCI interconnect specification, but providing a concurrent switch interconnect.
However, to maintain compatibility with the PCI specification, conventional switches have needed to include significant resources in a routing engine of the switch, increasing design complexity and cost of chip design, and decreasing the performance of the switch. System designers have desired a way to provide the advantages of a switched interconnect without the high complexity of current switches, while maintaining compatibility with existing interconnect protocols.


In some embodiments, in a method, a layout of a circuit is received. A netlist with indicated pattern density (PD)-dependent mismatch elements associated with different PDs, respectively, is generated using the layout. A simulation on the netlist is performed such that when the PD-dependent mismatch elements are modeled in the simulation, corresponding model parameters of the PD-dependent mismatch elements are generated using variation distributions with different spreads.

As technology scaling advances, process variations that cause non-uniformity in device performance become more pronounced. Among them, spatial variations resulted from, for example, different distances between patterns of devices, are modeled by a device mismatch model. The device mismatch model is employed in a post-layout simulation performed to ensure functionalities of the design, and evaluate and improve performance of the design.

Pattern density-dependent mismatch modeling flow

TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.


A light field sensor for a 4D light field camera has a layer of nanoscale resonator detector elements, such as silicon nanoshells, below a layer of dielectric microlenses. By taking advantage of photonic nanojets in the microlenses and circulating resonances in nanoshells, the light field camera sensor achieves improved sensitivity, pixel density, and directional resolution even at large angles of incidence.

A traditional camera captures a projection of the light field into a two-dimensional sensor plane. The image represents the intensity of light falling on each photosite in the sensor, and all angular information about the light is lost. For example, as shown in FIG. 1A, a traditional camera is focused such that one point 100 on the front focal plane 102 corresponds to one point 104 on the sensor plane 106. The light intensity from points 108 and 110 on other planes is spread over a larger area 112 (i.e., multiple photosites) on the sensor 106, causing objects in other planes to appear blurry. Points 108 and 110 in front of or behind the front focal plane can produce overlapping intensity distributions, and sharp focus is difficult to recover after the image has been captured. However, if the angular information of the incident light at the sensors could be preserved (i.e., capturing the 4D light field), the position of points not sitting in the front focal plane could be computed, and the image could be refocused after the fact. In addition, multiple views of the same scene could be reconstructed from a single exposure for use in 3D images and multi-perspective panoramas. Such techniques are useful in a number of commercial systems both for scientific imaging and consumer applications.
A number of modifications to traditional cameras have been proposed to capture the 4D light field in order to enable these novel photographic techniques. These include multiple lenses that offer slightly different views of a scene, stacked gratings above the image sensor that use Talbot pattern shifts to determine the angle of incidence of light from changes in light intensity on a photosite, and microlenses at the camera's rear focal plane that separate light from different angles onto different photosites. FIG. 1B illustrates this last approach, where incident rays 124 upon the sensor are focused on different photosites 122 by microlenses 120 just in front of the sensor plane.
In all of these cases, the cost of capturing additional angular information from the light field is a reduction in the number of pixels in the final image, a reduction in the amount of light falling on each photosite for a given exposure time, or both. More specifically, light-field cameras that use microlenses face the challenges of precise alignment of the microlenses with the sensor and aperture matching between the camera main lens and the microlens array. Current light field cameras face a trade-off between directional resolution and spatial resolution, and all designs suffer from slower shutter speeds due to light loss. The need for light-field sensors with high sensitivity and high photosite density is clear.

The Board of Trustees of the Leland Stanford Junior University


A video display control system comprises a display for the video signal, a vertical zoom circuit for generating from the video signal a picture having a vertical height greater than the display, and, a vertical panning circuit for displaying a selected portion of the picture on the display by generating a time delay relative to a vertical synchronizing component of the video signal. A counter and comparator measure the respective durations of successive fields of the video signal and the time delay. A circuit responsive to the comparing means generates a first signal for initiating delayed reset pulses when a field of the video signal and the time delay match in duration. Another circuit generates a second signal for initiating the delayed reset pulses in accordance with the vertical synchronizing component. A gating circuit selects the first initiating signal as an output, if present, and selects the second initiating signal as an output absent detection of the first initiating signal. A further counter generates the delayed vertical reset pulses responsive to the output selected by the gating circuit.

The invention relates to the field of televisions having multiple picture displays for asynchronous video signals, and in particular, to such televisions having a wide display format ratio screen. Most televisions today have a format display ratio, horizontal width to vertical height, of 4:3. A wide format display ratio corresponds more closely to the display format ratio of movies, for example 16:9. The invention is applicable to both direct view televisions and projection televisions.
Televisions having a format display ratio of 4:3, often referred to as 4.times.3, are limited in the ways that single and multiple video signal sources can be displayed. Television signal transmissions of commercial broadcasters, except for experimental material, are broadcast with a 4.times.3 format display ratio. Many viewers find the 4.times.3 display format less pleasing than the wider format display ratio associated with the movies. Televisions with a wide format display ratio provide not only a more pleasing display, but are capable of displaying wide display format signal sources in a corresponding wide display format. Movies "look" like movies, not cropped or distorted versions thereof. The video source need not be cropped, either when converted from film to video, for example with a telecine device, or by processors in the television.
Televisions with a wide display format ratio are also suited to a wide variety of displays for both conventional and wide display format signals, as well as combinations thereof in multiple picture displays. However, the use of a wide display ratio screen entails numerous problems. Changing the display format ratios of multiple signal sources, developing consistent timing signals from asynchronous but simultaneously displayed sources, switching between multiple sources to generate multiple picture displays, and providing high resolution pictures from compressed data signals are general categories of such problems. Such problems are solved in a wide screen television according to this invention. A wide screen television according to the various aspects of this invention is capable of providing high resolution, single and multiple picture display, from single and multiple asynchronous sources having similar or different format ratios, and with selectable display format ratios.
Almost all video products currently available to consumers have a format display ratio of 4.times.3, whereas the format display ratio of video production varies widely. If an aspect ratio greater than 4.times.3 is used for video production, an aspect ratio conversion must be performed before display on a consumer television or picture distortion will occur. One method of aspect ratio conversion is known as letterboxing. Letterboxing maintains more (or all) of the horizontal information, at the expense of the number of displayed lines in each field. A video source produced in the 16.times.9 format would contain 181 lines of video each field when converted to a 4.times.3 letterbox format. The extra lines that are not used in each field can be set to a flat field black (or gray) level. Higher aspect ratio sources would contain proportionally fewer lines per field.
A wide screen television, as described herein for example, can have a format display ratio of 16.times.9. This provides an opportunity to display signals in the letterbox format with greater flexibility. Letterbox signals that were originally produced in the 16.times.9 aspect ratio may be zoomed, that is expanded, vertically to fill the screen, with no loss of horizontal information or distortion. An automatic letterbox detector can be based on the assumption that the video signal will have no active video, that is, a substantially constant luminance value not higher than a threshold value. Alternatively, letterbox detection can be accomplished by calculating two gradients for each line in the video field. The first gradient, designated the positive gradient, is formed by subtracting the minimum value of the previous line from the maximum value of the current line. The second gradient, designated the negative gradient, is formed by subtracting the minimum value of the current line from the maximum value of the previous line. Either of the gradients may have positive or negative values depending on scene content, but the negative values of both gradients may be ignored. If either gradient has a positive value which exceeds a programmable threshold, video is considered to be present on either the current line or on the previous line. These register values can be used by a microprocessor to make a determination of whether or not the video source is in the letterbox format. In yet another alternative, not illustrated in the drawings, the automatic letterbox detector may comprise a circuit for decoding a code word or signal carried by a letterbox signal source which identifies the signal as letterbox format.
An automatic letterbox detector can form part of a vertical size control circuit. The vertical size control circuit comprises a letterbox detector and a vertical display control circuit. The vertical blanking and vertical reset pulses can be transmitted as separate signals or as a single three level signal. The automatic letterbox detection circuit can automatically implement vertical zoom or expansion of the 4.times.3 format display ratio signal which includes the 16.times.9 format display ratio letterbox display. When the output signal becomes active, the vertical deflection height is increased by 4/3, which enables the active video portion of the letterbox signal to fill the wide screen without image aspect ratio distortion.
The vertical display control circuit also controls which part of the overscanned raster will be displayed on the screen, a feature referred to as vertical panning. If the vertically overscanned video signal is not in letterbox format, the conventional display format picture can be zoomed, that is expanded, to simulate a wide screen format. In this case, however, the portions of the picture cropped by the 4/3 vertical overscan will contain active video information. It is necessary to vertically crop 1/3 of the picture. Absent further controls, the top 1/6 and bottom 1/6 will always be cropped. However, picture content may dictate that more of the top than the bottom of the picture is better cropped, or vice versa. If all action is at ground level, for example, a viewer might prefer to crop more sky. A vertical panning capacity enables a choice as to which part of the zoomed picture will be shown and which part will be cropped. This is accomplished in the wide screen processor by the generation of a vertical reset pulse that is delayed by a variable amount from the leading edge of a processed vertical synchronizing pulse, referred to as Vsync.. This vertical reset pulse is then used by the chassis to initiate a vertical retrace. Since the video output of the wide screen processor is not delayed, a vertical panning feature may be created by the appropriate manipulation of vertical blanking and vertical reset pulse delay.
A vertical reset generating circuit can comprise a video line counter and comparator. The inputs to comparator are the output of the line counter and a delay setting in terms of video lines, which corresponds to a desired pan value. If it is desired to pan the video up (which can also be thought of as scrolling the video down) by a slight amount (for example, 4-5 lines), the vertical reset pulse is actually delayed from vertical sync by 262.5 lines (the number of lines per field in an interlaced NTSC system) less the pan value. This difference is the delay setting, or delay value. Whenever the output of the counter matches the delay setting, a start reset signal can be generated.
One problem that is encountered when vertical panning is used occurs during special effects mode of VCR playback. In fast forward mode of a VCR, due to the non-standard nature of the linear tape speed, the number of lines in a field decreases by a number which is dependent on recording mode (SP, LP or SLP) and the linear tape speed. A nominal number of lines per field contained in fast forward mode of VCR playback (SP mode) for this discussion is assumed to be 253.5 lines. If the desired panning value is down by 5 lines, the delay setting would be 262.5 lines-5 lines=257.5 lines. However, a new Vsync occurs every 253.5 lines, resetting the line counter, During this mode, a vertical reset will not occur because the counter will be continually reset without ever reaching the desired delay value, causing a collapse of the vertical raster and possible tube damage.


An exchanger for a pool, large storage tank, or pond is described herein. In one embodiment, the exchanger includes a diffuser hub, exchanger extension arms that extend radially outward from the diffuser hub, one or more exchanger rings that intersect with the heat exchanger extension arms, and a fill tube that extends to the diffuser hub. One or both of the heat exchanger arms and/or the exchanger rings include fluid apertures that direct fluid into the pool. Fluid pumped into the fill tube may flow through into the diffuser, through the exchanger extension arms and/or the one or more exchanger rings, and out through the fluid apertures at various locations into the pool. As such, heated fluid, or fluid to be mixed, for example, may be more evenly and quickly distributed into the pool.

Pools or ponds may be embodied in a variety of configurations and sizes. Some pools are round with metal segmented sides, while others may be formed having oblong, crescent, circular, oval, half-moon, semi-circle or irregular rounded shapes. Still others may have rectangular, square, rounded square, trilateral, quadrilateral, or other multiple-sided, regular or irregular shapes. The sides may be rigid or collapsible, temporary or permanent. The pools or ponds may be above ground, underground, or in ground.
Such pools or ponds may be used to provide storage for fluid at various locations, such as at drilling sites for oil and gas wells, manufacturing facilities, warehouses, user facilities (e.g., biodiesel storage for farms), trans loading facilities, municipal and public works locations, etc.


A hydrocarbon distillate fraction is hydrotreated in a single stage by passing the distillate fraction downwardly over a stacked bed of two hydrotreating catalysts. The catalyst in the upper bed contains 0.1 to 15% by weight of platinum and/or palladium and also contains 2 to 40% by weight of at least one of tungsten, chromium, a Group VIIB metal, and an actinium series metal supported on an acidic refractory oxide carrier. The catalyst in the lower bed contains 1 to 15% by weight of a non-noble Group VIII metal and 1 to 25% by weight of a Group VIB metal on an amorphous, refractory oxide carrier. The liquid hydrocarbon product recovered has a reduced content of aromatics and a reduced heteroatom content.

Stacked bed hydrotreating processes are known in the art. For instance, in European Patent Application No. 0,203,228 a single stage hydrotreating process is disclosed, wherein certain hydrocarbon oils having a tendency to deactivate hydrotreating catalysts by coke formation are passed over a stacked bed of two hydrotreating catalysts in the presence of hydrogen. The stacked bed comprises an upper zone containing a hydrotreating catalyst comprising a Group VIB metal component, a (non-noble) Group VIII metal component and phosphorus supported on an inorganic oxide carrier and a lower zone containing a similar hydrotreating catalyst but with no or hardly any phosphorus.
In UK Patent Application No. 2,073,770 a process is disclosed for hydroprocessing heavy hydrocarbon feedstocks, wherein the feedstock is contacted with two hydroprocessing catalysts, suitably arranged in a stacked bed configuration, which catalysts have different pore size distributions. Each catalyst comprises a refractory ceramic oxide support and as hydrogenation component one or more components of Group VIB metals and (non-noble) Group VIII metals. Promoters, such as phosphorus and titanium oxide, may also be present. Suitable heavy feedstocks are those exemplified by deasphalted atmospheric and vacuum residues, vacuum gas oils and mixtures thereof. Suitably, the process is operated under hydrocracking conditions with the carrier of the upper zone catalyst (e.g. alumina) being less acidic than the lower zone catalyst (e.g. silica-alumina).
A stacked bed process is also disclosed in U.S. Pat. No. 4,913,797. In the process disclosed, a hydrocarbon feed containing waxy components and sulfur- and nitrogen-containing compounds is first subjected to hydrotreatment and subsequently to a dewaxing treatment. The catalyst used in the hydrotreatment stage is a conventional hydrotreating catalyst, while the catalyst used for dewaxing suitably comprises a noble metal supported on a zeolite beta carrier. Between both stages a purification treatment may be carried for removing sulfur and nitrogen compounds from the hydrotreated effluent. The process may be carried out in a stacked bed mode with a bed of the hydrotreating catalyst on top of a bed of the dewaxing catalyst.
Dedicated hydrocracking processes which may be carried out in a stacked bed mode are also well known in the art. Examples of such processes are disclosed in European Patent Applications Nos. 0,310,164; 0,310,165; 0,428,224 and 0,671,457 and in U.S. Pat. No. 5,112,472. The catalysts used in these hydrocracking processes all comprise at least one hydrogenation component of a Group VIB and/or Group VIII metal supported on various carriers. However, these processes do not normally involve the use of noble metal-based catalysts, while in all processes a substantial part of the hydrocarbons boiling above 370.degree. C. is converted into lower boiling material.
Although many of the prior art hydrotreating processes employing a stacked bed configuration perform satisfactorily in terms of reducing the content of sulfur and nitrogen species present in the feed, there is still room for improvement and in particular in terms of reducing the content of aromatic species present in the feed. Particularly from an environmental viewpoint it is highly desired to reduce the content of aromatics as much as possible. Aromatic compounds reduction may furthermore also be desirable for reaching certain technical quality specifications, such as cetane number in the case of automotive gas oils and smoke point in the case of jet fuels. The present invention therefore aims to provide a process wherein hydrocarbon distillate fractions ranging from naphtha to gasoils are effectively hydrotreated in a single stage by employing a stacked bed configuration, thereby significantly reducing both the aromatics content and the content of sulfur and nitrogen species present in the feed without substantial hydrocracking occurring.

Single stage, stacked bed hydrotreating process utilizing a noble metal catalyst in the upstream bed


An incorrect label removal system is disclosed for removing unwanted labels from a web of labels in a labeling machine. The incorrect label removal system includes a label peel assembly positioned between two fixed points along the direction of travel of the web of labels. The label peel assembly provides a first orientation in which labels remain on the web as the web passes the label peel assembly, and selectively provides a second orientation in which labels are removed from the web. The label peel assembly provides that a length of the web between the two fixed points is substantially the same when the label peel assembly is in each of the first orientation and the second orientation.

The invention relates to labeling machines in which labels are continuously or intermittently transferred from a web to articles, and relates in particular to labeling machines in which labels are checked and, if necessary, redirected so that unwanted labels are not applied to articles.
For example, U.S. Pat. No. 3,772,123 discloses a label reject mechanism for a labeling machine that includes a pinch wheel on an actuated arm that selectively engages incorrect labels between the pinch wheel and a rotating wheel, preventing them from being applied to a vacuum actuator drum.
U.S. Pat. No. 5,405,482 discloses a labeling machine that includes a label scanning unit for scanning labels on a web, as well as a label removal unit that includes a single freely rotating roller. If an incorrect label is detected by the label scanning unit, then the incorrect label is removed from a rotating label applicator drum by having the label removal unit advance the roller into contact with the adhesive side of the incorrect label on the applicator drum. The incorrect label would then be removed from the roller.
U.S. Pat. No. 6,841,018 also discloses a labeling machine including a label reconciliation device that selectively advances actuating arm that terminates in a roller toward incorrect labels while on a vacuum drum 7. The reconciliation device further includes a reject label web onto which rejected labels are applied so that they are removed from the label application assembly.
U.S. Pat. No. 6,450,227 discloses a labeling machine that includes a label check station having an actuator for moving a casing from a rest position that does not interrupt the normal direction of flow of a web of labels to a working position that changes the direction of flow of the web of labels so that the incorrect label may be directed off of the web and onto a rotating reject label core.
Conventional label reject systems, however, generally either remove labels from an applicator drum, or change the direction of travel of a web prior to reaching an applicator stage. Changing the direction of travel of a web to remove labels typically changes the path length of web in order to remove the rejected label from the web. Even small changes in a path length, however, can adversely affect the performance of a labeling machine that relies on high speeds and precision timing.
There is a need, therefore, for an improved label removal system that more efficiently and effectively removes labels from a web.

System and method for removing incorrect labels from a web of labels


A method for manufacturing a screen for a cathode ray tube is provided comprising the steps of forming a first phosphor layer through coating a phosphor slurry containing a first phosphor, polyvinyl alcohol having a polymerization degree of 1,500 to 2,000 and distilled water on the inner surface of a panel, drying, exposing and developing the first phosphor layer, and then forming a second phosphor layer through coating a phosphor slurry containing a second phosphor, polyvinyl alcohol having a polymerization degree of 1,500 to 2,000 and distilled water on the surface of the first phosphor layer, drying, exposing and developing the second phosphor layer; wetting the surface of the first and second phosphor layers with distilled water; and forming a third phosphor layer through coating a phosphor slurry containing a third phosphor, polyvinyl alcohol having a polymerization degree of 500 to 600 and distilled water on the surface of the first and second phosphor layers, drying, exposing and developing the third phosphor layer.

The present invention relates to a method for manufacturing a screen for a cathode ray tube, and particularly to a method for manufacturing a screen for a cathode ray tube in which emitting luminance is enhanced through enhancing the smoothness and compactness of the screen.
Generally, a screen, called a phosphor layer, for a cathode ray tube is manufactured through coating a slurry containing red, green or blue emitting phosphors on the inner surface of a panel, carrying out drying, exposing and developing processes, and then coating the remaining two phosphors in a predetermined dot or stripe pattern and in the same manner as described above. A thin aluminium layer is formed at a predetermined distance from the surface of the thus-obtained screen.
The prior art pattern-forming process of the phosphor layer will be described in detail with reference to the attached FIGS. 1A-1C.
Phosphor slurry is prepared by dispersing phosphors in a mixture of polyvinyl alcohol having a polymerization degree of 1,500 to 2,000 and a saponification degree of 80 to 90 mol % and, playing the role of attaching the phosphor onto the panel surface, a photosensitive sodium dichromate, a surfactant which facilitates the mixing of water with organic materials, an acryl emulsion and distilled water. Generally, the specific gravity of the thus-obtained phosphor slurry ranges from 1.280 to 1.299, with its viscosity ranging from 31 to 45 cps.
A phosphor slurry prepared by dispersing the first phosphor, for example, a green phosphor slurry prepared by dispersing green emitting phosphors is coated on the inner surface of the panel (1), on the upper surface of the black matrix (2) and dried to give a photosensitive layer. The prescribed parts of the layer are exposed to ultraviolet light using a shadow mask. At this time, the difference of solubility in water between the exposed parts and un-exposed parts of the photosensitive layer, comes into play. Through the developing process afterward, water soluble parts are dissolved out and water resist parts remain on the surface of the panel (1) to form the first phosphor layer, for example, a green emitting phosphor layer (FIG. 1A). Following the same method as described above, the second and third phosphor layers, for example, blue (FIG. 1B) and red (FIG. 1C) emitting phosphor layers, are formed to complete the phosphor pattern of each color.
According to the above-mentioned method, the first phosphor layer is stable, however, the dot (or stripe) in the second phosphor layer accumulates to the first phosphor as illustrated in FIG. 1B, and in the third layer, correspondingly accumulates and leans toward the pre-formed first and second phosphor as illustrated in FIG. 1C. This attraction is based on moisture absorption by pre-formed layer(s). For the second phosphor, during the drying process after coating the second phosphor slurry, absorption of the moisture from the second phosphor slurry by the pre-formed first phosphor layer results in the inclination of the second phosphor toward the first phosphor side. For the third phosphor, during the drying process after coating the third phosphor slurry, absorption of the moisture from the third phosphor slurry by the pre-formed first and second phosphor layers also results in the inclination of the third phosphor toward the first and second phosphor layers and this gives a dot (or stripe) of the third phosphor having a thick periphery and a relatively thin center. Consequently, the prior art process does not provide a smooth phosphor layer and may cause hole-perforation, especially in the third phosphor layer. The uneven phosphor layer deteriorates the smoothness of an aluminium layer manufactured through the subsequent filming layer manufacturing process, aluminium deposition process and baking process. The deterioration of the smoothness of the aluminium layer means the deterioration of the ratio of mirror reflection of the layer. This ultimately results in the deterioration of emission luminance of the phosphor layer.

Method for manufacturing a screen for a cathode ray tube