Use of calibrant in extraction phase is described for quantification of components of interest in samples in laboratory application as well as in on-site monitoring. This approach is particularly useful for in-vivo investigation of living systems.

Presently, if one wants to accurately assess the concentrations of chemicals or drugs inside a living animal a sample of the blood or tissue to be studied is removed from the animal and taken to an analytical laboratory to have the chemicals of interest extracted and quantified. Typically a first step is a pre-treatment of the sample to convert it to a form more suitable for chemical extraction. In the case of blood this may be by the removal of blood cells and/or some blood components by the preparation of serum or plasma. In the case of a tissue sample this may be by many processes including freezing, grinding, homogenizing, enzyme treatment (eg. protease or cellulase) or hydrolysis. Subsequently chemicals of interest are extracted and concentrated from the processed sample. For example serum samples may be subjected to liquid-liquid extraction, solid phase extraction or protein precipitation followed by drying and reconstitution in an injection solvent. A portion of the injection solvent is introduced to an analytical instrument for chromatographic separation and quantification of the components. This method produces accurate results with high specificity for the compound of interest, but is time consuming and labour intensive. Also, because of the large number of steps in the process there is a significant chance of errors in sample preparation impacting the results. This method has good sensitivity and selectivity and accuracy for the target compounds but is limited in that the chemical balance the chemicals exist in inside the animal is disrupted during sampling. In many cases this disruption reduces the value of the results obtained, and in some cases makes this technique inappropriate for the analysis. Where the blood volume removed is a high proportion of the total blood volume of the animal, as is commonly the case when mice are used, the death of the animal results. This means that a different animal must be used for each data point and each repeat. By eliminating the need for a blood draw in this case, fewer animals would be required for testing and a significant improvement in inter-animal variation in the results would be achieved.
Alternatively biosensors have been developed for some applications in analysis of chemical concentrations inside animals. In this case a device consisting of a specific sensing element with associated transducer is implanted and produces a signal collected by an electronic data logger that is proportional to the chemicals to which the sensor responds. The main limitations of this type of device are that they normally respond to a spectrum of chemicals rather than having specificity for only one chemical. Of the spectrum of chemicals to which the sensor responds, some produce a greater and some a lesser response. Sensors are also susceptible to interferences where another chemical present in a system interferes with the response produced by the target chemicals. For these reasons biosensors are normally limited in terms of accuracy and precision. Finally biosensors are typically not as sensitive to low chemical concentrations as state of the art stand alone detectors such as mass spectrometers that are used in the above mentioned conventional analysis techniques and in solid phase microextraction. A strength of this technology is that the chemical balance in the system under study is not disturbed.
The in vivo procedure described here is a significant departure from conventional 'sampling' techniques, where a portion of the system under study is removed from its natural environment and the compounds of interest extracted and analyzed in a laboratory environment. There are two main motivations for exploring these types of configurations.
The first is the desire to study chemical processes in association with the normal biochemical milieu of a living system, and the second is the lack of availability or impracticality frequently associated with size of removing suitable samples for study from the living system. Newer approaches that extend the applicability of conventional SPME technology, where an externally coated extraction phase on a micro fibre is used, seem to be logical targets for the development of such tools. As with any microextraction, because compounds of interest are not exhaustively removed from the investigated system, conditions can be devised where only a small proportion of the total compounds and none of the matrix are removed, thus avoiding a disturbance of the normal balance of chemical components. This could have a benefit in the non-destructive analysis of very small tissue sites or samples. Finally because extracted chemicals are separated chromatographically and quantified by highly sensitive analytical instruments, high accuracy, sensitivity and selectivity are achieved.
With the current commercially available SPME devices a stationary extraction polymer is coated onto a fused silica fibre. The coated portion of the fibre is typically 1 cm long and coatings have various thicknesses. The fibre is mounted into a stainless steel support tube and housed in a syringe-like device for ease of use. Extractions are performed by exposing the extraction polymer to a sample for a pre-determined time to allow sample components to come into equilibrium with the extraction phase. After extraction the fibre is removed to an analytical instrument (typically a gas or liquid chromatograph) where extracted components are desorbed and analysed. The amount of a component extracted is proportional to its concentration in the sample (J. Pawliszyn "Method and Device for Solid Phase Microextraction and Desorption", U.S. Pat. No. 5,691,206.).
To date commercial SPME devices have been used in some applications of direct analysis of living systems. For example they have been applied for the analysis of airborne pheromones and semiochemicals used in chemical communications by insects (Moneti, G.; Dani, F. R.; Pieraccini, G. T. S. Rapid Commun. Mass Spectrom. 1997, 11, 857-862.), (Frerot, B.; Malosse, C.; Cain, A. H. J. High Resolut. Chromatogr. 1997, 20, 340-342.) and frogs (Smith, B. P.; Zini, C. A.; Pawliszyn, J.; Tyler, M. J.; Hayasaka, Y.; Williams, B.; Caramao, E. B. Chemistry and Ecology 2000, 17, 215-225.) respectively. In these cases the living animals were non-invasively monitored over time by assessing the chemical concentrations in the air around the animal, providing a convenient means to study complicated dynamic processes without interference.
The current commercial devices do, however, have some limitations for in vivo analysis inside a living animal. Firstly, the application to chemical analysis inside animals requires greater robustness in both the extraction phase and the supporting fibre core. In addition, most of the extraction phases currently available are better suited for more volatile and less polar compounds. Only one phase is suitable for liquid chromatography (LC) applications (carbowax/templated resin). Analytes of interest that typically circulate in living systems are less volatile and more polar and require LC analysis, so new or modified extraction phases are indicated. The overall dimension of the current device is typically too large for direct in vivo analysis and for direct interfacing to microanalytical systems, the time required for the LC extraction phase to come into equilibrium with chemicals in a sample is relatively long (typically 1 hr or more in a well-stirred sample) and analysis is sensitive to degree of convection in the sample. Also the present SPME devices cannot be conveniently coupled to positioning devices necessary for in-vivo investigation at a well-defined part of the living system.
It is, therefore, desirable to provide a method and a device that allows minimally invasive sampling, quantification or analysis of a biological system

Calibration procedure for investigating biological systems


The invention relates to a bearing cover (1) for a crankshaft bearing of an internal combustion engine comprising a bearing shell (2), two screw columns (3,3′), which are located on both sides of the bearing shell (2) and provided for mounting on a bearing block, and comprising a reinforcement (4) of the bearing shell (2) extending between both screw columns (3,3′). The aim of the invention is to optimize a bearing cover (1) of the aforementioned type with regard to its shape whereby attaining a high level of stability with a low weight. To this end, the reinforcement (4) is comprised of two braces (6,6′), which extend diagonally from the area of the upper ends (5,5′) of the screw columns (3,3′) to the bearing shell (2) and which have an essentially constant cross-section over the length thereof, and comprised of a rib (7) extending on the upper side of the bearing shell (2) from one brace (6) to the other (6′).

A bearing cover such as this is disclosed in DE 34 26 208 C1. For the purpose of weight reduction, this bearing cover is made of a light metal alloy into which a core of a ferrous metal material is introduced, which core is extended to the threaded channels in the area of the crankshaft bearing and also encloses these channels. The brace is configured as a transverse rib between the threaded channels forming a double T shape with the core and having two round openings on the threaded channels. Because of the core, this bearing cover is costly to manufacture and its configuration is not optimized. In particular, the connection of the transverse rib accompanied by introduction of the round openings has not been optimized from the viewpoint of force flow and material complexity and accordingly from that of weight as well.
Consequently, the object of the invention is to optimize a bearing cover of the type indicated in the foregoing with respect to its configuration, in such a way that high stability may be achieved in conjunction with low weight, especially for the purpose of manufacture with a homogeneous material.

Bearing cover for a crankshaft bearing of an internal combustion engine


The present invention provides methods of using small cyclic peptides that can inhibit or prevent skin irritation caused by proteolytic activity.

The skin acts as the body's first line of defense against infection. However, the skin can become irritated and loose its ability to defend against infection by continual exposure to proteases. For example, it was once believed that contacting the skin with urine produced diaper rash. However, it is now understood that the irritation of tissue that manifests itself in "diaper rash" is primarily caused by proteolytic and/or lipolytic enzymes that are present in human feces, for example, trypsin, chymotrypsin, elastase, and pancreatic lipase. Moreover, the causes of skin irritation are not limited to enzymes present in feces. Other biological materials including, for example, menstrual fluids, nasal fluids, colostomy fluids, dandruff, wound healing may all provide a source of enzymes that produce skin irritation.
While some proteolytic and lipolytic enzyme inhibitors are known, they often have short-lived effects and/or can irritate skin and other tissues. Hence, compositions containing naturally-occurring, stable and non-irritating protease inhibitors are needed for use in personal care items such as diapers, tampons and feminine care pads.

Compositions of sunflower trypsin inhibitors


An ion trap device includes a substrate over which at least one central DC electrode, an RF electrode and at least one side electrode are disposed. The central DC electrode includes a DC connector pad and a DC rail connected to the DC connector pad. The RF electrode includes at least one RF rail located adjacent to the DC rail and an RF pad connected to the at least one RF rail. The RF electrode is disposed between the central DC electrode and the side electrode. At least one pair of electrodes among the central DC electrode, the RF electrode and the side electrode have round corners facing each other.

The statements in this section merely provide background information related to the present disclosure and does not necessarily constitute prior art.
Quantum key distribution (QKD) systems have design considerations, the most notable of which is the maximum single travel distance of a single photon because of its attenuation while passing through an optical fiber. To increase the maximum single travel distance, signals are amplified using a quantum repeater. Ion trap is a method for implementing a quantum memory for the quantum repeater.
FIGS. 1A to 1C are diagrams illustrating the principle of a three-dimensional trap.
Ion traps are available in a number of shapes depending on the arrangement of the electrodes, including a basic form that can be implemented with a shape of field generated by four electrodes e1, e2, e3 and e4, as shown in FIGS. 1A-1C. When the electrodes e1 and e4 are grounded and a high voltage RF signal is applied to the electrodes e2 and e3 as shown in FIG. 1A, an electric field (E) is formed as shown in FIG. 1B, and the direction of the electric field (E) is continuously changed in response to the radio frequency (RF) of the applied signal. In this case, electrically charged particles are forced, on average, towards the center of the quadrangle (e.g., a square) defined by the electrodes e1, e2, e3 and e4 in FIG. 1B, when the charge amount of the electrically charged particles, mass of the electrically charged particles, strength of the electric field and the radio frequency satisfy certain mathematical conditions. The potential generated by such average force is referred to as a ponderomotive potential.
FIG. 1C is a diagram showing the shape of a ponderomotive potential cDpp formed by the electrodes e1, e2, e3 and e4. Here, the ponderomotive potential is irrelevant to the sign of a charged particle trapped by the electrodes e1, e2, e3 and e4. The potential continues to centrally attract the charged particle despite its tendency to depart from the z-axis (FIG. 1A), but the potential does not contribute to determining the location where the charged particle may be captured along the z-axis. Therefore, in order to trap the electrically charged particle at the location as in FIG. 1A, voltage is applied to satisfy the condition of V1>V2 instead of grounding the electrodes e1 and e4.
FIG. 2A is a diagram illustrating the principle of a two-dimensional trap, and FIG. 2B is a diagram illustrating the direction of a generated electric field and the ponderomotive potential caused by the generated electric field.
High precision fabrication of an ion trap device having a three-dimensional structure as shown in FIGS. 1A-1C is difficult to achieve and integration of multiple traps is also difficult to achieve in some situations. Therefore, for the sake of application to quantum information, the design of the ion trap is modified through a micro electro mechanical system (MEMS) process so as to allow fabrication of the ion trap device on a two-dimensional wafer surface. FIG. 2A illustrates a method of performing a conformal mapping of two-dimensional electrodes to a one-dimensional domain. By applying an RF voltage to thick painted sections of the circumference of a conductive circle and grounding the remainder of the conductive circle as in FIG. 2A, an electric field similar to one illustrated in FIG. 1B is formed within the circle. As illustrated in FIG. 2A, the tangents of RF electrodes defined above are extended to form sections intersecting with an underline. Then, the RF voltage is applied to the intersecting sections and the remainder is grounded, whereby an electric field similar to the one formed within the circle is established at the location where the center of the circle is positioned. FIG. 2B illustrates the direction of the electric field generated when the electrodes are one-dimensionally arranged and the ponderomotive potential caused by the generated electric field. This is achieved by applying the RF voltage to the two thick painted bar type electrodes and grounding the center section between the electrodes and opposite sections outside the RF electrodes.
With an electrode structure produced using the principle described above, electrically charged particles may be captured at the triangle mark in FIG. 2B.
A method of fabricating an ion trap device uses an MEMS-based planar ion trap chip.
An MEMS-based planar ion trap chip traps ions by using an electric field formed by a high voltage RF and a DC (direct current) voltage under Ultra High Vacuum (UHV) while applying a high potential in the range of hundreds of volts to RF electrodes. If the applied voltage is not a high level, the voltage may be applied without problem. However, breakdown is more likely to occur between the RF electrodes and the peripheral electrodes under UHV. For example, the RF electrodes and the DC electrodes are damaged when breakdown occurs between the RF electrodes and the DC electrodes, causing the ion trap chip unusable. A solution for addressing a potential breakdown includes increasing the spacing between the RF electrodes and the DC electrodes, which, however, potentially causes performance degradation of the ion trap chip.

Ion trap apparatus and method for manufacturing same

SEOUL NATIONAL UNIVERSITY R&DB FOUNDATION


A autonomous robotic golf caddy which is capable of following a portable receiver at a pre-determined distance, and which is capable of sensing a potential impending collision with an object in its path and stop prior to said potential impending collision.

Various robotic golf caddies have been developed using one or more guidance methods and a drive mechanism to automatically follow a golf player around the golf course. Non-limiting examples of motorized golf caddies are illustrated in US Publication Nos. 2017/0050659; 2015/0327638; 2015/0136506; 2013/0098700; 2010/0241290; 2010/0168934; 2009/0038864; 2008/0023236; 2003/0173122; 2003/0159864; and U.S. Pat. Nos. 8,573,338; 7,944,368; 6,404,159; 6,142,251; 5,963,150; 5,944,132; 5,711,388; 5,611,406; 5,526,894; 5,350,982; 5,180,023; 5,167,389; 4,570,732; 4,109,186; 3,812,929; 3,742,507; EP 1060091; and WO 2013059423. The various guidance systems discussed on one or more of these references use various techniques to guide such golf caddies.

This patent is subject to a terminal disclaimer.


A structure for positively retaining a journal portion of a spindle in a tube portion of a vehicle axle housing includes a transverse aperture formed through the tube portion near the outer end thereof. The aperture extends partially into the interior of the tube portion and is defined by a radius of curvature. A generally hollow cylindrical spindle is connected to the end of the tube portion. The spindle includes a journal portion which is telescopically received within the hollow tube portion. An annular groove is formed in the outer surface of the journal portion of the spindle near the inner end thereof. The groove is defined by a radius of curvature which is substantially larger than the radius of curvature defining the transverse aperture. When the spindle is inserted within the tube portion, the groove is aligned with the transverse aperture. A threaded fastener is disposed within the transverse aperture. The threaded fastener has a radius of curvature which is slightly smaller than the radius of curvature of the transverse aperture. The threaded fastener prevents the removal of the journal portion from the tube portion, thereby positively retaining the spindle within the axle housing.

This invention relates in general to axle assemblies for vehicles and in particular to an improved structure for positively retaining a spindle which is press fit into a hollow tube portion of a housing for such an axle assembly.
Axle assemblies are well known structures which are in common use in most vehicles. Such axle assemblies include a number of components which are adapted to transmit rotational power from an engine of the vehicle to the wheels thereof. These rotatable components are usually enclosed in a protective non-rotatable axle housing. Typically, the axle housing includes a central carrier portion having a pair of hollow tube portions extending outwardly therefrom. A differential is rotatably supported within the carrier portion of the axle housing, while a pair of rotatable axle shafts are enclosed within and extend through the tube portions. The differential is connected between an input drive shaft extending from the vehicle engine and the pair of output axle shafts. The axle shafts extend through the tube portions to rotatably drive wheels of the vehicle. Thus, the carrier portion and the tube portions form a housing for the axle assembly, inasmuch as the differential and the axle shafts are supported for rotation therein.
A typical axle housing further includes a pair of hollow spindles which are connected to the outer ends of the tube portions. The spindles are adapted to support the wheels of the vehicle thereon for relative rotation, usually by means of tapered roller bearings. For the sake of economy, the spindles are generally not formed integrally with the other portions of the axle housing. This is because the spindles must withstand the wear caused by supporting the vehicle wheels thereon. As a result, the spindles are usually formed from a higher grade (and, consequently, more expensive) material than the carrier portion and the tube portions of the axle housing, which are not subjected to such wear.
In non-steering axles, the spindles are directly connected to the tube portions of the axle housing. To accomplish this, the inner ends of the spindles are typically inserted telescopically within the outer ends of the tube portions. Frequently, the spindles are then permanently secured to the tube portions, such as by friction welding, so as to prevent the removal thereof. However, in some instances, it is desirable to permit removal of the spindles from the tube portions. In those instances, the spindles are typically press fit into the tube portions so as to provide a frictional engagement which prevents the removal thereof during normal operating conditions.
In those axle housings which provide removable spindles, it has been found desirable to provide a positive retainer for preventing the spindles from being removed from the tube portions under unusual operating conditions. Several positive spindle retaining structures are known in the art. However, it has been found that such known structures are relatively expensive to produce because of the amount of material required to effect a reliable retainment of the spindles or because of difficulties in manufacture and assembly. Accordingly, it would be desirable to provide an improved positive spindle retaining structure for a vehicle axle housing which simpler and less expensive to manufacture and assemble than known structures.


Provided is a polymer comprising a repeating unit represented by formula (1),

1. Field of the Invention
The present invention relates to a new polymer, a process for producing the same, a polymeric fluorescent substance thereof, and a polymer light-emitting device (hereinafter, may be referred to as "polymer LED") using the same.
2. Description of the Related Art
High molecular weight light-emitting materials and high molecular weight charge transporting materials are variously studied since they are soluble in solvents, unlike low molecular weight materials, and can be formed into light emitting layers or charge transporting layers by coating method. As the example, polyfluorene derivatives are known.

Polymer and polymer light-emitting device using the same

Abstract: wherein, A1 represents a divalent group in which the bond distance ratio (bond distance of C(α)-A1/bond distance of C(α)-C(β)) is 1.10 or more; R1, R2, R3, R4, R5, and R6, each independently represent a hydrogen atom, alkyl group, alkyloxy group, aryloxy group, arylalkyloxy group, etc. The polymer is useful as a light-emitting material, a charge transporting material, etc.


A plug connector includes a front housing, a first and a second terminal module each including an insulator insert molded with terminals. The front housing defines a rear wall, a front mating cavity opening forwards, and a plurality of terminal passageways running through the rear wall in a front and rear direction and the front housing in a vertical direction a first terminal module, The terminals comprising contacting portions received in the corresponding terminal passageways. The shell fitly encloses the front housing and the insulators. The front housing unitarily defines a plurality of protection flanges, each protection flange is located above a front end of each terminal passageway and each contacting section is located inside the protection flange thereby ensuring the contacting sections separating from the shell during the contacting sections are pushed outwards by an insertion of a mating receptacle connector.

1. Field of the Invention
The present invention relates to an electrical connector, and more particularly to a flippable plug connector used with a receptacle connector.
2. Description of Related Art
USB 3.0 Promoter Group issues a new specification which establishes a new type connector named as USB Type-C Cable and Connector, on Aug. 11, 2014. In the specification, the Type-C plug enhances ease of use by being plug-able in either upside-up or upside-down directions. The plug connector connecting with a cable defines two types, one type is USB Full-Featured Type-C Plug Interface with 22 pins, another type is USB 2.0 Type-C plug with 14 pins. The plug connector is connected to the cable via paddle card, which will enhance the whole cost of the cable connector.
Hence, a new and simple electrical plug connector and the complementary receptacle connector are desired to improve those disclosed in the aforementioned proposal.


A semiconductor device having an insulated gate bipolar transistor (IGBT) is formed on a semiconductor substrate. A base region and an emitter are formed on a first surface of the substrate while a collector layer is formed on second surface of the substrate. A region having a low breakdown voltage is formed on the first surface around the IGBT, and a carrier collecting region is formed in the vicinity of the region having the low breakdown voltage. The IGBT is prevented from being broken down due to an avalanche phenomenon, because the breakdown occurs in the region having the low breakdown voltage, and carriers of the breakdown current are collected through the carrier collecting region. The breakdown of the IGBT is further effectively prevented by forming a guard ring for suppressing electric field concentration around the region having the low breakdown voltage.

1. Field of the Invention
The present invention relates to a semiconductor device that includes an Insulated Gate Bipolar Transistor (referred to as IGBT) having a trench structure.
2. Description of Related Art
An example of the IGBT having a trench structure is disclosed in JP-A-2001-308327. In this type of IGBT, a channel density can be made larger than that in a so-called IGBT having a planar structure. In other words, a saturated voltage between an emitter and a collector (ON-voltage) can be made lower in the IGBT having a trench structure.
It has been generally known that an avalanche phenomenon tends to be caused in the IGBT at a turning-off under a high current density. If the avalanche phenomenon occurs, the IGBT may be broken by a breakdown current. Especially in the IGBT having a trench structure, there is a tendency that a breakdown current concentrates at a bottom surface of a gate trench due to concentration of electric field at the bottom surface of the gate trench, and a gate insulating film is broken. This is confirmed also by inventors of the present invention.

Semiconductor device having IGBT element


The use of quaternized polyvinylamines for use in water clarification is disclosed.

The present invention relates to the clarification of raw water for use in the industrial or domestic applications, or the clarification of wastewater for reuse or disposal. Raw water such as from rivers, lakes, or underground usually contains suspended matter. The suspended matter must be removed by clarification in order to provide water suitable for use in domestic and industrial applications. The suspended matter can consist of large solids, settleable by gravity alone without any external aid and non-settleable material, often colloidal in nature.
Removal of nonsettleable material is generally accomplished by coagulation, flocculation, and sedimentation. In combination, these three processes are referred to as conventional clarification. See the Betz Handbook of Industrial Water Conditioning, 9th edition, 1991, Betz Laboratories, Inc., Trevose, Pa., pages 23 through 30.
Coagulation is the process of destabilization by charge neutralization. Once neutralized, particles no longer repel each other and can be brought together. Coagulation is necessary for removal of the colloidal sized suspended matter. Flocculation is the process of bringing together of the destabilized, or "coagulated" particles to form a larger agglomeration or floc. Sedimentation, or settling, refers to the physical removal of particles from suspension that occurs once the particles have been coagulated and flocculated. Sedimentation alone, without prior coagulation results in the removal of only relatively coarse suspended solids.
Naturally occurring suspended particles are predominantly negatively charged. Polyelectrolytes are traditionally used for influent and wastewater clarification. For low turbidity waters, inorganic polyelectrolytes, such as alum, or organic polyelectrolytes, such as melamine formaldehydes are traditionally employed. For higher turbidity waters, high charge cationic polyelectrolytes such as polyamines formed by the condensation reaction of epichlorohydrin and dimethylamine can be used. High turbidity waters are generally considered those having a greater than 60 NTU (Nepholometric Turbidity Units). In low turbidity waters, those with less than 60 NTU, there are generally not enough particles to form a settleable floc when the water is treated with cationic polymers alone. Inorganic coagulants such as alum, aluminum sulfate, polyaluminum chloride, ferric sulfate, ferric chloride, sodium aluminate and melamine formaldehydes are used either alone or in combination with high charge cationic polyelectrolytes.
The use of inorganic coagulants tends to generate voluminous sludges which are difficult to dewater. Also, such inorganic coagulants are only effective within a particular pH range and therefore require proper pH adjustment of the water during treatment. In addition, the increase of iron and aluminum ions in the treated water from the inorganic coagulants may affect downstream operations such as cooling and boiler treatments and may also cause health and environmental concerns when the water is finally discharged. Similarly, the use of melamine formaldehyde resins can result in residual formaldehyde in the resin causing handling and disposal difficulties.
It is an object of the present invention to provide methods for clarifying water which are more effective than the use of alum, melamine formaldehyde or the reaction product of epichlorohydrin and dimethylamine.
The use of vinylamine copolymers for flocculation in water treatment is known. U.S. Pat. No. 4,217,214 discloses the use of high molecular weight polyvinylamine hydrochloride as a flocculating agent in water treating systems. Polyvinylamine hydrochloride is an ethenamine hydrochloride homopolymer, CAS Registry No. 29792-49-2.
U.S. Pat. No. 4,808,683 discloses the use of a mixture of a vinylamine copolymers of the formula disclosed therein as a flocculating agent, drainage aid and paper strength increasing agent.
U.S. Pat. No. 4,957,977 discloses the use of a mixture of vinylamine copolymers of the formula disclosed therein as a flocculating agent and a paper strength increasing agent.

Quaternized polyvinylamine water clarification agents


Embodiments of the invention provide a novel and non-obvious method, system and computer program product for securing of leased resources on a computer. In one embodiment of the invention, a computer for securing resources may comprise at least one processor, a plurality of resources, wherein each resource is associated with configuration data and a programmable logic device connected to each of the plurality of resources. The programmable logic device may be configured for determining whether a resource is leased, reading un-encoded configuration data from a resource, and sending the configuration data to a first unit, if the resource is not leased. The programmable logic device may further be configured for reading encoded configuration data from a resource, decoding the configuration data, sending the configuration data that was decoded to a first unit, and logging use of the resource by the first unit, if the resource is leased.

1. Field of the Invention
The present invention relates to the field of leased computing and more specifically to securing leased resources on a computer.
2. Description of the Related Art
Some consumers want to have the ability to use additional computing resources when the need arises but don't want to incur the initial expense of buying the additional resources. Computing resources include hard drives, memory modules, server blades, whole servers, or the like. In order to meet this need, certain vendors offer computing equipment that come with additional resources that are priced based on usage. These vendors allow clients or customers to buy or lease a computer or server with regularly usable resources in addition to a set of leased resources for which the client pays based on use. When a client uses a leased resource, he is billed for what he uses in the same way water and electricity utility customers are. This model is referred to as "demand leased" computing. The computer or server in question is managed by the client and kept at the client's location. Non-leased resources on the computer are used without restriction by the client. When leased resources on the computer are used by the client, the vendor bills the client according to usage on a periodic basis, such as monthly.
Current demand leased computer units can be configured with additional leased resources which can be activated as required by a customer. Thus, additional disabled leased resources can be activated depending on increased resource demand or a need to meet growth patterns of an information technology (IT) infrastructure of a customer. When leased resources are activated the vendor of the leased resources charges the customer accordingly for his use. There currently is no method, however, for securing leased resources in this environment.
One approach to the problem of securing leased resources in a demand leased computer unit is through software measures. Software security measures, however, are much more easily defeated than hardware measures and can't be used at all in many circumstances. It is desirable for a demand leased provider to be able to control its leased resources before the customer activates them. If a vendor's control over leased resources is weak or non-existent, the customer could potentially use the resources without paying to have them activated. Furthermore, without an effective method to tie the operation of a leased resource to a single demand leased computer unit, a customer could possibly remove the leased resource from the demand leased computer unit and use it on another computer, such as a competitor's server, without paying for its use. A leased resource that is "hijacked" in this way can be used as a regular device by another server. Thus, there are currently few precautions for preventing leased resources in a demand leased computer unit from being recognized, configured, enabled and used without any restrictions.
Thus, the need arises to solve the problems with the prior art above and specifically for a more efficient way to secure leased resources in a demand leased computer unit.

International Business Machines Corporation


A power supply control device includes a first system, a second system, an inter-system switch, a battery switch and a controller. The controller turns off an inter-system switch that connects and disconnects the systems and turns on a battery switch that connects and disconnects a second power supply to and from the second system in response to an abnormality of a first power supply or the second power supply being detected and thereafter turn on the inter-system switch and turns off the battery switch in response to determination that there is no abnormality in the power supplies. Before turning on the inter-system switch, when voltage difference between the power supplies is equal to or larger than a threshold, the controller performs convergence control, and after determining that there is no abnormality in the power supplies, the controller keeps the battery switch turned off while performing the convergence control.

In the related art, there is a redundant power supply system which has a first power supply and a second power supply so as to supply power to on-board equipment (loads) for automatic drive by one of power supply systems if a ground fault occurs in the other power supply system, such that even if a power supply fault occurs when the vehicle runs by automatic drive, the redundant power supply system enables the vehicle to perform evacuation travel to a safe place and to stop there.
The redundant power supply system has a first system for supplying power of a first power supply to a first load for automatic drive, and a second system for supplying power of a second power supply to a second load having the same function as the first load has.
Further, the redundant power supply system has an inter-system switch capable of connecting and disconnecting the first system and the second system to and from each other, and a battery switch capable of connecting and disconnecting the second power supply and the second system to and from each other.
The redundant power supply system normally keeps the inter-system switch and the battery switch in a conductive state to supply power from the first power supply to the first load and the second load, and, for example, if the voltage of the first power supply or the second power supply becomes equal to or lower than a ground fault threshold, the redundant power supply system determines a ground fault, and turns off the inter-system switch. Therefore, if a ground fault occurs in one power supply system, the redundant power supply system supplies power to the load for automatic drive by the other power supply system, thereby capable of performing backup control for running for evacuation.
In the redundant power supply system, for example, when the first load or the second load is in an overload state, even though any ground fault has not occurred, the voltages of the first power supply and the second power supply may become equal to or lower than the ground fault threshold temporally. In this case, if the redundant power supply system misjudges the occurrence of the overload state as a ground fault and turns off the inter-system switch unnecessarily, the vehicle stops automatic drive which can be normally continued, and transitions to running for evacuation.
For this reason, there is a power supply system for turning off the inter-system switch if the voltage of the first power supply or the second power supply becomes lower than a first threshold, and thereafter turns on the inter-system switch again if the voltage of the first power supply or the second power supply drops to a second threshold smaller than the first threshold within a predetermined time (see JP-A-2019-62727 for instance).
According to the power supply system, for example, even if the voltage of a power supply temporarily drops due to occurrence of an overload state, and the inter-system switch is turned off, after that, if the voltage of the power supply returns to the normal voltage, the inter-system switch is turned on again. Therefore, it is possible to minimize the automatic drive interruption time.

Power supply control device and power supply control method


A light source is incorporated into a weatherstrip or pinch strip assembly mounted on a movable panel or at the opening in a frame or panel which receives the movable panel. The light is illuminated to warn that a movable panel of a vehicle is about to close or open, is closing or opening, or that an obstruction has been encountered. The light can operate intermittently during opening or closing, and continuously when the movable panel is open.

The present invention relates to warning systems and lighting systems.
Many of today's vehicles have motor driven panels which open and close upon actuation of a switch. For example, some of today's vehicles are provided with automatic windows or automatic sliding passenger doors, as well as automatic trunks, tailgates, or hatchbacks. These panels, rather than being opened and closed manually, are automatically opened and closed through the use of a motor operatively connected to the driven panel.
In certain circumstances, while closing a movable panel from an open position, a person or object in the path of the closing panel can become injured or damaged by the panel's closing. Therefore, sensing systems have been developed to sense when an obstruction is between the movable panel and a stationary frame during closing of the panel. These sensors typically include a pair of conductive metal strips mounted within a resilient section of the sensor wherein upon closing of the panel, if an obstruction is encountered, the two conductive strips are pushed into contact with one another, thereby sending a signal to the control module to reverse direction of the motor controlling the panel.
These systems are also available with an audible warning that sounds when the close command is actuated.


The front loader includes a boom actuator configured to pivotally drive a boom along a vertical direction relative to a traveling vehicle body about a first pivot axis which is oriented along a right/left direction, a bucket actuator configured to pivotally drive a bucket along the vertical direction relative to the boom about a second pivot axis which is oriented along the right/left direction, a manual controlling section for controlling operations of the boom actuator and the bucket actuator based on a manual operation of an operational tool, a boom angle detector for detecting a vertical pivot angle of the boom, a bucket angle detector for detecting a vertical pivot angle of the bucket relative to the boom, a calculating section for calculating a ground pivot angle of the bucket based on an output from the boom angle detector and an output from the bucket angle detector.

According to a known front loader of the above-described type, the front loader is equipped with a tilt angle detecting means for detecting a tilt angle of the bucket so that a scooping action of the bucket may be stopped when the tilt angle detected by the tilt angle detecting means enters a dropping range in which a scooped object can drop off the bucket and also with an automatic dumping control valve configured to cause the bucket to effect a dumping action in operative association with an upward movement of the boom (see Patent Document 1 for instance).
Further, there is also known a front loader configured such that a posture of the bucket (an implement) is maintained constant, irrespective of any pivotal displacement of the boom, by means of an extension/contraction operation of a mechanical type parallel guide mechanism (see Patent Document 2 for instance).


An arrayed waveguide grating type optical multiplexer/demultiplexer circuit in which wavelength dispersion is reduced. An input wave guide (1), a first slab waveguide (2), an arrayed waveguide (3), a second slab waveguide (4) and an output waveguide (5) are connected sequentially. Furthermore, a parabola waveguide (6) is provided between the input waveguide (1) and the first slab waveguide (2), and a taper waveguide (7) is provided between the second slab waveguide (4) and the output waveguide (5). A parabola waveguide length Z0 exists in a range Za,0=Z0=Zp,0 determined by a parabola waveguide length Za,0 where the ratio of absolute amplitude between the main peak and the first side peak in the field distribution of far-field of the parabola waveguide (6) has an upper limit of 0.217, and a parabola waveguide length Zp,0 where the relative phase of the main peak and the first side peak in the field distribution of far-field has a lower limit of 3.14 radian.

At present, development of an optical wavelength division multiplexing communication system using a plurality of optical wavelengths being actively pursued in order to increase communication capacity. In this optical wavelength division multiplexing communication system, an arrayed waveguide grating type optical multiplexer/demultiplexer circuit is widely used in optical wavelength multiplexing and demultiplexing circuits for multiplexing a plurality of optical signals at the transmitter side or for demultiplexing a plurality of optical signals traveling through one optical fiber into different ports at the receiver side.
FIG. 8 is a block diagram of a conventional arrayed waveguide grating type optical multiplexer/demultiplexer circuit.
As shown in FIG. 8, a conventional arrayed waveguide grating type optical multiplexer/demultiplexer circuit has an input waveguide 1, a first slab waveguide 2 connected to the input waveguide 1, an arrayed waveguide 3 connected to the first slab waveguide 2 and constituted of a plurality of optical waveguides sequentially becoming longer with a predetermined waveguide length differences, a second slab waveguide 4 connected to the arrayed waveguide 3, and a plurality of output waveguides 5 connected to the second slab waveguide 4 (for an example, refer to K. Okamoto, "Fundamentals of Optical Waveguides", Academic Press, pp. 346-381, 2000). These are constituted by using an optical waveguide which is made up of a core with high refractive index formed on a flat substrate 10 and a clad around the core.
In the case of the conventional arrayed waveguide grating type optical multiplexer/demultiplexer circuit shown in FIG. 8, the light led into the input waveguide 1 is spread in the first slab waveguide 2 and branched to respective optical waveguides in the arrayed waveguide 3. Moreover, the light is multiplexed by the second slab waveguide 4 again and led into the output waveguides 5. In this case, an optical field pattern projected to an end of the first slab waveguide 2 at the arrayed waveguide 3 side is basically replicated to an end of the second slab waveguide 4 at the arrayed waveguide 3 side.
Furthermore, because the arrayed waveguide 3 is provided so that adjacent optical waveguides differ from each other in optical path length by ΔL, an optical field has an inclination which depends on the wavelength of the input light. The optical field changes its focusing position depending on each wavelength by the inclination at the output waveguide 5 side of the second slab waveguide 4 and as a result, it is possible to demultiplex the wavelength. Upon receiving light from the output waveguide 5 side, due to reciprocity of light, light of different wavelength is multiplexed and emitted from the input waveguide 1.
This arrayed waveguide grating type optical multiplexer/demultiplexer circuit is becoming an indispensable optical component in optical multiplex communication systems in that it can make a single optical fiber transmit a plurality of signals of different wavelength.
Moreover, various pass-band-expansion arrayed waveguide grating type optical multiplexer/demultiplexer circuits have been proposed which respectively expand the transmission wavelength band width of the arrayed waveguide grating type optical multiplexer/demultiplexer circuit shown in FIG. 8 (for an example, refer to K. Okamoto and A. Sugita, "Flat spectral response arrayed-Waveguide grating multiplexer with Parabola waveguide horns", Electronics Letters, Vol. 32, No. 18, pp. 1661-1662, 1996).
FIGS. 9A and 9B are block diagrams of a conventional pass-band-expansion arrayed waveguide grating type optical multiplexer/demultiplexer circuit.
As shown in FIG. 9A, the conventional pass-band-expansion arrayed waveguide grating type optical multiplexer/demultiplexer circuit has a configuration in which a parabola waveguide 6 in a parabolic shape is provided between the input waveguide 1 and the first slab waveguide 2 of the conventional arrayed waveguide grating type optical multiplexer/demultiplexer circuit shown in FIG. 8. As shown in FIG. 9B, when expressing a coefficient as A, the width of the input waveguide 1 as W0, and the length of the parabola waveguide 6 from the first slab waveguide 2 as Z0, the width W of the input optical waveguide 1 contacting with the first 20 slab waveguide 2 is defined with respect to the propagation axis Z of the optical wave by the following equation.Z=A(W2−W02)−Z0
When using this parabola waveguide 6, an optical field formed by the parabola waveguide 6 becomes distributions shown in FIGS. 10A and 10B. FIG. 10A a three-dimensional distribution illustration of an optical field in the parabola waveguide 6 shown in FIG. 9B and FIG. 10B is a two-dimensional distribution illustration of an optical field in the width direction (x direction) of the parabola waveguide 6 at an end portion of the parabola waveguide 6, that is, the boundary between the parabola waveguide 6 and the first slab waveguide 2.
As shown in FIG. 10A, the optical field in the input waveguide 1 has one peak. However, in the parabola waveguide 6 (at the right portion of the position of Z=−Z0 in FIG. 10A), a distribution of optical fields having two peaks is formed. Moreover, the distribution of optical fields at the boundary portion at which the parabola waveguide 6 contacts with the slab waveguide 2 has a double peak as shown in FIG. 10B. Accordingly, at the end of the second slab waveguide 4 at the output waveguide 5 side, the optical field having the double peak is also reproduced and combined with the output waveguide 5. Therefore, it is possible to expand a transmission wavelength band.
However, the conventional pass-band-expansion arrayed waveguide grating type optical multiplexer/demultiplexer circuit provided with the above parabola waveguide has a serious drawback. That is, it has a high wavelength dispersion value due to a phase distribution in the parabola waveguide. FIG. 11 shows graphs of wavelength dispersion and loss with respect to an optical wavelength in the conventional pass-band-expansion arrayed waveguide grating type optical multiplexer/demultiplexer circuit. As obvious in FIG. 11, it is found that the wavelength dispersion value with respect to the optical wavelength is high at the central wavelength, which is taken as a maximum wavelength dispersion value, and greatly changes in wavelength regions around the central wavelength. This wavelength dispersion characteristic causes a problem that an optical signal (pulse) is extremely deteriorated because the dispersion provides different delay times for optical signal spectrum components in one channel.
The present invention is made to solve the above problem and its object is to provide an arrayed waveguide grating type optical multiplexer/demultiplexer circuit with reduced wavelength dispersion.

Arrayed waveguide grating type optical multiplexer/demultiplexer circuit

Nippon Telegraph & Telephone Corporation


A method, comprising bonding a first wire to a single die bond pad to form a first bond, bonding the first wire to a bond post to form a second bond, bonding a second wire to the first bond, and coupling the second wire to the bond post.

Increasing demand for high-performance integrated circuit ("IC") design may prompt an increase in the number of input/output ("I/O") connections (i.e., bond pads) for a defined die size. An increased number of I/O connections currently may be accommodated with one of at least two commonly-known techniques. In a first technique, multiple rows of I/O connections are staggered in which the bond pads from one row are offset relative to bond pads from another row. Staggered designs generally require an increase in die size, and thus a staggered design presents an undesirable increase in production costs. Furthermore, additional bond fingers may be necessary to accommodate additional power and ground connections to maintain IC functionality, thereby further increasing manufacturing costs.
A second technique of increasing the number of I/O connections comprises reducing bond pad size, thereby allowing a greater number of bond pads to be formed on the die. However, decreased bond pad size necessitates a wirebond wire of reduced diameter (i.e., cross-sectional area of the wire). Decreasing wire diameter presents multiple disadvantages. One disadvantage is an increase in resistance and inductance in the wire and thus a decrease in IC performance quality. Another disadvantage is introduced by a wire "sweeping" (i.e., moving out of place) effect during a common molding process. To counteract wire sweeping, wire length must be reduced, thereby increasing complexity of manufacture. A third disadvantage may arise in dies with a staggered design and reduced bond pad size. Due to a dense bond pad pitch, bond wires may be placed closely together, thereby increasing the risk of crossing multiple wires.
A decrease in wire diameter, which increases wire inductance, may present several additional disadvantages. For example, an increased wire inductance may necessitate an increase in the number of power and ground connections needed for the IC to properly function. In turn, an increase in the number of power and ground connections may limit the amount of die space available for I/O connections. To maintain high performance levels, I/O connections may be dropped to the substrate, thereby reducing available substrate routing area.

Double density method for wirebond interconnect


A wearable display device equipped with a detection function is disclosed. The disclosed device includes an image viewer unit configured to show an image; a sensor unit configured to acquire a user's surrounding condition information; a determiner part configured to determine whether or not the user faces a dangerous condition based on information from the sensor unit; and an alarm information output part configured to output alarm information based on a determination result of the determiner part. The disclosed wearable display device makes it possible to increase the user's safety by effectively detecting dangerous objects, such as automobiles, and by suitably controlling the images on the device which may reduce the user's field of vision.

1. Technical Field
The present invention relates to a wearable display device, more particularly to a wearable display device equipped with a detection function.
2. Description of the Related Art
The HMD (head-mounted display), a representative type of wearable display device, was designed to provide a pilot with aviation information such as the altitude, velocity, etc., of the aircraft. Commercial products were first developed during the 1990's, and have attracted interest after 1997 due to their popularity.
The HMD may be worn on the head like goggles and may provide the vision of a large screen showing virtual images. The display used here typically has a size of 1 inch or less, which may be magnified a hundredfold with the application of highly advanced optical technology.
With the development and commercialization of accessory devices such as the HMD, further growth is anticipated in the field of wearable computing devices. While previous efforts have focused on developing the HMD for movies or games, rapid advances in the fields of display devices and visual communication, as exemplified by the trends towards higher performance and smaller sizes in computer systems and LCD's, have led to research on wearable monitors, with some products already commercially available.
The HMD market faced many difficulties in the market for the past few years, due to relatively high prices, but the market is expected to grow dramatically in step with the trends in the wearable computer industry. The wearable HMD is expected to expand to industrial sites, logistics warehouses, maintenance sites for large-scale equipment such as cars, airplanes, and ships, etc., as well as to the field of sports entertainment, such as car racing.
In particular, developments in processor and software technology enable the miniaturization of computing devices, and as such, the HMD is expected to evolve beyond simply displaying images to becoming a personal computing device analogous to the smart phone.
If an HMD is utilized as a personal computing apparatus, it can be expected to be used in indoor as well as outdoor environments. However, as the display of the HMD has a considerable impact on one's field of vision, it may also have an influence on the safety of the user.
For example, if the HMD is worn by a user walking along a street, the display of the HMD can prevent the user from recognizing cars or other dangerous objects which may suddenly appear, posing a considerable risk to the user's safety.

Wearable display device having a detection function

INDUSTRY-UNIVERSITY COOPERATION FOUNDATION HANYANG UNIVERSITY


An elastic buffer for buffering a stream of data blocks includes a controller and a memory space, wherein multiple data blocks can be written and read during a single write or read clock cycle, respectively. Multiple read addresses are used for each read operation, allowing read access to non-contiguous memory locations during a single read cycle when desired. Therefore, the elastic buffer can perform clock correction and channel bonding operations on data streams that include correction and alignment data block sequences that do not match the width of the memory space. A stagger bit can be used to indicate the timing of read address adjustments during clock correction and channel bonding operations.

1. Field of the Invention
The invention relates to the field of digital communications, and more particularly, to an elastic buffer compatible with various communications protocols.
2. Related Art
In a serial transceiver (transmitter-receiver), separate clocks control the rates of data being received by and read from the receiver. Although nominally running at the same frequency, the recovered clock (derived from the received data) and the read clock typically differ in frequency by up to 200 ppm (parts per million). To accommodate this asynchronous behavior, the receiver in a serial transceiver frequently includes an "elastic buffer." An elastic buffer is a modified FIFO (first in first out) memory that compensates for frequency discrepancies between the recovered clock and the read clock in a serial transceiver. During normal operation, data is continuously written to and read from the elastic buffer by the recovered clock (i.e., the write clock of the elastic buffer) and read clock, respectively.
FIG. 1a shows a conventional elastic buffer 100, which comprises a controller 110 and a memory array 120. Memory array 120 includes a plurality of equally sized memory locations A00–A63, each holding one "block" of data (i.e., the smallest grouping of data bits in a data stream—a byte, for example). Controller 110 receives an input data stream Din, a write (recovered) clock signal Wclk, and a read clock signal Rclk. Input data stream Din is formed by a series of data blocks, wherein the width of each data block is dependent on the particular communications protocol being used. When write clock signal Wclk is driven HIGH, controller 110 generates a write address Waddr corresponding to one of memory locations A00–A63, and the first available data block of input data stream Din is written into that memory location. The next time write clock signal Wclk is driven HIGH, controller 110 increments write address Waddr, so that consecutive data blocks from input data stream Din are stored in contiguous (i.e., sequential) memory locations in memory array 120. Note that in a FIFO such as elastic buffer 100, the last memory location (A63) in memory array 120 is treated as being contiguous with the first memory location (A00). Therefore, after a data block is written to memory location A63, the next write operation is to memory location A00. Note that while a memory location is contiguous with the memory locations that immediately precede and immediately follow it, the memory location is not contiguous with itself.
In a similar manner, during read operations to memory array 120, a positive edge on read clock signal Rclk causes controller 110 to generate a read address Raddr that corresponds to one of memory locations A00–A63, and the data block stored in that memory location is read out. During normal read operations, each positive edge on read clock signal Rclk increments read address Raddr so that the contents of contiguous memory locations are read as an output data stream Dout. As noted previously, memory location A63 is treated as being contiguous with memory location A00.
A "half full" configuration (i.e., half of memory locations A00–A63 are storing buffered data not yet read) gives elastic buffer 100 the greatest cushion for variations in write and read clock rates. However, because write clock signal Wclk and read clock signal Rclk typically run at different frequencies, this half full configuration cannot be sustained indefinitely. For example, if write clock wclk is faster than read clock Rclk, memory array 120 will "fill up" with unread data blocks. Eventually, new data blocks from input data stream Din will overwrite already-stored data blocks in memory array 120 before those older data blocks can be read out (overflow state). If write clock Wclk is slower than read clock Rclk, memory array 120 will be "emptied" as read operations take place faster than new data blocks can be stored. In such a case, a data block in a particular memory location may be read out multiple times before a new data block is stored in that memory location (underflow state).
To compensate for these read and write clock frequency discrepancies, elastic buffer 100 can execute "clock correction" operations (sometimes referred to as "rate matching" operations), in which special data blocks originally included in input data stream Din are omitted from output data stream Dout, or else special data blocks not originally present in input data stream Din are added to output data stream Dout. A "correction sequence" can be defined as the smallest set of data blocks, or "correction blocks," that may be omitted or added for clock correction operations. The correction (omission or addition) takes place at a location within the data stream where the correction sequence is (or was) present. The particular communications protocol being used defines the length (number of blocks, greater than or equal to one) of the correction sequence, as well as the values of the blocks in the correction sequence. Correction sequences are typically present at various locations within input data stream Din. The associated communications protocol is designed to ignore the presence or absence of such correction sequences during processing of a data stream. Therefore, controller 110 can monitor input data stream Din for these correction sequences and use them to execute clock correction operations when memory array 120 approaches an overflow or underflow state, without affecting the information being carried by data stream Din (or Dout).
As an example, assume that input data stream Din is made up of consecutive data blocks d0, d1, X, d3, d4, d5, d6, X, d8, etc., where X is a correction sequence consisting of a single correction block. At each positive edge on write clock signal Wclk, a data block is written into memory array 120—e.g., data block d0 is written into memory location A00, data block d1 is written into memory location A01, correction block X is written into memory location A02, and so forth. Then, if memory array 120 were getting too full (i.e., if an overflow state were being approached), controller 110 could generate a read address Raddr that jumped from memory location A01 to memory location A03, thereby skipping the readout of correction block X. This type of "accelerating clock correction" effectively speeds up the reading of actual data to compensate for the slower read clock signal Rclk. Similarly, if memory array 120 were getting too empty (i.e., if an underflow state were being approached), controller 110 could simply repeat (i.e., not increment) read address Raddr when a memory location holding a correction block were reached. This type of "delaying clock correction" effectively slows down the faster read operations until sufficient new data blocks can be written into memory array 120.
Commonly, multiple transceivers, each with its own elastic buffer, may be operating in parallel to increase overall data throughput. The input data stream is broken into discrete data blocks and those data blocks pass through the parallel transceivers as an aggregate data stream. For example, FIG. 1b shows elastic buffers 100a and 100b in two transceivers configured to act as two "channels" for an input data stream Din. Elastic buffers 100a and 100b are substantially similar to elastic buffer 100 shown in FIG. 1a. Input data stream Din is split into two partial data streams Din_a and Din_b by feeding alternating data blocks from input data stream Din into each partial data stream. On every positive edge on write clock signal Wclk_a, a data block from partial data stream Din_a is sent to elastic buffer 100a and stored in memory array 120a at write address Waddr_a. Similarly, on each positive edge on write clock signal Wclk_b (which runs at the same frequency as write clock signal Wclk_a), a block from partial data stream Din_b is sent to elastic buffer 100b and is stored in memory array 120b at write address Waddr_b. Therefore, on each write clock cycle, two sequential data blocks from input data stream Din are stored.
Similarly, on every positive edge on read clock signals Rclk_a and Rclk_b (which are equal), two data blocks are read—one from read address Raddr_a in memory array 120a (as part of partial data stream Dout_a) and one from read address Raddr_b in memory array 120b (as part of partial data stream Dout_b). These two data blocks are reassembled into sequential data blocks in output data stream Dout. The use of two transceivers in parallel in this way doubles the data throughput compared with a single transceiver. For example, assume that input data stream is made up of consecutive data blocks da0, db0, da1, db1, da2, db2, da3, db3, etc. Ideally, the data stored in memory arrays 120a and 120b would be arranged as shown in Table 1.
TABLE 1ALIGNED MULTI-CHANNEL DATA120a120bA00: da0B00: db0A01: da1B01: db1A02: da2B02: db2A03: da3B03: db3......
Each read operation would read out the appropriate pair of data blocks—i.e., (da0 db0), (da1 db1), (da2 db2), (da3 db3), etc. Output data stream Dout would then be properly reassembled. Unfortunately, unequal transmission delays on the two channels and other effects can cause the data blocks stored in memory arrays 120a and 120b to be skewed significantly with respect to each other; i.e., the data blocks stored in memory array 120a may be offset (misaligned) from their corresponding data blocks stored in memory array 120b, as shown, for example, in Table 2.
TABLE 2MISALIGNED MULTI-CHANNEL DATA120a120bA00: da0B00: db1A01: da1B01: db2A02: da2B02: db3A03: da3B03: db4......
In this case, each read operation would read out mismatched pairs of data blocks—i.e., (da0 db1), (da1 db2), (da2 db3), (da3 db4), etc. Output data stream Dout would then no longer be an accurate recreation of input data stream Din. To provide a means for correcting this problem, partial input data streams Din_a and Din_b will typically include special "alignment sequences" consisting of one or more "alignment blocks" that define corresponding points in the separate channels. As with the aforementioned correction sequences, the length of an alignment sequence and the values of the alignment blocks are defined by the particular communications protocol being used. These predefined alignment sequences can therefore be used to correlate the data blocks stored in different elastic buffers. For clarity, the invention will be discussed with respect to alignment sequences consisting of a single data block. Note, however, that the same principles apply to alignment sequences including multiple data blocks, as the position of the leading data block in such a multi-block alignment sequence would determine the manner in which an associated alignment operation would be carried out.
For example, suppose that input data stream Din is made up of data blocks da0, db0, DA, DB, da1, db1, da2, db2, etc., where data blocks DA and DB represent alignment blocks. Table 3 shows a possible data misalignment that could result from such an input data stream.
TABLE 3MISALIGNED MULTI-CHANNEL DATA WITH ALIGNMENTDATA BLOCKS120a120bA00: da0B00: DBA01: DAB01: db1A02: da1B02: db2A03: da2B03: db3 . . . . . .
As with the misaligned data shown in Table 2, simply reading out the stored data depicted in Table 3 would result in a corrupted output data stream Dout. However, during normal operation of elastic buffers 100a and 100b, controllers 110a and 110b monitor partial input data streams Din_a and Din_b, respectively, and record the memory locations in which alignment blocks DA and DB, respectively, are stored. Alignment blocks DA and DB can then be used to perform a "channel bonding" (or "channel alignment") operation to realign the stored data to generate output data stream Dout.
To perform a channel bonding operation, one of the elastic buffers is designated the master elastic buffer (in this case elastic buffer 100a), and all channel bonding operations are initiated by the master. Typically, the master elastic buffer (elastic buffer 100a) asserts a channel bonding signal CB_load a specified wait period ("channel bonding wait") after alignment block DA is read out of memory array 120a. The channel bonding wait is a fixed number of data blocks that must be read, starting with the alignment block, before performing a channel bonding operation. The wait period gives each slave elastic buffer time to store the corresponding alignment block from its partial input data stream and establish the location of that alignment block as the current reference point for alignment. In response to channel bonding signal CB_load, each elastic buffer sets its read address to point to the memory location of its stored alignment block (or a memory location having a defined position relative to the memory location of the alignment block). For example, elastic buffer 100a sets read address Raddr_a to the address corresponding to the memory location (A01) in memory array 120a of alignment block DA, while elastic buffer 100b (the slave) sets read address Raddr_b to the address corresponding to the memory location (B00) in memory array 120b of alignment block DB. By matching up alignment blocks DA and DB in this manner, the channel bonding operation (sometimes referred to as "channel alignment") forces subsequent read operations to read out properly matched data blocks from memory arrays 120a and 120b. Note that to maintain this data alignment, the master elastic buffer (100a) must also control the clock correction operations described previously for all the slave elastic buffers (100b).
The design and manufacture of the elastic buffer circuitry can be greatly simplified if the required clock speeds for writing and reading the elastic buffer can be reduced. One way to do this is to increase the buffer's width—i.e., the number of data blocks written or read per clock cycle. FIG. 1c shows a conventional elastic buffer 100c that is substantially similar to elastic buffer 100 shown in FIG. 1a, except that the memory locations in memory array 160 are addressed in two-block increments. Therefore, with each pulse of write clock signal Wclk, controller 110c generates a write address Waddr that corresponds to two adjacent memory locations in memory array 160, and two consecutive data blocks from input data stream Din are written into the designated memory locations. Similarly, a positive edge on read clock signal Rclk causes controller 110c to generate a read address Raddr that corresponds to two adjacent memory locations, and two stored data blocks are read out as part of output data stream Dout. Because multiple data blocks are written and read from elastic buffer 100c during each write or read cycle, respectively, elastic buffer 100c can be referred to as a "multi-block width" elastic buffer. Specifically, memory array 160 has a width of two data blocks, making it twice as wide as memory array 120 of elastic buffer 100.
By writing and reading multiple data blocks on each clock pulse, a multi-block width elastic buffer can significantly increase data throughput over a elastic buffer that only writes or reads a single data block per clock cycle. For example, assume that input data stream Din is made up of consecutive data blocks da0, db0, da1, db1, da2, db2, da3, db3, etc. In response to a positive edge on write clock Wclk, controller 110c would generate a write address Waddr corresponding to, for example, memory locations A00 and B00. Data block da0 would then be stored in memory location A00, and data block db0 would be stored in memory location B00. On the next rising edge of write clock Wclk, data block da1 would be stored in memory location A01 and data block db1 would be stored in memory location B01. Each subsequent write operation would store two more data blocks from input data stream Din. In a similar manner, each positive edge on read clock signal Rclk reads out the data blocks stored in two adjacent memory locations. Therefore, elastic buffer 100c has twice the data throughput of elastic buffer 100 shown in FIG. 1a, and therefore can operate at half the clock speed, thereby decreasing design and manufacturing complexity.
However, because each write address Waddr and read address Raddr generated by controller 110c corresponds to a memory location having a multi-block width, elastic buffer 100c requires that any correction sequence in input data stream Din must be "full width"—i.e., the correction sequence must occupy the full width of memory array 160. This limitation can make an increased-width elastic buffer, such as elastic buffer 100c, incompatible with communications protocols that incorporate correction sequences having lengths that are not integral multiples of the elastic buffer width. For example, some modern high-speed communications protocols, such as XAUI (10 gigabit extended Attachment Unit Interface), use a one-byte correction sequence. Each time such a one-byte correction sequence is written into a memory location in memory array 160, a non-correction data block (byte) could be written into an adjacent memory location (assuming that elastic buffer 100c has a width of two bytes). A clock correction operation using that correction block would then either delete the adjacent data block or add copies of the adjacent data block to the output data stream.
In addition to requiring that the correction sequence length match the elastic buffer width, correct operation of the elastic buffer would also require that a single correction sequence be properly aligned within memory array 160. Assume for example that the correction sequence length and elastic buffer width both are two data blocks. Suppose that input data stream Din is made up of consecutive data blocks da1, X1, X2, and db2, where data blocks X1 and X2 represent a correction sequence. Further suppose data blocks da1, X1, X2, and db2 are written into memory locations A00, B00, A01, and B01, respectively. The correction sequence (X1 X2) occupies memory locations (B00 and A01, respectively) addressed by two different values of read address Raddr, and there is no way to manipulate read address Raddr to effect clock correction. Skipping or repeating an address will always cause the spurious omission or insertion of either data block da1 or data block db2.
A similar issue arises when elastic buffers having multi-block widths are used in a multi-channel configuration. FIG. 1d shows elastic buffers 100d and 100e in two transceivers configured to act as two channels for an input data stream Din. Elastic buffers 100d and 100e are substantially similar to elastic buffer 100c shown in FIG. 1c, each having a width of two data blocks. Therefore, input data stream Din is split into two partial data streams Din_d and Din_e by feeding alternating pairs of data blocks from input data stream Din into each partial data stream. On every positive edge on write clock signal Wclk_d, two data blocks from partial data stream Din_d are sent to elastic buffer 100d and stored in memory array 160d at write address Waddr_d. Similarly, on each positive edge on write clock signal Wclk_e (which runs at the same frequency as write clock signal Wclk_d), two data blocks from partial data stream Din_e are sent to elastic buffer 100e and are stored in memory array 160e at write address Waddr_e. Therefore, on each write clock cycle, four sequential data blocks from input data stream Din are stored. For example, assume that partial input data stream Din_d includes data blocks d1, d2, DD, d3, d4, d5, while partial input data stream Din_e includes the data blocks e1, e2, DE, e3, e4, e5, where DD and DE are the alignment blocks. Assume further that due to misalignment of data between the channels, memory arrays 160d and 160e are written according to Table 4.
TABLE 4MISALIGNED MULTI-CHANNEL DATA IN MULTI-BLOCKWIDTH ELASTIC BUFFERS160d160eA00: d1C00: —B00: d2D00: e1A01: DDC01: e2B01: d3D01: DEA02: d4C02: e3B02: d5D02: e4 .C03: e5 .D03: — . . . .
Because the data stored in memory arrays 160d and 160e can only be addressed in specific two-block increments, output data stream Dout cannot be placed in proper alignment. At some positive edge of read clock signal Rclk_d, data blocks d4 and d5 will be written to partial output data stream Dout_d. At the same positive edge of read clock signal Rclk_e, data blocks e4 and e5 should be written to partial output data stream Dout_e, but no value of read address Raddr_e can cause these two blocks to be written out together.
Use of a multi-block width elastic buffer may be desirable to simplify the buffer design by reduction of the clock speeds. At the same time, it may be required that a transceiver (including the elastic buffer) support a variety of communications protocols. This is particularly desirable, for example, for transceivers that are to be embedded in a programmable logic device such as a field-programmable gate array (FPGA), which is intended to be configurable for a broad range of applications. However, as described above, existing multi-block width elastic buffers are limited to protocols having correction sequence lengths matching the width of the buffer(s), and for which clock correction and channel alignment operations are properly timed to prevent unachievable data block sequences on output data stream Dout. Accordingly, it is desirable to provide an elastic buffer having a multi-block width that overcomes these limitations.

Flexible channel bonding and clock correction operations on a multi-block data path


Materials, formulations, production methods, and methods for delivery of CFTR mRNA for induction of CFTR expression, including in the mammalian lung are provided. The present invention is particularly useful for treating cystic fibrosis.

The present invention relates to cystic fibrosis transmembrane regulator (CFTR) mRNA compositions, uses of same, and methods of making and using same.
Cystic fibrosis is an autosomal inherited disorder resulting from mutation of the CFTR gene, which encodes a chloride ion channel believed to be involved in regulation of multiple other ion channels and transport systems in epithelial cells. Loss of function of CFTR results in chronic lung disease, aberrant mucus production, and dramatically reduced life expectancy. See generally Rowe et al., New Engl. J. Med. 352, 1992-2001 (2005).
Despite cloning of the CFTR gene in 1989, effective therapy for replacing CFTR for the treatment of cystic fibrosis has yet to be developed. The literature has documented numerous difficulties encountered in attempting to induce expression of CFTR in the lung. For example, viral vectors comprising CFTR DNA triggered immune responses and CF symptoms persisted after administration. Conese et al., J. Cyst. Fibros. 10 Suppl 2, S114-28 (2011); Rosenecker et al., Curr. Opin. Mol. Ther. 8, 439-45 (2006). Non-viral delivery of DNA, including CFTR DNA, has also been reported to trigger immune responses. Alton et al., Lancet 353, 947-54 (1999); Rosenecker et al., J Gene Med. 5, 49-60 (2003). Furthermore, non-viral DNA vectors encounter the additional problem that the machinery of the nuclear pore complex does not ordinarily import DNA into the nucleus, where transcription would occur. Pearson, Nature 460, 164-69 (2009).
Another source of difficulties in inducing CFTR expression in the lung is the lung environment itself. Pulmonary surfactant has been reported to reduce transfection efficiency for cationic lipid transfer vehicles such as Lipofectamine (DOSPA:DOPE).
Ernst et al., J. Gene Med. 1, 331-40 (1999). Also, Rosenecker et al., 2003, supra, identified multiple inhibitory components present in the airway surface liquid which can interfere with either polymer-mediated or lipid-mediated transfection. Messenger RNA therapy has been proposed as a general approach for inducing expression of a therapeutic or replacement protein. The concept of introduction of messenger RNA (mRNA) as a means of protein production within a host has been reported previously (Yamamoto, A. et al. Eur. J. Pharm. 2009, 71, 484-489; Debus, H. et al. J. Control Rel. 2010, 148, 334-343). However, apparent lung-specific difficulties have been reported for mRNA delivery using certain lipoplexes formulations. For example, a comparison of in vitro and in vivo performance of lipoplexes carrying mRNA or DNA revealed that even though the mRNA composition gave higher expression in cultured cells, measureable expression was detected only with the DNA composition when administered intranasally to mouse lung. Andries et al., Mol. Pharmaceut. 9, 2136-45 (2012).
It should also be noted that CFTR is a relatively large gene relative to model or reporter genes such as firefly luciferase (FFL). Compare the lengths of the wild-type CFTR coding sequence (SEQ ID NO: 2) and the FFL coding sequence (SEQ ID NO: 7). The difference in length can impact stability under some circumstances, and therefore whether and how much protein expression any given dose of mRNA will produce. Furthermore, although in vitro synthesis of mRNA is generally preferable to synthesis by cells due to the absence of normal cellular mRNA and other cellular components which constitute undesirable contaminants, in vitro synthesis of mRNA with a long coding sequence, such as CFTR mRNA, is substantially more difficult to achieve than in vitro synthesis of mRNA with a relatively short coding sequence such as FFL.
PCT patent publication WO2007/024708 and US patent publications US2010/0203627 and US2011/0035819 discuss the therapeutic administration of CFTR mRNA but provide neither a demonstrated reduction to practice of production of functional CFTR in the lung following administration of CFTR mRNA or sufficient guidance for overcoming the difficulties associated with inducing CFTR expression in the lung using in vitro-transcribed CFTR mRNA. These include difficulties with achieving in vitro synthesis of the mRNA and difficulties specific to the interactions of mRNA compositions with lung-specific substances that investigators such as Andries et al., supra, have found to render mRNA compositions ineffective for induction of expression even while corresponding DNA-based compositions did provide some level of expression.
Thus, there is a need for improved materials, formulations, production methods, and methods for delivery of CFTR mRNA for induction of CFTR expression, including in the mammalian lung, for the treatment of cystic fibrosis.

CFTR mRNA compositions and related methods and uses


A composite carbon nanotube structure including a number of carbon nanotubes disposed in a metal matrix. The composite carbon nanotube structure may be used as a thermal interface device in a packaged integrated circuit device.

Illustrated in FIG. 1 is a conventional packaged integrated circuit device 100. The integrated circuit (IC) device 100 may, for example, comprise a microprocessor, a network processor, or other processing device, and the IC device 100 may be constructed using flip-chip mounting and Controlled Collapse Chip Connection (or "C4") assembly techniques. The IC device 100 includes a die 110 that is disposed on a substrate 120, this substrate often referred to as the "package substrate." A plurality of bond pads on the die 110 are electrically connected to a corresponding plurality of leads, or "lands", on the substrate 120 by an array of connection elements 130 (e.g., solder balls, columns, etc.). Circuitry on the package substrate 120, in turn, routes the die leads to locations on the substrate 120 where electrical connections can be established with a next-level component (e.g., a motherboard, a computer system, a circuit board, another IC device, etc.). For example, the substrate circuitry may route all signal lines to a pin-grid array 125—or, alternatively, a ball-grid array—formed on a lower surface of the package substrate 120. The pin-grid (or ball-grid) array then electrically couples the die to the next-level component, which includes a mating array of terminals (e.g., pin sockets, bond pads, etc.).
During operation of the IC device 100, heat generated by the die 110 can damage the die if this heat is not transferred away from the die or otherwise dissipated. To remove heat from the die 110, the die 110 is ultimately coupled with a heat sink 170 via a number of thermally conductive components, including a first thermal interface 140, a heat spreader 150, and a second thermal interface 160. The first thermal interface 140 is coupled with an upper surface of the die 110, and this thermal interface conducts heat from the die and to the heat spreader 150. Heat spreader 150 conducts heat laterally within itself to "spread" the heat laterally outwards from the die 110, and the heat spreader 150 also conducts the heat to the second thermal interface 160. The second thermal interface 160 conducts the heat to heat sink 170, which transfers the heat to the ambient environment. Heat sink 170 may include a plurality of fins 172, or other similar features providing increased surface area, to facilitate convection of heat to the surrounding air. The IC device 100 may also include a seal element 180 to seal the die 110 from the operating environment.
The efficient removal of heat from the die 110 depends on the performance of the first and second thermal interfaces 140, 160, as well as the heat spreader 150. As the power dissipation of processing devices increases with each design generation, the thermal performance of these devices becomes even more critical. To efficiently conduct heat away from the die 110 and toward the heat sink 170, the first and second thermal interfaces 140, 160 should efficiently conduct heat in a transverse direction (see arrow 105).
At the first thermal interface, it is known to use a layer of thermal grease disposed between the die 110 and the heat spreader 150. Thermal greases are, however, unsuitable for high power—and, hence, high heat—applications, as these materials lack sufficient thermal conductivity to efficiently remove a substantial heat load. It is also known to use a layer of a low melting point metal alloy (e.g., a solder) as the first thermal interface 140. However, these low melting point alloys are difficult to apply in a thin, uniform layer on the die 110, and these materials may also exhibit low reliability. Examples of materials used at the second thermal interface include thermally conductive epoxies and other thermally conductive polymer materials.

Method of fabricating a composite carbon nanotube thermal interface device