A multi-threaded processing system has a cache that is commonly accessible to each thread. The cache has a plurality of entries for storing items, each entry being identified by an entry number. The location in the cache of an item that includes a first key is determined by supplying the first key to a lockless-lookup engine which then provides a lookup output that is alternatively a lookup entry number or an indication that the item is not stored in the cache. The lookup entry number is alternatively a first or second entry number, wherein the first entry number points to a first entry in which the item is stored and the second entry number points to a second entry in which the item is not stored. If the lookup output is the lookup entry number, then it is verified that the lookup entry number is the first entry number. This verification includes acquiring a mutual exclusion lock on the entry designated by the lookup entry number, using the lookup entry number to read a stored key from the cache, and comparing the first key with the stored key. If the two keys match, then the item has been located. Other aspects of the invention address the situations where the two keys do not match, or where the lookup output is the indication that the item is not stored in the cache.

1. Field of the Invention
The present invention relates to shared caches in processing systems having multi-threaded environments, and more particularly to a cache for use in a multi-threaded environment, wherein the cache permits lookup operations to take place concurrently with a cache insert or delete operation.
2. State of the Related Art
As used throughout this disclosure, the term "cache" is a region in a computer memory that holds a subset of a larger collection of data. If an item of information is stored in a cache, a search for the item in the cache will succeed (called a "cache hit") and very little effort is consumed. However, a search for an item of information that is not in the cache (called a "cache miss") usually results in an expensive and time-consuming effort to retrieve the item of information from the larger collection of data. To maximize the number of cache hits, data that is likely to be referenced in the near future is stored in the cache. Two common strategies for maximizing cache hits are: storing the most recently referenced data, and storing the most commonly referenced data.
Caches are frequently employed to improve the performance of computer operating systems (OSs). For example, the Sun "SOLARIS.TM." OS (Sun and Solaris are trademarks or registered trademarks of Sun Microsystems, Inc. in the United States and other countries) uses a directory name lookup cache for storing the names of most recently accessed files, a file attribute cache for storing the attributes of most recently accessed files, and a disk buffer cache for storing the most recently accessed disk blocks.
It is possible for a cache to be shared by a number of concurrently operating threads of execution, which will henceforth be referred to throughout this specification as "threads." Such concurrent operation may result from each thread being assigned to a corresponding one of a number of processors in a multi-processor environment. Alternatively, logical concurrence may be achieved by an operating system using "time slice" techniques on only a single processor. Frequently, these two strategies are combined, so that each processor in a multi-processor system may employ time slicing.
In a computer processing system that provides a multi-threaded environment (e.g., a system having multiple processing units), conventional techniques employ a mutual exclusion lock to allow cache access to only one thread at a time whenever an insert, delete, or lookup operation is to be performed. This is to ensure that the information stored in a cache is accessed or updated atomically, thereby preventing transitory inconsistencies, which occur during update operations, from causing lookup operations to return incorrect results. Mutual exclusion locks are known in the art and are not described here in detail. Some locks can be implemented entirely in software without any hardware support. The most common special hardware support for mutual exclusion is the Test and Set operation. However, these two solutions (i.e., all-software and hardware-supported locks) have a drawback in that the use of busy-wait loops are difficult to design and do not allow a queue discipline to be used. Specialized language features such as semaphores and monitors may be applied to solve general concurrent programming problems requiring mutual exclusion, such as the Producer-Consumer and Reader-Writer problems. For more detailed information, reference is made to the following publications, which are incorporated herein by reference: A. Burns & G. Davis, Concurrent Programming, pp. 64-68, 175-184, Addison Wesley, 1993.
The use of software locks to ensure the consistency of a cache in a system having a multi-threaded environment negatively affects the performance of that system in a way that worsens as more and more threads are included. For example, where the multi-threaded environment is one having multiple processing units (CPUs), idle processes waiting to acquire the software lock of a cache will not be using valuable processor time. Moreover, even in systems where the multiple processes are provided by means of time slicing on a single processor, a waiting thread is a candidate to be swapped or paged out by the operating system. The additional workload imposed on the operating system to page/swap these threads in and out further reduces the scalability of the computing system.
The above discussion has related to caches in general. However, a cache may be organized in accordance with any one of three paradigms:
1) A "directly mapped" cache is one in which each item to be stored has only one cache location into which it can be stored. This mapping is one-way in that each cache location could potentially hold any of a number of different items. For example, cache entry 1 might be designated for storing all items beginning with the letter "a". If an attempt is made to insert an item "aa" into a cache that already has item "ab" in it, the item "ab" would have to be thrown out. PA1 2) A "fully associative" cache is one in which a data item to be stored could potentially be placed into any cache location. PA1 3) A "set-associative" cache is one in which a data item to be stored could potentially be placed into any one of a predetermined set of cache locations.
Many applications require, for proper functioning of a cache, that each item of information stored in the cache be unique; duplicates of an item are not allowed to be stored in the cache. The simplest solution to ensure cache consistency is to employ a mutual exclusion lock on the entire cache, thereby allowing only one insert, one delete, or one lookup operation to the cache at a time.
For directly mapped and set-associative caches, a greater number of fine-grained mutual exclusion locks may be utilized to allow for more concurrent accesses to the cache. Thus, instead of employing only one mutual exclusion lock for the entire cache, there is one mutual exclusion lock for each location (directly mapped) or set of locations (set-associative) in the cache. If accesses to the cache occur randomly, having multiple mutual exclusion locks increases concurrent accesses since it reduces the probability of conflicts in acquiring the particular lock required for applying a given cache operation.
Typically, cache lookups occur much more frequently than insertions and deletions. To take advantage of this access pattern, the mutual exclusion lock used by a cache to maintain consistency may be replaced with a read-write lock. A read-write lock allows multiple concurrent cache lookups because these do not modify the contents of the cache. However, if one thread is performing either an insertion or a deletion, then all other threads are disallowed from accessing the entire cache for any reason, be it for another insertion, deletion or for lookup of an item. Thus, one thread's insertion or deletion can cause many other threads to be left idle.
In summary, the use of one or more software locks to ensure the consistence of a cache in a multi-threaded system reduces concurrent accesses to the cache and negatively affects the scalability of the system.

Maximal concurrent lookup cache for computing systems having a multi-threaded environment


Vacuum powered tool that is connectable to a vacuum source and arranged in an object engagement position to engage and hold an object as a result of a negative pressure in the tool as well as to resiliently return to an initial position when the negative pressure ceases. The tool comprises an object handling engagement part, wherein the tool, in a first end, has a fitting to be fixedly received in a vacuum connection implement for fixation of the tool, and in a second end of the tool, wherein the second end is formed for air-proof contact and provided with an at least partly flexible and collapsible spherical hollow inner geometry onto which at least partly spherical and collapsible hollow inner geometry having a collapsible part.

Vacuum powered tools are supplied with negative pressure from a vacuum source, which may be an ejector arranged adjacent to the gripper tool or a centrally arranged ejector or pump that serves several vacuum powered tools often employed for the sorting or picking of articles and packages. A vacuum powered tool such as a vacuum powered gripper is connected to the vacuum source in order to by suction effect via an object handling and engagement appliance generate an engagement with objects that are to be handled by the vacuum powered tool.


A socket for an electric part includes a pair of slide plates 7 and 8 movable in opposite directions. Contact pin-pressingportions 9 are provided on each of the slide plates 7 and 8 for opening each of contact pins 3 to opposite sides, and operating arms 18 are disposed on a socket body 2 of the socket for turning movement about base ends, and are connected to the slide plates 7 and 8 for operating the slide plates 7 and 8, respectively. Operating projections 28 are disposed on an operating member 22 for turning the operating arms 18 by the vertical movement of the operating member 22, so that the operating arms 18 are turned by the operating projections 28 by urging the operating member 22 downwards to move the slide plates 7 and 8. Thus, the slide plates can be moved easily by urging the operating member by a smaller force.

1. Field of the Invention
The present invention relates to a socket for an electric part and more particularly, to a socket for an electric part for providing an electric connection between terminals of the electric part and an external electric test circuit in order to carry out a performance test of the electric part.
2. Description of the Related Art
In order to carry out the performance test of an electric part such as a semiconductor device or the like, a socket for an electric part for providing an electric connection of terminals of the electric part with an external electric test circuit is conventionally used in many cases.
In such a socket for an electric part, a positioning plate is disposed on a socket body, so that the electric part is placed on the positioning plate. Contact pins are disposed on the socket body, and a slide plate slidable in a horizontal direction is disposed between the positioning plate and the socket body. Further, an operating member for moving the slide plate is disposed for vertical movement relative to the socket body.
In this socket, the slide plate is slid in the horizontal direction through a link mechanism by lowering the operating member, thereby resiliently deforming one of resilient pieces of a contact pin to open upper ends of the resilient pieces. Thereafter, an electric part is placed on the positioning plate, and the operating member is lifted, thereby moving the slide plate back to its original position to release an urging force on the contact pin. This permits the contact pin to be returned to its initial position under its resilient force, whereby the tip ends of the contact pins clamp terminals of the electric part and as a result, the electric connection of the electric part is achieved.
However, such conventional socket for the electric part suffers the following problem: Since the slide plate is slid in the horizontal direction through the link mechanism by lowering the operating member, it is necessary to convert a downward urging force to a force in the horizontal direction perpendicular to an urging direction and hence, a larger force for urging. the operating member is required.
Another problem is as follows: One of the resilient pieces of the contact pin is opened out, whereby each of the terminals of the electric part is clamped by the resilient pieces and hence, a larger amount of movement of the resilient piece is required. For this reason, the repulsion force of the contact pin is increased, and hence, a larger force is required to move the slide plate. A further problem is that the load stress on the contact pin is increased to bring about a reduction in life of the contact pin.
Accordingly, it is an object of the present invention to provide a socket for an electric part, wherein the slide plate can be moved easily by urging the operating member by a smaller force.
To achieve the above object, according to a first aspect and feature of the present invention, there is provided a socket for an electric part, comprising a socket body having a plurality of contact pins disposed thereon, each of the contact pins having resilient pieces capable of clamping each of terminals of an electric part, a slide plate disposed above the socket body and movable in a substantially horizontal direction, and an operating member disposed movably in a vertical direction relative to the socket body for sliding the slide plate, so that the slide plate is moved by the vertical movement of the operating member, whereby tip ends of the contact pins are opened and closed to come into and out of contact with the terminals of the electric part, wherein a plurality of the slide plates movable in opposite directions are laminated vertically on one another, each of the slide plates being provided with contact pin-pressing portions for opening the contact pin; the socket body having operating arms turnably disposed thereon and connected to the slide plates for moving the slide plates; and the operating member has operating projections disposed thereon for turning the operating arms by vertical movement of the operating member, so that the operating arms are turned by the operating projections by urging the operating member downwards, thereby moving the slide plates.
With the arrangement of the first feature, the operating projections of the operating member turn the operating arms by urging the operating member downwards, thereby moving the slide plates in the opposite directions. With this movement of the slide plates, the contact pin-pressing portions provided on the slide plates open the resilient pieces of each of the contact pins into their states in which each of the terminals can be clamped by the resilient pieces. Therefore, the amount of movement of each of the resilient pieces of the contact pin can be reduced by half, and the repulsion force of each of the resilient pieces is also reduced. As a result, the slide plates can be moved by a smaller force.
According to a second aspect and feature of the present invention, in addition to the first feature, each of the slide plates has plate arm portions provided thereon, and each of the operating arms has an operating pin formed at its intermediate portion, so that the operating arms and the slide plates are interconnected by bringing the operating pins into engagement with tip ends of the plate arm portions.
With the above arrangement of the second feature, the operating pins formed at the intermediate portions of the operating arms are brought into engagement with the tip ends of the plate arm portions provided on the slide plates, thereby connecting the operating arms to the slide plates. The tip ends of the operating arms are urged by the operating projections provided on the operating member to move the operating pins on the operating arms bya principle of lever, thereby move the plate arm portions to move the slide plates. Therefore, the slide plates can be moved easily, and the operating member can be urged by a smaller force.
According to a third aspect and feature of the present invention, in addition to the first or second feature, the operating arms are connected at their base ends to each other, so that they are turned about connected portions thereof.
With the above arrangement of the third feature, the operating arms are connected at their base ends to each other, so that they are turned about the connected portions. Therefore, a repulsion force produced upon movement of the slide plates can be countervailed by the connected portions of the operating arms.
According to a fourth aspect and feature of the present invention, in addition to any of the first to third features, the turnable portions of the operating arms are disposed in the vicinity of a center of movement of each of the slide plates.
With the above arrangement of the fourth feature, the turnable portions of the operating arms are disposed in the vicinity of a center of movement of each of the slide plates and hence, when the operating member is urged, the urging of the operating member can be carried out stably.
The above and other objects, features and advantages of the invention will become apparent from the following description of the preferred embodiment taken in conjunction with the accompanying drawings.


A unit cell for an integrated circuit includes a first conductive type active region and a second conductive type active region which extend in a first direction. Each of the active regions has first and second ends. The first end of the second conductive type active region opposes the second end of the first conductive type active region. A poly-silicon pattern extends in the first direction across the first conductive type active region and second conductive type active region. A first contact region is adjacent the first end of the first conductive type active region in the first direction. A second contact region is adjacent the second end of the second conductive type active region in the first direction.

Cell based integrated circuit technology and cell architecture for such circuits have been developed as quick-turns integrated circuit (IC) design methodologies in which pre-designed circuit units or cells are wired together to rapidly implement a new IC functionality. The pre-designed circuit elements are called macro cells which are made by interconnecting unit cells.
A conventional unit cell includes a P-type active region (PMOS transistor) and an N-type active region (NMOS transistor), which are arranged in a first direction. A pair of poly-silicon regions is formed on each of the P-type and N-type active regions. Those poly-silicon regions are extending in parallel to each other in the first direction. The unit cell also includes first and second substrate contact regions, which are arranged in parallel to the P-type active region and N-type active region respectively.
When a circuit, such as a macrolibrary, is made, the poly-silicon regions on the P-type active region are connected to the poly-silicon regions on the N-type active region with conductive lines.
According to the conventional unit cell, power line (Vdd) and ground line (Vss) across the P-type active region and N-type active region; therefore the arrangement of conductive lines becomes complicated. To prevent intersection between signal lines and power line/ground line, the signal lines should be formed on a different layer from the power line and ground line. As a result, it becomes difficult to increase the degree of integration of the IC.
Further, conductive lines connecting the poly-silicon lines on the P-type active region and N-type active regions may across the signal lines, therefore the arrangement of conductive lines becomes complicated. To prevent intersection between such conductive lines and the signal lines, the signal lines should be formed on a different layer. As a result, it becomes difficult to increase the degree of integration of the IC.

Cell based integrated circuit and unit cell architecture therefor


A sound reproduction device includes a modulator having an output terminal for outputting a modulated carrier wave signal obtained by modulating a carrier wave signal in a ultrasonic band with an audible sound signal, a super-directivity loudspeaker connected to the output terminal, a capacitor connected between a ultrasonic wave source and a ground, first and second current detectors for detecting currents flowing through the super-directivity loudspeaker and the capacitor, a high-pass filter for outputting a filtered signal obtained by eliminating a low-frequency band component of the current detected by the first current detector, and a differential amplifier unit for outputting a signal corresponding to a difference between the filtered signal and the current detected by the second current detector. The ultrasonic wave source is configured to output the carrier wave signal such that the signal output from the differential amplifier unit is constant.

Sound reproduction devices transmitting sound information only to certain target audiences by using loudspeakers capable of providing the sound information with directivity. FIG. 6 is a schematic diagram of sound reproduction device 500 disclosed in Patent Literature 1.
Carrier wave selector 101 selects a single frequency out of plural frequencies of ultrasonic wave carrier signals, and outputs the selected frequency signal to ultrasonic wave oscillator 103. Ultrasonic wave oscillator 103 oscillates and outputs a carrier wave signal with the frequency to carrier wave modulator 105. On the other hand, reproduction signal generator 107 for reproducing audible sound outputs an audible sound signal to carrier wave modulator 105. Carrier wave modulator 105 modulates the carrier wave signal with the audible sound signal, and outputs the modulated carrier wave signal. The modulated carrier wave signal is input to ultrasonic loudspeaker 109. Ultrasonic loudspeaker 109 emits sound having directivity in response to the modulated carrier wave signal.
An operation of sound reproduction device 500 will be described below. FIG. 7A shows audible sound signal 111 reproduced by reproduction signal generator 107. FIG. 7B shows carrier wave signal 113 generated by ultrasonic wave oscillator 103. FIG. 7C shows modulated carrier wave signal 115 generated by carrier wave modulator 105. Carrier wave modulator 105 produces modulated carrier wave signal 115 by modulating carrier wave signal 113 with audible sound signal 111. In modulated carrier wave signal 115, the period of carrier wave signal 113 is changed according to amplitude of audible sound signal 111. As shown in FIG. 7C, modulated carrier wave signal 115 has a waveform having the period changes partially and having constant amplitude. Ultrasonic loudspeaker 109 has a diaphragm having a piezoelectric element attached thereto. Modulated carrier wave signal 115 input to the piezoelectric element of ultrasonic loudspeaker 109 causes the diaphragm to vibrate and generate rarefactions and compressions in the air, thereby outputting an ultrasonic wave of modulated carrier wave signal 115 to the atmosphere from ultrasonic loudspeaker 109. When this ultrasonic wave reaches ears of a user, the user can capture only compressional vibrations of the air in an audible band since the user cannot hear the compressional vibrations in an ultrasonic band. Here, the ultrasonic wave propagates with directivity of a narrow angle since modulated carrier wave signal 115 output from ultrasonic loudspeaker 109 has frequencies in the ultrasonic band. The user of sound reproduction device 500 can hence hear the audible sound only within a narrow area within which modulated carrier wave signal 115 propagates.
In sound reproduction device 500, ultrasonic loudspeaker 109 is driven with constant amplitude, as shown in FIG. 7C. If sound reproduction device 500 is used for a long period of time under such a condition, the frequency and amplitude of modulated carrier wave signal 115 may fluctuate due to heat-up of the piezoelectric element of ultrasonic loudspeaker 109 and changes in the ambient temperature. This fluctuation may change the sound pressure reproduced by sound reproduction device 500 and cause sound quality to deteriorate.

PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.


A motion detection device for monitoring patient movement. The device includes a sensor adapted to generate a voltage from mechanical vibrations and a circuit in operable relationship with the voltage for generating an alarm upon detection of a predetermined signal. The circuit provides a fixed impedance to the sensor. A micro controller is used for analyzing the signal to select from first and second conditions by sensing activity within sequences of preselected time intervals. The first condition represents a medical condition and the second condition represents casual motion. A switch is used for setting a time interval and a total sampling time for the micro controller. An alarm signal generates an alarm upon detection by the microprocessor of a predetermined activity. The preferred sensor comprises a housing having an outer shell and a hollow spherical opening therein. A plurality of inner spherical bodies are adapted to move freely inside the spherical opening to produce detectable mechanical vibration in the outer shell. A piezoelectric film is attached to a portion of the outer shell to generate a voltage from the mechanical vibrations.

Epilepsy is a disorder of the brain characterized by recurring seizures, in which there are uncontrolled electrical discharges of brain cells. Epilepsy may arise from a very small area of damaged brain tissue, or from the entire brain. There may be no apparent brain damage, or damage may be limited to an area so small it cannot be detected. Therefore, in nearly one-half the cases, the cause of epilepsy is unknown.
There are several types of seizures associated with epilepsy, the most common of which are generalized tonic-clonic (grand mal), absence (petit mal), complex partial (psychomotor), and elementary partial (focal motor). Each seizure type can be characterized by various symptoms. However, the seizures are generally not life threatening, lasting at most up to three minutes. The exception is status epilepticus, also called continuous seizure state. This is the occurrence of repetitive or continuous seizures and affects approximately 3 to 5% of those individuals suffering from epilepsy. It can exist with all types of seizures and may result in irreversible brain damage or death without prompt medical treatment.
Prior to the invention described in U.S. Pat. No. 5,523,742, parents of children afflicted with epilepsy, particularly status epilepticus, did not have a device for alerting the parents when the child may be having an epileptic seizure during sleeping hours. One recourse had been for the parents to sleep with the child, in the same bed, hoping to be awakened by the seizure during its early stages when the seizure motion may be quite mild. Often, the parents would choose to supplement this safeguard by using an alarm clock, set to sound every hour, to awaken and observe the state of the child. This, of course, places an extraordinary burden on both the child and the parents and is inherently unreliable as seizures may occur at any time. Moreover, the intermittent sleep afforded the parents as well as the desire for privacy by the child and by the parents make the procedure impractical and inefficient.
Continuous visual monitoring of the afflicted individual is usually impossible and periodic monitoring is often insufficient.
Monitors described in U.S. Pat. Nos. 5,523,742 and 5,610,590 provide relief during sleeping hours, but are inappropriate for reliably discriminating anomalous activity from the casual motion associated with normal quiet daytime activities. The use of either of these monitors would produce an unacceptably high false alarm rate resulting in undue anxiety and a loss of faith in the device.
One motion sensor that has found some applicability is disclosed in European Patent No. 87110092.1, filed Jul. 13, 1987. This device detects motion using a single moving object rolling on solid surfaces in which either the object or the surface, or both, have facets that interrupt the movement of the object on the surface. That sensor, of course, is intended to control the functioning of, heart pacemakers, which presents entirely different technical and medical problems to solve. For this reason, the European Patent is able to use microphones to sense the activity of the object, thus consuming considerable electric power.
Motion sensor devices are obvious solutions to the aforementioned problem, provided that such devices be designed to ignore the casual motions of a child (rolling over, etc.) while responding to those motions characteristic of a seizure, however mild at the beginning. Existing motion sensor devices such as accelerometers or displacement followers could conceivably be designed to detect certain types of motion while ignoring others, but are invariably expensive, consume excessive power, and, when the required signal conditioning equipment is included, form a bulky package. Moreover, these devices commonly require electrical connections between the transducer (affixed to the patient) and its associated equipment located near, but not on, the patient.
Accordingly, it is an object of this invention to provide a device for sensing a type of motion of concern while ignoring, for the most part, other non-harmful motion such as ordinary movement.
Another object of this invention is to provide a monitoring device for use during the day time as well as at night.
Still another object of this invention is to provide a monitoring device in which the user is able to attend class or do other activities without setting off unacceptably frequent false alarms.
Yet another object of this invention is to provide a simple, effective device for monitoring epileptics using a sensor that is easy to manufacture.
Other objects will appear hereinafter.


A four-way lead flat package IC-mount printed circuit board, carrying a four-way lead flat package IC and having front soldering land groups placed in front of the four way lead flat package IC and rear soldering land groups placed in the rear of the four-way lead flat package IC, has solder drawing lands, in a neighboring area, between the front soldering land groups and the rear soldering land groups adjacent to the front soldering land groups, and/or a trailing area of the rear soldering land groups. The solder drawing lands are formed with slits substantially parallel to the lines of soldering lands of the front soldering land groups or the rear soldering land groups placed in front of the solder drawing lands. These result in an advantageous effect of enabling the prevention of the occurrence of soldering bridges and soldering residues in the front soldering land groups or the rear soldering land groups.

1. Field of the Invention
The present invention relates to a printed circuit board on which a four-way lead flat package IC is mounted by soldering using a jet-flow type soldering bath.
2. Description of the Related Arts
In general, due to increasing demands on printed circuit boards for increasing component mounting density, a need has been arising in mounting a four-way lead flat package IC with a narrowed pitch. On the other hand, practical application of lead-free solder, reflecting environmental concerns, has been progressing rapidly. However, lead-free solder has poor soldering reliability than that of lead-containing eutectic solder that has been used in the related art practice. Therefore, short-circuiting has been encountered due to soldering bridges between leads of the four-way lead flat packages IC and the like.
In the related art, in order to prevent the occurrence of the soldering bridges, attempt has heretofore been taken to provide a printed circuit board of this kind prepared with side solder drawing lands, formed in a right-angled isosceles triangle shape, and a rear solder drawing land formed in a quadrate shape (see, for instance, Patent Document 1).
Further, another attempt has been taken to provide first and second soldering lands in separate areas to form side or rear solder drawing lands (see, for instance, Patent Document 2).
Furthermore, another attempt has been taken to provide an eyelet on one side of an area between front soldering land groups and rear soldering land groups while forming a lattice-shaped solder drawing land on the other side of the area between the front soldering land groups and the rear soldering land groups and in a trailing area of the rear soldering land groups (see, for instance, Patent Document 3).
[Patent Document 1] U.S. Pat. No. 2,635,323 (on page 3 and FIG. 1)
[Patent Document 2] Japanese Patent Laid-Open Publication No. 2002-329955 (on pages 4 to 5 and FIGS. 1 to 5)
[Patent Document 3] Japanese Patent Laid-Open Publication No. 2005-175186 (on pages 7 to 8 and FIGS. 8 to 11)

Four-way lead flat package IC-mount printed circuit board, method of soldering four-way-lead flat package IC and air conditioner


In a method for controlling transmission band, minimum intervals are provided for a plurality of signal sources, respectively, so that each of the signal sources turns into a condition where a signal can be transmitted therefrom when the minimum interval thereof is elapsed. The minimum interval for each of the signal sources is counted since the last signal is transmitted therefrom. A waiting time for each of the signal sources is counted since the minimum interval thereof is elapsed. One signal source is selected from the signal sources whose waiting time is the longest so that the selected signal source transmits a signal to the common transmission line. The minimum interval and the waiting time for the selected signal source are renewed in accordance with the time-slot interval and the waiting time thereof.

In signal transmission technology, PDS (Passive Double Star) structure has been studied and researched to apply to ATM (Asynchronous Transfer Mode) network services. This kind of technology is described in literatures, "Time-Slot Distributing Method for ATM-PDS", by Nakajima and Takigawa, 1993 Electronic Information Transmission Society, Autumn Conference B-669, 1993; and "ATM Based Passive Double Star System Offering B-ISDN, N-ISDN and POTS" by Y. Takizawa et al., GLOBCOM '93, pp-14-18, 1993.
An optical communication system with ATM-PDS structure includes a plurality of ONUs (Optical Network Units), which are placed in subscribers' premises, an SLT (Subscriber Line Terminal) and a star couple connecting the ONUs and the SLT to each other using optical fibers. The SLT includes a plurality of OSUs (Optical Subscriber Unit) each operating as interface to the corresponding ONUs. An optical signal transmitted from the OSU is branched by the star coupler and the branched signals are transmitted to the ONUs in a downward direction. On the other hand, the star coupler multiplies optical signals from the ONUs and the multiplied signal is transmitted to the OSU in an upward direction. If the ONUs transmit optical signals independently in the upward direction, those signals are competed at the star coupler. For that reason, the OSU transmits a permission signal in the downward direction, which specifies one ONU, to allow only the specified ONU to transmits an optical signal in the upward direction.
In practice, an optical signal in the downward direction is transmitted cell by cell, which is ATM-PDS cell of sixty bites. The OSU adds at the first two bytes in the ATM-PDS cell an identification number specifying one ONU which is allowed to transmit an optical signal. When the specified ONU receives an ATM-PDS cell including its identification number, the ONU transmits a cell in the upward direction within a predetermined period of time. In ATM-PDS structure, the same width of transmission band is not always distributed to the ONUs. In other words, ONU identification numbers to be added in ATM-PDS cells in the downward direction are not equally distributed to the ONUs, but must be distributed in accordance with subscribers' contracts, respectively.
The OSU is provided with a band control circuit to control the distribution of transmission bands to the ONUs. A conventional band control circuit includes a plurality of transmission timing controllers, each operating for the corresponding ONU, and a competition controller, which arbitrates competing demand of transmission among the ONUs. Each of the transmission timing controller includes cell interval counter and a waiting time counter. Each of the cell interval counter is supplied with a specified cell interval of the corresponding ONU. Each cell interval counter is reset when a permission signal is supplied to the corresponding ONU, and perform increment operation. When the counted value of the interval counters reach the specified cell intervals, the counted values are maintained until a reset signal is supplied thereto. Each waiting time counter starts increment operation when the corresponding cell interval counter reaches the specified cell interval. The counted value of each waiting time counter represents a waiting time since the corresponding cell interval counter reaches the specified cell interval.
The competition controller selects one from the ONUs, whose waiting time is the longest which means the corresponding waiting counter stores the largest number, and transmits the identification number of the selected ONU. The identification number is supplied as a reset signal to the cell interval counter and the waiting time counter for the selected ONU.
According to conventional band control circuits, however, there is a disadvantage in that some ONUs can not transmit signals within the specified cell intervals thereof. The delay time may be a maximum of cell intervals corresponding to the number of ONUs connected to the OSU. In addition, none of the ONUs transmits an optical signal at a cell interval that is shorter than its specified cell interval. As a result, the contracted bands may not be distributed to the subscribers. In other words, the average of distributed cell interval for the ONU may be longer than the contracted cell interval.

Method and apparatus for controlling transmission band


In a network packet router having one or more ingress and egress ports, a method is implemented at an ingress port for egress pass/drop determination for packets, comprising the steps of (a) noting header combinations and values, and egress port destination for incoming packets; (b) comparing the header combinations and values with rule sets associated with the header combinations and values including egress port identities, and (c) returning a determination of pass or drop for the packet.

In the art of routing digital data through data-packet networks, research and development of methods for more efficient handling of data packets continues. Generally speaking, a data packet is a digitized and organized block of binary data that is a "packaged" portion of a specific communication or data transfer from a source location to an ultimate destination on a network. A data packet typically has one or more headers, and a data body. The packet headers are used for data routing through the network. During routing from a source location to a routed destination, data packets may be processed at one or more stops or routing points along the way. These hops, as they are often termed, are between data routers and, in some cases, server nodes distributed through the network. Data packets are, for example, commonly routed over the Internet network and commonly include Internet Protocol (IP) headers and Transmission Control Protocol (TCP) headers. It is well-known in the routing art that there are typically several hops for a packet between a source and a destination. It is also well-known that there are industry-accepted and applied procedures and protocols in routing, so that the many parts of the Internet (for example) will continue to operate seamlessly, even though hardware and software from many different sources and companies is used. Further, the procedures by which routers function involve many internal processes and messages between routers. For example, to operate successfully every router needs to keep track of its own position in the overall network, the position and functioning characteristics of its nearest neighbors, the output (egress) ports by which it must transmit packets previously received at input (ingress) ports to be sure the packets follow a best route to the final destination, and so on.
A router typically has more than one ingress port and more than one egress port. The ports are often organized so each specific port functions for both ingress and egress. For descriptive purposes, however, it is quite useful to treat ingress and egress ports as separate entities, because they are logically separate and are often implemented as separate entities. A packet received at any ingress port is pre-processed at that port by, for example, checking the header information for type, source and destination, port numbers, and so forth, and determining which of potentially many rules and processes apply, and then processing the packet by applying the determined procedures. Some packets may be data packets for such as a video stream or a Web page, for example, which may be processed by re-transmitting them at whatever egress port is determined to be coupled to the next node to which they should go on the way to the final destination. Other packets may be determined to be queries from a neighboring router, which may be diverted to a CPU for a subsequent answer to be prepared and sent back to the neighbor. There are many possibilities, and every packet must be processed so a determination can be made, and the correct action taken.
One of the functions in the art that routers practice on packets has to do with a quick decision to pass a packet on to further processing, or to simply drop the packet. This function in the state-of-the-art takes place at both ingress and egress ports. There are a variety of reasons that an incoming packet received at an ingress port might be dropped. For example, packets of an unknown type, which may be michevious, should not be processed. As another simple example, packets that have a destination that cannot be reached according to current routing tables can be dropped, because they cannot go anywhere anyway. There are a number of other possibilities well-known in the art.
There are also a variety of reasons why packets at an egress port might need to be dropped, even though they have been accepted and processed in the router, and have arrived at an egress port. There may be, for example, requests from certain organizations for receiving only packets meeting certain criteria. There are a number of other reasons for dropping packets at output ports well-known in the art. In many cases the reasons for pass and drop are port specific.
A typical way that pass/drop determination is made at either ingress or egress is by matching certain fields from a packet with fields in an Access Control List (ACL). The ACL is simply a lookup mechanism for matching the fields and returning a bit determined by the match (or mismatch) to pass (further process or transmit) or drop the packet. The implementation of such ACLs is described further in this specification in the section entitled "Description of the Preferred Embodiments" below.
Because the reasons for dropping at ingress or at egress ports may differ, it makes good sense in the art to implement ingress pass/drop determinations separately from egress pass/drop determinations. Still, doing the determination to pass or drop requires the mechanisms to accomplish the function. That is, to do an ACL lookup and return a bit every ingress port and egress port must have the hardware and/or software to do so. Typically hardware implementation is preferred for speed.
Because of the additional complexity, latency and expense of doing pass/drop determination at both ingress and egress, some manufacturers may prefer to implement the ACL pass/drop function at only ingress ports, and to forego implementing the function at egress. Until the present invention this would mean not having the function at all at the egress ports.
What is clearly needed is a method and apparatus that enables a router or server to accomplish both ingress and egress pass/drop functionality at ingress ports, obviating the need for the mechanisms to accomplish the function at egress ports.

Virtual egress packet classification at ingress


A method of conditioning wastewater includes flowing wastewater into and through a first fluid tube and flowing a heat transfer fluid into and through a second fluid tube. The heat transfer fluid entering the second fluid tube has a different temperature than the wastewater entering the first fluid tube. The first fluid tube and said second fluid tube are positioned within a first casing that is surrounded by insulation. The first casing and the insulation are positioned within a second casing. The wastewater in said first fluid tube and said heat transfer fluid in said second fluid tube are arranged to allow heat transfer between the wastewater in said first fluid tube and the heat transfer fluid in said second fluid tube.

Naturally occurring organisms in sewage that digests and treats wastewater are most effective at certain temperature ranges. In the winter, wastewater may be too cold for the organisms to effectively treat the wastewater. In the summer, the wastewater may become too hot for the organisms to effectively treat the wastewater. Therefore, a system for heating the wastewater in the winter and for cooling the wastewater in the summer would be beneficial to increase treatment efficiency.

Wastewater conditioning apparatus and method


This invention relates to phosphate prodrugs of a farnesylated dibenzodiazepinone, to processes of their manufacture, to pharmaceutical compositions comprising the prodrugs, and to their use in the treatment of neoplasms.

The farnesyl dibenzodiazepinone Compound 1 was isolated from Micromonospora sp. strains 046-ECO11and [S01]046, and was disclosed in U.S. Patent Application publication No. 2005/0043297, incorporated by reference in its entirety. Compound 1 was also disclosed in Charan et al. (2004), J. Nat. Prod., vol 67, 1431-1433, and Igarashi et al. (2005), J. Antibiot., vol 58, no 5, 350-352. Its use for the treatment of cancer is disclosed in US patent publication numbers 2005/0107363 and 2006/0079508, both incorporated herein by reference in their entirety.

Compound 1 was further shown to exhibit antibacterial activity, as well as binding or inhibitory activity against 5-lipoxygenase (5-LO), acyl CoA-cholesterol acyltransferase (ACAT), cyclooxygenase-2 (COX-2), the peripheral benzodiazepine receptor (PBR), and leukotriene cysteinyl (CysLT1) in US patent publication No. 2006/0079508, US Patent Application publication No. 2005/0043297 and in Canadian patent application 2,511,750, filed Jul. 21, 2005, all incorporated by reference in their entirety for all purposes. Most recently, Compound 1 was shown to be involved in the inhibition of the binding of ras-F to galectin (Gourdeau et al, Poster presented at 12th Meeting on Protein Phosphorylation and Cell Signaling, Salk Institute, La Jolla, Calif. Aug. 18-22, 2006).
Phosphate prodrugs have been produced for anticancer drugs, including ZD-6126 (N-acetylcolchinol-O-Phosphate, U.S. Pat. No. 6,423,753, issued to Dougherty) and Combretastatin A4 phosphate (U.S. Pat. No. 5,561,122, issued to Pettit) and A1 diphosphate (U.S. Pat. No. 7,078,552, issued to Pettit et al), all incorporated by reference in their entirety.
The farnesyl dibenzodiazepinone Compound 1 is highly lipophilic and is nearly insoluble in aqueous media. Formulation of Compound 1 thus often requires the use of solubilizers having some toxicity level, e.g. Cremophor EL™, poly(ethylene glycol)s or polysorbates. There is a need for a precursor of Compound 1 with improved chemical and biological properties, such as solubility and bioavailability. A highly desirable precursor would be a prodrug of Compound 1 stable enough to be formulated and administered, and which would release the active drug in vivo.

This patent is subject to a terminal disclaimer.

Phosphate prodrugs of a farnesyl dibenzodiazepinone, processes for their production and their use as pharmaceuticals


A feeding arrangement for feeding plant material to a treatment vessel is disclosed including a plug screw feeder, a force feeding screw for feeding the plant material to the plug screw feeder in which the force feeding screw is arranged essentially perpendicular to the plug screw, and a feeding device for feeding incoming material to the force feeding screw, and in which the plug screw can rotate at variable speed, and the force feeding screw includes when a distance between the last screw thread of the force feeding screw and the outer diameter of the plug screw is up to 90 mm.

Feeding of material to be treated in a treatment vessel may be carried out in different ways and is dependent on a number of factors such as the characteristics of the material to be fed and the possible desired action on the material beside the actual feeding thereof. Plug screw feeders, in which a rotating screw transports the material forward is a commonly used type of feeder. At the same time as the material is fed to the treatment vessel, the screw and associated screw pipe or housing also exercises a volumetric compression function. Such plug screw feeders are very commonly used for feeding wood chips to a digester or an impregnator. Commonly, such plug screw feeders also comprise a plug pipe at the end of the feeder, with an essentially constant inner diameter. The compression taking place in that part of the plug screw feeder is essentially axial.
A known problem with such plug screw feeders is that the theoretical possible compression of the material in the plug screw feeder is often not obtained. A solution to such a problem may be to "force-feed" the plug screw, i.e. making sure that material is fed to the plug screw such that a main part of the available volume in the screw housing is properly filled and thus may be compressed.
A prior art screw feeder apparatus using the principle of force-feeding is disclosed in U.S. Pat. No. 5,320,034. The known apparatus is to be used for increasing fiber dislocation of wood chips, improving a subsequent impregnation of the fiber material. By forcing material into the inlet section of the compression device (plug screw feeder) by means of a force-feeding screw, the packing density, i.e. the degree of filling, will be increased and uniform in the inlet of the plug screw. In other words, it is ensured that the plug screw feeder volume at the inlet section is filled with wood chips.
However, when dealing with other types of materials, different considerations may apply. It has been discovered that the screw feeder apparatus disclosed in U.S. Pat. No. 5,320,034 is not applicable to the feeding of non-wood plant material, such material having a much lower bulk density than wood chips, without modification.
The use of non-wood plants has recently become more and more important. In some cases the material is used as fuel for generating heat. The material may also be used for production of pulp for paper-making purposes or the like, replacing wood as the source material. In many such processes, the non-wood material is treated in a pressurized reactor, imposing special requirements on the feeding arrangement.
There is thus a need for an improved feeding arrangement suitable for the feeding of bulky non-wood plant material and accordingly a system for treatment of such material comprising such a feeding arrangement and a method for feeding non-wood plant material.

Arrangement, system and method for handling non-wood plant material


The resistance value and the leakage current of a load can be measured simultaneously. A load current is fed, mirrored by electrical power supplies (1, 3, 36), into a resistance measuring circuit (13, 30) and a leakage current measuring circuit (14 to 16). This permits rapid, precise measurement of a plurality of loads by a single measuring circuit connected via one multiplexer. The firing transistors can be distributed among different ASICs or provided jointly for a plurality of firing caps.

The invention relates to a diagnostic circuit for measuring the resistance and the leakage current of at least one electrical load, specifically a firing cap of a motor vehicle restraint system. With such electrical loads in the form of firing caps, there is frequently a requirement to measure the resistance and the leakage current for diagnostic purposes in order to ensure correct functional capability of the firing caps. This diagnosis can be carried out at regular or irregular intervals, for example when the motor vehicle is started. If it is determined during the diagnosis that the firing cap resistance lies outside the permissible tolerance range and/or an unacceptable leakage current occurs, a fault message can be promptly output and/or the driving parameters (driver voltage, driver current, driving time) for driving the firing cap can be adapted if required.
During the diagnostic measurement, the firing cap resistance and the firing cap leakage current are usually measured one after the other. However, if a multiplicity of firing caps are provided, which is frequently the case in modern motor vehicle restraint systems, a long period of time is required to test all of the firing caps.
German Patent DE 196 38 393 C1 discloses a diagnostic circuit in which the firing cap that is to be tested is supplied by a power source which is driven in broadband fashion. The voltage drop across the firing cap is applied, using a switching element, to a correlator that is also supplied in broadband fashion. In order to measure leaks, further separate power sources may be provided for measuring leakage currents to ground or battery voltage.
U.S. Pat. No. 5,640,095 describes a circuit for testing the leakage resistance of a switching point, in which a test current is fed into the switching point and the voltage occurring at the switching point is detected. In order to perform a bipolar leakage resistance measurement, two measuring currents in opposite directions can be fed into the switching point.
Published European Patent Application EP-A 0 486 114 discloses an apparatus for testing an electrical circuit with respect to the leakage current and the continuity. The circuit is part of a bridge circuit whose branches are supplied with identical currents. To detect the leakage current, the bridge voltage is evaluated.
It is accordingly an object of the invention to provide a diagnostic circuit for measuring the resistance and the leakage current of at least one firing cap which overcomes the above-mentioned disadvantageous of the prior art apparatus of this general type. In particular, it is an object to provide a diagnostic circuit that enables a precise diagnosis to be carried out quickly.
With the foregoing and other objects in view there is provided, in accordance with the invention, a diagnostic circuit for measuring resistance and leakage current for at least one firing cap of a motor vehicle occupant protection system. The diagnostic circuit includes: a terminal for receiving a reference potential; at least one load having two terminals, one of the two terminals of the at least one load connected to the terminal for receiving a reference potential; an activation circuit for feeding a current to the at least one load during a diagnostic measurement; a resistance measuring circuit for determining a resistance of the at least one load; a leakage current measuring circuit for determining a leakage current that may be flowing during the diagnostic measurement, the leakage current measuring circuit configured to measure a difference between the current fed to the at least one load by the activation circuit and a current flowing from the at least one load to the terminal for receiving a reference potential; and a plurality of electrical power supplies connected to the leakage current measuring circuit and to the two terminals of the at least one load.
In the diagnostic circuit, the electrical resistance of the at least one load, in particular of the firing cap, and the leakage current are measured by detection circuits which are preferably at least partially embodied separately. These measurements can be carried out simultaneously. The time interval which is required overall for measuring the resistance and leakage current is thus extremely short. In particular, if a multiplicity of loads are to be tested, for example, if more than 10 firing cap circuits, are present, the overall diagnostic time interval required can be shortened drastically. During the simultaneous determination of leakage currents, the resistance measurement result based on a current measurement can additionally be corrected immediately taking into account the leakage current, with the result that the measuring accuracy is increased.
The leakage current measurement can be determined easily by forming a difference between the current supplied on the input side and the current measured on the output side. This differential current is preferably detected by a resistive voltage divider which generates a voltage representing the leakage current at its tap. Here, two electrical power supplies which are connected to one another and which simulate the current supplied to the firing cap or flowing out of the firing cap are provided. A connection point between these electrical power supplies can be connected to the leakage current measuring circuit, preferably to the resistance voltage divider. The resistive voltage divider ensures that the measuring current occurring at the connection point lies between the reference voltages applied to the resistive voltage divider and increases or decreases depending on the direction of the leakage current. Instead of a resistive voltage divider, it is, however, also possible to provide a single resistor which is connected to ground, for example. In this case, the leakage current measuring circuit changes it""s polarity depending on the direction of the leakage current.
In accordance with an added feature of the invention, a voltage regulator that regulates the voltage occurring at a load terminal to a specific value is connected to one of the electrical power supplies. In this way, the current and voltage conditions at the load are permanently predefined and the electrical power supply connected to this terminal is controlled, in contrast to the electrical power supply connected to the other load terminal, by an impressed voltage and not by an impressed current.
In accordance with an additional feature of the invention, the voltage is variable, with the result that, for example, it is possible to repeat leakage current measurements with different potential values. In this way, leakage resistances to potential values between ground and the supply voltage are reliably detected.
In accordance with an another feature of the invention, the diagnostic circuit is used in vehicle occupant protection systems for motor vehicles, in particular airbag systems. The diagnostic circuit can be integrated directly into the control unit of the restraint system. This permits rapid diagnosis with short transient recovery times.
In accordance with a further feature of the invention, an electrical power supply (current mirror circuit) is provided which exactly simulates or which provides a fixed proportion of the current flowing through the firing cap during the diagnosis. The current is preferably impressed by a power source, and conducts it to the resistance measuring circuit and leakage current measuring circuit via separate terminals. This permits current measurement without affecting and falsifying the current which is actually flowing through the firing cap. Reciprocally, undesired effects occurring during the measurement of the resistance and leakage current can also be prevented by the electrical power supply terminals.
In accordance with a further added feature of the invention, the currents supplied to the resistance measuring circuit and the leakage current measuring circuit correspond to just a fraction, for example a tenth, of the current supplied to the firing cap. In this way, on the one hand, it can be ensured that the firing cap is supplied with current sufficient for reliable diagnosis, and on the other hand, that only small currents have to be coped with during the evaluation. These low currents additionally ensure that the power drain is low and that there is no excessive thermal loading of the evaluation circuit. In addition, only low currents have to be built up and switched. In particular, when a multiplexer which is preferably of analog design is used, and there is a time-selective measurement of a multiplicity of firing caps, the power consumption is greatly reduced.
In accordance with a further additional feature of the invention, the resistance of the firing cap is measured by separately measuring the current flowing through the firing cap. The current is preferably simulated by the electrical power supply, and by voltage drop occurring across the firing cap during this process.
In accordance with yet an added feature of the invention, different currents are generated for the resistance and leakage current measurements. The leakage current is preferably measured with only the lower current strength, because undesired power losses become particularly clearly apparent then.
In accordance with yet an additional feature of the invention, there is preferably one multiplexer for switching between different loads. Consequently, in each case, just one of the resistance and leakage current detection components has to be provided, which not only reduces the expenditure on circuitry, but also ensures identical measuring conditions, sensitivity, measuring tolerances etc. and permits the system to be extended as desired. Standardization, too, only has to be carried out once.
In accordance with yet a further feature of the invention, precise resistance measurement with leakage current compensation and/or offset compensation can be carried out by duplicating the measurement with different current strengths and forming the difference between the measured results.
In accordance with yet another feature of the invention, a multiplicity of loads, in particular firing caps, can be measured using the same resistance and leakage current measuring circuit components. The multiplexer is configured in particular as an analog multiplexer and has switches which are connected in series with the individual firing caps so that individual testing of the firing caps can be carried out successively. The voltage drops across the firing caps are preferably measured by a voltage detector, for example an operational amplifier. This operational amplifier is also preferably connected via switches of the multiplexer to the terminals of all of the loads which are to be tested. This gives rise to a somewhat higher expenditure for switches than would be the case if the operational amplifier were directly connected to the electrical power supply terminals of the multiplexer switches that are connected in series with the loads. Another possibility would then be implemented without additional switches. However, with this circuitry it is then possible to measure the load voltage directly in a precise way without any errors as a result of voltage drops at the multiplexer switches connected in series to the loads. Preferably, additional diodes are provided between the operational amplifier and the loads, through which diodes the undesired effects due to back currents or the like are prevented.
In accordance with yet another added feature of the invention, the voltage regulator, if one is present, is connected directly to a terminal of the voltage detector. The voltage regulator is consequently connected, via the multiplexer switch which has just closed, to one of the terminals of the firing cap which has just been measured, with the result that the potential occurring there is regulated.
In accordance with yet another additional feature, the invention can be used for all electrical loads in which the resistance (impedance) and the leakage current are to be measured. It is suitable, and is designed, in particular for firing cap diagnosis of a multiplicity of firing circuits for firing caps. In that case, it is possible to perform very rapid diagnostic measurement with short transient recovery times while at the same time providing the possibility of measuring leakage currents and firing cap resistances. It is possible to use a multiplexer which is of simple design and can be controlled in an analog fashion. The requirements placed on the analog multiplexers in terms of circuitry and control are very low because only a small number of switches are required per firing cap (four switches per firing cap). The other circuit components can be used jointly to carry out all of the diagnostic measurements and therefore, only one of them has to be provided. The invention can also be embodied in the form of an integrated circuit and in this case requires only a small silicon area.
With the foregoing and other objects in view there is provided, in accordance with the invention, a motor vehicle occupant protection system that includes: a terminal for receiving a reference potential; at least one load having two terminals, one of the two terminals of the at least one load connected to the terminal for receiving a reference potential; an activation circuit for feeding a current to the at least one load during a diagnostic measurement; a resistance measuring circuit for determining a resistance of the at least one load; a leakage current measuring circuit for determining a leakage current that may be flowing during the diagnostic measurement, the leakage current measuring circuit configured to measure a difference between the current fed to the at least one load by the activation circuit and a current flowing from the at least one load to the terminal for receiving a reference potential; a plurality of electrical power supplies connected to the leakage current measuring circuit and to the two terminals of the at least one load; a first integrated circuit including a first plurality of switching elements; and a second integrated circuit including a second plurality of switching elements. The at least one load includes a plurality of firing caps. Each one of the plurality of firing caps is connected between a respective one of the first plurality of the switching elements and a respective one of the second plurality of the switching elements. Each one of the plurality of firing caps is connected to fire when the respective one of the first plurality of the switching elements and the respective one of the second plurality of the switching elements are closed.
When the firing transistor pairs are distributed between different chips, the vehicle occupant protection system has a high level of operational reliability.
With the foregoing and other objects in view there is provided, in accordance with the invention, a motor vehicle occupant protection system that includes: a terminal for receiving a reference potential; at least one load having two terminals, one of the two terminals of the at least one load connected to the terminal for receiving a reference potential; an activation circuit for feeding a current to the at least one load during a diagnostic measurement; a resistance measuring circuit for determining a resistance of the at least one load; a leakage current measuring circuit for determining a leakage current that may be flowing during the diagnostic measurement, the leakage current measuring circuit configured to measure a difference between the current fed to the at least one load by the activation circuit and a current flowing from the at least one load to the terminal for receiving a reference potential; a plurality of electrical power supplies connected to the leakage current measuring circuit and to the two terminals of the at least one load; a first integrated circuit including a first plurality of switching elements; a second integrated circuit including a second plurality of switching elements; a common switching element; and a plurality of switching elements. The at least one load includes a plurality of firing caps. Each one of the plurality of the firing caps has a first terminal and a second terminal. The first terminals of at least some of the plurality of the firing caps are connected together and are driven by the common switching element. Each one of the second terminals of the at least some of the plurality of the switching elements are individually connected to a respective one of the plurality of the switching elements.
The vehicle occupant protection system can fire the caps utilizing a reduced number of firing transistors and leads, but at the same time can provide for the possibility of selective testing.
Other features which are considered as characteristic for the invention are set forth in the appended claims.
Although the invention is illustrated and described herein as embodied in a diagnostic circuit for measuring the resistance and leakage current of at least one firing cap of a vehicle occupant protection system for motor vehicles, and vehicle occupant protection system of corresponding configuration for motor vehicles, it is nevertheless not intended to be limited to the details shown, since various modifications and structural changes may be made therein without departing from the spirit of the invention and within the scope and range of equivalents of the claims.
The construction and method of operation of the invention, however, together with additional objects and advantages thereof will be best understood from the following description of specific embodiments when read in connection with the accompanying drawings.

DIAGNOSTIC CIRCUIT FOR MEASURING THE RESISTANCE AND THE LEAKAGE CURRENT OF AT LEAST ONE FIRING CAP OF A MOTOR VEHICLE OCCUPANT PROTECTION SYSTEM, AND A MOTOR VEHICLE OCCUPANT PROTECTION SYSTEM INCLUDING THE DIAGNOSTIC CIRCUIT


A technique to generate an executable task includes inspecting a task specification data structure to determine what software entities are to be generated to create the executable task, inspecting the task specification data structure to determine how the software entities will be linked after generating the software entities, inspecting the task specification data structure to determine logic to be executed by the software entities, and generating the software entities to create the executable task.

A conventional code generator is a software tool that automatically writes source code and provides an alternative to manual coding that can be faster and less prone to typographical errors or other human errors. These code generators can improve productivity by automatically generating source code that otherwise would need to be manually written by a human.
However, conventional code generators are designed for software designers and engineers with extensive knowledge of software programming. Inputs into these software tools are often Unified Modeling Language ("UML") diagrams, flow charts, source code templates, or other vehicles software designers or engineers use to specify software design. These design diagrams and source codes specify the structure of the classes, data, methods, etc. of the software to be generated, and how these elements interact. Accordingly, software designers or engineers must have already determined the design of the code before taking advantage of the code generator's capability to translate the design into source code.
These conventional code generators generate source in a target language, such as Java, C++, or C#, which must then be compiled. Typically, the generated source code is one small piece of a larger application, consisting of many other source code files that had to be hand-written by programmers. Some code generators can generate code and just-in-time compile it at run-time. But even in these cases, the input is typically designed and/or written by a software engineer.


A method for implementing anti-static steering for vehicle steering systems includes receiving a desired rear wheel angle input and receiving a vehicle speed input. An approved rear wheel angle output is generated using the desired rear wheel angle input and the vehicle speed input, wherein the approved rear wheel angle is based upon one of a plurality of defined operating states, the plurality of operating states including operation at a speed in a first range, operation at a speed in a second range, and transitions therebetween.

The present invention relates generally to vehicle steering systems and, more particularly, to a method and system for anti-static steering for vehicle steering systems.
In vehicular applications, a typical four-wheel steering system steers both the front and the rear wheels of a vehicle. More specifically, a rear wheel steering portion of the four-wheel system may produce a desired rear wheel steering angle in order to improve directional stability at high speeds and maneuverability at low speeds. A high-speed steering method implemented with this system may reduce vehicle yaw by steering the front and rear wheels in the same direction, or in phase, and thereby improve vehicle safety. In contrast, a low speed steering method implemented with four-wheel steering may achieve tight turning radii at low speeds by steering the front and rear wheels in different directions, or out of phase, to thereby reduce the effective turning radius of the vehicle.
In the rear wheel steering portion of a four-wheel steering system, an electric motor is typically employed to steer the rear wheels. Attempting to turn the rear wheels when the vehicle is substantially stopped (or when the steered wheels are otherwise static and not rolling) places high torque loads on the electric motor. This is referred to as "static steering." Accommodating such high torque loads mandates the utilization of larger motors, requiring larger size and weight, and may result in less precise control.
On the one hand, certain steering systems may in fact provide sufficient torque so as to allow the rear wheels to be turned while the vehicle is not moving. Delphi's production QUADRASTEER™ system is one example of such a steering system. Because systems of this type are powerful enough to enable static steering, they generally do not incorporate measures to avoid or prevent static steering.
However, other newer active rear steering systems have been designed to work on passenger vehicles and, as a result, have been designed with only enough power to steer the rear wheels during dynamic maneuvers (i.e., maneuvers that take place at speeds significantly above static steering speeds). For systems of this type, there is therefore a need for properly controlling the rear wheels to avoid attempting static steering and prevent high current in the low-power motor. In this manner, any overheating, demagnetization, and/or other damage that might cause a permanent system failure may be avoided.

Method and system for anti-static steering for vehicle steering systems


A laser beam pattern mask includes an opaque substrate and a plurality of transmission portions formed in the substrate to transmit light, wherein each of the transmission portions extend in a first direction while being uniformly spaced apart from one another by a predetermined distance in a second direction perpendicular to the first direction, each of the transmission portions including hexagonal cells arranged in the first direction and in contact with one another.

1. Field of the Invention
The present invention relates to crystallization of silicon, and more particularly, to a laser beam pattern mask and a crystallization method using the same to improve the crystallization characteristics.
2. Discussion of the Related Art
With society becoming more dependent on information, the demand for various display devices has steadily increased. To meet such demands, efforts have been made recently to research flat panel display devices such as liquid crystal displays (LCDs), plasma display panels (PDPs), electro-luminescent displays (ELDs), vacuum fluorescent displays (VFDs), and the like. Practical applications of these flat panel display devices include integration with various appliances for display purposes.
In particular, LCDs have been used as a substitute for cathode ray tubes (CRTs) in association with mobile image display devices. Compared to CRTs, LCDs have superior picture quality, light weight, thin size, and low power consumption. Thus, LCDs are currently most widely used. Various applications of LCDs are being developed in association with not only mobile image display devices such as monitors of notebook computers, but also as monitors of televisions to receive and display broadcast signals, and as monitors of desktop computers.
Such LCDs mainly include a liquid crystal panel for displaying an image and a driver for applying a drive signal to the liquid crystal panel. The liquid crystal panel includes first and second substrates joined together with space therebetween and a liquid crystal layer constituted by liquid crystals sealed in the space provided.
The first substrate (TFT array substrate) includes a plurality of uniformly spaced gate lines arranged in one direction and a plurality of uniformly spaced data lines arranged in a direction perpendicular to the gate lines. The first substrate also includes a plurality of pixel electrodes arranged in the form of a matrix array at respective pixel regions, each pixel region defined by an intersection of each gate line and each data line. The first substrate further includes a plurality of thin film transistors (TFTs), each of which is switched on by a signal on an associated one of the gate lines and transmits a signal on an associated one of the data lines to an associated one of the pixel electrodes.
The second substrate (color filter substrate) includes a black matrix layer for blocking incidence of light to a region other than the pixel regions. The second substrate also includes red (R), green (G), and blue (B) color filter layers for reproducing color tones and a common electrode for reproducing an image.
The first and second substrates are joined by a seal member having a liquid crystal injection port formed by spacers to maintain a certain amount of space between the first and second substrates. Liquid crystal material is sealed in the space between the first and second substrates.
The driving principle of the above-mentioned general LCDs utilizes optical anisotropy and polarization properties of the liquid crystals. Since liquid crystals have thin and elongated molecular structures, molecules thereof have an orientation in a certain direction. It is possible to control the orientation of liquid crystal molecules by intentionally applying an electric field to the liquid crystal molecules. By controlling the orientation of liquid crystal molecules, the arrangement of liquid crystal molecules is varied so as to exhibit optical anisotropy. Images are generated when light incident to the liquid crystals is refracted in the direction in which the liquid crystal molecules are oriented.
Currently, active matrix LCDs, in which thin film transistors and pixel electrodes connected to the thin film transistors (TFTs) are arranged in a matrix array, are of most interest because they offer superior resolution and superior moving picture reproduction capabilities. Because the semiconductor layer of each TFT in LCDs is made of polysilicon, it is possible to form TFTs and driving circuits on the same substrate. Doing so eliminate the need to use a separate process for connecting the TFTs and driving circuits. Therefore, the manufacturing process of such LCDs is simplified. In addition, polysilicon has rapid response because the field effect mobility of polysilicon is 100 to 200 times that of amorphous silicon. Polysilicon also exhibits superior stability to temperature and light.
Formation of polysilicon may be classified into a low-temperature process and a high-temperature process in terms of process temperature. The high-temperature process requires a temperature condition higher than the strain temperature of an insulating substrate on which polysilicon is to be grown. The process temperature of the high-temperature process is on the order of 1,000° C. For this reason, one disadvantage is that it is necessary to use expensive, high thermal resistance substrates such as quartz in place of cheap, low heat resistance substrates such as glass as the insulating substrate.
Furthermore, a high surface roughness is required to form a polysilicon thin film using the high-temperature process. However, the same high-temperature process degrades the crystallinity of fine crystalline grains. For this reason, another disadvantage of polysilicon formed in accordance with the high-temperature process is a degradation in the very characteristics required for the application thereof, as compared to polysilicon formed in accordance with the low-temperature process. To this end, research into development of polysilicon formation techniques is currently being conducted where amorphous silicon, capable of being deposited at a low temperature, is crystallized into polysilicon.
Laser annealing uses a method for irradiating a pulse-shaped laser beam to a substrate. In accordance with this method, melting and solidifying amorphous silicon are repeated at intervals of 10 to 102 nanoseconds by the pulse-shaped laser beam. This technique minimizes damage to a lower insulating substrate. Because of such an advantage, laser annealing has been the most preferred technique for the low-temperature crystallization process.
Hereinafter, a silicon crystallization method using the above-mentioned laser annealing will be described in conjunction with the annexed drawings. FIG. 1 is a graph depicting the grain size of amorphous silicon depending on the density of laser energy. As shown in FIG. 1, crystallization of amorphous silicon may be classified into three regions in accordance with the intensity of laser energy.
The first region is a partial melting region, in which laser energy is irradiated on an amorphous silicon layer at an intensity capable of melting only the surface of the amorphous silicon layer. In the first region, the surface of the amorphous silicon layer is partially melted in accordance with the irradiation. After solidification, small-sized crystal grains are formed at the surface of the amorphous silicon layer.
The second region is a near-complete melting region, in which laser energy is irradiated to an amorphous silicon layer at an intensity higher than that of the first region capable of almost completely melting the amorphous silicon layer. Small nuclei remaining after the melting are used as seeds to grow the crystals. Although it is possible to grow more crystal grains in the second region as compared to the first region, it is difficult to obtain homogenous crystal grains. Furthermore, the second region is considerably narrow, as compared to the first region.
The third region is a complete melting region, in which laser energy is irradiated to an amorphous silicon layer at an intensity higher than that of the second region capable of completely melting the amorphous silicon layer. In this case, solidification occurs after the amorphous silicon has been completely melted. Accordingly, homogeneous nucleation of crystals is possible. After the irradiation, a crystalline silicon layer consisting of homogenous fine crystal grains is formed.
In the process of producing polysilicon using the laser density of the second region, the number of times the laser beam is irradiated and the laser beam overlap ratio are controlled to enable formation of homogenous large crystal grains. However, the boundaries of crystal grains of polysilicon obstruct current flow. For this reason, it is difficult to obtain a reliable thin film transistor device. Furthermore, an insulating film over which polysilicon is grown becomes damaged due to current induced by collision of electrons in the crystal grains of the polysilicon. The result is a product having poor quality.
In order to solve this problem, sequential lateral solidification (SLS) technique was proposed for forming single-crystalline silicon. This technique is based on the fact that silicon crystal grains are grown at the boundary between liquid-phase silicon and solid-phase silicon in a direction perpendicular to the boundary (Robert S. Sposilli, M. A. Crowder, James S. Im, Mat. Res. Soc. Symp. Proc. Vol. 452, 956˜957, 1997). In accordance with the SLS technique, it is possible to crystallize amorphous silicon into single crystals of 1 μm or greater by appropriately adjusting the laser energy intensity, irradiation range, and translation distance of a laser beam irradiated on the amorphous silicon such that silicon crystal grains are laterally grown to a certain length. One draw back is that an irradiation device typically used in such an SLS process cannot change amorphous silicon deposited over a large-area substrate into polycrystalline silicon at one time because the typical irradiation device concentrates a laser beam on a narrow region of the substrate. To this end, a substrate deposited with an amorphous silicon layer is mounted on a movable stage. After a laser beam irradiates a certain region of the substrate, the substrate is repositioned by moving the stage to allow the laser beam to irradiate the next region of the substrate. In such a manner, the entire region of the substrate is irradiated by the laser beam.
FIG. 2 is a schematic view illustrating a general SLS irradiation device. As shown in FIG. 2, the SLS irradiation device includes a laser generator for generating a laser beam, an attenuator 1 for controlling the energy intensity of the laser beam, a first mirror 2a for changing the traveling path of the laser beam, a telescopic lens 3 for diverging the laser beam, and a second mirror 2b for again changing the traveling path of the laser beam. The SLS irradiation device also includes a lens 4 for homogenously condensing the laser beam, a third mirror 2c for again changing the traveling path of the laser beam, and a field lens 5 for changing the shape of the laser beam to an appropriate shape enabling the laser beam to be incident to a laser beam pattern mask 6. The laser beam pattern mask 6 has a predetermined pattern allowing selective transmission of the laser beam. The SLS irradiation device further includes a projection lens 7 for reducing the scale of the laser beam passing through the laser beam pattern mask 6 to a predetermined scale and irradiating the same onto substrates.
The laser generator is an excimer laser typically employing XeCl (308 nm) or KrF (248 nm). The laser generator emits an unprocessed laser beam, which is converted into a predetermined laser beam pattern by sequentially passing through the attenuator 1, the mirrors 2a, 2b, and 2c adapted to change the traveling path of the laser beam, the lenses 5 and 7 having particular functions, and the laser beam pattern mask 6. The processed laser beam having the predetermined pattern is then irradiated on substrate 10.
Mirrors 2a, 2b and 2c are used to minimize the space occupied by the SLS irradiation device. In some cases, the space occupied by the SLS irradiation device may be increased or reduced by adjusting the number of mirrors.
A movable stage 8, on which a substrate 10 deposited with an amorphous silicon layer is mounted, is arranged at a position corresponding to the laser beam pattern mask 6. The stage 8 may be an X-Y stage. Since the substrate 10 is mounted on the stage 8 after fabrication, means for fixing the substrate 10 on the stage 8 is provided to prevent the substrate 10 from moving in relation to the stage 8 during the crystallization process. Crystallization of the entire region of the substrate 10 is achieved by moving the stage 8 in the X and Y directions such that the crystallized region of the substrate 10 is gradually increased.
The laser beam pattern mask 6 is divided into transmission portions, through which the laser beam passes, and shield portions, which block transmission of the laser beam. The width of each transmission portion determines the lateral growth length of crystal grains formed in one exposure.
Hereinafter, the laser beam pattern mask 6 will be described in detail with reference to the annexed drawings. FIG. 3 is a plan view illustrating a laser beam pattern mask used in a conventional laser irradiation process. FIG. 4 is a crystallized region formed in one shot of laser beam irradiated using the laser beam pattern mask of FIG. 3.
As shown in FIG. 3, the laser beam pattern mask, which is used in the conventional laser irradiation process, includes transmission portions A each providing an opened pattern having a first width a, and shield portions B each providing a shielded pattern having a second width b. The transmission portions A and shield portions B are alternately arranged.
Laser irradiation using the laser beam pattern mask is carried out as follows. A single shot of laser beam is irradiated on a substrate deposited with an amorphous silicon layer through the laser beam pattern mask 6 positioned above the substrate. At this time, the laser beam is irradiated on areas 22 (FIG. 4) corresponding to respective transmission portions A of the laser beam pattern mask 6. As a result, the portions of the amorphous silicon layer corresponding to respective irradiated areas 22 are melted into a liquid phase, as shown in FIG. 4. In this case, the intensity of laser energy used is in the range of the complete melting region capable of completely melting the amorphous silicon layer in the irradiated areas 22.
The region in which the substrate is irradiated by the laser beam in one shot is referred to as a "unit region" 20. The unit region 20 is defined to have a horizontal length L and a vertical length S as shown in FIG. 3.
Following the laser beam irradiation, silicon grains 24a and 24b are grown in each irradiated areas 22. The silicon grains 24a and 24b grow laterally toward boundary surfaces 21a and 21b. The boundary surfaces 21a and 21b are formed between the solid-phase amorphous silicon area and the liquid-phase area where the amorphous silicon layer has completely melted into a liquid phase. The lateral growth of the silicon grains 24a and 24b is in a direction perpendicular to the boundary surfaces 21a and 21b.
When the width of the irradiated areas 22 corresponding to each transmission portion A is less than two times the growth length of the silicon grains 24a and 24b, the silicon grains 24a and 24b, which are grown inside of an area defined between the boundary surfaces 21a and 21b in a direction perpendicular to the boundary surfaces 21a and 21b, come into contact with each other during the growth. This contact stops the growth of silicon grains 24a and 24b.
In order to grow more silicon grains, the stage on which the substrate is mounted is subsequently moved to allow unexposed areas of the substrate adjacent to the irradiated areas 22 to be irradiated. Subsequent irradiations allow crystal grains to grow connected to the crystal grains formed in the previous irradiation. Generally, the growth length of crystal grains connected to the previously irradiated areas is determined by the width of each transmission portion A and the width of each shield portion B in the laser beam pattern mask 6.
FIG. 5 is a plan view illustrating sequential processing steps of the conventional crystallization process. The conventional silicon crystallization process proceeds on the substrate 10 in the order shown in FIG. 5. That is, the irradiation position on the substrate 10 is horizontally translated from right to left (along the X-axis in the negative direction) by a distance corresponding to the length L of each transmission portion A of the laser beam pattern mask 6 as shown in FIG. 3 (translation {circle around (1)}). Translation {circle around (1)} is repeated after each crystallization process until the crystallization process is completed for a region corresponding to the horizontal length of the substrate 10.
Thereafter, the irradiation position on the substrate 10 is vertically translated from the upper side to the lower side (along the Y-axis in the negative direction) by a distance corresponding to ½ of the total width of one transmission portion A and one shield portion B in the laser beam pattern mask 6 ((a+b)/2) (translation {circle around (2)}) and the crystallization process is carried out. Subsequently, the irradiation position on the substrate 10 is again horizontally translated from to right (along the X-axis in the positive direction) by a distance corresponding to the length L of each transmission portion A of the laser beam pattern mask 6 (translation {circle around (3)}) and the crystallization process is carried out. The translation {circle around (3)} is repeated after every crystallization process until the crystallization process is completed for a region corresponding to the horizontal length of the substrate 10. The crystallization process associated with the translation {circle around (2)} and translation {circle around (3)} is carried out for unirradiated areas in each unit region 20 of the substrate 10 irradiated in the crystallization process associated with translation {circle around (1)}. As described above, the unit region 20 corresponds to the size of the laser beam pattern mask 6. The irradiated areas in the crystallization process associated with translation {circle around (2)} and translation {circle around (3)} are partially overlapped with the irradiated areas in the crystallization process associated with translation {circle around (1)} so as to connect the growth of crystals connected to the crystals formed in the previous crystallization process associated with translation {circle around (1)}.
Thereafter, the irradiation position on the substrate 10 is vertically translated from the upper side to the lower side (in a negative Y-axis direction) by a distance corresponding to the vertical length S of the laser beam pattern mask 6 (translation {circle around (4)}). After translation {circle around (4)}, the procedures associated with translations {circle around (1)} to {circle around (4)} are repeated to complete crystallization for the entire surface of the substrate 10.
The translation of the irradiation positions on the substrate 10 is achieved by moving the stage 8 (in FIG. 2), on which the substrate 10 is mounted, in relation to the laser beam pattern mask 6, which is fixed. The movement of the stage 8 is carried out in a direction opposite to the directions shown for translations {circle around (1)} to {circle around (4)} in FIG. 5.
FIGS. 6A and 6B are scanning electron microscope (SEM) micrographs showing polysilicon grown in accordance with the conventional crystallization method. When a polysilicon layer is formed in accordance with the crystallization method of FIG. 5 using the conventional laser beam pattern mask, an overlap region is formed between adjacent crystallized areas or patterns. This overlap region can be macroscopically observed in the form of a line, in contrast to other crystallized areas. The overlap region can be macroscopically observed in the form of a line because laser beam irradiation is carried out two or more times for the same region in the typical crystallization method of FIG. 5. That is, such a linear overlap region is created when laser beam irradiation on the substrate is carried out using a laser beam pattern mask in which a plurality of linear transmission portions having a certain width are uniformly spaced apart from one another by a certain distance.
In this case, the overlap regions of the crystallized patterns are macroscopically observed in the form of a plurality of spaced lines. These overlap regions serve as grain boundaries. When an active element is arranged on such an overlap region, the performance characteristics of the element are reduced because the mobility of elections at the grain boundaries are affected.
FIG. 6B is a SEM micrograph in the case in which the length of crystallized grains is smaller than that of FIG. 6A. In either case of FIG. 6A or FIG. 6B, a plurality of lines serving as grain boundaries were observed in the overlap regions of the crystallized patterns. Thus, the above-mentioned conventional laser beam pattern mask and the conventional crystallization method using the conventional laser beam pattern mask have various problems.
First, when laser beam patterns are irradiated on a substrate through the conventional laser beam pattern mask in a crystallization process, irradiation overlap is generated between adjacent laser beam patterns. In particular, the irradiation of the laser beam patterns is carried out through the linear transmission portions of the laser beam pattern mask. In this case, linear overlap regions are formed between adjacent irradiated areas. Normal crystallization cannot be achieved in the linear overlap regions, so the linear overlap regions create linear grain boundaries. These linear grain boundaries are generated in a regular and repeated pattern.
If crystallization involving repeated formation of such linear grain boundaries is effectuated at pixel regions on the substrate, different signal lines on the substrate may interfere with each other. Such interferences may be observed in the form of wavy image patterns, such as a moire pattern.
Second, when crystallization involving repeated formation of the above-mentioned linear grain boundaries is effectuated at regions corresponding to drivers on the substrate, the possibility of grain boundaries being formed in the channels of active elements increases. As a result, the reliability of the elements may be greatly affected.

Laser beam pattern mask and crystallization method using the same