A switch device 1 has an outer frame 2, and a rotor 13 . A spring 14 is provided between the bottom 7 of the outer frame 2 and the rotor 13 in such a manner that its two ends are secured to the outer frame 2 and the rotor 13. The rotor 13 is operated with the aid of an operating knob 3. The bottom 7 has first and second body-side protrusions 9 and 10 which have sloped surfaces, and steps, and are arcuate. The rotor 13 has first and second operating-element-side protrusions 19 and 20 with respect to the body-side protrusions 9 and 10 which have sloped surface and steps and are arcuate. The rotor 13 has a rod 18. As the rotor 1 is operated, the rod 18 is protruded from a through-hole 8, thus performing a switching operation. When the switch device 1 is operated, the force of operation of the operating knob 3 is improved, being the sum of a frictional force attributing to the slip between the sloped surfaces of the protrusions 9 and 10 and the sloped surfaces of the protrusions 19 and 20.

1. Field of the Invention
This invention relates to an operating device which is operated by depressing an operating element.
2. Related Art
Unexamined Japanese Patent Application Hei 7-2388063 has disclosed a switch device in which an operating protrusion is formed on its operating shaft side, and a rotary protrusion is formed on its rotary element side. The operating protrusion, and the rotary protrusion have linearly sloped surfaces which are abutted against each other. When the operating knob is depressed against the elastic force of a return spring interposed between the operating knob and a switch body, the operating protrusion and the rotary protrusion are abutted against each other, so that the rotary protrusion is turned. As the rotary protrusion is turned, the switch member is operated.
In the switch device, when the operating shaft is depressed, the elastic force (or operating force) of the return spring acting in response to the depression is scarcely changed. Therefore, the feeling of depression of the operating shaft is not dependent on the degree of depression: that is, the switch device is low in operability.
On the other hand, Examined Japanese Utility Model Publication Sho 53-2281 has disclosed a switch in which a shaft is pushed to turn a rotor, to perform a switching operation.
In the conventional switch, the shaft has a gear ring, which is engaged with a gear ring formed on the rotor side. The gear rings on the shaft side and on the rotor side have teeth of the same tangent (tan) curve, and are meshed with each other. The switch is provided with a spring which urges the shaft's gear ring and the rotor's gear ring to space them away from each other. That is, the switch is so designed that, when the shaft is pushed, the shaft's gear ring is engaged with the rotor's gear ring, to turn the rotor. When the shaft is pushed, the distribution of force is as follows; that is, first the force is small, then large, and finally small again. Thus is, the feeling of operation is dependent on the degree of depression. Hence, the degree of depression can be determined from the change in the feeling of operation. Thus, the switch is high in operability.
However, the shaft's gear ring, and the rotor's gear ring must have tangent curved teeth. However, the manufacture of those gear rings takes time and labor. Furthermore, since it is necessary to engag the teeth of the tangent curved gears, the assembling work takes time and labor.
In view of the foregoing, an object of the invention is to eliminate the above-described difficulties accompanying a conventional switch device. More specifically, an object of the invention is to provide an operating device which is simple in structure, and in which the feeling of operation is improved.

Kabushiki Kaisha Tokai Rika Denki Seisakusho


A video coding system for coding a sequence of video frames each having an array of pixel values is provided. The system includes an interpolation filter to reconstruct sub-pixel values for use in the inter-frame prediction process. The coefficients of an interpolation filter are obtained differentially with respect to a predefined base filter in order to provide a set of difference values. As the base filter coefficients are known to both encoder and decoder and they are statistically close to the actual filters used in the video sequence, the decoder can reconstruct the pixel values based on the set of difference values.

Today there are various video coding standards in existence. These include International Telecommunications Union Telecommunications Standardization Sector (ITU-T) recommendation H.263, and International Standards Organization (ISO) Motion Pictures Expert Group (MPEG) standards MPEG-1, MPEG-2 and MPEG-4. These video coding standards are based on the use of motion compensated prediction and prediction error coding. Motion compensated prediction is performed by analyzing and coding motion between successive frames in a video sequence and reconstructing image blocks using the motion information. The reconstruction of the image blocks is built utilizing motion interpolation filters that are able to generate image (pixel) values for the pixel and sub-pixel positions needed. The basic principles of motion compensated prediction and image reconstruction using interpolation filters is described in greater detail in the following paragraphs.
Digital video sequences, like ordinary motion pictures recorded on film, comprise a sequence of still images, often referred to as "frames". The illusion of motion is created by displaying the frames one after the other at a relatively fast rate, typically 15 to 30 frames per second. Because of the relatively fast frame rate, the image content of consecutive frames tends to be quite similar, and thus consecutive frames contain a considerable amount of redundant information.
Each frame of a digital video sequence comprises an array of image pixels. In a commonly used digital video format, known as the Quarter Common Interchange Format (QCIF), a frame comprises an array of 176×144 pixels, and thus each frame has 25,344 pixels. Each pixel of the frame is represented by a certain number of bits, which carry information about the luminance and/or color content (chrominance) of the region of the image corresponding to the pixel. Commonly, a so-called YUV color model is used to represent the luminance and chrominance content of an image. The luminance, or Y, component represents the intensity (brightness) of the image, while the color content of the image is represented by two chrominance components, labelled U and V.
Color models based on a luminance/chrominance representation of image content provide certain advantages compared with colour models that are based on a representation involving primary colours (that is Red, Green and Blue, RGB). Because the human visual system is more sensitive to intensity variations than it is to color variations, YUV color models exploit this property by using a lower spatial resolution for the chrominance components (U, V) than for the luminance component (Y). In this way, the amount of information needed to code the colour information in an image can be reduced with minor reduction in image quality.
The lower spatial resolution of the chrominance components is usually attained by spatial sub-sampling. Typically, a block of 16×16 image pixels is coded by one block of 16×16 values representing luminance information, and the two chrominance components are each represented by one block of 8×8 values representing an area of the image equivalent to that of the 16×16 array of luminance values. The chrominance components are thus spatially sub-sampled by a factor of 2 in the horizontal and vertical directions. The resulting assembly of one 16×16 luminance block and two 8×8 chrominance blocks is commonly referred to as a YUV macroblock, or macroblock, for short.
A QCIF image comprises 11×9 macroblocks. If the luminance blocks and chrominance blocks are represented with 8 bit resolution (that is by numbers in the range 0 to 255), the total number of bits required per macroblock is (16×16×8)+2×(8×8×8)=3072 bits. Thus, the number of bits needed to represent a video frame in QCIF format, using 8 bit number resolution per component, is 99×3072=304,128 bits. Therefore, the amount of data required to transmit, record or display a video sequence comprising a series of such QCIF format frames at a rate of 30 frames per second is more than 9 Mbps (million bits per second). This data rate is impractical for use in video recording, transmission and display applications because of the very large storage capacity, transmission channel capacity and hardware performance required. For this reason video coding standards, such as those mentioned above, have been developed in order to reduce the amount of information required to represent and transmit video data while retaining an acceptable image quality.
Each of the previously mentioned video coding standards is tailored for application in video recording or transmission systems having different characteristics. For example, the ISO MPEG-1 standard is designed specifically for use in situations where the available data bandwidth is up to about 1.5 Mbits/s. The MPEG-2 video coding standard is primarily applicable to digital storage media and video broadcast and communication with available data bandwidths of up to about 10 Mbits/s. ITU-T recommendation H.263 is intended for use in systems where the available bandwidth is generally much lower. It is particularly suitable for use in situations where video data is to be transmitted in real-time over a fixed line network such as an ISDN (Integrated Services Digital Network) or a conventional PSTN (Public Service Telephone Network), where the available data transmission bandwidth is typically in the order of 64 kbits/s. In mobile videotelephony, where transmission takes place at least in part over a radio communications link, the available bandwidth can be as low as 20 kbits/s.
Although the various video coding standards currently in existence are tailored for use in different situations, the mechanisms they employ in order to reduce the amount of information to be transmitted have many features in common. In particular, they all work in such a way as to reduce the amount of redundant and perceptually irrelevant information in a video sequence to be transmitted. There are basically three types of redundancy in video sequences: spatial, temporal and spectral redundancy. Spatial redundancy is the term used to describe correlation between neighboring pixels within an individual frame of a sequence. Temporal redundancy expresses the fact that the objects appearing in one frame of a sequence are likely to appear in subsequent frames. Spectral redundancy refers to the correlation between different colour components of the same image.
Sufficiently efficient compression cannot usually be achieved by simply reducing the various forms of redundancy in a given sequence of images. Thus, most current video encoders also reduce the quality of those parts of the video sequence which are subjectively the least important. In addition, the redundancy of the compressed video bit-stream is itself reduced by means of efficient loss-less encoding. Typically, this is achieved using entropy coding.
Motion compensated prediction is a form of temporal redundancy reduction in which the content of some (often many) frames in a video sequence is "predicted" from other frames in the sequence by tracing the motion of objects or regions of an image between frames. Frames that are compressed using motion compensated prediction are typically referred to as INTER-coded or P-frames, whereas frames that are compressed without using motion compensated prediction are called INTRA-coded or I-frames. A predicted (motion-compensated, INTER-coded) image is rarely precise enough to represent the image content with sufficient quality, and therefore a spatially compressed prediction error (PE) frame is also associated with each INTER frame. Many video compression schemes can also make use of bi-directionally predicted frames, which are commonly referred to as B-pictures or B-frames. B-pictures are inserted between reference or so-called "anchor" picture pairs (I or P frames) and are predicted from either one or both of the anchor pictures.
The different types of frame that occur in a typical compressed video sequence are illustrated in FIG. 3 of the accompanying drawings. As can be seen from the figure, the sequence starts with an INTRA or I frame 30. In FIG. 3, arrows 33 denote the "forward" prediction process by which P-frames 34 are formed. The bi-directional prediction process by which B-frames 36 are formed is denoted by arrows 31a and 31b, respectively.
A schematic diagram of a generic video coding system using motion compensated prediction is shown in FIGS. 1 and 2. FIG. 1 illustrates an encoder 10 employing motion compensated prediction and FIG. 2 illustrates a corresponding decoder 20. The encoder 10 shown in FIG. 1 comprises a Motion Field Estimation block 11, a Motion Field Coding block 12, a Motion Compensated Prediction block 13, a Prediction Error Coding block 14, a Prediction Error Decoding block 15, a Multiplexing block 16, a Frame Memory 17, and an adder 19. The decoder 20 comprises a Motion Compensated Prediction block 21, a Prediction Error Decoding block 22, a Demultiplexing block 23 and a Frame Memory 24.
The operating principle of video coders employing motion compensated prediction is to minimize the amount of information in a prediction error frame En(x,y), which is the difference between a current frame In(x,y) being coded and a prediction frame Pn(x,y). The prediction error frame is thus defined as follows:En(x,y)=In(x,y)−Pn(x,y).  (1)The prediction frame Pn(x,y) is built using pixel values of a reference frame Rn(x,y), which is generally one of the previously coded and transmitted frames, for example, the frame immediately preceding the current frame, and is available from the Frame Memory 17 of the encoder 10. More specifically, the prediction frame Pn(x,y) is constructed by finding "prediction pixels" in the reference frame Rn(x,y) which correspond substantially with pixels in the current frame. Motion information, describing the relationship (e.g. relative location, rotation, scale etc.) between pixels in the current frame and their corresponding prediction pixels in the reference frame is derived and the prediction frame is constructed by moving the prediction pixels according to the motion information. In this way, the prediction frame is constructed as an approximate representation of the current frame, using pixel values in the reference frame. The prediction error frame referred to above therefore represents the difference between the approximate representation of the current frame provided by the prediction frame and the current frame itself. The basic advantage provided by video encoders that use motion compensated prediction arises from the fact that a comparatively compact description of the current frame can be obtained by the motion information required to form its prediction, together with the associated prediction error information in the prediction error frame.
Due to the large number of pixels in a frame, it is generally not efficient to transmit separate motion information for each pixel to the decoder. Instead, in most video coding schemes, the current frame is divided into larger image segments Sk, and motion information relating to the segments is transmitted to the decoder. For example, motion information is typically provided for each macroblock of a frame and the same motion information is then used for all pixels within the macroblock. In some video coding standards, such as ITU-T recommendation H.26L, currently under development, a macroblock can be divided into smaller blocks, each smaller block being provided with its own motion information.
The motion information usually takes the form of motion vectors [Δx(x,y),Δy(x,y)]. The pair of numbers Δx(x,y) and Δy(x,y) represents the horizontal and vertical displacements of a pixel (x,y) in the current frame In(x,y) with respect to a pixel in the reference frame Rn(x,y). The motion vectors [Δx(x,y),Δy(x,y)] are calculated in the Motion Field Estimation block 11 and the set of motion vectors of the current frame [Δx(·),Δy(·)] is referred to as the motion vector field.
Typically, the location of a macroblock in a current video frame is specified by the (x,y) co-ordinate of its upper left-hand corner. Thus, in a video coding scheme in which motion information is associated with each macroblock of a frame, each motion vector describes the horizontal and vertical displacement Δx(x,y) and Δy(x,y) of a pixel representing the upper left-hand corner of a macroblock in the current frame In(x,y) with respect to a pixel in the upper left-hand corner of a substantially corresponding block of prediction pixels in the reference frame Rn(x,y) (as shown in FIG. 4b).
Motion estimation is a computationally intensive task. Given a reference frame Rn(x,y) and, for example, a square macroblock comprising N×N pixels in a current frame (as shown in FIG. 4a), the objective of motion estimation is to find an N×N pixel block in the reference frame that matches the characteristics of the macroblock in the current picture according to some criterion. This criterion can be, for example, a sum of absolute differences (SAD) between the pixels of the macroblock in the current frame and the block of pixels in the reference frame with which it is compared. This process is known generally as "block matching". It should be noted that, in general, the geometry of the block to be matched and that in the reference frame do not have to be the same, as real-world objects can undergo scale changes, as well as rotation and warping. However, in current international video coding standards, such as those referred to above, only a translational motion model is used (see below) and thus fixed rectangular geometry is sufficient.
Ideally, in order to achieve the best chance of finding a match, the whole of the reference frame should be searched. However, this is impractical as it imposes too high a computational burden on the video encoder. Instead, the search region is generally restricted to a region [−p,p] around the original location of the macroblock in the current frame, as shown in FIG. 4c.
In order to reduce further the amount of motion information to be transmitted from the encoder 10 to the decoder 20, the motion vector field is coded in the Motion Field Coding block 12 of the encoder 10, by representing it with a motion model. In this process, the motion vectors of image segments are re-expressed using certain predetermined functions or, in other words, the motion vector field is represented with a model. Almost all currently used motion vector field models are additive motion models, complying with the following general formula:
                              Δ                                                                          x                                      (                              x                ,                                                                                y                            )                                      =                              ∑                          i              =              0                                      N              -              1                                                                                a              i                                                                  f                i                                                          (                                  x                  ,                                                                                y                                )                                                                        (        2        )                                          Δ                                                                          y                                      (                              x                ,                                                                                y                            )                                      =                              ∑                          i              =              0                                      M              -              1                                                                                b              i                                                                  g                i                                                          (                                  x                  ,                                                                                y                                )                                                                        (        3        )            where ai and bi are motion coefficients. The motion coefficients are transmitted to the decoder 20 (information stream 2 in FIGS. 1 and 2). Functions fi and gi are motion field basis functions. They are known both to the encoder and decoder. An approximate motion vector field ({tilde over (Δ)}x(x,y), {tilde over (Δ)}y(x,y)) can be constructed using the coefficients and the basis functions. As the basis functions are known to (that is, stored in) both the encoder 10 and the decoder 20, only the motion coefficients need to be transmitted to the encoder, thus reducing the amount of information required to represent the motion information of the frame.
The simplest motion model is the translational motion model which requires only two coefficients to describe the motion vectors of each segment. The values of motion vectors are given by:Δx(x,y)=a0 Δy(x,y)=b0   (4)This is the model used in ITU-T recommendation H.263 and ISO standards MPEG-1, MPEG-2, MPEG-4 to describe the motion of 16×16 and 8×8 pixel blocks. Systems which use a translational motion model typically perform motion estimation at full pixel resolution or some integer fraction of full pixel resolution, for example at half or one quarter pixel resolution.
The prediction frame Pn(x,y) is constructed in the Motion Compensated Prediction block 13 of the encoder 10, and is given by:Pn(x,y)=Rn[x+{tilde over (Δ)}x(x,y), y+{tilde over (Δ)}y(x,y)]  (5)In the Prediction Error Coding block 14, the prediction error frame En(x,y) is typically compressed by representing it as a finite series (transform) of some 2-dimensional functions. For example, a 2-dimensional Discrete Cosine Transform (DCT) can be used. The transform coefficients are quantized and entropy (for example Huffman) coded before they are transmitted to the decoder (information stream 1 in FIGS. 1 and 2). Because of the error introduced by quantization, this operation usually produces some degradation (loss of information) in the prediction error frame En(x,y). To compensate for this degradation, the encoder 10 also comprises a Prediction Error Decoding block 15, where a decoded prediction error frame {tilde over (E)}n(x,y) is constructed using the transform coefficients. This locally decoded prediction error frame is added to the prediction frame Pn(x,y) by adder 19 and the resulting decoded current frame Ĩn(x,y) is stored in the Frame Memory 17 for further use as the next reference frame Rn+1(x,y).
The information stream 2 carrying information about the motion vectors is combined with information about the prediction error in multiplexer 16 and an information stream 3 containing typically at least those two types of information is sent to the decoder 20.
The operation of a corresponding video decoder 20 will now be described.
The Frame Memory 24 of the decoder 20 stores a previously reconstructed reference frame Rn(x,y). The prediction frame Pn(x,y) is constructed in the Motion Compensated Prediction block 21 of the decoder 20 according to Equation 5, using received motion coefficient information and pixel values of the previously reconstructed reference frame Rn(x,y). The transmitted transform coefficients of the prediction error frame En(x,y) are used in the Prediction Error Decoding block 22 to construct the decoded prediction error frame {tilde over (E)}n(x,y). The pixels of the decoded current frame Ĩn(x,y) are then reconstructed by adding the prediction frame Pn(x,y) and the decoded prediction error frame {tilde over (E)}n(x,y):Ĩn(x,y)=Pn(x,y)+{tilde over (E)}n(x,y)=Rn[x+{tilde over (Δ)}x(x,y), y+{tilde over (Δ)}y(x,y)]+{tilde over (E)}n(n,y).  (6)This decoded current frame may be stored in the Frame Memory 24 as the next reference frame Rn+1(x,y).
In the description of motion compensated encoding and decoding of digital video presented above, the motion vector [Δx(x,y),Δy(x,y)] describing the motion of a macroblock in the current frame with respect to the reference frame Rn(x,y) can point to any of the pixels in the reference frame. This means that motion between frames of a digital video sequence can only be represented at a resolution determined by the image pixels in the frame (so-called full pixel resolution). Real motion, however, has arbitrary precision, and thus the system described above can only provide approximate modelling of the motion between successive frames of a digital video sequence. Typically, modelling of motion between video frames with full pixel resolution is not sufficiently accurate to allow efficient minimization of the prediction error (PE) information associated with each macroblock or frame. Therefore, to enable more accurate modelling of real motion and to help reduce the amount of PE information that must be transmitted from encoder to decoder, many video coding standards allow motion vectors to point "in between" image pixels. In other words, the motion vectors can have "sub-pixel" resolution. Allowing motion vectors to have sub-pixel resolution adds to the complexity of the encoding and decoding operations that must be performed, so it is still advantageous to limit the degree of spatial resolution a motion vector may have. Thus, video coding standards, such as those previously mentioned, typically only allow motion vectors to have full-, half- or quarter-pixel resolution.
Motion estimation with sub-pixel resolution can be implemented as a two-stage process, as illustrated in an exemplary fashion in FIG. 5, for a generic video coding scheme in which motion vectors may have full- or half-pixel resolution. In the first step, a motion vector having full-pixel resolution is determined using an appropriate motion estimation scheme, such as the block-matching process described above. The resulting motion vector, having full-pixel resolution is shown in FIG. 5.
In the second stage, the motion vector determined in the first stage is refined to obtain the desired half-pixel resolution. In the example illustrated in FIG. 5, this is done by forming eight new search blocks of 16×16 pixels, the location of the top-left corner of each block being marked with an X in FIG. 5. These locations are denoted as [Δx+m/2, Δy+n/2], where m and n can take the values −1, 0 and +1, but cannot be zero at the same time. As only the pixel values of original image pixels are known, the values (for example, luminance and/or chrominance values) of the sub-pixels residing at half-pixel locations are estimated for each of the eight new search blocks, using some form of interpolation scheme.
Having interpolated the values of the sub-pixels at half-pixel resolution, each of the eight search blocks is compared with the macroblock whose motion vector is being sought. As in the block matching process performed in order to determine the motion vector with full pixel resolution, the macroblock is compared with each of the eight search blocks according to some criterion, for example a SAD. As a result of the comparisons, a minimum SAD value will generally be obtained. Depending on the nature of the motion in the video sequence, this minimum value may correspond to the location specified by the original motion vector (having full-pixel resolution), or it may correspond to a location having a half-pixel resolution. Thus, it is possible to determine whether a motion vector should point to a full-pixel or sub-pixel location, and if sub-pixel resolution is appropriate, to determine the correct sub-pixel resolution motion vector.
In practice, the estimation of a sub-pixel value in the reference frame is performed by interpolating the value of the sub-pixel from surrounding pixel values. In general, interpolation of a sub-pixel value F(x,y) situated at a non-integer location (x,y)=(n+Δx, m+Δy), can be formulated as a two-dimensional operation, represented mathematically as:
                                          F                                      (                              x                ,                                                                                y                            )                                =                                    ∑                              k                =                                  -                  K                                                            K                =                1                                                                                ∑                                  l                  =                                      -                    L                                                                    L                  =                  1                                                                                f                                                        (                                          k                      +                                              K                        ,                                                                                l                                            +                      L                                        )                                                                                F                                                        (                                          n                      +                                              k                        ,                                                                                m                                            +                      l                                        )                                                                                (        7        )            where f(k,l) are filter coefficients and n and m are obtained by truncating x and y, respectively, to integer values. Typically, the filter coefficients are dependent on the x and y values and the interpolation filters are usually so-called "separable filters", in which case sub-pixel value F(x,y) can be calculated as follows:
                              F                                (                          x              ,                                                                        y                        )                          =                              ∑                          k              =                              -                K                                                    K              -              1                                                                                f                                            (                                  k                  +                  K                                )                                                                                ∑                                  l                  =                                      -                    K                                                                    K                  -                  1                                                                                f                                                        (                                          l                      +                      K                                        )                                                                                F                                                        (                                          n                      +                                              k                        ,                                                                                m                                            +                      l                                        )                                                                                (        8        )            The motion vectors are calculated in the encoder. Once the corresponding motion coefficients are transmitted to the decoder, it is a straightforward matter to interpolate the required sub-pixels using an interpolation method identical to that used in the encoder. In this way, a frame following a reference frame in the Frame Memory 24, can be reconstructed from the reference frame and the transmitted motion vectors.
Conventionally, the interpolation filters used in video encoders and decoders employ fixed filter coefficient values and the same filter (i.e., the same type of filter with the same filter coefficient values) is used for all frames of a video sequence being coded. The same filter is further used for all video sequences, irrespective of their nature and how they were acquired (captured). Wedi ("Adaptive Interpolation Filter for Motion Compensated Hybrid Video Coding," Picture Coding Symposium (PCS 2001), Seoul, Korea, April 2001), proposes the use of interpolation filters with adaptive filter coefficient values, in order to compensate for certain shortcomings in the video coding process. In particular, Wedi describes how aliasing in the image acquisition process, the finite resolution of allowed motion vectors and the limited validity of the translational motion model introduce additional prediction errors. Aliasing in a video image arises due to the use of non-ideal low-pass filters (and consequent non-fulfilment of the Nyquist Sampling Theorem) in the image acquisition process. Aliasing disturbs motion compensated prediction within the video sequence and gives rise to an additional prediction error component. The finite precision of the allowed motion vectors (e.g., full-pixel, one-half pixel, or one-quarter pixel) and the ability of the translational motion model to represent only horizontal and vertical translational movement between successive video frames also give rise to additional prediction error contributions. Wedi further proposes that an improvement in coding efficiency can be achieved by adapting the filter coefficient values of an interpolation filter to compensate for the additional prediction errors introduced by aliasing, finite motion vector precision and limited validity of the translational motion model.
More generally, it should be appreciated that since the nature and characteristics of the motion varies in a video sequence, the optimal interpolation filter varies as a function of time and image location. Wedi presents an example in which an interpolation filter with dynamically adaptive filter coefficient values is integrated into the H.26L video codec, more specifically, the version of that codec defined by Test Model (TML) 4. TML-4 of H.26L used a one-quarter-pixel motion vector resolution and a Wiener-type interpolation filter with six symmetric filter coefficients (6-tap filter). The example presented in Wedi proposes adapting the filter coefficients of the interpolation filter on a frame-by-frame basis, differentially coding the filter coefficients and transmitting them to the decoder as side information to the main video data. A proposal based on this approach was made to include the use of interpolation filters with dynamically adaptive filter coefficient values in Test Model 8 of the H.26L video codec. This is presented in the ITU—Telecommunications Standardization Sector entitled: "Adaptive Interpolation Filter for H.26L" Study Group 16, Question 6, Video Coding Experts Group (VCEG), document VCEG-N28 September 2001 and "More Results on Adaptive Interpolation Filter for H.26L" Study Group 16, Question 6, Video Coding Experts Group (VCEG), document VCEG-016r1, November 2001.
The use of dynamically adaptive interpolation filters raises an important issue relating to the coding efficiency of the encoded video data stream and also has an effect on the error resilience of the encoded video data. The issue of coding efficiency can be understood in a straightforward manner. In a video coding system that employs an interpolation filter having fixed filter coefficient values, there is no need to include any information relating to the filter coefficient values in the encoded video data bit-stream. The filter coefficient values can simply be recorded in the video encoder and video decoder. In other words, in a video coding system implemented according to a particular video coding standard that employs fixed interpolation filters, the coefficient values are pre-programmed into both encoder and decoder according to the specifications of the standard. However, if dynamically adaptive filter coefficients are allowed, it becomes necessary to transmit information relating to the coefficient values. As the filter coefficients are periodically updated (e.g. on a frame-by-frame basis), this necessarily adds to the amount of information to be sent from the video encoder to the decoder and has a deleterious effect on coding efficiency. In low bit-rate video coding applications, any increase in the amount of information to be transmitted is generally undesirable.
Thus, in order to optimally model and compensate motion, an efficient representation of the dynamic interpolation filters is needed.
Regarding error resilience, it should be appreciated that the way in which information about the coefficients of a dynamically variable interpolation filter is transmitted from encoder to decoder may affect the susceptibility of the video data to transmission errors. More specifically, in a video coding system that employs dynamically adaptive interpolation filters, correct reconstruction of a frame of a video sequence at the decoder is reliant on correct reception and decoding of the filter coefficient values. If the information relating to the coefficient values is subject to error during its transmission from encoder to decoder, corruption of the reconstructed video data is likely. There are three ways of coding the filter coefficients known from prior art. The first is to entropy code the filter coefficient values separately. The second is to entropy code the filter coefficient values differentially with respect to filter coefficients of already decoded filters (as proposed in Wedi) and the third is to define a set of filters and code the index of the selected filter.
The prior art solutions that could be used for coding interpolation filter coefficients, as mentioned above, all have problems associated with them in different usage scenarios. The first method, in which the interpolation filter coefficients are coded separately offers inferior coding performance, since it does not utilise any a priori information (i.e., information about previously coded interpolation filter coefficient values). This approach therefore requires an unduly large amount of information to be added to the encoded video bit-stream in order to describe the interpolation filter coefficient values. Differential coding of the coefficients, as proposed in Wedi, is efficient, but may not be used in an environment with possible transmission errors, since the filter coefficients depend on correct decoding of earlier filter coefficients. As previously described, if the encoded video bit-stream is subject to error during its transmission from encoder to decoder, corruption of the video data reconstructed at the decoder is likely to occur. The third prior art solution with a predefined set of filters provides only limited alternatives and thus degrades the coding performance. In other words, this option cannot achieve the full advantages of using interpolation filters with dynamically adaptive filter coefficient values, as set out in Wedi.
Thus, it should be appreciated that there is a need for a method of coding the coefficient values of adaptive interpolation filters that is both efficient and does not lead to deterioration in the error resilience of the encoded video bit-stream.

Differential coding of interpolation filters


A reluctance haptic engine for an electronic device includes a core, an attractor, and one or more flexible support members. The core and/or the attractor may be coupled to an input structure, such as a button cap, trackpad cover, touchscreen cover, or the like. In an unactuated configuration, flexible support members maintain a gap between the core and the attractor. An electrical current may be applied to one or more conduction loops of the core to actuate the reluctance haptic engine and provide a haptic output by moving the input structure. The electrical current may cause a magnetic flux that results in a reluctance force that pulls the attractor and the core together and causes the input structure to move (e.g., translate, rotate, oscillate, vibrate, or deform) to produce a haptic output.

Some electronic devices are configured to provide haptic output to a user. In general, it may be advantageous to reduce the size of a haptic mechanism so that it occupies less space within an electronic device. Some traditional haptic output devices include motors and other relatively large actuation mechanisms, which occupy significant space within device enclosures. The extra space occupied by traditional haptic mechanisms could be eliminated to make the device smaller or used for other device components, such as batteries to provide longer device operation.

Reluctance haptic engine for an electronic device


A dynamical host allocation method employed in a dynamical host allocation system (100) is disclosed. The employed dynamical host allocation system includes a plurality of DHCP servers (110), a DHCP relay (120), a plurality of DHCP clients (130) and a network (140) interconnecting all these apparatuses. When allocating IP addresses to the plurality of DHCP clients, the plurality of DHCP servers determine whether the IP addresses are free by way of successive logic checks. Therefore, the problem of allocating an IP address to more than one DHCP clients is resolved.

1. Field of the Invention
The present invention relates to a method for allocating IP (Internet protocol) addresses for hosts on a computer network.
2. Background of the Invention
In order to access information sources from a TCP/IP (Transmission Control Protocol/Internet Protocol) network, each host on the TCP/IP network should be allocated some requested configuration parameters, such as IP address, subnet mask, default gateway, domain name server, etc. The subnet mask is a required setting on any host that communicates on an IP network. The setting is commonly represented in the same format as an IP address, except that the values usually are either 255 or 0. As far as a large-scale network is concerned, it is laborious work for web masters to manage and maintain hosts on the network. If a host is moved from one subnet to another subnet, the configuration parameters of the host need to be changed. Host users ordinarily do not have the expertise or authority to re-configure their hosts. Therefore, a mechanism is needed which allows web masters other than host users to manage and configure hosts on a TCP/IP network. One solution is the mechanism of DHCP.
DHCP stands for dynamic host configuration protocol, which originated from BOOT protocol (BOOTP). BOOTP is applied on networks connected by hosts having no disks. On this kind of network, hosts are started and connected to the network by use of BOOT ROMs other than disks, and the BOOTP can set the TCP/IP environment for the hosts automatically. DHCP is a kind of improved BOOTP, and generally comprises two parts: a DHCP server and a DHCP client. The DHCP server manages all IP information on the network, and processes requests from the DHCP client. The DHCP client uses IP information distributed by the DHCP server.
DHCP supports three different mechanisms to allocate IP addresses to hosts on a network: automatic allocation, dynamic allocation, and manual allocation. Under the automatic allocation mechanism, if a DHCP client successfully leases an IP address from a DHCP server, the DHCP client can use the IP address for an unlimited time. Under the dynamic allocation mechanism, if a DHCP client leases an IP address from a DHCP server, the DHCP client cannot always use the IP address. If the lease of the IP address expires, the DHCP client must relinquish ("release") the IP address. In such case, the DHCP client has first priority in renewing the lease of the IP address, or in leasing another IP address from the DHCP server. Under the manual allocation mechanism, IP addresses of DHCP clients are allocated by hand input by web masters.
The process of using DHCP follows the steps of: (1) when started, a DHCP client broadcasts a DHCPDISCOVER message to DHCP servers on a subnet for leasing an IP address; (2) after receiving the DHCPDISCOVER message, each DHCP server respectively sends to the DHCP client a DHCPOFFER message that comprises an available IP address and other configuration parameters; (3) the DHCP client selects one DHCP server based on the configuration parameters, and broadcasts a DHCPREQUEST message which includes information that indicates which DHCP server it has selected; and (4) the selected DHCP server responds with a DHCPACK message to the DHCP client to validate leasing of the IP address, or responds with a DHCPNAK message to the DHCP client to refuse leasing of the IP address, and updates the database of the selected DHCP server. Generally, leasing an IP address only needs performance of the above-mentioned four steps. If the DHCP client finds that the leased IP address is used by another DHCP client, such as by use of an address resolution protocol (ARP), the DHCP client can send a DHCPDECLINE message to the DHCP server and re-perform the said four-step process for leasing a new IP address. If the DHCP client no longer leases the IP address, it can send a DHCPRELEASE message to the DHCP server. If the DHCP client wants to change one or more configuration parameters, it can send a DHCPINFORM message to the DHCP server to request such change.
Even though DHCP can greatly facilitate managing a large-scale network and allocating configuration parameters to different DHCP clients, it has some shortcomings. For example, when a DHCP server allocates IP addresses to more than one DHCP client, it is prone to allocate conflicting IP addresses. Thus, a system and method is needed for allocating IP addresses to DHCP clients, in which conflict between the allocated IP addresses is eliminated.

Method for dynamically allocating IP addresses for hosts on a network

Hong Fu Jin Precision Industry (ShenZhen) Co., Ltd.


A power supply circuit comprising a first switching transistor having a control terminal and a control terminal switching threshold and that charges current from a voltage source into a charge storage capacitor, a control circuit controlling the on/off operation of the switching transistor whereby the switching transistor is turned on when the voltage of the voltage source is below a predetermined level and turned off when the voltage of the voltage source is above the predetermined level, a control voltage supply circuit providing a control voltage to the control terminal of the switching transistor substantially in excess of the switching threshold when the voltage of the voltage source is below the predetermined voltage thereby to drive the switching transistor on in a saturated region of operation; and a charge storage capacitor for providing an output voltage of the power supply.

The present invention relates to power supplies. More particularly, the present invention relates to catear power supplies used to provide power to electronic circuits and which may receive their power across a circuit element disposed in a power line. For example, two wire lamp dimmers which are disposed in the hot side of an AC line are used to power lamp loads and vary the lamp intensity. The neutral line is provided directly to the lamp load and is not connected to the dimmer. In this way, a dimmer can be substituted for a single or multiple pole switch. The problem arises in such situations that if the dimmer includes additional circuitry, for example, control circuits or in some more complex systems, microprocessors and radio frequency circuits for transmitting and receiving control and status information, it is necessary to derive the power for those circuits solely from the hot line, since the neutral is not available. This can be done in a conventional way by providing a voltage dropping circuit in the hot line. However, this has a deleterious effect on the load and, in particular, would reduce the maximum brightness of the lamp connected to the dimmer.
The catear circuit was developed to draw current from the hot AC line in a two wire dimmer configuration. As shown in FIG. 2, in a conventional dimmer, a triac (not shown) is turned on at a particular point in the AC half cycle and turns off prior to the next zero crossing. FIG. 2 shows both the AC waveform (marked AC) and a full wave rectified version of the AC waveform wherein the negative going half cycles are inverted by a full wave rectifier. The inverted half cycle is marked DC in FIG. 2. In the first half cycle, the regions when the triac is typically off are shown at 1 and 3. The region marked 2 is when the triac is on. As well known, dimmers of this type are known as phase-control dimmers and the intensity of the lamp load is controlled by varying the cut-in point of the triac, thus varying the amount of power delivered to the load, and thus the intensity or brightness level of the lamp load. After the triac turns on (region 2), the voltage across the dimmer is substantially zero and it is difficult to obtain power from the dimmer itself at this time in the absence of any voltage dropping circuit, which, for the reasons discussed above, is undesirable. However, power can be taken from the AC line in the time period before the triac turns on (region 1) because at this point in time, the lamp is off. Similarly, power may be obtained from the AC line after the triac goes off before the next zero crossing (region 3). As shown in FIG. 2, the distinctive "catears" of regions 1 and 3 of the waveform shown both before the triac turns on and after it turns off, give the circuit its name. It is during these time periods, i.e., during the "catears" that power can be derived from the AC hot line without interfering with the dimmer operation.
FIG. 1 shows a conventional catear circuit. The catear circuit is wired to receive power from a rectifier circuit (RECT), for example, a full wave rectifier, which is wired across a portion of the dimmer circuit to receive rectified AC power. The rectifier provides current substantially only during the catear regions because when the triac of the dimmer circuit is on, there is substantially zero voltage across the dimmer. As shown in FIG. 1, a transistor Q206, which may be an FET, is turned on during the catear portions of the rectified AC, i.e., before the triac turns on and after the triac turns off again. The gate of transistor Q206 is provided with a voltage sufficient to turn it on via resistors R210, R212 and R220. When Q206 goes on, a charging capacitor C262 is charged via resistor R280 and diode D252. The output across capacitor C262 is provided to a voltage regulator circuit, for example, a linear regulator U203 which provides a substantially constant DC output to power the circuits connected thereto.
Accordingly, when the rectified line voltage is lower than a selected voltage, the charging transistor Q206 conducts to allow charging of the energy storage capacitor C262. The rate of charge of the capacitor is determined by resistor R280.
When the rectified line voltage exceeds a predetermined value, then transistor Q204 is turned on by the voltage divider formed by resistors R214, R221 and R276. When transistor Q204 turns on, which time can be set by voltage divider circuit comprising resistors R214 and R221 so that it is just prior to the time when the triac of the dimmer circuit turns on, the voltage at the collector of Q204 goes substantially to circuit common, thereby bringing the gate of Q206 substantially to circuit common and turning Q206 off so that Q206 stops charging capacitor C262 during the time when the triac is on.
Accordingly, capacitor Q262 is utilized as a charge storage element to charge up during the time prior to the triac turning on during the catear portion 1 of the rectified AC line voltage. During the time when the triac is on (region 2), power for the associated electronic circuits connected to the output of regulator Q203 is provided by the storage capacitor C262. When the triac turns off in region 3 of FIG. 2, the voltage at the base of Q204 will again be below its turn-on threshold and Q206 will again provide charging current to capacitor C262 during catear region 3.
In addition, a circuit comprising transistor Q252 is also provided to sense an overcurrent condition. Should an overcurrent be detected across resistor R280, transistor Q252 turns on, thus reducing the gate voltage of transistor Q206 to near zero and turning it off. In addition, a bus regulation circuit comprising zener diode D207 and resistor R275 is provided. If the voltage across storage capacitor C262 rises too high, the zener diode D207 will avalanche, raising the voltage across resistor R276 and turning on Q204 which will thus reduce the gate voltage to transistor Q206, turning it off. Accordingly, if C262 exceeds a predetermined voltage, Q206 will be turned off in that instance also to stop charging C262.
A problem arises with the conventional catear circuit in that its efficiency is impaired because transistor Q206 operates for a substantial portion of the time during the "catears" in its linear mode of operation, that is, it is not saturated. This is due to the drive voltage rising with the line, as well as other factors. It is thus turned on too slowly which causes the switching FET to operate in the linear region for much of the charging time, thereby dissipating power in the FET itself.
Accordingly, it is desirable to improve the prior art catear power supply circuit to improve its efficiency and, in particular, to improve its efficiency by ensuring that the switching device that charges the charging capacitor operates in its saturated region, thereby dissipating the least amount of power in the switching device and improving the overall efficiency of the catear power supply.

High efficiency off-line linear power supply


A control device for a heater for an air fuel ratio sensor attached close to a sensor element of an air fuel ratio sensor located in an intake passage of an intake passage.. The control device comprises an ambient temperature related parameter detecting means for detecting a parameter related an ambient temperature of the air fuel ratio sensor, an intake air amount related parameter detecting means for detecting a parameter related amount of fresh intake air introduced into intake passage, and supply power controlling means for controlling supply power based on a parameter detected by an ambient temperature related parameter detecting means and a parameter detected by an intake air amount related parameter detecting means.

1. Field of the Invention
The present invention relates to a control device for a heater for an air fuel ratio sensor which is located in an intake air passage of an internal combustion engine.
2. Description of the Related Art
An engine control device which determines engine control parameters based on an oxygen concentration of intake air detected by an air fuel ratio sensor located in an intake passage has been disclosed. In Japanese Unexamined Patent Publication No. 62-78469, an air fuel ratio sensor which is provided with a heater for stabilizing an output of the air fuel ratio sensor is disclosed.
In the above type heater provided sensor, electric power supply to the heater is determined based on the amount of intake air. However, the air fuel ratio sensor is affected not only by an amount of intake air, but also by the temperature of ambient air around the sensor. For example, in the case that the engine has an EGR system which recirculates a part of exhaust gas to the intake passage upstream of the air fuel ratio sensor, the ambient air around the sensor is affected by the recirculated exhaust gas. Therefore, a system which determines the electric power supply for a heater based only on an amount of an intake air cannot always supply the required power appropriately. If excessive power is supplied, heater will be overheated and may be broken. If too little power is supplied, the sensor will not produce a proper output.

Control device for a heater for an air fuel ratio sensor in an intake passage


In a magnetically-coupled liquid mixer of the type having a drive mount secured to and extending into a mixing vessel, an external first magnet array adjacent to the drive mount, a stub shaft extending from the drive mount into the vessel and having a first thrust bearing surface, and a driven portion rotatably-mounted on the stub shaft and having a second thrust bearing surface and a second magnet array, the improvement wherein the first and second arrays are positioned with respect to one another such that the first and second thrust bearing surfaces are spaced apart at least in the absence of above-threshold fluid dynamic thrust forces on the driven portion.

Many production processes require mixing of liquids in an ultraclean operation. Such production processes may include the mixing of products such as pharmaceuticals, foods and chemicals. Certain of these may require aseptic processing. The term ultraclean as used herein refers in general to particularly stringent requirements for the levels of contamination which are acceptable in such processes.
Contamination in mixing processes may come from a number of sources. Among these are the mixing equipment itself and the cleaning processes which are invariably required during the use of such equipment.
One source of contamination comes from seals which may be required to seal a piece of equipment which must penetrate into the mixing vessel. Seals may be required, for example, around a rotary drive shaft to drive a mixer in the vessel. For this and other reasons, elimination of such seals is highly desirable. A mixer disclosed in U.S. Pat. No. 4,993,841 (Lofgren et al.) is an example of a mixer which eliminates the seal through the use of magnetic coupling of the rotary power in the mixer. Other mixer systems which use magnetic coupling to eliminate such seals are disclosed in the following U.S. Pat. No. 4,209,259 (Rains et al.); U.S. Pat. No. 5,79,359 (Gambrill et al.); U.S. Pat. No. 5,758,965 (Gambrill etal.); U.S. Pat. No. 6,568,844 (Arthun et al.); and U.S. Pat. No. 6,854,877 (Hoobyar et al.).
Another source of contamination is the relative movement of bearing surfaces against one another. This is particularly true when the bearing surfaces are not surrounded by liquid to provide lubrication to the bearing surfaces. When a mixing vessel is nearly empty of the product being mixed (mixing typically takes place while the product is being transferred from the mixing vessel into other containers), the bearing surfaces within the mixer run "dry." During this period of operation, wear particles are more easily generated and then find their way into the product, either in the current batch of product or in a subsequent batch.
The cleaning of the mixing vessel and other equipment is also a source of contamination. Product which may spoil can become trapped in areas which are hard to reach during the cleaning process. Thus, it is desirable to be able to reach every area within a piece of equipment with the cleaning fluid being used. Sterilization as part of the cleaning process also requires the equipment to withstand high temperatures.
Current magnetically-coupled mixers, while eliminating the penetration of the mixing vessel from a drive shaft, still produce contamination caused by dry bearing contact, and because of such bearing contact, also contain areas within the mixer which are difficult to clean.
It is also desirable is such mixers to be able to transfer a high level of rotational mechanical energy into the fluid being mixed. Under such conditions, the fluid dynamic forces on the mixing element can be both large and rapidly changing due to such variables as high liquid viscosity, high mixing rates, and turbulence. Under such conditions, it is necessary that the mixing element be well supported by the bearings within the mixer and that the strength of the magnetic coupling be high enough to transmit the required driving forces, particularly during periods of high acceleration.


A memory cell array on a region of a substrate, the cell array having word lines, bit lines and memory cells at crossings between the word and bit lines, drain and source of each memory cell coupled to a bit line and source line, respectively; and a sense amplifier circuit reading data of selected memory cells. The device has a data read mode detecting whether cell current flows from a bit line to the source line in accordance with data of a memory cell under the condition the well region is set at a base potential; a selected word line is applied with a read voltage, which turns on or off the memory cell in accordance with data thereof; the source line is applied with a first voltage higher than the base potential; and the selected bit line is applied with a second voltage higher than the first voltage.

1. Field of the Invention
This invention relates to a semiconductor memory device, and more especially to a data read method of an EEPROM, which has electrically rewritable and non-volatile memory cells arranged therein.
2. Description of Related Art
An EEPROM (Electrically Erasable and Programmable Read-Only-Memory) is usually formed of memory cells with such a transistor structure that a charge storage layer (usually, floating gate) and a control gate are stacked. This memory cell stores a threshold voltage state, which is defined by a charge storage state of the floating gate, as data in a non-volatile manner. For example, the memory cell stores binary data of a logic "0" data defined by a high threshold voltage state as a result of that electrons have been injected into the floating gate; or a logic "1" data defined by a low threshold voltage state as a result of that electrons in the floating gate have been released.
Finely chop the memory cell's threshold voltage, and it is possible to store multi-value data. For example, four-value data is stored as defined by two bits stored in one memory cell.
In various EEPROMs, there is known a NAND-type flash memory, which may be highly integrated because plural memory cells are so connected in series as to constitute a NAND cell unit. Both ends of the NAND cell unit are coupled to a bit line and a common source line via select gate transistors, respectively. Control gates in the NAND cell unit are coupled to different word lines from each other.
In the NAND-type flash memory, a set of memory cells arranged along a word line constitutes a page (or two pages). Data read or write of the NAND-type flash memory may be performed at substantially high rate because it is performed by a page.
In a read mode of the NAND-type flash memory, a read current, which is carried through a NAND-cell unit in accordance with data of a selected memory cell, is detected under the condition of: a read voltage is applied to a selected word line so that memory cells become on or off based on data thereof; a pass voltage to non-selected (i.e., unselected) word lines so that memory cells turn on without regard to data thereof; and select gate transistors are turned on.
As a sense amplifier for reading data, any method of current-detecting type and voltage-detecting type may be used. In case, for example, a voltage-detecting type sense amplifier is used, a bit line is precharged to a certain voltage, and then set in a floating state. Thereafter, the bit line is subjected to discharge via a NAND cell unit. The sense amplifier detects the bit line voltage, which is different due to data of a selected memory cell, thereby judging data. In the data read mode, the common source line of the memory cell array is usually set at ground potential.
In case of binary data storage scheme, a relationship between read current (i.e., cell current), Icell, of a selected memory cell and control gate voltage (i.e., selected word line voltage) in the read mode is shown in FIG. 17. The sense amplifier detects in principle a deference between cell current Icell(1) of data "1" and cell current Icell(0) of data "0" on the condition of a read voltage Vr application. To prevent erroneous reading, it is required to set a lower limit value of the cell current Icell(1) and an upper limit value of the cell current Icell(0), and deal with a range between the lower limit value and upper limit value as a "forbidden range" or "inhibited range" as shown in FIG. 17.
This means, in other words, that it is required of the threshold voltage Vt, which defines the memory cell's data, to be set to have a certain inhibited range, INHV, therein as shown in FIG. 18.
On the other hand, as the memory cell is more and more miniaturized in the NAND-type flash memory, it has become impossible to disregard the short-channel effect. FIG. 19 shows the relationships between read current and control voltage of two memory cells A and B, the former having a large short-channel effect; and the latter a small short-channel effect. As shown in FIG. 19, the larger the short-channel effect, the less the dependence of the read current on the control voltage.
Therefore, the relationships between the read current Icell and the threshold voltage for the memory cells "A" and "B" are shown in FIG. 20. The inhibited range INHV(B) of the threshold voltage of memory cell "B" with a large short-channel effect is wider than the inhibited range INHV(A) of the threshold voltage of memory cell "A" with a small short-channel effect. This fact means that data read margin is reduced as the memory cell is more miniaturized.
So far, it has been explained a conventional read condition that the common source line is set at ground potential. By contrast, it has already been provided such a method that the common source line is set at a certain potential except ground potential under a certain read condition. For example, for the purpose of four-value data judging with two read operations, a method of controlling the source line has been provided (see, for example, Unexamined Japanese Patent Application Publication No. 2000-228092).
For reading data of an EEPROM, which stores four-value data designated as "xy" defined by an upper bit "x" and a lower bit "y", it is usually performed three times read operations as follows: at a first timing, the upper bit "x" of the memory cells is detected; and at second and third timings, read operations will be done for judging the lower bit "y" for memory cells having the upper bits "x" of "0" and "1", respectively. By contrast to this, to judge the four-value data with two read operations, the source line voltage is controlled as follows: at a first timing, upper bit data read is performed; and at a second timing of lower bit data reading, a certain read voltage is applied to memory cells under such the condition of: with respect to memory cell(s), upper bit of which is "1" (i.e., a low threshold voltage state), the source line voltage is set at 0V, while with respect to memory cell(s), upper bit of which is "0" (i.e., a high threshold voltage state), the source line is applied with a positive voltage so as to apparently boost the threshold voltage. As s result, the lower bit data may be judged with one read operation without regard to the upper bit data.
In the NAND-type EEPROM, the bias condition of the NAND cell unit at the write-verify read time is different from that at the erase-verify read time, and this results in that read currents (i.e., judging current) are different from each other. Considering it, there has been provided such a proposal that a positive voltage is applied to the source line at the erase-verify time, thereby making the judging currents of both of the write-verify operation and the erase-verify operation constant (see, Unexamined Japanese Patent Application Publication No. 2000-268585).

Semiconductor memory device with a memory cell array formed on a semiconductor substrate


A silver halide color photographic material comprises a support, a blue sensitive layer, a green sensitive layer and a red sensitive layer. The total silver content of the photographic material is not more than 1.0 g/m.sup.2. The photographic material further contains a compound represented by the formula (1a) or (1b): ##STR1## in which R.sup.12 is an aliphatic group, an aromatic group or a heterocyclic group; M is --CO--, --SO.sub.2 --, --N(R.sup.15)CO--, --OCO-- or --N(R.sup.15)SO.sub.2 --; each of R.sup.14, R.sup.15 and R.sup.24 independently is hydrogen, an alkyl group or an aryl group; L is a divalent linking group necessary for forming a 5, 6 or 7-membered ring; each of R.sup.11, R.sup.13 and R.sup.21 independently is hydrogen or a substituent group of the hydroquinone nucleus; Time is a group which is released from the oxidation product of the hydroquinone nucleus to further release X; X is a development inhibitor; and t is 0 or 1. M preferably is --SO.sub.2 --, --N(R.sup.15)CO--, --OCO-- or --N(R.sup.15)SO.sub.2 --.

The silver halide color photographic materials usually comprises a support, a blue sensitive layer, a green sensitive layer and a red sensitive layer. In the image formation, the photographic material is imagewise exposed to light with respect to a multicolor object, and the silver halide is color-developed to form a color image of cyan, magenta, yellow or other colors.
A DIR (development inhibitor releasing) coupler has been known as an additive of a color negative film. A development inhibitor is released from the coupler in the color development process of a color photographic material. Using the DIR coupler, the sharpness of the image is improved by an edge effect, which is caused by the difference in the density of the released development inhibitor. The DIR coupler is effective in a color developing process of a color negative film or a color paper. However, the effect of the DIR coupler cannot be expected in other color photographic materials such as a color reversal film, a color reversal paper, and a black and white photographic material, since the main process in the image formation of these photographic materials is a black and white development.
A DIR-hydroquinone which releases a development inhibitor in the black and white development process has been known (cf., U.S. Pat. Nos. 3,364,022 and U.S. Pat. No. 3,379,529, and Japanese Patent Provisional Publications No. 50(1975)-62435, No. 50(1975)-133833, No. 51(1976)-51941, No. 50(1975)-119631, No. 52(1977)-57828, No. 62(1987)-103639 and No. 62(1987)-251746). The edge effect in the black and white development process can be obtained by the DIR-hydroquinone.
Further, Japanese Patent Provisional Publication No. 64(1989)-546 describes an image forming method improved in sharpness and graininess of the image. This method contains a black and white development process, and uses a silver halide photographic material containing a DIR-hydroquinone in a hydrophilic colloidal layer not containing silver halide.
However, these known DIR-hydroquinones are insufficient for increasing the sharpness of the image.

Silver halide color photographic material comprising at least one DIR-hydroquinone compound, and having a total silver content of less than 1.0 g/m.sup.2


A method for providing configurable access to media in a media-on-demand system also can include delivering the media to a first client device in a format compatible with the first client device; interrupting the delivery of the media; recording a bookmark specifying a position in the media where the interruption occurred; and resuming delivery of the media to a second client device, the resumed delivery beginning at a position in the media specified by the recorded bookmark. The method further can include identifying device properties for each of the first and second client devices; delivering the media to the first client device in a format compatible with the identified device properties for the first client device; and, delivering the media to the second client device in a format compatible with the identified device properties for the second client device.

1. Technical Field
The present invention relates to the field of multimedia transfer and control. More particularly, the instant invention relates to a method and apparatus for dynamically controlling and referencing digital media independent of the point of access.
2. Description of the Related Art
Users, both business and consumers, are increasingly becoming accustomed to having large amounts of digital data delivered from various media-on-demand (MOD) systems. The continuing evolution from narrowband to broadband networks has fueled a growing need for digital data delivery by facilitating the transmission of broadband data not only by wired means, but also by wireless means. For example, the Internet, with its myriad of text, audio and video content, and its omnipresent availability, can provide consumers with a wealth of information that is practically accessible from anywhere through numerous wired and wireless means. As networks which provide access to digital data continue to evolve, the networks improve their ability to more efficiently distribute and serve bandwidth demanding streaming audio and video content to consumers.
Various forms of wired access methodologies have been created to provide consumer access to the various broadband networks. For example, cable modem service provided by cable service operators can provide Local Area Network (LAN) type access speeds via the same coaxial cable that carries cable signals to the premises of a subscriber. The cable modems used in these systems can support transmission speeds on the order of several megabits per second depending upon whether the network is engineered to use a symmetrical or an asymmetrical topology. These systems are orders of magnitude faster than narrowband systems, which typically can provide transmission speeds ranging from 28 Kbps to 56 Kbps. Digital Subscriber Loop (DSL) technology also can provide broadband access to subscribers, albeit, through traditional Plain Old Telephone Service (POTS) copper twisted pair lines. DSL modems, although not as fast as cable modems today, are touted to provide downstream speeds approaching 2 Mbps and upstream speeds approaching 512 Kbps depending upon the underlying network implementation.
Several wireless access technologies have been used to provide broadband wireless access to consumers. For example, the Reunion Broadband Wireless Access (BWA) manufactured by Nortel Networks Corporation of Brampton, P.O. provides a digital point-to-multipoint technology operating at frequencies ranging from 24 GHz to 38 Ghz. Additionally, Bluetooth™, a wireless technology for providing a short range radio link between various small form factor data devices, can operate at 2.45 GHz with transmission speeds of 721 Kbps. Finally, various other technologies, such as Fixed Wireless Loop, Wireless Local Loop, Local Multipoint Distribution System (LMDS) and Multichannel Multipoint Distribution System (MMDS) have be used to provide broadband access to subscribers.
The growth and gradual switch from narrowband to broadband access and services has eased user access to digital media by decreasing download time, consequently increasing user willingness to access digital media networks. This growth in network access and subscriber willingness has fueled the need to provide subscriber terminals to access the various broadband services. Typical subscriber access devices include, PCs, TVs, set-top boxes, handheld computers, wireless LAN devices, and audio devices that have the capability to download digital media content from the Internet for later playback and viewing.
Consequently, a new problem of user/subscriber control over the transmission of digital media has arisen from the development of MOD services, broadband access and the existence of a myriad of access devices, each having its own capabilities and access characteristics. Current systems lack functionality for accessing specific digital media on a first access device in a viewing session, and subsequently continuing the viewing session by allowing access of the same digital media from a second access device. For example, with present systems, a user viewing a movie delivered through a TV at home, cannot terminate the delivery of the movie only to resume the delivery of the same movie at a later time. Additionally, current systems do not permit one to resume delivery of a movie at a later time through a different access device, for example a PC. Finally, current systems do not permit the resumption of the delivery of the movie to an access device positioned in a location that differs from that in which the original access began, namely, the home. Accordingly, given the limitations and inflexibility present in current MOD systems, there exists a need to provide a more efficient and flexible system and method for providing configurable access to digital media in a MOD system.

User controlled multi-device media-on-demand system


A sensor arrangement comprises a sensor responsive to a measurement parameter as a sensor signal and a signal processing means for the sensor signal, the signal processing means having a switching stage for comparison of the sensor signal with a comparison or switching value and for producing a switching signal in a manner dependent on the comparison. A functional stage is present, which constitutes one function of the sensor signal, is comprised in the signal processing means, such function including a time derivative of the sensor signal or a sensor signal value modified by an additive factor, and the output signal of the functional stage forming the comparison of switching value for the switching stage.

The invention relates to a sensor arrangement comprising a sensor responsive to a measurement parameter as a sensor signal and a signal processing means for the sensor signal, the signal processing means having a switching stage and a function stage. The switching stage compares sensor signal with a comparison or switching value produced by the function stage and produces a switching signal in a manner dependent on the comparison.

Sensor arrangement with a sensor and a signal processing means


A system controller is presented that controls an output format of data according to a data congestion status of the data and then outputs the data over an output bus. Specifically, if there is data congestion, the system controller changes the format of the data to a format that matches a bus width of the output bus before outputting the data over the output bus. To give a specific example, the system controller changes the format of the data input over an input bus in an input format of 4 B to an output format of 5 B before outputting the data over the output bus. If there is no data congestion, the system controller outputs the data over the output bus without changing the input format.

1. Field of the Invention
The present invention relates to a data input-output control apparatus that receives data arriving over an input bus and outputs the data to an output bus with a larger bus width than the input bus.
2. Description of the Related Art
To increase data throughput, it is common practice to use an output bus with a larger bus width in system controllers that transfer data using a bus (such as the one disclosed in Japanese Patent Application Laid-open No. H08-63429). As a result, often disparity is seen in the bus widths of an input bus over which data is received and the output bus. Such a system controller, which transfers data from a smaller input bus to a larger output bus, changes the format of the data input over the input bus to a format that matches the larger output bus. In other words, the system controller buffers data input over the input bus until enough data suitable for the format matching the output bus accumulates and then transfers the data to the output bus.
However, in the technology described above, as transfer of data is held up until enough data suitable for the format matching the output bus accumulates, an adverse effect can be seen on the latency due to the data not accumulating fast enough when there is no data congestion.


An ink-jet head comprises a passage unit, an actuator unit, an ink supply unit, a flexible substrate, and a driver IC. The actuator unit is fixed to one surface of the passage unit in order to change the volume of pressure chambers included in the passage unit. The ink supply unit is fixed to the passage unit and supplies ink to the passage unit. The flexible substrate is connected to the actuator unit and has a signal wire formed thereon for feeding electric power to the actuator unit. The driver IC is connected to the flexible substrate in order to drive the actuator unit, and held on the ink supply unit.

1. Field of the Invention
The present invention relates to an ink-jet head that conducts recordings by ejecting ink onto a recording medium.
2. Description of Related Art
An ink-jet head ejects ink by means of, applying pressure to ink using a piezoelectric element, applying thermal energy to ink using a heater, and the like.
According to one of techniques that adopt the latter method, an ink passage formed on a substrate has therein a heating element which generates heat upon driving of a driver IC, and thermal energy thus generated is applied to ink contained in the ink passage (see Japanese Patent No. 2803840). A heat sink having a plurality of fins is provided opposite to the ink passage across the substrate. Since the heat sink dissipates heat, members of the head such as the driver IC, and ink contained in the ink passage are prevented from excessively rising in temperature. As a result, a stable ink ejection can be obtained.
In the above-described technique, however, an ink-jet head disadvantageously incurs a size increase of itself, because the fins constituting the heat sink protrude substantially throughout one face of the substrate.


Embodiments of the present invention are directed to a method and system for use of ranging MW to decrease MW intrusion detector false alarms. A Doppler microwave system may be provided that is capable of detecting an object range and adjusting the sensitivity of an alarm stage of a MW detector to account for object size and range. Multiple range limited MW stages may be configured for different ranges to determine the general range of the moving object. Based on signal levels present on these MW stages, an approximate object range may be determined. The sensitivity of the MW alarm stage is then adjusted based on a MW alarm state sensitivity vs. object range function that is optimized to alarm on humans and ignore small animals and insects. The method and system may be used in detection systems incorporating a MW sensor.

Currently, in the field of security systems, motion detectors are generally provided to detect intruders. Motion detectors often incorporate microwave (MW) technology and/or passive infrared (PIR) technology. Dual technology motion detectors incorporate multiple sensing technologies in order to provide efficient intruder detection with minimized risk of false alarms. Many dual detectors incorporate PIR technology and MW technology.
PIR technology has long been used in motion detectors. The PIR sensor detects the difference between the infrared energy emitted from an intruder and that emitted from the ambient environment. Many PIR detectors utilize Fresnel lenses or custom shaped mirrors to focus infrared energy on a pyrodetector. The output signal from the pyrodetector is then processed via analog hardware and/or digital signal processing. Lenses and mirrors are designed to provide various detection zones emanating radially from the sensor. As a target moves across the PIR detection zones, the sensing elements within the pyrodetector are alternately exposed to the target IF energy, resulting in an alternating voltage output from the PIR sensor. The amplitude and frequency of this voltage vary with a number of factors including target size, speed, and direction relative to the PIR zones, difference between ambient and target temperature, width and spacing between the detection zones, and frequency response of the pyrodetector.
Upon receiving the signals, the detector may perform processing by comparing the received signal to one or more voltage thresholds. These threshold crossings produce positive and negative pulses that can be counted and timed, with certain combinations of pulse height, duration, and frequency being considered PIR alarms.
MW technology often operates on the principle of phase shift or Doppler effect. Unlike PIR, MW technology is an active technology. The MW detector transmits MW energy, which reflects off objects and returns to the MW detector. Moving objects result in a received signal that is frequency shifted from the original transmitted signal. The detector receives this signal, and generates an alternating voltage difference frequency signal which is then processed via hardware or digital signal processing. Because only the AC (alternating current) component of the signal is processed, only moving objects are detected. The frequency of the returned signal is dependent upon the target movement direction and speed. The amplitude is a function of transmitted signal strength, target size, distance, and reflectivity. Highly reflective materials such as metal will return significantly greater energy to the detector than less reflective objects such as people or animals. Processing may include comparison of the MW signal to one or more thresholds with certain combinations of quantity, duration, or frequency of threshold crossings considered MW alarms.
Typically, dual technology detectors incorporate an AND function, whereby both individual sensor technologies must be in the alarm state simultaneously to produce an alarm at the detector output. PIR and MW technologies have many differing and distinct potential false alarm sources, as well as some common sources such as small animals. Minimization of false alarms from either detector technology is likely to greatly reduce the incidence of false alarms for the dual detector system.
MW motion detectors are susceptible to false alarms caused by small animals and insects within the detection range of the MW detector. Furthermore, many MW detectors also suffer from decreased sensitivity in the area beneath the sensor because very little MW energy is transmitted to, or can be received from that direction due to the shape of the MW transmitter and/or receiver patterns.
Some currently existing systems, such as that of U.S. Pat. No. 5,578,988 provide sensitivity adjustments for MW detection systems. However, such systems do not consider a distance of the target object from the dual detector in order to reliably minimize the probability of false alarms. A solution is needed that minimizes MW false alarm effects and improves MW detector performance by considering target location in order to enhance accuracy.

System and method for improving microwave detector performance using ranging microwave function


The present invention relates to a method for manufacturing a display device including a p-channel thin film transistor and an n-channel thin film transistor having a microcrystalline semiconductor film each of which are an inverted-staggered type, and relates to a method for formation of an insulating film and a semiconductor film which are included in the thin film transistor. Two or more kinds of high-frequency powers having different frequencies are supplied to an electrode for generating glow discharge plasma in a reaction chamber. High-frequency powers having different frequencies are supplied to generate glow discharge plasma, so that a thin film of a semiconductor or an insulator is formed. High-frequency powers having different frequencies (different wavelength) are superimposed and applied to the electrode of a plasma CVD apparatus, so that densification and uniformity of plasma for preventing the effect of surface standing wave of plasma can be realized.

1. Field of the Invention
The present invention relates to a method for manufacturing a display device using an n-channel thin film transistor and a p-channel thin film transistor.
2. Description of the Related Art
In recent years, a technology to form thin film transistors using semiconductor thin films (with a thickness of approximately several tens to several hundreds of nanometers) that are formed over substrates having an insulating surface has attracted attention. Thin film transistors have been widely applied to electronic devices such as ICs and electro-optical devices and rapidly developed especially as switching elements for image display devices.
A Thin film transistor using an amorphous silicon film for a channel formation region, a thin film transistor using a polycrystalline silicon film for a channel formation region, or the like are used as a switching element in an image display device. As a method for forming polycrystalline silicon films, a technology is known in which a pulsed excimer laser beam is processed into a linear shape by an optical system and an amorphous silicon film is scanned and irradiated with the linear beam for crystallization.
In addition, as switching elements of image display devices, thin film transistors using a microcrystalline silicon film as a channel formation region are used (Patent Document 1: Japanese Published Patent Application No. H4-242724, Non-Patent Document 1: Toshiaki Arai et al., SID 07 DIGEST, 2007, pp. 1370-1373).
In the meantime, a liquid crystal panel is manufactured in such a manner that a plurality of panels are processed over a glass substrate having large area, which is referred to as a mother glass, and then are finally cut to have sizes each of which fit a screen of a television or a personal computer. This is because the plurality of panels are formed from one piece of mother glass, so that cost per one panel is reduced. In the market of liquid crystal televisions, increase in screen size (panel size) and steep drop in retail price occurs. For these past several years, increase of mother glass size has proceeded in order to improve productivity in response to increase in screen size and price drop.
A size of a typical glass substrate around 1991 is 300 mm×400 mm, which is called the first generation. After that, a size of a mother glass has kept on increasing as follows: the second generation (400 mm×500 mm), the third generation (550 mm×650 mm), the fourth generation (730 mm×920 mm), the fifth generation (1000 mm×1200 mm), the sixth generation (2450 mm×1850 mm), the seventh generation (1870 mm×2200 mm), the eighth generation (2000 mm×2400 mm), the ninth generation (2450 mm×3050 mm), and the tenth generation (2850 mm×3050 mm).

Semiconductor Energy Laboratory Co., Ltd.