A database client/server development system providing support for remote sessions with user-created application objects is described. When a user desires to create a "remoteable" object from a user object, the user assigns a proxy name or alias, thereby providing a mechanism to differentiate the real (local) version of the object from a remote version of that object. When the user creates the proxy, the system generates all of the interface definitions for the object (i.e., to access its internal functionality) which are capable of being proxied (i.e., "proxiable"). A given object can reside locally, remotely, or both; the proxy mechanism allows the application to resolve at runtime which version of the object to invoke. When the user's final application is deployed, the proxy object is deployed at the client machine for use at the client for accessing the real version at the server. If desired, an application can be deployed with a real copy of the object, in addition to the proxy. In such a case, the client can serve as a server (of that object), in addition to being a client of objects from other servers.

The present invention relates generally to computerized database systems and, more particularly, to a system and methods for improving distribution and execution of objects, including application objects, across multiple tiers of distributed computer environments.
Today, client/server systems abound. Such systems are characterized by a database server(s) connected to a multitude of clients, each client typically comprising a workstation or personal computer (PC) connected to a network. In a typical deployment of such a system, a client application, such as one created by an information service (IS) shop, resides on all of the client or end-user machines. Such client applications interact with host database engines (e.g., Sybase SQL Server.TM.), executing business logic which is mostly, if not completely, running at the client machines. Moreover, with present-day systems, it is possible for a client to take advantage of centralized business logic residing at the host database, typically written in the host database's proprietary or semi-proprietary language (e.g., Sybase T-SQL).
One approach to providing better distributed computing is to employ existing Distributed Computing Environment Remote Procedure Calls (DCE.backslash. RPCs). Using such an environment, one can store C programming code on a server, thus providing a centralized repository for business logic. Such an approach is problematic, however. At the outset, the difficulty of configuring such a Distributed Computing Environment is a daunting task, requiring highly skilled technicians (not only for installation but also maintenance). Further, most IS professionals charged with the task of creating database applications, although quite adept at developing client applications, have relatively little training or experience providing server-side logic. For instance, most of these individuals typically employ fourth-generation languages (4GL), such as Powersoft PowerScript.about., Paradox PAL.TM., Microsoft Visual Basic.TM., or the like. As a result, a minority of these individuals are adept at creating program logic in a lower-level language, such as C.
A particular problem exists with implementing a substantial amount of business logic on the client side. Over a period of time, a given database application can be expected to undergo various modifications, as that program undergoes further enhancements. Moreover, the business environment is a dynamic one. Accordingly, a program implementing business logic will expectedly undergo significant modifications over a period of time for adapting to ever-changing business logic. When the business logic requiring modification resides on the client side, the task of updating business logic includes the arduous task of updating each individual client machine. Given the difficulty of maintaining business logic at multiple clients (particularly in a large network environment), there is much interest in maintaining business logic in a centralized location.
Another difficulty in client/server environments is the disparity in capability from one client machine to another. Such environments are typically very heterogeneous, ranging from very powerful workstations on the one hand, to very limited or modest workstations on the other. Given such an environment, it is difficult, if not impossible, to deploy a large, complex application on all of these different client machines. In practice, one is limited by the lowest common denominator. Quite simply, the differences between the client machines make it extremely difficult to deploy a single application across such an environment.
One approach to addressing the foregoing problems is DCE or Distributed Computing Environment protocol--an emerging standard. To date, this "standard" has been difficult to implement and maintain (in addition to being a somewhat immature standard). In particular, the difficulty faced in implementing and maintaining the server side of such an environment remains an obstacle to widespread adoption. DCE is an RPC-based (i.e., Remote Procedure Call-based) solution where a portion of procedure calls are abstracted: an interface definition resides at the client with a corresponding interface definition residing at a receiver (i.e., remote computer, typically a server, which services the RPC calls). The task of coordinating a collection of servers in a DCE environment is an especially difficult one.
Another emerging standard is CORBA (Common Object Request Broker Agent), an object-based RPC-like standard. Like the DCE approach, CORBA provides a mechanism where two processes can communicate remotely, through a well-defined interface. Microsoft OLE (Object Linking and Embedding), a competing standard, also implements remote interprocess communication, through a well-defined interface. Although such standards have been proposed, with varying levels of maturity, to date there remains few tools available which would facilitate use of any one of these standards. Further, each standard incorporates proprietary technology, thus limiting the ability of these environments to interoperate with each other.
Implementing centralized business logic at a server is not itself without disadvantages, however. For departmental solutions, IS personnel desire to retain at least some control over a deployed application. With a centralized system, depending on how it is administered, clients may take offense to centralization of control if service is perceived as inadequate. The increasing popularity of "departmental computing" is, in large part, a response to the "glass house"--overly centralized computing. For departmental solutions, therefore, IS personnel want to retain at least some control. Although these individuals recognize the benefit of partitioning the business logic of an application, these individuals want to retain control--physical access--over machines which implement at least some of the business logic.
The cost of administering a centralized service greatly affects how well clients are serviced. As it is typically very expensive to employ skilled technicians for changing to business logic stored on a server (e.g., requiring expert C programmers), upper management is often unwilling to fund such changes. For departmental solutions, therefore, keeping the cost of modifications relatively low is an important consideration.
What is needed is a system with methods providing an n-tier development environment. Such a system would allow a programmer to create objects that contain business rules and which can be distributed onto one or more application servers, without any inherent limit as to how many servers can be employed. The present invention fulfills this and other needs.

Database application development system with improved methods for distributing and executing objects across multiple tiers


A method includes crawling and indexing voice sites and storing results in an index; receiving a search request in voice from a user via a telephone; performing speech recognition on the voice search request and converting the request from voice to text; parsing the query; and performing a search on the index and ranking the search results. Search results may be filtered based on attributes such as location and context. Filtered search results may be presented to the user in categories to enable easy voice browsing of the search results by the user. Computer program code and systems are also provided.

Voice Extensible Markup Language (VoiceXML) is a markup language for creating voice user interfaces that use automatic speech recognition and text-to-speech synthesis and is described, for example, at http://www.voicexml.org, http://www.vxml.org, http://www.w3.org/TR/voicexml20/ and elsewhere. VoiceXML has tags that instruct the voice browser to provide speech synthesis, automatic speech recognition, dialog management, and audio playback.
Proposals, such as Google VoiceSearch, exist for searching conventional web sites through voice.

Systems and methods to index and search voice sites


A menu control device includes a casing and a roller module. The roller module is installed in the casing. The roller module includes a base, an elastic supporting arm, a scroll wheel, an encoder, a switch element and a microprocessor. The elastic supporting arm is connected with the base. The scroll wheel is pivotally coupled to the elastic supporting arm. The encoder is located beside the scroll wheel. The encoder generates an encoding signal in response to the rotation of the scroll wheel. When an external pressing force is applied to the scroll wheel, the elastic supporting arm is swung toward the switch element, and the switch element is triggered to generate a switching signal. The microprocessor performs an item browsing operation on a menu according to the encoding signal. The microprocessor performs an item selecting operation on the menu according to the switching signal.

Generally, during the live broadcast process, the live broadcaster may connect a variety of electronic devices with a live broadcast box control device. In addition, the live broadcaster may control these electronic devices through the live broadcast box control device. For example, during the live broadcast process, if the live broadcaster wants to set various scenarios (e.g., the ambient sound effect) or the live broadcaster wants to share videos, texts or music with online fans, the live broadcaster may perform an item browsing operation, an item selecting operation or any other appropriate controlling operation on the menu shown on the electronic device through the live broadcast box control device. Consequently, the required function can be selected and executed.
However, due to the structural limitations, the conventional live broadcast box control device still has some drawbacks. For example, when the live broadcaster operates and controls the menu shown on the electronic device through the live broadcast box control device, for example performs the item browsing operation, the live broadcaster needs to operate the upper key, the down key, the left key and the right key to achieve this purpose. Moreover, when the live broadcaster performs the item selecting operation, the live broadcaster needs to operate another key. In other words, the conventional live broadcast box control device is not convenient for the live broadcaster to control the live atmosphere of the live broadcast in real time.
Therefore, there is a need of providing an improved menu control device in order to overcome the drawbacks of the conventional technologies.


A light-emitting device, a method of fabricating the light-emitting device, a light-emitting device package and a lighting system are provided. The light-emitting device may include a substrate 105; a first conductivity type semiconductor layer 12 disposed on the substrate 105; an active layer 114 disposed on the first conductivity type semiconductor layer 12; a second conductivity type semiconductor layer 16 disposed on the active layer 114; a first electrode 131 disposed on the first conductivity type semiconductor layer 112; a second electrode 132 disposed on the second conductivity type semiconductor layer 116; a first light extraction pattern P provided on a top surface of the substrate 105; and a second light extraction pattern 150 provided on sides of the substrate 105.

1. Field
Embodiments relate to a light-emitting device.
2. Description of the Related Art
Light-emitting devices are devices that convert electric energy into light energy and are capable of realizing various colors by adjusting the composition ratio of compound semiconductors.
When a forward voltage is applied, electrons from an n layer and holes from a p layer are combined to emit energy corresponding to an energy gap between a conduction band and a valence band. The energy is generally emitted in the form of heat or light. In light-emitting devices, in particular, the energy is emitted in the form of light.
Nitride semiconductors, for example, are attracting much attention for the fields of optical devices and high power electronic devices because of their high thermal stability and wide band gap energy. In particular, blue light-emitting devices, green light-emitting devices, and ultraviolet (UV) light-emitting devices that use nitride semiconductors have been commercialized and are widely used.
In related-art lateral light-emitting diodes (LEDs), a GaN epitaxial layer is grown on a patterned sapphire substrate, and p- and n-electrodes are formed with the use of a mesa structure.
The distribution of light in a related-art lateral LED shows that about 30% of light is emitted from the top of a GaN epitaxial layer and about 70% of the light is emitted from the bottom of a patterned sapphire substrate. More specifically, in a related-art lateral LED, most light is emitted from the bottom of the patterned sapphire substrate at a predetermined angle. That is, due to the total reflection caused by the difference between the refractive index of the patterned sapphire substrate and the refractive index of the air, most of the light beyond a predetermined critical angle cannot be emitted regardless of the presence of the patterned sapphire substrate.


An object of the present invention is to provide a sensing device capable of easily grasping whether or not a concentration of a sensing target is equal to or less than a standard value.

In order to quantify the mass and concentration of a sensing target which is included in a very small amount in an environment or in a living body such as, for instance, an environmental pollutant like dioxin, PCB (polychlorinated biphenyl), and the like, contained in a river, various antibiotics used for raising fishes and are remained in the blood of the raised fishes, and diseased substances such as prion which causes BSE (bovine spongiform encephalopathy) in an animal body tissue, there is known a sensing device using a crystal sensor being a sensing sensor provided with a crystal vibrator having, for instance, a crystal piece as a piezoelectric piece, in which an excitation electrode for exciting the crystal piece is respectively provided to one surface side and the other surface side of the crystal piece.
If explained more in detail regarding this sensing device, the sensing device includes, other than the above-described crystal sensor, for example, a frequency measuring device being electrically connected to the crystal sensor and having a frequency detecting section for detecting a frequency generated by the crystal piece, and a PC (personal computer) being electrically connected to the frequency measuring device and having a monitor, or the like, as an output section, for example. Further, at one surface side of the crystal vibrator, an absorbing layer having, for instance, an antibody adhered to the surface thereof is provided, in which the antibody is designed to selectively absorb one of the sensing target such as mentioned above, for example, by an antigen-antibody reaction, and when the sensing target is absorbed in the absorbing layer, the frequency of the crystal piece varies in accordance with the absorption amount of the sensing target. In the above-described PC, a software which analyzes the frequency variation detected by the frequency detecting section of the frequency measuring device and graphically displays the frequency variation on the monitor, for example, is installed.
With the use of thus structured sensing device, when, for example, a user drops a sample solution containing the sensing target on the crystal vibrator after dropping a solvent, the sensing target is absorbed in the absorbing layer, an oscillation frequency of the crystal vibrator decreases in accordance with the absorption amount, and the frequency variation is graphically displayed on the monitor. The user can determine the mass and concentration of the sensing target included in the sample solution by reading the frequency variation amount from the graph and by performing a predetermined calculation based on the variation amount.
Meanwhile, in order to secure the safety of the human body, in an environmental field, there is a case in which a sample solution is prepared by, for example, adding a solvent under a predetermined atmosphere to water collected as a specimen, or by making the air collected as a specimen dissolved in a solvent, and by comparing concentrations of the respective environmental contaminants such as, for instance, the aforementioned dioxin and PCB included in the sample solution, with standard concentrations (tolerance amount) being previously set for each of the various environmental contaminants, for example, to thereby determine the largeness or smallness of these concentrations. Further, also in a food sanitation field, there is a case in which a sample solution is prepared by a specimen such as, for example, the blood of an animal, and by comparing a concentration of a substance toxic to the human body such as various antibiotics included in the sample solution with a standard concentration being previously set for each of the toxic substances, for instance, to thereby determine the largeness or smallness of these concentrations. The aforementioned conventional sensing device can also be applied for performing such determinations, but, in such a case, the user has to perform, other than the aforementioned quantification using the sensing device, an examination and a storage of a standard concentration of the quantified substance, and thereafter, the user compares the standard concentration with the quantified value obtained by the sensing device by matching them with each other, to thereby determine the largeness or smallness of the concentrations, which becomes a great burden on the user when performing determinations with respect to a plurality of sensing targets, for instance.
Note that although a sensing device provided with a crystal sensor is described in Patent Document 1, an aim thereof is to enhance the sensitivity by connecting various components included in the device without using any cables, so that the above-described problems cannot be solved with it.
Patent Document 1
Japanese Patent Application Laid-open No. 2001-083154 (Paragraph 0007, FIG. 1)

Abstract: As a concrete means for solving the problem, a sensing device which senses, using a piezoelectric vibrator provided with an adsorbing layer for adsorbing a sensing target and electrodes, and having a natural frequency varied by an absorption of the sensing target, the sensing target by the variation of the natural frequency of the piezoelectric vibrator, is structured to include an oscillation circuit for oscillating the piezoelectric vibrator, a measuring section for measuring a concentration of the sensing target based on an oscillation output from the oscillation circuit, a storage section for storing data in which a plurality of sensing targets and their standard concentrations are corresponded to each other, a selecting unit for selecting the sensing target, a data processing section for reading out the standard concentration corresponding to the sensing target selected by the selecting unit from the storage section and comparing the standard concentration with a concentration detection value detected by the measuring section, and an output section for outputting a comparison result compared by the data processing section.


A digital broadcasting receiver that uses a channel map containing broadcast information such as channel numbers and virtual channel numbers is described. When a user selects a certain digital channel number, a control unit consisting of a CPU makes a search as to whether or not the number exists in the channel map. If the number does not exist, “No Signal” notice is displayed on a display and if the user selects a scan instruction then, the entire range of frequency band of the broadcasting signal is scanned. If a signal that corresponds to the digital channel number exists, its broadcast is received. Therefore, a search is possible even when the user knows only a virtual channel number and the digital channel number entered by the user is not registered in the channel map.

The present invention relates to a digital broadcasting receiver that uses broadcast channel map information containing channel numbers and virtual channel numbers.
Conventionally, there have been televisions equipped with broadcast channel memories, memories for identifying broadcast stations, etc., which read broadcasting station identification codes for the channels being received, and automatically rewrite desired channels to be received to new broadcast channels by going through search processes when the broadcast channels are changed (e.g., Japanese Unexamined Patent Publication No.11-18018).
Furthermore, in recent years, broadcasting stations in North America have been distributing digital broadcasts based on the ATSC (Advanced Television Systems Committee) Standards. As a result, certain types of broadcasting receivers (set top box; hereinafter called "STB") are becoming popular that receive these digital broadcasts and convert them into image signals that can be received by existing televisions. The STB typically is equipped with table data ("channel map"), which stores in an internal memory the data included in the broadcasting signal at the time when the broadcasting signal is received, and this channel map is used for the purpose of station selection later. It is possible to provide the STB with a capability of automatically rewriting the desired channel to be received to a new broadcast channel by going through the abovementioned search process.
However, the STB of the prior art could not select a station if the digital channel number inputted by a user was not registered in the channel map, so that it used to notify the user that there was no signal even though the broadcasting signal actually existed. More specifically, it was designed in such a way that a digital broadcasting signal could contain information data such as multiple channels (sub-channels) and virtual channel numbers in the same frequency band ("physical channel"), but it was not possible to select stations if the user knew only virtual channel numbers.


In an apparatus for separating parts arranged for example in at least two adjacent rows and including a transfer device, which is provided with at least two holding elements which pick up the parts in a first position and deposit them in a second position 5b, guide tracks are provided by which the distance at which the holding elements are disposed adjacent one another is changeable during the transport of the parts from the first position to the second position.

The invention resides in an apparatus according to the preamble of claim 1 for separating for example parts arranged in at least two adjacent rows, including a transfer element having at least two retaining elements arranged side-by-side which engage parts in a first position and then deposit them in a second position.
Such apparatus are well-known in the art. They generally include an element which is rotatable about an axis and which is provided with several radially extending arms which are arranged side-by-side at a uniform angular distance from one another and which are provided at their ends with vacuum suction means. With the known apparatus, for example parts disposed on adjacently arranged transport belts can be grasped; pivoted by 90° or 180° and transferred to a downstream machine element.
The arms of the known separating apparatus are arranged firmly on a rotatable element in side-by-side relationship so that the distance at which they are arranged in side-by-side relationship cannot be changed. As a result, the parts can be deposited again only with the same sideward spacing relative to one another with which they were picked up. That is, with the known separating apparatus, the distance at which the parts are arranged side-by-side cannot be changed. This is disadvantageous in particular if the parts are arranged directly adjacent one another without any spacing, but it is necessary for the further treatment or handling of the parts that there is a space between adjacent sides of the parts.
It is the object of the present invention to provide an apparatus of the type described above which however allows the parts to be deposited at distances from each other which differ from the distances at which they were picked up by the apparatus.


An oscillator comprising an RC oscillator and a bandgap reference source, wherein the bandgap reference source provides a reference current for the RC oscillator, and a temperature coefficient of the reference current is adjustable. Since the oscillation frequency of the RC oscillator has less dependency on a power supply, a clock source having a relatively precise frequency thus can be obtained; and based on the RC oscillator, the bandgap reference source having a temperature compensation function is added, the reference current generated by the bandgap reference source with an adjustable temperature coefficient is used for temperature coefficient compensation to the inherent temperature coefficient of the oscillation frequency of the RC oscillator, thereby reducing the effect of the temperature on the oscillator, so that the output frequency of the oscillator does not change with the temperature as far as possible, which improves the oscillation frequency precision of the oscillator.

The invention relates to integrated circuit design, in particular to an oscillator.
A common RC oscillator circuit, which has a current steering structure, is shown in FIG. 1. In a half cycle, a delay is caused by charge and discharge of a capacitor using a unilateral current. Since the outputs Q and QB of an RS latch are inverted signals, it can ensure that the left and right switches (PM3, PM4, NM1, NM2) do not turn off at the same time, avoid the non-ideal effect of switching capacitor such as charge injection, which causes an R-controlled voltage VCR or S-controlled voltage VCS to jump. Due to use of an RS flip-flop with logic gate control, charge and discharge times of the two loops are basically the same, thereby ensuring the duty ratio of an output signal. The delay is mainly caused by the charge and discharge of the capacitor using the current, so an oscillation frequency has a direct relationship with the current and the capacitor and little relationship with the power supply voltage VDD. Because the V-I property of a semiconductor device is sensitive to the temperature, the oscillator frequency is greatly affected by the temperature. The oscillation frequency precision of the common RC oscillator circuit is mainly limited by the temperature drift of a CMOS device.
Although the common RCOSC (RC oscillator) circuit is basically independent of the power supply, the frequency precision is still affected by other external factors, such as the temperature and process.

Shanghai Huali Microelectronics Corporation


A lateral thin-film Silicon-On-Insulator (SOI) JFET device includes a semiconductor substrate, a buried insulating on the substrate, and a JFET device in a thin semiconductor layer of a first conductivity type on the buried insulating layer. The device includes a source region of the first conductivity type, a control region of a second conductivity type which is laterally spaced apart from the source region and a lateral drift region of the first conductivity type adjacent to the control region. A drain region of the first conductivity type is provided laterally spaced apart from the control region in a first lateral direction by the lateral drift region, and at least one field plate electrode is provided over at least a major portion of the lateral drift region and is insulated from the drift region by an insulation region. The control region includes control region segments which are spaced apart in a second lateral direction perpendicular to the first lateral direction by portions of the thin semiconductor layer, thus providing a normally "on" JFET device.

The invention is in the field of Semiconductor-On-Insulator (SOI) devices, and relates more particularly to SOI JFET devices suitable for high-voltage applications.
In fabricating high-voltage power devices, tradeoffs and compromises must typically be made in areas such as breakdown voltage, size, "on" resistance and manufacturing simplicity and reliability. Frequently, improving one parameter, such as breakdown voltage, will result in the degradation of another parameter, such as "on" resistance. Ideally, such devices would feature superior characteristics in all areas, with a minimum of operational and fabrication drawbacks.
One particularly advantageous form of lateral thin-film SOI device includes a semiconductor substrate, a buried insulating layer on the substrate, and a lateral MOS device on the buried insulating layer, the MOS device, such as a MOSFET, including a semiconductor surface layer on the buried insulating layer and having a source region of a first conductivity type formed in a body region of a second conductivity type opposite to that of the first, an insulated gate electrode over a channel region of the body region and insulated therefrom by an insulation region, a lateral drift region of the first conductivity type, and a drain region of the first conductivity type laterally spaced apart from the channel region by the drift region.
A device of this type is shown in FIG. 1 common to related U.S. Pat. No. 5,246,870 (directed to a method) and U.S. Pat. No. 5,412,241 (directed to a device), commonly-assigned with the instant application and incorporated herein by reference. The device shown in FIG. 1 of the aforementioned patents is a lateral SOI MOSFET device having various features, such as a thinned SOI layer with a linear lateral doping profile in the drift region and an overlying field plate, to enhance operation. As is conventional, this device is an n-channel or NMOS transistor, with n-type source and drain regions, manufactured using a process conventionally referred to as NMOS technology. An SOI device with a linearly-doped drift region of constant thickness is shown in U.S. Pat. No. 5,300,448, also commonly-assigned with the instant application and incorporated herein by reference.
More advanced techniques for enhancing high-voltage and high-current performance parameters of SOI power devices are shown in U.S. patent application Ser. No. 08/998,048, filed Dec. 24, 1997, commonly-assigned with the instant application and incorporated herein by reference. Another technique for improving the performance of an SOI device is to form a hybrid device, which combines more than one type of device configuration into a single structure. Thus, for example, in U.S. patent application Ser. No. 09/122,407, filed Jul. 24, 1998, commonly-assigned with the instant application and incorporated herein by reference, an SOI device is disclosed which includes a lateral DMOS transistor and an LIGB transistor in the same structure.
Thus, it will be apparent that numerous techniques and approaches have been used in order to enhance the performance of MOS power semiconductor devices, in an ongoing effort to attain a more nearly optimum combination of such parameters as breakdown voltage, size, current-carrying capability and manufacturing ease. While all of the foregoing structures provide varying levels of improvement in device performance, no one device or structure fully optimizes all of the design requirements for high-voltage, high-current operation.
Although the references discussed above relate to MOS transistor devices, in some applications it would be desirable to have high-voltage SOI JFET device structures which exhibit similarly enhanced performance. Although SOI JFET devices presently exist, as shown for example in U.S. Pat. Nos. 5,130,770 and 5,432,377, these devices do not exhibit the type of superior high-voltage, high-current performance as exemplified by the SOI MOS devices discussed above.
Accordingly, it would be desirable to have an SOI JFET device structure, preferably of the normally "on" type, capable of high performance in a high-voltage, high-current environment, in which operating parameters, and in particular "on" resistance and breakdown voltage, are further optimized.
It would also be desirable to have an SOI JFET device structure which can be fabricated using a process technology very similar to that used to fabricate enhanced SOI MOSFET devices such as those discussed above.

Lateral thin-film silicon-on-insulator (SOI) JFET device

Philips Electronics North America Corporation


A golf club head includes a golf club head body and a weight member mounted in a recession of the golf club head body. The weight member includes at least one solder channel for receiving solderable filler. The weight member is mounted in the recession of the golf club head body before a brazing process for bonding the weight member with the golf club head body. During the brazing process, the solderable filler is melted and fills a gap between the weight member and walls delimiting the recession of the golf club head body to thereby increasing bonding strength between the weight member and the walls delimiting the recession of the golf club head body.

1. Field of the Invention
The present invention relates to a weight member for a golf club head. In particular, the present invention relates to a weight member having at least one engaging surface and at least one solder channel allowing it to be fixed in a recession of a golf club head body by brazing.
2. Description of Related Art
FIG. 1 of the drawings illustrates a conventional golf club head including a golf club head body 10 and a weight member 20. The golf club head body 10 is made of a low-density material such as a titanium alloy or Fe—Mn—Al alloy, and the weight member 20 is made of a high-density material such as a W—Fe—Ni alloy. The weight member 20 is fixed in a recession 11 of the golf club head body 10 by an appropriate means to form a golf club head product with a lower center of gravity, to increase the overall volume of the golf club head, to reduce the thickness of the golf club head, and to improve the capacity of deformation. Nevertheless, a welding process cannot be used to bond the golf club head body 10 and the weight member 20 made of different metal. Therefore, a brazing process is usually used in the golf club head industry to bond the golf club head body 10 and the weight member 20.
FIG. 2 is an exploded sectional view of the golf club head in FIG. 1. FIG. 3 is a sectional view of the conventional golf club head during brazing. FIG. 4 is a sectional view of the conventional golf club head after brazing. During the brazing process, solderable filler 30 with a low melting point is placed into the recession 11 of the golf club head 10 and then heated. Next, the weight member 20 is inserted into the recession 11 of the golf club head body 10. After cooling, the solderable filler 30 securely bonds the golf club head body 10 and the weight member 20 together. This brazing process is widely used, as the operation is simple. However, as illustrated in FIGS. 3 and 4, in actual operation, since the weight member 20 is inserted into the recession 11 of the golf club head body 10 after placing the solderable filler 30 into the recession 11, it is difficult for an operator to control the amount of the solderable filler 30, the engaging relationship between the recession 11 and the weight member 20, and the force required for inserting the weight member 20 into the recession 11. In particular, four sides of the weight member 20 substantially abut against a peripheral wall delimiting the recession 1 when the weight member 20 is inserted into the recession 11, yet there is no space for compression during insertion of the weight member 20. As a result, the sides of the weight member 20 cannot be completely in contact with the peripheral wall of the recession 11.
Further, if brazing paste is used as the solderable filler 30, organic materials are generated and volatilize when the brazing paste is heated, adversely affecting the brazing result. As a result, many problems occur, such as outflow of the solderable filler 30, unreliable filling of a gap between the weight member 20 and the walls delimiting the recession 11, generation of voids, and waste of solderable filler. The bonding strength for the weight member 20 is adversely affected, and the operation of the brazing process is difficult.

This patent is subject to a terminal disclaimer.


A pumping device includes a container having a cover structure. A piston is movably received in the container and is manually operable. The cover structure has an air inlet valve and a slide switch, which, when properly set, allow air to be sucked into or expelled out of the container by the manual operation of the piston to increase or decrease the internal pressure of the container for oil suction and oil drainage. The pumping device also includes another slide switch, whereby when both slide switches are properly set, the internal pressure of the container is increased or decreased due to the supply of pressurized air from an external source and oil can be sucked into and drained out of the container accordingly.

1. Field of the Invention
The present invention relates generally to a pumping device, and in particular to a pumping device that can be manually or pneumatically operated to selectively suck liquid into a container and to drain the liquid out of the container.
2. The Related Art
Replacement and/or replenishment of oil is one of the most important jobs for maintenance and repairing of automobiles. Often, the oil is drained from the oil pan by simply removing the oil drain plug that blocks a drain hole formed in the bottom of the oil pan whereby oil is allowed to freely flow out of the drain hole. This is not an efficient way for draining oil from the automobile engine and may cause undesired contamination to the surroundings. Oil pumping devices or oil draining devices are available. However, such oil pumping devices have a complicated structure and can only be manually or pneumatically operated. In Taiwan Patent Application No. 90215858, filed by the present inventor, an oil pumping device that can be operated both manually and pneumatically is disclosed. However, such as conventional device still suffers certain drawbacks that can be further improved.
Thus, the present invention is aimed to provide a pumping device that overcomes the drawbacks of the conventional devices.


An absorbent article comprising a first layer comprising a nonwoven having a first colored region that includes at least one of a central colored region, an intermediate colored region, and an outer colored region; and a second layer comprising a polymer film having a second colored region that includes at least one of a central colored region, an intermediate colored region, and an outer colored region; wherein the first colored region differs from the second colored region. The article may further comprise a background region. The background region may be visually distinguishable from at least one of the first colored region and the second colored region.

A variety of absorbent articles that include different colored regions are available in the market. Absorbent articles such as sanitary napkins and female adult incontinence articles that function to collect fluid discharged from a woman's vagina or urethra sometimes include a colored region proximal the central portion of the absorbent article that differs in color from portions of the absorbent article remote from the central portion of the absorbent article.
By including a colored region in the central portion of the absorbent article, manufacturers of absorbent articles have effectively taught consumers that the central portion of the absorbent article is where the fluid collected should reside. Manufacturers have devised a variety of designs for central colored regions. In some absorbent articles, the central colored region is relatively narrow as compared to the overall width of the absorbent article and extends only along about one-half of the length of the absorbent article. One possible reason that relatively narrow central colored regions were adopted was that such colored regions could provide a desired visual impression, such as the impression of depth. Central colored regions also might help the consumer understand how her use and placement of the product in her panty might be affecting the staining pattern of absorbent article, which might help her improve how and where she mounts the chassis of the absorbent article in her panty to achieve maximum performance.
One problem associated with narrow central colored regions on absorbent articles is that some consumers associate stain patterns that extend outside the central colored region as indicating that the absorbent capacity of the absorbent article is exhausted. In some absorbent articles, the central colored region could account for less than 25% of the absorbent capacity of the absorbent article.
A variety of materials having outstanding widthwise and lengthwise fluid distribution properties are available. Such materials can distribute collected fluid to regions of the absorbent article remote from the central colored region. An absorbent article capable of more widely distributing fluid in the absorbent article can be advantageous because wider fluid distribution can effectively increase the absorbent capacity of the absorbent article. One drawback to widely distributing fluid in an absorbent article is that the stains of such fluid might travel well beyond the central colored region, if present. As mentioned above, stains outside of the central colored region might be alarming to the wearer. Making the central colored region larger may not be an attractive design option because larger colored regions might make the absorbent article appear to be bulkier and be perceived as not providing for comfortable fit.
With these limitations in mind, there is a continuing unaddressed need for absorbent articles having a visual impression that that are perceived by wearers as having adequate fluid storage capacity to meet their needs. Further, there is a continuing unaddressed need for absorbent articles that reassure the user that fluid in the absorbent article in regions outside of a relatively narrow colored region is securely retained in the absorbent article and she need not worry about a leak.

Absorbent article having a multi-component visual signal


It has been found that for a SCALPEL lithographic system thermal effects dictate that the acceleration voltage for the exposing electrons be maintained within a specific range. This range depends on a variety of factors but is generally in the 50 to 150 KeV region. Additionally, thermal considerations also dictate the method of scanning the mask to print an entire wafer.

1. Field of the Invention
This invention relates to lithographic processes and in particular lithographic processes employing charged particle exposure.
2. Art Background
In device processing, an energy sensitive material, denominated a resist, is coated on a substrate such as a semiconductor wafer (e.g., a silicon wafer), a ferroelectric wafer, an insulating wafer, (e.g. a sapphire wafer), a chromium layer supported by a substrate, or a substrate having a combination of such materials. The resist is exposed by subjecting the resist to radiation in the desired image. This image is then developed to produce a patterned resist generally by immersing the resist in a suitable solvent or subjecting it to a plasma to remove selectively either the exposed or unexposed regions. The developed pattern is employed as a mask to process, e.g., etch, the underlying layer. The resist is then removed, for many devices subsequent layers are formed and the resist process is repeated to form overlying patterns in the device. In such repetition of the resist process, the pattern in the resist being processed is typically aligned (registered) relative to underlying patterns typically by using fiducial marks.
Various approaches have been proposed for the exposure of resist with charged particle beams, e.g., electron or ion beams, in the manufacture of submicron devices. (submicron devices in the context of this invention is a body having a pattern with either lines or spaces smaller than 1 .mu.m.) Electron beam exposure has been extensively used for the making of lithographic masks where the resist overlies a chromium layer that in turn overlies a quartz substrate. The image is produced by raster scanning an electron beam over the resist material in a single cycle and shuttering the beam at appropriate positions to produce the desired exposure image. This single cycle, raster process is capable of producing extremely fine features, but is generally too slow for making devices other than masks.
Alternative approaches have been proposed for exposing devices other than masks in suitable times. (Generally lithographic processing at least 30-60 wafers per hour is considered desirable where a wafer is a substrate typically from two to ten inches in diameter that is ultimately subdivided after fabrication into a plurality of devices.) These exposure approaches are generally divided into proximity and projection procedures. In the former, a mask defining the image by absorptive/reflective regions and transmissive regions for the exposing energy is placed in close proximity to the resist. An electron beam is scanned over the mask or light is flooded onto the mask to expose the underlying resist in regions corresponding to transmissive areas of the mask.
In a projection approach, a lens is interposed between the mask and the resist. The mask is either the absorptive/transmissive type previously described or, alternatively, of a type that scatters in one set of regions and transmits in a second to produce the desired image. The fluence traversing the mask is focused by the lens onto the resist to produce an image corresponding to the mask pattern.
In one specific approach to projection lithography (described in U.S. Pat. No. 5,079,112 dated Jan. 7, 1992, which is hereby incorporated by reference) a mask is employed which scatters and/or reflects electrons in a first set of regions and scatters to a lesser extent, e.g., transmits in a second set of regions. The electrons traversing the mask are caused to converge as shown in FIG. 1 at one or more convergence points by an electron optic projection lens, 5, and an area that transmits to a greater extent than other areas in the plane, e.g., an aperture, is positioned at such convergence point. Scattered electrons, 1b and 1c, do not converge at this point and are essentially blocked while unscattered electrons do converge at the aperture and emerge to expose the resist.
Typically, in an electron exposure proximity printing procedure the electron beam is scanned electronically, i.e., by use of magnetic and electric fields over the mask. In one study published in Proc. 8th Symp. on Electron and Ion Beam Science and Technology, 406-419 (1978), it is suggested that a very rapid line scan, i.e., faster than 0.2 ms, with repeated exposure of each portion of the resist to effect the desired dosage is useful to avoid localized heating, and thus localized expansion of the mask. In contrast, expansion of the entire substrate due to uniform heating is electronically compensated for during exposure. (See W. M. Moreau, Semiconductor Lithography, Plenum Press, New York, page 435 (1988).) Localized deformations produce errors (called overlay errors) in the placement, i.e., registration, of a resist pattern relative to an underlying pattern. Instead of scanning at a sufficiently slow rate to expose fully each region during one scan cycle, the rate of scanning is substantially increased and exposure is accomplished through a plurality of rapid scan cycles. Despite such precautions, higher acceleration potentials, although yielding enhanced resolution, nevertheless lead to rapidly increasing overlay errors.
For projection light lithography other schemes such as a step and scan procedure have been proposed. In this procedure, a portion of the mask is illuminated over a strip. The image of the entire mask is then projected on the resist by moving the mask and the wafer in opposite directions at a relative rate of speed that depends on the demagnification of the system. For example, if the system has a 4:1 demagnification (meaning a unit length of the mask is projected onto a corresponding one quarter unit length on the substrate) the mask is moved at a rate four times faster than the substrate.

Projection electron lithographic procedure


An anti-tamper shield for an integrated circuit (IC) includes a bond wire which passes through a protective layer such as an epoxy encapsulating layer of the IC. The bond wire carries a signal, such as a steady state current, which allows an active component of the IC, such as a secure processor, to function. The bond wire is carried within and/or proximate to the encapsulating layer such that a decapsulation of the IC will cause a rupture of the electrically conductive member, thereby rendering the processor non-functional. The bond wire may be coupled to the processor in a variety of configurations, including the use of internal or external bond pads, lead frame contacts, and/or directly to a computer board on which the IC is carried. A metallic shield layer may be located between the active component and a top portion of the encapsulating layer to prevent a pirate from using an electron microscope, for example, to survey the active component region.

The present invention relates to the protection of integrated circuits (ICs), and more particularly, to a scheme for preventing the reverse engineering of ICs. The invention is particularly useful in protecting secure ICs which are used in cable and satellite television decoders to prevent unauthorized users from receiving television broadcasts. The invention is equally useful in protecting secure ICs used in other applications, including terminals and smart cards for electronic funds transactions, premises access control, electronic games, and the like.
Due to the continuing popularity of the pay television market, there exists a tremendous financial motivation for unauthorized persons known as "pirates" to modify the access control of set-top boxes (e.g., decoders) to allow the reception of television programming without payment of the required subscription fees. The modified decoders are purchased by unscrupulous individuals through various markets and used to illegally receive and view the television signals.
To produce a modified decoder, a pirate must extract certain information from a genuine decoder which is usually known only to the authorized manufacturer. The decoder typically includes a secure (e.g., cryptographic) processor which contains information such as cryptographic keys which are used in descrambling a scrambled television signal or other programming service signal (e.g., audio or data). Since the secure processor performs access control functions, it is a focal point of the pirate's attention. Accordingly, the pirate will employ various techniques in an attempt to gain information from the secure processor.
One common attack technique is known as "probing." A secure processor includes an integrated circuit (IC) which is fabricated as a monolithic device with an ensemble of active and passive components, including transistors, resistors, capacitors, and diodes which are interconnected within a monolithic block of semiconductor material. During probing, ICs such as very large scale integrated (VLSI) circuits are subject to an invasive attack wherein the die (e.g., IC or "chip") is exposed by decapsulation. During decapsulation, the compound material which encapsulates or surrounds the die is systematically removed. Then, probes which measure current and other parameters are used to monitor the electronic signals in the active components of the chip. The term "tampering" as used herein is meant to encompass both probing and decapsulation.
A pirate may perform the following decapsulation steps to prepare a chip for probing. First, the chip is removed from the decoder board, with the die still inside the IC package. Generally, this is the case when a chip is mounted on a large board. The decoder board may be a computer board such as those used in a personal computer (PC). If the chip requires a direct current from a battery or the like to circumvent a self-destruct feature, then battery wires are soldered to a positive voltage pin (e.g., V.sub.batt) pin and to a negative voltage pin (e.g., V.sub.ss) on the outside of the chip prior to removal from the board. The chip is then removed from the board with the battery wires still attached. If the battery power is interrupted, the chip may self-destruct by erasing critical information stored in memory. The pirate can identify the appropriate battery pins by taking resistance measurements of the traces on the board which are connected to the battery, and then confirming by taking voltage readings of the traces with a main voltage (e.g., V.sub.cc) off.
Second, the location of the die within the encapsulating compound of the IC package can be determined by taking an x-ray of the IC package. Third, a mechanical grinder can be used to remove as much of the encapsulating compound as possible above the top surface of the die without damaging the die. Fourth, chemical etching or plasma etching is performed to remove the last portions of encapsulating compound which remain over the area of the die which is to be probed. Some chemical etchants work so well on the encapsulating compound that the grinding step can often be skipped.
In current chip designs, including those for application specific ICs (ASICs), a pirate will generally not encounter significant obstacles in performing the four steps above. Removal of the chip from the board with the battery wires still attached is usually considered to be the most delicate operation. Thus, the undamaged die, which is protected by an inert glassivation coating, can be exposed by a pirate as long as a short circuit or open circuit of the battery power is not created. Furthermore, damage to bond wires can also easily be avoided. Bond wires may connect bond pads of the chip to package pads in the protective encapsulating package, and are located on the periphery of the device, as will be discussed in greater detail below. The decapsulation process can avoid exposing the die in the area where critical bond pads are located, that is, where the battery power is input into the active component.
One approach to deterring probing is discussed in commonly-assigned U.S. Pat. No. 4,933,898, issued Jun. 12, 1990 to Gilberg et al., entitled "Secure Integrated Circuit Chip With Conductive Shield." Gilberg et al. disclose using one or more conductive layers to overlay a secure area of an IC. The conductive layers shield the secure area from inspection and carry a power signal to the IC. Removal of one of the layers by a pirate causes the loss of power to the components of the secure area. However, the implementation of this approach is somewhat complex.
Accordingly, it would be desirable to provide an apparatus which deters or otherwise hinders probing of an IC chip by a pirate. In particular, it would be desirable to provide a barrier to decapsulation which uses standard bond wires to render the IC non-functional when the bond wire is ruptured. The barrier should be compatible with existing chip designs and inexpensive to implement. The present invention provides a system having the above and other advantages.

Anti-tamper bond wire shield for an integrated circuit


A buried bit line DRAM cell includes an active region having a protruding tap, formed in a semiconductor substrate. A device isolation region is formed in the substrate, outside the active region. A bit line laterally contacts the tap and is buried in the device isolation region. Accordingly, photolithography steps for forming a device isolation film twice and for forming a bit line contact can be omitted, thereby obtaining process simplicity and wider process margins.

As the integration level of semiconductor memory devices, such as DRAM devices, increases, each cell generally is reduced in size. To provide for such reduction in cell size, various techniques have been used to increase cell capacitance by increasing the effective area of a cell capacitor. To increase the capacitor's effective area, stacked-capacitor and trench-capacitor structures, as well as combinations thereof, have been developed.
However, for these structures to be viable, a field effect transistor, a device isolation region, a bit line contact and a storage node contact must all be formed in a DRAM unit cell. Thus, design rules for minimizing area and ensuring adequate process margin are required. These structures may be very difficult to realize when cell area is very small, for example, 0.5 .mu.m.sup.2 or below. In a conventional DRAM structure, the bit line is formed on the surface of a substrate, resulting in lower photolithography process margin.
In an effort to circumvent these technological problems, a buried bit line (BBL) cell in which a bit line is buried in the isolation region of a stacked cell, has been suggested. See the publication "Buried Bit-Line Cell for 64Mb DRAMs" by Y. Kohyama et al., '91 Symposium on VLSI Technology, pp. 17-18. This structure includes a bit line which is buried in the device isolation region, and a lateral bit line contact which is formed to achieve maximum area efficiency within a small area.
The above BBL cell will be described by referring to the attached drawings FIGS. 1, 2 and 3A-3E. FIG. 1 is a plan view of mask patterns for fabricating a conventional BBL cell. Here, respective mask patterns are shown for defining a first field oxide film denoted by reference numeral 2, a bit line denoted by reference numeral 3, a bit line contact denoted by reference numeral 4, a gate electrode denoted by reference numeral 5, and a storage electrode denoted by reference numeral 6.
FIG. 2 is a vertical section view of FIG. 1 in the X-axis direction. Here, a first field oxide film 2 is formed to define a device isolation region on a semiconductor substrate, and the bit line 3 is buried under the surface of the substrate. The bit line contact 4 for making contact with the drain protrudes laterally from the bit line 3.
FIGS. 3A-3E are vertical section views of FIG. 1 in the Y-axis direction, showing the steps of fabricating the BBL cell structure of FIGS. 1 and 2.
Referring to FIG. 3A, the first field oxide film 2 (FIG. 2) is formed by a general device isolation method, such as a LOCOS method. Then, using a silicon nitride pattern 14 as a mask, trenches are formed in the semiconductor substrate 10, and a second field oxide film 12 is formed along the inner walls of the trenches.
Referring to FIG. 3B, a photoresist 16 is coated on the resultant structure including the second field oxide film 12. Thereafter, the photoresist 16 is patterned, thereby defining an area for forming a lateral bit-line contact therein.
Referring to FIG. 3C, the lateral bit-line contact for making contact between the bit line and the substrate is formed by etching the second field oxide film 12, using the photoresist pattern as an etch mask. A thin polysilicon layer 17 is formed by depositing polysilicon on the surface of the resultant structure, including the lateral bit-line contact. Arsenic ions are then implanted into the substrate 10, thereby forming a source/drain 18.
Referring to FIG. 3D, bit lines 20 are formed by depositing a bit line material such as polysilicon or a refractory metal silicide on the surface of the resultant structure and etching back the resultant structure. The polysilicon layer 17 (see FIG. 3) formed on the silicon nitride pattern 14 is removed.
Referring to FIG. 3E, a third field oxide film 22 is formed on the substrate 10 having the bit lines 20 formed therein, and the silicon nitride pattern 14 (see FIG. 3D) is removed. Thereafter, the gate electrode of the field effect transistor and a capacitor are formed by conventional methods.
According to the above BBL cell structure, step coverage is improved by burying the bit line in the device isolation region of the cell, thereby facilitating the formation of fine patterns. Consequently, the DRAM cell area can be reduced.
In the above-described conventional BBL cell structure, however, it may be necessary to perform a device isolation process twice: once for forming a trench device isolation region having a buried bit line, and once for forming a device isolation region through which the gate runs. Also, photolithography may need to be performed twice for forming the bit line and the bit-line contact, respectively. Accordingly, the manufacturing process may become complex.


Provided are a resistive memory device including a plurality of memory cells, and a method of operating the resistive memory device. The resistive memory device includes a sensing circuit connected to a first signal line, to which a memory cell is connected, the sensing circuit sensing data stored in the memory cell based on a first reference current; and a reference time generator for generating a reference time signal that determines a time point when a result of the sensing is to be output, based on the first reference current.

The inventive concept relates generally to memory devices, and more particularly, to resistive memory devices and methods of operating same.
Continuing demand for memory devices providing high data storage capacity and low power consumption drives research into next-generation, nonvolatile memory devices. It is desired that next-generation memory devices have the high memory cell integration density of dynamic random access memory (DRAM), the nonvolatile data storage capabilities of flash memory, and the high data access speed of static RAM (SRAM). Next-generation memory devices include, for example, the phase-change RAM (PRAM), Nano-floating-gate memory (NFGM), polymer RAM (PoRAM), magnetic RAM (MRAM), ferroelectric RAM (FeRAM), and resistive RAM (RRAM).

Resistive memory device and operating method


In a method and a device for controlling an internal combustion engine (1) an optimized power yield of the internal combustion engine is made possible. In this case the internal combustion engine (1) is operated, depending on a criterion, either in a normal mode in which the maximum torque produced of the internal combustion engine (1) is restricted to a normal limit value or is operated in a power mode in which the maximum torque produced is restricted to a power limit value which is greater than the normal limit value. At least one operating variable of the internal combustion engine (1) is detected which is representative of its combustion power and the operation of the internal combustion engine (1) in the power mode is undertaken depending this at least one operating variable.

Control methods or control devices of this type are preferably used in supercharged internal combustion engines. In such engines, if an increased torque is requested by the driver, the maximum permitted torque or power output of the internal combustion engine is increased for a short period. This type of operation of the internal combustion engine is also referred by the terms "overboost" or "overdrive" operation. Frequently this phase of the higher torque or power output is only available for a fixed predetermined period of time, which means that either the power potential of the internal combustion engine is only insufficiently exploited or, in the event of an fault, for example through "knocking", damage to the engine can result.

Method and device for controlling an internal combustion engine


The present invention relates to a semiconductor circuit; and, more particularly, to a duty cycle correction circuit (hereinafter referred to as “DCC”). Furthermore, the present invention relates to an open-loop digital DCC. The duty cycle correction circuit according to the present invention includes: a delayer for delaying an input clock signal and for generating a plurality of delayed clock; a phase comparator for comparing the input clock signal with the plurality of delayed clock signals; a multiplexer for selecting one out of the delayed clock signals in response to an output signal of the phase comparator and for inverting the selected delay clock signals; and a phase combiner for combining the clock signal from the multiplexer and the input clock signal. Accordingly, the digital DCC according to the present invention is of an open loop without any DLL, the duty correction can be made within five clock periods after power-up.

Generally, a clock signal has been used as a reference signal in a clock synchronization system and also has been used to guarantee high-speed operation of the system without an error. When a clock signal from an external circuit is used for system synchronization, a delay time (clock skew) is generated in an internal circuit. To compensate for this clock skew, a clock synchronizing circuits, such as a delay locked loop and a phase locked loop, have been used.
On the other hand, in a DDR SDRAM (Double Data Rate Synchronous DRAM) to perform data input and output operations at rising and falling edges of a high-speed clock signal, it is very important to maintain a duty ratio of 50% for the effective margin of input/output data. Accordingly, a duty cycle correction circuit has been used for generating a clock signal in the constant duty ratio of 50%, irrespective of the duty ratio of the external clock signal, and for compensating for a duty variation of an undesired clock signal.
The duty cycle correction circuit can be classified into an analogue DCC and a digital DCC or into a closed-loop DCC and an open-loop DCC. The analogue DCC is typically implemented by the closed-loop DCC.
FIG. 1 is a schematic diagram illustrating a conventional analogue closed-loop DCC. As shown in FIG. 1, the conventional analogue closed-loop DCC includes a DLL circuit 10 to synchronize a phase of an internal clock signal with that of an external clock signal, a DCC amplifier 12 to amplify an output signal from the DLL 10, and a DCC integrator 14 to receive and integrate DLL clock signals dll_clk from the DCC amplifier 12 and then to provide information about a duty ratio to the DCC amplifier 12.
This analogue closed-loop DCC has merits in that the precision is very high and it is not susceptible to PVT fluctuation; however, it has a shortage in that it takes a lot of time to obtain a desired clock signal of the duty ratio of 50%. Most analogue DCCs have the integrator which stores information in a capacitor (Se Jun Kim et al., "A Low jitter, Fast recoverable, Fully analog DLL using Tracking ADC For High Speed and Low Stand-by power DDR I/O interface", in Symposium on VLSI Circuits Digest of Technical Papers, 2003). However, in a power-down mode, the information can be lost by a leakage current in the capacitor and therefore lots of time is required to perform a normal operation at the time of restart.
Although the digital DCCs including a DLL can solve the above problem of the analogue DCC by using a digital code, most of the digital DCCs need lots of time until a normal operation is performed after power-up (Tatsuya Matano et al., 'A 1-Gb/s/pin 512-Mb DDRII SDRAM using a slew-rate-controlled output buffer' in Symposium on VLSI Circuits Digest of Technical Papers, 2002).

Open-loop digital duty cycle correction circuit without DLL


A method of forming a monolithic integrated PMUT and CMOS with a coplanar elastic, sealing, and passivation layer in a single step without bonding and the resulting device are provided. Embodiments include providing a CMOS wafer with a metal layer; forming a dielectric over the CMOS; forming a sacrificial structure in a portion of the dielectric; forming a bottom electrode; forming a piezoelectric layer over the CMOS; forming a top electrode over portions of the bottom electrode and piezoelectric layer; forming a via through the top electrode down to the bottom electrode and a second via down to the metal layer through the top electrode; forming a second metal layer over and along sidewalls of the first and second via; removing the sacrificial structure, an open cavity formed; and forming a dielectric layer over a portion of the CMOS, the open cavity sealed and an elastic layer and passivation formed.

A piezoelectric micromachined ultrasonic transducer (PMUT) may be used in nondestructive testing, medical imaging, fingerprint scanning, and the like. Fingerprint mobile applications need high frequency PMUT (HF PMUT). HF MPUT need precise control of phase signal loss. Current developments in this area have focused on wafer bonding, which introduces additional cost, bonding yield, and complex interconnect design factors into the fabrication process. Known monolithic HF PMUT plus integrated circuit (IC) devices have complex process flows for forming the required elastic, sealing, and passivation layers.
A need therefore exists for methodology for forming a monolithic integrated PMUT and CMOS using a relatively simpler and reduced-cost flow, and the resulting device.

Monolithic integration of piezoelectric micromachined ultrasonic transducers and CMOS and method for producing the same

VANGUARD INTERNATIONAL SEMICONDUCTOR SINGAPORE PTE. LTD.


A method and apparatus for multi-zone injection apparatus of multiple process gases onto a work piece during manufacture. The multi-zone injection apparatus uses a gas injection plate with multiple injection zones to deliver the multiple process gases into the chamber for deposition onto the work piece (for example, a silicon wafer). The gas showerhead separates the multiple process in a manner that avoids premixing the process gases, thereby minimizing gas-phase nucleation and particulate generation. The showerhead also allows real-time independent control over the gas flow rates in N channels to achieve deposition uniformity. Different gases can be configured in adjacent channels to provide M zones of multi-gas radial control.

Most semiconductor fabrication systems, particularly thermal and plasma chemical-vapor deposition (CVD) reactors, must provide good process uniformity (including temperature uniformity, reactant species uniformity, deposition uniformity, and mass transport uniformity) when performing substrate processing. Conventional CVD systems typically use single-zone showerheads (or rings) in order to inject the process gases/vapor into the process chamber for wafer processing.
In a conventional showerhead design, the injector plate has an array of holes operating to inject a single gas or a combination of process gases into a deposition chamber or process environment in an attempt to provide a uniform mass transport of reactant flux to the wafer or substrate. These conventional showerhead designs can be referred to as single-zone showerheads because these "single-zone" showerheads only control flow of process gases through the showerhead (i.e., within one zone equal to the showerhead itself), without any multi-zone spatial control over the gas flow distribution uniformity over the substrate.
Such conventional single-zone injectors experience problems meeting the process uniformity and cleanliness requirements for various deposition processes due to the problems associated with pre-mixing and gaseous phase reaction of the process gases and also due to lack of multi-zone control over the mass-transport uniformity profile. Typically CVD systems use multiple process gases to deposit a film onto a work piece. The multiple gases may consist of a combination of a precursor gas or vaporized liquid and a carrier gas or multireactant gases. In conventional single-zone showerhead designs, the multiple gases are premixed within the showerhead assembly or prior to delivery to the showerhead assembly before injection into the process chamber. The process of premixing multiple gases can result in gas-phase nucleation which can, in turn, result in generation of particulates and process contamination causing manufacturing yield degradation. Particulate generation represents a serious problem because CVD applications require a clean environment.
These prior art designs are also limited because the single-zone designs do not provide a capability for spatial control of the reactant species concentration (mass transport uniformity) profile. The non-uniformity in the reactant species concentration over the wafer will result in non-uniform film thickness and/or quality.
Another limitation in conventional showerhead designs is the lack of the ability to clean the showerhead surface in-situ, without opening up the chamber.

Multi-zone gas injection apparatus and method for microelectronics manufacturing equipment


An adjustable locking arrangement for a brassiere having two brassiere cups comprise two elongated straps, each of which has a free sliding end portion and an affixing end portion, a locking fastener, comprising a fastening body having two side opening and a center window, and two locker members slidably mounted on the fastening body at the center window, wherein the elongated straps are overlappedly tucked to form two locking loops to slidably engage with the fastening body through the side openings respectively for wrapping up two locker members. Therefore, once the two sliding end portions of the elongated straps are pulled opposedly, the two locker members are capable of defining a distance between the two brassiere cups, and when the affixing end portions of the elongated straps are pulled opposedly, two locker members are capable of locking up the distance.

1. Field of Invention
The present invention relates to a fastener, and more particularly to an adjustable fastener for garment such as brassiere and dress accessories.
2. Description of Related Arts
Nowadays, underwear such as brassiere is generally constructed to have two brassiere cups and a front fastener provided between the two brassiere cups such that the wearer is able to easily wear the brassier via the front fastener for enhancing the comfort of the brassiere. However, such front fastener cannot adjust a distance between the two brassiere cups to fit the brassiere on the wearer's body. Even though the brassiere contains an adjustable clip to adjust the loop size of the brassiere, such adjustable clip is inconvenient and cannot adjust the distance between the two brassiere cups. In addition, it is so complicated for the wearer to adjust the loop size of the brassiere via the adjustable clip to fit the brassiere cups on the wearer's body. With the marketing grows rapidly, it is a need of the brassiere with a buckle which can be easy to operate, reliable and a size-adjustable feature. The inventor of the present invention provides a "self-lock buckle with antiskid feature" in China Patent No. 0320118861.1 to adjust the size of the underwear. It is an improvement to solve the technical drawback and to enhance the operation of the fastener for the underwear.

Adjustable fastening arrangement for garment


A material deposition device places droplets on a substrate. A conveyer on a chassis moves the substrate relative to a plane so a deposition means on the chassis may release material onto the substrate moved by the conveyer. A movable support means attached between the chassis and the deposition means locates it with respect to the conveyer allowing relative motion therebetween. A supply of material connected to the deposition means sends pressurized material thereto. A control causes relative motion between the conveyer and the movable support means varying the position of the deposition means relative to the substrate. The control has a memory operatively connected to timely activate the deposition means. The deposition means has a body communicating with the supply of material and a valve means responsive to the control selectively delivers droplets to the substrate. The body has an inlet communicating with the supply for the valve means and an outlet shaped forms droplets for delivery toward the substrate. An electrostatic means establishes a fixed or varying force field to reposition or recycle the material delivered. An interchangeable outlet orifice adjusts the size of droplets delivered. A vision system examines droplets monitoring quality and a feedback signal to vary the material in each droplet. The radiation station doses droplets.

Described herein are a device which constitutes the equipment, the method of usage for that equipment and the products produced by the device and method. The disclosure herein will not be found in the literature or has not previously been practiced in the field. The literature is of interest for its teachings of the knowledge of skilled artisans at the time of this invention and of the products produced thereby. The claimed invention is a movable support for carrying the material deposition means, a control for moving and activating the deposition means and substrate movable relative to the deposition means and for receiving the material.
Test cells have been manufactured and sold for many home and doctor diagnostic purposes and particularly, pregnancy, strep, AIDS, rubella, influenza and similar conditions. Early detection of the existance of such a condition is of great importance and a simple diagnotic test cell or immunoassay is required. Typically such cells or immunoassay are multi layer structures having several carefully constructed component levels. Each level or layer may have one or more materials such as, bioreagents, target analytes, fluorescent dyes or other responsive ingredients applied to a substrate of a substrate. The arrangement of the layers facilitates a specific biological, optochemical or chemical reaction.
Traditional laboratory testing of specimens requires time and precise handling of the relatively small test specimen. The dangers of time delay to the reagents, loss and improper handling procedures represented serious concerns resulting in increased cost and inaccurate results. In addition, concern for liability, injury and malpractice claims necessitate a more accurate, reliable and convenient technology.
Diagnostic tests that could be performed immediately on almost minute specimens eliminate many of the difficulties and inaccuracies of remote laboratory testing. Diagnostic test assays, cells or strips have to be precisely prepared and made at a relatively low cost to enable wide and successful usage. Confidence in the ability to correctly test with a simple product requires that the test analytes, bioreagent dyes and reactive materials be applied with great precision. Application amount and location are important factors which permit expensive ingredients to be used without concern for waste or the reliability and repeatability of the test product manufactured.
Test cells often rely on color change or the appearance of a specific pattern to indicate a positive or negative result. Whether color or pattern is the indicator, the reaction sought must be dependant primarily on the specimen to be identified. Ambient conditions at the time of manufacture are controlled by the maker of the test cell and are regulated by the Food and Drug Administration. Protective packaging maintains the as manufactured condition of the test assay, cell or indicator.
U.S. Pat. No. 4,912,034 has an apparatus for use in an immunoassay to detect a target analyte in a liquid sample including a porous reactive filter with upper and lower surfaces bound with an antibody specific for a target antigen. Methods of binding include competition for labeled analyte, reaction of a second binding pair member labeled with the bound analyte or detection of an intrinsic measurable analyte property. Although such tests are easy to use and accurate no equipment to accurately and precisely place the reactive material on the filter is disclosed.
U.S. Pat. No. 4,916,056 has a solid phase binding assay to find the amount of analyte in a sample, particularly antigens, antibodies or other ligand or DNA segments. Herein the analyte binding areas capable of simultaneously being contacted by the sample and bioreagent provide readable results. While accurate placement of the bioreagent and/or analyte is important to repeatability, no disclosure of any mechanism to carefully deposit either appears in this patent.
European Patent Application 0 066 648 is a multi layer element analysis for the concentration of specific components using competitive immune reaction including a detection layer and a reaction layer which require careful preparation to be sensitive and reproducible. Test for biochemical changes due to application of substances from the living body detect changes as a result of the amount or concentration of the substance to be found. Even though such a dry test is easier to use than the mixing of liquids, no means for automatically and accurately producing that test in high numbers exists.
Other test apparatus are disclosed in European patent applications 0 217 403 and 0 236 768.


A method of manufacturing a circuit board assembly for a controller. The method includes providing first and second printed circuit boards wherein the first printed circuit board has a plurality of copper pads containing slots therein that correspond to a plurality of power tabs in the second printed circuit board. The power tabs are then slid into the slots and the tabs are flooded with copper. At this time the power tabs are soldered within the slots to provide an electrical connection between the first and second printed circuit boards that allows for the transfer of current between the boards of more than three amps.

This invention relates to a circuit board assembly for controllers. More specifically, this invention relates to a method of manufacturing a circuit board assembly using a mortise and tenon type connection.
The need to transfer high currents (larger than 3 amps) into and out of machine controllers has been constantly on the rise. More importantly, there is a need in many applications for power management as opposed to machine control for which general products are primarily designed. Applications include skid steer loaders, tractor-loader-backhoes, garbage trucks and directional drills. The types of devices to control include high intensity lights, warning beacons, fuel solenoids, wiper motors and seat heaters. These types of elements exist on most applications and by adding these elements to a vehicle control system causes additional automation, timing features and reduces the need for fusing.
For a controller to manage these high power requirements the current must be brought into the circuit board. Often the main circuitry resides on a PCB (printed circuit board) that is perpendicular to the connector board because of enclosure design. To connect the main board with the connector board, a right angle connector is usually used. However, most right angle connectors are not capable of carrying large amounts of current without sacrificing board space.
Another condition present in circuit boards is to minimize the amount of heat that is generated when transferring current. One solution could be a custom made copper tab that provides a connection between a main board and a connector board. However, this solution would appear extremely costly. Thus, there is a need in the art for a cost effective method of manufacturing circuit board assemblies that minimizes the amount of heat presented as a result of a large amount of current being passed between the main board and the connector board.
Thus, a principle object of the present invention is to provide a circuit board assembly that transfers current of larger than 3 amps between two printed circuit boards.
Yet another object of the present invention is to provide a cost effective method of manufacturing a circuit board assembly.
Another object of the present invention is to provide a circuit board assembly that produces a minimum amount of heat during the transmission of current from a main board to a connector board.
These and other objects, features or advantages of the present invention will become apparent from the specification and claims.

Method of manufacturing a circuit board assembly for a controller


A method for temperature compensation of transmit power of a wireless communication device begins by measuring transmit power of the wireless communication device at a first temperature-based biasing condition to produce a first measured transmit power. The method continues by measuring transmit power of the wireless communication device at a second temperature-based biasing condition to produce a second measured transmit power. The method continues by determining ambient temperature of at least a portion of the wireless communication device based on the first and second measured transmit powers and a relationship between the first and second temperature-based biasing conditions. The method continues by compensating transmit power level of the wireless communication device based on the ambient temperature.

1. Technical Field of the Invention
This invention relates generally to wireless communication systems and more particularly to adjusting transmit power of a wireless communication device in such wireless communication systems.
2. Description of Related Art
Communication systems are known to support wireless and wire lined communications between wireless and/or wire lined communication devices. Such communication systems range from national and/or international cellular telephone systems to the Internet to point-to-point in-home wireless networks. Each type of communication system is constructed, and hence operates, in accordance with one or more communication standards. For instance, wireless communication systems may operate in accordance with one or more standards including, but not limited to, IEEE 802.11, Bluetooth, advanced mobile phone services (AMPS), digital AMPS, global system for mobile communications (GSM), code division multiple access (CDMA), local multi-point distribution systems (LMDS), multi-channel-multi-point distribution systems (MMDS), and/or variations thereof.
Depending on the type of wireless communication system, a wireless communication device, such as a cellular telephone, two-way radio, personal digital assistant (PDA), personal computer (PC), laptop computer, home entertainment equipment, et cetera communicates directly or indirectly with other wireless communication devices. For direct communications (also known as point-to-point communications), the participating wireless communication devices tune their receivers and transmitters to the same channel or channels (e.g., one of the plurality of radio frequency (RF) carriers of the wireless communication system) and communicate over that channel(s). For indirect wireless communications, each wireless communication device communicates directly with an associated base station (e.g., for cellular services) and/or an associated access point (e.g., for an in-home or in-building wireless network) via an assigned channel. To complete a communication connection between the wireless communication devices, the associated base stations and/or associated access points communicate with each other directly, via a system controller, via the public switch telephone network, via the Internet, and/or via some other wide area network.
For each wireless communication device to participate in wireless communications, it includes a built-in radio transceiver (i.e., receiver and transmitter) or is coupled to an associated radio transceiver (e.g., a station for in-home and/or in-building wireless communication networks, RF modem, etc.). As is known, the receiver is coupled to the antenna and includes a low noise amplifier, one or more intermediate frequency stages, a filtering stage, and a data recovery stage. The low noise amplifier receives inbound RF signals via the antenna and amplifies then. The one or more intermediate frequency stages mix the amplified RF signals with one or more local oscillations to convert the amplified RF signal into baseband signals or intermediate frequency (IF) signals. The filtering stage filters the baseband signals or the IF signals to attenuate unwanted out of band signals to produce filtered signals. The data recovery stage recovers raw data from the filtered signals in accordance with the particular wireless communication standard.
As is also known, the transmitter includes a data modulation stage, one or more intermediate frequency stages, and a power amplifier. The data modulation stage converts raw data into baseband signals in accordance with a particular wireless communication standard. The one or more intermediate frequency stages mix the baseband signals with one or more local oscillations to produce RF signals. The power amplifier amplifies the RF signals prior to transmission via an antenna.
An important aspect of the transmitter is to provide a constant transmit power such that link budget (i.e., an understanding of the capabilities (e.g., bandwidth, data rates, error rates, etc.) of the transmit and receive wireless paths) is controlled. By controlling the link budget, the overall system performance can be managed in a more predictable manner. While it is desirable to provide a constant transmit power, it varies over temperature, supply voltage, and power requirements.
One solution to better maintain a constant output power is to measure the output power using a transducer or a computation of the output power based on current levels. From the measured output power, the gain and/or drive capabilities of the power amplifier are adjusted. While this improves constant output power, in more stringent wireless communication standard requirements, it does not provide a sufficiently constant output power and its rate of adjustment is too slow.
Therefore, a need exists for a fast responding technique for maintaining constant transmit power of a wireless communication device.

Temperature compensation of transmit power of a wireless communication device


A method for measuring illuminance of a lamp utilizes at least one illuminance meter and a rotary apparatus. The lamp is installed on the rotary apparatus. The lamp emits light and projects onto an irradiation area. A measurement area is defined from within the irradiation area. The measurement area is evenly divided into n sub-measurement areas, wherein n is a natural number. The n sub-measurement areas are centrosymmetric. At least one illuminance meter measuring illuminance of the lamp is disposed on one of the n sub-measurement areas. The rotary apparatus drives the lamp to rotate 360/n° in turn. The single illuminance meter measures illuminance of the lamp in other (n−1) sub-measurement areas.

1. Field of the Invention
The disclosure relates to methods for measuring illuminance and, more particularly, to a method for measuring illuminance of a lamp.
2. Description of Related Art
Traditionally, illuminance of a lamp is measured by placing the lamp in a predetermined position, from which the lamp irradiates an irradiation area. The irradiation area is divided into a plurality of measurement areas. Each measurement area has at least one illuminance meter at the same time. Such methods require simultaneous deployment of many illuminance meters.
Therefore, a convenient method of measuring illuminance of a lamp is desirable in order to overcome the described limitations.

Method for measuring illuminance of lamp