Configuration requirements that specify the provision of services using a system-level description are automatically generated from user requirements. The user requirements are decomposed into one or more levels of decomposed functionalities using an ontology as input. The ontology stores known decompositions of functionalities and relations between the known decompositions. The lowest level of the decomposed functionalities is mapped into a set of components provided by vendors, and additional components on which the set of components depend are identified. Based on the set of components and the additional components, a required number of instances of service workload is calculated to generate the configuration requirements of the system that satisfy the user requirements.

In order to provide highly available services that incur minimal to no outage, several leading telecommunications and computing companies have formed the Service Availability Forum (SA Forum). The SA Forum has defined standard middleware services including the Availability Management Framework (AMF) (see, Service Availability Forum. Application Interface Specification, Availability Management Framework, SAI-AIS-AMF-B.04.01) to enable the development of highly available systems and applications. This middleware service manages the components composing an application by shifting, for instance, the workload from a faulty component to its redundant components. The software/hardware components, their types, their relations, and the services that the application is composed of are given in a configuration file, referred to as the AMF configuration.
The AMF concept may also be used to manage availability for a system that is not highly available, or a system that is highly available with respect to only a portion of its services. For example, in a banking service system the bill viewing service may be available at 99% (which is not highly available), but the transfer service is available at 99.999% (which is highly available). A user may specify these availability requirements as part of user requirements among other user requirements for service provision. The user requirements are used to derive configuration requirements for generating the AMF configuration. Due to the complexity of the AMF domain, it is generally not recommended to create an AMF configuration manually.

Ontology-based user requirement decomposition for component selection for service provision


A method, system and program product that implements area minimization of a circuit design while respecting the explicit and implicit design constraints, in the form of ground rules and user intent. A longest path algorithm is used to generate a scaling factor. The scaling factor is used to reduce the size of the circuit design to the minimum legal size. The scaling may be followed by application of minpert analysis to correct any errors introduced by the scaling. The resulting design is shrunk (or expanded) with all elements shrinking (or growing) together by the same factor, and with the relative relationships of elements maintained. In addition, the invention is operational in the presence of a positive cycle, can be run with scaling that freezes the sizes of any structure or ground rule, and can be applied to technology migration.

1. Technical Field
The present invention relates generally to circuit design, and more particularly, to a method, system and program product for scaling and area minimization of a circuit design.
2. Related Art
Circuit compaction is an integral part of integrated circuit (IC) chip design methodology for design optimization or migration. In conventional circuit compaction, a circuit design is reduced to its minimum legal size by building a constraint graph that represents the shape edges as nodes, and ground rules and topological relationships as arcs. Each node value represents the edge's current position, and each arc value represents the minimum separation between the edges connected by the arc. In order to illustrate, FIG. 1 shows an illustrative circuit design 8 constraint graph. In a typical circuit compactor, reduction of circuit design 8 is completed by assigning a graph node 10a–d to represent a location of every shape edge 12 that is perpendicular to the direction of compaction (CD), and one graph node 10e–f each to a "source" 14 and a "sink" 16, which are the boundaries of the design. In the example shown in FIG. 1, two rectangles 18 are positioned side-by-side. Accordingly, if compaction occurs in an "X" direction, a graph node 10a–f would represent every vertical edge 12 of each rectangle 18. Each graph node 10a–f has a value (its X position).
In FIG. 1, the locations to be assigned are X1, X2, X3, X4 and sink 16. Source 14 is fixed at the origin. In addition, each graph node 10a–f has an arc 20a–f that connects it to its neighbors, which represent constraints (ground rule values) on the locations X1–X4 and sink 16. For example, arc 20a and 20e may be half the minimum spacing for wires on metal layer one (M1) and may be, for example, 0.1 microns (these arcs thus represent a boundary condition); arc 20c may be the minimum M1 spacing, e.g., 0.2 microns; and arcs 20b and 20d may be the minimum width for an M1 wire, e.g., 0.2 microns. Arc 20f will be ignored for now.
In order to compact the design to a minimum size, a graph longest path algorithm is used to find the minimum distance from the boundary to each node, subject to the restrictions represented by the arcs. That is, classical compaction will assign the locations X1, X2, X3, X4 and sink 16 using the "longest path" algorithm. The longest path algorithm will assign, for example:
X1Source + 20a  0 + 0.10.1X2X1 + 20b0.1 + 0.20.3X3X2 + 20c0.3 + 0.20.5X4X3 + 20d0.5 + 0.20.7SinkX4 + 20e0.7 + 0.10.8
This configuration compacts rectangles 18 to their minimum legal size in the direction of compaction (CD).
One problem with conventional longest-path based compaction is that it is incapable of meeting all of the constraints which users place on the design. A completed circuit design is subject to constraints in the form of ground rules, which are well understood by conventional compaction. However, there are a number of other constraints that the designer has in mind while laying out the circuit. These constraints may relate to issues such as performance or yield objectives. Many of these constraints may not be able to be described geometrically, making them difficult to describe to a conventional compaction tool. For constraints that can be described, entering all of the user constraints into a compaction tool can be a task that is nearly as difficult as re-implementing the circuit from scratch.
Conventional longest path compaction algorithms cannot compact a design that contains a "positive cycle." A positive cycle typically results if there are illegal shape configurations (ground rule incorrect starting point), or if there are constraints that restrict the area of the layout to less than the required size. If there is a positive cycle, then there is no longest path. Removing the positive cycle in a typical compactor does not correct the illegality that brought about the cycle, e.g., a broken ground rule or unachievable constraint. Relative to FIG. 1, a positive cycle can be illustrated by assuming a boundary constraint that fixes arc 20f at 0.6. In this case, every time a conventional compactor traverses the path 20a, 20b, 20c, 20d, 20e, 20f, the total cost increases by 0.2 (i.e., 0.1+0.2+0.2+0.2+0.1−0.6). In a shortest path algorithm, the equivalent problem is referred to as a "negative cycle." In any case, the positive cycle represents a conflict in the constraints (arcs 20a–20f), not all of which can be met.
Another problem with classical compaction approaches is created by how the techniques create the maximum changes possible to the design. In particular, conventional compaction algorithms conduct "plowing" or squeezing of every shape as far as possible in the compaction direction, which can destroy symmetry or alignment that was present in the original design. For example, FIGS. 2A–2B illustrate two rows of elements in which the top row contains six (6) elements 30a–30f, and the bottom row contains only three (3) elements 32a–32c. In addition, every other top row element 30a, 30c, 30e is connected to one of the bottom row elements 30a, 30b, 30c, respectively. FIG. 2A illustrates an un-compacted layout, FIG. 2B illustrates a compacted layout using conventional compaction techniques including a "jog insertion" implementation such that wires can be bent as required. As illustrated in FIG. 2B, the layout is compacted in a legal manner, but the relative positions of elements 30a–30f and 32a–32c do not encompass the designer's original intent. This plowing of the layout prevents many designers from using a compactor because of the unpredictable and inelegant outcomes to the layout, which in turn prevents widespread use of compaction technology.
Minimum perturbation analysis (hereinafter referred to as "minpert") is used to implement ground rule adjustments in circuit designs in a way that makes the minimum number of changes necessary. In particular, when a design has a minpert analysis applied, any of the arcs 20a–20f (FIG. 1) that are legal, are frozen. Any arcs 20a–20f that are not legal are fed to a linear system solver, which attempts to fix every arc that does not have a currently legal value, and minimize the overall differences in positions, i.e., X2−X1>=0.2. If X2−X1 is currently 0.1, then the system will try to change X2−X1, while minimizing X2(new)−X2 (old), and minimizing X1(new)−X1(old). U.S. Pat. No. 6,189,132 to Heng et al., which is hereby incorporated by reference, discloses a design rule correction system and method that implements minpert analysis. Unfortunately, minpert analysis does not address area minimization.
Rudimentary scaling has been used to perform compaction, but has led to unacceptable results for widespread use.
In view of the foregoing, there is a need in the art for an improved compaction method, system and program product for compacting a circuit design.

International Business Machines Corporation


A sample cell corresponding to a sample is computed to include pixels of an image according to sample cell criteria and shape. The sample cell shape and criteria define pixels to include in the sample cell. A target pixel cell corresponding to a target pixel includes pixels of the image according to a target pixel cell criteria defining which pixels are included in the target pixel cell. A sample filter coefficient is computed from pixels in the sample and target pixel cells. A filter tap corresponding to the target pixel is defined based on the sample filter coefficient. A tap extension corresponding to the target pixel is generated. The tap extension defines additional pixels of the image to be included in an extended target pixel cell according to a tap extension criteria. The extended target pixel cell includes pixel in the target pixel cell and the additional pixels. A tap extension filter coefficient based on pixels located in the extended target pixel cell and the sample cell is computed. Sample cell shape is varied according to sample cell shape parameters. An optimal filter weight for the target pixel is extracted from the sample filter and tap extension filter coefficients.

Evaluation of image and video processing takes place in three ways: computational complexity, storage requirements of the processed data, and visual quality of the reconstituted image or video data. Image and video processing generally utilizes some form of sub-sampling. Sub-sampling is the process of selecting, for example, certain pixels from an image which are good predictors of the pixels surrounding the sample in the original. Storage or transmission occurs only for the selected sub-samples, rather than the entire image, thereby reducing the size. Quality of the reconstituted image depends upon the effectiveness of the sub-samples as predictors of the pixels in the image. Irregular sub-sampling selects samples in the image so to improve the prediction power, which will generally lead to an irregular sampling pattern (e.g., more samples positioned near object edges and high texture regions, and less samples in uniform low texture background regions) rather than a regular sampling pattern.
Improving predictive strength requires finding better sub-samples or using more sub-samples. Using more sub-samples reduces the storage savings, while finding better sub-samples requires greater computational complexity. Prior art techniques used for image and video processing are primarily block based techniques with simple filters. However, these techniques do not fully exploit the coupled nature of pixel based selection of sample position, sample level variation, and adaptive filtering.

Adaptive area of influence filter for irregular spatial sub-sampled images


An evaporator (102) provides a compact design in which thermal energy can be removed from a DUT (108) in an efficient manner. The evaporator (102) can include a cover (306) which includes both input and output apertures for providing refrigerant into and out of the evaporator (102). An orifice plate (304) is located between the cover (306) and a heat exchanger (302). The heat exchanger (302) includes a plurality of pillars which help increase the surface area of the heat exchanger (302). The orifice plate (304) includes an aperture (310) which forms a nozzle which sprays refrigerant onto the heat exchanger in order to remove the heat away from the heat exchanger (302).

Modern electronic devices such as high-speed microprocessors, power amplifiers and laser diodes generate large amounts of thermal energy in the form of heat when in operation. Designing a test system to test a large volume of electronic devices that dissipate a large amount of heat in a timely fashion is not an easy task since the heat generated by the electronic device-under-test (DUT) has to be removed or minimized in a timely fashion in order to properly test the DUT, while at the same time minimizing the size of the test/cooling system in order to conserve floor space.


A color management system using distributed profiles includes a color printer adapted to print controlled color using a custom profile. The color printer system creates a custom profile by reading its initial characterization data, the profiles of the inks and the profile of the paper used in the printer. The color printing system includes a spectral measurement module adapted to generate spectral measurement of an output of the color printer. The printing system computes its initial characterization data by using the output of the color printer, measured by the spectral measurement module. The printing system updates the paper profile, the ink profile and/or the printer characterization data based on the measurement of the spectral measurement module.

This present invention relates generally to a color printing system, and more specifically to a system that allows for automatically managing of colors in a printing system with the ability to choose the amount of user intervention in the process.
When printing with a color printing system, variations in color images produced by the system are very common. Such variations can occur, for example, when printing the same image at different times, when printing with different inks or when printing on different papers. To overcome these difficulties, color management techniques offer the possibility to print a target containing several hundreds patches, to measure these patches with a dedicated instrument, in order to characterize the printer system. The printing system includes a printer, an ink set and a specific paper. If one of the printer, ink of paper changes, the characterization has to be repeated. This characterization process is time consuming and generates costs in material as well as in resource allocation. Time consumption, or more generally resource allocation, is currently one of the most critical aspects for color management in printing facilities.
Color management is based on the use of International Color Consortium (ICC) profiles, which relate the color outputted by a device to the color expressed in a device independent space. This device independent space can be either CIELAB or XYZ color space. This workflow is summarized in FIG. 0.
The data is acquired by an input device 1000, whose ICC profile 1010 is known. The ICC profile is used by a color management module 1111 (CMM) to convert the input data 1100 into the CIELAB (or XYZ) color space, resulting in the device independent data 1101. To print this data, the CMM 1111 uses the ICC profile 1011 of the output device 1001, and transforms the device independent data 1101 into an output device specific data 1102. The output device specific data 1102 is sent to the output device 1001, resulting in a print 1002 with the desired colors.
In order to successfully apply color management one needs an input ICC profile, an output ICC profile associated with output device as well as a CMM.

Color management system using distributed profiles for color printing systems


A controller area network (CAN) node comprises an internal high differential bus line (CANH) and an internal low differential bus line (CANL). The CAN node further comprises a receiver (RXD) comparator coupled to both the internal CANH and the internal CANL that outputs an internal RXD signal. The CAN node further comprises an RXD dominant time out (DTO) circuit. The RXD DTO circuit includes: a) an RXD dominant transition detector coupled to an output of the RXD comparator; b) a timer triggered by the RXD dominant transition detector detecting a dominant RXD transition; c) an RXD dominant timer comparator that is coupled to an output of the timer which compares an output of the timer to a selected value; d) an internal RXD dominant signal is changed to an RXD DTO recessive signal after a selected time interval has lapsed and can include a fault output to signal this fault condition.

Turning to FIG. 1, a CAN includes a differential bus having a CAN high differential bus line (CANH) and a CAN low differential bus line (CANL). These bus lines have two states: a "recessive" state, and a "dominant" state, which is determined by a voltage differential between the CANH and CANL. The CANH and the CANL are driven by a transmission driver circuit.
A "recessive" state is defined as a "logic high" and the voltage differential between CANH and CANL is equal to or less than 0.5 volts. The median voltage of CANH and CANL may be "weakly" biased to Vcc/2. A "dominant" state is a "logic low", the voltage differential between CANH and CANL is greater than or equal to 0.9 volts.
In CAN arbitration, a plurality of CAN nodes can contend for a shared differential bus simultaneously. In CAN networks, a dominant value from a first CAN node (i.e. a value of "logic low" or "zero" as represented by a voltage differential greater than 0.9 volts) overwrites a recessive value from a second CAN node (i.e. a value of zero as represented by a voltage differential greater than 0.9 volts). The CAN network will therefore convey the dominant value across CAN network through its differential bus lines. For an additional discussion of CANs, please see International Standards Organization (ISO) standard ISO-11898.
Principles of CAN operation are further illustrated in FIG. 2. In FIG. 2, a first CAN node having a driver output 205, a second CAN node having a driver output 210, and a third CAN node having a driver output 215, are all transmitting simultaneously when contending for dominant arbitration. As is illustrated, a second CAN node driver output 210 wins the arbitration as it has the highest priority address, i.e., the most number of dominant bits (zeroes) in a row. A CAN bus signal 220, can then be illustrated as the voltage differential when measured across the CAN voltage differential bus, as any CAN node driving dominant overwrites a recessive on its shared CAN bus. In other words, the CAN bus physical design combines signals equivalent to a logical AND.
A receiver dominant (RXD) signal 225 of the various CAN nodes illustrates an ANDed signal as a result of signals that would be generated by each CAN node of FIG. 2. Generally, an RXD signal is derived by each CAN node from the CAN bus differential voltage for each node. Generally, an RXD dominant signal indicates whether a CAN node is measuring a dominant state across its CANH and CANL. The CAN node then compares the received state to the TXD (driven) state to determine arbitration across its CANH and CANL. This signal is received by all CAN nodes on the bus. Taking two times the total loop time into account the first CAN node to the last CAN node will indicate that a dominant bus signal has been driven by any CAN node in the network and measured by all CAN nodes in the network.
FIG. 3A illustrates a high-level illustration of an RXD receiver 300. Each prior art CAN node on a CAN network may include the RXD receiver 300. As illustrated, a differential comparator 310 compares a voltage differential between a CANH and a CANL. If the voltage differential is at or below a first value, such as 0.5 volts, a recessive RXD value is generated (a logical "high"; if the voltage differential is equal to or above a second value, such as 0.9 volts, a dominant RXD value is generated (a logical "low"). The thresholds are set internally to differential comparator 310. The Vcc/2 320 sets the common mode voltage of differential comparator 310.
FIG. 3B is a high-level illustration of a transmission dominant driver (TXD) 350. A TXD amplifier 360 receives a TXD signal and will therefore either turn on or off a first field effect transistor (FET) 363 and a second FET 366, thereby generating either: a) a dominant voltage differential between CANH and CANL (e.g., greater than or equal to 0.9 volts) or b) a recessive voltage differential between CANH and CANL (e.g., lesser than or equal to 0.5 volts.) An RXD signal is conveyed over an RXD pin which will follow TXD pin during data transmission. TXD is typically an output from the CAN controller to the driver.
However, there are certain problems associated with CANs. CAN bus topology does not always work in all environments, due to various physical constraints and the network can be blocked by "stuck dominant" faults. The physical constraints do not typically create the dominant faults, but the physical constraints make the network blocked when a fault occurs. These problems can include limited flexibility in topologies due to various transmission line principles of bus topology. Indeed, bus topology does not always suit the physical requirements for the network. For example, an airplane can have a central CAN node in the cockpit, with equal distance for CAN nodes to each wing but a different distance to the tail. This can create significant problems with reflections, etc. in CAN topologies. Moreover, there may be limited wiring available for a given physical infrastructure. Furthermore, it can be problematic to build a redundant physical topology, especially a ring network.
Indeed, "bus stuck dominant faults" (i.e., when a bus line of the CAN network stays stuck in "dominant") can block an entire CAN system, since "dominant" overwrites "recessive" in CAN differential busses. Therefore, it can be, at best, problematic to have alternative or redundant topologies with robustness to branches of the network with a bus stuck dominant fault. Moreover, different branches of a CAN network can have different resistances, which can be problematic for noise and bus stuck dominant faults.
Indeed, U.S. Pat. No. 5,734,658 to Rall et al is generally directed towards using non-standard termination resistances at a center of a star and on each ray or stub line of a CAN network to allow for non-standard CAN bus line resistances. However, this topology is known to have severe issues with signal integrity due to the non-standard scheme and multi-stub topology.
Therefore, there is a need in the art to address at least some of the issues associated with CAN networks.

Apparatus and system for an active star/stub/ring controller area network physical layer transceiver


The present invention is directed towards an animal trap kit and method for luring animals to trap. The kit preferably includes a any well known animal trap in combination with a microencapsulated bait that can be applied during manufacturing of new traps or existing traps alike. The microencapsulated scent may be applied to the trap via brush, spray or adhesive backed tape. The bait can be activated by merely scratching the scented portion of the trap. Alternatively the microcapsules may be constructed and arranged for timed release of the scents, flavors or phermones contained in the bait.

Throughout the centuries, rodents such as rats and mice have thrived among human civilizations. Rodents have been responsible for damage to property and the spread of infectious disease to humans and animals alike. In response, traps have been used by land owners and the pest extermination industry to exterminate rodents for more than one hundred years. Conventional means of rodent extermination include: snap traps, electronic traps, glue traps, VICTOR™ "Live Catch" traps, ultrasonic traps, magnetic traps, chemical repellents and poisons.
Snap traps include conventional mousetraps or "Quick Set" traps by VICTOR™. A traditional snap trap comprises a base with retaining means comprising a locking bar, wire bail and bait petal. The bail is retained in a set position by a locking bar that is released when the bait petal is triggered. The advantage of these snap traps are that they are inexpensive to manufacture, effective at killing rodents, and can be used in any environment. However, in the past they have been baited with perishable bait to attract the rodents. Moreover, the bait used must be sticky enough to ensure the rodent will disturb the trigger mechanism even when the animal touches the bait only lightly to prevent the rodent from feeding on the bait without being trapped. Further, the perishable bait can be difficult and time consuming to attach to the bait petal. In addition, most bait is temperature sensitive and can decompose before entrapment.
Electric or electronic traps include a plastic encasement with a pair of electrodes to detect the rodent and dispatch high voltage shock when activated, for example U.S. Pat. No. 5,949,636 to Johnson et al. and U.S. Pat. No. 6,735,899 to Anderson et al. These traps require the user insert bait through a bottom hole on the back plate with a plastic or wooden knife. The user must be sure to allow enough of the bait to extend through the entrance hole, since rodents are very cautious and generally need to sample the bait before entering into the internal encasement. This provides the rodents the opportunity to extract the bait without ever entering the trap. Additionally, the construction of these types of traps make the removal of unused perishable bait difficult.
Glue traps are paper or cardboard covered in a non-drying strong adhesive to entrap mice or rats, see U.S. Pat. No. 5,477,636 to Musket and U.S. Pat. No. 5,384,981 to Cohen. These traps are economical and easy to set, however they typically utilize grain such as wheat for bait. Grains may sour under damp conditions causing odors that are unacceptable for indoor use.
Numerous chemical control means have been employed to encapsulate chemical rodenticides to mask odors and/or taste. However, these poisons have several major drawbacks. Once chemically poisoned, a rodent may die and decompose in an inaccessible place, such as inside a wall, creating a possible odor problem or additional infestation. Moreover, a few species and strains of rodents will detect and avoid the chemical odor and others are resistant all together. Sometimes, household pets become the victims of these chemical control means. Still yet extensive precautions must be taken by the exterminator to prevent poisoning of himself during distribution of the chemicals.
Accordingly, what is lacking in the art is a safe effective and non-toxic animal trap bait that can be easily applied to new as well as pre-existing animal traps. The animal trap bait should be non-perishable, reusable and disposable by conventional means.

Microencapsulated animal trap bait and method of luring animals to traps with microencapsulated bait


An optical pickup is provided which detects information contained in an optical disk. The optical disk includes a light source, a hologram device, an objective lens, a photodetector, and a single chip. The light source is formed of a first vertical cavity surface-emitting laser (VCSEL) diode and emits a light beam. The hologram device converts the light beam emitted from said light source into a polarized parallel light beam and diffracts a reflected parallel light beam reflected from said optical disk to produce a diffracted beam. The objective lens focuses the polarized parallel light beam on said optical disk and converts a corresponding reflected beam into the parallel reflected beam. The photodetector is formed of a second VCSEL diode and detects various characteristics of the diffracted beam. Finally, the light source and the photodetector are integrated on the chip. As a result of the configuration above, the light source emits a laser beam which has a small astigmatism and does not lose its intensity as it propagates through the optical head.

FIG. 1 illustrates a optical system having a conventional optical pickup which is used in a compact disk player. Specifically, the pickup comprises a printed circuit board (PCB) 1, a submount 2, an edge-emitting laser diode 3, a photodetector 4, and a photo diode 8. The submount 2 is mounted on the PCB 1, and the laser diode 3 is fixedly disposed on the side of the submount 2 and used as a light source for the optical pickup. The photo diode 8 is disposed on the PCB 1 next to the submount 2, intersects a line which is collinear with the optical axis of the edge-emitting laser diode 3, and senses the amount of light output from the diode 3. The photodetector 4 is also installed on the PCB 1 and detects light which has been emitted from the diode 3 and reflected from an optical disk 7.
The optical pickup further comprises a hologram device 5 and an objective lens 6. Specifically, the hologram device 5 and the objective lens intersect the optical axis of the diode 3 and are located between the diode and the disk 7.
The operation of the conventional optical pickup will be described below. First, the laser diode 3 emits a laser beam which has multiform polarization directions, and such beam impinges upon the hologram device 5. The device 5 converts the laser beam into a parallel light beam and outputs such beam to the objective lens 6. Then, the lens 6 focuses the light beam upon a particular track of the disk 7.
The focused beam reflects off the track of the optical disk 7, and the polarization of the light beam varies according to information recorded in the track. Subsequently, the reflected beam passes through the objective lens 6, is converted into a parallel beam, and is output to the hologram device 5. Then, the device diffracts the reflected beam and outputs the diffracted beam to the photodetector 4. Consequently, the photodetector 4 determines the type of information recorded on the track of the disk 7 based on the shape and/or intensity of the diffracted beam. Furthermore, the photodetector 4 evaluates the beam to determine if the beam is properly positioned on the track of the disk and if the beam is properly focused on the disk 7.
The conventional optical pickup has several disadvantages. For example, since the edge-emitting laser diode 3 is fixed to the submount 2, aligning the optical axis of the diode 3 with the hologram device 5 and aligning the photodetector 4 with the diffracted beam is difficult. As a result, a substantial amount of time is need to assemble the optical pickup.
Furthermore, the edge-emitting laser diode 3 emits a laser beam which has an oval cross section and a large astigmatism. Therefore, correctly detecting tracking errors via the photodetector 4 is difficult. Moreover, the intensity of the light reaching the surface of the disk significantly decreases as the laser beam passes through the optical system.

Optical pickup employing a vertical cavity surface-emitting laser diode


An image forming apparatus is provided. The apparatus includes a body provided with an opening at one side thereof, a developing tray movably installed at the opening, a plurality of developing units mounted to the developing tray, and a pair of frames forming opposite inner sides of the body. The frames are provided with a plurality of seating grooves to support lower ends of the developing units such that the developing units are supported by the frames, and therefore the positions of the photosensitive bodies of the developing units with respect to other constituents supported by the frames may be accurately regulated.

1. Field
Embodiments of the present invention relate to an image forming apparatus equipped with a development tray movably installed on a body and provided with a development unit.
2. Description of the Related Art
Generally, an image forming apparatus forms an image on a printing medium. Examples of such an image forming apparatus include a printer, a copier, a facsimile machine, and a complex machine having functions of the one or more apparatuses.
An image forming apparatus includes a body provided, at one side thereof, with an opening, a plurality of developing units disposed in the body, each of the developing units capable of developing an electrostatic latent image into a visible image using a corresponding one of developing agents of different colors, an exposure device to scan light onto photosensitive bodies of the development units and thus to form an electrostatic latent image on the photosensitive body of each development unit, a transfer device to transfer the visible image developed using the corresponding developing agent to a printing medium, and a fusing device to fuse the developing agents of the visible image to the printing medium.
A type of image forming apparatus has a plurality of developing units installed in a developing tray movably installed in an opening formed at one side of a body, to easily and conveniently replace developing units whose developing agents have been consumed.


Hybridoma cell lines have been generated which produce and secrete monoclonal antibodies which selectively bind to the ceftiofur. These hybridomas may be obtained by using as an immunization agent or immunogen, desfuroyl ceftiofur which has been conjugated to an immunogenic carrier. Ceftiofur in biological samples may be detected and quantified by contacting the sample with the antibodies to form a ceftiofur/antibody immunocomplex when ceftiofur is present, which immunocomplex may then be detected. The monoclonal antibodies may also be incorporated into kits for the detection and quantification of ceftiofur.

1. Field of the Invention
This invention relates to hybridoma cell lines and monoclonal antibodies produced therefrom which may be used to detect ceftiofur.
2. Description of the Prior Art
Ceftiofur is a broad-spectrum, .beta.-lactamase-resistant cephalosporin which exhibits excellent antimicrobial activity by virtue of its 2-(2-aminothiazol-4-yl)-2-methoxyaminoacetamide substituent at the C-7 position of the cephem nucleus (Labeeuw and Sahli, U.S. Pat. No. 4,464,367; Yancey et al., 1987, Am. J. Vet. Res., 48:1050-1053). Ceftiofur has been approved by the FDA and is used for the treatment of respiratory diseases in cattle and horses (Food and Drug Administration, 1988, Fed. Regist., 53:5369-5370; and 1991, Fed. Regist., 56:119).
Current detection methods for cephalosporins include HPLC procedures (Rouan, 1985, J. Chromatogr. 340:361-400) and biological assays (Wise et al., 1980, Antimicrob. Agents Chemother., 17:84-86). Recent HPLC methods for ceftiofur can detect 0.5 ppm ceftiofur equivalents (Jaglan et al., 1990, J. Assoc. Off. Anal. Chem., 73:26-30; Gilbertson et al., 1990, J. Agric. Food Chem., 38:890-894). Other methods for the detection of ceftiofur which have been described include agar gel diffusion (Cervantes et al., 1993, Am. J. Vet. Res., 53:573-575. Owens et al., 1990, J. Dairy Sci., 73:3449-3456), "DELVOTEST-P", which is a calorimetric bacterial inhibition test (Jaglan et al., 1992, J. Dairy Sci., 75:1870-1876. Owens et al., 1990, ibid), the Bacillus stearothermophilus disk assay, the Charm test II, which is a receptor-binding assay (Jaglan et al., 1992, ibid), and a cylinder-plate microbiological assay (Jaglan et al., 1992, ibid; Gilbertson et al., 1990, ibid). Unfortunately, these tests require labour-intensive sample preparations, lengthy data acquisition times, and in some cases costly and sophisticated equipment.
A commercial immunoassay for ceftiofur is currently available (Idetek Inc., Sunnyvale, Calif.). However, the assay is based upon a polyclonal antibody for ceftiofur rather than a monoclonal antibody.

The United States of America as represented by the Secretary of Agriculture


A method for workload security rings that includes receiving a plurality of workloads, each associated with respective security criteria and scheduled for execution on a distributed computing system divided into a plurality of security rings each associated with a respective subset of computing devices of the distributed computing system that is physically isolated from the other security rings. For each respective workload, the method includes determining, using the respective security criteria, a security level of the respective workload and identifying, using the security level of the respective workload, one or more of the plurality of security rings that are eligible for executing the respective workload. The method also includes executing the respective workload on one or more computing devices selected from one of the respective subsets of computing devices associated with the identified one or more of the plurality of security rings eligible for executing the respective workload.

Distributed computing networks (i.e., "cloud computing") are increasingly popular due to price, scalability, and flexibility. These computing networks simultaneously manage an incredible number of varying workloads. For instance, some workloads may be experimental, other workloads my process user data, while yet other workloads may process mission critical fleet management information. Each different workload type demands different requirements regarding security, maintainability, and flexibility.


A method and apparatus for transporting data for a data warehousing application. Data is extracted from one or more source containing data having a standard data structure and is translated into data that contains meaningful business terms. The translated data is then stored. In the present embodiment, an analytic business component is operable for extracting data from the source, translating the extracted data and for storing the translated data into a staging area. The translated data is then processed to obtain data having a common structure. In the present embodiment, a source adapter processes the translated data to obtain data having a common structure. The data having a common structure is then transformed into a format suitable for loading into a data mart. In the present embodiment, an analytic data interface receives the data having a common structure and transforms the data for loading into a data warehouse. The data is then stored in a data warehouse.

Due to the increased amounts of data being stored and processed today, operational databases are constructed, categorized, and formatted in a manner conducive for maximum throughput, access time, and storage capacity. Unfortunately, the raw data found in these operational databases often exist as rows and columns of numbers and code which appears bewildering and incomprehensible to business analysts and decision makers. Furthermore, the scope and vastness of the raw data stored in modern databases renders it harder to analyze. Hence, applications were developed in an effort to help interpret, analyze, and compile the data so that a business analyst may readily and easily understand it. This is accomplished by mapping, sorting, and summarizing the raw data before it is presented for display. Thereby, individuals can now interpret the data and make key decisions based thereon.
Extracting raw data from one or more operational databases and transforming it into useful information is the function of data "warehouses" and data "marts." In data warehouses and data marts, the data is structured to satisfy decision support roles rather than operational needs. Before the data is loaded into the target data warehouse or data mart, the corresponding source data from an operational database is filtered to remove extraneous and erroneous records; cryptic and conflicting codes are resolved; raw data is translated into something more meaningful; and summary data that is useful for decision support, trend analysis or other end-user needs is pre-calculated. In the end, the data warehouse is comprised of an analytical database containing data useful for decision support. A data mart is similar to a data warehouse, except that it contains a subset of corporate data for a single aspect of business, such as finance, sales, inventory, or human resources. With data warehouses and data marts, useful information is retained at the disposal of the decision-makers.
However, establishing a structure for transporting (extracting, transporting and loading) data from an operational database or databases into a structure that can be used for data warehousing applications is quite time consuming. In many instances many months of man-hours are required to define and program a suitable structure for transporting data from an operational database(s) into a format suitable for data warehousing applications.
The complexities in designing a data model for transporting data from an operational database into target tables in a data warehouse are not simply technical problems. They also involve complex business semantic problems.
Recently, many operational databases have begun to use standardized database structures. Several companies have recently created Business Application Programming Interfaces for getting data into and out of business databases that use these standardized database structures. Business application programming interfaces are effective for getting information into and out of a business database. However, the user must still perform the process of defining and programming for data transport in order to obtain output that is suitable for use as input to a data warehousing application. This is expensive and time consuming. In addition, these business application programming interfaces require extensive knowledge and programming to learn and use.
The time and cost for defining and programming such that the data is suitable for use as input to a data warehousing application is particularly problematic for companies that use multiple different operational databases. More particularly, the process of defining and programming for data transport must be repeated for each different operational database. That is, for example, if a company has both a SAP database and an Oracle database, the process of defining and programming for data transport must be performed for both databases and the process is unique to each database.
What is needed is a method and apparatus that allows for transporting data such that the data can be used in data warehousing applications. In addition, a method and apparatus is needed that meets that above need and that takes advantage of the standardization of database components. Moreover, a method and apparatus is needed that reduces the time required to define and program data transport for data warehousing applications. The present invention provides a method and apparatus that meets the above needs.

Method and apparatus for transporting data for data warehousing applications that incorporates analytic data interface


A keyboard attachment assembly for a computer device comprises a keyboard having a variably positionable connector and an adapter releasably couplable to the keyboard. The adapter comprises an alignment mechanism for moving the connector into alignment with a connector port of the computer device.

Computing devices (e.g., handheld and other types of computer devices) are designed to be lightweight and easily carried. Because of the small size and portability of such computing devices, strict adherence to hardware constraints, such as input device hardware constraints, must be maintained. Computing devices employ a touch pad or handwriting recognition area to enable a user to provide input to the computer. However, because of the small size of such computers, data input in an efficient and ergonomic manner is oftentimes difficult and cumbersome. Detachable keyboards have been utilized to provide an additional data input device for the computer. However, incompatibility between particular detachable keyboards and particular computers results in further increased costs associated with designing, shipping and stocking different detachable keyboards.

Keyboard attachment assembly for a computer device

Hewlett-Packard Development Company, L.P.


Each of the cushions in a pair of cushions has two flat sides which meet at a right angle corner and a convex side which interconnects the free ends of the two flat sides. The two cushions may be arranged in a wide variety of end-to-end positions to allow the exerciser to assume various postures. The cushions may be turned on their side and arranged with corresponding flat sides partially overlapping to form separated leg spaces for two people to sit on the cushions in a face-to-face relationship.

I have previously designed a combined exercise and furniture device as shown in my U.S. Pat. No. 4,905,330, Mar. 6, 1990. This unit included interconnected rectangular and wedge-shaped sections which could be arranged in a number of different positions to provide various exercise and furniture possibilities All of the surfaces in this unit were flat. While this product has been successful, it nevertheless has limitations in providing certain postures for the exerciser. These limitations in part are due to the use of all flat sides on the interconnected sections.
An alternate multiple cushion type device is shown in U.S. Pat. 4,635,306, Jan. 13, 1987. All surfaces on the cushions are flats and thus limit the possible configurations of use and the postures that may be assumed by the user.
Thus, what is needed is a multiple cushion type exercise device that will allow for a wider range of posture positions for the exercisers including being used as furniture.

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An ATM switch includes a plurality of input line corresponding units, a plurality of output line corresponding units, and a wavelength shifting unit. The wavelength shifting unit is arranged between the input line corresponding units and the output line corresponding units to shift optical signals having different wavelengths in a plurality of wavelength-multiplexed optical signals arriving from the input line corresponding units and output the wavelength-multiplexed optical signals. Each input line corresponding unit includes an input-side basic switch for distributing N (N is a positive integer) cells respectively input to input ports to N lines, an electro-optic converter for converting the cells into optical signals having different wavelengths in units of N lines, and a multiplexer for multiplexing the optical signals into one wavelength-multiplexed optical signal. Each output line corresponding unit includes a demultiplexer for demultiplexing the wavelength-multiplexed optical signal in units of wavelengths, an opto-electric converter for converting outputs from the demultiplexer into electrical signals, respectively, and an output-side basic switch for distributing the cells converted into the electrical signals to a plurality of output ports.

The present invention is used for ATM (Asynchronous Transfer Mode) communication. The present invention relates to a technique of simplifying connection of the internal links of an ATM switch. The present invention also relates to a technique of constituting an ATM switch using an optical device. The present invention also relates to a technique of coping with traffic localization.
FIGS. 16 to 18 explain a conventional ATM switch. FIG. 16 shows the arrangement of a 4.times.4 (m inputs and n outputs are represented by "m.times.n") basic switch. FIG. 17 shows the detailed arrangement of a cross point in the basic switch. FIG. 18 shows the arrangement of a 16.times.16 ATM switch using eight 4.times.4 basic switches. The ATM switch is described in detail in reference "Illustrated standard ATM textbook, ASCII Shuppansha".
The arrangement of the basic switch will be described with reference to FIGS. 16 and 17. An input buffer type basic switch will be described below. This basic switch comprises input buffers 51-1 to 51-4 for temporarily storing arriving cells, a controller 52 for controlling the congestion of cells, cross points 53 for transferring ATM cells output from the input buffers 51-1 to 51-4 to desired output ports, and output highways 54-1 to 54-4 to which ATM cells are transferred. The controller 52 communicates with the respective input buffers 51-1 to 51-4 to permit cell transmission so as not to transfer the cells from the input buffers 51-1 to 51-4 to the same one of the output highways 54-1 to 54-4. The cross point 53 has an address filter AF, as shown in FIG. 17, and transfers an input cell to the corresponding one of the output highways 54-1 to 54-4 on the basis of the information in the header of the cell.
The conventional ATM switch is constituted using a plurality of basic switches shown in FIGS. 16 and 17. FIG. 18 shows a 16.times.16 ATM switch constituted using eight 4.times.4 basic switches 71 to 78. The basic switches 71 to 74 are individually connected to the basic switches 75 to 78 through links so that a cell from an arbitrary input line can be output to an arbitrary output line.
When the ATM switch is to be constituted using a plurality of basic switches, a number of links are required to mutually connect the respective basic switches. In addition, wires for connection are intertwined with each other to result in a complex structure. In the example shown in FIG. 18, 16 links are necessary. An actual large-scale ATM switch uses several ten or several hundred basic switches, and the number of links therebetween is enormous.
The links are constituted using optical fibers. The process of connecting the wires requires a long time. In addition, the check process for preventing erroneous interconnection increases the apparatus cost and the work time. Every time the number of basic switches is increased/decreased, interconnections between the wires must be changed for all the basic switches, so the degree of freedom in increasing/decreasing the number of basic switches is low.
When the traffics localize in routes from the basic switch 71 to the basic switch 75 and from the basic switch 72 to the basic switch 76, the links connecting these switches congest. This situation is shown in FIG. 19. FIG. 19 shows the congestion situation of the 16.times.16 ATM switch. This largely degrades the throughput of the switch.

Nippon Telegraph and Telephone Corporation


According to various embodiments, systems and methods are provided that relate to shared access to Storage Area Networks (SAN) devices. In one embodiment, a Storage Area Network (SAN) host is provided, comprising: a server component: a first host bus adapter configured to be connected to a SAN client over a first SAN; a second host bus adapter configured to be connected to a SAN storage device over a second SAN; and wherein the server component is configured to manage a data block on the SAN storage device, receive a storage operation request from the SAN client through the first host bus adapter, and in response to the storage operation request, perform a storage operation on the data block, the storage operation being performed over the second SAN through the second host bus adapter.

Field of the Invention
The present invention generally relates to data storage, and more particularly, some embodiments relate to Storage Area Network (SAN) systems and methods.
Description of the Related Art
The storage and retrieval of data is an age-old art that has evolved as methods for processing and using data have evolved. In the early 18th century, Basile Bouchon is purported to have used a perforated paper loop to store patterns used for printing cloth. In the mechanical arts, similar technology in the form of punch cards and punch tape were used in the 18th century in textile mills to control mechanized looms. Two centuries later, early computers also used punch cards and paper punch tape to store data and to input programs.
However, punch cards were not the only storage mechanism available in the mid 20th century. Drum memory was widely used in the 1950s and 1960s with capacities approaching about 10 kb, and the first hard drive was developed in the 1950s and is reported to have used 50 24-inch discs to achieve a total capacity of almost 5 MB. These were large and costly systems and although punch cards were inconvenient, their lower cost contributed to their longevity as a viable alternative.
In 1980, the hard drive broke the 1 GB capacity mark with the introduction of the IBM 3380, which could store more than two gigabytes of data. The IBM 3380, however, was about as large as a refrigerator, weighed ¼ ton, and cost between approximately $97,000 to $142,000, depending on features selected. In contrast, contemporary storage systems now provide storage for hundreds of terabytes of data, or more, for seemingly instantaneous access by networked devices. Even handheld electronic devices such as digital cameras, MP3 players and others are capable of storing gigabytes of data, and modern desktop computers boast gigabytes or terabytes of storage capacity.
With the advent of networked computing, storage of electronic data has also expanded from the individual computer to network-accessible storage devices. These include, for example, optical libraries, Redundant Arrays of Inexpensive Disks (RAID), CD-ROM jukeboxes, drive pools and other mass storage technologies. These storage devices are accessible to and can be shared by individual computers using such traditional networks as Local Area Networks (LANs) and Wide Area Networks (WANs), or using Storage Area Networks (SANs). These client computers not only access their own local storage devices but also network storage devices to perform backups, transaction processing, file sharing, and other storage-related operations.
Network bandwidth is limited and can be overloaded by volumes of data stored and shared by networked devices. During operations such as system backups, transaction processing, file copying and transfer, and other similar operations, the network communication bandwidth often becomes the rate-limiting factor.
SANs, in particular, are networks designed to facilitate transport of data to and from network storage devices, while addressing the bandwidth issues caused by large volumes of data stored and shared on the network storage devices. Specifically, SANs are network architectures that comprise a network of storage devices that are generally not accessible by nodes on a traditional network (e.g., LAN or WAN). As such, a SAN implementation usually requires two networks. The first network is a traditional network, such as a LAN, designed to transport ordinary traffic between individual network computers (i.e., nodes). The second network is the SAN itself, which is accessible by individual computers through the SAN but not through the traditional network. Typically, once a SAN storage device (also referred to as a SAN storage node) is remotely attached to an individual computer over a SAN, it appears and functions much like a locally attached storage device (as opposed to appearing and functioning as a network drive).
By utilizing a SAN as a separate network for storage devices that perform bandwidth-intensive operations (e.g., backups, transaction processing, and the like), the SAN storage devices realize improved bandwidth among themselves and with traditional computers attached to the SAN. Additionally, when storage devices and traditional nodes communicate over the SAN, more bandwidth-intensive operations are performed over the SAN rather than a LAN, leaving the LAN to handle only the ordinary data traffic.
FIG. 1 illustrates an example of a traditional SAN implementation 10. There are multiple client nodes 15, 18, and 21 networked together using a LAN 1 which allows communication of ordinary data traffic between the nodes (15, 18, 21). Storage devices 12 are connected together through SAN 13, which provides high bandwidth network capacity for bandwidth-intensive data operations to and from the storage devices 12. As illustrated, client nodes 18 and 21 are also connected to SAN 13, allowing them high bandwidth data access to the storage devices 12. As discussed above, by utilizing the SAN to perform high bandwidth data access, the client nodes are not only moving bandwidth-intensive data operations from the LAN 19 to the SAN 13, but also accessing the data at higher data rates than are typically available on a traditional network such as LAN. Typically, SANs utilize high bandwidth network technologies, such as Fiber Channel (FC), InfiniBand, Internet Small Computer System Interface (iSCSI), HyperSCSI, and Serial Attached SCSI (SAS), which are not commonly utilized in traditional networks such as LANs.

System and method for sharing san storage


An apparatus, and method of use therefor, adapted to evaluate angles of rotation of joints for coupling arm-to-arm to each other on the basis of information representative of position and orientation of a tip of a manipulator having six or less arms, which are sequentially coupled with each other, so as to implement the position and the orientation of the tip of the manipulator. A matrix equation is evaluated beforehand in accordance with a mathematical expression processing. Parameters, which represent a figure of the manipulator, are inputted into the resultant matrix equation. Further, the information representative of position and orientation of the tip of the manipulator is entered to evaluate the angles of rotation of joints in accordance with a numerical resolution.

1. Field of the Invention
The present invention relates to a manipulator simulation method and apparatus adapted to evaluate angles of rotation of joints for coupling arm-to-arm to each other on the basis of information representative of position and attitude or orientation of a tip of a manipulator having six or less arms, which are sequentially coupled with each other, so as to implement the position and the attitude or orientation of the tip of the manipulator.
2. Description of the Related Art
FIG. 9 is a typical illustration of an example of a manipulator comprising a plurality of arms and joints for coupling the arms to each other.
In FIG. 9, a plurality of arms 2.sub.-- 1, 2.sub.-- 2, . . . , 2.sub.-- 5 are sequentially coupled with each other by joints 3.sub.-- 1, 3.sub.-- 2, . . . , 3.sub.-- 5 on a substrate or a base 1. A hand 4 is coupled with the top arm 2.sub.-- 5. The hand 4 serves to grasp a work object 5 and let loose the same through switching of a finger 4a constituting the hand 4. The joints 3.sub.-- 1, 3.sub.-- 2, . . . , 3.sub.-- 5 are arranged in such a manner that the arms 2.sub.-- 1, 2.sub.-- 2, . . . , 2.sub.-- 5 coupled with each other by joints 3.sub.-- 1, 3.sub.-- 2, . . . , 3.sub.-- 5 are rotatably movable. The use of such a manipulator makes it possible to perform, through a rotatable movement of the arms such that the hand 4 of the tip of the arms 2.sub.-- 1, 2.sub.-- 2, . . . , 2.sub.-- 5 is in a predetermined position and takes a predetermined attitude, a work, for example, such that the work object 5 is grasped and carried to another position.
It is referred to as the inverse kinematics that in the manipulator arranged, for example, as illustrated in FIG. 9, information as to the position and orientation of the tip of the manipulator is provided, so that angles of the respective joints are evaluated to move the tip of the manipulator to the given position with the given attitude.
Such inverse kinematics are applicable to the following fields
(1) Robots
For a robot having an arbitrary link configuration, the inverse kinematics is automatically solved, so that applications to the work plans of the robot are facilitated.
(2) CAD systems for a mechanism design
Incorporation of the inverse kinematics into the CAD system for a mechanism design, in which a design for parts having a link mechanism is often performed, makes it possible to simulate beforehand as to whether products having the link mechanism operate as desired.
(3) Production of an animation in the multimedia
In the multimedia, various applications in mixing of computer graphics, video and audio are expected. On the other hand, in the field of the commercial and a movie, it is desired to produce an animation, which is high in reality, using the computer graphics. Hitherto, in the field of the computer graphics, the animation is produced on an off-line basis. Particularly, with regard to a motion for an android model, there have been adopted a very troublesome scheme in which an angle is designated for each joint and a motion capturing scheme in which a specific sensor is attached to the human body so as to take in the motion into a computer. Incorporation of the inverse kinematics into an animation producing tool makes it possible to very efficiently produce a motion of the animation model such as the android.
(4) Ergonomics
Hitherto, in a design of products having some contact with the human, such as chairs, desks, keyboards and the like, there is seen a lack of arguments as to the readiness-to-use, the operability, and the amenity on an ergonomics basis. It is noted, however, that incorporation of the inverse kinematics into the android model produced by the computer graphics makes it possible to perform an inspection of manufactured goods through various motions of the android model at the stage of the simulation.
Hitherto, in connection with the problem of the inverse kinematics, in a case where analytic solutions exist, an algebraic operation is performed one by one for each object to evaluate the analytic solution. In this case, it is difficult to discriminate between the case of the existence of the analytic solution and the case of the non-existence of the analytic solution. This involves a lack of generality for a system in its entirety. Further, in a design, even a manipulator having the analytic solutions, when such a manipulator is manufactured indeed, it happens that the calibration involves a minor offset and as a result the inverse kinematics with the analytic solution is not useful.
On the other hand, in connection with the case of non-existence of the analytic solution, there has been developed a method referred to as a homotopy scheme or a continuation scheme in which the precision is improved by means of repeating the numerical solution starting from the approximate solution, specifically, constituting a predictor-corrector on a Newton-Raphson basis.
This method involves, however, the following drawbacks and cannot be used practically.
(1) There is a case where numerical instability exists.
(2) There is not seen dependency to the physical constant (D-H parameter).
(3) A calculation load is large.

Manipulator simulation method and apparatus


A system for securely providing restricted display information having an encoder-transmitter for transmitting selected update data using information identification codes as enabling reception keys and a plurality of uniquely identified decoder-receivers for receiving the update data for display on a video screen. Authorized decoders are provided with enable reception keys so that subsequently transmitted data having an information identification code matching a reception key at a decoder-receiver may be received for subsequent display on the video screen. Symbolic signaling is used so that enabling a decoder-receiver with a reception key also provides display coordinate information for displaying the update data in the proper relative display location for the video screen of that enabled decoder, so that the update data subsequently transmitted is displayed using that display coordinate information. Tile messaging and cellular micrographic transmission techniques are used to reduce the volume of data transmitted to changed display information (update data), wherein cells of characters are transmitted as one byte of data and cells of pixel data are transmitted a plurality of bytes of data. Each decoder-receiver may have a plurality of video screens separately and uniquely identified such that encoded update data and other messages are transmitted for specific video screens. The system includes multiplexing display information and television signals from different sources and transmitting the multiplexed signals to the decoder-receivers for selectively displaying different combinations of display information and/or television signals on different video screens.

Applicant and other related companies are in the business of distributing realtime financial market information to various clients who use this information to carry on their business. When a client subscribes for this service, an agreement is entered into in which the client indicates what information is desired and how many video screens will be displaying the information. Based on these parameters, a fee is assessed to the client and the information then is transmitted to the client.
Typically, this financial market information is transmitted to clients as one or more pages or records that may be displayed on a video screen, portions of which, from time to time, are updated to reflect changes in the market information. Various clients subscribe to view different specific groups of these pages and/or records.
An early method of distributing market information was based upon the transmission of a single page of real time digital information over a single telephone line. Page-oriented information (ROW #, COL #, CHARACTER STRING) was sent from the information vendor's computer over a telephone network to a controller, provided by the information vendor, located at the client site. The page-oriented information was subsequently converted to video by a video generation unit within the controller. The video output was then connected to a video screen by a single coaxial cable.
Each full page was repeatedly transmitted in video at a field rate for realtime display, similar to that of a television transmission. However, once the video signal was produced, there was nothing, except the personal integrity of the client, to prevent the client from connecting any number of video screens to a video distribution amplifier connected to the controller, driving a larger number of video screens above and beyond the number stated in the agreement. This practice dilutes the revenues to which the information vendor would ordinarily be entitled.
This architecture was costly and unreliable because of the large amount of hardware needed to place financial information on a large number of trading desks. For example, if a client's trading room had thirty traders, each trader needed his own single-user system resulting in thirty keyboards, thirty controllers with thirty internal video generation units, thirty telephone cables, thirty modems, thirty coaxial video cables, and thirty video screens to receive and display the required financial information.
This technology also limited the screen presentation format to what was provided by the information vendor. When traders were only interested in one or two fields of information on a screen, they would have to display the entire page of information. If they wanted to look at one or more fields of information on a second screen at the same time, an entire additional single-user system would be required. Further, when two traders wanted to look at the same page, they would either have to have two separate single-user systems or the video information would be redistributed to a "slave" video screen making it difficult for the information vendor to know how many video screens were connected to a given controller and hence how many people were viewing their information. This made billing difficult and usually created a process of surprise client-site visits that left both information vendor and client unhappy.
The development of multi-user systems reduced the amount of required hardware and enabled users to share resources and view common information. In multi-user systems, each trader had one keyboard and several video screens. Through the use of video switching techniques, thirty traders could share perhaps ten or fifteen controllers and contend for their use. Since many traders are part of a trading group that uses essentially the same financial market information, the probability of blocking (not having a controller available to fulfill a new page request) was small.
Such multi-user systems helped reduce costs by reducing the number of controllers, keyboards, and system cabling, but did not solve either the billing problems or allow the user to customize screen presentation formats.
Later, single telephone line, multi-page distribution systems were developed which reduced the required number of telephone lines. The information syntax for these multi-page sources was slightly modified to (PAGE #, ROW #, COL #, CHARACTER STRING). Users of such systems also could create composite pages (fields from different pages displayed simultaneously on one video screen) and calculate and insert additional value-added information (e.g., bond yield to maturity). By doing so, customized output display pages could be created showing only the information and value-added calculations the user wanted to see.
Users developing value-added applications based upon page oriented data had to assign a symbolic name to an information field located at a specific display location of the input source page. When the information vendor changed the presentation format of the information (i.e., the location of a specific data element), as often happens when financial instruments are either added or deleted, the value-added application had to be modified. To overcome this difficulty, and to supply basic information without display parameters, the information vendor created record-oriented sources using the syntax (SYMBOLIC NAME, CHARACTER STRING). Examples of such a system are the Reuters Integrated Data Network and the Telerate TIQ Feed.
Despite the foregoing advances in the field of electronic financial information distribution systems, current systems still allow video screens to be added and/or moved freely without either the information vendor's knowledge or consent. Further, each video screen must be connected by its own single-video "home-run" cable, i.e., a cable that typically runs for hundreds of feet between the trading floor where the video screen is located and the equipment room where either a controller, video switch output, or a host computer is located.

Restricted information distribution system apparatus and methods


A method and apparatus for sequential decoding using the stack algorithm. A stack is used which is small in size and which has a leaky bottom. A counter stores the total count of nodes observed so as to abandon decoding if this count exceeds a fixed value. A comparator continuously compares the metric at the top of the stack with the largest metric lost from the bottom of the stack as stored in a memory. A small memory stores the path scanned through the logic tree, thereby directly providing the decoded block.

Digital transmission, and in particular radio beam transmission, is frequently subjected to interference, usually involuntary interference, which gives rise to errors in the received stream. Therefore, in order to recover the information in spite of interference, it is practically essential to encode the stream to be transmitted by means of an error-correcting code, and to decode the received stream by means of an error-correcting decoder.
The error-correcting codes that are the most widespread at present are block codes and convolution codes.
Block codes are simpler and consist of adding a determined number of redundancy bits to each block of bits to be transmitted. These are low performance codes and they cannot be used for messages that run the risk of a high level of interference.
Convolution codes are much more complex, but they also provide much better performance. They cause an initial stream to be transmitted to correspond to a stream which is actually transmitted in which the number of bits is multiplied by a given factor n, e.g. a factor of 2 or a factor of 3, with each group of n bits created in this way for each initial bit depending on the preceding groups.
There are two techniques in general use for error-correcting decoding of digital streams encoded by a convolution type code:
A first technique is to use the Viterbi algorithm which consists in examining all possible cases over a very large number of cases and then in selecting the most probable case. This algorithm is optimal, but it is complex to implement.
A second solution is to use "sequential decoding" which is less than optimal but which, in contrast, is quicker and simpler to implement, particularly for complicated codes. The complexity of the sequential algorithm does not increase with code performance, and it is therefore suitable for decoding high performance codes.
Two algorithms and their variants are in general use for performing sequential decoding: the stack algorithm, and the FANO algorithm which is now somewhat outdated.
In the stack algorithm, decoding is performed in blocks (e.g. blocks of 1000 bits), and it consists in establishing a "path" through a binary "logic tree" which is a representation of the decoding, each node of the tree being defined by a depth representative of its distance from the root node of the tree, and possessing, for the bit stream under consideration, a probability defined by a numerical value called the "metric". Observed nodes are then placed in an ordered stack with the highest-metric node being extended each time by its two successors.
More precisely, for each group of received code bits in the transmitted stream corresponding to a single bit prior to encoding:
the node at the top of the stack is removed;
the metrics of the two nodes following this node are then calculated;
they are placed in the stack; and
the stack is finally sorted by nodes of decreasing metric.
When the limiting size of the stack is exceeded (i.e. when the stack overflows), the block is declared badly received and is not decoded. A request may then be made for the block to be retransmitted, or else it may be considered as being lost. Typically, the maximum size of the stack lies in the range one to ten times the number of bits in a block to be decoded. The smaller the stack the larger the number of blocks that will not be decoded (the stack will overflow often), and the larger the stack the larger the number of blocks that will be decoded with the risk of erroneously decoding blocks that have been very badly received.
The main drawbacks of stack decoding are the following: a large stack is required (stack depth is typically between one and ten times the size of blocks to be decoded, and thus between 1000 and 10,000 if 1000-bit blocks are being decoded); sorting the stack by increasing order of node metric is slow (yet the stack must be sorted each time a new node is scanned, thus between one and ten times per decoded bit); and once a block has been decoded, it is necessary to perform a trace-back in order to determine which block was, in fact, transmitted. These drawbacks make it very difficult to provide a practical implementation of such a decoder because of its size and because of the large amount of processing per decoded bit which limits its speed. In existing implementations, the stack is implemented using random access memory (RAM) which is sorted each time a node is scanned.
The invention seeks to remedy these drawbacks and to make it possible to implement such a sequential decoder at reduced cost in size and in components, and capable of operating at a high rate.

Method and apparatus for sequentially decoding a digital stream encoded by a convolution type error-correcting code

Alcatel Transmission par Faisceaux Hertziens A.T.F.H.


In a semiconductor integrated circuit for forming an offset gate structure by utilizing an anodic oxidation film fabricated around a gate electrode, even when a length of a gate line becomes long, the anodic oxidation film can be made uniform, and also electric characteristics of thin-film transistors can be matched with each other. In a semiconductor integrated circuit manufacturing method, a large number of insulated gate type field-effect transistors are connected with respect to a single gate line. This manufacturing method is comprised by steps of: forming a film made of a material capable of performing an anodic oxidation for constructing the single gate line; forming a plurality of gate lines, a large number of gate electrodes extended from the plural gate lines, and a power supply line connected to the large number of gate electrodes by patterning the film; and forming an anodic oxide layer on at least an exposed surface of the gate electrode by supplying a current to the power supply line in an electrolytic solution.

1. Field of the Invention
The present invention relates to a method for manufacturing a thin-film integrated circuit typically known as an active matrix type liquid crystal display device. Also, the present invention is related to another method for manufacturing an integrated circuit with employment of a semiconductor device where wiring patterns and electrodes have been formed by utilizing the anodic oxidation technique.
2. Description of the Related Art
Very recently, great attentions are paid for thin-film transistors constructed by employing thin-film semiconductors fabricated on glass substrates. The thin-film transistors are mainly utilized in active matrix type liquid crystal display devices. An active matrix type liquid crystal display device has such a structure that thin-film transistors are connected to the respective pixel electrodes, and electric charges entered into and derived from these pixel electrodes are controlled by the thin-film transistors. These pixel electrodes are arranged in a matrix form made of several hundreds of pixels.
A thin-film transistor connected to a pixel electrode requires such a characteristic of a low OFF current thereof. This is because electric charges held by the pixel electrode should be held for predetermined time. However, generally speaking, the normal thin-film semiconductors are made under amorphous state, or polycrystal state. Therefore, practically speaking, the existence of the OFF current flowing through the grain boundary is not negligible.
As the structures used to cancel or suppress the existence of this OFF current, various structures have been proposed that the LDD (light dope region) structure is fabricated and the offset gate region is formed. This LDD structure is described in Japanese Patent Publication No. 3-38755 (in 1991). The offset gate structure is described in Japanese Laid-open Patent Application No. 4-360580 (in 1992).
The conventional technique described in Japanese Laid-open Patent Application No. 4-360580 can form the offset gate structure in the self-alignment manner and thus can achieve the high productivity. In accordance with this prior art technique, the gate electrode is fabricated by employing aluminum as the material thereof, and the anodic oxidation is carried out while using this gate electrode as the anode, so that the oxide layer is formed around the gate electrode, and furthermore, the offset gate region is fabricated by using a portion of the gate electrode having the same thickness as that of this oxide layer.
Since the thickness of the oxide layer may be controlled by controlling the voltages applied during the anodic oxidation in accordance with this conventional technique for manufacturing the oxide layer by utilizing this anodic oxidizing technique, the high reproducibility can be achieved. In particular, in the thin-film transistor having the offset gate structure, the characteristics of the thin-film transistors are greatly different from each other, depending upon the dimensions of the offset structures. Accordingly, it is very important to realize such a technique for correctly forming the dimensions of the offset gate structures under better controls. Therefore, the technique for fabricating the anodic oxide layer around the gate electrode under better controls may form a large number of thin-film transistors whose electric characteristics are matched with each other, resulting in a very useful technique.
On the other hand, a strong demand is made of such a design rule that dimensions of thin-film transistors arranged in a pixel region of an active matrix type liquid crystal display device should be reduced as small as possible. This is because the numerical aperture of the pixel should be increased. Since the pixel is required to pass light therethrough, the dimension of the pixel part which may interrupt the light transmission could be preferably made as small as being permitted.
Under these circumstances, the widths of the source lines and also of the gate lines, which are arranged in a matrix form, should be made narrow. The widths of the source lines and of the gate lines may be determined within such a range that the thin-film transistors employed in the pixel region arranged in a matrix form should be operated. Generally speaking, the widths of the source lines and of the gate lines may be determined within a range where the required display characteristic could be achieved, taking account of the voltage drops occurred in the wiring patterns and also the time constant.
However, in the case that the above-explained anodic oxidation technique is utilized, since the current should be supplied to the gate lines so as to perform the anodic oxidation, the resistance values of these gate electrodes must be considered. That is, the thickness of the oxide layer during the anodic oxidation may be determined based upon the voltage applied to the anode (i.e., gate electrode in this case). When the voltage drops are produced in the gate electrodes, there are differences in the dimensions of the offset gates of the thin-film transistors with respect to each pixel. As a result, there are fluctuations in the characteristics of the thin-film transistors for the respective pixels. Thus, the fluctuations would cause display fluctuations of the display screen and display failures.
As a result of the anodic oxidation, the anodic oxide layer is formed around the gate electrode and the essential portion of the conductor is made narrow, so that sufficient margins should be established.
To solve this problem, both of the width of the gate wiring and also the height thereof should be made sufficiently large, and also the resistance value of this gate wiring must be selected to be such a low level that this resistance value causes no problem during the anodic oxidation. Furthermore, in the active matrix type liquid crystal display device having the large display area, the length of the gate line would be further extended, so that the voltage drop problem would be particularly emphasized. To avoid this voltage drop problem, both of the width of this gate line and the height thereof should be furthermore increased.
However, since widening of the gate line width may cause the numerical aperture to be lowered, the gate line width must be narrowed as much as possible. Moreover, the height of the gate line could not be made unnecessary high in view of the processing method.
As previously described, in the active matrix type liquid crystal display device it is useful for the thin-film transistor arranged in the pixel region to employ such a structure that the anodic oxide layer is fabricated around the gate electrode. However, in order to supply the current required for performing the anodic oxidation to the gate line, the resistance value thereof must be sufficiently reduced. To this end, the required width of the gate line must be sufficiently widened. Nevertheless, when the width of this gate line is made wide, the numerical aperture of the pixel would be lowered. This numerical aperture problem would be emphasized when the large display screen size of the active matrix type liquid crystal display device is manufactured.

Method for manufacturing semiconductor integrated circuit

Semiconductor Energy Laboratory Co. Ltd.


A system in accordance with the present invention determines signal attenuation for an electronic support measure receiver. The system includes a detection module for receiving electromagnetic signals from a surrounding environment and a processing module for chronologically segregating the electromagnetic signals into a plurality of dwells. The processing module controls the processing of the plurality of dwells. The processing module determines an analysis dwell from the plurality of dwells. The processing module computes a coarse attenuation for the analysis dwell. The processing module further computes a fine attenuation from the coarse attenuation and an offset table value.

Typically, transmitted signals are collected by a receiver and processed during predetermined time intervals called dwells. The processing of signals received during a previous dwell occurs during a subsequent dwell. An inter-dwell period exists between dwells to allow for the reconfiguration of data processing circuits and other hardware in response to the processed data of the most recent dwell. Any processing of received signals or collecting of received signals is typically halted during this inter-dwell period.
There are several electronic support measure (ESM) analyses that must employ dwells to isolate emitter signals in both frequency and amplitude. These include Scan Modulation Analysis (SMA), Specific Emitter ID (SEI) and certain forms of Mode Change Detection (MCD). Typically, the emitter signals are intercepted in a wide instantaneous frequency (IF) bandwidth dwell and the analysis is performed in a narrow IF bandwidth dwell. With the switch in bandwidth comes an increase in sensitivity, requiring the prediction of the narrowband IF signal amplitude derived from the wide IF amplitude intercepted signal. ESM receivers typically perform this task by table look up, setting hardware and software detection thresholds accordingly. This works well when hardware specifications tightly control sensitivity.
However, systems that are less stringently specified typically rely on dynamic calibration to optimize sensitivity independently for each bandwidth. These systems may exhibit fluctuations in sensitivity and sensitivity deltas. In these cases, a strict table look up may over or under compensate, leading to either too much signal being detected or not detecting the signal at all (See FIG. 5).

System for establishing an attenuation frequency