To directly and smoothly execute data update on a duplication volume while suppressing a load on a master volume, when performing backup by employing the snapshot system. The duplication system includes: duplication volumes for a master volume; a shared volume for storing duplication data of the duplication volumes; and a main control unit which manages data accesses made from a host computer to the duplication volumes and manages data storing places. The main control unit includes a data duplication control module having a function which duplicates data of the master volume to the duplication volumes when updating the master volume, and directly performs data update to each of the duplication volumes when updating the duplication volumes.

1. Field of the Invention
The present invention relates to a data duplication system preferable for a magnetic disk array subsystem and the like. More specifically, the present invention relates to a data duplication device which duplicates data by using a snapshot technique, and to a data duplication method as well as a program thereof.
2. Description of the Related Art
Recently, as the social infrastructure has come to be built on IT (information technology), the amount of data held by business enterprises and individuals has been increased drastically. Further, due to spread of online electronic commerce, legislation for keeping endorsement data, and the like, the quality and value of the data itself have become elevated. Under such circumstances, influences of having such incident of losing data have become widely known to the public. At the same time, a great attention is drawn to backup techniques as a means for preventing data loss in advance.
Here, a mirroring-type backup procedure employed in a disk array subsystem as a data duplication system will be described.
At first, an application of a database and the like making access to a master volume is stopped in order to secure the rest point of the volume (master volume) that is the target of backup. Then, a backup volume having the same capacity as that of the master volume is set, and the entire data of the master volume is copied to the backup volume.
When the copy is completed, the stopped application of the database is restarted. In the meantime, the data is read out from the backup volume and saved in a backup device such as a tape.
With the procedure described above, the backup volume is created and the data is copied to the backup volume from the master volume to the backup volume after stopping the application. However, there is also a method which shortens the time from the point where the rest point is secured to the point where the master volume and the backup volume are synchronized by creating the backup volume while the application is in operation and starting up the data copy from the master volume to the backup volume.
However, with any of those methods, a prescribed length of time according to the copy amount is required from the point where the point of rest is secured to the point where the data of the master volume is completely copied to the backup volume. Further, for the cases other than backup use such as data mining, for example, a plurality of backup volumes are often created for a same master volume. In such case, normally, the data amount that is several times larger than that of the master volume is required for the backup volume.
In order to avoid such issue of the mirroring method, recently, backup employing a snapshot method has been used frequently (see Japanese Unexamined Patent Publication 2005-208950 (Patent Document 1)). Here, an example of a disk array subsystem 100 that is a data duplication system employing the snapshot method that uses a shared pool will be described by referring to FIG. 9, FIG. 10, and FIG. 11.
The disk array subsystem 100 as the data duplication system employing the snapshot method includes: a master volume 101; a virtual volume (referred simply as "snapshot volume" hereinafter) 102 having a same capacity as that of the master volume but does not actually have a physical capacity; a volume (referred simply as "shared pool volume" hereinafter) 103 which stores data of the snapshot volume 102; a data duplication control module 104 which manages data accesses made to the snapshot volume 102; an address changing module 105 which manages the actual storing place of the duplicated data; a duplication control memory 200 and an address changing memory 300 provided to the data control module 104 and the address changing memory 105, respectively.
Among those, the duplication control memory 200 provided to the data duplication control module 104 includes: an attribute managing table 201 which manages the attributes of the volumes such as the snapshot volume and the like; a volume correspondence managing table 202 which holds the snapshot relations between the volumes; and a difference managing table 203 which manages differences between the master volume 101 and the snapshot volume 102.
Among those, the difference managing table 203 of the duplication control memory 200 takes value "0" when the snapshot volume 102 does not hold data, and takes value "1" when the snapshot volume 102 holds data.
Further, the address changing memory 300 includes: a directory 301 which holds the actual storing address of the snapshot volume 102; and an allotment managing table 302 which manages the use state of the shared pool volume.
Next, operations of the disk array subsystem (data duplication system) 100 mentioned above will be described by referring to FIG. 12, FIG. 13, and FIG. 14.
Here, LV (logical volume) 0 is used as the master volume 101, LV1 is used as the snapshot volume 102, and LV2 is used as the shared pool volume (referred to as "shared volume" hereinafter) 103. Further, it is assumed that data of (AA, BB, CC, DD, - - - , NN) are stored in the master volume 101 before receiving a snapshot command.
As the procedure for duplicating each volume 101 or 102 mentioned above, first, the shared volume 103 is set within the disk array subsystem 100 and the attribute managing table 201 and the allotment managing table 302 are initialized at a first step S701 as shown in a flowchart of FIG. 12.
That is, the share attribute is set to LV2 in the attribute managing table 201, value "0" which shows that the shared pool volume is in an unused state is set in the allotment managing table 302. Then, the master volume 101 and the snapshot volume 102 having a same storage capacity as that of the master volume 101 are set in step S702.
Further, when the disk array subsystem 100 receives a snapshot command in next step S703, the attribute managing table 201, the volume correspondence managing table 202, and the difference managing table 203 are initialized in step S403.
That is, a master attribute is set for the master volume (LV0) 101 and a snapshot attribute is set for the snapshot volume (LV1) 102 in the attribute managing table 201. LV1 is set for LV0 of the snapshot and LV0 is set for LV1 of the snapshot in the volume correspondence managing table 202, respectively, so as to show that the master volume (LV0) 101 and the snapshot volume (LV1) 102 are in a snapshot relation. Value "0" indicating that the snapshot volume in the difference managing table 203, i.e., LV1 in this case, does not hold data is set, and a null value is set in the directory 301 showing that a storage space of the shared volume is not allotted to the snapshot volume.
Next, described are processing procedures to be executed when the disk array subsystem (the data duplication system) 100 described in the volume duplication procedure receives a write command and a read command.
First, the processing procedure to be executed when a write command is received will be described. The microprocessor (simply referred to as CPU hereinafter) of the disk array subsystem 100 refers to the attribute managing table 201 of FIG. 10 in step S801 shown in FIG. 13. Subsequently, it is judged whether the received command is a command for the master volume or a command for the snapshot volume (FIG. 13: step S802).
Note here that the CPU is structured to function as an arithmetic calculation processing module including the data duplication control module 104 and the address changing module 105.
When judged in step S802 described above that it is a write command for the snapshot volume, the processing is ended without writing the data. This is the processing executed according to an operation with which the duplication of the master volume is to be maintained at the point where the snapshot volume receives the snapshot command, e.g., processing of a case of backup, for example. In other operation modes, the data may be written to the snapshot volume as requested by the write command.
In the meantime, when judged in step S802 that it is a write command for the master volume 101, the CPU then refers to the volume correspondence managing table 202 and specifies the snapshot volume 102 that makes a pair with the master volume (FIG. 13: step S803).
Then, it is judged whether or not there is data in the write request address of the specified snapshot volume 102 by referring to the difference managing table 203 (FIG. 13: steps S804, S805). When judged that there is data in the snapshot volume 102 (FIG. 13: step S805/Yes), the data is written to the master volume in step S509 and the processing is ended (FIG. 13: step S810).
When judged that there is no data in the snapshot volume 102 (FIG. 13: step S805/No), the allotment managing table 302 is then searched (FIG. 13: step S806), and a region to be used this time is determined from the unused regions of the shared pool volume 103.
Then, the existing data at the write request address of the master volume 101 is copied to the unused region of the shared pool volume (FIG. 13: step S807). Thereafter, value "1" indicating that the corresponding section of the allotment managing table 302 is being used is set, and the address of the unused region is set in the corresponding section of the directory 301 (FIG. 13: step S808).
Subsequently, value "1" indicating that there is data is set in the corresponding section of the difference managing table 203 (FIG. 13: step S809), the data is written to the master volume in step S509, and the processing is ended (FIG. 13: step S810).
Note here that FIG. 9, FIG. 10, and FIG. 11 show the states of each of the tables after a write command of (ZC) is issued to page 2 of the master volume (LV0) after receiving the snapshot command.
Next, the processing procedure to be executed when a read command is received will be described.
The CPU first refers to the attribute managing table 201 of the control memory 200 (FIG. 14: step S901), and judges whether the received command is for the master volume 101 or for the snapshot volume 102 (FIG. 14: step S902).
Then when judged in step S902 that it is the command for the master volume 101, the data is read out from the master volume 101 and the processing is ended (FIG. 14: steps S907, S908). In the meantime, when judged in step S902 described above that it is the command for the snapshot volume 102, the difference managing table 203 is then referred (FIG. 14: step S903) and it is judged in step S603 whether or not there is data in the readout request address of the snapshot volume 102 (FIG. 14: step S904).
When judged that there is the data in the snapshot volume 102, the directory 301 of the address changing memory 300 is referred (FIG. 14: step S906), and the address on the shared volume 103 at which the data is stored is acquired.
Subsequently, the data is read out from the shared volume 103 and transferred to the host, and the processing is ended (FIG. 14: steps S907, S908).
Further, when judged in step S902 described above that there is no data in the snapshot volume 102, the volume correspondence managing table 202 of the control memory 200 is referred in step S907, the data is read out from the master volume 101 that makes a pair with the snapshot volume 102, the readout data is transferred to the host in step S908, and the processing is ended. Here, the case of the snapshot method using the shared pool 103 is employed for the explanations. Other than such case, there is a method with which the snapshot volume 102 is created not with a virtual volume but with a normal volume, and the data is retracted to the snapshot volume without using the shared pool 103.
In such case, it is unnecessary to change the address from the virtual snapshot volume to the shared volume with this method. Thus, the processing can be simplified. However, when a plurality of snapshots are to be created, the disk capacity of several times larger than that of the master volume is used as in the case of mirroring. When executing backup with the snapshot method, it is necessary to determine the method by considering the advantages and disadvantages of those methods.
Further, other than Patent Document 1 described above, known as the related techniques are Patent Documents 2 and 3 mentioned below.
Out of those, the technique disclosed in Patent Document 2 (Japanese Unexamined Patent Publication 2002-373093) is known as a technique related to managing snapshot differences. The technique disclosed in Patent Document 3 (WO 2009/154272) is a version managing system targeted at image files regarding virtual machines, which is known as a system that makes it possible to refer to the differences between the versions.
The snapshot volume 102 acquired by the method disclosed in Patent Document 1 described above is used for various purposes. For example, as the used methods for backup, there is a method with which the duplication of the master volume updated as needed is acquired regularly and the image of the master volume 101 at a certain point is restored from the snapshot volume 102 as necessary. There is also a method with which the image of the master volume 101 at a certain point is backed up in a secondary backup device such as a magnetic tape through the snapshot volume 102.
Further, as a secondary use purpose of the data, there is also a use method with which a new development work is executed based on actual work data by utilizing the acquired snapshot volume 102. In the case of the secondary use, update may occur in the snapshot volume in some cases.
In the meantime, in a case where update occurs in the snapshot volume 102 while the generations of a plurality of snapshot volumes 102 are being managed, it takes time for the update processing in order to hold the snapshot volumes 102 between the generations.
Now, there is considered a case where data update occurs for page 2 of the snapshot volume LV12 in the state shown in FIG. 15.
When there is update of data "HH" occurred in page 2 of the snapshot volume LV12, it becomes necessary to execute processing for retracting the data of "CC" of page 2 of LV12 to page 2 of LV11 in order to hold the volume image of LV11. Therefore, the data update processing for the snapshot volume becomes degraded in terms of the performance compared to that of the update processing for the master volume.
Further, with the technique depicted in Patent Document 1 described above, it is unnecessary to change the address from the virtual snapshot volume to the shared volume. Thus, the processing is simplified. However, when a plurality of snapshots are to be created, the disk capacity of a plurality of times larger than that of the master volume is used as in the case of mirroring.
Furthermore, with each of Patent Documents 1 to 3 described above, there is always a load imposed upon the master volume especially when executing write command processing for the snapshot volume (the duplication volume) from the host.
It is therefore an exemplary object of the present invention to improve the inconveniences of the related techniques and, more specifically, to provide a data duplication system, a data duplication method, and a program thereof with which data update processing of the snapshot volume as a duplication volume can be executed smoothly without imposing a load on the master volume at the time of executing write command processing inputted from outside and with which the usability of the duplication volume can be improved thereby.
In order to achieve the foregoing object, the data duplication system according to an exemplary aspect of the invention is a snapshot-type data duplication system which includes: duplication volumes having a same capacity as that of a master volume; a shared pool volume which stores duplication data of the duplication volumes; and a main control unit which manages data accesses for the duplication data made from outside (a host computer) to the duplication volumes and manages a storing place of the duplication data, wherein the main control unit includes a data duplication control module which manages data accesses made from outside to the duplication volume, and an address changing module which manages the storing place of the duplication data.
Further, the data duplication control module includes a data duplication update processing function which duplicates data of the master volume to the duplication volume when updating the master volume, and directly updates the data of the duplication volume when updating the data of the duplication volume.
In order to achieve the foregoing object, the data duplication method according to another exemplary aspect of the invention is a data duplication method used in a snapshot-type data duplication system which includes duplication volumes for a master volume, a shared pool volume which stores duplication data of the duplication volumes, and a main control unit which manages data accesses for the duplication data made from outside (a host computer) to the duplication volumes and manages a storing place of the duplication data, and the method includes: judging whether or not update processing for the duplication volume is already executed by referring to an update managing table set in advance, when a write command for the duplication volume is inputted (an update processing judging step); specifying an address of the shared pool volume allotted in advance to the duplication volume as a target of the write command and writing data that corresponds to the write command thereto, when judged in the update processing judging step that there is a difference in the duplication volume (a shared volume writing step/a first step); and storing, to a prescribed memory, the address allotted on the shared volume that is a reference target of the update data of the duplication volume in a step of writing to the shared volume, and registering data showing that there is update data in the duplication volume to a corresponding section of the update managing table (an update data reference target registering step), wherein each processing content of judgment, writing, and registration done in each of the steps is executed by the main control unit successively.
In order to achieve the foregoing object, a data duplication method according to still another exemplary aspect of the invention is a data duplication method used in a snapshot-type data duplication system which includes duplication volumes for a master volume, a shared pool volume which stores duplication data of the duplication volumes, and a main control unit which manages data accesses for the duplication data made from outside (a host computer) to the duplication volumes and manages a storing place of the duplication data, and the method includes: judging whether or not update processing for the duplication volume is already executed by referring to an update managing table set in advance, when a write command for the duplication volume is inputted (an update processing judging step): searching a vacant region of the shared volume by referring to an allotment managing table set in advance, when judged in the update processing judging step that there is no difference (no update) in the duplication volume (a vacant region searching step); writing data that corresponds to the write command to the vacant region, when the vacant region of the shared pool volume is found in the vacant region searching step (a shared volume writing step/a second step); storing, to a prescribed memory, an address allotted on the shared volume that is a reference target of the update data of the duplication volume in the shared volume writing step, and registering data showing that there is update data in the duplication volume to a corresponding section of the update managing table (an update data reference target registering step), wherein each processing content of judgment, searching, writing, and registration done in each of the steps is executed by the main control unit. In order to achieve the foregoing object, the data duplication program according to still another exemplary aspect of the invention is a data duplication method is used in a snapshot-type data duplication system which includes duplication volumes for a master volume, a shared pool volume which stores duplication data of the duplication volumes, and a main control unit which manages data accesses for the duplication data made from outside (a host computer) to the duplication volumes and manages a storing place of the duplication data, and the program includes: an update processing judging function for judging whether or not update processing for the duplication volume is already executed by referring to an update managing table set in advance, when a write command for the duplication volume is inputted: a shared pool volume writing processing function (a first writing processing function) for specifying an address of the shared volume allotted in advance to the duplication volume as a target of the write command and writing data that corresponds to the write command thereto, when judged by the update processing judging function that there is a difference in the duplication volume; and an update data reference target registering processing function for storing, to a prescribed memory, the address allotted on the shared volume that is a reference target of the update data of the duplication volume by the shared pool volume writing processing function (the first processing function) and for registering data showing that there is update data in the duplication volume to a corresponding section of the update managing table, wherein each processing content of judgment, writing, and registration done in each of the processing functions is executed by a computer that is provided to the main control unit.
In order to achieve the foregoing object, the data duplication program according to still another exemplary aspect of the invention is a data duplication method is a data duplication processing program used in a snapshot-type data duplication system which includes duplication volumes for a master volume, a shared pool volume which stores duplication data of the duplication volumes, and a main control unit which manages data accesses for the duplication data made from outside (a host computer) to the duplication volumes and manages a storing place of the duplication data, and the program includes: an update processing judging function for judging whether or not update processing for the duplication volume is already executed by referring to an update managing table set in advance, when a write command for the duplication volume is inputted: a vacant region search processing function for searching a vacant region of the shared volume by referring to an allotment managing table set in advance, when judged by the update processing judging function that there is no difference (no update) in the duplication volume; a shared volume writing processing function (a second processing function) for writing data that corresponds to the write command to the vacant region, when the vacant region of the shared volume is found by the vacant region search processing function; and an update data reference target registering processing function for storing, to a prescribed memory, an address allotted on the shared volume that is a reference target of the update data of the duplication volume by the shared volume writing processing function, and for registering data showing that there is update data in the duplication volume to a corresponding section of the update managing table, wherein each processing content of judgment, searching, writing, and registration done in each of the processing functions is executed by a computer that is provided to the main control unit.

Data duplication system, data duplication method, and program thereof


A hydraulic control device for automatic transmissions is disclosed. The control device of this invention includes a valve means, of which the valve spool is selectively actuated by a drive pressure, the spring force of a valve spring or a control pressure from the PCV, with the control pressure being used in event of an R-N-D shifting operation. The hydraulic control device thus slowly releases the front clutch pressure during an N-D shifting operation and quickly releases the front clutch pressure during an R-N-D shifting operation, thus smoothly performing the R-N-D shifting operation without generating any shifting shock.

1. Field of the Invention
The present invention relates, in general, to 4-stage automatic transmissions used for electronically changing the speed of a driven shaft of an automobile between four stages and, more particularly, to a hydraulic control device for such transmissions capable of performing an R-N-D shifting operation without generating any shifting shock, thus immediately and smoothly performing such an R-N-D shifting operation.
2. Description of the Prior Art
As well known to those skilled in the art, an automatic transmission for automobiles is comprised of a torque converter, a change gear mechanism and a hydraulic control circuit. The change gear mechanism is connected to the torque converter, while the hydraulic control circuit selectively actuates the gears of the change gear mechanism in accordance with running conditions of a car.
In the torque converter, an impeller is directly connected to the crank shaft of an engine, while a turbine is directly connected to the driving shaft of the transmission and is placed opposite to the impeller. In the operation of the torque converter, pressurized oil is fed from the impeller to the turbine, thus transmitting kinetic energy to the turbine prior to being returned to the impeller. In order to change the flowing direction of return oil and increase torque of the impeller, the torque converter also includes a stator.
In the operation of the automatic transmission, engine output power is primarily transmitted to the impeller of the torque converter and is secondarily transmitted to the change gear mechanism through the turbine of the converter. The change gear mechanism is an epicyclic gear train, which is comprised of a sun gear, a ring gear and a gear carrier. When the gears of the epicyclic gear train are appropriately controlled, they convert the torque from the turbine into a speed change ratio due to their relative rotating motions prior to transmitting the torque to the driven shaft of the transmission.
In order to control the gears of the change gear mechanism, the transmission also includes a plurality of frictional members, such as a front clutch, a rear clutch, a low-reverse brake, an end clutch and a quick-down brake. The above frictional members are actuated by pressurized oil output from an engine-operated oil pump.
When a plurality of sensors, which are mounted to predetermined parts of a car, apply signals, indicative of running conditions of the parts, to a TCU (Transmission Control Unit), the TCU operates the signals and controls a plurality of solenoid valves. The solenoid valves are mounted to the oil passages extending from the oil pump to the frictional members, thus controlling pressurized oil for the frictional members under the control of the TCU. When the oil pressure in the oil passages is partially changed by the solenoid valves, a plurality of valves of the oil passages are operated to control the oil pressure acting on the frictional members. Therefore, the frictional members control the gears of the change gear mechanism in accordance with the oil pressure acting on the frictional members.
FIG. 6 shows the construction of a typical hydraulic control device for 4-stage automatic transmissions.
As shown in the drawing, the typical hydraulic control device for automatic transmissions includes a manual valve 52, an SCV (Shift Control Valve), a reducing valve 53 and a PCV (Pressure Control Valve). The manual valve 52 is operated in conjunction with a gear shifting lever and receives pressurized oil from both an oil pump 50 and a regulator valve 51. The SCV selectively generates an oil pressure corresponding to one of the 1st to 4th stages in response to the pressure from the manual valve 52, thus setting a desired stage. The reducing valve 53 generates a stable reference, control pressure for controlling the valve spools of the valves, which are controlled by solenoid valves. Meanwhile, the valve spool of the PCV is controlled by the control pressure of the reducing valve 53 so that the PCV generates a control pressure for allowing the frictional members of the change gear mechanism to be smoothly operated during a shifting operation.
The hydraulic control device also includes two SCSVs (Shift Control Solenoid Valves): an SCSV-A and an SCSV-B, and a PCSV (Pressure Control Solenoid Valve). The two SCSVs commonly control the SCV under the control of the TCU, while the PCSV controls the PCV.
An N-D control valve 54 is to prevent any shifting shock during an N-D shifting action of the gear shifting lever, while an N-R control valve 55 is to prevent any shifting shock during an N-R shifting action of the gear shifting lever. The hydraulic control device also has an 1-2 shift valve 56. The valve spool of the 1-2 shift valve 56 is operated by either the 2nd-stage or reverse-stage pressure applied thereto through the 2nd-stage oil passage of the SCV, thus controlling the oil passages for both the SA (Servo Apply) part of the quick-down brake and the low-reverse brake.
The hydraulic control device further includes a 2-3/4-3 shift valve 57, of which the valve spool is connected to the 3rd and 4th-stage oil passages from the SCV at its both ends. In a 3rd-stage, the valve spool of the above valve 57 is operated by the 3rd-stage pressure of the 3rd-stage oil passage, thus allowing the control pressure of the PCV to pass through the 1-2 shift valve 56 prior to controlling both the SR (Servo Release) part of the quick-down brake and the front clutch. Meanwhile, in a 4th-stage, the valve spool of the shift valve 57 is operated by the 4th-stage pressure of the 4th-stage oil passage, thus allowing the control pressure to be released from both the SR part of the quick-down brake and the front clutch through the valve 57.
The rear clutch is controlled by a spring-biased RCEV (Rear Clutch Exhaust valve). In a 1st, 2nd or 3rd-stage with the gear shifting lever being positioned in the D-range, the RCEV is biased by its spring installed at one end thereof, thus applying a drive pressure to the rear clutch. Meanwhile, when a 4th-stage pressure acts on the opposite end of the RCEV, the RCEV stops the pressure for the rear clutch and allows the pressure of the rear clutch to be released. When the 4th-stage pressure is removed from the RCEV, the valve spool of the RCEV is operated by the oil pressure from the 2-3/4-3 shift valve 57, thus applying the oil pressure to the rear clutch.
The hydraulic control device also includes an end clutch valve 58. The valve spool of the above valve 58 is operated by the 2nd or 3rd-stage pressure from the SCV or by the control pressure from the 2-3/4-3 shift valve 57, thus controlling the oil pressure for the end clutch.
The operation of the above hydraulic control device of the automatic transmission will be described hereinbelow, with the device performing an R-N-D shifting operation.
When the gear shifting lever is positioned in the R-range, the reverse-stage pressure from the manual valve 52 is applied to the regulator valve 51, thus allowing the regulating valve 51 to regulate the oil pressure. The oil pressure thus becomes slightly higher than a Drive-stage pressure and is suitable for a reverse stage. The regulated oil pressure of the regulator valve 51 is, thereafter, applied to both the SR part of the quick-down brake and the front clutch through the 2-3/4-3 shift valve 57. The regulated oil pressure is also applied to the low-reverse brake through in the order of the N-R control valve 55 and the 1-2 shift valve 56. Therefore, both the front clutch and the low-reverse brake are operated, while the change gear mechanism forms a speed change ratio suitable for the reverse stage.
When a driver shifts the gear shifting lever from the R-range into the D-range with the lever passing through the N-range, the manual valve 52 releases the pressure from the reverse-stage pressure passage, while providing a control pressure for the regulator valve 51, thus forming a line pressure. The manual valve 52 also provides a drive pressure for the hydraulic circuit.
When the reverse-stage pressure is released as described above, the pressurized oil of both the front clutch and the SR part of the quick-down brake is drained through in the order of the 2-3/4-3 shift valve 57 and an orifice "O". Meanwhile, the pressurized oil of the low-reverse brake in the above state is drained through the 1-2 shift valve 56.
When the gear shifting lever is positioned in the P, R or N-range, the SCSV-A is turned on with the SCSV-B being turned off. Therefore, the drive pressure from the manual valve 52 allows the SCV to instantaneously generate a 2nd-stage pressure. The 2nd-stage pressure from the SCV actuates both the 1-2 shift valve 56 and the end clutch valve 58.
Meanwhile, the TCU in the above state controls the PCSV so that the drive pressure from the manual valve 52 is controlled when it passes through the PCV prior to being applied to the rear clutch through the N-D control valve 54. The N-D control valve 54 also allows the drive pressure from the manual valve 52 to be applied to the SA part of the quick-down brake through the 1-2 shift valve 56.
Of course, when a predetermined time is elapsed after the starting of a gear shifting action, the increased oil pressure for the rear clutch operates the valve spool of the N-D control valve 54, thus allowing the pressure from the PCV to be applied to the SA part of the quick-down brake. On the other hand, the drive pressure from the manual valve 52 is also applied to the rear clutch through a check valve "C", which is connected to the N-D control valve 54 in parallel. In the above state, the TCU checks the shifting operation and gradually removes the 2nd-stage pressure by turning on the SCSV-A, thus releasing the SA pressure and setting the speed stage into the lst-stage of the D-range.
When the pressurized oil is drained from both the front clutch and the SR part of the quick-down brake through the 2-3/4-3 shift valve 57 in the R-N shifting operation, the oil is controlled by the orifice "O", thus being slowly drained without generating any shifting shock.
However, the above hydraulic control device is problematic in that the SA pressure may give a negative effect to the SR pressure during an R-N-D shifting operation, thus causing the SR pressure to partially remain in the SR part of the quick-down brake during the R-N-D shift operation. The remaining SR pressure acts on the front clutch, which communicates with the SR part of the quick-down brake. Therefore, the hydraulic control device unexpectedly allows both the front clutch and the rear clutch to be actuated at the same time, causing a tie-up shock. Due to such a tie-up shock, the hydraulic control device regrettably increases the shifting shock and deteriorates the shifting sense during such an R-N-D shifting operation.

Hydraulic control device for automatic transmissions


An appliance that includes a cabinet having a base panel interlocked with a side panel is provided. The base panel includes interlocking features, including an interlock housing defining a tab receiving slot and an interlock projection projecting upward from the base panel. The side panel includes a panel body and a mounting flange extending from the panel body. The side panel also includes interlocking features, including a locking tab extending from the mounting flange. Further, the mounting flange defines a locking slot. To interlock the side panel with the base panel, the locking tab of the side panel is received within the tab receiving slot of the interlock housing of the base panel and the interlock projection is received within the locking slot of the mounting flange of the side panel.

Many consumer appliances include cabinets or outer housings. The cabinet can provide a structural outer shell of the appliance and can house various internal components. For instance, dryer appliances typically include a cabinet with a drum rotatably mounted therein. During operation, a motor rotates the drum, e.g., to tumble articles located within a chamber defined by the drum. An air handler or blower moves air heated by a heater assembly through the chamber in order to dry moisture-laden articles positioned therein. Such components are housed within the cabinet.
In some instances, cabinets for consumer appliances are made up of two or more panels that are connected together during assembly. For instance, a cabinet for a consumer appliance can include at least one side panel connected to a bottom or base panel. Conventionally, assembly of such panels has required a minimum of three operators to change the orientation of the cabinet assembly so that all of the screws to connect the side panel with the base panel can be properly accessed and driven. Furthermore, in some instances, ten or more screws have been required to connect a side panel with a base panel. Consequently, assembly of such panels has conventionally presented a number of challenges.
Accordingly, an appliance having a cabinet that addresses one or more of the challenges noted above would be desirable.


A collapsible filtration tank for a dust collector includes an outer frame, an engaging base and a filter. The outer frame is formed cylindrical, having plural meshes formed in its circumferential wall. The engaging base is formed annular, installed around the opening of the outer frame. The filter is inserted in a chamber of the outer frame and restrictively blocked by the blocking edge of the engaging base. Thus, the filter can be independently replaced with a new one instead of shifting the whole filtration tank.

1. Field of the Invention
This invention relates to a collapsible filtration tank for a dust collector.
2. Description of the Prior Art
As disclosed in Taiwan Patent No. 587481 shown in FIG. 1, a conventional dust collection tank 1 includes an outer frame 2, a filtration tank 3 integrally made of filtration paper and installed inside the outer frame 2, a bottom base 4 fixed at the bottom of the outer frame 2, and a cleaning device 5 fixed in an upper portion of the filtration tank 3 for swiftly and easily cleaning up the dust.
However, the filtration tank 3 is to gradually lower its filtration efficiency during its service life, it has to be periodically replaced with a new. While the integral structure of the outer frame 2 and the filtration tank 3 can achieve a great air-tight effect, the outer frame 2 must be discarded together with the filtration tank 3, stepping up cost of usage.

Collapsible filtration tank for a dust collector


A process for producing an oxide crystalline thin film having a structure in which atomic layers having different chemical compositions are laminated along the film thickness direction, the process including the steps of depositing amorphous atomic layers on a substrate, layer by layer and heating the amorphous deposit to crystallize the deposit, the respective amorphous atomic layers having the same chemical compositions as those of the corresponding atomic layers of the oxide crystal structure and being stacked in an order corresponding to the atomic lamination of the crystal structure.

1. Field of the Invention
The present invention relates to a process for producing an oxide crystal thin film.
2. Description of the Related Art
Two types of processes for producing an oxide crystal thin film are known, i.e., a process in which a mixture of component powders is fired at a high temperature, and a process in which a crystallization is simultaneously effected during deposition on a heated substrate by vapor deposition or sputtering.
In a multiple component oxide, however, phases having close free energies of formation grow simultaneously to form a mixture of phases containing undesired phases, and thus a required property cannot be obtained. Moreover, particularly in a thin film, a three dimensional nucleation "Q" occurs on a substrate "P", as shown in FIG. 4, which causes an uneven film surface and makes it impossible to provide a good thin film having a flat surface.
The mixed phases and the three dimensional nucleation are a serious defect in materials such as oxide superconductor thin films having properties which are adversely affected by these phenomena.
The oxide superconductor has a very high critical temperature, Tc, in comparison with that of metal alloy superconductors, and therefore, is thought to be suitable for various applications, including conductors in memories and logic circuits, etc., of computers, superconductor magnets, superconducting cables, superconducting electric power storage, and other general electrical wiring, and for other applications thereof including magnetically levitated trains, accelerators, and medical devices, etc.
The oxide superconductor is composed of numerous component elements, and the superconductive properties including the critical temperature are very sensitive to the chemical composition of the oxide, and thus an inclusion of phases other than a single desired phase of a predetermined chemical composition must be prevented. Moreover, particularly in a thin film, a three-dimensional nucleation, which causes an uneven film surface, must be prevented at all costs.
Bi.sub.2 Sr.sub.2 Ca.sub.2 Cu.sub.3 O.sub.10, for example, is a high temperature superconductor having a highest level of Tc (110K) among known superconducting substances, but when producing Bi.sub.2 Sr.sub.2 Ca.sub.2 Cu.sub.3 O.sub.10 by a process including a firing of a powder mixture, a problem arises in that a solid state reaction induced by the heating for the firing causes a ready formation of a mixture of three phases having close free energies of formation, i.e., a Bi.sub.2 Sr.sub.2 Cu.sub.1 O.sub.6 phase having a Tc of 7K, a Bi phase having a Tc of 80K, and =Bi a Tc of 110K, and therefore, the characteristic excellent properties expected from a single Bi.sub.2 Sr.sub.2 Ca.sub.2 Cu.sub.3 O.sub.10 phase cannot be obtained. Moreover, another problem arises in that a thin film having a flat surface cannot be obtained, because a three-dimensional nucleation readily occurs.
The same problems arise, for example, in a process for producing an oxide superconductor coating as disclosed in Japanese Unexamined Patent Publication (Kokai) No. 1-167912, in which a RBa.sub.2 Cu.sub.3 O.sub.7-x type oxide superconductor is vapor-deposited on an MgO crystal substrate heated at a temperature of 500.degree. C. or lower, to form an amorphous film which is then heated to a temperature of from 800.degree. to 950.degree. C. to be crystallized, followed by a heating at a temperature of from 400.degree. to 550.degree. C. to transform the film into a superconductor.
Another process was proposed by J. N. Eckstein et al. in the Journal of Vacuum Science Technology, B7(2), March/April 1989, pages 319-323, in which oxide superconductor thin films, such as Bi.sub.2 Sr.sub.2 Ca.sub.2 Cu.sub.3 O.sub.10, are formed by a continuous deposition on a substrate heated and held at a temperature high enough to induce a simultaneous crystallization of a deposit on the substrate. In this process, the deposition is carried out in such a manner that atomic layers having predetermined chemical compositions are deposited layer-by-layer on the substrate, and that each deposited atomic layer is immediately crystallized upon contact with the heated substrate, i.e., simultaneously with the deposition thereof. This process, however, does not consider the prevention of an occurrence of an uneven film surface due to a three-dimensional growth, which often occurs at a substrate temperature high enough to induce the simultaneous crystallization of the atomic layer when deposited on the substrate.

Process for producing bismuth-based oxide superconducting films


A method of forming a three-dimensional memory is provided. A stacked structure including semiconductor layers and insulating layers arranged alternately is formed on a substrate. The stacked structure is patterned to form a mesh structure having first strips extending in a first direction and second strips extending in a second direction. The first strips and the second strips intersect with each other. The mesh structure has first holes. A dielectric layer is formed in each first hole. At least a portion of the first strips of the mesh structure is removed to form second holes and bit line stacked structures separated from each other. A charge storage layer is formed on sidewall and bottom of each second hole. A gate pillar extending in a third direction is formed on each charge storage layer in the second hole. Word lines extending in the first direction are formed on the gate pillars.

1. Field of Invention
The present invention relates to a semiconductor device and a method of forming the same, and more particularly to a three-dimensional memory and a method of forming the same.
2. Description of Related Art
As the demand for storage subsystems of consumer products is increased, the standard for the reading/writing speeds or capacities of products is higher, and thus, high-capacity related products have become the mainstream in the industry. Accordingly, the development of memory, especially NAND flash memory, has to respond to this demand.
However, the existing planar NAND flash memory is limited by the device critical dimension in integrated circuits, so that the miniaturization of storage memory cells faces a bottleneck. Therefore, in order to achieve a greater storage capacity and a lower cost per bit, designers seek for a three-dimensional NAND flash memory with multiple planes.

Three-dimensional memory and method of forming the same


A resonator with stabilized resonant frequency that includes a lower electrode, a plurality of upper electrodes, and a piezoelectric film disposed between the lower electrode and the plurality of upper electrodes. Moreover, an upper lid having a first and second opposing surfaces is provided so that the first surface faces and seals a first surface of the resonator. In addition, a lower lid having a first and second opposing surfaces is provided so that the first surface faces and seals a second surface of the resonator. The resonator further includes a power terminal electrically connected to the upper electrodes and a ground terminal provided on the second surface of the upper lid. The lower electrode is electrically connected to the ground terminal by the upper lid.

Currently, piezoelectric resonator devices using MEMS (Micro Electro Mechanical Systems) technology can be used, for example, as timing devices. Typically, these piezoelectric resonator devices are mounted on a printed circuit board built in an electronic apparatus such as a smartphone.
Resonators used in such piezoelectric resonator devices include a resonator that provides contour vibration with harmonic in which a piezoelectric film is formed on a lower electrode and a plurality of upper electrodes are formed to cover the piezoelectric film. Patent Document 1 (identified below) discloses a configuration of a resonator in which two upper electrodes are respectively connected to an input terminal and an output terminal, and a lower electrode is floating.
Patent Document 1: U.S. Patent Application Publication No. 2012/0293520.
Using the technology disclosed in Patent Document 1, if another electric potential is present around the lower electrode, the electric potential may affect the lower electrode. As the result, the resonant frequency of the resonator may vary.


The invention is directed to a laterally inserted spinous process plating device and a method for installing the device using a minimally invasive procedure. The device includes a partially threaded bolt as well as a contralateral and ipsilateral fixation plates, a deployment nut, a lag nut and a locking nut. Each fixation plate includes a pair of wing portions that are pivotally connected to one another to facilitate installation. The each of the fixation plates includes anchoring elements.

The human spine is arranged as a series of vertebrae separated by intervertebral discs often referred to as the backbone. These intervertebral discs perform a variety of functions. In particular the discs allow the spine to twist and flex as well as functioning as a cushion to absorb force or shock between adjacent vertebrae. Spinal discs are subject to physical degeneration either as a result of physical injury, age, disease, genetic propensity or a combination thereof. The degenerative disc may lessen the discs ability to allow relative movement between adjacent vertebrae and reduce its cushioning characteristics and as the disc breaks down the spacing between adjacent vertebras will be reduced. The rupturing, tearing of the disc may also lead to a condition known as spinal stenosis. Spinal stenosis is a progressive narrowing if the opening of the spinal canal. Each vertebra has a hole or channel passing through it. These holes are in alignment and form the spinal canal. A relatively large bundle of nerves known as the spinal cord runs through the spinal canal. When the spinal cord narrows the nerve roots in the spinal cord are compressed. The pressure on the nerve roots may cause chronic pain and numbness and in some instances cause loss of motive functions within the body. Most often the lower back and legs are affected by spinal stenosis. Cervical spinal stenosis is a narrowing if the vertebrae of the neck referred to as cervical vertebrae. In addition to exerting pressure on the spinal cord cervical stenosis can also put pressure on the arteries entering the spinal column thereby limiting the flow of blood to the other portions of the spinal cord.
Spinal stenosis and disc degeneration can be progressive diseases. Quite often these diseases are treated surgically by reestablishing a more normal spacing between the adjacent vertebrae. The restoration of the vertebral spacing may provide the necessary to relieve the pressure on the affected nerve tissue. The surgical procedure is intended to remove bone and other tissues that have entered the spinal canal or put pressure on the spinal cord. Often it is necessary to surgically remove the disc material as well. In general the restoration of the vertebral spacing is achieved by insertion of a spacer. The spacer element is formed from bone, metal or plastic material and enables the vertebrae to grow together, or fuse. Typically bone plates and or pedicle screws are utilized to stabilize and maintain proper alignment between adjacent vertebrae as they are fused together.
The installation of these intervertebral spacers significantly within the patient's body and proximate to the spine can be an invasive process requiring prolonged hospitalization and extended amounts of rehabilitation. It has been well recognized that a spacer device that can be deployed in a minimally invasive manner would result in a substantial improvement in the outcome of the procedure.

Spinous process fixation plate and minimally invasive method for placement


Several embodiments of massively parallel interface structures are disclosed, which may be used in a wide variety of permanent or temporary applications, such as for interconnecting integrated circuits (ICs) to test and burn-in equipment, for interconnecting modules within electronic devices, for interconnecting computers and other peripheral devices within a network, or for interconnecting other electronic circuitry. Preferred embodiments of the massively parallel interface structures provide massively parallel integrated circuit test assemblies. The massively parallel interface structures preferably use one or more substrates to establish connections between one or more integrated circuits on a semiconductor wafer, and one or more test modules. One or more layers on the intermediate substrates preferably include MEMS and/or thin-film fabricated spring probes. The parallel interface assemblies provide tight signal pad pitch and compliance, and preferably enable the parallel testing or burn-in of multiple ICs, using commercial wafer probing equipment. In some preferred embodiments, the parallel interface assembly structures include separable standard electrical connector components, which reduces assembly manufacturing cost and manufacturing time. These structures and assemblies enable high speed testing in wafer form.

Integrated circuits are typically tested in wafer form (wafer sort) before they are packaged. During wafer sort, integrated circuits are tested one or few at a time, even though there may be hundreds or even hundreds of thousands of the same integrated circuit located on a wafer. The packaged integrated circuits are then tested again, and burned-in, if necessary.
Parallel testing on the wafer level has been limited in number and has so far been limited to low pin count devices, due to the difficulty in managing the large number of interconnects, and the limited amount of electronics which can conventionally be placed close to a wafer under test.
Attempts have also been made to burn-in ICs while in the wafer form. However, wafer-level burn-in is plagued with multiple problems, such as thermal expansion mismatch between the connector and the silicon wafer under test. Conventional structures, such as large area substrates having a large plurality of fanout traces which are electrically connected to pin or socket connectors, are typically implemented to manage connections between the IC under test, test electronics, and power management electronics.
The density of integrated circuits on semiconductor wafers continues to increase, due to semiconductor device scaling, with more gates and memory bits per unit area of silicon. As well, the use of larger semiconductor wafers (e.g. often having a nominal diameter 8 inches or 12 inches) has become common. However, semiconductor test costs have increased on a cost per unit area of silicon basis. Therefore, semiconductor test costs have increased disproportionately over time, to become a greater percentage of the total manufacturing cost for each integrated circuit device.
Furthermore, advances in chip scale packaging (CSP) and other forms of small footprint packages have often made traditional packaged IC handlers obsolete for testing and burn-in.
In some conventional large surface area substrate integrated circuit (IC) test boards, electrical contacts between the test board and an integrated circuit wafer are typically provided by tungsten needle probes. However, tungsten needle probe technology is not able to meet the interconnect requirements of advanced semiconductors having higher pin counts, smaller pad pitches, and higher clock frequencies.
While emerging technologies have provided spring probes for different probing applications, most probes have inherent limitations, such as limited pitch, limited pin count, varying levels of flexibility, limited probe tip geometries, limitations of materials, and high costs of fabrication.
K. Banerji, A. Suppelsa, and W. Mullen III, Selectively Releasing Conductive Runner and Substrate Assembly Having Non-Planar Areas, U.S. Pat. No. 5,166,774 (24 Nov. 1992) disclose a runner and substrate assembly which comprises "a plurality of conductive runners adhered to a substrate, a portion of at least some of the conductive runners have non-planar areas with the substrate for selectively releasing the conductive runner from the substrate when subjected to a predetermined stress."
A. Suppelsa, W. Mullen III and G. Urbish, Selectively Releasing Conductive Runner and Substrate Assembly, U.S. Pat. No. 5,280,139 (18 Jan. 1994) disclose a runner and substrate assembly which comprises "a plurality of conductive runners adhered to a substrate, a portion of at least some of the conductive runners have a lower adhesion to the substrate for selectively releasing the conductive runner from the substrate when subjected to a predetermined stress."
D. Pedder, Bare Die Testing, U.S. Pat. No. 5,786,701 (28 Jul. 1998) disclose a testing apparatus for testing integrated circuits (ICs) at the bare die stage, which includes "a testing station at which microbumps of conductive material are located on interconnection trace terminations of a multilayer interconnection structure, these terminations being distributed in a pattern corresponding to the pattern of contact pads on the die to be tested. To facilitate testing of the die before separation from a wafer using the microbumps, the other connections provided to and from the interconnection structure have a low profile."
D. Grabbe, I. Korsunsky and R. Ringler, Surface Mount Electrical Connector, U.S. Pat. No. 5,152,695 (6 Oct. 1992) disclose a connector for electrically connecting a circuit between electronic devices, in which "the connector includes a platform with cantilevered spring arms extending obliquely outwardly therefrom. The spring arms include raised contact surfaces and in one embodiment, the geometry of the arms provide compound wipe during deflection."
H. Iwasaki, H. Matsunaga, and T. Ohkubo, Partly Replaceable Device for Testing a Multi-Contact Integrated Circuit Chip Package, U.S. Pat. No. 5,847,572 (8 Dec. 1998) disclose "a test device for testing an integrated circuit (IC) chip having side edge portions each provided with a set of lead pins. The test device comprises a socket base, contact units each including a contact support member and socket contact numbers, and anisotropic conductive sheet assemblies each including an elastic insulation sheet and conductive members. The anisotropic conductive sheet assemblies are arranged to hold each conductive member in contact with one of the socket contact members of the contact units. The test device further comprises a contact retainer detachably mounted on the socket base to bring the socket contact members into contact with the anisotropic sheet assemblies to establish electrical communication between the socket contact members and the conductive members of the anisotropic conductive sheet assemblies. Each of the contact units can be replaced by a new contact unit if the socket contact members partly become fatigued, thereby making it possible to facilitate the maintenance of the test device. Furthermore, the lead pins of the IC chip can be electrically connected to a test circuit board with the shortest paths formed by part of the socket contact members and the conductive members of the anisotropic conductive sheet assemblies."
W. Berg, Method of Mounting a Substrate Structure to a Circuit Board, U.S. Pat. No. 4,758,9278 (19 Jul. 1988) discloses "a substrate structure having contact pads is mounted to a circuit board which has pads of conductive material exposed at one main face of the board and has registration features which are in predetermined positions relative to the contact pads of the circuit board. The substrate structure is provided with leads which are electrically connected to the contact pads of the substrate structure and project from the substrate structure in cantilever fashion. A registration element has a plate portion and also has registration features which are distributed about the plate portion and are engageable with the registration features of the circuit board, and when so engaged, maintain the registration element against movement parallel to the general plane of the circuit board. The substrate structure is attached to the plate portion of the registration element so that the leads are in predetermined position relative to the registration features of the circuit board, and in this position of the registration element the leads of the substrate structure overlie the contact pads of the circuit board. A clamp member maintains the leads in electrically conductive pressure contact with the contact pads of the circuit board."
D. Sarma, P. Palanisamy, J. Hearn and D. Schwarz, Controlled Adhesion Conductor, U.S. Pat. No. 5,121,298 (9 Jun. 1992) disclose "Compositions useful for printing controllable adhesion conductive patterns on a printed circuit board include finely divided copper powder, a screening agent and a binder. The binder is designed to provide controllable adhesion of the copper layer formed after sintering to the substrate, so that the layer can lift off the substrate in response to thermal stress. Additionally, the binder serves to promote good cohesion between the copper particles to provide good mechanical strength to the copper layer so that it can tolerate lift off without fracture."
R. Mueller, Thin-Film Electrothermal Device, U.S. Pat. No. 4,423,401 (27 Dec. 1983) discloses "A thin film multilayer technology is used to build micro-miniature electromechanical switches having low resistance metal-to-metal contacts and distinct on-off characteristics. The switches, which are electrothermally activated, are fabricated on conventional hybrid circuit substrates using processes compatible with those employed to produce thin-film circuits. In a preferred form, such a switch includes a cantilever actuator member comprising a resiliently bendable strip of a hard insulating material (e.g. silicon nitride) to which a metal (e.g. nickel) heating element is bonded. The free end of the cantilever member carries a metal contact, which is moved onto (or out of) engagement with an underlying fixed contact by controlled bending of the member via electrical current applied to the heating element."
S. Ibrahim and J. Elsner, Multi-Layer Ceramic Package, U.S. Pat. No. 4,320,438 (16 Mar. 1982) disclose "In a multi-layer package, a plurality of ceramic lamina each has a conductive pattern, and there is an internal cavity of the package within which is bonded a chip or a plurality of chips interconnected to form a chip array. The chip or chip array is connected through short wire bonds at varying lamina levels to metallized conductive patterns thereon, each lamina level having a particular conductive pattern. The conductive patterns on the respective lamina layers are interconnected either by tunneled through openings filled with metallized material, or by edge formed metallizations so that the conductive patterns ultimately connect to a number of pads at the undersurface of the ceramic package mounted onto a metalized board. There is achieved a high component density; but because connecting leads are "staggered" or connected at alternating points with wholly different package levels, it is possible to maintain a 10 mil spacing and 10 mil size of the wire bond lands. As a result, there is even greater component density but without interference of wire bonds one with the other, this factor of interference being the previous limiting factor in achieving high component density networks in a multi-layer ceramic package."
F. McQuade, and J. Lander, Probe Assembly for Testing Integrated Circuits, U.S. Pat. No. 5,416,429 (16 May 1995) disclose a probe assembly for testing an integrated circuit, which "includes a probe card of insulating material with a central opening, a rectangular frame with a smaller opening attached to the probe card, four separate probe wings each comprising a flexible laminated member having a conductive ground plane sheet, an adhesive dielectric film adhered to the ground plane, and probe wing traces of spring alloy copper on the dielectric film. Each probe wing has a cantilevered leaf spring portion extending into the central opening and terminates in a group of aligned individual probe fingers provided by respective terminating ends of said probe wing traces. The probe fingers have tips disposed substantially along a straight line and are spaced to correspond to the spacing of respective contact pads along the edge of an IC being tested. Four spring clamps each have a cantilevered portion which contact the leaf spring portion of a respective probe wing, so as to provide an adjustable restraint for one of the leaf spring portions. There are four separate spring clamp adjusting means for separately adjusting the pressure restraints exercised by each of the spring clamps on its respective probe wing. The separate spring clamp adjusting means comprise spring biased platforms each attached to the frame member by three screws and spring washers so that the spring clamps may be moved and oriented in any desired direction to achieve alignment of the position of the probe finger tips on each probe wing".
D. Pedder, Structure for Testing Bare Integrated Circuit Devices, European Patent Application No. EP 0 731 369 A2 (Filed 14 Feb. 1996), U.S. Pat. No. 5,764,070 (9 Jun. 1998) discloses a test probe structure for making connections to a bare IC or a wafer to be tested, which comprises "a multilayer printed circuit probe arm which carries at its tip an MCM-D type substrate having a row of microbumps on its underside to make the required connections. The probe arm is supported at a shallow angle to the surface of the device or wafer, and the MCM-D type substrate is formed with the necessary passive components to interface with the device under test. Four such probe arms may be provided, one on each side of the device under test".
B. Eldridge, G. Grube, I. Khandros, and G. Mathieu, Method of Mounting Resilient Contact Structure to Semiconductor Devices, U.S. Pat. No. 5,829,128 (3 Nov. 1998), Method of Making Temporary Connections Between Electronic Components, U.S. Pat. No. 5,832,601 (10 Nov. 1998), Method of Making Contact Tip Structures, U.S. Pat. No. 5,864,946 (2 Feb. 1999), Mounting Spring Elements on Semiconductor Devices, U.S. Pat. No. 5,884,398 (23 Mar. 1999), Method of Burning-In Semiconductor Devices, U.S. Pat. No. 5,878,486 (9 Mar. 1999), and Method of Exercising Semiconductor Devices, U.S. Pat. No. 5,897,326 (27 Apr. 1999), disclose "Resilient contact structures are mounted directly to bond pads on semiconductor dies, prior to the dies being singulated (separated) from a semiconductor wafer. This enables the semiconductor dies to be exercised (e.g. tested and/or burned-in) by connecting to the semiconductor dies with a circuit board or the like having a plurality of terminals disposed on a surface thereof. Subsequently, the semiconductor dies may be singulated from the semiconductor wafer, whereupon the same resilient contact structures can be used to effect interconnections between the semiconductor dies and other electronic components (such a wiring substrates, semiconductor packages, etc.). Using the all-metallic composite interconnection elements of the present invention as the resilient contact structures, burn-in can be performed at temperatures of at least 150° C., and can be completed in less than 60 minutes". While the contact tip structures disclosed by B. Eldridge et al. provide resilient contact structures, the structures are each individually mounted onto bond pads on semiconductor dies, requiring complex and costly fabrication. As well, the contact tip structures are fabricated from wire, which often limits the resulting geometry for the tips of the contacts. Furthermore, such contact tip structures have not been able to meet the needs of small pitch applications (e.g. typically on the order of 50 μm spacing for a peripheral probe card, or on the order of 75 μm spacing for an area array).
T. Dozier II, B. Eldridge, G. Grube, I. Khandros, and G. Mathieu, Sockets for Electronic Components and Methods of Connecting to Electronic Components, U.S. Pat. No. 5,772,451 (30 Jun. 1998) disclose "Surface-mount, solder-down sockets permit electronic components such as semiconductor packages to be releaseably mounted to a circuit board. Resilient contact structures extend from a top surface of a support substrate, and solder-ball (or other suitable) contact structures are disposed on a bottom surface of the support substrate. Composite interconnection elements are used as the resilient contact structures disposed atop the support substrate. In any suitable manner, selected ones of the resilient contact structures atop the support substrate are connected, via the support substrate, to corresponding ones of the contact structures on the bottom surface of the support substrate. In an embodiment intended to receive an LGA-type semiconductor package, pressure contact is made between the resilient contact structures and external connection points of the semiconductor package with a contact force which is generally normal to the top surface of the support substrate. In an embodiment intended to receive a BGA-type semiconductor package, pressure contact is made between the resilient contact structures and external connection points of the semiconductor package with a contact force which is generally parallel to the top surface of the support substrate".
Other emerging technologies have disclosed probe tips on springs which are fabricated in batch mode processes, such as by thin-film or micro electronic mechanical system (MEMS) processes.
D. Smith and S. Alimonda, Photolithographically Patterned Spring Contact, U.S. Pat. No. 5,613,861 (25 Mar. 1997), U.S. Pat. No. 5,848,685 (15 Dec. 1998), and International Patent Application No. PCT/US 96/08018 (Filed 30 May 1996), disclose a photolithography patterned spring contact, which is "formed on a substrate and electrically connects contact pads on two devices. The spring contact also compensates for thermal and mechanical variations and other environmental factors. An inherent stress gradient in the spring contact causes a free portion of the spring to bend up and away from the substrate. An anchor portion remains fixed to the substrate and is electrically connected to a first contact pad on the substrate. The spring contact is made of an elastic material and the free portion compliantly contacts a second contact pad, thereby contacting the two contact pads." While the photolithography patterned springs, as disclosed by Smith et al., are capable of satisfying many IC probing needs, the springs are small, and provide little vertical compliance to handle the planarity compliance needed in the reliable operation of many current IC prober systems. Vertical compliance for many probing systems is typically on the order of 0.004″-0.010″, which often requires the use of tungsten needle probes.
The round trip transit time between the device under test and conventional test equipment is often longer then the stimulus to response times of high speed electronic circuits. It would be advantageous to provide a test interface system which reduces this transit time, by placing high speed test electronics in close proximity of the device under test, while meeting space and cost constraints. Furthermore, it would be advantageous to provide a test interface system which minimizes the cost, complexity, tooling, and turn around time required to change the test structure for the testing of different devices. The development of such a system would constitute a major technological advance.
It would be advantageous to provide a test interface system which provides probe contact with many, hundreds, or even hundreds of thousands of pads for one or more devices on a semiconductor wafer, such as for massively parallel testing and/or burn-in applications, wherein the pads may be in close proximity of one another, with a minimum spacing approaching 1 mil or less, while providing a uniform force across all probes over the entire wafer. It would also be advantageous to provide such a test interface system which organizes and manages the interconnections between the device under test and the tester electronics, while maintaining signal integrity and power and ground stability, and assures that no two or more adjacent pads are contacted by a single test probe tip. Furthermore, it would be advantageous to provide such a test structure which preferably provides planarity compliance with the devices under test. The development of such a system would constitute a further technological advance.
In addition, it would be advantageous to provide such a test system which preferably provides continuous contact with many, hundreds, or even hundreds of thousands of pads for one or more devices on a semiconductor wafer over a wide temperature range, while providing thermal isolation between the test electronics and the devices under test. As well, it would be advantageous to provide a system for separate thermal control of the test system and of the devices under test.
It would also be advantageous to provide a test interface system which may be used to detect power to ground shorts in any die quickly, and to isolate power from a die having a detected power to ground short, before damage is done to the test electronics. In addition, it would be advantageous to provide a test interface structure which can detect that the contacts to many, hundreds, or even hundreds of thousands of pads are reliably made and are each of the contacts are within the contact resistance specification, to assure that the self inductance and self capacitance of each signal line are below values that would adversely affect test signal integrity, and to assure that the mutual inductance and mutual capacitance between pairs of signal lines and between signal lines and power or ground lines are below values that would adversely affect test signal integrity. As well, it would also be advantageous to provide a test interface structure which provides stimulus and response detection and analysis to many, hundreds, or even hundreds of thousands, of die under test in parallel, and which preferably provides diagnostic tests to a failed die, in parallel with the continued testing of all other die. Furthermore, it would be advantageous to provide a large array interface system which can reliably and repeatedly establish contact to many, hundreds, or even hundreds of thousands of pads, without the need to periodically stop and inspect and/or clean the probe interface structure.
It would also be advantageous to provide a system for massively parallel interconnections between electrical components, such as between computer systems, which utilize spring probes within the interconnection structure, to provide high pin counts, small pitches, cost-effective fabrication, and customizable spring tips. The development of such a method and apparatus would constitute a major technological advance.

Massively parallel interface for electronic circuit


A lighted switch unit having a light-shield structure at a lower end of an operating body is provided, in which an outer surface of the operating body is covered with a non-translucent covering layer, and a light-transmitting display part is formed on an upper part or side part of the body. The light-shield structure is such as an inclined part formed on an outer surface at the lower end of the operating body, with which an exposed area of a lower end of the inner surface of the operating body is made small so that an amount of a light that leaks out of a gap between the cover and the operating body is reduced. Thus, a lighted switch unit having good visibility is obtained with a simple structure.

In recent years, automobiles equipped with a plurality of lighted switch units in the front panels are increasing. Those lighted switch units may have push switches or rotary switches for easily controlling audio equipments, air-conditioners or other various electronic equipments.
A conventional lighted switch unit is explained using FIG. 5. The conventional lighted switch unit 501 includes operating body 1 made of insulating resin. Operating body 1 includes transparent or milky-white transparent part 1A; black or dark gray covering layer 1B formed by a painting method for instance in covering an entire outer surface of transparent part 1A; and light-transmitting display part 1C formed on an upper part of the operating body in exposing a part of transparent part 1A in a shape of letters and symbols.
Lighted switch unit 501 further includes case 2 made of insulating resin, and cover 3 made of insulating resin. In a middle part of case 2, cylindrical hollow part 2A is opened upward. Operating body 1 is placed movably in up and down directions and surrounds cylindrical hollow part 2A. Cover 3 covers an upper part of case 2. Operating body 1 extrudes upward from opening part 3A of an upper part of cover 3.
Printed wiring board 4 has a plurality of conductive patterns formed on an upper side and a bottom side of the board, and push switch 5 is mounted on the board. Depressing part 1D extends downward from an inside part of operating body 1 and contacts with operating part 5A of push switch 5.
On printed wiring board 4, electronic components including connector 6 (not illustrated) and light-emitting element 7, such as a light-emitting diode, are also mounted. Light-emitting element 7 is mounted near push switch 5.
Lighted switch unit 501 is installed in a front panel of automobile and is electrically connected to various electronic equipment including audio equipment and an air-conditioner as well as to an electronic circuit of automobile (not illustrated), through push switch 5 and light-emitting element 7.
When operating body 1 of lighted switch unit 501 is depressed, operating part 5A of push switch 5 is depressed by depressing part 1D electrically operating push switch 5; hence controlling audio volume and temperature of air-conditioner. When light-emitting element 7 emits light, an entire part of operating body 1 is lighted, illuminating light-transmitting display part 1C in a shape of letters and symbols. Thereby, a display of display part 1C and a position of operating body 1 are easily identified even in dark place or in night time. A similar illuminating switch is disclosed in Japanese Patent Unexamined Publication No. 2001-283673 for instance.
However, with the above conventional lighted switch unit, when light-emitting element 7 emits light illuminating the entire part of transparent part 1A which is at an inner surface of operating body 1, light transmitted to lower end 1E of transparent part 1A is reflected by case 2 leaking out through a gap between operating body 1 and opening part 3A of cover 3 as it is indicated by an arrow in FIG. 5. The leaked light makes the display of display part 1C hard to be seen. Thus, the device has a problem that the visibility of display part 1C is diminished.

Matsushita Electric Industrial Co., Ltd.


A modulated segmentation system can use a modulator network to emphasize spatial prior data of an object to track the object across multiple images. The modulated segmentation system can use a segmentation network that receives spatial prior data as intermediate data that improves segmentation accuracy. The segmentation network can further receive visual guide information from a visual guide network to increase tracking accuracy via segmentation.

Image segmentation is a computational task in which pixels corresponding to different areas of an image are labeled or assigned to categories. For example, pixels of an image of a girl holding a beverage may be labeled into different segments including: a "girl" area for pixels that depict the girl, and "beverage" area for pixels that depict the beverage. A neural network (e.g., a convolutional neural network) can perform image segmentation on some computer systems. However, neural network based image segmentation requires large models that often exceed the memory of smaller computer systems such as mobile phones. Further, implementing the models can exceed the available computational resources of the mobile phones (e.g., processor power or available memory).


A computer-implemented method for preventing electronic form data from being electronically transmitted to untrusted domains may include (i) identifying a web page that includes an electronic form with field for data entry, (ii) detecting that the web page is electronically sending first and second messages that each include data from the field of the electronic form and that are directed to first and second destinations, respectively, (iii) determining that the first destination includes an untrusted destination, and (iv) blocking the web page from electronically sending the data from the field of the electronic form to the untrusted destination by blocking the first message from being electronically sent. Various other methods, systems, and computer-readable media are also disclosed.

Millions of pieces of sensitive data are transmitted each day via the Internet. Healthcare portals, banking websites, e-commerce platforms, and others, all asks users to place their trust in the website to secure their personal data. Malicious actors constantly develop new ways to intercept personal data for exploitation, whether at the browser level, the network level, the server level, or some combination of the above. Stolen personal information can lead to anything from identity theft to fraud to blackmail and can cause severe financial and reputation damage to the legitimate website from which the information was stolen.
One type of data theft involves injecting a script into a website that copies data entered into forms and transmits that data to the attacker's domain. Unfortunately, traditional systems for preventing data transmissions may not detect this attack because the malicious code is entirely client-side, meaning that an anti-malware program that protects the web hosting server from attack may be ill-equipped to detect the malicious code. Even anti-malware programs that look in the right location may be unable to tell malicious code from benign code due to advanced code obfuscation techniques used by attackers to disguise the malicious code. Additionally, the data transmission may appear to be legitimate because it is being sent from a trusted website and contains data inputted by the user, adding a further layer of difficulty. Accordingly, the instant disclosure identifies and addresses a need for additional and improved systems and methods for preventing electronic form data from being electronically transmitted to untrusted domains.

Systems and methods for preventing electronic form data from being electronically transmitted to untrusted domains


A system and method for generating an agent behavioral analytics including transcribing an incoming call to produce a call transcription; and using a trained convolutional neural network (CNN) to produce behavioral labels for the agent in the incoming call for behavioral metrics, based on the call transcription. The CNN may include an embedding layer to convert words in the call transcription into vectors in a word embedding space; a convolution layer to perform a plurality of convolutions on the vectors and to generate vectors of features; a pooling layer to concatenate the vectors of features to a single vector by taking a maximum of each feature generated by the convolution layer; and a classification layer to produce grades of the agent in the incoming call for the set of attributes or behavioral metrics, based on the single vector generated by the pooling layer.

In modern call centers or contact centers, agent performance needs to be evaluated regularly. Currently, this evaluation is performed manually by supervisors, which need to listen to many calls and perform subjective evaluation of agents. This process is time-consuming, inefficient and highly subjective, leading to a difficulty in assessing agents across an enterprise. Thus, there is an ever-growing need to automatically evaluate agents for a variety of business needs such as work-force optimization, targeted coaching, etc.

System and method for performing agent behavioral analytics


A self-inflatable balloon and motor-driven turbine assembly has a communication discernible on a surface of the balloon and has a pneumatically sealed enclosure for the turbine. The sealed enclosure has an outlet port and which, together with the inlet port, are positioned in relation to the turbine to permit efficient flow of air or other gas into the balloon when it is desired to inflate the balloon. The outlet port or the inlet port, depending upon the embodiment, seals an enclosure when selectively operated to a closed position to prevent leaking of the gas from the inflated balloon.

1. Field of the Invention:
The present invention relates to the art of communicating, and more particularly to efficient, selectively self-inflatable assemblies.
2. Description of the Prior Art:
In the past, it has been known to provide a balloon in combination with a source of air or like gas to inflate the balloon where, when the balloon is inflated, a message preprinted on the balloon becomes discernible to its recipient. In this regard, attention is called to my earlier U.S. Pat. No. 4,920,674, and to U.S. Pat. Nos. 4,020,786 issued to Kopeika and 3,563,676 issued to Coovert and Seitz. In these, and in other devices for inflating balloons, air or like gas is forced into a balloon through its mouth or opening to inflate the balloon, and the operation of the inflation is initiated upon some manipulation of the assembly. In the two letters patent to Kopeika and to Coovert and Seitz, the balloon is inflated by compressed gas, such as, for example, air which is released directly into the balloon when some cap is removed or when the balloon is forcibly held to make or complete a switched electrical circuit to drive an electrical motor compressor. In the case of the letters patent to Kopeika as identified above, the gas is compressed and maintained in a compressed state until released into the balloon. In the letters patent identified above issued to Coovert and Seitz and to myself, the air is drawn from the ambient air.
It is desired, however, to have a three dimensional message arrangement, such as a balloon as shown in the letters patent identified herein above, wherein the gas flow is so arranged as to provide for an efficient air or like gas flow into the balloon. Such an arrangement would allow for an inflation time that is quicker, and would permit the use of a smaller motor and turbine assembly. Moreover, the size of the balloon could be increased, and the number of times the balloon could be reinflated by the same power source would be increased.


The cuboid housing of the printed circuit board coupler is made from conducting material and it can be soldered directly to the printed circuit board. An inner conductor connection member is inserted into and insulated from the housing. The insulation is provided by a plastics part which is partially extrusion-coated on the inner conductor connection member at a region where connecting elements angle off from a plug-in element. The printed circuit board coupler can thus be soldered with the housing itself and with bends of the inner conductor connection member in a horizontal or vertical position on the printed circuit board by surface mounting.

Field of the Invention
The invention relates to a device for connecting a coaxial connector to a printed circuit board with a surface mount (SM) technique. The device generally comprises a cuboid housing with an outer conductor connection and an inner conductor connection member, the outer conductor connection and the inner conductor connection member being constructed in the connection region on the printed circuit board such that the SM connection can be carried out on the printed circuit board in a first, lying position of the housing or in a second, standing position, which is rotated by 90.degree. relative to the first position.
Such a device is commercially available under the general designation of printed circuit board coupler of the MMCX series. The coupler is configured in a miniature design such that it can be connected on a printed circuit board by surface mounting. For that purpose, the prior art printed circuit board coupler has a cuboid housing of plastic with an outer conductor connection and inner conductor connection. Each of the connections are guided to the outside and configured in the respective connection region such that the coupler can be SM soldered on the printed circuit board horizontally or vertically. A surface-treated sleeve in the form of a rotary part made from a conducting material is provided as the outer conductor connection. The outer conductor connection further includes a connecting part which is punched from strip material, pre-bent and connected reliably mechanically and electrically to the sleeve. The inner conductor connection is punched from a metal strip, at least partly surface-treated, for example galvanized in the connection region and gilded in the plug-in region, and pre-bent. In order to produce the printed circuit board coupler, the outer conductor sleeve preassembled with the connecting part is laid together with the inner conductor connection in an injection mold and extrusion-coated with a heat-resistant plastic. This operation requires processing steps which are quite problematic and relatively expensive. Finally, the outwardly projecting connection regions of the pre-bent outer conductor connection and inner conductor connection are bent to finish so as to produce at mutually perpendicular outer sides of the cuboid housing connection regions which serve both for the outer conductor connection and for the inner conductor connection as solder surfaces and which permit the coupler to be SM soldered horizontally or vertically.

Device for connecting a coaxial connector to a printed circuit board by surface mounting


The optical fiber cutter 1 comprises a cutter base 3 and a cutter lid 4 attached openably and closably to the cutter base 3. A slider 8 having a blade member for incising an optical fiber is attached to the cutter base 3 so as to be movable widthwise. A switching plate 15 is attached to a rear end part of the cutter base 3, while a switcher 16 is provided on the outer surface side of the switching plate 15. When the switcher 16 is at a first position, the cutter lid 4 engages a stopper, thereby attaining an opening angle of 35°. When the switcher 16 is at a second position, the engagement between the cutter lid 4 and the stopper is released, whereby the cutter lid 4 attains an opening angle of 70°.

As a conventional optical fiber cutter, one constituted by a lower box (cutter base) equipped with a disk-shaped blade member for incising a glass fiber part of an optical fiber and an upper box (cutter lid) rotatably connected to one end of the lower box with a hinge member has been known as described in Patent Literature 1, for example.

Optical fiber cutter, and optical fiber cutter unit


A phased array antenna system includes an RF front end, a radome, and an optical calibrator embedded in the radome for enabling in-situ calibration of the RF front end. The optical calibrator employs an optical timing signal generator (OTSG), a Variable Optical Amplitude and Delay Generator array (VOADGA) for receiving the modulated optical output signal and generating a plurality of VOADGA timing signals, and an optical timing signal distributor (OTSD). The in-situ optical calibrator allows for reduced calibration time and makes it feasible to perform calibration whenever necessary.

A phased array antenna in an array of antenna elements connected together that are switched between transmit and receive channels. Steering is accomplished by controlling the phase and amplitude of the elements. It is also necessary to adjust the phase and amplitude in order to correct or compensate for errors and inaccuracies due to environmental and other conditions. In order to make the desired adjustments, it is necessary to calibrate and tune the antenna system. The ability for a multi-element array antenna system to electronically form a beam in a predetermined direction is based on the accuracy of both the phase and amplitude settings at each individual element. Phased array antennas typically are comprised of thousands of elements and are able to electronically steer multi-beams throughout a prescribed sector to provide both search and targeting information that is usually integrated with other weapon systems.
Phased array systems have been passive in nature. The advantage that the passive type architecture has over the active type architecture is the ability to be calibrated once at the factory and be able to maintain this calibration over a very long period. This ability is due to the passive nature of many of the components within the beamforming network that provides the amplitude and phase levels at each of the elements. The next generation of ships will favor integrating active type systems that represent a higher degree of complexity then the passive type architecture. Due to the complex nature of these systems, active system calibration is necessary to maintain the ability to operate at the high level of performance necessary to carry out a mission.
Presently, these large antenna apertures are calibrated using a Near Field Scanner (NFS) system prior to placement into the ships super-structure. The NFS uses a small waveguide probe placed close proximity to the antenna aperture and is moved over the complete surface using a 2-axis scanner mechanism. As the probe is positioned in front of each element a small calibration signal is transmitted to the element and associated RF equipment behind the element. This enables a complete electrical characteristic (or calibration) to be performed from each array element to the receiver output. Unfortunately, the physical size and weight of these scanners and the associated mechanical support structure needed to perform this level of calibration makes a scanner type structure unmanageable to be used for in-situ type measurements
The ability to inject real time calibration signals into a phased array receive antenna allows the system to maintain a high level of operational performance. This is especially important when an array is being used in a multi-functional role, such as in the Navy's Advanced Multifunction RF Concept (AMRFC), as described in "Advanced Multifunction RF System," P. Hughes, J. Choe, and J. Zolper, GOMAC Digest, 194-197 (2000). Previous and current array calibration schemes provide a mix of techniques that are used before and after installation into a platform.
In one approach, array calibration is performed using both internal and external signal injection, which includes near or far field calibration techniques. These techniques record vast amounts of data that become part of a master look up table. This look up table provides corrections for both the amplitude and phase control settings for steering and amplitude weighting of the array. To accomplish the calibration, however, the array is removed or large moveable structures utilized that necessitate placing the system out-of-service while the calibration is performed. The array is therefore typically not recalibrated until it is removed from service when general maintenance is performed, therefore in the interim the system can be well out of calibration.
Another technique described in U.S. Pat. No. 5,559,519, incorporated herein by reference, involves calibrating an active phased array antenna using a test manifold coupled to the transmit output of a plurality of antenna modules. Although the system permits recalibration using a known far-field source, it cannot recalibrate antenna elements that are beyond the test manifold coupler.
Another calibration technique injects small calibration signals after the antenna element. In doing this any mutual coupling that occurs due to the element proximity to each other is not included in the calibration. In order to completely calibrate the array, the element "health" must be included in the calibration to accurately set the amplitude and phase settings. There are other calibration techniques that rely on the "unchanging" nature of the mutual coupling between the elements. These techniques, which provide a powerful calibration capability, become corrupt if the elements themselves become defective.
As array systems become more complex and advanced, the need to have available accurate and up-to-date calibration data becomes apparent. The introduction of advanced active arrays means that future systems will require more frequent calibration than passive arrays.

The United States of America as represented by the Secretary of the Navy