A fan control system and a method thereof are applicable to a computer device. The system includes a fan, a board management unit, a power control module and a rotation speed switching module. The fan is driven by a control power and a rotation speed control signal. The board management unit provides a fan enabling signal, a rotation speed switching signal and a first fan rotation speed signal in a standby state. The power control module receives the fan enabling signal to determine whether to provide the control power to the fan, and switches between an auxiliary power or a main power served as the control power to the fan. The rotation speed switching module receives the rotation speed switching signal to accordingly switch between the first fan rotation speed signal or a second fan rotation speed signal served as the rotation speed control signal to the fan.

1. Technical Field of the Disclosure
The disclosure relates to fan control technologies of a computer device, and more particularly to a fan control system and a fan control method capable of automatically switching a fan rotation speed and adjusting the power energy when the computer device is in a standby state.
2. Description of the Related Art
When a computer device operates in a standby state (that is, in an S5 state or a soft off state defined in an Advanced Configuration and Power Interface (ACPI)), although the user thinks that the computer device is already shut down, the computer device actually does not stop operation completely. That is, a part of the apparatuses in the computer device still remain running in the standby state. The heat generated by these apparatuses still needs to be dissipated, so that a part of the fans still need to run in the standby state.
Conventionally, fans driven by an auxiliary (AUX) power are mounted on the apparatuses that still need to run in the standby state, and a board management controller (BMC) is used for controlling these fans. Since these fans are driven by the AUX power, if the fan rotation speed, set by the BMC, is too high, the power energy quantity of the AUX power is momentarily insufficient and causes the power supply unit to reset, and accordingly, the computer device is unstable. Therefore, a fault may occur when the BMC automatically sets the fan rotation speed in the standby state, and the above situation may be resulted.
Besides, since the fan is merely driven by a single power (the AUX power), when the computer device returns from the standby state to a runtime state, the heat dissipation effect of the fan is greatly lowered, which does not meet the heat dissipation requirement of the current computer device in the runtime state.

Fan control system and fan control method

INVENTEC (PUDONG) TECHNOLOGY CORPORATION


Metal nanocrystal memories are fabricated to include higher density states, stronger coupling with the channel, and better size scalability, than has been available with semiconductor nanocrystal devices. A self-assembled nanocrystal formation process by rapid thermal annealing of ultra thin metal film deposited on top of gate oxide is integrated with NMOSFET to fabricate such devices. Devices with Au, Ag, and Pt nanocrystals working in the F-N tunneling regime, with hot-carrier injection as the programming mechanism, demonstrate retention times up to 106s, and provide 2-bit-per-cell storage capability.

The present invention relates, in general, to metal nanocrystals and methods of fabricating the same, and more particularly to semiconductor memory devices incorporating metal nanocrystals to provide a multibit-per-cell storage capability.
Conventional DRAM or Flash memories have been widely employed for many years in a variety of applications. DRAMs allow fast write/erase, but suffer from high power consumption incurred by the constant refresh operations due to their short retention time of less than a few seconds (see B. El-Kareh et al, "The Evolution of DRAM Cell Technology", Solid State Technology, Vol. 40, pp 89, May 1997). It is also very difficult to fabricate high-density DRAMs, because a large capacitor is necessary for every cell for charge retention and sufficient perturbation of the bit line to trigger sense amplification during reading. Flash memories, which offer longer than 10 years of retention time, have the drawbacks of high operation voltage and slow write/erase because of their relatively thick tunnel oxide. Known nanocrystal memories and MNOS (SONOS) memory devices employing discrete charge traps as storage elements have exhibited great potential in device performance, power consumption, and technology scalability, thus recently attracting much research attention as promising candidates to replace the conventional DRAM or Flash memories. However, such devices have not solved all of the problems inherent in such devices.

Multibit metal nanocrystal memories and fabrication


Improved methods for the production of lightweight, rigid, insulative perlite/cement solid articles such as bricks (62) are provided wherein expanded perlite is first treated with a cement binder followed by application of cement with subsequent mixing and forming. In preferred forms, a continuous belt (12) is provided with laterally spaced apart stations (22-28) for application of perlite, binder, water and Portland cement, respectively, onto the belt (12); these materials are then mixed in a drum mixer (38) to produce a mixture (61) which is poured into a frame assembly (44) for final curing/hardening.

1. Field of the Invention
The present invention is broadly concerned with improved methods for the production fo highly desirable solid articles (e.g., sheets, panels, bricks, mold pourings) containing expanded perlite and cement. More particularly, the invention is concerned with such methods wherein expanded perlite is first treated by application of cement binder, followed by mixing of cement with the treated perlite to form a castable or formable mixture.
2. Description of the Prior Art
Perlite is a generic term for naturally occurring siliceous volcanic rock. A distinguishing feature of perlite is that when heated to a suitable point in its softening range, it expands four to twenty times its original volume. This expansion is due to the presence of 2-6% combined water in the crude perlite rock. When quickly heated above 1600° F., the crude rock pops in a manner similar to popcorn as the combined water vaporizes, creating countless tiny bubbles in the heat-softened glassy particles. It is the presence of these tiny glass-sealed bubbles which accounts for the desirable physical properties of expanded perlite. Expanded perlite can be manufactured to weigh from 2-15 lb/cubic foot, making it adaptable for numerous applications in the construction, industrial, chemical, horticultural and petrochemical industries.
Expanded perlite has been used in the past in the fabrication of lightweight building materials and artificial stones. Thus, U.S. Pat. No. 4,043,826 describes a process for making artificial rocks wherein latex paint, water, calcium chloride, Portland cement mid horticultural perlite are mixed together and poured into a flexible mold in the shape of a natural rock. U.S. Pat. No. 3,847,633 is directed to the production of building materials wherein Portland cement and perlite are mixed together along with plaster of paris, fly ash and fiberglass reinforcing material. In the process, dry materials are pre-blended, followed by the addition of water and mixing; the resulting slurry is then formed using a specific, two-stage, differential temperature curing regimen. U.S. Pat Nos. 2,858,227 and 4,042,046 describe additional variants of these processes for the production of perlite/cement products.

Perlite composition and method of making the same


A craft needle having a measuring scale permanently applied along the longitudinal surface is disclosed. The zero point of the measuring scale is the distal end of the craft needle. The proximal end of the needle being the pointed end of a knitting needle and the hooked end of a crochet needle. Both knitting needles and crochet needles can be made with this feature. The length of a knitted work-piece can be measured by holding the distal end of the free needle vertically so the distal end is against the needle holding the work-piece and reading the length from the scale on the free needle. The width of a knitted work-piece and the dimensions of a crocheted work-piece can be measured by placing the distal end of the needle at one edge of the work-piece with the needle being parallel to the dimension being measured and reading the measurement from the scale on the needle. More than one measuring scale can be applied to a single needle with the zero points on all scales being at the distal ends of the needles.

The arts and crafts of knitting and crocheting are quite old. Knitting needles have not changed much since the earliest evidence of the technique was disclosed. Knitting needles come in different lengths and diameters and are made of a variety of materials. For the most part the only embellishment lies in the shape and size of the heads of the knitting needles. Crochet needles or hooks have not exhibited any embellishments.
During the fabrication of a knitted article it is often necessary to measure the work-piece before altering the stitch pattern or the shape of the work-piece. The knitter had to have a measuring tape or rule handy at all times so as not to have to stop work to locate one when a measurement had to be made. Crochet work-pieces fabricated in one piece or in several large pieces also require frequent measurements. Schoolfield tried to remedy this situation by disclosing the application of a measuring scale to the surface of the knitting needle. She also described a hollow needle composed of a transparent material and a measuring scale applied to a central core. The central core was inserted into the hollow needle and was visible through the transparent material. The zero point of the scale was located at the junction between the head and the shaft of the needle. (U.S. Pat. No. 1,340,255)
Burg, in U.S. Pat. No. 2,258,925, developed a knitting needle having a reduced area along one side. The needle could be inserted into an arcuate element with a hollow pointed bottom portion. The element could be riveted to the needle near the head forming a permanent bond between the two parts. Graduations on the element beginning below the head provided a measuring scale on the side of the needle.
In U.S. Pat. No. 2,378,544, Fosse et al. discloses a knitting needle with a measuring scale on the shaft. Also disclosed is a transparent needle with a hollow core and a slidable core stem containing a measuring scale. The zero point of the scale was located near the pointed end of the needle. The scale was enhanced by the use of different colors and phosphorescence for visibility in limited light.
Hadler (U.S. Pat. No. 2,748,582) teaches a knitting needle with a measuring scale on the surface of the needle and specifies that the zero point be located at the base of the cone forming the point of the needle. In addition to the measuring scale, the needle exhibits one or more additional scales representing the number of stitches per unit of measure formed with different thicknesses of yarn. The knitter need only move the work-piece to the zero point of the appropriate scale to know how many stitches are held on the needle. The scales could be etched on the surface of the needle or applied with curved members that fit into depressions on the surface of the needle shaft. The head of the needle is threaded and can be removed and replaced with an extension that increases the length of the needle.
Though all of the needles containing measuring scales could be helpful to the crafter, it is necessary to position the needle so the zero point is contiguous with one edge of the work-piece while making sure that the work-piece is lying flat. Some of the prior art needles have the zero point near the head and some near the pointed end of the needle. None of the prior art needles place the zero point of the measuring scale at the very end of the needle to facilitate making the necessary measurements.
There is a need for knitting needles and other craft needles such as crochet hooks to have measuring scales on their surfaces placed so that the zero points of the scales are at the ends of the needles.

Craft needle with measuring capabilities and method of use of same


An information processing device of the present invention comprises a main CPU capable of taking at least two states which are an operating state and a sleeping state, a sub-CPU having power consumption lower than that of the main CPU and capable of taking at least two states which are an operating state and a sleeping state, and a process request determining section for determining which of the main CPU and the sub-CPU is caused to execute a process related to a request from a peripheral device. The process request determining section determines whether the main CPU is in the sleeping state or the operating state, and when the main CPU is in the sleeping state, determines whether or not the sub-CPU can be caused to execute the process, and when the main CPU is in the operating state, determines whether or not the main CPU can be caused to execute the process, and depending on a result of the determination, causes the main CPU or the sub-CPU to execute the process.

In recent years, mobile information processing devices are very widespread. Mobile telephone devices, mobile personal computers, mobile personal digital assistants, and the like are representatives thereof. These mobile terminal devices are all operated while being driven by batteries. Therefore, in order to be able to use the device for a longer time, development has been conducted so as to reduce power consumption.
Particularly in mobile telephone devices, as on-board functions are increased (hereinafter referred to as an increase in the variety of on-board functions), the performance of CPUs is dramatically improved. Therefore, the proportion of power consumption of a CPU with respect to a whole device is increasing year by year, and therefore, a power saving technique for CPUs is required. Also, due to the increase of the variety of on-board functions, there is a disparity between high system requirements and low system requirements.
For example, orthodox processes, such as a process for a standby screen of a mobile telephone device, a process for displaying a clock, and the like, have low system requirements. On the other hand, processes for new additional functions, such as a process for displaying moving images, television telephony, and the like, have high system requirements. As can be seen from these examples, there is a significant difference in CPU processing load between processes having low system requirements and processes having high system requirements. CPUs need to execute processes having high system requirements as well as processes having low system requirements, and therefore, need to have performance which satisfies all system requirements. However, there is only a handful of functions which fully utilize the performance of a CPU in a whole system.
Therefore, an information processing device which comprises a main CPU and a sub-CPU which has power consumption lower than that of the main CPU, has been proposed (see Patent Document 1). In the conventional information processing device of Patent Document 1, the main CPU and peripheral devices in a control of the main CPU are directly connected to each other, and the sub-CPU and peripheral devices in a control of the sub-CPU are directly connected to each other. Thereby, the conventional information processing device can cause the sub-CPU to execute processes having small loads, such as waiting for user's key input, timer event, and the like. Therefore, the main CPU is not uselessly executed during the time when a process having a small load is executed, thereby reducing power consumption.    Patent Document 1: Japanese Patent Laid-Open Publication No. H04-309110

Information processing device for assigning processes to a main CPU or sub-CPU based on a sleeping state


In a pollutant destruction apparatus employing one or more corona discharge reactors, an automatic control system controls power generation characteristics for corona discharge reactions according to factors such as the types and the amounts of pollutants in an exhaust gas, maximum allowable emissions, engine operating characteristics, drive control characteristics and intelligent vehicle highway system inputs, to achieve improved treatment of the pollutants.

1. Field of the Invention
This invention relates to an automatic control system and method for controlling corona discharge reactions in a corona discharge pollutant destruction apparatus employing one or more corona discharge reactors.
2. Description of the Related Art
Passing a pollutant bearing gas through a corona discharge site is a known method of removing the pollutants from the gas. A general review of this technique is provided in Puchkarev et al., "Toxic Gas Decomposition by Surface Discharge," Proceedings of the 1994 International Conf. on Plasma Science, June, 6-8, 1994, Santa Fe, N. Mex., paper No. 1E6, page 88. Corona pollutant destruction has also been proposed for liquids, as disclosed in application Ser. No. 08/295,959, filed Aug. 25, 1994, "Corona Source for Producing Corona Discharge and Fluid Waste Treatment with Corona Discharge," and assigned to Hughes Aircraft Company, now doing business as Hughes Electronics.
In one system, described in Yamamoto et al., "Decomposition of Volatile Organic Compounds by a Packed Bed Reactor and a Pulsed-Corona Plasma Reactor," Non-Thermal Plasma Techniques for Pollution Control, NATO ASI Series Vol. G34 Part B, Ed. by B. M. Penetrante and S. E. Schultheis, Springer-Verlag Berlin Heidelberg, 1993, pages 87-89, brief high voltage pulses of about 120-130 nanoseconds duration are applied to the center conductor of a coaxial corona reactor through which gas is flowing. Each pulse produces a corona discharge that emanates from the center wire and floods the inside volume of the reactor with energetic electrons at about 510 keV. A similar system is described in U.S. Pat. No. 4,695,358, in which pulses of positive DC voltage are superimposed upon a DC bias voltage to generate a streamer corona for removing SO.sub.x and NO.sub.x from a gas stream. These processes have relatively poor energy efficiencies. With the reactor geometries that have been selected, it is necessary to deliver very short pulses to avoid arc breakdown between the electrodes, and consequent damage. The pulse-forming circuit loses approximately half of the power coming from a high voltage supply in a charging resistor, and additional energy is wasted in a double spark gap. Furthermore, the capacitive load of the coaxial corona reactor must be charged; this charging energy is typically much greater than the energy that is actually used in the corona reaction, and simply decays away into heat after each pulse without contributing to the pollutant destruction.
A similar approach, but with a different reactor geometry, is taken in Rosocha et al., "Treatment of Hazardous Organic Wastes Using Silent-Discharge Plasmas," Non-Thermal Plasma Techniques for Pollution Control, NATO ASI Series Vol. G34 Part B, Ed. by B. M. Penetrante and S. E. Schultheis, Springer-Verlag Berlin Heidelberg, 1993, pages 79-80, in which the corona discharge is established between parallel plates. This system also suffers from a poor specific energy due to inefficient pulse formation and non-recovery of reactor charging energy.
High voltage power pulses are very effective in destroying hydrocarbons (HC) and carbon monoxide (CO) in a corona discharge reactor, but do not facilitate the reduction of nitrogen oxides (NO.sub.x) into diatomic nitrogen (N.sub.2) and oxygen (O.sub.2). Experiments have shown that using high voltages (up to 12 kV) may even produce some additional NO.sub.x. On the other hand, low voltage pulses are highly efficient in reducing NO.sub.x, but are very poor at oxidizing HC.

Automatic control method for corona discharge pollutant destruction


A relatively inexpensive modular component that can be substituted for, or used in conjunction with, an existing smoke detector in a commercially available residential fire-detection alarm comprises: (A) an amperometric sensor for carbon monoxide, in which the reference and counter electrodes are combined either internally into a single auxiliary electrode or externally by electrical shorting; and (b) a simple current-to-voltage converter circuit that converts the current signals from the sensing electrode into amplified voltage signals. The converter circuit is powered by the same battery (usually a 9-volt dry cell) and is connected to the same alarm-triggering circuit that are used in existing residential fire alarms. The sensor-and-converter module is designed to fit into a commercially available smoke-detector-type fire alarm unit. The electrical output of the module is designed to be compatible with the electrical input requirements of the commercial detection circuitry. An alarm fitted with this module provides early warning of hazardous conditions, such as a smoldering fire, a leaky furnace, or an otherwise heavily polluted atmosphere.

This invention relates to a simple and inexpensive sensor module for use in residential alarms.
Devices for sensing carbon monoxide and triggering an alarm in the presence of excessive concentrations of carbon monoxide (CO) that may be hazardous to life or health are presently available for many industrial applications, but such devices are still too costly for use in most homes. These devices may utilize electrochemical sensors, semiconductor sensors, colorimetric detectors or IR (infra-red) detectors. Typical electrochemical industrial alarms have the potential to be used in homes because of their excellent sensitivity and selectivity. The electrochemical alarms may be preferred to the semiconductor sensors because the semiconductor must be heated and therefore utilize significant power which limits battery life or requires drawing current from the residential power line (e.g., via a plug in a wall receptacle or permanent wiring of the alarm into the house). Infra-red detectors of CO are expensive and bulky, requiring a long path length, heated IR sources, and expensive detectors. Further, the present lower detection limit of semiconductor sensors may be 10 to 100 times higher than that of electrochemical sensors. Typical sensitivity ranges are 50-200 ppmv (parts per million by volume) for semiconductor sensors and 0.1-100 ppmv for electrochemical sensors. Other CO detectors, e.g., those of the colorimetric type, also lack sensitivity and/or reversibility or accuracy or convenient output to trigger an alarm.
The current trend is towards a reduction in the maximum permissible CO levels. The older limits set by the Occupational Safety and Health Administration are 50 ppmv over an eight-hour period and 400 ppmv for 15 minutes in workplace atmospheres. However, a concentration limit set by the Environmental Protection Agency is as low 9 ppmv CO for the outdoor atmosphere.
Ideally, a home should have only background CO present and this may be very low, near to 0 ppmv in the countryside or 1-2 ppmv in the city or close to combustion sources. A reading of 9 ppmv is indicative of a problem with the indoor air quality. Indeed, even a reading of 4 ppmv has been found to indicate potential problems. Therefore it is important to have a sensitive detector that will alarm at low levels.
It is therefore one object of this invention to provide an indoor hazard-warning device that will alarm at a preselected CO level in the range of 4-20 ppmv of CO in air or possibly even lower, if required. The preferred alarm level may depend on future evaluations of the health effects of CO on humans and of the levels of CO that may be indicative of other hazardous conditions, such as a smoldering fire or a leaky furnace.
It is a further object of this invention to provide such a hazard-warning device in a form that is inexpensive and adaptable for insertion into a typical residential smoke alarm. This implies that the device must be small, powered by a small battery, and drawing a current that is sufficiently low to assure longevity of the battery.
The heating that is required for the operation of a semiconductor-type sensor may pose a potential fire hazard. It is therefore another object of this invention to provide a CO-sensing device in a form that is intrinsically safe for home use. This implies that the device must not require heating or have otherwise hazardous features.
The responses of semiconductor-type or of colorimetric sensors to increased concentrations of carbon monoxide are much slower than those of electrochemical sensors. It is therefore still another object of this invention to provide a warning device that responds rapidly to the presence of elevated levels of carbon monoxide.
It is necessary to test warning devices periodically and verify that they function properly. This introduces the problem of reversibility. Colorimetric devices either do not revert to their original state after exposure to a test sample or do so very slowly. Semiconductor sensors also require a long time to reset. In contrast, electrochemical sensors revert to their zero background responses shortly after the CO concentration drops to zero. It is therefore yet a further object of this invention to provide a CO-alarming device that can be conveniently tested and thereafter quickly reset for normal operation.
Although it is clear from the foregoing discussion that electrochemical sensors offer important advantages over semiconductor-type, colorimetric, or IR detectors for CO alarms, there is still the problem of the relatively high cost and complexity of present electrochemical CO-monitoring devices. These industrial devices utilize amperometric two-electrode or, most often, three-electrode sensors that comprise a CO-sensing electrode, a counter electrode, and a reference electrode and yield a current that is proportional to the concentration of carbon monoxide in the ambient air.
To assure good accuracy and stability, the potential of the sensing electrode is kept fixed relative to that of the reference electrode by means of a potentiostat circuit that also serves to measure the sensor current. The complexity and cost of the sensor and of the potentiostat circuit presently limit the use of electrochemical CO sensors to industrial applications only. The complex circuit serves to reduce noise and provides amplification and signal conditioning for outputs to displays, relays and computers. Many circuits also need to compensate for the effects of temperature fluctuations on the signal.
It is therefore yet another object of this invention to provide an electrochemical sensor and a simplified current-measuring circuit that is inexpensive and readily adaptable for use in existing home or other residential fire alarms.

Amperometric carbon monoxide sensor module for residential alarms


A leadframe for a semiconductor package is disclosed including electrical leads which extend from one side of the leadframe to an opposite side of the leadframe, where electrical connection may be made with the semiconductor die at the second side of the leadframe. The semiconductor die may be supported on the leads extending across the leadframe. The package may further include a spacer layer affixed to the electrical leads to fortify the semiconductor package and to prevent exposure of the electrical leads during the molding of the package.

1. Field of the Invention
Embodiments of the present invention relate to a method of a semiconductor package, and a semiconductor package formed thereby.
2. Description of the Related Art
As the size of electronic devices continue to decrease, the associated semiconductor packages that operate them are being designed with smaller form factors, lower power requirements and higher functionality. Currently, sub-micron features in semiconductor fabrication are placing higher demands on package technology including higher lead counts, reduced lead pitch, minimum footprint area and significant overall volume reduction.
One branch of semiconductor packaging involves the use of a leadframe, which is a thin layer of metal on which one or more semiconductor die are mounted. The leadframe includes electrical leads for communicating electrical signals from the one or more semiconductors to a printed circuit board or other external electrical devices. Common leadframe-based packages include plastic small outlined packages (PSOP), thin small outlined packages (TSOP), and shrink small outline packages (SSOP). Components in a conventional leadframe package are shown in FIGS. 1 and 2. The illustrated components may be used for example in a TSOP package, which come standard in 32-lead, 40-lead, 48-lead and 56-lead packages (fewer leads are shown in the figures for clarity).
FIG. 1 shows a leadframe 20 before attachment of a semiconductor die 22. A typical leadframe 20 may include a number of leads 24 having first ends 24a for attaching to semiconductor die 22, and a second end (not shown) for affixing to a printed circuit board or other electrical component. Leadframe 20 may further include a die attach pad 26 for structurally supporting semiconductor die 22 on leadframe 20. While die attach pad 26 may provide a path to ground, it conventionally does not carry signals to or from the semiconductor die 22. In certain leadframe configurations, it is known to omit die attach pad 26 and instead attach the semiconductor die directly to the leadframe leads in a so-called chip on lead (COL) configuration.
Semiconductor leads 24 may be mounted to die attach pad 26 as shown in FIG. 2 using a die attach compound. Semiconductor die 22 is conventionally formed with a plurality of die bond pads 28 on first and second opposed edges on the top side of the semiconductor die. Once the semiconductor die is mounted to the leadframe, a wire bond process is performed whereby bond pads 28 are electrically coupled to respective electrical leads 24 using a delicate wire 30. The assignment of a bond pad 28 to a particular electrical lead 24 is defined by industry standard specification. FIG. 2 shows less than all of the bond pads 28 being wired to leads 24 for clarity, but each bond pad may be wired to its respective electrical in conventional designs. It is also known to have less than all of the bond pads wired to an electrical as shown in FIG. 2.
FIG. 3 shows a cross-sectional side view of leadframe 20 and semiconductor die 22 after the wire bond process. Once wire bonding is completed, a molding process performed to encase the components in a molding compound 34 and form the finished package. It is known to recess or "down-set" the semiconductor die within the leadframe, as shown in FIG. 3, in order to balance the semiconductor die against the forces of the molding compound as it flows around the die and leadframe. It is important that the semiconductor die be balanced during molding process as an imbalance can cause excessive movement of the semiconductor die under the force of the molding compound as it flows. Such movement can break or short one or more of the wire bonds 28, resulting in damage or complete failure of the semiconductor package. As there may be fifty or more wire bonds in a package, this can become a significant problem if the semiconductor die is not properly balanced during the molding process.
It is also know during the molding process in a down-set packaging configuration that a higher concentration of molding compound flows over the top of the semiconductor die in the molding process. This results in a downward force on top of the semiconductor die. Without the die attach pad 26 or other proper structural support, the die and leadframe may get forced downward until one or more of the electrical leads attaching to the die are exposed to the external environment at the bottom of the package. This again may result in damage or failure of the package.
As shown in FIGS. 2 and 3 it is typical to have bond pads 28 on first and second opposite sides of the semiconductor die for electrical coupling with their respective leads. According to industry specification and ease of design, bond pads along the first edge of the semiconductor die connect to respective pins adjacent to first edge, and bond pads along the second edge of the semiconductor die connect to respective pins adjacent the second edge. In an effort to reduce semiconductor die form factor, it is now know to provide bond pads on a semiconductor die along only one edge of the die as shown in FIG. 4. If electrical connection is to be made to industry standard to maintain the proper pinout connections, a system is required for electrically connecting the bond pads along the single edge of the semiconductor die with the electrical leads on both the first and second sides of a leadframe.

Die package with asymmetric leadframe connection


The closure of the present invention provides a seal a variety of neck configurations, including substantially new and different neck profiles. The top of the cap, which may or may not include a valve, has side wall depending from the top of the cap and a skirt extending further downwardly from the side wall. The inside surface of the cap has an elongated sealing flange extending downwardly and outwardly from the underside of the top of the cap. The lower tip of the sealing flange is preferably disposed outside, in the radial direction, of the inside diameter of the latch bead formed at the base of the side wall of the cap. The length of the sealing flange, its position on the underside of the cap and the length-to-basewidth ratio of the flange keep it from becoming misaligned or twisted. The inside surface of the wedge-shaped sealing flange is preferably disposed at an obtuse angle from the plane of the top of the cap. The side wall of the cap may include a concave section or seat immediately above the latch bead and a stop above the concave section which has a slightly convex configuration. The seat and stop provide a way of locating the outside surface of the neck finish relative to the sealing flange to ensure that a consistent pressure is applied at the interface between the sealing flange and the upwardly facing surface of the neck finish. The extended-length sealing flange of the cap of the present invention enhances the stability of liners, such as foam liners, preferred by some bottlers as a extra measure of sealing.

The present invention relates to a closure for use in the bottled water industry. In particular, the present invention is an improved gripping and sealing cap for use on multi-gallon (e.g. 5-gallon) plastic and glass water bottles of the type which are typically inverted and placed on bottled water dispensers.
There are a number of suppliers of reusable plastic five-gallon containers used to deliver water to consumers. While the bottles provided by the manufacturers of five-gallon containers tend to be made with a generally standard neck finish, substantial differences among manufacturers does exist, and the bottle neck finishes on bottles produced by a single manufacturer can have some significant variations. These variations present a challenge for cap suppliers who need to provide a single cap design which is capable of sealing substantially different bottle neck finishes. Further sealing challenges arise from the fact that bottles are typically re-used and re-filled over and over again. In the process of their being stored at various uncontrolled locations, transported and handled by persons who may or may not handle the bottles carefully, bottle neck finishes become nicked and otherwise damaged. Such damaged neck finishes make it even more difficult for a single cap design to seal effectively in a consistent manner all of the bottles processed by a bottling facility.
While standardization has occurred among various suppliers of five-gallon containers used in the bottled water industry, variability remains a fact with which closure suppliers must deal. Standardization, however, makes introducing any improvements in the design of bottle neck finishes difficult, because any significant change in the design of a bottle neck finish will render it non-standard, and unacceptable. Bottlers cannot contend with the problem of associating a particular closure with more than one style of container neck finish, and the ability of container manufacturers to make changes in the neck finish of their containers is significantly impaired by standardization. The problem of dealing with a multiplicity of neck profiles has been a recognized problem in the bottled water industry. For example, see U.S. Pat. No. 4,911,316 (and references discussed in the specification thereof). The ""316 patent discloses a typical closure for five-gallon containers and discusses the ability of the cap shown in the ""316 patent to accommodate neck profiles which differ very slightly from one to another. See FIG. 3 of U.S. Pat. No. 4,911,316. A cap for five gallon containers to be commercially viable, it must work well with the full range of bottle neck finishes which are in circulation in the distribution systems of customers.
Changes or improvements in the bottle neck finishes of five-gallon containers have, therefore, typically been very small and subtle, because bottle manufacturers are aware of the need for existing caps to accommodate their bottles. In order to accommodate a significantly new neck profile in a five-gallon container, a cap will need to work and seal effectively with the range of existing standard neck profiles and any the new or improved neck finish.
The closure of the present invention provides both: 1) an improved seal on the typical variety of standard neck configurations which are presently in wide circulation, and 2) a particularly effective seal on neck a finish which substantially new and different from the existing standard. This is accomplished with a cap in which there is a top which may or may not include a valve, a side wall depending from the top of the cap and a skirt extending further downwardly from the side wall. On the inside surface of the cap, an elongated sealing flange is formed and extends down-outwardly from the outer margin of the underside of the top of the cap. The lower tip of the sealing flange is preferably disposed outside, or outwardly in the radial direction, from the inside diameter of the latching bead formed at the base of the side wall of the cap. To avoid misalignment or twisting of the sealing flange, the inside surface of the wedge-shaped sealing flange is preferably disposed at an angle of greater than 90xc2x0 (e.g. 109xc2x0) from the plane of the top of the cap. The sealing flange of the cap of the present invention is substantially longer in length than sealing flanges typically used on the inside surface of five-gallon caps. The sealing flange of the present invention has a height which is approximately one-third of the overall distance between the underside of the top of the cap and the latching bead at the base of the side wall of the cap. In a preferred embodiment which is particular suitable for use in conjunction with a particular (and not presently standard) neck finish, the side wall of the cap includes a concave section immediately above the latch bead, and an adjacent stop above the concave section which has a slightly convex configuration which provides a way of locating the outside surface of the neck finish relative to the sealing flange. This stop helps to ensure that the position of the neck finish results in a consistent pressure being applied at the interface between the sealing flange and the upwardly facing surface of the neck finish. Also, the extended-length sealing flange of the cap of the present invention enhances the stability of liners which are sometimes used in five gallon caps by ensuring that the liner remains centered around the opening of the container. The sharp tip of the sealing flange and the lateral movability of the tip, as the cap is installed, provide a tension in the liner which improves its sealing effect. This improved stability of liners afforded by the cap of the present invention is particularly advantageous in standard (i.e. non-valved) caps, it is also true in valved caps where a donut-like liner is used surrounding the recess in the center of such caps.
The cap of the present invention is intended for use on bottles with relatively wide or semi-wide mouth necks, i.e. necks on the order of about 55 millimeters or about 2 inches. The terms xe2x80x9csemi-wide mouthxe2x80x9d and xe2x80x9csemi-widexe2x80x9d are intended herein to refer to the kinds of neck configurations which are typically used on 5-gallon containers in the bottled water industry in the United States. Containers of this type present unique challenges to cap manufacturers for a number of reasons, such as: 1) the bottles are re-used many times before they are discarded, and in the process of use, re-sue filling and transportation the surfaces which are to be used as sealing surfaces may receive damage of varying degrees of severity, 2) they are stored for varying periods in unpredictable environments, 3) they are handled repeatedly by all kinds of persons, including consumers, delivery personnel and workers at bottling facilities, 4) the size of the semi-wide mouth opening in bottles such as 5-gallon water bottles is substantially greater than openings in other containers in which liquids are delivered to consumers, 5) semi-wide mouth containers of bottled water are often shipped, and sometimes stored, in a horizontal position with water pressure constantly pressing against the seal formed by the closure. For these reasons, the effective sealing of semi-wide mouth container necks presents unique challenges to closures manufacturers.
The foregoing advantages of the present invention will be better understood upon a reading of the specification set forth below in conjunction with the accompanying drawings.


A shunting mechanism is provided within a socket of a light string system having a resistive element that substantially mirrors the resistive characteristic of the bulb inserted in the socket. The shunting mechanism is disabled when the bulb is inserted into the light string socket. When the bulb is removed from the light string socket, the shunting mechanism bridges the internal socket leads so as to maintain current flow and power delivery at levels similar to those provided when the bulb is present. In one embodiment, the resistive element is a resistive coating on the shunting mechanism or a resistive node on the shunting mechanism. In other embodiments, the resistive element is applied to the socket's internal leads. In yet other embodiments, the resistive element consists of sophisticated electronic circuitry specifically designed to mirror the resistive characteristics of the bulb assembly.

1. Field of the Invention
The invention is for a system and method for providing a resistive shunt that provides for connecting two terminals within a light socket of a light string when the bulb is removed. Essentially, a resistive element is included as part of or comprises the socket bridge itself such that when the light bulb is removed, the electrically resistive element is provided in series with the bridge so as to present the same resistance between the external socket leads as that provided by the bulb when it is inserted into the socket and operational. In this manner, the overall resistance characteristics of the light string are not changed upon the removal of one or more bulbs in the light string and power/current demand increases are avoided within the light string system upon bulb removal.
2. Description of the Prior Art
Holiday light strings are an omnipresent facet of many holiday decoration displays. Safety is one of the primary concerns in designing these light string systems. In particular, the removal of bulbs from the sockets within which the bulb typically resides presents several practical operational problems as well as safety concerns. Numerous bridging technologies exist that provide for a closed circuit condition within the socket when bulbs are removed such that the remaining bulbs in the light string remain lit. For Example, U.S. Pat. No. 7,591,658 issued on Sep. 22, 2009 to Chen (hereinafter "Chen") provides one such shunting system in which one of the legs of an electrically conductive torsion spring is moved into a bridging position connecting the internal socket leads when the bulb is removed from the socket. One problem with this arrangement, however, is that the torsion spring is typically made of copper or another low resistance conductor. Thus, the removal of the bulb, including its associated filament resistance, causes the current drawn by the light string to increase upon bulb removal. If numerous bulbs are removed from a string, this problem increases, potentially to the point of dangerous operation. Commercial light string systems are typically rated for a maximum current draw or power consumption, and any increases up to or over those limits may be considered a safety hazard.
Underwriters Laboratories (UL) is a safety consulting and certification company that provides safety-related certification, validation, testing and inspection services. The organization advises and trains manufacturers of commercial manufacturers on various safety-related topics. UL certification is often a requirement for commercially distributed electrical systems to be offered to the public. Many retail outlets that offer holiday light string systems, for example, require that the light strings and components offered by their manufacturers pass UL certification as a condition of being offered for sale in their retail establishments. Numerous other worldwide certification organizations exist that provide similar functions and services.
Maximum light string current draw or power consumption is one of the most recent safety requirements to be formulated by electrical safety, standards-setting bodies. UL 588, for example, covers seasonal and holiday decorative products, specifically "factory-assembled seasonal lighting strings with push-in, midget-screw, or miniature-screw lamp holders connected in series for across-the-line use or with candelabra- or intermediate-screw lamp holders connected in parallel for direct-connection use . . . . [and] which are portable and not permanently connected to a power source." To achieve UL certification under this specification section, a shorting test of light sockets shunts is conducted wherein bulbs are removed one at a time until many bulbs are removed from a single string. To achieve UL certification under this standard, the current of the light string shall not increase beyond a certain percentage, typically 10%.
Thus the need exists in the industry in which a shunting mechanism is provided, within a bulb socket and external to the bulb itself, such that the resistive characteristics of the shunt mirror those of the removed bulb. This may be as simple as matching a resistance of the two. In more complicated systems, the bulb circuitry can be mirrored within the shunting mechanism itself. In any case, any number of bulbs may be removed from the light string containing such a system without appreciable increased in current or power dissipation, thereby achieving the goals of the above-mentioned standards organizations and creating a safer light string system.

Apparatus and method for providing a resistive shunt within a light string


A medical device can include a housing, a first seal structure, and a seal expander. The first seal structure can have a proximal end and a distal end, and a side wall surrounding and defining an interior chamber. A seal wall can be connected to the side wall and include an expandable opening. A seal expander can be coupled to the housing, and can be at least partially in the interior chamber of the first seal structure. The seal expander can include an expandable neck portion and a seal interface portion, the seal interface portion being near an intersection of the side wall and the seal wall.

Certain surgical procedures, such as minimally-invasive or laparoscopic surgery, can involve delivery of an insufflation of a gas into the body. For example, in a laparoscopic procedure, an insufflation gas can be delivered to the peritoneal cavity of a patient to distend the abdomen and improve visual and physical access to internal organs in the abdomen. Distension of the patient's abdomen can provide sufficient operating space enable adequate visualization of the structures and manipulation of instruments inside a patient.
It is important to maintain a sealed system to maintain insufflation during a surgical procedure. For example, the interface between surgical equipment and an access orifice in the patient's body must be sealed to avoid or reduce leakage of insufflation gas so that insufflation can be maintained.
In a laparoscopic procedure, one or more cannulas are typically used to a deliver surgical tools into a body cavity. A cannula seal can be used to provide a seal between the cannula an outer surface of an instrument shaft that is connected to surgical tool to avoid or reduce leakage of insufflation gas through the cannula during the procedure. The cannula seal is a critical component for surgery in the abdomen, because without it there is no insufflation, and without insufflation surgery cannot be effectively carried out.
U.S. Pat. No. 6,945,983 discloses a sealing device with a variable central opening.
U.S. Pat. No. 5,209,737 discloses an elastomeric septum that is disposed in a trocar channel and includes portions which define an orifice having, in a relaxed state a first cross-sectional area, and an actuation assembly provided with levers which pivot radially outwardly to expand the seal and thereby expand the orifice to a second cross-sectional area in response to entry of the instrument into the channel.

This patent is subject to a terminal disclaimer.


A VAR generator compensation system wherein the voltage of the capacitor or reactor bank is changed as a means of adjusting the phase angle is taught. Briefly stated a reactive bank such as a capacitor bank is connected to the secondary of an autotransformer such that the voltage of the reactive bank is controlled by the autotransformer. The line and load are connected to the primary of the autotransformer, such that changing the voltage of the autotransformer and hence the secondary voltage connected to the reactive bank, thus changes the VARS generated on the grid or system.

There is an increasing need, both on the part of the electric utility industry and of end-users, to improve and maintain power quality. The reasons for this are many, but generally include the direct cost of billable power delivered to a user. Hence, where current and voltage are in phase with each other (unity power, i.e. having a power factor of 1, pf 1) the maximum amount of power is delivered and hence, can be billed. Further, and perhaps to some extent more importantly, the secondary costs of power are becoming more dominant. By secondary costs, are meant equipment maintenance problems resulting in reduced life or efficiencies when unity power is not achieved. One example of this is overheating and/or inefficient operation of motors as current lags voltage.
Moreover, this problem is even more pronounced of late as a result of recent regulatory changes which allow electric power users to purchase power from distant producers of electricity, rather than the local utility company. As such, due to the potential for a great number of users connecting to, placing power on, or removing power from the electric grid, the quality of power is not only apt to have greater swings to it, it is likely to happen much more frequently.
Solutions for correcting power factor in order to bring the phase angle closer to unity typically incorporate what are commonly referred to as VAR generator systems. These have taken many forms, the most prevalent being capacitor banks, but all attempt to adjust the timing and hence phase of the voltage in relation to the current in order to bring it in line with current. Power, in an alternating current system, is based upon the value of the voltage multiplied by the value of the current and of the cosine of the phase angle between them (P=VIcos.theta.). Accordingly, where current and voltage are in phase unity is achieved and the phase angle is zero and hence the cosine of zero degrees is one and, therefore, power approaches its maximum amount (the voltage times the current (P=VI)).
It is well known that loads on the system, as well as transmission lines themselves, are generally inductive (and sometimes reactive) in nature. Therefore, the current will lag the voltage by some amount theta (.theta.). Therefore, as a practical matter, the power factor is less than one. Since consumers of electricity are metered upon current consumed, rather than the mathematical product of the two multiplied by the phase angle, consumers are, in effect, charged at a rate equal to a unity of one, but in fact receive less power. While utility companies attempt to provide power at unity, it is extremely expensive and difficult to do, despite the fact that this also indirectly affects the utilities ability to effectively meter and control their grid, thereby depriving them of potential revenue or to adjust the size of the grid to compensate for losses. Moreover, equipment, particularly industrial equipment, will consume more current and hence more power when the power factor is less than 1. This in turn requires the utility to produce, distribute and control more power which is costly. Hence, there is an incentive for utilities and consumers to produce and obtain optimum power, i.e. voltage and current having a power factor of 1.
As mentioned, the typical solution is to add capacitor banks either at substations or to the distribution lines in the grid. Further, some large users attempt to also add capacitor banks at the individual point of consumption. While this will of course improve the voltage at the end location, switching of capacitor banks in response to varying changes in the system, generates voltage transients that are frequently more objectionable than the low voltage/low power at the end location. These voltage transients cause problems themselves and the advent of computers, processors and the like, has made these disturbances more objectionable. Further, losses of computer systems and sub-systems cause even more problems when they are adversely affected.
As previously indicated, a number of methods have been tried to overcome these problems. One such solution may be found in U.S. Pat. No. 3,573,549 entitled "Electrical System Including Capacitors", issued Apr. 1, 1971 to Wolf. There, it is taught that capacitance in a load circuit is decreased in response to the changes in the applied voltage wherein capacitors are connected parallel to each other which are then connected in series with the load, and wherein a second bank of capacitors is connected in parallel with the first bank such that the addition or deletion of the second bank boosts voltage and, hence, the KVARs supplied to the circuit are adjusted.
A schematic diagram of this may be seen in FIG. 1, in which, typically, there is a capacitor bank VAR system showing generally as (10). This VAR system (10) is comprised of a power source which may be an electrical generation facility, a sub-station or the like (12). The system impedance is shown schematically in box (14) and represents the impedance of the system as a function of transmission equipment, lines, length of lines and the like. Similarly, the load (16) is shown. Connected serially between the power source (12) and the load (16) are capacitor banks A and B (18), (20) respectively. Capacitor bank A is comprised of capacitors (22), (24) and (26), while similarly, capacitor bank B is comprised of capacitors (23), (25) and (27). As can be seen, steady state current flows through capacitor bank A (18) and by closure of bank switch (28) capacitor bank B (20) is placed in parallel with capacitor bank A (18).
Accordingly, the customary intent and solution of VAR systems is to place a varying number of electrically parallel capacitors in series as a bank in order to achieve a unity power factor or as close thereto as possible. In this fashion, it can be seen that phase control is obtained by switching the entire bank on or off, or multiples of banks on or off in one operation in an attempt to retard the voltage with respect to the current. In practice, it is readily known that finer resolution is obtained by making multiple banks of smaller sizes. However, this is obviously more expensive since each bank must be separately switched while also requiring additional space. Similarly, with increased numbers of capacitors for finer control the likelihood and frequency of voltage transients and, hence, damage to down-line equipment is greatly increased.
Other examples of automated VAR-type systems may be found in U.S. Pat. No. 5,422,561 entitled "Automated Voltage And VAR Control In Power Transmission And Distribution Networks", issued Jun. 6, 1995 to Williams, et al. There, an elaborate algorithm-based scheme is utilized to again simply switch capacitors in and out of the network. Another VAR-type of system may be found in U.S. Pat. No. 4,769,587 entitled "Power Factor Control With Overvoltage And Undervoltage Override Control In A Capacitor Control System For A Distribution System", issued Sep. 6, 1988 to Pettigrew. This patent again teaches the use of switching in or out a plurality of capacitors in the capacitor bank with method and apparatus to modify the operating characteristics of the system depending on load conditions, i.e., light versus heavy loads.
U.S. Pat. No. 4,719,402 entitled "VAR Generator System With Minimal Stand-by Losses", issued Jan. 12, 1988 to Brennen, et al, utilizes capacitor banks wherein thyristor switches are utilized to add or delete the reactive components such as the capacitor bank or an inductor.
U.S. Pat. No. 4,684,875 entitled "Power Conditioning System And Apparatus", issued Aug. 4, 1987 to Powell, utilizes a synthesizer network to develop a "stiffness" to suddenly lagging phase angles and the like, again with capacitor banks.
U.S. Pat. No. 4,645,997 entitled "Transient Free Solid State Automatic Power Factor Correction", issued Feb. 4, 1987 to Whited, utilizes capacitors hooked up in a Delta-type configuration through use of optically isolated semi-conductor devices.
U.S. Pat. No. 4,482,857 entitled "Close Loop Power Factor Control For Drilling Rigs, issued Nov. 13, 1984 to Porche, et al., utilizes an over-excited generator in order to provide reactive power to effect power factor correction.
U.S. Pat. No. 4,307,331 entitled "Hybrid Switched-Capacitor Controlled-Inductor Static VAR Generator In Control Apparatus, issued Dec. 22, 1981 to Gyugyi, utilizes a VAR detector/controller in conjunction with parallel capacitors to switch in a bank of capacitors in order to effect phase angle changes.
U.S. Pat. No. 4,275,346 entitled "Static VAR System With Means For Correcting For Negative Phase Shift", issued Jun. 23, 1981 to Kelley, Jr., discloses the use of phase control switches with a capacitor bank.
Moreover, the larger the system or the finer the control necessary or desired, the more expensive and larger in complexity the control system becomes.

Siemens Power Transmission & Distribution, L.L.C.


A method for preparing a pigment dispersion includes milling a starting pigment dispersion containing a pigment and optionally a carrier and a dispersant with milling media having an average particle size of about 100 μm or less, until a final pigment dispersion having at least one of a desired pigment average particle size and a desired pigment particle size distribution is obtained; optionally separating the milling media from the final pigment dispersion; and optionally diluting the final pigment dispersion to obtain a desired pigment particle concentration.

Pigment dispersions are part of many systems and compositions. For example, even in only the printing and imaging field, pigment dispersions are used in making photoreceptors, inks, toners, paints, and the like. Generally, pigmented systems require the grinding down of large-sized pigment agglomerates to desired small-sized pigment sized dispersions, such as grinding down from micron-sized agglomerates to desired nanometer-sized particles. The pigments are also generally contained in a dispersion, where the grinding down or particle size reduction is accompanied by appropriate dispersants to achieve stable dispersions.
The most common method for pigment particle size reduction is to use milling media to accomplish the particle size reduction. Historically, this milling has occurred with the use of millimeter- to sub-millimeter-sized media, such as in the range of 6 or 3 mm down to about 600 μm. Recently, the trend has been to further decrease the milling media size, such as to about 300 μm. The smaller media particle size is desired because the smaller the milling media particle, the faster the particle size reduction of the pigment agglomerates, although with an appropriate increase in milling media agitation.
A problem with reducing the milling media particle size, however, is that generally as the particle size decreases, the product cost of the milling media increases. While it may be desirable to decrease the milling media particle size below 300 μm, that smaller size milling media becomes prohibitively more expensive. For example, the product cost for milling media can reach or exceed $1,000/kg for sub-100 micron beads.
Numerous processes are within the purview of those skilled in the art for forming a wide variety of compositions using pigments and pigment dispersions. For example, inks can be formed by mixing the pigment dispersion with a liquid carrier and other optional components; photoreceptors can be formed by mixing the pigment dispersion with a film-forming resin to form different layers of the photoreceptors; and toners can be formed by mixing the pigment dispersion with resin particles, wax particles, and other additives, either in a conventional mixing apparatus or in en emulsion/aggregation process.
It would be advantageous to provide new and improved processes for forming pigment dispersions of a desired small particle size, using less expensive milling media and milling processes.

Preparation of pigment dispersions and toner compositions


An anti-warpage backgrinding tape (11) is secured to the circuit side (12) of a semiconductor wafer (14). The backside (16) of the wafer is background. The backside of the wafer is secured to dicing tape (18) so that the anti-warpage backgrinding tape is exposed. The wafer is diced to create individual die structure (34). The die structure comprises semiconductor die (22) with anti-warpage tape elements (36) on circuit sides of the semiconductor die. A die structure is removed from the dicing tape. The backside of the die of the die structure is adhered to a substrate (24). The anti-warpage tape element is removed from the die. The anti-warpage backgrinding tape is preferably partially or fully transparent to permit sensing of guide markings on the wafer during wafer dicing. The adhesive is preferably a curable adhesive. The adhesion between the anti-warpage tape element and the chosen die may be reduced by the application of heat (38).

The present invention relates to methods for reducing warpage of semiconductor die.
Semiconductor wafer thinning technology is important to package development. Current wafer thinning methods include the in-line wafer B/G (BackGrinding) system and the DBG (Dicing Before Grinding) process. Wafer B/G systems have used a film adhesive process in which the wafer is thinned by backgrinding and then is diced (that is, the semiconductor wafer is separated into individual semiconductor die), typically using a laser or a dicing saw. The laser or dicing saw follows markings on the circuit side of the wafer. Before dicing, a wafer mounting tape, also called dicing tape, is typically attached to the backside of the wafer. The dicing tape keeps the die in place after dicing. With the DBG process, the wafer is diced before backgrinding.
The semiconductor die is typically mounted onto a mounting surface of a substrate or of a previously mounted die and is adhered to the die or to the substrate with a paste (typically an epoxy paste adhesive) or a film adhesive. Generally, paste adhesives have been used more often than film adhesives.
After the chip mounting process, bonding pads of the chips are connected to bonding pads of the substrate, and/or bonding pads of the underlying previously mounted die, with Au or Al wires during a wire bonding process to create an array of semiconductor chip devices. Finally, the semiconductor chips and their associated wires connected to the substrate are encapsulated, typically using an epoxy-molding compound, to create an array of encapsulated semiconductor devices. The molding compound protects the semiconductor devices from the external environment, such as physical shock and humidity. After encapsulation, the encapsulated devices are separated (singulated), typically using a laser or a saw, into individual semiconductor chip packages.
To obtain the maximum function and efficiency from the minimum package, various types of increased density packages have been developed. Among these various types of packages is the multiple-die semiconductor chip package, commonly referred to as a multi-chip module, multi-chip package or stacked chip package. A multi-chip module includes one or more integrated circuit semiconductor chips, often referred to as circuit die, stacked one onto another to provide the advantages of light weight, high density, and enhanced electrical performance. In addition, reducing the thickness of semiconductor die also helps to increase the package density. However, reducing the thickness of semiconductor wafers, and thus the thickness of the resulting semiconductor die, can create warpage problems for both the wafer and the die. While further backside treatment processes, such as wet etch, CMP, and dry polishing, can help, typically not all the warpage in the wafer can be removed, and this warpage can result in problems relating to nonuniform bond line thickness (BLT) during the die attach process.

Method for reducing semiconductor die warpage


A photographic camera capable of taking interspersed full size and panoramic size exposures comprises a rectangular back frame opening for forming a full size exposure on a film in the camera, and respective masking blades supported for pivotal movement to a masking position for masking an upper rectangular portion and a lower rectangular portion of the back frame opening to allow only a panoramic size exposure to be formed on the film and to a non-masking position not masking the upper and lower portions to preclude a panoramic size exposure from being formed on the film. According to the invention, the masking blades have respective extension means at which they are supported for pivotal movement for moving the masking blades in only one direction from their non-masking position to their masking position and to return the masking blades in only one direction, different than the first-mentioned direction, to their non-masking position.

1. Field of the Invention
The invention relates generally to the field of photography, and in particular to a photographic camera capable of taking interspersed full size and panoramic size exposures.
2. Description of the Prior Art
U.S. Pat. No. 5,086,311, issued Feb. 4, 1992, discloses a photographic camera capable of taking interspersed full size and panoramic size exposures. Typically, a full size exposure is about 24.4 mm.times.36.4 mm and a panoramic size exposure might be about 13.3 mm.times.36.4 mm. Thus, the panoramic size exposure has a stretched-out or panorama-like appearance as compared to the full size exposure.
Looking at the '311 patent, within the camera body there is provided a (conventional) rectangular back frame opening for forming a full size exposure on a filmstrip. Also, respective masking blades are supported for pivotal movement to a masking position for masking an upper rectangular portion and a lower rectangular portion of the back frame opening to allow only a panoramic size exposure to be formed on the filmstrip and to a non-masking position not masking the upper and lower portions to preclude a panoramic size exposure from being formed on the filmstrip, i.e. to allow a full size exposure to be formed on the filmstrip.

Photographic camera for panoramic size exposures using unidirectional masking blades


The present invention provides a cover tape for packaging a semiconductor device which protects the outer shape of the semiconductor device, and is capable of improving the mounting speed of the semiconductor device by shipment in tape, and a package for the semiconductor device using the cover tape for packaging the semiconductor device. The cover tape for packaging the semiconductor device has a net-shaped structure at least in a portion, and the cover tape for packaging the semiconductor device is pasted onto an embossed tape which has a number of pockets containing semiconductor devices. The package for the semiconductor device contains an embossed tape which has a number of pockets which contain semiconductor devices, and the cover tape for packaging the semiconductor device.

1. Field of the Invention
The present invention relates to a cover tape for packaging semiconductor device which ensures quality and reliability of a semiconductor device by protecting the outer shape of the semiconductor device, and is capable of improving the mounting speed of the semiconductor device by shipment in tape, and a package for semiconductor device using the cover tape for packaging semiconductor device.
2. Description of the Related Art
The shipment in embossed tape has been employed as a delivering embodiment of a semiconductor device for mounting the semiconductor device on a substrate. In the shipment in embossed tape, the semiconductor device is delivered packaged in a package which contains an embossed tape on which pockets for containing the semiconductor device are formed in accordance with the shape of the semiconductor device such as LSIs, etc. and a cover tape which packs the embossed tape. The semiconductor device contained in the package is taken out after the cover tape is peeled off and mounted on a surface of the substrate automatically. Because the embossed tape is advantageous in being able to transport the semiconductor device such as LSIs, etc. in large quantity and in enabling high-speed mounting of the semiconductor device on a substrate by users, the demand for shipment in embossed tape is growing in recent years.
However, with a progress of polarization (grow in size and downsizing) of semiconductor devices, small, thin and light electronic components such as CSP/CHIP, etc. are being shipped or mounted in tray because shipment in embossed tape is difficult due to manufacturing of the embossed tape which makes the high-precision processing impossible.
The shipment in tray has a problem in mounting speed which is two to three times slower compared to that of the shipment in tape because of the delay caused by the use of intermediate table when a general-purpose mounting device is used. Moreover, there are two types of mounting device: general-purpose type which is applicable for both shipments in tray and tape and high-speed type which is applicable only for shipment in tape. The mounting device of high-speed type has a problem that it is not applicable for shipment in tray.
Therefore, it is necessary to improve the embossed tape and to realize the use of the high-speed mounting device by shipment in embossed tape in order to realize high-speed mounting of the semiconductor device.
For example, a tape wound on a reel as shown in FIG. 1A is known as the embossed tape. An enlarged view of the embossed tape in X portion surrounded by dashed line in FIG. 1A is shown in FIG. 1B and a cross-sectional view is shown in FIG. 1C. As shown in FIG. 1C, semiconductor devices, IC chips 110 are packed in a package containing an embossed tape 100 on which pockets 100A which contain the IC chips 110 are formed and a cover tape 120 which packs the embossed tape 100. The IC chips 110 contained in the pockets 100A are transported in high speed, and taken out after the cover tape 120 is peeled off in high speed during mounting on the substrate. During this time, there has been a problem with conventional cover tape 120 that the IC chips 110 pop out from the pockets 100A due to absorption at low-pressure and static electricity, etc.
For this reason, cover tapes on which openings 125 or openings 126 are formed as shown in FIGS. 1E and 1G (Japanese Patent Application Laid-Open (JP-A) No. 4-031215 and 2005-132421) and a cover tape on which projections 127 are formed as shown in FIG. 1I (JP-A No. 2005-35636) have been proposed. These cover tapes 120 inhibit popping out, etc. of the semiconductor devices (IC chips 110) which occurs during peeling off of the cover tapes 120 by decreasing the contact area between upper surface of the semiconductor devices (IC chips 110) and the cover tapes 120 with the openings 125, the openings 126 or the projections 127. However, when forming the projections 127, exclusive cover tape is needed for every pockets 100A pitch. Furthermore, it becomes necessary to make the depth of the pockets 100A as much deeper as the height "t" of the projections on the cover tape 120 on which the projections 127 are formed as shown in FIG. 1I and the cover tape 120 on which the openings 126 are formed in form of projection as shown in FIG. 1G. Further, when the openings 125 shown in FIG. 1E and the openings 126 shown in FIG. 1G are formed, an insulating layer 122 is in contact with or adjacent to the semiconductor device because end faces of the openings 125 and 126 of the cover tapes 120 are exposed as shown in cross-sectional views in FIGS. 1F and 1H. Generally, a sheet S prior to forming of cover tape 120 has a two-layer structure containing an insulating layer 121 and an antistatic layer 122 for material cost reduction as shown in FIG. 1D. Because the insulating layer 121, which takes over the most part of the sheet S, does not have conductive and antistatic functions, a problem of circuit destruction due to charged semiconductor device or dust generated from the end faces of the openings 125 and 126 which attaches to the semiconductor device during mounting on the substrate occurs as shown in FIGS. 1F and 1H.
In consequence, a cover tape for packaging semiconductor device which prevents generation of powder dust by inhibiting static electricity, ensures quality and reliability of a semiconductor device and is capable of improving the mounting speed of the semiconductor device by shipment in tape have not yet been provided and further development is desired.
It is an object of the present invention to solve foregoing problems and to fulfill the following purposes.
The purpose of the present invention is to provide a cover tape for packaging semiconductor device which ensures quality and reliability of a semiconductor device by protecting the outer shape of the semiconductor device, and is capable of improving the mounting speed of the semiconductor device by shipment in tape, and a package for semiconductor device using the cover tape for packaging semiconductor device.

Cover tape for packaging semiconductor device and package for semiconductor device


A semiconductor device, which is characterized by that two or more island-shaped semiconductor layers including first and second island-shaped semiconductor layers are formed on the same substrate, at least the first island-shaped semiconductor layer has steps in its side wall so that sectional area of a cross section parallel to the surface of the substrate varies stepwise with respect to height in the vertical direction, the second island-shaped semiconductor layer is different from the first island-shaped semiconductor layer with respect to the presence/absence of a step in the side wall or the number of steps, and each of the first and second island-shaped semiconductor layers provides an element on a stair part of the side wall divided by the steps or on the side wall having no steps.

With improvement in the semiconductor technology, especially, microfabrication technology in recent years, miniaturization and increase in capacity of a transistor and a memory cell are rapidly advancing. As one of methods for simultaneously realizing miniaturization and capacity increase, an EEPROM has been proposed, in which lattice-shaped grooves are formed in the surface of a semiconductor substrate, thereby forming a plurality of island-shaped semiconductor layers arranged in a matrix and separated from each other, and memory cells are formed by using side walls of the island-shaped semiconductor layers (for example, refer to Japanese Unexamined Patent Publication No. 2003-068885).
FIG. 38 is a cross section showing the structure of an island-shaped semiconductor layer formed in the EEPROM. As shown in FIG. 38, the sectional shape in the direction perpendicular to the surface of the semiconductor substrate, of an island-shaped semiconductor layer 110 made by silicon is a step-like shape. In parts of the side wall divided by steps of the island-shaped semiconductor layer 110, memory cells each having a charge storage layer 510 and a control gate 520 are disposed adjacent to each other. Further, selection transistors each having a selection gate 500 are disposed on the side wall of the island-shaped semiconductor layer 110 so as to sandwich the memory cells in the vertical direction, thereby forming a memory unit.
In the EEPROM, the island-shaped semiconductor layers 110 each having such a shape are disposed in a matrix, and memory units each having the above-described structure are connected in an array to form a memory array.

Semiconductor device, method for manufacturing the semiconductor device and portable electronic device provided with the semiconductor device


Techniques are disclosed herein for configuring a virtual network. One embodiment provides a computer-implemented method that includes receiving a request to add network interface cards (NICs) of a new virtual machine (VM) host to the virtual network, and determining, using a protocol by which network devices advertise information, ports of at least one physical switch to which the NICs are connected. The method further includes determining, based on a predefined network configuration document, virtual local area networks (VLANs) which are enabled on the ports of the at least one physical switch to which the NICs are connected. In addition, the method includes assigning the NICs to ports of at least one virtual switch in the virtual network based on the VLANs as determined.

Computer virtualization is a technique that involves encapsulating a computing machine platform into a virtual machine (VM) that is executed under the control of virtualization software running on a hardware computing platform (also referred to herein as "host server" or "host"). A group of hardware computing platforms may be organized as a cluster to provide resources for VMs. In a data center, it is common to see hundreds, even thousands, of VMs running on multiple clusters of host servers.
A virtual infrastructure (VI) administrator may use virtualization management software to manage virtual machine configurations and computing resource allocations. One feature of the virtualized computing environment controlled by the virtualization management software is virtual networking VMs can be created with software-based virtual network adapters that are logically connected to a virtual switch that may be further connected to physical network adapters installed in the host computer. In turn, the physical network adapters can be coupled to physical switches. Some of the ports of a physical switch can be assigned to one or more virtual local area networks (VLANs) defined in the physical network (e.g., to implement a traffic isolation scheme).
Namespace-based application containers may be connected to a physical network in a manner similar to that of virtual machines. A namespace-based (or any other type) application container is an isolated execution space provided by an operating system to an application. Multiple containers may be provided by a single operating system instance running within a virtual machine or directly on a physical computer. Each container may be provided with its own network address, with the host operating system functioning as a virtual switch to provide communication between multiple containers on the same host and between containers and the outside world.
One approach for managing virtual network connections in data centers with a large number of VMs running on multiple host servers is the "distributed virtual switch" (DVSwitch) described in U.S. Pat. No. 8,195,774, incorporated in its entirety herein by reference. A DVSwitch permits virtual switches on multiple host servers to be managed as if ports of those virtual switches belonged to a single switch, the DVSwitch. The DVSwitch may have uplinks which connect to physical network adapters, as well as VM ports which provide connections for VMs. Some of the VM ports on the DVSwitch (or groups of the VM ports) can be assigned to a particular VLANs defined in the physical network (e.g., to comply with a defined traffic isolation scheme).
When a new host is added to the cluster, physical network adapters (also referred to herein as "network interface cards" (NICs) or "physical network interface cards" (PNICs)) of the new host may be connected with Ethernet cables to physical switches. Further, a NIC can be connected to a port of a physical switch assigned to a particular VLAN. Because servers and networks are typically administered by separate teams who may be located in different places, the network administrator may connect NICs of the new host to physical switches and notify the VI administrator that the new host has been added to the network. However, in order for the VI administrator to be able to configure the virtual network properly, additional information about the physical network configuration may be required. For example, to properly connect the NICs of the new host with a DVSwitch, the VI administrator needs to know which NICs are connected to which VLANs in order to comply with the traffic isolation scheme currently in place. Typically, the VI administrator must file a ticket with the network administrator to obtain such additional information, which adds undesirable delay to the virtual network configuration process. For example, the network administrator may take 1-2 business days or longer to answer the ticket with the required information, especially when the VI administrator and network administrator are in different geographic locations.

Automatically configuring data center networks with neighbor discovery protocol support


The disclosure is directed to a system and method of fueling and mitigating debris for an illumination source. An illumination system may include a plasma-based illumination source. The illumination system may provide illumination along an illumination path emanating from an illumination origin of the illumination source. A gas jet nozzle may be disposed at a selected distance from the illumination origin or proximate to the illumination origin. The gas jet nozzle may be configured to provide fuel gas to fuel the plasma-based illumination source. The gas jet nozzle may be further configured to provide fuel gas in a selected direction substantially opposite to a direction of illumination emanating from the illumination origin to remove at least a portion of debris from the illumination path.

Illumination systems operating at EUV, DUV, or UV wavelengths, among others, are often desirable for semiconductor inspection and analysis. A material inspection or analysis system may utilize a plasma-based illumination source, such as a discharge produced plasma (DPP) source, to provide illumination at a selected wavelength. Under current methods, a fuel gas may be pumped into a chamber of the plasma-based illumination source to fuel plasma discharge. Illumination resulting from the plasma discharge may emanate from an illumination origin of the plasma-based illumination source along an illumination path.
Illumination transferred along the illumination path may be accompanied by debris, such as ions and particles, emitted from the plasma discharge, which may cause damage and reduce the illumination. Debris may be mitigated by employing additional devices or systems to remove at least a portion of debris from the illumination path. However, additional systems or devices for debris mitigation tend to increase the size and complexity of an illumination system and also tend reduce the overall illumination output. Thus plasma-based illumination sources are often limited to applications that do not require relatively high illumination power.

System and method of simultaneously fueling and mitigating debris for a plasma-based illumination source


A lane monitoring system deployed on a vehicle is provided for monitoring the position of the vehicle relative to a lane in which the vehicle is traveling. The system comprises a front camera for capturing front lane image data relating to an area substantially to the front of the vehicle and a rear camera for capturing rear lane image data relating to an area substantially to the rear of the vehicle. A processor is coupled to the front camera and the rear camera and is configured to receive the front lane image data and the rear lane image data. The processor is further configured to determine the position of the vehicle relative to the lane boundary from (1) the front lane image data when the front camera is operational, and (2) the rear lane image data when the front camera is not operational and the rear camera is operational.

In recent years, it has become fairly common to find one or more cameras deployed on a vehicle and utilized in any one of a number of applications. For example, a camera may be mounted proximate the rear of a vehicle and coupled to a display that generates images of the vehicle's rearward path to which a driver may refer when backing-up to avoid collision with a rear obstacle. Cameras have also recently been employed in lane monitoring systems that determine if a vehicle is drifting (e.g., straying or departing) from the lane in which it is traveling. When it is determined that a vehicle has drifted from its desired lane position (e.g., from the center of the lane) by a predetermined amount, the lane monitoring system may: (1) alert the driver of this condition (commonly referred to as a lane departure warning function), and/or (2) actively direct the vehicle back toward the center of the lane (commonly referred to as a vehicle heading correction or lane keeping assist function).
Lane monitoring systems configured to provide a lane departure warning (LDW) function generally employ a frontward-looking (or downward-looking) camera, a processor, and an alert generator. The processor receives lane image data from the frontward-looking camera to determine the location of lane markers, and thus the lateral boundaries of the lane, relative the vehicle. If it is determined that the vehicle is drifting too far from the center of its lane (or if the distance between the vehicle and the lane markers has exceeded a minimum threshold value), the lane monitoring system causes an alert to be generated (e.g., an audible or visual alert), which may vary in relation to the degree of drift. This alert may include a haptic alert (e.g., a seat vibration) designed to prompt the driver into performing an appropriate lane correction. One known lane monitoring system, for example, utilizes an actuator coupled to the vehicle's steering wheel to provide a driver with the tactile impression that his or her vehicle is traveling along an elongated groove with sloping sidewalls running within the lane.
Lane monitoring systems configured to provide a lane keeping assist (LKA) function (i.e., configured to perform vehicle heading corrections when lane drifting becomes too severe to actively direct a vehicle back toward the center of its lane) typically comprise a frontward-looking (or downward-looking) camera, an actuator coupled to the vehicle's steering wheel, a plurality of sensors (e.g., steering wheel angle sensor, vehicle speed sensor, etc.), and a processor that determines a target steering wheel angle from lane image data provided by the camera and from other data provided by the plurality of sensors (e.g., vehicle speed, lateral acceleration, road curvature, yaw angle, etc.). If the actual steering wheel angle differs from the target steering wheel angle by a threshold amount, the processor commands the actuator coupled to the steering wheel to apply an appropriate amount of torque to correct the discrepancy (i.e., perform a vehicle heading correction) and thus direct the vehicle back toward the desired lane position.
Existing lane monitoring systems employing one or more frontward-looking (or down-ward looking) cameras may be unable to effectively operate under poor visibility conditions (e.g., rain, snow, fog, etc.). Perhaps even more problematically, the cameras employed by existing lane monitoring systems may be temporarily blinded by direct sunlight exposure. Thus, existing systems may not perform properly when the vehicle is being driven in the general direction of the sun and there exists a low sun angle (e.g., the sun is relatively close to the horizon as during sunrise or sunset). Systems employing forward-looking stereo-camera assemblies or multiple downward-looking cameras are relatively complex and expensive to employ.
Considering the above, it should be appreciated that it would be desirable to provide a lane monitoring system having lane departure warning and/or lane keeping assist functions that is capable of operating more effectively under normal driving conditions in general and under poor visibility/direct sunlight conditions in particular. It should further be appreciated that it would be desirable that the implementation costs associated with such systems be minimized by, for example, utilizing components (e.g., rearward-looking cameras) currently deployed on a vehicle. Furthermore, other desirable features and functions of the present invention will become apparent from the subsequent detailed description of the invention and the appended claims, taken in conjunction with the accompanying drawings and this background of the invention.

Vehicular lane monitoring system utilizing front and rear cameras


A system for outputting a media stream and supplemental media streams is provided. A media stream manager outputs the media stream and associated supplemental media streams on a media stream output device. A timing module generates triggering events in conjunction with the output of the media streams according to event data. The media stream manager monitors for and detects the triggering events during the output of the media streams. Upon detecting a triggering event, the media stream manager determines which supplemental media streams are associated with the triggering event and iteratively outputs each associated supplemental media stream to the media stream output device. Supplemental media streams are output either synchronously or asynchronously according to previously determined information. A supplemental media stream that is output asynchronously to the media stream suspends the media stream and the timing of the media stream while the supplemental media stream is output.

There are many people who have access to multimedia but are unable to fully appreciate the content delivered by the multimedia due to impairments to of one of their senses, such as sight or hearing. For example, a person who is hearing impaired may have access to a multimedia content stream having both video and audio aspects, yet can perceive only the video aspect of the content. Likewise, visually impaired persons may have access to a multimedia content stream having both video and audio aspects, yet can perceive only the audio aspects of the content.
Captioning is a supplemental media stream useful in assisting those who are hearing impaired, and has been an industry staple for television programs for many years. The notion of captioning has expanded beyond television broadcasts to other platforms, in particular to computer-delivered multimedia streams. Companies such as Apple and RealNetworks have products that enable content authors to include supplemental captioning streams with end products using proprietary captioning formats. These formats are generally based on W3C's Synchronized Multimedia Integration Language.
One key drawback of current systems for integrating supplemental media streams with main multimedia streams is that the information needed to adequately supplement a main media stream often cannot keep pace with the main media stream. Often, due to the nature of the supplemental media streams, presenting all of the information necessary to adequately supplement the main media stream requires more time than the main media stream allows. As a consequence, content authors must selectively omit some information that would otherwise be included in the supplemental stream, in order to keep pace with the main media stream.
As an example of the foregoing problem, captioning typically displays, in textual format, the dialog of the characters on the screen. Sounds of events that occur off-screen that influence the speech of those characters, such as a scream or sounds of a collision in the background, might need to be omitted in order to capture all of the dialog of the present characters. Ideally, there would be a description of the sound that so influences the speech of those characters. However, because the dialog of the characters continues, it is often necessary to omit such descriptions. In addition, supplemental media from one scene often "spill over" into the following scene, creating some confusion as to what is currently occurring in the main media stream.
What is needed is a system for supplying supplemental media streams along with a main media stream and selectively pausing the main media stream to permit the supplemental media stream to fully present the content associated with a particular event. Additionally, the system should suspend the timing of the main media stream upon which the supplemental media streams are based so that the timing of the supplemental media streams are not affected by pauses in the main media stream.

Synchronization mechanism and the implementation for multimedia captioning and audio descriptions


A memory connector includes an insulative housing, a plurality of terminals accommodated in the insulative housing, a cover engaged with the insulative housing and a switch mechanism secured in the insulative housing. The switch mechanism includes a first member and a second member. The first member keeps a proper distance to the second member. When a memory card is fully inserted into the memory card connector, the memory card passes over and pushes the first member to make electric connection to the second member. The connection between the first member and the second member generates a signal to judge whether the memory card is right inserted or not.

1. Field of the Invention
The present invention relates to an electric connector, and more particularly, to a memory card connector.
2. The Related Art
Memory cards are known in the art and contain intelligence in the form of a memory circuit or other electronic program. Usually, a card reader reads the information or memory stored on the card. Such cards are used in many applications in today's electronic society, including video cameras, digital still cameras, smartphones, PDA's, music players, ATMs, cable television decoders, toys, games, PC adapters, multi-media cards and other electronic applications. Typically, a memory card includes a contact or a terminal array for connection through a card connector to a card reader system and then to an external equipment. The connector readily accommodates insertion and removal of the card to provide quick access to the information and program on the card. The card connector includes terminals for yieldingly engaging the contact array of the memory card.
The memory card may be inserted into the card connector of an electronic device insufficiently and fails to make electric connection therebetween, but the user turns on the electronic device as usual; as a result, the electronic device fails to start-up. Hence an improved card connector which is able to judge whether the memory card is right inserted or not is desired to overcome the above-mentioned shortcoming.