A microwave plasma chemical vapor deposition apparatus allows the position of a plasma to be two-dimensionally adjusted in a reaction tube. A second plunger 9 (plunger assembly 8) is disposed on an H plane of a microwave waveguide 2a connected to a microwave oscillator 1 adjacent to an end 2b of the microwave waveguide 2a in facing relationship to a reaction region 7. The plunger 9 is actuated to move the plasma also in a direction perpendicular to the direction of travel of a microwave in the microwave waveguide 2a for two-dimensionally adjusting the position of the plasma. Using the microwave plasma chemical vapor deposition apparatus, a diamond film having a uniform quality and a uniform thickness is formed as on a substrate.

The microwave plasma CVD process employs a microwave to excite and decompose a material gas to generate a plasma which forms a thin film on a substrate or a base. The microwave plasma CVD process is finding use in a wide range of applications from the fabrication of semiconductors to the synthesis of thin films of diamond. The microwave plasma CVD process is highly practical as it can achieve desired film qualities, film thicknesses, and film yields with high reproducibility.
One conventional microwave plasma CVD apparatus is illustrated in FIG. 6 of the accompanying drawings. In FIG. 6 , the microwave plasma CVD apparatus includes a microwave waveguide 2a having an end 2b and an E plane which is perpendicular to an electric vector, and a cylindrical reaction tube 6 of quartz extending through the waveguide 21 a perpendicularly to the E plane at a position adjacent to the end 2b of the waveguide 2a. A shorting plunger 5 is mounted in the end 2b of the waveguide 2a.
The shorting plunger 5 serves as a short-circuiting device for fully reflecting a microwave which has traveled in the waveguide 2a. When the shorting plunger 5 is actuated, a plasma generated in the reaction tube 6 is moved several cm only in the direction of travel of the microwave, thereby finely adjusting the position where the plasma is generated.
The microwave plasma CVD apparatus is usually adjusted in advance to position of the center of the plasma at the central axis of the reaction tube 6. When the shorting plunger 5 is adjusted, the position where the plasma is generated can be moved one-dimensionally in the direction of travel of the microwave. However, it is not possible to move the plasma in a direction normal to the direction of travel of the microwave, and hence to adjust the position of the plasma two-dimensionally.
Since the reaction tube 6 of quartz is transparent, it does not inherently absorb or reflect the microwave. However, if any by-product is deposited on the inner wall surface of the reaction tube 6 during a reaction process, then the by-product deposit absorbs or reflects the microwave.
Any changes in the cross-sectional area of the waveguide 2a or the presence of electric charges or currents in the waveguide wall may interrupt electric and magnetic fields, causing the microwave to spread in perpendicular and oblique directions as well as to travel straight.
If the travel of the microwave in the reaction tube 6 is disturbed, then the distribution of electric field intensities is made uneven, and so is the plasma. When a thin film of diamond, for example, is synthesized by CVD under such a condition, the plasma and the base on which the thin film is to be formed have an ununiform distribution of temperatures. As a result, the quality of the diamond film, the rate at which the diamond film is synthesized, and the thickness of the diamond film become irregular. In the case where the synthesized diamond film is used as the film on a diamond coated tool, e.g., a cutting tool, the cutting performance and the tool life may vary due to the different thicknesses of the diamond film at the respective corners of the cutting tip of the tool. Therefore, the tool cannot be used for stably cutting workpieces.
Therefore, it is an object of the present invention to provide a microwave plasma CVD apparatus which is capable of two-dimensionally adjusting the position of a plasma in a reaction tube.
Another object of the present invention is to provide a method of synthesizing a diamond film of uniform quality and thickness on a substrate with the above microwave plasma CVD apparatus.

Microwave plasma CVD apparatus comprising dual plungers for two-dimension plasma position adjustment


An air data system is described that includes a cone-shaped probe, a plurality of pressure transducers, and a processing device. The cone-shaped probe includes a first pressure port formed in a substantial tip of the probe and extending therethrough, and a plurality of pressure ports formed in a substantially evenly spaced circular pattern about a sloped surface of the probe and extending through the probe. The plurality of pressure transducers are each configured to receive at least one pressure transferred through at least one of the pressure ports and output one or more signals related to the pressures sensed. The processing device is configured to receive signals originating from the transducers. The processing device is further configured to calculate a static pressure, an angle of attack, and an angle of sideslip based on the received signals.

This invention relates generally to air data systems, and more specifically, to methods and systems for determining air data parameters such as one or more of static pressure, angle of attack, and angle of sideslip utilizing an air data system.
Missiles and other air vehicles, manned and unmanned, are presently being developed for operation at extended flight profiles which may include one or more of significantly reducing a time-to-target, traveling at high altitudes (i.e. 60,000 to 100,000 feet), and traveling at high speeds (i.e. Mach 3 and faster). All of these flight profiles utilize at least some air data parameters for flight control of the vehicle. Examples of air data parameters include, for example, an air speed in Mach (M), an altitude (Hp), a velocity (Vc), an angle of attack (AOA), and an angle of sideslip (AOS).
Various pitot probes, mechanical vanes, and other protrusive devices are known to be utilized in conjunction with conventional air data systems so that a static pressure, an angle of attack, and an angle of sideslip can be derived by the conventional air data system. However, when an air vehicle is traveling at the extended flight profiles described above, the air vehicles cannot utilize a conventional air data system. More specifically, to maintain the above described flight profiles, protrusions, pitot probes, and mechanical vanes extending from the body of the air vehicle need to be kept to a minimum because of the drag produced and the stresses that might be exerted on the air vehicle. However, to determine each of the air data parameters listed above, a value for static pressure, Ps, is still needed.

Methods and systems for determining air data parameters


A computer system includes a security module programmed to generate a first privacy key for use with secure communications with a first web site, and a second privacy key for use with secure communications with a second web site, the first and second keys being different. The computer system also includes an identity module programmed to receive a request from the first web site for linking a first user account associated with the first web site with a second user account associated with the second web site, and the identity module being programmed to present a user with an option to link the first and second user accounts.

As users continue to increase their reliance on online resources to conduct business and pleasure, the importance of protecting privacy and facilitating secure transactions grows. Encryption of information is one method for providing privacy and security in the online environment. One encryption method involves the use of a public key that is shared openly with others. The public key is used to encrypt a message that is sent to the owner of the public key. The owner then uses a secret key to decrypt the message. The use of advanced cryptography such as public keys functions to counter "phishing" attacks and provides a new level of protection for online users.
One of the potential disadvantages of this type of cryptography is that when a public key is reused at many online sites, the public key becomes a new form of personally-identifying information. The public key can be thought of as a string of bytes that can be used as a "database key" in addition to being a cryptographic key. In this context, a public key can be employed to correlate and track a user's online activities across multiple online resources. For example, two web sites could compare the public keys registered at their sites, and, finding matches, could correlate the purchasing profiles of the owners of those keys in ways a user did not contemplate or sanction.
In addition, although a user will typically want to preserve his or her privacy when conducting online transactions, there are situations in which the user may want to allow web sites to share information about the user. For example, if a first web site offers discounted goods or services to members of a second web site, and the user is member of the second web site, the user may want to allow the first and second web sites to share information about the user so that the user can receive the discount.
Users therefore desire an online environment in which privacy and security concerns are addressed and in which users can control when and how online resources share user information.


An arbiter circuit (100) can include a latch (106) that latches competing input signals (Req_A and Req_B) to generate latch output signals (latn1 and latn2). A filter section (108) can prevent metastable states of latch output signals (latn1 and latn2) from propagating through to output signals (Sel_A and Sel_B). If both input signals (Req_A and Req_B) are activated, a feedback circuit (110) can activate a feedback signal (fb) after a predetermined delay (δ), provided both output signals (Sel_A and Sel_B) remain inactive.

Asynchronous arbiters or arbiters can resolve (e.g., arbitrate) conflicts between two signals that are received essentially simultaneously. Arbiters play an important role in asynchronous dual port random access memories (RAMs). Arbiters generally have two "request" inputs and two "grant" outputs and resolve conflicts between two conflicting simultaneously received or asserted inputs.
A drawback to conventional asynchronous arbiters can be the presence of metastability conditions. A metastability condition can result from two simultaneously asserted inputs that result in both outputs being either high or at an approximately equal intermediate voltage level. A metastability condition can increase a resolution time by an indefinite amount. Consequently, timing cannot be guaranteed for a conventional asynchronous dual-port RAM subject to a metastability condition.
To better understand various aspects of the embodiments, a conventional asynchronous arbiter will now be described. A conventional asynchronous arbiter is set forth in FIG. 6, and designated by the general reference character 600.
A conventional asynchronous arbiter 600 can receive enable signals CE(L), CE(R), as well as input signals A and B. In response, conventional asynchronous arbiter 600 can provide output signals C (WRITE INHIBIT (L)) and D (WRITE INHIBIT (R)), as well as busy signals /BUSY(L) and /BUSY(R). Ideally, conventional asynchronous arbiter 600 ensures that regardless of whether one or both of signals A and B are active (high in this case), only one of signals C or D is active (low in this case).
The conventional asynchronous arbiter of FIG. 6 includes a latch 602 formed by cross-coupled NAND gates 604 and 606. In addition, NAND gate 608 can receive enable signal CE(L) and output signal C (by way of inverting input) as inputs, and generate signal /BUSY(L). Similarly, NAND gate 610 can receive enable signal CE(R) and signal D (by way of inverting input) as inputs, and generate signal /BUSY(R).
When both input signals A and B are de-asserted (in this case, low) output signals C and D can attain a logical "True" state (in this case, high). When input signal A is asserted (goes high), corresponding output signal C can transition to a logical "low" state. This translates to input signal A "winning" the arbitration. That is, while input signal A remains asserted, other output signal D will remains in the "high" or unselected state, regardless of the value of input signal B. Similarly, if input signal B is asserted alone, output signal D can go to a "low" or selected state, and output signal C can remain in the unselected state regardless of the value of signal A.
However, if both input signals A and B are asserted essentially simultaneously, output signals C and D can be placed in metastable or unresolved state, until latch 602 can settle down in favor of either output signal C or D. The resolution time required for a latch 602 to resolve a metastable state is finite, but can be unpredictable.
The above unpredictability in resolution time can create functional failures in a circuit surrounding the arbiter that can depend on the arbiter making an exclusive choice between outputs C and D in a set period of time. Many conventional approaches to alleviate this problem are known.
One conventional approach that attempts to address the above problem is shown in FIG. 7, and designated by the general reference character 700. Conventional arbiter 700 can include a latch 702, filter gates (704-0 and 704-1), and decision logic 706. In addition, inverters 1702, 1704 and 1706 are included to provide desired logic levels.
Latch 702 can include cross-coupled three-input NAND gates 162 and 163. Gate 162 can receive an enable signal "en_ex", input signal A, and the output of gate 163 (n<0>), as inputs. Gate 163 can receive input signal B, output of gate 162 (n<1>), and output of decision logic 706 (fb), as inputs.
Filter gates (704-0 and 704-1) can be two-input NAND. NAND gate 13 can receive signal n<1> and an enable signal "a_ex" as inputs, and provide filtered output signal n<2> as an output. Similarly, NAND gate 14 can receive signal n<0> and an enable signal "b_ex" as inputs, and provide filtered output signal n<3> as an output. NAND gates 13 and 14 can be designed as metastability filters. According to well understood techniques, such as transistor sizing and/or transistor threshold adjustment, NAND gates 13 and 14 can provide high output signals when the corresponding input signal n<0> and n<1>, are in a metastable state (assuming the corresponding enable signal "a_ex" or "b_ex" is high).
Decision logic 706 can include an AND-NOR combination circuit 708. An AND portion can receive filtered output signals n<2> and n<3> as inputs along with a power enable signal "en_pwr". NOR portion can receive as inputs the output of AND portion, as well as enable signal "en_ex" by way of inverter I702. The output of AND-NOR circuit 708 can be feedback signal "fb".
Referring still to FIG. 7, in the event a metastable condition arises (e.g., both output signals n<0> and n<1> are low, or at some intermediate voltage level), filter gates (704-0 and 704-1) can force filtered output signals n<2> and n<3> to a high level.
Assuming signals "en_pwr" and "en_ex" are both high, in response to filtered output signals n<2> and n<3> being high, decision logic 706 can drive feedback signal "fb" low. This can force output signal n<0> high and hence output signal n<1> low, thus resolving the metastable state and settling the state of latch 702.
In this way, the conventional approach of FIG. 7 makes use of a feedback mechanism to steer an arbiter latch to one side (or output) when the latch gets stuck in metastable condition, thereby yielding a predictable output state.
While the approach of FIG. 7 can be an improvement over that of FIG. 6, such an approach may not be wholly satisfactory for a number of reasons. In particular, the conventional circuit of FIG. 7 can suffer from two disadvantages.
First, the functionality of the circuit can be dependent on the assumption that when latch 702 is in a metastable state, input filtered gates 13 and 14 are always interpreted as logic "low". That is, the conventional arbiter 700 should ensure that under all circumstances, i.e., under all temperature and voltage conditions, the trip point of NAND gates 13 and 14 are well above the possible metastable levels of signals n<0> and n<1> output from latch 702. Unfortunately, this can be difficult to achieve.
Because latch 702 and filter gates 13 and 14 are two different types of circuits (three-input NAND gates vs. two-input NAND gates), it is probable that in at least some situations their relative trip points will not track one another. Because of this weakness (not isolating the metastable states in a reliable fashion), metastability can propagate to the downstream nodes, potentially causing functional failures.
A second disadvantage can be that the conventional arbiter circuit of FIG. 7 can be prone to kicking-in in undesirable circumstances. For example, even when the two inputs are transitioning into and out of valid states, a feedback effect (signal "fb" going low) may kick-in, causing undesirable glitches.
Such an arrangement is illustrated in FIG. 8. FIG. 8 is a timing diagram showing various signals of FIG. 7, including input signals A and B, feedback signal "fb", and output signals n<0> and n<1>.
FIG. 8 illustrates how if both latch input signals (A and B) are near simultaneously asserted from a de-asserted state (transition from high to low), latch 702 can decide to assert output signal n<1> low. That is, latch 702 may start to establish input signal A is the "winning" signal. However, before latch 702 completes the transition in output signal n<1>, feedback generated by filter section 704 and decision logic 706 can drive feedback signal "fb" low, which favors driving output signal n<0> low. As a result, output signal n<1> can experience a glitch 800 that can cause functionality problems in following circuit blocks of a device.
The above problem may be aggravated by advanced manufacturing processes. More particularly, current deep submicron technologies can produce devices that can cause latches to settle very fast. In such circumstances, an uncontrolled feedback circuit can hamper the normal functioning of the latch by settling to logic values opposite to those forced by a feedback circuit, or the like.
Accordingly, there is a need for an arbiter circuit that does not propagate metastability state. At the same time, such an arbiter circuit should provide an essentially glitch free output. It is further desirable that such an arbiter circuit has a bounded resolution time, and reliably generate a predictable output state.

Asynchronous arbiter with bounded resolution time and predictable output state


A push-pull amplifier includes a voltage inversion circuit 9 that uses an output of the differential amplifier 1 as an input signal, and includes a set of resistors 7a, 7b, and a differential amplifier 8 for inverting the polarity of the input signal, a level shifting circuit 3 that shifts the level of an output signal of the voltage inversion circuit 9 to a prescribed level, while inverting the polarity of the output signal, and an output amplifier circuit 4 that includes complementary transistors which are different from each other in polarity. The transistors are inputted with the above-mentioned input signal and the output signal of the level shifting circuit 3, respectively for carrying out push-pull amplification.

1. Field of the Invention
The present invention relates to a push-pull amplifier which operates with low consumption current at no load, and has a high current driving capacity.
2. Description of the Related Art
Up to now, push-pull amplifiers having a great variety of configurations have been proposed, and they find their proper applications, based on the respective purposes, and the requirements for power supply voltage, and the like.
Among them, as the push-pull amplifier which operates at low voltage, the circuit as shown in FIG. 4 is known (referring to Japanese Patent Laid-Open No. 2005-311865). As shown in FIG. 4, this push-pull amplifier includes a differential amplifier circuit 1, a differential difference amplifier circuit 17, a level shifting circuit 3, and an output amplifier circuit 4. Further, this push-pull amplifier includes an inversion input terminal 5, a non-inversion input terminal 6, and an output terminal 16.
Generally, the push-pull amplifier is configured as an operational amplifier, including a differential amplifier circuit 1, however, it may lack the differential amplifier circuit 1, or include some other type of amplifier circuit. In this example of related art, the push-pull amplifier which is often used in general, including the differential amplifier circuit 1, will be described.
The differential amplifier circuit 1, which has the inversion input terminal 5 and the non-inversion input terminal 6, is a circuit which carries out differential amplification of an input signal fed to these both input terminals 5, 6. The output terminal 10 of this differential amplifier circuit 1 is connected to a first inversion input terminal of the differential difference amplifier circuit 17, and to the gate of an MOS transistor M24 in the output amplifier circuit 4.
The differential difference amplifier circuit 17 is a circuit which receives an output signal from the differential amplifier circuit 1 at the first inversion input terminal; inverts this received signal; and feeds the inverted signal to the gate of an MOS transistor M22 in the level shifting circuit 3 as an output signal.
Thus, the differential difference amplifier circuit 17 includes, besides the above-mentioned first inversion input terminal, a second inversion input terminal, a first non-inversion input terminal, a second non-inversion input terminal, and an output terminal 14, and the second inversion input terminal is connected to the output terminal 14. Further, the two non-inversion input terminals are connected to a reference voltage terminal 12, and to the respective non-inversion input terminals, a reference voltage Vref1 is supplied.
The level shifting circuit 3 is a circuit which carries out level shift of the output signal from the differential difference amplifier circuit 17, while inverting the output signal, and combines a P-type MOS transistor M21 with an N-type MOS transistor M22.
In other words, a power supply voltage VDD is supplied to the source of the MOS transistor M21, the gate and drain of which are commonly connected. And, the common connection is connected to the gate of the MOS transistor M23 in the output amplification section 4, and the drain of the MOS transistor M22, respectively. An output signal of the differential difference amplifier circuit 17 is fed to the gate of the MOS transistor M22, and to the source thereof, a power supply voltage VSS is supplied.
The output amplifier circuit 4 includes complementary MOS transistors M23, M24 which are different from each other in polarity, and the MOS transistors M23, M24 provide a circuit being inputted with an output signal of the level shifting circuit 3 and an output signal of the differential amplifier circuit 1 to make push-pull amplification operation.
In other words, the power supply voltage VDD is supplied to the source of the P-type MOS transistor M23, and the gate thereof is connected to an output terminal 15 of the level shifting circuit 3. The drain of the MOS transistor 23 is connected to the drain of the N-type MOS transistor M24, and the common connection therebetween is connected to the output terminal 16. Further, an output signal of the differential amplifier circuit 1 is fed to the gate of the MOS transistor M24, and to the source thereof, the power supply voltage VSS is supplied.
Next, an example of configuration of a circuit which is applicable to the differential difference amplifier circuit 17 will be described with reference to FIG. 5.
As shown in FIG. 5, the differential difference amplifier circuit includes a differential input section 31 including N-type MOS transistors M1, M2, M5; a differential input section 32 including N-type MOS transistors M3, M4, M6; and an adder section 33 including P-type MOS transistors M7 to M10 and N-type MOS transistors M11, M12 which adds the output of the differential input section 31 to the output of the differential input section 32. Herein, the MOS transistors M7, M8 are used as common loads for the differential input section 31 and the differential input section 32.
In addition, as shown in FIG. 5, this differential difference amplifier circuit includes a first non-inversion input terminal 34, a first inversion input terminal 35, a second inversion input terminal 36, a second non-inversion input terminal 37, and an output terminal 38.
More particularly, the MOS transistors M1, M2 form a differential pair, the gate of the MOS transistor M1 being connected to the first non-inversion input terminal 34, and the gate of the MOS transistor M2 being connected to the first inversion input terminal 35. The MOS transistors M3, M4 form a differential pair, the gate of the MOS transistor M3 being connected to the second inversion input terminal 36, and the gate of the MOS transistor M4 being connected to the second non-inversion input terminal 37.
The MOS transistor M5 functions as a constant current source for the MOS transistors M1, M2, and the MOS transistor M6 functions as a constant current source for the MOS transistors M3, M4. To that end, the respective gates of the MOS transistors M5, M6 are connected to a bias terminal 39, and to those respective gates, a prescribed bias voltage is supplied.
The respective gates of the MOS transistors M7, M8 are connected to a bias terminal 40, and to those respective gates, a prescribed bias voltage is supplied. In addition, the respective gates of the MOS transistors M9, M10 are connected to a bias terminal 41, and to those respective gates, a prescribed bias voltage is supplied. Further, the MOS transistor M11, M12 constitute a current mirror circuit.
Next, as shown in FIG. 5, the operation of the differential difference amplifier circuit will be described.
Now, let's assume that, as shown in FIG. 5, in the differential difference amplifier circuit, an input voltage V1, V2 is supplied to the input terminal 34, 35, while an input voltage V4, V3 is supplied to the input terminal 36, 37, respectively. In addition, assuming that the output voltage of the output terminal 38 is VOUT, the relationship among these voltages can be expressed by the following equation:VOUT=A1(V1−V2)+A2(V3−V4)  (1)where A1 in Eq. (1) is the gain from the input terminal 34, 35 to the output terminal 38, and A2 is the gain from the input terminal 36, 37 to the output terminal 38.
Now, let's assume that the respective sizes of the MOS transistors M1 to M4 are the same, and the respective sizes of the MOS transistors M5, M6 are the same, then the gains A1, A2 will be equal to each other, thus A1=A2=A becomes true, which allows Eq. (1) to be rearranged into the following Eq. (2):VOUT=A(V1−V2+V3−V4)  (2)
Herein, if the gain for the differential difference amplifier circuit is large enough, V1−V2+V3−V4=0 becomes true from Eq. (2), provided the differential difference amplifier circuit is used in a feedback circuit. If this relationship is applied to the output signal of the differential difference amplifier circuit 17 in FIG. 4, the relationship expressed by the following Eq. (3) is obtained.V14=2×Vref1−V10  (3)where V10 is the voltage at the output terminal 10 of the differential amplifier circuit 1, and V14 is the voltage at the output terminal 14 of the differential difference amplifier circuit 17.
From Eq. (3), it can be seen that the output voltage V14 for the differential difference amplifier circuit 17 is an inversion of the input voltage for the differential difference amplifier circuit 17. In addition, the voltage V15 at the output terminal 15 in the level shifting circuit 3 is an inversion of the voltage V14 at the output terminal 14 in the differential difference amplifier circuit 17.
Now, assuming that the voltage V10 at the output terminal 10 of the differential amplifier circuit 1 is a sine wave voltage, then the relationship among the respective waveforms for the voltages V10, V14, V15 at the terminals 10, 14, 15 is as shown in FIG. 6.
In FIG. 6, reference sign D denotes a waveform for the voltage V10 at the output terminal 10 of the differential amplifier circuit 1. The waveform E represents the voltage at the terminal 14, and as can be seen from Eq. (3), it provides an inversion signal as a result of the voltage V10 being inverted. In other words, it can be said that the differential difference amplifier circuit 17 is inputted with the signal D, and inverts it to generate the signal E.
Herein, the signal E at the output terminal 14 of the differential difference amplifier circuit 17 is shifted from the reference level Vref1 to the reference level Vref2 by the level shifting circuit 3, while further being inverted to become a signal F. The polarity of the signal F is the same as the polarity of the signal D as a result of the reinversion.
As a result of such an action of the level shifting circuit 3, in the case where current is to be supplied from the output terminal 16 to the side of the low power supply voltage VSS, the signal level at the terminal 10 is shifted to a level higher than the reference level Vref1. This corresponds to a situation in the vicinity of an arrow 50 in FIG. 6.
Then, the gate voltage for the MOS transistor M24 is increased, which allows more current to be conducted, and on the other hand, the gate voltage for the MOS transistor M23 is increased, which acts so as to reduce the current flow therethrough, resulting in the current conduction in the MOS transistor M24 being promoted.
Conversely, in the case where current is to be supplied from the side of the high power supply voltage VDD to the output terminal 16, the signal level at the terminal 10 is shifted to a level lower than the reference level Vref1. This corresponds to a situation in the vicinity of an arrow 51 in FIG. 6.
Then, the gate voltage for the MOS transistor M24 is decreased, and thus more current can be supplied to the output terminal 16 by the quantity of current flow that has been reduced, and on the other hand, the gate voltage for the MOS transistor M23 is decreased, which allows more current to be conducted.
In this way, the push-pull amplifier circuit acts such that, when one of the output transistors M23, M24 conducts much current, the other transistor acts so as to suppress the quantity of current conducted, or shut off the current. On such a principle, in the case where there is the need for flowing much current, the push-pull amplifier circuit can make the desired operation while suppressing the consumption current.
In order to allow the output MOS transistor M23, M24 to drive a higher output current, the level of the signal to be applied to the gate of the MOS transistor M23, M24 can be increased. For example, for the MOS transistor M24, the peak level of the signal waveform D in FIG. 6 can be increased.
However, if the peak level of the signal waveform D is increased with respect to Vref1, the difference in voltage from the signal waveform E at a peak is increased. In this case, if a signal which level is high enough to turn off any of the input transistors M1 to M4 in the differential difference amplifier 17 is applied, the differential difference amplifier circuit 17 will not perform the computation as explained with Eq. (2), thus the signal waveform D will not reach a higher level. In order to solve this problem, the overdrive voltage (Vgs−Vth) for the MOS transistors M1 to M4 can be increased, however, the possible range of such increase has been limited.
Therefore, the present invention has been made in consideration of the above-mentioned situation, and the purpose thereof is to provide a push-pull amplifier which, without depending on the overdrive voltage, can increase the peak value of the gate voltage for the output transistor to a level still higher than the conventional one, and is capable of producing an output current with low consumption current that is higher than that available with conventional push-pull amplifiers.


The method of converting nepheline syenite particulate feedstock with a grain size profile to an ultra-fine grain finish product for subsequent commercial use, the ultra-fine grain final product has a maximum grain size of less than about 6 microns. The method comprising: providing a dry feedstock with a controlled maximum particle size greater than about 20 microns; grinding the feedstock in a dry state by passing the feedstock vertically downward through a continuous, high-speed stirred ball mill whereby the feedstock is ground into an intermediate powder having a drastically reduced grain size profile than the grain size profile of the feedstock; and passing the intermediate powder from the mill through an air classifier using a rapidly moving high speed air stream moving along a given path to convey the ultra-fine grain product along the path and from the classifier and to allow coarse particulate material including particles larger than the ultra-fine product to be separated and then expelled from the classifier.

In glass and ceramic manufacturing, nepheline syenite provides alkalies that act as a flux to lower melting temperature of a glass or ceramic mixture, prompting faster melting and fuel savings. In glass, nepheline syenite powder also supplies aluminum which gives improved thermal endurance, increases chemical durability and increases resistance to scratching and breaking. Furthermore nepheline syenite powder is used as a filler or extender in paints, coatings, plastics and paper. It is a desirable material because it contains no free silica and still functions as effectively as a free silica based filler or extender. The material is an inorganic oxide having mechanical characteristics similar to the free silica material for which it is a substitute. It has been available for years in fine grains as disclosed in an 1938 article by C. J. Koenig entitled Some Fundamental Properties of Nephelene Syenite which is incorporated by reference herein. These mechanical properties involve the use of a fine grain particulate form of nepheline syenite powder which is abrasive. Consequently, the granular nepheline syenite has a tendency to abrade and erode rapidly equipment used in processing the end product employing the nepheline syenite powder. It has been determined that by reducing the particle size of any organic oxide material, such as nepheline syenite, the abrasive properties of the material are reduced. Consequently, it is common to provide nepheline syenite powder with a relatively small particle size for the purposes of allowing effective dispersion in the product aided by use of the nepheline syenite. Several advantages are realized when dispersing fine grain nepheline syenite in the carrier product. These relate to hardness, gloss and brightness of the final product. Patents disclosing the advantage of using nepheline syenite include Gundlach U.S. Pat. No. 5,380,356, Humphrey U.S. Pat. No. 5,530,057; Hermele U.S. Pat. No. 5,686,507 and Broome U.S. Pat. No. 6,074,474. These representative patents showing the use of fine grain nepheline syenite powder are incorporated by reference herein. They illustrate the advantages of providing this particular inorganic oxide in a variety of grain sizes for a variety of applications. It has been found that nepheline syenite powder having an ultra-fine grain of less than about 10 microns has substantial advantages and drastically increases the usefulness of nepheline syenite powder in various products. This form of nepheline syenite powder is sold by Unimin Corporation of New Canaan, Conn. as Minex 10. Recently, it has been found experimentally and by testing that nepheline syenite powder with a grain size less than about 6 microns produces drastically improved physical and processing characteristics. These are described in prior application Ser. No. 11/803,093. Such ultra-fine grain nepheline syenite can be conveyed through manufacturing equipment with very little abrasive wear and substantially enhances many characteristics of the end product utilizing this ultra-fine grain nepheline syenite powder especially when used in paints and other coatings. In an attempt to accomplish this ultra-fine grain particle size of nepheline syenite, the granulated material was wetted and then ground in a slurry condition in a micro grinder. Thereafter, the ultra-fine particles were dried by a rotary kiln or other process drier. The ultra-fine particles however were highly active and tended to agglomerate in the liquid carrier so that the end result contained agglomerations. Thus a number of particles had an effective particle size substantially greater than the desired small particle size of the ultra-fine nepheline syenite powder. Thus, the effectiveness of providing nepheline syenite with a controlled grain size of less than 6 microns has been less than satisfactory until Unimin Corporation developed a system utilizing a dry ball mill and an air classifier. Until that time, a nepheline syenite product with a maximum grain size drastically less than 20 microns for an effective size and particularly less than 5-6 microns for an effective size was not commercially viable until recently made by a dry milling process. After Unimin Corporation, assignee of this application, developed a system for producing an ultra-fine nepheline syenite having a grain size less than 5-6 microns, there was determined to be a substantial commercial need for a system that more efficiently produces this desired ultra-fine nepheline syenite product. The term "less than" a certain grain size in the related art means that at least 99.99% of the particle sizes are less than a designated particle size.

Method of processing nepheline syenite powder to produce an ultra-fine grain size product


A fuel injection system for two-cycle engines comprising high pressure fuel injectors adapted to be installed in a two-cycle gas engine assembly.

By utilizing fuel injection instead of traditional carburetion, one is able to increase power output, improve fuel economy and lower emission outputs in automobile engines. What is needed is a fuel injection system that can also be supplied as part of a conversion kit or installed as part of original manufactured equipment in two-cycle engines.

Fuel injection system for two-cycle engines


A tissue sample to be analyzed is tested. Multiple different samples of multiple areas of said tissue sample, each of said multiple areas is a smaller area than an entire tissue sample to be analyzed. After analysis, the tissue sample is processed in a way that facilitates viewing tumor information on the sample, for example, by fixing or staining. An area is identified on the stained sample, and at least one of the samples that corresponds to an identified area is tested. This small area is tested using a technique that homogenizes the sample before testing.

Different techniques can be used to characterize pathology samples such as tumors. One of such techniques investigates homogenized samples and determines information from the homogenized sample, e.g., within a test tube, and the other collects spatially orientated information.
Homogenized tissue sample tests can test for different characteristics—however, the whole contents of the test tube is averaged for the test. Tests of these types include polymerase chain reaction or PCR, Western blotting that can be used to quantify concentrations of types of proteins in a sample, DNA arrays, that can be used to quantify the amount of DNA in specified sequences, RNA arrays that can be used to quantify specific sequences of messenger RNA and thus determine the expression level of many different genes, and others. These kinds of tests can be very specific—for example, quantitative PCR can be used to determine the relative level of sequences that differ by only a single mutation. However, the specificity is reduced since the test is measuring over the entire sample.
Staining techniques can also be used. In slide based tests the sample is sectioned into thin sections (typically 5 microns) and placed on a microscope slide for observation with a microscope, photo microscopy or image analysis. Stains are used on the tissue to make certain features visible. One stain is the classic H&E stain. This stain allows pathologists to view the overall morphology of a tissue and identify areas of tumor based on morphological features that show up under the stain. Other stain techniques produce other results. For example, an IHC (Immunohistochemistry) reagent is a custom antibody to a given target which can be a protein or other chemical linked (either before or after it attaches to its target) to a stain that will be visible in the microscope. This marker might be an enzyme which will catalyze a color generating reaction. IHC can be used to visualize contents of a slide to determine that a target molecule is present. IHC can also be used to specify the specific cells or even sub cellular structures in which the target molecule is present. By using several distinguishable stains linked to different antibodies, it is possible to characterize the extent of co-localization of several targets or determine that they are found in different cells or organelles.
FISH (Fluorescent in-situ hybridization) can locate the position on a chromosome of a given genetic sequence by using several probes linked to different colored dyes. Fish makes it possible to see the spatial relationship of different loci. For instance FISH can be used to detect chromosome translocation that cause leukemia by marking two loci known to be brought together by a translocation that causes leukemia with red and green fluorochromes. If the translocation has occurred, these 2 probes will be brought next to each other and will appear to be a single yellow dot. Thus FISH can produce detailed spatial data on the location of gene sequences.
In general, the operation on homogenized tissue make many measurements of different targets but are in effect averaging over the entire block that was homogenized. This has limited their utility in practical diagnosis because the tissue sample delivered to a pathologist is rarely entirely cancer. In cancer surgery, the goal is to remove tissue until the margins are clear (that is free of cancer). In biopsy samples, there is often no way to assure that only tumor is sampled. Further, it is known that many cancers are themselves genetically and metabolically heterogeneous. This means that the numbers produced by all of the homogenization methods may be averages of tumor and non tumor tissue or different regions of the tumor.
Slide based methods overcome the localization limitations but suffer from restrictions on the number of chemical species that can be detected at once. While DNA arrays can test for thousands of sequences at once, FISH is restricted to 4 or 5 probes at a time. Similarly IHC is limited by the number of stains that can be attached and visualized, e.g., 3 or 4.
These limitations mean that in practice it is possible to know the amount of various types of DNA, RNA and protein in a tissue in detail but not the precise location of those species or it is possible to know the location of a few species with high spatial accurately.
Other techniques collect spatially oriented information from slides. Laser capture microdissection, for example, uses a laser to release a chosen section of the tissue, e.g. while observing the tissue on a slide under a microscope (with no cover slip). The released sample is captured in a vial, and the localized sample is tested using one of the homogenization methods mentioned above. This allows obtaining test information for a known location. While this is difficult at the sub cellular level, it is possible to select one or a few cells that are known to be part of a tumor.
Laser capture microdissection has not been widely used because of its disadvantages. One is the cost and complexity of the equipment involved. Also, since the sample is collected after it has been fixed and possibly stained these processes may disrupt the target molecules and prevent some chemical methods from operating correctly. Also, since the size of the area sampled is inherently limited by the collection technique, it may be too small relative to the tumor that is to be characterized.

This patent is subject to a terminal disclaimer.

Correlating chemical and spatial data within pathology samples


A method and device for manufacturing extremely fine particles and porous materials by controlled low temperature drying. An ambient-pressure and ambient-temperature atomizer atomizes a particle precursor solution to create a precursor mist. The precursor mist and dryer gas are fed into a dryer tube through a tangential inlet (swirl generating inlet). The mixed stream forms a helical flow structure within the dryer tube. The swirling mist undergoes drying and particle formation at a relatively low temperature. The flow continues to swirl and drying process continues with repeated passes until the required drying duration is reached. This dryer structure allows for a compact dryer with full control of residence time.

The large scale synthesis, characterization, and processing of nanostructured materials are part of an emerging and rapidly expanding field of nanotechnology.
Nano and micron sized heat sensitive materials can be manufactured in large quantities by dissolving precursor (in-feed large particles) in a suitable solvent and spray-drying them in a carefully controlled environment. However, particle temperature during drying should not exceed the critical temperature for specific materials above which particles may degrade, burn or explode. Therefore, keeping a relatively low drying temperature is very crucial. However, the low temperature requires a longer residence time for suitable drying to take place and hence unusually long dryer length (or height). Furthermore, the drying gas, the local temperature and residence time have a decisive role in the resultant particle morphology. Depending on heat and mass transfer conditions, dried particle shapes will vary. For example, super heated steam drying can produce more porous materials as compared to hot gas because of the associated high vaporization rate. Industrial drying encompasses a host of drying methods including drum drying, pneumatic dryers, direct and indirect heated dryers, steam dryers, microwave dryers and pulse heat dryers.
Spray drying is a unique drying process since it involves both particle formation and drying. The characteristics of the resultant powder can be controlled, and powder properties can be maintained constant throughout a continuous operation. With the designs of spray dryers available, it is possible to select a dryer layout to produce either fine- or coarse-particle powders, agglomerates or granulates.
Spray drying involves the atomization of feed into a spray, and contact between spray and drying medium resulting in moisture evaporation. The drying of the spray continues until the desired moisture content in the dried particles is achieved, and the product is recovered from the air.
In order to produce "tailored" particle size and morphology, the prior art uses spray drying in horizontal or vertical dryers. Typically, hot drying gas moves upwards while the precursor spray travels down. The hot gas is often swirled.
There are several problems with prior art spray drying that persist. For instance, a need exists for shorter length dryers for low temperature drying in methods where the in-feed precursor solution is atomized and sprayed into the drying chamber. Typically, the drying gas flows either co-current or counter-current. In co-current situations, the spray and drying gas mix downstream inside the chamber. In the prior process technology the dryer length is excessive for low drying-gas temperatures, often exceeding 30-50 meters depending on the dryer gas temperature and solid loading. Therefore, a technology is needed for effective drying that allows the dryer length to remain reasonably short (1-5 meters) for low temperature and high solid loading processes.
Additionally, the mixing efficiency of the spray and drying gas is an important factor in heat transfer and drying rate. An efficient mixing of the spray and gas is required to promote a high heat transfer rate, as well as uniform drying.
Thus, there is a challenge for low temperature drying, such as drying at temperatures less than 100° C. Because of a lack of efficient mixing of spray and drying gases and low drying rates, the required dryer length is presently required to be very long relative to desired usage of space. This is a great manufacturing concern for modern nano and micron particle production of heat sensitive materials such as pharmaceuticals, propellant ingredients, explosives, and high-energy solids.
Another challenge presented by low temperature drying is control of residence time of the spray. Spray momentum may flow downward counter to the upward drying gas flow. The residence time of the spray and thus the particles is a complex function of upward drying gas flow, swirl, and spray momentum.
Finally, there is presently a lack of process technology for low temperature production of nanomaterials using ultra high humidity drying (UHHD), and there are no dryer process technology guidelines for drying heat sensitive materials using UHHD.

Method and device for manufacturing extremely fine particles and porous materials by controlled low temperature drying


A plastic lens includes an optically functioning section, a flange section disposed at an outer periphery thereof, a reference surface formed at an outer peripheral portion of the flange section and adapted to become a reference for attachment, and a tapered surface formed on at least a part of the outer peripheral portion of the flange section which is located closer to the optically functioning section side than is the reference surface so as to taper down its diameter along the optical axis of the optically functioning section. The tapered surface forms a surface at which a gate for resin injection is located upon manufacture.

1. Field of the Invention
The present invention relates to a plastic lens used in optical devices and the like, and a method of making the plastic lens.
2. Related Background Art
There has been known a plastic lens A, as shown in FIG. 5, comprising an optically functioning section C formed at its center part and functioning as an optical lens, and a flange section D formed at the outer periphery of the optically functioning section C. The flange section D is mainly provided for attaching the plastic lens A to a holder or the like.
Such plastic lens A is made by running a resin into a die and injecting the resin into a cavity (hollow portion), which is formed within the die, through a gate. Consequently, after molding, as shown in FIG. 5, a gate section B and the plastic lens A are in a continuous state. Accordingly, making the plastic lens A necessitates a process of separating the gate section B from the plastic lens A.

Plastic lens and method of making the same


The use of dianhydrogalactitol provides a novel therapeutic modality for the treatment of non-small-cell lung carcinoma (NSCLC) and ovarian cancer, as well as other types of malignancy, including brain metastases of NSCLC. Dianhydrogalactitol acts as an alkylating agent on DNA that creates N7 methylation. Dianhydrogalactitol is effective in suppressing the growth of cancer stem cells and is active against tumors that are refractory to temozolomide, cisplatin, and tyrosine kinase inhibitors; the drug acts independently of the MGMT repair mechanism. Dianhydrogalactitol can be used together with other anti-neoplastic agents and can possess additive or super-additive effects.

The search for and identification of cures for many life-threatening diseases that plague humans still remains an empirical and sometimes serendipitous process. While many advances have been made from basic scientific research to improvements in practical patient management, there still remains tremendous frustration in the rational and successful discovery of useful therapies particularly for life-threatening diseases such as cancer, inflammatory conditions, infection, and other conditions.
Since the "War on Cancer" began in the early 1970's by the United States National Cancer Institute (NCI) of the National Institutes of Health (NIH), a wide variety of strategies and programs have been created and implemented to prevent, diagnose, treat and cure cancer. One of the oldest and arguably most successful programs has been the synthesis and screening of small chemical entities (<1500 MW) for biological activity against cancer. This program was organized to improve and streamline the progression of events from chemical synthesis and biological screening to preclinical studies for the logical progression into human clinical trials with the hope of finding cures for the many types of life-threatening malignant tumors. The synthesis and screening of hundreds of thousands of chemical compounds from academic and industrial sources, in addition to the screening of natural products and extracts from prokaryotes, invertebrate animals, plant collections, and other sources from all over the world has been and continues to be a major approach for the identification of novel lead structures as potential new and useful medicines. This is in addition to other programs including biotherapeutics designed to stimulate the human immune system with vaccines, therapeutic antibodies, cytokines, lymphokines, inhibitors of tumor blood vessel development (angiogenesis) or gene and antisense therapies to alter the genetic make-up of cancer cells, and other biological response modifiers.
The work supported by the NCI, other governmental agencies both domestic and foreign in academic or industrial research and development laboratories has resulted in an extraordinary body of biological, chemical and clinical information. In addition, large chemical libraries have been created, as well as highly characterized in vitro and in vivo biological screening systems that have been successfully used. However, from the tens of billions of dollars spent over the past thirty years supporting these programs both preclinically and clinically, only a small number of compounds have been identified or discovered that have resulted in the successful development of useful therapeutic products. Nevertheless, the biological systems both in vitro and in vivo and the "decision trees" used to warrant further animal studies leading to clinical studies have been validated. These programs, biological models, clinical trial protocols, and other information developed by this work remain critical for the discovery and development of any new therapeutic agent.
Unfortunately, many of the compounds that have successfully met the preclinical testing and federal regulatory requirements for clinical evaluation were either unsuccessful or disappointing in human clinical trials. Many compounds were found to have untoward or idiosyncratic side-effects that were discovered during human clinical Phase I dose-escalation studies used to determine the maximum tolerated dose (MTD) and side-effect profile. In some cases, these toxicities or the magnitude of their toxicity were not identified or predicted in preclinical toxicology studies. In other cases, chemical agents where in vitro and in vivo studies suggested a potentially unique activity against a particular tumor type, molecular target or biological pathway were not successful in human Phase II clinical trials where specific examination of particular cancer indications/types were evaluated in government sanctioned (e.g., U.S. FDA), IRB approved clinical trials. In addition, there are those cases where potential new agents were evaluated in randomized Phase III clinical trials where a significant clinical benefit could not be demonstrated; such cases have also been the cause of great frustration and disappointment. Finally, a number of compounds have reached commercialization but their ultimate clinical utility has been limited by poor efficacy as monotherapy (<25% response rates) and untoward dose-limiting side-effects (Grade III and IV) (e.g., myelosuppression, neurotoxicity, cardiotoxicity, gastrointestinal toxicities, or other significant side effects).
In many cases, after the great time and expense of developing and moving an investigational compound into human clinical trials and where clinical failure has occurred, the tendency has been to return to the laboratory to create a better analog, look for agents with different structures but potentially related mechanisms of action, or try other modifications of the drug. In some cases, efforts have been made to try additional Phase I or II clinical trials in an attempt to make some improvement with the side-effect profile or therapeutic effect in selected patients or cancer indications. In many of those cases, the results did not realize a significant enough improvement to warrant further clinical development toward product registration. Even for commercialized products, their ultimate use is still limited by suboptimal performance.
With so few therapeutics approved for cancer patients and the realization that cancer is a collection of diseases with a multitude of etiologies and that a patient's response and survival from therapeutic intervention is complex with many factors playing a role in the success or failure of treatment including disease indication, stage of invasion and metastatic spread, patient gender, age, health conditions, previous therapies or other illnesses, genetic markers that can either promote or retard therapeutic efficacy, and other factors, the opportunity for cures in the near term remains elusive. Moreover, the incidence of cancer continues to rise with an approximate 4% increase predicted for 2003 in the United States by the American Cancer Society such that over 1.3 million new cancer cases are estimated. In addition, with advances in diagnosis such as mammography for breast cancer and PSA tests for prostate cancer, more patients are being diagnosed at a younger age. For difficult to treat cancers, a patient's treatment options are often exhausted quickly resulting in a desperate need for additional treatment regimens. Even for the most limited of patient populations, any additional treatment opportunities would be of considerable value. This invention focuses on inventive compositions and methods for improving therapeutic benefit of suboptimally administered chemical compounds including substituted hexitols such as dianhydrogalactitol.
Non-small-cell lung carcinoma (NSCLC) includes several types of lung cancer, including squamous cell carcinoma, large cell carcinoma, and adenocarcinoma, as well as other types of lung cancer. Although smoking is apparently the most frequent cause of squamous cell carcinoma, when lung cancer occurs in patients without any history of prior tobacco smoking, it is frequently adenocarcinoma. In many cases, NSCLC is refractory to chemotherapy, so surgical resection of the tumor mass is typically the treatment of choice, particularly if the malignancy is diagnosed early. However, chemotherapy and radiation therapy are frequently attempted, particularly if the diagnosis cannot be made at an early stage of the malignancy. Other treatments include radiofrequency ablation and chemoembolization. A wide variety of chemotherapeutic treatments has been tried for advanced or metastatic NSCLC. Some patients with particular mutations in the EGFR gene respond to EGFR tyrosine kinase inhibitors such as gefitinib (M. G. Kris, "How Today's Developments in the Treatment of Non-Small Cell Lung Cancer Will Change Tomorrow's Standards of Care," Oncologist 10 (Suppl. 2): 23-29 (2005), incorporated herein by this reference). Cisplatin has frequently been used as ancillary therapy together with surgery. Erlotinib, pemetrexed, About 7% of NSCLC have EML4-ALK translocations, and such patients may benefit from ALK inhibitors such as crizotinib. Other therapies, including the vaccine TG4010, motesanib diphosphate, tivantinib, belotecan, eribulin mesylate, ramucirumab, necitumumab, the vaccine GSK1572932A, custirsen sodium, the liposome-based vaccine BLP25, nivolumab, EMD531444, dacomitinib, and genetespib, are being evaluated, particularly for advanced or metastatic NSCLC.
However, there is still a need for effective therapies against NSCLC, especially against advanced or metastatic NSCLC. Preferably, such therapies should be well-tolerated and with side effects, if any, that could be easily controlled. Also, preferably, such therapies should be compatible with other chemotherapeutic approaches and with surgery or radiation. Additionally, and preferably, such therapies should be able to exert a synergistic effect on other treatment modalities.

Use of dianhydrogalactitol and analogs or derivatives thereof in combination with platinum-containing antineoplastic agents to treat non-small-cell carcinoma of the lung and brain metastases


Graphic User Interface for Data Processing Device A handheld data processing device (82) has a touch-sensitive display screen (84) and interface means for generating a graphic user interface (GUI) on the screen, the GUI having one or more image elements (88, 92, 94, 96, 98, 100, 102), each representing an input. The screen (84) generates a control signal corresponding to an input in response to a portion of the screen on which an image element (88, 92, 94, 96, 98, 100, 102) representing said input is displayed being touched by a user of the device. The device has processing means for processing the control signal. The interface means is operable to locate the image elements (88, 92, 94, 96, 98, 100, 102) on an accessible portion of the screen (84) so that in use the image elements are within reach of a digit (90) of a hand in which the device is held. The image elements may, for example, be located in a fan in a corner of the screen, or in linear fashion along the edges of the screen.

A handheld data processing device such as a mobile telephone or personal digital assistant (PDA) is commonly designed to enable a user thereof to operate a keypad of the device with a thumb or finger of a hand in which the device is held.
It is well known to provide such a device with a touch-sensitive display screen, on certain portions of which images of keys are displayed, the device being operable to perform a function associated with each key in response to the portion of the display screen on which the image of the key is displayed being touched by the user. To date, however, the device has been designed to be held in one of the user's hands, and the display screen touched by a thumb or finger of the user's other hand, or by a stylus held in the user's other hand, and the images of the keys located on the screen in accordance with the assumption that any portion of the display screen may be touched with the same ease as any other portion.

Graphic user interface for data processing device


A pixel has first to third N-type TFT elements serially connected between a data line and a pixel electrode node. Each gate of the first and second TFT elements is connected to a first gate line, while the gate of the third TFT element is connected to a second gate line. The first and second gate lines in a select state each set to a high voltage that can fully turn-on the first to third TFT elements. The first gate line in a non-select state is set to a low voltage that can fully turn-off the first and second TFT elements, while the second gate line in the non-select state is set to an intermediate voltage between the maximum and the minimum voltages being transmitted on the data line.

1. Field of the Invention
The present invention relates to a liquid crystal display apparatus, and more specifically, to a liquid crystal display apparatus having a gate insulating field effect transistor in each pixel.
2. Description of the Background Art
As a display panel for a personal computer, a television receiver, a mobile phone, and a personal digital assistant, a liquid crystal display apparatus having liquid crystal elements as display pixels is used. Such a liquid crystal display apparatus is effective in reducing power consumption, size and weight, as compared to a conventional type.
The display luminance of a liquid crystal element changes in accordance with the level of voltage applied thereon (hereinafter a voltage applied to a liquid crystal element is also referred to as "a display voltage"). The display panel of a liquid crystal display apparatus is formed with pixels each having a liquid crystal element. Each pixel is applied a display voltage during a scanning period that is cyclically provided in accordance with a prescribed scanning cycle.
Each pixel in a non-scanning period retains the display voltage that is applied during a scanning period to provide the luminance corresponding to that retained voltage. For each pixel, a non-scanning period for retaining a data (a display voltage) is overwhelmingly longer than a scanning period for being written a data, i.e., being applied with a display voltage. For instance, for each pixel in a liquid crystal display apparatus with 200 scanning lines, a non-scanning period will be 200 times longer than a scanning period. Hence, the display voltage retentivity (data retentivity) in each pixel is significant, since lower display voltage retentivity requires a scan at higher frequencies, increasing the power consumption.
Generally, pixels are arranged on a glass substrate or a semiconductor substrate using a TFT (Thin Film Transistor) element or the like. Therefore, the display voltage retentivity above may be degraded when the level of retained display voltage decreases due to a leakage current occurring in the TFT element in a non-scanning period.
A configuration for suppressing such a leakage current during a non-scanning period is disclosed, for example, in Japanese Patent Laying-Open No. 5-127619, in which a plurality of TFT elements are connected in series in each pixel to divide a voltage applied on the TFT elements (source-drain voltage).
However, even with the pixel configuration shown in Japanese Patent Laying-Open No. 5-127619, it is difficult to suppress the leakage current at higher display voltages. Another known configuration involves controlling a gate voltage to forcibly reverse-bias a TFT element in a non-scanning period. In this case, since a voltage stress on a gate insulation film is large, the reliability of the gate insulation film becomes a problem.

Liquid crystal display apparatus having pixels with low leakage current


An outsole for a footwear construction to provide added softness in the heel strike area of a foot while providing added stability to the outer edge of the outsole, comprises: a top layer contoured to the shape of a foot, thereby providing cradle support to the foot; and, a lower layer having a bottom most layer with a heel portion so constructed as to achieve different degrees of softness, the heel portion including a wedge-shaped piece positioned on the heel portion, positioned over the heel strike area and being of a softer durometer value material and having an outer edge of a harder durometer value material thereby providing added stability to the footwear construction and avoiding lateral collapsing. The top layer and bottom layer are cemented together, encapsulating the wedge-shaped piece in the footwear construction between the top layer and bottom most layer to form a stable walking platform for the footwear construction. The wedge shaped piece is apertured vertically, the number and size of the apertures in the wedge-shaped piece being larger than those in the outer edge area. The apertures in the wedge-shaped piece outer edge may be moon-shaped. A sock may be provided to cover the top contoured layer for added cushioning for a foot.

1. Field of the Invention
This invention relates to footwear construction and, in particular to the construction of a cushioning outsole for such footwear.
2. Description of the Prior Art
In most footwear construction, only the inside of the shoe is cushioned. Examples of same may be found in the following U.S. Patents or Published Applications: U.S. Pat. Nos. 6,205,683; 6,519,874; 7,152,341; and, US2003/0061733.
Yet there have been some attempts that may be viewed as attempts at cushioning on the outside of the shoe. Examples of same may be found in the following U.S. Pat. Nos. 4,942,679; 5,689,902; and, 6,050,001.
The present invention represents an improvement in the cushioning of the outside of the shoe, a cushioning outsole so as to minimize the adverse effects when the heel strikes a walking surface or ground.


A bracket assembly is configured for supporting a connector of a shift cable assembly on a transmission. The bracket assembly includes a first section and a second section. The first section defines a groove configured for receiving the connector. The second section is pivotably attached to the first section. The second section is pivotable relative to the first section between an open position and a closed position. The second section is configured for capturing the connector within the groove when the connector is received within the groove and the second section is in the closed position. The second section is configured to allow the connector to be removed from the groove when the second section is in the open position.

Automatic, dual clutch, and hybrid transmissions include an input member to receive torque from an engine or electric machines, an output member to transfer torque to a final drive system, and a gear train with a plurality of clutches that are engageable in various combinations to provide a plurality of speed ratios between the input member and the output member. Automatic transmissions, dual clutch and hybrid transmissions have a plurality of driving ranges, which generally include Park, Reverse, Neutral, Drive, and Low, as understood by those skilled in the art. Some transmissions have a selectively rotatable shaft; the rotational position of the shaft determines which of the driving ranges is selected.

Bracket having a secondary locking feature for attachment of a shift cable to a transmission


Provided herein are methods of treating, preventing, managing, and/or ameliorating leukemia or myelodysplastic syndrome comprising administering 2-(4-chlorophenyl)-N-((2-(2,6-dioxopiperidin-3-yl)-1-oxoisoindolin-5-yl)methyl)-2,2-difluoroacetamide or a stereoisomer or mixture of stereoisomers, an isotopologue, pharmaceutically acceptable salt, tautomer, solvate, hydrate, co-crystal, clathrate, or polymorph thereof to a patient.

Cancer is characterized primarily by an increase in the number of abnormal cells derived from a given normal tissue, invasion of adjacent tissues by these abnormal cells, or lymphatic or blood-borne spread of malignant cells to regional lymph nodes and metastasis. Clinical data and molecular biologic studies indicate that cancer is a multistep process that begins with minor preneoplastic changes, which may under certain conditions progress to neoplasia. The neoplastic lesion may evolve clonally and develop an increasing capacity for invasion, growth, metastasis, and heterogeneity, especially under conditions in which the neoplastic cells escape the host's immune surveillance. Current cancer therapy may involve surgery, chemotherapy, hormonal therapy and/or radiation treatment to eradicate neoplastic cells in a patient. Recent advances in cancer therapeutics are discussed by Rajkumar et al. in Nature Reviews Clinical Oncology 11, 628-630 (2014).
All of the current cancer therapy approaches pose significant drawbacks for the patient. Surgery, for example, may be contraindicated due to the health of a patient or may be unacceptable to the patient. Additionally, surgery may not completely remove neoplastic tissue. Radiation therapy is only effective when the neoplastic tissue exhibits a higher sensitivity to radiation than normal tissue. Radiation therapy can also often elicit serious side effects. Hormonal therapy is rarely given as a single agent. Although hormonal therapy can be effective, it is often used to prevent or delay recurrence of cancer after other treatments have removed the majority of cancer cells.
With respect to chemotherapy, there is a variety of chemotherapeutic agents available for treatment of cancer. A majority of cancer chemotherapeutics act by inhibiting DNA synthesis, either directly or indirectly by inhibiting the biosynthesis of deoxyribonucleotide triphosphate precursors, to prevent DNA replication and concomitant cell division. Gilman et al., Goodman and Gilman's: The Pharmacological Basis of Therapeutics, Twelfth Ed. (McGraw Hill, New York).
Despite availability of a variety of chemotherapeutic agents, chemotherapy has many drawbacks. Stockdale, Medicine, vol. 3, Rubenstein and Federman, eds., ch. 12, sect. 10, 1998. Almost all chemotherapeutic agents are toxic, and chemotherapy causes significant, and often dangerous side effects including severe nausea, bone marrow depression, and immunosuppression. Additionally, even with administration of combinations of chemotherapeutic agents, many tumor cells are resistant or develop resistance to the chemotherapeutic agents. In fact, those cells resistant to the particular chemotherapeutic agents used in the treatment protocol often prove to be resistant to other drugs, even if those agents act by different mechanism from those of the drugs used in the specific treatment. This phenomenon is referred to as pleiotropic drug or multidrug resistance. Because of the drug resistance, many cancers prove or become refractory to standard chemotherapeutic treatment protocols.
There is a need for safe and efficacious dosages and dosing regimens for administration of anti-cancer agents, including 2-(4-chlorophenyl)-N-((2-(2,6-dioxopiperidin-3-yl)-1-oxoisoindolin-5-yl)methyl)-2,2-difluoroacetamide or a stereoisomer or mixture of stereoisomers, an isotopologue, pharmaceutically acceptable salt, tautomer, solvate, hydrate, co-crystal, clathrate, or polymorph thereof for treatment of hematologic malignancies, such as leukemia, Hodgkin's and non-Hodgkin's lymphoma, multiple myeloma, and myelodysplastic syndrome (MDS).

Treatment of a hematologic malignancy with 2-(4-chlorophenyl)-n-((2-(2,6-dioxopiperidin-3-yl)-1-oxoisoindolin-5-yl)methyl)-2,2-difluoroacetamide


A content addressable memory (CAM) search engine is disclosed. The CAM search engine includes a data compare plane having a content addressable memory die including an array of comparison cells. The CAM search engine further includes a memory stack on the data compare plane. The memory stack has stacked memory dies including memory banks. The array of comparison cells includes parallel interconnects. The parallel interconnects electrically connect to outputs of the memory banks. The comparison cells are time-shared among the one or more memory banks.

A CAM is a storage device in which data can be identified through a parallel search operation. A CAM typically includes an array of storage cells arranged in rows and columns, where each row of the CAM array corresponds to a stored word of reference data. The storage cells in a given row couple to a word line and a match line associated with the row. The word line is used to select the row for a read/write operation while the match line is used to signal a match or a miss during the search operation. Each column of the conventional CAM array corresponds to the same bit position in all of the words. The storage cells in a particular column are coupled to a pair of bit lines and a pair of search-lines associated with the column.
During a search operation, the match line develops a signal that indicates whether the word stored in the row matches a word of search data. The search data is applied to each pair of search lines, which have a pair of complementary binary signals or unique ternary signals thereon that represent a bit of an input value. Each CAM cell changes the voltage on the associated match line if the storage cell stores a bit that does not match the bit represented on the attached search lines. If the voltage on a match line remains unchanged during a search, the word stored in that row of storage cells matches the entire word of search data.
CAMs are much faster than conventional random access memory (RAM) for searching stored data because a search of all the words can be performed in parallel. However, use of CAMs is limited because of their large size, high cost, and large amounts of heat generated in comparison to conventional RAMs. For example, CAM cells are conventionally implemented using two static RAM (SRAM) cells and bit-compare circuitry (e.g., 16 transistors), which can require a large area ten times larger than conventional dynamic RAM (DRAM).

INTERNATIONAL BUSINESS MACHINES CORPORATION


A system and method for tracking and managing applications and content between a wireless device and a service. For example, in one embodiment, an “uninstalled” field is used within records on a client device and identifying, whether each application on the client is installed or whether the application has been uninstalled. A corresponding set of records are provided on the data service for each individual client device, including the “uninstalled” field. When an application is uninstalled on any client device, the corresponding record for that client device is updated on the service so that the service and the wireless device remain in synch.

Many portable data processing devices such as wireless personal digital assistants ("PDA") and cellular telephones are capable of processing multimedia content including, for example, digital audio content, music instrument digital interface ("MIDI") audio content (e.g., ring tones), still video images and even motion video. In addition, many Internet service providers today allow subscribers to download multimedia content and applications (e.g., games, utilities, messaging clients, etc) over the data processing device's wireless or terrestrial network connection.
One problem which exists with current systems, however, is that even through many current portable data processing devices are powerful enough to process the multimedia content and applications, the portable devices do not have sufficient non-volatile storage capacity to store a significant amount of multimedia content and/or applications. While current storage technologies such as Flash memory and hard discs have improved significantly in recent years, they are often still inadequate for storing, for example, a user's entire MP3 collection or collection of still pictures or video.

Managing content synchronization between a data service and a data processing device


A method for producing a capacitor having a dielectric and first and second capacitor electrodes in a semiconductor circuit device formed on a semiconductor substrate, includes forming a trench in a layer applied to the substrate. An electrically conductive layer for the second capacitor electrode is deposited inside the trench and at least regionally conformally with side walls thereof. An auxiliary layer acting as a space-holder for the dielectric is conformally deposited inside the trench and on the electrically conductive layer for the second capacitor electrode. An electrically conductive layer for the first capacitor electrode is conformally deposited inside the trench and on the auxiliary layer. The auxiliary layer is at least partial removed to expose a hollow layer in at least a partial region between the two electrically conductive layers for the first and second capacitor electrodes. The dielectric is deposited into the exposed hollow layer between the two electrically conductive layers. A semiconductor memory device and a method for producing the device include producing the capacitor after production of the transistor and metallizing layers associated therewith for connection of the word and bit lines, in a configuration projecting upward from the plane; placing the capacitor in a trench formed inside a contact metallizing layer for the second electrode terminal of the transistor; and setting a depth of the trench to be equivalent to a layer thickness of the metallizing layer.

FIELD OF THE INVENTION
The invention relates to a method for producing a capacitor and to a semiconductor memory device having a multiplicity of memory cells disposed on a semiconductor substrate, wherein each of the memory cells has a selection transistor being disposed in a semiconductor substrate and having a gate terminal and first and second electrode terminals, each of the memory cells has a storage capacitor being associated with and triggerable by the selection transistor and having a ferroelectric dielectric and first and second capacitor electrodes, the gate terminal of each selection transistor is connected to a word line of the semiconductor memory device, the first electrode terminal of each selection transistor is connected to a bit line, and the first capacitor electrode of each storage capacitor is connected to a common conductor layer of electrically conductive material. The invention also relates to a method for producing such a semiconductor memory device.
Such a semiconductor memory device having a storage capacitor with a ferroelectric dielectric (a so-called FRAM) is known, for instance, from The 1994 Symposium on VLSI Technology Digest of Technical Papers, pp. 55 ff. by R. Moazzami et al, and from The 1994 IEEE International Solid-State Circuits Conference, pp. 268 ff. by Tatsumi Sumi et al. In that semiconductor memory device the storage capacitors with the ferroelectric dielectric are constructed in planar fashion and additionally, because of the wiring, have cell surface areas of considerable size per bit, which is considered to be disadvantageous in the view of a desired large scale of integration. Despite the problems that so far still exist, a great future is predicted for ferroelectric memories or FRAMs. They could entirely replace present semiconductor memories (DRAMs, SRAMs, EEPROMs, flash EEPROMs). The advantage of FRAMs resides above all in the brief programming time (>20 ns), a low programming voltage (from about 3 V of supply voltage to the ICs), low energy consumption in programming (no charge pump required), and frequent programmability (10.sup.12 demonstrated and 10.sup.15 expected, as compared with 10.sup.5 in EEPROMs). Examples of materials for the ferroelectric layer that appear especially promising at present are lead zirconium titanate, strontium tantalate, or compounds thereof. One of the problems that are still an obstacle to rapid introduction of FRAM technology is an as-yet unsolved compatibility with a production process for integrated circuits. In particular, the necessity for platinum electrodes in the ferroelectric storage capacitor and spin-on coating, which heretofore has been conventional, for applying a ferroelectric gel, which is associated with a relatively great layer thickness and thus a capacitance that requires a large surface area, heretofore prevented profitable use in semiconductor technology, so that heretofore no process for producing FRAMs that was suitable for mass production was known. In that respect it must also be remembered that depositing the relatively complex materials for the ferroelectric dielectric and associated therewith the problem of a satisfactory source suitable for the process, and moreover a lack of quality of the layers because of fissuring, leakage currents, temperature influences and electrode adhesion, all contribute to problems of process integration. In particular, the ferroelectric materials known heretofore react especially sensitively to hydrogen. However, hydrogen can hardly be suppressed in the known methods for producing a semiconductor memory device, and in such methods it occurs especially in plasma deposition processes and plasma etching processes.
In addition to the FRAM cells, large-scale integration DRAM semiconductor memories with conventional materials for the storage capacitor dielectric are known. In order to make DRAM semiconductor memories with a memory capacity of up to about 256 MB at present, dielectrics with a high dielectric constant are used so that as the cell area becomes smaller an adequate capacitance, typically of more than about 20 fF per cell, is still attainable. Heretofore, for those purposes, an ONO layer has been used in most cases, but its technological limits have become apparent in the meantime, since upon a further reduction in thickness the leakage current rises above the predetermined limit value, and adequate capacitances (surface areas) can be obtained only through the use of such complicated structures as trench or stacked capacitors. For those reasons, new materials that have a high enough dielectric constant are therefore increasingly being used for the dielectric of the storage capacitor. However, the alternative dielectric materials known thus far are extremely sensitive to the usual strains arising in the method used heretofore to produce a semiconductor memory device, namely stability to high process temperatures, undesired chemical reactions, and the like.

Ferroelectric memory device and method for producing the device


A manufacturing method of a wind turbine generator includes a cutting step of cutting a base blade at m cutting planes into (m+1) sections where m is an even number, the m cutting planes being at different positions in a blade length direction; and joining step of joining (m/2+1) sections of the (m+1) sections together to obtain a wind turbine blade which is shorter than the base blade, the (m/2+1) sections including a blade-root section which is closest to a blade root and a blade-tip section which is closest to a blade tip, the blade-root and blade-tip sections being non-adjacent to each other.

In recent years, wind turbine generators which generate electric power using wind are becoming popular from the perspective of preserving the global environment. Generally, a wind turbine generator is configured to convert kinetic energy of wind into rotational energy of a wind turbine blade (i.e. the entire rotor including the wind turbine blade) and then to convert the rotational energy into electric power in a generator.
Generally, wind turbine blades are manufactured using a mold to obtain a desired aerofoil profile. As one example of typical manufacturing methods of wind turbine blades, Patent Literature 1 describes a manufacturing method in which a dry fiber sheet disposed on a mold is impregnated with resin and then the resin is hardened to produce a wind turbine blade. In this type of manufacturing method, normally only one type of wind turbine blade which fits the shape of the mold can be manufacture and it requires one mold for each aerofoil profile.
Further, it is proposed in Patent Literature 2 and Patent Literature 3 to retrofit the wind turbine blade by connecting an extension unit to a tip of the existing wind turbine blade to adjust performance of the wind turbine blade according to environment conditions.

Wind turbine blade and manufacturing method thereof


A polyamic acid varnish composition, which is composed of a polyamic acid obtained by the addition polymerization of an diamine and an aromatic acid dianhydride, contains as an additive a specific imidazolyl-diaminoazine.

1. Field of the Invention
The present invention relates to a polyamic acid varnish composition which is intended to form a polyimide insulating layer of a flexible printed board, and a flexible printed board which employs same.
2. Description of the Related Art
Flexible printed boards in which polyimide insulating layers formed directly onto a metal foil, e.g., copper foil, without an adhesive being interposed therebetween are manufactured by applying a polyamic acid varnish composition, which is obtained through the addition polymerization of an aromatic diamine such as a paraphenylenediamine and an aromatic acid dianhydride such as pyromellitic dianhydride in a solvent such as N-methyl-2-pyrrolidone, onto the copper foil, drying the whole to obtain a polyamic acid layer (polyimide precursor layer), and then heating and imidizing it at 300–400° C. to form a polyimide insulating layer.
However, the presence of carboxyl groups in the polyamic acid gives rise to such problems as the corrosion and discoloration of the copper foil surface when the polyamic acid varnish is applied to the copper foil as described in the foregoing, as well as the formation of copper ions which bring about electrical migration in the flexible printed wiring board.
Accordingly, an imidazole-based rust inhibitor (e.g., Adekastub CDA-1; manufactured by Asahi Denka) is generally added to polyamic acid varnishes which are used upon manufacture of flexible printed boards.
However, conventionally used rust inhibitors dissolve poorly in the polyamic acid varnish, and furthermore, excessive blooming occurs on the polyimide surface under the high temperature heating during imidation, resulting in a deterioration in the adhesive strength of the polyimide with respect to the copper foil. Moreover, the rust-inhibitor is scattered during imidation, forming a vapor residue substance that deposits on the imidation process apparatus and on the flexible printed board products and contaminates them.

Polyamic acid varnish composition and a flexible printed board


A machining centre comprising a machining plane; a subtractive unit for performing chip removal on a workpiece positioned on the machining plane; the subtractive unit comprising a first carriage that is slidable parallel to an operating axis; an additive unit arranged to perform machining by additive production techniques on the machining plane; the additive unit comprising a second carriage that is slidable along the operating axis. The additive unit is provided with a first coupling portion and said subtractive unit is provided with a second coupling portion couplable with the first coupling portion. In one step, the subtractive unit adopts a pick-up configuration in which the first coupling portion is coupled with the second coupling portion to connect the subtractive unit to the additive unit at least along the operating axis. In the pick-up configuration, the subtractive unit, connected to the additive unit, is configured to move the additive unit.

The invention relates to a numerically controlled machining centre, to perform subtractive machining on a workpiece (in particular a workpiece made of ferrous metal, carbon or other composite materials, wood), or to perform additive machining.
In particular, the invention refers to a machining centre set up to perform machining by chip removal, such as milling, for example milling of whole workpiece, milling of edges, milling for making a decorative pattern; the machining centre is further set up to perform additive machining, i.e. to produce parts of components or semifinished products by 3D printing techniques.
The machining centre can adopt a subtractive configuration, in which the additive unit is not operating and the subtractive unit can carry a tool for removing material from the workpiece, and at least one additive configuration, in which the motorised subtractive unit is connected to the additive unit with the possibility of driving the additive unit.
The invention thus relates to a method for picking up, moving and releasing such a unit in the aforesaid machining centre.
Machining centres are known that are provided with a conveying unit that is movable on a machining plane along an axis X and an axis Y of a tern of axes X, Y, Z arranged transversely, in particular orthogonally, to one another.
The conveying unit can comprise an upright element, which is mounted slidably on a portal structure of the machining centre. The conveying unit is connected to one or more drivable motors to move the conveying unit substantially along the axes X and Y and along another axis Z of the trio of axes X, Y, Z.
The machining centre further comprises a magazine provided with one or more seats for housing machining devices, like for example a spindle, or an extrusion/3D printing unit.
The spindle or alternatively the 3D printing device can be connected to the upright element. In other words, the spindle can be mounted on the upright element, if it is desired to perform subtractive machining, or the extrusion/3D printing unit, if it is desired to perform additive machining.
The spindle is provided with a connecting grip arranged for housing and/or rotating a work tool.
When the spindle is connected to the upright element, the spindle can rotate the tool to perform machining by chip removal from the workpiece. The spindle is also motorised, can be adjustable in rotation around two rotation axes, one parallel to one of the axes X or Y, another parallel to the other axis Z.
Alternatively, the extrusion/3D printing unit can be connected to the upright element when the machining centre adopts an additive configuration. The extrusion/3D printing unit is provided with a feeder, comprising for example electric connections, pressure and temperature sensors, heating elements suitable for heating and fluidizing the material, cooling pipes, and so on. Before using the extrusion/3D printing unit, electric power nevertheless is required to be supplied to the feeder. On the upright element energy supplying means is thus mounted, which is connected manually to the feeder when the extrusion/3D printing unit is picked up by the conveying unit.
The time taken by an operator to connect the feeder to the energy supplying means is significant. Downtime or waiting time is added to this, before the feeder is ready to perform the additive machining. For example, it is necessary to wait for the heating elements to reach the prescribed operating temperature after they have been connected to the energy supplying means. This translates into longer production times.
The extrusion/3D printing unit is further provided with pipes for the transit of material to be moulded that are connected to further transit pipes provided on the conveying unit.
The transit pipes for the material are connected each time the machining centre adopts an additive configuration and are disconnected when the machining centre adopts a subtractive configuration. When the transit pipes are disconnected, part of the material to be moulded remains inside the pipes and, in contact with the air and the humidity present in the surrounding environment, often deteriorates and thus may not be suitable for being moulded.
Machining centres are further known, comprising a subtractive unit arranged to perform machining by chip removal from a workpiece positioned on the machining plane. The subtractive unit is motorized to move along the axes X and/or Y and/or Z. The subtractive unit comprises an upright element to which a spindle is connected; the spindle is arranged to rotate a tool for removing chip from the workpiece.
The machining centre further comprises an additive unit arranged to perform machining by additive production techniques on the machining plane. The additive unit is motorized to move along the axes X and/or Y and/or Z. The additive unit comprises a hopper arranged to receive and contain, at least temporarily, a quantity of material to be moulded, and an extrusion unit connected to the hopper and arranged to extrude the material machining plane in a heated and fluid state.
The additive unit can move on the machining plane independently of the subtractive unit.
Such a machining centre is structurally complex; the costs of stalling and running the subtractive unit and the additive unit are high, and managing the movements of the two units is cumbersome, above all because of the overall dimensions.

Machining centre and method for machining workpieces