An integrated circuit memory is disclosed which has a parallel test read mode. The memory includes comparators for comparing multiple data words, on a bit-by-bit basis, during the parallel read mode, with the result of the comparison used to enable or disable the output buffers. In test mode, in the event of a failed parallel test comparison, the comparator causes the output buffers to go into a high-impedance state; for a passing parallel test, the actual data state is presented by the output terminals. The comparison circuitry is in parallel with the output data path, so that the output data path is not adversely affected by the test circuitry, and so that the access time in test mode is the same as the access time during normal operation (assuming a passing test). The technique may be adapted to wide parallel test schemes.

In modern high density memories, such as random access memories having 2.sup.20 bits (1 Megabit) or more, the time and equipment required to test functionality and timing of all bits in the memory constitutes a significant portion of the manufacturing cost. Accordingly, as the time required for such testing increases, the manufacturing costs also increase. Similarly, if the time required for the testing of the memory can be reduced, the manufacturing cost of the memories is similarly reduced. Since the manufacturing of memory devices is generally done in high volume, the savings of even a few seconds per device can result in significant cost reduction and capital avoidance, considering the high volume of memory devices produced.
Random access memories (RAMS) are especially subject to having significant test costs, not only because of the necessity of both writing data to and reading data from each of the bits in the memory, but also because RAMs are often subject to failures due to pattern sensitivity. Pattern sensitivity failures arise because the ability of a bit to retain its stored data state may depend upon the data states stored in, and the operations upon, bits which are physically adjacent to a particular bit being tested. This causes the test time for RAMs to be not only linearly dependent upon its density (i.e., the number of bits available for storage) but, for some pattern sensitivity tests, dependent upon the square (or 3/2 power) of the number of bits. Obviously, as the density of RAM devices increases (generally by a factor of four, from generation to generation), the time required to test each bit of each device in production increases at a rapid rate.
It should be noted that many other integrated circuit devices besides memory chips themselves utilize memories on-chip. Examples of such integrated circuits include many modern microprocessors and microcomputers, as well as custom devices such as gate arrays which have memory embedded therewithin. Similar cost pressures are faced in the production of these products as well, including the time and equipment required for testing of the memory portions.
A solution which has been used in the past to reduce the time and equipment required for the testing of semiconductor memories such as RAMs is the use of special "test" modes, where the memory enters a special operation different from its normal operation. In such test modes, the operation of the memory can be quite different from that of normal operation, as the operation of internal testing can be done without being subject to the constraints of normal operation.
An example of a special test mode is an internal "parallel", or multi-bit, test mode. Conventional parallel test modes allow access to more than one memory location in a single cycle, with common data written to and read from the multiple locations simultaneously. For memories which have multiple input/output terminals, multiple bits would be accessed in such a mode for each of the input/output terminals, in order to achieve the parallel test operation. This parallel test mode of course is not available in normal operation, since the user must be able to independently access each bit in order to utilize the full capacity of the memory. Such parallel testing is preferably done in such a way so that the multiple bits accessed in each cycle are physically separated from one another, so that there is little likelihood of pattern sensitivity interaction among the simultaneously accessed bits. A description of such parallel testing may be found in McAdams et al., "A 1-Mbit CMOS Dynamic RAM With Design-For-Test Functions", IEEE Journal of Solid-State Circuits, Vol SC-21, No. 5 (October 1986), pp. 635-642.
As described in this article, conventional parallel test operations may be done in one of two ways. A first one of these methods merely compares the data state read from each of the multiple simultaneously accessed bits with one another. If all of the simultaneously accessed bits have the same data, the test operation passes. The accuracy of this test is based on the assumption that not all of the bits would fail in the same way at the same time. While such an assumption may not always be valid, such as in the case that the data path circuitry is faulty, this parallel test method can be implemented relatively easily, and the testing of common circuitry such as in the data path can be performed separately, so that the accuracy of the overall test sequence is quite high.
The second method for parallel test, commonly referred to as "expected data parallel test", is performed by comparing the data presented by the accessed bits against one another, and also against the contents of an on-chip register to determine not only that the same data was read from all accessed bits, but also that the data state read was the correct data state. Such a parallel test provides improved accuracy in its result, due to the additional comparison, at a cost of increased on-chip circuitry necessary implemented for its implementation.
For either case, the results of the on-chip comparison must be communicated externally from the chip, for example to automated test equipment that is exercising the chip. In the McAdams et al. article cited hereinabove, in the non-expected data mode, the outputs are driven to a high logic level for a passing parallel test and to a low logic level for a failing parallel test. Accordingly, the actual data state of the storage cells is not output at the output terminals in such a parallel test. In this implementation, if for some reason all of the tested locations had the same data state and if that data state were the incorrect one, the memory would communicate a high logic level at the output, indicating that the test had passed.
In the expected data test, the implementation disclosed in the McAdams et al. article enables the output to match the expected data for passing locations and to present the complement of the expected data for failing locations. However, this requires that the automated test equipment, or end system as the case may be, be able to itself store the expected data and compare it to the data received at the output terminals of the memory device. Accordingly, this adds complexity to the test hardware required for the parallel test in the expected data mode. Alternatively, as described in U.S. Pat. Nos. 4,654,849 and 4,860,259, in the expected data mode a comparator may present, at the output terminal, a first logic level for a pass and a second logic level for a fail, similarly as in the non-expected data mode described above, but of course the actual data state stored by the memory cells would in such a case not be presented at the output.
Another technique for communicating the results of the comparison in parallel test mode is to use a dedicated terminal (e.g., a package pin or bond pad, as the case may be) to communicate the results of the on-chip parallel test comparison. This technique is especially useful during functional probe test of the memory, as a dedicated terminal may be accessed when the chip is still in wafer form, prior to its encapsulation or other packaging. However, significant test time also occurs after packaging, during which the parallel test feature is also useful. In order to use a dedicated test result terminal for package test, it is therefore necessary that the package have a pin or other external terminal for this function. Due to the desires of the system designer that the circuit package be as small as possible, with as few connections as possible, the use of a dedicated pin for test result communication is therefore undesirable.
Another known technique for communicating the result of the on-chip parallel test uses an existing terminal, one which has a function during normal operation, to present a data state corresponding to the result of the test. The terminal used is often an address terminal, since one or more of the address bits are "don't cares" in the parallel test mode. The results of the test are communicated at this terminal, for example, by setting a "1" on the terminal if all of the accessed bits presented the same data (and matched the expected data, if appropriate) and a "0" if one or more of the accessed bits had a data state different from the others. However, such an arrangement requires the chip design to incorporate a dual function for a terminal, adding to the circuit complexity, chip size, and perhaps, due to additional loading, adversely affecting device performance.
Another known technique for communicating the parallel test result generates a high impedance state on the output terminal when the comparison is false. Such a technique is described in Shimada et al., "A 46-ns 1-Mbit CMOS SRAM", IEEE Journal of Solid-State Circuits, Vol. 23, No. 1, (Feb. 1988) pp. 53-58. In this technique, applied to a multiple output RAM (such as a by-four or by-eight RAM) where the parallel test is accomplished by simultaneously accessing multiple bits for each output, the output terminal for which the comparison is false is placed in a high-impedance state.
As described in this article relative to FIG. 5, parallel test is accomplished in this device by the simultaneous access of four of the array blocks. The comparison of the data retrieved from the four accessed bits is accomplished by arbiter buffers, which drive lines BUS and BUS.sub.-- in wired-AND fashion. As noted on page 55, since the p-channel pull-up transistors in the arbiter buffers are small, if any of the four selected cells fails (e.g., has a "0" instead of a "1"), both of lines BUS and BUS.sub.-- will be at a low logic level. By the operation of the NAND gates which, in such a case, will provide a "1" input to both of the NORs driving the pull-up and pull-down transistors of the output buffer, such a failure will cause a high-impedance state at the output of the device.
As is evident from this construction, however, it is apparent that the arbiter buffers are connected in series in the data path between the sense amplifiers and the data out terminal both for normal and parallel test modes. Accordingly, the propagation delay required by the arbiter buffers is seen during normal operation, so that an access time penalty is paid in order to implement the parallel test comparison. This penalty is made worse by the construction of the arbiter buffers in such a way that the p-channel pull-up transistors are sufficiently small so that a single n-channel pull-down transistor (in the example of a test failure due to reading a "0" instead of a "1") can pull down line BUS or BUS.sub.-- which is being pulled high by the other three p-channel transistors. This small size for the pull-up devices will, of course, result in a slow transition time for a line BUS or BUS.sub.13 going from a low to a high logic level for a read operation.
The problem discussed hereinabove relative to the small p-channel pull-up transistor will become even worse if the parallel test design goes from a by-four test to a by-eight or wider parallel test operation. This is because a single n-channel transistor must be capable of pulling down a node being pulled up by seven, or fifteen in the case of a by-sixteen test, p-channel pull-up transistors. Accordingly, the scheme described in the Shimada et al. paper will become less useful for wider parallel test operations. Of course, as memories become larger and larger, it will become desirable to test even more bits in parallel.
It is therefore an object of this invention to provide a circuit for communicating the result of a parallel test operation on existing output terminals of the device, but where the data state of a passing test appears at the output terminals.
It is a further object of this invention to communicate this result by way of a high impedance state at the output terminal.
It is a further object of this invention to provide such a circuit in such a manner that the access time of the device in normal operation is not significantly affected by the implementation of the circuit.
It is a further object of this invention to provide such a circuit which can be scaled to increasingly wider parallel test schemes without significantly impacting the normal operating characteristics of the device.
It is a further object of this invention to provide such a circuit which, in test mode, will present the actual stored data in the event of a pass of the test.
It is a further object of this invention to provide such a circuit which can perform the parallel test comparison without requiring the use of complementary data lines carrying a differential signal.
It is a further object of this invention to provide such a circuit which can be used not only on memory integrated circuits for parallel test, but also for test modes on integrated circuits which include memories embedded therewithin.
Other objects and advantages of this invention will become apparent to those of ordinary skill in the art having reference to this specification together with the drawings.

Semiconductor memory with improved test mode


Aspects of this disclosure relate to a method of compiling high-level software instructions to generate low-level software instructions. In an example, the method includes identifying, with a computing device, a set of high-level (HL) control flow (CF) instructions having one or more associated texture load instructions, wherein the set of HL CF instructions comprises one or more branches. The method also includes converting, with the computing device, the identified set of HL CF instructions to low-level (LL) instructions having a predicate structure. The method also includes outputting the converted (LL) instructions having the predicate structure.

Compilers are computer programs that generate low-level software instructions, such as those defined by various machine or assembly computer programming languages, from high-level software instructions, such as those defined in accordance with various so-called high-level computer programming languages (e.g., C, C++, Java, Basic and the like). A computer programmer typically defines a computer program using high-level software instructions and invokes the compiler to generate low-level software instructions. The low-level software instructions correspond to the high-level software instructions that are executable by any given computing device that supports execution of the low-level software instructions. In this way, the compiler compiles the high-level software instructions to generate the low-level software instruction so that any given computing device may execute the computer program defined by the computer programmer using software instructions defined in accordance with a high-level programming language.

Optimizing texture commands for graphics processing unit


In an embodiment, a method includes receiving, at an autonomous vehicle, reported data regarding an object in proximity to the autonomous vehicle. The data is collected by a collecting device external to the autonomous vehicle, and is relayed to the autonomous vehicle via a server. The reported data includes a current location, type, or predicted location of the object. The method further includes determining whether the reported data of the object matches an object in an object list determined by on-board sensors of the autonomous vehicle. If the determination finds a found object in the object list, the method correlates the reported data of the object to the found object in the object list. Otherwise, the method adds the reported data of the object to an object list of objects detected by sensor from on-board sensors of the autonomous vehicle. In embodiments, the collecting device is a mobile device.

Recently, image and other sensor systems have been developed to detect objects, and different object types, such as types of cars, pedestrians, and cyclists. These systems can further detect direction of movements, speed, and accelerations of these objects as well. However, these systems, while sufficient for certain tasks, can be hindered by limitations of range, field of view, or other measuring errors.

Enhancing autonomous vehicle perception with off-vehicle collected data

The Charles Stark Draper Laboratory, Inc.


Methods and systems are provided for delivering food. In one embodiment, a method includes: receiving, by a processor, a food delivery request; autonomously preparing food, by the processor and at least one robot or task specific device, based on the food delivery request in a compartment configured to be sterile of an autonomous vehicle; and autonomously delivering the prepared food by the autonomous vehicle.

Personal food delivery services typically prepare food and/or drinks in a kitchen environment, package the food and/or drinks for transportation, and personally drive the packaged food and/or drinks to the requesting address. Each stage of the food delivery service potentially exposes the food and/or drinks to many people and the environment. In such systems, prior to acceptance by the user, the food and/or drink is exposed to many potential contaminants.
An autonomous vehicle is a vehicle that is capable of sensing its environment and navigating with little or no user input. An autonomous vehicle senses its environment using sensing devices such as radar, lidar, image sensors, etc. The autonomous vehicle system further uses information from global positioning systems (GPS) technology, navigation systems, and/or drive-by-wire systems to navigate the vehicle.
Autonomous vehicles are typically used to carry passengers from point A to point B. It is desirable to make use of the autonomous vehicle to transport the food and/or drinks to a requesting location to prevent exposure to the many potential contaminants. Furthermore, other desirable features and characteristics of the present invention will become apparent from the subsequent detailed description and the appended claims, taken in conjunction with the accompanying drawings and the foregoing technical field and background.

Systems and methods for autonomous mobile food preparation and delivery


The present invention provides a solar cell comprising a substrate, a first buffer layer disposed above the base layer, a second buffer layer disposed above the first buffer layer, a first boron compound layer disposed above the second buffer layer, a second boron compound layer disposed above the first compound layer, and a window layer disposed above the second compound layer, wherein the first compound layer comprises a first type of doping, wherein the second compound layer comprises a second type of doping, wherein the second buffer layer comprises a higher energy bandgap than the first compound layer, and wherein the first buffer layer and the second buffer layer permit a boron content in the first compound layer and the second compound layer to be greater than 3 %.

The present invention generally relates to photovoltaic cells and, more specifically, to an enhanced multi-junction photovoltaic cell that includes buffer layers for the growth of single crystal boron compounds.
The interest in photovoltaic (PV) cells or solar cells has been increasing due to concerns regarding pollution and limited available resources. This interest includes both terrestrial and non-terrestrial applications. In the non-terrestrial environment of outer space, the concern over limited resources of any type is a major one because the need to increase an amount of a resource increases a spacecraft's payload. An increased payload can increase the cost of a launch more than linearly. With the ready availability of solar energy in outer space for a spacecraft, such as a satellite, the efficient conversion of solar energy into electrical energy is an obvious alternative to an increased payload.
The cost per watt of electrical power generation capacity of photovoltaic systems is a main factor that inhibits their widespread use in terrestrial applications. Conversion efficiency of sunlight to electricity is of critical importance for terrestrial PV systems, since increased efficiency usually results in a reduction of related electricity generation system components (such as, cell area, module or collector area, support structures, and land area) for a given required power output of the system. For example, in concentrator photovoltaic systems which concentrate sunlight from around 2 to around 2000 times onto the PV cell, an increase in efficiency typically results in a proportionate reduction of an area comprising expensive concentrating optics.
Irrespective of the application, and as with any energy generation system, efforts have been ongoing to increase the output and efficiency of PV cells. In terms of output, multiple cells or layers having different energy bandgaps have been stacked so that each cell or layer can absorb a different part of the wide energy distribution of photons in sunlight. The stacked arrangement has been provided in a monolithic structure on a single substrate or on multiple substrates.
In a multiple cell device, semiconductive materials are typically lattice-matched to form multiple p-n (or n-p) junctions. The p-n (or n-p) junctions can be of the homojunction or heterojunction type. When solar energy is received at a junction, minority carriers (i.e., electrons and holes) are generated in the conduction and valence bands of the semiconductor materials adjacent the junction. A voltage is thereby created across the junction and a current can be utilized there from. As the solar energy passes to the next junction, which can be optimized to a lower energy range, additional solar energy at this lower energy range can be converted into a useful current. With a greater number of junctions, there can be greater conversion efficiency and increased output voltage.
Whether in the multiple-junction or single-junction PV device, a conventional characteristic of PV cells has been the use of a single window layer disposed on an emitter layer which is disposed on a base layer. Further, the base layer may be disposed on a back surface field layer which is disposed on a substrate. The window layer and the back surface field layers are of higher bandgap semiconducting material lattice matched to the whole structure. The purpose of the top window layer and the back-surface field layer have been to serve both as a passivation layer and a reflection layer due to high electric fields associated with the high bandgap. The photo-generated carriers, such as the electrons in the emitter layer and the holes in the base layer, can further be reflected towards the p-n junction (which is the emitter and the base layer interface), for recombination and for generating electricity.
For a multiple-cell PV device, efficiency is limited by the requirement of low resistance interfaces between the individual cells to enable the generated current to flow from one cell to the next. Accordingly, in a monolithic structure, tunnel junctions have been used to minimize the blockage of current flow. In a multiple wafer structure, front and back metallization grids or contacts with low coverage fraction and transparent conductors have been used for low resistance connectivity. Since the output power is the product of voltage and current, a multi-junction solar cell can be designed with multiple junctions comprised of materials having different bandgaps, so that each junction can absorb a different part of the wide energy distribution of photons in sunlight. Additionally, uniform current generating characteristics may be produced.
Materials for a solar cell are conventionally grown epitaxially in a metal organic vapor phase epitaxy (MOVPE) system, also known as a metal organic chemical vapor deposition (MOCVD) system. During material growth, the lattice parameter for all of the different cell layers comprising the solar cell should be the same as that of the substrate. III–V compound materials of different compositions, but with the same lattice parameter as that of the substrate, are used to achieve different bandgaps that are typically required for multijunction solar cells. These layers are usually grown on a III–V substrate such as a GaAs wafer. In order to reduce the cost of the substrate material as well as to increase the over all power to weight ratio from the solar cell, a GaAs nucleated Ge substrate can be used. The lattice parameter of the Ge substrate is about 5.64613 Angstroms (Å) and that of GaAs is about 5.6533 Å with little mismatch between the lattice parameters. Although the Ge atomic structure is of a diamond structure pattern and that of GaAs is of a zinc-blend structure, it can be possible to grow GaAs on Ge with minimum defects. For a multijunction solar cell device, a thin layer of GaAs is first grown on the Ge substrate and followed by the growth of various other compositions.
Existing III–V semiconductor multi-junction solar cells are processed from epitaxial gallium indium phosphide/gallium arsenide (GaInP2/GaAs) materials, grown on a GaAs nucleated Ge substrate. By providing active junctions in GaInP2, GaAs, and Ge, a triple-junction solar cell can be processed. These existing triple-junction solar cells have demonstrated a 29.3% efficiency under space solar spectrum that is Air Mass 0 (AM0), 0.1353 W/cm2 at 28° C. Under the concentrator terrestrial spectrum (AM1.5D, 44W/cm2, 25° C.), an efficiency of 32.3% has also been demonstrated. The Air Mass value indicates the amount of air in space while the conversion efficiency describes a percentage of conversion from the sun's energy to electrical power. A limitation of such triple-junction solar cells includes the inability of increasing the AMO efficiency above 29.3% (to, for example, 35% or higher). To achieve such an increase, four junctions may be needed to enhance the utilization of the sun's energy spectrum.
Conventional methods to grow a triple-junction solar cell typically use GaInP2, GaAs and Ge cells. The direct bandgaps of GaInP2 and GaAs are about 1.85 eV and about 1.424 eV respectively (Ge has an indirect bandgap of about 0.66 eV). Theoretical studies have shown that an additional third junction of about a 1.0 eV solar cell disposed on top of the Ge junction may be necessary for building a four junction monolithic solar cell. As such, GaInP2 may form the first junction, GaAs can form the second junction, a new 1 eV material may form the third junction and Ge can form the fourth junction. Limitations of such materials include a lack of a bandgap around 1.0 eV that may be lattice matched to Ge and a lack of requisite material properties needed to process a solar cell. Some materials such as Gallium Indium Arsenic Nitride (GaInAsN) have been used in an attempt to achieve lattice-matching characteristics, however an ability to produce material with requisite characteristics and with a bandgap around 1.0 eV has not been achieved.
Using boron compounds may allow the formation of a junction material having a bandgap of about 1.0 eV in a multi-junction solar cell thus resulting in a higher voltage output. Prior art methods to grow epitaxial single crystal boron compounds, such as those from National Renewable Energy Laboratories (NREL), have followed conventional MOCVD growth techniques to achieve a low boron content of about 1.6% and could not demonstrate lattice matched boron based materials (such as BGaInAs) with high boron content due to a reaction between indium and boron source gases during the growth of the boron based layer. Further some prior art techniques to re-crystallize the material from a polycrystalline state to a monocrystalline state include annealing, high temperature melting and solidifying. None of these techniques, however, could form epitaxial boron compounds.
The conventional MOCVD process for growing a layer on a substrate requires a thermal heat clean of the substrate to remove the surface oxides. Then, a standard buffer layer, such as a GaAs layer on a GaAs substrate, can be grown at the same growth temperature as the layers grown above it. NREL has followed this process to grow a GaAs buffer layer and BGaAs or BGaInAs test layers above the GaAs layer. Utilizing such a traditional method, NREL could not achieve a preferred composition (B0.093 Ga0 707 In0 2 As, further described below) in the BGaInAs layer to produce an about 1.0 eV bandgap due to crystallization problems in enhancing the boron content as well as the pre-reaction problems associated with the source materials.
U.S. Pat. No. 6,281,426 B1, assigned to Midwest Research Institute, describes utilizing GaInAsN for the third junction in a four junction solar cell in an attempt to provide a bandgap of about 1.0 eV following the traditional growth method described above. Other materials, such as BGaInAs and GaAsGe, were also presented for forming the third junction solar cell. However, because the traditional growth method was utilized, the required composition of BGaInAs material to achieve an about 1.0 eV bandgap was not realized.
As can be seen, there exists a need for an improved multi-junction photovoltaic cell having a 1.0 eV bandgap with requisite properties of single crystal boron compounds without the problems associated with a pre-reaction of source gases and of single crystal formation.

Multi-junction photovoltaic cell having buffer layers for the growth of single crystal boron compounds


Compositions of porous thin films and methods of making are provided. The methods involve self-assembly of a cyclic peptide in the presence of a block copolymer.

There are growing demands to fabricate polymeric thin films with vertically aligned sub-nanometer channels for applications including carbon capture, gas separation, water desalination, batteries, fuel cell membranes, and solar-fuel conversion. Obtaining molecular level control over the pore size, shape and surface chemistry is a critical bottleneck, and has been investigated across many disciplines. Inorganic or hybrid porous materials, like zeolites and metal organic frameworks, where pore size can be readily tailored from a few tenths to several nanometers, have achieved some success along these lines. However, it remains a challenge to orient the channels over macroscopic distances and to process these materials on flexible substrates.
Polymers, on the other hand, are readily processed at low cost as thin films or multilayered laminates with little, if any, constraints on chemical structure and thickness of the individual layers. Hypercrosslinked polymer networks can provide pores as small as a few tenths of nanometers, but the size distribution of the pores is broad and the spatial arrangement is random which impedes selective transport. Alternatively, by using block copolymers (BCPs), it is now routine to produce nanoporous thin films with nearly monodisperse aligned pores as small as 3 nm. However, even the smallest pore size obtained in a BCP thin film is too large for the selective molecular transport required in advanced applications including the aforementioned areas.
Composite films have been fabricated using preformed nanotubes, like carbon nanotubes (CNTs). However, there are no effective means to orient preformed nanotubes normal to the surface over macroscopic distances. Thus, vertically aligned CNT forests have been grown on substrates, yet it remains non-trivial to backfill with matrix materials between CNTs to achieve lift-off from the underlying substrate generating through channels. CNTs prepared via this route are still subject to some degree of heterogeneity in their pore size distribution, which may be a further limiting factor in their implementation as selective membranes. Interior modification of preformed nanotubes to enhance selectively also represents a significant hurdle.
In contrast to CNTs, sub-nanometer tubular materials with precise control over the pore size, shape and surface chemistry can be produced by assembling organic motifs, like cyclic peptides, dendrimers, DNA, surfactants and rosettes. Unlike preformed-nanotubes such as CNTs, the formation of nanotubes based on organic subunits is reversible, as they are governed by specific inteimolecular interactions, like hydrogen bonding or electrostatic interactions. A directed, synergistic co-assembly of nanotube subunits and BCPs may allow one to direct the formation of nanotubes within the nanoscopic domains established by the BCPs so as to manipulate the spatial organization and macroscopic orientation of nanotubes. This process takes full advantage of nanoscopic assembly of BCPs and the reversibility of organic nanotube growth and is compatible with existing technologies for thin film fabrication. It completely eliminates the need to prepare nanotubes of uniform length, since the number of subunits comprising the nanotube can easily be varied so that the nanotube length is tailored to be equal to the film thickness, thus producing porous films with nanotubes that span the entire film. This new strategy also circumvents all impediments associated with aligning and organizing high aspect ratio nano-objects normal to the surface. Surprisingly, the present invention meets this and other needs.

The Regents of the University of California


A printhead assembly includes a body defining a seat for a printhead and having a dividing member. A plurality of fluid storage galleries is arranged on one side of the dividing member. A plurality of feed passages is arranged on an opposed side of the dividing member, each feed passage having a first end in communication with one of the galleries and an opposed end opening out into the seat. A printhead is mounted in the seat such that fluid fed from the galleries is supplied to at least one printhead chip of the printhead.

This invention relates to a modular printhead. More particularly, the invention relates to the assembly of such a modular printhead. Specifically, this invention relates to a printhead assembly.
The applicant has previously proposed the use of a pagewidth printhead to provide photographic quality printing. However, manufacturing such a pagewidth printhead having the required dimensions is problematic in the sense that, if any nozzle of the printhead is defective, the entire printhead needs to be scrapped and replaced.
Accordingly, the applicant has proposed the use of a pagewidth printhead made up of a plurality of small, replaceable printhead modules which are arranged in end-to-end relationship. The advantage of this arrangement is the ability to remove and replace any defective module in a pagewidth printhead without having to scrap the entire printhead.
It is also necessary to accommodate thermal expansion of the individual modules in the assembly constituting the pagewidth printhead to ensure that adjacent modules maintain their required alignment with each other.
According to the invention, there is provided a printhead assembly which includes
a body defining a seat for a printhead and having a dividing member;
a plurality of fluid storage galleries arranged on one side of the dividing member;
a plurality of feed passages arranged on an opposed side of the dividing member, each feed passage having a first end in communication with one of the galleries and an opposed end opening out into the seat; and
a printhead mounted in said seat such that fluid fed from the galleries is supplied to at least one printhead chip of the printhead.
The dividing member may be in the form of a wall or core member with a plurality of separating elements projecting from one side of the wall, the separating elements defining a plurality of separate channels. The body may include a closure member secured to the wall to close off the channels to define the galleries.
A plurality of discrete canals may be formed in spaced relationship on an opposed side of the wall. The body may include a cover member which closes off the canals to define the feed passages.
An outer surface of the cover member may carry conductive elements, the conductive elements providing control signals to said at least one printhead chip. The conductive elements may be formed on said outer surface of the cover member by hot stamping during molding of the cover member. Preferably, the printhead includes a plurality of printhead modules arranged in end-to-end relationship, each module carrying a printhead chip so that fluid is supplied to each of the printhead chips.

Ink feed for six color inkjet modular printhead


An expandable anchor mechanism for tentatively fixing a flexible tubular section of a bioptic or surgical treating instrument inserted in a biopsy channel of an endoscopic insertion rod. During a bioptic or surgical treatment, a fore end portion of the treating instrument is fixedly gripped by the anchor mechanism to stabilize a movable operating member of the instrument which is protruded into a body cavity from the distal end of the biopsy channel. The anchor mechanism includes an anchor control means for remote-controlling an anchor member to and from an expanded state projecting into the biopsy channel to grip a treating instrument and a flatly contracted state permitting movements of the treating instrument in the biopsy channel.

1. Field of the Art
This invention relates generally to endoscopes in use in medical fields, and more particularly to an expandable anchor mechanism for use in a so-called biopsy channel in an endoscopic insertion rod or the like, for the purpose of tentatively holding fore end portions of an inserted bioptic or surgical treating instrument in a stably fixed state during a treatment.
2. Prior Art
As well known in the art, endoscopes are largely constituted by a manipulating head assembly, an insertion rod to be introduced into a body cavity of patient, and a universal cable which is disconnectibly connected to a light source or other external unit. In this regard, FIG. 16 shows layout of the manipulating head and connected parts typical of medical endoscopes in general.
In that figure, indicated at 1 is a manipulating head assembly, at 2 an insertion rod, and at 3 a universal cable. As seen in FIG. 17, the insertion rod 2 is provided with an angle section 2b between a rigid distal end section 2a and an elongated flexible rod section 2c which is flexible in arbitrary directions and which is extended forward from the manipulating head assembly 1. Provided on an end face or on a lateral side of the distal end section 2a is an illumination window through which illumination light rays are projected toward a subject of particular interest, along with an endoscopic observation window to observe therethrough the illuminated subject. Accordingly, upon introducing the distal end portion of the insertion rod into a body cavity, one can observe, through the observation window, the images of intracavitary walls under illumination by light rays from the illumination window.
In this manner, endoscopes are used for observation of body cavities and, depending upon results of observation or examination, it permits use of various bioptic or surgical instruments such as forceps, high frequency instruments and the like, for example, for sampling tissues in a particular region of interest or for stopping bleeding. A medicinal feed tube is also often used by way of an endoscope for sending in a dose of injection medicine or for sprinkling an image enhancing pigment or coloring agent for closer and more accurate observation of a body cavity or for sending in other medicinal liquids. For these purposes, the insertion rod 2 is provided with a so-called biopsy channel 4 which is normally includes a rigid end passage 5 which is opened on a distal end face (or on a lateral side) of the rigid distal end section 2a of the endoscopic insertion rod 2, and a flexible passage 6 constituted by a flexible tube which is connected to the rigid end passage 5 at its fore end through a connector pipe 7. The flexible passage 6 is passed coextensively through the flexible section 2c of the insertion rod 2 and into the manipulating head assembly 1 of the endoscope. The proximal end of the flexible passage 6 is connected to an entrance 8 of the biopsy channel, which is provided on the manipulating head assembly 1.
In case an infected or diseased portion is spotted within a body cavity as a result of an endoscopic examination, for example, a surgical instrument like forceps or high frequency instrument could be inserted through the biopsy channel to administer an appropriate treatment to the infected portion. For example, there may be used forceps 11 with a movable operating member 10 such as a pair of pincerlike claws or the like. In this instance, the movable operating member 10 is provided at the fore end of an elongated coil tube member 12 the proximal end of which is connected to a manipulating handle 13 which is maneuverable to control movements of the operating member 10. The coil tube member 12 is required to be flexible over its entire length in order to be able to flex itself together with the flexible section 2c of the endoscopic insertion rod 2 which is bendable in arbitrary directions at the time of insertion into body cavity. Besides, the manipulating handle 13 is normally connected to the movable operating member 10 through wires and link members in such a way that the operating member 10 can be opened and closed by pulling wires back and forth in the axial direction of the insertion rod. Accordingly, the coil tube member 12 is in the form of a hollow flexible tube of a tightly wound coil internally providing a passage for the manipulating wires.
In use, the operator introduces the forceps 11 into a body cavity through the instrument entrance 8 on the manipulating head assembly 1 of the endoscope, sending the forceps 11 forward of the insertion rod 2 through the flexible passage 6 until the movable operating member 10 is protruded out of the rigid end passage 5 via the connector pipe 7. Then, after advancing the movable operating member 10 at the distal end of the forceps 11 to an aimed treating position, the operating member 10 is manipulated from the manipulating handle 13, for instance, in such a way as to remove an infected portion.
In this connection, the biopsy channel 4 on the endoscopic insertion rod 2 is designed to receive treating instruments various sizes in diameter, range from thick ones, which take the full capacity of the biopsy channel 4 in terms of diameter, to thin or narrow ones, which have an outside diameter far smaller than the inside diameter of the biopsy channel 4, more specifically, which are one half or less than one half of the inside diameter of the biopsy channel 4, depending upon the purpose or nature of the treatment to be administered. In addition, normally forceps have a bulky shape at a fore end portion with the movable operating member 10 while the coil tube member 12 is normally smaller than the movable operating member 10 in outside diameter.
Therefore, as shown particularly in FIG. 17, it is often the case that, when the forceps 11 are introduced into the biopsy channel 4, a relatively wide gap exists between the inner wall of the biopsy channel 4 and the oil tube 12, leaving the forceps 11 in an instable state. Nevertheless, the forceps 11 have to be operated by remote control from the manipulating handle 13 which is externally projected on or over the manipulating head assembly 1 of the endoscope. Besides, when opening and closing the movable operating member 10 from the manipulating handle 13, the operating force is exerted on the forceps 11 as a whole. Because of the gap space which exists between the outer periphery of the coil tube member 12 and the inner periphery of the biopsy channel 4, particularly, of the end passage 5 on the distal end section 2a of the insertion rod, difficulties are often experienced in controlling the movements of the movable operating member 10 which tends to deviate in arbitrary directions due to looseness and instability, failing to secure satisfactory targetability of the forceps toward the infected portion to be treated. On top of this problem, the targetability of the treating instrument is impaired greatly by the flexibility of the treating instrument itself, for example, the coil tube member 12 of forceps which is made of a flexible material in order to secure as high flexibility as possible from a viewpoint of ensuring resistance-free and easy movements of the instrument at the time of insertion into a body cavity.

Expandable anchor mechanism for use in endoscopic biopsy channel


An armature for a motor. The armature includes a core formed of compression-molded metal powder. The core has a continuous outer wall, an inner wall defining a slot, and a nonmagnetic section arranged on the outer wall. A coil is arranged in the slot. The coil and the slot have the same hexagonal shape to minimize gaps when the coil is fitted in the slot.

The present invention relates to an armature for use in a rotary electric machine and a method for manufacturing such an armature.
A large number of motors are used in various types of mechatronic products. This has resulted in a demand for motors that are more compact and inexpensive. Japanese Laid-Open Patent Publication No. 2001-298918 describes a typical armature of a motor. As shown in FIG. 12, the armature includes a core 81, which is attached to a rotary shaft 80, and a coil 82, which is wound in the core 81. The core 81 includes a base 81a and teeth 81b, which extend radially from the base 81a. Coil slots 86 are defined between adjacent teeth 81b to receive the coil 82. The coil 82 includes a plurality of bundled wires 83, which are coated with an insulative material such as enamel. The wires 83 are wound about the teeth 81b, as shown in FIG. 13. Each wire 83 is fed from a wire feeder to the core 81 via a flyer 84. The flyer 84 is then rotated to wind the wire 83 to the core 81.
However, the wire 83 has a round cross-section. This forms gaps 85, or dead space, between adjacent wires 83. It is thus difficult to increase the space factor of the coil 82. Consequently, the number of windings of each wire 83 must be increased. This requires the coil slots 86 to be enlarged, which in turn, would enlarge the core 81 and increase the size of the motor. In addition, an increase in the windings of the wires 83 on the core 81 increases manufacturing costs.

Armature and method for manufacturing armature


The first aspect of the present invention is directed to a method of producing a vascular network preform (VNP). This method involves forming a network of elongate fibers and at least one elongate structure from a sacrificial material. The diameter of the elongate structure is greater than that of the elongate fibers. The network of elongate fibers is placed in contact with at least one elongate structure either following or during forming the network of elongate fibers or forming the at least one elongate structure. A matrix is applied around the network of elongate fibers, in contact with the at least one elongate structure. The network of elongate fibers and elongate structure, within the matrix is sacrificed to form a preform. The resulting preform contains a vascular network of fine diameter tubes in contact with at least one elongate passage having a diameter greater than that of the fine diameter tubes. The resulting solid preform and methods of using it are also disclosed.

Acute and chronic wounds are a significant burden to the healthcare system affecting millions of patients nationally and resulting in billions of dollars of outlays. Every year several million people suffer irreversible damage or loss of one or more tissue or organ systems, resulting in disfigurement, loss of function, physiologic derangement, and death.
A major leap forward in reconstructive surgery occurred in the 1960's and continued through the following decade with the discovery of "axial flaps". Using detailed anatomic analysis, reconstructive surgeons determined that large portions of composite tissues (e.g., skin and muscle, skin and bone, skin and fascia etc.), designated "flaps" could be reliably moved from one portion of the body (donor) to an adjacent area (recipient). The development of microsurgery was the next major breakthrough. Now with the aid of an operating microscope, surgeons could reliably suture arteries and veins as small as 1 mm in diameter with patency rates over 95%. Whereas previously donor tissues could only be moved as far as their vascular "leash" would allow, microsurgical techniques have enabled reconstructive surgeons to move tissues from and to anywhere in the body, as long as recipient vessels (to which the flap artery and vein could be sewn) are found.
Despite the numerous benefits associated with tissue transfer, there are certainly drawbacks associated with these complex reconstructive procedures. Harvesting the donor tissue is a complicated process and the resultant donor sites are often painful and carry substantial morbidity, especially in the diabetic population. Patients who are elderly or carry other co-morbidities such as cardiopulmonary or renal disease are especially at risk for significant peri-operative complications because of the long anesthesia times, notable blood loss, and large fluid shifts.
If suitable replacement tissue could be fabricated with its own microvascular network and vascular leash (for attachment to host vasculature), it will be possible to create "off the shelf constructs" which could then be anastomosed to the required area of deficiency in a surgically reliable, safe, and expeditious manner.
Although the field of tissue engineering holds great promise for the fabrication of functional implantable materials (Langer et al., Science 260:920-926 (1993)), the ability to design artificial tissue constructs that have their own inherent vascular network remains a critical limiting step (Saltzman et al., Nat Rev Drug Disc 1:177-186 (2002)). Without such a network, any implanted engineered tissue must rely upon host vessel ingrowth for vascularization. However, because of the slow pace of vascular ingrowth, tissue engineers are constrained to designing constructs no thicker than a few millimeters, the limit of diffusion of nutrients from a vascular to a non-vascular area (Androjna et al., Tissue Engineering Part A 14:559-569 (2008)). Diffusion of nutrients is highly limited and, therefore, restricts the size and thickness of artificial tissue implants. In vivo, most cells cannot survive more than a few hundred micrometers away from the nearest capillary (Frerich et al., Int J Oral Maxill of 30:414-420 (2001); Okano et al., Cell transplant 7:435-442 (1998); Sheridan et al., J Control Release 64:91-102 (2000)). Cells distant from a vascular area are prone to ischemic death because of a paucity of oxygen and nutrients required for cellular metabolism.
Moreover, to be clinically useful, a tissue engineered construct must have not only a 3D vascular network, but also the ability to be "spliced" into the host blood supply, allowing for immediate vascularization of the construct and assuring the survival of the cellular constituents within. The creation of such vascularized constructs is currently beyond the capabilities of any contemporary tissue engineering approach. To rectify this problem, several investigators have endeavored to create a de novo vascular network, which could then be seeded with cells (Takei et al., Biotechnology Progress 23:182-186 (2007); Kannan et al., Biomaterials 26:1857-1875 (2005); Lim et al., Lab on a Chip 3:318-323 (2003); and McGuigan et al., Proc Nat'l Acad Sci 103:11461-11466 (2006)). Because the construct would be "pre-vascularized", it would theoretically be able to pass oxygen and nutrients into the deeper portions of the structure. However, in this scenario, the vascular network would have to be immediately perfused by the host's blood in order for the deeper portions of the construct to survive. This would only be possible if the micro vascular network coalesced into larger vessels that could be reliably (>1 mm in diameter) anastomosed to the host's blood supply. Unfortunately, despite tremendous advances in the understanding of vasculogenesis and angiogenesis, including the creation of capillary-like networks from cellular constituents, investigators have thus far been unable to achieve the goal of creating a confluent de novo microvascular and macrovascular network. Furthermore, the vascular networks that have been constructed remain microscopic in scale, and have not yet been integrated into appropriate tissue engineering scaffolds. In short, the organizational process underlying the development of tissues and organs thus far remains too complex to engineer from "the ground up."
Numerous investigators have attempted to engineer various constructs by placing different cell types on a variety of (3-D) matrices. Current therapeutic strategies rely upon implantation of these tissue-engineered constructs into the host where they will be re-vascularized by host vessel in-growth. Unfortunately, this is a highly fallible approach since constructs containing cells further than several hundred microns from the surface (the limits of diffusion) are prone to ischemic cell death because of a paucity of oxygen and nutrients required for cellular metabolism. This technological hurdle has significantly stunted the development of tissue engineered products that may be widely applied in the clinical arena. As an example, two of the most "successful" tissue engineered products, Integra™ and Alloderm™, developed primarily as skin substitutes, are both thin (<2 mm thick), acellular and require vascularization from the host in order to "survive". Because of their initial avascularity, both of these constructs are prone to infection and can only be placed in healthy, well vascularized wound beds.
An alternative and much more promising strategy for tissue engineering vascularized constructs would not rely on the assemblage of a (large) construct starting from masses of individual cells. Instead, the ideal strategy would be to build a construct that already contained a vascular "scaffold", with a microvascular bed that coalesced into a "feeding" macrovascular (>1 mm) leash. Such a construct would be ideal as it could be anastomosed to the host blood supply using standard microsurgical techniques, resulting in an immediately perfused, and thus fully viable construct. A variant of this approach has been pursued in a porcine model where a vascularized bladder-like tissue has been successfully created (Schultheiss et al., J. Uro. 173:276-280 (2005)). Their method involved de-cellularizing a segment of porcine intestine, then re-perfusing it with endothelial precursors which then re-endothelialized the intact vascular "scaffold". The constructs were then anastomosed to recipient pigs and demonstrated normal blood flow within the re-endothelialized vessels up to one hour post-implantation.
Although these data demonstrate a successful "proof of concept", the utility of this approach is limited by the need for a donor animal to provide the tissue, which must then be chemically treated to remove all cellular constituents. Furthermore, their constructs could not be custom designed by tissue type or shape, attributes that will likely be required when constructing any "replacement part", other than the flat sheet they utilized as a bladder wall replacement.
In general, the methods used for tissue scaffolds range in complexity from forming porous polymeric structures (Chen et al., Macromol. Biosci. 2:67-77 (2002) and Mikos et al., Electronic Journal of Biotechnology vol. 3 (2000)) (with random hole sizes and positions) to completely designing the construct structure using 3D printing or microfabrication-based technologies (Mironov et al., Trends in Biotech 21:157-161 (2003); Khademhosseini et al., Biomaterials 28:5087-5092 (2007); and Cooke et al., Journal of Biomedical Materials Research Part B—Applied Biomaterials 64B:65-69 (2003)). Several sacrificial techniques have been used to pattern simple microfluidic networks in scaffolds (Golden et al., Lab on a Chip 7:720-725 (2007) and Nazhat et al., Biomacromolecules 8:543-551 (2007)). To date, none of these techniques have met the necessary dual criteria of providing physiologic flow through 3D microchannel networks with a capability of being surgically integrated into the host macrovasculature.
Thus, comprehensive vascularization of tissue in vitro is a major challenge in fabrication of bioengineered tissue. Creating a proper connection between the engineered tissue and the host vasculature when the tissue is implanted is the next major challenge.
Constructs with three dimensional microfluidic networks have many potential applications, including fluid mixing (Therriault et al., Nat Mater 2:265-271 (2003)), providing healing agents in self-healing polymer systems (Toohey et al., Nat Mater 6:581-585 (2007)), and artificial vascular networks for engineered tissue (Borenstein et al., Biomedical Microdevices 4:167-175 (2002); Shin et al., Biomedical Microdevices 6:269-278 (2004); Choi et al., Nat Mater 6:908-915 (2007); and Saltzman et al., Nat Rev Drug Disc 1:177-186 (2002)). However, three dimensional (3D) fluidic network fabrication is currently time-consuming and difficult, requiring either layer-by-layer assembly of two dimensional (2D) structures formed using standard microfabrication techniques (such as photolithography and imprint lithography) (Luo et al., Lab on a Chip 8:1688-1694 (2008); Chiu et al., Proc. Natl. Acad. Sci. U.S.A. 98:2961-2966 (2001); McDonald et al., Acc. Chem. Res. 35:491-499 (2002)) or 3D printers (Therriault et al., Nat Mater 2:265-271 (2003); Toohey et al., Nat Mater 6:581-585 (2007); and McDonald et al., Acc. Chem. Res. 35:491-499 (2002)).
The present invention is directed to overcoming these and other deficiencies in the art.

Fabrication of a vascular system using sacrificial structures


An organic light-emitting display apparatus includes a substrate, an organic light-emitting device on the substrate, and a thin film encapsulation layer including a first inorganic film, a first organic film, and fine particles including silica with platinum particles. The fine particles are dispersed on the first organic film, and the thin film encapsulation layer is on the organic light-emitting device.

1. Field
Aspects of one or more embodiments of the present invention are directed toward an organic light-emitting display apparatus and a method of manufacturing the same.
2. Description of the Related Art
An organic light-emitting display apparatus, in comparison to other display apparatuses, has a wide viewing angle, good contrast, and fast response speed such that the organic light-emitting display apparatus has drawn a lot of attention as a next generation display apparatus. The organic light-emitting display apparatus may be used as a display unit of a small-sized product such as a mobile phone or as a display unit of a large-sized product such as a television.
The organic light-emitting display apparatus includes organic light-emitting devices on a substrate, and a thin film encapsulation layer is formed to cover the organic light-emitting devices. Because the organic light-emitting devices are vulnerable to moisture and oxygen, a thin film encapsulation layer is formed on the organic light-emitting devices to prevent the moisture and oxygen from penetrating into a panel from outside and to protect the organic light-emitting devices from the moisture and oxygen that may penetrate from the outside.
The thin film encapsulation layer may be formed on the light-emitting devices by stacking organic and inorganic films.

Organic light emitting display apparatus and method of manufacturing the same


A ball type downhole lubricator valve features a ball rotating on its axis to open or close with control line pressure to an actuating piston. The ball is also shiftable to a locked open position. A cage surrounds the ball and retains opposed seats to it. The cage is made from one piece and tangential holes are drilled and tapped before the piece is longitudinally split with a wire EDM cutting technique. Fasteners to rejoin the cut halves properly space them to the original one piece internal dimension. Auxiliary tools allow determination of spacing of internal components so that a desired spring preload on the seats against the ball can be achieved.

Lubricator valves are valves used downhole to allow long assemblies to be put together in the well above the closed lubricator valve with well pressure further below the closed lubricator valve. These valves are frequently used in tandem with sub-surface safety valves to have redundancy of closures against well pressures below.
Lubricator assemblies are used at the surface of a well and comprise a compartment above the wellhead through which a bottom hole assembly is put together with the bottom valve closing off well pressure. These surface lubricators have limited lengths determined by the scale of the available rig equipment. Downhole lubricators simply get around length limitations of surface lubricators by using a lubricator valve downhole to allow as much as thousands of feet of length in the wellbore to assemble a bottom hole assembly.
In the past ball valves have been used as lubricator valves. They generally featured a pair of control lines to opposed sides of a piston whose movement back and forth registered with a ball to rotate it 90 between an open and a closed position. Collets could be used to hold the ball in both positions and would release in response to control pressure in one of the control lines. An example of such a design can be seen in U.S. Pat. Nos. 4,368,871; 4,197,879 and 4,130,166. In these patents, the ball turns on its own axis on trunnions. Other designs translate the ball while rotating it 90 degrees between and open and a closed position. One example of this is the 15K Enhanced Landing String Assembly offered by the Expro Group that includes such a lubricator valve. Other designs combine rotation and translation of the ball with a separate locking sleeve that is hydraulically driven to lock the ball turning and shifting sleeve in a ball closed position as shown in U.S. Pat. No. 4,522,370. Some valves are of a tubing retrievable style such as Halliburton's PES® LV4 Lubricator Valve. Lock open sleeves that go through a ball have been proposed in U.S. Pat. No. 4,449,587. Other designs, such as U.S. Pat. No. 6,109,352 used in subsea trees have a rack and pinion drive for a ball and use a remotely operated vehicle (ROV) to power the valve between open and closed positions claiming that either end positioned is a locked position but going on to state that the same ROV simply reverses direction and the valve can reverse direction.
What is lacking and addressed by the present invention is a more elegant solution to a downhole ball type lubricator valve. One of the features is the ability to translate the ball for the purpose of locking open a ball that normally rotates between open and closed on its own axis. Another feature is a method of manufacturing parts that must be longitudinally split so that they retain the original bore dimension despite the wall removal occasioned by longitudinally splitting the part. Yet another feature is the ability to assemble components to a given overall dimension so as to accurately set preload on biased seats that engage the ball. These and other features of the present invention will be more readily apparent to those skilled in the art from a review of the preferred embodiment and associated drawings that are described below while recognizing that the full scope of the invention is determined by the claims.

Method of manufacturing a downhole lubricator valve


A flow rate measuring method for a multiphase fluid mixture flowing into a line is provided. The method comprises the steps of passing the fluid mixture through a Venturi tube having a pressure drop, measuring a differential pressure across the Venturi tube and a line pressure of the fluid mixture, measuring by a second measuring device, measured parameter(s) of the fluid mixture correlated to first and second phase relative quantities, determining estimated parameter(s) of the fluid mixture correlated to the first and second phase relative quantities based on the measured parameter and an extrapolating scheme, determining phase flow rate(s) based on the differential pressure, the line pressure and the measured parameter(s) of the fluid mixture, and determining flow rate(s) based on the differential pressure, the line pressure of the fluid mixture and the estimated parameter(s) of the fluid mixture.

A flow rate measurement method and apparatus adapted to hydrocarbon well effluents made up of multiphase fluid mixtures comprising water, oil, and gas is known from U.S. Pat. No. 6,405,604. The effluent is passed through a Venturi tube in which the effluent is subjected to a pressure drop, a mean value of the pressure drop is determined over a period of time. A mean value for the density and fractions of the fluid mixture at the constriction of the Venturi tube over said period is determined by means of a gamma ray producing source and an associated detector. A total mass flow rate value is deduced for the period under consideration from the measured mean values of pressure drop and of density. Subsequently, water, oil, and gas flow rates can be calculated from the measured fractions. The apparatus comprises a Venturi tube measuring device and a gamma ray measuring device.
Typically, the gamma ray measuring device is more costly than the Venturi tube measuring device. Further, the implementation of the gamma ray measuring device necessitates some constraints because of the use of a radioisotope. In addition, in case the gamma ray measuring device is removed from the flow rate measurement apparatus, it is not possible to determine water, oil, and gas flow rates anymore.

Method and apparatus for measuring the flow rates of the individual phases of a multiphase fluid mixture


The present invention relates generally to conducting polymer composites for use in electrochemical applications and electrolysis applications, and methods of making the same. A composite material is provided that includes a conducting polymer; and a silsesquioxane compound. The composite material is used to prepare ion conducting membranes and membrane electrode assemblies (MEA).

A fuel cell is an electrochemical conversion device that directly converts chemical energy into electric energy. This conversion is accomplished by supplying a fuel and an oxidizing agent to two electrodes that are electrically connected and electrochemically inducing oxidation of the fuel. A fuel cell may be configured by stacking a plurality of unit cells containing, as a basic structure, a membrane-electrode assembly (MEA) in which an electrolyte membrane is sandwiched between a pair of electrodes. Among such fuel cells, a proton exchange membrane fuel cell (PEMFC), which uses a solid polymer electrolyte membrane as the electrolyte membrane, is a particularly attractive power source.
A proton exchange membrane fuel cell (PEMFC) transforms the chemical energy liberated during the electrochemical reaction of hydrogen and oxygen to electrical energy, as opposed to the direct combustion of hydrogen and oxygen gases to produce thermal energy. A stream of hydrogen is delivered to the anode side of the membrane electrode assembly (MEA) and is catalytically split into protons and electrons. This oxidation half-cell reaction is represented in Equation 1:H2→2H++2e− E°=0VSHE   (Equation 1)
The newly formed protons permeate through the polymer electrolyte membrane to the cathode side. The electrons travel along an external load circuit to the cathode side of the MEA, thus creating the current output of the fuel cell.
Meanwhile, a stream of oxygen is delivered to the cathode side of the MEA. At the cathode side oxygen molecules react with the protons permeating through the polymer electrolyte membrane and the electrons arriving through the external circuit to form water molecules. This reduction half-cell reaction is represented in Equation 2:O2+4 H++4e−→2 H2O E°=1.229VSHE   (Equation 2)
The proton conducting polymer membrane, which primarily comprises a proton conducting polymer, is a central component of PEMFCs. The proton conducting polymer, which is a species of an ionomer, is sandwiched between anode and cathode. The primary function of these membranes is to carry protons from the anode to the cathode.
Sulfonated tetrafluoroethylene based fluoropolymer-copolymers, such as Nafion®, sulfonated poly(ether ether ketone) such as SPEEK, sulfonated polyimides and others proton conducting polymers are generally used in PEMFCs and DMFCs. Nafion® is generally considered the ionomer of choice in the catalyst matrix to transport protons to and from bulk electrolyte to the catalyst matrix. Proton exchange membrane polymers, especially Nafion®, perform best in the temperature range of about 65° C. to about 80° C. in fuel cells. At higher temperatures, these polymers display function deterioration due to poor proton conductivity, dehydration, and lack of thermal and mechanical stability. Anion exchange membranes (AEM), such as quaternary ammonium cation functionalized polymers, can display similar function deterioration and encounter stability issues with increasing temperature.
On the other hand, platinum, which is the universally-accepted electro-catalyst for both anodes and cathodes, is very expensive and performs better at higher temperatures, especially for oxygen reduction. Other electro-catalysts, such as non-platinum metals or very low platinum-content metal alloys, which may be more cost effective than pure platinum, tend to perform adequately at temperatures higher than 100° C. These higher temperatures tend to reduce catalyst deactivation by carbon monoxide poisoning. But high performance of precious and non-precious catalysts is difficult to exploit due to limitations inherent to the proton exchange membrane polymers, as discussed above.
Attempts have been made to increase the performance, (e.g., thermal, chemical and mechanical stability) of conducting polymers and ionomers by incorporating oxide fillers, such as silica, in the polymer matrix. However, polymers which incorporate oxide fillers have encountered problems, such as stability over time due to phase separation. Moreover, the preparation of the oxide incorporated fillers is a multi-step time consuming process. Therefore, a need exists for conducting polymers with increased stability and methods of making the same.

Composite membrane for polymer electrolyte membrane fuel cell


A LIF socket (10) for electrically connecting an IC package and a PCB includes an insulative housing (20) having a supporting surface (202) and a mounting surface (204) opposite to the supporting surface. A number of passages (206) extend from the mounting surface. Each passage has a leading section (208). A number of contacts (30) are disposed in corresponding passages, respectively. Each contact has a planar body (302), a pair of arms (304) extending from two lateral sides of the planar body towards the supporting surface, and a soldering pad (306) angled with respect to the planar body. The arm is formed with a curved contacting (3080) section at a distal end thereof.

1. Field of the Invention
The present invention relates to a LIF (low insertion force) socket for electrically connecting an IC (integrated circuit) package and a PCB (printed circuit board).
2. Description of the Prior Art
LIF sockets are widely used in computers, and are generally used for electrically connecting two separate electrical components. Accordingly, data and signal's transmission between the two components is achieved.
A typical LIF socket generally includes an insulative housing and a plurality of contacts disposed in corresponding passages of the housing, respectively. Each contact defines a pair of touching pads for contacting with a corresponding pin of an IC package, and a soldering pad opposite to the touching pad. When the IC package is mounted on the LIF socket and is pressed, each pin contacts the corresponding pair of touching pads of the contact. Accordingly, the IC package is electrically connected to the PCB.
Chinese Utility Model Pat. No. 98252212.6 discloses a conventional LIF socket as shown in FIG. 8. The LIF socket includes an insulative housing and a plurality of contacts 3 disposed in corresponding passages of the housing, respectively. Each contact 3 comprises a base 31, a pair of arms 32 extending from two sides of the base 31, and a soldering pad 34 extending from a bottom end of the base 31. Each arm includes an extending arm 321 extending from the base 31 and a spring arm 322 extending from a top end of the extending arm 321 and bending inwardly. When the pins of the IC package are inserted into corresponding pairs of spring arms, the spring arms are forced to deflect elastically, which enables the pins to contact with the contacting sections for assembling the IC package with the LIF socket.
However, one problem can be encountered when assembling the IC package onto the LIF socket. The problem is that only the spring arms of the contact are elastically deformed and the flexibility of the whole contact is not good enough.
Another problem is that each pin of the IC package can not be easily inserted into or withdrawn from the corresponding pair of spring arms because the contact portions of the contact are curve-configured, which raises high resistance.
In addition, if the pins of the IC package offset from a normal position during assembling, the spring arms of the contact will be broken easily because of the interferential force between the pins and the spring arms.


The present invention relates to an electro-luminescence display and a driving method thereof wherein a thin film transistor is prevented from the deterioration, to thereby improve a picture quality. An electro-luminescence (EL) display, including: a plurality of drive voltage supply lines; N compensation voltage supply lines; EL cells at each crossing of a plurality of data lines and a plurality of gate lines in a matrix, wherein the EL cells emit light in response to currents applied from the drive voltage supply lines; driving thin film transistors (TFT) connected between the EL cells and compensation voltage supply lines that control the current applied to the EL cells; and a bias switch, connected between the N−1th compensation voltage supply line and a control terminal of the driving TFT connected to the Nth compensation voltage supply line that applies a bias voltage to the driving TFT when a scan pulse is supplied to the N−1th gate line.

1. Field of the Invention
This invention relates to an electro-luminescence display (ELD), and more particularly to an electro-luminescence display device and a driving apparatus thereof that prevents the deterioration of a thin film transistor to enhance image quality of the ELD.
2. Description of the Related Art
Recently, various flat panel display devices have been developed that eliminate disadvantages of a cathode ray tube (CRT) by reducing the weight and bulk of the display. Such flat panel display devices include a liquid crystal display (LCD), a field emission display (FED), a plasma display panel (PDP) and an electro-luminescence (EL) display, etc.
The EL display is a self-luminous device capable of emitting light by a re-combination of electrons with holes using a phosphorous material.
The EL display device is generally classified as an inorganic EL device using the phosphorous material in an inorganic compound or an organic EL device using the phosphorous material in an organic compound. EL display devices have many advantages such as a low voltage driving, self-luminescence, a thin profile, a wide viewing angle, a fast response speed, a high contrast, etc.
The organic EL device includes an electron injection layer, an electron carrier layer, a light-emitting layer, a hole carrier layer and a hole injection layer. In the organic EL device, when a predetermined voltage is applied between an anode and a cathode, electrons produced from the cathode are moved, via the electron injection layer and the electron carrier layer, into the light-emitting layer while holes produced from the anode are moved, via the hole injection layer and the hole carrier layer, into the light-emitting layer. Thus, the electrons and the holes fed from the electron carrier layer and the hole carrier layer into the light-emitting layer emit light by the recombination of the electrons and the holes.
Referring to FIG. 1, an active matrix type EL display device using the above-mentioned organic EL device includes an EL panel 20 having pixels 28 arranged at each crossing between gate lines GL and data lines DL, a gate driver 22 driving the gate lines GL of the EL panel 20, a data driver 24 driving the data lines DL of the EL panel 20, and a gamma voltage generator 26 supplying the data driver 24 with a plurality of gamma voltages.
The gate driver 22 applies a scanning pulse to the gate lines GL to sequentially drive the gate lines SL. The data driver 24 converts a digital data signal received from an external signal source into an analog data signal using a gamma voltage from the gamma voltage generator 26. The data driver 24 applies the analog data signal to the data lines DL whenever the scanning pulse is supplied.
Each of the pixels 28 receives a data signal from the data line DL and generates light corresponding to the data signal when a scan pulse is applied to a gate line GL.
As shown in FIG. 2, each pixel 28 includes an EL cell OEL having an anode connected to the voltage source VDD and a cathode connected to a cell driver 30, a gate line GL, a data line DL and a ground voltage source GND to drive the EL cell OEL.
The cell driver 30 includes a switching thin film transistor T1 having a gate terminal connected to the gate line GL, a source terminal connected to the data line DL and a drain terminal connected to a first node N1, a driving thin film transistor T2 having a gate terminal connected to the first node N1, a drain terminal connected to the ground voltage source GND and a source terminal connected to the EL cell OEL, and a storage capacitor Cst connected between the ground voltage source GND and the first node N1.
The switching thin film transistor T1 is turned on when the scan pulse is applied to the gate scan line GL, to thereby apply the data signal, which is supplied from the data line DL, to the first node N1. The data signal supplied to the first node N1 is charged into the storage capacitor Cst and is applied to the gate terminal of the driving thin film transistor T2. The driving thin film transistor T2 controls a current I fed from the voltage source VDD via the EL cell OEL in response to the data signal applied to the gate terminal thereof, to thereby control the amount of light emitted from the EL cell OEL. Furthermore, even though the switching thin film transistor T1 is turned off, the driving thin film transistor T2 maintains an on state because of the data signal charged in the storage capacitor Cst and thus continues to control the current I from the voltage source VDD via the EL cell OEL until a data signal is supplied at the next frame.
The current I flowing to the EL cell OEL may be represented as a formula 1.
                    I        =                              W                          2                            L                                                                    Cox                                            (                                                      Vg                                                                                2                                    -                  Vth                                )                                      2                                              [                  Formula                                                              1                ]
Herein, W represents the width of a driving thin film transistor T2 and L represents the length of the driving thin film transistor T2. Cox represents the capacitor value provided by a dielectric layer which forms one layer. Further, Vg2 represents the voltage value of the data signal applied to the gate terminal of the driving thin film transistor T2 and Vth represents a threshold voltage value of the driving thin film transistor T2.
In the formula 1, parameters W, L, Cox and Vg2 do not vary as the thin film transistor T2 ages.
However, the driving thin film transistor deteriorates due to a continuous supply of a positive voltage to the gate terminal, and its current driving scheme. A threshold voltage of the driving thin film transistor increases over time because the driving thin film transistor deteriorates. As described above, if the threshold voltage of the driving thin film transistor is increased, the amount of current flowing to the EL cell OEL can not be accurately controlled, so that the luminance is decreased and the desired image is not displayed.
The driving thin film transistor T2 is made using hydrogenated amorphous silicon. Hydrogenated amorphous silicon has an advantage in that it is easy to manufacture in a large scale and it is possible to the deposit at low temperatures less than 350° C. Thus, the thin film transistors are typically made using the hydrogenated amorphous silicon.
However, in hydrogenated amorphous silicon there exists a Weak Si—Si bond 32 and a dangling bond as shown in FIG. 3 because of a disordered atom array. Over time, an Si bonded by the Weak Si—Si bond migrates from the atom array as shown in FIG. 3B, and thus the electrons and the holes recombine in the site from which the Si has migrated, or a migration state remains. The change in the atomic structure of the hydrogenated amorphous silicon induces a change of energy level such that the threshold voltage Vth of the driving thin film transistor is increased to the values of Vth′, Vth″, Vth′″ as shown in FIG. 4. Consequently, due to the increased threshold voltage of the driving thin film transistor, it is difficult to accurately represent the brightness of the image as desired in the EL panel 20. Furthermore, a small decrease of the brightness results in an residual image in the EL panel 20, thereby adversely effecting image quality.

Electro-luminescence display device and driving apparatus thereof


A foldable wing with foldable trailing edge flap, that includes a main wing and a foldable trailing edge flap. The main wing includes a wing supporting skeleton and a plurality of skin supporting ribs. The foldable trailing edge flap includes a plurality of crank-shaped flap supporting ribs, a flexible flap skin, a connecting shaft, and a return spring. The plurality of crank-shaped flap supporting ribs are hinged with lower surfaces of corresponding plurality of skin supporting ribs through the connecting shaft to form a foldable trailing edge flap supporting skeleton that relies on the plurality of skin supporting ribs. The return spring makes an upper surface of a long side of each crank-shaped flap supporting rib attach closely to a lower surface of each skin supporting rib. The flexible flap skin is attached to an upper surface of the foldable trailing edge flap supporting skeleton.

In the prior art, Chinese Patent Application Nos. 201620324195.X, 201621063844.1, 201910263631.5, 201921875322.5, and U.S. Pat. No. 10,696,376B2 disclose a foldable wing that has the performance of a fixed-wing wing which is capable of being fully folded and unfolded, and can be widely used in various types of small, light, manned and unmanned aerial vehicles.
The existing foldable wing is mainly composed of a foldable multi-triangular supporting skeleton, a sliding rail, a skin supporting rib, an airbag inflatable skin, a flat foldable extended wing and an aileron thereof and a wing action device, forming a fixed-wing wing capable of being folded and unfolded.
The technical defect of the prior art is that the wing has an adjustable aileron, but there is no adjustable trailing edge flap, which limits the aerodynamic adjustment capability of the wing.

Foldable wing with foldable trail ing edge flap


An improved method of simulating the testing of integrated circuits is provided. A database of desired connections between a tester unit and a DUT for different downbonds is accessed by a multiplexer which sets up the desired connections. The system automatically makes the correct connection for each downbond without manual intervention from the user as was required in traditional simulator systems.

The present invention relates generally to the testing of integrated circuits. More specifically, in one embodiment, the invention provides an improved computer simulation model of an integrated circuit testing system.
With the high level of complexity of modern integrated circuits, it is becoming increasingly difficult to test integrated circuits to ensure that they were manufactured with no defects. Typically, a device under test ("DUT") is tested by applying predetermined test waveform patterns its input pins. A tester generates the waveforms and monitors the DUT's output pins to ensure that the device operates as expected.
Often, the waveform patterns needed to adequately test the DUT are complex. Consequently, long lead times are needed to generate the waveform patterns and determine what results to expect on the output. Waiting for the first device to be manufactured for the waveform patterns and expected results to be tested is inefficient and costly.
To overcome this inefficiency, manufacturers have created software simulation models of the DUT and the tester to verify the accuracy of the waveforms before having physical parts available on which to test them. The waveforms may be applied to the software models, and the engineer can experiment and work the bugs out of the testing package before applying the waveforms to a physical device. This decreases the time it takes to perform the tests after manufacture of the devices, and prevents damage to the physical device by ensuring that the tester does not drive signals inappropriately.
Because of design considerations, a purchaser of an integrated circuit will sometimes prefer a package which has a fewer number of physical pins than are provided in a standard integrated circuit package. However, for ease of manufacturing, creating a different die for each of these customers may not be desirable for the manufacturer. Instead, the manufacturer often uses a common die, but places it in a package with fewer physical pins. Consequently, only a portion of the pads on the die are connected to a package pin. A fully-bonded package is one in which all pads on the die are connected to a package pin. A downbond is one in which only a subset of the pads are connected to a package pin.
In the past, these downbonds created a problem for the computer models used in the simulation of the devices. When a downbond was to be tested, a person running the test had to manually define which pins of the DUT model to connect to which pins of the tester. Therefore, each time a different downbond was tested, different connection had to be determined and waveform patterns had to be adjusted to correspond with the pin configuration of the new downbond. This method introduced the possibility of error, and was very time-consuming.
Accordingly, an improved method for simulating a device under test is desirable.

Tool to reconfigure pin connections between a dut and a tester


A cable network gateway receives a downstream broadband signal via service provider cabling at an interface. An Analog to Digital Converter (ADC) converts the downstream broadband signal to a digital downstream broadband signal. A digital filter attenuates an upper spectrum from the digital downstream broadband signal to produce a filtered digitized downstream broadband signal. An in-home communications transceiver produces a digital in-home communications signal that overlaps the upper spectrum. Summing circuitry sums the filtered digitized downstream broadband signal with the digital in-home communications signal to produce a combined digital signal. A Digital to Analog Converter (DAC) converts the combined digital signal to a combined analog signal and an in-home cable interface transmits the combined analog signal via in-home cabling. The downstream broadband signal may be a Data over Cable System Interface Specification (DOCSIS) 3.0/3.1 signal and the digital in-home communications signal comprises a Multimedia over Coaxial Alliance (MoCA) signal.

Technical Field
This disclosure relates generally to communications and more particularly to cable network communications.
Description of Related Art
Communication systems are well known and include wireless networks, wired networks, satellite networks, and various other types of networks. Wired networks use wiring or fiber to direct communications between communication devices while wireless networks support communications wirelessly. Cable networks are a type of wired network that have been in existence for many years. Cable networks include an interconnected system of coaxial cables, which is referred to as cable plant or service provider cabling. The cable plant services communications between service provider equipment and customer located equipment and provides an excellent signal path between such devices, as compared to other media types. When originally constructed, cable networks serviced only broadcast television signals. As the Internet became popular, the cable networks were then used to provide Internet access. Now, cable networks are used to service broadcast television, Internet access, video-on-demand, streamed music, and other types of communications. The Data over Cable System Interface Specification (DOCSIS) standards govern many communications between service provider equipment and customer located equipment.
With the advent and growth of cable networks, in order to distribute communications within the home, most homes included in-home cabling. Originally, in-home cabling was only used to distribute broadcast television within the home (or other premises). Now, in-home cabling also supports communications between devices located within the home, e.g., data networking, network storage, shared printing devices, video streaming between devices, and other types of intra-home communications. The Multimedia over Coax Alliance (MoCA) has promulgated standards to support intra-home communications that use premises cabling. MoCA standards were promulgated to coexist with DOCSIS standards. Ever increasing demand for high speed internet access, streaming video, and streaming audio will place demands on both the service provider cabling and premises cabling, which will likely result in conflicting communications requirements.

Cable network gateway with digital DOCSIS/MoCA bridge


A method for punctured bit estimation includes receiving a punctured codeword. The method further includes generating a reconstructed codeword using the punctured codeword and at least one punctured bit having a default logic value. The method further includes generating a syndrome vector for the reconstructed codeword. The method further includes determining, using the syndrome vector, a number of unsatisfied parity-checks for the at least one punctured bit. The method further includes determining, for the at least one punctured bit, a bit value using, at least, the number of unsatisfied parity-checks associated with the at least one punctured bit.

In memory systems, increasing the read throughput requires increasing the throughput required of the error correction code (ECC) decoder. To meet increasing throughput requirements, the ECC code matrix has a structure that allows for parallel decoding. This structure, referred to as Quasi-Cycle low-density parity-check (QC-LDPC), gathers the bits of the code into tuples of Z-bits, which may then be decoded in parallel, thereby allowing for an increase in throughput.
A byproduct of the QC-LDPC structure is that the ECC decoder can only support code lengths that are multiples of the Z-bits, and cannot use the remainder of the parity bits. However, the actual amount of parity bits to be stored in the memory is typically dependent on the cost and size (e.g., geometry) of the memory, not on the ECC code structure. In turn, the amount of parity bits to be stored in the memory and the amount of parity bits generated by a QC-LDPC code structure supported by the decoder often do not align. Use of controllers or memory that are designed or manufactured by third parties can also contribute to the misalignment. The result of the misalignment is unused bits in the memory.
The requirements for parallel decoding continue to increase in line with the continuously increasing throughput requirements. At the same time, additional bits added in new memory die designs have significant impact on the cost of the memory dies, implicating that the increased amount of unused bits is becoming worse. As such, ways to minimize the number of unused bits while maintaining sufficient decoding parallelism in order to attain throughput requirements is desirable.

Punctured bit estimation and bit error rate estimation


A rotary-head drum device for use in a video tape recorder or the like includes a fixed drum and a rotatable drum rotatably mounted on the fixed drum. Magnetic heads are mounted on the rotatable drum for sliding contact with a magnetic tape guided around the fixed drum and the rotatable drum. The fixed drum has an air outlet defined as a recess therein near a tape exit point where the magnetic tape leaves the fixed drum and the rotatable drum, for ejecting air against the magnetic tape to keep the magnetic tape in good contact with the magnetic heads near the tape exit point.

1. Field of the Invention
The present invention relates to a rotary-head drum device for guiding a magnetic tape in a video tape recorder or the like.
2. Description of the Prior Art
FIG. 1 of the accompanying drawings shows a conventional rotary-head drum device for use in a video tape recorder or the like.
As shown in FIG. 1, a rotary-head drum device, generally denoted at 1, comprises a lower fixed drum 2 fixedly mounted on a base (not shown) and an upper rotatable drum 3 rotatably mounted on the lower fixed drum 2 for high-speed rotation thereon. Circumferentially spaced magnetic heads 4 are attached to the surface of the rotatable drum 3 which confronts the fixed drum 2, the magnetic heads 4 having tip ends projecting radially outwardly from the circumferential surface of the rotatable drum 3.
A lead step 5 is obliquely formed on the circumferential surface of the fixed drum 2. A magnetic tape T is wound around the circumferential surface of the rotary-head drum device 1 with one edge of the magnetic tape T extending along and held against the lead step 5. The magnetic tape T wound around the rotary-head drum device 1 is transported at predetermined speed.
When the rotatable drum 3 rotates at high speed at the same time the magnetic tape T is transported, the magnetic heads 4 slide against and obliquely scan the recording surface of the magnetic tape T for recording or reproducing signals.
The conventional rotary-head drum device 1 does not allow the magnetic heads 4 to contact the magnetic tape T well at an exit point for the magnetic tape T, i.e., a region where the magnetic tape leaves the circumference of the rotary-head drum device 1.
More specifically, while the rotatable drum 3 is rotating, the magnetic heads 4 scan the magnetic tape T while at the same time lifting the magnetic tape T. As shown in FIG. 2, an upper edge of the magnetic tape T is lifted slightly off the circumference of the rotatable drum 3 at the exit point by the magnetic heads 4. At the exit point, therefore, only an edge of the tip end of each of the magnetic heads 4 is held in contact with the recording surface of the magnetic tape T. Particularly, a magnetic tape in the form of a thin-film medium (so-called an ME-type magnetic tape) is not held in good contact with the tip end of the magnetic heads 4 because the magnetic tape is relatively rigid and less flexible, and hence suffers dropouts of recorded and reproduced signals.
Solutions would be to reduce the projection of the magnetic heads 4 from the circumferential surface of the rotatable drum 3 and to adjust or modify the path along which the magnetic tape T travels around the rotary-head drum 1. However, if the projection of the magnetic heads 4 becomes smaller, more dropouts are produced. If the tape path is adjusted or modified, the compatibility ratio is lowered.

Rotary-head drum device for guiding a tape therearound