An implantable medical device and method of making the same. The device includes an electronic component sub-assembly with an exterior surface. A plurality of electronic components are disposed spaced apart and internal to the external surface. The components define voids between one another. The voids are filled with an electrically insulative material which is substantially rigid. An ultra-thin hermetic shell is then formed over the exterior surface of the implantable medical device.

Pulse generators such as pacemakers or defibrillators implanted in the body for electrical cardioversion or pacing of the heart are well known. More specifically, devices implanted in or about the heart have been used to reverse (i.e., defibrillate or cardiovert) certain life-threatening arrhythmias, or to stimulate contraction (pacing) of the heart, where electrical energy is applied to the heart via electrodes to return the heart to normal rhythm. Devices have also been used to sense near the sinal node in the atrium of the heart and to deliver pacing pulses to the atrium. An electrode in the atrium positioned near the sinus node of the heart senses the electrical signals that trigger the heartbeat. The electrode detects abnormally slow (bradycardia) or abnormally fast (tachycardia) heartbeats. In response to the sensed bradycardia or tachycardia condition, a pulse generator or pacemaker produces corrective pulses or signals and delivers them to alleviate the condition.
The sick sinus syndrome and symptomatic AV block constitute the major reasons for insertion of cardiac pacemakers today. Cardiac pacing may be performed by the transvenous method or by electrodes implanted directly onto the ventricular epicardium. Transvenous pacing may be temporary or permanent. In temporary transvenous pacing, an electrode lead is introduced into a peripheral vein and fluoroscopically positioned against the endocardium of the right atrium or right ventricle. The proximal electrodes are connected to an external cardiac pacemaker which has an adjustable rate and milliamperage control. Temporary transvenous pacing is utilized (1) prior to the insertion of a permanent pacing system and (2) in situations in which the indication for pacing is judged to be reversible (drug-induced AV block or bradycardia) or possibly irreversible and progressive (AV and bundle branch blocks associated with myocardial infarction). Permanent transvenous pacing is performed under sterile surgical conditions. An electrode lead is generally positioned in the right ventricle or in the right atrium through a subclavian vein, and the proximal electrode terminals are attached to a pacemaker or defibrillator which is implanted subcutaneously. Another sense electrode may be positioned within the atrium of the heart near the sinus node.
The implanted pulse generator typically has a number of electronic components held within a sturdy case which both provides a hermetic and a protective enclosure for the electronics. The typical casing is constructed of titanium or stainless steel and has a wall thickness which is substantial enough to be relatively rigid providing structural integrity for the electronics as well. One type of case is a clamshell construction having two shallow concave case halves which define a perimeter parting line when mated together. The parting line is laser welded to close and seal the clamshell case. Another type of case is a deep drawn pocket type enclosure having an open end. The end is covered by a plate or end cap and again laser welded to the pocket enclosure.
Because the case must provide both hermeticity and structural integrity for the device, a typical case accounts for about 5-10% of the volume of the device. Because the material is typically metallic and has a substantial wall thickness, the case also typically accounts for about 15-25% of the weight of the implant device. As today's electronics become smaller, these percentages have increased and will continue to do so accordingly.
Size and weight are two important concerns for implantable devices. It is desirable to reduce the weight and the size or volume of such devices wherever possible. The need for the case to provide structural integrity to the implantable device is what drives the minimum wall thickness of the case material. Therefore, if this requirement were eliminated, the size and weight of the case, and hence the implantable device, could be significantly reduced.
There is a real need for an implantable medical device such as a pacemaker or defibrillator having an ultra-thin hermetic case. A device equipped with such a thin enclosure would be of reduced size or volume. In addition, a device having an ultra-thin hermetic enclosure would be lighter in weight than a conventional implantable medical device.

Ultra-thin hermetic enclosure for implantable medical devices


The present invention relates to a method for printing wood-based boards, in particular, wood-fiber boards, by means of a digital printing process. The method includes the steps of: a) measuring the color value of the wood-based board of at least one first batch and transmitting the color values to a computer program; b) measuring of the color values of the wood-based board of at least one further batch and transmitting the color values to the computer program; c) processing the color values of the wood-based board of the at least one further batch in the computer program and adapting the color value of the digital print; and d) printing at least one side of the wood-based board by means of digital printing technique by forming a décor layer such that no color deviations between the printed decors of the wood-based boards of the at least one first batch and each further batch occur.

1. Field of the Invention
The present invention relates to a method for adapting décor prints and a device for conducting said method.
2. Description of Related Art
Substrate materials, as for instance wood-based boards, provided with a décor are typically used as floor covering or for cladding walls and ceilings. In the past, the wood-based boards used a substrate materials were often coated with a décor paper for this purpose, wherein the multiplicity of different patterned décor papers was or is not limited.
As an alternative to the use of décor papers on wood-based boards in the past the direct printing of wood-based boards as substrate materials has been developed since the printing of paper and the subsequent lamination or direct coating thereof onto the wood-based board is dispensed with.
The printing techniques primarily used in this case are the gravure printing method and the digital printing method. The gravure printing method is a printing technique in which the elements to be depicted are present as depressions in a printing form, which is inked before the printing. The printing ink is primarily located in the depressions and is transferred to the object to be printed such as, for instance, as substrate material on the basis of contact pressure of a printing form and of adhesive forces. In case of digital printing on the other hand, the printing image is transferred directly from a computer into a printing machine such as, for instance, a laser printer or inkjet printer. The user of a static printing form is dispensed with.
In the context of the technical development of the printing technology of different substrate materials it is, however, more and more focused on digital printing. While digital printing methods were used at first especially in the graphic industry as for instance advertisement agencies, advertising media or in shops, it appears in the meantime that digital printing methods are also met more frequently in other sectors of industry. There are, indeed, multiple reasons, wherein, however, two main arguments can be identified. The digital printing allows the production of a printing image with in a particular high quality due to a higher resolution and allows further a broader application spectrum with high flexibility.
Digital printing is conducted today most exclusively using the color system CYMK. The CYMK color model is a subtractive color model, wherein the abbreviation CYMK stands for the three color ingredients cyan, magenta, yellow and the black portion Key as color depth. Using this color system, a color space (Gamut) can be imaged which suffices the many requirements from different areas.
Furthermore, products shall become cheaper by mass production on one hand, and on the other hand the customer expects a larger variety, which is reflected for instance in an almost endless décor variety. A tremendous problem is thereby a prediction, which a manufacturer, for instance, of decorative surfaces for consumer goods, such as laminate floors has to make regarding the questions, which decors are accepted by the customer and which not.
When redesigning a collection, a manufacturer of decorative boards has to buy a minimum quantity of printed décor paper or printed finish films. The minimum quantity of paper is typically in the range of about 1 ton, what corresponds to about 15,000 m2. This décor paper has then to be impregnated, to be pressed on substrate boards and to be further processed. In case that exactly this décor is not successful at the market, residual quantities are created on all levels of value creation, which cannot be used anymore. The economic damage arising therefrom is considerably. Furthermore, the coloring of the décor was at least determined for the one ton of paper.
A possibility to solve this problem would be the production of all decors exclusively by means of digital printing. This has, however, the serious disadvantage that these decors are considerably more expensive in respect to the printing costs. Furthermore, the higher quality level of the decors due to the higher resolution of the digital printing could devaluate other non-digital printed decors and could thus cause sales loss of conventionally printed substrate materials.
A further increasing trend exists in lot-sizes which become constantly smaller. The digital printing technology can take this trend in general into account. Due to the high flexibility of the digital print, it is not only possible to print paper or firm sheets, but also directly substrate boards as, for instance, wood-fiber boards. Hereby some levels of value creation can be skipped in this way of further refining to semi-finished or final products, as, for instance, furniture boards, laminate floors or cladding boards, what provides a further flexibilization and simplification of the production processes.
In particular in the wood-based industry until now almost exclusively decorative surfaces have been generated using the indirect gravure printing on décor papers and had thereby to fight with increasing problems of batch sizes.
Digital printing offers a solution here. It is at the moment propagated almost exclusively, as is the indirect gravure printing, on décor paper or on pre-impregnates, as for instance, pre-resined papers. Thereby, inks on water basis are mostly used, which after printing and subsequent drying still have a certain water solubility. Since in the subsequent production of the decorative surfaces at least in case of décor papers an impregnation with water-soluble resins has to be carried out, followed by pressing in a short-cycle press, the high resolution is partially deteriorated or destroyed by dissolving the colors.
The direct printing on a substrate board, preferably a wood-based board, pre-primed if necessary, by means of digital printing would be thus a desirable solution.
When realizing the solution, however, multiple obstacles have to be overcome.
The décor papers used for indirect gravure printing have a good opacity due to their relative high pigment load. In this way the intrinsic color of the substrate shall be eliminated as far as possible. In an alternative, a primer can be applied directly onto a substrate board. When a primer is applied directly onto a substrate board, preferably a wood-based board, the primer on the substrate board should not be done too thick since otherwise the protective layers, preferably synthetic resins, applied later on, cannot penetrate the primer and thus delamination or bubbles can occur after a pressing in the short-cycle press.
On the other hand, the primer can also not be done too thin. Then, the danger exists that the substrate is not completely covered, what has a negative influence on the overall color of the décor.
A further problem is that singular batches of substrate materials can be subjected to fluctuations in the composition, what can cause differences in brightness and/or the color of the substrate board. Visible differences, in particular color deviations, between the singular product-batches can occur after printing the décor.

Method for adapting décor prints and a device for conducting said method


A computer-implemented method for prioritizing an incoming communication directed to a recipient by an originator includes creating a privacy/trust relationship between a recipient and an originator in response to user input, and determining a disposition of an incoming communication by reference to the privacy/trust relationship.

The present invention relates generally to the field of communications and more particularly to prioritizing communications based on a relationship between a recipient's privacy status and an originator's trust level, the prioritization delegated to the trusted originator.
The proliferation of communications devices and the overlap of work and personal life makes it difficult to prioritize incoming communications. Often, the volume of incoming communications can overwhelm the recipient, making it difficult and time consuming for them to distinguish between trivial or unimportant messages and important ones. With regard to incoming telephone communications, the recipient may be inundated with phone calls, some important and others not. Similar difficulties can arise with respect to email messages, SMS messages and others types of person-to-person communications wherein the recipient may be inundated with incoming communications with no way to screen out unimportant messages while allowing others to come through.

This patent is subject to a terminal disclaimer.

System for delegating the prioritization of incoming communications to trusted users

International Business Machines Corporation


A semiconductor memory has a first internal circuit operated by an external source, a second internal circuit operated by an internal source which outputs an internal voltage lower than that of the external source and a voltage-down-converter supplying the internal source to the second internal circuit. The voltage-down-convertor includes a reference-voltage-source circuit and voltage-down-circuit. The reference-voltage-source circuit is made up of a standard-voltage-generation-circuit generating a standard voltage equal to a standard internal source voltage, a gate circuit outputting the standard voltage as the reference voltage when a control signal from outside is of a first logic level, a dividing circuit outputting voltages which are lower or higher than the standard internal source voltage and a selection circuit which selects one of the output voltages of the dividing circuit when the control signal is of a second logic level.

1. Field of the Invention
The present invention relates to a semiconductor memory which lowers a DC source voltage supplied from outside to a value equal to a reference voltage and supplies the thus lowered power source to a selected internal circuit.
2. Description of the Related Art
The capacity of semiconductor memories now doubles every three years, papers on 16 megabit DRAMs have already been read at academic societies and samples of such DRAMs are expected on the market in the near future. Although the research and production of miniaturized elements has been developed to achieve such memory capacity, the source voltage to be supplied to the memory remains unchanged at 5 volts.
The reliability of semiconductor memories sometimes becomes deteriorated, if the source voltage is supplied unchanged, even if there is a decreased characteristic of the memory such as lower voltage proofness at some portion thereof due to the increased miniaturization of the elements. Further, there is possibility of accelerated deterioration of reliability of the elements which may be caused by a temperature rise resulting from increased power consumption of the elements. As a means to solve this problem, there has recently been a movement in the industry to provide an internal voltage-down-converter to decrease an operating voltage of the internal circuit while receiving the external source voltage unchanged as is.
By decreasing the operating voltage of the internal circuit, the electric field applied to the internal circuit is weakened. Concurrently, the temperature rise of the circuit can be controlled due to a drop in power consumption, so that decreasing the operating voltage is an effective means to improve the reliability of the circuit. However, since the operating speed of the circuit decreases as the operating voltage decreases, the above method has a drawback when applied to a semiconductor memory which requires both high capacity and high operating speed of the element.
For the purpose of retaining the advantages resulting from a lower operating voltage while retaining the moderate operating speed of the overall semiconductor element, a selected portion of the internal circuit is arranged to operate with a lower voltage. Based on the above, optimum conditions have been obtained to achieve both sufficient reliability and high speed performance of the semiconductor memory.
As an example of methods applied to semiconductor memories, there is the method that a memory cell portion of the semiconductor memory is operated by a lowered voltage to protect against possible deterioration of the reliability of the portion which may be caused by thin films applied thereto to increase capacity, and other circuits of the memory are operated by the external source voltage.
FIG. 1 is a diagram showing the operation characteristic of an example of a voltage-down-converter (not shown) devised so as to be incorporated in this type of semiconductor memory, wherein the lateral axis represents an external source voltage and the vertical axis an internal source voltage. The operation of the voltage-down-converter will be described with reference to FIG. 1. The internal source voltage which is equal to the output voltage of the voltage-down-converter keeps a predetermined voltage (a standard internal voltage) 3.3 V during a normal operation. Therefore, the internal source voltage increases as the external source voltage increases until the external source voltage reaches 3.3 V. When the external source voltage exceeds 3.3 V and increases to 6 V, the internal source voltage holds a predetermined value of 3.3 V. When the external source voltage increases over 6 V, the internal source voltage also increases in accordance with the increase of the external source voltage.
In the above voltage-down-converter, an increase of the external source voltage over 6 V results in an increase of the internal source voltage over the predetermined value to effectively perform a burn-in test in screening for removing initial defects. A burn-in test is a method for removing initial defects in a reduced time by detecting defects generated at an accelerated rate by operating the memory under a high temperature environment and by applying a higher voltage thereto. However, with the structure of the memory wherein the selected portion of the internal circuit is operated by the above voltage-down-converter, since the internal source voltage obtained through a voltage drop is applied to the portion, a voltage corresponding to a higher voltage supplied from outside by the burning test is not applied to the internal circuit, thereby resulting in failure to accelerate the detection of defects. Therefore, the memory of the present invention is arranged to have the characteristic of increasing the internal source voltage only at the time of the burn-in test when a high external source voltage is applied.
Conventional semiconductor memories incorporating a voltage-down-converter with the above characteristic have the drawback that memories with a small margin against source voltage variation are sometimes shipped without being detected by the source-voltage-margin-test which is performed by varying the external source voltage (usually 4.0 to 6.0 V) before shipment. The reason is described below.
Generally, since it is necessary to guarantee at the time of shipment of semiconductor devices including memories, that the product satisfies the characteristics listed in specifications, various tests are performed before shipment. The most important parameter which influences all of the characteristics in the above tests is the source voltage. In the case that the rated source voltage of the product is 5 V (D C), the product is normally guaranteed against various characteristics under the applied external source voltage in the range of 5.0 V+-10%. Consequently, all of the characteristics of the product are required to be satisfied for the source voltage in the range of 4.5 to 5.0 V, but the actual test is performed with a safety margin for the source voltage in the range of 4.0 to 6.0 V. However, in a semiconductor memory incorporating the above voltage-down-converter, a constant voltage lowered by the voltage-down-converter is supplied to the internal circuit even if the external source voltage is varied in the range of 4.0 to 6.0 V, so that no source margin test of the internal circuit can actually be performed. This gives the user the false impression that the product has an extraordinarily sufficient stable margin against variation of the source capacity to the great advantage of the overall characteristics of the product. However, this results in the following problem for the maker which ships the product.
In other words, even if supplied by the voltage-down-converter, voltages to be supplied to the internal circuit often vary according to variations in the external source voltage or the influence of noises. In particular, variations due to noise are unpredictable. It is difficult to test in advance. Therefore, with the conventional test method, there is the possibility of shipping products whose internal circuits have only a small margin for operation voltage, which may cause defective operation when the internal source voltage varies due to the influence of noise in actual operation.
In order to prevent this problem, even if the semiconductor memory is so structured as to supply a constant low voltage to a portion of the internal circuit of the memory from the voltage-down-converter, it is further necessary to provide the portion of the internal circuit with a sufficient operational margin against variations in the source voltage. In other words, power source voltages higher or lower than the predetermined voltages should be applied to the internal circuit which is designed to receive the predetermined voltage, and testing performed to remove products with small operational margins during pre-shipment testing as defective.
To meet the above purpose, the operational margin of the internal circuits of conventional semiconductor memories can be tested against source voltage variations, if the rising characteristic of the lower voltage and higher voltage sides of the voltage-down-converter characteristic shown in FIG. 1 are utilized.
However, in order to perform a performance test with this method, it is necessary to increase or decrease the external source voltage more than is normally required. For example, if the characteristic of the voltage-down-converter is as shown in FIG. 1, then the external source voltage must be changed in the range of 3.0 to 6.3 V to perform a test in the range of 3.0 to 3.6 V against the voltage of 3.3 V of the voltage-down-converter.
Although this test condition offers no problem for circuits which are supplied with a source voltage from the voltage-down-converter, the voltage is too high for other circuits operated by the external source voltage, so that it cannot be said to be an appropriate test condition.


A wire for use in medical applications. The wire is formed by forming a bundle from a plurality of drawn filled tubing strands and positioning the bundle within an outer tubing. The tubing and strands are then drawn down to a predetermined diameter to form a wire for use in the medical devices. The wire may be covered with an insulating material.

1. Field of the Invention
The present invention relates to a drawn strand filled tubing wire for use in medical applications and in particular to such wire where there is a need to apply an electrical voltage to human tissue.
2. Description of the Related Art
Implantable devices used in the medical field for applying electrical voltage are customarily meant to stay implanted for several years. Such devices are used as pacing leads, for example. These medical devices must possess several characteristics including electrical conductivity, corrosion resistance, and biocompatibility. The medical devices generally need to be flexible for snaking through arteries, for example.
Drawn filled tubing wire is a type of wire that has been used extensively in medical devices. This wire includes an outer shell that is filled with an electrically conductive material. While the materials used for the outer shell are strong, they tend to be susceptible to corrosion when contacted by body tissues and fluids. Therefore, drawn filled tubing wire for medical use is customarily coated with an insulating material such as silicone to prevent contact with human body tissue. Pacing leads for applying an electric potential to the heart usually comprise two or three drawn filled tubing wires. Such leads are described in U.S. Pat. Nos. 5,716,391, 5,755,760, 5,796,044, and 5,871,531. A portion of the wires in such leads is generally encased within a biocompatible material such as platinum, tantalum filled platinum, tantalum filled platinum-iridium, or the like to allow an electrical voltage to be applied from the wire to the desired tissue area. A problem with such biocompatible materials is that they have insufficient strength and have limited electrical conductivity, and therefore must be combined with the wire.
Referring to FIGS. 1A and 1B, a prior art pacing lead is shown for use in medical applications. Implantable cardio defibrillator (ICD) 20 is used for sensing electrical activity in the heart and for delivering a shock if heart activity slows or stops. ICD 20 is implantable and has flexible, elongated conductive lead 26 (FIG. 1B) with electrical connector 22 extending from one end thereof to plug into control 24 for controlling ICD 20 and for providing the electrical supply. Control 24 is implanted just beneath the skin, often in the chest or abdomen.
Lead 26 is constructed from two or three electrically conductive wires 27 such as wires having an alloy exterior tube filled with highly conductive silver, for example. Each wire 27 is substantially covered with insulating material 29. Lead 26 is then substantially covered with insulating material 28. At two locations along lead 26, coils 30 are located which are made from a biocompatible material such as platinum, tantalum filled platinum, tantalum filled platinum-iridium, or the like. Coils 30 are secured to individual wires 27 of lead 26 by any suitable process including laser welding. The portion of wire 27 in contact with coil 30 has insulating material 29 removed to allow for the welding process. These coils 30 form the contacts which engage the heart tissue at specific locations to deliver an electrical voltage, when control 24 senses the need to deliver such voltage.
The interface between insulating material 28 and coils 30 must be hermetically sealed to prevent fluids from contacting wires 27 of lead 26 and causing corrosion and possible eventual failure of the ICD. Problems exist in that the achieving a hermetic seal of a polymeric material and a metal is difficult and costly. The bond may be susceptible to corrosion and bodily fluid leaking into the area between coil 30 or insulating materials 28, and wires 27 of lead 26. In addition, the materials used to form coils 30 are very flexible and may be easily damaged simply from handling the coils. The welding process between wires 27 of lead 26 and coils 30 is a further step in the manufacturing process which increases the cost of production of ICD 20.
In the medical device industry, leads are used to transmit an electrical voltage from an electrical supply source to an area in a human body. The lead interfaces with tissues in the body so that an electrical signal may be introduced to a particular area of the body. Such leads may be implanted in a patient at any location in the body where the electrophysiology needs to be monitored and/or artificially altered. Specific applications may be implantable defibrillators or pacing leads. The leads may also be used for pain relief or pain suppression in the back or spine relating to diseases such as Parkinson's disease. The lead may be further implanted in the stomach to subside hunger pains. For patients with neurological damage, the leads might be used to replace the nerve and act to transmit electrical signals from one place to another in the body. These devices are most certainly used in humans however, they are not limited to humans and may be adapted for use in animals.
The devices are designed for long term implantation and must have several properties including resistivity, corrosion resistance, radiopacity, reliability, stiffness, fatigue life, weldability, MRI compatibility, and biocompatibility. Other characteristics of the device include a predetermined ultimate tensile strength, Young's modulus, level of inclusions, fracture toughness, and percent elongation. In addition, the types of materials used, the construction, and the cost of manufacturing the device are all factors.
It is therefore an object of the present invention to provide a pacing lead with improved wires which eliminate the need for conductive coils.
It is therefore a further object of the present invention to reduce the risk of corrosion of the pacing lead.
It is therefore another object of the present invention to improve conductivity and flexibility of the pacing lead.

Fort Wayne Metals Research Products Corp.


A tool-changing device includes a tool gripper and a stroke and pivoting actuator for operating the tool gripper. The stroke and pivoting actuator can be driven by a first direct drive for producing a linear movement and by a second direct drive for producing a rotational movement, wherein the first and the second direct drives have a common rotor which serves as the stroke and pivoting actuator.

The present invention relates, in general, to a tool-changing device.
Nothing in the following discussion of the state of the art is to be construed as an admission of prior art.
Tool-changing devices, also designated as tool changers, are provided for changing tools on machining centers, machine tools and production machines. A tool-changing device is a mechanical device for automatically changing tools or process-related aids, such as measuring probes, grippers or plug gages, the tools being introduced as replacements into a machining spindle or the like from a tool magazine, and vice versa. The changing operation is effected, for example, with single or double grippers, the tool-changing time having a direct effect on the machining time of the machining center.
Tools are changed essentially via a combination of a stroke movement and a pivoting movement. In order to keep the non-productive times short, in particular the tool-changing times, dynamic and rigid positioning drives having low inertia masses are required for tool changers.
Tool changers can be driven via separate motors (electric, pneumatic, hydraulic) or via a link by means of a cam plate. With conventional technology, however, the high dynamics required are associated with high wear and thus low availability.
It would therefore be desirable and advantageous to provide an improved tool-changing device to obviate prior art shortcomings and to enable a quick and dynamic tool change.

Tool-changing device having a directly driven stroke and pivoting actuator


A can cutting device that has a main body and a can support assembly coupled to the main body. The can support assembly has a shaft that extends along a longitudinal shaft axis, an eccentrically mounted mandrel that extends along a longitudinal mandrel axis parallel to the longitudinal shaft axis, and a cutter coupled to the main body having a cutting surface. The can is positionable in a mounted position such that the can is rotatable about a can axis of rotation, the cutting surface is positional to contact the portion of the can body supported by the mandrel at the cutting location, and when the cutting surface is in contact with the portion of the can body supported by the mandrel at the cutting location and the can is rotated about the can axis of rotation, the cutter cuts the portion of the can body at the cutting location.

The following is not an admission that anything discussed below is part of the prior art or part of the common general knowledge of a person skilled in the art.
Various applications require containers to be cut to precise sizes. For instance, cylindrical containers such as cans may need to be cut to specific sizes to permit or facilitate various manufacturing or testing processes. Various different types of devices may be used to cut cans, depending on the specific application required. For example, a typical can opener may remove the top portion of a can using a serrated cutter to rotate around the top of the can until the surface has been cut through.
Conventional cans (e.g. aluminum cans that may be used as beverage containers) often have thin walls. These cans are often difficult to cut due to the thin walls and cylindrical shape. Traditional can openers are often designed to apply a significant amount of force to the top surface of a can which may result in buckling of the can walls.


Duel sensor detector tube systems are installed along the path length of a pipeline, storage tanks, or other fuel system to be monitored for leaks. One sensor detector tube system is constantly evacuated and passed through a sensor detector to test for presence of vapors or gaseous indications of large leaks. Concurrently, the other sensor detector tube system is permitted to lie dormant for a predetermined period to absorb and receive diffusion of vapors or gases from medium to small leaks that are too small to be detected by the continuous air flow system of the first tube. Periodically the flow of the two sensor detector tube systems is interchanged to evacuate the dormant tube, and it then becomes the continually aspirated system. Signal output from the sensor detectors provide data to the control alarm system which compares concentration profiles of current on-going tests with recorded profiles of prior tests, and any significant deviation is recognized as a problem, sounding an alarm. The system provides direct data for location of small leaks, with significant indications for location of large leaks.

CONTINUOUSLY MONITORING oil, gas and chemical pipe lines and tanks for small and large leaks has been a problem for a long time. In some areas, authorities require strict surveillance for small leaks, less than one gallon per day, as well as rapid detection and reporting of large leaks to protect the environment.
None of the usual methods, including comparison of flow or pressure differences, periodic pressure testing, and pig techniques have offered satisfactory detection sensitivity or leak location. This invention was conceived and developed to meet this need.
Other systems for testing for leaks have relied on indirect, inferential detection. That is, a condition caused by the leak, such as pressure loss or volume imbalance, was first detected and used as an indication of a leak. Later systems developed for direct sampling for presence of vapors or gases from leaks have used continuous aspiration of air samples for detection of large leaks, but involve too much dilution of the sample to be able to detect medium to small leaks. Later systems developed for testing of columns of dormant air samples for presence of diffused vapors or gaseous indications of leaks have been effective for detecting and locating small leaks, but depend on cycle testing involving prolonged periods of dormancy for adequate time for diffusion, and thus do not provide the quick, early emergency response required for large leaks.
The present invention is a dual, periodic air-sampling system for small leaks, combined with constant displacement or aspiration of continual flow of a column of air, developed because conventional leak-detection systems did not offer satisfactory sensitivity and rapid response for leak location.
This invention is able to provide direct leak detection instead of inferential, and it provides both cycle, periodic testing for diffusion from small leaks, combined with continuing, rapid sampling for large leak. That is, the leaking liquid or gas itself is detected, not a condition caused by the leak, such as pressure loss or volume imbalance. This system is not affected by operational transients and ambient conditions existing in the soil.
Before development of this invention, the original diffusion detection system was built to detect extremely small leaks of 0.4 1./day on a liquid pipeline, over a long period of time. To do this it evacuated, displaced or pulled the air out of the sensor tubing just once every day. This allowed the leaking fluid's vapor to form quite a large concentration slug in the sensor tube, large enough for the detector to sense an extremely small leak. This original system provided for leak detection alarming once every 24 hours, but most environmental authorities today require a continuous monitoring and alarming leak-detection system which would alarm on any dangerous leak within 30 minutes, not 24 hours. For early response, such a system requires the set up of a detector-pump unit to evacuate the sensor tube continuously. Such continuous evacuation sensing is needed to provide the emergency response mode. But the emergency response mode would not detect small leaks which require long periods of diffusion for detection.
For an improved system to meet the latest environmental requirements for combined reliable detection for small leaks concurrently with emergency response for large leaks, the following was required:
Continuous leak-detection monitoring and alarming. PA1 Response to any leak within 30 minutes. PA1 All installations less than 18 inches above grade. PA1 Length of monitored right-of-way more than 10 miles. PA1 Accessibility. PA1 Not an obstacle or an eyesore.
Such a system would need to operate in two different modes: The low-level leak detection mode similar to the original patented leak alarm system for pollutants, and the emergency-response mode for high-level rapid detection of large leaks.

Process and apparatus for distributed wide range leak detection, location and alarm for pollutants


A voltage dropping circuit is formed within an integrated circuit having at least one internal circuit, for dropping an external power supply voltage to generate a dropped voltage, and supplying the dropped voltage to the at least one internal circuit. A voltage divider divides the dropped voltage. A comparator compares the divided voltage with a reference voltage, and generates a control voltage according to a result of the comparison. A voltage generator generates the dropped voltage in response to the control voltage. A setting block sets a ratio of the divided voltage to the dropped voltage.

1. Field of the Invention
This invention relates to a voltage dropping circuit which is suitable for supplying electric power to an internal circuit formed by a submicron fabrication technique, and an integrated circuit using the voltage dropping circuit.
2. Prior Art
With the recent increase in density and operating speed of the integrated circuit, a so-called submicron fabrication technique has come to be more widely employed. According to the submicron fabrication technique, even more minuscule patterns are formed on a wafer than ones formed by conventional LSI fabrication techniques, so that the maximum permitted voltage of an oxide (SiO.sub.2) layer decreases. This limits the power supply voltage of an LSI fabricated by the submicron fabrication technique normally to a voltage of 3.3 volts. On the other hand, many LSI products employ a power supply voltage of 5 volts. To cope with this discrepancy, an LSI has been proposed, which is comprised of an I/O portion where an oxide layer with an increased thickness is used, and an internal circuit where an oxide layer with a reduced thickness employed by the submicron fabrication technique is used.
In the proposed LSI, the I/O portion operates on a power supply voltage of 5 volts, while the internal circuit on a power supply voltage of 3.3 volts, which means that two power supply systems are required. As a solution to this problem, the proposed LSI employs a voltage dropping circuit arranged therein, which drops a power supply voltage of 5 volts from an external power supply to a voltage suitable for the submicron internal circuit.
Now, the conventional voltage dropping circuit will be described with reference to FIG. 1. As shown in the figure, an operational amplifier 1 has an output terminal thereof connected to the gate of an FET (field effect transistor) 2 formed by a PMOS (p-channel MOS) transistor. The FET 2 has a source thereof supplied with a power supply voltage of 5 volts, and a drain thereof connected to an internal circuit 3. This circuit configuration enables the FET 2 to function as a driver for supplying electric power to the internal circuit 3, in which the drain voltage VDL of the FET 2 is used as the power supply voltage of the internal circuit 3.
Further, the drain voltage VDL of the FET 2 is divided by a voltage divider formed by a resistance 1 and a resistance 2, and the divided voltage is fed back to a positive input terminal of the operational amplifier 1. On the other hand, the operational amplifier 1 has a negative input terminal thereof supplied with a reference voltage Vref. Therefore, when the voltage applied to the positive input terminal exceeds the reference voltage Vref, the output voltage of the operational amplifier 1 rises to turn the FET 2 off, which decreases the drain voltage VDL of the FET 2. When the voltage at the positive input terminal of the operational amplifier 1 becomes lower than the reference voltage Vref, the output voltage of the operational amplifier 1 decreases to turn the FET 2 on, which increases the drain voltage VDL of the FET 2. Thus, the voltage dropping circuit is constituted as a negative feedback amplifier comprised of the operational amplifier 1 and the FET 2 connected in series, whereby the drain voltage VDL is supplied as a stable voltage to the internal circuit. In the illustrated example, by setting the resistance R1 to a value of 8 K .OMEGA., the resistance R2 to a value of 25 K .OMEGA., and the reference voltage Vref to a value of 2.5 volts, a drain voltage VDL of 3.3 volts can be obtained.
In the conventional voltage dropping circuit, the drivability of the p-channel driver formed by the FET 2 and the dropped voltage (drain voltage VDL) depend on a variation in the load on the internal circuit 3 and an operation margin of the same. Assuming that the allowable lower limit voltage of the operation margin is 3 volts under the worst operating conditions (of operation of transistors, including the environmental temperature), for instance, the dropped voltage VDL has to be maintained at 3 volts even if the load on the internal circuit 3 varies. If a margin of 0.3 volts is allowed for the required power supply voltage, the dropped voltage VDL is set to 3.3 volts. Then, under the best conditions (the best conditions of operation of transistors, including the environmental temperature, and the worst conditions of the external power supply voltage), normal operation of the internal circuit has to be ensured even if the load on the internal circuit 3 varies. In short, the drivability of the FET 2 (p-channel driver) is determined under these conditions.
Now, provided that a change in the gate voltage which occurs when a load current flowing through the internal circuit 3 has changed from a value I.sub.B to a value I.sub.L is represented by .DELTA.Vi, and a change in the drain voltage on the same occasion by .DELTA.Vo, the following equations (1) and (2) hold: ##EQU1##
From the equations (1) and (2), the following equation can be obtained: ##EQU2## where Cc represents a Miller capacitance, Cg a gate capacitance of the FET, W a total width of the FET, and L a length of the same.
Now, let it be assumed that Cc=200 PF, Cox=2.0 F/ .mu.m.sup.2, L=0.6 .mu.m, and K'=10 .mu.A/V.sup.2, and it is required to limit the change .DELTA.Vo to 0.3 volts in cases where the variation in the load on the internal circuit 3 is in a range of 10 mA to 80 mA under the worst conditions and in a range of 10 mA to 100 mA under the best conditions. If these conditions are applied to the equation (3), a conforming FET has to fulfill W>31600 .mu.m under the worst conditions, and W>55400 .mu.m under the best conditions.
It will be noted from the above description that to ensure that the dropped voltage VDL obtained under the worst conditions can be obtained under the best conditions, it is required to increase the area of the FET 2. On the other hand, the peak current flowing through the internal circuit 3 under the best conditions tends to become larger than that under the worst conditions. Therefore, even where there is no problem in increasing the area, if settings are made so as to ensure the supply of the dropped voltage VDL under the worst conditions to the voltage dropping circuit even under the best conditions, a larger consumption current flows.

Voltage dropping circuit and integrated circuit


In a thin film transistor substrate (10) having an island-like channel protection layer (15a) covering a channel portion of an oxide semiconductor layer (14), a source electrode (16S) and a drain electrode (16D) are formed of an aluminum alloy film or a multilayer film including an aluminum alloy film.

As a typical active matrix substrate, a thin film transistor substrate (hereinafter also referred to as a "TFT substrate") is widely used which includes thin film transistors (hereinafter also referred to as "TFTs") as switching elements, one for each pixel, which is the smallest unit of an image.
A TFT having a typical configuration includes, for example, a gate electrode provided on an insulating substrate, a gate insulating film covering the gate electrode, an island-like semiconductor layer provided on the gate insulating layer over the gate electrode, and a source electrode and a drain electrode provided on the semiconductor layer, facing each other.
The TFT substrate includes a plurality of TFTs provided on a substrate and arranged in a matrix, an insulating film covering the TFTs and having a flat surface, and a plurality of pixel electrodes provided on the insulating film, each corresponding to one of the TFTs. In a liquid crystal display panel, a counter substrate is disposed to face the TFT substrate, and a liquid crystal layer is provided between the TFT substrate and the counter substrate.
In recent years, for the TFT substrate, a TFT including a semiconductor layer of an oxide semiconductor (hereinafter referred to as an oxide semiconductor layer) instead of a semiconductor layer of amorphous silicon (a-Si) has been proposed as a TFT for each pixel, which is the smallest unit of an image. The oxide semiconductor layer is more excellent than the a-Si semiconductor layer in the following respects: better switching characteristics; lower off current value; higher electron mobility; availability of a low-temperature process; etc. In particular, because of the better switching characteristics and the lower off current value, the layout of the TFTs can be caused to be more compact, leading to an increase in aperture ratio. Therefore, a reduction in power consumption and an increase in resolution are expected.
Incidentally, the electrical characteristics of oxide semiconductors are known to depend significantly on the concentration of oxygen. Therefore, for example, when the concentration of oxygen around the oxide semiconductor layer varies due to a thermal treatment, the electrical characteristics of the oxide semiconductor layer disadvantageously degrade.
PATENT DOCUMENT 1 describes an oxide semiconductor TFT which includes a channel protection layer provided above the gate electrode, covering at least a portion of side surfaces of the semiconductor layer exposed from the source and drain electrodes. Here, the source and drain electrodes have, for example, a multilayer structure including a Mo film, an Al film, and a Mo film. PATENT DOCUMENT 1 states that because the channel protection layer is thus provided, even if a thermal treatment for forming a passivation film etc. is performed, a change in the concentration of oxygen contained in the semiconductor layer is reduced or prevented, and therefore, a degradation in electrical characteristics is reduced or prevented. PATENT DOCUMENT 1 also states that if a thermal treatment is performed at as high as 350° C. or more in order to restore the degraded electrical characteristics of the semiconductor layer, the semiconductor layer reacts with the source and drain electrodes, so that hillocks (projections and recesses) disadvantageously occur on the source and drain electrodes, and that even when the thermal treatment for forming a passivation film etc. is performed, the degradation in the electrical characteristics of the semiconductor layer is reduced or prevented, and therefore, the thermal treatment at 350° C. is not performed after the formation of the source and drain electrodes.

Thin film transistor substrate, display device, and method for manufacturing thin film transistor substrate


This invention relates to a method for varying a printing speed based upon ink/toner dry time profiles, comprising the steps of: determining a gloss reading of an ink/toner located on a media; determining an actual ink/toner dry time profile for the media; determining the type of media; and adjusting, if possible, a printing speed of a printing device that is utilizing the ink/toner.

1. Field of the Invention
This invention relates to a method for varying a printing speed based upon ink/toner dry time profiles, comprising the steps of: determining a gloss reading of an ink/toner located on a media; determining an actual ink/toner dry time profile for the media; determining the type of media; and adjusting, if possible, a printing speed of a printing device that is utilizing the ink/toner.
2. Description of the Related Art
Prior to the present invention, as set forth in general terms above and more specifically below, it is known, in the media sensing art to employ a media detection system that is capable of determining the media properties. Examples of this art include a variety of mechanical, electromechanical, and/or optical devices. While these devices are capable of determining the properties of the media, these devices do not measure the speed in which the ink/toner dries on the media so that a determination of the media type can be made based upon the ink/toner dry time profiles.
It is also known, in the media arts, to mark or otherwise encode the media so that the media type can be determined. Examples of this art include placing marks or other readable indicators directly upon the media to be printed. Also, marks or other readable indicators can be placed upon the packaging in which the media is located. While this media marking provides an adequate method for determining what type of media is being used, these methods do not measure the speed in which the ink/toner dries on the media so that a determination of the media type can we made based upon the ink/toner dry time profiles.
Finally, it is known, in the ink/toner arts, to measure the dry times of ink/toner in order to establish ink/toner dry time profiles. Typically, these profiles are then used to provide feedback to the user and/or printing device so that ink/toner will be given adequate time to dry or else it might smear or otherwise become illegible. While these systems provide an adequate method for determining the ink/toner dry time profiles, these systems do not utilize the dry time profiles in order to vary the printing speed based upon a determination of the media type.
It is apparent from the above that there exists a need in the media detection art for a media detection system which is capable of determining the media type based upon ink/toner dry time profiles, but which at the same time can alter the printing speed of the printing device based upon the type of media located in the printing device. It is a purpose of this invention to fulfill this and other needs in the art in a manner more apparent to the skilled artisan once given the following disclosure.

Varying printing speed based upon the differentiation between porous and swellable media via ink/toner dry time profiles

Hewlett-Packard Development Company, L.P.


A pharmaceutical preparation, and treatment method using the same, for contact dermatitis and particularly for canine contact dermatitis. The preparation has as active ingredients an anti-histamine and an anti-inflammatory. The anti-histamine is preferably diphenhydramine. The anti-inflammatory is preferably triamcinolone. The preparation is a liquid mixture and is sprayed or otherwise applied onto an affected area.

Human beings and most animals may suffer from a variety of skin irritations and inflammations generally known as dermatitis. Dogs in particular are prone to contact dermatitis caused by flea or other insect bites, allergies, external stimulation such as from prickly plants, and for other reasons. The condition has been notoriously difficult to treat. Veterinarians occasionally resort to injections of various medicines in an attempt to alleviate the symptoms and cure the dermatitis.
A number of topical compounds have been used for the treatment of skin conditions for many years. Such compounds have had only limited success in the treatment of canine contact dermatitis. Moreover, such compounds may be messy and/or noxious either to a dog or to a person applying the medicine.
It can be appreciated that a compound that is safe, effective, and easy to manufacture and apply will be a welcome advance in the treatment of contact dermatitis and other skin conditions.

Contact dermatitis pharmaceutical preparation with anti-histamine and anti-inflammatory

Millenium Pharmaceutical Technologies, Inc.


A shoe for the sticks canes and crutches having a base member with four outwardly extending pads and a central flat portion. A frustoconical top member mounted above the base member is joined to a cup member for receiving the distal end of a cane or crutch member. The junction between the top member and the cup member define a waist portion that is flexible and resilient mimicking the movement of a human ankle when a person walks. Irregularities on the bottom of the pads 24 and underside 22 enhance the traction.

1. Field of the Invention
The present invention relates to shoes for canes and crutches and, more particularly, to those shoes that mimic the movement of human ankle articulations.
2. Description of the Related Art
Several designs for shoes have been designed in the past. None of them, however, include a combination of parts that in addition to providing the necessary traction, permit a user to land, lean, and leave the supporting surface as if he/she had been using his/her foot and ankle.


Disclosed is an optical amplification repeating system having at least one repeater disposed in the middle of an optical transmission line connecting two terminal stations in which a light beam output from an optical amplifier is split into at least two split beams, one of the split beams is converted into an electric signal by optical/electrical conversion and the signal-to-noise ratio is detected on the basis of the electric signal. With such arrangement, the signal-to-noise ratio in the repeater can be measured in an in-service state, i.e., while the system is in operation.

1. Field of the Invention
The present invention relates to an optical amplification repeating system having at least one repeater disposed in the middle of an optical transmission line connecting two terminal stations and, more particularly, to such a system that allows the signal-to-noise ratio in the repeater to be measured in an in-service state of the system.
2. Description of the Related Art
Such an art is known that achieves optical amplification of a signal light by supplying the signal light and pumping light with predetermined wavelengths to a doped fiber, i.e., a fiber doped with a rare earth element such as erbium. Recently, there have been developed optical amplifier repeaters on the principle of such optical amplification. In an optical amplification repeating system with such repeaters inserted therein in multiple stages, it is effective to measure the signal-to-noise ratio (SNR) in each of the repeaters in locating a point of trouble. However, there has been developed no such SNR measuring circuit that can be easily mounted in a repeater. Therefore, it has been strongly desired to make it possible to measure the SNR in each optical amplifying repeater in an in-service state, i.e., while the system is in operation.


The channel resistance of a MOSFET is made independent of V.sub.S -V.sub.D by maintaining the ends of the gate electrode adjacent the source and drain regions at an offset voltage with respect to the source and drain regions, respectively, and by maintaining the portions of the body region adjacent to the source and drain regions at another offset voltage with respect to the source and drain regions, respectively. In this manner, V.sub.S -V.sub.D appears across the channel, across the gate, and across the body region beneath the channel. The resulting linear voltage drops along each of the three causes the channel-to-gate and channel-to-body potentials to be constant along the entire length of the channel, thereby avoiding variations in the number of carriers, mobility variations and body effect in the channel.

This invention generally relates to semiconductor devices, and more particularly to an arrangement for linearizing the channel resistance of a field-effect transistor and thereby improving its utility as a voltage-controlled resistance element.
Certain properties of the field-effect transistor, especially the well known metal-oxide-semiconductor field-effect transistor (MOSFET), make it desirable for use in solid-state circuits as a voltage controlled resistance element. The MOSFET is a voltage-controlled device, in which the resistance between source and drain electrodes may be controlled by the voltage applied to the gate electrode. Typically, the device comprises two relatively highly-doped, spaced-apart regions of one conductivity type formed in the surface of a semiconductor body region of the opposite conductivity type; these two spaced-apart regions are referred to as the source and drain, respectively. A thin layer of insulating material, usually a thermally grown native oxide layer, is formed over the surface of the semiconductor body region between the source and the drain regions to provide the gate dielectric, and a layer of conductive material, such as metal or polycrystalline semiconductor, is formed on the gate dielectric between the source and drain regions to serve as the gate electrode. Individual electrical contacts are made to the source and drain regions to provide source and drain electrodes.
With the body region tied to a reference potential, such as ground, a voltage applied to the gate electrode controls the number of charge carriers in a channel created at the surface of the body region between the source and the drain regions. For example, in a P-channel MOSFET formed in an N-type silicon substrate and having P-type source and drain regions, a negative voltage bias applied to the gate electrode modifies conditions within the surface of the silicon substrate. As the magnitude of this negative voltage bias increases, the silicon surface beneath the gate electrode first undergoes depletion, followed by weak inversion, and then by increasingly strong inversion. When inversion occurs in the silicon surface beneath the gate electrode, a P-type inversion layer, or channel, extends between the P-type source and drain regions of the MOSFET. Thus, an appropriate voltage signal on the gate electrode can modulate the number of carriers within the channel electrode so that for a given voltage across the source and drain electrodes, the gate electrode controls current flowing in the channel. For constant gate voltage, an increase in the voltage across the source and drain electrodes causes an increase in the channel current, which in turn produces an increase in the resistive voltage (IR) drop along the channel. This voltage drop produces an electric field opposing the electric field in the silicon surface produced by the gate bias. When this voltage drop at any point along the channel reaches a value sufficient to reduce the net electric field in the silicon surface to be near the threshold required to cause inversion, "pinch off" of the channel occurs, and the drain current enters "saturation" at a relatively constant value, largely independent of the voltage across the source and drain electrodes of the MOSFET device.
It is the controllability of the channel resistance, which may have a value ranging from megohms to hundreds or tens of ohms depending on its dimensions, applied voltages, and the materials and process used for fabricating the device, that allows the MOSFET device to be employed as a voltage-controlled circuit resistance element. These and other properties of the MOSFET suggest it for numerous applications, such as a solid-state voltage-controlled resistor in equipment, such as variable RC time-constant circuits and voltage-controlled attenuators. However, because the channel resistance, defined as the ratio of the voltage across the channel to the current flowing through the channel, varies with the voltage across the source and drain electrodes, it cannot be used in many applications that require a resistance element which is independent of the direction (or polarity) and magnitude of the voltage across, and current through the element. In short, the value of the controllable resistance of the element should be independent of the voltage applied across the two terminals of the element.
Techniques have been proposed for linearizing the channel resistance of an insulated-gate field-effect transistor. Typically, these are circuit techniques which utilize the transistor in its triode (nonsaturation) region of operation. Several of these techniques are described in an article entitled "Continuous-Time MOSFET-C Filters in VSLI" by Y. Tsividis, M. Banu and J. Khoury, IEEE Transactions, Circuits-Systems, Vol. CAS-33, No. 2, pp. 125-140, Feb. 1986. The circuits described in this article include devices that operate in the manner shown in FIG. 1A or FIG. 1B, which schematically illustrate a MOSFET in its triode (nonsaturation) region of operation having its gate connected to a control voltage V.sub.c. The control voltage V.sub.c may be provided by an automatic tuning system (not shown). The body of the MOSFET is connected to a fixed DC bias V.sub.B. The source and drain voltages, V.sub.S and V.sub.D, are assumed to remain sufficiently low to allow operation in the nonsaturation region. The channel current of the transistor, I, can be written in the form I=i.sub.L -i.sub.N, where i.sub.N is a nonlinear term in V.sub.S and V.sub.D, and i.sub.L is a linear term given by i.sub.L =G(V.sub.D -V.sub.S) with G being the channel conductance. The nonlinearities in the current, I, versus V.sub.S -V.sub.D are mainly second-order, and are cancelled in various ways, for example, by making V.sub.D =-V.sub.S in the arrangement of FIG. 1A, by making V.sub.C an appropriate function of V.sub.S and V.sub.D, or by using pairs of devices connected as in FIG. 1A or 1B and taking the difference of the currents through the two devices while driving the devices in a balanced fashion.
All of the proposed methods described in the aforementioned article suffer from the following limitations:
(a) If the two devices used in a pair are not perfectly matched, the cancellation of the second-order nonlinearities will not be perfect; the same problem occurs if the driving signals used are not perfectly balanced.
(b) The odd-order terms do not cancel out owing to mobility variations caused by variations in the gate field along the channel, and the body effect caused by variations of the substrate field along the channel.
Among the techniques that have been proposed to cancel the odd-order nonlinear terms of the channel current due to the body effect is that described and claimed in U.S. Pat. No. 4,710,726 to Z. Czarnul, and also described in an article entitled "Modification of Banu-Tsividis Continuous-Time Integrator Structure" by Z. Czarnul, IEEE-Transactions on Circuits and Systems, Vol. CAS-33, No. 7, PP. 714-716, Jul. 1986. The Czarnul circuit is a MOS resistive network which employs four matched MOS transistors, each operating in its nonsaturation region. While this circuit cancels nonlinearities caused by the body effect, it does not cancel nonlinearities caused by mobility variation.
An object of the present invention is to provide a highly-linear field-effect transistor voltage-controlled resistance element which overcomes the shortcomings of known techniques for linearizing the channel resistance field-effect transistor device.

Linear voltage-controlled resistance element


A method of eliminating unnecessary frequency components using a quadrature detector. The method includes converting an analog input signal into a digital signal f1(t), and the signal f1 (t) is delayed by a sampling time τ to form a signal f2 (t). Then, letting the reference frequency be ω0, the I- and Q-components in quadrature detection by the following expression:I={f2(t)*sin ω0t−f1(t)*sin ω0(t−τ)}/sin ω0τQ={f2(t)*cos ω0t−f1(t)*cos ω0(t−τ)}/sin ω0τ.

The present invention relates to a method and an apparatus for quadrature detection and an MRI (Magnetic Resonance Imaging) system. More particularly, the present invention relates to a method and an apparatus for quadrature detection wherein high-frequency input signals are converted into low-frequency signals and an MRI system equipped with such a quadrature detector.
An MRI system subjects a magnetic resonance signal, received as RF (Radio Frequency) signal, to quadrature detection by reference signals to obtain a baseband signal. Then, based on the baseband signal, the MRI system reconstructs an image. In quadrature detection, in addition to the baseband signal, a signal having a center frequency two times that of the reference signals. Since this signal is unnecessary, however, it is removed through a filter. (Refer to Non-Patent Document 1, for example.)
[Non-patent Document 1] NMR Medicine, Basic and Clinical, ed. Society for the Study of Nuclear Magnetic Resonance Medicine (3rd ed.), Maruzen, Nov. 20, 1987, pp. 106–108
The frequency of the reference signal is brought into correspondence with the center frequency of the RF signal. Therefore, if the center frequency of the RF signal varies, the frequency of the reference signal must be accordingly varied. As a result, the filter for unnecessary component removal must be changed.

Method and apparatus for quadrature detection and MRI system

GE Medical Systems Global Technology Company, LLC


A method for time correction during an emulation of a native computing environment (NCE), including: obtaining, by an emulator, a code segment for execution within the NCE; identifying, during an execution of the code segment within the emulation, a first instance of a time sensitive (TS) instruction; initiating a first instruction sequence window (ISW) in response to identifying the first instance of the TS instruction; identifying, during the execution of the code segment within the emulation, a second instance of the TS instruction after initiating the first ISW; obtaining, in response to identifying the second instance during the first ISW, an expected time between execution of the first instance and the second instance of the TS instruction in the NCE; and inserting an aggregated delay based on the expected time during the execution of the code segment within the emulation.

In computing, an emulator is hardware or software or both that duplicates (or emulates) the functions of a first computer system (the native computing environment (NCE)) in a different second computer system (host computing device), so that the emulated behavior closely resembles the behavior of the real system. This focus on reproduction of behavior is in contrast to some other forms of computer simulation, in which an abstract model of a system is being simulated.


There is provided a method of making a nano-composite having individual nano-sized silica particles dispersed in a polymer matrix, the method comprises the step of curing a substantially homogeneous mixture of surface-functionalized nano-sized silica particles, a polymerizable resin and a curing agent, wherein said substantially homogeneous mixture is substantially free of alcoholic solvent to form the nano-composite.

Epoxy-based nano-composites are known to have properties that are superior over neat epoxy, which is a brittle resin with poor resistance to crack initiation.
Toughening strategies have included the incorporation of filler particles using such materials as rubber particles, core-shell particles, hydro-branched polymer particles, thermoplastic particles and inorganic particles. The selection of filler particles has an impact on the nano-composites mechanical properties, such as strength, modulus and, especially in the case of epoxy-based nano-composites, their thermal stability.
Inorganic filler particles are commonly used modifiers for nano-composite production because of their ability to improve toughness while maintaining high modulus and thermal stability. The volume fraction, dispersion, size, type and surface functionalization of inorganic fillers play important roles in the mechanical reinforcement of the polymer. The properties of composites can be significantly improved when micron-sized fillers are replaced by nano-sized fillers, due to the reduction in the inter-particle distances. This is because stress transfer from matrix to filler, suppression of polymer chain mobility and the amount of energy dissipation at crack initiation and propagation can be promoted by the presence of mechanically coupled networks at low inter-particle distance.
Sol-gel silica, which has low thermal expansion, uniform morphology and particle size, is a known nano-filler for nanocomposite preparation. The extent of silica nanoparticles dispersion within an epoxy matrix and the interfacial interaction between the silica nanoparticles and the epoxy matrix are important parameters affecting properties of the silica-epoxy nanocomposite formed. Currently known methods attempt to improve interfacial interaction between silica nanoparticles and epoxy matrix through functionalization of silica surfaces by amine-terminated coupling agent prior to dispersion into the epoxy resin. One major disadvantage of using such sol-gel route in nanocomposite preparation is the use of solvent in the preparation process. The solvent needs to be removed and recycled or disposed of, thus posing environmental, health and safety issues, in addition to the additional costs involved in solvent removal or disposal. As a result of the high production costs due to complexity of the manufacturing process, silica nanocomposite derived from the sol-gel process is particularly limited to high tech applications, such as aerospace, automotive and electronics.
In situ sol-gel silica/epoxy preparation methods have also been developed to simplify the preparation of nanocomposites. Such methods include in situ sol-gel synthesis of silicon alkoxide under vacuum or elevated temperature. Although the process of silica/epoxy nanocomposite production has been simplified through the combination of silica formation step with nanocomposite preparation, this method is not widely adopted in industry because of the non-uniformity of silica nanoparticles produced, poor silica dispersion and weak interfacial interaction between the silica and epoxy matrix. In addition, a solvent is still required in this process as a diluent and therefore issues regarding solvent removal or disposal remain relevant.
For both sol-gel and in situ sol-gel methods, very high silica content (6-30% by weight) in silica/epoxy nanocomposite is required to achieve high mechanical and thermal properties. Preparation of composites with lower degrees of silica content, while still maintaining its mechanical and thermal properties, is required for reduction of processing cost, because these silica sources (sol-gel silica, concentrated silica/epoxy resin, colloidal silica) are expensive.
For industrial-scale applications, resin transfer molding (RTM), resin infusion molding (RIM) and vacuum bagging processes are widely used. The these processes require that the nanocomposites be easily and completely fed into cavities of designed mold shape before curing. As such, high performance composites with low viscosity are preferred. However, viscosities of materials with very high silica content (6-30% by weight) are desired for their mechanical and thermal properties, thereby posing difficulties during processing, limiting their usage in industrial-scale applications.
Another method of forming a silica-epoxy nanocomposite requires the use of hexahydrophthalic anhydride in a mixture of diglycidyl ethers of bisphenol-A and tetraethoxysilane. In this process, the tetraethoxysilane has to go through a two step modification in order to form the silica nanoparticles, which tend to be spherical in shape. Further, this method requires the use of an autoclave to increase the temperature to 170° C., which is not cost-efficient.
Therefore, there is a need for a method for preparing a nanocomposite that overcomes, or at least ameliorates one or more of the disadvantages described above.
There is also a need to provide a method of producing a silica/epoxy nanocomposite that possesses superior properties, such as improved mechanical and thermal properties over neat epoxy and which can be produced on an industrial scale.

Agency for Science, Technology and Research


The present invention aims to increase an encoding efficiency when the occurrence probability of LPS (less probable symbol) is low. An encoding apparatus has a interval size (A), a interval limit value (C), divides a set interval which is set on a number line, selects a sub-interval corresponding to an occurring symbol, updates the interval size (A) and the interval limit value (C) with a limited precision based on the selected sub-interval size, and encodes a coordinate within the interval. Based on the probability (the occurrence probability of symbol) output from a learning memory, the sub-interval size (LSZ, dLSZ) and the sub-interval limit value are obtained. A correction value calculator computes the correction value based on the dLSZ, reflects the computed correction value (dA, dC) to the renormalized subinterval size (rA) and the renormalized sub-interval limit value (rC), updates the interval size (A7) to the sub-interval size, updates the interval limit value (C8) to the sub-interval limit value, and outputs a code.

1. Field of the Invention
The present invention relates to an encoding method, a decoding method, an encoding/decoding method, and an apparatus installing these methods for implementing an efficient encoding/decoding of information source data and generated code data.
2. Description of the Related Art
Related Art 1.
As a known technique for effectively encoding (compress) information source data, an arithmetic coding has been recently adopted by International Standard Encoding System (JBIG (Joint Bi-level ImageExperts Group) and JPEG (Joint Photographic Experts Group)). An example of the International Standard Arithmetic Coding System is a QM-Coder which is discussed in ITU-T Recommendation T.82 (JBIG) and T.81 (JPEG).
The principle of the arithmetic coding is that a range of equal or greater than 0.0 . . . 0 and less than 1.0 . . . 0 is reflexively divided into subintervals with regularity based on occurrence probability of individual data and a value of a fraction within the sub-interval corresponding to a sequence of occurring data to be encoded is output as a code. In the arithmetic decoding, a reflexive division of the interval is performed with the same regularity as the coding, and a sequence corresponding to the sub-interval including the code value is output as decoded data. Hereinafter, the data to be encoded is assumed to be binary (0 and 1).
In an encoding method adopting prediction, the data to be encoded is not a data value itself, but is binary symbol which shows a match/mismatch of the prediction value. Hereinafter, a symbol showing a match is referred to as an MPS (More Probable Symbol) (value 0), and a symbol showing a mismatch is referred to as an LPS (Less Probable Symbol) (value 1). The data value which is more probable to occur is learned and held as a prediction value. Accordingly, the MPS occurs with a probability of equal to or greater than 0.5, and the LPS occurs with a probability of equal to or less than 0.5.
A concept of interval division of the arithmetic coding is shown in FIG. 23.
A procedure for the arithmetic coding of a certain symbol to be encoded can be shown as FIG. 24, where a size of a current interval is A, a lower limit value of the current interval is C, occurrence probability of a symbol value 1 is P, sub-interval sizes for the symbol values 0, 1 are A0, A1, and a symbol value which actually occurs is X. Initial values for A and C are 1.0 and 0.0, respectively.
For the sub-intervals A0 and A1, the encoding operation become different according to which sub-interval is placed at upper/lower part of the interval. At S1003 through S1005 in the figure, the operation to the upper sub-interval Ah, the lower sub-interval Al, and the symbol Sl corresponding to the lower sub-interval are separately shown for two cases; the left side shows in case of placing the symbol value 0 at the lower part; and the right side shows in case of placing the symbol value 1 at the lower part. At S1006, if the symbol X is the symbol 1 corresponding to the lower sub-interval, the interval A is updated to the lower sub-interval Al at S1007. On the other hand, if the symbol X is not the symbol 1, the interval A is updated to the upper sub-interval Ah at S1008, and at the same time the lower sub-interval size Al is added to the code C which shows the lower interval limit at S1009.
Similarly, in the arithmetic decoding procedure, the code C is updated to the displacement from the lower limit value of the current interval, and if X is the decoding symbol value, the operation can be shown as FIG. 25. The initial value of A is set to 1.0, and the initial value of C is set to the code value obtained by the encoding process.
For the sub-intervals A0 and A1, the decoding operation become different according to which sub-interval is placed at upper/lower part of the interval. At S1103 through S1106 in the figure, the operation to the upper sub-interval Ah, the lower sub-interval Al, the symbol Sh corresponding to the upper sub-interval, and the symbol Sl corresponding to the lower subinterval are separately shown for two cases; the left side shows in case of placing the symbol value 0 at the lower part; and the right side shows in case of placing the symbol value 1 at the lower part. At S1107, if the code value C is less than the lower sub-interval Al, the interval A is updated to the lower sub-interval Al at S1108, and the decoding symbol X is updated to the symbol S1 corresponding to the lower sub-interval at S1109. On the other hand, if the code value C is not less than the lower sub-interval Al, the interval A is updated to the upper sub-interval Ah at S1110, and at the same time the lower sub-interval size Al is subtracted from the code C which shows the lower interval limit at S1111, and the decoding symbol X is updated to the symbol Sh corresponding to the upper sub-interval at S1112.
The decoded data value becomes the same value as the prediction if the decoded symbol value is 0, and becomes a different value (1-prediction value) from the prediction if the decoded symbol value is 1.
In the above interval divisional rule, the information theory can prove that it is the most efficient encoding to divide the interval in proportion with the occurrence probability. The procedure described above is called as multiplication-based arithmetic coding, and the precision for fractional representation is said to be infinite.
The arithmetic coding is performed by binary fraction operation, and the precision for fractional representation, namely, the effective digits of the interval limit value is increased during the process, which makes the implementation of the arithmetic coding difficult. However, the subtraction-based arithmetic coding enables the arithmetic coding to be practiced, in which the high order digits of the fraction whose value does not change during the operation and which is located close to the binary point is truncated from the operation, and a fixed number of effective digits is guaranteed in the operation. According to the subtraction-based arithmetic coding, the multiplication value Al, which is obtained by the multiplication of the interval size A of the multiplication-based arithmetic coding and the occurrence probability value P of LPS, is replaced by an approximate value LSZ of the probability P, the updated interval size A is renormalized, that is, extended by multiplying power of 2 so as to be always equal to or greater than 0.5, and the coding is implemented by shift operation. As for the approximate value LSZ, a suitable value is selected and adopted according to the probability value P from some candidates, and the approximate value LSZ is assigned without referring to the whole interval size A (equal to or greater than 0.5 and equal to or less than 1.0).
FIG. 26 shows a concept of the interval division according to the subtraction-based arithmetic coding.
FIGS. 27 and 28 show the procedure of the subtraction-based arithmetic coding and the subtraction-based arithmetic decoding. At S1201 of the encoding process and S1301 of the decoding process, the approximate value LSZ is assigned to the sub-interval A1 of the symbol value 1.
After the interval size is updated, the interval size A is renormalized, that is, extended by multiplying power of 2 at S1208 and S1211 of the encoding process and S1310 and S1314 of the decoding process, so that the interval size A is always kept equal to or greater than 0.5. If the interval size A which is updated by processing the MPS is equal to or greater than 0.5, the extension for the renormalization is not necessary to be implemented.
While the interval size A is kept equal to or greater than 0.5 and less than 1.0 by the renormalization, since the approximate value LSZ is adopted, the divisional ratio of the sub-intervals A0 and A1 has an error compared with the actual ratio of the probability. For example, when the approximate value LSZ=0.3, in case of the maximum interval size A=1.0 (only initial value) and the minimum value A=0.5, a larger interval than the MPS may be assigned to the LPS of the occurrence probability being equal to or less than 0.5 so that the divisional ratio of the sub-interval Al becomes 0.3, 0.6 as shown in FIG. 29. "Conditional MPS/LPS exchange," in which the MPS is assigned to the LSZ when the LSZ becomes larger than (A-LSZ) such as the above described case, disclosed in the Japanese Patent No. 2128115 (corresponding to the Japanese Examined Patent Publication JP1996-34434) is adopted to ITU-T Recommendation T.82 (JBIG) and T.81 (JPEG), and so on.
When "conditional MPS/LPS exchange" is adopted, the procedure of the subtraction-based arithmetic coding and the subtraction-based arithmetic decoding can be shown as FIGS. 30 and 31. In this case, the subinterval size Al of the symbol value 0 is assumed to be an approximate value LSZ, however, according to the relationship of the size with the sub-interval size A0, finally the sub-interval A0 can be corresponded to the symbol 1, and also the sub-interval A1 can be corresponded to the symbol 0.
In the coding procedure of FIG. 30, from S1406 through S1411 are processes for X=0 (MPS) to update the interval A into a larger sub-interval between the sub-intervals Al and Ah. S1412 through S1417 are processes for X=1 (LPS) to update the interval A into a smaller sub-interval between the sub-intervals Al and Ah.
In the decoding procedure of FIG. 31, S1506 through S1412 are processes for updating the interval A to the lower sub-interval Al, and S1513 through S1521 are processes for updating the interval A to the upper subinterval Ah. If the updated sub-interval is the larger sub-interval, the decoding symbol becomes X=0 (MPS), and if the updated sub-interval is the smaller sub-interval, the decoding symbol becomes X=1 (LPS).
Further, according to the subtraction-based arithmetic coding and the subtraction-based arithmetic decoding, as an example of a method other than the above "conditional MPS/LPS exchange," the Japanese Patent No. JP-2128110 (corresponding to the Japanese Examined Patent Publication No. JP1996-34432) describes a correction method of the sub-interval, in which if the sub-interval size A0 becomes less than 0.5, the sub-interval is corrected to an average value of A0 and 0.5, and the sub-interval size Al should be also corrected.
These correction methods are applied when the interval A is divided into two sub-intervals A0 and A1.
Related Art 2.
In the arithmetic coding, the final code value can be treated as an arbitrary coordinate within the final interval. This is based on a rule to continue decoding by supplying a specific bit pattern of end bits which is deleted to shorten the code length when a code lacks on decoding. The deleted specific bit pattern of end bits is treated by, for example, byte unit, and usually one of byte 0x00 and 0xFF. In the above-mentioned International Standard Encoding Recommendation T.82, a repetition of byte 0x00 is applied.
Here, it is impossible to detect the end of decoding based on the code length as discussed above, and it is necessary to previously notify the number of symbols or lines to be decoded as long as the data to be decoded has not a fixed length. If a previous notification cannot be done, the notification should be made by inserting a marker segment, etc. into the code before the end of decoding.
The marker segment includes an escape byte (0xFF), an identification byte, and its additional information, if it is required. Here, in order that the same value as the marker segment should not occur within the code on encoding, it is prevented to generated the identification byte by inserting a bit or a byte for control directly after the escape byte when the escape byte occurs within the code. The bit or byte for control is deleted on decoding to obtain the original code value.
According to "Text compression" (Text compression/Timothy C. Bell, John G. Cleary, Ian H. Witten., 1990), another symbol is employed to show an end exclusively to always keep a sub-interval of the minimum interval size, and the symbol is encoded on completion of encoding, and a coordinate within the sub-interval is selected as a code to notify the end of decoding.
To encode the end symbol means to encode the final symbol, and symbols prior to the final symbol, the sub-interval for the end symbol for each encoding of the symbol is always truncated.

Apparatus, method, and programs for arithmetic encoding and decoding


A method is provided to treat a human afflicted with chronic fatigue syndrome or fibromyalgia syndrome by the administration of certain butyrate derivatives.

An estimated 6 million Americans suffer the often baffling symptoms of fibromyalgia or chronic fatigue syndrome. Patients with fibromyalgia, also referred to as fibromyalgia syndrome, FMS or fibrositis syndrome, report widespread musculoskeletal pain, chronic fatigue, and non-restorative sleep, and show specific regions of localized tenderness in the absence of demonstrable anatomic or biochemical pathology. Typically, they describe light and/or restless sleep. They awaken feeling unrefreshed with pain, stiffness, physical exhaustion, and lethargy. See, H. D. Moldofsky et al., J. Muscoloskel. Pain, 1, 49 (1993). In a series of studies, Moldofsky's group has shown that aspects of the patients' sleep pathology are related to their pain and mood symptoms. That is, patients with fibrositis syndrome show an alpha (7.5 to 11 Hz) electroencephalographic (EEG), non-rapid-eye-movement (NREM) sleep anomaly correlated with musculoskeletal pain and altered mood. Moldofsky has interpreted this alpha EEG NREM sleep anomaly to be an indicator of an arousal disorder within sleep associated with the subjective experience of non-restorative sleep. See H. D. Moldofsky et al., Psychosom. Med., 37, 341 (1975).
Fibromyalgia patients frequently report symptoms similar to those of patients with post-infectious neuromyasthenia, also referred to as chronic fatigue syndrome (CFS). Chronic fatigue syndrome, or CFS, is a debilitating disorder characterized by profound tiredness or fatigue. Patients with CFS may become exhausted with only light physical exertion. They often must function at a level of activity substantially lower than their capacity before the onset of illness. In addition to these key defining characteristics, patients generally report various nonspecific symptoms, including weakness, muscle aches and pains, excessive sleep, malaise, fever, sore throat, tender lymph nodes, impaired memory and/or mental concentration, insomnia, and depression. CFS can persist for years. Compared with fibromyalgia patients, chronic fatigue patients have similarly disordered sleep, localized tenderness, and complaints of diffuse pain and fatigue.
The presence of considerable symptom overlap in FMS and chronic fatigue syndrome has led to speculation that they may represent different facets of the same underlying, as yet unknown disease process (D. L. Goldenberg, J. Musculoskel. Med., 7, 19 (1990); D. L. Goldenberg, Arth. Rheum., 33, 1132 (1990); M. B. Yunus, J. Rheumatol., 16 (S19), 62 (1989)). Although no specific inheritance pattern has been identified, an increased incidence in relatives of affected patients has been noted (M. J. Pellegrino et al., Arch. Phys. Med. Rehab., 70, 61 (1989)). Development of the syndrome may require a predisposing factor, possibly inherited, as well as a precipitating factor, perhaps something disturbing sleep.
Amitriptyline can be an effective medication for FMS but it also has frequent side effects when used in doses sufficient to keep FMS symptoms well controlled. Particularly bothersome are weight gain, dry mouth, and daytime cognitive impairment. See, D. L. Goldenberg et al., Arth. Rheum., 29, 1371 (1986). Diphenhydramine and trazodorie are in common use because they seem effective and have less side effects, but have not been proven to work in controlled, blinded trials. It is often necessary to try several different medications in succession before finding one that works well with acceptable side effects. Some tolerance develops to the sedative effect of many of these medications, necessitating one or two dose increases after an initial good response to maintain it. There is no pharmacological therapy recognized as effective for CFS.
Therefore, a need exists for an effective drug-based treatment of FMS and/or chronic fatigue syndrome that does not exhibit undue side effects.

Method for treatment of fibromyalgia and chronic fatigue syndrome


Secret values used in a multi-server authentication scheme are updated. Information is authenticated in a system comprising a plurality of processing devices each adaptable for communication with one or more other devices. The information is authenticated by generating at least first and second shares of a first password associated with a first device (such as a client device); storing the first and second shares in respective second and third devices (such as authentication server devices); updating the first and second shares using a secret value T; assigning a version number to the updated first and second shares; and upon submission of additional information associated with the first device to at least one of the second and third devices, the second and third devices utilizing the respective updated first and second shares for a given version number to collectively determine a correspondence of the additional information with the first password.

In order to gain access to applications or other resources via a computer or another user device, users are often required to authenticate themselves by entering authentication information. Such authentication information may comprise, for example, passwords that are generated by a security token carried by a user. A number of techniques have been proposed or suggested to reduce the susceptibility of authentication systems to attacks. For example, U.S. Pat. No. 7,725,730 discloses secure authentication protocols for authenticating a client device, such as a mobile communications device having limited computational resources, using at least two servers. The two servers utilize information generated from a password to collectively authenticate the client device.
Proactive security techniques update split secret values used by at least two authentication servers. See, for example, A. Herzberg, S. Jarecki, H. Krawczyk, and M. Yung in: Proactive Secret Sharing, or: How to Cope with Perpetual Leakage, Advances in Cryptology—Crypto 95 Proceedings, Lecture Notes in Computer Science, Vol. 963, D. Coppersmith ed., Springer-Verlag, 339-352 (1995). Proactive security protects distributed cryptographic keys using a periodic refreshing of the contents stored by the distributed authentication servers. Generally, if proactive security is employed and an attacker initially breaches one server, and then breaches a second server, the two halves of the secret cannot be combined to form the overall secret.
Proactive security techniques typically require synchronization between authentication servers. A need remains for improved methods for updating the secret values used in a multi-server authentication scheme. A further need remains for improved proactivization methods for updating the secret values in a multi-server authentication scheme that does not require strict synchronization among the various authentication servers.

Multi-server authentication using proactivization journaling