A method for estimating a phase error existing in a receiver of a MIMO OFDM communications system is disclosed. The method includes executing Hermitian transpose on channel coefficient matrix of the MIMO OFDM communications system for generating Hermitian-transposed channel coefficient matrix, multiplying received signal matrix of the receiver with the Hermitian-transposed channel coefficient matrix for generating converted signals, summing products of the converted signals and complex conjugates of pilot signals corresponding to the converted signals for generating a sum result, and generating the phase error according to the sum result, the converted signals, and the complex conjugates of the pilot signals. The pilot signals are extracted from the received signal matrix.

1. Field of the Invention
The present invention relates to a method for estimating phase error in MIMO OFDM communications system, and more particularly, to a method for estimating phase error existing in the receiver of the MIMO OFDM communications system.
2. Description of the Prior Art
Please refer to FIG. 1. FIG. 1 is a diagram illustrating a conventional Multiple Input Multiple Output (MIMO) Orthogonal Frequency Division Multiplexing (OFDM) communications system 100. It is noted that the MIMO OFDM communication system here includes Multiple Input Single Output (MISO) OFDM communication system, for example, a 2T1 R OFDM system, i.e. the number of the transmitting antennas TX is 2, and the number of the receiving antennas RX is 1.
The MIMO OFDM communications system 100 comprises a transmitter 110 for transmitting radio frequency signals and a receiver 120 for receiving radio frequency signals from the transmitter 110.
The transmitter 110 comprises a modulation device 111, a space-time-frequency processing device 112, a transmitting signal transforming module 116, and a plurality of transmitting antennas TX.
The transmitting signal transforming module 116 comprises an Inverse Fast Fourier Transform (IFFT) device 113, a Digital/Analog Converter (DAC) 114, and an RF (radio frequency) circuit 115.
The modulation device 111 is disposed for modulating data. The space-time-frequency processing device 112 is coupled to the modulation device 111 and disposed for processing the modulated data. The transmitting signal transforming module 116 is coupled between the space-time-frequency processing device 112 and the transmitting antennas TX for receiving the processed data from the space-time-frequency processing device 112 and transforming the received data to radio frequency signals to the transmitting antennas TX. More particularly, in the transmitting signal transforming module 116, the IFFT device 113 is coupled to the space-time-frequency processing device 112 and disposed for executing IFFT on the processed modulated data and accordingly outputting transformed data; the DAC 114 is coupled to the IFFT device 113 and disposed for converting the transformed data to analog signals; the RF circuit 115, coupled to the DAC 114, receives the analog signals and accordingly up-converts the received analog signals to radio frequency signals. The antennas TX, coupled to the RF circuit 115 of the transmitting signal transforming module 116, receives the radio frequency signals from the RF circuit 115 and transmits the received radio frequency signals.
The receiver 120 comprises a plurality of receiving antennas RX, a receiving signal transforming module 130, a timing/phase compensation device 123, an equalizer 124, a demodulation device 125, and a Phase Lock Loop (PLL) 126.
The receiving signal transforming module 130 comprises an RF circuit 127, an Analog/Digital Converter (ADC) 121, and an FFT device 122.
The receiving antennas RX receive the radio frequency signals transmitted from the transmitting antennas TX of the transmitter 110. The receiving signal transforming module 130 is coupled between the receiving antennas RX for receiving the radio frequency signals and transforming the received radio frequency signals to transformed signals to the time/phase compensation device 123. More particularly, in the receiving signal transforming module 130, the RF circuit 127, coupled to the receiving antennas RX, down-converts the radio frequency signals received from the receiving antennas RX, i.e., a plurality of receiving paths, to base band or intermediate band analog signals; the ADC 121, coupled to the RF circuit 127, converts the analog signals from the RF circuit 127 to digital signals; the FFT device 122, coupled to the ADC 121, executes FFT on the digital signals received from the ADC 121 and accordingly outputs transformed signals. The timing/phase compensation device 123, coupled to the FFT device 122 of the receiving signal transforming module 130, compensates the transformed signals according to the phase outputted from the PLL 126. The equalizer 124, coupled to the timing/phase compensation device 123, the demodulation device 125, and the PLL 126, equalizes the compensated signals from the timing/phase compensation device 123 and accordingly outputs to the demodulation device 125, and estimates phase error θ of the received compensated signals and outputs the estimated phase error θ to the PLL 126. The PLL 126, coupled to the equalizer 124, receives the phase error θ and accordingly adjusts its phase, and outputs a clock signal with the adjusted phase to the timing/phase compensation device 123. The demodulation device 125, coupled to the equalizer 124, demodulates the equalized signals and accordingly outputs data.
Because of frequency mismatch, timing drift or Common Phase Error (CPE), a phase error θ exists between the actual received signal and the correct signal. Therefore, in data tones, the equalizer 124 is utilized to estimate the phase error θ of the received signal and accordingly outputs the estimated phase error θ to the PLL 126 since the data signal can be extracted from the received radio frequency signal. Consequently, the PLL 126 enables the timing/phase compensation device 123 to correctly compensate the timing/phase of the received signals. The equalizer 124 can be a zero-forcing (ZF) equalizer.
Assuming the number of the transmitting antennas TX is 2, and the number of the receiving antennas RX is 3 (a 2T3R OFDM communications system), therefore, the received signals (after being fast Fourier transformed) can be derived from the following equations:
                                          [                                          y                                  1                  ,                  t                                                                                y                                  1                  ,                                      t                    +                    1                                                                        ]                    =                                                    [                                                      h                    11                                                                                h                    12                                                  ]                                                          [                                                                                x                          1                                                                                ⅇ                          jθ                                                                                x                          2                                                                                ⅇ                          jθ                                                                                -                                                      x                            2                            *                                                                                ⅇ                          jθ                                                                                x                          1                          *                                                                                ⅇ                          jθ                                                                                ]                                      +                          [                                                n                                      1                    ,                    t                                                                                n                                      1                    ,                                          t                      +                      1                                                                                ]                                      ;                            (        1        )                                                      [                                          y                                  2                  ,                  t                                                                                y                                  2                  ,                                      t                    +                    1                                                                        ]                    =                                                    [                                                      h                    21                                                                                h                    22                                                  ]                                                          [                                                                                x                          1                                                                                ⅇ                          jθ                                                                                x                          2                                                                                ⅇ                          jθ                                                                                -                                                      x                            2                            *                                                                                ⅇ                          jθ                                                                                x                          1                          *                                                                                ⅇ                          jθ                                                                                ]                                      +                          [                                                n                                      2                    ,                    t                                                                                n                                      2                    ,                                          t                      +                      1                                                                                ]                                      ;                            (        2        )                                                      [                                          y                                  3                  ,                  t                                                                                y                                  3                  ,                                      t                    +                    1                                                                        ]                    =                                                    [                                                      h                    31                                                                                h                    32                                                  ]                                                          [                                                                                x                          1                                                                                ⅇ                          jθ                                                                                x                          2                                                                                ⅇ                          jθ                                                                                -                                                      x                            2                            *                                                                                ⅇ                          jθ                                                                                x                          1                          *                                                                                ⅇ                          jθ                                                                                ]                                      +                          [                                                n                                      3                    ,                    t                                                                                n                                      3                    ,                                          t                      +                      1                                                                                ]                                      ;                            (        3        )                                                      Y                          6              ×              1                                =                                                    [                                                                                y                                                  1                          ,                          t                                                                                y                                                  1                          ,                                                      t                            +                            1                                                                          *                                                                                y                                                  2                          ,                          t                                                                                y                                                  2                          ,                                                      t                            +                            1                                                                          *                                                                                y                                                  3                          ,                          t                                                                                y                                                  3                          ,                                                      t                            +                            1                                                                          *                                                                                ]                                            6                ×                1                                      =                                                                                H                                          6                      ×                      2                                                        ·                                      X                                          2                      ×                      1                                                                      +                                  N                                      6                    ×                    1                                                              =                                                                                [                                                                                h                                11                                                                                -                                                                  h                                  12                                                                                h                                12                                *                                                                                +                                                                  h                                  11                                  *                                                                                h                                21                                                                                -                                                                  h                                  22                                                                                h                                22                                *                                                                                +                                                                  h                                  21                                  *                                                                                h                                31                                                                                -                                                                  h                                  32                                                                                h                                32                                *                                                                                +                                                                  h                                  31                                  *                                                                                ]                                                                    6                        ×                        2                                                                                [                                                                                x                                1                                                                                ⅇ                                jθ                                                                                x                                2                                *                                                                                ⅇ                                jθ                                                                                ]                                                                            2                    ×                    1                                                  +                                                      [                                                                                n                                                          1                              ,                              t                                                                                n                                                          1                              ,                                                              t                                +                                1                                                                                *                                                                                n                                                          2                              ,                              t                                                                                n                                                          2                              ,                                                              t                                +                                1                                                                                *                                                                                n                                                          3                              ,                              t                                                                                n                                                          3                              ,                                                              t                                +                                1                                                                                *                                                                                ]                                                        6                    ×                    1                                                                                ;                            (        4        )                                                                                G                                  2                  ×                  6                                            =                                                                            pinv                                                        (                    H                    )                                                  =                                                                            (                                                                        H                                                      6                            ×                            2                                                    H                                                ·                                                  H                                                      6                            ×                            2                                                                                )                                                              -                      1                                                        ·                                      H                                          6                      ×                      2                                        H                                                                                =                                                                                1                                                                  ∑                                                  i                          =                                                      1                            :                            3                                                                                ∑                                                      j                            =                                                          1                              :                              2                                                                                h                          ij                          2                                                                                ·                                      [                                                                                +                                                          h                              11                              *                                                                                +                                                          h                              12                                                                                +                                                          h                              21                              *                                                                                +                                                          h                              22                                                                                +                                                          h                              31                              *                                                                                +                                                          h                              32                                                                                -                                                          h                              12                              *                                                                                +                                                          h                              11                                                                                -                                                          h                              22                              *                                                                                +                                                          h                              21                                                                                -                                                          h                              32                              *                                                                                +                                                          h                              31                                                                                ]                                                              ;                                                          (        5        )                                                      X                          2              ×              1                                =                                    [                                                                                x                        1                                                                                ⅇ                        jθ                                                                                x                        2                        *                                                                                ⅇ                        jθ                                                                                ]                        =                                                            G                                      2                    ×                    6                                                  ·                                  Y                                      6                    ×                    1                                                              +                              N                                  2                  ×                  1                                                                    ;                            (        6        )
where * represents the complex conjugate of the corresponding symbol (each symbol in the equations (1)˜(6) are complex numbers), X2×1 represents the data signal matrix, Y6×1 represents the received signal matrix after being fast Fourier transformed, H represents the channel coefficient matrix, G2×6 represents the gain matrix, N2×1 represents the noise matrix, HH represents the Hermitian transpose of the channel coefficient matrix H, each element hij in the matrix H represents the channel coefficient between one transmitting antenna and one receiving antenna, nj and nj,t+1 represent noise, yi,t and yi,t+1 represents the received signals from the Ith receiving antennas RX after being fast Fourier transformed, and xj represents the data signal. Therefore, in data tone, the equalizer 124 can estimate the phase error θ according to the equations (1)˜(6). The PLL 126 adjusts its phase according to the estimated phase error θ and enables the timing/phase compensation device 123 to correctly compensate the timing/phase of the received signals.
However, in the equation (6), the value of the gain of the gain matrix G is not relatively large enough (compared to the noise), and thus the noise matrix N cannot be ignored, which affects the accuracy of the estimation of the phase error θ.
Furthermore, in the MIMO OFDM communications system, the number of the receiving antennas has to be larger than the number of the transmitting antennas. In other words, the number of the receiving antennas cannot be less than the number of the transmitting antennas. Assuming the number of the transmitting antennas TX is 2, and the number of the receiving antennas RX is 1 (a 2T1R OFDM communications system), therefore, the received signals can be derived from the following equations:
                                          y            1                    =                                                    [                                                      h                    11                                                                                h                    12                                                  ]                                                          [                                                                                x                          1                                                                                ⅇ                          jθ                                                                                x                          2                                                                                ⅇ                          jθ                                                                                ]                                      =                                                            (                                                                                h                        11                                                                                x                        1                                                              +                                                                  h                        12                                                                                x                        2                                                                              )                                                                  ⅇ                  jθ                                            +              noise                                      ;                            (        7        )            where y1 represents the received signal after being fast Fourier transformed, x1 and x2 represent the pilot signals, h11 and h12 represent the channel coefficients. If x1=1, x2=−1, and h11, and h12 are almost the same, in this condition, the received signal y1 approximately equals the noise, and consequently the phase error θ cannot be estimated, which is why in the MIMO OFDM communications system, the number of the receiving antennas has to be larger than the number of the transmitting antennas.

Method for estimating phase error in MIMO OFDM communications system


Approaches for placing a plurality of input/output blocks (IOBs) of an electronic design in an integrated circuit are disclosed. The electronic design includes at least one input/output bus associated with a plurality of the IOBs, and the IOBs for each input/output bus are assigned to respective sets. For each combination of pairs of the sets a respective weight factor is generated to indicate a degree of coupling between the first and second sets in the electronic design. An order of the sets is generated, and the sets are placed in an ordered series of input/output sites in the integrated circuit according to the order of the sets. A cost function is evaluated for the pairs of the sets. The generating of the order of the sets and the placing of the sets is conditionally repeated responsive to the evaluating of the cost function.

The development of an integrated circuit may include physical placement of functional blocks of an electronic design on the integrated circuit. For an application-specific integrated circuit (ASIC), various functional blocks may be placed within the area of the ASIC and the functional blocks may be interconnected by routing wires between the placed functional blocks. For a programmable logic device (PLD) integrated circuit, various functional blocks may be placed in programmable input/output and logic resources of the PLD and the functional blocks may be interconnected by programmable routing resources of the PLD.
The large number of possible placements of functional blocks of an electronic design may result in difficulty in finding a good placement that achieves the objectives for the electronic design. Consideration of even a small portion of the possible placements may not be practical. For example, consideration of a small portion of the possible placements using automatic generation of the placements may require more computational time than is practical. In addition, the best placement found in a practical amount of computational time during automatic generation may be significantly inferior to a good placement that is manually generated.
An automatic generation of a placement may result in a placement that does not match certain features of a manually generated placement. For example, a designer of a manually generated placement may systematically place related blocks. The apparently random placements from automatic generation may cause concern on examination by a designer. The placements of input/output blocks (IOBs) of the electronic design may be especially visible to designers because the placement of IOBs affects the design of a printed circuit board designed to carry the integrated circuit. An apparently random placement of IOBs may make development of the printed circuit board more difficult and time-consuming.
The present invention may address one or more of the above issues.

Placement of input/output blocks of an electronic design in an integrated circuit


A suction-restricted radial piston pump is described, in particular for use with automotive vehicles. The pump delivers a flow constant over a broad speed range and involving low losses in output and generating only negligible noise. In one embodiment, a control slot (13), on the pressure side, is subdivided into several grooves (27,28) which at least in part are in communication, through check valves (32), with the pressure connection (20). An alternative embodiment provides a shape of the pressure-sided control slot in which the introducing end thereof is comparatively narrow to reduce noise at a high speed and the outlet-sided end thereof with a wider width sufficient to meet the required output. According to a third embodiment, the suction-sided slot (12) is provided with a narrow width section and a subsequent wider width section.

This invention is concerned with a suction-restricted piston pump, in particular, a radial piston pump. Piston pumps are frequently actuated by varying speed drive units, such as internal combustion engines. However, the required flow rate, frequently, is available at a low drive speed, and does not increase with a rising drive speed.
To adapt the supply characteristic to this requirement, DE-AS 20 61 960 describes a radial piston pump having cylinders radially disposed in a housing approximately lying within a plane, and spring-loaded pistons actuated by an eccentric, wherein the pumped fluid is drawn in through grooves disposed circumferentially of the eccentric. The fluid is pumped through hollow pistons and through at least one check valve in the housing. The pistons are configured as throttles in that a restriction plate is respectively provided between a shoulder in the eccentric-sided end of the pistons and the restoring springs. This configuration insures that, with a rising speed, an increasing resistance is created on the pump fluid on the suction side so that the volumetric delivery, after the pump reaches a predetermined speed, no longer rises linearly with speed but rather reaches a maximum value which is almost independent of further pump speed increases.
Hydraulic oils are only slightly compressible. The pressures developing during movement of the piston can, therefore, become very high, resulting in overloading of the pump, or causing the pump to be stalled.
To overcome this problem, control slots have been provided both on the intake side and on the pressure side, which extend over a major area along the direction of movement of the piston bore to thereby steady both the suction and the pumping operation. Pumps of this type, generally, are satisfactory in operation.
However, substantial problems will arise once it is attempted to have such pumps provided with control slots employed in suction-restricted operations. As long as the operation is still in a low speed range, the cylinders are completely filled with pressure fluid, as in pumps with no suction-restricted operation, and hence, a pump of this type operates as a pump with no suction restriction. However, once a critical speed is exceeded, the respective pumping chambers, during the suction process, no longer are completely filled with hydraulic fluid so that a very low pressure or vacuum prevails within the pressure chamber upon commencement of the compression operation of the piston. If a vacuum forming pumping chamber of this type has access to the pressure of the pressure-sided control slot under the output pressure of the pump, the pumping chamber is abruptly filled with pressure fluid which, in the continued rotary movement of the pumping chamber, is compressed in the usual manner and prior to reaching the end of the pressure-sided control slot, is again forced out by the piston.
The operations described hereinbefore result in substantial noise, which is very disadvantageous, especially so if the working environment of the pump is quiet. This applies, for example, to modern automotive vehicles increasing levels of noise suppression. Incidentally, the movement of the pressure fluid from the pressure channel, through the pressure-sided control slot, into the pumping chamber and back involves a substantial loss in output, thereby unnecessarily loading the drive unit of the pump.
The afore-described operations, in analogy, also apply, in modified form, to the suction side so that also in this respect measures will have to be taken to insure a noise reduction and to reduce losses in output. However, in this respect, it will have to be noted that the vacuum in the pumping chamber developing on the suction side can be more easily controlled than the incompressible hydraulic fluid on the pressure side. It is, therefore, quite possible, by reducing the length of the suction-sided slot, to attain a throttling effect, thus foregoing the provision of a separate throttle, thereby insuring an enhanced output and a reduced noise development. The length of the suction-sided slot is only a fraction of the length of the pressure-sided slot. Optionally, the suction-sided slot can be eliminated altogether.
Thus, a disadvantage involved with the state-of-the-art types of pumps resides in the non-uniform delivery occurring during operation on an effective restriction of the suction flow, creating steep pressure drops, during opening of the pressure valves, and mechanical noise during opening and closing of the pressure valves. Accordingly, conventional pumps are relatively noisy in operation for which reason they are not suitable for a variety of end-use applications, such as in private passenger cars.
A radial piston pump of the afore-mentioned type is also known from DE 37 00 573 A1. The rotor of the prior known radial piston pump is rotatably disposed on a control pin which is provided, in the plane of the piston bores, with two control slots of a large cross-section compared to the piston bores, and being substantially uniform throughout the length thereof. To reduce non-uniformities of the liquid flow, in the conventional radial piston pump, a restricting communication leads from the high-pressure control slot, to a pressure chamber formed in the control pin. A passageway emerges from the pressure chamber which terminates on the web and approximately at the outer dead center between the low pressure control slot and the high pressure control slot, based on the direction of rotation of the rotor and, periodically, is in communication with the pumping chambers in the piston bores. This is to insure an improved switch-over from the low pressure side to the high pressure side at the dead center. However, that measure is not suitable to avoid, in a control of the rating, through restriction of the suction flow, pressure pulsations when the piston bore pumping chamber is only partly filled during the suction stroke passes to the high pressure level of the control slot of the pressure side. Piston pumps of that type, hitherto, have not been used with a suction-restricted control on the intake side.
The invention, therefore, has as its object to reduce noise and power requirements of the above described type of pump by simple means.


A dynamic, intelligent user interface for an on-line, virtual application whereby user input customizes the subsequent display of application data and queries presented to the user/applicant. The present invention includes a facility for intelligent editing, data state presentation, and error flagging and correction. In one embodiment of the present invention, the intelligent user interface is implemented as part of a series of dynamically generated web pages (a form set) presented to a user of an ecommerce Internet web site. This presentation is in the form of a collection of tabbed panes of data, the selected pane being displayed on a web page, wherein each pane contains one or more pages of data and queries. This organization and presentation of the virtual application provides re-entrant editing; error trapping, flagging, and correction; and easy navigation from sub-pane to sub-pane (page to page) within each pane and from pane to pane using the tabs and conventional browser Back and Forward button functionality.

1. Field of the Invention
The present invention relates generally to computers and, more particularly, to computer-implemented systems for interfacing with application forms over on Internet or intranet.
2. Description of the Related Art
Computer systems are routinely used to generate insurance quotes based on information provided by the insured. The information that is provided by the insured varies depending on both the subject of the insurance policy to be underwritten and the type of coverage desired. For instance, in the case of automobile insurance the information provided by the insured includes information about the vehicle or vehicles to be covered under the policy, the driver or drivers to be covered under the policy, and the type of coverage requested by the insured.
Since insurance quotes are typically based on statistical data which is correlated to the information provided by the insured, computers can greatly reduce the time and expense associated with generating insurance quotes. In particular, computer quoting systems allow insurance agents to provide accurate quotes to potential clients in a matter of minutes by inputting the client's information into the system and automatically generating quotes based on the information provided by the client.
The increasing popularity of the Internet and the World Wide Web (the web) have led to the development of automated insurance quoting systems that are accessible directly over the web. Operation of one such system is illustrated in FIG. 1. In automated insurance quoting operation 100 of FIG. 1, a computer program is first executed in stage 110, whereby information is collected from a user of a client computer connected to a server computer via the Internet. The information collected in stage 110 varies accordingly to the type of insurance quote requested by the user (e.g., automobile, homeowner, life, health) and may include information about the user (e.g., name, address, date of birth), information about the subject of the insurance policy to be underwritten (e.g., automobile information for auto insurance, medical history for health insurance) and information about the type of coverage requested (e.g., deductible amount, maximum liability). In stage 120, the computer program evaluates the information provided by the user and generates a number of insurance quotes by comparing the information provided by the user with insurance rate information provided by insurance carriers.
A quote pad page is then presented to the user in stage 130. The quote pad page contains information about both on-line and off-line quotes available to the user. On-line quotes can be presented directly to the user by the computer program, while off-line quotes are sent to the user by alternate means such as e-mail or regular mail at a later time. In stage 150, the user elects whether to receive off-line quotes, in which case operation 100 proceeds to stage 152. Otherwise, if the user elects to receive on-line quotes, operation 100 proceeds to stage 190.
In addition, during stage 130, the user can opt to save the information already entered for use at a later time by accessing an account creation page in stage 140.
In stage 152, off-line quoting, the user enters additional personal contact information. Stage 154 then determines whether any agents are able to provide a quote to the user, in which case operation 100 proceeds to stage 160; otherwise operation 100 proceeds to stage 170. In stage 160, an agent selection page is presented to the user. The user then selects an agent from whom to receive an off-line quote. The user information is then sent to the selected agent who, in turn, sends a quote to the user, typically, by mail.
In case the user elects to receive on-line quotes from companies that do not require agents to present quotes, a page displaying the quote details is presented to the user in stage 190. If the user then elects to request coverage, personal contact information is entered by the user in stage 195 and forwarded to the quoting insurance company for further processing of the insurance application. Operation 100 then proceeds to stage 170.
Finally, in stage 170, a thank you page is presented to the user summarizing the quotes presented and providing the user with a further option for storing the information entered by accessing the account creation page in stage 180.
This system, however, presents some limitations. The process used in the prior art to fill out the application is essentially linear, and this has caused some confusion among applicants and users of the system who want to make changes in information already entered. Specifically, those wishing to comparison shop for insurance covering a variety of situations (for example, different drivers or cars on an automobile policy or different residence locations on a homeowners policy) have been frustrated by having to re-enter all or part of the information required in the application.
Furthermore, the common convenience of the "Back" and "Forward" buttons (provided in all well-known Internet browsers) generally does not function properly when filling in on-line forms. Information is often lost when attempting to use the Back and Forward buttons to navigate within a multi-page virtual (on-line) form, particularly when using so-called "secure" forms such as those commonly employed in on-line ecommerce transactions.
What is needed is an intelligent on-line application form set that automatically configures itself, the questions it asks, and the data it displays in response to user/applicant input. Such an intelligent on-line application must also properly trap and handle user errors. Such trapping should include alert the user in a timely manner and provide an easy way to correct all errors.
Such an intelligent application would better personalize the on-line application process. It should allow easy navigation between arbitrary web pages and/or sections of the virtual application, including conventional use of browser Back and Forward navigation button functions.

Dynamic tabs for a graphical user interface


A scanning tunneling microscope has an STM unit including a probe for scanning the surface of an object. The STM unit has at its outer peripheral surface a cylindrical enclosing member extending towards an object table. When the object is observed, the object table is elevated or the STM unit is lowered, so that the enclosing member is urged upon the table. The table and the STM unit constitute one body. As a result, relative movement between the object and the probe can be prevented, and also influence due to vibration can be prevented. In addition, the enclosing member isolates the object and the probe from the outside space, whereby electric noise, magnetic noise, sound noise and air flow are shielded. Thus, the influence due to external vibration can be reduced, and the stability is enhanced.

1. Field of the Invention
The present invention relates generally to a scanning tunneling microscope (STM) and more particularly to a scanning tunneling microscope including an optical system for optically observing an object.
2. Description of the Related Art
A scanning tunneling microscope (STM) was proposed by Binnig et al. in 1982 in U.S. Pat. No. 4,343,993. A sharply pointed probe is approached to the surface of an object, and a bias voltage is applied across the probe and the object. Consequently, a tunnel current flows between the probe and the object. It is known that the distance between the probe and the object varies by about one Angstrom, and that the tunnel current varies by about one order of magnitude. The STM utilizes the property of the tunnel current, thereby measuring the surface configuration of the object in an atomic level. For example, the probe is caused to scan the surface of the object, while the distance between the object and the probe is controlled to keep the value of the tunnel current constant. The position of the probe is recorded to obtain an image reflecting the surface configuration of the object in an Angstrom level.
The resolution of the STM is very high. Thus, the STM is not suitable for observation of a broad area on an object with low magnifying power, for selecting an observation region. Under the situation, there has been proposed an STM in which an optical microscope is built (hereinafter, called "optical microscope-built-in STM"). This type of STM includes an observation optical system capable of optically observing the surface of the object.
In the optical microscope-built-in STM, a conventional optical microscope is generally employed. For example, such an optical microscope has a revolver with a plurality of objective lenses. The objective lens is replaced by rotating the revolver. According to an optical microscope-built-in STM, STM units (each including a probe and a probe scan mechanism), in place of the objective lenses, are attached to the revolver.
In this type of optical microscope-built-in STM, an elevation stage for mounting an object table thereon and an STM unit are supported by a microscope body only at one side. Thus, the STM is easily affected by external vibration, and there is a relative displacement (a phase difference of vibration) between the probe and the object. In addition, space is present between the probe and the object, the STM is affected by air flow, external electric noise, and magnetic noise.


The invention relates to a device for heat sealing two layers of foil material. To that end, the device comprises two blocks arranged opposite each other and conveying means for guiding the foil material between these blocks. Between the blocks, at least one heating element is provided, for heating the foil locally, and at least one circulating belt (20), which, in use, is guided along the blocks. The circulating belt (20) is built up from at least one layer of resilient material, so that a force applied by the blocks to the foil material is uniformly distributed over the sealing seam to be formed. The invention further relates to a circulating belt for use in a device according to the invention.

Such a device is known from WO 01/85434 of applicant. This known device can be used for instance for sealing bags manufactured from foil material tight, after these have been inflated with air or a different suitable filling medium. The thus obtained bags can be used as, for instance, filling material in packages, for the protection of products included in these packages. The known device comprises a sealing block provided with a sealing thread, and a counter block arranged opposite this sealing block, provided on a side facing the sealing block with a layer of resilient material. This ensures that a sealing force, applied by the counter block, is evenly distributed over the foil material to be sealed, so that an even sealing seam is obtained, of constant quality. Further, two Teflon circulating belts are provided, which are guided along the sealing surfaces facing each other of the sealing block and counter block, and between which, in use, the foil material is carried along. These circulating belts prevent direct contact between, on the one side, the foil material and, on the other side, the sealing block with the sealing thread and the counter block with the resilient layer, so that adhesion between the parts mentioned is prevented.
A drawback of this device is that between the resilient layer and the circulating belt guided therealong, considerable frictional forces can occur, which leads to wear. Furthermore, this may slow the circulating belt down, so that speed differences with respect to the other belt are formed. This leads to irregular pulling forces to the foil material, as a result of which this may begin to crease or deform otherwise, resulting in deformed sealing seams. Further, as a rule, resilient materials have a limited heat conduction coefficient or a great insulating action. With a device according to the invention, this causes heat given off by the sealing thread to be retained between the sealing block and the counter block, at least being insufficiently discharged, so that the sealing temperature rises and is difficult to control. This is unfavourable to the sealing quality.

Sealing device for heat sealing foil material


An ESD protection system includes an ESD leakage bus and an ESD protection circuit having one of its terminals connected to the ESD leakage bus. The ESD protection circuit includes at least a pair of amorphous silicon thin film transistors which are connected in a back-to-back manner, and a first shading layer is provided over the channels of the pair of amorphous silicon thin film transistors. When the ESD protection system is applied to an X-ray flat panel detector, no photocurrent will occur during the use of the X-ray flat panel detector, the effect of the photocurrent on the voltage of the scan line is reduced. Further, when the first shading layer is connected to a negative fixed potential, it can be ensured that the ESD protection circuit has small threshold voltage while the leakage current in the ESD protection circuit is reduced, and power consumption is reduced.

The invention relates to an ESD protection system, and particularly to an ESD protection system for protecting an X-ray flat panel detector. Further, the invention relates to an X-ray flat panel detector with an ESD protection system.
Presently, there are two types of X-ray flat panel detectors in the market: one is of an indirect energy conversion type, and the other is of a direct energy conversion type. Due to its advantages such as high conversion efficiency, wide dynamic range, high spatial resolution, and enhanced environmental adaptability, the indirect energy conversion type of X-ray flat panel detector has become the most popular detector in the X-ray flat panel detector market.
As shown in FIG. 1, the indirect energy conversion type of X-ray flat panel detector, hereinafter referred to as an X-ray flat panel detector, includes multiple scan lines 2, hereinafter referred to as gate lines, and multiple data lines 3 which are formed on a substrate (not shown). Scan lines 2 and data lines 3 are arranged in an intersecting manner to form multiple pixel regions. A pixel unit 4 is provided in each of pixel regions. A flicker layer or a phosphor layer (not shown) is formed on the substrate and covering the pixel region. Each pixel unit 4 includes a photodiode 5 and a pixel switch 6 having a terminal thereof connected to photodiode 5. The photodiode 5 is adapted to convert visible light into electrical charges. Photodiode 5 is generally formed of amorphous silicon, because amorphous silicon and its alloy, such as amorphous silicon doped with germanium, have high photo-electric conversion function in the wavelength of visible light, has better anti-radiation performance for radiation with high energy, and can be fabricated in large scale. Pixel switch 6 is adapted to control pixel unit 4 to be switched on or off. Pixel switch 6 may be an amorphous silicon thin film transistor or a diode. Pixel switches 6 in each row of pixel units 4 are connected to the same data line 3. Pixel switches 6 in each column of pixel units 4 are connected to the same corresponding scan line 2. The data lines 3 are connected to a data processing unit 7, hereinafter referred to as a readout unit, and scan lines 2 are connected to an address control unit 8, hereinafter referred to as a gate drive unit.
The working principle of the above X-ray flat panel detector is as follows. An X-ray generates the visible light after passing through the flicker layer or the phosphor layer. The visible light is converted into charges by photodiode 5 of pixel unit 4. The charges are stored in photodiode 5. Address control unit 8 applies a line-by-line voltage on scan lines 2 in the pixel array 1, so that pixel switches 6 are switched on line-by-line. The charges stored in photodiode 5 are then output to data processing unit 7 via data lines 3. Data processing unit 7 further performs processes, such as an enlargement and an analogy to digital conversion, on the obtained electrical signal, and thus image information is obtained.
Because the thin films in the photodiode and the TFT (i.e., the pixel switch) in the X-ray flat panel detector are extensive and have large area, electro-static discharge (ESD) is prone to occur during the process of designing, fabricating, assembling and testing of the X-ray flat panel detector. Nearly all of the microelectronic circuits will be very sensitive to the ESD, and thus electro-static protection should be provided for the X-ray flat panel detector, for improving its yield and reducing its production cost.
The ESD protection system of existing X-ray flat panel detectors includes a shorting bus and a metal-insulator-metal diode (MIM diode). However, these ESD protection systems have many problems, such as incompatibility with the testing and maintaining requirements of X-ray flat panel detectors.
To solve the above problems, as shown in FIG. 1, an ESD protection system for providing an ESD protection for an X-ray flat panel detector is disclosed in a US patent publication No. US2006/0092591A1 published on May 4, 2006 and titled "On-Substrate ESD Protection For Array Based Image Sensors". As shown in FIG. 2, the ESD protection system includes an ESD leakage bus 10 formed on a substrate (not shown) and an ESD protection circuit 11 formed on the substrate, where the ESD leakage bus may be grounded. ESD protection circuit 11 has a first wiring terminal 12 connected to ESD leakage bus 10 and a second wiring terminal 13 connected to scan line 2 of the X-ray flat panel detector.
FIG. 3 is a schematic diagram of an equivalent circuit of the ESD protection system depicted in FIG. 2. ESD protection circuit 11 includes a pair of amorphous silicon thin film transistors, i.e., a first amorphous silicon thin film transistor 15 and a second amorphous silicon thin film transistor 16, connected in a back-to-back manner. When ESD occurs on scan line 2 of the X-ray flat panel detector, when the voltage between first wiring terminal 12 and second wiring terminal 13 of the ESD protection circuit is two times larger than the threshold voltage of the thin film transistors, then first amorphous silicon thin film transistor 15 and second amorphous silicon thin film transistor 16 will be switched on, ensuring that the ESD can flow from the scan line 2 into ESD leakage bus 10 in a short time, and thus prevent a part of the detector from being broken-down by the ESD voltage or prevent a generation of a TFT threshold voltage drift or other damages.
FIG. 4 is a sectional view of the first amorphous silicon thin film transistor in the above ESD protection circuit. First amorphous silicon thin film transistor 15 is formed on the substrate 17. Transistor 15 includes a gate 18, an active layer 19 located above gate 18, and a source 20 and a drain 21 are located above active layer 19. Active layer 19 includes an amorphous silicon (a-Si) layer 19a and a N+ amorphous silicon layer 19b located above a-Si layer 19a. As shown in FIG. 3, in ESD protection circuit 11, second amorphous silicon thin film transistor 16 has the same structure as that of first amorphous silicon thin film transistor 15.
As shown in FIG. 3 and FIG. 4, it can be seen from the working principles of the X-ray flat panel detector that in the normal use of the X-ray flat panel detector, the X-ray will irradiate the flicker layer or the phosphor layer above the pixel unit, and then be converted into visible light by the flicker layer or the phosphor layer. Because the pixel unit and the ESD protection circuit of the X-ray flat panel detector are formed on the same substrate, the visible light will radiate the ESD protection circuit while radiating the pixel unit. Therefore, first amorphous silicon thin film transistor 15 and second amorphous silicon thin film transistor 16 in the ESD protection circuit will also be exposed to a visible light 22. However, because the channels of first amorphous silicon thin film transistor 15 and second amorphous silicon thin film transistor 16 include amorphous silicon which can convert the visible light into charges, large photocurrent will occur in the ESD protection circuit during the working process of the X-ray flat panel detector.
Since the ESD protection circuit is connected to the scan line of the X-ray flat panel detector, the photocurrent will affect the voltage on the scan line, so that an actual voltage value on the scan line will be deviated from an ideal voltage value. This deviation in scan line voltage will result in the fluctuation of the finally obtained electronic image, e.g. horizontal and vertical stripes will occur in the image, and an increased noise level. In order to make the voltage on the scan line meet the requirements, the voltage on the scan line may be corrected or compensated by an external circuit of the X-ray flat panel detector, which will cause a waste of driving power consumption.
Further, if the pixel switch of the pixel unit is formed by an amorphous silicon thin film transistor, then the amorphous silicon thin film transistor of the ESD protection circuit and the amorphous silicon thin film transistor of the pixel unit may be formed in the same fabricating step, and thus the two thin film transistors have the same threshold voltage. In order to reduce the driving power consumption of the thin film transistor of the pixel unit, and to ensure that the thin film transistor of the ESD protection circuit may be switched on under a relatively low ESD voltage, the thin film transistor of the ESD protection circuit and the thin film transistor of the pixel unit generally have a threshold voltage between 1V and 3V. However, when the X-ray flat panel detector is driven to work normally, the voltage applied on the scan line is normally between −10V and +25V. Because the ESD protection circuit is connected to the scan line of the X-ray flat panel detector, the voltage applied on the thin film transistor of the ESD protection circuit is also between −10V and +25V. Then, a large leakage current will occur in the ESD protection circuit, no matter if the voltage applied on the scan line is a positive voltage or a negative voltage, which will result in a large leakage current on the scan line and cause a great waste of driving power consumption.
Therefore, in the X-ray flat panel detector with the above common ESD protection system, there is a need to maintain a small threshold voltage in the ESD protection circuit while reducing a great waste of driving power consumption in the X-ray flat panel detector.

ESD protection system and X-ray flat panel detector

Shanghai Tianma Micro-Electronics Co., Ltd.


A system for optimizing a flap setting of an aircraft may include a flap optimizing computer configured to compute an optimum flap setting for one or more flaps of an aircraft. The system may further include a flap control system communicatively coupled to the flap optimizing computer. The flap control system may be operable to select any one of a plurality of flap settings including a designated flap setting. The flap control system may be configured to automatically command the one or more flaps from a first position to a second position corresponding to the optimum flap setting in response to the selection of one of the plurality of flap settings using the flap control system.

Aircraft, such as commercial airliners, typically include control surfaces or devices mounted on the wings to improve the aerodynamic performance of the aircraft. Such control surfaces typically include wing leading edge devices and wing trailing edge devices which may be extended and/or deflected during different phases of flight to alter the lift and/or drag characteristics of the wings. For example, commercial airliners typically include trailing edge flaps which may be extended during takeoff, approach, landing, and other flight phases to increase the area and camber of the wings to increase the wing lift characteristics.
Aircraft regulatory bodies such as the Federal Aviation Administration require that aircraft meet minimum performance standards for different phases of flight. For example, Federal Aviation Regulation (FAR) 25.121 specifies a minimum climb gradient capability for an aircraft during a critical engine inoperative situation. For a twin-engine aircraft, FAR 25.121(d) specifies a minimum approach-climb gradient capability of 2.1% with one engine inoperative, the landing gear retracted, the aircraft in an approach flaps configuration, and the remaining engine at a go-around thrust setting. In addition, FAR 25.121(d) specifies that the stall speed in the approach configuration must not exceed 110 percent of the stall speed ("the 110% speed rule") for the related all-engines-operating landing configuration.
FAR 25.119 specifies a minimum landing-climb gradient capability of 3.2% with all engines operating, the aircraft in a landing flaps configuration, and the engines generating as much thrust as is possible eight seconds after advancing the throttles to the go-around thrust setting. FAR 25.1001(a) requires that a fuel jettisoning system must be installed unless it is shown that the airplane meets the climb requirements of FAR 25.119 and 25.121(d) at maximum takeoff weight, less the actual or computed weight of fuel necessary for a 15-minute flight comprising a takeoff, go-around, and landing at the airport of departure. FAR 25.1001(b) requires that if a fuel jettisoning system is required, it must be capable of jettisoning enough fuel within 15 minutes, starting with the weight given in FAR 25.1001(a), to enable the airplane to meet the climb requirements of FAR 25.119 and 25.121(d). The aircraft must be capable of meeting the more restrictive of the approach-climb requirement and the landing-climb requirement.
Conventional aircraft typically allow for extending the flaps to a limited number of flap settings. For example, certain aircraft may have flap detent settings of Flaps 1, Flaps 5, Flaps 15, Flaps 20, Flaps 25, or Flaps 30. During final approach to an airport, Flaps 25 or 30 may be selected for landing the aircraft. The flap setting will be reduced to Flaps 20 if the landing is aborted and a go-around operation is initiated. However, if the aircraft takes off with the maximum takeoff weight, the aircraft may not be able to meet the approach-climb and landing-climb requirements at the departure airport using Flaps 20 as the go-around flap setting. To compensate, the aircraft may be required to take off with a reduced gross weight by reducing the payload of the aircraft. In this regard, conventional flap control systems and/or aircraft with such conventional flap control systems may be limited in their performance and/or operational capability.

Optimized flap positioning for go-around operations


A transfer device for transferring a medical fluid from a vial to a medical fluid injection device includes a vial holder where a vial spike positioned within the vial holder is configured to enter a vial containing a medical fluid when the vial is inserted into the vial holder. An expansion chamber having an interior cavity is in fluid communication with the vial spike. A pressurized gas cartridge is positioned with the interior cavity of the expansion chamber, while a puncture tip is configured to puncture the pressurized gas cartridge when actuated by a user. The vial spike is also configured to be in fluid communication with an injection device attached to the transfer device.

Injection devices that are worn by a patient temporarily or for extended periods are well known in the medical field. The subject matter of this application relates to a transfer device for use particularly but not exclusively with the injection device described in commonly assigned PCT Published Application No. WO 2014/204894, published Dec. 24, 2014, and which is hereby incorporated by reference in its entirety. That injection device includes an internal resilient bladder that may be filled with any suitable injectable medicament, whether drug, antibiotic, biologic or other injectable, for subcutaneous injection, typically a bolus injection, into a patient while the device is being worn by the patient.
This injection device must be filled (wholly or partially) with the desired injectable before injection into the patient. The above PCT published application also discloses a variety of transfer devices for transferring an injectable into the injection device from a source such as a vial or vials. In some situations, the injectable must be diluted or reconstituted, and various devices are disclosed in the above application for accomplishing that. The present application discloses additional novel designs and improvements, allowing lower cost of manufacture and less waste to dispose, for such transfer devices for transferring, diluting and/or reconstituting. The transfer devices described herein may be variously referred to as transfer module, accessories, add-ons or by other suitable terminology, without intending any limitation on the structure or function of the device not set forth herein.

Pressurized gas powered liquid transfer device and system


A joint structure for directly joining a plurality of pipes is provided. A first pipe 10 has a joined end face 11 obtained by laser machining at a predetermined angle to an axis and a tenon 12 formed on a joined end face. A second pipe 20 has a joined end face 21 obtained by laser machining at a predetermined angle to an axis and a mortice 22. By fitting the tenon 12 of the first pipe 10 to the mortice 22 of the second pipe 20, a joint structure of the two pipes 10, 20 is formed. The joined end face 11 of the first pipe 10 and the joined end face 21 of the second pipe 20 are on surface contact over the entire thickness of the pipe.

1. Field of the Invention
The present invention relates to a joint structure of a pipe.
2. Description of the Related Art
FIG. 7 is a perspective view showing a conventional joint structure of a pipe, and FIG. 8 is a block diagram of parts.
In the conventional joint structure for connecting ends of four pipes to each other, for example, a pipe 1, a pipe 2, a pipe 3 and a pipe 4 are prepared and a joint member 5 is prepared as a separate member, and after each of the pipes are abutted to the joint member 5, welding W1 is performed at joined portions to join them.
That is, it is structurally difficult to directly join the ends of the four pipes to each other, and the joint member 5 is required. This joint member 5 is made by forging of a steel material, for example.
For welding to be conducted at the joined portion, beveling machining is needed on the pipes and the joint member.
The joint structure of a pipe structure is disclosed in Japanese Patent Laid-Open Publication No. 05-295800 and Japanese Patent Laid-Open Publication No. 2001-165126.
Use of a joint member was indispensable in the above-mentioned conventional structure.
Therefore, an object of the present invention is to provide a joint structure of a pipe which can directly join ends of a plurality of pipes.


A gate insulating film which is an oxide layer mainly made of SiO2 is formed over a silicon carbide substrate by thermal oxidation, and then, a resultant structure is annealed in an inert gas atmosphere in a chamber. Thereafter, the silicon carbide-oxide layered structure is placed in a chamber which has a vacuum pump and exposed to a reduced pressure NO gas atmosphere at a high temperature higher than 1100° C. and lower than 1250° C., whereby nitrogen is diffused in the gate insulating film. As a result, a gate insulating film which is a V-group element containing oxide layer, the lower part of which includes a high nitrogen concentration region, and the relative dielectric constant of which is 3.0 or higher, is obtained. The interface state density of an interface region between the V-group element containing oxide layer and the silicon carbide layer decreases.

The present invention relates to a silicon carbide-oxide layered structure including a silicon carbide layer, a production method thereof, and a semiconductor device produced by using the silicon carbide-oxide layered structure.
In recent years, applications of silicon carbide (SiC) to low-loss power devices have been expected because silicon carbide has a structure where Si and C are bonded at the composition ratio of 1:1 and has high breakdown tolerance as compared with other wide band gap semiconductor materials.
One of the most practicable applications of SiC to a power device is the application to a SiC device for power driving which has an insulated-gate transistor, i.e., a SiC-MISFET structure, wherein SiC is subjected to thermal oxidation to form a high-quality SiO2 film on a SiC layer.
In order to realize a low-loss power device having a SiC-MISFET structure, it is necessary to reduce defects in a gate insulating film and an interface between a SiC layer and the gate insulating film such that the channel mobility of 200 cm2/Vs or higher is achieved.
An inverted MISFET, which is formed using a 4H—SiC (1 1-2 0) substrate whose principal surface is a (1 1-2 0) face, achieves the channel mobility of 200 cm2/Vs or higher. However, the 4H—SiC (1 1-2 0) substrate is not suitable for mass production and is therefore difficult to be used as a substrate for commercial devices.
A large number of techniques for forming a gate insulating film on a SiC (0 0 0 1) face substrate, which is suitable for mass production, have been proposed until now (see, for example, L. A. Lipkin and J. W. Palmour, J. Electron. Mater. 25, 909 (1996) and G. Y. Chung, C. C. Tin, J. R. Williams, K. McDonald, R. K. Chanana, Robert A. Weller, S. T. Pantelides, Leonard C. Feldman, O. W. Holland, M. K. Das, and John W. Palmour, "Improved Inversion Channel Mobility for 4H—SiC MOSFETs Following High Temperature Anneals in Nitric Oxide" IEEE Electron Device Lett., vol. 22, pp. 176-178, 2001). According to one of the most standard processes, a thermal oxide film is formed at a high temperature of 1100° C. or higher in a dry or wet atmosphere and annealed in an argon atmosphere, and then, the thermal oxide film is subjected to the POA in an oxygen atmosphere containing highly-concentrated water vapor at 950° C. for 3 hours, whereby a gate insulating film is formed. Under the condition where a high temperature thermal treatment is not performed for gate electrode formation, an inverted MISFET formed on a 4H—SiC (0 0 0 1) substrate having a flat surface, in which asperities are 10 nm or smaller, has the channel mobility of about 50 cm2/Vs.
However, in a MISFET having a gate insulating film formed of a thermal oxide film according to the above-described standard process, a thermal treatment at 950° C. or higher in the gate electrode formation process deteriorates the actual channel mobility to 20 cm2/Vs or lower. A MISFET formed on a 4H—SiC (0 0 0 1) substrate having poor flatness, i.e., having steps over the surface, according to the above-described standard process, has the channel mobility of 10 cm2/Vs or lower. In this MISFET, the channel mobility over the surface of the SiC substrate has a large anisotropy. In this structure, a large electric current flows along the steps whereas an electric current which traverses the steps is smaller by an order of magnitude than the large electric current flowing along the steps. Thus, such problems greatly impede the application of the above techniques to commercial devices.

Silicon carbide-oxide layered structure, production method thereof, and semiconductor device


To improve the exchange of data between controls of machines, particularly robots, a method is provided for the exchange of such data, wherein a first control produces an instruction to be transmitted with data to be sent to a second control and with an identification representing the second control. The instruction to be transmitted is provided with an identification of the first control, wherein the first control sends the instruction to be transmitted to the second control, wherein the second control evaluates the data of the instruction and wherein the second control provides the first control with an acknowledgment.

The transmission of data between controls of machines at present only takes place by means of direct links, either in the form of directly wired inputs and outputs or by means of data transmission field bus systems, while commands or instructions cannot be transmitted in this way. Commands must be given by means of operator elements or a mainframe computer. The corresponding data are transmitted as such directly between the two controls.
The hitherto known procedure is complicated, because physical inputs/outputs or the field bus system must be made available. Coincidence must be brought about on both controls, so that the inputs/outputs have the same significances. As the controls do not normally communicate directly via a field bus, but instead by means of an interposed plant programmable logic control (PLC), the latter must take account of a 1:1 mapping in the inputs/outputs. If communication between the controls is to be extended, this involves a change to the control programs of the input and output configuration (additional field bus words, additional lines for physical inputs/outputs, additional programming expenditure on the PLC side).
The problem of the invention is to overcome the indicated disadvantages and in particular permit a simplification and simple extendibility of communication between two or more controls, whilst largely eliminating fault-prone intermediate layers.

Method for the exchange of data between controls of machines, particularly robots


A three-axis vibration acceleration pickup with the handle of a vibration-generating tool such as, an angle grinder or the like, feeds detected vibrations along the three axes to an A/D converter 19. A microcomputer processes the digitized data to feed a display portion. Each time continuous operation of the tool is interrupted, an 8-hour equivalent acceleration value is obtained based on the detected vibration acceleration signal. The result is added to previous acceleration values so as to accumulatively add up the total value in one day. Each time continuous operation is interrupted, a frequency load vibration acceleration value is obtained, and an 8-hour equivalent acceleration value is obtained based on this. A residual surplus time is obtained and displayed by using the 8-hour equivalent acceleration value.

1. Field of the Invention
The present invention relates to a human body vibration evaluating apparatus and a holding vibration tool which detects, analyzes and displays the vibrations to be received by the human body.
2. Background of the Invention
A holding vibration tool such as chipping hammer, grinder, impact wrench or the like transmits the vibrations from the vibration source to the hand and arm of the user. In an automobile, a bike, an electric train, and so on, the vibrations from the vibration source are transmitted to the whole body of the user.
When the hand and arm vibrations, and the whole body vibrations are applied upon the human body excessively, it is known that various influences are affected upon the user""s health and comfort. Nowadays, consciousness about the safety of the product are higher. The safety of an apparatus such as tool to be used by the person becomes a first requirement as the quality of the product. The influence to be given by the vibrations to the body of the operator or the like is one of the most important items, which demands measures on the operation spot and so on. Thus, in recent years, the relationship between the vibration exposure amount and the body influences is actively investigated. If the vibration exposure amount is limited to a specified value or less, it is found out that the health of the users of the holding vibration tool can be sufficiently retained. The ISO (International Standardization Organization), Japanese Industry Sanitation Society and so on are producing the norms of the vibration measurement and the vibration evaluation, and the guidelines on the hand and arm. The health and safety of the users of the vibration tool are retained based on such norms and the guidelines.
The vibration exposure amounts received by the operators could be evaluated only when a constant operation was continued even if such norms and guidelines as described above was used. In the actual operations which variably changed in contents of the operations even in one day, the correct grasping operation could not be always understood sufficiently as to how much the vibration exposure received by the operators up to the actual time point was applied. Thus, there is no telling how much operations can be continued, now that the correct time cannot be grasped.
Accordingly, this invention can correctly evaluate the vibrations added to the human body in the actual operations, whereby the human body can be positively protected from the vibrations applied on the human body.
A human body vibration evaluating apparatus comprises a vibration detecting means 13 for detecting the vibrations to be added to the human body, an analyzing means 20 for analyzing based on signals detected by the vibration detecting means 13, a displaying means 11 for displaying based on the analyzing results grasped by the analyzing means 20, is characterized in that the analyzing means 20 grasps an 8-hour equivalent acceleration value ahW(eqxc2x78h) about the vibrations detected continuously each time the vibrations detected continuously by the vibration detecting means 13 are interrupted, and the total 8-hour equivalent acceleration value ahW(eqxc2x78h) up to the present time point by the accumulatively adding the 8-hour equivalent acceleration value ahW(eqxc2x78h) in one day.
In the human body vibration evaluating apparatus described above, the 8-hour equivalent acceleration value of the vibrations continued is grasped each time the continued vibrations are interrupted, and it is added accumulatively within one day. Accordingly, even when the contents of the operations are variably changed within one day, the vibrations added to the human body can be evaluated correctly.
A human body vibration evaluating apparatus alternatively comprises a vibration detecting means 13 for detecting the vibrations to be added to the human body, an analyzing means 20 for analyzing based on signals detected by the vibration detecting means 13, a displaying means 11 for displaying based on the analyzing results grasped by the analyzing means 20, is characterized in that the analyzing means 20 grasps a frequency load vibration acceleration effective value ahW(eqxc2x78h) about the vibrations detected continuously each time the vibrations detected continuously by the vibration detecting means 13 are interrupted, the limit time tg where the 8-hour equivalent acceleration value ahW(eqxc2x78h) becomes a specified reference value when the vibrations are to continue is grasped by the frequency load vibration acceleration effective value ahW, and the residual surplus time tp is grasped by subtracting the total time, where the vibration is detected by the vibration detecting means 13 up to the present time point within one day, from the limit time tg.
In the human body vibration evaluating apparatus described above, the frequency load vibration acceleration effective value ahW of the continued vibrations is grasped each time the continued vibrations are interrupted, the limit time tg where the 8-hour equivalent acceleration value ahW(eqxc2x78h) becomes the specified reference value by using the frequency load vibration acceleration effective value ahW is grasped, and the residual surplus time tp is grasped by using the limit time tg. Accordingly, even when the contents of the operation are variably changed within one day, the vibrations added to the human body can be evaluated correctly, making it possible to correctly grasp how much the operation and so on can be effected continuously.
A human body vibration evaluating apparatus of the present invention, can be mounted in an apparatus for giving vibrations to the human body, of an automobile or a holding vibration tool or the like.
In the human body vibration evaluating apparatus described above, the human body can be protected positively from the vibrations to be added to the human body in an apparatus which gives vibrations to the human body, of an automobile or the holding vibration tool or the like.
A holding vibration tool includes a human body vibration evaluating apparatus of the above discussion.
According to the holding vibration tool claimed, the operator himself can easily grasp the correct evaluation of the vibrations to be added to the operator up to the actual time point in the actual operation.
A holding vibration tool is claimed, where the vibration detecting means 13 is provided in a handle portion 2.
In a holding vibration tool is also claimed, where the vibrations can be evaluated more correctly.
A holding vibration tool is also claimed, where the human body vibration evaluating apparatus is provided in a handle 2.
In the holding vibrating tool claimed, the tool can be made compacter, because a portion which is originally empty in space can be effectively used.

Human body vibration evaluation device and hand-held vibration tool


A device includes a bearing assembly, a supporting assembly, a cutting assembly, a rotation pole, and a transmitting assembly. The supporting assembly includes a driving pole rotatably supported on the bearing assembly and a pair of guiding rails positioned on the bearing assembly. The cutting assembly screws on the driving pole and is slidably supported on the guiding rails. The cutting assembly includes a cutter protruding from the top plate. The rotation pole is rotatably positioned on the bearing assembly and is configured for supporting a lens module. The transmitting assembly drives the rotation pole and the driving pole to rotate. The driving pole drives the cutting assembly to move and the rotation pole to rotate, the cutter cuts the lens module during moving along the driving pole.

1. Technical Field
The present disclosure relates to devices, and particularly to a device for disassembling a lens module.
2. Description of Related Art
Lens modules generally include a lens barrel and at least one lens received in the lens barrel. To increase usage efficiency, it is desired that the lens can be detached from the barrel and reused if the lens barrel fails to pass quality tests. However, during the current manual detaching process the lens may be damaged or contaminated.
Therefore, it is desirable to provide a device that can overcome the limitations described.


A method of forming a pair of field effect transistors having different thickness gate dielectric layers includes, a) providing a first region on a substrate for formation of a first field effect transistor s having a first gate dielectric layer of a first thickness and providing a second region on the substrate for formation of a second field effect transistor having a second gate dielectric layer of a second thickness; b) providing the first gate dielectric layer and a first conductive gate layer over the first and second regions; c) patterning the first conductive layer to define a first gate of the first field effect transistor in the first region while leaving the first conductive layer not patterned for gate formation for the second field effect transistor in the second region; d) after defining the first gate, stripping the first conductive layer and the first gate dielectric layer from the second region; e) after stripping the first conductive layer and the first gate dielectric layer from the second region, providing the second gate dielectric layer and a second conductive gate layer over the second region; and f) patterning the second conductive layer in the second region to define a second gate of the second field effect transistor in the second region. The invention has particular utility in fabrication of SRAM circuitry.

This invention arose from challenges associated with fabrication of SRAM circuitry where there is a desirability of fabricating different field effect transistors with different gate dielectric layer thicknesses. The invention will have applicability to other circuitry, such as dynamic random access memory (DRAM) and logic circuitry, as the artisan will appreciate, with the invention only being limited by the accompanying claims appropriately interpreted in accordance with the Doctrine Of Equivalents.
An SRAM cell is said to be bistable because it has two stable or self-maintaining operating states, corresponding to two different output voltages. The different output voltages correspond to a binary stored "1" or a "0". Without external stimuli, a static memory cell will operate continuously in a single one of its two operating states. It has internal feedback to maintain a stable voltage differential between the two nodes of the cell. The polarity of this voltage difference is sensed by external circuitry to determine the operating state of the memory cell. The two possible output voltages produced by a static memory cell are determined by the upper and lower circuit supply voltages. Intermediate output voltages and the performance of the devices in the SRAM cell itself.
The operation of a static memory cell is in contrast to other types of memory cells, such as DRAM cells, which do not have stable operating states. A DRAM cell can be programmed to store a voltage which represents one of two binary values, but requires periodic reprogramming or "refreshing" to maintain this voltage for more than very short time periods.
FIG. 1 shows an example prior art SRAM cell 350 such as is typically used in high-density static random access memories. Static memory cell 350 comprises n-channel pull down (driver) transistors 380 and 382 having drains respectively connected to load resistors 384 and 386. Transistors 380 and 382 are typically metal oxide silicon field effect transistors (MOSFETs) formed in an underlying silicon semiconductor substrate.
The source regions of transistors 380 and 382 are tied to a low reference or circuit supply voltage, labelled V.sub.SS which is typically referred to as "ground." Resistors 384 and 386 are respectively connected in series between a high reference or circuit supply voltage, labelled V.sub.CC, and the drains of the corresponding transistors 380 and 382. The drain of transistor 382 is connected to the gate of transistor 380 by a line 376, and the drain of transistor 380 is connected to the gate of transistor 382 by a line 374 to form flip-flop having a pair of complementary two-state outputs.
A memory flip-flop, such as that described above in connection with FIG. 1, forms one memory element of an integrated array of static memory elements. A pair of access transistors, such as access transistors 390 and 392, are provided to selectively address and access individual memory elements within the array. Access transistor 390 has one active terminal connected to the drain of transistor 380. Access transistor 392 has one active terminal connected to the drain of transistor 382. A plurality of complementary column line pairs, such as the single pair of complementary column lines 352 and 354 as shown, are connected to the remaining active terminals of access transistors 390 and 392, respectively. A row line 356 is connected to the gates of access transistors 390 and 392.
Reading static memory cell 350 requires activating row line 356 to connect outputs 368 and 372 to column lines 352 and 354. Writing to static memory cell 350 requires first placing selected complementary logic voltages on column lines 352 and 354, and then activating row line 356 to connect those logic voltages to outputs 368 and 372. This forces the outputs to the selected logic voltages, which will be maintained as long as power is supplied to the memory cell, or until the memory cell is reprogrammed.
Transistors 380, 382, 390 and 392 are typically fabricated to be NMOS field effect transistors formed from common conductive gate and gate dielectric layers. Typical SRAM circuitry fabrication also includes fabricating other circuitry external to the memory cell and array, some of which utilizes PMOS transistors. In some instances, it would be desirable to provide some of the PMOS transistors with different thickness gate dielectric layers than that used for the NMOS SRAM cell transistors.

Method of forming SRAM cells and pairs of field effect transistors


An exercise device is described. The exercise device may include a pair of separate weightlifting units removably coupled to one another. Some implementations may include one or more of the following. Each weightlifting unit may include at least one weight removably held internal to the exercise device. The at least one weight may be coupled to one of a weight bar, a weight bar threaded along at least a portion of its length, and a weight bar having a plurality of spaced apart holes there through along at least a portion of its length. The at least one weight may be held in place by one of a spring clamp, a pressure ring collar, an adjustable nut, and a pin. The adjustable nut may be an annularly cylindrical nut having threads on an inner concentric surface and diamond knurl on an outer concentric surface.

1. Technical Field
This document relates to an exercise device.
2. Background Art
Although conventional exercise devices exist, many do not imitate normal work routines such as lifting and stretching to place bags, boxes, and the like on shelves, in the trunk of cars, on trucks, and the like when they are used. Furthermore, many conventional exercise devices are poorly balanced, unsafe, too inconvenient, too intimidating to make them user friendly, and/or too expensive to make them available to the public in general. Moreover, many of these conventional exercise devices are not ergonomically correct.