A technique for providing presentation material in an on-going virtual meeting includes converting a real-world (RW) presentation into a virtual-world (VW) presentation. A media format of the VW presentation corresponds to a media format utilized by a target VW. The VW presentation is then stored in an RW media repository. The VW presentation is associated with an RW media uniform resource locator (URL). A VW screen control script is used to set a VW media URL associated with a VW screen parcel to the RW media URL. The VW presentation is then provided to participants of the VW meeting by accessing the RW media repository using the VW media URL.

1. Field
This disclosure relates generally to a virtual meeting and, more specifically, to techniques for providing presentation material in an on-going virtual meeting.
2. Related Art
A web browser (hereinafter "browser") is a software application that allows a user at a client computer system (hereinafter "client") to display and interact with text, images, and other information located on a web page at a website (hosted by an application server) on the World Wide Web or a local area network. Text and images on a web page may contain hyperlinks to other web pages at the same or different website. Browsers allow a user to quickly and easily access information provided on web pages at various websites by traversing hyperlinks. Browsers usually format hypertext markup language (HTML) information for display and, as such, an appearance of a web page may differ between browsers. A number of different browsers, e.g., Internet Explorer™, Mozilla Firefox™, Safari™, Opera™, and Netscape™, are currently available for personal computers. In general, browsers are the most commonly used type of hypertext transfer protocol (HTTP) user agent. While browsers are typically used to access web application servers (hereinafter "web servers") that are part of the World Wide Web, browsers can also be used to access information provided by web servers in private networks or content in file systems.
For example, a browser may be utilized by a user to interact with a virtual-world (VW) provided by a VW application server. A VW is a computer-based simulated environment that various users may inhabit and interact with each other via avatars, which are usually depicted as two-dimensional (2D) or three-dimensional (3D) graphical representations. In a typical VW, perceptual stimuli is provided (via a browser) to a user, who can manipulate (via the browser) elements of the VW and, in this manner, experience a virtual presence to some degree. The VW may simulate rules based on the real-world (RW) or some fantasy world. For example, rules associated with gravity, topography, locomotion, real-time actions, and communication may be implemented. Communication between users may range from text, graphical icons, visual gesture, sound, and occasionally forms using touch and balance senses. For example, real-time voice communication using voice over Internet protocol (VoIP) may be implemented. In general, VWs may encompass a wide variety of applications, e.g., games, computer conferencing, and text based chat-rooms.

Techniques for providing presentation material in an on-going virtual meeting

International Business Machines Corporation


Provided herein are 4-methylpyrazole (4-MP) formulations, stable under storage conditions of up to about 55° C.

4-Methylpyrazole (also known as fomepizole or 4-MP) inhibits alcohol dehydrogenase (ADH), an enzyme that oxidizes alcohols as part of a two-step metabolic removal pathway in which ethanol is oxidized by ADH to acetaldehyde, which is in turn oxidized by aldehyde dehydrogenase (ALDH) to acetic acid. 4-MP has been approved by the U.S. Food and Drug Administration for the treatment of ethylene glycol or methanol poisoning. See, e.g., Scalley et al., American Family Physician 2002, 66, 807-812. This approved use of 4-MP requires high dose ranges, e.g., 20 mg/kg body mass initial dose, following by additional doses of 15 mg/kg every 12 hours, which are administered intravenously under the care of a physician.
Administration of doses of 4-MP below 10 mg/kg has been shown to be effective in treating ethanol intolerance or symptoms of aldehyde accumulation in subjects with reduced or absent ALDH activity who have consumed alcohol.
Patient compliance, for instance, with regard to administration of doses of 4-MP used to treat ethanol intolerance, could be improved by the development of formulations of 4-MP suitable for self-administration, in particular, oral administration. Further, it would be advantageous to have available solid formulations of 4-MP suitable for administration to subjects. Solid formulations are less prone to spillage and/or leakage than liquid formulations, are easier to package, and are easier to self-administer.
Preparation of solid formulations of 4-MP for administration to subjects that remain stable under storage conditions has proved difficult.
Thus, solid formulations comprising 4-MP, optionally in a unit dosage form, which are stable under storage conditions are sought.


Apparatus for converting input voltage to output current is disclosed herein. The apparatus mentioned above includes an input stage and a tuning stage. The input stage is used to generate a gate voltage corresponding to the input voltage, which is electrically coupled to the power source and ground. The input stage includes buffering means, a transistor, a resistor, and a first current repeating means. The first current repeating means generates the operational current responding to the current repeating transistor, and the input voltage is electrically coupled to the resistor by two input terminals of the buffering means. The gate of the transistor is connected to the output terminal of the buffering means, and the drain of the transistor is connected to the resistor and one of the two input terminals of the buffering means. The first current repeating means is used to repeat the operational current, and the local feed back is performed by connection between the buffering means, the transistor, and the resistor. The tuning stage is used to adjust the transconductance of the transconductor. The tuning stage generates the output current responding to the first control voltage, the second control voltage, and the gate voltage at the output terminal of the buffering means. The tuning stage includes a pair of transistors and the second current repeating means. The second current repeating means repeat the operational current, and the output current pass through the output terminal of the pair of transistors.

1. Field of the Invention
This invention relates to a voltage-to-current converter that is also named as transconductor with wide linear range, especially relates to a low-voltage source, tunable transconductor with wide linear range transfer curve.
2. Description of the Prior Art
One basic converter named as voltage-to-current converter is designed according to an ideal voltage-control-current-source that has an output current I.sub.O and an input voltage V.sub.I. The ratio I.sub.O /V.sub.I denoted as G.sub.m (transconductance) which has nothing to do with the load resistor and the source resistor in the equivalent circuit of the ideal voltage-control-current-source. The voltage-to-current converter is an amplifier, which can produce an output current proportional to the input voltage. The ratio I.sub.O /V.sub.I mentioned above is equal to the transconductance (G.sub.m) of the amplifier.
A transconductor is a type of voltage-to-current converter, which has the gain G.sub.m depending on the bias current and the size of the transistor. As shown in FIG. 1, the aspect ratios of the transistors Q.sub.1, Q.sub.2, Q.sub.3, and Q.sub.4 are 10.mu./2.mu., 10.mu./2.mu., 10.mu./5.mu., and 10.mu./5.mu. respectively, wherein the unit is micro-meter (10.sup.-6 meter:.mu.m). The input stage is composed of transistor Q.sub.1 and Q.sub.2, and the load stage is not shown in FIG. 1. The output current I.sub.O of the transconductor is equal to the subtraction (I.sub.p -I.sub.n), and is also equal to G.sub.m .times.(V.sub.ip -V.sub.in). The voltage V.sub.ip denotes the voltage at the gate ip.sub.3 of the transistor Q.sub.3, and the voltage V.sub.in denotes the voltage at the gate in.sub.4 of the transistor Q.sub.4. The transconductance G.sub.m depends on the current I.sub.bias and the size (aspect ratio) of every transistor. The current I.sub.bias is the current used to bias the differential pair. The gain of the transconductor mentioned above is the transconductance G.sub.m.
As well known in the prior art, the transfer curve (I.sub.p versus V.sub.ip or I.sub.n versus V.sub.in) has a linear region that the current is linearly proportional to the voltage. The slope of linear region is the transconductance (gain) of the transconductor, and the transconductance of the amplifier can be controlled by adjusting the input voltage of the differential pair. The gain (transconductance) of the transconductor mentioned above operates ether in a linear region or in a nonlinear region depending on the variation of the bias current (or input voltage) of the differential pair. The transconductor can be used only when the differential pair is operating in the linear region of the transfer curve. It is preferred that the transconductor has a wider linear region of the transfer curve.
The circuit diagrams of various types of the traditional transconductor are shown in FIG. 2A-FIG. 2B. The circuit diagram of the first type of the degeneration transconductor is shown in FIG. 2A, and the circuit diagram of the second type of the degeneration transconductor is shown in FIG. 2B. In FIG. 2A, a resistor R electrically couples the sources of the transistors Q.sub.5 and Q.sub.6. The resistor R mentioned above can increase the range of the linear region of the transfer curve of the transconductor. In other words, when the transconductor shown in FIG. 2A operates within an input voltage level larger than that of the transistor shown in FIG. 1, the gain of the transconductor shown in FIG. 2A can remain a fixed value. In addition, the aspect ratios of the transistors Q.sub.5, Q.sub.6, Q.sub.7, Q.sub.8 and Q.sub.9 shown in FIG. 2A are 30.mu./2.mu., 30.mu./2.mu., 30.mu./2.mu., 30.mu./2.mu. and 30.mu./2.mu. respectively.
The drains of the transistor Q.sub.5 and Q.sub.6 are electrically coupled to the load stage (not shown) of the amplifier. The circuit diagram of an alternative type of the transconductor shown in FIG. 2A is illustrated in FIG. 2B. The resistor R in FIG. 2A is replaced by a transistor Q.sub.10 in FIG. 2B, and the transistor Q.sub.10 is controlled by the voltage V.sub.ctl at the gate of the transistor Q.sub.10. The transistor Q.sub.10 in FIG. 2B acts as the resistor R in FIG. 2A, and is of the aspect ratio 2.mu./20.mu.. The value of the transconductance of the transconductor shown in FIG. 2B can be controlled by adjusting the voltage (V.sub.tcl) at the gate of the transistor Q.sub.10. So the transconductance of the transconductor in FIG. 2B can be changed, whereas the transconductance of the transconductor in FIG. 2A is fixed.

Wide-linear range tunable transconductor using MOS

Industrial Technology Research Institute


A mixing bowl lift apparatus and method for lifting a mixing bowl above a work table and partially inverting the mixing bowl to empty the contents thereof on the work table. The lift apparatus includes a lift framework having a pair of spaced lift arms extending outwardly from the lift framework at an obtuse angle. The lift framework is pivotally coupled between a pair of upright columns that are secured to a base plate bolted to the floor beneath the edge of the work table. The lift arms are configured with a C-shaped cross section so as to securely receive the circumferential, raised ridge on the mixing bowl. An electrically driven piston raises and lowers the lift arm assembly. The obtuse angle between the lift arms and the lift framework allows the lift arms to be raised beyond the vertical axis and thereby partially invert the mixing bowl above the work table. A linkage coupled to the electrically driven piston is operable to hold the electrically driven piston at a first position where it will raise and lower the lift arm assembly and at a second position where it will hold the lift arm assembly in a stowage position below the edge of the work table.

1. Field of the Invention
This invention relates to the commercial baking equipment and, more particularly, to a novel lift apparatus and method for lifting a mixing bowl to empty the contents thereof on a work table.
2. The Prior Art
The commercial baking industry includes bakeries that range in size between those that produce thousands of loaves of bread and other pastry items per day to those which only produce several hundred. Those bakeries in this latter category are the primary interest in this invention. In particular, bread or pastry dough is produced in a batch process using caster-mounted mixing bowls having a capacity of at least one hundred kilograms or more. The ingredients for the dough are blended and kneaded in the mixing bowl at a mixing station. The kneaded dough is allowed to rise in the mixing bowl until it is ready to be shaped into loaves or other pastry products.
The mixing bowl containing the raised dough is wheeled to the work table for further processing. The full mixing bowl is quite heavy so that it must be lifted above the work table by use of either a forklift-type device or by means of on overhead hoist. Unless the forklift is specifically modified so as to be able to handle a mixing bowl it represents a particularly dangerous method for handling the mixing bowl. Not only must the mixing bowl be elevated above the work table it must also be partially inverted to empty its contents on the work table. However, inverting the mixing bowl significantly increases the danger that the mixing bowl will fall from the forklift. As a result, there have been documented cases wherein the mixing bowl has slipped off the forklift. Another problem associated with a forklift-type lifting device is that it is relatively expensive and occupies a significant amount of floor space when not in use. Also, most forklift devices require a significant amount of space for proper maneuvering in order to handle the mixing bowl.
The overhead hoist system presents a different set of problems in that it customarily resides in a fixed, overhead location and, thus, is not freely transportable from place to place as is the forklift. An overhead hoist creates another problem in that it can be the source for debris falling into the bread dough. This debris can be in the form of hoist lubricants, metal chips, and the like.
In view of the foregoing it would be an advancement in the art to provide a lifting mechanism that securely engages and lifts the mixing bowl. Another advancement in the art would be to provide a mixing bowl lifting apparatus that also partially inverts the mixing bowl at its elevated position so as to empty the contents of the mixing bowl directly on the work table. It would also be an advancement in the art to provide a mixing bowl lift apparatus that occupies very little floor space and folds readily into a storage position below the work table. Another advancement in the art would be to provide a mixing bowl lift apparatus that is stowable below the work table at a location where it will not interfere with persons working at the work table. Such a novel apparatus and method is disclosed and claimed herein.


A backside illuminated array (10) of radiation detectors (12) each of which has an output terminal for expressing a center-surround output signal. The array includes a plurality of the radiation detectors (12) disposed substantially adjacent to a first surface of the array, each of the radiation detectors comprising a central radiation detector (20) having a radiation absorbing area that is substantially surrounded by a radiation absorbing area of an associated peripheral radiation detector (22). The array further includes a transmission grating structure (16) disposed over a second surface (14a) of the array opposite the first surface for diffracting incident radiation for uniformly illuminating associated central and peripheral radiation detectors. The array further includes a plurality of flux concentrating structures (18) interposed between the transmission grating structure and the plurality of radiation detectors. Individual ones of the flux concentrating structures are disposed in registration with an individual one of the radiation detectors for concentrating incident optical radiation upon the central radiation detector thereof.

To achieve a center-surround type output from individual detectors or pixels of a conventional radiation detecting array it is necessary to post-process the detector signals external to the array. Such signal processing is computationally intensive and, for an array of typical dimensions, requires a significant amount of time. As such, the use of center-surround signal processing techniques is generally precluded for real-time applications unless special purpose, high speed signal processing circuitry is provided. The provision of high speed circuitry is however disadvantageous at least for cost, weight and power consumption reasons.
A further disadvantage associated with conventional center-surround radiation detector techniques is that the array of detectors is generally not readily coupled to an artificial neural network signal processor.
A two-dimensional imaging array with center-surround type outputs would resemble in operation the photoreceptive cells of the retina. Therefore it is believed that subsequent signal processing with neural network circuitry would yield significant speed improvements and other advantages allowing for real-time image recognition and analysis. However, due to the required time consuming post-processing of the detector outputs to produce a center-surround pixel output signal the use of neural network processors for other than trivial real-time imaging applications is generally foreclosed.
It is therefore one object of the invention to provide an array of radiation detectors having an inherent center-surround pixel output signal.
It is another object of the invention to provide an array of radiation detectors having a center-surround pixel output signal that is suitable for use in real-time imaging applications.
It is one further object of the invention to provide an array of radiation detectors having a center-surround pixel output signal that is amenable to being coupled to a neural network signal processor for use in real-time imaging applications.

Radiation detector array having center surround pixel output


The object of the present invention is to provide 3-hydroxy-3-(2-thienyl)propionamides useful as synthesis intermediates of pharmaceutical preparations and the like and a method for obtaining optically active 3-amino-1-(2-thienyl)-1-propanols using the same with high reaction yield, high optical yield and industrially low cost.

Regarding the method for producing optically active 3-methylamino-1-(2-thienyl)-1-propanol derivatives, 1) a method in which an N,N-dimethylamino ketone derivative is subjected to asymmetric reduction and then, after protection of the hydroxy group, subjected to de-methylation, like the following reaction scheme (A) described in Tetrahedron Letters, p. 7101 (1990) or JP-A-4-226948,
and 2) a method in which an N,N-dimethylaminoalcohol derivative is subjected to optical resolution and then, after protection of the hydroxy group, subjected to de-methylation, like the following reaction scheme (B) described in Japanese Patent No. 2,549,681, are known.

However, the method of 1) requires an expensive optically active ligand and results in a low optical yield of about 85%, and the method of 2) wastes half of the substrate due to the optical resolution. In addition, since active zinc is used in the de-methylation step of both 1) and 2), preparation of the reagent is complicated, removal of metal residue and the like after the reaction is necessary and, what is more, protection of hydroxy group is necessary due to aptness of the free hydroxy group at the α-position of the thiophene ring to cause racemization, and because of these troublesome process and the like problems, concern has been directed toward the development of a more inexpensive and convenient production method.
Also, regarding other method for effecting asymmetric reduction of a β-ketocarbonyl compound having thiophene ring, methods which use an Ru-optically active phosphine complex as the catalyst (J. Organometallic Chem., 567, 163 (1998), Tetrahedron Lett., 36, 4801 (1995), C. R. Acad. Sci. Paris, t. 2, Serie IIc, 175 (1999), Tetrahedron, 57, 2563 (2001)) are known, but these have insufficient optical yield and have many unsettled problems in carrying out industrial production.
Also, regarding the method for effecting asymmetric reduction of carbonyl group using a microorganism, various studies have been carried out, but only a method in which 2,5-diacetylthiophene is reduced using baker's yeast (Tetrahedron Asymmetry (1997), 8, 3467) and a method in which trifluoromethyl-(2-thienyl) ketone is reduced using Geotricum candidum (Tetrahedron (1998), 54, 8393) are known as the method for effecting asymmetric reduction of the carbonyl group located at the position adjacent to the thiophene ring, and regarding an optically active 3-hydroxy-3-(2-thienyl)propionic acid ester derivative, its production has been carried out only by a chemical synthesis method which uses an asymmetric catalyst.
Also, as an example which uses an aluminum reducing agent in converting hydroxyalkylamides into hydroxyalkylamines by reducing carbonyl group of the former, a method is known in which a cyclic imide shown in the following reaction scheme (A)
is reduced using sodium bis(2-methoxyethoxy)aluminum hydride (Red-Al (registered trademark)), the aluminum reducing agent is quenched with a sodium hydroxide aqueous solution after completion of the reaction, and then the target product is obtained by carrying out toluene extraction (cf. JP-A-10-168058).
In addition, as an example which uses a borane reducing agent, a method is known in which a cyclic amide is reduced using a borane-dimethyl sulfide complex and then, after completion of the reaction, 5 M hydrochloric acid aqueous solution is added thereto and heated under reflux in order to decompose the boron-amine complex remained in the reaction mixture, thereby decomposing the complex and isolating the hydroxyalkylamine (Tetrahedron Asymmetry, Vol. 5, No. 1, 119 (1994)).
However, when the present inventors have isolated hydroxyalkylamines by the same operation of the former method, it was found that the hydroxyalkylamine as the product is contaminated with a large amount of aluminum originated from the aluminum reducing agent. Since there is a view that aluminum has a possibility of causing Alzheimer disease, it is considered that it is desirable to reduce its contaminating amount as much as possible from a compound to be used as an intermediate of pharmaceutical preparations and agricultural chemicals.
Also, since heat refluxing is carried out using a high concentration hydrohalogenic acid in the latter method, it has a disadvantage in that it cannot be applied to certain substrates having a possibility of causing racemization or dehydration reaction under acidic condition, as well as a possibility of causing corrosion of the reaction vessel, so that this is not desirable industrially. Thus, an industrially useful production method which uses more mild reaction conditions is expected.
The object of the present invention is to provide a method for the industrially convenient and efficient production of optically active γ-hydroxyalkylamines, namely 3-amino-1-(2-thienyl)-1-propanols.

3-Hydroxy-3-(2-thienyl) propionamides and production method thereof, and production method of 3-amino-1-(2-thienyl)-1-propanols using the same

Abstract: According to the present invention, 3-amino-1-(2-thienyl)-1-propanols are obtained by carrying out asymmetric reduction of a β-ketocarbonyl compound having thiophene ring in the presence of a catalyst constituted from a compound of a group VIII or IX metal in the periodic table (e.g., a ruthenium compound) and an asymmetric ligand represented by a specified optically active diamine derivative (e.g., a diphenylethylenediamine derivative), or using a cell, a treated product of said cell or the like of a microorganism, and as occasion demands, carrying out amidation of the ester group and then carrying out reduction of the amido group.

Abstract: (each of the substituents is as described in claim 1).


A forming device applied to a cigarette manufacturing machine causes a garniture tape 10 to travel through a wrapping section 8, and meanwhile wraps a shredded tobacco layer T in wrapping paper P to form continuously a cigarette rod R. The tape 10 is guided to travel by a forming guide 18 in the wrapping section 8, and is simultaneously bent to have a cross section of an arc that is downward convex. On the other hand, the travel of the tape 10 is guided by a pair of guide rollers 24 in upstream and downstream sides of the wrapping section 8, and the tape 10 is bent to have a cross section of an arc that is upward convex by guide surfaces of the rollers 24. Thus, difference of travel length, that is generated between both side edges and the central part of the tape 10 in the wrapping section 8, is offset by the guide rollers 24.

A rod-shaped article forming device of the aforementioned type is applied to, for example, a cigarette manufacturing machine and a filter rod manufacturing device. As an example of the forming device, a cigarette rod forming device comprises an endless garniture tape and wraps a shred tobacco layer in wrapping paper during the travelling process of the garniture tape through a wrapping section of the cigarette manufacturing machine (refer to Patent Document 1 as an example).
(Patent Document 1)
Unexamined Japanese Patent Publication No. 8-214854 (pages 3 and 4, FIG. 1)
More specifically, the shred tobacco layer is transferred from a tobacco band onto the wrapping paper immediate before the wrapping section. At this moment, the shred tobacco layer is compressed by a compression mold including a shoe and a tongue to be gradually formed into a round rod-shape. The wrapping paper is laid on the upper surface of the garniture tape and travels with the garniture tape. In this travelling process, the wrapping paper and the shred tobacco layer are drawn into the wrapping section with the garniture tape.
The garniture tape is made of a flexible material and gradually bent with respect to a width direction thereof along a forming guide (bed) when passing through the wrapping section. At this moment, the wrapping paper is formed into a U-shape on the inner side of the garniture tape and wraps the lower portion of the shred tobacco layer formed into the round rod-shape. After seam paste is applied to one of side edges of the wrapping paper, the wrapping paper is formed into a tube by upper molds referred to as a short holder and a long holder, and both side edges of the wrapping paper are overlapped to each other to form a rod-shaped article, namely a continuous cigarette rod.
Although the above-mentioned garniture tape has strength enough to strongly pull the wrapping paper and the shred tobacco layer through the wrapping section, the useful life of the garniture tape is not eternal. After the lapse of the useful life, therefore, the garniture tape becomes non-usable. Especially in recent years, the operation speed of the cigarette manufacturing machine has been more and more increased, and accordingly the garniture tape is made to travel at high speed. As a result, the average useful life of the garniture tape is liable to become shorter.
When the useful life of the garniture tape is consumed, the useful life is expired generally with breakage therein. On the contrary, if the garniture tape is partially damaged before being broken, the tape cannot be normally utilized any more thereafter and falls into a nonusable state before the lapse of the useful life thereof. The undesired shortening of useful life of the garniture tape is attributable to the damage to the both side edges of the garniture tape and the meander of the garniture tape during the travel. For instance, if the both side edges of the garniture tape is partially cut or ripped though the central part thereof is still useful, the damage to the both side edges inhibits the normal usage of the garniture tape. It is considered that the meander of the garniture tape occurs for the reason that tension is produced intensively on either side edge of the tape for some reason to cause the garniture tape to deviate in the width direction thereof from a path on which the tape should run originally. Once the garniture tape begins to meander, it is not adjustable, and thus the tape cannot carry out a normal function.
As described above, in the technical field of a rod-shaped article forming device, it is an object to remove the factors that shorten the useful life of the garniture tape and to enable the normal usage of the garniture tape within its original useful life.


For the purpose of preventing reductions of wall thickness due to erosion-corrosion in parts (2, 3, 7) of a system made of carbon steel, and which constitute a wet steam system, a feedwater and condensate system, and a drain system of a thermal or nuclear power plant, a coating (17) of metal or ceramic which is chemically stable against a fluid flowing in the systems is formed by spraying on the surface of the devices which are exposed to the fluid.

The present invention relates to a device, such as pipes and various valves used with such pipes, which is made of carbon steel and constitutes the wet steam system, the feedwater and condensate system, and the drain system in thermal and nuclear power plants and which is protected from reduction of its wall thickness due to erosion-corrosion, a special and rapid form of damage to metal parts.
Carbon steel, such as forged steel and cast steel, is widely used as a material suitable for compositional parts, such as piping and various valves including gate valves, globe valves and check valves, used in the wet steam system, feedwater and the condensate system and the drain system of a thermal or nuclear power plant.
When these parts are made of carbon steel and exposed to a flow of a fluid, erosion-corrosion occurs at the surface on which the flow touches the parts. Because such power plants tend to be operated for longer periods of time, the thickness of part walls may reduce to such an extent as to cause various problems.
Therefore, the devices used in the wet steam system, the feedwater and condensate system and the drain system of a thermal or nuclear power plant have to be regularly overhauled and inspected to confirm that their wall thickness has not, due to erosion-corrosion, progressively reduced and no interference with the operation of the plant would occur.
If such development of reduced thickness appears to possibly exceed the allowable design limit, portions with developing reduced thickness are overlaid by welding, or affected parts are replaced.
Also, when the progress of thickness reduction is fast and incidental repairs by the overlaying or by the replacement of parts are frequently needed, these parts are generally produced anew using a CrMo steel or an austenitic stainless steel which has higher resistance against erosion-corrosion than carbon steel.
Here, the devices made of carbon steel constituting the wet steam system, the feedwater and condensate system and the drain system of a thermal or nuclear power plant amount to a voluminous quantity; therefore, it is very expensive to inspect each device regularly with UT (ultrasonic testing) and repair thickness-reduced portions by overlaying or replacing affected parts.
Also, if each device is to be made of austenitic stainless steel having a higher erosion-corrosion resistance than carbon steel, the cost of material would be several times as much as that of carbon steel, and therefore is uneconomical.

Device for thermal electric and nuclear power plants


The method is intended for obtaining nanosize amorphous particles, which find use in various fields of science and technology; in particular, metallic nanostructures can be regarded as a promising material for creating new sensors and electronic and optoelectronic devices and for developing new types of highly selective solid catalysts. The method for obtaining nanoparticles includes the following stages: dispersion of a molten material; supply of the resulting liquid drops of this material into a plasma with parameters satisfying the aforementioned relationships, which is formed in an inert gas at a pressure of 10−414 10−1 Pa; cooling of liquid nanoparticles formed in the said plasma to their hardening; and deposition of the resulting solid nanoparticles onto a support.

As shown in a number of recent publications, nanostructures with a surface particle density on the order of 1012 cm−2 are promising for development of efficient nanoelectronic devices, such as ultrafast switches or subminiature memory cells (K. -H. Yoo, J. W. Park, J. Kim, K. S. Park, J. J. Lee and J. B. Choi. Appl. Phys. Lett., 1999, v. 74 (14), p. 2073).
For example, in the case of densely packed nanostructures with grain size of ˜4 nm, it is possible to create storage devices with recording density of ˜1011 bit/cm2 (F. Pikus and K. Likharev. Appl. Phys. Lett., 1997, v. 71, p. 3661; Y. Naveh and K. Likharev. Superlattices and Microstructures 2000, v. 27, p. 1). In the limiting case of grain size diminished to ˜1 nm, the recording density increases to 1012 bit/cm2.
In the last decade, a new area of catalytic chemistry has formed and is rapidly developing now: heterogeneous catalysis on nanostructured materials (P. S. Vorontsov, E. I. Grigor'ev, S. A. Zav'yalov, L. M. Zav'yalova, T. N. Rostovschikova, O. V. Zagorskaya, Himicheskaya Physica 2002, v. 21, p. 1). Most of the catalysts that are studied in laboratories and used in technological practice contain nanoparticles, i.e., particles with dimensions in the range 1–100 nm. The fundamental distinction between nanoparticles and bulk materials is that the fraction of surface atoms in nanoparticles is comparable with that in the bulk and the radius of curvature of the surface is comparable with the lattice constant. It is a commonly accepted opinion that it is these specific features that ensure the high catalytic activity of nanostructured catalysts as compared with their analogues based on bulk materials. The most promising for quite a number of practically important applications are catalysts based on metallic nanostructures, which contain nanoparticles of Cu, Pt, Pd, Ni, Fe, Co, and other metals.
The known methods for obtaining nanoparticles of various materials can be divided into two large groups: in the first of these, nanoparticles are formed by combination of atoms (or more complex radicals and molecules), and in the second, by dispersion of bulk materials.
Numerous methods based on combination of atoms (radicals, molecules) into nanoparticles are known, including, e.g., thermal evaporation and condensation (see S. Tohno, M. Itoh, S. Aono, H. Takano, J. Colloid Interface Sci., 1996, v. 180, p. 574), ion sputtering (see U.S. Pat. No. 5,879,827, Int. Cl. H 01 M 04/36, published Sept. 03, 1999), reduction from solutions (see U.S. Pat. No. 6,090,858; Int. Cl. C 09 K 03/00, published 18 Jul. 2000), and reduction in microemulsions (see H. Herrig, R. Hempelmann, Mater. Lett., 1996, v. 27, p. 287).
For example, in the method for obtaining nanoparticles by reduction of metals from solutions, an aqueous solution of a metal salt and an anion-active compound with COO−, SO42−, or SO32− groups as a reducing agent is heated to 50–140° C., with the result that the metal salt is reduced to give metallic nanoparticles (see U.S. Patent Application Ser. No. 20020194958; Int. Cl. B 22 F 09/24, published 26 Dec. 2002).
In the known method for deposition of submonolayer and monolayer coatings composed of gold and silver nanoparticles, the structure is formed via capture of metallic nanoparticles prepared in a colloid solution onto the support surface covered by a special organic film (see U.S. Pat. No. 6,090,858; Int. Cl. C 09 K 03/00, published 18 Jul. 2000).
The advantage of this method consists in that it enables immobilization on the support surface of spherical nanoparticles with average size in the range from 3 to 100 nm (depending on preparation conditions) with rather narrow size dispersion. However, the maximum surface density of particles on the support surface does not exceed in this case 0.5 d2 (where d is the average size of nanoparticles). Accordingly, exchange of electrons between neighboring particles is hardly probable and it is impossible to use structures of this kind to create catalysts operating in the maximum efficiency mode and to design efficient nanoelectronic devices in which the effects of interaction and charging of densely packed particles are important.
A method is known for obtaining silicon clusters in structural voids of zeolites, which consists in introduction of disilane (Si2H6) into these voids and its subsequent oxidation. Silicon liberated in the reaction assembles into nanoclusters. This technique is a particular case of the chemical vapor deposition (CVD) method (see Dad O., Kuperman A., MacDonald P. M., Ozin G. A.—A New Form of Luminescent Silicon—Synthesis of Silicon Nanoclusters in Zeolite-Y.—Zeolites and Related Microporous Materials: State of the Art., 1994, v. 84, p.p. 1107–1114). The method cannot be used to form silicon nanostructures in local regions because it transforms the zeolite substrate across virtually its whole thickness. An, in fact, homogeneous composite material is produced by this known technique.
Also known is a method of cryochemical synthesis of metal-polymer nanostructures (see L. I. Trakhtenbers et al., Zh. Fiz. Khim., 2000, vol. 74, p. 952).
The main advantage of metal-polymer nanostructures is their rather high specific activity as catalysts. However, as the content of metal increases, the catalytic activity of catalysts of this kind decreases because crystalline nanoparticles formed by this technique coagulate when coming in contact with one another. Moreover, the fundamental aspects of nanoparticle growth, inherent in the cryochemical synthesis, necessarily lead to a broad distribution of particle sizes and shapes.
To methods of the second group (formation of nanoparticles by dispersion of materials) should be referred the technique (see K. Deppert and L. Samuelson. Appl. Phys. Lett.—1996, v. 68(10), p. 1409) in which the initial flow of polydisperse liquid drops is produced in the course of thermal evaporation of an overheated material, capture of drops by the flow of an inert carrier gas (nitrogen), and, further, successive separation of particles via interaction of charged particles in the gas flow with the electric field in the differential mobility analyzer. The thus formed flux of charged nanoparticles is deposited onto the substrate. This method, named "Aero taxi" by its authors, makes it possible to obtain a monodisperse flux of charged nanosize particles of metals (and semiconductors). The method yields 20–30-nm crystalline particles, with the particle size dispersion not less than 50% (the size scatter directly depends on the number of separation stages). Among disadvantages of the method are its low output capacity and relatively wide particle size dispersion. Moreover, the method gives no way of forming metallic particles with high density of particle packing, because, as the density increases, crystalline nanoparticles coagulate into more bulky formations.
The method for obtaining nanoparticles, which is the closest to that claimed in this patent application and is chosen as the prototype, was described in (V. M. Kozhevin, D. A Yavsin, V. M. Kouznetsov, V. M. Busov, V. M. Mikushkin, S. Yu. Nikonov, S. A. Gurevich, and A. Kolobov, J. Vac. Sci. Techn. B, 2000, v. 18, no. 3, p. 1402). This method is based on ablation of a metallic target under the action of light generated by a high-power pulse-periodic laser. Rather severe modes of target irradiation are chosen, in which, together with evaporation of the target, a great number of micrometer- and submicrometer-size drops of molten metal are ejected from its surface. Optical breakdown of a vapor near the target surface leads to the formation of a hot laser torch plasma, while the temperature and density of this plasma are determined by the type of a metal and conditions of target irradiation (power density of the incident laser light, angle of incidence, etc.). In the laser torch plasma, liquid metal drops ejected from the target surface are charged to a critical value, to the threshold of capillary instability, on reaching which drops start to break down to produce a multitude of finer (daughter) drops. The daughter drops are charged to above the instability threshold, so that the breakdown process that has started is of a cascade nature. However, it was shown in the publication mentioned above that the process of drop breakdown continues only to a certain extent. This process terminates because, as the size of charged drops steadily decreases, the current of autoelectronic emission from their surface grows, which, in the end, leads to a decrease in the drop charge to below the instability threshold. For most of metals, the size of drops formed by the end of the breakdown process is on the order of several nanometers. The abrupt termination of the process ensures a sufficiently narrow size distribution of the resulting nanoparticles. Thus, the breakdown of liquid micrometer- and submicrometer-size metal drops in the laser torch plasma yields a great number of nanometer-size particles with a narrow size distribution.
The prototype method described has been used to deposit onto the substrate surface single-layer coatings composed of 8–10 nm copper nanoparticles. Even though the particle size dispersion was not evaluated for the prototype method, it may be concluded, on the basis of the results obtained in this study, that the size distribution is much narrower than, e.g., that for the "Aero taxi" method.
However, the conditions that could ensure stable formation of nanoparticles with amorphous structure have not been determined for the prototype method. This circumstance markedly restricts the possibility of reproducible formation of nanostructures with high surface density of particles on the support surface, which is very important, e.g., for carrying out effective catalysis and developing a number of nanoelectronic devices. This also hinders the industrial application of the prototype method.
It should also be noted that, as established by the authors, the range of plasma parameters in which an effective breakdown of liquid charged drops can be achieved is considerably wider. This makes it possible to produce nanoparticles not only in a laser-induced plasma, but also in a plasma formed by other, more technologically convenient methods yielding a quasi-stationary plasma.
In the known method for obtaining nanoparticles, the conditions are close to equilibrium, which leads to the formation of metallic particles that are, as a rule, in the crystalline state. The coalescence of crystalline nanoparticles gives rise to severe difficulties in formation of structures with a high density of particle packing.


A flashlight is provided having a housing, a reflector and a light source, such as an LED. Preferably, an alignment structure is provided for aligning the LED with the focal axis of the reflector. For instance, the LED may be fixed to a circuit board, and the flashlight may include an alignment element configured to mate with the LED to position the LED at a pre-determined position. Alternatively, the LED may be electrically connected with a circuit board, and the circuit board my include an opening for receiving the LED to position the LED at a pre-determined position.

Flashlights having an LED positioned within a reflector for providing a focused beam of light are known in the art. In order to optimize the beam of light provided by the LED, it is desirable to position the LED at the focal point of the reflector. Specifically, a reflector typically has a parabolic reflective surface having a central axis. It is desirable to position the LED so that it is aligned with the central axis of the reflective surface.
Unfortunately, due to manufacturing tolerances in the production of LEDs, the location of an LED in an assembly can vary. This leads to variation of the LED position relative to the reflector, which can reduce the ability to provide an optimum focused beam of light.

Flashlight having LED assembly and method for producing same


A safety apparatus of a piezoelectric lighter includes a pressure absorbing device disposed in a cap cavity of a casing of the piezoelectric lighter, a holding means integrally affixed to an interior surface of a thumb-push cap for rigidly holding one end of the pressure absorbing device in position, and a receiving means provided in the cap cavity for receiving and supporting another end of the pressure absorbing device in position. Therefore the pressure absorbing device is vertically held between the thumb-push cap and the ceiling of the casing for urging the thumb-push cap at an upper normal position thereof and providing an additional press resistance to the thumb-push cap, so as to resist a downwardly press force applied by an under age child on the thumb-push cap while an adult is capable of pushing down the thumb-push cap easily.

It is well known that accidents cause by fire are some of the most horrible things that can happen to anyone. Over the years, there are hundreds of family who suffer from the damages caused by fire, some from the city fire and others got their home burned down around the green areas due to the forest fires. The community has always encouraged people to take any oncoming fire hazard, because we know that it's better to prevent the problem than to deal with it, and especially if we're dealing with an element of no mercy. Accidental fire had not only burned down homes and destroyed lives, but it also had killed many people over the years.
Most fires are caused accidentally by ignorance of human mistakes, especially among our young children. We tried to teach our young ones to not step into the accidental mistake of starting an accidental fire, but it is very difficult to enforce adult supervision over them twenty-four hours a day. In most accidental fire cases today, many were started by the ignorant usage of cigarette lighters, especially when someone in the family who is a smoker which having many cigarette lighters laying around the house waiting for the young one to pick it up and use it.
In the resent years, there are many safety lighters manufactured throughout the market. Many of the prior arts are based on having or hiding a safety switch on a lighter, which in most cases through a period of time, kids seem to be able to figure out how to put these safety lighters into use without any complication. As we know, the children today are very intellectual in certain circumstances, and usually they don't seem to have a problem figuring out how to work a simple mechanical object. It is in human nature to figure out a solution to the any question, even at our young age. We can only trick their mental ability for a short period of time, but we can sure limit their physical capability.

Safety apparatus of a piezoelectric lighter


Approaches for providing a fin field effect transistor device (FinFET) with a planar block area to enable variable fin pitch and width are disclosed. Specifically, approaches are provided for forming a plurality of fins patterned from a substrate, the plurality of fins comprising: a first set of fins having a variable pitch and a variable width; and a second set of fins having a variable pitch and a uniform width, wherein the first set of fins is adjacent the second set of fins. In one approach, the first set of fins is patterned from the planar block area, which is formed over the substrate, and the second set of fins is formed using a sidewall image transfer (SIT) process.

1. Technical Field
This invention relates generally to the field of semiconductors, and more particularly, to forming a plurality of fins of a FinFET device using combined planar block and sidewall image transfer (SIT) processes.
2. Related Art
A typical integrated circuit (IC) chip includes a stack of several levels or sequentially formed layers of shapes. Each layer is stacked or overlaid on a prior layer and patterned to form the shapes that define devices (e.g., field effect transistors (FETs)) and connect the devices into circuits. In a typical state of the art complementary insulated gate FET process, such as what is normally referred to as CMOS, layers are formed on a wafer to form the devices on a surface of the wafer. Further, the surface may be the surface of a silicon layer on a silicon on insulator (SOI) wafer. A simple FET is formed by the intersection of two shapes, a gate layer rectangle on a silicon island formed from the silicon surface layer. Each of these layers of shapes, also known as mask levels or layers, may be created or printed optically through well-known photolithographic masking, developing, and level definition, e.g., etching, implanting, depositing, etc.
The FinFET is a transistor design that attempts to overcome the issues of short-channel effect encountered by deep submicron transistors, such as drain-induced barrier lowering (DIBL). Such effects make it harder for the voltage on a gate electrode to deplete the channel underneath and stop the flow of carriers through the channel—in other words, to turn the transistor off. By raising the channel above the surface of the wafer instead of creating the channel just below the surface, it is possible to wrap the gate around all but one of its sides, providing much greater electrostatic control over the carriers within it.
Device parameters of FinFETs are extremely sensitive to semiconductor fin thickness. In order to realize the full potential of a FinFET, the silicon fin must be very thin (e.g., on the same order of thickness as that of a fully-depleted SOI). Similarly, line width control problems during gate electrode definition for small devices can lead to performance degradation, power consumption control issues, and yield loss. Previously, lithographic techniques have been used to form device components (e.g., semiconductor fins for FinFETs, gate electrodes, etc.) in a substrate. Using photolithography, a feature can be printed directly into a photo-resist layer, and the image can be transferred into an underlying film. However, current state-of-the-art lithographic technology cannot adequately and efficiently satisfy the ever-increasing demand for smaller devices and device components. Thus, the requirement for very thin and replicable device components encourages the use of a SIT process to form such components.
SIT involves the usage of a sacrificial structure (e.g., a mandrel, typically composed of a polycrystalline silicon) and a sidewall spacer (such as silicon dioxide or silicon nitride, Si3N4, for example), having a thickness less than that permitted by the current ground rules, which is formed on the sides of the mandrel (e.g., via oxidization or film deposition and etching). After removal of the mandrel, the remaining sidewall spacer is used as a hardmask (HM) to etch the layer(s) below, e.g., with a directional reactive ion etch (RIE). Since the sidewall has a sublithographic width less than the ground rules, the structure formed in the layer below will also have a sublithographic width. In other uses, the sidewall may be used as a component in the desired structure (e.g., as a portion of the fins in a FinFET).
As shown by current art device 100 of FIG. 1, the SIT process inherently results in only a single fin width (W) for each of a plurality of fins 102, which controls the final channel width. As such, for some devices, multiple fins must be combined in parallel in order to achieve desired performance, with a shallow trench isolation (STI) 104 in areas where there are no fins. However, as more fins are added to device 100, the area of each transistor increases, which increases RC delays introduced due to metal routing involved in interconnections of multiple fins. Additionally, device stability decreases as more fins are used, especially for higher current devices at more advanced nodes (e.g., 10 nm and below).

Field effect transistor (FinFET) device with a planar block area to enable variable Fin pitch and width


The present invention relates to a novel apparatus and method for providing caller identification. Particularly, the present invention is configured to output caller identification to personal computer and to a terminal. These outputs are in response to a call received by the Caller ID system.

1. Field of the Invention
The present invention generally relates to a method or apparatus for displaying Caller Identification on a personal computer.
2. Background of the Related Art
Caller Identification (Caller ID) is a service provided by telecommunication companies to telephone subscribers. When a call is received on a specialized telephone, a screen of the specialized telephone will display the name and/or number of the party calling the telephone. However, this service does have several disadvantages. One disadvantage is that a user with Caller ID service is confined to terminals that have Caller ID systems installed. Second, the Caller ID system does not provide for accumulating data related to the callers to the phone. This is because Caller ID service typically only temporarily stores the calling subscriber number information in the private exchange system for one time use. Afterwards it is cleared off the system. Third, because Caller ID is tied to equipment within telephones, new equipment must be purchased for additional services that are developed. Fourth, the information output by Caller ID service is limited to information relating to the initiation of a telephone call.

Caller identification displayed on a personal computer


The present invention provides a method of strengthening a structure, to heal the imperfection of the structure, to reinforce the structure, and thus strengthening the dielectric without compromising the desirable low dielectric constant of the structure. The inventive method includes the steps of providing a semiconductor structure having at least one interconnect structure; dicing the interconnect structure; applying at least one infiltrant into the interconnect structure; and infiltrating the infiltrant to infiltrate into the interconnect structure.

Lower dielectric constant materials are desirable in semiconductor chip manufacture to reduce signal propagation delays and crosstalk in back-end-of-the-line (BEOL) and packaging interconnects. A reduction in dielectric constant invariably results in a corresponding reduction in a dielectric fracture resistance. This is particularly true with brittle oxide-like dielectrics where fracture resistance is directly related to bond density and strength. In particular, delaminations can occur around the chip with metal structures requiring redesign of the kerf region of the chip, which restricts the area available for kerf test structures.
One consequence of this reduction in fracture resistance is that with recent dielectrics the fracture resistance of BEOL structures has become lower than that of the silicon substrate on which they are fabricated. Thus, imperfections introduced into the chip structure by processes such as chip dicing and wire bonding preferentially propagate through BEOL interconnect structures causing chip failure.
Generally, the semiconductor chip is further attached and connected to a packaging structure by different processes such as C4 chip attachment or wire bonding. Because of different thermal expansion properties during thermal cycling of different materials in the packaged chip, the complex arrangement of materials in the packaging structure can produce significant stresses in the chip during a packaging process and/or under a use condition. These forces or stresses, are typically concentrated, and can cause an existing structure imperfection to become unstable and propagate.
Certain stress relief materials may be used in such packages. However, under most circumstances, materials are chosen to optimize other functions, such as electrical performance, or C4 fatigue life of the package and thus cannot be designed solely to reduce the stresses on the chip. Further, significant shear or tensile stresses are usually applied to the edge of a packaged chip. Thus, there is a need for providing a structure, which avoids chip packing interaction (CPI) failures due to propagation of pre existing cracks or other imperfections into active areas of the chip.
One approach is to increase the intrinsic toughness of the dielectric itself. As discussed above, this cannot be done throughout the chip without increasing the effective dielectric constant and hence compromising electrical performance. To increase the resistance to propagation of CPI cracks without affecting the chip's electrical performance, strengthening of the dielectric must be achieved locally at the perimeter of the chip. This could be achieved by applying separate masking and processing steps to the edge of the chip. However, such an approach is expensive and thus undesirable.
Another approach to inhibit the propagation of structure imperfections is to reduce the stresses at the tip of the structure imperfection so that a critical fracture stress can not be reached. This can be done by special design of the package with limited options.
In view of the above, there exists a need for a structure having enhanced resistance to crack propagation in the back-end-of-line dielectric materials and methods of manufacturing the same.

Strengthening of a structure by infiltration


Disclosed is a diaphragm buzzer including a lower cover and an upper cover. A sheet buzz element having a centered diaphragm is disposed inside the lower and the upper cover and is protectively sandwiched between a press plate and a plastic washer before it is fixed to the upper cover, lest the sheet buzz element should detach from the wires connecting it to a circuit board and become loose and damaged in the two covers.

The present invention relates to a diaphragm buzzer, and more particularly to a buzzer which consists of an upper and a lower covers to contain a sheet buzz element therein. The sheet buzz element is further protected by disposing a press plate and a plastic washer at two sides thereof.
Generally, a conventional diaphragm buzzer is so structured that a sheet buzz element is attached to a circuit board by means of a bonding agent and is then fixed to an upper cover of the buzzer. With this fixing manner, any damaged sheet buzz element in the buzzer can not be separately replaced and the whole set of buzzer must be discarded.
In the conventional diaphragm buzzer, the sheet buzz element is disposed between the circuit board and the upper cover. To fix the sheet buzz element in place, the same is positioned in a fixing disc formed inside the upper cover with the circuit board positioned at another side of the buzz element, then, a bonding agent is used to fasten the sheet buzz element to the upper cover. Wires connecting the circuit board and the buzz element are completely wound and pressed into the space between the circuit board and the buzz element. The shortcomings of the conventional diaphragm buzzer so sturctured include:
1. Connecting wires wound and pressed inside the buzzer causes larger space between the circuit board and the sheet buzz element, and therefore, the sheet buzz element is subject to shake when the buzzer is vibrated. A shaking buzz element can not be positively examined when it is damaged.
2. When the sheet buzz element is damaged, it can not be separately replaced but has to be discarded along with the circuit board and the upper cover which are still usable.

5F, No. 3, Alley 6, Lane 45, Pao-Hsing Rd.


The invention relates to an active current mode sampling circuit comprising an operational amplifier (103) and at least one switched capacitor (C2, C2a, C2b). In order to reduce the power consumption of such a circuit, first switching elements (S101a, S101b, S102a, S102b) switch the switched capacitor (C2, C2a, C2b) between an input and an output of the operational amplifier (103) during charging phases φ1. Further, second switching elements (S103a, S103b, S104a, S104b) connect the switched capacitor (C2, C2a, C2b) during discharging phases φ2 to a subsequent stage (104), in order to provide a charge of the switched capacitor (C2, C2a, C2b) to the subsequent stage (104). The invention relates equally to a device (107) comprising such a sampling circuit and to a method of operating such a sampling circuit.

Sampling circuits are known from the state of the art. A sampling circuit can be employed for example in a receiver for sampling received signals.
A conventional receiver is usually implemented with complicated analog techniques and using BiCMOS (bipolar complementary metal-oxide semiconductor) or other analog-oriented semiconductor.
For illustration, a block diagram of an exemplary analog direct conversion receiver is presented as FIG. 1.
The depicted receiver comprises a low noise amplifier (LNA) 10 for amplifying received radio frequency (RF) signals, mixers 11 for downconverting the amplified RF signals, an analog signal processing component 12 for processing the downconverted signals, analog-to-digital converters (ADC) 13 for converting the processed analog signals into digital signals, and a digital signal processing component (DSP) 14 for further processing of the digital signals. For processing the analog downconverted signal, the analog signal processing component 12 comprises an Nth-order low-pass filter (LPF), an analog gain control (AGC), a direct-current (DC) offset cancellation, etc. For processing the digital signal, the DSP 14 comprises a decimation stage, an LPF, etc. The output of the DSP 22 constitutes the digital baseband (BB) output.
This kind of receiver requires high-order analog base band filters to attenuate undesired signals, and at the same time, it has a high in-band amplification. Depending on the involved system, e.g., GSM (global system for mobile communications), CDMA (code division multiple access), WCDMA (wideband CDMA), etc., up to seventh-order analog filters may be required. In addition to the complicated filter, also an accurate AGC is needed in order to relax ADC requirements in terms of sampling frequency, dynamic range and related silicon costs. To this end, a large number of high quality resistors and capacitors is needed in the implementation. Due to large temperature dependency and process variations of the resistor-capacitor (RC) time constants, often some kind of calibration or tuning is required in addition. Moreover, high quality resistors require additional mask layers, which also increase the costs of the production process.
Due to cost reasons, it is therefore often desirable to increase the integration level by digitalization, that is, to implement RF receivers and analog input interface circuits in a pure digital semiconductor process, for example in a deep sub-micron CMOS, together with the digital signal processing blocks. Also to support this trend, circuit techniques are being developed that enable signal processing functions, which are conventionally implemented in the analog domain, like filtering, to be implemented with digital techniques.
A block diagram of a more digital implementation of a direct conversion receiver is presented as FIG. 2.
The receiver of FIG. 2 comprises again an LNA 20 for amplifying received RF signals. Further, it comprises a first integrated processing component 21 for processing the received analog signals. This processing includes a frequency down conversion, an analog pre-filtering and an analog-to-digital conversion by ADCs. The receiver comprises in addition a DSP 22 for processing the resulting digital signals. The DSP 22 realizes more specifically a decimation, a low-pass filtering, an automatic gain control, a direct-current (DC) offset cancellation, etc. The output of the DSP 22 constitutes the digital baseband (BB) output.
The benefits of the digitalization of the RF and analog interface circuits include an increased integration level, a size reduction with time through process technology shrinkage, an increased flexibility and adaptability of the circuits, shorter design cycles which are made possible through design synthesis, portability and reuse of the circuits, an ease of the implementation of the complex signal processing in the digital domain, less calibration in the production, and a better control of performance.
One approach for realizing a digitalization of an RF receiver is utilizing a subsampling technique, where the frequency downconversion and the sampling are combined and performed by a voltage mode sampling operation. This solution, however, has the drawback that it still needs a continuous time antialias filter. Actually, a voltage mode sampling operation makes the antialias filter implementation even more complicated compared to the conventional direct conversion RF receiver, because it requires a very selective bandpass filter at the RF frequencies.
A more promising approach for realizing a digitalization of an RF receiver by a system-on-chip (SoC) solution is utilizing a current mode sampling operation, which is also called charge sampling. The current mode sampling has several advantages over the voltage mode sampling. A current mode sampling operation contains an inherent antialias filtering. Therefore the additional antialias filter needed in conventional voltage mode sampling can be avoided. The antialias filter frequency response does not have to be calibrated, because it is proportional to the capacitor ratio and the clock frequency, which are among the best-controlled parameters in the analog semiconductor integration. A current mode sampling operation is moreover suitable for an implementation with a pure digital deep-submicron CMOS process, because additional mask layers needed for high quality resistors can be avoided. Further, the frequency down-conversion can be combined easily with the current mode sampling circuit.
The operational principle of a current mode sampling without frequency down-conversion is illustrated by the schematic circuit of FIG. 3. The circuit comprises a transconductance element (GM) 30, which is connected via a first switching element S31 and a second switching element S32 to an output. Between the first switching element S31 and the second switching element S32, a sampling capacitor C30 and a third switching element 33 are connected in parallel to each other to ground.
The transconductance element 30 converts an input voltage mode signal VIN into a current mode signal. The first switching element S31 is closed during an integration period φ1, and the current mode signal is integrated by the sampling capacitor C30 during this integration period φ1. After the integration period φ1, the resulting voltage across capacitor C30 is then sampled by the subsequent stages for further processing. The resulting voltage VOUT is provided to subsequent stages more specifically by closing the second switching element S32 during a discharging period φ2. Before the next integration period φ1 is entered for a new sample, the sampling capacitor C30 is reset by closing the third switching element S33.
FIG. 4 presents a current mode sampling circuit with frequency down-conversion, in which a transconductance element 40, switching elements S41, S42 and S43 and a sampling capacitance C40 are arranged in the same manner as in FIG. 3. In the circuit of FIG. 4, however, a switching element S44, which performs the frequency down-conversion, is inserted between the transconductance element 40 and the actual sampling circuit with elements C40, S41, S42 and S43. The switching element S44 is controlled by a local oscillator signal LO.
The transconductance element 40 converts an input RF voltage mode signal VRF into a current mode signal. The resulting current mode signal is then frequency down-converted by the switching element S44. The purpose of the down-conversion is to bring the current signal provided by the transconductance element 40 from the radio frequency down to a frequency range in which it can be sampled with sufficient performance, e.g. to an intermediate frequency (IF) or to the base band (BB), as indicated in the diagram of FIG. 5. The subsequent sampling is the same as in the circuit of FIG. 3. That is, switching element S41 is closed during integration periods φ1 such that the current mode signal is integrated by the sampling capacitor C40. The resulting BB or IF voltage VBB/VIF across capacitor C40 is provided to subsequent stages by closing the second switching element S42 during discharging periods φ2. Before the next integration period φ1, the sampling capacitor C40 is reset by closing the third switching element S43.
Such a current mode sampling has been presented for example by Jiren Yuan in: "A Charge Sampling Mixer With Embedded Filter Function for Wireless Applications", 2nd International Conference on Microwave and Millimeter Wave Technology Proceedings, 2000, by Karvonen S. in: "Analysis and Realization of a Downconverting Quadrature Sampler", Diploma Thesis, University of Oulu, 2001, by Karvonen S., Riley T. and Kostamovaara J. in: "A Low Noise Quadrature Subsampling Mixer", IEEE International Symposium on Circuits and Systems 2001, Volume 4, and by Karvonen S., Riley T. and Kostamovaara J. in: "Charge Sampling Mixer With DS Quantized Impulse Response", IEEE International Symposium on Circuits and Systems 2002, volume 1.
The integration of a current mode signal over a given period of time produces a SINC=sin(x)/x type of frequency domain transfer function, which has transmission zeros at the sampling frequency Fs and its multiples 2Fs, 3Fs, etc. Thus, the transfer function zeros create an inherent anti-alias filter for the sampling operation. That is, folding interferences and noise are filtered due to the inherent antialias filtering. The transfer function and the aliasing of the current mode sampling are sketched in FIG. 6. As can be seen, the transfer function has a significant attenuation of the aliasing frequency bands, i.e. around the zeros at Fs, 2Fs, 3Fs, etc., especially near the sampling frequency Fs. Therefore, a current mode sampling is well suited for use with over-sampling ADCs, in which the signal band is narrow compared to the sampling frequency.
On the whole, it is to be understood that the current mode sampling does not constitute a kind of sub-sampling, and thus, it does not have the problems associated with, for example, voltage mode RF sub-sampling.
FIG. 7 presents a straightforward implementation of the passive current mode sampling with frequency down conversion as shown in FIG. 4. In FIG. 7, the passive current mode sampling and the frequency down conversion are further combined with a switched-capacitor integrator for low-pass filtering.
The circuit of FIG. 7 thus comprises a transconductance element 70, a frequency down-conversion portion 71, a sampling portion 72 and an LPF portion 75.
The transconductance element 70 has two inputs and two outputs, the latter being connected to the frequency down-conversion portion 71. The frequency down-conversion portion 71 comprises four switches which are controlled by a local oscillator.
In the sampling portion 72, a first path is realized, which connects a first output of the frequency down-conversion portion 71 via a switch S71a, a sampling capacitor Csa and a switch S72a to a first output of the sampling portion 72. In this first path, the first output of the frequency down-conversion portion 71 is further connected via a capacitor Cia to ground Vcm. In addition, the connection between switch S71a and capacitor Csa is connected via a switch S73a to ground Vcm, while the connection between capacitor Csa and switch S72a is connected via a switch S74a to ground Vcm. The second output of the frequency down-conversion portion 71 is connected in exactly the same manner via a second path realized in the sampling portion 72 to a second output of the sampling portion 72. In the second path, corresponding capacitors are named Csb and Cib instead of Csa and Cia, respectively, and corresponding switches are named S71b to S74b instead of S71a to S74a, respectively.
The capacitors Csa and Csb and the switches S71a to S74a and S71b to S74b of the first and the second path form a first sampler 73. Additionally, identical samplers 74 etc. may be connected in parallel to the first sampler 73.
The LPF portion 75 comprises an operational amplifier 76.
The first output of the sampling portion 72 is connected via a first input of the LPF portion 75 to a first input of operational amplifier 76, and a first output of operational amplifier 76 is connected to a first output of the LPF portion 75. A capacitor C1a on the one hand and a series connection of a switch S75a, a capacitor C2a and a switch S76a on the other hand are arranged in parallel to each other between the first input and the first output of operational amplifier 76. The connection between switch S75a and capacitor C2a is connected via a switch S77a to ground Vcm, while the connection between capacitor C2a and switch S76a is connected via a switch S78a to ground Vcm.
The second output of the sampling portion 72 is connected to a second input of the LPF portion 75. The second input and output of operational amplifier 76 are connected to the second input of the LPF portion 75 and a second output of the LPF portion 75, respectively, and corresponding components are connected directly and indirectly to the second input and output of operational amplifier 76 as to the first input and output of operational amplifier 76. Corresponding capacitors are named C1b and C2b instead of C1a and C2a, respectively, and corresponding switches are named S75b to S78b instead of S75a to S78a, respectively.
Transconductance element 70 converts two input RF voltage mode signals into RF current mode signals and provides them to the frequency down conversion portion 71. A separate LNA (not shown) can be used in front of transconductance element 70. Alternatively, the transconductance element 70 could be either an integral part of an LNA or of the frequency down-conversion portion 71. However, in any implementation one or more semiconductor devices can be recognized that provide the function of a transconductor.
The local oscillator provides alternating signals LO+ and LO− to the switches of the frequency down conversion portion 71. When the LO+ signal is active, the outputs of the transconductance element 70 are connected to the sampling portion 72 in a direct way, i.e. the first output of the transconductance element 70 is connected to the first path of the sampling portion 72, while the second output of the transconductance element 70 is connected to the second path of the sampling portion 72. When the LO− signal is active, the outputs of the transconductance element 70 are connected to the sampling portion 72 in a cross-coupled way, i.e. the first output of the transconductance element 70 is connected to the second path of the sampling portion 72, while the second output of the transconductance element 70 is connected to the first path of the sampling portion 72. With this operation, the RF current signals output by the transconductance element 70 are frequency down-converted into IF current signals.
In the sampling portion 72, switches S71a, S74a, S71b and S74b are closed during a clock phase φ1, while switches S72a, S73a, S72b and S73b are closed during a clock phase φ2. Clock phases φ1 and φ2 are alternating with each other.
The signal current is thus integrated by the sampling capacitors Csa and Csb during a respective clock phase φ1. The sampling is said to be passive, as no operational amplifier participates in the integration. The sampling capacitors Csa and Csb are then discharged to zero during a charge transfer from the capacitors Csa and Csb to the LPF portion 76 during a respective clock phase φ2. Therefore, an additional reset phase is not needed for discharging the switched capacitors Csa and Csb before the respective next sampling phase. The capacitors Cia and Cib are needed to avoid a shifting of the transfer function zeros due to the non-overlap time of the sampling. In addition, the capacitors Cia and Cib are also used to attenuate RF blockers and interferences.
Alternatively, switches S71a, S72a, S71b and S72b could be closed during a clock phase φ1, while switches S73a, S74a, S73b and S74b are closed during a clock phase φ2. In this case, the charge transfer to the LPF portion 76 takes place during the charging of the capacitors Csa and Csb in a respective clock phase φ1, while clock phase φ2 is a pure discharging phase.
Parallel samplers 74 can be used in order to reduce the sampling clock frequency or to build an analog FIR (finite impulse response) filter sampling stage.
The LPF portion 75 then performs a low-pass filtering on the received current samples. To this end, switches S75a, S76a, S75b and S76b are closed in the respective clock phase φ1, while switches S77a, S78a, S77b and S78b are closed in the respective clock phase φ2.
The power consumption of operational amplifier 76 of the LPF portion 75 can be reduced by a modification as presented in FIG. 8.
The circuit of FIG. 8 comprises exactly the same components as the circuit of FIG. 7, except that the capacitors C2a and C2b and the switches S75a to S78a and S75b to S78b are removed. Moreover, switch S73a in the first depicted path of the sampling portion 72 is no longer connected to ground Vcm, but instead to the first output of operational amplifier 76. The connection between switch S73a and the capacitor Csa is connected within the sampling portion 72 via a switch S81a to the connection between switch S74a and the capacitor Csa. A corresponding arrangement is introduced between the second output of operational amplifier 76 and the second depicted path in the sampling portion 72, including switch S81b. The outputs of the operational amplifier 76 are moreover connected in the same manner in parallel to the first and the second paths in any possible further sampler 74.
The sampling operation is similar to the sampling operation in the circuit of FIG. 7. In this case, however, capacitors Csa and Csb are charged during a respective clock phase φ1, connected to operational amplifier 76 during a respective clock phase φ2, and discharged during a respective additional reset clock phase φr by closing switches S81a and S81b.
Compared to the circuit of FIG. 7, a lower power consumption is achieved, since the workload of operational amplifier 76 is relaxed in the charge transfer clock phase φ2 due to the modified switching topology. The main drawback of this circuit is, however, that the additional reset clock phase φr is needed for discharging the switched capacitors Csa and Csb before the respective next sampling. Due to the additional reset clock phase φr, parallel samplers 74 are required in addition to sampler 73.
In a passive current mode sampling, the current consumption of the operational amplifier of an LPF portion could also be reduced by means of a decimation circuit as presented by S. Lindfors in: "CMOS Baseband Integrated Circuit Techniques for Radio Receivers", doctoral thesis, Helsinki University of Technology, July 2000. In that topology, the sampling frequency of a switched capacitor connected to the operational amplifier can be smaller than the input sampling frequency of the current mode sampling, resulting in lower bandwidth requirements for the operational amplifier.
A serious drawback of a passive current mode sampling in general, however, results from the common use of transistors as switches.
Transistors in modern semiconductor processes have a low output impedance, such that also the employed transconductance elements in the presented circuits have a low output impedance. This low output impedance causes a leakage of the transfer function zeros and thus degrades the advantageous anti-alias filter properties of the current mode sampling. The problem becomes severe, when the passive current mode sampling is implemented using components available in digital deep-sub micron CMOS processes, where the output impedance of the realized components is inherently low.
Another serious drawback resulting from the low output impedance is poor linearity for the third order intercept point, IIP3. As the integrated voltage in the sampling capacitors, and thus the voltage at the output of the mixer and in some cases also of the transconductance element, is a function of the input signal, a signal dependent distortion is introduced due to channel modulation effects in the mixing transistors of the frequency down-conversion portion.
A known circuit topology that circumvents the problem resulting from the low output impedance of the transconductance element and from the non-linearity of the transistors mixing the RF signal is shown in FIG. 9, which enables an active current mode sampling instead of a passive current mode sampling.
The circuit of FIG. 9 comprises as well a transconductance element 90 for converting RF voltage mode signals into RF current mode signals and a frequency down-conversion portion 91 for frequency down-converting the RF current signals into IF current signals, as described above with reference to FIG. 7. In addition, the circuit of FIG. 9 comprises a sampling and LPF portion 92 and a following switched-capacitor (SC) block 94 realizing a part of an ADC or an SC-filter.
The sampling and LPF portion 92 comprises an operational amplifier 93. The first output of the frequency down-conversion portion 91 is connected via a first input of the sampling and LPF portion 92 to a first input of operational amplifier 93, and a first output of operational amplifier 93 is connected to a first output of the sampling and LPF portion 92. A capacitor C1a on the one hand and a series connection of a switch S91a, a capacitor C2a and a switch S92a on the other hand are arranged in parallel to each other between the first input and the first output of operational amplifier 93. The connection between switch S91a and capacitor C2a is connected via a switch S93a to ground Vcm, while the connection between capacitor C2a and switch S92a is connected via a switch S94a to ground Vcm.
The second output of the frequency down-conversion portion 91 is connected to a second input of the sampling and LPF portion 92. A second input and output of operational amplifier 93 are connected to the second input of the sampling and LPF portion 92 and a second output of the sampling and LPF portion 92, respectively, and corresponding components are connected directly and indirectly to the second input and output of operational amplifier 93 as to the first input and output of operational amplifier 93. Corresponding capacitors are named C1b and C2b instead of C1a and C2a, respectively, and corresponding switches are named S91b to S94b instead of S91a to S94a, respectively.
The components of the sampling and LPF portion 92 form an active switched-capacitor integrator.
The first output of the sampling and LPF portion 92 is connected within the SC block 94 via a switch S95a, a sampling capacitor C4a and a switch S96a to a first input of an operational amplifier 95. In addition, the connection between switch S95a and capacitor C4a is connected via a switch S97a to ground Vcm, while the connection between capacitor C4a and switch S96a is connected via a switch S98a to ground Vcm. The second output of the of the sampling and LPF portion 92 is connected within the SC block 94 in exactly the same manner to a second input of operational amplifier 95. A corresponding capacitor is named C4b instead of C4a, and corresponding switches are named S95b to S98b instead of S95a to S98a, respectively.
A respective capacitor C3a, C3b is arranged between the first input and a first output of the operational amplifier 95 and between the second input and a second output of the operational amplifier 95. Further elements may be connected in parallel to the respective capacitor C3a, C3b for realizing the desired functions.
In the sampling and LPF portion 92, switches S91a, S92a, S91b and S92b are closed during a clock phase φ1, while switches S93a, S94a, S93b and S94b are closed during a clock phase φ2. Capacitors C2a and C2b are therefore charged during a respective clock phase φ1 and discharged to zero during a respective clock phase φ2, the latter constituting a dedicated reset clock phase. Clock phases φ1 and φ2 are alternating with each other.
The current mode signals provided by the frequency down-conversion portion 92 are thus integrated by the active switched-capacitor integrator of the sampling and LPF portion 92, which provides a virtual short circuit at the sampler input. The switched-capacitor integrator does not allow the output voltage of the frequency down conversion portion 91 and, in some cases, of the transconductance element 90 to vary, as the signals are in a current mode. Therefore, a leakage of the transfer function zeros due to the small output impedance is eliminated and better quality anti-alias filtering properties are obtained. In addition, as the voltage swing is practically negligible, a better linearity (IIP3) is obtained. With the shown switched-capacitor integrator, or alternatively with another higher order filter, also the RF blockers are attenuated.
In the SC block 94, switches S95a, S96a, S95b and S96b are closed during a clock phase φ1, while switches S97a, S98a, S97b and S98b are closed during a clock phase φ2. Sampling capacitors C4a and C4b are therefore charged during the respective clock phase φ1 and discharged to zero during the respective clock phase φ2. The sampled signal is then further processed as desired by the operational amplifier 95.
It is a disadvantage of the circuit of FIG. 9 that it involves a high power consumption as, for example, power is wasted during the reset clock phase φ2. The power consumption is heavily dependent on the switching frequency and on the capacitance values of capacitors C2a and C2b on the one hand and C4a and C4b on the other hand. The problem is that while it is desirable to have a low switching frequency for achieving a low power consumption, it is desirable to have a high switching frequency for a wide bandwidth of the transfer function zeros relative to the signal bandwidth.
Due to the high power consumption, an active current mode sampling is currently only used for sampling an IF input signal, as described in the above mentioned document "A Charge Sampling Mixer With Embedded Filter Function for Wireless Applications".


Composite grid/frame structures are constructed from grid elements 36 arranged in a grid pattern and bonded together by a vacuum infiltration technique or, alternatively, a filament winding technique. Grid elements 36 are sliced cross-sections of pultruded or filament-wound tubing typically made from glass or graphite fiber and epoxy resin. Common cross-sectional shapes are square, rectangular, triangular, and circular. Finished two-dimensional grids 46 may be combined with longitudinal rods 48 to form three-dimensional frames for concrete reinforcement, engine containment, and many other applications.

Traditional composite structures made by multidirectional laminated construction techniques suffer from two major deficiencies: 1) performance limits imposed by micro-cracking and delamination failure modes; and 2) high cost of manufacturing resulting from the lack of automation and modular construction. The most severe limit imposed by the traditional design is the low allowable strain of 0.4 percent. Micro-cracking of the matrix is responsible for this low limit. Delamination failure imposes another limit that often controls the laminate design.
The most efficient use of composite materials is to use them in their unidirectional format. This is done in filament wound pressure vessels where loading is tensile only. For more general states of stress, laminated composite are required to sustain multidirectional loading conditions. The strength potential, however, is then severely limited because of microcracking and delamination.
Grid structures avoid many of the problems of traditional composite structures. All ribs are unidirectional, and are not susceptible to micro cracking and delamination. One of the most common methods for constructing composite grid structures uses a soft rubber tooling which has been pioneered by USAF Phillips Laboratory. This process has been used to manufacture a solar panel substrate, missile fairing and adapters. Soft tooling, however, does not provide good finish nor does it maintain constant rib thickness. The soft tooling must be peeled off after curing, which is difficult if not impossible without causing damage to the tooling and/or the part. For this reason, the depth of the rib is limited to 2.5 cm for a grid size of 12.5 cm. Higher ribs would make the tool removal nearly impossible.
Another accepted practice of grid manufacturing is to cut grooves in a rigid foam. Similar to the soft tooling method, fiber bundles and a resin binder can then be forced into the grooves to form a grid structure. The foam can in fact be left in the grid to provide the sound and thermal barrier if that is required. The most severe limitation of this process is at the intersection points in the grid structure where the fiber volume fraction is limited to 60 percent. This in turn places a limit on the fiber volume in the ribs. In fact, the ribs would have only one half of that value; i.e., 30 percent. At this low fiber volume, the performance of the grid structure would not be competitive with laminated structures of the same composite material. Present grid structures have the additional disadvantage that they are still hand-made, resulting in expensive and slow production.
Other processes that use hard tooling, such as metals, suffer from the same deficiencies, such as low fiber volume fraction, limited height, and intensive labor required. Many molded composite gratings fall into this category. Others use laminates wrapped around metallic cores and subsequently consolidated to form "egg-crate" grids. This type of manufacturing is labor intensive and not practical for larger structures.
The prior art process of using rubber tooling has not met all the performance and cost objectives. Tooling continues to be a challenge. Rubber tooling often breaks and cannot be reused. Control in fiber packing and geometry of the ribs is also difficult. The most important limitation is the fiber volume fraction in the rib that is controlled by the fraction at the nodal points. Even with a nodal offset, the fraction at the rib is essentially one half of that at the node.
Slotted joint grids (FIG. 6) are often found in carpentry and have been applied to composite grids. Difficulties include the optimum tolerance of the cut slots and the bonding to seal the joints. Substantial stress concentrations at the cut-out edges also impair their strength. Other designs use laminated composites for the ribs. The effective stiffness of laminates is less than one half of that of the unidirectional ribs.

The Board of Trustees of the Leland Stanford Junior University


An interface to make interconnections between the interior and exterior of a sealed enclosure may include a flat connector (FC). The FC may comprise at least one layer of a substantially planar substrate. Each substrate layer may include metallization for conducting signals between contacts on an interior-facing surface and contacts on an exterior-facing surface. In an enclosure with an aperture for passing electrical conductors, the FC may be configured to seal the aperture to inhibit the escape of a low density gas, such as helium, for a long period of time. In one embodiment, the FC may include metallization configured to minimize helium leakage. As such, the FC may conduct electrical signals into and out of the sealed enclosure. Such signals may include, for example, power, control, and data signals for operating devices housed within the enclosure.

Some electrically operated devices, such as data storage devices, are housed in protective enclosures. Some enclosures, also referred to as housings, may be sealed for various reasons, such as to keep out contaminants. Another reason an enclosure may be sealed is to maintain an alternate atmosphere. Some alternate atmospheres may be used to obtain certain performance advantages for some electrical, mechanical, or electro-mechanical devices.
Data storage devices that may be housed in sealed enclosures include disk drives that store data on magnetic or optical disks. For example, a hard disk drive (HDD) may store data on a magnetic disk. An HDD typically includes a base into which various components of the disk drive may be installed. A top cover cooperates with the base to form an enclosure that houses electronic and electro-mechanical components of the disk drive. These components include, for example, a spindle motor, which rotates one or more disks at high speed. Information may be written to and read from tracks on the disks through the use of an actuator assembly. The actuator assembly may include actuator arms, which extend towards the disks, with one or more suspensions or flexures extending from each of the actuator arms. Mounted at the distal end of each of the flexures is a read/write head, which may include an air bearing slider that enables the head to fly in close proximity to the corresponding surface of the associated disk.
The actuator assembly may receive power, control, and data signals through a flexible interconnect called a flex assembly (and may also referred to as a printed circuit cable or flex circuit or wiring harness). A proximal end of the flex assembly may be secured to the actuator arm near the pivot point of the actuator. The head conductors may be soldered, for example, to exposed contacts on the flex assembly. The flex assembly may also route conductors that carry currents to a voice coil motor assembly (VCMA) that may be used to position the actuator arm. Typically, the flex assembly is coupled to a preamplifier drive circuit (preamp) that may generate write currents during a write operation and pre-amplify read back signals during a read operation.
In a sealed HDD, such power, control and data signals may be coupled through a bulkhead connector extending through an aperture in the base. Internally, the bulkhead connector may be electrically coupled to a distal end of the flex assembly. Externally, the bulkhead connector may be electrically coupled to an externally-mounted printed circuit board assembly (PCBA).

Method of making an electrical connection