A method and apparatus for sending user plane traffic via a node located between a base station and a Serving Gateway in a mobile telecommunications network. The base station receives a message containing tunneling protocol information identifying the Serving Gateway. It sends a second message towards the node, the second message including tunneling protocol information identifying the base station and the Serving Gateway. The base station receives a third message from the node, the third message including tunneling protocol information for the base station to use towards the node, and tunneling protocol information for the Serving Gateway to use towards the node. A fourth message is sent, which includes tunneling protocol information for the Serving Gateway to use towards the node. User plane traffic can then be sent between the base station and the Serving Gateway via the node.

It is known to provide caching in a mobile network. Caching is based on the idea that a large percentage of Internet traffic is repetitive, and that eliminating the sending of repeating content from its origin may offer a savings opportunity in terms of required bandwidth. The main principle of caching in a mobile network is that copies of the repeated content in, for example, the Internet, are moved closer to mobile users. For example, such content may be cached in different parts of the Radio Access Network (RAN), in the Core Network (CN), or just "above" the CN.
The main benefits that can be achieved with caching in mobile networks are as follows:
a. A decrease in the cost of transport in the mobile network as well as the cost for Internet peering. This is achieved "above the cache", as the cached information in principle is only transferred once in the transmission links above the cache.
b. An improved quality of experience for the mobile end-users. This is mainly achieved with lower delays, as the cached information can be returned faster to the mobile users from the cache (compared to the case where the information is obtained all the way from the original location).
c. Provision of new services, such as content hosting and storage/backup for the operators. A mobile operator can agree with content providers to ensure that the content from a specific content provider is delivered in a better way to the mobile users in the mobile operator's network.
Caching can also be used for the media distribution towards the mobile users. Instead of retrieving downloadable media from the media server or from other users, the media can be retrieved from the cache. FIG. 1 shows how media information from a media server 1 that has access to several media sources 1a is pushed in to a cache 2 in a mobile network 3 and then the mobile users 4, 5 can receive the media information directly from the cache 2 instead of from the media server 1. Note that that caching can be used for almost any type of internet content, and so the example of media content shown in FIG. 1 could be replaced with almost any other type of content.
Common RAN caching is about including a cache 2 in the RAN for all different radio access technologies, for example GSM, WCDMA and LTE. A good placement for a RAN cache is at a common RAN Controller, for example a node that includes either a Base Station Controller (BSC) or Radio Network Controller (RNC) or both. A challenge for caching is to ensure that the user plane traverses via the RAN cache. If the cache is included in the RNC, then the WCDMA/HSPA user plane automatically traverses via the RAN cache. The same applies for GPRS/EDGE user plane traffic where the RAN cache is included at the BSC. However, in the latter case there is an additional challenge as the GPRS/EDGE user plane traffic is normally encrypted between the MS/UE and the Serving GPRS Support Node (SGSN) and therefore the traffic is encrypted when traversing through the BSC.
A problem arises then using the Long Term Evolution (LTE) architecture. LTE is a communication network technology currently under development by the 3rd Generation Partnership Project (3GPP). LTE requires a new radio access technique termed Evolved Universal Terrestrial Radio Access Network (E-UTRAN), which is designed to improve network capacity, reduce latency in the network, and consequently improve the end-user's experience. System Architecture Evolution (SAE) is the core network architecture for LTE communication networks.
As shown in FIG. 2, LTE is a so called "flat RAN architecture" without any RAN controller. The control plane interface (S1-MME) goes directly between an eNodeB (eNB) 6 and a Mobility Management Entity (MME) 7, and the user plane interface (S1-U) goes directly between the eNB 6 and a Serving GW (SGW) 8. Note that the SGW 8 can be integrated together with a PDN GW, but for simplicity, the term SGW is used herein to denote the user plane gateways in the core network. To enable caching, the user plane interface needs to be routed via a RAN Controller 9, shown as the thick black line between the eNB 6, the cache 2 and the SGW 8, and the textbox "How?"
As LTE is a flat RAN architecture, there is at present no way of ensuring that user plane traffic traverses the RAN controller 9 and hence can access the RAN cache 2.
Furthermore, the same problem applies to other circumstances in which it is desirable for user plane traffic to traverse a particular node. For example, instead of the caching problem described above, it may be required for traffic to traverse a particular node that provides "cloud" applications and/or software hosting. Similarly, user plane traffic optimization or packet inspection may be required in the node. In any of these exemplary cases, there is currently no way of ensuring that user plane traffic is routed via a particular node located between the eNB 6 and the SGW 8.

Sending user plane traffic in a mobile communications network


An interface circuit includes: a first synchronizing circuit for synchronizing a signal having a delay equal to or more than a predetermined period with respect to a reference clock, with the reference clock; a second synchronizing circuit for synchronizing a signal having a delay less than the predetermined period with respect to the reference clock, with the reference clock; a delay determining circuit for outputting a determination signal based on a delay of the signal relative to the reference clock; a delay determination setting circuit for outputting a path setting signal that designates an output value of one of the first synchronizing circuit and the second synchronizing circuit based on a preset value; and a delay selecting circuit for selecting and outputting an output value of one of the first synchronizing circuit and the second synchronizing circuit based on one of the determination signal and the path setting signal.

1. Field of the Invention
The present invention relates to an interface circuit, and more particularly to an interface circuit that sends data, which has been applied to a block not in sync with a system clock, toward another block in sync with the system clock.
2. Description of Related Art
In the case of configuring a system using plural functional circuits, there is a possibility that the functional circuits receive/transmit data not synchronized with a system clock. In such a case, it is necessary to provide an interface circuit including a synchronizing circuit for synchronizing the data asynchronous with the system clock with the system clock. As an example of the interface circuit, there is an interface circuit provided between a mobile DDR-SDRAM (Double Data Rate-Synchronous Dynamic Random Access Memory) and a memory controller. FIG. 6 is a block diagram showing a data processing system 100 including an interface circuit of the Related Art 1.
As shown in FIG. 6, the data processing system 100 of the Related Art 1 includes a CPU 110, a clock generator 111, a memory controller 112, an interface circuit 113, and a DDR-SDRAM 114.
Each block of the data processing system 100 operates in response to a reference clock (for example, sysCLK) generated with the clock generator 111. The CPU 110 processes data based on a command of an application stored in a storage device or the like (not shown). Further, the CPU 110 transmits/receives data to/from the memory controller 112 and to/from the DDR-SDRAM 114 through the interface circuit 113 as needed.
Upon the data transmission/reception, the DDR-SDRAM 114 transmits data DQ in sync with a strobe signal DQS asynchronous with a system clock sysCLK. However, the memory controller 112 cannot accurately receive the data unless the data is synchronized with the system clock sysCLK. To that end, the interface circuit 113 accurately receives the data DQ from the DDR-SDRAM 114, converts the data DQ into read data that can be accurately received by the memory controller 112 to change a synchronous timing, and transmits the read data to the memory controller 112. That is, the interface circuit 113 arbitrates between blocks that operate at different synchronous timings.
The interface circuit 113 adjusts a signal synchronous timing with a read data synchronizing unit 140 incorporated in the interface circuit 113. The synchronous timing is adjusted as follows. The read data synchronizing unit 140 includes a DLL (Delay Locked Loop) circuit 142, a sampling circuit 143 (includes flip-flop FF10 and FF11), a synchronizing circuit 144 (includes flip-flop FF12 and FF13), and a read data synchronizing unit 145.
First, when receiving the strobe signal DQS and the data DQ from the DDR-SDRAM 114, the DLL 142 gives a predetermined delay time (for example, a phase lag of 90°) to the strobe signal to generate a delayed strobe signal D_DQS. Next, the sampling circuit 143 samples the data DQ based on the delayed strobe signal D_DQS. At this time, since the data DQ is sampled based on the delayed strobe signal D_DQS, it is possible to sample the data in a period in which the data is stabilized, not changed.
Next, the synchronizing circuit 144 latches the data sampled with the sampling circuit 143 in response to the system clock sysCLK. Hence, the data DQ becomes a signal synchronous with the system clock sysCLK. A read data output unit adjusts a bit length of the data DQ synchronized with the system clock sysCLK by the synchronizing circuit 144 to output the adjusted data as read data to the memory controller 112.
However, the interface circuit 113 and the DDR-SDRAM 114 are generally mounted onto different semiconductor substrates, that is, embedded in different chips. Thus, the interface circuit 113 and the DDR-SDRAM 114 are connected through a line with some length, so a delay occurs in a signal transmitted/received on the line due to a resistance or capacitance of the line.
The interface circuit 113 of the Related Art 1 has a problem in that arbitration cannot be accurately executed depending on a delay of the strobe signal with respect to the system clock sysCLK. The operation of this case is explained below. FIG. 7 is a timing chart in the case where the strobe signal DQS is given a large delay relative to the system clock sysCLK, and the case where the strobe signal DQS is given a small delay relative to the system clock sysCLK.
As shown in FIG. 7, in the interface circuit of the Related Art 1, if the synchronizing circuit 144 is set to latch data [a] Lower, [a] Upper, [b] Lower, and [b] Upper inputted in synchronization with the strobe signal DQS and sampled with the sampling circuit 143 on the rising edge of the system clock sysCLK on the assumption that the strobe signal DQS has a large delay relative to the system clock sysCLK, when the input strobe signal DQS has a small delay relative to the system clock sysCLK, the synchronizing circuit 144 cannot latch lower-bit data [b] Lower of the data DQ (timing Tb).
Further, if the synchronizing circuit 144 is set to latch data [a] Lower, [a] Upper, [b] Lower, and [b] Upper inputted in synchronization with the strobe signal DQS and sampled with the sampling circuit 143 on the falling edge of the system clock sysCLK on the assumption that the strobe signal DQS has a small delay relative to the system clock sysCLK, when the input strobe signal DQS has a large delay relative to the system clock sysCLK, the synchronizing circuit 144 cannot latch upper-bit data [a] Upper of the data DQ (timing Ta).
That is, the interface circuit 113 of the Related Art 1 cannot execute accurate arbitration depending on a delay of the strobe signal DQS with respect to the system clock sysCLK.
Japanese Unexamined Patent Application Publication No. 2005-78547 discloses a technique for solving the above problem (Related Art 2). FIG. 8 shows an interface circuit 213 of the Related Art 2.
A sampling circuit 242 of a read data generating unit 240 of the interface circuit 213 of the Related Art 2 latches data DQ using a strobe signal DQS delayed by a DLL 243 similarly to the Related Art 1. The data DQ latched by the sampling circuit 242 is synchronized with the system clock sysCLK by a timing adjusting circuit 246 and then output to the memory controller 212.
A timing adjusting circuit 246 of the interface circuit 213 of the Related Art 2 has two data synchronizing paths (delay max and delay min) corresponding to different delay times. An appropriate one of the two paths is selected depending on a delay of the strobe signal DQS relative to the system clock sysCLK to thereby output the data DQ of the selected synchronizing path.
A delay determining circuit 244 determines a delay of the strobe signal DQS relative to the system clock sysCLK, and a hold circuit 245 holds the determination result of the delay determining circuit 244. The timing adjusting circuit 246 selects based on a bit selection signal and outputs the data DQ on the delay-max path for a large delay and selects based on the bit selection signal and outputs the data DQ on the delay-min path for a small delay based on the information stored in the hold circuit 245.
The timing adjusting circuit 246 of the interface circuit 213 of the Related Art 2 has tow data synchronizing paths corresponding to different delay times, and the delay determining circuit 244 determines the delay of the strobe signal DQS relative to the system clock sysCLK. Based on the result of determining the delay, the timing adjusting circuit 246 selects the synchronizing path corresponding to the determined delay to output the data DQ on the selected path. As a result, the interface circuit 213 of the Related Art 2 can accurately synchronize the data DQ with the system clock sysCLK regardless of whether the strobe signal DQS has a large delay or a small delay with respect to the system clock sysCLK.
However, the delay of the strobe signal DQS and the data DQ is almost determined depending on, for example, a board design, a power source, or other such conditions in many cases. That is, the interface circuit 213 of the Related Art 2 has a problem that the two synchronizing paths are being active all the time, so a circuit that is not so used consumes considerable power, and power consumption increases more than necessary.
Further, the interface circuit 213 of the Related Art 2 dynamically switches the synchronizing paths, so it is difficult to detect which synchronizing path is tested upon the circuit functional test for delivery inspection. That is, it is difficult to test the interface circuit 213 with reliability.


A reel of a recording tape cartridge has a reel hub formed in a shape of a hollow cylinder; an annular reel gear; an upper flange; a lower flange; and a reel plate. A reel gear is provided coaxially at an outer surface of a floor of the reel hub, and meshes with a driving gear of a rotating shaft of a drive device. A reference surface is provided integrally at an outer side of the floor. The upper flange extends integrally toward a radial direction outer side from an open end of the reel hub. The lower flange is mounted to a floor side end of the reel hub, and opposes the upper flange. The reel plate is fixed to the outer surface of the floor, and is attracted by a magnet of the rotating shaft without being contacted by the magnet.

1. Field of the Invention
The present invention relates to a recording tape cartridge which rotatably accommodates a single reel on which a recording tape, such as a magnetic tape or the like, is wound.
2. Description of the Related Art
Recording tapes such as magnetic tapes and the like are used as external recording media for computers and the like. For a recording tape where a large volume of information is recordable and which is wound around a reel, a single reel cartridge whose reel is rotatably accommodated in a compact space is employed.
In such a recording tape cartridge, a reel gear is provided in an annular form at the end surface of a hub of a reel, which hub is shaped as a hollow cylinder having a floor and around which a recording tape is wound between a pair of flanges of the reel. The reel gear is exposed from a gear opening of a case so as to be able to mesh with a driving gear provided at a rotating shaft of a drive device. When the recording tape is to be pulled out from the case and used, in the state in which the reel gear meshes with the driving gear and the reel is positioned in the axial direction, driving force is transmitted to the reel due to the rotation of the rotating shaft such that the reel is driven to rotate.
Positioning of the reel in the axial direction is carried out by the meshing of the reel gear and the driving gear. Specifically, the meshing surfaces of the teeth of the reel gear and the teeth of the driving gear which mesh together are formed in tapered shapes. The reel is positioned in the axial direction in a state in which the respective teeth are meshed together such that there is no backlash therebetween. Therefore, the axial direction reference surface of the reel within the drive device (i.e., at the time when the reel is driven to rotate) is, for example, an imaginary surface which is the meshing pitch surface of the reel gear and the driving gear. Therefore, in a recording tape cartridge equipped with such a reel, the dimensions of the respective portions are determined on the basis of the imaginary reference surface obtained by the meshing together of the reel gear and the driving gear. Thus, designing, and evaluation of the dimensions of the respective portions are complex.
Here, a recording tape cartridge has been conceived of which has a structure in which a reference surface is provided at the end surface of the hub of the reel, separately from the reel gear, and the reel gear does not participate in the function of positioning the reel in the axial direction (see, for example, U.S. Pat. No. 6,273,352). Specifically, three convex portions for reference project at uniform intervals in the peripheral direction from the radial direction outer side portion of the reel gear which is formed in an annular form at the end surface of the hub. The reel is positioned in the axial direction due to references surfaces at the respective convex portions for reference, which are surfaces orthogonal to the axis of the reel, being made to abut a positioning surface of the rotating shaft.
When the reel rotates, there are cases in which the flange, which is at the open end side of the hub opposite the end surface where the reel gear and the like are formed, contacts the recording tape due to wobbling or the like accompanying the rotation of the reel, and force in a direction of pulling the reel gear away from the driving gear is applied to the reel. Further, when the meshing surfaces of the reel gear and the driving gear are formed in tapered shapes as described above, a portion of the torque of the reel is converted, by the tapered surfaces, into thrust in the direction of pulling the reel gear away from the driving gear. Even if these forces are applied, in the state in which the reel gear is used while facing in the direction of gravity (downward), the meshing together of the reel gear and the driving gear is maintained due to the weight of the reel and the recording tape. However, these forces are a cause of destabilizing the rotation of the reel.
Therefore, in the above-described structure disclosed in U.S. Pat. No. 6,273,352, a reel plate, which is formed of a magnetic material, is fixed to the inner side of the reel gear at the end surface of the hub, and the reel plate is attracted and held by a magnet provided at the rotating shaft, without contact between the reel plate and the magnet. The rotation of the reel is stabilized due to this attraction force.
Further, a recording tape cartridge is known which is not provided with a reel plate attracted by a magnet, but in which the reel is urged toward the rotating shaft by a compression coil spring provided within the case (see, for example, U.S. Pat. No. 6,034,850). In this structure, the urging force of the compression coil spring resists force in a direction of pulling the reel gear away from the driving gear, and the rotation of the reel is stabilized. Moreover, at the reel structuring this recording tape cartridge, one of the pair of flanges is provided integrally from the open end of the hub which is formed in the shape of a hollow cylinder having a floor (i.e., is provided from the end portion at the opposite side, in the axial direction, of the end surface where the reel gear and the like are formed), whereas the other flange is attached later to the floor portion side end portion of the hub. In this reel, because the one flange is provided integrally with the open end side of the hub, the hub has high strength (rigidity). Therefore, it can be expected that it is difficult for the hub and the flanges provided at the hub to deform due to the winding pressure of the recording tape or the like, and that wobbling of the flanges which accompanies deformation of the hub is suppressed.
However, it is predicted that, as the recording capacities demanded of recording tape cartridges increase, recording tapes will be made longer and the rotational speeds of reels will be increased, and the times over which reels are driven continuously will be increased. There is therefore the need for reels to be driven to rotate even more stably. To this end, there is still room for improvement in order to rotate a reel more stably.
Further, in the structure disclosed in above-described U.S. Pat. No. 6,034,850, the compression coil spring is disposed between the reel and the case in order to maintain the meshing between the reel gear and the driving gear as described above. Therefore, there is the need to utilize an expensive bearing in order to absorb the relative rotation between the reel and the compression coil spring.

This patent is subject to a terminal disclaimer.


A composite nozzle strip for hydroentangling of a fibrous mass is provided to lower nozzle erosion potential and increase operational efficiency. The composite nozzle strip comprises a substrate comprising a material of a first hardness having at least one aperture and at least one orifice element comprising a material of a second hardness greater than the first hardness and further defining an aperture of a second diameter less than the first diameter. The at least one orifice element is affixed to the substrate so that the aperture in the orifice element is aligned with the at least one aperture in the substrate for creation of a constricted water jet when subjected to pressurized water.

Hydroentanglement or "spunlacing" is a process used for mechanically bonding a web of loose fibers to form fabrics directly from fibers. Fabrics formed by the hydroentanglement process typically belong to those in the nonwovens' family of engineered fabrics. The underlying mechanism in hydroentanglement is the subjecting of the fibers to a non-uniform pressure field created by a successive bank of high-velocity water jets. The impact of the water jets with the fibers, while they are in contact with their neighbors, displaces and rotates the fibers with respect to their neighbors and entangles the same with neighboring fibers. During these relative displacements, some of the fibers twist around and/or inter-lock with neighboring fibers to form a strong structure based upon frictional forces between the fibers touching one another. The final outcome of the hydroentanglement process is a highly compressed and uniform fabric composed of entangled fibers. These structures are highly flexible, yet are very strong and outperform their woven and knitted counterparts in many measures of performance. The process is a high-speed low-cost alternative to other methods of producing fabrics wherein typical hydroentangling machines can run as fast as 700 meters or more per minute and are typically 1 to 6 meters wide. The process owes its success to the peculiar properties of coherent high-speed water jets.
Various patents have issued that are directed to the hydroentangling process in general and several have attempted to solve the serious problem of nozzle erosion that is inherent with high water pressures. U.S. Pat. No. 3,033,721 is directed to a method and apparatus for producing foraminous fabrics from a layer of fibrous material such as a fibrous web wherein the individual fiber elements are capable of movement under the influence of an applied fluid force. U.S. Pat. No. 4,805,275 is directed to a method of producing nonwoven fabrics through a treatment with high velocity water streams wherein a fibrous web is treated on a water impermeable supporting member with water jet streams ejected from a nozzle. The nozzle disclosed in the '275 Patent is a cone-capillary nozzle (i.e., cone-up nozzle) which results in a non-constricted water jet with minimal effective breakup length. U.S. Pat. No. 6,668,436 is directed to a method of treating sheet material using pressurized waterjets wherein a perforated plate with inserts made of zirconia, sapphire, ruby or other materials of equivalent hardness are used to increase the life of the nozzles. The inserts disclosed in the '436 Patent suffer from inherent design and machining problems that lower their efficiency and raise operating costs.
Therefore, it would be advantageous to employ a composite hydroentangling nozzle strip that could be subjected to the extremely high pressures found in today's hydroentangling machines without failing due to premature erosion of the nozzle inlet edge. It would also be advantageous to employ a composite hydroentangling nozzle strip that could withstand the erosion properties of cavitation while allowing a constricted water jet to form within the nozzle assembly. Finally, it would be advantageous to utilize a composite hydroentangling nozzle strip that can be easily and cost effectively maintained by the end user.

Composite hydroentangling nozzle strip and method for producing nonwoven fabrics therewith


A memory device includes a plurality of memory cells and a control unit. The memory cells include a first segment including a resistive memory material for storing information in a plurality of resistance states, a second segment including a non-insulating material, a first terminal, a second terminal, and a third terminal. The first segment and the second segment are arranged in parallel between the first terminal and the second terminal. The control unit is configured to apply in a write mode a write voltage to the first and the second terminal for writing the resistance state, and to apply in a read mode a read voltage to the first and the second terminal for reading the resistance state, and to apply a control signal to the third terminal for adjusting the electrical resistance of the second segment. A related method and control unit are also disclosed.

The invention is notably directed to a resistive memory device comprising a plurality of memory cells. The invention further concerns a related method and a related control unit.
Nanoscale memory devices, whose resistance depends on the history of the electric signals applied, could become critical building blocks in new computing paradigms, such as brain-inspired computing and memcomputing. However, there are key challenges to overcome, such as the high programming power required, noise and resistance drift.
One promising example for resistive memory devices are phase-change memory (PCM) devices. PCM is a non-volatile solid-state memory technology that exploits the reversible, thermally-assisted switching of phase-change materials, in particular chalcogenide compounds such as GST (Germanium-Antimony-Tellurium), between states with different electrical resistance. The fundamental storage unit (the "cell") can be programmed into a number of different states, or levels, which exhibit different resistance characteristics. The s programmable cell-states can be used to represent different data values, permitting storage of information.
In single-level PCM devices, each cell can be set to one of s=2 states, a "SET" state and a "RESET" state, permitting storage of one bit per cell. In the RESET state, which corresponds to an amorphous state of the phase-change material, the electrical resistance of the cell is very high. By heating to a temperature above its crystallization point and then cooling, the phase-change material can be transformed into a low-resistance, fully-crystalline state. This low-resistance state provides the SET state of the cell. If the cell is then heated to a high temperature, above the melting point of the phase-change material, the material reverts to the fully-amorphous RESET state if rapidly cooled afterwards. In multilevel PCM devices, the cell can be set to s>2 programmable states permitting storage of more than one bit per cell. The different programmable states correspond to different relative proportions of the amorphous and crystalline phases within the volume of phase-change material. In particular, in addition to the two states used for single-level operation, multilevel cells exploit intermediate states in which the cell contains different volumes of the amorphous phase within the otherwise crystalline PCM material. Since the two material phases exhibit a large resistance contrast, varying the size of the amorphous phase within the overall cell volume produces a corresponding variation in cell resistance.
Reading and writing of data in PCM cells is achieved by applying appropriate voltages to the phase-change material via a pair of electrodes associated with each cell. In a write operation, the resulting programming signal causes Joule heating of the phase-change material to an appropriate temperature to induce the desired cell-state on cooling. Reading of PCM cells is performed using cell resistance as a metric for cell-state. An applied read voltage causes current to flow through the cell, this current being dependent on the resistance of the cell. Measurement of the cell current therefore provides an indication of the programmed cell state. A sufficiently low read voltage is used for this resistance metric to ensure that application of the read voltage does not disturb the programmed cell state. Cell state detection can then be performed by comparing the resistance metric with predefined reference levels for the s programmable cell-states.
Another type of resistive memory devices are resistive random-access memories (RRAM). This is a non-volatile memory technology in which the fundamental storage unit (the "cell") comprises a RRAM material located between a pair of electrodes. The RRAM material in these cells is an electrically-insulating matrix which normally presents a high resistance to electric current. Due to properties of the RRAM matrix or of the combination of matrix and electrode materials, however, it is a particular property of RRAM cells that an electrically-conductive path can be formed within the high-resistance matrix by application of a suitable voltage to the electrodes. This conductive path extends though the matrix in a direction between the electrodes. When the path connects the two electrodes, the resistance of the memory cell drops dramatically, leaving the cell in a low-resistance "SET" state. The conductive path can be broken or eliminated by application of another, "RESET" voltage to the electrodes, returning the cell to the high-resistance RESET state. Hence by appropriate application of SET and RESET pulses in a data write operation, individual cells can be programmed into one of two states with measurably-different resistance values, permitting storage of information with 1-bit per cell. The programmed cell state can be determined in a read operation using cell resistance as a metric for cell state. On application of a read voltage to the electrodes, the current which flows through the cell depends on the cell's resistance, whereby cell current can be measured to determine the cell state. The read voltage is significantly lower than the write voltage used for programming so that the read operation does not disturb the programmed cell state.
The document by Wabe W. Koelmans, Abu Sebastian, Vara Prasad Jonnalagadda, Daniel Krebs, Laurent Dellmann & Evangelos Eleftheriou, Nature Communications, 6, 2015, Article number: 8181, introduces the concept of a projected memory device, whose distinguishing feature is that the physical mechanism of resistance storage is decoupled from the information-retrieval process.
Accordingly there is a need for further improvements of memory devices.

INTERNATIONAL BUSINESS MACHINES CORPORATION


An embodiment of this invention is directed to reducing waste paper caused by a margin added between images even between different jobs. According to the embodiment, a printing unit is caused to print an image based on an input job. It is determined, in accordance with a mode of a first job and a mode of a second job next to the first job, whether to provide a margin between an image printed based on the first job and an image to be printed based on the second job.

1. Field of the Invention
The present invention relates to a control apparatus, a control method, and a storage medium, and particularly to, for example, a control apparatus and a control method for conveying a print medium such as rolled printing paper, performing marginless print using an inkjet printhead, and cutting and discharges the paper.
2. Description of the Related Art
A printing apparatus incorporated in a printer, copying machine, facsimile apparatus, or the like is configured to supply a print medium from a feeding unit and print an image on the print medium by a printhead based on image data. In general, a print medium such as roll paper, a cut sheet, or a plastic sheet is used. In particular, many printing apparatuses that handle a large print medium use a so-called rolled print medium, and generally include a cutting mechanism that cuts printed roll paper at a predetermined position.
A printing apparatus including a cutting mechanism conventionally uses two types of marginless print, that is, marginless one-cut print and marginless two-cut print to produce a print product without a margin on the four sides. In the marginless one-cut print, images to be continuously printed in the conveyance direction of roll paper are printed without adding a margin between them, and the boundary between the printed images is cut by the cutting mechanism, thereby implementing marginless print. In the marginless two-cut print, a margin is added between images to be continuously printed in the conveyance direction of roll paper. On each of the leading end side and the tail end side of each image in the conveyance direction of roll paper, the cutting mechanism cuts the boundary between the image and the margin at a portion close to the image, thereby implementing marginless print.
In the marginless one-cut print, since no margin is added between images, waste paper can be reduced. On the other hand, in the marginless two-cut print, a margin is added between images to absorb a cutting position shift caused by the position shift of the cutting mechanism or an error due to conveyance accuracy limit and an error due to the cutting accuracy of the cutting mechanism in the roll paper width direction. This can prevent adjacent images from stepping in and maintain the quality of the print product. Hence, the user selectively uses marginless one-cut print or marginless two-cut print in accordance with the application purpose of a printed image or print product.
As a printing apparatus having a marginless print function of this type, a printing apparatus disclosed in Japanese Patent Laid-Open No. 2004-181843 is known. In Japanese Patent Laid-Open No. 2004-181843, upon receiving a marginless print job, it is determined whether the received job prints a plurality of images. If the received job prints a plurality of images, and the boundaries between the images to be continuously printed are similar, marginless one-cut print is used. If the boundaries between the images to be continuously printed are not similar, or the received job prints one image, marginless two-cut print is used.
Note that marginless one-cut print needs to continuously print a plurality of images in the conveyance direction of roll paper without adding a margin between them. If the received job prints one image, images are not continuously printed. Hence, the image is printed by marginless two-cut print. The image printing state of marginless print in the conventional printing apparatus will be described here with reference to a drawing.
FIG. 11 is a view showing a state in which images are printed by specifying marginless one-cut print in different jobs by the conventional printing apparatus. FIG. 11 illustrates a state in a case where different job A, job B, and job C of marginless one-cut print are continuously received, and the images are printed on roll paper 1.
Note that the job A, job B, and job C print two images, one image, and one image, respectively. As shown in FIG. 11, the conventional printing apparatus prints a first image A101 of the job A and a second image A102 of the job A without adding a margin between them. On the other hand, a margin is added between the second image A102 of the job A and an image B101 of the job B and between the image B101 of the job B and an image C101 of the job C. That is, a leading end fed portion 30 as waste paper is formed between the jobs, that is, between the second image of the job A and the image of the job B and between the image of the job B and the image of the job C.
As described above, in Japanese Patent Laid-Open No. 2004-181843, when a marginless print job is received, it is determined whether the received job prints a plurality of images, and the mode is switched between the marginless one-cut print and the marginless two-cut print in accordance with the determination result. That is, the mode is switched between the marginless one-cut print and the marginless two-cut print in accordance with the number of images and the print images in the same job.
However, upon printing a plurality of images in one job using marginless one-cut print, efficient paper use is possible. However, upon printing one image, waste paper is created because of switching to marginless two-cut print. In addition, continuous image print by marginless one-cut print is possible only in the same job. For this reason, if images of different jobs are continuously printed by marginless one-cut print, margins are added between the continuously printed images. Hence, the margin portions are formed as waste paper.

Control apparatus, control method, and storage medium


An extract of the skin or peel of passion fruit is prepared. The extract has the effect of ameliorating the symptoms of inflammation disorders, including asthma and osteoarthritis, in mammals, including humans, when administered in an effective amount.

The invention relates generally to botanical extracts and, more specifically, to extracts of passion fruit (Passiflora sp.), including particularly extracts of the skin of passion fruit, and the use of the extracts for food, nutraceutical, and medical applications.
Hypertension, or a blood pressure higher than 140/90 mm Hg, is the most common risk factor for cardiovascular and cerebrovascular morbidity and mortality. In the United States, high blood pressure is responsible for 40,000 deaths annually, while being the most modifiable risk factor for stroke. Hypertension affects about one in four adults, or almost 50 million people in the United States.
A Framingham study showed that as people aged from 30 to 65 years, their blood pressure increased an average 20 mm Hg systolic and 10 mm Hg diastolic pressure, with systolic blood pressure continuing to rise up to age 90.
While higher blood pressure increases the likelihood of a cardiovascular event, hypertension is not often well controlled and too few patients are adequately treated. Epidemiologic studies predict that reduction of the systemic blood pressure by the amount usually achieved in major clinical trials could reduce cerebrovascular events by 42% and cardiac events by 24%
Hypertension is frequently treated non-specifically, resulting in a large number of minor side effects, and a relatively high rate of non- or inadequate treatment. Thus, the search for new treatments for hypertension remains ongoing.
Therapies derived from natural products are well known. It has been established that certain flavonoids have a beneficial effect on hypertension. For example, a bark extract from the French maritime pine (Pinus pinaster), which contains a mixture of flavonoids, decreases systolic blood pressure when taken orally by mildly hypertensive patients.
Nitric oxide is an important molecular regulator of blood pressure. Nitric oxide is a potent vasodilator. It inhibits platelet activation, limits leukocyte adhesion to the endothelium, and regulates myocardiocontractility. Synthesis of nitric oxide catalyzed by nitric oxide synthase (NOS) occurs in the vascular endothelium while the production of nitric oxide involving inducible nitric oxide synthase (iNOS) is associated with immune function. However, small amounts of nitric oxide produced by another NOS, epithelial nitric oxide synthase (eNOS), have a cytoprotective effect and vasodilation action on the cardiovascular system.
Peroxynitrite is a potentially damaging oxidant, formed from nitric oxide (NO+O2ONOO). Peroxynitrite can give rise to lipid peroxidation, protein nitration, DNA single-strand breakage, and guanidine nitration.
It has been shown that the flavonoids quercetin and kaempferol inhibit NOLA-dependent spontaneous aortic ring contraction in spontaneously hypertensive rat (SHR) cells in vitro. NOLA is a nitric oxide synthase inhibitor. Large dose acetylcholine-induced vascular contraction can also be inhibited by antioxidative flavonoids such as quercetin, kaempferol, rutin, and esculetin. Inhibition of vascular smooth muscle contraction should lead to lower blood pressure.
In addition, the effects of flavonoids on immune function are controversial. Catechin enhances proliferation of lymphocytes and antibody production, while it exerts an inhibitory effect at high concentration. Some studies show that flavonoids enhance NK cell activity, while other studies show that flavonoids have no effect. Quercetin seems to inhibit non-specific immunological responses and exerts an anti-inflammatory action.
Asthma is a very common disease, affecting 4-5% of the population of the United States with incidence increasing rapidly. It is recognized as comprising a chronic, eosinophilic bronchitis and mediator-driven inflammatory process in the lungs. These agents produce potent bronchoconstriction, increased endothelial membrane permeability leading to airway edema, and enhanced secretion of thick, viscous mucus (Wenzel S E. Arachidonic acid metabolites: Mediators of inflammation in asthma. Pharmacotherapy 1997; 17(1 Pt2):3S-12S). A widespread narrowing of the air passages manifests asthma. This may be relieved spontaneously or as a result of therapy, and is defined clinically by paroxysms of dyspnea, cough, and wheezing. Asthma is an episodic disease: acute exacerbations are interspersed with symptom-free periods. Oxidants, organic dust, airborne allergens, chemical substances, cold air, and virus infections can trigger asthma attacks. Most attacks are short-lived, lasting minutes to hours, and clinically the patient recovers completely afterwards.
Although asthma is primarily a disease of airways, virtually all aspects of pulmonary function are compromised during an acute attack. When a patient presents for therapy, forced vital capacity (FVC) tends to be less than 50% of normal. The 1-second forced expiratory volume (FEV1) averages 30% or less than that of healthy people, and the maximum and minimum mid-expiratory flow rates are reduced to 20% or less than expected. In acutely ill patients, the residual volume (RV) frequently approaches 400% of normal and functional residual capacity doubles. The patients usually report that the attack has clinically ended when the RV has fallen to 200% of its predicted value and the FEV1 reaches 50% of the predicted value (American Thoracic Society: Lung function testing: Selection of reference values and interpretative strategies. Am Rev Respir Dis 1991; 144:1202-1218).
Asthma diagnosis is established by demonstrating reversible airway obstruction. Reversibility is traditionally defined as a 15% or greater increase in FEV1 after 2 puffs of a β-adrenergic agonist. Once the diagnosis is confirmed, the course of the illness and the effectiveness of therapy can be monitored by measuring peak expiratory flow rate at home or FEV1 in the laboratory or both. Successful asthma treatment is accomplished with the use of a β-agonist for the early stage and reduction of inflammation with anti-inflammatory agents such as glucocorticoids (which decrease airway hyper-responsiveness) for the late stage.
More than 15 million Americans suffer from rheumatoid and osteoarthritis. The most common source of adult disability is due to osteoarthritis of the knee. Studies have documented radiological knee osteoarthritis and symptomatic osteoarthritis in 12% and 6%, respectively, of women aged 45-64. It has also been reported that the age-and-sex standardized incidence rate for knee osteoarthritis is approximately 240 of 100,000 persons per year.
Although osteoarthritis is not considered an inflammatory disease, mediators classically associated with inflammation perpetuate cartilage damage that ensues from repeated mechanical injury. Cartilage destruction, an important pathological feature and a major cause of joint dysfunction, is mediated by two distinct pathways: Intrinsic, in which chondrocytes are responsible for the degradation of the extracellular matrix; and extrinsic, wherein cells and tissues other than chondrocytes, such as inflamed synovium, pannus tissue, and inflammatory cells affect the extra cellular matrix via synovial fluids.
It has been shown that Matrix metalloproteinases (MMPs), major proteolytic enzymes involved in extracellular matrix turnover, are expressed in osteoarthritic cartilage and contribute to tissue damage. Another suspected mediator of tissue damage is overproduction of nitric oxide (NO), a major catabolic factor produced by chondrocytes in response to proinflammatory cytokines such as IL-1β and TNF-α. Non-steroidal anti-inflammatory drugs (NSAIDs) are the most commonly used medications for arthritis, but are associated clinically with significant complications including non-ulcer dyspepsia, symptomatic gastric and duodenal ulcers, ulcer hemorrhages and perforations. Their economic impact includes 100,000 hospitalizations annually, costing $1.6 billion with 17,000 deaths. The complications of NSAIDs have increased with the aging of the American population and heightened use of aspirin for cardioprophylaxis. Accordingly, there is an increasing need to develop effective and safe treatment to minimize the adverse events in patients with osteoarthritis.
Passion fruit (Passiflora edulis) is a subtropical or tropical plant with a vigorous climbing character, growing to 20 ft. The purple passion fruit is native from southern Brazil through Paraguay to northern Argentina. Its fruit is nearly round or ovoid, 1.5 to 3 inches wide, with a tough, smooth and waxy rind.
In a search for bioactive constituents of passion fruit, it has now surprisingly been found that a passion fruit extract has an ameliorating effect on inflammation disorders. Inflammation, particularly chronic inflammation, has been implicated in cancer, hypertension, allergy, diabetes, chronic skin disorders, and autoimmune diseases such as lupus and multiple sclerosis. Passion fruit extract lowers systolic blood pressure in spontaneously hypertensive rats (SHR), and decreases nitric oxide production from iNOS, thus improving endothelial dysfunction in SHR. It is therefore also envisaged that the passion fruit extract will exhibit antioxidant properties. Passion fruit extract decreases the severity of symptoms of asthma, including wheezing, coughing, shortness of breath, and reduced expiratory functions. Passion fruit extract decreases the severity of osteoarthritis, including pain, stiffness and physical function.
It is therefore an object of the invention to provide an extract of passion fruit which exhibits therapeutic effects against hypertension and diseases associated with hypertension, asthma, osteoarthritis, and which is hepatoprotective, or at least to provide a useful choice.

Method of treating inflammation disorders using extracts of passion fruit


Embodiments of the invention provide a robust bonding material suitable for joining semiconductor processing chamber components. Other embodiments provide semiconductor processing chamber components joined using a bonding material having metal filler disposed in an adhesive layer. Other embodiments include methods for manufacturing a semiconductor processing chamber component having a bonding material that includes metal filled disposed in an adhesive layer. The metal filler is suitable for reacting with halogen containing plasmas such that a halogen based metal layer is formed on the exposed portion of the bonding material upon exposure to the plasma.

1. Field of the Invention
Embodiments of the invention generally relate to a semiconductor processing chamber, more specifically, to a bonding material suitable for joining semiconductor processing chamber components.
2. Description of the Related Art
Semiconductor processing involves a number of different chemical and physical processes whereby minute integrated circuits are created on a substrate. Layers of materials which make up the integrated circuit are created by chemical vapor deposition, physical vapor deposition, epitaxial growth, and the like. Some of the layers of material are patterned using photoresist masks and wet or dry etching techniques. The substrate utilized to form integrated circuits may be silicon, gallium arsenide, indium phosphide, glass, or any other appropriate materials.
A typical semiconductor processing chamber may have many components. Some components include a chamber body defining a process zone, a gas distribution assembly adapted to supply a process gas from a gas supply into the process zone, a gas energizer, e.g., a plasma generator, utilized to energize the process gas within the process zone, a substrate support assembly, and a gas exhaust. Some components may be comprised of an assembly of parts. For example, the substrate support assembly may include a conductive base adhesively bonded to a ceramic chuck while the gas distribution assembly may include a ceramic gas distribution plate bonded to a conductive base. Effective bonding of the parts requires a suitable adhesive and a unique bonding technique to ensure that the parts are securely attached to each other while compensating for any mismatch in thermal expansion and without adversely creating any interfacial defects.
Many semiconductor processes used to produce integrated circuits employ halogen, halogen containing gases and/or plasmas. For example, a halogen or halogen containing gas may be energized to etch, remove or deposit a layer on the substrate surface. The energized halogen or halogen containing gas generally is highly corrosive and has aggressive ions which attack exposed portions of the chamber components. Additionally, kinetically energized ionic and radical species bombard the exposed portions, thereby eroding the chamber components.
Erosion and gradual degradation of the chamber components due to plasma exposure may create gaps and/or openings between bonded components. As the gap in between each component becomes widened, the plasma generated in the process chamber may travel into the gap and attack the parts utilized to assemble the component. In particular, conventional bonding materials utilized to join parts of the components are specially susceptible to this kind of attack and erosion, thereby degrading the interfacial joint, creating interfacial voids and surface defects. Eroded or missing bonding material may accelerate the disassembly of the parts and reduce the lifespan of the chamber components. Additionally, flakes of the eroded bonding material, as well as the eroded parts of the chamber component may become a source of particulate contamination during substrate processing. Therefore, promoting the corrosion resistance of the bonding material utilized to assemble chamber components is desired to increase service life of the chamber components, reduce chamber downtime, reduce maintenance frequency and to improve substrate yields.
Therefore, there is a need for a robust bonding material utilized to assemble parts and/or components in a semiconductor processing chamber.

Self-passivating plasma resistant material for joining chamber components


A clock deskew circuit comprises a variable delay module and a control module. Included in the variable delay module are an input terminal for receiving a digital input clock signal, a control terminal for receiving an analog control signal, and a delay circuit which propagates the input clock signal from the input terminal to a buffer such that certain type signal edges (i.e., rising edges or falling edges) are delayed for a time interval which is varied in a continuous fashion by the magnitude of the control signal. Included in the control module is a feedback lead which receives the delayed clock signal from the buffer of the delay module, another lead which carries the input clock signal, and a control signal generating circuit. This control signal generating circuit sends the control signal to the control terminal of the delay module with a magnitude that increases the delay time interval when the delayed clock edges from the buffer lag the corresponding input clock edges by less than one clock cycle, and vice versa.

This invention relates to circuits for receiving a clock signal and generating multiple buffered duplications of the received clock signal such that any skew between the duplicated signals is minimal. Such a circuit is herein called a clock deskew circuit.
A primary use of the clock deskew circuit is in a multi-chip clocked logic system. In such a system, a clocked flip-flop "A" which is located on one chip often has an output which goes to an input of a clocked flip-flop "B" which is located on another chip. If the edge of the clock signals which trigger those two flip-flops do not occur at precisely the same time, a race condition can occur which will cause logic errors. For example, if flip-flop "A" is clocked early while flip-flop "B" is clocked late, the input to flip-flop "B" might change just as that flip-flop is being clocked.
To provide clock signals for the flip-flops on all of the chips which are precisely synchronized to each other is not an easy task. In particular, a single clock signal cannot simply be sent to each of the chips and there duplicated as many times as needed by multiple clock buffers. That is because the time delay through a clock buffer will unavoidably vary from one chip to another; and that variance in time delay will produce a skew between the buffered clock signals. Differences in time delay through the buffers are unavoidable because they are caused by many minute process variations which occur as the chips are fabricated.
In the prior art, the problem of dealing with clock skew is addressed in U.S. Pat. No. 4,637,018. However, the clock deskew circuit of that patent can only deskew the buffered clock signals in certain predetermined increments. For example, if a clock edge occurs too late, it is sped up by a certain fixed increment of time. But, depending on how late the clock edge was to begin with, that fixed increment of time may be too large. Further, since the minimal size of this fixed increment is limited, the degree to which it affects clock skew increases as the cycle time of the clock decreases. Consequently, for very high speed clocked logic systems, this patent has little or no value.
Also in the prior art, the clock deskew problem is addressed in U.S. Pat. No. 4,494,021. In this patent, the skew between buffered clock signals on different chips is reduced in a continuous fashion through the use of a voltage-controlled oscillator (VCO) which operates in conjunction with the variable delay line. However, with a VCO, the clock signal cannot be stopped since a VCO has an internal feedback loop which causes it to always oscillate. Being able to stop the clock is, however, a useful feature for various purposes--such as for doing maintenance on the clocked logic system and for putting the clocked logic system in a temporary wait state until some needed response from another external source is received.
Further, the amount of circuitry that is required to implement the '021 clock deskew circuit is quite large since the VCO circuitry is essentially doubled by the delay line circuitry. Also with patent '021, the delay line lies external to the VCO feedback loop, and thus the time delay through the delay line is not self-calibrating. Instead, the delay through the delay line is set by the operation of the VCO and by making the delay line stages identical to the VCO stages. However, in a mass production environment, the delay line stages and the VCO stages cannot always be exactly alike due to unavoidable processing variations, impedance loading variations, and mask variations.
Accordingly, the primary object of the invention is to provide an improved clock deskew circuit in which all of the above described problems are eliminated.

Self-calibrating clock circuit employing a continuously variable delay module in a feedback loop


Paper and ink, each having a reactive component of a two part epoxy system, provide documents with print which is resistant to mechanical and chemical alteration. When the paper and ink are used in a printing process, the reactive components of the epoxy system form a thermoset polymer that fuses the ink to the paper. Money orders, checks, legal documents and transaction receipts resistant to alteration are provided.

Many different means of security are available to prevent duplication of printed commercial documents, such as water marked paper and fluorescent inks which form latent images. The use of latent images as a security measure is well known but has limited utility where original documents are altered or modified. Fraudulent manipulation of print on issued money orders, checks, transaction receipts and legal documents is a significant problem. Alteration and modification of conventional print is possible in that the conventional inks employed typically comprise pigments/dyes and binders which are soluble within aqueous and/or organic solvents. For example, in ink jet printing, impact printing and relief printing, the pigment or dye is disposed within a solvent carrier which is subsequently evaporated and/or absorbed in the paper to cure the ink. The solubility characteristics of the pigments, dyes and binder provide for weak or reversible bonds to the recording medium. In addition, many techniques require certain coatings on the fibrous web or base sheet of papers to provide high print density and print with high definition. Such coatings also enable modification of print on the paper in that they typically form a barrier between the ink and the fibrous web of the paper and comprise components which are soluble in aqueous or organic solvents. This enables removal of portions of the coating with print thereon or the print itself.
The use of reactive components in inks and paper to improve the quality (water-fastness and smear resistance) of prints from inks is known. Examples of such inks and papers are described in the following references.
U.S. Pat. No. 5,006,862, issued to Adamic et al., describes the use of reactive dyes which attach to a chromophore wherein the prints are treated with a strong base to improve water-fastness and smear-resistance.
U.S. Pat. No. 5,139,860, issued to Mori, describes papers containing urethane resins and epoxy resins usefull in forming thin papers for heat-sensitive stencil printing.
U.S. Pat. No. 4,694,302, issued to Hackleman et al., describes a method of increasing the water fastness and print quality of an ink employed in ink jet printers with the use of a reactive species that react with a cellulose component in the substrate or added thereto to form a polymer that binds the dye in the ink to the polymeric lattice.
There is still a need for a printing system which produces printed media which cannot be modified, either chemically or mechanically, without detection.

Reactive paper and ink for indelible print


A heat-ray shielding glass products (e.g., solar control double glass) which have excellent heat-ray shielding property, especially thermal insulation property and enhanced durability under the condition of existence of moisture (under high humidity), and which can be prepared in low cost is provided. The solar control double glass 40 comprises a solar control glass 30 having a glass plate 21 and a heat-ray reflection layer 24 comprising an electrically-conductive polymer provided thereon and another glass plate 37, the solar control glass and the another glass being arranged at an interval such that the heat-ray reflection layer faces the another glass and the interval forming a hollow layer 38, and the heat-ray reflection layer 24 has a surface resistivity of not more than 10,000Ω/□.

In order to reduce the air-conditioning loads of buildings, vehicles such as bus and automobile, and rail cars such as electric car, the windows mounted these buildings or vehicles heretofore have required the functions of shielding near infrared ray (heat-ray) in the solar light and of insulating heat by reflecting heat-ray emitted from inside of a room. As glasses shielding or reflecting heat-ray, a heat-ray adsorbing glass obtained by introducing ions such as Fe, Cr and Ti by kneading action to add heat-ray adsorbing property to a glass, a heat-ray reflecting glass having metal oxide film formed by deposition, a heat-ray reflecting glass having a transparent thin film of indium-tin oxide (ITO) or tin oxide (ATO) formed by dry-plating, and a heat-ray shielding glass having a heat-ray shielding film (also referred to as Low-E film) obtained by lamination of a noble metal film/metal oxide film mainly consisting of metal oxide film/Ag film (Patent Document 1), have been developed, and put to practical use. Of these glasses or films, the Low-E film has functions (thermal insulation properties) of transmitting near infrared ray of the solar light (having relative short wavelength) and reflecting far infrared ray emitted from inside of a room (heater) to prevent the heat of the ray from escaping.
As these glasses shielding heat-ray (i.e., solar control glass), especially the glass having the Low-E film, a double glass having the structure that the glass shielding or reflecting heat-ray and another glass are arranged at a predetermined interval (through an air layer) such that these glasses face each other has been developed in order to improve thermal insulation property (Patent Document 2). Thereby, energy consumed by cooling and heating can be further reduced.
Further, a solar control glass enhanced in thermal insulation property and visible light transmittance, in which a coating layer comprising a particle of tungsten oxide and/or composite tungsten oxide (hereinafter referred to as (composite) tungsten oxide) and an UV-excitation color protection agent is formed on a glass plate, has been developed (Patent Document 3).
Further, it is known that the property absorbing infrared ray is found in an electrically-conductive polymer. Therefore, a transparent heat-shielding film comprising a surface protection layer, a heat-shielding layer containing the electrically-conductive polymer, a substrate, an ultraviolet ray absorbing layer and an adhesive layer has been developed (Patent Document 4).

Solar control glass and solar control double glass


In one embodiment, an exercise apparatus for exercising an arm includes a lever adapted to attach to a wheel of a wheelchair, a forearm support pivotally mounted to the lever that is adapted to support a forearm of a wheelchair user during exercise, and a resilient member attached to the lever that is adapted to resist movement of the lever by the user.

Many persons with neurological injuries require a wheelchair for mobility assistance. When such persons have severely weakened arms and hands, they often cannot move the wheelchairs by themselves. Therapeutic exercise following a neurological injury can not only improve arm and hand function but can further help prevent secondary complications such as contractures. If a person could regain enough arm movement, he or she may then be able to operate a wheelchair without, or with less, assistance.
There are various ways in which such therapeutic exercise can be performed. One option is active assistance exercise facilitated by a trained therapist. Active assistance requires that the patient actively contribute to the movement, an aspect of training that is important for motor learning and plasticity. Active assistance also enables patients with a high level of impairment to participate meaningfully in therapy by limiting frustration, increasing motivation, and promoting self-efficacy. Active assistance may also enhance sensory input that drives motor plasticity and can demonstrate correct movement patterns that enable better learning. While such active assistance provides many benefits, one-on-one sessions with a trained therapist are expensive and therefore out of reach to many individuals.
Because of the expense involved with using a therapist, there has been a surge in the development of devices that partially automate rehabilitation exercise. For example, robotic therapy devices have been designed to provide "assistance-as-needed" to arm movement, mimicking the clinical technique of active assisted exercise. While such robots enable a variety of forms of active assistance, they are also relatively expensive and often complex, making them impractical for widespread use. In addition, the viability of using devices that can actively apply large forces to limbs in minimally supervised environments, such as at home, is still unclear.
Persons with arm weakness can exercise their arms on their own without using a therapist or a robotic therapy device. However, if their arms are severely impaired, such exercise is difficult and compliance with autonomous exercise programs is low.
In view of the above discussion, it can be appreciated that it would be desirable to have a simple and inexpensive apparatus and method that enable an individual to exercise his or her arm for therapeutic purposes.

Apparatuses and methods for exercising the arm

The Regents of the University of California, A California Corporation


A system is disclosed for processing and streaming real-time graphics by a video-server for synchronized output via secondary-network connected display adapters to multiple displays arranged as a video-wall. This system enables the video-server to leverage performance advantages afforded by advanced GPUs, combined with low-cost Smart displays or System-on-Chip devices to deliver advanced realtime video-wall capabilities over the network while offering flexibility in the selection of network display adapters and still achieving synchronized output of multiple sub-image streams to selected end-point displays. This has applications generally in the field of real-time multiple-display graphics distribution as well as specific applications in the field of network video-walls. A method and computer readable medium are also disclosed that operate in accordance with the system.

The present invention relates generally to improving the setup and operation of video-wall displays and particularly to network addressable displays.
A video-wall display system is a method to overcome the costs of manufacturing and installing very large displays, by assembling a large display using multiple smaller displays arranged and working together. By dividing a single image sequence into multiple sub-image sequences and displaying the appropriate sub-images of the sequences in synchrony on the arranged display devices, a much larger display with higher resolution can be simulated.
Traditional video-wall methods involve the pre-processing of video files, transferring and storing these processed video files onto devices, and then time-syncing the playback of these separate video files (a method unable to deal with real-time content), or distributing the entire video file to all devices and having them individually render the whole file and playback the cropped relevant portion for their display (a method unable to deal with high-resolution content unless each network display adapters device has sufficient processing and network capabilities), and/or using traditional video cards connected to the video-server (which requires the video-server to be physically close to the video-wall or requires expensive proprietary and complex video extension systems). All of these conventional approaches have significant limitations therefore a new approach is desirable.
While the video pre-processing method is sufficient for some video-walls which do not need to respond to content changes in realtime, for example repeatedly playing the same looped content, for other video-walls such as those in control rooms or monitoring facilities where realtime video feeds or where human interaction with the video-wall is required or desired, realtime video processing is essential.
Although the method of transmitting an entire video file to each display adapter and having each one crop the content to suit their individual placements on a video wall does achieve realtime performance, it can be prohibitively expensive as communication bandwidth tends to scale with both the number of display adapters, and the total resolution of the video wall (as low-resolution video displayed on high-resolution video walls appears blocky and pixelated), which greatly increases communication costs. The costs of the individual display adapters also increase as each one is required to be able to decode, crop, and display a high-resolution video in realtime, requiring sophisticated onboard graphics capabilities. Those systems which do employ this method typically require the wall to be composed of a very simple arrangement of displays (typically a rectangular grid with each display in the same orientation) so as to reduce the calculations necessary for each adapter to determine its place in the wall and the corresponding section of the video file to display.
The costs of the display adapters in the above method can be reduced by having each display adapter write to multiple displays but this requires even more powerful graphics processing in the display adapters. Taken to its extreme, this method evolves into a single "display adapter" serving all the displays for a video wall, but at this point the "display adapter" is in reality a high-end video server containing multiple high-end video cards. In this method the graphical content to display is rendered by one or more Graphics Processing Units (GPUs) each of which then directly outputs to one or more attached displays. Hence this traditional approach to video-walls requires the video-server to house one physical video output (and attached display) for each display sub-section of the video-wall. The requirement for a physical video output limits both the size (number of potential attached screens) and the distance to the displays that can be achieved with a single video-server.
By employing a video-server which renders and transmits video information over a conventional network to low-cost, low-power, network-attached, minimal-complexity display adaptors it is possible to achieve improvements over traditional systems in terms of cost, design, maintenance, space-saving, reliability, and flexibility of the system as well as allowing for additional advanced functionality such as failover but it also introduces numerous technical challenges which are addressed by this invention.
This approach takes advantage of the ready availability of low-cost network display adapter devices (such as android TV devices) and smart displays (i.e., displays equipped with system-on-a-chip (SOC) devices and integrated network-interface-controllers (NICs)). These devices are low cost but have vastly reduced processing power, resolution, and expansion capabilities compared to a video-server. This invention makes it possible for a powerful video-server to be used in combination with these low-cost devices to create a synchronized video-wall. For example a video-server may be capable of rendering 8 k or 16 k output whereas a network display adaptor might only be capable of 1 k or 4 k resolution. The addition of a video-server allows dynamic changes in the source content (for example from live video feeds, or a user moving a mouse across a screen) to be rendered with minimal (e.g., undetectable to the human eye) time delay.
The network approach offers additional advantages:                If the electrical power draw of the network display adapters are sufficiently low, their needs can be met by Power-over-Ethernet (PoE), and such network display adapters do not need to have an independent power delivery system.        A network-based approach ensures that displays can be automatically switched to a back-up failover video-server and resume playing content in the event that the original video-server fails.        It allows a single video-server to simultaneously drive the playback of multiple video-walls in different locations (each video-wall could either play different content or show the same image in several rooms with negligible additional CPU usage).        The network approach enables smart displays to be used as video-wall network display adapters eliminating the cost of acquiring media players.        The general video-wall invention can be modified to allow both input source and output displays to be changed on the fly (enabling individual displays to be dynamically added into or removed from the video-wall without interrupting playback on other displays).        There is no physical or theoretical limit on the number of displays that can be in the video-wall or the maximum resolution of the video-wall.
To achieve a realtime network video-wall the following challenges must be met:                1. Aggressive stream compression (to achieve reasonable network transfer rates over wide-area or wireless networks and not consume inordinate amounts of limited bandwidth. In addition, the built-in NICs on many SOCs have limited bandwidth capabilities.)        2. Frame synchronization that accounts for both variation in network latency as well as varying video-decoding capabilities within the SOC devices.        3. Extremely efficient video-server software and encoding framework to enable the video-server to process all of the sub-image sequences of the video with sufficient speed to achieve no perceivable latency (required for interactive and realtime use-cases).
To achieve the needed levels of bandwidth reduction, redundant transmission of information must be reduced as much as is practical. While a video server could compress, encode, and individually transmit entire video streams to each component display adapter in a video wall (with that display adapter decoding and cropping the stream appropriately) this multiplies the required bandwidth of the network by the number of displays in the video wall. This could be alleviated by multicasting a single video stream, but many networks, including almost all wide-area networks, do not support multicast due to the many security challenges that multicast poses.
This method also has the attendant disadvantage of limiting the total effective video resolution of the video wall to the lowest maximum resolution of any display adapter in the wall, as each display adapter must be able to decode the full resolution of the stream. Many smart displays are limited to decoding videos of no higher resolution than they can directly display. They also tend to have very little ability to perform real-time, display-specific image modification (ie, rotation, keystoning, aspect correction) thus making these attractive features much more difficult to implement.
Whereas in the disclosed method, where a sequence of video frames is chopped into sub-image sequences and separately modified, encoded, and streamed, the total resolution is limited only by the capabilities of the much more powerful video-server. As well, sub-image sequences streamed to each display adapter thereby contain no more information than what that particular display adapter needs to display and thus it can easily be sent over WANs and secure networks, and requires much lower demands on the decoding and processing abilities of the network display adapters.
Synchronization poses one of the main challenges in this invention. Non-realtime video streaming is commonplace with internet services such as Netflix but these services tend to impose multi-second delays during transmission due to the nature of TCP/IP communications and the addition of buffering. In most video streaming applications where there is no synchronization, chopping, or realtime requirement, a few seconds of delay between the video-server and network display adapter is of no consequence, but this is not true of realtime video walls.
The first challenge in synchronization is to achieve sub-millisecond latency in the processing, chopping, and splitting of frames on the server. Here this can be achieved through the novel concept of doing all the decoding, extraction, modification, and re-encoding of the sub images by the video-server GPU thereby eliminating expensive memory copies between the CPU and GPU and taking advantage of the advanced image processing capabilities of modern GPUs. The second challenge is achieving the right encoding parameters (compression, bitrate) that are compatible with multiple network display adapters. Hence the encoding parameters (such as compression, bitrate, encoding method, framerate, etc.) must be optimized and compatible with both the speed and latency of the network connection between the video-server and multiple network display adapters, as well as the decoding capabilities of the network display adapters. The third challenge is ensuring that the streaming occurs in such a way that the network display adapters are able to play back the frames perfectly synchronized with optimized latency (to the devices and network conditions). This requires the unique configuration of both the video-server and the network display adapters. The network display adapters must maintain their own clocks synchronized with a network time service (typically a network time clock). In the preferred embodiment this would be via a standard time protocol such as Network Time Protocol (NTP), however many other options exist. In the preferred embodiment the video-server would also be synchronized to the same network time dock (thus mitigating the need for inter-clock adjustment calculations). The video-server must then also ensure all of the sub-image sequences are streamed with accompanying timing information (such as clock references, sub-sequence time stamps, and latency offset adjustments). The network display adapters, in addition to receiving and decoding the sub-image sequences, must also combine the timing information with their local information (such as their synchronized clocks) so as to output a given sub-image in synchrony with the display of all other scheduled sub-images on all other display adaptors. The mere inclusion of individual sub-image time stamps is insufficient to achieve this synchronization as additional latency has been incurred since the video was streamed by the server (including the sending, receiving, decoding, and output by the network display adapter), which must be taken into account. Additionally this latency can vary from adapter to adapter based on conditions on the network, system load on the network display adapter, etc.
Hence to ensure the network display adapter has sufficient time to output synchronously, latency compensation is required to adjust for the delays inherent in sending over the network, and the receiving, decoding and output by the network display adapters. This compensation can be applied within the system in multiple ways, several of which are described below, but additional methods and combinations thereof for applying this compensation are envisioned. The compensation could be applied by:                the network display adapter adding the latency offset to the sub-sequence time stamp to determine a modified display time,        the video-server adding the latency offset when writing the time stamp (before sending),        setting a time difference in relation to network time between multiple network display adapters and the video-server (e.g., the video-server clock being set slower relative to network time, and/or the network display adapter's time being set faster than network time).
The cumulative desired latency compensation could be achieved by any one of these methods or a combination thereof.
In addition the necessary amount of latency compensation needed can be set to a maximum deemed sufficient for a given network and its current configuration, or it can be dynamically calculated from timing information sent back from the display adapters to the video server.
Traditional methods of synchronizing streaming video playback to network display adapter devices include sending a timing pulse to indicate the time to display the next frame, or the transmission of the frame to each device at a time calculated so as to be displayed at the moment of decoding. However, depending on network quality and any variation between network display adapters and the image sizes of the relative portions, such playback is typically not perfectly synchronized.
The most common way to achieve synchronization within a video-wall is to simply directly connect each display to the video-server (via multiple video outputs from multiple video cards within the video-server) this way the output process is fast enough that there is limited opportunity for any latency variation between different displays within the system. However this last approach means the displays must be within a display-cable length of the video-server and the number of displays is limited by the capacity of the video-server to accommodate additional video cards.
Software clocks running on different computers typically don't run at the exact same speed hence time drift frequently occurs even with identical hardware over time and can even change with temperature changes or as CPU clock speed changes to adapt to local conditions (power demand, processor load, etc). Hence achieving synchronized playback over an extended period requires some form of centralized clock. A network clock such as network time protocol (NTP) is one way to achieve this, however other methods of time synchronization over the network such as a heartbeat, or synchronized high-accuracy clocks are also envisioned.
The need for low-latency, low-bandwidth, and high speed image processing is also paramount and so the video-server offloads as much of this work to high-speed GPU devices as possible, including video decoding, cropping, modifying, and re-encoding the sub-images in a sequence. These modifications can include image rotation to match rotated displays, image warping to match curved displays or projected displays, size adjustments (as there is no point in sending an image to a display adapter that is larger than can be displayed), aspect ratio compensation (by adding borders, if need be), and even frame-rate adaptations (in the case that a sub-image contains the same or substantially the same image as the previously encoded image).

System and method for synchronized streaming of a video-wall


Within a mobile communication device (for example, a cellular telephone), there is a local oscillator. The local oscillator includes a novel frequency divider that includes a novel configurable multi-modulus divider (CMMD). The frequency divider is configurable into a selectable one of multiple configurations involving different mixes of synchronous and asynchronous circuitry. In each configuration, the frequency divider produces an amount of noise and consumes an amount of power. Power consumption is loosely inversely related to noise produced in that the modes with the highest power consumption produce the least amount of noise, and vice versa. The mobile communication device is operable in one of multiple different communication standards (for example, GSM, CDMA1X and WCDMA). The different communication standards impose different noise requirements on the frequency divider. By using the lowest power configuration that satisfies the noise requirements of the standard being used, power consumption of the cellular telephone is reduced.

1. Technical Field
The disclosed embodiments relate to local oscillators for use in multi-mode mobile communication devices.
2. Description of Related Art
The receiver and transmitter circuitry within a cellular telephone typically include one or more local oscillators. The function of a local oscillator is to output a signal of a selected frequency. Such a local oscillator in a cellular telephone may, for example, include a phase-locked loop (PLL) that receives a stable but relatively low frequency signal (for example, 20 MHz) from a crystal oscillator and generates the output signal of the selected relatively high frequency (for example, 900 MHz). The feedback loop of the PLL includes a frequency divider that receives the high frequency signal and divides it down to obtain a low frequency signal that is of the same phase and frequency as the signal from the crystal oscillator. A type of divider referred to here a "multi-modulus divider" is often used to realize the frequency divider. Due to the high frequency operation of the frequency divider, the frequency divider may consume an undesirably large amount of power. Techniques and methods for reducing the amount of power consumed by the frequency dividers in the local oscillators are desired.

Configurable multi-modulus frequency divider for multi-mode mobile communication devices


A magnetic sensor includes a pinned magnetic layer having first and second magnetic sublayers sandwiching a nonmagnetic metal layer. The nonmagnetic metal layer contains at least one of Ru, Re, Os, Ti, Rh, Ir, Pd, Pt, and Al. The atoms in the first magnetic sublayer and the atoms in the nonmagnetic metal layer overlap with each other, while each of the crystal structures is deformed. The deformations in the crystal structure of the first magnetic sublayer increase the magnetostriction constant, thereby increasing the magnetoelastic effect of the magnetic sensor.

1. Field of the Invention
The present invention relates to a magnetic sensor having a free magnetic layer, a nonmagnetic conductive layer, and a pinned magnetic layer, and in particular, to a magnetic sensor that pins the magnetization of the pinned magnetic layer by means of a uniaxial anisotropy of the pinned magnetic layer itself.
2. Description of the Related Art
Recently, most magnetic heads mounted in magnetic recording and playback devices include a spin valve magnetic sensor that uses the giant magnetoresistive (GMR) effect.
The spin valve magnetic sensor includes a ferromagnetic film called a pinned magnetic layer, a ferromagnetic soft magnetic film called a free magnetic layer, and a nonmagnetic film called a nonmagnetic conductive layer. The nonmagnetic conductive layer is disposed between the pinned magnetic layer and the free magnetic layer.
The magnetization of the free magnetic layer is aligned in a particular direction by a longitudinal bias magnetic field from, for example, a hard bias layer composed of a hard magnetic material. The magnetization of the free magnetic layer is sensitive and is changed in response to an external magnetic field generated from a recording medium. On the other hand, the magnetization of the pinned magnetic layer is pinned in a direction that is perpendicular to the magnetization direction of the free magnetic layer.
The relationship between the changes of magnetization direction of the free magnetic layer and the pinned magnetization direction of the pinned magnetic layer changes the electrical resistance. A leakage field from the recording medium is detected by changes of voltage or current based on the change of the electrical resistance.
In the known spin valve magnetic sensor, the pinned magnetic layer is formed on an antiferromagnetic layer composed of an antiferromagnetic material such as PtMn. An exchange coupling magnetic field is created between the pinned magnetic layer and the antiferromagnetic layer, thereby pinning the magnetization of the pinned magnetic layer.
The exchange coupling magnetic field generated at the boundary between the antiferromagnetic layer and the pinned magnetic layer can be large enough to prevent the change of the magnetization direction of the pinned magnetic layer, due to the application of a magnetic field during the manufacturing process or a leakage field from the recording medium. Furthermore, the antiferromagnetic layer itself does not generate an external magnetic field; therefore, this structure simplifies the design of the magnetic sensor.
However, the antiferromagnetic layer must have a thickness of about 200 Å so that the exchange coupling magnetic field generated at the boundary between the antiferromagnetic layer and the pinned magnetic layer has a sufficient intensity to provide the above benefits.
An antiferromagnetic layer having a large thickness disposed in the laminated component of a magnetic sensor mainly causes a shunt loss of a sense current. In order to achieve a high recording density on the recording medium, the output of the magnetic sensor must be improved. However, the shunt loss of the sense current prevents improvement of the output of the magnetic sensor.
Furthermore, shield layers composed of a soft magnetic material are disposed on the magnetic sensor and under the magnetic sensor in order to effectively read recording signals to be detected. Moreover, in order to achieve a high linear recording density on the recording medium, the distance between the top shield layer and the bottom shield layer must be small. However, an antiferromagnetic layer having a large thickness prevents the distance between the top shield layer and the bottom shield layer from being small.
Referring to FIG. 12, a magnetic sensor that does not have the antiferromagnetic layer has been proposed. The magnetic sensor pins the magnetization of the pinned magnetic layer by means of a uniaxial anisotropy of the pinned magnetic layer itself.
The magnetic sensor shown in FIG. 12 include a multilayer film T having, from the bottom, a bottom gap layer 1, an underlayer 2, a pinned magnetic layer 3 having a synthetic ferrimagnetic structure, a nonmagnetic conductive layer 4, a free magnetic layer 5, and a protective layer 6 in that order. The pinned magnetic layer 3 includes a first magnetic sublayer 3a, a second magnetic sublayer 3c, and a nonmagnetic interlayer 3b disposed therebetween. Furthermore, at both sides 7 of the multilayer film T, bias base layers 8, hard bias layers 9, and electrode layers 10 are formed.
The magnetic sensor shown in FIG. 12 does not have the antiferromagnetic layer that is overlapped with the pinned magnetic layer 3. According to this magnetic sensor, the magnetization of the pinned magnetic layer 3 is pinned in the Y direction shown in the figure by means of the uniaxial anisotropy of the pinned magnetic layer 3 itself. Accordingly, the shunt loss can be small compared with a known magnetic sensor having the antiferromagnetic layer. Thus, the output in detecting the magnetic field of the magnetic sensor can be improved by 20% to 30%. Furthermore,. the distance between the top shield layer and the bottom shield layer, which are disposed on and under the magnetic sensor, respectively, can be small, thereby achieving a higher linear recording density on the recording medium.
Japanese Unexamined Patent Application Publication Nos. 8-7235 (pp. 8 and 9, FIG. 5) and 2000-113418 (pp. 7 and 8, FIGS. 4, 5, 6, and 7) disclose the magnetic sensor shown in FIG. 12.
The magnetic sensor described in Japanese Unexamined Patent Application Publication No. 8-7235 includes a buffer layer 62, i.e., an underlayer, composed of tantalum (Ta), and a pinned ferromagnetic layer 70 disposed thereon. The pinned ferromagnetic layer 70 includes a first cobalt (Co) film 72, a second cobalt (Co) film 74, and a ruthenium (Ru) film 73 disposed therebetween. The magnetization of the first cobalt (Co) film 72 and the second cobalt (Co) film 74 is pinned by each of the anisotropy fields. The first cobalt (Co) film 72 and the second cobalt (Co) film 74 are antiferromagnetically bonded to each other. The first cobalt (Co) film 72 and the second cobalt (Co) film 74 are magnetized in antiparallel directions.
As described above, the magnetic sensor described in Japanese Unexamined Patent Application Publication No. 8-7235 includes the buffer layer composed of tantalum having cobalt (Co) films thereon. Unfortunately, this structure cannot appropriately pin the magnetization direction of the pinned ferromagnetic layer 70. Japanese Unexamined Patent Application Publication No. 2000-113418 also points out this problem.
The magnetic sensor described in Japanese Unexamined Patent Application Publication No. 2000-113418 was invented in order to solve the problem in Japanese Unexamined Patent Application Publication No. 8-7235. According to this magnetic sensor, ferromagnetic layers in a laminated ferrimagnetic pinned layer are composed of CoFe or CoFeNi, thereby improving the induced anisotropy.
Furthermore, Japanese Unexamined Patent Application Publication No. 2000-113418 discloses an underlayer composed of Ta, the underlayer being disposed under the laminated ferrimagnetic pinned layer. Referring to experimental results in which the presence of the Ta underlayer is compared (see FIGS. 4, 5, 6, and 7 in Japanese Unexamined Patent Application Publication No. 2000-113418), when using CoFe alloy as the ferromagnetic layers, a magnetic sensor that does not have the Ta underlayer has a larger magnetoresistance change and a larger coercive force than those of the magnetic sensor that has the Ta underlayer.
In Japanese Unexamined Patent Application Publication No. 2000-113418, CoFe alloy is used as the ferromagnetic layers, and the ferromagnetic layers have a positive magnetostriction in order to increase the induced anisotropy of the laminated ferrimagnetic pinned layer.
One factor to pin the magnetization of the self-pinning type pinned magnetic layer is the uniaxial anisotropy due to magnetoelastic energy of the pinned magnetic layer. In particular, one may optimize the magnetostriction of the pinned magnetic layer. However, Japanese Unexamined Patent Application Publication No. 2000-113418 does not consider or discuss optimization of the magnetostriction of the pinned magnetic layer let alone disclose a specific construction to optimize the magnetostriction of the pinned magnetic layer.

Spin valve magnetoresistive element having pinned magnetic layer composed of epitaxial laminated film having magnetic sublayers and nanomagnetic interlayer