A method for deactivating a relay feature of a relay node in a mesh network comprising a plurality of nodes, wherein said relay node formulates a connectivity report comprising routing information to a beacon node in said mesh network, said routing information being based on connectivity control messages received from said beacon node. The method comprises the steps of transmitting, by said relay node, said connectivity report to neighbouring nodes, transmitting, by said relay node, a query message to said neighbouring nodes for querying whether said relay feature of said relay node may be deactivated receiving, by said relay node, response messages from said neighbouring nodes, in response to said query message, wherein each of said response messages indicates that said relay feature of said relay node may be deactivated, and deactivating, by said relay node, said relay feature of said relay node based on said response messages from all of said neighbouring nodes. Complementary methods and devices for performing a method according to the present disclosure are also presented herein.

The Bluetooth Mesh profile specification, released in July 2017, introduces mesh networking for Bluetooth Low Energy, BLE, technology. On the link layer, Bluetooth Mesh makes use of contention-based broadcasting while network layer relaying of messages is based on message flooding. Simply described, with message flooding, the sender of a message sends the message to all its neighbours, who in turn relays it to all its neighbours and so on; in this way, the message proliferates to all nodes in the network, and hence the message is also delivered to its destination. Flooding is a simple and robust networking technique. For example, it inherently copes with node mobility and topology changes, however, it is wasteful of bandwidth.
To avoid unrestricted relaying of messages, Bluetooth Mesh uses flooding with a set of restrictions, by employing:                Message cache. A message cache is used to keep track of relayed messages and restrict nodes to re-relay a message that it has already relayed.        Time-to-live, TTL, counter. Every message includes a TTL counter that is initialized by the message sender and is decremented at each hop. When the TTL counter expires, the message is not relayed further in the network.
In Bluetooth Mesh this approach is referred to as managed flooding. Furthermore, relaying in Bluetooth Mesh networks can only be performed by nodes that support the relay feature, and such nodes are commonly referred to as relay nodes. The relay feature in relay nodes can be configured to be in an on/active state or in an off/deactivated state. As a result, messages are only relayed by nodes that support the relay feature and has the feature turned on.
The performance of a Bluetooth Mesh network is highly dependent on the relay node deployment and configuration. On one hand, the relay node deployment should be dense enough to provide network connectivity to all nodes and offer some level of path redundancy. On the other hand, a too high density of active relay nodes implies an increased risk of over-the-air collisions and lost messages, which degrades performance. Finally, any viable relay node deployment and configuration solution must assert that the network connectivity is maintained, i.e. that there is a path between any node in the network to any other node and that the network does not reduce into multiple connected components. That is, the network should not reduce to separate network parts without any connection in between.
Topology control is a technique used in distributed computing to alter the underlying mesh network to reduce the cost of distributed algorithms if run over the new resulting graphs. Within the field of wireless sensor networks, a goal of topology control is to save energy, reduce interference between nodes and extend lifetime of the network. Topology control techniques are often classified into two categories—namely network coverage and network connectivity.
Here, network coverage refers to the area over which the network has sensing capabilities, or how well the sensor network monitors the target field. Network connectivity, on the other hand, refers to how well sensor nodes are mutually connected and the message delivery in the network. The connectivity part has relevance for this invention, while the sensor coverage aspects are not further discussed here.
Connectivity topology control may further be categorized into a temporal domain and a spatial domain. In the temporal category, the radio duty cycle i.e. active/deactive schedule, is configured to prolong node and system lifetimes while at the same time keeping equivalent capabilities in the topological sense. Spatial connectivity control adjusts the node's output power to improve connectivity among nodes.
Connectivity control techniques known from the literature focus on either adjusting node's duty cycles or output power to improve the connectivity of the network. To operate at a "low" duty cycle enhances the lifetime of the network, however, it also reduces the network throughput and capacity and does not necessarily solve the Bluetooth Mesh problem with over-the-air collisions caused by a too high relay node density. Connectivity control based on output power adjustment, on the other hand, can be used to reduce the problem of over-the-air packet collisions, but a disadvantage with such methods include an increased hop count, which in turn leads to an increased message delay, lower throughput, and reduced capacity. No known method considers the specific properties of link layer broadcasting and network layer message flooding utilized in Bluetooth Mesh.
Furthermore, existing methods for relay node configuration in a Bluetooth Mesh network involve manually executed tasks performed by a person skilled in the art. Manual involvement is typically costly, and the lack of skilled personnel imposes risks that networks are improperly configured or not configured at all, resulting in poor network performance.
Moreover, under dynamic conditions, for example, when nodes are added to and removed from a network, or when nodes are mobile, relay node configuration must be performed on a regular basis to assure that a high network performance is maintained over time. For Bluetooth Mesh, a manual re-configuration of relay nodes would not be feasible both from a practical perspective and a sheer size perspective, but also from a cost perspective, as Bluetooth Mesh is a technology whose attractiveness is related to low cost and simplicity.
Accordingly, it is desirable to find new methods and apparatuses that facilitate automatic configuration of relay nodes in a mesh network. Methods and apparatuses that facilitate a distributed solution are of special interest, as such distributed solutions typically limit the information collection and are less complex.

Methods of and device for autonomous configuration of a relay node device in mesh network


A reflection-type photointerrupter of the present invention includes a substrate, a light emitting element and a light receiving element. The substrate includes a first surface, a second surface opposite the first surface, and a first and a second recesses that are open in the first surface side. The light emitting element is arranged in the first recess, while the light receiving element is arranged in the second recess. The light emitting element is capable of emitting light. The light receiving element is capable of receiving the light emitted from the light emitting element and reflected by an object to be detected.

1. Field of the Invention
The present invention relates to a reflection-type photointerrupter for detecting an object by utilizing light reflection.
2. Description of the Related Art
FIG. 7 illustrates a photointerrupter X4, which is an example of conventional reflection-type photointerrupter. The photointerrupter X4 includes a substrate 91, a light emitting element 92, a light receiving element 93, a molded resin 94 and a light-shielding resin 95. The substrate 91 is in the form of a rectangular flat plate and made up of a base member 91a and a wiring portion 91b. The light emitting element 92 is arranged on the substrate 91 to emit infrared light. The light receiving element 93 is arranged on the substrate 91 to receive light and generate an electromotive force corresponding to the amount of light received. The molded resin 94 is provided on the substrate 91 to cover the light emitting element 92 and the light receiving element 93. The light-shielding resin 95 is arranged between the light emitting element 92 and the light receiving element 93. In the photointerrupter X4, when the light emitted from the light emitting element 92 is reflected by an object to be detected and received by the light receiving element 93, the light receiving element 93 generates an electromotive force corresponding to the amount of light received. Based on the electromotive force, the object is detected. This type of conventional photointerrupter is disclosed in JP-A-2007-13050, for example.
In recent years, in accordance with the size reduction of electronic devices (such as foldable mobile phones) in which a photointerrupter is to be incorporated, the thickness reduction of a photointerrupter is strongly demanded. However, the above-described photointerrupter X4 cannot sufficiently meet the demand for the thickness reduction.
The present invention has been proposed under the circumstances described above. It is therefore an object of the present invention to provide a reflection-type photointerrupter which is suitable for thickness reduction.


Model-based application management architecture. A developer can describe an application or service in terms of its constituent components. Desired states can be described in terms of functionality, configuration, security, and performance. The description is employed at application installation to configure management services, which services help to ensure availability of the application through automatic management actions, such as configuration management, problem detection, diagnosis, and recovery.

Traditional systems management is largely ad-hoc. Application developers do not have a structured framework for managing their applications and achieving high reliability. The expected behaviors of applications are largely reverse engineered. Application developers do not have structured guidance and framework for how to think about managing their applications and achieving high reliability. Moreover, operating systems do not provide a holistic system for developers to leverage.
The complexity of systems is becoming too great for operators to understand. Significant time is spent tracking down dependencies and latent errors. Where instrumentation is not available, operators need to take a process dump, since this is the only way to determine what requests are executing and the current state.
Systems today do a poor job alerting users to potential and actual problems. Users cannot readily tell what applications are installed, and do not know if the system and applications have the right files and versions, are configured correctly for how they are used, are configured securely for the environment, and if they are operating optimally and not running out of resources. Moreover, applications are not easily debugged across multiple machines—there is no common application and transaction context.
Operators also cannot easily figure out application dependencies, whether files, components, configuration settings, security settings, or devices like storage area networks and routers. The system can neither warn users that a change may break other applications, nor use this information to help identify root cause.
Reactive monitoring is most common today where alerts let the user know that there was a failure, and not the cause of the problem. Advanced scripts and providers can provide more informative and actionable alerts, but lack an infrastructure for performing root cause analysis. Additional diagnostics are often needed for troubleshooting. However, a problem with reactive monitoring is that an alert is often too late—the application is already not available to users. Monitoring can help by triggering failover or taking a server offline with a load balancing device. However, the system should be sufficiently intelligent to detect potential problems in an application before the potential problems become failures.
Other problems are only detected by looking across multiple machines and clients. Examples include distributed intrusion detection and degradations in application performance. If administrators had at their disposal the capability to see a deviation from expected performance, been able to trace root cause to configuration changes as they capture snapshots, and solved the problem before users complained, many massive network performance problems and downtime could have been avoided.
Conventionally, problems with distributed applications are only determined by looking at historical data or trends from a user perspective. Administrators often do not know if their replication backlog is a problem or not, and need to run the service first and log operational metrics to establish a baseline with warning and critical thresholds.
What is needed is an improved mechanism for management infrastructure.

This patent is subject to a terminal disclaimer.

Model-based management of computer systems and distributed applications


Embodiments provide a data sampling circuit and a data sampling device. The sampling circuit includes: a first sampling module configured to respond to a signal from a data signal terminal and a signal from a reference signal terminal and to act on a first node and a second node; a second sampling module configured to respond to a signal from the first node and a signal from the second node and to act on a third node and a fourth node; a latch module configured to input a high level signal to a first output terminal and input a low level signal to a second output terminal or input the low level signal to the first output terminal and input the high level signal to the second output terminal according to a signal from the third node and a signal from the fourth node; and a decision feedback equalization module.

In low power double data rate (LPDDR) memories, as signal transmission rate becomes faster and faster, channel loss has an increasing negative effect on signal quality, which will cause intersymbol interference.
In related technologies, typically an equalizer is arranged at a receiver (RX) to compensate for a channel. A continuous time linear equalizer (CTLE) or a decision feedback equalizer (DFE) may be selected as the equalizer.
However, a separate equalizer may increase power consumption of the LPDDR, such that the LPDDR cannot meet requirements for lower power consumption.

Data sampling circuit and data sampling device


Techniques are provided for customer service ticket prioritization using multiple time-based machine learning models. One method comprises obtaining a customer service ticket; collecting, in response to the obtaining, features related to the customer service ticket comprising dynamic information regarding activities performed to address the customer service ticket and textual information describing the customer service ticket; applying the collected features to one of multiple machine learning models to obtain a distress score indicating a likelihood that the customer service ticket will become a distressed customer service ticket, wherein the multiple machine learning models each correspond to different time periods and are trained on historical data and the collected features are applied to the one machine learning model based on an age of the customer service ticket; and processing multiple customer support tickets based on the distress score. The machine learning models are trained using cumulative corresponding historical training data associated with a respective one of hourly, daily, weekly and monthly time periods.

Customer service requests are often documented using customer service tickets. In the field of IT (Information Technology), for example, a ticketing system is often used to manage IT tickets. There is often a large number of customer service tickets to be processed within a given organization. For example, in the IT context, a large number of customer service tickets are often encountered, for example, when a server fails, or when a failure occurs with one or more devices or systems of a user or the organization. It is often challenging to prioritize pending customer service tickets in order to avoid distressed service requests.
A need therefore exists for techniques for prioritizing customer service tickets.

Customer service ticket evaluation using multiple time-based machine learning models customer


An apparatus and method of calibrating a digital to analog converter including means for establishing and storing a minimum and maximum analog endpoint value slightly in excess of the desired operating range of the DAC and then scaling each respective raw data point of the DAC within the established endpoint values.

The present invention relates to digital-to-analog converters (DAC) and more specifically to the adjustment of such devices to compensate for errors.
Digital to analog conversion describes the process of taking a value represented in digital code and converting it to an analog signal proportional to the digital value. A variety of commercially available DACs are offered by numerous semiconductor manufacturers and electronic distributors for a wide variety of applications. DAC complexity, operating speed, and resolution is dependent upon numerous items such as internal construction, operating environment and complimentary circuitry.
The ideal DAC would be able to consistently quantitize any respective digital input to an accurate analog equivalent. In actuality deviations from the ideal operating DAC occur due in part to offset preamp voltage and voltage drop in the current path internal to the DAC. These errors are often aggravated by temperature fluctuations in the relevant operating environment.
Current DAC adjustment techniques for the above described situation focus upon calibration of the DAC at the zero and the maximum output signal levels. In applications requiring full-range accurate endpoints, current adjustment methods are deficient.
The present invention disclosed and claimed by Applicant describes a method and apparatus for improving overall accuracy of DAC performance throughout its intended operational range.

High accuracy digital to analog converter adjustment method and apparatus


A steering truck for steering a wheel axle of a truck has a solid lubricant application device at a position facing a flange of a wheel on the outer side of the wheel axle in the direction of travel in a truck frame. A solid lubricant is applied to freely make contact with and move away from the flange and a spring impels the solid lubricant towards the flange. A stopper restrains the solid lubricant from approaching the flange, By utilizing a forward and backward movement of the wheel axle in the travel direction caused by steering, the solid lubricant 3 makes contact only on the outer rail side toward which the wheel approaches when passing through a curved section. No contact occurs on the inner rail side from which the wheel moves away when passing through a curved section and when traveling through a straight section.

When a railway vehicle passes through a curved section having a small radius of curvature, a large lateral load is applied between a wheel and a rail. Thus, in a section with a sharp curve, a flange of a wheel on an outer rail side undergoes wear at a leading axle, while a side wear occurs on a rail side.
Accordingly, technologies were developed for reducing wear on a flange of a wheel by applying a lubricant to a flange throat region of a wheel by pressing a solid lubricant, to enhance a state of lubrication of areas of contact between a flange of a wheel and a rail (e.g., Patent Reference 1 and Non-Patent Reference 1).
For example, in Non-Patent Reference 1, it was shown that deployment of a solid lubricant to a flange of a wheel from on-board a railway vehicle is effective in reducing wear on a flange throat region of a wheel.
However, FIG. 3 of Non-Patent Reference 1 only shows a photograph in which a solid lubricant presses against a flange of a wheel, and there is no discussion about a detailed structure for pressing the solid lubricant against the flange of the wheel.
In a hypothetical case wherein a constant pressure system employs a spring to press a solid lubricant against a flange of a wheel, there is a problem in that an increasing amount of costly lubricant is consumed, because the solid lubricant is constantly pressed against the flange of the wheel.
In particular, in the case of a steering truck, the solid lubricant is pressed against the flange of the wheel when traveling through a straight section (See FIG. 3 (a)) as well as when passing through a curved section (see FIGS. 3 (b) and (c)). Therefore, if a solid lubricant is deployed on an outer side of a truck frame in the direction of travel, the pressing force on the wheel flange increases at the outer rail side (see FIG. 3 (b)) which the wheel approaches while passing through a curved section, and wear on the solid lubricant is greater than in the case of an ordinary truck.
In FIG. 3, Reference Numeral 1 is a truck frame, 2 is a wheel axle formed from a wheel 2a and an axle 2b, and 3 is a solid lubricant applied to an outer side in the direction of travel of the truck frame 1 so as to freely make contact with and move away from a flange 2aa of the wheel 2a. Reference Numeral 4 is a spring which presses the solid lubricant 3 against the flange 2aa of the wheel 2a, 5 is an axle box, 6 is an axle spring, and R is a rail.
In Patent Reference 1 there is disclosed a movable technology for reducing wheel flange wear, wherein a solid lubricant is formed integrally with a brake shoe, and the surface characteristics of the flange throat of the wheel are improved by transferring the lubricant to the flange throat region of the wheel when the brake is applied.
However, in the technology disclosed in Patent Reference 1, transfer of the lubricant to the flange throat of the wheel is limited to a period when the brake is applied, so the amount of lubricant consumed is lower than when the lubricant is constantly being pressed against, but there remains a problem in that the lubrication performance is not sufficient.

NIPPON STEEL & SUMITOMO METAL CORPORATION


Disclosed is a method for compensating a shift in an ON resistance of a transistor in a chip of a printhead of an inkjet printer. The method includes determining a value of a life indication parameter of the printhead and comparing the determined value of the life indication parameter of the printhead with at least one predetermined value of the life indication parameter. The at least one predetermined value of the life indication parameter of the printhead is stored in at least one of a memory of the inkjet printer and a memory of the chip of the printhead. Thereafter, a gate voltage input to the transistor is modified based on a difference between the determined value of the life indication parameter and the at least one predetermined value of the life indication parameter of the printhead for compensating the shift in the ON resistance of the transistor.

1. Field of the Invention
The present invention relates generally to inkjet printheads, and more particularly to a method for compensating shift in ON resistance of transistors of the inkjet printheads.
2. Description of the Related Art
Inkjet printers print data on a physical print medium, such as a paper sheet, a transparency and the like, by discharging ink droplets thereon. An inkjet printer includes one or more ink tank for storing ink therein, and a fluid ejection head (herein after referred to as printhead) coupled to the ink tank for discharging ink droplets therefrom. The ink tank may contain one or more ink reservoirs for storing the ink therein. The one or more ink reservoirs may contain colored ink or mono-chrome ink.
The printhead may be disposed on an ink tank body, thereby configuring a print cartridge. When the ink contained in the one or more ink tanks (herein after referred to as the ink tanks) is exhausted, the print cartridge may be replaced with a new print cartridge. Such a printhead configured on a replaceable print cartridge is referred to as a "disposable printhead." Alternatively, the printhead may be permanently disposed on the printer, and in such an instance only the ink tank is replaceable. Such a non replaceable printhead is referred to as a "permanent printhead." However, irrespective of the type of printhead being used in the inkjet printer, the printhead is always in operative coupling with the ink tanks for receiving the ink therefrom.
Referring to FIG. 1, a cross sectional view of a prior art printhead 100 is illustrated. Printhead 100 includes a printhead chip 105 having a semiconductor substrate 110 (herein after referred to as substrate 110) and a plurality of heaters, such as a heater 115, bonded to substrate 110. Substrate 110 is operatively coupled to an ink tank (not shown), and includes a plurality of openings, for example an opening 120, for supplying ink therethrough to a plurality of bubble chambers, such as a bubble chamber 125, configured in printhead 100. Bubble chamber 125 acts as a temporary ink tank for receiving the ink from the ink tanks and storing the same therewithin. Moreover, printhead chip 105 includes a memory module (not shown) adapted to store parameters associated with the inkjet printer, such as a value of a number of pages printed by the printhead, a value of a number of pages printed by an ink tank operatively coupled to the printhead, an identification number of the ink tank operatively coupled to the printhead, and the like. However, it will be evident to a person skilled in the art that the parameters may also be stored in a memory associated with the inkjet printer.
The printhead 100 further includes a nozzle plate 130 having a plurality of nozzles, for example, a nozzle 135 for dispensing ink therefrom. Nozzle plate 130 may be bonded to substrate 110 by any conventional technique, for example, by forming an adhesive layer therebetween. More specifically, nozzle plate 130 is bonded to substrate 110, such that the plurality of heaters is disposed beneath the plurality of nozzles of nozzle plate 130. For example, heater 115 may be disposed beneath nozzle 135. Moreover, substrate 110 bonded to nozzle plate 130 configures a plurality of bubble chambers between the plurality of heaters and corresponding nozzles, and a channel 140 for supplying the ink therethrough to the plurality of bubble chambers. More particularly, the plurality of bubble chambers are open spaces above each of the heaters of the plurality of heaters, which are adapted to receive the ink from the one or more ink tanks. As shown in FIG. 1, bubble chamber 125 is configured over heater 115.
In operation, the ink supplied by the ink tank flows into bubble chamber 125 through opening 120 and channel 140. Based on an image to be printed on the print medium, the printer selectively activates some of the heaters of the plurality of heaters. The activated heaters (for example, heater 115) in turn heat the ink received in the corresponding bubble chambers (for example, bubble chamber 125). As a result, an expanding bubble is formed within the ink. The expanding bubble expels the ink through the nozzles corresponding to the activated heaters, onto the print medium, thereby forming small dots of ink on the print medium. Accordingly, a selective activation of the heaters of the printhead may be utilized to print required data on the print medium.
The selective activation of the plurality of the heaters may be controlled by means of a control circuit. More specifically, the control circuit is operatively coupled to the plurality of heaters for controlling an activation of the plurality of heaters. The control circuit includes a plurality of transistors. Examples of the plurality of transistors of may include, but is not limited to a Power Field Effect Transistor (FET). The plurality of transistors is configured on printhead chip 105.
During operation of the plurality of heaters, individual heaters, such as heater 115, may be activated for heating the ink contained in a corresponding bubble chamber, such as bubble chamber 125. The firing of individual heaters may be controlled by corresponding transistors of the control circuit. With reference to FIG. 2A, a control circuit 200 for controlling activation of a heater, such as a heater 205 is illustrated. Heater 205 is similar to heater 115, and is connected to a power source, for example, a battery (represented as '+V').
Control circuit 200 may be disposed on a conventional printhead chip (not shown), similar to printhead chip 105. Moreover, control circuit 200 includes an FET 210 operatively coupled to heater 205. More specifically, a drain terminal 210a of FET 210 is electrically coupled to heater 205, while a source terminal 210b of FET 210 is electrically coupled to a ground terminal 215. Moreover, FET 210 includes a gate terminal 210c such that on applying an appropriate gate voltage at gate terminal 210c, the operation of FET 210 may be controlled. More specifically, FET 210 may be driven to a conduction stage or out of conduction stage by applying the appropriate gate voltage.
Control circuit 200 further includes a gate drive circuit 220 adapted to control the gate voltage input to gate terminal 210c of FET 210. Accordingly, control circuit 200 is adapted to drive FET 210 to the conduction stage or out of the conduction stage. Preferably, gate drive circuit 220 may generate a plurality of electrical pulses, hereinafter referred to as "fire instructions", which is supplied to gate terminal 210c for driving FET 210 to conduction. Once FET 210 is driven to the conduction stage, a conducting path is configured between the power source "+V" and ground terminal 215, thereby causing a current to flow from the power source "+V" to ground terminal 215 through heater 205 and FET 210. The current flowing through heater 205 effectuates heating thereof, which is utilized to heat the ink contained in a corresponding bubble chamber of heater 205.
Practically, it has been observed that efficiency of the heater and FET arrangement, such as heater 205 and FET 210, of the printhead reduces over a life span of the printhead. More specifically, a heating effect produced by the heaters may reduce during continued usage of the printhead, thereby deteriorating quality of images printed by the printhead. The reduction in the heating effect of the heaters, such as heater 205, may be attributed to a shift in a conduction state resistance or commonly referred to as ON resistance (hereinafter referred to as "RON") of the corresponding transistors, such as FET 210, in a chip of the printhead. More specifically, the RON of the FETs increases over the life span of the printhead, thereby increasing a power loss in the transistors, such as FET 210, and consequently decreasing the heating effect produced by the heaters, such as heater 205.
Various experimental results have shown that high operating voltages of the heaters and high firing frequencies of the printheads results in an increase in a value of the RON of the transistors in the chip of the printhead. With reference to FIG. 2B, a curve 250 depicting an increase in the value of RON of a transistor, for example FET 210, in a chip of a printhead over a life span of a printhead is illustrated. The life span of the printhead is hereinafter referred to as "life of the printhead". As evident from a curve 250 (FIG. 2B), the value of RON of the transistor increases over the life of the printhead till a predetermined value of life of printhead (marked as 252 in FIG. 2B). After this value of life of printhead, the value of RON of the transistor reaches a saturation value and remains substantially constant with increase in value of life of printhead.
Generally, an increase in the value of RON of transistors in a chip of a printhead of an ink-jet printer has an adverse effect on a printing efficiency of the printhead, thereby deteriorating a print quality thereof. More specifically, the increase in the value of RON of the transistors reduces the heating effect produced by the heaters of the printhead. Consequently, ink bubbles formed in the bubble chambers of the nozzle plate, due to the insufficient heating effect produced by the heaters, may not be uniform, thereby causing formation of poor quality ink dots on a printing medium. Accordingly, the printing efficiency of the printhead reduces over its life span.
Accordingly, there persists a need for a printhead of a printer, which overcomes the drawbacks and limitations of prior art printheads. Further, there persists a need for a method for improving a printing efficiency of a printhead over a life span thereof. More specifically, there persists a need for a method for compensating the increase in an ON resistance (RON) of transistors in a chip of a printhead over a life of the printhead.

Method for compensating shift in on resistance of transistor of printhead


An aortic valved tube which is used in human implants to replace the corresponding cardiac valve and ascending section of the aorta itself, incorporates a cardiac valvular prosthesis in its proximal end. The valved tube has two integral branches which project from opposite points with an inclination relative to the longitudinal axis of the tube, which branches are for effecting the anastomosis of the ostiums, corresponding to the left and right coronary arteries, respectively. The branches, as well as the sectors above and below the branches, are reinforced by a thicker wall in those areas while, maintaining the inside diameter of the tube itself.

In certain clinical settings it is necessary to implant an aortic valved tube which, incorporating a cardiac valvular prosthesis, is used to replace the aortic valve and the aorta itself in its ascending path.
These clinical settings are known by the following names:
"Acute dissection of the ascending aorta"
"Marfan's syndrome"
"Traumatic breakage of the ascending aorta affecting the aortic valve and the right and left coronary arteries."
Surgical treatment of these clinical settings dates back some fifty years, during which techniques and methods, as well as the implant models, have improved, though a suitable physiological model has not been attained up to now.
In this sense, the first attempts were made by implanting a tube made out of special fiber, replacing the torn or broken aorta sector, without replacement of the aortic valve.
Subsequently, implant models with the valvular prosthesis incorporated in the tube came about, and this is the present situation.
On the other hand, the anatomico-pathological setting of acute dissection of the ascending aorta can be summarized in the following: upon producing breakage of the intima layer of the aorta, blood penetrates in the thickness of the layers of said artery, making a dissection among them, causing hemorrhage and compression.
Almost always associated with this problem is an aortic bicuspid valve, of congenital origin, heeding replacement.
The clinical setting is completed with the dislocation of the coronary arteries and, at times, with dissection thereof.
This clinical setting is necessarily dramatic and fatal if surgical repair is not rapidly and urgently done.
Said surgery is based on "reconstruction" of the aortic valvular ring of the involved after and "reimplantation" of the coronary arteries: right and left.
The implant element in the surgery is the above cited aortic valved tube, which comprise a single tube with a cardiac valvular prosthesis implanted inside it, and in correspondence with the proximal end thereof.
When using this aortic valved tube, upon having to "reimplant" the left and right coronary arteries, two holes must be made in the wall of the valved tube, and these holes must be "adapted" to the holes of the ostiums of the corresponding coronary arteries.
Such operations involve the difficulties that the holes made in the wall of the valved tube may not be uniform with their surroundings, aside from having a weak structure.
On the other hand, anastomosis causes distortion of the tube, leaving a residual "asymmetric" traction.
As a result of this, hemorrhage is frequent and, many times, it is the main cause of post-operative death in this type of surgery.
It is also to be taken into account that when the dissection has been very great and the coronary arteries have been greatly dissected, it is practically impossible to carry out anastomosis from a technical point of view, such procedure produces distortion of the valved tube, with the subsequent defect of the suture, with undue tractions, with alterations in the bloodstream, as well as distortions in the functioning of the prosthesis incorporated in the valved tube.
Finally, it should be said that by means of said known aortic valved tube, the patient's aortic valvular problem is corrected, as well as the ascending aorta section implicated in the breakage. Now then, there is no doubt that the ostiums of the coronary arteries must still be "brought near" the valved tube, where said two holes have to be made in order to be able to bring it close to the edges of the coronary ostiums. Upon effecting said operation, breakage of the integrity of the tube, of its structure, is produced, likewise producing on many occasions small dilacerations which later produce tearing and cause hemorrhaging.
On the other hand, because it is practically impossible that the holes be made symmetrically, asymmetric tractions will be produced which distort the location of the tube, with the subsequent detriment to its functioning will be produced.
In the case of hemorrhage, once the tube has been implanted and the coronary arteries have been coupled, it becomes very complicated and difficult to act with surgical delicateness when necessary to give some additional stitches and, generally, the entire suture is dislocated causing hemorrhage and obstruction in the lumen of the coronary ostiums.
Due to all of this, the duration of the surgery is considerably lengthened due to the sutures being hard to make and with little space to use the instruments without distorting the structure of the tube itself.


An internal EGR control system for an internal combustion engine, which is capable of controlling the internal EGR amount with accuracy, when controlling the internal EGR by changing both the exhaust cam phase and the exhaust valve lift. An internal EGR control system for an internal combustion engine controls internal EGR in which combustion gases are caused to remain in a cylinder. An ECU sets a target cam phase serving as a target of the exhaust cam phase, and controls a variable exhaust cam phase mechanism such that the exhaust cam phase becomes equal to the target cam phase. ECU 2 sets a target lift of an exhaust valve according to a detected actual cam phase and calculated valve-closing timing, and controls a variable exhaust valve lift mechanism such that the lift of the exhaust valve becomes equal to the target lift.

1. Field of the Invention
The present invention relates to an internal EGR control system for an internal combustion engine, for controlling internal EGR in which combustion gases are caused to remain in cylinders.
2. Description of the Related Art
Conventionally, there has been proposed an internal EGR control system which is disclosed in Japanese Laid-Open Patent Publication (Kokai) No. 2005-127180. This engine is provided with a variable intake valve timing mechanism and a variable exhaust valve timing mechanism both of a hydraulically-driven type, for changing the intake cam phase and the exhaust cam phase with respect to the crankshaft independently of each other. Further, the engine is also provided with an intake valve lift mechanism and an exhaust valve lift mechanism for changing the lift of intake valves and that of exhaust valves.
In the internal EGR control system, the valve overlap amount between each intake valve and the associated exhaust valve is controlled by controlling the above-mentioned variable valve timing mechanisms and the valve lift mechanisms, whereby the internal EGR amount is controlled. More specifically, according to the engine speed and load on the engine, a target valve overlap amount, a target intake cam phase, and a target intake valve lift are calculated, whereby the variable intake valve timing mechanism and the intake valve lift mechanism are controlled such that the target intake cam phase and the target intake valve lift are reached. Further, according to the target valve overlap amount and the actual intake cam phase, the target exhaust cam phase is calculated, and according to the target valve overlap amount and the actual intake valve lift, the target exhaust valve lift is calculated. Then, the variable exhaust valve timing mechanism and the exhaust valve lift mechanism are controlled such that the target exhaust cam phase and the target exhaust valve lift are reached.
However, since the variable exhaust valve timing mechanism is hydraulically driven, the response thereof is easy to vary depending on the operating conditions of the engine. For example, as the hydraulic pressure or oil temperature is lower, the response of the variable exhaust valve timing mechanism is lower, and hence, when the target exhaust cam phase is changed, it takes time before the actual exhaust cam phase converges to the target exhaust cam phase. In contrast, if the exhaust valve lift mechanism is electrically driven, the response thereof is more stable and higher than that of the variable exhaust valve timing mechanism. Therefore, when the target exhaust valve lift is changed, the actual exhaust valve lift converges to the target exhaust valve lift in a shorter time period.
Further, in this conventional internal EGR control system, the variable exhaust valve timing mechanism (target exhaust cam phase) and the exhaust valve lift mechanism (target exhaust valve lift) are both controlled (calculated) according to the target valve overlap amount. Therefore, in the case where the response of the variable exhaust valve timing mechanism is lower than that of the exhaust valve lift mechanism, even if the actual exhaust valve lift has converged to the target exhaust valve lift, the actual valve overlap amount deviates from the target valve overlap amount until the actual exhaust cam phase converges to the target exhaust cam phase, which results in lower control accuracy of the internal EGR amount. Inversely, in the case where the response of the variable exhaust valve timing mechanism is higher than that of the valve lift mechanism, even if the exhaust cam phase has converged to the target exhaust cam phase, the control accuracy of the internal EGR amount is also lower until the exhaust valve lift converges to the target exhaust valve lift.
Particularly, when the control of the internal EGR amount is performed not by valve overlap but by advancing the valve-closing timing of each exhaust valve so as to cause combustion gases to remain in the associated cylinder, the high-temperature internal EGR remains within the cylinder. Therefore, if the control accuracy is low, the combustion state varies, which can undesirably cause instability of combustion.

Internal EGR control system for internal combustion engine


An adjustable clamping tong including a moveable pivoting clamping plate mechanism; a fixed clamping plate mechanism; and a guide mechanism for guiding the moveable pivoting clamping plate mechanism at a distal end of the guide mechanism and for fixing the fixed clamping plate mechanism at a proximal end of the guide mechanism, wherein the moveable pivoting clamping plate mechanism moves co-axially along the guide mechanism and pivots in multiple directions relative to the guide mechanism. An adjustable clamping tong including a pivoting clamping plate mechanism; a fixed clamping plate mechanism; and a spacing mechanism for spacing the pivoting clamping plate mechanism at a distal end of the spacing mechanism from the fixed clamping plate mechanism at a proximal end of the spacing mechanism, wherein the spacing mechanism includes an adjusting mechanism and the pivoting clamping plate mechanism axially pivots along the spacing mechanism.

1. Technical Field
The present invention relates to tools and more specifically a bricklayer's tool.
2. Background Art
Numerous brick tongs exist in the prior art that utilize complementary gripping jaws. Examples of such tongs are described in U.S. Pat. Nos. 800,341; 835,376; 1,091,260; 1,153,269; 1,364,128; 1,385,867; 1,581,077; 3,129,029; and 5,039,150. In any of these tongs, the complementary gripping jaws are brought into engagement with the faces of bricks through a connected handle. The complementary gripping jaws are separated from each through slide and guide tubes. The distance between the complementary gripping jaws depends upon the position of the slide tube relative to the guide tube. The slide tube slides and removably engages the guide tube over the outer surface of the guide tube. The length of the entire slide and guide tube assembly is adjusted through a pin inserted into any one of a multiplicity of holes set forth axially along each of the slide and guide tubes. The pin is inserted through the holes of both the slide and guide tubes, which results in fixing the length of the entire slide and guide tube.
As described above, in order to adjust for varying sizes of bricks or varying numbers of bricks, a user must disengage the pin inserted into one of the holes in the slide and guide tube assembly, subsequently adjust the length of the slide and guide tubes, and reinsert the pin through another set of holes corresponding to the desired length of the slide and guide tube assembly. This requires additional time and steps in order to adjust the brick tool. Moreover, the pin and various other parts associated with the pin can be lost or misplaced.
Accordingly, there is a need for a clamping tong that is easily adjustable wherein the complementary gripping or clamping jaws are adjustable through a simple gliding mechanism.


The handgun contains a frame composed of polymer material, the frame contains a channel formed therein, wherein the channel contains sides, and a forward rail positioned within the channel.

In recent years there has been a trend in the handgun industry to utilize polymers in the manufacture of semi-automatic pistols, particularly in fabricating unitary frames by injection molding techniques. Generally, such frames are adapted to receive a metal slide removably fitted onto the frame for slidable reciprocal movement therealong. The slide is usually secured for such movement by longitudinally spaced pairs of metal rails partially embedded in the polymer of the frame. The rails provide durable metal-to-metal contact, as with tongue and groove fittings for slidable inter-engagement between the frame and slide which are characterized by superior wear and reliable operation.
It is inherently impossible for a frame composed of polymeric and metallic materials to be formed as an integral unit. Consequently, different manufacturing techniques have been devised in order to combine two or more materials into a single frame. Conventional polymer frame handguns have generally either incorporated the metal rails into the polymer during the molding process of the polymer or utilized metal rails having portions mounted within receptacles formed in the polymer during the molding process. Each of these conventional methods has certain disadvantages.
Frames manufactured by the conventional process utilize a plurality of metal rail components which must each, individually, be partially encased in the polymer material of the frame during the molding process or partially inserted into receptacles formed in the frame during the molding process. As a result, these processes are labor intensive and expensive. Consequently, there is a need for a new handgun frame and method of assembling the frame that enables the combination and cooperation of polymeric and metallic materials into its construction.
The mechanical strength characteristics of the materials from which polymer handgun frames are generally manufactured are inferior to those of the materials of metallic handgun frames. To compensate, conventional polymer handgun frames are manufactured such that the portions of the frame which are subject to the greatest amount of stress during firing of the handgun (or in some cases the entire polymer handgun frame) have a greater thickness than comparable portions of metallic handgun frames. Such differences generally result in a less aesthetically pleasing look for the handgun. The differences may also make the handgun less comfortable to grip.
Accordingly, a need exists for improvements that addresses the foregoing and other related and unrelated problems in the art.
In the following description, like reference numbers are used to identify like elements. Furthermore, the drawings are intended to illustrate major features of exemplary embodiments in a diagrammatic manner. The drawings are not intended to depict every feature of every implementation nor relative dimensions of the depicted elements, and are not drawn to scale.

Handgun having metallic rails within a polymeric frame


A semiconductor die encapsulation or carrier-mounting method and apparatus for manufacturing a semiconductor product, wherein a first tool part for holding multiple semiconductor dies is provided and the semiconductor dies are placed on the first tool part, one of the first and a second tool part including displaceable insert members applying a pressure by each displaceable insert member on a surface area of the semiconductor die, and the first and second tool parts are brought together to define a space between the first and second tool parts with the semiconductor products being arranged within the space. The pressure applied by the displaceable insert members is monitored and regulated to a predetermined pressure, and subsequently, the first and second tool parts are separated and the processed semiconductor dies removed.

The method can, for instance, be a semiconductor die encapsulation method that further comprises introducing a material in a liquid state into the space after having the member apply a pressure onto the predetermined surface area of the semiconductor die; and letting the material solidify from the liquid state into a solid state. The method may, for instance, further be a semiconductor die carrier-mounting method that further comprises providing the semiconductor die onto a carrier with a bonding material in between carrier and semiconductor die; providing the carrier with the semiconductor die onto the first tool part in the step of providing the semiconductor die on the first tool part; and allowing the bonding material to harden. Such methods, and corresponding apparatuses, are known as such, and are generally concerned with providing a pressure on a surface of a semiconductor die with a member. In the case of the semiconductor die encapsulation method a semiconductor product is encapsulated by some material protecting the semiconductor die.
The semiconductor die itself is manufactured through other methods on a wafer, for instance, a silicon wafer, and will generally contain integrated circuits (ICs). Other semiconductor dies may be manufactured on a glass substrate. Examples of such semiconductor dies are chips, sensors, power ICs, flip chips MEMS, contact pads (for instance, for solar) passives, discrete, LEDs, microfluidics, biosensors, etcetera, and combinations thereof. Such semiconductor products will for the purpose of the present description generally be referred to as a semiconductor die. A die may be separated from a finished semiconductor wafer. A bare die may be provided on the first tool part, but the die can also be arranged on a carrier to provide the semiconductor die. Contacts pads of the die may have to remain open and should thus not be encapsulated. For a sensor a sensor area is generally to remain open, and for a power IC a window on its heat sink may have to remain open to allow good thermal contact of the heat sink connected to the power IC with the environment. Multiple open areas or windows can be required for die when encapsulating. To create the open windows in the encapsulation a member is brought into contact with the semiconductor die when the semiconductor product is held in the space between the first and second tool parts, which are first and second mould insert members in this encapsulation method. The member or insert member (also referred to as insert) may be fixedly attached to the second tool part, or may be spring loaded for exerting pressure in known methods. In both instances the height of the surface of the die (the semiconductor product) to be brought into contact with the insert should be well known to provide a good contact. A die surface that is 'too high' will result in a too high pressure exerted by the insert member on the die, which can damage the die. A die surface that is 'too low' will result in not enough pressure exerted by the insert member on the surface, which will cause in flash and bleed of the encapsulation material onto the open window. Such height restrictions severely limit the process window of the encapsulation process.
Furthermore, the force exerted by the (displaceable) insert member will be a constant but may be counteracted by encapsulation material within the space if the insert member is wider than the die. Encapsulation material will be provided under part of the insert member which 'overshoots' the die and cause another force counteracting the force and thus the pressure exerted by the insert member on the die. The configuration of the die within the space in between the first and second mould member may further be such that encapsulation material comes under the die so that a force is exerted on the die which is opposite the force exerted by the insert member. As a result the total pressure exerted on the die will increase, which may damage the die. Such phenomena will even further limit the process window of the encapsulation process.
In the case of the semiconductor die carrier-mounting method a pressure is to be exerted on the semiconductor die and the bonding material to provide a good bond between the semiconductor die and the carrier while the bonding material hardens. The method is also being referred to as a sintering method. Also in this method a height variation in the surfaces of the dies to be brought into contact with the insert member will generally be present, which will result in pressures being exerted on the die which are too high or too low for the purpose. A too high pressure can again cause damage to the die and a too low pressure can result in insufficient bonding and/or contact between die and carrier. Also in this case the process window is severely limited by the height restrictions on the semiconductor product.

Semiconductor die encapsulation or carrier-mounting method, and corresponding semiconductor die encapsulation or carrier-mounting apparatus


A process for thermal transfer printing on plastic films incorporating a coating composition is provided. The process includes providing plastic film having a coating composition including a binder of a polymer and/or copoylmer of carboxylic acid containing vinylic unsaturation, at least one finely divided particulate filler, and a surface active agent. A thermographic element such as a ribbon which includes a dye layer is then heated in the form of an image to be printed onto the plastic film, with the heating causing the dye layer to melt in the form of the image. The plastic film coated with the coating composition is contacted with the thermographic ribbon, and the dye layer is transferred from the ribbon to the plastic film. Such thermal transfer printing on coated plastic films provides for a multitude of uses such as plastic labels for outdoor use.

A number or printing techniques and processes have been developed for use with non-plastic substrates such as paper and the like. Plastic substrates, on the other hand, inherently have a host of factors which must be considered when used as printing surfaces. Many conventional printing processes have not been entirely successful and have suffered from a number of disadvantages, such as smearing and smudging of the ink due to the smooth surface of the plastic, high static, poor scratch resistance and the like.
Lithography is the process of printing from a specially prepared printing plate. The image areas of the plate are treated to accept ink, while the non-image areas, when moistened with water, repel ink. The areas which accept ink form the printed image and the ink repelling areas form the background. Because the process is based on the principal that oil and water do not mix, the ink is oily or greasy. The image is typically formed on a lithographic printing plate by mounting a photosensitive film having hydrophobic and hydrophilic areas onto an aluminum plate. A reverse print image is placed above the photosensitive film and upon exposure to UV light, the reverse image transfers to the photosensitive film to form the hydrophobic and hydrophilic areas of the printing plate.
During the printing process, the printing plate is continuously wetted with water and ink. The water is selectively taken up by the hydrophilic areas and the ink by the oleophilic areas of the printing surface. The ink is continuously conveyed from an ink source by means of a series of rollers to the printing plate located in the printing press, usually on a plate cylinder. Image portions of the printing plate that accept ink transfer the ink to a blanket cylinder as a reverse image. A portion of the ink from the blanket cylinder is then transferred to form a correct reading image on paper. The image formed by the lithographic printing ink hardens by exposure to air, in a process known as curing.
Lithographic ink is a dispersion of pigment in a viscous oil medium. One type of ink contains a drier, which accelerates curing of the medium after printing. There are also solventless inks which can be cured by UV and electron-beam radiation. Typically curing occurs upon exposure to air for a length of time ranging up to 24 hours. Printed paper can be formed into a stack or wound into a roll for curing without concern for smearing because the ink forming the image penetrates the spaces between the fibers forming the paper.
Although lithographic printing provides the advantages of allowing fine print and good detail, it has not been used with plastic films. Because plastic films have smooth surfaces the ink tends to smear when the film is wound into a roll or formed into a stack. Also, the ink tends to transfer to the backside of adjacent sheets in a roll or stack. Because it is economically impractical to allow the ink to cure before rolling or stacking the film, lithographic printing has not been used for plastic films. Additionally the high static associated with plastic films tends to make stack press printing impractical because of machine jamming.
In recent years, thermal transfer printing processes have been developed to satisfy "on-demand" type printing requirements. Thermal transfer printing, however, has also typically been limited to print surfaces composed of paper as opposed to plastic surfaces. This is primarily due to the poor print quality and poor durability of plastic surfaces in thermal transfer printing processes. In thermal transfer printing processes, a print surface substrate is provided for printing thereon, and a thermal element in the form of a printing head is provided for transferring the image to the substrate. A thermographic ribbon which includes a solid ink thereon is disposed between the print surface substrate and the print head. The print head includes a plurality of heating elements which can be individually heated in the desired image for printing. In operation, the thermographic ribbon is sandwiched between the print head and the print surface substrate, causing the print head to contact the thermographic ribbon which in turn contacts the print surface substrate. The individual heating elements of the print heat are heated in the image desired to be printed. Such sandwiching and heating simultaneously applies pressure and heat to the thermographic ribbon, which causes the solid ink contained on the thermographic ribbon to be melted or liquefied at the portions of the print head which are being heated. Since the thermographic ribbon is in contact with the print surface substrate, the melted ink is transferred from the thermographic ribbon to the print surface substrate in the form of the image desired.
While thermal transfer printing processes have become popular, such processes have traditionally been used mainly with paper substrates, due to the difficulty in printing on plastic films and the high cost associated with such films. For example, commercial products such as product numbers 01-180 and 01-181 marketed by Madico Graphic Films, Woburn, Mass., and Kimdura K-100 marketed by Kimberly Clark are printable polymer films useful in thermal transfer printing processes. While such films have proved to be useful alternatives to paper, they are significantly more expensive than paper, and are therefore inefficient in "on-demand" type printing use due to cost considerations.
U.S. Pat. No. 5,233,924 to Ohba et al. describes a "synthetic paper" type product which is an example of an alternative substrate described as useful in thermal transfer printing processes. This patent discloses a finely porous opaque polyolefin film layer incorporating an inorganic fine powder, with an ethylene-vinyl alcohol copolymer film layer on one or both sides of the polyolefin film layer, and further including a coat layer such as an inorganic material. While such films have proven to provide adequate print quality in thermal transfer printing, the high cost of these materials results in a significant downside to their use. Additionally, the smooth surface of the ethylene-vinyl alcohol copolymer appears to be a hinderance in many printing applications.
Flexographic printing and rotogravure printing techniques have been used to print onto plastic films. In these processes a solvent or water based ink is employed. Prior to winding the printed film into a roll or forming a stack, the ink is dried by passing the film sheet through an oven. These printing processes require a printing plate which is expensive to prepare and expensive drying ovens.
The use of thermoplastic stretch wrap films in the overwrap packaging of goods, and in particular, the unitizing of paletted loads is a commercially important use for polymer films. In these applications, the film is wrapped around the load or goods to be packaged and the film is continuously subjected to a stretching or tensioning force as it wraps around the load. This type of packaging, is useful for shipping goods since it contains goods as a unit and is resistant to moisture. Since, during shipping, the wrapped packages are exposed to outside conditions, the entire packaging assembly is likely to be subjected to extremes of moisture, heat and light. Laminated paper packaging labels containing shipping and product information are acceptable for outdoor use but they pose problems in the recycling of the stretch wrap. The paper labels must be removed prior to recycling. Therefore, the development of lithographic and thermal transfer printable plastic labels which are resistant to moisture, heat and light and which are relatively inexpensive to produce is important.

Printed plastic films and method of thermal transfer printing


The PLL (Phase Lock Loop) circuit generates a sampling clock for sampling an analog image signal and a second clock having a frequency equal to that of the sampling clock and a phase different from that of the sampling clock based on the horizontal synchronizing signal supplied together with the analog image signal. The measuring circuit counts the number of pulses of the sampling clock and the number of pulses of the second clock for a predetermined time period. The MPU (Micro Processing Unit) determines whether or not the numbers of pulses of the sampling clock and second clock have been counted correctly based on the number of pulses of the sampling clock and the number of pulses of the second clock. Then, the MPU adjusts the frequency and phase of the sampling clock, when it is determined that the numbers have been counted correctly.

1. Field of the Invention
The present invention relates to a sampling clock adjusting method for generating a digital image signal using an analog image signal. The present invention also relates to an interface circuit for adjusting a sampling clock.
2. Description of the Related Art
Recently, digital display devices, such as a liquid crystal display and the like have been commonly used. For example, liquid crystal displays have become widely used instead of CRT (Cathode Ray Tube) displays and the like, as the display of computers.
In the case where a digital display device is used instead of an analog display device, an analog image signal should be converted to a digital image signal by sampling the analog image signal at predetermined intervals.
Since a device for generating an image signal generates an analog image signal by using an internal video clock, the level of the image signal changes according to the cycle of this video clock. Due to this, at the time of sampling an analog image signal, the sampling needs to be conducted according to a cycle which is the same as the cycle of the video clock. Further, if the sampling is conducted in an area where the level of the image signal is unstable, a noise might occur in the image to be displayed. Due to this, the sampling of the image signal needs to be conducted in an area where the level of the image signal is stable.
FIG. 10 is a block diagram showing one example of the interface circuit for generating a signal for sampling (sampling clock).
The interface circuit receives an analog image signal 101, a horizontal synchronizing signal 105 and a vertical synchronizing signal 109 supplied from an image signal output device (not shown), such as a computer etc., then, the interface circuit outputs the image signal 101, a regenerative horizontal synchronizing signal 106 and a sampling clock 108 to a digital display device 9.
As shown in FIG. 10, the interface circuit comprises a PLL (Phase Lock Loop) circuit 4, an MPU (Micro Processing Unit) 5 and a delay circuit 6.
As shown in FIG. 11, the PLL circuit 4 comprises a phase detector 21, a LPF (Low Pass Filter) 22, a VCO (Voltage Controlled Oscillator) 23 and a frequency divider 24.
The PLL circuit 4 generates the regenerative horizontal synchronizing signal 106 having a frequency F equal to that of the horizontal synchronizing signal 105 and a base clock 107 having a frequency Nxc2x7F which is N times as large as that of the horizontal synchronizing signal 105, from the horizontal synchronizing signal 105.
The regenerative horizontal synchronizing signal 106 is supplied from the PLL circuit 4 directly to the display device 9. The base clock 107 is supplied to the display device 9 as the sampling clock 108 after the phase thereof is delayed by the delay circuit 6.
The display device 9 samples the image signal 101 by using the regenerative horizontal synchronizing signal 106 and the sampling clock 108 which are supplied from the interface circuit, and converts the analog image signal into a digital image signal Then, the display device 9 displays a predetermined image with the digital image signal.
In the case where the image is not displayed desirably as a result of the interference of a noise and the like, the frequency and phase of the sampling clock 108 are adjusted by adjusting the dividing value of the frequency divider 24, and the delay amount of the delay circuit 6. Specifically, the frequency of the sampling clock 108 is set equal to the frequency of the video clock in the device for generating the image signal 101, and the phase of the sampling clock 108 is adjusted so that the image signal 101 can be sampled in an area where the level of the image signal 101 is stable.
In the case where the interface circuit having the structure shown in FIG. 10 is used, the dividing value of the frequency divider 24 and the delay amount of the delay circuit 6 are manually adjusted. Specifically, a operator of the display device 9 operates predetermined buttons and dials while watching the image displayed on the display device 9. Due to this, signals indicating the dividing value and the delay amount, respectively, are input in the MPU 5. The MPU 5 adjusts the frequency and phase of the sampling clock 108 by setting the dividing value of the frequency divider 24 and the delay amount of the delay circuit 6 in accordance with the input signals.
However, manual adjustment of the dividing value and the delay amount is troublesome and requires a high level of skill and experience. Therefore, an interface circuit which automatically adjusts the dividing value and the delay amount has been proposed.
FIG. 12 is a block diagram showing one example of an interface circuit which automatically adjusts the frequency and phase of the sampling clock 108.
As shown in FIG. 12, the interface circuit which automatically adjusts the sampling clock 108 comprises a clamping circuit 1, a D/A converter 2, a comparator 3, and a measuring circuit 8 in addition to the structure of the interface circuit shown in FIG. 10.
The analog image signal 101 supplied from the image signal output device is generally a signal having an amplitude of 0.7 volt and does not contain any direct-current component. The clamping circuit 1 clamps the image signal 101 at a reference potential by adding a predetermined direct current voltage to the image signal 101, and outputs the image signal 101 as an image signal 102 to the comparator 3.
The comparator 3 determines whether or not there are predetermined data, based on the level of the image signal 102. Specifically, the comparator 3 determines whether or not there are predetermined data in accordance with whether the level of the image signal 102 is higher or lower than the level of the reference voltage 103 supplied from the MPU 5 via the D/A converter 2. Then, the comparator 3 outputs the data existence signal 104 representing the determination result into the measuring circuit 8.
As described above, the PLL circuit 4 generates the regenerative horizontal synchronizing signal 106 and the base clock 107 from the horizontal synchronizing signal 105. The regenerative horizontal synchronizing signal 106 is supplied from the PLL circuit 4 directly to the measuring circuit 8 and the display device 9. The base clock 107 is supplied from the PLL circuit 4 to the measuring circuit 8 and the display device 9 as the sampling clock 108 after the phase thereof is delayed by the delay circuit 6.
The measuring circuit 8 counts numbers of pulses of the sampling clock 108 supplied from the delay circuit 6, using the data existence signal 104 supplied from the comparator 3 and the regenerative horizontal synchronizing signal 106 supplied from the PLL circuit 4.
Specifically, as shown in FIG. 13, the measuring circuit 2 counts a number HDmin of pulses of the sampling clock 108 and a number HDmax of pulses of the sampling clock 108 during every one horizontal synchronization period (scanning period) which is a period since one fall until the next fall of the regenerative horizontal synchronizing signal 106.
The number HDmin is a number of pulses which are counted since the first fall of the regenerative horizontal synchronizing signal 106 until the first rise of the data existence signal 104 during the scanning period. The number HDmax is a number of pulses which are counted since the first fall of the regenerative horizontal synchronizing signal 106 and the final fall of the data existence signal 104.
Then, the measuring circuit 8 outputs measurement result signal 111 indicating the respective numbers HDmin and HDmax, one after another into the MPU 5.
The MPU 5 previously stores a program for adjusting the frequency and phase of the sampling clock 108, information regarding resolutions of analog image signals, and the like.
First, the MPU 5 adjusts the frequency of the sampling clock 108, using the measurement result signals 111 supplied one after another from the measuring circuit 8.
Specifically, the MPU 5 obtains the numbers of pulses HDmin and HDmax from the measurement result signals 111 and stores the obtained numbers of pulses. However, the MPU 5 stores the minimum number among the numbers HDmin and the maximum number among the numbers HDmax all of which were obtained during one vertical synchronization period (field period) since one rise until the next rise of the vertical synchronizing signal 109.
The difference between the minimum number HDmin and the maximum number HDmax during one vertical synchronization period corresponds to the number of pixels arranged on each horizontal line of an image shown by the analog image signal 101, i.e. horizontal resolution of the analog image signal 101. The horizontal resolution can be derived from the horizontal synchronizing signal 105 and vertical synchronizing signal 109. The MPU 5 derives the horizontal resolution from the horizontal synchronizing signal 105 and vertical synchronizing signal 109 and calculates the difference of the numbers (HDmaxxe2x88x92HDmin) after one vertical synchronization period. The MPU 5 determines whether or not the calculated difference is equal to the derived horizontal resolution.
When determined that the difference of the numbers is equal to the horizontal resolution of the analog image signal 101, the MPU 5 determines that the frequency of the sampling clock 108 is an adequate value.
On the other hand, when determined that the difference of the numbers is not equal to the horizontal resolution of the analog image signal 101, the MPU 5 determines that the frequency of the sampling clock 108 is not the adequate value. The MPU 5 adds +1 or xe2x88x921 to the dividing value of the frequency divider 24 which is included in the PLL circuit 4. In such a way, the MPU 5 sets the difference of the numbers (HDmaxxe2x88x92HDmin) to a value equal to the horizontal resolution.
After adjusting the frequency of the sampling clock 108 as described above, the MPU 5 adjusts the phase of the sampling clock 108 so that the image signal 102 can be sampled in an area where the level of the image signal 102 is stable.
Specifically, as shown in FIG. 14, by changing the delay amount of the delay circuit 6, the MPU 5 controls a changing point of the sampling clock 108 and a changing point of the data existence signal 104 into a condition wherein both of the changing points coincide with each other (hereinafter, referred to as the xe2x80x9cfirst conditionxe2x80x9d). After this, by further changing the delay amount of the delay circuit 6, the MPU 5 changes the phase of the sampling clock 108 by 360 degrees, that is, by one pulse (this condition is referred to as the xe2x80x9csecond conditionxe2x80x9d).
In the case where the phase of the sampling clock 108 is set into the middle of the phase in the first condition and the phase in the second condition, the image signal 102 can be sampled in an area where the level of the image signal 102 is stable. Accordingly, with a delay amount TDa of the delay circuit 6 in the first condition and a delay amount TDb of the delay circuit 6 in the second condition, the MPU 5 calculates a delay amount ((TDa+TDb)/2) which provides the most adequate phase of the sampling clock 108, and sets the delay amount of the delay circuit 6 to the calculated delay amount.
As described above, the MPU 5 adjusts the frequency and phase of the sampling clock 108.
However, the interface circuit having the structure shown in FIG. 12 may not adjust the sampling clock 108 correctly.
For example, as shown in FIG. 13, in the case where the changing point of the sampling clock 108 coincides with the changing point of the data existence signal 104 or with the changing point of the regenerative horizontal synchronizing signal 106, the measuring circuit 8 can not obtain the number of pulses HDmin or HDmax correctly. In this case, the difference (HDmaxxe2x88x92HDmin) of the numbers of pulses is incorrect. Therefore, the MPU 5 can not adjust the frequency of the sampling clock 108 correctly.
Since the numbers of pulses can not be counted correctly, at the time of changing the phase of the sampling clock 108 by one pulse as shown in FIG. 14, the MPU 5 can not determine whether or not the phase has been changed precisely by one pulse.
As described above, the interface circuit shown in FIG. 12 may not adjust the frequency and phase of the sampling clock 108 correctly. As a result, an image may not be displayed with good looks.
Accordingly, it is an object of this invention to provide a method for adjusting a sampling clock for displaying a beautiful image.
It is another object of this invention to provide an interface circuit for generating a sampling clock for displaying a beautiful image.
It is another object of this invention to provide a method for adjusting a sampling clock correctly.
It is another object of this invention to provide an interface circuit for adjusting a sampling clock correctly.
To achieve the above objects, the sampling clock adjusting method according to the first aspect of this invention comprises:
counting a number of pulses of a sampling clock for sampling an analog image signal and a number of pulses of an adjustment clock having a frequency equal to a frequency of the sampling clock and a phase different from a phase of the sampling clock, for a predetermined time period;
determining whether or not the number of pulses of the sampling clock has been counted correctly, by comparing the counted number of pulses of the sampling clock and the counted number of pulses of the adjustment clock; and
adjusting the frequency and phase of the sampling clock, in a case where it is determined that the number of pulses of the sampling clock has been counted correctly.
According to this invention, a beautiful image can be displayed.
The determining whether or not the number of pulses of the sampling clock has been counted correctly may include determining whether or not the number of pulses of the sampling clock has been counted correctly by determining whether or not the number of pulses of the sampling clock coincides with the number of pulses of the adjustment clock within a range of an error.
The sampling clock adjusting method may further comprise controlling the number of pulses of the sampling clock to coincide with the number of pulses of the adjustment clock within the range of the error by changing the phase of the sampling clock or the phase of the adjustment clock, in a case where it is determined that the number of pulses of the sampling clock has not been counted correctly.
The counting may comprise counting the numbers of pulses of the sampling clock and adjustment clock, respectively, during a time period since a change in a level of a horizontal synchronizing signal supplied together with the analog image signal until a change in a level of a data existence signal indicating whether or not the analog image signal includes predetermined data.
The determining whether or not the number of pulses of the sampling clock has been counted correctly may include determining whether or not the number of pulses of the sampling clock has been counted correctly by determining whether or not a difference between the number of pulses of the sampling clock and the number of pulses of the adjustment clock is equal to or lower than 1 pulse.
The sampling clock adjusting method may further comprise:
generating a base clock by changing a frequency of the horizontal synchronizing signal; and
generating the sampling clock and the adjustment clock by delaying a phase of the base clock by different delay amounts, respectively.
The adjusting the frequency and phase of the sampling clock may include:
deriving a horizontal resolution of the analog image signal from a vertical synchronizing signal, supplied together with the analog image signal, and the horizontal synchronizing signal;
counting a number HDmin of pulses of the sampling clock during a time period since a change in the horizontal synchronzing signal until a first change in the data existence signal, and a number HDmax of pulses of the sampling clock during a time period since the change in the horizontal synchronizing signal until a final change in the data existence signal within a range of one scanning period;
determining whether or not a difference in the numbers HDmax and HDmin(HDmaxxe2x88x92HDmin) corresponds to the horizontal resolution; and
adjusting the frequency of the sampling clock in a case where it is determined that the difference in the numbers of pulses HDmax and HDmin does not coincide with the horizontal resolution.
The generating the base clock may include changing the frequency of the horizontal synchronizing signal with using a phase lock loop circuit which includes a frequency divider.
The adjusting the frequency of the sampling clock may include adjusting the frequency of the sampling clock by cbarging a dividing value of the frequency divider.
The adjusting the frequency of the sampling clock may include deriving the changed dividing value from an equation (1).
(the changed dividing value)=(the horizontal resolution)/(the difference between the numbers HDmax and HDmin)xc3x97(the current dividing value)xe2x80x83xe2x80x83(1)
The interface circuit according to the second aspect of this invention comprises:
a first counter which counts a number of pulses of a sampling clock for sampling an analog image signal and a number of pulses of an adjustment clock having a frequency equal to a frequency of the sampling clock and a phase different from a phase of the sampling clock, for a predetermined time period;
a first determination unit which determines whether or not the number of pulses of the sampling clock has been counted correctly, by comparing the counted number of pulses of the sampling clock and the counted number of pulses of the adjustment clock; and
a sampling clock adjustment unit which adjusts the frequency and phase of the sampling clock in a case where said first determination unit determines that the number of pulses of the sampling clock has been counted correctly.
The first determination unit may determine whether or not the number of pulses of the sampling clock has been counted correctly by determining whether or not the number of pulses of the sampling clock coincides with the number of pulses of the adjustment clock within a range of an error.
The interface circuit may further comprise a phase changing unit which controls the number of pulses of the sampling clock to coincide with the number of pulses of the adjustment clock within the range of the error by changing the phase of the sampling clock or the phase of the adjustment clock, in a case where the first determination unit determines that the number of pulses of the sampling clock has not been counted correctly.
The first counter may count the numbers of pulses of the sampling clock and the adjustment clock, respectively, during a time period since a change in a level of a horizontal synchronizing signal supplied together with the analog image signal until a change in a level of a data existence signal indicating whether or not the analog image signal includes predetermined data.
The first determination unit may determine whether or not the number of pulses of the sampling clock has been counted correctly by determining whether or not a difference between the number of pulses of the sampling clock and the number of pulses of the adjustment clock is equal to or lower than 1 pulse.
The interface circuit may further comprise:
a base clock generating unit for generating a base clock by changing a frequency of the horizontal synchronizing signal; and
a phase delaying unit for generating the sampling clock and the adjustment clock by delaying a phase of the base clock by different delay amounts, respectively.
The sampling clock adjustment unit may include:
a resolution specifying unit which derives a horizontal resolution of the analog image signal from a vertical synchronizing signal, supplied together with the analog image signal, and the horizontal synchronizing signal;
a second counter which counts the number HDmin of pulses of the sampling clock during a time period since a change in the horizontal synchronizing signal until a first change in the data existence signal, and the number HDmax of pulses of the sampling clock during a time period from the change in the horizontal synchronizing signal until a final change in the data existence signal within a range of one scanning period;
a second determination unit which determines whether or not a difference in the numbers HDmax and HDmin (HDmaxxe2x88x92HDmin) corresponds to the horizontal resolution; and
a frequency adjustment unit which adjusts the frequency of the sampling clock in a case where the second determination unit determines that the difference in the numbers of pulses HDmax and HDmin does not coincide with the horizontal resolution.
The base clock generating unit may include a phase lock loop circuit which has a frequency divider.
The frequency adjustment unit may adjust the frequency of the sampling clock by changing a dividing value of the frequency divider.
The frequency adjustment unit may derive the changed dividing value from an equation (2).
(the changed dividing value)=(the horizontal resolution value)/(the difference between the numbers HDmax and HDmin )xc3x97(the current dividing value)xe2x80x83xe2x80x83(2)

Sampling clock adjusting method, and an interface circuit for displaying digital image


This invention comprises a method and apparatus to integrate underutilized Electric Vehicle battery packs with similarly underutilized solar PhotoVoltaic grid-tied inverters via an EVPV apparatus to provide ancillary services to the electric grid at night when the vehicles are parked and the sun is not shining.

This invention is broadly applicable to linking a large battery pack, as in an Electric Vehicle (EV), with an existing grid-tied inverter, as in a PhotoVoltaic (PV) solar system, to provide bidirectional ancillary services such as frequency regulation to an electric utility grid operator. The resulting service revenue can provide an incentive for EV and solar PV ownership. Management of one-way power flow to electric vehicles has been described as in U.S. Pat. No. 8,278,881, Woody (assigned to GM) and from electric vehicles for emergency power as in U.S. Pat. No. 7,582,979, Oyobe (assigned to Toyota). The objective here is bidirectional power flow, both in and out, under remote control.
Electric vehicles, because of their large and expensive battery packs are more expensive than equivalent Internal Combustion (IC) powered vehicles. At the same time these expensive vehicles are typically parked overnight and not used. Similarly, PV systems with expensive grid-tied inverters which convert Direct Current (DC) power from the PV panels to Alternating Current (AC) power and provide it to local loads and the grid are idle after sundown at night. This invention has as its objective to enable both of these underutilized assets to be linked and used to perform useful ancillary services to the grid and to generate revenue from the electric grid Independent System Operator (ISO) as described by Beck (2009). It is a further object of this invention to provide a method which is broadly applicable to virtually any electric vehicle and any type of grid-tied inverter. This method and the associated Electric Vehicle-PhotoVoltaic (EVPV) linking apparatus are unlike the Electric Vehicle Equipment for Grid-Integrated Vehicles described in U.S. Pat. No. 8,509,976, Kempton (2013). Kempton's patent and related patent applications rely on a specialized Electric Vehicle Equipment (EVE) on board the vehicle to communicate with the stationary Electric Vehicle Service Equipment (EVSE) which charges the vehicle battery pack and links the vehicle to the grid for ancillary service revenue. Kempton further relies on power electronic equipment onboard the vehicle to perform the high current charging and DC-AC inversion required for frequency regulation. The present invention relies on an off-board EVPV and an existing off-board inverter for both of these functions.
The SEGIS-ES equipment described in detail in U.S. Pat. No. 8,463,449, Sanders, (2013), which is an outcome of a similarly titled research program at Sandia National Laboratory, is similar in concept to the present invention. Bidirectional chargers are available form Princeton Power Systems and Dynapower. The unique feature of the present invention is the linkage of virtually any existing battery pack as in Electric Vehicles and virtually any existing grid-tied inverters as in solar PhotoVoltaic systems to achieve a minimum-cost electric storage capability to support the grid and earn revenue as an incentive for EV and PV ownership.
It is not possible to link the battery pack directly to the inverter because PV inverters typically use Maximum Power Point Tracking (MPPT) technology to optimize the power drawn from the solar PV array as the solar irradiance fluctuates during the day. A PV array is limited in both voltage and current and MPPT technology varies the impedance of the inverter searching for the "knee" of the current-voltage curve where the PV power output is maximized. A battery pack has a limited voltage but almost unlimited current capability, and an MPPT inverter will increase power without limit until something fails. Furthermore, ancillary service requests are proportional, not on-off, so a means of controlling the power output of the battery pack is required. A DC-DC converter can perform both current limiting and power control functions.
To obtain revenue from the ISO it is necessary to provide power flow in either direction on request, and this can be accommodated by provision of a battery charger with an equivalent output to the inverter and the DC-DC converter. In principle this charger could also charge the battery, but there are practical considerations that rule against this. Most EVs have on-board chargers which are specifically designed and controlled to charge their batteries safely. Since one of the objectives of this invention is to obtain ancillary service revenue for any vehicle with a DC quick charge port without modification of the vehicle or tampering with its onboard systems, an independent off-board charger is indicated.
Another reason for having matched DC-DC converters and off board chargers is that the vehicle battery can deliver more power than is normally used in charging it, and ancillary services are reimbursed on the basis of symmetric power available for both up and down regulation. Typically vehicles are charged at either the J1772 level 1 rate from a 120 V AC source at 15 A or 1.9 kW or the level 2 rate from a 240 V AC source at 24 or 40 Amps (5.8 or 9.6 kW). However a 24 kWh battery as in the popular Nissan Leaf battery electric vehicle can deliver power at 24 kW the 1.0 C rate (complete discharge in one hour) or even more, and get paid for it at that rate, provided that the charge rate is the same. Traction batteries in the mid range of their state of charge are designed for heavy drains for acceleration and heavy charging currents for regenerative braking.
Fortunately, modern battery chargers which are switching power supplies can also double as DC-DC converters, so that the same type of equipment can provide both services.
The inverter must be capable of providing power to the grid (a so-called grid-tied inverter) as used in most solar PV installations. The incentive for this is that the grid can provide power to the user at night when the sun isn't shining and the PV array can feed excess power to the grid during the day. The utility and economics of solar PV depend on this interchange of energy, since a stand alone PV system with enough battery storage to cover local loads over an extensive period of bad weather in the winter would be exorbitantly expensive. Most solar PV installations benefit from an agreement with their local utility known as net metering in which a bidirectional electric meter measures the power flow in and out, but the customer is billed only for the net input. This clearly is critical for ancillary service revenue, because if the customer is charged for the power input but not credited with the reverse flow, the energy bill far outweighs the ancillary service power revenue.
Grid-tied inverters have extensive electronic controls to synchronize their output with the grid. They also have so-called anti-islanding features, so that if there is a power outage, the solar PV power is turned off to prevent it from being fed back into the part of the grid that is still connected to the solar location and posing a hazard to the linemen sent to fix the outage. This loss of solar power just when it would be most useful is an aggravating feature of existing PV systems. In principle this invention can alleviate this problem by providing power through the inverter even at night during an outage by disconnecting the solar system from the grid and spoofing the inverter to start up again. A safer alternative is to provide a separate inverter serving only local loads and switching the DC connection to it during outages. A less costly alternative is posed by some of the newer inverters which have an internally switched receptacle that can be powered by the solar PV array for limited amounts of emergency power during an outage. Here the back up feature of this invention to keep the emergency power flowing at night or in bad weather from the EV battery pack could be very valuable.
Inverters are relatively short-lived relative to PV arrays and the balance of the PV system. In some cases it will pay to anticipate replacement and install a larger inverter to accommodate the high power capability of this invention to earn more service revenue from a higher power capability of the whole system and to get the emergency power feature mentioned above.
The primary reason that inverters fail is that the inlet filter capacitors experience too much voltage variation due to a significant 60 Hz AC ripple on the DC output of the PV array due to the AC load imposed by the inverter. A necessary feature of this invention is a very large input capacitor to the inverter which will minimize this AC ripple and should increase the life of the inverter.