In a method of transmitting an event notification, a first data packet that includes a first event code is transmitted to a first individual via a not-automatically receipt confirmed communication. Upon receiving a response communication from the first individual, the first individual is requested to respond with the first event code. If the first individual responds by transmitting the first event code, then the first event is identified from the first event code. Instructions relating to the first event are transmitted to the first individual. Status of notifications are displayed on a map which is displayed on a computer screen.

1. Field of the Invention
The present invention relates to communications systems and, more specifically, to systems that transmit notifications using non-automatically receipt confirmed technology.
2. Description of the Prior Art
Existing event notification systems alert an operator at a central office to the occurrence of events. Such events could, for example, take the form of alarms at remote facilities. The operator, once alerted to the event, evaluates the event and, if indicated, dispatches a technician to the site of the event. For example, in a water utility system, an event might include a high wet well alarm at a pumping station. The notification system alerts a central utility office of the alarm. An operator responds to the alarm by directing a technician via telephone to the pumping station, along with providing information necessary for the technician to investigate the alarm.
An autodialer notification system involves a device disposed at a remote facility that is connected to a dedicated telephone line. If an event is sensed, the autodialer device typically dials the telephone number of the central office and reports the event to an operator. An autodialer system has the disadvantage of requiring the user to bear the expense of a dedicated telephone line. A dedicated radio notification system works like an autodialer notification system, except that it uses a dedicated radio system to perform the communication function. Typical dedicated radio systems also tend to be expensive. Furthermore, such systems do not include an inherent mechanism for verifying that the technician has accepted responsibility for an event or that the technician has arrived at the site of the event.
Graphical event reporting systems typically include a display, such as a computer screen or a board with embedded lights, that presents a map or other image depicting potential locations of events (which are fixed locations) and an indication of the occurrence of events as they occur. Such systems have the disadvantage of not being able to display simultaneously the location of mobile assets (e.g., technicians) that can respond to the events.
One application of an event reporting system reports rainfall. Such a system uses a "tipping bucket" that measures rainfall and that is coupled to a prior art reporting system to notify a central office of heavy rainfall episodes. Given that rain frequently falls over a wide geographic area having multiple rainfall reporting systems dispersed throughout the area, existing systems may cause multiple alarms to be sent to the central office to report a single episode of heavy rain.
Therefore, there is a need for an event notification system that automatically verifies a response to an event, that is compatible with existing event notification systems, that displays the location of both events and mobile assets assigned to respond to events, and that is capable of accepting a single response for multiple linked alarms.


A system to determine a location of a signal emitting device is provided. First, second, and third data is received from at least one movable communication device. Each of the first, second, and third data include a unique identifier of the signal emitting device, a signal strength of a signal received by the at least one movable communication device from the signal emitting device, and a location of the at least one movable communication device when it received the signal. Each of the first, second, and third data include different locations of the at least one movable communication device. A location of the signal emitting device is computed based at least in part on the received first, second, and third data.

The subject matter disclosed herein relates to the field of determining a location of devices in a building, and more particularly relates to an apparatus and method for providing automatic determination of position and orientation of signal emitting devices.
Buildings that have a large number of floors and elevator banks can use destination management software, such as CompassPlus™ from Otis Elevator Company, to direct passengers to a particular elevator car(s). CompassPlus groups passengers and stops, and assigns an elevator car to a group of passengers heading for the same place or series of floors, or zones. Passengers enter their floor destinations in a keypad on a free-standing device entry terminal (DET), in a wall-mounted hallway fixture, or on a mobile device, and the destination management software suggests an elevator and provides directions to the elevator.
Signal emitting devices such as DETs and hallway fixtures may require significant installation time for each individual unit. Along with the physical installation, the installation also includes setting a user identifier (UID) of the DET, a floor location identifier (ID), a location of the DET, and an orientation in a lobby or hallway of the DET with reference to each elevator car or bank of elevators, a distance from the DET to each elevator or bank of elevators, and an estimate travel, or walking, time from the DET to each elevator or bank of elevators. This information is used by the DET to give the passenger instructions about how to get to the assigned elevator car. Similar information may also be required for mobile DET applications, which can provide a common digital user experience to direct a passenger to an elevator car or bank of elevators as that provided by a DET or hallway fixture.

Automatic determination of position and orientation of elevator device entry terminals and hallway fixtures


An electro-static-discharge (ESD) protection circuit protects core transistors. An internal node to the gate of an n-channel output transistor connects to the drain of an n-channel gate-grounding transistor to ground. The gate of the gate-grounding transistor is a coupled-gate node that is coupled by an ESD coupling capacitor to the output and to ground by an n-channel disabling transistor and a leaker resistor. The gate of the n-channel disabling transistor is connected to power and disables the ESD protection circuit when powered. An ESD pulse applied to the output is coupled through the ESD coupling capacitor to pulse high the coupled-gate node and turn on the gate-grounding transistor to ground the gate of the n-channel output transistor, which breaks down to shunt ESD current. The ESD pulse is prevented from coupling through a parasitic Miller capacitor of the n-channel output transistor by the gate-grounding transistor.

Small electronic devices such as integrated circuits (IC) are prone to damage and failure from electro-static-discharges (ESD). Various ESD-protection structures have been placed near input, output, or bi-directional I/O pins of ICs. Many of these protection structures use passive components such as series resistors, diodes, and thick-oxide transistors. Another type of ESD structure uses an active transistor to safely shunt ESD current.
As manufacturing ability improves and device sizes shrink, lower voltages are applied to transistors during normal operation. These smaller transistors are much more susceptible to over-voltage failure but can operate with a lower power-supply voltage and thus consume less power and produce less heat.
Such smaller transistors are often placed in an internal "core" of an IC, while larger transistors with gate lengths that are above the minimum are placed around the core in the periphery. ESD-protection structures are placed in the periphery using these larger transistors.
Although internal nodes of the smaller core transistors do not connect directly with Input-Output pads of the IC, the inventors have realized that parts of ESD pulses may be capacitivly coupled to internal core transistors, causing unexpected damage in the core, despite ESD-protection structures in the periphery.
Thinner gate oxides of the core transistors can be shorted, and substrate junctions melted by relatively small capacitivly-coupled currents applied to the tiny core devices. Static charges from a person or machinery can produce such damaging currents that are only partially blocked by the input-protection circuits in the periphery.
FIG. 1 is a prior-art mixed-voltage chip with an ESD-protection circuit. Core circuitry 20 contains core transistors 24, 26 which have a small channel length and can be damaged by voltages that were considered normal voltages a few years ago. Core circuitry 20 receives a reduced power supply voltage VDDi from voltage regulator 14, which steps down the external power supply VDDx to a voltage that can be safely applied to core transistors 24, 26 and other transistors in core circuitry 20. For example, VDDx may be 5 volts and VDDi may be 3 volts, 1.8 volts, 1.2 volts, or some other value. There may be thousands of core transistors in core circuitry 20.
Core transistors 24, 26 drive transistors in level shifter 18, which also receives VDDi from voltage regulator 14. Level shifter 18 raises the high-level output voltage produced by core transistor 24 using VDDi from voltage regulator 14. The boosted high voltage from level shifter 18 is then applied to the gate of p-channel output transistor 12, allowing the output pad to be driven to VDDx, which is applied to the source of p-channel output transistor 12. Level shifter 18 also drives the gate of n-channel output transistor 10 to allow the output to be driven low.
Protection from ESD pulses is provided by grounded-gate transistor 30, which is an n-channel transistor with its gate, source, and substrate connected to ground. Grounded-gate transistor 30 can turn on to shunt the ESD pulse to ground, either by normal channel conduction for a negative ESD pulse, or by drain-to-source breakdown (avalanche breakdown of the parasitic NPN transistor). A thicker field-oxide may be used for the gate oxide of grounded-gate transistor 30 rather than the more damage-prone thin gate oxide.
When grounded-gate transistor 30 turns on, by shunting current to ground it can keep the voltage at the drains of output transistors 10, 12 below their breakdown voltage, protecting them as well as core circuitry 20 which are further protected by output transistors 10, 12 and level shifter 18. Thus core transistors 24, 26 in core circuitry 20 are well-protected.
Smaller gate lengths and device sizes are used for core transistors 24, 26 and others in core circuitry 20 while larger gate lengths and device sizes are used for output transistors 10, 12 and for grounded-gate transistor 30. The larger devices are less prone to ESD damage.
FIG. 2 shows a prior-art open drain chip. Rather than use push-pull output circuits that drive outputs both high and low, only a pull-down output driver may be used. A pull-up resistor can be added to the output, either on-chip or off-chip. Since n-channel output transistor 10 drives much more current than the pull-up transistor sources, when n-channel output transistor 10 turns on, node OUTPAD and the output pad are driven low. When n-channel output transistor 10 turns off, node OUTPAD and the output pad gradually rise in voltage due to the pull-up resistor.
Since there is no p-channel output transistor for the open-drain output, there is no need of level shifter 18 of FIG. 1. Core transistors 24, 26 can directly drive the gate of n-channel output transistor 10. Although voltage regulator 14 provides only VDDi to core circuitry 20, and thus the gate of n-channel output transistor 10 is driven high to VDDi rather than to VDDx, VDDi is sufficiently high to turn on n-channel output transistor 10 and drive the output low, although somewhat more slowly that if VDDx were applied.
ESD protection is still provided by grounded-gate transistor 30. However, with the absence of level shifter 18, core circuitry 20 is separated from output node OUTPAD by only the gate of n-channel output transistor 10.
ESD Failures of Core Transistors
The inventors have noticed that these kinds of open-drain chips are more susceptible to ESD damage than push-pull outputs such as shown in FIG. 1. While n-channel output transistor 10 has a larger gate length and does not get damaged by typical ESD pulses, core transistors 24, 26 use smaller gate lengths and other feature sizes and have been found to fail when n-channel output transistor 10 does not.
Protection for Standard ESD Pulses—FIGS. 3A-C
Static electricity that normally builds up on a person can discharge across the input pins or a semiconductor integrated circuit (IC or chip). IC chips are routinely tested for resistance to such electro-static-discharges (ESD) using automated testers that apply a voltage across different pairs of pins of the chip. Any pair of pins may be chosen for the ESD test. FIGS. 3A-C highlight normal, successful operation of an ESD-Protection circuit.
In FIG. 3A, grounded-gate transistor 30 is turned off during normal operation with typical power-supply and ground voltages. However, when a positive ESD pulse is applied between the pad (node OUTPAD) and ground, the large drain-to-source voltage causes avalanche breakdown to occur under the gate of grounded-gate transistor 30, and grounded-gate transistor 30 conducts current under its gate to ground through the parasitic NPN transistor. Other breakdown mechanisms may occur in grounded-gate transistor 30. However, the ESD pulse must produce a sufficiently high voltage on node OUTPAD to initiate this breakdown. Once breakdown begins, and the current flows from node OUTPAD to ground, a snap-back effect can occur wherein grounded-gate transistor 30 continues conducting at voltages that are less than the initial breakdown voltage. The current shunted through grounded-gate transistor 30 quickly reduces the voltage on node OUTPAD, protecting core circuitry 20.
VDDi is generated by voltage regulator 14 using comparator 28 to compare VDDi to a reference voltage Vref and adjust the resistance of regulator transistor 22.
FIG. 3B shows a graph of the voltage on node OUTPAD over time as an ESD pulse is applied, while FIG. 3C shows that internal node NG has a lower voltage pulse that is coupled by parasitic Miller capacitor 32 from node OUTPAD to node NG. Capacitor 32 is formed from the gate-to-drain overlap of n-channel output transistor 10 and can be substantial when n-channel output transistor 10 is a large transistor designed to drive a large external load. This Miller capacitance is considered parasitic, and other parasitic capacitances may be included in capacitor 32.
Grounded-gate transistor 30 is designed to pass industry-standard ESD tests. These tests generate ESD pulses based on models such as the ESD machine model, which creates the ESD pulse by discharging a 200-pF capacitor that was charged to 100-400 volts, or the ESD human-body model, which creates the ESD pulse by discharging a 100-pF capacitor that was charged to 1000-4000 volts. The human-body model discharges the capacitor through a 1.5 k-ohm resistor, which limits the peak current in the pulse but extends the duration of the pulse.
Since the current of both the ESD human model (HBM) and the machine model (MM) are discharged from a small 100 or 200 pF capacitor, the duration of the discharged current is very short.
Protection Fails for Non-Standard ESD Pulses—FIGS. 4A-C
However, some real-world ESD pulses are longer in duration and/or lower in voltage than the HBM. Core transistor 26 in core circuitry 20 can be burned out by electro-over-stress (EOS) pulses that are low voltage but higher current (100 ma above) with long duration. These kinds of pulses can be generated in real-world hot-swap interfaces for telecom and datacom applications.
FIGS. 4A-C highlight failure of an ESD-Protection circuit when a non-standard ESD pulse occurs. When the ESD pulse is of longer duration than for the HBM, the peak voltage created by the ESD pulse may be reduced. Sometimes the ESD pulse has a lower voltage that what is created by the HBM or a standard ESD testing machine.
It is surprising that a lower-voltage ESD pulse could cause failures when a higher-voltage ESD pulse protects against failures. It is counter-intuitive that a lower voltage causes failures when a higher voltage does not. However, the inventors have observed this unusual phenomenon.
In FIG. 4A, damage is seen in core transistor 26 when n-channel output transistor 10 and grounded-gate transistor 30 do not show damage. This core damage occurs when a lower-voltage ESD pulse such as that shown in FIG. 4B is applied to the pad and node OUTPAD compared to FIG. 3B, when the standard ESD pulse is applied, producing a higher voltage on node OUTPAD.
The inventors theorize that the lower voltage applied to node OUTPAD by the sub-standard ESD pulse is below the breakdown voltage and thus insufficient to turn on grounded-gate transistor 30. It is also possible that grounded-gate transistor 30 does eventually turn on, but later than usual, allowing time for core transistor 26 to be damaged.
The lower-voltage pulse on node OUTPAD prevents or delays turn-on of grounded-gate transistor 30, so no current is shunted to ground. Instead, the voltage on node OUTPAD rises and this rise in voltage is capacitivly coupled through parasitic Miller capacitor 32 to node NG.
The rise in voltage of node NG may seem to be small, but the small device sizes of core transistors 24, 26 may be quite sensitive to voltages above VDDi. This slight voltage rise on node NG may be sufficient to damage core transistors 24, 26 as observed by the inventors.
FIG. 4C shows that the voltage of internal node NG rises slightly higher and for a longer period of time than for the standard ESD pulse test of FIG. 3C. The exact voltages of internal node NG are not known but are here theorized by the inventors.
The amount that the voltage of node NG rises compared with the rise of node OUTPAD depends on the capacitive coupling ratio of parasitic Miller capacitor 32. When n-channel output transistor 10 is large, parasitic capacitor 32 is also large, while drain capacitances of core transistors 24, 26 may be much smaller. This combination produces a relatively large coupling ratio, increasing the voltage of the pulse on node NG.
FIGS. 5A-D are graphs comparing operating conditions for standard high-voltage ESD tests and sub-standard lower-voltage ESD tests. A standard ESD test is shown in FIGS. 5A-B.
FIG. 5A shows a current-voltage curve. As the ESD pulse is applied to the pad at node OUTPAD, initially grounded-gate transistor 30 is turned off so the current is low as the voltage rises from the origin. Once the voltage is above the avalanche breakdown voltage VTO, current increases dramatically as the voltage is reduced (snaps back) as current flow continues to increase. Core transistor 26 likewise conducts in a snap-back mode once the ESD pulse is coupled through parasitic Miller capacitor 32 to its drain. The current through core transistor 26 is much less than through grounded-gate transistor 30.
FIG. 5B shows a voltage-time plot of the pad node and internal nodes when the standard ESD pulse is applied. The ESD pulse raises the voltage of pad node OUTPAD to a high level that is above the breakdown voltage VTO. Some of this voltage rise is coupled through parasitic Miller capacitor 32 to the drain of core transistors 24, 26. However, once grounded-gate transistor 30 turns on, the voltage pulse on node OUTPAD drops quickly, cutting the width of the pulse on internal node NG. If grounded-gate transistor 30 turns on quickly enough, the pulse on internal node NG does not have time to reach higher voltages that could damage core transistors 24, 26. The voltage stays below the avalanche breakdown voltage of core transistors 24, 26, VTC.
FIG. 5C shows a current-voltage curve when a lower voltage pulse is applied. As the sub-standard ESD pulse is applied to the pad at node OUTPAD, initially grounded-gate transistor 30 is turned off so the current is low as the voltage rises from the origin. Once the voltage is above the breakdown voltage, current increases as the voltage is reduced (snaps back) as current flow continues to increase. However, grounded-gate transistor 30 turns on more slowly with the lower ESD pulse. Core transistor 26 turns on earlier than for FIG. 5A and snaps-back once the ESD pulse is coupled through parasitic Miller capacitor 32 to its drain. Since core transistor 26 has a shorter gate length than does grounded-gate transistor 30, it snaps back more dramatically as seen in FIG. 5C. The current through core transistor 26 is much closer to that than through grounded-gate transistor 30 in FIG. 5C than in FIG. 5A.
FIG. 5D shows a voltage-time plot of the pad node and internal nodes when the sub-standard ESD pulse is applied. The sub-standard ESD pulse raises the voltage of pad node OUTPAD to a moderate level that is initially below the breakdown voltage VTO. Some of this voltage rise is coupled through parasitic Miller capacitor 32 to the drain of core transistors 24, 26. Node NG reaches a higher voltage level in FIG. 5D than in FIG. 5B since grounded-gate transistor 30 is delayed in turning on by the sub-standard ESD pulse. The voltage rises above the avalanche breakdown voltage of core transistors 24, 26, VTC. The higher NG voltage and its longer duration breaks down core transistor 26, causing irreversible damage to core circuitry 20 when the voltage at node NG exceeds the core transistors' second breakdown voltage.
Once grounded-gate transistor 30 turns on, the voltage pulse on node OUTPAD drops, cutting the width of the pulse on internal node NG. However, since grounded-gate transistor 30 turns on too slowly, or never turns on, the pulse on internal node NG was wider in duration and had time to reach higher voltages that damage core transistors 24, 26. Thus the wider, longer NG pulse in FIG. 5D compared with FIG. 5B is thought to cause the damage seen on core transistor 26. After avalanche breakdown occurs, thermal runaway breakdown can next occur, causing permanent damage.
What is desired is an electro-static-discharge (ESD) protection circuit that can protect against damage from sub-standard ESD pulses. An improved ESD protection circuit that protects against both high and lower-voltage ESD pulses is desirable.

ESD protection using a capacitivly-coupled clamp for protecting low-voltage core transistors from high-voltage outputs

Hong Kong Applied Science and Technology Research Institute Co., Ltd.


The invention provides a leukodepletion filter including a plurality of glass fiber filter pads, and a plurality of non-woven polyester fiber filter pads, sealed within a filter housing.

1. Field of the Invention
The invention generally relates to blood collection and processing. More particularly, the invention relates to filter devices and methods for removing leukocytes from whole blood and its components before transfusion or long term storage.
2. Description of the Prior Art
Most of the whole blood collected from donors today is not itself stored and used for transfusion. Instead, the whole blood is separated into its clinically proven components. These components include packed red blood cells, platelets and plasma. The components themselves are stored individually and used to treat a multiplicity of specific conditions and disease states.
In collecting whole blood components for transfusion, it is desirable to minimize the presence of impurities or other materials that may cause undesirable side effects in the recipient. For example, to reduce the transmission of disease and non-specific frebrile reactions, it is generally considered desirable to remove substantially all of the leukocytes from whole blood prior to transfusion, storage or separation into its clinically proven components.
In blood banks and hospitals, the most common way to remove leukocytes from whole blood is by filtration using a leukodepletion filter. Currently available leukodepletion filters employ various filtration media. One type of leukodepletion filter is fabricated from multiple, non-woven pads of melt-spun, polyester fibers, wherein the mean diameter of the fibers ranges from about 0.3 to about 3.0 micrometers. Commercially, a filter of this type is available from the Asahi Corporation, under the tradename designation Sepacell R 2000.RTM..
It is well known in the industry that currently available leukodepletion filters are not effective in removing leukocytes from warm, freshly-drawn blood. To alleviate this problem, blood banks and hospitals allow blood to age 4 to 6 hours at ambient temperature or refrigerate the red cell concentrate fraction. One protocol requires that prior to filtration the red cell concentrate is held at 4.degree. C. for twenty four (24) hours. Compared to warm blood, after the blood has been cooled, these filters typically display 1 to 3 orders of magnitude greater leukocyte depletion efficiency.
It would be advantageous to provide a leukodepletion filter which removes leukocytes equally well from warm, immediately-drawn blood (fresh) as from blood which has been cooled. Furthermore, it would be advantageous if the filter had a high capacity so that units of blood containing large numbers of leukocytes could be effectively leukodepleted using a single filter.

Filtration media for filtering leukocytes from freshly drawn blood


A packaging process line that compacts rolled products as they are packaged is disclosed. A firmness measuring device is used to measure the firmness of the rolls as the rolls, for instance, enter the process line. The roll firmness device is placed in communication with a controller, such as a microprocessor. The microprocessor is configured to receive information from the roll firmness device and control one or more elements within the process line that apply a compressive force to the rolls. In particular, the controller is configured to adjust any packaging equipment that applies a compressive force to the rolls so that a substantially uniform amount of force is applied to the rolls throughout the system. In this manner, the system is capable of automatically making adjustments based upon any variation in the product. Misfeeds, miscounts and the like are minimized for improving process efficiency and minimizing process downtime. Fully automatic grade changes can also be achieved with this information and control.

Many tissue products, such as toilet paper and paper towels, are typically formed into large supply rolls after being manufactured. After the supply rolls are formed, the rolls are rewound into smaller sized rolls, which are generally more useful for commercial purposes. For example, in many conventional processes, the tissue product is wound onto a hollow cylindrical core made of paper stock during a winding and converting operation.
Once formed into smaller rolls, the rolls of material are then typically fed to a packaging line and packaged in groups such as by being encased in a plastic film. The packaged groups are then placed in boxes or poly bundles and shipped to customers.
In one embodiment, for example, the packaging equipment may include an in-feed conveyor and a sorter for placing the rolls of material into groups of a desired size. The groups are then fed to a forming shoulder where the groups are placed in a tube formed from a plastic packaging film. The film is longitudinally sealed and advanced with the entrained product to a separating apparatus. At the separating apparatus, the tube is periodically severed into individual packages. The open ends of the packages are then folded and sealed and the packages are stacked in boxes. One embodiment of an exemplary packaging line as described above is disclosed in U.S. Pat. No. 5,195,300, which is incorporated herein by reference.
As the rolls of material are packaged, the rolls are typically periodically compressed in order to control the movement of the packages and their processing in the wrapper in order to form properly grouped and separated packages with good tightness.
One problem encountered in conventional packaging equipment, however, is that the equipment is not capable of automatically adjusting to variations in the size and firmness of the product. For example, the product size and firmness can change due to inconsistencies during production and converting of the rolls. Size changes also occur as different products are being packaged. Instead of allowing for size and firmness variations, packaging equipment typically runs at a fixed position. Thus, size and firmness changes of the product cause changes in the amount of compressive force applied to the product allowing for wrapper plug-ups and roll misfeeds. Such problem areas can cause machine downtime and production inefficiencies. Further, in order to implement a grade change, many packaging lines must be shut down and adjusted manually for an extended period of time in order to accommodate the new products.

Variable position constant force packaging system and process for using same


Provided are an apparatus and a method of transforming a format of a multidimensional image so that the multidimensional image can be output by any type of display device. The apparatus includes a scaler and a formatter. The scaler receives the multidimensional image and scales up or down a resolution of the multi-dimensional image. The formatter receives property information about a display device and transforms the format of the multi-dimensional image to conform to properties of the display device. Accordingly, a three-dimensional image or a stereo image can be easily displayed by any type of display device.

1. Field of the Invention
The present invention relates to transformation of a multidimensional video format, and more particularly, to an apparatus and a method of transforming a format of a multidimensional image so that the multidimensional image can be output by any type of display device.
2. Description of the Related Art
In digital broadcasting, an analog signal, such as, video data, audio data, and other data, is transformed into a digital signal, the digital signal is compressed and transmitted, the compressed digital signal is transformed into the original analog signal, and the original analog signal is reproduced. Accordingly, digital broadcasting provides a high-quality service compared with conventional analog broadcasting. Research into reception and display of a three-dimensional image using this digital broadcasting technique is under way. To transceive and display a three-dimensional image, a multi-view image should be produced and transmitted. However, research into transmission and display of a stereo image precedes the research into the reception and display of the three-dimensional image due to the limitations of the current network environment.
A display device processes only an image format determined depending on characteristics of the display device. Since there are various types of display devices, a format of a multidimensional image should be transformed to conform to a predetermined format of a display device to display the multidimensional image.

Apparatus and method of transforming multidimensional video format


Load balancing in a Hyper-Converged Infrastructure (HCI) environment, in which a compute migration request is received that indicates a virtual machine to be migrated, a source appliance in which the virtual machine is currently executing, and a destination appliance to which the virtual machine is to be moved by the requested compute migration. The technology determines whether performing the requested compute migration would cause the virtual machine to experience an increased remote data storage Input/Output (I/O) performance penalty as a result of moving the virtual machine to the destination appliance. The disclosed technology may prevent the requested compute migration from being performed in response at least in part to a determination that the requested compute migration would cause the virtual machine to experience an increased remote data storage I/O performance penalty as a result of moving the virtual machine to the destination appliance.

A hyper-converged infrastructure ("HCI") environment is an information technology infrastructure that provides both processor resources (aka "compute resources") and non-volatile data storage resources from multiple, interconnected HCI appliances that may be managed together as a cluster of HCI appliances. Each appliance in the cluster may include processor and/or non-volatile data storage resources, together with memory and communication interfaces. The appliances in the cluster may be interconnected by one or more computer networks, such as a Local Area Network (LAN) or other specific type of computer network. Each appliance in the cluster may be capable of performing compute and/or storage services.
A hypervisor in each HCI appliance executes some number of virtual machines located in that appliance. The hypervisor is responsible for sharing the processor resources of the appliance among the virtual machines that are contained within the appliance. Non-volatile data storage is allocated from non-volatile data storage resources within the cluster of appliances to each individual virtual machine as needed to meet the non-volatile data storage needs of that virtual machine.

Load balancing in a hyper-converged infrastructure (HCI) environment


A method, apparatus, and system for configuring an address bit in a cache formed on an integrated circuit. The method, apparatus, and system include the ability to configure the address bit as either a tag bit or a set index bit and reconfigure the address bit.

Cache is memory that is generally near in proximity to a processor. At least in part, the proximity of the cache to the processor makes access to the cache by the processor faster than processor access to other types of memory, such as RAM or hard drives. Cache often holds data that has recently been accessed or that is anticipated to be needed. For example, when used with a network router, cache may hold addresses of destination nodes to which packets have been sent recently in the expectation that additional packets may be routed to those nodes in the near future and so those addresses will be easily accessible.
Cache typically has a variety of attributes including associativity, a number of sets used, cache line size and cache size. Certain of those attributes may be related to data storage, while other of those attributes may be used to define a location in the cache, known as a cache address, where the data is stored. Those attributes are furthermore typically set in hardware at the time of manufacturing.


A method to cement wellbores in salt formations is provided using a cement slurry composition comprising blast furnace slag, water and salt. The salt improves compressive strength of blast furnace slag based cements. This method is useful in cementing wellbores within salt and potash formations because salt saturated cement slurries can be prepared without the need for expensive additives.

For over 90 years, annuli between an oil well casing and the surrounding borehole have been cemented to prevent vertical communication of formation fluids inside the borehole. Particular difficulties occur in cementing wellbores when the wellbore penetrates salt or potash formations. Cement slurries that are not salt saturated will dissolve a portion of the formation as the cement slurry sets leaving voids and poor bonding between the cement and the salt formation. Salt saturated water is therefore used in the preparation of cement slurries for cementing within salt and potash formations. Salts generally retard setting of Portland type cements, and reduce the effectiveness of many common cement additives for Portland cement slurries. The set cements also do not have as high of a compressive strength of Portland cements prepared from fresh water. Additional setting accelerators and additives are therefore required that increase the cost of such cements. Such salt water Portland cement slurries are therefore relatively expensive. Such salt water Portland cement slurries can also be difficult to formulate due to interactions between the salt and the many cement additives required.
Cementing wellbores through saltdome formations is particularly difficult because the salt formation will slowly flow. The casing must therefore be particularly strong to resist movement of the salt formation. Strength of cement around the casing typically cannot be relied upon to resist movement of the salt formation due to typically poor bonding between the cement and the casing. If such bonding could be improved, the cement could add considerable strength to the casing.
It is an object of this invention to provide a method to cement a casing in a wellbore, the method utilizing an improved salt water cement slurry.
It is a further object of this invention to provide such a method wherein the cement slurry is prepared from drilling fluids.
It is yet a further object of this invention to provide a method for cementing a wellbore within a salt formation resulting in good bonding between the salt formation and the set cement.
In a preferred embodiment, it is an object of this invention to provide a method for cementing a casing in a wellbore in a salt formation slurry that will result in good bonding both between the salt formation and the cement and the cement and the casing.

Cement slurry composition and method to cement wellbore casings in salt formations


A pressure control servo system for regulating cabin pressure in jet airplanes. In the preferred embodiment, the system comprises a first summing network, which sums data from a air data computer (ADC), a flight deck (FD), and a flight management computer (FMC), which produces a pressure reference signal, P.sub.R, indicative thereof. The summing network is connected to both a derivative path, and a proportional path. The derivative path comprises a proportional gain shaper, a derivative, an altitude dependent gain, and a gain multiplier. The proportional path comprises an integral gain shaper, an altitude dependent gain, a gain multiplier, and a rate limit. The outputs of the derivative and proportional paths are then connected to a second summing network, which sums those signals. Then, this summed output passes through a common digital integrator with a limit and a rate limit. The output of the common integrator is eventually compared to an actual pressure reference signal to a corresponding position signal, which then drives an outflow valve. This valve regulates the amount of air exhausted from an aircraft's cabin. The outflow valve moves, causing a change in cabin pressure. This change in cabin pressure is then measured and a signal is accordingly sent back to the first summation network. The gain shapers allow the gains to vary as a function of the magnitude of pressure error. The gain is decreased for small errors. This design provides increased stability for small disturbances, without sacrificing the response to large disturbances.

The present invention relates to devices used to control cabin pressure in jet airplanes. More particularly, it relates to control logic which generates an outflow valve signal position command, wherein the resultant signal is then used to control an outflow valve that regulates the amount of air exhausted from the cabin.
Regulation of cabin pressure is critical because the human ear is very sensitive to even small pressure changes. Therefore, to prevent discomfort, the cabin pressure control must maintain control in such a way as to prevent rapid changes in pressure. To prevent rapid changes in pressure, the cabin pressure control must be capable of responding quickly to disturbances, such as the skin pressure effect during takeoff rotation or changes in cabin in-flow.
Cabin pressure is also difficult to regulate due to the nature of the cabin response. The cabin responds differently to changes in the outflow valve position depending upon the pressure difference between the cabin pressure and the ambient pressure (outside the plane). The cabin also responds differently depending on cabin volume. For example, the system responds differently if it is used in freight or passenger air crafts.
One early approach for a cabin pressure servo loop used on the 747 and L1011 analog systems was an integral plus lead-lag compensation. The initial digital system simply reproduced the lead-lag logic in digital form. It was found, however, that since the digital system has a finite resolution and a finite time response, because it is not continuous, the net result was an inaccurate reproduction of the lead-lag logic; thus, the desired control response could not be achieved.
These shortcomings led to another form of control logic, known as proportional plus integral logic. This logic also has drawbacks. For example, over-travel, or over-saturation, in the integral path must be controlled in order to avoid problems when the system drives the valve to its position limit. Ideally, the system should come off its limit immediately when the position command reverses in direction. With the proportional and integral components, in order to avoid this problem, extra logic is necessary.
Accordingly, it is the primary object of the present invention to provide a cabin pressure control system that responds quickly to transients and avoids over-saturation, while at the same time maintaining stability within the system.
It is another object to design a system that responds in the same manner, regardless of the cabin-to-ambient differential pressure.
It is still another object to provide a proportional plus integral logic circuit, wherein the integral path can be controlled so as to prevent over-saturation.
It is yet another object to provide a proportional plus integral logic circuit in which integral and proportional gain paths can be separately modified by non-linearities and gains.
It is still a further object of the present invention to design a control system that is easily implemented into software.
The above and other objects and advantages of this invention will become more readily apparent when the following description is read in conjunction with the accompanying drawings.


In a charge transfer device which has many two-layered transfer electrodes, 8L disposed along a charge transfer direction X above a transfer channel is driven with two-phase driving pulses supplied to the transfer electrodes of the second layer, the transfer channel below the last-stage transfer electrode disposed at the last stage of the charge transfer direction X is constructed to have three-step potential, and the potential is set to be stepwise deeper from the upstream side to the downstream side in the charge transfer direction X.

1. Field of the Invention
The present invention relates to a charge transfer device in which two-phase driving pulses are applied to a number of two-layered transfer electrodes arranged above a transfer channel to perform a transfer operation, and a solid-state image pickup device using the same.
2. Description of the related Art
Generally, in a solid-state image pickup device such as CCD (Charge Coupled Device) area sensor or the like, signal charges which are photoelectrically converted by a photosensor serving as an image receiving element are transferred in a vertical direction by plural vertical transfer registers, and the signal charge thus transferred by each of the vertical transfer registers is transferred-in a horizontal direction by a horizontal transfer register which is driven in two-phase.
FIGS. 5A to 5C show the construction of a horizontal transfer register and an output portion in a conventional solid-state image pickup device (CCD area sensor), wherein FIG. 5A is a cross-sectional view showing the arrangement of electrodes of the horizontal transfer register, FIG. 5B shows the potential distribution corresponding the electrode arrangement, and FIG. 5C is a plan view showing the structure in the neighborhood of the last stage of the horizontal transfer register.
In FIG. 5, a number of two-layered transfer electrodes 51 are arranged along a charge transfer direction X above a transfer channel 50, and a gate electrode 52 is formed so as to be adjacent to a transfer electrode 51L located at the last stage thereof (hereinafter referred to as "last-stage transfer electrode"). Each of the two-layered transfer electrodes 51, 51L is constructed by a transfer electrode 51a, 51La as the first layer and a transfer electrode 51b, 51Lb as the second layer. Further, a two-phase driving pulse øH1, øH2 is applied to the two-layered transfer electrode 51 (containing 51L), and a gate voltage (DC voltage) VHOG is applied to the gate electrode 52.
Besides, in the potential distribution of the transfer channel 50, the potential level corresponding to the transfer electrode 51a, 51La of the first layer is set to be deeper the potential level corresponding to the transfer electrode 51b, 51Lb of the second layer by doping an area below the transfer electrode 51b, 51Lb of the second layer with such impurities as to shallow the potential level. With the doping of these impurities, in the area of the transfer channel 50, a storage portion (1) is formed below the transfer electrodes 51a, 51La of the first layer and a transfer portion (2) is formed below the transfer electrodes 51b, 51Lb of the second layer.
Further, a floating diffusion area (hereinafter referred to as "FD area") is connected through the gate electrode 52 to the last-stage transfer electrode 51L. The FD area 53 serves to detect the charge amount of signal charges transferred by the last-stage transfer electrode 51L and convert the charges to the voltage corresponding to the charge amount thus detected.
Next, the manufacturing process of the horizontal transfer register in the conventional solid-stage image pickup device will be described with reference to FIGS. 6A to 6D.
First, as shown in FIG. 6A, an N-type transfer channel is formed on a semiconductor substrate, and then the electrodes 51a, 51La of the first layer are formed. Subsequently, as shown in FIG. 6B, a predetermined portion is covered by a resist mask 54, and then P-type impurities to shallow the channel potential are doped by an ion implantation method or the like with the electrodes 5151a, 51La of the first layer as a mask.
Subsequently, as shown in FIG. 6C, the peripheral portions of the electrodes 51a, 51La of the first layer are covered by insulating material by oxidizing the electrodes 51a, 51La of the first layer or the like, and then the electrodes 51b, 51Lb, 52 of the second layer are formed. Finally, as shown in FIG. 5D, the electrode 52 at the end position is wired to form a gate electrode. Further, the other electrodes 51a, 51La of the first layer and the electrodes 51b, 51Lb of the second layer which are adjacent to each other are connected to each other to form the transfer electrodes 51, 51L of the second layer.
The maximum operating charge amount in the horizontal transfer register (hereinafter merely referred to as "operating charge amount") increases in proportion to the potential difference between the storage portion (1) and the transfer portion (2) and the electrode length Lst and the channel width W of the storage portion (1). In other words, the operating charge amount of the horizontal transfer register is determined by two parameters of the potential difference between the storage portion (1) and the transfer portion (2) and the electrode area of the storage portion (1) (the effective electrode area corresponding to the channel width).
The FD area 53 is formed of a more minute area than the transfer electrodes 51, 51L in order to increase the charge-to-voltage conversion gain and thus enhance the detection sensitivity. Therefore, the transfer channel 50 of the horizontal transfer register is designed so that the channel width W is reduced from the vicinity of the last-stage transfer electrode 51L to the FD area 53.
In this case, the electrode area of the storage portion of the last-stage transfer electrode 51L is reduced as the channel width W is reduced, so that the operating charge amount is reduced by the amount corresponding to the reduction of the electrode area. Therefore, it may be considered to alter the two parameters in order to prevent the reduction of the operating charge amount. However, with respect to the potential difference between the storage portion (1) and the transfer portion (2), if the potential difference is increased to ensure the operating charge amount, the amplitude at the transfer operation time is increased and thus the consumption power is increased. Therefore, in the present situation, there may be considered a method of increasing the electrode length Lst of the storage portion (1) of the last-stage transfer electrode 51L as shown in FIG. 7 to increase the electrode area at that place and ensure the operating charge amount.
However, if the electrode length Lst of the storage portion (1) of the last-stage transfer electrode 51L is increased as described above, the transfer distance (Lst+Ltr) at the last-stage transfer electrode 51L is also increased by the amount corresponding to the increase of the electrode length Lst, and thus the signal charge is hard to flow and thus the transfer efficiency is lowered. As a result, a transfer failure of the signal charge at the last-stage transfer electrode 51L occurs (the transfer is left uncompleted or the like), and image quality deterioration (color mixture, image tear or the like) occurs.

Charge transfer device and solid-state image pickup device


A method of repairing a turbine blade having a radially extending outer wall defining an internal cavity width and a blade tip. The method comprises removing at least a portion of the blade tip to form a repair surface and providing a tip cap having a radially outer side with an outer width that may be less than the internal cavity width, and having a radially inner side with an inner width that is substantially equal to or greater than the internal cavity width. The tip cap is positioned at the repair surface, and the tip cap is welded to the repair surface using a ductile welding material. A cap peripheral portion is formed by build-up welding around the tip cap, and a squealer portion is formed by build-up welding on the cap peripheral portion.

A conventional gas turbine engine includes multiple rows of compressor blades, multiple rows of rotating turbine blades and a rotating shaft. The turbine blades are designed to convert the hot working gas of the gas turbine engine into rotational energy of the shaft within a turbine section of the engine. Each turbine blade comprises a radially extending outer wall, defining an airfoil shape, and a blade tip. The turbine blades are typically formed of a superalloy material, such as a nickel-based superalloy material. An internal cavity is formed by the outer wall and has a radially outer end that is closed by a tip cap that is typically surrounded by a squealer structure. A cooling fluid is channeled through the internal cavity to cool the outer wall and blade tip.
During normal operation of the gas turbine engine, thermal and mechanical stresses in the turbine blades may result in the formation of defects, such as cracks, in the material of the blades. Gas turbine components, and in particular the turbine blades, are routinely serviced and exchanged when necessary. In order to extend the operational life of the components, whenever possible they are refurbished, after which they may be reused in a gas turbine. Such refurbishment of a turbine blade may, for example, involve replacement of the tip cap and reformation of the squealer structure, such as by build-up welding at the blade tip.

Method of providing a turbine blade tip repair


A method of making a driving path log file library for searching a car navigation path includes operating a car navigation system and deciding whether or not to store a driving path of a driver. When the driver decides to store the driving path, making a driving path log file with the driving path of the driver, storing the driving path log file, and making a driving path log file library out of the stored driving path log files. The driving path log file includes the driving path that the driver has driven through and then selected, and the driving path log file library includes a plurality of the stored driving path log files.

1. Field of the Invention
The present invention is related to a method for searching a car navigation path by using a log file, more particularly, to a method for searching a navigation path using a log file in a car navigation system, allowing a driver to choose an optimal path out of a path searched by an existing navigation algorithm and a shortest path from the log file the driver himself found out from experiences.
2. Description of the Related Art
In general, a car navigation system using GPS (Global Positioning System) refers to a system for detecting an accurate position of a car, based on data provided by a GPS satellite. Usually more than three GPS satellites are used to provide drivers with real time information about present position and velocity of their cars.
Referring to FIG. 1a, a related art car navigation system using GPS includes a GPS receiver 20 for receiving the position information and velocity data of a car through a GPS receiving antenna 10 from three to four GPS satellites 9; a storage 50 for providing a CD-ROM player with map information obtained from a map database of GIS (Geographic Information System) that stores map data and management data in hierarchical format; micro computer or Micom 30 for searching a map the driver wants to see after calculating a present position of the car in the map coordinate system that is provided by the map database by reading map information provided from the storage 50 and a car position information signal outputted from the GPS receiver 20, and for controlling information about reduction and magnification of the map, and voice output; a display 40 for displaying on a LCD display panel the map, the position information, and additional information provided from the Micom 30; and means for a voice output 60 for receiving an audio signal concerning a search result from the Micom 30 and for outputting a voice for an advance driving path.
Accordingly, when the driver drives his or her car, the car navigation system, more particularly, the Micom 30 therein, provides the driver with car navigation information including the present position and an advance direction of the car, velocity of the car, and road information that are provided by the GPS receiver 20, the car velocity sensor and the storage 50 like a CD-ROM player.
Typically used algorithm for searching the car navigation path is Dijkstra algorithm to find a shortest path from a starting point (a source) to a destination at the earliest possible time. In other words, Dijkstra algorithm is a shortest path algorithm, finding a shortest path among all nodes that are connected to a present source node for a minimum cost.
The shortest path algorithm finds a shortest path for the navigation path searching, by minimum cost precedence. Using a distance from the source, a cost from the source to a final destination is calculated in order to find a node having a minimum cost. The node having a minimum cost becomes a shortest path from the source.
In the shortest path algorithm, variables for calculating the cost are link distance, type of roads (highways, national roads, free ways, local roads), or with or without road.
FIG. 1b is a flow chart showing a guiding procedure for searching a car navigation path according to a related art. As shown in FIG. 1b, a driver selects a destination he wants to go in the car navigation system (S1-S2). Then using weight for each type of roads (e.g., highways, national road, local road or street road in a city), free/toll way, traffic direction, lane weight, or revolution weight (S3), a navigation path is searched out according to Dijakstra or Heuristic shortest path algorithm (S4), and displayed a path to the destination on a navigation map (S7). After map matching following the navigation path (S8), the car navigation system provides path guidance to the driver (S9). When an already registered destination is used in the car navigation system (S5), wherein from a few to tens of destinations that the driver had been are stored in a library for destination (S6), a navigation path to the destination is displayed on the navigation map (S7) to provide a car navigation path to the driver by selecting among stored destinations in case of going to the same destination later (S9).
However, because of manufacture problems of the navigation map, traffic congestion in reality, or difficulties in optimization of the path search algorithm, the car navigation system often fails to search a shortest path to the driver in reality.
As a matter of fact, in many cases, the driver himself reaches the destination via a shorter path than the navigation path search algorithm. Even though communication navigation for providing real time traffic information has been developed, its accuracy is less than 30% and cannot display an actual shortcut on the map of the car navigation system.

Method for searching car navigation path by using log file


A reduced cycle ignitor circuit for a high intensity discharge lamp incorporating a thermally timed, cycled operation which provides intermittent starting pulses for the high intensity discharge lamp. The ignitor circuit comprises a capacitor and semiconductor connected in series with a ballast transformer. The ignitor circuit further comprises a series connected resistor and thermostat, having thermally operated, normally closed electrical contacts, through which current is conducted to charge the capacitor. The thermostat is thermally coupled to the resistor. During operation, current flows through the series connected resistor and thermostat and charges the capacitor to a breakover threshold voltage level of the semiconductor. At that point, the semiconductor conducts and the energy stored in the capacitor is discharged through the semiconductor and a winding of the ballast which, through auto-transformer action, generates a high voltage pulse to start the high intensity discharge lamp. The resistor heats the thermostat during the charging cycle which reaches a temperature at which the normally closed thermostat contacts open, which disables the ignitor circuit until the resistor and thermostat cool and the thermostat contacts close.

1. Field of the Invention
The present invention relates generally to a reduced duty cycle ignitor circuit for a high intensity discharge lamp, and more particularly pertains to a reduced duty cycle ignitor circuit for a High Intensity Discharge (HID) lamp which incorporates a thermally timed cycled operation which provides intermittent starting pulses for the HID lamp. The intermittent starting pulses should provide reduced stress on the ballast, socket and wiring dielectric systems of the HID lamp and result in longer electrical lives therefor.
2. Discussion of the Prior Art
One drawback to conventional HID ignitor ballast circuits is that when the HID lamp fails or is removed from the ballast circuit, the ignitor continuously generates high voltage pulses which over time will stress the ballast, socket and wiring dielectric systems. This can result in shorter electrical lives for those systems, particularly for the ballast system. As a response to this problem, several companies have introduced HID lamp ignitors which disable the ignitor after a predetermined period of time, thereby reducing the stress on the ballast, socket, and wiring dielectric systems.

Reduced duty cycle high intensity discharge lamp ignitor


A nonaqueous secondary battery having a high discharge voltage, a high discharge capacity, satisfactory charge and discharge cycle characteristics, and assured safety is disclosed, comprising a positive electrode material, a negative electrode material, a nonaqueous electrolyte containing a lithium salt, and a separator, wherein the negative electrode material mainly comprises an amorphous oxide containing at least one functional element selected from the group consisting of Sn, Mn, Fe, Pb, and Ge.

With the recent spread of portable personal computers and mobile phones, the demand for secondary batteries having a higher capacity has been increasing. To meet the demand, extensive development of lithium secondary batteries having a high capacity is proceeding.
Metallic lithium and lithium alloys capable of realizing a high capacity have been used typically as a negative electrode material from the start of the development of lithium secondary batteries. Because these lithium materials form a dendrite that causes a danger of ignition or a burst, calcined carbonaceous materials capable of intercalating and desintercalating lithium have been put to practical use. However, carbonaceous materials have a disadvantage of a small discharge capacity.
JP-A-6-275268 (the term "JP-A" as used herein means an "unexamined published Japanese patent application") and JP-A-6-338325 describe the use of SnO and the use of a composite oxide comprising tin and other elements, respectively as a negative electrode material. Some of the negative electrode materials disclosed in these publications have a high capacity but insufficient cycle characteristics. In addition, the high capacity tends to give rise to such accidents as a sudden increase in battery temperature or a spout of the contents due to abnormalities such as a short circuit. That is, safety is not ensured sufficiently.
Accordingly, an object of the present invention is to provide a nonaqueous secondary battery having a high discharge potential, a high capacity, satisfactory cycle characteristics, and excellent safety.


The present disclosure relates to a fiber encapsulation mechanism for energy dissipation in a fiber amplifying system. One example embodiment includes an optical fiber amplifier. The optical fiber amplifier includes an optical fiber that includes a gain medium, as well as a polymer layer that at least partially surrounds the optical fiber. The polymer layer is optically transparent. In addition, the optical fiber amplifier includes a pump source. Optical pumping by the pump source amplifies optical signals in the optical fiber and generates excess heat and excess photons. The optical fiber amplifier additionally includes a heatsink layer disposed adjacent to the polymer layer. The heatsink layer conducts the excess heat away from the optical fiber. Further, the optical fiber amplifier includes an optically transparent layer disposed adjacent to the polymer layer. The optically transparent layer transmits the excess photons away from the optical fiber.

Unless otherwise indicated herein, the materials described in this section are not prior art to the claims in this application and are not admitted to be prior art by inclusion in this section.
Optical fiber lasers and amplifiers are used to radiate light at specific wavelengths, typically at relatively high intensities. Lasers and amplifiers generally include one or more amplifier stages, each including a length of active optical fiber typically coupled to one or more pump radiation sources (e.g., pump lasers) and configured to amplify optical radiation passing through a core.
The output power of optical fiber lasers and amplifiers is being continuously scaled up by designers. However, attempting to scale the output power can introduce problems, such as adverse energy dissipation effects. One intrinsic loss due to the pumping process results from the so-called quantum defect. The quantum defect is defined as the ratio of the pump wavelength to the lasing wavelength, and as such, acts as a measure of the amount of pump energy that is not carried by the amplified radiation, and thus is converted to excess energy within the fiber. Such energy can result in negative thermal effects or negative radiation effects (e.g., spontaneously emitted photons escaping from the fiber and not contributing to amplification of the electromagnetic radiation in the core). This can be particularly problematic in active optical fibers doped with elements having high quantum defect values. Another loss mechanism results from the emission of phonons (i.e., lattice vibrations). Such phonons can lead to an increase in thermal energy of the amplifier. In severe cases, the fiber itself can experience degradation due to overwhelming heating because of the associated energy dissipation effects. This is particularly the case for high peak power fiber amplifiers where the active doped fibers absorb the pump energy over a relatively short distance in order to mitigate substantial adverse non-linear optical effects (e.g., stimulated Brillouin scattering or stimulated Raman scattering).
Since a substantial fraction of the gain in an optical fiber amplifying system usually takes place within the portion of the active optical fiber that is nearest to the pump optical source (e.g., within a few centimeters of the end of the fiber coupled to the pump source), the thermal effects can be most pronounced in this region. This can be particularly problematic near fusion splices, sometimes called "critical junctions". Thus, the fusion splices can be the first section of an optical fiber amplifying system to fail if the thermal effects are not adequately accounted for.
Therefore, in order for optical fiber amplifiers and lasers to maximize power output, an effective means of handling the adverse energy dissipation effects in such systems without adversely affecting other aspects of the system, can be desired.

Fiber encapsulation mechanism for energy dissipation in a fiber amplifying system


A method for manufacturing a semiconductor device includes forming a storage node hole passing through an upper support layer, a bowing prevention layer and an upper mold layer using a dry etching process, forming a lower electrode in the storage node hole, patterning the upper support layer and the bowing prevention layer to expose a portion of the upper mold layer, removing the upper mold layer and at least a portion of the bowing prevention layer using a first wet etching process, and sequentially forming a dielectric layer and an upper electrode that cover the lower electrode. An etch rate of the bowing prevention layer may be substantially equal to an etch rate of the upper support layer during the dry etching process. An etch rate of the bowing prevention layer may be higher than an etch rate of the upper support layer during the first wet etching process.

The present disclosure relates to a semiconductor device and a method for manufacturing the same. More particularly, the present disclosure relates to a semiconductor device including a capacitor and a method for manufacturing the same.
Capacitors having a sufficient capacitance in a limited area have increased in demand as semiconductor devices have become more highly integrated. The capacitance of a capacitor is proportional to a surface area of an electrode and a dielectric constant of a dielectric layer but is inversely proportional to an equivalent thickness of the dielectric layer. Thus, to increase the capacitance of a capacitor in a limited area, a capacitor having a three-dimensional structure may be formed to increase the surface area of an electrode, the equivalent thickness of a dielectric layer may be reduced, and/or a dielectric layer having a high dielectric constant may be used in a capacitor.

Semiconductor device and method for manufacturing the same

Samsung-ro, Yeongtong-gu, Suwon-si, Gyeonggi-do


A method for operating a support system for preventing a motor vehicle from being left stranded due to a lack of drive energy is disclosed. The, wherein the motor vehicle has at least one driver assistance system and an internal combustion engine, which is operated with fuel as a first energy source of drive energy, and/or an electric motor, which is operated with electric energy of a battery as a second source of drive energy. The motor vehicle is autonomously driven to a charging and/or filling location using a vehicle system, which is designed to guide the motor vehicle in a fully automatic manner, when an emergency criterion is met which is constantly evaluated during an operational phase of the motor vehicle, and indicates to the driver that the motor vehicle will be left stranded if a charging and/or filling process is not carried out.

Modern motor vehicles frequently include a variety of driver assistance systems. The task of such driver assistance systems is to provide functions that are able to relieve the driver of the motor vehicle. Driver assistance systems are known, for example, to operate as alertness assistants. In particular, they recognize the state of the driver, his/her state of fatigue, and are able to output corresponding instructions and/or to carry out measures. Other driver assistance systems relate to the remaining range of the motor vehicle, which may be determined, for example, based on the fuel tank content in the case of an internal combustion engine using fuel and/or based on the state of charge (SOC) of the battery in the case of an electric motor, optionally, while adding additional pieces of information, in order to display them to the driver. Assistance systems for bypassing traffic congestion, which evaluate traffic congestion reports relating to the surroundings in which the motor vehicle is operated, are also known. Navigation systems, able, for example, to utilize digital map data, in general are enjoying wide popularity. For such navigation systems, it has already been proposed to expand them by so-called "points of interest" (POI), for example, giving information on places of interest and/or restaurants. With regard to an autonomous operation of the motor vehicle as well, vehicle systems for at least partial automatic guidance of motor vehicles have already been proposed, and are for example, of the type that offer parking assistance to a parking lot and/or that adjust the motor vehicle, in particular, in the case of contactless charging, into an ideal charging position, for charging a battery.
A variety of driver assistance systems or functions of driver assistance systems also address the drive energy of the motor vehicle and its maximally favorable procurement. Thus, for example, motor vehicle-external functions, for example, in the form of so-called apps, have been proposed, which compare fuel costs at various fueling locations, such as service stations, and, as an extension of navigation systems in general, provide information about available charging and fueling locations, i.e., for example the position of service stations (diesel, gasoline, gas hydrogen, . . . ) and/or charging stations or charging devices in general for motor vehicles.
Driver assistance systems for motor vehicles having electric engines and an associated battery have already been described, whereby it is proposed, for example, to perform the charging operations in a cost-optimized manner by utilizing navigation data. In such a case, the navigation data of possible journeys are stored in the navigation system, where the required energy demands to reach the destinations are calculated on the basis of the navigation data. An energy management system determines the required charge energy needed based on the state of charge of the battery and on the required energy demand in order to reach the destinations, wherein it may be determined, aided by knowledge of the required individual charge energies and the overall required charge energy, when it makes sense for economic reasons to charge the battery and to what level. In this case, the battery may be charged in a manual or automated manner. This proposal involves future planned or expected journeys, whereby the required amount of charge of energy, as well as the optimum charge times and respective optimum charging locations, may be fed back via a display unit in or outside the motor vehicle.
Support systems, such as that of DE 10 2011 075 872 A1 do not operate during operating phases, i.e., in particular, during the use of the motor vehicle for driving, and therefore offer no possibility of reacting to situations occurring during the driving phase. Thus, in spite of the pre-planning undertaken, it may happen that the motor vehicle runs out of drive energy, since there are no longer any energy sources available, and the motor vehicle comes to a stop.
US 2015/0348335 A1 relates to the performance of service work on autonomous vehicles. In this case, the vehicle itself is able to detect whether a service has to be performed, where a service center for performing the service is selected, and the autonomous vehicle is automatically moved to the service center. The services implementable in this way also include refueling the motor vehicle or charging a battery.
DE 10 2005 016 006 A1 relates to an information system and to a method for supplying pieces of service station information for a motor vehicle. If a fuel quantity and/or a remaining range of the vehicle drop(s) below an respective assigned threshold value, the service stations reachable within the determined remaining range, together with the associated pieces of current fuel cost information, are ascertained. A navigation system may automatically ascertain a driving route to the nearest service station if, besides this service station, no other service station is reachable within the determined remaining range. A navigation system may also offer a driving route to the selected service station in order to prevent the user of the motor vehicle from losing his/her way and becoming stranded along the way due to the lack of fuel.
US 2015/0051778 A1 relates to a vehicle and a method for controlling a vehicle. In this method, the vehicle includes a movement system able to influence the movement of the vehicle, which may be operated in a normal mode or an emergency mode. During autonomous driving of the vehicle, which movement systems are available are constantly checked, so that the autonomous movement may be maintained or deactivated through the use of suitable emergency modes.
DE 10 2010 061 065 A1 relates to a navigation unit, in particular, for an electric vehicle, wherein the nearest reachable electric service station is determined as the destination when an available range relative the distance to the entered navigation destination falls short.
DE 10 2015 001 248 A1 relates to a method and a system for operating a motor vehicle. In this case, what remaining range a motor vehicle will have at the destination is ascertained, wherein if the remaining range falls short of a predefined threshold value, the motor vehicle is operated in a consumption optimized mode, in which measures are assessed with regard to the savings potential and to the limitation of the driver, and are utilized in such a way that the motor vehicle reaches the destination with a remaining range that corresponds at least to the threshold value and the limitation of the driver is minimized by the measures.
DE 10 2009 050 404 A1 relates to a method for controlling the operation of a fully automatic driver assistance system of a motor vehicle designed for independent vehicle guidance, and a motor vehicle. In this method, a driver takeover request is outputted when at least one takeover condition occurs, wherein it is continuously monitored by evaluating sensor data whether the driver is still able to react quickly enough to a driver takeover request. If the status values as compared with comparison values indicate that the driver is not ready to take over and is unable to react quickly enough to the driver takeover request, either a warning or a driver takeover request is outputted.

Method for operating a support system for preventing a motor vehicle from being left stranded, and motor vehicle


A non-aqueous electroless copper plating solution that includes an anhydrous copper salt component, an anhydrous cobalt salt component, a non-aqueous complexing agent, and a non-aqueous solvent is provided.

In the fabrication of semiconductor devices such as integrated circuits, memory cells, and the like, involve a series of manufacturing operations that are performed to define features on semiconductor wafers ("wafers"). The wafers include integrated circuit devices in the form of multi-level structures defined on a silicon substrate. At a substrate level, transistor devices with diffusion regions are formed. In subsequent levels, interconnect metallization lines are patterned and electrically connected to the transistor devices to define a desired integrated circuit device. Also, patterned conductive layers are insulated from other conductive layers by dielectric materials.
To build an integrated circuit, transistors are first created on the surface of the wafer. The wiring and insulating structures are then added as multiple thin-film layers through a series of manufacturing process steps. Typically, a first layer of dielectric (insulating) material is deposited on top of the formed transistors. Subsequent layers of metal (e.g., copper, aluminum, etc.) are formed on top of this base layer, etched to create the conductive lines that carry the electricity, and then filled with dielectric material to create the necessary insulators between the lines. The process used for producing copper lines is referred to as a dual Damascene process, where trenches are formed in a planar conformal dielectric layer, vias are formed in the trenches to open a contact to the underlying metal layer previously formed, and copper is deposited everywhere. Copper is then planarized (overburden removed), leaving copper in the vias and trenches only.
Although copper lines are typically comprised of a plasma vapor deposition (PVD) seed layer (i.e., PVD Cu) followed by an electroplated layer (i.e., ECP Cu), electroless chemistries are under consideration for use as a PVD Cu replacement, and even as an ECP Cu replacement. An electroless copper deposition process can thus be used to build the copper conduction lines. During electroless copper deposition, electrons are transferred from a reducing agent to the copper ions resulting in the deposition of reduced copper onto the wafer surface. The formulation of the electroless copper plating solution is optimized to maximize the electron transfer process involving the copper ions.
Conventional formulations call for maintaining the electroless plating solution at a high alkaline pH (i.e., pH>9) to enhance the overall deposition rate. The limitations with using highly alkaline copper plating solutions for electroless copper deposition are non-compatibility with positive photoresist on the wafer surface, longer induction times, and decreased nucleation density due to an inhibition by hydroxylation of the copper interface (which occurs in neutral-to-alkaline environments). These are limitations that can be eliminated if the solution is maintained at an acidic pH environment (i.e., pH<7). One prominent limitation found with using acidic electroless copper plating solutions is that certain substrate surfaces, such as tantalum nitride (TaN), tend to get oxidized readily in an alkaline environment causing adhesion problems for the reduced copper resulting in blotchy plating on the TaN surfaces of the wafer.
In addition, many of the typical electroless deposition solutions utilize an aqueous base solution. However, for certain metal layers, the addition of water may cause oxidation of the layer, which is undesirable.
It is within this context that the embodiments arise.

Electroless deposition from non-aqueous solutions


A layer of material, such as crystalline indium tin oxide (ITO), is formed on top of a substrate by heating the material to a high temperature, while a temperature increase of the substrate is limited such that the temperature of the substrate does not exceed a predetermined temperature. For example, a layer including amorphous ITO can be deposited on top of the substrate, and the amorphous layer can be heated in a surface anneal process using radiation while limiting substrate temperature. Another process can pass electrical current through the amorphous ITO. In another process, the substrate is passed through a high-temperature deposition chamber quickly, such that a portion of a layer of crystalline ITO is deposited, while the temperature increase of the substrate is limited.

Many types of input devices are presently available for performing operations in a computing system, such as buttons or keys, mice, trackballs, joysticks, touch sensor panels, touch screens and the like. Touch screens, in particular, are becoming increasingly popular because of their ease and versatility of operation as well as their declining price. Touch screens can include a touch sensor panel, which can be a clear panel with a touch-sensitive surface, and a display device such as a liquid crystal display (LCD) that can be positioned partially or fully behind the panel so that the touch-sensitive surface can cover at least a portion of the viewable area of the display device. Touch screens can allow a user to perform various functions by touching the touch sensor panel using a finger, stylus or other object at a location dictated by a user interface (UI) being displayed by the display device. In general, touch screens can recognize a touch event and the position of the touch event on the touch sensor panel, and the computing system can then interpret the touch event in accordance with the display appearing at the time of the touch event, and thereafter can perform one or more actions based on the touch event.
Mutual capacitance touch sensor panels can be formed from a matrix of drive and sense lines of a substantially transparent conductive material such as ITO, often deposited in rows and columns in horizontal and vertical directions on a substantially transparent substrate. Conventional processes for depositing high-quality, crystalline ITO can require a substrate to be exposed to sustained temperatures as high as 350 degrees C. However, such high-temperature processes may not be suitable for some applications.


The detector in accordance with the present invention includes: a light emitter; a light receiver; and a light guiding member which includes a detection space for determining a state of a predetermined gas and is configured to guide light emitted from the light emitter to the at least one light receiver through the detection space. An internal surface of the detection space of the light guiding member includes a reflective surface causing reflection of light emitted from the light emitter. The reflective surface is a concave ellipsoidal surface having a long axis defined by a straight line determined by the light emitter and the light receiver. The reflective surface has a first focal point at a position of the light emitter and a second focal point on an opposite side of the light receiver from the first focal point.

In the past, there has been proposed a gas sensor including a gas measurement chamber, an infrared radiation source, and a detector for detecting infrared radiation. The gas measurement chamber includes an internal wall having a spheroidal shape.
The infrared radiation source is situated at a position of one of focal points inside the gas measurement chamber and the detector is situated at a position of the other focal point (see document 1 [JP 2007-147613 A]).
When a gas to be detected is present in the gas measurement chamber, infrared radiation having a specific wavelength corresponding to a type of the gas is absorbed. Therefore, it is possible to determine the composition of the gas present in the gas measurement chamber based on the magnitude of the infrared radiation detected by the detector.
Besides, document 2 (JP 2006-275980 A) discloses an infrared gas detector including a gas chamber, an infrared light emitting device, and an infrared detection device. The gas chamber has an ellipsoidal shape. The infrared light emitting device is situated at a position of one of focal points inside the gas chamber, and the infrared detection device is situated at a position of the other focal point.
As described above, according to the gas sensor of document 1 and the detector of document 2, light receiving elements are situated at the focal position. Hence, light rays reflected by the surface of such a spheroid can be focused into the light receiving element.
However, with regard to light (infrared light) that is reflected once by part of the surface of the spheroid close to the light receiving element and strikes the light receiving element, an incident angle of such light is larger.
Especially, in the aforementioned detector, an optical filter is situated in front of the light receiving element. The light striking the light receiving element at the larger incident angle also strikes the optical filter at a larger incident angle (i.e., an angle between an incident direction of light on the optical filter and an optical axis of the optical filter). With regard to the light striking the optical filter at the large incident angle, the optical filter is unlikely to show desired transmittance-wavelength characteristics. Consequently, an S/N ratio may be deteriorated. Additionally, an amount of light reflected by a surface of the optical filter is likely to increase.

PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.


The closure cap according to the invention for a container for receiving liquids, and in particular a BFS container for receiving an enteral nutrient solution, has a cover part and a rim part, with a withdrawal part for the withdrawal of a liquid, and in particular the enteral nutrient solution, being arranged in the cover part. Basically, the closure cap according to the invention may also comprise, as well as the withdrawal part, an injection part for the injection of a medicinal liquid into the enteral nutrient solution. The withdrawal part of the closure cap according to the invention has a connecting part for a spike of a flexible line of a transfer device and a closing-off part having a pierceable membrane for closing-off the recess in the connecting part.

There is a process, known as the blow-fill-seal process (BFS process), in which, in a single operation and sterilely and while remaining pyrogen-free, containers, such for example as bottles of extruded PE or PP, are blown to a desired shape and immediately on cooling are filled aseptically with a sterile filling and are hermetically sealed. The containers, and in particular the bottles, which are produced by the blow-fill-seal process are also referred to as BFS containers.
When known BFS containers are used to receive sterile medical liquids, such for example as enteral nutrient solutions, they require a closure cap system which allows the enteral nutrient solution to be transferred to the patient by means of a transfer device.
To allow enteral nutrient solutions to be supplied, there are known nutrient solution bags which have a connecting part referred to as a port to which a transfer device for feeding the nutrient solution to the patient can be connected.
The known transfer devices for feeding the enteral nutrient solution to the patient have a flexible line which is provided at one end with a spike which can be connected to the connecting part of the nutrient solution bag. The other end of the flexible line is provided with a connector for connection to a probe for enteral nutrition.
The known connecting parts of known nutrient solution bags are closed off with a seal by a membrane which is pierced by the spike of the transfer device when the flexible line is connected in.
Known from DE 2 00 U1 is a closure cap for a BFS container which has a cover part and a rim part, a slit membrane which allows the spike of a transfer device to be inserted being inset into the cover part. The slit membrane is seated in the cover part of the closure cap flush therewith.
The object underlying the invention is to provide a closure cap for a container for receiving liquids, and in particular a BFS container for receiving an enteral nutrient solution, in which the handling of the container when the spike of a flexible line of a transfer device is being connected in is simplified. As well as this, it is also an object of the invention to provide a container for receiving liquids, and in particular a BFS container for receiving an enteral nutrient solution, which can be handled easily when the spike of the transfer device is being connected in.
These objects are achieved in accordance with the invention by virtue of the features given in claims 1 and 14. Preferred embodiments of the invention form the subject matter of the dependent claims.

Closure cap for a container for receiving liquids and in particular an enteral nutrient solution, and container having such a closure cap


An umbrella assembly providing a dihedral shelter atop a pole which can be deployed to different dihedral angles and retracted to a compact configuration. It further includes a vent port in a cavity which is overhung by a positively positioned vent port cover.

This invention is directed to larger umbrellas commonly used for shading in outdoor settings such as parties, pool sides, and outdoor dining areas. It is collapsible in the sense of being retractable for storage, and deployable to its working configurations.
The working configuration of this invention is a dihedral canopy structure, folded along a dihedral edge. The dihedral angle is adjustable, and at one extreme may be 180 degrees (a flat plane), although the selected dihedral angle will most usually be less, resulting in two slanted panels, often with about 120 degrees included between them.
Such structures are usually mounted on stands and are subject to substantial wind loads which might overturn them. It is customary to provide a vent port in the canopy to reduce the differential pressure across it. In ordinary umbrellas, the size of the vent port must be kept quite small. It is an object of this invention to provide an arrangement in which the vent port can be made much larger by providing a vent cover whose deployed configuration is established by dedicated adjustable structure to assure that the vent cover will remain reliably open and in place, both to provide the vent function and to assure that the vent cover will reliably overhang the vent port.
There results an umbrella with a desirable and attractive configuration with an improved vent system in a conveniently-attained deployed condition, and which can readily be retracted to a conveniently carried and stored configuration.

Umbrella with a vented canopy deployable and retractible to a dihedral shape with a positively moved canopy and vent cover