An electronic component testing laminated board suitable for performing a heat test on electronic components of a multikind and small quantity production type. The laminated board includes a metal plate, a testing circuit layer including a double-sided printing wiring board or the like and integrally formed through a thin electric insulating layer on one side of the metal plate for mounting thereon electronic components to be tested, and a heater circuit layer including a metal foil circuit or the like and integrally formed through another electric insulating layer on the other side of the metal plate for maintaining the testing circuit layer at a given temperature. An inorganic filler or the like is added to the electric insulating layers. An electronic component testing box for removably accommodating the electronic component testing lamianted board includes walls made of a heat insulating material, power supply connecting connector, signal input and output connector, temperature measuring apparatus, etc.

The present invention relates to a laminated board for testing electronic components which is used when performing a burn-in test for maintaining electronic components such as ICs at a given temperature for a fixed period of time to evaluate the reliability of the electronic components, and more particularly the invention relates to a laminated board for testing electronic components which is capable of efficiently and accurately testing electronic components of the multikind and small quantity production type.
Recent tendency toward greater miniaturization and higher density of electronic components has been so remarkable that the functions and performances of electronic components have been enhanced considerably. For the evaluation of mass-produced electronic components, however, it is important to determine whether they are not only excellent in function and performance but also stabilized and standardized in quality. As a result, at the end of the fabrication steps of many electronic components, a burn-in test for maintaining the fabricated electronic components at a given high temperature for a given period of time to check their electric characteristics in performed with a view to determining the quality of the products and ensuring stabilization of the quality of the products. Also, in response to the reduction in the period of development of electronic components, there has been a demand for evaluating in a short period of time the reliability with respect to the functions and performances of various newly developed electronic components.
In the past, the burn-in test for reliability evaluation purposes has been performed by leaving a test board carrying thereon electronic components to be tested at rest in a thermostatic chamber preset to a given temperature. At this time, if the temperature distribution within the test chamber is not uniform, it is impossible to attain the objective of the test, that is, to ensure the standardization of quality, and therefore various contrivances for maintaining the chamber temperature constant have been made. Generally, such methods have been used that the chamber is increased in wall thickness and size to increase the chamber heat capacity and thereby to reduce the fluctuations in temperature and that the air within the chamber is forced to circulate to reduce the temperature variations among different portions within the chamber.
However, these methods have been disadvantageous in that not only the test chamber becomes a very large-scale unit with the resulting increase in the equipment cost but also much time is required for the desired temperature rise, with the result that in order to perform the burn-in test in accordance with the fabrication steps, the test chamber must always be operated continuously at a given temperature and the resulting loss is large. There is another inconvenience that each time the test is performed, the temperature profile of the test chamber is varied depending on the number of electronic components to be tested, etc.
Moreover, in view of the supply trend of ICs, while the main trend in the past has shown a multikind and mass production tendency toward mass-producing ICs of rated characteristics and allowing users to use these ICs in various combinations, the recent trend has been changing over to a multikind and small quantity production tendency centering on such kinds of ICs each intended for a particular user and having the functions of a large number of conventional general-purpose ICs, e.g., an ASIC (application specific integrated circuit) that is called for example as a gate-array IC or custom IC. Also, in the development of new ASICs designed for particular users, the development department of such ICs is required to perform tests at the laboratory stage prior to its production on the line and in this case the tests are performed on a minimum number of samples. In addition, the actual circumstances are such that almost all the OA equipment makers perform again the burn-in test after the purchasing of ICs with a view to ensuring the reliability of the ICs.
In these circumstances, while the previously mentioned test employing a thermostatic chamber is suited for performing the burn-in test on a large number (e.g., several thousands) of electronic components such as ICs at a time, a problem has arisen that where it is desired to perform the burn-in test on several to several tens electronic components at a time as occasion demands, the test efficiency of this test method is very low and it is also difficult to make stable measurements.
As an electronic component testing laminated board designed to overcome these problems, there has been known a so-called heater printed wiring board having a planner heater element. As shown by the sectional view of FIG. 4, it is constructed by laminating electric insulating layers 205a and 205b composed by epoxy glass-cloth sheets to both sides of a planner carbon-graphite heater element 203 and then bonding the laminate to a testing circuit layer 202 (copper foil circuit 202a) formed by the same procedure are used in the fabrication of the ordinary printed wiring board. Also, formed at the end portions of the carbon-graphite heater element 203 held between the electric insulating layers 205a and 205b are terminal portions from which leads are brought out to the outside and the leads 211 are connected to a power source. When performing the test, a current is supplied to the carbon-graphite heater element 203 whose electric resistance value is large as compared with metal conductors so that a considerable amount of joule heat is generated and this heat is transmitted to the testing circuit layer 202 through the electric insulating layer 205a, thereby increasing the temperature of the testing circuit layer 202 to a given temperature.
However, this type of conventional electronic component testing laminated board is disadvantageous in that since a heater element laminated to a testing circuit layer is held between electric insulating layers which are low in heat conductivity and thick, the transmission of heat to the testing circuit layer is slow, that is, not only the temperature rise is slow but also the dispersion of the heat from the heater element does not take place rapidly, thus tending to cause a local high temperature portion and thereby making it difficult for the temperature distribution on the surface of the testing circuit layer to become uniform.
In addition, although it is reinforced by the glass cloth, the large part of the board is composed of an organic material and therefore its mechanical strength is low. (The electric insulating layers cannot be made very thin from the viewpoint of mechanical strength thereof.) Also, as mentioned previously, the heat generated from the heater element tends to be retained in the electric insulating layers and thus the epoxy resin forming the electric insulating layers tend to be deteriorated by the heat. As a result, the continuous maximum working temperature is as high as 120.degree. C. at the surface of the testing circuit layer and thus the board cannot be used in the burn-in test under the conditions of 150.degree. C. and 125.degree. C. which are determined by the JIS specifications. There is another disadvantage that during the test the board is deformed due to the differences in thermal expansion coefficient among the respective layers and it cannot regain its original size and shape.
There is still another disadvantage that there are cases where the ICs or the like subjected to the test are operated erroneously by the electromagnetic noise produced during the on-off operation of the heater circuit layer, thus making it impossible to accurately evaluate the reliability.

Laminated board for testing electronic components


A multiple torsion spring assembly according to the present invention may be provided with a coiled helical torsion spring. The spring has first and second end coils, and a plurality of intermediate coils between the first and second end coils. The first end coil inner diameter is less than the inner diameter of the intermediate coils. The second end coil inner diameter is less than the inner diameter of the first end coil. The spring may be used to control a throttle return of a throttle body. Methods of manufacturing spring assemblies are also disclosed.

Use of springs and spring assemblies for effecting throttle valve operation is well known in the art. Reference may be made to Blanchard et al. U.S. Pat. No. 4,582,653, which is incorporated herein by reference, for a more detailed disclosure of a typical throttle body equipped with a spring assembly for returning a throttle valve toward a closed position.
FIGS. 1-3 illustrate a prior art single torsion spring assembly 10. The spring assembly 10 is described in detail in Pavlin U.S. Pat. No. 5,368,283 which is incorporated herein by reference. The spring 10 is referred to herein as a single torsion spring because it is coiled from a single strand of music wire. Reference is also made to Paggeot U.S. Pat. No. 4,828,235 which describes a similar single torsion spring, and which is also incorporated herein by reference.
The spring assembly 10 is shown in FIGS. 1-2 in conjunction with a throttle body 11 of an automobile internal combustion engine. The throttle body 11 includes a lever 12 supported to rotate about the axis of a shaft 13 (FIG. 2). Rotation of the lever 12 in one direction effects opening of the throttle valve (not shown) of the throttle body 11, while reverse rotation of the lever 12 by the spring assembly 10 effects closing of the throttle valve.
The spring assembly 10 includes a coiled torsion spring 15 having two coils 15A adjacent each end of the spring and a pair of end bushings 16 and 17 (FIG. 3). The torsion spring 15 is wound helically from round music wire and is formed with the end coils 15A being of a reduced diameter. The end coils 15A of the single torsion spring are of equivalent diameter, albeit reduced from the diameter of intermediate coils. Tangs 24 and 25 extend radially from the coils. One tang is parallel to a longitudinal axis of the spring.
A dual torsion spring, that is a spring comprising two coiled strands, may be produced by coiling the two strands about a coiling shaft (or simply shaft). The dual torsion spring is then slid off of the shaft. Such a shaft wound dual torsion spring is not capable of having two reduced reduce end coils, one on either side of the intermediate coils. Further, one reduced end coil is difficult to achieve via a shaft wound method. These limitations are a result of the fact that a spring wound as such on a shaft cannot be slid off of the shaft after it is formed without deforming it.
Recently dual torsion springs having reduced end coils, wherein the end coils are of equivalent diameters, have become known in the art. FIGS. 4-7 illustrate such a prior art dual torsion spring 30. The dual torsion spring 30 has a first end coil 32 and a second end coil 34 separated by intermediate coils 36. The first end coil 32 has a diameter 38 and the second end coil 34 has a diameter 40 of the same size. Both end coil diameters are reduced in size as compared to a diameter 42 of the intermediate coils 36.
The dual wound torsion springs shown in FIGS. 4-7 have been produced utilizing what may be referred to as single-wound technology. Each strand is formed into a coil and then, through post-wind operation, the strands are merged into a dual torsion spring. Heretofore, known manufacturing techniques required each end coil to be of equal diameters. This had certain disadvantages, particularly relevant to shafts of throttles, wherein the shafts had to be over built (or over molded) at one end to accommodate the diameter of an end coil. With reference to FIGS. 1 and 2, this would generally require shaft 13 to be over built near lever 12.
Embodiments of the present invention overcome these and other problems.

Multiple torsion spring and methods of use


A water activation device is configured by arranging a plurality of water activation pieces in a holder in a manner that the water activation pieces do not contact with each other where an axial direction of each piece is established along the flow passage. Multiple layers of the holders are established in an internal space of the body of the water activation device. Each of the water activation piece is formed as a cylindrical body with a through hole that includes an axis. Spiral grooves are formed non-continuously or continuously on an inner surface and outer surface of the water activation piece so that when the axis of the water activation piece is established in the flow passage, the water activation piece axially rotates by the flow pressure. The spiral grooves are formed in a rightward rotation (clock-wise) manner in plan view.

Ground water made from rain and snow that have accumulated in mountains and permeated the ground eventually becomes spring water and forms head streams of river. During this process, either by subdivision of hydrogen bond group (cluster) of water molecules caused by infrared rays, negative ion actions, or magnetic actions of minerals and rocks, or by receiving the electrons generated by the friction among water molecules created from collision against rocks or waterfall, the water becomes reduced, or namely, activated.
However, the various effects of the activated condition will be gradually lost since the activated condition cannot be maintained for a long period of time. Due to this, a device (hereafter referred to as "water activation device") has been developed for applying the principle of the above-mentioned activation process, where the water that is losing its activation effects is reactivated by water flow friction which is caused by flowing and stirring the service water against ball-shaped ceramic baked particles (hereafter referred to as "ceramic balls") arranged in an internal space or magnetic fields formed in the internal space.
For example, a water activation device that stores several cases in a tubular body which is capable of intervening through the flow pipe of the service water has been disclosed where each of the cases stores ceramic balls in the internal space and is formed with flow holes (for example, see Patent Document 1).
Similar to the invention of Patent Document 1, another water activation device has been disclosed (for example, see Patent Document 2), where approximated infrared radiation ceramic group discs formed with small flow holes are established in multiple layers and in a freely rotating manner within a main body where the main body is capable of intervening through the flow pipe of the service water where each of these ceramic discs are rotated by contact wings formed thereon.    Patent Document 1: Japanese Laid-Open Publication No. 2001-058191 (pages 3-5, FIG. 1)    Patent Document 2: Japanese Laid-Open Publication No. 2000-107752 (pages 2-3, FIG. 1)

Water activation piece for use in flow passage, arrangement structure of the water activation piece, and water activation device using the water activation piece and the arrangement structure


A multipurpose bus connects subsets of intercommunicating modular circuit packs in a complex electrical system. An individual one of the subsets may use the bus leads to transport signals differently from the other subsets. Each of the subsets of the circuit packs is selected to use the bus in particular time intervals. The subset, thus selected, uses the bus leads the way its own protocol governs during those particular time intervals and otherwise ignores the bus.

A complex electrical system is oftentimes designed to include a plurality of modular circuit packs. These circuit packs, which individually perform well-defined integral functions for the system, work synergistically to realize various system capabilities. This design approach allows a system to be flexibly configured by the selection of various combinations of modular circuit packs.
Modular circuit packs in a system are typically assembled in a frame, specifically, in plug-in slots which are defined by circuit pack guides. The circuit packs are connected to one or more buses which are wired on a backplane of the frame and via which electrical signals are intercommunicated between the circuit packs. To this end, a connector on a circuit pack mates mechanically and electrically with a corresponding backplane connector at the end of a plug-in slot. This backplane connector, depending on the number of contacts it has, may be connected to one or more of the buses on the backplane.
The above-described design approach is most advantageous for a simple electrical system that requires only one bus. It is not so, as explained hereinbelow, for a complex electrical system which normally requires a plurality of buses to accommodate different schemes for communications between individual circuit packs. These schemes may be, for example, a time-division-multiplexed scheme, a data packetized scheme, etc., wherein each scheme is associated with a different bus configuration. Each bus configuration specifies the functions of the individual leads of a bus, and restricts, for example, the signal waveforms from a circuit pack to drive the individual bus leads.
The foregoing variety of bus configurations unduly limits system expansion. This limitation arises because it is normally uneconomical to have the backplane connector of each plug-in slot connected to all of the differently configured buses within the system since only a subset of these buses is used by any circuit pack. Indeed, it is more economical to have different types of plug-in slots where each type of plug-in slot is wired to a particular subset of the different buses and these subsets are chosen to be usable by one or more of the circuit packs. Because the plug-in slots of different types are not interchangeable, one must reserve additional slots to anticipate system expansion. However, due to the uncertainty inherent in the forecast of future circuit pack usage, the determination of the number reserved for each type of slot is, at best, speculative. It is very likely that new circuit packs which are subsequently added for system expansion may exhaust the reserved slots of a particular type while many of the other types remain unused. The further need of circuit packs that require that particular type of slot often causes a system user to wastefully replace the whole system. More significantly, as technology evolves, it is oftentimes desirable to enhance the capability of a system in use by the addition of circuit packs requiring a bus configuration not originally contemplated. As a consequence thereof, the system user who desires the enhanced capability is faced with no choice but to, again, wastefully replace the current system with one of a newer model, which will probably be replaced in the near future for the same above-stated limitation.
Accordingly, it is desirable to have a bus arrangement capable of supporting a plurality of bus configurations, which does not require accurate forecast of future circuit pack usage and which can readily accommodate one or more of bus configurations not originally contemplated.


Calibration tools and procedures that provide calibration to galvanic tools can include use of measurement tools to measure resistivity of a calibration box. The resistivity of the calibration box can also be measured by a galvanic tool of interest. The two sets of measurements can be used to calibrate the galvanic tool. Additional apparatus, systems, and methods are disclosed.

In drilling wells for oil and gas exploration, understanding the structure and properties of the associated geological formation provides information to aid such exploration. Measurements in a wellbore, also referred to as a borehole, are typically performed to attain this understanding. The usefulness of such measurements may be related to the precision or quality of the information derived from such measurements.
Many measurement tools need calibration, including an array laterolog tool (LAT). Calibration of the LAT can be performed with the LAT connected to a calibration box (CB). The calibration box consists of a network of resistors, which simulates electrical loading of the LAT, corresponding to various formations. The resistors electrically simulate the corresponding borehole-formation impedance between all electrode pairs. Usually several different calibration boxes for different borehole-formation conditions should be designed to implement shop calibration of the LAT. Ideally, the calibration boxes should produce substantially similar results with the results obtained by using formations, where the results are apparent resistivity. Apparent resistivity is the resistivity of an electrically isotropic and homogenous region that corresponds to a measured relationship between applied current and potential difference for a given configuration of electrodes such that the apparent resistivity can be provided as a product of measured resistance and a geometric factor.
Once the LAT is connected to the calibration box, unfocussed voltages and currents (V(u) and I(u)) are measured. Unfocused measurements can be focused by using a software focusing code by which focused measurements (V(f) and I(f)) are obtained. By using the focused measurements calibration is performed. Such precision or quality may depend on calibration of the measurement tools.


A process for metallization of a workpiece, such as a semiconductor workpiece. In an embodiment, an alkaline electrolytic copper bath is used to electroplate copper onto a seed layer, electroplate copper directly onto a barrier layer material, or enhance an ultra-thin copper seed layer which has been deposited on the barrier layer using a deposition process such as PVD. The resulting copper layer provides an excellent conformal copper coating that fills trenches, vias, and other microstructures in the workpiece. When used for seed layer enhancement, the resulting copper seed layer provide an excellent conformal copper coating that allows the microstructures to be filled with a copper layer having good uniformity using electrochemical deposition techniques. Further, copper layers that are electroplated in the disclosed manner exhibit low sheet resistance and are readily annealed at low temperatures.

The present invention relates to electrochemical processing of workpieces, and particularly for processes, apparatus and chemical solutions for depositing metals on microelectronic and micromechanical workpieces.
In the fabrication of microelectronic devices, application of one or more metallization layers is often an important step in the overall fabrication process. The metallization may be used in the formation of discrete microelectronic components, such as read/write heads, but it is more often used to interconnect components formed on a workpiece, such as a semiconductor workpiece. For example, such structures are used to interconnect the devices of an integrated circuit.
A basic understanding of certain terms used herein will assist the reader in understanding the disclosed subject matter. To this end, basic definitions of certain terms, as used in the present disclosure, are set forth below.
Single Metallization Level is defined as a composite level of a workpiece that is exterior to the substrate. The composite level comprises one or more metal structures.
Substrate is defined as a base layer of material over which one or more metallization levels are disposed. The substrate may be, for example, a semiconductor, a ceramic, etc.
Workpiece is defined as an object that at least comprises a substrate, and may include further layers of material or manufactured components, such as one or more metallization levels, disposed on the substrate. The workpiece may be, for example, a semiconductor wafer, a micromechanical device, or other device.
An integrated circuit is an interconnected ensemble of devices formed within a semiconductor material and within a dielectric material that overlies a surface of the semiconductor. Devices which may be formed within the semiconductor include MOS transistors, bipolar transistors, diodes and diffused resistors. Devices which may be formed within the dielectric include thin-film resistors and capacitors. Typically, more than 100 integrated circuit die (IC chips) are constructed on a single 8 inch diameter silicon wafer. The devices utilized in each dice are interconnected by conductor paths formed within the dielectric. Typically, two or more levels of conductor paths, with successive levels separated by a dielectric layer, are employed as interconnections. In current practice, an aluminum alloy and silicon oxide are typically used for, respectively, the conductor and dielectric.
Delays in propagation of electrical signals between devices on a single die limit the performance of integrated circuits. More particularly, these delays limit the speed at which an integrated circuit may process these electrical signals. Larger propagation delays reduce the speed at which the integrated circuit may process the electrical signals, while smaller propagation delays increase this speed. Accordingly, integrated circuit manufacturers seek ways in which to reduce the propagation delays.
For each interconnect path, signal propagation delay may be characterized by a time delay xcfx84. See E. H. Stevens, Interconnect Technology, QMC, Inc., Jul. 1993. An approximate expression for the time delay, xcfx84, as it relates to the transmission of a signal between transistors on an integrated circuit is given below.
xcfx84=RC[1+(VSAT//RISAT)]
In this equation, R and C are, respectively, an equivalent resistance and capacitance for the interconnect path and ISAT and VSAT are, respectively, the saturation (maximum) current and the drain-to-source potential at the onset of current saturation for the transistor that applies a signal to the interconnect path. The path resistance is proportional to the resistivity, xcfx81, of the conductor material. The path capacitance is proportional to the relative dielectric permittivity, Ke, of the dielectric material. A small value of xcfx84 requires that the interconnect line carry a current density sufficiently large to make the ratio VSAT//RISAT small. It follows therefore, that a low-xcfx81 conductor which can carry a high current density and a low-Ke dielectric must be utilized in the manufacture of high-performance integrated circuits.
To meet the foregoing criterion, copper interconnect lines within a low-Ke dielectric will likely replace aluminum-alloy lines within a silicon oxide dielectric as the most suitable interconnect structure. See xe2x80x9cCopper Goes Mainstream: Low-k to Followxe2x80x9d, Semiconductor International, November 1997, pp. 67-70. Resistivities of copper films are in the range of 1.7 to 2.0 xcexcxcexa9cm.; resistivities of aluminum-alloy films are in the range of 3.0 to 3.5 xcexcxcexa9cm.
Despite the advantageous properties of copper, it has not been as widely used as an interconnect material as one would expect. This is due, at least in part, to the difficulty of depositing copper metallization and, further, due to the need for the presence of barrier layer materials. The need for a barrier layer arises from the tendency of copper to diffuse into silicon junctions and alter the electrical characteristics of the semiconductor devices formed in the substrate. Barrier layers made of, for example, titanium nitride, tantalum nitride, etc., must be laid over the silicon junctions and any intervening layers prior to depositing a layer of copper to prevent such diffusion.
A number of processes for applying copper metallization to semiconductor workpieces have been developed in recent years. One such process is chemical vapor deposition (CVD), in which a thin copper film is formed on the surface of the barrier layer by thermal decomposition and/or reaction of gas phase copper compositions. A CVD process can result in conformal copper coverage over a variety of topological profiles, but such processes are expensive when used to implement an entire metallization layer.
Another known technique, physical vapor deposition (PVD), can readily deposit copper on the barrier layer with relatively good adhesion when compared to CVD processes. One disadvantage of PVD processes, however, is that they result in poor (non-conformal) step coverage when used to fill microstructures, such as vias and trenches, disposed in the surface of the semiconductor workpiece. For example, such non-conformal coverage results in less copper deposition at the bottom and especially on the sidewalls of trenches in the semiconductor devices.
Inadequate deposition of a PVD copper layer into a trench to form an interconnect line in the plane of a metallization layer is illustrated in FIG. 1. As illustrated, the upper portion of the trench is effectively xe2x80x9cpinched offxe2x80x9d before an adequate amount of copper has been deposited within the lower portions of the trench. This result in an open void region that seriously impacts the ability of the metallization line to carry the electrical signals for which it was designed.
Electrochemical deposition of copper has been found to provide the most cost-effective manner in which to deposit a copper metallization layer. In addition to being economically viable, such deposition techniques provide substantially conformal copper films that are mechanically and electrically suitable for interconnect structures. These techniques, however, are generally only suitable for applying copper to an electrically conductive layer. As such, an underlying conductive seed layer is generally applied to the workpiece before it is subject to an electrochemical deposition process. Techniques for electrodeposition of copper on a barrier layer material have not heretofore been commercially viable.
The present inventors have recognized that there exists a need to provide copper metallization processing techniques that 1) provide conformal copper coverage with adequate adhesion to the barrier layer, 2) provide adequate deposition speeds, and 3) are commercially viable. These needs are met by the apparatus and processes of the present invention as described below.
The present invention provides processes and apparatus for enhancing or repairing ultra-thin or incomplete metal seed layers that have been deposited on a workpiece, using electrolytic or electroless plating baths, in an electrodeposition reactor that is designed and adaptable for substrates having differing electrical properties.
One embodiment of the invention provides a process for applying a metallization interconnect structure to a workpiece on which an ultra-thin metal seed layer has been formed using a first deposition process. The first deposition process anchors the ultra-thin metal seed layer to an underlying layer, the ultra-thin metal seed layer having physical characteristics that render it generally unsuitable for bulk electrolytic deposition of a metal onto the metal seed layer. The process entails repairing the ultra-thin metal seed layer by electrochemically depositing additional metal on the ultra-thin metal seed layer within a principal fluid chamber of a reactor to provide an enhanced seed layer using a second deposition process. The second deposition process, which is different from the first deposition process, entails supplying electroplating power to a plurality of concentric anodes disposed at different positions within the principal fluid flow chamber relative to the workpiece. After seed layer repair, additional metal is deposited in an electrolytic bulk plating process onto the enhanced seed layer, under conditions in which the deposition rate of the electrolytic deposition process is substantially greater than the deposition rate of the process used to repair the metal seed layer.
Another embodiment of the invention provides a process for applying a metallization interconnect structure to a workpiece on which an ultra-thin metal seed layer has been formed using a first deposition process. The first deposition process anchors the ultra-thin metal seed layer to an underlying layer, the ultra-thin metal seed layer having physical characteristics that render it generally unsuitable for bulk electrolytic deposition of a metal onto the metal seed layer. The process entails repairing the ultra-thin metal seed layer by electrochemically depositing additional metal on the ultra-thin metal seed layer within a principal fluid chamber of a reactor to provide an enhanced seed layer using a second deposition process, that is different from the first deposition process. The second deposition process entails supplying electroplating power to a plurality of electrodes within the principal fluid flow chamber. At least two of the plurality of electrodes are independently connected to an electrical power supply. The supply of electrical power to the at least two electrodes is independently controlled during repair of the ultra-thin metal seed layer. After repair of the seed layer, additional metal is electrolytically deposited on the enhanced seed layer under conditions in which the deposition rate of the electrolytic deposition process is substantially greater than the deposition rate of the process used to repair the metal seed layer.
Another embodiment of the invention provides a process for applying a metallization interconnect structure to a workpiece on which an ultra-thin metal seed layer has been formed using a first deposition process. The first deposition process anchors the ultra-thin metal seed layer to an underlying layer, the ultra-thin metal seed layer having physical characteristics that render it generally unsuitable for bulk electrolytic deposition of a metal onto the metal seed layer. The process entails subjecting the workpiece to an electrochemical deposition process that is different from the first deposition process, in an alkaline electroplating bath. The alkaline electroplating bath includes metal ions complexed with a complexing agent such that additional metal is deposited on the ultra-thin copper seed layer to thereby repair the seed layer. This results in an enhanced seed layer. The second deposition process is carried out by supplying electroplating power to a plurality of concentric anodes disposed at different positions, relative to the workpiece, within a principal fluid flow chamber of a reactor. Thereafter, additional metal is deposited on the enhanced seed layer using an electrolytic bulk deposition process under conditions in which the deposition rate of the electrolytic deposition process is substantially greater than the deposition rate of the process used to repair the metal seed layer.
Another embodiment of the invention provides a process for applying a metallization interconnect structure to a workpiece on which an ultra-thin metal seed layer has been formed using a first deposition process. The first deposition process anchors the ultra-thin metal seed layer to an underlying layer, the ultra-thin metal seed layer having physical characteristics that render it generally unsuitable for bulk electrolytic deposition of a metal onto the metal seed layer. The process entails subjecting the workpiece to an electrochemical deposition process that is different from the first deposition process, in an alkaline electroplating bath. The bath includes metal ions complexed with a complexing agent such that additional metal is deposited on the ultra-thin copper seed layer to thereby repair the seed layer, resulting in an enhanced seed layer. The first deposition process entails supplying electroplating power to a plurality of electrodes within the principal fluid flow chamber, wherein at least two of the plurality of electrodes are independently connected to an electrical power supply. The supply of electrical power to the at least two electrodes is independently controlled during repair of the ultra-thin metal seed layer. Thereafter additional metal is electrolytically deposited on the enhanced seed layer under conditions in which the deposition rate of the electrolytic deposition process is substantially greater than the deposition rate of the process used to repair the metal seed layer.
Another embodiment of the invention provides a process for applying a metallization interconnect structure to a workpiece on which an ultra-thin metal seed layer has been formed using a first deposition process. The first deposition process anchors the ultra-thin metal seed layer to an underlying layer, the ultra-thin metal seed layer having physical characteristics that render it generally unsuitable for bulk electrolytic deposition of a metal onto the metal seed layer. The process entails repairing the ultra-thin metal seed layer by electrochemically depositing additional metal on the ultra-thin metal seed layer within a principal fluid chamber of a reactor to provide an enhanced seed layer using a second deposition process, that is different from the first deposition process. During repair, the workpiece is exposed to an electroplating solution within a fluid flow chamber of a reactor. The fluid flow chamber defines a sidewall and a plurality of nozzles disposed in the sidewall and arranged and directed to provide vertical and radial fluid flow components that combine to create a substantially uniform normal flow component radially across a surface of the workpiece on which the ultra-thin metal seed layer is formed. Thereafter, additional metal is electrolytically deposited on the enhanced seed layer under conditions in which the deposition rate of the deposition process is substantially greater than the deposition rate of the process used to repair the metal seed layer.
Another embodiment of the invention provides a process for applying a metallization interconnect structure to a workpiece on which an ultra-thin metal seed layer has been formed using a first deposition process. The first deposition process anchors the ultra-thin metal seed layer to an underlying layer, the ultra-thin metal seed layer having physical characteristics that render it generally unsuitable for bulk electrolytic deposition of a metal onto the metal seed layer. The process entails subjecting the workpiece to an electrochemical deposition process that is different from the first deposition process, in an alkaline electroplating bath. The bath includes metal ions complexed with a complexing agent such that additional metal is deposited on the ultra-thin copper seed layer to thereby repair the seed layer, resulting in an enhanced seed layer. During repair, the workpiece is exposed to an electroplating solution within a fluid flow chamber of a reactor, the fluid flow chamber defining a sidewall and a plurality of nozzles disposed in the sidewall and arranged and directed to provide vertical and radial fluid flow components that combine to create a substantially uniform normal flow component radially across a surface of the workpiece on which the ultra-thin metal seed layer is formed. Thereafter, additional metal is deposited on the enhanced seed layer under electrolytic plating conditions in which the deposition rate of the deposition process is substantially greater than the deposition rate of the process used to repair the metal seed layer.
Another embodiment of the invention provides a process for applying a metallization interconnect structure to a workpiece on which an ultra-thin metal seed layer has been formed using a first deposition, process. The first deposition process anchors the ultra-thin metal seed layer to an underlying layer, the ultra-thin metal seed layer having physical characteristics that render it generally unsuitable for bulk electrolytic deposition of a metal onto the metal seed layer. The process entails repairing the ultra-thin metal seed layer by electrochemically depositing additional metal on the ultra-thin metal seed layer within a principal fluid chamber of a reactor to provide an enhanced seed layer using a second electrolytic or electroless deposition process, that is different from the first deposition process. Thereafter, additional metal is electrolytically deposited in bulk on the enhanced seed layer under conditions in which the deposition rate of the electrolytic deposition process is substantially greater than the deposition rate of the process used to repair the metal seed layer. The bulk deposition process entails supplying electroplating power to a plurality of concentric anodes disposed at different positions within the principal fluid flow chamber relative to the workpiece.
Another embodiment of the invention provides a process for applying a metallization interconnect structure to a workpiece on which an ultra-thin metal seed layer has been formed using a first deposition process. The first deposition process anchors the ultra-thin metal seed layer to an underlying layer, the ultra-thin metal seed layer having physical characteristics that render it generally unsuitable for bulk electrolytic deposition of a metal onto the metal seed layer. The process entails repairing the ultra-thin metal seed layer by electrolytically or electrolessly depositing additional metal on the ultra-thin metal seed layer to provide an enhanced seed layer using a second deposition process, that is different from the first deposition process. Thereafter, additional metal is electrolytically bulk deposited on the enhanced seed layer within a principal fluid chamber of a reactor under conditions in which the deposition rate of the electrolytic deposition process is substantially greater than the deposition rate of the process used to repair the metal seed layer. The bulk deposition entails supplying electroplating power to a plurality of electrodes within the principal fluid flow chamber, wherein at least two of the plurality of electrodes are independently connected to an electrical power supply. The supply of electrical power to the at least two electrodes is independently controlled during deposition.
Another embodiment of the invention provides a process for applying a metallization interconnect structure to a workpiece on which an ultra-thin metal seed layer has been formed using a first deposition process. The first deposition process anchors the ultra-thin metal seed layer to an underlying layer, the ultra-thin metal seed layer having physical characteristics that render it generally unsuitable for bulk electrolytic deposition of a metal onto the metal seed layer. The process entails repairing the ultra-thin metal seed layer by electrochemically depositing additional metal on the ultra-thin metal seed layer to provide an enhanced seed layer using a second deposition process, that is different from the first deposition process. Thereafter, additional metal is electrochemically bulk deposited on the enhanced seed layer within a principal fluid chamber of a reactor under conditions in which the deposition rate of the deposition process is substantially greater than the deposition rate of the process used to repair the metal seed layer. The bulk deposition entails exposing the workpiece to an electroplating solution within a fluid flow chamber of a reactor, the fluid flow chamber defining a sidewall and a plurality of nozzles disposed in the sidewall and arranged and directed to provide vertical and radial fluid flow components that combine to create a substantially uniform normal flow component radially across a surface of the workpiece on which the ultra-thin metal seed layer is formed.
The present invention employs a novel approach to the metallization of a workpiece, such as a semiconductor workpiece. In accordance with the invention, an alkaline electroplating bath is suitably used to electroplate metal onto a seed layer, electroplate metal directly onto a barrier layer material, or repair (i.e., enhance) an ultra-thin copper seed layer which has been deposited on the barrier layer using a deposition process such as PVD or CVD. The metal deposition in the alkaline bath suitably takes place in a reactor including a plurality of electrodes. In a first embodiment the electrodes are concentric annular anodes arranged at differing positions relative to the workpiece. In a second embodiment, the plurality of electrodes are independently controlled for greater uniformity in metal deposition across the workpiece. In a third embodiment, the reactor is configured to induce a helical flow pattern in the plating bath solution during deposition.
The resulting metal layer provides an excellent conformal copper coating that fills trenches, vias, and other microstructures in the workpiece. When used for seed layer enhancement, the resulting metal seed layer provides an excellent conformal metal coating that allows the microstructures to be filled with a copper layer having good uniformity using electrochemical deposition techniques. Further, metal layers that are electroplated in the disclosed manner exhibit low sheet resistance and are readily annealed at low temperatures.
The disclosed process, as noted above, is applicable to a wide range of steps used in the manufacture of a metallization layer in a workpiece. The workpiece may, for example, be a semiconductor workpiece that is processed to form integrated circuits or other microelectronic components, or a micromechanical device. Without limitation as to the applicability of the disclosed invention, a process for enhancing a seed layer is described.
A process for applying a metallization interconnect structure to a workpiece having a barrier layer deposited on a surface thereof is also set forth. The process includes the forming of an ultra-thin metal seed layer on the barrier layer. The ultra-thin seed layer has a thickness of less than or equal to about 500 Angstroms and may be formed from any material that can serve as a seed layer for subsequent metal deposition. Such metals include, for example, copper, copper alloys, aluminum, aluminum alloys, nickel, nickel alloys, zinc, chromium, tin, gold, silver, lead, cadmium, platinum, palladium, iridium and ruthenium, etc. The ultra-thin seed layer is then enhanced or repaired by depositing additional metal thereon in a separate deposition step to provide an enhanced seed layer that is suitable for use in a primary metal deposition. The metal deposition in the alkaline bath suitably takes place in a reactor including a plurality of electrodes. In a first embodiment the electrodes are concentric annular anodes arranged at differing positions relative to the workpiece. In a second embodiment, the plurality of electrodes are independently controlled for greater uniformity in metal deposition across the workpiece. In a third embodiment, the reactor is configured to induce a helical flow pattern in the plating bath solution during deposition. The enhanced seed layer has a thickness at all points on sidewalls of substantially all recessed features distributed within the workpiece that is equal to or greater than about 10% of the nominal seed layer thickness over an exteriorly disposed surface of the workpiece.
In accordance with a specific embodiment of the process, a copper-containing metallization interconnect structure is formed. To this end, the ultra-thin seed layer is enhanced or repaired by subjecting the semiconductor workpiece to an electrochemical copper deposition process in which an alkaline bath having a complexing agent is employed. The copper complexing agent may be at least one complexing agent selected from a group consisting of EDTA, ED, and a polycarboxylic acid such as citric acid or salts thereof.
In an alternate embodiment, the seed layer may be enhanced by using an electroless plating bath composition, such as an electroless copper sulfuric acid bath.

Method for electrochemically depositing metal on a semiconductor workpiece


A system for determining queues and reducing queue times for a location determines the number of users that are in a queue based on sensor readings from a device of the users and interactions of the devices with a geofence. The system may determine the queue times based on the number of devices it determines are associated with users in a queue and a rate associated with the movement of the queue. The determined queue times may be displayed on one or more user devices that are inquiring about the location.

When consumers go out shopping to physical establishments, consumers do not have the ability to determine how long the queues are for those physical establishments. As a result, consumers will unknowingly go to a physical establishment when it is overcrowded and end up wasting time in long lines.
Furthermore, these physical establishments may lose business by not adequately reducing the lines. Potential customers may decide not to shop at a physical establishment that seems to have an overwhelming number of patrons.
Therefore, it would be beneficial if a system were created to provide operational intelligence with regards to queue lengths for an establishment and suggested efficiency gains. It would also be beneficial if such a system were to be judicious with device resources such that the system does not overly impact battery life of user devices.
Embodiments of the present disclosure and their advantages are best understood by referring to the detailed description that follows. It should be appreciated that like reference numerals are used to identify like elements illustrated in one or more of the figures, whereas showings therein are for purposes of illustrating embodiments of the present disclosure and not for purposes of limiting the same.


The present invention aims to obtain a tomographic image similar in image quality to a tomographic image obtained by executing a scan at X-ray tube current value set by an X-ray automatic exposure function even when the X-ray tube current value set by the X-ray automatic exposure function are not within a standard range of the X-ray tube current values settable at the X-ray tube (21). X-ray tube current value supplied to the X-ray tube (21) are set by the X-ray automatic exposure function. Thereafter, when the X-ray tube current value set by the X-ray automatic exposure function is not within in the standard range of the X-ray tube current value settable at the X-ray tube, the X-ray tube current value at a portion not within the standard range are changed so as to be within the standard range, and the set value of helical pitch is changed so as to correspond to the ratio between the pre-changed x-ray tube current value and the post-changed X-ray tube current value.

The present invention relates to a medical X-ray CT (Computed Tomography) apparatus, and to an X-ray CT apparatus which realizes a reduction in exposure and an improvement in image quality using an X-ray automatic exposure function upon a conventional scan (axial scan), a cine scan, a helical scan, a parameter-pitch helical scan or a helical shuttle scan.
An X-ray CT apparatus having a multi-row X-ray detector or a two-dimensional X-ray area detector of a matrix structure typified by a flat panel has heretofore realized a reduction in exposure and an improvement in image quality using an X-ray automatic exposure function (corresponding to a function called "auto milliampere" or the like) (refer to, for example, Japanese Unexamined Patent Publication No. 2001-178713).
Here, the term "X-ray automatic exposure function" is called as a function for automatically setting an X-ray tube current condition for the irradiation of X-rays to a subject corresponding to a irradiation position so as to uniform image quality characteristic value typified by a standard deviation of a CT value at a tomographic image continuous in a z-direction.
For example, the X-ray CT apparatus optimizes a set value of an X-ray tube current supplied to an X-ray tube while scanning so as to meet a sectional area (profile area) at each z-direction position, of the subject, and optimizes a set value of an X-ray tube current at the time that a data acquisition system is rotated once upon photography, so as to meet a flat degree or aspect ratio of the shape of the subject in an xy plane, thereby realizing a reduction in exposure and an improvement in image quality.
Described specifically, a scout scan is executed on a subject before execution of an actual scan for the subject to thereby image or photograph a scout image corresponding to a fluoroscopical image of the subject. Thereafter, a central processing unit calculates and sets respective tube current values supplied to the X-ray tube, based on the photographed scout image, at respective positions where upon execution of the actual scan, X-rays are applied in a body-axis direction of the subject and a view direction respectively and the X-rays transmitted through the subject are detected thereby to obtain X-ray projection data. Here, the central processing unit determines, based on the scout image, sectional areas of the subject and sectional shapes thereof so as to adapt to the respective positions for obtaining the X-ray projection data at the periphery of the subject upon execution of the actual scan. Thereafter, the central processing unit adjusts and sets respective set values of tube currents at the respective positions so as to adapt to the sectional areas and sectional shapes determined at the respective positions. Then, the set tube current values are supplied to the X-ray tube and the actual scan is executed on the subject to acquire X-ray projection data of the subject. Thereafter, a tomographic image of the subject is image-reconstructed based on the so-obtained projection data.
FIGS. 16(a), 16(b), 16(c) and 16(d) respectively show changes in X-ray tube current set upon execution of a helical scan. Here, the horizontal axis indicates a z-direction coordinate, and the vertical axis indicates an X-ray tube current value.
In FIG. 16(a), an X-ray tube current having a constant value is supplied to an X-ray tube to image or photograph respective portions or regions of a subject as viewed in a z-direction. In this case, there might be case in which the exposure of excessive X-rays occurs in the case of a region small in sectional area and in the case where a subject is child.
Therefore, as shown in FIG. 16(c), profile areas of the subject at respective z-direction positions are determined based on a scout image to take into consideration the sectional area of the subject in the z-direction. Thereafter, the set value of the X-ray tube current is optimized based on the determined profile areas such that image noise (standard deviation of CT value at each pixel) becomes approximately constant in the z-direction at each tomographic image.
Incidentally, in this case, the image noise of each tomographic image is set as a noise index value by inputting set values onto an input screen as shown in FIG. 14, for example.
The section of the subject is flat whose vertical and horizontal directions are not identical in length as in a round shape and whose aspect ratio differs. Therefore, when the center lines of the X-ray tube and multi-row X-ray detector are placed in the vicinity of the x-axis direction where a subject having a section of an elliptical shape long in an x-axis direction is photographed as shown in FIG. 16(b), X-ray tube current values are set larger than X-ray tube current values necessary in the case of a circular shape having the same area as the elliptical shape. On the other hand, when the center lines of the X-ray tube and multi-row X-ray detector are placed in the vicinity of the y-axis direction, X-ray tube current values are set smaller than X-ray tube current values necessary in the case of a circular shape having the same area as the elliptical shape. Thus, the X-ray tube current is changed continuously within view angles corresponding to 360°, whereby image noise contained in X-ray projection data in each view direction becomes approximately constant in each view direction of the subject.
That is, the X-ray tube current values are optimized in the z-direction as shown in FIG. 16(c), and the X-ray tube current values are optimized even within the xy plane as shown in FIG. 16(b), whereby the X-ray tube current values optimized based on three-dimensional information in the x, y and z-directions of the subject are set as shown in FIG. 16(d), thereby realizing an improvement in image quality.
However, for example, in the case when the subject is large, each tomographic image is thin in slice thickness, a scan speed is fast or a noise index value is small and good image quality is required, and so on, each X-ray tube current value set in the above-described manner becomes larger. Therefore, when an X-ray tube which is small in thermal capacity and needs to be cooled when a large X-ray tube current is outputted for long hours, or an X-ray tube which cannot output a large X-ray tube current, are mounted in the X-ray CT apparatus, there might be a case in which it is not possible to adapt to the set X-ray tube current values.
Thus, in such a case, there might be a case in which the above X-ray automatic exposure function cannot fulfill its full function.
In the X-ray CT apparatus including the multi-row X-ray detector or the two-dimensional X-ray area detector typified by the flat panel, the problem of X-ray needless exposure shows more increasing tendency. There has been a further demand for optimization of the image quality of each tomographic image due to the X-ray automatic exposure function.
Therefore, an object of the present invention is to provide an X-ray CT apparatus which adjusts other imaging or scanning condition parameters without depending on a restriction on a tube current value of an X-ray tube even though the tube current value is limited, thereby realizing image quality of a tomographic image corresponding to the optimum noise standard value at an X-ray automatic exposure function.
Another object of the present invention is to provide an X-ray CT apparatus which assigns priorities to plural parameters for imaging or scanning conditions influencing each photographed tomographic image and adjusts the plural parameters influencing the photographed tomographic image in order based on the priorities, thereby making it possible to realize the optimum image quality at an X-ray automatic exposure function.

GE Medical Systems Global Technology Company, LLC


A memory device having a fast access, or cache, mode is disclosed. The memory has an address transition detection circuit for detecting a transition in a portion of the memory address presented to the memory, for example the row address. The memory is operable to select a previously sensed memory cell responsive to the remainder of the address without requiring a transition in the first portion of the address, and without requiring the precharge portion of the memory cycle. For example, the column address selects a bit to be communicated from the sense amplifiers, which are retaining the previously sensed data. The sense amplifiers retain the previously sensed data for so long as no transition in the row address occurs; the memory may include a terminal for receiving a signal which disables the effect of an address transition, so that the fast access mode is retained without regard to transitions in the row address portion of the memory address. A second embodiment having the fast access mode also has its array organized into blocks, so that the sense amplifiers for each array block can store data from a memory row different from those stored in the sense amplifiers for other blocks, allowing for an improved cache hit rate.

A continuing trend in the semiconductor field is the increase in the density of storage bits per chip in semiconductor memory devices. This trend has continued for high density, medium performance, memories such as dynamic random access memories (dRAMs). In the past decade, each new generation of dRAM has provided an increase in storage capacity of a factor of four over the prior generation, with the newest generation of chips containing 4 Mbits each. The rapid increase of the density of such memories has created increased pressure to increase memory bandwidth, i.e., the speed at which the user can access the bits in the memory. Without improvement of memory bandwidth along with the increase in the density of the memory, the additional bits provided by a new memory generation have decreasing utility to the user.
This bandwidth pressure has also led to increased emphasis on increasing the density and also the performance of static random access memories (sRAMs) which can be used not only for main memory in a system, but also as large high speed caches in a memory system. With the advent of high performance CMOS and BiCMOS process technologies, high density sRAMs with access times less than 10 nsec have been fabricated, as described in Tran et al., "An 8ns BiCMOS 1Mb ECL SRAM with a Configurable Memory Array Size," 1989 IEEE ISSCC Digest of Technical Papers (IEEE, 1989), pp. 36-37. sRAM devices such as these can be used not only for main memory in a system, but also as large high speed caches in a memory system.
As is well known, a cache memory is a common technique used in data processing systems for improvement of system memory performance. A cache memory is a relatively small and high-speed memory which stores data from a number of main memory locations surrounding a memory location which has been addressed. The theory of cache operation is that the system central processing unit (CPU) will frequently address a memory location which is adjacent, or near (in terms of address value), a memory location that it has recently addressed. Each group of data stored in the cache is associated with a "tag", or a portion of the memory address which is common to the data stored in the cache, and a comparator compares a portion of the memory address presented by the CPU with the tag or tags associated with the data stored in the cache. If the desired memory address matches a tag value (i.e., a cache "hit" occurs), the cache can be accessed to more quickly provide the desired data than if the main memory were addressed, thereby improving the effective memory bandwidth of the system.
In the event that the appropriate portion of the desired memory address does not match the tags associated with the data stored in the cache (i.e., a cache "miss" occurs), the main memory must be accessed, resulting in a delay relative to a cache access. Generally a portion of the cache is then refilled with data from main memory in the locations proximate to the newly addressed main memory location. The additional time required to access main memory instead of the cache, plus the additional time required to fill the cache with the new data from the proximate addresses to the new memory address (if done for each miss), is commonly referred to as the "miss penalty". It should be noted that the time required to refill the cache, as well as the initial access to main memory for the desired memory address, depends upon the main memory cycle time, and is directly proportional to the number of bits in the cache (or portion of the cache associated with a given tag, such portion commonly referred to as a "line" of the cache). As a result, if the miss penalty becomes large, the effective memory bandwidth of the system will decrease, even with relatively low miss rates. In improving the system performance by improving the cache bandwidth, it is therefore important not only to reduce the rate of cache misses, but also to reduce the miss penalty associated with each cache miss.
It is desired, for purposes of reducing system cost, as well as system complexity, to incorporate cache accesability within the main memory device itself in order to reduce the miss penalty. It has been proposed that dRAMs having the static column decode feature be used in a cache organization. See J. Goodman and M-C Chiang, "The use of Static Column RAM as a Memory Hierarchy," The 11th Annual Symposium on Computer Architecture (IEEE Computer Society Press, 1984), pp. 167-74. However, a cache miss in such a memory will require that the dRAM operation of precharging the dynamic row decoding and sense circuitry, followed by presentation of a row address together with a row address strobe be performed prior to the access of a bit associated with the new row address. It should be noted that dRAMs such as this have multiplexed address pins, so that the presentation of the column address must wait until after the presentation of the row address. Accordingly, the time penalty for such an operation in the event of a cache miss reduces the benefits of using such a memory in a "cache" mode.
Due to the non-multiplexed and static (i.e., non-clocked) operation of conventional sRAMs, the disadvantages of using static column decode dRAMs as an integrated memory with on-chip cache can be somewhat reduced. This is especially the case for some conventional sRAM devices which utilize address transition detectors for detecting a change in the address presented thereto, so that decoding of the address need only occur when a new address is received. In addition, for those static memories which utilize some dynamic features, such as bit line precharge and dynamic address decoding, these dynamic operations will be initiated by the address transition detection circuitry so that they are done only in the event of a memory address transition.
In conventional memories which utilize address transition detection, however, a change of address will cause the memory to precharge and to decode the address even for those cycles for which the row address does not change. For the example of a 64kbit sRAM having 256 rows and 256 columns, where a single column is associated with a single sense amplifier, a large number of bits (e.g., 256 bits in a 64 kbit memory) are potentially accessible from a single row. However, if address transition detection is performed on the entire address, as is conventionally done, a full memory cycle will be performed in such conventional memories even when the desired data is already present in the sense amplifiers, and when precharge and row address decoding is unnecessary.
The performance of a full memory cycle will dissipate more power than will a cycle consisting of column decode and output of the state of the selected sense amplifier, since the full memory cycle includes additional operations such as precharge, energizing of the selected row, and sensing. Accordingly, if a full memory cycle is not performed in those instances when only an access of previously sensed data from a previously selected row is desired, the power dissipation of the memory, measured over normal system operation, can be reduced.
It is therefore an object of this invention to provide a memory which allows for faster bit access from a previously sensed row, without requiring a new row to be selected and sensed.
It is a further object of this invention to provide such a memory using address transition detection on only a portion of the memory address for initiating a precharge portion of the cycle, so that a faster access mode is available for the data bits accessible by transitions of the remainder of the memory address.
It is a further object of this invention to provide such a memory wherein the address transition detection can be disabled, ensuring that the memory remains in the fast access, or cache, mode.
It is a further object of the invention to provide such a memory which is organized into blocks, each having cache operation therefrom, to improve the cache hit performance of the memory.
Other objects and advantages of the invention will be apparent to those of ordinary skill in the art having reference to the instant specification together with the drawings.

Memory with selective address transition detection for cache operation


A method of processing a caption for a digital video disk (DVD) includes loading a prepared caption script of a predetermined language in a caption indicator, showing a moving picture corresponding to the caption script and ascertaining the caption generation point and caption annihilation point of the shown moving picture, writing time codes corresponding to the caption generation point and the caption annihilation point and displaying a list of caption scripts and a list of time codes on the caption indicator, checking the state of the time codes and the state of a corresponding caption displayed, and correcting the state of the time codes and the state of the corresponding caption displayed, and correcting the state of the time codes and the state of the corresponding caption displayed if an error is detected, and producing the caption scripts and the time codes in a scrip file.

General digital video disks (DVDs) are storage media which can store a variety of digital information such as video information and audio information. In particular, DVD movies have the convenience and various functions that cannot be found in existing storage media. Among captions used in DVDs, captions that are used for people who have difficulty in hearing or for the purpose of learning can be produced in a maximum of 32 different languages and inserted, so that a user can easily select and watch a desired language in a movie.
FIG. 1 illustrates the entire process for producing a DVD film. Referring to FIG. 1, in the first stage, there is a film selection step 1 in which a film to be produced as a DVD title is selected among released films or to-be-released films. The second stage includes a video data encoding step 2, an acoustic data encoding step 3 and a sub-picture producing step 4. In the video data encoding step 2, the master of the selected film is encoded in an MPEG-2 file format suitable for a DVD manufacturing through a telecine operation. In the acoustic data encoding step 3, the format of a multi-channel sound in the selected film is converted into a format suitable for a DVD acoustic format, for example, AC-3. Multilingual audio support which covers a maximum of 8 languages is carried out in the step 3. The sub-picture producing step 4 is for performing a menu function and processing a caption on a DVD. Moving pictures and still pictures can be used on a menu, and multilingual captioning can cover a maximum of 32 languages. The third stage includes a DVD authoring step 5 in which a picture, a sound, a menu and a caption are united and an area code, a copying prevention code and the like are added to the united result to thereby form a stream. The fourth stage includes a step 6 in which the thus-formed stream is stored in a large-capacity storage medium such as a digital layer tape (DLT) or a DVD-ROM.
FIG. 2 is a flowchart for illustrating a conventional DVD caption producing process. Referring to FIG. 2, a time code is extracted from a moving picture 11 to be produced for DVDs, using a text file 10 of a primitive multilingual caption, in step 12. A caption corresponding to each language is inserted according to an extracted time code, in step 13, while the caption is produced in the format of a graphic file BMP or a text file, so that the graphic file BMP or the text file is adjusted corresponding to the time code. Then, the caption corresponding to each language undergoes a timing inspection for determining whether a caption generation point and a caption concluding point are proper and undergoes correction, in step 14. A primitive file into which a time code has been completely inserted is converted into a script dedicated file, in step 15. Thereafter, the script file is finally input to a DVD authoring program 16.
In a conventional DVD caption producing process as described with reference to FIG. 2, a caption for DVD films is produced and inserted in the format of a graphic file or test file in an authoring process. Also, generation of a time code for designating a caption generation point and a caption ending point is complicated and time-consuming in the case of moving pictures which require a two-hour running time on the average and no less than 1500 times of captions for movie speech. Therefore, in case that a caption is inserted in a plurality of languages, a caption corresponding to each of the languages must be inserted, so that additional working time and costs depending on the number of languages added are required.

Subtitle management method for digital video disk


An apparatus is disclosed for holding the shaft of an object, wherein the shaft rotates in a first working direction. The apparatus includes a bore, a first ball slot in communication with the bore, a first ball disposed within the first ball slot, and a spring. The bore has a longitudinal axis, and the shaft is inserted into the bore in an insertion direction. The first ball slot is in communication with the bore and includes a ramp. The first ball slot has a first axis that is angularly offset from the longitudinal axis at an acute angle between the insertion direction and the first working direction. Upon insertion of the shaft into the bore, the shaft contacts the ball and causes it to move along the ramp within the ball slot, thereby compressing the spring by a first amount.

The marketplace currently offers two primary types of drill chuck mechanisms for retaining drilling and driving tool bits. The traditional or "incremental" design typically consists of a mechanism that houses three adjustable jaws that protrude at an angle into a bore. An external sleeve is coupled to the jaws via internal gear teeth. When a tool is inserted into the bore, the sleeve is rotated by a user. As the sleeve is rotated in one direction, the jaws are forced towards the center of the bore to clamp a tool bit. When the sleeve is rotated in the opposite direction, the jaws are opened. This chuck style is able to accommodate a variety of tool sizes and shapes; however, changing a tool bit takes time.
It has long been recognized that the ability to quickly change tool bits in the spindle of a power tool is an advantageous feature. Construction workers and carpenters regularly change drill bits in numerous types of construction projects, often when the worker is in a position where it is difficult to change the bit, such as on a ladder. To change a drill bit, the carpenter must loosen the chuck, remove the old bit from the chuck, insert the new bit and tighten the chuck.
A second, more recent approach to chuck design allows for tools to be exchanged in a "quick-change" manner. Examples of quick-change mechanisms such as this are explained in U.S. Pat. Nos. 4,900,202 and 5,013,194, both of which are incorporated by reference herein. Quick-change chucks typically require the use of tools that have shafts or shanks that are of a consistent size (typically, a ¼″ hex shank), and usually have hexagonal cross sections. This style of chuck does not allow for accommodating a variety of tool shaft sizes.
The traditional three-jaw approach accommodates tools with round shafts and a range of different diameters and the more recent "quick-change" chucks allow for switching certain uniformly shaped and sized bits in a timely manner. However, there is still a need for a quickly and easily changeable tool holder to accommodate round shafts and shafts of various sizes.

Quick change tool bit holder for round shafts


A water-soluble yeast protein of about molecular weight 4770 daltons is isolated having murine Epidermal Growth Factor (mEFG) activity per milligram at least equivalent to 1000 nanograms of mEGF by Elisa Assay Titration. The protein is naturally present in yeast and is free of water-insoluble yeast components. The proten is insoluble in trichloroacetic acid, chloroform, absolute methanol, 95% ethanol, acetone, hexanes, petroleum ether, and 50% methanol--25% ether. The protein is soluble in acidic solutions containing 50% methanol, ethanol or acetone. The protein stimulates the growth and respiration of A431 cells in a culture without serum supplements.

1. Field of the Invention
The present invention relates to medicinal compositions commonly known as Epidermal Growth Factor (EGF)/Urogastrone, and more particularly refers to related forms of these compositions derived from yeasts and yeast extracts.
2. Description of the Prior Art
Naturally produced Epidermal Growth Factor was discovered a number of years ago. Relatively large amounts were found stored in mouse salivary glands. The material was given the name murine Epidermal Growth Factor(m-EGF) when it was discovered that newborn mice treated with the material opened their eyes earlier than did control mice. It was subsequently discovered that Epidermal Growth Factor was also involved in the control of gastric acid, which finding resulted from the discovery that Urogastrone was purified from the urine of pregnant women, and it was shown that this material was identical to human Epidermal Growth Factor. Epidermal Growth Factor has been found to be very effective in the healing of wounds, and particularly wounds resulting from corneal transplants and cataract surgery. The same material, also designated as Urogastrone has been found useful in the treatment of gastric ulcers.
Because naturally occurring Epidermal Growth Factor and Urogastrone are available in only minute quantities naturally, synthetic methods, including genetic engineering methods are now utilized to produce these materials. Such methods are disclosed in many patents, including the following: U.S. Pat. Nos. 3,883,497, 3,948,875, 4,032,633, 4,035,485, 4,731,357, 4,743,679, 4,760,023, 4,764,593, and 4,820,690. However, these methods of producing the materials are not entirely satisfactory, as they are quite time-consuming and expensive.


Methods and apparatus to publish internal commands as a programming interface in a cloud infrastructure are provided. An example apparatus includes a first virtual appliance including a management endpoint to coordinate task execution in a computing platform. The example apparatus includes a computing infrastructure interface including a programming interface, the programming interface to expose a subset of commands for the computing platform and to hide a remainder of the commands of the computing platform from a requester, the requester to execute a first command from the subset of commands via the programming interface. The management endpoint is to parse a first execution task generated from selection of the first command via the programming interface to determine a component of the computing platform to execute the first command associated with the first execution task and to route the first command from the first execution task to the component for execution.

Virtualizing computer systems provides benefits such as an ability to execute multiple computer systems on a single hardware computer, replicating computer systems, moving computer systems among multiple hardware computers, and so forth.
"Infrastructure-as-a-Service" (also commonly referred to as "IaaS") generally describes a suite of technologies provided as an integrated solution to allow for elastic creation of a virtualized, networked, and pooled computing platform (sometimes referred to as a "cloud computing platform"). Enterprises may use IaaS as a business-internal organizational cloud computing platform (sometimes referred to as a "private cloud") that gives an application developer access to infrastructure resources, such as virtualized servers, storage, and networking resources. By providing ready access to the hardware resources required to run an application, the cloud computing platform enables developers to build, deploy, and manage the lifecycle of a web application (or any other type of networked application) at a greater scale and at a faster pace than ever before.
Cloud computing environments may include many processing units (e.g., servers). Other components of a cloud computing environment include storage devices, networking devices (e.g., switches), etc. Current cloud computing environment configuration relies on much manual user input and configuration to install, configure, and deploy the components of the cloud computing environment.
The figures are not to scale. Instead, to clarify multiple layers and regions, the thickness of the layers may be enlarged in the drawings. Wherever possible, the same reference numbers will be used throughout the drawing(s) and accompanying written description to refer to the same or like parts. As used in this patent, stating that any part (e.g., a layer, film, area, or plate) is in any way positioned on (e.g., positioned on, located on, disposed on, or formed on, etc.) another part, indicates that the referenced part is either in contact with the other part, or that the referenced part is above the other part with one or more intermediate part(s) located therebetween. Stating that any part is in contact with another part means that there is no intermediate part between the two parts.

Methods and apparatus to publish internal commands as an application programming interface in a cloud infrastructure


A compound of formula (I), wherein R1 is hydrogen or a hydroxyl protecting group; and R2 and R3 are same or different and are independently selected from halogen or —O—SO2—X; wherein X is —C1-C4 alkyl; C1-C4 alkyl substituted with one or more halogen; or substituted or unsubstituted phenyl wherein said phenyl substituent is selected from halogen, nitro and C1-C4 alkyl; provided that when R3 is bromine, X is not p-toluoyl; and a process for the preparation thereof.

There is a growing need for the synthesis of chiral compounds which are used as pharmaceuticals and agrochemicals. Classical methods of separation of the optical isomers are one aspect of the synthesis, which result in the cumbersome process of resolution and racemization, often making the process uneconomical. Another way of preparing the chiral compound is to use chiral synthesis approach which is being increasingly used as preferred industrial method. This synthesis involves the use of chiral reagents, and especially use of chiral catalysts to bring about the desired transformation.
Various catalytic systems have been used for different types of chiral transformations. Some of these systems use bidentate organophosphorous compounds which have attained great importance as ligands in homogeneous catalysis. Hydroxyphosphine compounds of Formula IA are useful as ligands on transition metals in metal catalyzed asymmetric reactions such as hydrogenation, hydroformylation, rearrangement, allylic alkylation, cyclopropanation, hydrosilylation, hydride transfers, hydroborations, hydrocyanations, hydroxycarboxylations, and so on (ref. US 2006/0089469 A1).

US 2006/0089469 discloses compound of Formula IA and the process of making the same.
WO 2009136409 discloses a process for the asymmetric hydrogenation of a prochiral ketimine to get a chiral amine wherein the said transformation is effectively carried out in the presence of iridium and rhodium complexes containing the ligand of Formula IA, which upon reaction with haloacetyl chloride affords various haloacetanilide herbicides. In particular, the preferred ligand is [(1R,2R,3S)-1,2-dimethyl-2,3-bis(diphenyl phosphine methyl) cyclopentyl]methanol (herein after referred to as compound of Formula A). However, this publication does not teach an industrially feasible route for the synthesis of said compound of formula A.

WO 2008092924 discloses a process for selectively synthesizing a stereoisomer of zilpaterol by reacting 4,5-dihydro-imidazo[4,5,1-jk][1]benazepine-2,6,7[1H]-trion-6-oxime with H2 in the presence of a catalyst to selectively form a stereoisomer of 6-amino-7-hydroxy-4,5,6,7-tetrahydroimidazo[4,5,1-kj][1]-bencazepin-2[1H]-one, which, in turn is converted to zilpaterol or a salt thereof. The catalyst used in the reaction comprises metal complex of a ligand with a metal from transition group VIII. One such ligand used is ligand of Formula A.
These highly useful bidentate ligands of Formula A can be prepared by the process disclosed in US 2006/0089469. Schematic diagram of the process is shown below in Scheme I.

In the above reaction scheme, the group OPG- represents a hydroxyl protecting group. Komarov et al. in Tetrahedron Asymmetry, 13 (2002), 1615-1620 have disclosed a scheme to prepare the said ligand. Scheme II represents the scheme to prepare the said hydroxyphosphine ligand.

Inventors of the present invention, in an effort to prepare the hydroxyphosphine ligand of Formula A, tried to follow the process mentioned above. However, even after a series of experiments, the desired ligand could not be prepared in desired and reported yield. In fact, the yield was always negligible and the results were not reproducible. Working in a persuasive manner, the inventors of the present invention prepared novel intermediates which can be easily and conveniently converted into hydroxyphosphine ligands having application as mentioned above.
Accordingly, the present invention provides novel intermediates of Formula I useful in the preparation of hydroxyphosphine ligands useful in metal catalyzed asymmetric synthesis.
Further, according to the authors of Komarov et al. and US'469, the diol intermediate is selectively protected by converting it into tosylate (i). The publication also mentions that the more hindered hydroxyl group had to be protected before it could be reacted with lithium diphenylphosphine to avoid undesired cyclization.
Both the prior art references mentioned above use the route which involves selective protection of the less hindered alcohol group to get intermediate (i) which is difficult to handle as it has a tendency to undergo cyclization to form the compound (ii). Formation of compound (i) is very tricky as it is already known that while trying to form monotosylate (i) from the diol (x), the ditosylate (iii) also forms (Advances in catalysis, vol. 25, p 81-124, 1976). The monotosylate (i) and the ditosylate (ii) have to be separated by column chromatography. According to the reference, the monotosylate is used immediately after separation.

Formation of compound (i) is carried out under dry conditions, and uses large volume of pyridine as a solvent, which is carcinogenic, and is not an environmentally friendly solvent. Pyridine also makes the process less cost effective. Since it is soluble in water, its recovery is very difficult and need extra efforts. The reference does not mention any usefulness of the compound (ii), and is an unwanted product for the process.
Asymmetric homogenous hydrogenation, J D Morrison, W F Masler, M K Neuberg, Advances in Catalysis, Vol 25, pp. 81-124, [1976], also discloses a survey of asymmetric homogenous hydrogenation reactions, that is reactions that create asymmetric carbon atoms by the addition of hydrogen across multiple bonds under the influence of soluble chiral catalysts. This publication teaches a process for the preparation of Camphos from commercially available (+)-camphoric acid.

In the paragraph bridging pages 98-99, this publication teaches that in the initial trials to synthesize camphos, many procedures were used in an attempt to prepare dihalide from the diol. However, none of a great many standard methods met with any success. The procedures tried involved thionyl chloride, pyridine, phosphorus pentachloride and triphenylphosphine dibromide in N,N-dimethylformamide, triphenylphosphine and carbon tetrachloride, tris(dimethylamino)phosphine and bromine, o-phenylenephosphorochloridite and bromine, tris(dimethylamino)phosphine and carbon tetrachloride and tri-n-octylphosphine and carbon tetrachloride. This publication further states in the last paragraph on page 99 that the synthesis of camphos by displacement on its ditosylate precursor with the diphenylphosphide anion appeared promising on paper, but initially was a dismal failure in practice. It was considered likely that the less hindered α-tosylate group was displaced or eliminated rather readily at room temperature but the neopentyl-like-β-tosylate group required more strenuous conditions to effect its displacement. This was also found to reduce the yield of the target hydroxydiphosphine ligand, which is clearly undesirable.
Accordingly, there is a need in the art for a process for the preparation of a compound of formula A conveniently, in high yield and preferably, without utilizing an intermediate compound having a tosylate leaving group.
In fact, attempts to prepare the desired compound of formula A using the conventionally known process led to the undesired yield of an oxidized product only instead of the desired compound of formula A, having the formula set out below:

Inventors of the present invention, in an effort to prepare the hydroxyphosphine ligand of Formula A, tried to follow the process mentioned above. However, even after a series of experiments, they could not form (i) in desired and reported yield. In fact, the yield was always negligible and the results were not reproducible. Working in a persuasive manner, the inventors accidently found that the compound (ii) which was considered to be unwanted product by the prior art reference, can be conveniently and effectively converted into the desired hydroxydiphosphine ligand of Formula A.
Thus, there is a need in the art for a process for preparing hydroxydiphosphine ligands in high yield. These hydroxydiphosphine ligands are suitable precatalysts for the enantioselective manufacture of optically active agrochemicals, particularly chloroacetanilide herbicides. The process of the present invention is cost effective, environmentally friendly, simple, and reproducible.

Chiral intermediates useful for the preparation of hydroxyphosphine ligands


Oilseed plants which have been transformed to produce at least 8.0% arachidonic acid (ARA) as well as uses of oils and seeds obtained from such transformed plants in a variety of food and feed applications are described.

Lipids/fatty acids are water-insoluble organic biomolecules that can be extracted from cells and tissues by nonpolar solvents such as chloroform, ether or benzene. Lipids have several important biological functions, serving (1) as structural components of membranes, (2) as storage and transport forms of metabolic fuel, (3) as a protective coating on the surface of many organisms, and (4) as cell-surface components concerned in cell recognition, species specificity and tissue immunity.
The human body is capable of producing most of the fatty acids which it requires to function. Two long chain polyunsaturated fatty acids, eicosapentaenoic acid (EPA) and docosahexaenoic acid (DHA), however, cannot be synthesized efficiently by the human body and, thus, have to be supplied through the diet. Since the human body cannot produce adequate quantities of these polyunsaturated fatty acids, they are called essential fatty acids.
PUFAs are important components of the plasma membrane of the cell, where they may be found in such forms as phospholipids and also can be found in triglycerides. PUFAs also serve as precursors to other molecules of importance in human beings and animals, including the prostacyclins, leukotrienes and prostaglandins. There are two main families of polyunsaturated fatty acids (PUFAs), specifically, the omega-3 fatty acids and the omega-6 fatty acids.
DHA is a fatty acid of the omega-3 series according to the location of the last double bond in the methyl end. It is synthesized via alternating steps of desaturation and elongation. Production of DHA is important because of its beneficial effect on human health. Currently the major sources of DHA are oils from fish and algae.
EPA and arachidonic acid (AA) are both delta-5 essential fatty acids. EPA belongs to the omega-3 series with five double bonds in the acyl chain, is found in marine food, and is abundant in oily fish from the North Atlantic. AA belongs to the omega-6 series with four double bonds. The lack of a double bond in the omega-3 position confers on AA different properties than those found in EPA. The eicosanoids produced from AA have strong inflammatory and platelet aggregating properties, whereas those derived from EPA have anti-inflammatory and anti-platelet aggregating properties. AA can be obtained from some foods such as meat, fish, and eggs, but the concentration is low.
Gamma-linolenic acid (GLA) is another essential fatty acid found in mammals. GLA is the metabolic intermediate for very long chain omega-6 fatty acids and for various active molecules. In mammals, formation of long chain PUFAs is rate-limited by delta-6 desaturation. Many physiological and pathological conditions such as aging, stress, diabetes, eczema, and some infections have been shown to depress the delta-6 desaturation step. In addition, GLA is readily catabolized from the oxidation and rapid cell division associated with certain disorders, e.g., cancer or inflammation.
Arachidonic acid (ARA; cis-5,8,11,14-eicosatetraenoic; an omega-6 fatty acid) is an important precursor in the production of eicosanoids (e.g., prostaglandins, thromboxanes, prostacyclin and leukotrienes). Additionally, ARA is recognized as: (1) an essential long-chain polyunsaturated fatty acid (PUFA); (2) the principal omega-6 fatty acid found in the human brain; and, (3) an important component of breast milk and many infant formulas, based on its role in early neurological and visual development. Adults obtain ARA readily from the diet in foods such as meat, eggs and milk and can also inefficiently synthesize ARA from dietary gamma-linolenic acid. Commercial sources of ARA oil are typically produced from highly refined and purified fish oil or fermentation (e.g., using microorganisms in the genera Mortierella (filamentous fungus), Entomophthora, Pythium and Porphyridium (red alga)). Most notably, Martek Biosciences Corporation (Columbia, Md.) produces an ARA-containing fungal oil (ARASCO®; see U.S. Pat. No. 5,658,767) which is substantially free of EPA and which is derived from either Mortierella alpina or Pythium insidiuosum. One of the primary markets for this oil is infant formula.
Research has shown that omega-3 fatty acids reduce the risk of heart disease as well as having a positive effect on children's development. Results have been disclosed indicating the positive effect of these fatty acids on certain mental illnesses, autoimmune diseases and joint complaints. Thus, there are many health benefits associated with a diet supplemented with these fatty acids.
Unfortunately, there are several disadvantages associated with commercial production of PUFAs from natural sources. Natural sources of PUFAs, such as animals and plants, tend to have highly heterogeneous oil compositions. The oils obtained from these sources can require extensive purification to separate out one or more desired PUFAs or to produce an oil which is enriched in one or more PUFAs. Natural sources also are subject to uncontrollable fluctuations in availability. Fish stocks may undergo natural variation or may be depleted by overfishing. Fish oils have unpleasant tastes and odors which may be difficult, if not impossible, to economically separate from the desired product, and can render such products unacceptable as food supplements. Animal oils and, in particular, fish oils, can accumulate environmental pollutants. Weather and disease can cause fluctuation in yields from both fish and plant sources.
An expansive supply of polyunsaturated fatty acids from natural sources and from chemical synthesis are not sufficient for commercial needs. Therefore, it is of interest to find alternative means to allow production of commercial quantities of PUFAs. Biotechnology offers an attractive route for producing LCPUFAs in a safe, cost efficient manner.
WO 02/26946, published Apr. 4, 2002, describes isolated nucleic acid molecules encoding FAD4, FAD5, FAD5-2 and FAD6 fatty acid desaturase family members which are expressed in LCPUFA-producing organisms, e.g., Thraustochytrium, Pythium irregulare, Schizichytrium and Crypthecodinium. It is indicated that constructs containing the desaturase genes can be used in any expression system including plants, animals, and microorganisms for the production of cells capable of producing LCPUFAs.
WO 02/26946, published Apr. 4, 2002, describes FAD4, FAD5, FAD5-2, and FAD6 fatty acid desaturase members and uses thereof to produce long chain polyunsaturated fatty acids.
WO 98/55625, published Dec. 19, 1998, describes the production of polyunsaturated fatty acids by expression of polyketide-like synthesis genes in plants.
WO 98/46764, published Oct. 22, 1998, describes compositions and methods for preparing long chain fatty acids in plants, plant parts and plant cells which utilize nucleic acid sequences and constructs encoding fatty acid desaturases, including delta-5 desaturases, delta-6 desaturases and delta-12 desaturases.
U.S. Pat. No. 6,075,183, issued to Knutzon et al. on Jun. 13, 2000, describes methods and compositions for synthesis of long chain polyunsaturated fatty acids in plants.
U.S. Pat. No. 6,459,018, issued to Knutzon on Oct. 1, 2002, describes a method for producing stearidonic acid in plant seed utilizing a construct comprising a DNA sequence encoding a delta-six desaturase.
Spychalla et al., Proc. Natl. Acad. Sci. USA, Vol. 94, 1142-1147 (Feb. 1997), describes the isolation and characterization of a cDNA from C. elegans that, when expressed in Arabidopsis, encodes a fatty acid desaturase which can catalyze the introduction of an omega-3 double bond into a range of 18- and 20-carbon fatty acids.

Production of very long chain polyunsaturated fatty acids in oil seed plants