The present disclosure discloses a circuit and a method for controlling gate current of a semiconductor switching device. The circuit comprises a current controlled variable inductor connected to a gate terminal of the semiconductor switching device and a feedback control circuit. The feedback control circuit comprises a differential module to compute an instantaneous rate of change of gate current with respect to time, a reference generator to generate a reference voltage and a control unit to regulate value of inductance of the variable inductor for controlling the gate current of the semiconductor switching device.

In a semiconductor switching device like a Field Effect Transistor (FET) or a Metal Oxide Semiconductor Field Effect Transistor (MOSFET), Insulated gate bipolar transistor (IGBT), Bipolar junction transistor (BJT) commonly used to get a chopped wave from constant DC source. In the process of chopping, the switching devices are vulnerable to both electromagnetic (EM) noise and thermal run away problems depending upon the method of switching. The gate terminal voltage and current control is common method of switching any semiconductor devices. In general, high rate of change of gate triggering currents are recommended for fast turning ON and turning OFF the switching devices. The high rate of change of currents (both gating and main circuit) interact with inductive and capacitive circuits associated with the semiconductor switching device and cause electromagnetic noise in the circuit. As per the international standards, the EM noise (conductive and radiated) should be within a predefined limit. In order to bring noise levels down, the switching devices must operate with high turn ON and Turn OFF times.
However, operating the semiconductor-switching device at high turn ON and turn OFF times leads to more switching loss. thermal behaviour. The more switching losses intern led to switch thermal runaway issues.
Hence it is evident that there is a trade-off between the EM noise and thermal run away issues. Conventional systems address either of regulation of EM noise or reducing thermal problems in the semiconductor switching device.
FIG. 1A shows a conventional circuit for controlling amplitude of gate current of a semiconductor switching device. Here, CGS refers to capacitance of gate terminal and source terminal of the semiconductor switching device. A voltage across the capacitor CGS decides ON time and OFF time of the semiconductor switching device. Very fast charging of Cgs causes EM noise issues thermal behaviour slow switching leads to long interval of ON time and OFF time leading to switch thermal run away problems.
FIG. 1B shows a conventional circuit for contrsolling gate current of a semiconductor switching device. Here, an inductor is placed at input gate terminal of the semiconductor switching device. The inductor can be used to regulate gate current, thereby try to operate the semiconductor switching device high turn ON and turn OFF intervals thereby reduce the electromagnetic noise problems but provoke thermal issues. However, value of inductance varies with different circuits. The value of inductance has to be calculated for individual circuit. Therefore, the circuit of FIG. 1B does not provide a common solution that can be utilized for different circuits associated with the semiconductor switching device.
The information disclosed in this background of the disclosure section is only for enhancement of understanding of the general background of the invention and should not be taken as an acknowledgement or any form of suggestion that this information forms the prior art already known to a person skilled in the art.

Circuit for controlling gate current of a semiconductor switching device


A light quantity control unit includes a base plate having an aperture forming an optical axis; a blade member for regulating a condition of the aperture; a coil and a magnet rotor polarized with two magnetic poles, formed on the base plate; and a pair of magnetic force inducing members. Each member has a base end part, and a leading end part extending from the base end part perpendicular to the optical axis and having an equal thickness throughout an entire length thereof. The leading end parts surround the magnet rotor at a middle area thereof and have magnetic poles for rotating the magnet rotor. A regulating device is formed at the base plate for regulating a rotation of the magnet rotor to swing at a predetermined angle between the magnetic poles formed in the magnetic force inducing members.

1. Field of the Invention
The present invention relates to a light quantity control unit used in various camera devices such as video cameras and still cameras. Specifically, it relates to a light quantity control unit such as a diaphragm for regulating the amount of light in a photographing operation or a shutter for blocking the light in a photographing operation and a camera device using the same.
2. Description of the Related Arts
This type of light quantity control unit is comprised of a ring shape base plate integrated in the photographing lens part and has an optical axis aperture, one or a plurality of blade members being revolvingly mounted to this base plate and border on the aperture, and an electro-magnetic drive unit interlocked to the blade member and mounted to said base plate. By applying an electric current to this electro-magnetic drive unit, said blade member revolves and the aperture is blocked or the diameter of the aperture is reduced.
Conventionally, this electro-magnetic drive unit was integrated into one body with said base plate and various methods thereof have been proposed. As a representative drive unit, there is a method of supporting and holding a magnetic rotor with a coil frame revolving freely, winding a coil on the coil frame to envelope the rotor, covering the periphery thereof with a yoke, and revolving the rotor according to Fleming""s left-hand rule by exciting this coil as is disclosed, for example, in Japanese Patent Publication (Kokaihei) No. 10-221740. Even as described in Kokaihei 10-221740, what mounts this drive unit on the aforementioned base plate and transmits the rotating force of said magnet rotor to the blade member is proposed.
Also, there is another method of supporting and holding a magnet rotor at the peripheral part of the base plate in the direction of the optical axis, mounting a coil wound similarly at the peripheral part in the direction orthogonal to the optical axis, opposingly arranging the leading ends of a pair of soft magnetic members engaged at the one ends to said coil at the periphery of said magnet rotor, forming magnetic poles at the leading ends of these soft magnetic members by conducting to the coil, and obtaining a turning torque between the magnetic poles polarized in the magnetic rotor as is proposed, for example, in Japanese Patent Publication (Kokaihei) No. 6-258683. When using this method, a coil, paired soft magnetic members and a magnetic roller are arranged.
The aforementioned prior art has the following demerits. The drive unit in the method disclosed in Kokaihei 10-221740 has a demerit of the drive unit becoming large since there is a coil frame at the periphery of the magnet rotor, a coil at the periphery thereof, and the entire body covered with a yoke. Also, a coil frame exists between the magnet rotor and the coil thus the efficiency degrades due to the thickness thereof. Therefore, it is necessary to increase the number of windings of the coil and the drive unit becomes large. In particular, when arranging plural drive units such as for the shutter blade and for the diaphragm blade at the periphery of the base plate, there is a demerit of causing the drive unit to become large or the opening and closing speed of the blades becoming slow from decreasing the number of windings of the coil.
Next, the drive unit in the method disclosed in Kokaihei 6-258683 has a demerit of the major diameter of the base plate becoming large since the cylindrical coil and the pair of soft magnetic members extended from the two open ends of this coil are arranged at the periphery of the base plate in a horizontal position. This method was particularly difficult to apply when arranging a plurality of drive units at the periphery of the base plate.
An object of the present invention is to provide a light quantity control unit having a compact drive unit of small major diameter, which takes up small space in the direction of the optical axis, at the periphery of the optical axis of the photographing lens part.
Another object of the present invention is to provide a compact light control unit integrated with a plurality of blades such as diaphragm blades and shutter blades and a plurality of drivers.
Still another object of the present invention is to provide a compact camera device integrated with the aforementioned light quantity control unit.
In order to achieve the aforementioned purpose, this invention is composed as follows.
First of all, a blade member having an aperture is arranged on a base plate to border on the aperture. Then, a coil and a magnet rotor of a substantially cylindrical shape are arranged on this base plate at a parallel with a space in-between and with the axial direction thereof oriented in the direction of the optical axis. Then, a pair of magnetic force inducing members are extended from the two end parts of said coil, which are the end parts in the direction of the optical axis, and the leading ends thereof are opposingly arranged with said magnet rotor interposed. Then N pole-S pole are formed in this pair of magnetic force inducing members at the two mutually opposing magnetic poles. Also, N pole-S pole are polarized in said magnet rotor thus the magnet rotor receives a rotating force from the mutual magnetic function of the magnetic poles of the magnetic force inducing members and the magnet rotor. Then, the revolving motion of the magnet rotor is swung at a predetermined angle by a regulating means, which regulates the movement between the two magnetic poles formed in the aforementioned magnetic force inducing members.
By composing the light quantity control unit as described above, the coil and the magnet motor occupy the space in the direction of the optical axis on a base plate normally formed into a ring shape and the magnetic force inducing members occupy the space in the direction orthogonal to the optical axis. Furthermore, rotating force is bestowed to the magnet rotor by the mutual magnetic function of the two polarized magnetic poles and the two magnetic poles formed in the magnetic force inducing members so the structure is simple. As a result, the unit can be miniaturized.
What is more preferable is to engage the base end parts of the aforementioned pair of magnetic force inducing members with the two open ends of the aforementioned coil, bend at least one section at the leading ends of the aforementioned paired magnetic force inducing members, and oppose at approximately the center part in the length wise direction which is the direction of the optical axis of said coil. By doing so, the magnetic resistances of the pair of magnetic force inducing members are equalized, the magnetic field formed in the coil transmits the respective magnetic force inducing member, and both N-S poles of approximately equal magnetic force can be formed at the opposing leading ends.
Note that arranging the leading ends of the magnetic force inducing members at the center position in the length wise direction which is the direction of the optical axis of the coil is most preferable in this case but an appropriate position between the two end parts of the coil, which are the end parts in the direction of the optical axis, should be selected based on the arranged relationship with the other parts.
Furthermore, the aforementioned regulating means can change the speed for opening and closing the blade member(s) by differentiating the attraction force formed between the pair of magnetic force inducing members and the two magnetic poles N-S of the aforementioned magnet rotor between the open area and the close area. Namely, the blades can be closed from the opened state at a high speed by setting the attraction force in the open area to be less than the close area.
It is possible to change the amount of said attraction force by differentiating the shape or the material of the pair of inducing members, which form the magnetic poles. Also, it is possible to change the amount of said attraction force by differentiating the distance of the magnetic poles in the magnet rotor and the magnetic poles in the aforementioned pair of magnetic force inducing members between the open area and the closed area.
To mount the aforementioned coil and the magnet rotor on the aforementioned base plate at a parallel, a holding member is provided to the base plate with a space in-between in the direction of the optical axis and mount the coil and the magnet rotor between this holding member and the base plate so that the two ends thereof are supported by the holding member and the base plate.

Light quantity controller and camera system including the same


An optical switch element for selectively transmitting or shielding light from a first optical wave guide to a second optical wave guide is disclosed. The optical switch element includes a first optical switch portion and a second optical switch portion. The first optical switch portion includes: a part of said first optical wave guide; a first liquid crystal layer optically connected to said part of said first optical wave guide; a first part of said second optical wave guide optically connected to said first liquid crystal layer; and first voltage applying means for applying voltage to said first liquid crystal layer to change a refractive index of said first liquid crystal layer. The second optical switch portion includes: a second part of said second optical wave guide; a second liquid crystal layer optically connected to said second part of said second optical wave guide; and second voltage applying means for applying voltage to said second liquid crystal layer to change a refractive index of said second liquid crystal layer. In a case where light is transmitted from said first optical wave guide to said second optical wave guide, said first optical switch portion is in a transmitting state, and said second optical switch portion is in a shielding state, and in another case where light is shielded from said first optical wave guide to said second optical wave guide, said first optical switch portion is in a shielding state, and said second optical switch portion is in a transmitting state.

1. Field of the Invention
The present invention relates to an optical switch element and a liquid crystal light directional coupler which can be used in an optical transmission apparatus or an optical information processing apparatus.
2. Description of the Related Art
Now, a flat panel display device which performs a display based on a different principle from that of a conventional cathode ray tube (CRT) is widely used as a display in a document editing apparatus such as a word processor, or in an electronic apparatus such as a personal computer. Developments are pursued in the future application of such a flat panel display device as a display used in a high definition television receiver or in a high-performance engineering work station (EWS).
As such a flat panel display device, an electroluminescence panel (ELP), an plasma display panel (PDP), a liquid crystal display (LCD) or the like is known. Among these known display devices, the LCD is the most promising in terms of high accommodation to full color display, the application in conjunction with a large scale integrated circuit (LSI), and the like.
There two types of LCDs depending on the construction and the method for driving the display medium. One is an LCD of simple matrix driving type. The other is an LCD of active matrix driving type. In the LCD of simple matrix driving type, on surfaces of a pair of glass substrates which face each other, stripe-like electrodes are formed, respectively. The glass substrates are combined in such a manner that the stripe-like electrodes on the glass substrates are perpendicular to each other. Into a space between the glass substrates, nematic liquid crystal is injected. A display is realized by using the abrupt changing ability in the optical characteristics between the display state and the non-display state of the nematic liquid crystal.
The LCD of active matrix driving type has a construction in which pixels are used with nonlinear elements. The LCD of active matrix driving type performs the display by using the switching characteristics of the respective nonlinear elements. Therefore, as compared with the LCD of simple matrix driving type, the LCD of active matrix driving type has a lower dependence on the abruptness of changing in the optical characteristics of the liquid crystal, thereby realizing a display device with a high contrast and high-speed response.
The nonlinear elements are classified into two types. One is a two-terminal element, and the other is a three-terminal element. As the two-terminal type nonlinear element, an MIM (metal-insulator-metal) element, a diode and the like are known. As the three-terminal type nonlinear element, an a-Si TFT (amorphous silicon thin film transistor) element, a p-Si TFT (polysilicon thin film transistor) element, and the like are known.
In the LCD of active matrix driving type, parasitic capacitances are generated in the nonlinear elements and scanning lines. This causes problems such that the decrease in contrast, the occurrence of persistence, the reduction in panel lifetime, and the like. In the recent future, the display panel will be increased in size. The large-sized panel necessitates longer wirings. As a result, the wiring resistance is increased, and the delay in signal is increased by the combination of the parasitic capacitance and the wiring resistance. This causes a problem in that the uniformity and the high contrast of the display are further degraded.
In order to eliminate the above problems, the waveforms of the driving pulses for the display in the respective pixels are analyzed. However, it is difficult to logically analyze the waveforms in detail due to the nonlinearity of the switching elements.
On the other hand, as is shown in FIG. 7, light from a light source 41 to an optical wave guide 42 is branched by light branching elements 43, so that the branched light beams are transmitted through a plurality of row optical wave guides 44, respectively. If the above optical scanning manner is used, the above-mentioned parasitic capacitances between the nonlinear elements associated with the pixels and the electrical wirings can be remarkably reduced. Therefore, by using the above optical scanning manner, the above problem of signal delay is eliminated, whereby the display device can be readily made larger. The light branching element 43 is an optical switch element which passes or shields the light from the optical wave guide 42 to the row optical wave guide 44.
There are two types of optical switch elements. One is of mechanical type in which an optical path is switched by mechanically driving a fiber, a prism or the like. The other one is of electronic type in which an electro-optic effect and an acousto-optic effect of LiNbO.sub.3, As.sub.2 S.sub.3, etc. are utilized. An optical switch element of the electronic type has no mechanically movable section, so that it offers high reliability. Especially, in recent years, an optical switch element of the electronic type which uses liquid crystal is attractive. For example, there is an optical switch element of the electronic type, i.e., a so-called light directional coupler in which liquid crystal and an optical wave guide are used in combination, which is described in Japanese Laid-Open Patent Publication No. 57-142622 (Applicant: Nippon Telegraph and Telephone Public Corporation).
FIGS. 2A and 2B are cross-sectional views for illustrating a structure and operation of a conventional optical switch element using liquid crystal. Referring to these figures, a first optical wave guide 2 is formed on a glass substrate 1, and a common electrode 6 is formed thereon. A second optical wave guide 5 is formed on a counter glass substrate 4, and a segment electrode 7 is formed thereon. A liquid crystal layer 3 is formed between the common electrode 6 and the segment electrode 7. The common electrode 6 and the segment electrode 7 are made of transparent conductive films. These electrodes are sufficiently thin, so as not to affect a relationship between each of the optical wave guides 2 and 5 and the liquid crystal layer 3, i.e., total reflection or scattering.
FIG. 2B shows the light transmission direction from the first optical wave guide 2 to the second optical wave guide 5, when voltage is applied to the segment electrode 7 and the common electrode 6 of the optical switch element. In this case, refractive indexes of the respective component materials of the optical switch element satisfy first conditions of n.sub.A0 <n.sub.1 <n.sub.e1 <n.sub.2, and n.sub.2 >n.sub.B0, or second conditions of n.sub.e1 <n.sub.1, n.sub.e1 <n.sub.2, n.sub.1 >n.sub.A0, n.sub.2 >n.sub.A0, n.sub.1 >n.sub.B0 and n.sub.2 >n.sub.B0 (where n.sub.e1, n.sub.A0, n.sub.1, n.sub.B0 and n.sub.2 are refractive indexes of the liquid crystal layer 3, the glass substrate 1, the first optical wave guide 2, the counter glass substrate 4 and the second optical wave guide 5, respectively). At a first scattering, 99.9% of an incident light beam a.sub.0 is transmitted out of the first optical wave guide 2 (such a light beam is referred to as a'.sub.1). The remaining 0.1% of a.sub.0 is still in the first optical wave guide 2 (such a light beam is referred to as b'.sub.1). At a second scattering, 99.9% of b'.sub.1 is scattered and 0.1% of b'.sub.1 is still in the first optical wave guide 2. After the second scattering, 0.0000001% of a.sub.0 (b'.sub.out) remains in the first optical wave guide 2, and 99.9999999% of a.sub.0 is scattered. The scattered light is attenuated to be about 70% due to a propagation loss in the liquid crystal layer 3 or the like. The attenuated light (a'.sub.out) is guided to the second optical wave guide 5.
FIG. 2A shows a case where no voltage is applied to the optical switch element. In this case, refractive indexes of the respective component materials satisfy conditions of n.sub.A0 <n.sub.1, n.sub.1 >n.sub.e1, n.sub.B0 <n.sub.2 and n.sub.2 >n.sub.e1. The refractive index n.sub.e1 is smaller than that in the case where voltage is applied. Therefore, the incident light beam a.sub.0 is repeatedly and totally reflected in the first optical wave guide 2. At each total reflection, 0.1% of a light beam is scattered. Although the light is gradually attenuated by 0.1% in the order of a.sub.1, a.sub.2 and a.sub.3, approximately 100% of the incident light beam a.sub.0 (a.sub.out) is guided in the first optical wave guide 2. The scattered light beams (about 0.1%) b.sub.1, b.sub.2 and b.sub.3 scattered at an interface between the first optical wave guide 2 and the liquid crystal layer 3 are attenuated to be 0.07% due to the propagation loss in the liquid crystal layer 3. The scattered light beams b.sub.1, b.sub.2 and b.sub.3 are guided to the second optical wave guide 5 and are sequentially summed up, so as to be totally 0.2%, which constitutes leakage light.
Because of the leakage light, the conventional optical switch element has the S/N ratio of 26 dB. Therefore, the conventional optical switch element has a problem of crosstalk in which the optical signal transmitted through the first optical wave guide 2 is leaked at the optical switch element to the second optical wave guide 5. Moreover, since the conventional optical switch element uses nematic liquid crystal, there is another problem in that the switching rate is several milliseconds, i.e., the response speed is relatively low.
Another prior art for optical scanning uses a light directional coupler as the above-mentioned light branching element. The light directional coupler is mainly used for branching an optical signal in the optical communication field. For the optical wave guide, an optical fiber, glass optical wave guide, a semiconductor optical wave guide or the like is used. As a material for the light directional coupler type switch element, Ti:LiNbO.sub.3 is known. Moreover, a (4.times.4) or (8.times.8) matrix switch of cross connection type in which light directional couplers are integrated is now being developed.
Still another prior art uses a liquid crystal light directional coupler as the light branching element. By the conventional liquid crystal light directional coupler, a coupling length is about several millimeters. Therefore, when the optical scanning is performed in the display device, and the size of each of the liquid crystal light directional coupler is assumed to be equal to the above length, the row optical wave guides extending along a row direction across the liquid crystal light directional couplers from the main optical wave guide extending along a column direction cannot be formed in high density, which constitutes a problem.

Optical switch element and a liquid crystal light directional coupler used in the optical switch element


Disclosed are a laser irradiation method for laser treatment performed by irradiating a treatment part of a patient with a treatment laser beam and a laser treatment apparatus for practicing the method. The method includes the steps of: setting a shape and size of an irradiation area to be irradiated with the laser beam; determining a scanning sequence of beam spots based on the shape and size of the irradiation area set in the setting step, a spot diameter of the laser beam, and a predetermined rule; and performing laser irradiation to the beam spots within the irradiation area in accordance with the scanning sequence determined in the determining step, wherein the predetermined rule is a rule that the beam spots continuously irradiated with the laser beam become nonadjacent and scanning lines continuously irradiated become nonadjacent.

1. Field of the Invention
The present invention relates to a laser irradiation method for laser treatment performed by irradiating a treatment part or site such as an affected part with a treatment laser beam and a laser treatment apparatus used for practicing the irradiation method.
2. Description of Related Art
Conventionally, there have been known laser treatment apparatus for performing depilation, wrinkle removal, and birthmark removal, etc. by irradiating a skin surrounding hair follicles or a skin having wrinkles or birthmarks with a treatment laser beam (simply referred to as a treatment beam hereinafter). For example, in laser depilation treatment, a treatment beam is irradiated to a skin surrounding hair follicles, and resultant heat is radiated to the hair roots and then cauterizes them, thus depilating the hairs. Known as an irradiation method of the treatment beam is the method of determining in advance an area (its shape, size, and others) to be irradiated in response to one irradiation command signal and then irradiating the treatment beam to the predetermined area while scanning so that beam spots (spot positions) of the treatment beam are arranged within the irradiation area.
However, it has been determined such that scanning the beam spots is made by causing the treatment beam to sequentially scan the irradiation area from an end spot in a first scanning line to a next, as shown in FIG. 5, and the scanning is repeated on a second scanning line immediately adjacent to the first scanning line, and then to a third scanning line. At this time, without considering the effects of a heat damping time in an immediately preceding irradiated spot, the treatment beam is irradiated to a next (immediately adjacent) spot, which is liable to cause the thermal damage to the skin.
It is to be noted that the heat damping time is defined as follows: when a treatment beam is irradiated to a target, the distribution of temperatures in a zone centered on the target is observed as a Gaussian distribution with the width which depends on the diameter of the zone; in relation to the Gaussian distribution, the heat damping time is interpreted as the time required until the center temperature of the Gaussian distribution decreases to 50% thereof.
For solving such the problem, there has been proposed a method of scanning the treatment beam over the irradiation area so that the beam spots of the treatment beam are arranged at random as shown in FIG. 11. However, there is no guarantee that the beam spots continuously irradiated will not be immediately adjacent to the immediately preceding irradiated spots. This method can predetermine a plurality of types of an irradiation area such as its shape, size and others, and memorize beforehand a scanning pattern (a scanning sequence) determined such that the beam spots irradiated continuously are arranged without becoming immediately adjacent to each other. It however needs complicated operations to beforehand determine scanning patterns for every irradiation area. When a new irradiation area is set, furthermore, determination of a scanning pattern corresponding to the area also requires complicated operations.
Furthermore, in the conventional method of scanning beam spots, the treatment beam is irradiated to the skin even while the treatment beam is shifting from a beam spot to another. This would apply undesired heat energy to an affected part of the skin and also cause wasted power consumption.
The present invention has been made in view of the above circumstances and has an object to overcome the above problems and to provide a laser irradiation method for laser treatment enabling suppression of the thermal damage to a skin irradiated with a treatment laser beam, and a laser treatment apparatus used for practicing the method.
Another object of the present invention is providing a laser irradiation method for laser treatment enabling easy determination of a scanning sequence of beam spots without requiring complicated operations, and a laser treatment apparatus used for practicing the method.
Furthermore, the present invention has another object of providing a laser irradiation method for laser treatment capable of performing laser irradiation in an appropriate, efficient manner, and a laser treatment apparatus used for carrying out the method.
Additional objects and advantages of the invention will be set forth in part in the description which follows and in part will be obvious from the description, or may be learned by practice of the invention. The objects and advantages of the invention may be realized and attained by means of the instrumentalities and combinations particularly pointed out in the appended claims.
To achieve the purpose of the invention, there is provided a laser irradiation method for laser treatment performed by irradiating a treatment part of a patient with a treatment laser beam, the method including the steps of: a. setting a shape and size of an irradiation area to be irradiated with the laser beam; b. determining a scanning sequence of beam spots based on the shape and size of the irradiation area set in the setting step, a spot diameter of the laser beam, and a predetermined rule; and c. performing laser irradiation to the beam spots within the irradiation area in accordance with the scanning sequence determined in the determining step; wherein the predetermined rule is a rule that the beam spots continuously irradiated with the laser beam become nonadjacent and scanning lines continuously irradiated become nonadjacent.
According to another aspect of the present invention, there is provided a laser treatment apparatus for performing treatment for a treatment part of a patient by irradiating the part with a treatment laser beam, the apparatus including: a light delivery optical system provided with a laser source for emitting a treatment laser beam, for forming the laser beam emitted from the laser source into a spot beam and delivering the beam to the treatment part to be irradiated; scanning means disposed in the light delivery optical system, for scanning the laser beam onto beam spots within an irradiation area having a predetermined shape and size; determining means for determining a scanning sequence of the beam spots to be scanned by the scanning means based on a shape and size of an irradiation area, a spot diameter of the laser beam, and a predetermined rule; and scanning control means for controlling the scanning means to perform laser irradiation based on the determined scanning sequence; wherein the predetermined rule is a rule that beam spots continuously irradiated with the laser beam become nonadjacent and scanning lines continuously irradiated become nonadjacent.
Furthermore, according to another aspect of the present invention, there is provided a laser treatment apparatus for performing treatment for a treatment part of a patient by irradiating the part with a treatment laser beam, the apparatus including: a light delivery optical system provided with a laser source, for emitting a treatment laser beam, for forming the laser beam emitted from the laser source into a spot beam and delivering the beam to the treatment part to be irradiated; scanning means disposed in the light delivery optical system, for scanning the laser beam onto beam spots within an irradiation area having a predetermined shape and size; scanning control means for controlling the scanning means to perform laser irradiation based on a predetermined scanning sequence; and irradiation control means for controlling the laser irradiation in correspondence with shifting of the laser beam from a beam spot to a next by the scanning means.

Laser irradiation method for laser treatment and laser treatment apparatus


A switching control system of circuit breaker, including at least: one switching control unit per circuit breaker, each of which inputs electrical quantity of power system voltage and main circuit current, state quantity of a circuit breaker, and an opening command signal or closing command signal of the circuit breaker, and performs control to cause the circuit breaker to open or close at a desired phase of the power system voltage or main circuit current; and a display operation unit connected with the switching control unit via a communication network and performs display operation to operate and monitor the operation and state of the switching control unit of circuit breaker. The switching control unit includes a first area for causing the circuit breaker to open or close at a desired phase of the power system voltage or current; and a second area for transmitting/receiving information via the communication network.

A method for suppressing the generation of transient phenomena, which impact electric power systems and electric power equipment, by controlling the opening or closing timing of a circuit breaker for power, has been proposed (e.g. see Non-patent Document 1).
A specific invention to implement this method for suppressing the generation of transient phenomena, which has already been proposed, is a switching controlgear of circuit breaker which switches a circuit breaker contact at a timing between a current zero point and a peak value of the circuit breaker current when current is interrupted, and controls the closing timing of the circuit breaker contact according to the type of load when the circuit breaker contact is closed (e.g. see Patent Document 1).
Such a switching controlgear of circuit breaker has already been used in many actual electric stations (see Non-patent Document 1).
All of the switching controlgear of circuit breakers according to Patent Document 1 have a function to delay the output timing of an opening command signal or closing command signal to the circuit breaker, so that the circuit breaker can interrupt or not interrupt at a predetermined phase when the opening command signal or closing command signal is detected. Such a switching control for a circuit breaker is called "synchronous opening control" or "synchronous closing control".
Patent Document 1: Japanese Patent Application Laid-Open No. H3-156820
Non-patent Document 1: Catalogue publication 1HSM 9543 22-01en, Controlled Switching Buyer's Guide Edition 1, 2004-05, ABB Power Technologies
Many of the switching controlgear of circuit breakers applied to electric stations have a means for connecting with external equipment, such as a personal computer (hereafter PC), and has a function to acquire various data, including main circuit current waveforms and power system voltage waveforms when the switching control of the circuit breaker is performed.
In order to connect the synchronous switching control device of a circuit breaker and an external equipment, such as a PC, however, dedicated communication software and maintenance software must be installed on the PC in advance.
In the case of the switching controlgear of circuit breaker shown in Non-patent Document 1, for example, dedicated communication software and maintenance software are provided to the user via CD-ROM. In this case, the user must install the dedicated software written on the CD-ROM on a PC using a CD-ROM driver. Therefore the PC, in which the dedicated software is not installed, cannot be connected to the switching controlgear of circuit breaker, which is inconvenient, especially in terms of storing and managing various acquired data. Also in the switching controlgear of circuit breaker shown in Non-patent Document 1, a serial communication standard cable, RS-232C, is used to connect with a PC, and the maximum length of the RS-232C cable is about 15 m.
Therefore in the case of the switching controlgear of circuit breaker shown in Non-patent Document 1, connection with a PC is normally a local connection at the work site, which is not convenient for remote control. If remote control is required, [the switching controlgear of circuit breaker] must be connected using a modem via a telephone line, for example, instead of an RS-232C cable, which is not only inconvenient but also has a slow communication speed and poor work efficiency.
Also only one switching controlgear of circuit breaker can be connected to one PC at a time, which means that a switching operation is required to perform maintenance and various data collection for the switching controlgear of circuit breakers installed in a plurality of circuits, which has poor work efficiency.

Switching control system of circuit breaker


A fluid-cooled mold for the production of a quartz crucible provided in its interior with a space for flowing of cooling fluid comprises an outer mold section made from a heat-conductive metal or alloy material and an inner mold section closely arranged to an inner surface of the outer mold section and made from a heat-resistant material.

1. Field of the Invention
This invention relates to a fluid-cooled mold for use in the production of a quartz crucible, and more particularly to a fluid-cooled mold having an optimized mold structure.
2. Description of the Related Art
A quartz glass crucible is used for pulling a silicon single crystal as a semiconductor material, a silicon crystal as a solar battery material or the like. For example, the silicon single crystal is mainly produced by a method in which a polycrystalline silicon lump charged in the quartz glass crucible is melted by heating to form a silicon melt and then a seed crystal is immersed in the silicon melt and pulled therefrom. The silicon crystal as a solar battery material is low in single-crystallinity as compared with single silicon crystal as a semiconductor material, but is produced by the same pulling method.
As a method of producing a quartz glass crucible is known a rotating mold method. In this method, a rotatable bowl-shaped mold is used, and raw quartz powder is deposited on an inner surface of the mold at a given thickness along the inner surface by utilizing centrifugal force generated during the rotation of the mold. Subsequently, the quartz powder is melted and vitrified by heating to a temperature (about 2000° C.) higher than a melting point (melting temperature) through arc discharge of an electrode(s) disposed above the mold and around the rotation central axis of the mold to form a glass crucible having a form along the inner surface of the mold, and thereafter the resulting glass crucible is cooled and taken out from the mold.
A fluid-cooled mold has hitherto been known as a mold used for producing the quartz glass crucible by the rotating mold method. For example, JP-A-H11-43394 discloses that raw quartz powder is charged into a rotating stainless-steel fluid-cooled mold and melted through arc discharge to produce a quartz glass crucible. Similarly, JP-A-2002-154890 discloses that quartz powder is charged into a rotating stainless-steel fluid-cooled mold and shaped through arc discharge under a reduced pressure to produce a quartz glass crucible.
In the conventional stainless-steel fluid-cooled mold, the heat damage of the mold is prevented by forming a space for flowing of a cooling fluid inside a bottom portion and peripheral wall portion of the mold and cooling the bottom portion and peripheral wall portion of the mold with the cooling fluid under an environment by heating at a higher temperature. The inner surface of the mold is usually cooled down to about 100° C. On the other hand, the raw quartz powder deposited on the inner surface of the mold is melted and vitrified by heating to a temperature above the melting point through arc discharge.
In the cooling structure of the conventional fluid-cooled mold, the quartz powder deposited on the inner surface of the mold is melted and vitrified by heating above the melting point at an outer surface side opposite to the inner surface of the mold, while a large portion of the quartz powder located at the inner surface side of the mold remains at an unmelted state without vitrification because heat in such a portion is removed by the cooling of the mold. In order to form a vitrified layer having a target thickness with the conventional fluid-cooling mold, the quartz powder is used in a quantity larger by about 2 times than the weight required for target thickness. Therefore, there is a problem that the quantity of quartz powder for the formation of a product is small as compared with the quantity used and the loss in the quantity of the quartz powder is large.
On the other hand, there is known a carbon mold, the whole portion of which is made of carbon. Although carbon is high in heat resistance as compared with stainless steel, it is subjected to heat damage due to oxidative consumption if used at a high temperature for an extended period of time. There is a problem that the heat-damaged mold causes failures in the shape of the quartz glass crucible and thus the whole of the expensive mold is replaced with a new mold, which significantly reduces the economic efficiency.


An ink composition comprises red pigment and a carrier mixture. The carrier mixture comprises a bishydroxy terminated thioether and a lactam.

It is desirable to have a large color gamut for color printing. "Color gamut" refers to the number of colors which may be reproduced from a set of primary colors. The larger the color gamut, the more colors which can be successfully reproduced. The color gamut is a function of the chromas of the primaries. "Chroma" refers to the degree of saturation of the color. Providing high chroma primary inks will provide a large color gamut. A chroma value of a primary ink is determined by its colorant and its formulation.
Pontes et al., U.S. Pat. No. 5,100,469, disclose an ink composition comprising a colorant, a liquid carrier, and an additive selected from the group consisting of mesoerythritol and salts thereof, and RC(CH.sub.2 OH).sub.3 and salts thereof. Pontes et al. further disclose the composition may comprise from about 1.0% to about 5.0%, by weight, humectant, and that suitable humectants include glycerol, thiodiglycols, ethylene glycol, diethylene glycol and 2-pyrrolidone. Pontes et al. teach colorants may include direct dyes, acid dyes, reactive dyes and polymeric dyes.
Hotomi et al., U.S. Pat. No. 5,376,169, disclose a recording solution for ink jetting comprising pigment, resin, an additive selected from the group consisting of alginates and bomeols, and at least 55%, by weight, of a non-aqueous solvent. Hotomi et al. further teach the non-aqueous solvent may be selected from monoethylene glycol, monobutyl ether, diethylene glycol monobutyl ether, triethylene glycol monobutyl ether, monopropylene glycol monobutyl ether, dipropylene glycol monobutyl ether, tripropyl monobutyl ether, butyl cellosolve and 2-pyrrolidone. The recording solution of Hotomi et al. may further comprise from 7% to 45%, by weight, of a compound selected from water, dithioethanol, formamide, glycerin, ethylene carbonate and methane sulfonic acid.
Gundlach et al., U.S. Pat. No, 5,531,815, disclose ink compositions comprising a betaine zwitterionic base, a quasisurfactant penetrant and, optionally, solvents such as n-methylpyrrolidione, thiodiethanol, ethylene glycol, trimethylol propane, sulfolane and glycerine.
Gundlach et al., U.S. Pat. No. 5,534,050, disclose ink compositions comprising an acetylenic polyalkylene oxide and a quasisurfactant penetrant. Gundlach et al. disclose solvents such as cyclohexyl pyrrolidione and co-solvents such as n-methylpyrrolidinone, thiodiethanol, ethylene glycol, trimethylol propane, sulfolane, and glycerine.
Nagai et al., U.S. Pat. No. 5,882,390, disclose a recording ink composition comprising a colorant which includes at least one phthalocyanine compound, a dispersant and/or surfactant, water and a humectant. Nagai et al. further disclose that humectants include water-soluble organic solvents such as diethylene glycol, thiodiethanol, polyethylene glycol, glycerol, N-methyl-2-pyrrolidinone, N-hydroxy-2-pyrrolidone, 2-pyrrolidone and 1,3-dimethylimidazolidinone.
Nagai et al., U.S. Pat. No. 5,879,439, disclose a recording ink composition comprising a colorant comprising a pigment and a polymeric dye, a dispersant and/or surfactant, water, and a water-soluble organic solvent such as diethylene glycol, thiodiethanol, polyethylene glycol, triethylene glycol, glycerol, 1,2,6-hexanetriol, 1,2,4-butanetriol, 3-methylpentane-1,3,5,-triol, 1,5-pentanediol, N-methyl-2-pyrrolidone, N-hydroxy ethyl-2-pyrrolidone, 2-pyrrolidone and 1,3-dimethylimidazolidinone.
Nagai et al., U.S. Pat. No. 5,810,915 disclose an aqueous ink composition including a dye component containing a water-soluble xanthene dye or a water-soluble phthalocyanine dye. Nagai et al. teach that the composition may further comprise water-soluble organic solvents such as diethylene glycol, thiodiethanol, polyethylene glycol, triethylene glycol, glycerol, 1,2,6-hexanetriol, 1,2,4-butanetriol, 3-methylpentane-1,3,5-triol, 1,5-pentanediol, N-methyl-2-pyrrolidone, N-hydroxy-ethyl-2-pyrrolidone, 2-pyrrolidone and 1,3-dimethylimidazolidinone.
There is a need for providing high chroma primary inks that will provide a large color gamut.


In a charge pump circuit, the issues of increase in loss due to the backgating effect, increase in cost, risks of latch-up and charge leak and the like, which would be involved in achieving voltage reduction, are resolved with a simple circuit structure. A pump cell 31 has nMOS transistors M1-M3 and capacitors C1, C2. An auxiliary capacitor C is connected to an input node IN, and further p-well portions of the nMOS transistors M1-M3 are connected to this auxiliary capacitor C, the nMOS transistor M3 is interposed between each p-well portion and output node OUT, and the input node IN is connected to the gate of the nMOS transistor M3. Thus, with a simple circuit structure which involves only the use of the auxiliary capacitor C, voltage difference of the push-down of the p-well voltage is increased so that the deterioration of pump efficiency due to the backgating effect in the voltage reduction of power supply voltage is eliminated and that latch-up and charge leak are prevented.

The present invention relates to a charge pump circuit for generating, for example, write voltage or erase voltage or the like in nonvolatile semiconductor storage devices by boosting or lowering the power supply voltage.
For next-generation flash memories, there is a demand for further lower voltage, smaller power and lower cost (downsizing of circuits) than today's counterparts. In particular, charge pump circuits for generating a high voltage required to write or erase data into or from memory cells occupy a large portion of the chip area, and therefore it is important to implement the size reduction.
The charge pump circuit is a circuit for generating a voltage, or a negative voltage, higher than a power supply voltage by boosting or lowering the power supply voltage. A charge pump for generating a negative voltage to be used for block erasure in NOR flash memories (hereinafter, referred to as negative-voltage charge pump) generates a negative voltage of about -11 V from a power supply voltage (3 V or 5 V). However, with the circuit structure of conventional negative-voltage charge pumps, the circuit would necessarily be upsized acceleratively to obtain the same output from further lower power supply voltages with a view to the voltage reduction, which has been an obstacle to cost reduction.
Conventionally, as one of the circuit structure of the negative-voltage charge pump circuit, there has been a method in which a circuit part for fall of voltage is made up of P-channel transistors. Below given are a brief description of this negative-voltage charge pump using P-channel transistors as well as problems involved in the case where P-channel transistors are used.
An example of the negative-voltage charge pump circuit using P-channel transistors is shown in FIG. 11. In the figure, a portion surrounded by broken line is a pump cell 1 that serves as a basic unit of a charge pump, and a negative-voltage charge pump circuit is made up by connecting several pump cells 1 in series.
Clocks clk1-clk4 as shown in FIG. 12 are inputted to individual clock input terminals CLK1-CLK4 of the pump cells 1. More specifically, clocks clk1, clk2 are inputted to the clock input terminals CLK1, CLK2 of the first-stage pump cell 1, clocks clk3, clk4 are inputted to the clock input terminals CLK3, CLK4 of the second-stage pump cell 1, and clocks clk1, clk2 are inputted to the clock input terminals CLK1, CLK2 of the third-stage pump cell 1. Similarly for the following, clocks clk1, clk2 are inputted to the clock input terminals CLK1, CLK2 of pump cells 1 of odd-numbered stages. By contrast, clocks clk3, clk4 which are shifted 180 degrees with respect to the clocks clk1, clk2 are inputted to the clock input terminals CLK3, CLK4 of pump cells 1 of even-numbered stages.
Now the operation of the pump cell 1 is described by taking a stage 2 in FIG. 11 as an example. Voltage of a node OUT1, which is the input of the stage 2, oscillates at an amplitude of a power supply voltage Vcc generally in synchronization with the clock clk2 as shown by out1 in FIG. 13, by action of a capacitor C4 of the preceding stage 1 and the clock clk2 inputted to this capacitor C4. Meanwhile, voltage of a node OUT2, which is the output of the stage 2, oscillates at the amplitude of the power supply voltage Vcc generally in synchronization with the clock clk4 as shown by out2 in FIG. 13, by action of a capacitor C6 inside the stage 2 and the clock clk4 inputted to this capacitor C6.
Between the node OUT1 and the node OUT2, is provided a transistor M7 having a role of transferring charges between the two nodes OUT1 and OUT2. The voltage of a node B in FIG. 11, when the clock clk4 is an "L" with a transistor M6 conducting, makes a transition at the same voltage as the node OUT1 as shown by broken line B in FIG. 13. In contrast to this, when the clock clk4 is an "H" with the transistor M6 non-conducting, the voltage makes a transition generally in synchronization with the clock clk3 by action of a capacitor C5 connected to the node B and the clock clk3 inputted to this capacitor C5.
Therefore, in the state that the voltage of the node OUT1 has been pushed down by the capacitor C4 and that the voltage of the node OUT2 has been pushed up by the capacitor C6, the node B becomes a voltage lower than the source voltage of the transistor M7 so that the transistor M7 is opened, allowing the charges to be delivered. Then, in any other state, the transistor M7 is closed. Therefore, by making up a negative-voltage charge pump by connecting in series the pump cells 1 having the above construction, a negative voltage Vneg can be taken out.
However, the conventional negative-voltage charge pump circuit has the following problems. That is, the negative-voltage charge pump circuit has a capability of lowering the input voltage by an extent of (Vcc-.alpha.) (where .alpha.>0) per pump cell 1 of one stage. However, the value of .alpha. varies from one pump cell 1 to another due to the voltage inside the pump cell 1. The reason of this is that transfer-use transistors M5, M7, M9 are affected by the backgating effect. For a transistor, the larger the voltage difference between its source and well is, the larger the threshold voltage of the transistor becomes due to the backgating effect. In this case, the P-channel transistors constituting the transfer-use transistors M5, M7, M9 cannot be made be have their n-well portion voltage lower than the substrate voltage (0 V). Meanwhile, the later stage the pump cells 1 belongs to, the lower the source voltage of the transistors M5, M7, M9 becomes. Accordingly, the later the stage in the charge pump is, the larger the voltage difference between source and well becomes so that the influence of the backgating effect increases. That is, if .alpha. value of the "i"th-stage pump cell 1.sub.i is .alpha..sub.i (i=1, 2, . . . , n), then EQU 0.ltoreq..alpha..sub.i.ltoreq..alpha..sub.2.ltoreq. . . . .ltoreq..alpha..sub.n.
Because voltage reduction of the output voltage per pump cell 1 of one stage becomes smaller in later stages of the charge pump, the number of stages of pump cells 1 needs to be increased proportional to the extent of the voltage reduction. Also, the more the power supply voltage lowers, the more the number of stages of pump cells 1 needs to be increased. Unfortunately, however, increasing the number of stages of pump cells 1 would cause the voltage loss due to the backgating effect to increase proportionally as described above, which in turn gives rise to a need for further increasing the number of stages of pump cells 1 in order to make up for the increased voltage loss. Thus, as a result of voltage reduction of the power supply voltage Vcc, the chip area occupied by the charge pump circuit is increased acceleratively.
Also, when the power supply voltage Vcc is lowered as described above, it can occur that at the "i"th-stage pump cell 1.sub.i, EQU Vcc-.alpha..sub.i <0.
In this case, no matter how many additional pump cells 1 are connected, the voltage of the output voltage Vneg comes not to lower any more. For example, when Vcc=1.8 V, no matter how many additional pump cells 1 are connected, the output Vneg of the negative-voltage charge pump could be no more than -8 V. Therefore, some devise is needed to generate a high voltage or a negative voltage of large absolute value with a low power supply voltage.
As a solution to the above issue that increasing the number of stages of pump cells would cause the voltage loss due to the backgating effect to increase proportionally, there is a method that the amplitude of the clock clk inputted to the pump cell 1 is made larger than the power supply voltage Vcc by some means, thereby reducing the loss due to the backgating effect.
For example, Japanese Patent Laid-Open Publication HEI 6-208798 has proposed a method for enlarging the clock amplitude of a main pump by means of an auxiliary pump. That is, as shown in FIG. 14, an intermediate voltage higher than a power supply voltage Vcc and lower than an output Vpp is generated by the auxiliary pump 5, and this intermediate voltage is used as power supply for a clock driver 6. Thus, a clock signal larger in amplitude than the power supply voltage Vcc is obtained. Then, by using the clock signal larger in amplitude than the power supply voltage Vcc as a clock signal for the main pump 7, there can be obtained an effect of reducing the number of the stages of pump cells in the main pump 7 and an effect of relatively reducing the voltage loss due to the backgating effect per one-stage pump cell. In this way, the issue of increasing effect of the backgating effect caused by the power supply voltage Vcc being low is avoided.
Further, because an increase in the threshold voltage of the transfer-use transistors M5, M7, M9 matters for the negative-voltage charge pump shown in FIG. 11, there is a method that a bootstrap circuit is added only to clocks of the transfer-use transistors. FIG. 15 shows a negative-voltage charge pump circuit in which bootstrap circuits 11, 12 are connected to the clock input terminals CLK1, CLK2 in the negative-voltage charge pump shown in FIG. 11.
This negative-voltage charge pump shown in FIG. 15A operates as follows. As shown in FIG. 15B, when an input clkin of the bootstrap circuit 12 is at a logical level "L", a transistor 13 conducts so that an output clkout goes 0 V. At the same time, a node 14 is charged up to a voltage of (Vcc-Vthn) (where Vthn: threshold voltage) via a transistor 15. Next, when the logical level of the input clkin goes "H", the transistor 13 goes non-conductive while the node 14 is boosted higher than the power supply voltage Vcc. For example, assuming that the total of the load capacities connected to the node 14 is Cload (Cload=C.sub.18 + . . . +C.sub.20) and that the capacitance of a capacitor C15 is C.sub.15, then the voltage of the node 14 is boosted, according to a capacity ratio between capacitance C.sub.15 and capacitance Cload in the bootstrap circuit 12, ideally to EQU Vcc-Vthn+Vcc.multidot.C.sub.15 /(C.sub.15 +Cload) (1).
This boosted voltage of the node 14 is outputted as a clkout through a transistor 18.
By these operations, when the clock clkin is inputted to the bootstrap circuits 11, 12, a clock made larger in amplitude than Vcc can be taken out. Then, by using this clock clkout, which is larger in amplitude than Vcc as the clock clk given to the transfer-use transistor, influence of the backgating effect can be alleviated proportionally to the amplitude increase of the clock clk. In addition, according to the foregoing Equation (1), the larger the capacitance C.sub.15 in the bootstrap circuits 11, 12 is made, the greater the amplitude of the clock clkout outputted by the bootstrap circuits 11, 12 becomes, so that the effect of reducing the influence of the backgating effect also becomes greater.
In the two examples described above, the reduction in pump efficiency due to increase in the threshold voltage of the transistors caused by the backgating effect has been resolved. However, in either case, there is a need for adding new circuits for the auxiliary pump 5, the bootstrap circuits 11, 12 and the like. This causes an increase in the circuit area, and moreover an increase in cost, disadvantageously. Both the auxiliary pump 5 and the bootstrap circuits 11, 12 require a capacitor for voltage boost, and this capacitor would produce less effects unless larger in capacity (i.e., larger in area) than the capacitor inside the main pump. Accordingly, the above-described two examples would result in a significant cost increase. Furthermore, in the above two examples, although the influence of the backgating effect can be alleviated, the backgating effect is not eliminated.
As a method for preventing the occurrence of the backgating effect, there is a method that N-channel transistors of the triple-well system are used for the negative-voltage charge pump. FIG. 16 shows a circuit diagram of a negative-voltage charge pump using N-channel transistors of the triple-well system. Now the basic operation of this negative-voltage charge pump is explained according to FIG. 16.
As in the case of a negative-voltage charge pump using P-channel transistors shown in FIG. 11, clocks clk1-clk4 as shown in FIG. 17 are inputted to pump cells 21 surrounded by broken line. Voltage of a node OUT1, which is an input of the stage 2, oscillates at a voltage difference of power supply voltage Vcc generally in synchronization with the clock clk2 as shown by out1 in FIG. 18, by an action of a capacitor C10 of the preceding-stage pump cell 21 and the clock clk2 inputted to this capacitor C10. Meanwhile, voltage of a node OUT2, which is an output of the stage 2, oscillates at a voltage difference of the power supply voltage Vcc generally in synchronization with the clock clk4 as shown by out2 in FIG. 18, by an action of a capacitor C12 and the clock clk4 inputted to this capacitor C12. The voltage of a node C in FIG. 16, when the input signal out1 is at an "H" level with the transistor M12 conducting, makes transition at the same voltage as the node OUT2 as shown by broken line C in FIG. 18. In contrast to this, when the input signal out1 is at an "L" level with the transistor M12 non-conducting, the voltage makes transition generally like the clock clk3 by an action of a capacitor C11 connected to the node C and the clock clk3 inputted to this capacitor C11.
Therefore, in the state that the voltage of the node OUT2 is pushed up by the capacitor C11 and that the voltage of the node OUT1 is pushed down by the capacitor C10, the node C becomes higher in voltage than the source voltage of the transistor M13 so that the transfer-use transistor M13 is opened, allowing the charges to be transferred.
In this negative-voltage charge pump circuit, the p-well voltage for individual transistors is derived from the source. Therefore, the voltage difference between well and source is approximately 0 V so that the backgating effect can be neglected. As a consequence, there occurs no decrease in pump efficiency due to the backgating effect.
However, in this negative-voltage charge pump circuit, in which the p-well voltage of each transistor is simply taken from the source of the same transistor, if a period in which EQU V.sub.source =V.sub.pwell >V.sub.drain +V.sub.bi
(where V.sub.bi is a voltage barrier between p-well and source) is present in each transistor within the pump cell 21, then the thyristor structure parasitic within the N-channel transistor goes active, causing a latch-up or charge leak. For example, at a time point t.sub.B in FIG. 18, EQU voltage of out1<voltage of out2,
and, for the transistor M13 in FIG. 16, EQU V.sub.source =V.sub.pwell >V.sub.drain.
Then, while the charge pump circuit is in the steady state, there is a voltage difference of about Vcc on average between the voltage of out1 and the voltage of out2, and both signals out1, out2 are oscillating at a voltage difference of Vcc, respectively. As a result, the value of (V.sub.source -V.sub.drain) at the time point t.sub.B is small, thus making latch-up or charge leak less likely to occur.
At a start-up of the pump, however, because all the nodes are of the same voltage, the value of (V.sub.source -V.sub.drain) is large, making it likely to occur that V.sub.source -V.sub.drain >V.sub.bi at the timing of the time point t.sub.B. Accordingly, this negative-voltage charge pump circuit has a large possibility that latch-up or charge leak is caused at a pump start-up, and hence the circuit can be said to be a risky circuit.
As a countermeasure for preventing the occurrence of latch-up or charge leak in the negative-voltage charge pump using N-channel transistors, it is recommendable to ensure that the p-well voltage of each transistor is lower than the drain voltage and the source voltage. One concrete example of this is a negative-voltage charge pump circuit having a constitution shown in FIG. 19.
In the negative-voltage charge pump circuit shown in FIG. 19, pump cells 22 each having a circuit structure shown in FIG. 20 are connected in series so as to make up a main pump 23. Each pump cell 22 is provided with an input terminal WELL for inputting the p-well voltage as shown in FIG. 20, and an output terminal of an auxiliary pump 24 other than the main pump 23 is connected to this input terminal WELL. Then, before driving the main pump 23, the p-well voltage of the N-channel transistor in each of the pump cells 22 constituting the main pump 23 is lowered by the auxiliary pump 24 beforehand. In this way, by ensuring that the p-well voltage is necessarily lower than the drain voltage and the source voltage at a pump start-up, the possibility of latch-up or charge leak is avoided.
It is noted that the auxiliary pump 24 is designed to charge the p-well of each of the pump cells 22 constituting the main pump 23, and therefore does not need to have a current supplying ability. However, in order to securely lower the p-well voltage of the main pump 23, the voltage dropping ability of the auxiliary pump 24 that input the p-well voltage to the succeeding-stage pump cell 22 in the main pump 23 must be higher than the voltage dropping ability of the corresponding pump cell 22 of the main pump 23. For this reason, this negative-voltage charge pump circuit involves safe but relatively large-scaled additional circuits (auxiliary pumps 24), causing the circuit area to increase and inevitably involving a cost increase.
As described above, such a conventional negative-voltage charge pump circuit as shown in FIG. 11 has a problem that making the power supply voltage lower causes the loss due to the backgating effect to relatively increase so that the charge pump efficiency lowers. Although various types of negative-voltage charge pump circuits as described above have been available to avoid this problem, none of those circuits cannot afford to resolve the two issues of "cost increase" and "risks of latch-up and charge leak".

Charge pump circuit simple in construction and free from trouble even at low voltage


A manufacturing method of semiconductor device comprises forming a mask material having an aromatic ring and carbon content of 80 wt % or more on an object, forming a mask material pattern by etching the mask material to a desired pattern, and etching the object to transfer the mask material pattern as a mask to the object.

1. Field of the Invention
The present invention relates to a manufacturing method of semiconductor device using a mask pattern whose etch profile upon etching processing is improved, and more particularly to a manufacturing method of semiconductor device in which a object to be processed is processed with the mask pattern formed by processing a multi-layered film.
2. Description of the Related Art
The manufacturing method of semiconductor device includes a number of steps in which plural kinds of substances are deposited on a silicon wafer as films to be processed and the films are patterned into a desired pattern. The patterning of the films is carried out in the following process. First, a photosensitive material generally called resist is deposited on the film to be processed so as to form a resist film on the film. Subsequently, a predetermined region of the resist film is exposed to light. Next, an exposed portion or non-exposed portion of the resist film is removed by development processing so as to form a resist pattern. Further, by dry etching the film to be processed with the resist pattern as an etching mask, patterning of the film is carried out.
To keep a necessary resolution, exposure amount tolerance or focus tolerance at the time of the pattern exposure, the resist film thickness is required to be reduced. For the reason, a required film thickness of the resist film cannot be secured in the etching process of the film to be processed. To solve the problem, a method in which a mask material having a higher etching resistance than that of the resist pattern is formed on the film to be processed and then the resist pattern is transferred to the mask material and the film to be processed in succession has been currently applied.
Conventionally, for example, aluminum and the like, or carbon and the like have been used as the mask material. These materials can be formed by a dry method such as CVD method, sputtering method and vapor deposition method. Materials obtained by resins such as novolac resin, polyhydroxy styrene conventionally used in the resists, which are hardened at high temperature. Polysilane is also used for the mask material. Those mask material such as hardening resin and polysilane can be formed by such a wet method as spin coating method.
Because the metal film and carbon for use in forming a film according to the dry method requires a vacuum system, their processing cost is high.
A left mask material pattern after processing of a film to be processed is finished is difficult to remove because polysilane contains inorganic components. Further, a material produced by baking resin used in a photo resist is likely to undergo side etching during etching of the mask material, so that high-precision processing of the mask material pattern is disabled.
When the processing precision of the mask material pattern is reduced by the side-etching, the processing precision of the film to be processed also drops. As a result, there occurs such a problem that reliability upon operation of the semiconductor device drops remarkably. Then, accompanied by accelerated miniaturization of the semiconductor device, an influence of these problems has been increasing more and more.
No mask material preferably used for manufacturing of the semiconductor device has been obtained yet.
According to an aspect of the present invention, there is provided a manufacturing method of semiconductor device comprising: forming a mask material having an aromatic ring and carbon content of 80 wt % or more on an object; forming a mask material pattern by etching the mask material to a desired pattern; and etching the object to transfer the mask material pattern as a mask to the object.

Manufacturing method of semiconductor device using mask pattern having high etching resistance


Hazard detection systems and methods according to embodiments described herein are operative to enable a user to interface with the hazard detection system by performing a touchless gesture. The touchless gesture can be performed in a vicinity of the hazard detection system without requiring physical access to the hazard detection system. This enables the user to interact with the hazard detection system even if it is out of reach. The hazard detection system can detect gestures and perform an appropriate action responsive to the detected gesture. In one embodiment, the hazard detection system can silence its audible alarm or pre-emptively turn off its audible alarm in response to a detected gesture. Gestures can be detected by processing sensor data to determine whether periodic shapes are detected.

Hazard detection systems such as smoke detectors, carbon monoxide detectors, combination smoke and carbon monoxide detectors, as well as systems for detecting other dangerous conditions have been used in residential, commercial, and industrial settings for safety considerations. When these systems detect the presence of a dangerous condition, they often sound an audible alarm. The alarm is often characterized as having an extremely loud or ear piercing sound, and can be unpleasant or very uncomfortable to a human listener. Some hazard detectors may permit a user to press a button located on the cover of the unit, sometimes termed a hush button or temporary silence button, when they know an alarm to be caused by a non-emergency situation, such as smoke from cooking. When the hush button or temporary silence button is pressed, the audible alarm noise is temporarily silenced for a predetermined interval of time, such as in the range of four to ten minutes, during which the user has an opportunity to address the situation, such as by opening a window, without being required to endure the ear-piercing sound of the alarm. If the condition persists at the end of the predetermined interval of time, then the audible alarm noise resumes. One issue that can arise in many practical situations is that the hazard detector unit is mounted high on a wall or on a ceiling that is out of the reach of the user, leading many users to seek out a ladder, chair, or broomstick in order to press the hush button or temporary silence button, which can lead to inconvenient, impractical, and/or unsafe scenarios. Other issues arise as would be apparent to a person skilled in the art in view of the instant disclosure.

Systems and methods for detecting gesture events in a smart home system


A method for steam stimulating a heavy oil reservoir which realizes significant energy savings is disclosed. Steam is injected into the reservoir via one well, permitted to soak and then produced back directly into the reservoir via a second well. This flowback steam production is terminated when wellhead pressures equalize, or when more than trace amounts of hydrocarbons are produced. Additional steam is injected into the reservoir via the second well, permitted to soak, and heated heavy oil is produced via both wells.

1. Field of the Invention
This invention relates to a process for extracting hydrocarbons from the earth. More particularly, this invention relates to a method for recovering viscous hydrocarbons such as bitumen from a subterranean reservoir by injecting steam via a well into the reservoir to lower the viscosity of the hydrocarbon thereby stimulaing production.
2. Description of the Prior Art
In many area of the world, there are large deposits of viscous petroleum, such as the Athabasca and Cold Lake region in Alberta, the Jobo region in Venezuela and the Edna dnd Sisquoc regions in California, U.S.A. These deposits are often referred to as "tar sand" or "heavy oil" deposits due to the high viscosity of the hydrocarbons which they contain. While some distinctions have arisen between tar sands (viscosity between about 10,000 and 100,000 cp @ reservoir temperature) and heavy oil (viscosity between about 1,000 and 10,000 cp @ reservoir temperature), these terms will be used interchangeably herein. These tar sands may extend for many miles and occur in varying thicknesses of up to more than 300 feet. Although these deposits may lie at or near the earth's surface, generally they are located under a substantial overburden which may be as great as several thousand feet thick. Tar sands located at these depths constitute some of the world's largest presently known petroleum deposits. The tar sands contain a viscous hydrocarbon material, commonly referred to as bitumen, in an amount which ranges from 5 to about 20% by weight. Bitumen is normally immobile at typical reservoir temperatures. For example, in the Cold Lake region of Alberta, at a typical reservoir temperature of about 55.degree. F., bitumen is immobile with a viscosity exceeding several thousand poises. However, at higher temperatures, such as temperatures exceeding 200.degree. F., the bitumen generally becomes mobile with a viscosity of less than 345 centipoises.
Since most tar sand deposits are too deep to be mined economically, various in situ recovery processes have been proposed for separating the bitumen from the sand in the formation itself and producing the bitumen through a well drilled into the deposit. Among the various methods for in situ recovery of bitumen from tar sands, processes which involve the injection of steam are generally regarded as most economical and efficient. Steam can be utilized to heat and fluidize the immobile bitumen and, in some cases to drive the mobilized bitumen towards production means.
The most common and proven method for recovering viscous hydrocarbon is by using steam stimulation techniques which involve heating a formation in the vicinity of a well to stimulate production back through the same well. In this type of process, steam is injected into a formation by means of a well and the well is shut-in to permit the steam to heat the bitumen, thereby reducing its viscosity. Subsequently, all formation fluids, including mobilized bitumen, water and steam, are produced from the same well using accumulated reservoir pressure as the driving force for production.
The primary objective of a steam stimulation process is to transfer thermal energy into the formation and permit the rock to act as a heat exchanger. This heat then lowers the viscosity of the oil flowing through the heated volume. Normally, water-oil ratios are extremely high when the well is first returned to production, but the amount of water (and steam) produced declines and the oil production rate passes through a maximum that is usually much higher than the original rate.
Initially, sufficient pressure may be available in the vicinity of the wellbore to lift fluids to the surface; as the pressure falls, artificial lifting methods are normally employed. Production is terminated when no longer economical and steam is injected again. This cycle is then repeated many times until oil production is no longer economical.
During the early cycles of steam injection and production, oil production rates may be quite high since the oil nearest to the well is being produced. However, during subsequent steam cycles as the oil nearest the well is depleted, steam must move farther into the formation to contact the oil and as a result increased heat losses make the steam less effective as an oil recovery agent. The process loses efficiency with each cycle and eventually oil production becomes uneconomic. This is often simply because it costs more to generate the steam than any additional oil recovered in a cycle.
In steam stimulation processes the highest pressures and temperatures exist in the vicinity of the well immediately following the injection phase. Normally, this pressure and temperature will correspond to the properties of the steam which was employed. Before oil can be moved from the remote parts of the reservoir to the well, the pressure in the near well regions must fall so that it is lower than the distant reservoir pressure. During this initial depressurizing phase, the near wellbore reservoir material cools down as water flashes into steam. As mentioned, the first production from the well thus tends to be steam and this tends to be followed by hot water. Eventually, the pressure is low enough and oil can move to the wellbore.
In conventional steam stimulation processes, during the initial production phase, much of the heat which was put into the reservoir with the steam is simply removed again and is lost. Thus, a major inefficiency of thermal stimulation processes is that this heat must be supplied during each cycle and as the available oil becomes more remote from the well, the cyclic wasted heat quantity increases.
Nevertheless, the only methods which have been proven to be effective commercially in a wide range of reservoirs are steam stimulation processes, and these processes only recover a small portion of the bitumen with rapidly declining effectiveness following each steam injection/production cycle. A continuing need exists for a steam stimulation process which will more efficiently recover oil and reduce the amount of wasted thermal energy.

Steam stimulation process for recovering heavy oil


Nearly all computer viruses require an action by a computer user to infect and spread. The key is to educate users not to open e-mail attachments that might carry computer viruses. The key is behavior modification, as education is not sufficient. Effective behavior modification must have a means to reinforce the change and to measure how widespread the change is in a population. The invention is used to reinforce and measure the change in user behavior. The invention sends an e-mail with an attachment to e-mail users and creates a list of all users that open the attachment. The user is sent an e-mail with an attachment that looks similar to attachment that contain computer viruses. If the attachment is opened, an e-mail is sent to a specific e-mail address. This e-mail address collects all of the e-mail from users who have not changed behavior and need additional education or management attention.

This invention relates to a computer system that aids in the behavior modification of computer users who unknowingly and innocently spread computer viruses, specifically by teaching computer users to avoid computer viruses with the use of mock computer viruses and feedback measurements.
The Battle Against Computer Viruses:
Computer viruses pose significant threats to computer systems. Viruses cause loss of data, destroy computer hardware, create negative impacts to computer networks and systems, and disrupt business, government, and personal affairs. In the battle against computer viruses, an entire industry was created to develop and sell "anti-virus" software to detect, remove, and insulate computers from viruses. Numerous patents have been granted to achieve these same goals. Examples of corporations within the anti-virus industry are Symantec and Network Associates. Currently, the control of viruses is dependent upon companies such as these to identify characteristics of viruses, write anti-virus software to detect viruses when encountered, and insulate computers from viruses. However, viruses are created faster than anti-virus software, and anti-virus software cannot always prevent outbreaks of virus infections. It is desirable to avoid the negative impacts of virus infections without reliance on software that needs to continually adapt to detect new specific viruses.
What Are Computer Viruses?
A computer virus is a program that invades computer host systems. Once inside a host system, the virus may replicate and create copies of itself. The virus may also cause damage to the host system. Viral programs can damage host systems by using the host file system to overwrite data in host systems, or over-write data stored in networks attached to host systems, or create numerous other disruptions or damage. In addition to damaging the host system, the virus may perpetuate itself by transmitting replicated copies to other computer systems. Most computer viruses use e-mail systems to transmit the replicated copies to other computer systems. By transmitting replicated copies of itself to other computer systems, the virus invades new host systems and continues the life-cycle of viral replication, host system damage, and transmission of duplicate virus programs.
How Computer Users Spread Viruses:
E-mail systems alone cannot activate viral programs within host systems. Viral programs require activation by computer users, and therefore viral programs are sent as file attachments to e-mail messages. The creators of the viral programs rely on computer users to open the infected file attachments. The viral programs activate when users open infected attached files. The term "open" means the user starts the program in the attachment or starts a program associated with the attachment. In Microsoft Windows and NT operating systems, data files are named in a two part format of the form xxxxxxxx.yyy, where the "." separates the user given name, "xxxxxxxx", from the extension, "yyy". The operating system uses the extension, "yyy", to select how the data file is to be treated when opened. For example if the extension is "exe", then the operating system treats the data file as an executable program and passes control to it when opened. Or, if the extension is "doc", the operating system associates the document with the Microsoft Word program, loads the Microsoft Word program, and passes control to the Microsoft Word program with the data file as an input file.
What Are Viral Infected E-Mail Attachments?
Viral infected e-mail attachments are of two types: 1) programs that execute when opened or 2) "macros" that execute when data files are opened as documents in other programs such as Microsoft Word. A macro is a program that is written in a language specific to another program such as Microsoft Word. Macros are used to automate sets of "user actions". Examples of macro "user actions" are the ability to open and write data files, and to send e-mail messages with attachments to recipients in the users' e-mail directories. Viral macros may use the previously described user actions and other functions to send replicated copies of itself as attachments to other e-mail users. The infected attachments may cause damage to data in the host system or to data in a network that is attached to the host system.
Life-Cycle of Computer Viruses:
The key to life or the goal of viruses is to replicate and transmit copies of itself to other computer systems. There are viral programs that can access the computer users' e-mail directory and the computer users' e-mail folders. This access allows the virus to send additional replicated viral attachments to associates of the user. The viral e-mail messages appear to originate from someone the recipient knows and trusts, when in fact the virus sends the e-mail message itself. The unsuspecting recipient opens the infected files due to the mistaken belief that the file is virus-free merely because the e-mail was sent from a familiar e-mail address. The opened and activated virus file repeats its cycle, and the virus succeeds in its continuous spread to other computer systems.
What Is Being Done?
Anti-virus companies such as Symantec and Network Associates attempt to stop viruses with the detection, removal, and insulation of computer viruses. Additionally, software creators of e-mail systems attempt to curb the spread of viruses by building features into e-mail programs that attempt to prevent the opening of viral attachments. For example, Microsoft Corporation added capabilities to recent releases of Outlook and Exchange e-mail programs that makes opening attachments with executable programs a two-step process. In the Microsoft Outlook e-mail program, an attachment to an e-mail appears as an icon in the body of the e-mail. The file name appears as text in the icon. The user "opens" the attachment by double clicking on the icon. The first step consists of a warning message that is displayed when the icon is double-clicked. The user must perform a second action to actually open the file. Consistent with this, recent releases of Microsoft Word and Excel have a similar two-step document opening process if there is a macro in the document. First the user is warned that there is a macro in the document. The second step requires the user to choose to not open the document, disable the macro and open the document, or open the document with an active macro. In spite of these virus avoidance measures, computer users continue to open attachments with viruses, which in turn harms their systems, and sends replicated viral copies to other unsuspecting computer systems. An article written by David L. Wilson and published in the Dec. 4, 1999 edition of the San Jose Mercury News is included as background information on how computer viruses damage, replicate and spread.

Computer virus avoidance system and mechanism


A card adapter includes a first memory card interface configured to be connected to a first memory card. The first memory card is associated with a first file system. The card adapter includes a second memory card interface that is configured to be connected to a second memory card. The second memory card is associated with a second file system. The card adapter also includes a host interface configured to connect to a host. The card adapter includes a controller operatively interposed between the first and second memory card interfaces and the host interface. The controller is configured to control the first memory card interface and the second memory card interface to control connections between each memory card that is connected thereto with the host. The controller is also configured to operate in each of two selectable modes. In a first mode the controller is operative to emulate a virtual file system that presents to the host the first file system and the second file system as a unified image. In a second mode, the controller presents to the host either the first file system of the first memory card connected to the first memory card interface or the second file system of the second memory card connected to the second memory card interface. The card adapter also includes a mode switch coupled to the controller and configured to receive a user selection of one of the two selectable modes.

Memory cards have become very popular because of their small size and large storage capacity. There are many types of memory cards in the market, which vary in the storage format, storage capacity, and form factor. Currently, different types of "multi-in-one" card readers exist, which enable memory cards of the same type, or of different types, to exchange data with a host device.
Memory cards known as the Mini Secured Digital ("SD") memory card and Micro SD memory card are exemplary types of memory cards that cannot operate with a card reader directly. The Micro SD memory card form factor for example, though widely used today, is too small and inconvenient for a user to directly mount it onto different types of hosts. In addition, many host devices commonly used today do not support the Micro SD form factor and, therefore, a memory card adapter is required in order for such host devices to use such memory cards.
There are conventional memory card adapters that are adapted to accommodate either a single Mini SD memory card or a single Micro SD memory card. These adapters, which are oftentimes called "micro-SD-to-SD" adapters, are implemented as a hardware component of the same size that requires the same operating voltage as a regular SD memory card. In addition, micro-SD-to-SD adapters are provided with means for converting micro-SD formatted data into SD-formatted data, and vice versa. However, the "micro-SD-to-SD" adapters have several drawbacks. For example, the size of an SD memory card form factor is larger than twice the size of one Micro SD card form factor. As such, the physical space of the memory card adapter is not efficiently exploited.
In addition, current memory card adapters do not support replacement of one memory card with another, for example for extending the available storage capacity. Replacing memory cards, as such, may impact the user experience and may lead to loosing data that is stored on the replaced memory card.
There is therefore a need to address memory card adapters in a way that would make such adapters more useful.


A distributed data processing system executes multiple tasks within a parallel job, including a first local task on a local node and at least one task executing on a remote node, with a remote memory having real address (RA) locations mapped to one or more of the source effective addresses (EA) and destination EA of a data move operation initiated by a task executing on the local node. On initiation of the data move operation, remote asynchronous data move (RADM) logic identifies that the operation moves data to/from a first EA that is memory mapped to an RA of the remote memory. The local processor/RADM logic initiates a RADM operation that moves a copy of the data directly from/to the first remote memory by completing the RADM operation using the network interface cards (NICs) of the source and destination processing nodes, determined by accessing a data center for the node IDs of remote memory.

1. Technical Field
The present invention relates generally to data processing systems and in particular to data operations within data processing systems. Still more particularly, the present invention relates to operations that move memory data during processing on a data processing system.
2. Description of the Related Art
Standard operation of data processing systems requires access to and movement and/or manipulation of data by the processing components. Application data are typically stored in memory and are read/retrieved, manipulated, and stored/written from one memory location to another. Also, the processor may also perform a simple move (relocation) of data using a series of load and store commands issued by the processor when executing the application code.
With conventional data move operations, the processor triggers the operating system to transfer data from one memory location having a first physical (real) address to another location with a different physical (real) address. Completing the data move operation typically involves a number of steps, including: (1) the processor issues a particular sequence of load and store instructions, which result: (a) a TLB performs an address translation to translate the effective addresses of the processor issued operation into corresponding real address associated with the real/physical memory: and (b) a memory or cache controller performing a cache line read or memory read of the data; (2) the TLB passes the real address of the processor store instruction to the memory controller (via a switch/interconnect when the controller is off-chip); (3) the memory controller acquires a lock on the destination memory location (identified with a real address) to prevent overwrite of the data during the data move operation; (4) the memory controller assigns the lock to the processor; (5) the processor receives the data from the source memory location (identified with a real address); (6) the processor sends the data to the memory controller; (7) the memory controller writes the data to the destination location; (8) the memory controller releases the lock on the destination memory location; and (9) a SYNC completes on the system fabric to inform the processor that the data move has finally completed and ensure that the memory subsystem retains the data coherency exists among the various processing units.
Inherent in the above process are several built-in latencies, which force the processor to wait until the end of most of the above processes before the processor may resume processing subsequently received instructions. Examples of these built in latencies include: (a) the TLB having to convert the effective address (EA) of the operation to the corresponding real address via the TLB or ERAT to determine which physical memory location that EA is pinned to; (b) the memory controller retrieving the data from the source memory location, directing the sourced data to the processor chip and then forwarding the data from the processor chip to the destination memory location; and (c) and lock acquisition process.
Generally, data operations are first completed at the user-level and then at the operating system (OS) level. For example, actual movement and modification of physical data within the distributed memory is provided for at the operating system level with real addresses corresponding to the real address space (of distributed memory) at which the data physically resides. However, similar operations are first provided for at the application or user level (via application code executing on the processor node) with virtual addresses (or effective addresses) utilized by the processor within a representative virtual address space. At the OS level, the actual movement (copying) of physical data is performed by one or more mechanisms associated with the interconnect.
In distributed data processing systems, in which a single job may have multiple tasks spread among multiple different nodes, each node may support a separate memory with separate mapping of a subset of effective addresses to real address space for that task/node. With these distributed systems, a call to move data is passed to the OS, which initiates a series of time-intensive and processor-intensive processes to determine the physical location of the real addresses to complete the data move. OS-level processing in a distributed system having multiple processing nodes requires a large number of operations at the node interconnect (or switch), and thus the data move incurs substantially large latencies.
Additionally, in most conventional systems, a large portion of the latency in performing data operations, such as with memory moves, involves the actual movement of the data from the first real address location (the source location) to the second real address location (the destination location). During such movement, the data is pinned to a specific real address to prevent the occurrence of a manage exception. The processor has to wait on completion of the address translation by the TLB and acquisition of the lock before proceeding with completing the operation and subsequent operations. Developers are continually seeking ways to improve the speed (reduce the latency) of such memory access data operations.

International Business Machines Corporation