An electrical device is disclosed, comprising electrical components forming an electrical circuit, with a trim circuit comprising two or more trim cells providing selectively removable resistances between first and second nodes in the electrical circuit. The resistance between the nodes is trimmed incrementally by application of trim signals to a single pair of terminals or pads on the device, allowing post-packaging trimming. Methods are also disclosed for selective removal of resistance between first and second nodes in a packaged electrical device.

The present invention relates generally to electronic devices and more particularly to improved trim circuitry and methods for trimming electrical devices before and/or after packaging.
Trim circuits are found in many types of electrical devices where a voltage, current, or other operational parameter of a device needs to be adjusted, either during or following manufacturing. Such trim circuitry typically provides a resistance between two nodes in an integrated circuit device, which may be selectively removed, in whole or in part, from the circuit upon application of voltages or currents to trim pads in the device. Trim circuits often employ zener diodes connected in parallel with the resistor to be removed, where the application of an appropriate trim voltage across the diode terminals short-circuits the resistor, sometimes referred to as xe2x80x9cblowingxe2x80x9d the diode. Other trim circuits selectively employ open-circuits to adjust the device performance. In this instance, fuses are often formed in the trim circuit, which can be selectively open circuited by conducting a fuse trim current through the fuse, sometimes referred to as xe2x80x9cblowingxe2x80x9d the fuse.
Resistive trim circuits are employed in a variety of electrical devices, including voltage reference or voltage regulator devices wherein one or more reference voltages generated by the device are adjusted during the manufacturing process. In the case of high precision reference voltage trimming, multiple trim cells are often employed to allow precise adjustment to the voltage of interest. This is commonly implemented by cascading a number of conventional parallel resistor/diode trim cells in series, with probe pads provided between each such trim cell to allow application of trim voltages to the individual cells. Thus, where N such trim cells are configured in series, N+1 pads are needed to allow selective access for trimming the individual cells. However, each probe pad occupies a significant amount of surface area in the device die, thereby limiting the area available for other devices. Thus, it is desirable to provide electrical devices having multi-bit trim circuitry occupying less overall real estate than the series configuration of multiple conventional trim cells.
In a typical trimming operation, pre-packaging probing is performed using test systems capable of probing conductive trim pads on the surface of the device die, either before or after separation of individual dies from a wafer. The test system measures the reference voltage and applies trim voltages to appropriate pairs of trim pads to selectively change the resistance affecting the reference voltage. The reference voltage is again measured, and if further trimming is desired, the process is repeated, with additional diodes being blown to remove further resistance and thereby provide further adjustment of the reference voltage. However, since packaged voltage regulator devices typically include only a small number of external pins or terminals (e.g., 3), mutli-bit trimming has thusfar been performed exclusively prior to packaging.
Electrical devices are commonly available in a wide variety of package sizes and types, for example, providing different footprint sizes and thermal cooling capabilities for both thru-hole and surface mount applications. In the case of voltage regulator devices, different package options are available, typically providing three terminals for an LM317 type regulator. However, the packaging process itself can cause changes in the device performance, which sometimes affects the reference voltage in a regulator device.
In this regard, the cooling of molding compound around the device die during packaging has been found to cause physical stress to the die and the components thereof. This stress in turn may cause a shift in an operational parameter in a device, such as the reference voltage value in a voltage regulator. In addition, the stress related reference voltage shift is different for different package types. Moreover, as device package sizes continue to decrease, the stress on the device dies increases. As a result, the stress-induced reference voltage shift is more pronounced. Accordingly, there is a need for trim circuits and methodologies allowing multi-bit trimming of voltage regulators and other electrical devices which compensate for stress-related changes in device performance.
The following presents a simplified summary in order to provide a basic understanding of one or more aspects of the invention. This summary is not an extensive overview of the invention, and is neither intended to identify key or critical elements of the invention, nor to delineate the scope thereof. Rather, the primary purpose of the summary is to present some concepts of the invention in a simplified form as a prelude to the more detailed description that is presented later.
The present invention provides methods and apparatus.for trimming electrical devices, which may be employed before or after device packaging. Thus, the invention may be employed to compensate for device performance changes resulting from packaging processes. In addition, the invention facilitates trimming of devices in multi-bit fashion, through application of one or more trim signals to a single pair of pads or terminals on the device. Thus, the trim apparatus of the invention provides multi-bit trimming while occupying less die space than prior multi-bit trimming circuitry. In one example illustrated and described below, a reference voltage in a three-terminal voltage regulator device may be adjusted through mutli-bit resistor trimming using an output terminal and an adjust terminal thereof after the device is packaged. Thus, the invention facilitates multi-bit adjustment to compensate for shifting in an operational parameter caused by packaging processes to improve the manufacturability of such devices with current packaging processes and materials.
One aspect of the invention provides an electrical device, comprising an electrical circuit with a plurality of electrical terminals or pins, and a trim circuit comprising one or more trim cells fabricated in the device substrate. The trim cells individually provide resistance between first and second nodes in the electrical circuit, where the resistance of the individual trim cells are selectively removable by application of a trim signal to first and second electrical terminals. In one implementation, application of a trim voltage to output and adjust pins or terminals of a voltage regulator device removes (e.g., short-circuits) a resistance from a trim cell nearest the adjust terminal. Subsequent application of a trim current to the output and adjust terminals disconnects the trim cell from the output terminal, to allow access to an adjacent trim cell in the trim circuit. The process may then be repeated if further resistance removal is desired, in order to bring the reference voltage within an acceptable range.
The trim cells individually comprise a resistor, providing a resistance between the first and second circuit nodes and a diode comprising an anode connected to an end of the resistor, a cathode, and a conductive portion connected to the cathode. The resistors of the individual trim cells are connected in series between the first and second circuit nodes, with the cathodes connected to the second trim terminal or pad. The first terminal is connected to the first circuit node, allowing access to the trim cells to trim one cell at a time, beginning with the trim cell closest to the first terminal. Application of a trim voltage across the terminals causes the conductive portion of the cell diode or that of an adjacent contact to electrically short-circuit the resistor. The trim cells may further comprise a fuse connected between the conductive portion of the diode and the second terminal to selectively disconnect the cathode from the second terminal after application of a trim current between terminals. This allows trimming of one cell at a time, with the trim voltage shorting the cell resistor, and the trim current disconnecting the trimmed cell from the second terminal, to allow trimming of the next cell, if desired.
Another aspect of the invention involves methods for selectively removing resistance between first and second nodes in a packaged electrical device. The methods may be employed in association with voltage regulators or other devices having first and second terminals associated with one or more trim cells in the device. The method comprises applying a trim voltage across the first and second terminals to short a first resistor, and applying a trim current between the first and second terminals to disconnect a first trim cell from the second terminal. The method may further comprise measuring an operating parameter associated with the electrical device, such as a reference voltage of a voltage regulator device, and determining if further trimming is desired according to the measured operating parameter. If further trimming is desired, the method provides for applying a second trim voltage across the terminals to short a second resistor, and applying a trim current between the terminals to disconnect a second trim cell from the second terminal.
To the accomplishment of the foregoing and related ends, the following description and annexed drawings set forth in detail certain illustrative aspects and implementations of the invention. These are indicative of but a few of the various ways in which the principles of the invention may be employed. Other aspects, advantages and novel features of the invention will become apparent from the following detailed description of the invention when considered in conjunction with the drawings.

Methods and apparatus for trimming packaged electrical devices


A semiconductor memory device capable of being electrically written and erased comprising a floating gate, wherein, a silicon nitride film is incorporated between the drain region and the floating gate. Also claimed is a method for forming the same, which comprises forming a drain region on selected portions of a semiconductor substrate; forming a silicon nitride film or a silicon oxinitride film or a silicon carbide film or an aluminum oxide film selectively on the drain region; coating the substrate with a gate oxide film; and establishing a floating gate and thereafter a control gate.

1. Field of the Invention
The present invention relates to a MOS (metal oxide semiconductor) memory device. More particularly, it relates specifically to a so-called EPROM (electrically programmable read-only-memory), EEPROM (electrically erasable programmable read only memory), or flash memory, i.e., to a type of semiconductor memory comprising a floating gate and a control gate, in which the information is stored by the carriers that are captured in the floating gate upon applying high voltage to the control gate.
In contrast to the conventional memory devices in which the repetition of erasing and writing of information is limited to a predetermined value due to damage of gate insulator films and the like at the introduction of carriers, the present invention provides, particularly, a semiconductor device which can be subjected far more frequently to erasing and writing. The application field of the memory devices, which was confined to a certain field for the conventional devices, is now extended not only to novel fields but also to the field in which other types of memory are now utilized. Accordingly, the present invention is applicable not only to the fields in which conventional EEPROM, EPROM, etc., are used to the present, but also to various fields in which RAMs (random access memories) are used.
2. Prior Art
Many research and development efforts are now paid for realizing finer, more highly integrated, and more functional semiconductor devices. In particular, the most remarkable progress can be found in the insulated gate field-effect semiconductor devices called MOSFETs (metal oxide semiconductor field-effect transistors). The metals used herein not only refer to pure metals, but it collectively encompasses semiconductor materials having sufficiently high electric conductivity, alloys of semiconductors with metals, and the like. The oxide to be placed between the metal and the semiconductor not necessary be a pure oxide, and insulators such as nitrides are sometimes used. In this context, the term "MOS" is not applicable to such structures in a strict sense; in the descriptions hereinafter, however, devices of field effect type having the structure above, inclusive of those comprising nitrides or other insulators in the place of oxides, are referred to as MOSFETs or MOS transistors.
A typical MOS transistor comprises a semiconductor substrate having provided thereon an oxide (insulator) such as silicon oxide as a gate oxide (gate insulator), and further thereon a metal, a semiconductor, etc., which functions as a gate electrode. The conductivity of the base semiconductor is controlled by varying the voltage which is applied to the gate electrode.
Also, there is known that a nonvolatile memory can be fabricated by establishing an electrically independent semiconductor film (i.e., a floating gate) on the gate oxide, and then providing thereon a gate electrode (i.e., a control gate). Those memories are commercially available as EPROMs and EEPROMs. In the memories of this type, the conductivity of the base semiconductor is semi-permanently fixed by applying an intense electric field to the gate electrode, thereby trapping charges such as electrons and holes in the floating gate film. Thus, of course, if the charge having implanted into the floating gate is removed by using an ultraviolet (UV) irradiation or an electric effect, the initial state can be recovered and hence the stored data can be erased. A semiconductor memory device can be assembled from such floating gate type M0S transistors alone, or from a combination of those with other transistors.
The memories using the elements described above are, in contrast to the RAM devices such as DRAMs (dynamic random access memory) and SRAMs(static random access memory), operable without using a power source. Furthermore, when compared with a DRAM, in particular, the memories of the type above can be used free of capacitors. Hence, they are now the subject of active study because they can minimize the cell area per bit in fabricating a memory of 16 MB or more in size and are thereby best suited for realizing higher integration. Among them, particular attention is paid to the EEPROMs.
It should be noted, however, that the MOSFETs having the floating gate above are different from the RAMs in one point, i.e., that the MOSFETs of this type cannot be subjected to writing and erasing processes for an infinite times. Thus, ROM devices are put into one category separately from the RAMs. It is guaranteed for a commercially available EEPROM to endure writing and erasing data for 10,000 to 100,000 times. If such a memory device were to be assembled into a computer as a temporal data memory in the place of a conventionally employed RAM, it must be guaranteed to endure for at least 100,000 times, and preferably 1,000,000 times of repeated writing and erasing processes.
The conventional types of EEPROMs can resist only to limited times of writing and erasing, because the gate oxide film under the floating gate suffers serious damage upon implanting carriers into or drawing them out from the floating gate. More specifically, the interatomic bonds inside the insulator layer (a silicon oxide film, in general) are cut by the high energy carriers passing therethrough to form defects such as trap levels. Once such defects are formed, the carriers easily move through the insulator layer and allow the charge having accumulated in the floating Mate to escape. If such a phenomenon occurs, the EEPROM no longer functions as a memory device, or its reliability is almost lost.
It is preferred to use a material having a strong interatomic bond for the insulator layer to cope with the aforementioned problems. For example, silicon nitride and aluminum oxide can be suitably used as the insulator layer. However, those insulating materials, on the other hand, develop poor interfacial states with a semiconductor (silicon) substrate; i.e., the development of a trap level disturbs electric conductivity in the channel region of the MOS or lowers the mobility of the carriers.
The EEPROM is believed promising for use as a flash memory, i.e., a special type of a nonvolatile memory to replace DRAMs, but the market is yet to be matured due to the limits concerning the repetition of writing.

Method of forming semiconductor memory device by selectively forming an insulating film on the drain region

Semiconductor Energy Laboratory Co., Ltd.


A data packet transmission system having a succession of stations each connected to two buses transmitting in opposite directions, both packets and time-slot requests has its capacity improved by means of a request-erase counter at each station for each bus, making possible more efficient use of time slots. Except for the different combinations of status and expectable occurrence, the queuing protocol known as DQDB, optionally is modified by D.sup.3 Q protocol, is used. For those ten situations where time-slot-request bit resetting (erasing) comes into play, status is defined by the state of certain counters while expectable occurrences are arrivals at a station's access unit of a time-slot that is empty or contains a data packet or a request bit and also the use, if any, made of the arriving time slot by the access unit of the station. The actions produced in those ten instances are in terms of setting or resetting a request bit and advancing, reducing or resetting contents of one or more counters.

A method of this type is described in European Patent Application EP-A-0203165 under the name QPSX protocol, but in the meantime it has become better known in specialist circles by the name DQDB protocol, which name will also be used for it hereinafter.
According to the DQDB protocol, use is made of two transmission channels, in general data buses, with mutually opposing communication directions. A series of successive access units is connected to the two buses. The information to be transmitted is transferred from temporary storage to time slots of a fixed size (53 bytes).
Access units which have data to transmit select one of the two buses according to the destination of the data, for example. The data packets to be transmitted are dispatched via the time slots passing by in the chosen direction after first completing an access protocol relating to time slots for each time slot involved. This access protocol proceeds as follows:
An access unit which receives a report from outside the transmission system above described for transmission of a data packet in the transmission direction of bus 1 places, as soon as this is possible, a bus 1 request bit for a time slot (hereinafter referred to simply as a request bit) in a predetermined section of a time slot on bus 2. By this means the access units downstream in the transmission direction of bus 2, therefore upstream in the transmission direction of bus 1, are informed that a packet is ready for transmission on bus 1 and that these access units must allow an empty time slot to pass by on bus 1 for that packet. In this way, as it were, a distributed FIFO buffer is constructed for each bus. For this mechanism a so-called request counter, a so-called countdown counter and a so-called still to be transmitted or untransmitted request counter are provided for each bus in each access unit.
If an access unit has nothing to transmit, the passage of a request bit on bus 2, for example, results in the content of its request counter belonging to bus 2 being increased by one (incremented). The bus 2 request counter in every access unit downstream on bus 2 thus contains an indication of the number of requests for transmission slots on bus 1. Conversely, the request counter for bus 1 in every access unit downstream on bus 1 contains an indication of the number of requests for transmission slots on bus 2. Each empty time slot, i.e. each possibility for transmitting data, which passes by an access unit on bus 1 results in the content of the request counter of bus 2 at the same access unit being reduced by one (decremented), and vice versa regarding bus 2 and bus 1.
In the following discussion of what happens when an access unit does have a packet to transmit, the term "the relevant access unit" means a particular access unit taken as an example for the purpose of the explanation.
When the relevant access unit has received data for transmission on bus 1, the content of the request counter of bus 2 is transferred to the countdown counter of bus 1 and the request counter of bus 2 is reset to zero. The countdown counter consequently contains information with regard to the number of requests passed on or originated before the relevant access unit had a data packet ready for transmission and the bus 2 request counter from that point in time starts to record the information with regard to the number of requests which were passed on or originated after that data packet was ready for transmission. For the relevant access unit to be able to transmit this data packet, a request bit must be transmitted on bus 2; the first step for so doing is the incrementing of the contents of the request counter and the untransmitted request counter of bus 2. As soon as the relevant access unit becomes able to transmit a request bit on bus 2, the content of the untransmitted request counter is decremented. In principle, a request bit is transmitted for each data packet to be transmitted. When an empty time slot passes by on bus 1, the content of the countdown counter of bus 1 is decremented, and when the content of the countdown counter consequently becomes zero, a data packet may be dispatched on bus 1 in the first subsequent empty time slot.
A drawback of the DQDB protocol is that the capacity of the buses for the transmission of data is not put to optimum use, because a request bit always passes through to the end of the bus, so that the situation can arise that empty time slots are reserved when that is no longer necessary, because the access unit which transmitted this request bit has already been able to transmit its data.
Significantly another protocol which is known in specialist circles by the name D.sup.3 Q protocol and which can be regarded as an improvement of the DQDB protocol has recently been proposed in the as yet unpublished Swiss Patent Application CH-A-00566/89-8. In this protocol use is made of the same reservation mechanism for time slots as in the DQDB protocol. An important difference from the DQDB protocol is, however, that request bits can be removed from a bus if they have become superfluous because the requesting access unit has already become able to transmit a data packet. This is called "erasure" of a request bit and is performed in the following way:
By means of an empty slot counter, each access unit records the number of empty time slots passing by on a bus for which no request has been submitted on the other bus. The empty slot counter thus contains information with regard to the number of possibilities for transmission which an access unit has allowed to pass through. If the content of the empty slot counter is not zero when a request is received on the other bus by means of a request bit in a time slot, it is then possible to erase that request bit by resetting it, because a possibility for transmission (an empty time slot) has already been allowed to pass through beforehand by the access unit. At the same time, the content of the empty slot counter is decremented, because one possibility for transmission is going to be used.
If the content of the empty slot counter is zero, each incoming request bit is allowed to pass through and the content of the request counter is incremented. The two counters can therefore never simultaneously have a content with a value greater than zero.
The request counter contains information with regard to the number of empty-time-slot requests either originated or passed on by the access unit on the particular channel. If the access unit has no packet to transmit the request counter content shows only passed-on requests. If in this situation an empty time slot passes by, the time slot is allowed to pass through and the content of the request counter is decremented.
In order to prevent a single empty time slot passing by several access units in each of which a request bit is reset, use is made of a handshake protocol which involves each station that receives and forwards an empty time slot, by which the content of the empty slot counter of an access unit is incremented. The preceding upstream access unit which forwarded the empty time slot needs to be informed that the empty time slot has been received. For this purpose a "handshake" request bit is transmitted in a time slot on the other bus, which results in the content of the empty slot counter in the preceding upstream access unit being decremented and the "handshake" request bit being erased (reset).
An advantage of the D.sup.3 Q protocol over the DQDB protocol is that request bits no longer pass through the entire bus. They cease reserving further empty time slots as soon as the request bits have passed by "their" empty time slot.
However, if the D.sup.3 Q protocol were to be combined with time slot erasure techniques, such as destination deletion, that is to say that emptying of a time slot when it has arrived at the packet destination, which can be desirable in order, on the one hand, to increase further the efficiency of the use of the transmission channels and, on the other hand, to make it possible to use the D.sup.3 Q protocol in a ring structure, a problem arises which will be illustrated with reference to a), b) and c) of FIG. 1.
FIG. 1 shows, by way of example, three access units or stations 7, 8 and 9. The bus 1 is always indicated diagrammatically above these stations and the bus 2 below these stations. The time slots are shown, likewise diagrammatically, as rectangles and are divided into a first section in which, inter alia, a request bit can be placed, and a second section for the data. If one of these sections is hatched in the figure, this means that it contains, respectively, data or a request bit, while the numeral in the hatched section indicates the station for which the data is intended or the station which has originated the request bit. The stages a), b) and c) of FIG. 1 show three successive steps, in which a time slot moves to the next station between successive steps.
It is assumed that, as shown in FIG. 1a, station 7 is ready to transmit data. For this purpose that station places a request bit in a time slot which, seen in the figure, goes via the bus 2 to the left. In the stations 8 and 9 this request bit causes the content of the request counter (RC) to be incremented, which is indicated by RC=1. It is then assumed that as shown in FIG. 1b, a filled time slot arrives via the other bus with a data packet which is intended for station 8.
FIG. 1b shows that the status of station 9 does not change. Station 8 reads the contents of the time slot and erases these (destination deletion) and decrements the content of the request counter belonging to this station because an empty time slot, and thus a possibility for transmission, is forwarded. Subsequently, as is shown in FIG. 1c, station 7 can transmit its data in this empty time slot. However, in station 9 a request for an empty time slot is still recorded in the request counter, whereas station 7 has already transmitted the data. In this way, more time slots are thus reserved than are needed and the effective capacity of the bus is reduced.
If the D.sup.3 Q protocol is to be used in a ring structure in which the ends of each of the buses are linked together, with a mechanism being provided for erasing the data contents from a time slot when it has reached its destination, this would lead to substantial problems because, as described above, request bits which have become superfluous remain recorded in request counters, which in the course of time would lead to a reduction in the effective capacity and ultimately to the complete standstill of communication on the ring.

Method for improving the transmission of information in the form of data packets, in accordance with a distributed queuing protocol


Cyclic vinylogous amides of Formula I are disclosed

Technical Field
The present application relates generally to compositions for treating diseases that arise from inappropriate activity of proteins containing an acetyl-lysine. The compositions comprise a genus of cyclic vinylogous amides that are inhibitors of bromodomain.
Background Information
BRD4 is a member of the bromodomains and extra terminal domain (BET) family of proteins that recognize acetylated chromatin structures through their bromodomains and act as transcriptional activators. Brd4 functions as an associated factor and positive regulator of P-TEFb, a Cdk9-cyclin T heterodimer that stimulates transcriptional elongation by RNA polymerase II. Bromodomain-containing protein 4 (BRD4) contains two tandem bromodomains (BrD1 and BrD2) that bind preferentially to acetylated lysine residues found in histones and nonhistone proteins. This molecular recognition allows Brd4 to associate with acetylated chromatin throughout the cell cycle and regulates transcription at targeted loci.
Acute myeloid leukemia (AML) is a life-threatening stem cell disease characterized by uncontrolled proliferation and accumulation of myeloblasts. In a recent current study, Herrmann et al. [Oncotarget. 2012 December; 3 (12):1588-99] showed that inhibition of BRD4 by a small-molecule inhibitor, JQ1, leads to growth-inhibition and apoptosis in primary human AML stem- and progenitor cells, including cells derived from relapsed or refractory patients. In addition, JQ1 was found to induce apoptosis in CD34+/CD38− and CD34+/CD38+ stem- and progenitor cells in all donors. BRD4-inhibition is therefore recognized as promising new therapeutic approach in AML.
NF-κB-mediated inflammation is the major pathology in chronic kidney diseases, including HIV-associated nephropathy that ultimately progresses to end stage renal disease. HIV infection in the kidney induces NF-κB activation, leading to the production of proinflammatory chemokines, cytokines, and adhesion molecules. In a study published in the Journal of Biological Chemistry, Zhang et al. [J Biol Chem. 2012 Nov. 9; 287(46):38956] showed that a Bromodomain and Extra-Terminal domain-specific bromodomain inhibitor MS417 effectively ameliorated inflammation and kidney injury in HIV-1 transgenic mice, an animal model for HIV-associated nephropathy.
Thus, there is a need for inhibitors of BRD4 as therapeutic agents for leukemia and HIV-associated nephropathy.

Cyclic vinylogous amides as bromodomain inhibitors

Abstract: The compounds are useful for treating diseases that arise from inappropriate activity of proteins containing an acetyl-lysine. The compositions comprise a genus of cyclic vinylogous amides that are inhibitors of bromodomain.


An optical path control system is provided. The optical path control system includes a converging lens used to converge a plurality of light beams passing through the converging lens, and an optical path assembly used to control propagation directions of the plurality of light beams passing through the optical path assembly. When the plurality of light beams pass through the optical path assembly and the converging lens sequentially, the optical path assembly converges the plurality of light beams, and the converging lens converges each of the plurality of light beam into a point of light.

In optical communications, differences in channel spacing for connected optical communication devices frequently requires the light beam spacing to be adjusted to a suitable range before coupling and transmission is carried out. In addition, given the relatively small size of the light passage apertures of photoelectric detectors, it is difficult for all divergent light beams to couple into the photoelectric detectors, resulting in signal loss.

Optical path control system and optical module


A remote regulator adjustment tool that can be used to adjust an output pressure of a remote regulator. The remote regulator adjustment tool comprises a housing defining a first bore extending therethrough, an adjustor piston movably disposed within the first bore, and an adjustment knob attached to the adjustor piston.

When handled properly from brewery to bar to glass, draught beer delivers what many consider to be the freshest, most flavorful beer available to the customer. But the job does not end once the keg is tapped and the beer begins to flow. Good beer quality depends on proper setting of a pour pressure, i.e. the pressure extant within the beer keg itself.
Using prior art assemblies, a plurality of beer kegs receive pressurized CO2 gas from a single, high pressure source. A source regulator is often interconnected to the output end of the CO2 source, wherein that source regulator reduces the source pressure from hundreds/thousands of psi to a line pressure of about 35-50 psi. That same line pressure is utilized to dispense a plurality of differing beers from a corresponding plurality of individual beer kegs.

Remote regulator pressure adjustment tool and method using same


An image is reconstructed based upon a filtered backprojection (FBP) technique using a reconstruction filter which is customized or shaped by parameters including a weight value that is determined for weighing projection data according to a predetermined noise model. The weight value is determined based upon rays or views in the projection data. A regularization term is also combined with the noise-weighted FBP.

The filtered backprojection (FBP) algorithm is generally simple and efficient and is used to reconstruct images in nuclear medicine, x-ray CT and MRI. The FBP algorithm has been the workhorse in X-ray CT and nuclear medicine image reconstruction thanks to its computational efficiency. Although FBP is efficient, it undesirably produces noisy images particularly from data acquired at a low dose of X-ray.
As a general trend, the FBP algorithm is gradually being replaced by iterative algorithms despite its use for several decades. The FBP algorithm undesirably generates images with noise. Furthermore, prior art indicates that the FBP algorithm is not capable of incorporating a noise model for reducing the noise level. In this regard, iterative algorithms optionally incorporate a projection noise model and produce less noisy images than the FBP algorithm. Yet, iterative algorithms generally require intense computation.
Despite the computational requirements, iterative algorithms advantageously produce noise-resolution balanced images using maximum a posteriori (MAP). In contrast, prior art indicates that the FBP algorithm is not capable of taking advantage of MAP or prior image information.
In view of the above discussed prior art issues, a practical solution is still desired for a method and a system in reconstructing an image using the FBP algorithm to substantially reduce noise in the image without losing computational efficiency.

Method and system for generating image using filtered backprojection with noise weighting and or prior in


A check valve manifold assembly contains multiple inlet and outlet ports extending through a housing into a fluid passageway. The fluid passageway interconnects the various ports, and the housing further contains multiple check valves, one such valve being associated with each of the ports. When used with an active perfusion pump, the manifold system permits easy and proper perfusion of the patient at high pressures.

The present invention relates generally to equipment employed in the performance of angioplasty procedures including use within percutaneous transluminal coronary angioplasty (PTCA) systems and more particularly, to a check valve manifold assembly which interconnects a perfusion pump to a PTCA catheter or the like.
The use of inflatable balloon, or dilation, catheters in the treatment of coronary conditions is widespread. Catheters are used for a number of medical purposes, such as injecting radiopaque fluids into patient's body to perform an angiogram to locate blockage of arteries or other body vessels and expanding against such blockages to open them. Balloon catheters are used in expanding a blockage, commonly referred to as a stenosis, which is a narrowing or stricture of an artery or other body vessel.
In PTCA, a guide catheter is introduced into the artery of the patient and guided through the artery until the distal tip of the catheter is in the desired location of the coronary artery near the stenosis. A dilation catheter which has an inflatable balloon affixed to its distal end is then introduced along the guide catheter and advanced into the patient until the balloon end is located at the stenosis. Once located, the balloon is inflated so that it expands against the artery walls, thereby expanding, or dilating, the artery and compressing the stenosis This expansion often removes all of or a significant portion of the blockage. The balloon may be inflated against the arterial walls for only one specific time or it may be repeatedly inflated and deflated in a cycle matching the heartbeat of the patient.
Once the artery is expanded, the balloon is deflated and the balloon and guide catheters are removed so that blood may again flow through the artery. The literature describes a restenosis rate of about 15-30% which occurs in PTCA. Restenosis describes the situation where the arterial wall is expanded by the balloon and the arterial blockage is opened, but the arterial wall contracts and adopts its original, restricted state some time after the balloon is deflated and removed. There exists a belief that this restenosis rate can be lowered if longer inflation times are used during balloon catheterization procedures.
Longer balloon inflation times may be accompanied by a significant disadvantage: ischemia of the cardiac muscles. Ischemia is a local, or temporary, deficiency of oxygen in an area of the body caused by an obstruction in the blood vessel which supplies blood to that area. Because of the stenosis, the body parts or areas distal of the stenosis may already be in jeopardy.
In order to prevent ischemia, efforts have been made to develop coronary angioplasty catheters which are perfusion catheters; that is, they permit the flow of blood across or through the angioplasty balloon during inflation thereof. The perfusion of blood through a balloon catheter may be accomplished in several ways. The balloon may have one or more dedicated passages formed therein which define flow channels extending through the balloon from one end to the other and which permit the passage of blood through/across the balloon. A balloon catheter may also have a multi-lumen catheter in which one of the lumens serves exclusively as a passage to carry blood through the inflated balloon area.
Whatever the perfusion procedure and catheter structure, the blood preferably should be passed through the inflated balloon area at a specific flow rate to avoid ischemia, such as 60 cc per minute. This flow rate may be affected by certain variables, such as the diameter of the perfusion lumen which carries the blood. Because of the generally minute diameters of lumens used in PCTA procedures, an external or extracorporeal pump is commonly used to assist in the perfusion procedure, rather than rely upon the patient's heart to pump blood through the inflated balloon area. The extracorporeal pump receives blood from the patient and circulates it through the catheter and past the distal end of the balloon. These pumps may either be hand-operated syringes or conventionally powered pumps. Where syringes are used as the perfusion pumps, it is desirable to ensure continuous circulation of the blood, by the use of dual syringes connected such that as one syringe pumps blood into the patient through the balloon catheter, the other syringe draws blood from the patient into the pumping chamber and remains in a ready condition.
It is therefore desirable to provide a means for interconnecting perfusion pumps with a PCTA catheter and directing the flow of body fluids therefrom. It is especially desirable that such a means be compact and reliable and resistant to the high pumping pressures associated with perfusion.
Some extracorporeal manifolds exist, such as that described in U.S. Pat. No. 4,447,230 issued May 8, 1984. This manifold is used in association with intravenous administration of fluids and has a plurality of inlet ports arranged in an in-line fashion along a common axis in the form of tee-shaped members interconnected together. Each inlet port includes a check valve which permits one way flow of the fluids from a bag into the manifold, catheter and patient. In such an assembly, the ports and associated valves are designed for low pressures because they receive their fluids from solution bags in which the flow for intravenous administration is promoted by gravity rather than by an active pumping means.
Accordingly, it is an object of the present invention to provide an extracorporeal valve manifold assembly to use in PTCA procedures which manifold is resistant to high pumping pressures, is compact and permits interconnection of one or more perfusion pumps with a perfusion catheter and a supply catheter.
Another object of the present invention is to provide a check valve manifold assembly which is suitable for use in PCTA systems and which interconnects multiple perfusion pumps with a PCTA catheter and the patient.
Another object of the present invention is to provide a unique compact valve manifold assembly having a fluid passage which directs flow between an inlet and outlet, the assembly having a plurality of valves arranged in a housing, the fluid passage interconnecting the inlet and outlet with multiple pumping ports, each of the pumping ports having a check valve associated therewith capable of resisting high perfusion pumping pressures, in which the check valves are arranged so as to operate reliably regardless of whether blood is being perfused or aspirated.
The present invention accomplishes these objects by providing a compact valve manifold assembly having multiple valves in fluid communication with multiple ports of the manifold. These ports include a manifold inlet, a manifold outlet and one or more pump ports which are connected to multiple perfusion pumps. Two syringes may be used as perfusion pumps which are preferably synchronized so that when one of the two syringes is withdrawing, or aspirating, blood from a patient, the other syringe is pumping, or perfusing it back into the patient through the perfusion catheter to the distal end of the inflation balloon. The manifold includes a fluid passage in communicating with the inlet, outlet and pumping ports and having a plurality of check valves. The check valves may be located at equal distances within the fluid passage of the assembly so as to provide distinct flowpaths, or subpassageways with equal flow resistance so that no single flowpath has a pressure drop greater than the other. Additional ports may be provided in the assembly which communicate with the fluid passage to enable connection to the assembly of exterior fluid pressure actuated devices, such as pressure gauges and relief valves.
These and other objects, features and advantages of the present invention will be clearly understood through a consideration of the following detailed description.

Check valve manifold assembly for use in angioplasty


Each of a plurality of option devices includes a signal changing unit connected to a first control unit of a recording apparatus without a second control unit of another option device and configured to change a signal supplied from the first control unit, and a communication line configured to connect the first control unit and the second control unit without the second control unit of another option device. The first control unit determines the number of the option devices by inputting a signal to the signal changing unit in each of the plurality of option devices. After that, in the case where communication can be performed between the first and second control units, it is determined that the second control unit of the option device is normal. In the case where the communication cannot be performed, it is determined that the second control unit is faulty.

1. Field of the Invention
The present invention relates to a recording system to which a plurality of option devices can be connected to a recording apparatus, a recording apparatus, and an option device.
2. Description of Related Art
A recording system having a recording apparatus and a plurality of option devices connected in series to the recording apparatus is known. In the recording system, a control unit (for example, a CPU) is provided to the recording apparatus and each of the plurality of option devices. The control unit of each of the plurality of option devices is connected only to a control unit of another option device which is adjacent in series connection or a control unit of an adjacent recording apparatus so that communication can be performed. Therefore, communication between the control unit of the recording apparatus and the control unit of the option device in any of the second or subsequent stages in the series connection is performed via the control unit of another option device disposed therebetween.
In such a recording system, there is a known technique that a control unit of a recording apparatus transmits data synchronously with the rising edge of a clock to a control unit of an option device in the first stage and grasps the number of option devices connected to the recording apparatus on the basis of the number of clocks until the data returns to the control unit of the recording apparatus via the control units in the option devices in the second and subsequent stages.

Recording system, recording apparatus, and option device


Embodiments are directed to a system for implementing a restricted-operation region. The system includes an instruction development module configured to be utilized in the development of a set of instructions that implement an operation policy of the restricted-operation region. The set of instructions is configured to, when interpreted, implement the operation policy by controlling at least one function of a vehicle that attempts to operate within the restricted-operation region. The system further includes a first transmitter configured to transmit the set of instructions to the vehicle, wherein a processor of the vehicle is configured to interpret the set of instructions based at least in part on a determination that the vehicle is attempting to operate within the restricted-operation region.

The present disclosure relates in general to systems and methodologies for implementing a restricted-operation region for unmanned vehicles. More specifically, the present disclosure relates to systems and methodologies for defining a restricted-operation region and implementing an operation policy for controlling the operation of an unmanned vehicle that attempts to operate within the restricted-operation region.
Unmanned vehicles (UVs) include unmanned aerial vehicles (UAVs), unmanned ground vehicles (UGVs) and unmanned underwater vehicles (UUVs). UVs have been developed for both civilian and military use to perform a variety of dangerous activities. For example, UVs can be used for applications where it may be inconvenient, dangerous or impossible to have a human operator present. UVs may be expendable or recoverable and can be operated autonomously or remotely. Historically, a significant use of UVs has been in the areas of intelligence surveillance and reconnaissance. Accordingly, a typical UV includes cameras and other surveillance equipment that capture intelligence.
UAVs are defined as powered aerial vehicles sustained in flight by aerodynamic lift over most of their flight path and guided without an onboard crew. UGVs are defined as vehicles that operate while in contact with the ground and without an onboard human presence. In a typical configuration, the UGV includes a set of sensors to observe the environment. The UGV will typically either autonomously make decisions about its behavior or pass the information to a human operator at a different location who will control the vehicle remotely.
Although UVs have a long history of military use, their commercial and consumer uses are more recent. Federal, state and local laws have struggled to develop consistent and coherent regulations covering commercial and consumer uses of UVs. The actual and potential problems with commercial and consumer use of UVs are numerous including infringement of privacy rights, breach of civil aviation regulations and data protection issues. The proliferation of consumer UVs has generated news stories about unfortunate occurrence involving consumer UVs. One example of such an occurrence reportedly involved a consumer UAV that flew into a fireworks show to capture aerial video of the fireworks. The UAV crashed into the middle of the crowd injuring at least one person before it was immobilized with a chair leg. UAVs may be damaged during flight in a way that would prevent the operator from safely operating the device, resulting in a "fly-off" or a crash landing into spectators. UAV flights into fireworks shows may also be unsafe because of the increased risk of hazardous debris (from the fireworks or the UAV) falling into spectator areas. There is also the possibility that a firework colliding with a UAV may divert the pyrotechnic downward into spectator areas, causing it to detonate where it otherwise should not.
Geo-fencing is a feature that uses the global positioning system (GPS) or radio frequency identification (RFID) to define geographical boundaries. Geo-fencing is often utilized in software programs to act as a virtual barrier. Programs that incorporate geo-fencing allow an administrator to set up triggers such that when a device enters (or exits) the boundaries defined by the administrator, a text message or email alert is sent. Geo-fencing technology has been proposed for application in several systems. For example, a network administrator can set up alerts such that when a hospital-owned iPad leaves the hospital grounds, the administrator can disable the device. A marketer can geo-fence a retail store in a mall and send a coupon to a customer who has downloaded a particular mobile app when the customer (and his/her smart phone) crosses the boundary.
It has been proposed to apply the concepts of geo-fencing to a UAV in order to keep the UAV within a prescribed area.

This patent is subject to a terminal disclaimer.

Implementing a restricted-operation region for unmanned vehicles

INTERNATIONAL BUSINESS MACHINES CORPORATION


The present invention relates to mosaic HIV-1 group M Gag sequences and to a composition comprising same.

Designing an effective HIV vaccine is a many-faceted challenge. The vaccine preferably elicits an immune response capable of either preventing infection or, minimally, controlling viral replication if infection occurs, despite the failure of immune responses to natural infection to eliminate the virus (Nabel, Vaccine 20:1945-1947 (2002)) or to protect from superinfection (Altfeld et al, Nature 420:434-439 (2002)). Potent vaccines are needed, with optimized vectors, immunization protocols, and adjuvants (Nabel, Vaccine 20:1945-1947 (2002)), combined with antigens that can stimulate cross-reactive responses against the diverse spectrum of circulating viruses (Gaschen et al, Science 296:2354-2360 (2002), Korber et al, Br. Med. Bull. 58:19-42 (2001)). The problems that influenza vaccinologists have confronted for decades highlight the challenge posed by HIV-1: human influenza strains undergoing antigenic drift diverge from one another by around 1-2% per year, yet vaccine antigens often fail to elicit cross-reactive B-cell responses from one year to the next, requiring that contemporary strains be continuously monitored and vaccines be updated every few years (Korber et al, Br. Med. Bull. 58:19-42 (2001)). In contrast, co-circulating individual HIV-1 strains can differ from one another by 20% or more in relatively conserved proteins, and up to 35% in the Envelope protein (Gaschen et al, Science 296:2354-2360 (2002), Korber et al, Br. Med. Bull. 58:19-42 (2001)).
Different degrees of viral diversity in regional HIV-1 epidemics provide a potentially useful hierarchy for vaccine design strategies. Some geographic regions recapitulate global diversity, with a majority of known HIV-1 subtypes, or clades, co-circulating (e.g., the Democratic Republic of the Congo (Mokili & Korber, J. Neurovirol 11(Suppl. 1):66-75 (2005)); others are dominated by two subtypes and their recombinants (e.g., Uganda (Barugahare et al, J. Virol. 79:4132-4139 (2005)), and others by a single subtype (e.g., South Africa (Williamson et al, AIDS Res. Hum. Retroviruses 19:133-144 (2003)). Even areas with predominantly single-subtype epidemics must address extensive within-clade diversity (Williamson et al, AIDS Res. Hum. Retroviruses 19:133-44 (2003)) but, since international travel can be expected to further blur geographic distinctions, all nations would benefit from a global vaccine.
Presented herein is the design of polyvalent vaccine antigen sets focusing on T lymphocyte responses, optimized for either the common B and C subtypes, or all HIV-1 variants in global circulation [the HIV-1 Main (M) group]. Cytotoxic T-lymphocytes (CTL) directly kill infected, virus-producing host cells, recognizing them via viral protein fragments (epitopes) presented on infected cell surfaces by human leukocyte antigen (HLA) molecules. Helper T-cell responses control varied aspects of the immune response through the release of cytokines. Both are likely to be crucial for an HIV-1 vaccine: CTL responses have been implicated in slowing disease progression (Oxenius et al, J. Infect. Dis. 189:1199-208 (2004)); vaccine-elicited cellular immune responses in nonhuman primates help control pathogenic SIV or SHIV, reducing the likelihood of disease after challenge (Barouch et al, Science 290:486-92 (2000)); and experimental depletion of CD8+ T-cells results in increased viremia in SIV infected rhesus macaques Schmitz et al, Science 283:857-60 (1999)). Furthermore, CTL escape mutations are associated with disease progression (Barouch et al, J. Virol. 77:7367-75 (2003)), thus vaccine-stimulated memory responses that block potential escape routes may be valuable.
The highly variable Env protein is the primary target for neutralizing antibodies against HIV; since immune protection will likely require both B-cell and T-cell responses (Moore and Burton, Nat. Med. 10:769-71 (2004)), Env vaccine antigens will also need to be optimized separately to elicit antibody responses. T-cell-directed vaccine components, in contrast, can target the more conserved proteins, but even the most conserved HIV-1 proteins are diverse enough that variation is an issue. Artificial central-sequence vaccine approaches (e.g., consensus sequences, in which every amino acid is found in a plurality of sequences, or maximum likelihood reconstructions of ancestral sequences (Gaschen et al, Science 296:2354-60 (2002), Gao et al, J. Virol. 79:1154-63 (2005), Doria-Rose et al, J. Virol. 79:11214-24 (2005), Weaver et al, J. Virol., in press)) are promising; nevertheless, even centralized strains provide limited coverage of HIV-1 variants, and consensus-based reagents fail to detect many autologous T-cell responses (Altfeld et al, J. Virol. 77:7330-40 (2003)).
Single amino acid changes can allow an epitope to escape T-cell surveillance; since many T-cell epitopes differ between HIV-1 strains at one or more positions, potential responses to any single vaccine antigen are limited. Whether a particular mutation results in escape depends upon the specific epitope/T-cell combination, although some changes broadly affect between-subtype cross-reactivity (Norris et al, AIDS Res. Hum. Retroviruses 20:315-25 (2004)). Including multiple variants in a polyvalent vaccine could enable responses to a broader range of circulating variants, and could also prime the immune system against common escape mutants (Jones et al, J. Exp. Med. 200:1243-56 (2004)). Escape from one T-cell receptor may create a variant that is susceptible to another (Allen et al, J. Virol. 79:12952-60 (2005), Feeney et al, J. Immunol. 174:7524-30 (2005)), so stimulating polyclonal responses to epitope variants may be beneficial (Killian et al, Aids 19:887-96 (2005)). Escape mutations that inhibit processing (Milicic et al, J. Immunol. 175:4618-26 (2005)) or HLA binding (Ammaranond et al, AIDS Res. Hum. Retroviruses 21:395-7 (2005)) cannot be directly countered by a T-cell with a different specificity, but responses to overlapping epitopes may block even some of these escape routes.
The present invention relates to a polyvalent vaccine comprising several "mosaic" proteins (or genes encoding these proteins). The candidate vaccine antigens can be cocktails of k composite proteins (k being the number of sequence variants in the cocktail), optimized to include the maximum number of potential T-cell epitopes in an input set of viral proteins. The mosaics are generated from natural sequences: they resemble natural proteins and include the most common forms of potential epitopes. Since CD8+ epitopes are contiguous and typically nine amino-acids long, sets of mosaics can be scored by "coverage" of nonamers (9-mers) in the natural sequences (fragments of similar lengths are also well represented). 9-Mers not found at least three times can be excluded. This strategy provides the level of diversity coverage achieved by a massively polyvalent multiple-peptide vaccine but with important advantages: it allows vaccine delivery as intact proteins or genes, excludes low-frequency or unnatural epitopes that are not relevant to circulating strains, and its intact protein antigens are more likely to be processed as in a natural infection.

Human immunodeficiency virus type 1 clade M mosaic gag polypeptides

The University of Alabama at Birmingham Research Foundation


A first metal film of a first metal is deposited on a silicon-containing film containing silicon as a principal constituent, and a second metal film of a nitride of a second metal is deposited on the first metal film. Thereafter, a metal film with a high melting point is deposited on the second metal film, so as to form a multi-layer film of the silicon-containing film, the first metal film, the second metal film and the metal film with a high melting point. The multi-layer film is then subjected to annealing at a temperature of 750xc2x0 C. or more. In this case, the first metal is nitrided to be changed into a nitride of the first metal and a silicide layer of the first metal is not formed in a surface portion of the silicon-containing film before the annealing.

The present invention relates to a method for fabricating an electrode structure including a lower film of polysilicon or amorphous silicon and an upper film of a metal with a high melting point, and a method for fabricating a semiconductor device including the electrode structure as a gate electrode.
In a conventional MOS transistor, the gate electrode is formed from a polysilicon film. In accordance with refinement and increase in operation speed of LSIS, there are increasing demands for lowering resistance of a gate electrode of a MOS transistor.
For the purpose of lowering the resistance of a gate electrode, technique to use, as a gate electrode, a polymetal gate electrode of a multi-layer film including a lower polysilicon film and an upper metal film with a high melting point is proposed, and a tungsten film is proposed for use as the upper metal film with a high melting point. When a tungsten film is used as the upper metal film with a high melting point, the resistance of the gate electrode can be lowered.
It is necessary to form, between the polysilicon film and the tungsten film, a barrier film of tungsten nitride (WN,) or titanium nitride (TiN) for preventing a dopant (such as B, P and As) introduced into the polysilicon film from diffusing into the tungsten film (as described in, for example, Japanese Laid-Open Patent Publication Nos. 11-261059 and 7-235542).
FIG. 8A shows the cross-sectional structure of an electrode structure according to a first conventional example. As shown in FIG. 8A, a gate electrode is formed above a semiconductor substrate 1 with a gate insulating film 2 sandwiched therebetween, and the gate electrode is composed of a polysilicon film 3, a barrier film 4A of tungsten nitride (WNx) and a tungsten film 5 successively formed in this order in the upward direction.
FIG. 8B shows the cross-sectional structure of an electrode structure according to a second conventional example. As shown in FIG. 8B, a gate electrode is formed above a semiconductor substrate 1 with a gate insulating film 2 sandwiched therebetween, and the gate electrode is composed of a polysilicon film 3, a barrier film 4B of titanium nitride (TiN) and a tungsten film 5 successively formed in this order in the upward direction.
In the electrode structure of the first conventional example, when annealing is carried out in a subsequent procedure, nitrogen included in the barrier film 4A of tungsten nitride is evaporated, so that the barrier film 4A can be changed into the tungsten film 5. In addition, nitrogen included in the barrier film 4A is reacted with silicon included in the polysilicon film 3, so that a reaction layer 6 of silicon nitride (SiN) with very high resistance can be formed between the polysilicon film 3 and the tungsten film 5 as shown in FIG. 8C. As a result, the resistance of the gate electrode is disadvantageously increased.
As a countermeasure, Japanese Laid-Open Patent Publication No. 7-235542 describes that the sheet resistance of the reaction layer 6 can be lowered so as to lower the resistance of the gate electrode by setting the surface density of nitrogen included in the reaction layer 6 of silicon nitride to a predetermined value or less.
The present inventors, however, have found that the resistance of the gate electrode cannot be lowered even when the surface density of nitrogen included in the reaction layer 6 is set to the predetermined value or less in the electrode structure of the first conventional example.
Therefore, the present inventors have variously examined why the resistance of the gate electrode cannot be lowered in the electrode structure of the first conventional example, resulting in finding the following: When the thickness of the barrier film 4A is reduced to approximately 0.1 through 1.0 nm for lowering the surface density of nitrogen included in the reaction layer 6, the barrier film 4A cannot exhibit the barrier function and tungsten silicide (WSix) is formed, and hence, the resistance of the gate electrode cannot be lowered. On the other hand, when the thickness of the barrier film 4A is larger than 1.0 nm, although the barrier function can be exhibited, the reaction layer 6 of silicon nitride with very high resistance is formed between the polysilicon film 3 and the tungsten film 5. Therefore, the interface resistance between the polysilicon film 3 and the tungsten film 5 is increased.
Furthermore, since the tungsten nitride film has poor heat resistance, a large amount of nitrogen included in the tungsten nitride film is diffused through annealing carried out at 750xc2x0 C. or more, so as to change the tungsten nitride film into a tungsten film.
In the case where the barrier film of titanium nitride is used as in the electrode structure of the second conventional example, a reaction layer 6 of silicon nitride with very high resistance is formed between the polysilicon film and the tungsten film. Therefore, the interface resistance between the polysilicon film 3 and the tungsten film 5 is increased.
As shown in FIG. 9A, a polysilicon film 3 is formed above a semiconductor substrate 1 with a gate insulating film 2 sandwiched therebetween, and the polysilicon film 3 is doped with a p-type dopant such as boron in forming a p-type gate electrode and with an n-type dopant such as phosphorus in forming an n-type gate electrode. In order to deposit a titanium nitride film 4B on the polysilicon film 3, the semiconductor substrate 1 is placed in a chamber in which a titanium target 7 including titanium as a principal constituent is disposed. Then, a mixed gas of an argon gas and a nitrogen gas is introduced into the chamber and discharge is caused in the chamber. In this manner, plasma is generated from the argon gas and the nitrogen gas, and nitrogen ions included in the plasma are reacted with silicon included in the polysilicon film 3, so that a reaction layer 6 of silicon nitride can be formed in a surface portion of the polysilicon film 3. The titanium target 7 is also nitrided so as to form a titanium nitride film 8 thereon, and titanium nitride is sputtered out from the titanium nitride film 8 so as to form a barrier film 4B of titanium nitride on the reaction layer 6 as shown in FIG. 9B.
Then, the semiconductor substrate 1 is placed in a chamber in which a tungsten target 9 including tungsten as a principal constituent is disposed, an argon gas is introduced into the chamber and discharge is caused in the chamber. In this manner, plasma is generated from the argon gas, and tungsten is sputtered out from the tungsten target 9 by argon ions included in the plasma, so that the sputtered tungsten can be deposited on the titanium nitride film 4B. As a result, a tungsten film 5 is formed on the titanium nitride film 4B as shown in FIG. 9C.
Next, dopant layers serving as a source and a drain of the MOS transistor are formed in the semiconductor substrate 1, and annealing is carried out at 750xc2x0 C. or more for activating the dopant layers. Thus, excessive nitrogen included in the barrier film 4B is diffused into an upper portion of the polysilicon film 3 as shown in FIG. 10A. As a result, the thickness of the reaction layer 6 of titanium nitride is increased as shown in FIG. 10B.
Also, the present inventors have examined the relationship between the annealing temperature and the interface resistance of the barrier film obtained after the annealing. FIG. 11 shows the relationship between the annealing temperature (xc2x0 C.) and the interface resistance (Rc) between the polysilicon film and the metal film with a high melting point obtained after the annealing. In FIG. 11, the relationship obtained when a barrier film of tungsten nitride (WNx) is formed on an n-type polysilicon film (expressed as NPS) is plotted with xe2x97xaf, the relationship obtained when a barrier film of tungsten nitride is formed on a p-type polysilicon film (expressed as PPS) is plotted with ◯, the relationship obtained when a barrier film of titanium nitride (TiN) is formed on an n-type polysilicon film is plotted with ♦, and the relationship obtained when a barrier film of titanium nitride is formed on a p-type polysilicon film is plotted with ⋄. Also, in FIG. 11, since the contact between the films is non-ohmic, the interface resistance is shown as a resistance value obtained by allowing a current of 1 mA/xcexcm2 to flow.
It is understood from FIG. 11 that the interface resistance is high in using the barrier film 4B of titanium nitride even when the annealing is carried out at a low temperature. Also, as a result of experiments made by the present inventors, it is found that the interface resistance is high in using the barrier film 4B of titanium nitride even when the annealing is not carried out. This is because the reaction layer 6 is formed between the polysilicon film 3 and the barrier film 4B as shown in FIGS. 9A through 9C.
Furthermore, in using the barrier film 4A of tungsten nitride, although the interface resistance is lower than in using the barrier film 4B of titanium nitride, the interface resistance is abruptly increased when the annealing is carried out at 750xc2x0 C. or more. This is because in using the barrier film 4A of tungsten nitride, nitrogen included in the tungsten nitride is diffused through the annealing carried out at 750xc2x0 C. or more, so as to form the reaction layer 6 of silicon nitride between the polysilicon film 3 and the tungsten film 5.
When the interface resistance (Rc) between the polysilicon film 3 and the tungsten film 5 is high, the operation speed of the MOS transistor is lowered. Specifically, when the gate electrode is operated with AC (alternating current), distributed capacitance generated in the gate insulating film is repeatedly charged and discharged. Therefore, a current flows through distributed interface resistance, and hence, the influence of the distributed interface resistance is exhibited, which lowers the operation speed of the MOS transistor. When the operation speed of the MOS transistor is lowered, the operation speed of the entire LSI is lowered, so as to disadvantageously increase signal delay time. Since the operation speed of an LSI is regarded to be the most significant today, the lowering of the operation speed of the MOS transistor by merely several % becomes a serious problem.
In order to lower the interface resistance so as not to affect the delay time of the MOS transistor, interface resistance of 300 xcexa9xcexcm2 or less should be attained.
In consideration of the aforementioned conventional disadvantages, an object of the invention is lowering interface resistance between a polysilicon film and a metal film with a high melting point.
In order to achieve the object, the method for fabricating an electrode structure of this invention comprises the steps of depositing a first metal film of a first metal on a silicon-containing film containing silicon as a principal constituent; depositing a second metal film of a nitride of a second metal on the first metal film; depositing a metal film with a high melting point on the second metal film, whereby forming a multi-layer film of the silicon-containing film, the first metal film, the second metal film and the metal film with a high melting point; and carrying out annealing on the multi-layer film at a temperature of 750xc2x0 C. or more, and the first metal is nitrided to be changed into a nitride of the first metal before the annealing, and a silicide layer of the first metal is not formed in a surface portion of the silicon-containing film before the annealing.
In the method for fabricating an electrode structure of this invention, a barrier film composed of the lower first metal film of the first metal and the upper second metal film of the nitride of the second metal is disposed between the silicon-containing film and the metal film with a high melting point. Furthermore, the first metal is changed into the nitride of the first metal and a silicide layer of the first metal is not formed in a surface portion of the silicon-containing film before the annealing. Therefore, the interface resistance between the silicon-containing film and the metal film with a high melting point is largely lowered for the following reason: Nitrogen included in the second metal film is consumed in nitriding the first metal film, and merely a small amount of nitrogen included in the second metal film is used for nitriding the silicon-containing film. Accordingly, a reaction layer of a silicon nitride film formed between the silicon-containing film and the metal nitride film and having very high resistance can be reduced in its thickness, which lowers the interface resistance.
In the method for fabricating an electrode structure, no silicon nitride film or a silicon nitride film with a thickness of 1.5 nm or less is preferably formed between the silicon-containing film and the first metal film as a result of the annealing.
In this manner, the interface resistance between the silicon-containing film and the metal film with a high melting point can be suppressed to 300 xcexa9xcexcm2 or less. Therefore, the delay time of a MOS transistor including a gate electrode composed of the electrode structure of this invention can be largely reduced.
In the method for fabricating an electrode structure, interface resistance between the silicon-containing film and the metal film with a high melting point is preferably 300 xcexa9xcexcm2 or less after the annealing.
In this manner, the delay time of a MOS transistor including a gate electrode composed of the electrode structure of this invention can be largely reduced.
In the method for fabricating an electrode structure, it is preferred that the first metal and the second metal are the same metal, that the first metal film is deposited through sputtering carried out by using a target including the same metal, and that the second metal film is deposited by sputtering a nitride film of the same metal formed in a surface portion of the target.
In this manner, the first metal film and the second metal film can be continuously deposited by using the target of the same metal with merely an introduced gas changed, resulting in improving the throughput.
In the method for fabricating an electrode structure, the first metal and the second metal are preferably both titanium.
In the method for fabricating an electrode structure, the nitride of the second metal can be titanium nitride, tungsten nitride, tantalum nitride or tungsten silicide nitride.
In order to achieve the object, the method for fabricating a semiconductor device of this invention comprises the steps of depositing a polysilicon film on a semiconductor region; depositing a first metal film of a first metal on the polysilicon film; depositing a second metal film of a nitride of a second metal on the first metal film; depositing a metal film with a high melting point on the second metal film, whereby forming a gate electrode including the polysilicon film, the first metal film, the second metal film and the metal film with a high melting point; forming dopant layers serving as a source and a drain by ion implanting a dopant with the gate electrode used as a mask; and activating the dopant layers by carrying out annealing at a temperature of 750xc2x0 C. or more, and the first metal is nitrided to be changed into a nitride of the first metal before the annealing, and a silicide layer of the first metal is not formed in a surface portion of the polysilicon film before the annealing.
In the method for fabricating a semiconductor device of this invention, a semiconductor device is fabricated by employing the method for fabricating an electrode structure of this invention. Therefore, even when the annealing at 750xc2x0 C. or more is carried out for activating the dopant layers serving as the source and the drain, the interface resistance between the polysilicon film and the metal film with a high melting point included in the gate electrode can be very low.
Accordingly, the delay time of the MOS transistor can be reduced so as to improve the operation speed of the MOS transistor.
In the method for fabricating a semiconductor device, no silicon nitride film or a silicon nitride film with a thickness of 1.5 nm or less is preferably formed between the polysilicon film and the first metal film as a result of the annealing.
In this manner, the delay time of the MOS transistor can be largely reduced.
In the method for fabricating a semiconductor device, the first metal and the second metal are preferably both titanium.

Method for fabricating electrode structure and method for fabricating semiconductor device

Matsushita Electric Industrial Co., Ltd.


Systems and methods for determining the effectiveness of breath training regimens are disclosed. The systems include a sensor assembly configured to detect data indicative of at least one physiological parameter of a user during breath training sessions while the user is awake and while the user is asleep. The system also includes an electronic computing unit with a processor configured to analyze the data indicative of the at least one physiological parameter of the user detected by the sensor assembly, and determine effectiveness of the breath training sessions on the user by determining trends of the at least one physiological parameter of the user from the analyzed data, and determining changes in the at least one physiological parameter of the user while the user is asleep occurring during a period of time from the determined trends.

A significant portion of sleep disordered breathing is a condition characterized by repeated episodes during sleep resulting in many detrimental and detectable effects on a person. Research has shown that sleep disordered breathing can have major short term and long term deleterious impacts. Therefore, there exists a need for improved and accessible systems and methods for detecting sleep disordered breathing in persons and providing instructions or regimens to improve sleep disordered breathing in persons.

Systems, methods and apparatuses for the alleviation and outcome monitoring of sleep disordered breathing


A shaping apparatus for an article of footwear is provided to maintain the shape of an upper. An insertable apparatus includes a toe shaping member. A medial shaping member may engage a medial side of the upper. A lateral shaping member may engage a lateral side of the upper. The medial shaping member and lateral shaping member are resiliently disposed on the toe shaping member. A rear biasing member may be attached to the medial shaping member and the lateral shaping member.

The modem athletic shoe is a combination of many elements which have specific functions, all of which must work together for the support and protection of the foot during an athletic event. Numerous consumers and athletes purchase footwear for use in athletic activities such as running, cross training, soccer, football, baseball, basketball, tennis, walking, and the like. The shoes worn by the athlete can effect the performance and contribute to their overall success in an athlete event.
Proper fitting and comfortable shoes are important for foot development and athletic performance. One function of a shoe is to support and protect the foot. To this end, a shoe, typically an athletic shoe, includes a sole to provide traction, support and cushioning. A shoe also includes an upper that is typically stitched and/or glued to the upper periphery of the sole. The upper is intended to contact and hold the foot of the wearer to the sole, to provide a tight and comfortable fit. The upper typically also has a fastening system, such as a lace and eyelets in the upper material. The ends of the lace are tied together so the upper squeezes the foot within the shoe.
The shape of the upper of athletic footwear is an important consideration for athletic performance. Uppers are frequently constructed of leather or other materials having properties similar to leather. Leather and other similar materials may retain moisture and do not permit the foot to readily breathe. The foot may generate an excessive amount of moisture and may become hot or overheated in such an upper construction. When an athletic shoe is used in hot weather, the temperature and moisture within the interior space of the upper may become elevated. After use of the footwear, the upper generally deforms from the intended shape provided by the manufacturer. As a result, the upper may not have a good fit around the foot of the wearer. This problem can adversely effect the overall comfort and the fit of the shoe which can lead to a loss of forward propulsion, or adversely effect kicking and foot planting performance, such as in the sport of soccer.
The interior of the upper or the surface of a shoe tree can be a haven for the growth of microorganisms or microbes. In hot wet environments, sweat and interior surfaces of the upper can create a unique ecological site that provides a large surface area, favoring the accumulation of bacteria. Bacteria residing in the upper material play an important role in the development of malodor emanating from a shoe or other aliments. Heretofore, there has not been an effective method to kill bacteria or prevent growth while maintaining the shape of the upper.
In view of the foregoing, there is a need for shaping device for an upper that overcomes the deficiencies in the past.


A dual clutch transmission for a motor vehicle, with gear wheel sets, which can be engaged via shift elements and which form exactly eight wheel planes, which are associated, respectively, with a first sub-transmission and a second sub-transmission, of which each sub-transmission has a respective input shaft and the two sub-transmissions have a common output shaft, which is axis-parallel to the input shafts. The mutually coaxial input shafts can each be activated in alternation via a power-shift clutch, and the even forward gears are associated with the first sub-transmission and the odd forward gears are associated with the second sub-transmission, which can be engaged when a gear shift occurs via the shift elements.

Dual clutch transmissions of this type have, besides a good efficiency, the advantage that, among other things, they can be shifted or engaged automatically, in particular, without interruption of the tractive force, wherein, in the respectively non-activated sub-transmission, a gear step can already be preselected and then activated by changing the power-shift clutches. In the process, the odd gears (1, 3, 5, etc.) in one sub-transmission and the even gears (2, 4, 6, etc.) in the other sub-transmission are positioned by means of corresponding gear wheel sets, which are in driving connection with the respective input shaft or the output shaft for example, via synchronous clutches.
The axial length of the dual clutch transmission depends on the number of gear wheel sets or wheel planes that are arranged in the dual clutch transmission in succession in the axial direction. Each of the wheel planes is made up of at least two fixed gear wheels and/or detached gear wheels. Arranged between the wheel planes are shift elements that, when actuated, enable the engagement of forward and reverse gears.
A dual clutch transmission of the generic type has gear wheel sets that can be engaged via shift elements and, in particular, form exactly eight wheel planes. The wheel planes are each associated with a first sub-transmission and a second sub-transmission. Each of the sub-transmissions has an input shaft as well as a common output shaft. The mutually coaxial input shafts can be activated in alternation via a respective power-shift clutch, wherein the even forward gears are associated with the first sub-transmission and the odd forward gears are associated with the second sub-transmission and, when a shift of gear occurs, these gears can be engaged via the shift element. In the generic dual clutch transmission, each of the wheel planes has a drive gear wheel, which is mounted detachably or torsionally resistant on the particular input shaft, and an output-side gear wheel, which is mounted detachably or torsionally resistant on the output shaft and meshes with the former gear wheel. They can be coupled to the input shaft and/or to the output shaft, or decoupled therefrom, by means of shift elements with the formation of forward gears.

Dual clutch transmission for a motor vehicle


A throttle valve drive apparatus comprises an actuator which serves to mechanically drive a throttle valve disposed in an intake passage of an internal combustion engine and is controlled in accordance with an instruction from a control unit, an accelerator lever which serves to mechanically drive the throttle valve and to adjust the opening degree of the throttle valve in accordance with an amount of operation performed by an operator, a first clutch disposed between rotary shafts of the actuator and the throttle valve and serving to transmit a turning force from the actuator to the throttle valve, and a second clutch disposed between rotary shafts of the accelerator lever and the throttle valve and serving to transmit the turning force from the accelerator lever to the throttle valve. In this apparatus, an engaging force of the first clutch is discriminated from that of the second clutch, one of the first and second clutches has a greater engaging force comprising an on-off constant engagement type clutch, the other clutch having a smaller engaging force comprising a constant engagement type clutch, and the on-off type clutch is switched on and off so as to transmit the turning force to the throttle valve selectively from the actuator or the accelerator lever.

1. Field of the Invention
The present invention relates to a throttle valve drive apparatus which serves to control the opening of a throttle valve disposed in an intake passage of an internal combustion engine, and more particularly, to an apparatus which is capable of driving the throttle valve selectively by means of both an accelerator lever operated by an operator and an electronic control unit.
2. Description of the Prior Art
Hitherto, as a throttle valve controlling apparatus which serves to regulate the flow of intake air to an internal combustion engine, one that is capable of adjusting the opening of a throttle valve by both an accelerator operation system operated by an operator and an electric operation system driven by a control unit has been known as disclosed in Japanese Patent Unexamined Publication No. 58-20948 and Japanese Utility Model Unexamined Publication No. 60-180735.
This kind of apparatus comprises an actuator-side clutch by means of which an actuator of an electric operation system and a throttle valve are mechanically connected and disconnected and an accelerator-side clutch by means of which an accelerator lever and the throttle valve are mechanically connected and disconnected, and both clutches are controlled by an electronic control unit (ECU). In ordinary running, the actuator-side clutch is switched on (connected) and the accelerator lever-side clutch is switched off (disconnected) so that the throttle valve is driven by the actuator. On the other hand, in case of a trouble, e.g., when it becomes impossible to control the actuator, the actuator side clutch is switched off and the accelerator lever-side clutch is switched on so as to drive the throttle valve by means of the accelerator lever.
However, according to the aforesaid electronic throttle controlling apparatus disclosed in Japanese Patent Unexamined Publication No. 58-20948 or Japanese Utility Model Unexamined Publication No. 60-180735, since the on-off control of the two electromagnetic clutches are effected in accordance with instructions from the control unit, the number of arithmetic processes of the control unit is increased and complicate the control, with the result being that malfunction occurs easily. Further, if the two electromagnetic clutches are simultaneously controlled to be switched on and off, a noise produced at the time of the connection of the electromagnetic clutch becomes audible to a driver of a vehicle, thus giving rise to a problem that the vehicle makes noises while running.


In one embodiment this invention provides a process for preparing a deodorized fatty acid salt feed supplement. Alkali metal bisulfite is added to a process medium in which C.sub.14 -C.sub.22 fatty acid with a content of malodorous carbonyl compound is converted into a deodorized C.sub.14 -C.sub.22 fatty acid alkaline earth metal salt product.

Conventional cattle feeds such as corn and alfalfa often fail to provide sufficient energy for cattle, especially lactating dairy cattle during periods of heavy milk production. Feed containing a high proportion of corn also has a tendency to depress the milk fat content of the milk produced by such cattle. Fat is a concentrated energy source, and it is known that if the proportion of fat in cattle feed is increased, lactating dairy cattle produce high milk yields without draining their reserves of body fat and without diminishing the proportion of milk fat in the milk produced.
However, it has been found that if the proportion of fat in the diet of cattle exceeds about 5% of the total feed solids, the feed has toxic effects upon the microorganisms in the rumen of the cattle. It appears that fat reduces the growth rate or even kills certain microorganisms which digest fiber in the cow's rumen, thereby lowering fiber digestibility. This deleterious effect on the cow's rumen is particularly true of unsaturated fats. Although the decreased fiber digestion in the rumen is partially compensated by greater fiber digestion in the lower parts of the alimentary canal, the total energy derived is less than that resulting from more complete microbial digestion in the rumen.
There has been a continuing need for new dietary supplements for animal feed which can be fed to ruminant animals without interfering with the rumen microorganisms, or being rendered ineffective by the rumen microorganisms.
U.S. Pat. Nos. 4,642,317; 4,826,694; 4,853,233; and 4,909,138 describe the incorporation of insoluble fatty acid salts in ruminant feed as a means of increasing the fat content of the feed without deleteriously affecting the ruminant digestion cycle. A feed additive such as fatty acid calcium salt functions as a rumen inert product which passes through the rumen without interfering with rumen fermentation (i.e., a rumen bypass product), and is subsequently metabolized in the abomasum or small intestine of the ruminant.
The fat content of a feed additive usually is derived from industrial tallow and oil byproduct source. Commercially available fat and oil byproducts are mixtures of long chain fatty acids or glycerides, or a combination of fatty acid and glyceride mixtures. The commercial fatty acid materials typically are discolored, and have a characteristic unpleasant rancid odor which are caused by the presence of volatile oxygenated organic compounds such as ketones and aldehydes. Malodorous carbonyl compounds which are contained in technical grade fatty acid sources are illustrated by methyl heptyl ketone, methyl nonyl ketone, butanal, heptanal, nonanal, deca-2-enal, deca-2,4-dienal, and the like.
Various methods of deodorizing fatty acid materials are described in U.S. Pat. Nos. 2,265,020; 2,715,642; 2,795,453; 3,052,701; 3,124,460; 3,471,536; 3,526,649; 3,895,042; 4,294,821; and 4,938,957. The methods generally involve contacting a bulk fatty acid material with an adsorbent such as activated bentonite, or extracting the fatty acid material with a solvent such as furfural.
There is continuing interest in the development of improved methods for deodorizing commercial fatty acid materials which have been designated for incorporation into animal feedstocks.
Accordingly, it is an object of the invention to provide a fatty acid salt composition which can function as a rumen bypass animal feed supplement, and permit a beneficial increase in the dietary fat content of the feed.
It is another object of this invention to provide a process for preparing a deodorized fatty acid salt ruminant feed supplement.
Other objects and advantages of the present invention shall become apparent from the accompanying description and examples.

Deodorized fatty acid salt feed supplement


A parking release device is provided that includes: a base which is mounted on a vehicle; a lever which is coupled to the base and includes lever track; and a handle which is coupled to the base and includes a locker which is coupled to the lever track. The lever track includes a first stable position, a second stable position, a first path which connects the first stable position and the second stable position, and a second path that connects the second stable position and the first stable position. As the handle is pivoted by the release of the parking, the locker moves from the first stable position to the second stable position along the first path, and as the handle is pivoted by the performing of the parking, the locker moves from the second stable position to the first stable position along the second path.

Field
The present disclosure relates to a manual parking release handle device mounted on a vehicle equipped with a shift-by-wire type transmission system.
Description of the Related Art
In a vehicle equipped with a shift-by-wire type transmission system, parking should be manually released when it is impossible to change the shift position of the transmission in emergency situations such as electric discharge of the battery of the vehicle or when a shift lever is moved from the P-shift position to N-shift position, such as parking at the N-shift position, etc. Currently, the vehicle equipped with the shift-by-wire type transmission system in now increasing. At present, a combined electronic-manual parking release type or a manual parking release type is being applied to the vehicle having the manual parking release function. However, with regard to the electronic parking release type, the lever structure is complex and the number of the repeated operations of the lever is limited when the battery of the vehicle is discharged. With regard to the manual parking release type, a handle is operated by using tools and the tools are fixed in order to continuously maintain the parking release state. Additionally, the handle is returned to its original position by means of the tools in order for the parking to be performed again. Therefore, in the manual parking release type, separate tools are required and should be fixed until the parking release is finished. Accordingly, when an unexpected incident occurs during driving the vehicle, there is a possibility that the shift lever returns to the P-shift position without being able to maintain the N-shift position.
Therefore, there is a requirement for a manual parking release device which has a simple structure and a low price thereof.


A self-ballasted lamp includes: a base body; a light-emitting module and a globe which are provided at one end side of the base body; a cap provided at the other end side of the base body; and a lighting circuit housed between the base body and the cap. The light-emitting module has light-emitting portions each using a semiconductor light-emitting element, and a support portion projected at one end side of the base body, and the light-emitting portions are disposed at least on a circumferential surface of the support portion. A light-transmissive member is interposed between the light-emitting module and an inner face of the globe.

In a conventional self-ballasted lamp having light-emitting portions each using an LED chip as a semiconductor light-emitting element, a light-emitting module, on which the light-emitting portions are mounted, and a globe for covering the light-emitting module are attached to one end side of a metallic base body, a cap is attached to the other end side of the base body via an insulating member, and a lighting circuit for supplying power to the LED chips of the light-emitting portions to light the self-ballasted lamp is housed inside the insulating member.
A light-emitting module is generally structured so that light-emitting portions are mounted on one face of a flat substrate, and the other face of the substrate is brought into face-contact with the base body and thermally-conductively attached to the base body.
While the self-ballasted lamp is lit, heat mainly generated by the LED chips of the light-emitting portions is conducted from the flat substrate to the base body and radiated into the air from a surface, which is exposed to the outside the base body.
Additionally, as a light-emitting module, a self-ballasted lamp exists in which, a plurality of light-emitting portions are arranged on a surface of a three-dimensional substrate formed in a globe, the three-dimensional substrate being formed of a regular-pyramid-shaped or cubic substrate or formed by bending a substrate in a sphere shape.
However, when the three-dimensional substrate is used for the light-emitting module, almost the entire light-emitting module is arranged in an air layer having a low thermal conductivity and only a part, which is supported, of the light-emitting module is connected to the base body. Accordingly, compared with the light-emitting module in which the flat substrate is thermally-conductively brought into face-contact with the base body, it becomes more difficult to efficiently conduct heat, which is generated by the LED chips of the light-emitting portions when the self-ballasted lamp is lit, to the base body. Therefore, the temperature of each light-emitting portion arranged in the air layer easily rises, and the life of each LED chip is shortened. Additionally, in order to suppress the temperature rise of the LED chips, power to be input to the LED chips is required to be reduced and light output is required to be suppressed.
Particularly, when a small mini-krypton type self-ballasted lamp is used, a base body is small in dimensions and sufficient radiation performance is hardly obtained from the base body. Therefore, not only in the case of using the three-dimensional substrate of the light-emitting module but also in the case of using the flat substrate of the module, a problem arises that sufficient radiation performance cannot be obtained only by thermal conduction to the base body.
The present invention has been made in view of the above problems and aims to provide a self-ballasted lamp capable of improving radiation performance, and lighting equipment.

Self-ballasted lamp and lighting equipment having a support portion in contact with an inner circumference of a base body

Toshiba Lighting & Technology Corporation