A method for making a knotless bead bundle, a bead bundle made according to the method, and a tire made using the knotless bead bundle are provided. In the method a bead ring is made using a plurality of annular turns of wire as is conventional in the art, and the annular turns of wire are wrapped with cord, tape, or other conventional wrapping material which is held on the bead ring without using knots. The wrap is held on the bead ring by using a tie down area that is made by forming a loop in the wrapping material, holding the loop in place by a number of close turns of wrap on the bead ring while leaving a first end of the wrapping material free, wrapping the bead ring 360.degree. around the ring, passing a second end of the wrapping material through the loop, closing the loop by pulling the first end of the wrapping material whereby closing the loop pulls the second end of the wrapping material under the close turns of wrapping material. The ends of the wrap are then cut flush with the close turns of wrap. A tire made using the bead bundle of the invention durability. demonstrates improved uniformity, stability and

The invention relates to a bead bundle intended for use in pneumatic tires, a method of making such a bead bundle, and pneumatic tires incorporating such a bead bundle.
In the construction of a tire, a bead ring provides reinforcement in the tire where the tire meets the rim. The bead ring is often made in the form of a bead bundle which comprises at least one (preferably one) strand of wire disposed in a plurality of adjacent annular turns which are wrapped with wire or another suitable material to hold the ends of the wire and the annular turns together. The ends of the wire or other wrapping material are ordinarily tucked under one of the wraps or knotted to retain the wrapping material on the bead bundle. Unfortunately, in the case where a wire wrap is used, when the bead bundle is deployed in a tire the exposed ends of the wire can sometimes, over time, cause a fault or tear to develop in the bead area of the tire, limiting the life of the tire. Also, when a wrap less stiff than wire is used, the knot used to secure the wrap can cause an imbalance in the weight distribution and gauge of the bead bundle and jeopardize the uniformity of a tire in which it is used. In both cases, when there are exposed free ends of wrap, or when the wrap is knotted, the ends of the knot may trap air in the area of the bead bundle during the building of a tire which may cause eventual delamination of the bead in the tire construction. Such defects are detectable on inspection, and such tires have to be scrapped.
Often, during the construction of a tire the bead bundle undergoes a deformation. It is believed that this bead deformation takes place when a tire construction is cured. Though not seriously detrimental to the operation of the tire, bead deformation substantially obviates the ability of the tire manufacturer to design an optimal bead shape and retain the optimized bead shape in an actual tire construction.
It is an object of the invention to provide a method of making a bead bundle and a bead bundle made thereby having improved uniformity and a construction that substantially eliminates the trapping of air in a tire construction. It has surprisingly been found in accordance with the invention that the method provides a bead bundle which is stable during the construction of a tire and substantially retains its shape during the curing of a tire.
It is also an object of the invention to provide a pneumatic tire using the bead bundle of the invention which has improved uniformity and endurance, and is made such that the number of scrap tires produced is reduced.


The present invention is directed to a sanitary napkin having flaps folded onto the main body of the napkin and temporarily held in this position by a finger means. At least one end of the napkin is then folded onto the flaps thereby retaining the flaps in their folded position. The finger means is then disengaged from contact with the napkin.

This invention is directed to sanitary napkins having flaps. More particularly, this invention is directed to an efficient apparatus and method of folding and securing these flaps during the process of making sanitary napkins.
Sanitary napkins having flaps extending outwardly from the longitudinal side margins are well known in the art. For example, U.S. Pat. No. 4,589,876 issued May 20, 1986, to Van Tilburg and U.S. Pat. No. 4,687,478 issued Aug. 18, 1987, to Van Tilburg disclose preferred sanitary napkins with flaps and are incorporated herein by reference to illustrate flapped sanitary napkin constructions.
It is also well known in the art to fold the flaps to overlay the main body of the pad during the manufacturing process. For example, in U.S. Pat. No. 4,759,754 to Korpman, an adhesive tab is used for maintaining the flaps in the desired disposition overlaying the backsheet during packaging. U.S. Pat. No. 4,701,178 issued Oct. 20, 1987, to Glaug et al. discloses a sanitary napkin having a single release strip which covers the centrally located adhesive of the backsheet and over which release strip the flaps are folded.
Alternative means for maintaining the flaps in a folded disposition prior to first use of the sanitary napkin by the wearer are shown for example, in U.S. Pat. No. 4,285,343 to McNair which discloses a sanitary napkin with flaps (side panels) that are folded over the upper surface of the central absorbent element for packaging. At the time of the first use by the wearer, the flaps are usually unfolded to facilitate installation of the sanitary napkin into the wearer""s undergarment. Adhesive patches on a garment facing surface of the flaps are covered with individual strips of release paper.
An alternative method of holding the flaps in place is to utilize the release strip paper present on the attachment adhesive located on the flaps. EP 0 347 319 B1 to Marsot and WO 88/04546 to Ternstrom disclose the use of a single release paper in the form of a bridging strip across the flap adhesive patches for maintaining the flaps in the folded disposition prior to the wearer""s first use of the sanitary napkin.
Two additional examples of this technique are shown in U.S. Pat. No. 5,800,654, to Davis et al. and U.S. Pat. No. 5,662,639 to Tanaka et al. In these methods the attachment adhesive on the flaps is applied in a conventional manner, i.e. via a transfer coating method and a single sheet of release paper acts both as a protective peel strip for the adhesively coated flaps and as a means to hold the flaps in their folded position.
Use of these methods has several drawbacks. These methods require accurate placement of additional adhesives and materials. In particular in the situation in which the flaps are folded onto the body-faceable side of the napkin, adhesives should not come in direct contact with the absorbent material of the sanitary napkin as doing so both adversely effects the absorbency of that material and results in dissatisfaction of the user as to the articles appearance and comfort in use.
Further, use of an additional strip to hold the flaps in their folded position requires additional expense for material at the time of construction and presents an inconvenience to the user in having to discard this material at the time of use. In addition, this method requires that the flaps be maintained in a substantially parallel position relative to one another. If one or both flaps become skewed during manufacture, the adhesive will not be correctly placed on one or both of the flaps, thus rendering it useless. One method of overcoming this problem is to make the peel strip quite large to accommodate this potential skewing, thus exacerbating the problems associated with cost and disposal of peel strip material.
Accordingly, it is an object of this invention to overcome certain problems of the prior art. Particularly, it is an object of this invention to provide a means to mechanically maintain the flaps in their folded position during manufacturing and to do so without the necessity of additional adhesives or materials.
In accordance with the present invention, there has been provided a novel apparatus for folding a web of flap material over the main body of a sanitary napkin. This apparatus comprises a conveyor means having a substantially fixed velocity for transporting the sanitary napkin, which napkin having a web of laterally extending flap material; a flap folding station for folding said flap material onto said main body of said sanitary napkin; an indexing means comprising a pair of spaced apart finger timing belts, each having a lug affixed thereto, and a finger means intermediate said lugs, said finger means having two ends, each end being mounted onto a respective lug, said finger timing belt imparting a varying velocity to said finger means and establishing repeatable linear and non-linear relationships between the velocities of said finger means and said conveyor means; a napkin folding station for folding said sanitary napkin such that upon completion of the folding, a transverse end portion of said sanitary napkin overlies said web of flap material; wherein: said finger means is adapted to contact and maintain said web of flap material on said main body of said sanitary napkin from said flap folding station to said napkin folding station and, wherein upon completion of the folding of said sanitary napkin by said napkin folding station, said finger means has a velocity less than the velocity of said conveyer means whereby said finger means and said napkin no longer contact one another.
Also provided in accordance with the present invention is a novel method of folding a web of flap material in a continuous manufacturing operation for making absorbent articles, comprising the steps of transporting sanitary napkins along a conveyor means, each napkin having a web of laterally extending flap material; folding said flap material onto said main body of said sanitary napkin; providing an indexing means having a pair of spaced apart finger timing belts, each having at least one lug affixed thereto, each said lug on one timing belt having a counterpart lug on said second timing belt, a finger means intermediate said counterpart lugs, said finger means having two ends, each end being mounted onto a respective lug and thereby resulting in the finger means being substantially orthogonal to both timing belts, said finger timing belts imparting a varying velocity to said finger means and establishing repeatable linear and non-linear relationships between the velocities of said finger means and said conveyor means; folding said sanitary napkin such that upon completion of the folding, a transverse end portion of said sanitary napkin overlies said web of flap material; contacting said finger means with the sanitary napkin to thereby hold said web of flap material on said main body of said sanitary napkin between said steps of folding the flap material and folding the sanitary napkin; and, removing said finger means from contact with said sanitary napkin upon completion of said step of folding of said sanitary napkin.

Apparatus and method to fold and secure sanitary napkin flaps prior to packaging


A method and apparatus for baking a film onto a substrate. A film, such as a layer of photoresist, is disposed on a first surface of a substrate while a second surface is exposed to a liquid bath. The liquid bath is maintained at a pre-selected temperature. Exposure of the substrate to the liquid bath allows the film on the opposite surface to bake. The liquid bath is then re-circulated to maintain a constant and uniform temperature gradient across the substrate.

1. Field of the Invention
The present invention relates generally to semiconductor fabrication. More particularly, the present invention relates to the process of photolithography, and even more specifically to baking a photoresist onto a substrate, such as a photomask, during the photolithography process.
2. Background of the Related Art
This section is intended to introduce the reader to various aspects of art which may be related to various aspects of the present invention which are described and/or claimed below. This discussion is believed to be helpful in providing the reader with background information to facilitate a better understanding of the various aspects of the present invention. Accordingly, it should be understood that these statements are to be read in this light, and not as admissions of prior art.
During fabrication of a semiconductor device, a process called photolithography is employed to create patterns on a semiconductive substrate, commonly known as a wafer. The wafer is built up one layer at a time creating an overlay of complex patterns which ultimately form electrical devices and paths. The photolithography process comprises a variety of steps to accomplish the patterning of each layer. One common step of the process involves the use of one or more photomasks. Each photomask has a pattern formed thereon, and this pattern is transferred onto a semiconductor wafer by irradiating the wafer through the photomask.
To fabricate a photomask, surface preparation is required wherein a surface of the substrate, often referred to as a photomask blank, is cleaned and dried. The substrate may be composed any of a number of materials. For example, the photomask blank may be made of glass or quartz. Surface preparation of the substrate is done in anticipation of a photoresist being applied to the substrate""s surface. The photoresist requires a clean and dry surface in order to accomplish a high level of adhesion. The photoresist is typically applied by placing a coat of the material on the substrate and then spinning the substrate to obtain a thin uniform film across the blank""s surface. After the photoresist has been applied, the blank and film are subjected to a first baking process often referred to as soft bake or pre-bake. The soft bake process serves to evaporate a portion of the photoresist solvents. Besides removing unwanted solvents, which will interfere with subsequent processing, the soft bake also helps to facilitate better adhesion between the photoresist and the substrate. After the soft bake the photoresist remains as a relatively soft coating on the substrate.
The baking process may be accomplished using various methods. Two of the more typical methods include use of a hot plate or the use of a convection oven. In the hot plate method, the substrate is placed directly on the hot plate for heating by conduction. Heat is transferred from the hot plate to the photomask blank and then through the blank to the photoresist layer. This technique provides good temperature control and allows for small batches to be processed simultaneously.
Alternatively, the convection oven method utilizes a fluid medium, usually a gas such as air, to heat the substrate and film. Convection baking allows for a more direct baking of the photoresist layer since convection baking does not have to rely on conduction through the substrate. Convection ovens permit large batches of photomasks to be processed at one time, but typically these ovens have inferior temperature control in comparison with the hot plate method. Convection ovens also typically take longer per batch to process than do hot plates. Other alternative methods for baking include microwave, infra-red, and vacuum oven baking.
Various sources of exposure, including optical sources, x-rays or ion beams, may be used for exposing the photoresist. The exposure causes a chemical reaction to take place in the photoresist layer. For example, in one type of photoresist, exposure causes a polymerization of the photoresist. Thus, by using a mask and an exposure source, a pattern of polymerized resist (and a mating pattern of non-polymerized resist) is formed on the surface of the wafer. This process, while described above in general terms, is actually rather complex and involved. Likewise, there are various exposure sources to choose from, each with its own advantages and complexities. Also, there are multiple types of photoresist. Each type of photoresist has different characteristics and responds differently to the various manipulative steps in the photolithography process.
After the film of photoresist has been exposed, the photoresist is then developed. Developing is a chemical process wherein chemical dissolution of unpolymerized regions in the photoresist occurs. Different developing chemicals and techniques are often employed depending on the type of photoresist being used. After the photoresist has been developed, the chemical is rinsed off and the substrate is allowed to dry. Polymerized regions of the photoresist remain on the surface of the substrate. After developing of the photoresist, the substrate may optionally undergo a second baking process. The second baking process, often referred to as hard bake, again serves to evaporate remaining solvents in the photoresist and to create better adhesion of the photoresist to the substrate. The methods and techniques used for hard baking are essentially the same as those used for soft baking.
While described in generalities above, the process for fabricating photomasks is complex and requires careful attention to many details. Mistakes and errors can be introduced at any step of the process causing resultant defects in the final product. Likewise, each step of the process is continually scrutinized for possible improvements. One area where improvement is contemplated is in the baking processes. A good deal of variability may be introduced into the process during the baking steps. For example, it has been noted that the temperature gradient found in a substrate during baking is not uniform. This means that the temperature at the outside edge of the substrate is not the same as the temperature at the center of the substrate. Often the range of the temperature gradient is several degrees. The variation of temperature results in uneven baking of the photoresist layer. The uneven baking can lead to poor performance of the photoresist layer during the exposure and developing steps. For example, the lines formed in the photoresist layer during exposure and developing can vary in width depending on their location on the photomask blank. A region of the photoresist layer baked at the desired temperature will produce lines at a predicted width, however, a region of the photoresist layer baked at the varied temperature will produce lines which vary from the predicted width. Thus the precision of the exposed image becomes a function of the temperature gradient experienced by the photoresist layer.
In consideration of the heating methods employed, numerous factors affect the resultant baked film. For example, one problem with the hot plate method of baking is that the surface of the hot plate may not be co-incidentally parallel with the surface of the substrate being baked. The result of the two surfaces not being exactly parallel is air gaps present between the two surfaces. Since the hot plate method of baking is a process of conduction, the air gaps create an inefficiency because localized regions experience heat transfer by convection instead of conduction. The conduction transfers the heat to the substrate much quicker than does the convection in the air gaps. Therefore, heat is unevenly distributed to the surface of the substrate from the hot plate. Again the ultimate result is an undesired temperature gradient in the substrate and non-uniform baking of the photoresist layer.
Another problem associated with hot plate baking is the transient formation of temperature zones in the hot plate. This is often the result of a rapid temperature spike in the heating element. The heating element attains a specific temperature and then the surrounding material tries to attain the same temperature as the heating element. Simply stated, the hot plate is trying come to an equilibrium temperature, but in the process temperature zones are created. These temperature zones are transient, but can result in similar temperature zones being transferred to the substrate and film. As an example, on study has found that, depending on the particular steps and methods followed, hot plate baking may result in temperature variations of from 3xc2x0 to 6xc2x0 C. over a 132 mm square area.
While convection ovens generally do a better job in respect to minimizing the production of temperature zones, there are opportunities for improvement. For example, the medium used for heat transfer in convection ovens is typically air. Convection by air is not as efficient as the hot plate method of conduction. The relative inefficiency of air as heat transfer medium is one reason why the convection method is typically slower than the hot plate method.
The present invention may address one or more of the problems set forth above.
Certain aspects commensurate in scope with the originally claimed invention are set forth below. It should be understood that these aspects are presented merely to provide the reader with a brief summary of certain forms the invention might take and that these aspects are not intended to limit the scope of the invention. Indeed, the invention may encompass a variety of aspects that may not be set forth below.
In accordance with one aspect of the present invention, a method of baking a photomask is provided. The method includes providing a substrate having two surfaces wherein a film, such as a layer of photo resist, is disposed on one of the surfaces. The uncoated surface is then exposed to a temperature controlled liquid bath. Exposure of the substrate to the liquid bath is maintained for a predetermined time to allow the film to bake. Re-circulation of the liquid bath maintains a substantially constant temperature gradient across the substrate.
In accordance with another aspect of the present invention, an apparatus and a related system is provided to allow a film to be baked on a substrate more uniformly. The apparatus includes a first tank for containing a liquid bath. The first tank may be disposed inside a second tank to help facilitate re-circulation of the liquid bath. The substrate is partially disposed within the first tank having a surface exposed to the liquid bath. A re-circulation system is provided to circulate the liquid bath against the exposed surface of the substrate. The re-circulation system also allows for the liquid to be exposed to a temperature controlling unit such as a heat exchanger.
In accordance with yet another aspect of the present invention, a system for uniformly baking a film on a substrate is provided utilizing many features of the disclosed apparatus. The system takes advantage of these features to provide batch baking of the substrates.

Method and apparatus for uniformly baking substrates such as photomasks


A container designed for assembly without separable fasteners to comprise a leakproof receptacle or tray for use by meat packers and others. The container is formed from a single blank of corrugated fibreboard having a water-repellent surface. It comprises sides (23, 24) and ends (21, 22) rising from a bottom (10) orthogonally, and interconnected by webbed corners (25, 28). The ends are provided with flaps (30, 40) including lock tabs (31, 32, 41, 42) with tongues (33, 34, 43, 44) which cooperate with the flaps to hold the corners against the outsides of the ends, and the material is crushed, at the lower corners (110) of the container and at the points of action (120) of the tongues, to provide flexibility and prevent damage to the material at sharp folds.

In the meat packing industry there is a need for containers to receive freshly butchered meat. Such containers are often used as trays for temporary storage or transportation, but can include or be provided with covers. Corrugated cardboard is a useful and inexpensive material for this purpose. The containers must have considerable strength, to store usefully large quantities of meat. They must be inexpensive, compact before assembly for use, and easy to assemble. They should also be liquid tight to prevent leakage of fluids such as blood.
One container intended for this purpose is shown in Rennie et al. U.S. Pat. No. 3,399,819. It has the disadvantage that its use requires separate fasteners for assembly, which is not only unwelcome from the assembler's point of view, but involves staples which are not acceptable in the food industry.


Generally, the present disclosure is directed to methods for forming dual embedded stressor regions in semiconductor devices such as transistor elements and the like, using in situ doping and substantially diffusionless annealing techniques. One illustrative method disclosed herein includes forming first and second cavities in PMOS and NMOS device regions, respectively, of a semiconductor substrate, and thereafter performing first and second epitaxial deposition processes to form in situ doped first and second embedded material regions in the first and second cavities, respectively. The method further includes, among other things, performing a single heat treating process to activate dopants in the in situ doped first and second embedded material regions.

1. Field of the Invention
Generally, the present invention relates to sophisticated integrated circuits, and, more particularly, to using in situ doping and substantially diffusionless annealing for forming embedded stressor regions to enhance the performance of semiconductor devices such as transistor elements and the like.
2. Description of the Related Art
In modern ultra-high density integrated circuits, device features have been steadily decreasing in size to enhance the performance of the semiconductor device and the overall functionality of the circuit. In addition to an increase in the speed of operation due to reduced signal propagation times, reduced feature sizes allow an increase in the number of functional elements in the circuit in order to extend its functionality. Today, advanced semiconductor devices may include features having a critical size of 32 nm or even less.
The fabrication of integrated circuits requires the formation of a large number of circuit elements on a given chip area according to a specified circuit layout. Generally, a plurality of process technologies are currently practiced, wherein, for complex circuitry, such as microprocessors, storage chips and the like, CMOS technology is currently the most promising approach, due to the superior characteristics in view of operating speed and/or power consumption. During the fabrication of complex integrated circuits using CMOS technology, millions of complementary transistors, i.e., N-channel (NMOS) transistors and P-channel (PMOS) transistors, are formed on a substrate including a crystalline semiconductor layer. A MOS transistor, irrespective of whether an N-channel transistor or a P-channel transistor is considered, comprises so-called PN junctions that are formed by an interface of highly doped drain and source regions with an inversely doped channel region disposed between the drain region and the source region. The conductivity of the channel region, i.e., the drive current capability of the conductive channel, is controlled by a gate electrode formed above the channel region and separated from the channel by a thin gate insulating layer, or gate dielectric. In operation, an appropriate control voltage is applied to the gate electrode, which thereby forms a conductive channel below the gate electrode. The conductivity of the channel region depends on several factors, including dopant concentration, the mobility of the charge carriers and, for a given extension of the channel region in the transistor width direction, on the distance between the source and drain regions, which is also referred to as channel length. Therefore, in combination with the capability of rapidly creating a conductive channel below the insulating layer upon application of the control voltage to the gate electrode, the conductivity of the channel region substantially determines the performance of the MOS transistors. Thus, the reduction of the channel length, and the commensurate reduction of the channel resistivity, renders the channel length a dominant design criteria for accomplishing an increase in the operating speed of the integrated circuits.
The continuous shrinkage of the transistor dimensions, however, carries with it a plurality of issues which have to be addressed so as to not unduly offset the advantages that may be obtained by steadily decreasing the channel length of MOS transistors, such as the development of enhanced photolithography and etch strategies necessary to reliably and reproducibly create circuit elements having very small critical dimensions for new device generations. Given the general processing difficulties associated with the continuous size reduction of the critical dimensions, i.e., the gate length of the transistors, other mechanisms have been utilized in an effort to increase charge carrier mobility in the channel region of transistor elements and thereby enhance overall device performance. For example, in one approach, the dopant concentration within the channel region may be reduced, thereby reducing scattering events for the charge carriers and thus increasing the conductivity. However, reducing the dopant concentration in the channel region significantly affects the threshold voltage of the transistor device, thereby making a reduction of the dopant concentration a less attractive approach unless other mechanisms are developed to adjust a desired threshold voltage. In another approach, the lattice structure in the channel region may be modified, for instance by creating tensile or compressive stress, which results in a modified mobility for electrons and holes. For example, creating a tensile stress in the channel region increases the mobility of electrons, wherein, depending on the magnitude of the tensile stress, an increase in mobility of up to 20% may be obtained, which, in turn, may directly translate into an increased channel conductivity and a corresponding improvement in NMOS transistor performance. On the other hand, a compressive stress in the channel region may increase the mobility of holes, thereby providing the potential for enhancing the performance of PMOS transistors.
One common approach for inducing a desired level of stress in the channel region of some semiconductor devices is through the use of stressed overlayers. In practice, a stressed overlayer—i.e., a material layer having an intrinsic internal stress—is formed above the transistor elements, and the intrinsic stress of the stressed overlayer is transferred through the gate electrode and any sidewall spacer elements to the channel region below the gate dielectric layer. The stressed overlayer method, however, has some inherent drawbacks. For example, once formed, the stressed overlayer must typically remain in place throughout all remaining process steps, so that the beneficial stresses imparted to the channel region by the stressed overlayer is maintained in the final device configuration. Furthermore, the presence of any intermediate device elements or material layers between a stressed overlayer and the targeted channel region of a MOS transistor—such as the aforementioned gate electrode, sidewall spacer elements and gate dielectric layer—may tend to mitigate the level of stress than can be transferred through those elements or layers to the channel. Additionally, since the type of intrinsic stress used to increase hole mobility along the channel length of PMOS transistor elements (i.e., a compressive stress) differs from the type of stress used to increase electron mobility along the channel length of NMOS transistor elements (i.e., a tensile stress), different materials and deposition parameters may be required to form each type of stressed overlayer. Moreover, sophisticated photolithography and/or etching techniques may also be necessary to facilitate the formation of stressed overlayers, thus increasing overall processing complexity and costs, while potentially reducing product yield.
One promising technique for inducing the desired state of stress in the channel region of PMOS transistors—which may be used in lieu of, or possibly even in combination with, the stressed overlayer approach described above—is to embed stressed material regions in the active area of the PMOS device. This approach involves forming cavities in the device substrate adjacent to the gate electrode structure of the PMOS device, and then epitaxially forming a stressed silicon-based semiconductor material, such as silicon-germanium, in the cavities. This epitaxially formed material tends to induce the desired compressive stress in the channel region of the PMOS device, as will be described more fully below.
FIGS. 1a-1f depict one illustrative prior art integration scheme that has been used for forming a CMOS device that includes both NMOS and PMOS transistors, wherein a stressed material region is formed in the active area adjacent to the channel region of the PMOS device. More specifically, FIG. 1a shows a simplified schematic cross-sectional view of an illustrative semiconductor device 100 during an early stage of manufacturing. The device 100 includes an illustrative substrate 101, which may represent any appropriate carrier material for having formed thereon or thereabove a semiconductor layer 103.
The device 100 may generally include device regions 100N and 100P in which illustrative NMOS and PMOS transistor elements 150n and 150p, respectively (see FIG. 1f), may be formed during later manufacturing stages, as will be discussed in further detail below. The device regions 100N and 100P may include active areas 105n and 105p, respectively, which may in turn be defined and enclosed by isolation structures 104, as illustrated in FIG. 1a. In certain illustrative embodiments, the isolation structures 104 may be provided in the form of a shallow trench isolation, as may typically be used for sophisticated integrated circuits. Additionally, the active areas 105n, 105p may also include an appropriate dopant species for establishing the requisite conductivity type. For example, a p-type dopant, such as boron or boron difluoride, may be incorporated into the active area 105n so as to form a p-well, in and above which may be formed NMOS transistor elements. On the other hand, an n-type dopant, such as phosphorous or arsenic and the like, may be incorporated into the active area 105p, thereby forming an n-well in and above which PMOS transistors may be formed.
In the manufacturing stage depicted in FIG. 1a, gate electrode structures 120n and 120p have been formed in the device regions 100N and 100P and above the active areas 105n and 105p, respectively. Each of the gate electrode structures 120n and 120p may include a plurality of layers and materials, depending on the desired transistor element types and overall integration scheme. For example, in some CMOS integrations, the transistor architecture may be based on a conventional gate insulating layer and polysilicon gate electrode (polySiON) configuration, wherein the materials making up each of the gate electrode structures 120n and 120p are adapted accordingly. On the other hand, transistor architecture for both gate electrode structures 120n and 120p may be based on a more advanced high-k dielectric and metal gate electrode (HK/MG) configuration, wherein a high-k dielectric material should be understood to be a material having a dielectric constant, or "k-value," of approximately 10 or greater. Furthermore, in still other CMOS integrations, the respective gate electrode structures 120n and 120p may also have substantially different configurations from one another (e.g., polySiON vs. HK/MG, or vice versa), again depending on the overall device design criteria. However, for simplicity, the illustrative gate electrode structures 120n and 120p of FIG. 1a are both depicted as being based on a conventional polySiON gate electrode configuration, as will now be described.
As shown in FIG. 1a, each of the gate electrode structures 120n and 120p may be made up of, for example, a gate insulation layer 107, which may typically be a silicon dioxide or silicon oxynitride material layer, and a gate electrode 108 made of, for example, polysilicon material. Furthermore, the gate insulation layers 107 of the gate electrode structures 120n and 120p may separate the gate electrodes 108 from channel regions 106n and 106p, respectively, therebelow. Additionally, the gate electrode structures 120n, 120p may also include a gate cap layer 109 that is made up of, for example, silicon nitride, and which is adapted to protect the gate electrode 108 during subsequent device processing, such as during etch steps and the like. The gate electrode structures 120n, 120p shown in FIG. 1a may be formed using techniques that are well known to those skilled in the art, e.g., depositing and/or forming a stack of material layers as may be appropriate for the specific gate electrode type, followed by performing one or more etching processes to define the gate electrode structures 120n, 120p, including the gate cap layers 109 positioned thereabove.
FIG. 1b depicts the illustrative semiconductor device 100 of FIG. 1a after several manufacturing operations have been performed, some of which will now be described. First, a spacer layer 114, such as, for example, silicon nitride and the like, is blanket-deposited above the device 100, so as to cover both of the device regions 100N and 100P. Thereafter, an etch mask (not shown) is formed above the device 100 and patterned so that the etch mask covers the NMOS device region 100N and exposes at least a portion of the spacer layer formed above the PMOS device region 100P. A selective anisotropic etching process, such as a reactive ion etch (RIE) process and the like, is then performed so as to form sidewall spacers 114s on the sidewalls of the gate electrode structure 120p, and to remove the exposed portion of the spacer layer 114 from above the active area 105p. Next, one or more etching processes are performed to define a plurality of cavities 115 in the semiconductor material 103, i.e., in the active area 105p of the PMOS region 100P. During these one or more etching processes, the gate electrode 108 of the gate electrode structure 120p may be substantially protected from the effects of the etch chemistries by the sidewall spacers 114s and the gate cap layer 109. Furthermore, the remaining portions of the spacer layer 114 may act as a hard mask to protect the NMOS device region 100N and any covered portions of the PMOS device region 100P.
The position of the cavities 115 relative to a channel region 106p below the PMOS gate electrode structure 120p is typically determined by the thickness 114t of the sidewall spacers 114s, and will ultimately affect the level of stress that can be induced in the channel region 106p. Furthermore, the width 115w and depth 115d of the cavities 115 may vary depending on the particular device application and/or processing requirements. For example, in some applications, the depth 115d may range anywhere from 50-70 nm, and the width 115w may extend across the active area 105p from a point that is substantially aligned with and below the sidewall spacers 114s, and over to the trench isolation structures 104 that define the extent of the active area 105p. However, cavities 115 having a narrower width 115w may also be used, as is shown for the illustrative semiconductor device 100 of FIG. 1b.
After the cavities 115 have been formed in the active area 105p, an epitaxial deposition process is then performed so as to form an embedded stressor material region 117 in the cavities 115. In one example, a two-step epitaxial process may be used to form the embedded stressor material region 117, in which case the region 117 may include a first material layer 117a that is an undoped layer of silicon-germanium (SiGe) material having a germanium content of approximately 20%, and which may tend to impart a compressive stress in the channel region 106p, as will be further discussed below. Furthermore, the embedded stressor material region 117 may also include a second material layer 117b that is made up of an undoped material layer that is substantially silicon. In certain applications, the use of the second material layer 117b that is substantially made up of silicon may be necessary so as to avoid material agglomeration problems that may potentially occur when, during later processing steps, a nickel silicide contact region is formed in a layer of material that includes some amount of germanium, resulting in a so-called "spotty" nickel silicide contact. The presence of an upper material layer in the embedded stressor material region 117 that is substantially silicon—such as the second material layer 117b—may substantially avoid such "spotty" nickel silicide occurrences.
Depending upon the particular application, the thickness of the first material layer 117a may range from 40-50 nm, and in some cases may substantially fill the cavities 115, depending on the device processing parameters and/or the degree of compressive stress required. Furthermore, when used, the second material layer 117b may have a thickness that ranges from 15-20 nm, which would typically correspond to the approximate thickness of any nickel silicide material formed in the contact regions of the active area 105p. Additionally, in some cases the complete embedded stressor material region 117 may have a raised upper surface 117s relative to an interface of the channel region 106p and the gate insulating layer 107.
As is well known to those having skill in the art, during an epitaxial deposition process, the material comprising the silicon-based substrate acts as a "seed crystal." Therefore, during the epitaxial deposition process, silicon-based materials will only be formed on the exposed surfaces of silicon-containing semiconductor materials. On the other hand, surfaces that are covered by dielectric materials such as silicon nitride, silicon dioxide and the like, will be effectively "masked." Therefore, as shown in FIG. 1b, epitaxially deposited material will not be formed on, for example, the spacer layer 114 present above the NMOS device region 100N and portions of the PMOS device region 100P. Furthermore, epitaxially deposited material will not be formed on the sidewall spacers 114s, or the gate cap layer 109 of the gate electrode structure 120p.
While, in general, the silicon-based material comprising the semiconductor layer 103—e.g., the PMOS active area 105p—will act as a "seed layer" during epitaxial deposition, the epitaxially deposited embedded stressor material regions 117 may also take on a lattice structure and crystal orientation that is substantially identical to those of the semiconductor layer 103 in the active area 105p. Furthermore, due to the relatively larger covalent radius of germanium atoms as compared to silicon atoms, the lattice structure of an unrestrained SiGe semiconductor material is generally larger than that of an unrestrained semiconductor material that is substantially silicon. Accordingly, when a SiGe semiconductor material is epitaxially deposited on a substantially crystalline silicon material—such as, for example, the semiconductor layer 103—the restrained lattice structure of the SiGe material may induce a localized stress on the surrounding lattice structure of the substantially silicon material of the semiconductor layer 103. In this way, an epitaxially deposited semiconductor material region comprising SiGe that is formed in the cavities 115 of the active area 105p—such as the first material layer 117a of the embedded stressor material region 117—may induce a compressive stress (indicated by arrows 162) on the channel region 106p of the PMOS transistor elements formed in the device region 100P. Accordingly, an overall improvement in device performance may be realized due to an enhanced hole mobility, as previously described.
As shown in FIG. 1c, a selective etch process 130, which may include multiple etching steps, is thereafter performed to remove the remaining portions of the spacer layer 114 (i.e., the hardmask layer) from above the device regions 100N and 100P, the sidewall spacers 114s, and the cap layers gate 109 from the gate electrode structures 120n and 120p. Then, as shown in FIG. 1d, first spacer elements 124 are formed adjacent to the sidewall of the NMOS and PMOS gate electrode structures 120n and 120p, respectively, using material layer deposition and etching techniques well known in the art. At this point, one or more ion implantation sequences are performed so as to form certain doped regions in the active areas 105n, 105p, such as, for example, a tilt-angle implantation sequence 131 to form halo implant regions 141, and/or a shallow implantation sequence 132 to form extension implant regions 142, and the like. As should be appreciated by those of ordinary skill, the implantation sequences 131 and 132 may each include various masking and implantation steps, and the implantation parameters, such as implantation energy, ion/dopant type, implant angle, and the like, may vary according to the specific transistor type and device design criteria. Furthermore, it should be appreciated that the thickness of the first spacer elements 124 is typically adjusted as required to establish the position and extent of the device extension and/or halo implant regions 142, 141.
As shown in FIG. 1e, second spacer elements 125 are then formed adjacent to the first spacer elements 124 based on techniques and materials known in the art, as noted previously. Thereafter, a deep ion implantation sequence 133 is performed so as to form deep source and drain regions 143 in the active areas 105n, 105p of the PMOS and NMOS device regions 100N, 100P, based on masking and implantation techniques, dopant materials, and the like, that are known to those skilled in the art. As with the first spacer elements 124 above, the thickness of the second spacer elements 125 may also be adjusted so as to properly locate the deep source and drain implant regions 143 relative to the gate electrode structures 120n, 120p and the channel regions 106n, 106p.
As shown in FIG. 1f, the illustrative semiconductor device 100 may then be subjected to a heat treating process 134 that is adapted to: 1) repair any damage that may have occurred to the crystalline lattice structure of the active areas 105n and 105p during the ion implantation sequences 131, 132 and/or 133; and 2) activate any implanted dopant materials.
In one example of a typical state-of-the-art process flow, the heat treating process 134 may include a rapid thermal annealing (RTA) process, sometimes referred to as a spike annealing process. Typically, an RTA anneal is performed in the range of 1000-1100° C., where the temperature is above the 1000° C. level for approximately 10 seconds, and a peak temperature of around 1100° C. is maintained for approximately 2 seconds. In certain cases, the RTA process may be supplemented by a second annealing process so as to maximize dopant activation. For example, an ultra-fast annealing (UFA) process of extremely short duration, such as, for example, a flash lamp annealing process, a laser spike annealing (LSA) process, and the like, may be performed after the RTA anneal. Generally, the UFA anneal is performed at a higher temperature than the RTA anneal, but for a significantly shorter amount of time, such as, for example, a total time that is up to 3-4 orders of magnitude shorter in duration. For example, in a typical UFA process, a peak temperature in the range of 1200-1300° C. may be achieved, but the process may only last for approximately 10 milliseconds, or even less.
As a result of the dopant activation that occurs during the heat treating process 134, source and drain regions 144 of the NMOS and PMOS transistor elements 150n, 150p, respectively (schematically depicted in FIG. 10 may be established and corresponding P-N junctions created in the active areas 105n and 105p of the device regions 100N and 100P, respectively. Additional processing operations may then be performed to complete fabrication of the semiconductor device 100; e.g., forming metal silicide regions on the source/drain regions 144 and/or the gate electrodes 108, forming various contact elements and metallization layers, etc.
One problem associated with the prior art process flow described above is that the epitaxially formed embedded stressor material regions 117 are subjected to various implantation sequences as described above—e.g., a halo region implantation sequence 131, an extension region implantation sequence 132, and a source/drain implantation sequence 133. During one or more of the implantation sequences, the embedded stressor material regions 117 may suffer associated damage to the lattice structure of one or both of the first and second material layers 117a, 117b, which may sometimes cause at least a partial stress relaxation of the embedded stressor material regions. Additionally, when the semiconductor device 100 is subjected to the heating process 134 so as to repair any such lattice structure damage and to activate the implanted dopant ions, the embedded stressor material regions 117 may sometimes have a tendency to relax, particularly the constrained SiGe material of the first material layer 117a. As a result, the embedded stressor material regions 117 may ultimately impart a lesser degree of compressive stress 162 in the channel region 106p of the PMOS transistors 150p. This in turn may tend to reduce the performance capabilities of the PMOS transistor elements 150p formed in the device region 100P, as well as that of any semiconductor device 100 that may include such PMOS transistors 150p. Moreover, the above-described process flow does not incorporate any steps that would tend to impart a tensile stress in the active area 105n of the device region 100N, which might otherwise positively affect the mobility of electrons in the channel region 106n of the NMOS transistors 150n and enhance the performance capabilities thereof.
Furthermore, it should be appreciated that during the typical heat treating process performed to heal any crystalline damage and to activate implanted dopants, such as the heat treating process 134 described above, the dopant atoms will commonly diffuse to one degree or another through the semiconductor material of the active areas 105n, 105p. Such dopant diffusion is schematically depicted by the change between the as-implanted extension and deep source/drain regions 142 and 143 shown in FIG. 1e, and the final as-annealed source/drain regions 144 as shown in FIG. 1f. For some semiconductor devices, the amount of dopant diffusion may be planned and optimized as part of the overall device integration scheme, so as to define and set the location of the P-N junctions of the respective devices. However, as semiconductor devices are aggressively scaled from the 32 nm design node down to the 28 nm or 22 nm nodes, or even smaller, critical dimensions such as gate length and the like are significantly decreased. In such aggressively scaled devices, even small amounts of unwanted dopant diffusion in critical device areas—such as the channel regions 106n and/or 106p of the transistors 150n and/or 150p—may be undesirable, as it could cause detrimental short channel behavior in some devices, thereby leading to a commensurate overall decrease in device performance.
The present disclosure is directed to various methods that may avoid, or at least reduce, the effects of one or more of the problems identified above.

In situ doping and diffusionless annealing of embedded stressor regions in PMOS and NMOS devices


Disclosed are an electronic device, a control method thereof, and a recording medium. The electronic device includes a first loop unit configured to sense a first signal relating to an input of the touch object, a second loop unit configured to sense a second signal relating to the input of the touch object, and a controller configured to determine a sensing area including the location where the input is received based on the first signal and to determine the input location included in the determined sensing area based on the second signal.

1. Field of the Invention
The present invention relates to a sensing device, a control method thereof, and a recording medium.
2. Description of the Related Art
Due to the recent proliferation of electronic devices, such as smart phones, the development of technologies relating to sensing functions/operations of a touch screen mounted in the smart phones has steadily increased. In order to input a specific command in relation to a smart phone or a touch screen, a user may input the specific command or designate a specific icon by touching with a finger or a stylus pen using an Electromagnetic Induction (EI) (hereinafter, electromagnetic induction pen) to a specific location of the touch screen.
In order to utilize the stylus pen using electromagnetic induction, a loop coil is disposed in the electronic device, and a control is made such that voltage is applied to the loop coil to generate an electromagnetic field that is transferred to the electromagnetic induction pen. The electromagnetic induction pen includes a capacitor and a loop, and converts the transferred electromagnetic field into an electromagnetic field having a predetermined frequency component to be re-discharged.
The discharged electromagnetic field from the electromagnetic induction pen is re-transferred to the loop coil of the circuit board, which makes it possible to determine a location where the electromagnetic induction pen closely approaches the touch screen.
In conventional electromagnetic induction methods, channels for processing input and output signals have to be assigned to all loop coils included in a circuit board of an electronic device in order to apply an electromagnetic field to the electromagnetic induction pen. When a plurality of loop coils exists on the circuit board, a plurality of channels are required, which leads to an increase in the amount of calculation for processing signals from the plurality of channels. In addition, a high-performance processor may be required to process the increasing calculation, which is burdensome on firmware.
Furthermore, when a touch location is determined through the electromagnetic induction methods, if the area of a display for which the touch screen is employed increases, such as an electronic bulletin board, the strength of signals decreases toward the central portion of the touch screen due to the arrangement of multiple coils, rendering it difficult to accurately determine the touch location.

Sensing device, control method thereof, and recording medium


A protective guard is provided for a lock cylinder in a door, which consists of a generally rectangular metal plate assembly having a central passageway therethrough. Components are for attaching the plate assembly to the door with the central passageway generally aligned with the lock cylinder. The attaching components are concealed, removable and adjustably connected to an inner side of the plate assembly, thereby rendering the lock cylinder less susceptible to tampering.

The instant invention relates generally to devices for preventing the tampering of door locks and more specifically it relates to a protective guard for a lock cylinder in a door, which provides bolts that are concealed and adjustably connected on an inner side of the protective guard to mount the protective guard over the lock cylinder.
There are available various conventional devices for preventing the tampering of door locks which do not provide the novel improvements of the invention herein disclosed.


A sample positioning method that can easily and quickly position a target observation area of a sample, which is disposed on a sample stage in a sample chamber of a charged particle beam apparatus, into a field of view of a first charged particle beam. The method includes displaying an image including the sample on a display screen; designating an attention point on the basis of the image on the display screen while maintaining the relative position of the attention point with respect to the sample stage; aligning the position of the sample stage in the direction of an optical axis so that the attention point is positioned in an on-axis point tracer plane perpendicular to the optical axis through an on-axis target point on the optical axis; moving the attention point to the on-axis target point by performing detection of deviation of the attention point from the on-axis target point and movement in the on-axis point tracer plane; and moving the attention point into a depth of focus of a charged particle beam optics.

1. Technical Field
The present invention relates to a sample positioning method and a charged particle beam apparatus.
2. Description of the Related Art
A charged particle beam is a general term for an ion beam and an electron beam. An apparatus that can perform any one of processing, observing, and analyzing (hereafter, referred to as 'observing etc.') using a focused beam of charged particles is called a charged particle beam apparatus. Such a charged particle beam apparatus is equipped with at least any one of an ion beam column for generating an ion beam and an electron beam column for generating an electron beam. Such a charged particle beam apparatus also includes a complex apparatus equipped with a plurality of columns.
In a charged particle beam apparatus, it is required to put an objective portion, that is, a portion to be observed, of a sample (hereafter, briefly referred to as a 'target observation area') in the field of view of a charged particle beam before observing the sample using a charged particle beam.
For example, an SEM (Scanning Electron Microscope) having an optical microscope for scanning an area to be observed of a sample has been disclosed in Patent Document 1.
A particle optical SEM (charged particle beam apparatus) that takes an image with a CCD camera by radiating a laser beam to a sample in a test chamber (sample chamber) and displays a mark showing the position of the axial line of a particle beam with the image of the sample in the test chamber on a display has been proposed in Patent Document 2. According to the particle optical SEM, an operator positions the sample while seeing the mark and the image of the sample on the display.

Sample positioning method and charged particle beam apparatus


Systems and methods of precision remote PTZ control of IP cameras are provided. Some methods include capturing a plurality of images, each image in the plurality of images corresponding to an angle into which a video surveillance device can be positioned, receiving user input indicating a desired position of the video surveillance device, displaying one of the plurality of images, the one of the plurality of images corresponding to the desired position of the video surveillance device, receiving user input confirming the one of the plurality of images, and transmitting instructions to the video surveillance device, the instructions containing coordinate information corresponding to the one of the plurality of images.

It is known in the art that there is an operation delay in the remote PTZ (pan, tilt, zoom) control of IP (Internet protocol) cameras. Indeed, the latency of the PTZ control of an IP camera is a key parameter of a system that incorporates IP cameras with PTZ control.
In many commercial scenarios, operation of the PTZ control of an IP camera is in a local network. Accordingly, the latency and operation delay can be somewhat controlled. However, even in these scenarios, the latency and operation delay is longer than analog PTZ control.
When operation of the PTZ control of an IP camera is via the Internet, the complicated network environment causes the latency and operation delay to be longer than in a local network. Indeed, as mobile applications and 3G and 4G networks become more popular and user traffic increases accordingly, the latency and operation delay of the PTZ control of IP cameras via the Internet is becoming longer and more unpredictable.
Two systems and methods for remote PTZ control of IP cameras are known in the art. First, PTZ can be controlled via a user interface that includes directional arrows, such as buttons with arrows in different directions. Second, PTZ can be controlled via a user interface that includes slide bars that can be moved in different directions. However, the user may need to perform several operations and provide more than one input to move the PTZ of the IP camera to a desired position.
Furthermore, both known systems and methods have delays from when the user provides input to when the IP camera moves in accordance with the user's input to when the user receives video confirmation that the IP camera moved in accordance with his input, which may assist the user in determining his next input. Indeed, during this latent period, the user may be uncertain as to whether his input was successfully received and executed. Accordingly, the user may provide additional PTZ control input during the latent period, which may cause unexpected and/or undesired movement of the IP camera.
Preset positions of the PTZ of an IP camera have been used to overcome the operation delays and latent periods described above. For example, the user can provide input to move the IP camera to one of a plurality of preset positions. However, the use of preset positions is often undesirable because the user is limited in the positions to which he can move the IP camera.
In view of the above, there is a continuing, ongoing need for improved systems and methods of remote PTZ control of IP cameras.

System and method of precision remote PTZ control of IP cameras


Provided herein are inter alia novel compositions and methods having application in the field of enhanced oil recovery. In particular, the short hydrophobe compounds and mixtures thereof presented herein can be used, inter alia, for the recovery of a large range of crude oil compositions from challenging reservoirs.

Enhanced Oil Recovery (abbreviated EOR) refers to techniques for increasing the amount of unrefined petroleum, or crude oil that may be extracted from an oil reservoir (e.g. an oil field). Using EOR, 40-60% of the reservoir's original oil can typically be extracted compared with only 20-40% using primary and secondary recovery (e.g. by water injection or natural gas injection). Enhanced oil recovery may also be referred to as improved oil recovery or tertiary oil recovery (as opposed to primary and secondary oil recovery).
Enhanced oil recovery may be achieved by a variety of methods including miscible gas injection (which includes carbon dioxide flooding), chemical injection (which includes polymer flooding, alkaline flooding and surfactant flooding), microbial injection, or thermal recovery (which includes cyclic steam, steam flooding, and fire flooding). The injection of various chemicals, usually as dilute aqueous solutions, has been used to improve oil recovery. Injection of alkaline or caustic solutions into reservoirs with oil that has organic acids naturally occurring in the oil (also referred to herein as "unrefined petroleum acids") will result in the production of soap that may lower the interfacial tension enough to increase production. Injection of a dilute solution of a water soluble polymer to increase the viscosity of the injected water can increase the amount of oil recovered from geological formations. Aqueous solutions of surfactants such as petroleum sulfonates may be injected to lower the interfacial tension or capillary pressure that impedes oil droplets from moving through a reservoir. Special formulations of oil, water and surfactant microemulsions, have also proven useful. Application of these methods is usually limited by the cost of the chemicals and their adsorption and loss onto the rock of the oil containing formation. Further, different crude oils require different surfactant compositions in order to provide for efficient oil production. For instance, light crude oils are very compatible with short hydrophobe surfactants. However, there is a need in the art for light oil EOR surfactants with better water solubility while maintaining the high surface activities. Provided herein are compositions and methods using the same that address these and other needs in the art.

Board of Regents, The University of Texas System


A plasma processing system controls the electronegativity of a plasma produced by ionizing a process gas when processing a substrate by using the plasma. The relation between the pressure in a processing vessel (1) and the frequency of a RF power source (11'), and the electronegativity of the plasma produced by the agency of RF power is determined beforehand. A controller (18) adjusts the pressure in the processing vessel (1) and/or the frequency of the RF power source (11') in a real-time control mode by a feedback control operation on the basis of a pressure measured by a pressure sensor (17) and a frequency measured by a frequency meter (15) to adjust the electronegativity of the plasma to an appropriate value. The electronegativity of the plasma can be determined through simulation using a one-dimensional RCT model of the plasma.

The present invention relates to a plasma processing system using a plasma of a process gas for processing a substrate such as a semiconductor wafer or the like by a plasma process, such as plasma etching process.
Minimum device dimensions specified by pattern rules have progressively been decreased with the ongoing miniaturization of semiconductor devices and the growth of the number of components per IC chip. Accordingly, fine etching techniques have become particularly indispensable to the fabrication of semiconductor devices. Integrated circuit fabrication processes that use plasma etching processes are most prevalent at present.
Generally, a RF capacitive coupled reactor is used to carry out a plasma etching process. A reactive ion etching system (RIE system), which applies a RF voltage to an electrode supporting a wafer and uses the physical actions of radicals and ions, is capable of highly anisotropic etching and is suitable for fine processing.
Incidentally, the reaction vessel of the RIE system needs to be maintained at a relatively high pressure of several hundreds mTorrs in view of achieving highly reactive etching. In such a reaction vessel, a relatively large amount of dust of reaction byproducts is produced, which tends to reduce the yield rate of semiconductor devices requiring fine processing.
High-energy ions impinge on a semiconductor wafer during the operation of a RIE process and thereby charge-up damage, i.e., the destruction of devices by charge-up, is liable to be caused.
Efforts have been made to determine appropriate process conditions through the simulation using various parameters to simulate the condition of a plasma. However, any plasma etching process using properly controlled plasma has not successfully been developed so far through the adjustment of the generally known parameters.


A coaxial cable connector configured to be mounted to an externally threaded connector, comprising a nut portion having an inner thread configured to engage with an outer thread of said externally threaded connector, an inner-sleeve portion coaxially arranged with said nut and a first sleeve coaxially arranged with said nut, wherein said first sleeve comprises an inner flange radially on an outer wall of said inner-sleeve portion, characterized in that: when said nut is rotated relatively to said first sleeve, said inner-sleeve portion is rotated relatively to said first sleeve.

Field of the Disclosure
The present disclosure relates to a coaxial cable connector, and more particularly to a coaxial cable connector with improved electric properties.
Brief Description of the Related Art
A conventional screw-type coaxial cable connector has poor connection for the ground reference since the coaxial cable connector has a nut, when engaging with a thread interface of an externally threaded connector, not fully contacting an inner sleeve of the coaxial cable connector, and the inner sleeve does not fully contact the externally threaded connector. Besides, the coaxial cable connector could be pulled back such that the nut and the inner sleeve are loosely connected with the externally threaded connector and the performance of signal transmission becomes poor.


A multifunction device includes a multifunction controller, a first interface for receiving input data from at least one scanner and a second interface for outputting processed input data to at least one printer, wherein the first interface and the second interface are each a standard interface. In a presently preferred embodiment the first interface is comprised of a SCSI interface. The multifunction device further includes a graphical user interface for controlling the operation of the multifunction device, including setting operational parameters for the at least one scanner and the at least one printer. Other interfaces are also provided, including one for coupling to a facsimile device for outputting processed input data to the facsimile device, and another interface for coupling to an e-mail port for outputting processed input data to the e-mail port. Another interface is for coupling to a global data communications network, such as the Internet, for receiving document data as well as recipient contact information therefrom.

This invention pertains to multifunction devices such as, but not limited to, devices that integrate facsimile, scanner, copier and printer functions, and more particularly this invention relates to improved architectures and user interfaces for multifunction devices.
Traditional multifunction devices are monolithic, are based on proprietary device controllers, and have small touch screen user interfaces. Some of these devices are beginning to add e-business capabilities such as e-mail and directory, but their functionality is restricted by their monolithic architecture, their proprietary controllers, and their limited user interfaces.
Modular networked image processing systems are known in the art. Reference in this regard may be had to U.S. Pat. No. 5,530,907, entitled xe2x80x9cModular Networked Image Processing System and Method Thereofxe2x80x9d, issued Jun. 25, 1996, by K. Pavey and D. Feitelberg.
Reference can also be had to commonly assigned U.S. Pat. No. 4,454,575, entitled xe2x80x9cShared Memory System with Access by Specialized Peripherals Managed by Controller Initialized by Supervisory CPUxe2x80x9d, issued Jun. 12, 1984, whereby a document distribution center is organized to process data in specialized peripherals devices.
It is a first object and advantage of this invention to provide an improved architecture and user interface for a multifunction device.
It is another object and advantage of this invention to provide a multifunction device having a multifunction controller and a plurality interconnected drivers and components that can be added, deleted and upgraded as desired.
The foregoing and other problems are overcome and the objects of the invention are realized by methods and apparatus in accordance with embodiments of this invention.
The teachings herein pertain to a multifunction device that includes a scanner, a printer, and a multifunction controller with a touch screen graphical user interface (GUI). The multifunction device supports scanning, printing, copying, sending and receiving facsimiles (faxes) and sending and receiving e-mails. In accordance with an aspect of these teachings, network connections are made between the printer and the multifunction controller. In addition, the scanner is also a modular device, and preferably uses a standardized (non-proprietary) personal computer (PC) interface, such as a SCSI interface. This arrangement enables the multifunction controller to work with a variety of printers and a variety of scanners, while maintaining the appearance of an integrated device. The teachings herein also provide for integrating in a modular way with directory, library, e-mail, e-fax and e-form middleware, as well as print management middleware, also referred to as print servers, to significantly extend the capabilities of the multifunction device.
The modularity of the multifunction device provides a number of advantages, in that the device is more affordable, has greater investment protection, is scalable, and has greater reach and availability.
One important aspect of these teachings is that by connecting the multifunction device to modular middleware services, such as external databases and services available over a network, the capabilities of the multifunction device are significantly extended, while at the same time delivering the desired additional capabilities with a simple interface.
Another feature of these teachings is the general purpose controller and the full size touch screen. That is, the multifunction controller is preferably implemented as a general purpose system, such as a PC or a workstation, while the related GUI is implemented as a full size touch screen. The general purpose multifunction controller enables modularity and middleware integration, while the full size touch screen enables a wider range of capabilities to be realized in the multifunction device than is possible with a traditional multifunction devices, without requiring the operator to have an specific computer skills.
The teachings found herein provide a cost effective multifunction device, as the multifunction controller and the scanner can be added to existing printers to create the multifunction device. The multifunction device is also more scalable than traditional multifunction devices. For example, when the capabilities of a first printer and/or scanner are outgrown, these components can be upgraded to higher capacity and higher performance devices. The multifunction device is also more scalable in that it can connect a plurality of scanners to one printer, or one scanner to a plurality of printers, or a plurality of scanners to a plurality of printers.
The teachings found herein also provide investment protection for the purchaser by allowing more advanced printers or scanners to replace older technology, without replacing the entire multifunction device. The multifunction device also has a greater reach than traditional multifunction devices, at least for the reason that the scanner can be remote from the printer, and exhibits greater availability since a backup printer can be selected if a local printer is out of service, and the multifunction device can thus continue to be used. The multifunction device is also more competitive than traditional devices, as it allows the best scanners and printers to be selected on their own merit, rather than being tied together in a monolithic device.
Integration with network-based services, such as a directory database, simplifies the identification of people and resources at the multifunction device, while integration with a document library database enables convenient access for the storage and retrieval of documents. In addition, integration of the multifunction device with electronic mail (e-mail) provides the flexibility to deliver information instantly and with greater reach than can be achieved with paper copies alone.
In a preferred embodiment the scanner component or components are coupled directly to a single, dedicated multifunction controller to allow rapid conversion of scanned documents to a desired printer format (e.g., a Postscript(trademark) format) through a dedicated pipeline processor.
The multifunction controller may access a set of global services, such as forms, employee profiles, a fax server, an e-mail server, over a data communications network (such the Internet or a LAN), or it may incorporate these services locally. A plurality of multifunction controllers can be coupled together through a data network, and may share resources between themselves, including both global resources and local resources.
Forms accessed from a forms database are converted from their native format, for example, from a .pdf format, to a printer format (e.g., Postscript(trademark)) by the pipeline processor.
The multifunction controller also allows the modular replacement of printers and scanners, and also enables a user to send the same document to a number of printers, fax numbers, and e-mail addresses. The multifunction controller provides a user with an ability to request printing, to hold a document for later access, as well as to redirect a document to a desired printer or other output device.
The teachings herein also pertain to a multifunction copier device, which includes such functions as faxing, e-mailing, copying, and data storage/retrieval.
The teachings herein also provide an ability to dynamically and bidirectionally integrate remote datastores or databases, and provide access to the information locally or remotely. These teachings also support the exchange of information so that the multifunction device can retrieve information from, and insert information into, remote datastores. The datastore connection is preferably made through common networking interfaces, such as a global data communications network (the Internet is one example), and/or through a local area network (LAN).
The teachings herein provide a xe2x80x9ckioskxe2x80x9d-type workflow and interface into remote datastores, allowing easy walkup access to complex tasks using a variety of remote datastores, such as corporate records databases and corporate forms databases.
By deploying a multifunction device with an internal set of functions, including as fax, copy and e-mail, these teachings provide access to data in conjunction with an ability for an operator to use all of the functions in the multifunction device. For example, the operator can retrieve a document or a form from a local or a remote datastore, and then fax, e-mail, copy and/or print the document on the multifunction device.
This information link is dynamic, that is, remote databases can be queried immediately or periodically, ensuring that all information presented to the user is the most current available, while also providing flexibility to ensure efficiency on the data communications network.
By integrating this level of connectivity into a multifunction device, the users need not be concerned with maintaining the latest information, as the latest versions of documents, forms and the like are always available and accessible. Furthermore, paper document storage is decreased, since the latest documents of an organization can be accessed and processed through the multifunction device on demand. Not only can these documents be printed, but other document handling functions of the multifunction device can be utilized, such as faxing and e-mailing.
In addition, the multifunction device can access remote datastores to obtain user-specific information, such as user profile and user security information, and can then utilize this user-specific information with various functions of the system, including keystroke saving functions, limitation of access rights, and accounting information.
The multifunction device may be considered as a configurable kiosk-like multifunction device that provides connectivity, preferably with a touch screen GUI, to many facets of an organization""s infrastructure, thereby reducing costs and increasing productivity.
A multifunction device in accordance with the teachings of this invention includes a multifunction controller, a first interface for receiving input data from at least one scanner and a second interface for outputting processed input data to at least one printer, wherein the first interface and the second interface are each comprised of a standard interface, and further including a graphical user interface for controlling the operation of the multifunction device, including setting operational parameters for the at least one scanner and the at least one printer. In a presently preferred embodiment the first interface is comprised of a SCSI interface.
Other interfaces are also provided, including one for coupling to a facsimile device for outputting processed input data to the facsimile device, and another interface for coupling to an e-mail port for outputting processed input data to the e-mail port.
Another interface is for coupling to a global data communications network, such as the Internet, for receiving document data as well as recipient contact information therefrom.

International Business Machines Corporation


Systems are provided to derive a value of barometric pressure at a defined location in the atmosphere at a computed geometric height. By using the geometric height in a look-up table of pressure/height values representing a standard atmospheric profile, atmospheric deviation data indicative of the difference between measured and reference pressures at that atmospheric location (C) is derived. Ground-based interrogators (10,20) located at spaced positions are used to initiate response signals from airborne transponders commonly installed in transient aircraft (C). Using resulting range data based on round-trip timing differences in signals sent to (12,16) and received from (16,14) the airborne transponder (C), geometric analysis and computation is used (18) to determine the geometric height of the transponder representing a specific atmospheric location. The height, together with barometric pressure data transmitted by the airborne transponder, are used (28) for the look-up of reference pressure data and derivation of atmospheric deviation data for that atmospheric location. Systems and methods provide such data for inflight altimeter calibration, height determination, atmospheric pressure profile development, weather forecasting, transponder calibration and other purposes.

Systems exist for measuring the height or altitude of an aircraft. An airborne radar altimeter can be used to measure geometric height (i.e., distance between the aircraft and ground). An airborne barometric altimeter can be used to provide a measure of barometric altitude (i.e., an estimate of altitude above mean sea level based on comparing measured barometric pressure to a standard atmosphere value).
However, even if such measurements are accurately performed, the radar altimeter provides readings during level flight which will vary widely depending on whether the aircraft is passing over a valley or a mountain. While a ground-based precision radar might be used to accurately determine height of a passing aircraft above a defined datum level (based on radar measurements adjusted for the elevation of the radar site), such radars are expensive and not available in many geographical areas. Similarly, even if a barometric altimeter accurately measures barometric pressure and converts the pressure reading to a corresponding altitude, such conversion merely provides an altitude value from a pressure/altitude chart or table representing standard atmosphere data, such as provided by the International Civil Aviation Organization ("ICAO"). FIG. 1 is an example of such a chart, in which P is a scale of pressure in millibars, A is a scale of altitude in thousands of feet and S is a standard ICAO pressure/altitude profile for a temperature lapse rate of two degrees centigrade per one thousand feet and a temperature of 15 degrees centigrade at mean sea level (MSL). A problem in using such charts is that an aircraft does not fly in a standard atmosphere, but in the real atmosphere which is subject to temporal and spatial weather differences affecting the barometric pressure measured at any aircraft altitude. As a result, since there will virtually always be a discrepancy between the actual pressure as measured at the aircraft location and the standard pressure for the aircraft elevation, there will virtually always be a discrepancy in a barometric altimeter reading.
Thus, even with all equipment accurately calibrated, a radar altimeter can provide relative height above the earth's surface, but when operating over land it cannot reliably measure height above a reference datum like MSL. Also, a barometric altimeter measures altitude based on sensing of barometric pressure, but pressure varies in an unpredictable manner for a given geometric height and does not provide a repeatable reference relative to a datum like MSL. The preceding discussion does not address calibration difficulties and resulting error. For example, a barometric altimeter on an aircraft must be arranged to attempt to measure static pressure in a moving air stream subject to variations in aircraft speed and altitude, temperature and humidity, and subject to possible changes in aircraft configuration, damaged or blocked sensors, and barometer decalibration over time with no adequate means of recalibration.
A typical practical problem is the requirement for continuous data acquisition to permit evaluation of changing weather conditions for control of civilian air traffic, weather forecasting and a variety of other civilian, commercial and military applications. For weather forecasting, as well as for air traffic control, it will be apparent that there is a continuing need for current data on actual atmospheric conditions at different geometric heights on a local, national and global basis. While many types of relevant data can be gathered, and sophisticated analysis and plotting of data can be provided, one particular need has continued unanswered. That is the need to know, for different geometric heights at different geographic points on a continuing basis, how the measured barometric pressure at a particular height above MSL, for example, differs from a standard barometric pressure for that height above MSL.
That difference between measured barometric pressure and a reference barometric pressure, for that geometric height, location and time, can be termed an "atmospheric deviation". It can be shown that if accurate atmospheric deviation data could be made available it would be valuable for many purposes. Weather forecasters, with knowledge of the atmospheric deviation between currently measured and reference pressure values, can analyze atmospheric conditions and forecast developing conditions. Air traffic controllers can apply derived information regarding changes in vertical separation of flight paths resulting from atmospheric pressure changes. Aircraft flight crews can be supplied with altimeter calibration information and data correlating barometric altitude with geometric height. Atmospheric deviation data may also be applied in current calibration of aircraft landing systems, for monitoring developing conditions which may identify wind shear in the vicinity of airports, and for a variety of other civilian, commercial and military purposes. In FIG. 1, curve C is a representation of the use of atmospheric deviation data to calibrate the atmosphere against a standard atmosphere represented by curve S. Thus, with availability of accurate deviation data, it would become possible to provide profile C based upon differences between standard or reference pressure and pressure values based on current barometric measurements, at different altitudes.
While instrumented weather balloons (radiosondes), as well as highly-equipped dedicated aircraft, have been used to gather atmospheric data, these and other existing devices and systems have been expensive, inaccurate and/or used only at a few geographic locations, so that sufficient quantities of current, accurate data have not been available. Thus, it should be noted, that regardless of what forms of theoretical and other systems have been proposed or implemented, a need has continued to exist for a practical, accurate and economical system able to provide a continuing volume of currently updated atmospheric deviation data for dispersed geographical areas of interest, without necessitating specially equipped or dedicated aircraft, development of new forms of equipment or new types of ground installations.
It is, therefore, an object of this invention to provide new and improved systems and methods for determining atmospheric deviations between current atmospheric pressure and reference atmospheric pressure at a point in the atmosphere, as well as for determining accurate geometric height corresponding to a measured barometric altitude, barometric pressure at a point of known geometric height, accurate geometric height of an aircraft, or barometric altimeter calibration for an aircraft while in flight, as may be desired.
It is a further object to provide such systems and methods for making available improved data usable for atmospheric condition analysis, weather forecasting, air traffic control, airport operations, and other uses.
A particular object is to provide such systems and methods which are operable from ground installations through interaction with airborne transponders commonly available in transient aircraft.
Other objects are to provide such systems and methods which avoid cost, accuracy and data availability constraints of prior systems and methods, and which may be implemented simply and economically utilizing existing types of equipment already in use.

Atmospheric pressure calibration systems and methods


An apparatus placed at the "fenceline" (perimeter) of a site, to detect the possible existence of contaminants within the air and transmit an audio signal to a remote location indicating an irregularity in the air quality. Conventional audio transmitters such as a walkie-talkie may be used to detect an audio alarm signal from the contamination detection device and be received by a receiver, such as another walkie-talkie at a remote location. The monitoring system may be housed in a portable enclosure to protect the equipment from weather, vandalism or theft.

The present invention relates generally to gas, vapor and particulate detection devices, and more particularly, to a remote transmitting gas, vapor and/or particulate monitor apparatus that may be used as a warning device for site remediation.
Gases and vapors may be sensed by an organic vapor monitor as is known in the art. Traditionally, the monitoring of gases and vapors has been performed manually with hand-held gas and vapor detectors. The hand-held devices require constant operator attention. Since more than one detector may be needed at a site, the hand-held units would each require an operator and the expense to the site owner would rise accordingly. Additionally, when operators are in or near a contaminated site using the detectors, there may be a potential health hazard to the operators. The "fenceline" is the border or perimeter around a site within which exists potentially contaminated conditions and outside of which is considered to be safe or below some predetermined designated health level. The goal of fenceline monitoring is to ensure that only air of acceptable quality impacts the downwind population. In the course of site remediation, there often exists the potential for volatile organic compound or inorganic compound or other toxic gas or particulate release via the air pathway. Monitoring of potential releases is typically the responsibility of the site health and safety officer who, in addition to protection of on-site worker safety, must protect public health from exposure to site-derived contaminants.
Traditional compound-specific air characterization work is often performed prior to remediation as part of the initial remedial investigation to determine the type and concentration of compounds in the vicinity of the site. These background air investigations are useful in assessing site air quality under existing conditions and are often the only reliable source of data for subsequent risk evaluations performed for the air pathway. During implementation of a chosen remedial technology, compound-specific upwind/downwind ambient air sampling may be performed to assess the potential for air quality degradation attributable to the clean-up effort. While the compound-specific data provided by sampling is indispensable in characterizing the health impact of the site relative to the air pathway, these methods are not applicable to the on-going daily monitoring required during clean-up. In addition to the need for trained air pollution professionals with specialized test equipment on site, the analytical costs over time would be prohibitive and test results would not be available in a suitable time frame to protect the public from an acute release. Therefore, there is a need for a reliable real time air monitoring system which could be operated by site personnel at a reasonable cost during extended site remediation.
The present invention, a remote transmitting fenceline monitor apparatus is designed to fill this need. The monitor may include an organic vapor monitor that utilizes a photoionization detector or in an appropriate application a real time particulate sampler or other gas vapor monitor utilizing alternate sensors. These items and equivalent or similar devices may be purchased off the shelf to measure a wide range of organics, inorganics and particulates. The monitor may contain means for producing a signal, such as an alarm, which triggers when a predetermined health action level has been met. Health action levels are selected based on the specific compound types and concentration derived from the previously performed air characterization study. The known health impact and published threshold limit values or permissible exposure limits are also considered in selecting a health action limit representative of the anticipated group of site compounds in the air.
Unique circuitry may be added to the monitor which permits the organic vapor monitor, particulate sampler or other measurement device to transmit an alarm signal via a transmitter such as a walkie-talkie without operator intervention. Therefore, at the potentially contaminated site, an on-site operator is not needed once the equipment has been set up. By providing a health and safety officer with a second receiver (e.g.-walkie-talkie) of the same frequency, perimeter air quality can be monitored within the transmitting range, on or off site. Other transmitting means may also be used to convey the signal to a remote location. The monitors may be portable, and contained in a weather-proof enclosure capable of extended operation through a rechargeable battery.
Fenceline monitors are usually deployed on the downwind site perimeter as a buffer between the active area of remediation and the general population. In addition to daily calibration with a standard reference gas or by other suitable means, the fenceline monitors may be maintained downwind by either monitoring data from an on-site meteorological station, by observing a windsock, or by listening to local weather reports. Alternatively the fenceline monitors may be sited at multiple locations to encircle the site. The adjustable alarm may be supplemented by an internal data logger which enables storage of data points at predetermined time intervals. This feature provides the added benefit of storage and summarization of ambient concentrations. Such information may be retrieved at a later date and used to demonstrate acceptable perimeter air quality to the public and regulatory officials on an on-going basis.
The foregoing and other objects and advantages will become more apparent when viewed in light of the accompanying drawings and following detailed description.

Remote transmitting fenceline monitoring apparatus