A photocurable fixture for orthopedic surgery has a base material and a photocurable resin retained in the base material and containing a urethane (meth)acrylate oligomer and a photopolymerization initiator which absorbs a light within a range of 400 to 700 nm. The urethane (meth)acrylate oligomer being represented by the following formula (I),

As surgical bandage used for treatment of fracture or fixture of other parts of body, ones having plaster of Paris retained in a fiber base material such as gauze have been employed from the old times. However, the surgical bandage has drawbacks such that it is heavy, insufficient in strength, and less water resistant, and does not allow X-rays pass through it.
As a method for solving such problems, ones having a water-curable urethane prepolymer impregnated into a base material of fabric or knit of e.g. glass fibers have been employed as a bandage for orthopedic surgery. Further, one having such a water-curable resin retained in a base material is wrapped with a covering material, and used as a splint material.
The fixture for orthopedic surgery using such water-curable resins is highly water resistant and has a high strength. Further, since it is possible to have X-ray photography with this fixture attached, this fixture has been widely used.
However, with this fixture, it is required to make the water-curable resin in fully contact with water by dipping the whole fixture in water stored in a bucket or the like, in order to facilitate curing reaction smoothly. Accordingly, it cannot be used in the lack of water, such being inconvenient. Further, since a backing of a cast material or a cover at the skin side of the splint material is soaked with water, the affected parts to which the fixture is applied get wet and the unpleasant feeling may sometimes be given. Further, when the affected parts are required to be fixed immediately after surgery, it may sometimes be impossible to use this fixture in a germ-free condition.
On the other hand, it has been proposed from the old days to impregnate a photocurable resin into woven fabric of e.g. glass fibers and cure it with light. As such photocurable resin, it was at first proposed to use an ultraviolet curable resin (Document 1). It was then proposed to use a visible light curable resin (Document 2).    Document 1: JP-B-48-6116    Document 2: JP-A-4-8367
Despite such various proposals, fixtures for orthopedic surgery using photocurable resins have not been used in practice for the following reasons. These photocurable resin compositions require an intense light or irradiation for a long time and a large-sized irradiation machine may sometimes be demanded. Further, a photosensitizer may sometimes be required in a relatively large amount. Furthermore, some components of such resin compositions have a strong odor or are highly skin stimulative such being inappropriate for this purpose. Moreover, there are problems of insufficient storage stability and insufficient strength.
As problems of radical polymerization in photo-curing, there are inconveniences such that polymerization is inhibited by oxygen in air and unreacted components remain on the surface of the cured product to give tackiness.
The visible light-curable fixtures for orthopedic surgery heretofore employed, use a urethane (meth)acrylate. This urethane (meth)acrylate is obtained by adding a (meth)acrylate having a hydroxy group to a urethane prepolymer derived from a polyol and isocyanate.
Further, as the photopolymerization initiator used for the photocurable resin of a visible light-curable type, one containing camphorquinone has been used.
The fixture for orthopedic surgery is required to exhibit a high strength and a high hardness of the cured product since it fixes the affected parts. For this purpose, it is required to cure ones laminated in a multi-layer form and further conduct the curing in air. Further, the photocurable resin is required to have a composition that shows desired performance even if polymerization is inhibited by oxygen in air.

Photocurable fixture for orthopedic surgery

Abstract: where A denotes a diisocyanate residue, and each of X and Y denotes a residue obtained by removing a hydroxy group from a (meth)acrylate having a hydroxy group. In formula (I) at least 40 mol % of X and Y is a residue obtained by removing a hydroxy group from a (meth)acrylate having a hydroxy group represented by the following formula (II),

Abstract: where in Formula (II) each of R1 to R6 denotes a hydrogen atom or a methyl group.


An imaging device is provided for detecting color image data to use for displaying a video image simulating a consequent photo-print of an original frame to be printed. A photometric device is provided for measuring three color densities of the original frame. The dynamic range of the imaging device is changed in accordance with the three color densities measured by the photometric device. A main area of the original frame is extracted based on the color image data detected by the imaging device, and three color densities of the main area are extracted from the three color densities measured by the photometric device, and are used for calculating print-exposure amounts of three colors.

1. Field of the Invention
The present invention relates to an exposure control apparatus of a photo-printer, and more particularly to an exposure control apparatus of a photo-printer, which detects three color image data from an original frame to be printed, to determine print-exposure amounts of three colors, and displays a positive video image simulating a consequent photo-print that will be made from the original frame.
2. Background Arts
It is known in the field of photo-printers to extract image characteristic amounts of three primary colors from an original frame of a photo film, e.g. a color negative film, and calculate three color exposure amounts in accordance with the image characteristic amounts. Based on the three color exposure amounts, the quantity and quality of printing light are controlled to make a photo-print at proper color balance and density. It is also known in the art to extract a main subject from the original frame. For example, JPA 63-278047 discloses that the type of the main subject is manually entered to locate a point of the main subject of the original frame on a video monitor which displays a simulation image of a photo-print made from the original frame, that a main subject area of a given size is determined around the located point, that image characteristic amounts are calculated from photometric values of those pixels which constitute the main subject area, and that three color exposure amounts are calculated from the image characteristic amounts of the main subject area by use of an operation formula that is predetermined for each type of main subject.
Meanwhile, to detect color image data useful for simulating a consequent photo-print on a video monitor, a high-density image area sensor having hundreds of thousands of pixels is necessary. On the other hand, to detect photometric values useful for the exposure control in the photo-printer, spectral characteristics of a photometric system is required to be as equal to those of the used color photographic paper as possible. Therefore, the photometric system for exposure control needs to use an optical filter whose spectral characteristics are defined by inorganic deposit layers.
In view of the above two requirements, a three chip image sensing device has conventionally been used for picking up color image data from the original frame. The three chip image sensing device is provided with a three color separation prism having a deposit color separation system, i.e. inorganic three color filters. The color image data detected through the image sensing device is used for simulating the photo-print, and is also processed to obtain data necessary for controlling exposure. The conventional three chip image sensing device using the three color separation prism is complicated in construction, and expensive. Also, it is difficult to produce a color separation filter consisting of three color filters arranged in a mosaic pattern from inorganic deposit layers when the color image area sensor should have a large number of pixels, i.e. hundreds thousand of pixels. Moreover, pixel thinning and averaging the color image data in the unit of hundreds of thousands of pixels take a certain operation time, thereby elongating the image processing time per frame.

Exposure control apparatus of photo-printer


Disclosed are an image display control apparatus and method for outputting an image signal to a display device to thereby display an image on the display device. A resolution converter converts the resolution of image data, which is transmitted to the display device, in comparison with the resolution of the display device. The image data that has undergone the resolution conversion is reduced in amount by a reducing processor on a per-line basis or per-pixel basis in conformity with the display resolution of the display device. The image data the amount of data whereof has been reduced by the reducing processor is transmitted to the display device together with a synchronizing signal. In accordance with a select signal from a display timing generator, an image data selector operates so as to transmit control data such as a program to the display device within a transfer time in which idle time has been produced based upon the amount of the reduction in data.

This invention relates to an image display control method and apparatus for outputting an image display signal to a display device to display an image on the device.
An image display system known in the art includes an image display controller and a display unit connected via a digital interface. In such an image display system, image data is transmitted from the image display controller to the display unit via the digital interface and, in addition, control data for requesting various operations is transmitted from the display controller to the display unit via the digital interface.
In an arrangement of this kind, the command data usually is transmitted at a timing different from that of the image data. However, in instances where a high-resolution image is displayed as in the case of high-definition television, for example, a very large quantity of image data is involved. If the command data is inserted during interims of the image data, therefore, little time is available for transmission of the command data. In particular, when the amount of command data transmitted from the display controller to the display unit is very large, time for transmission of the command data can no longer be assured.
Accordingly, an object of the present invention is to provide an image display control method and apparatus for reducing the amount of image data to be transmitted, thereby assuring idle time in transmission of the data, and for transmitting command data during this idle time.
Another object of the present invention is to provide an image display control method and apparatus for transmitting command data between items of image data while eliminating dedicated transmission means for transmission of command data.
A further object of the present invention is to provide an image display control method and apparatus in which when image data is transmitted to one display unit of a plurality of display units mounted in a display device, command data is transmitted using an image-data line signal of another of the display units.
According to the present invention, the foregoing objects are attained by providing an image display control apparatus for outputting an image signal to a display device to thereby display an image on the display device, comprising: reducing means for reducing the amount of image data, which is to be transmitted to the display device, in comparison with display resolution of the display device; transmitting means for transmitting the image data, the amount of data whereof has been reduced by the reducing means, to the display device together with a synchronizing signal; and control-data transmitting means for transmitting control data to the display device over a period of time commensurate with the amount of data that has been reduced.
According to the present invention, the foregoing objects are attained by providing an image display control method for outputting an image signal to a display device to thereby display an image on the display device, comprising: a reducing step of reducing the amount of image data, which is to be transmitted to the display device, in comparison with display resolution of the display device; a transmitting step of transmitting the image data, the amount of data whereof has been reduced at the reducing step, to the display device together with a synchronizing signal, and a control-data transmitting step of transmitting control data to the display device over a period of time commensurate with the amount of data that has been reduced.
The display device displays the image data of the reduced amount upon performing an interpolation in conformity with the display resolution of the display device.
Preferably, line data in one vertical scanning interval is downsampled on a per-line basis in order to reduce the amount of image data to be transmitted to the display device.
Preferably, line data in one horizontal scanning interval is downsampled on a per-pixel basis in order to reduce the amount of image data to be transmitted to the display device.
Preferably, odd-numbered line data is transmitted in an initial vertical scanning interval and even-numbered line data is transmitted in the next vertical scanning interval in order to reduce the amount of image data to be transmitted to the display device.
Preferably, a control signal for distinguishing between transmission of image data and transmission of control data is provided.
Preferably, the frequency of the synchronizing signal is made one frequency when the image data is transmitted and a different frequency when the control data is transmitted in order to distinguish between transmission of image data and transmission of control data.
An arrangement may be adopted in which the display device has a plurality of display units (display panels), image data is transmitted to one of the display units and control data is sent to the display device at a transmission timing of display data that is transmitted to another of the display units. In this case, it will suffice to display an image on only one display unit, or the display device may interpolate received image data and display the results on a plurality of display units.
Other features and advantages of the present invention will be apparent from the following description taken in conjunction with the accompanying drawings, in which like reference characters designate the same or similar parts throughout the figures thereof.

Image display control method and apparatus


The present invention aims to provide a novel compound which has CGRP receptor antagonist activity and which is useful for the treatment of various diseases mediated by CGRP receptors. That is, the present invention relates to the pyrrolidine derivatives represented by the following formula (I) or a pharmaceutically acceptable salt thereof. In the formulae, W is ring, X is a carbon atom or the like, Y1 to Y4 are carbon atoms or the like, and R1 to R7 is alkyl or the like. The compounds of the present invention or a pharmaceutically acceptable salt thereof have an excellent CGRP receptor antagonist activity, and thus are useful as agents for the treatment of various diseases mediated by CGRP receptors.

CGRP is a neuropeptide consisting of 37 amino acids and causes vasodilation and the like. As a receptor for CGRP, heterodimers (CGRP receptors) consisting of calcitonin receptor-like protein (CLR) and receptor activity-modifying protein 1 (RAMP 1) have been known. CGRP receptors exist on in the perivascular areas of spinal trigeminal nucleus subnucleus caudalis, trigeminal ganglion and brain stem. An increase in CGRP is said to cause allodynia (Non-patent literature 1).
In recent years, CGRP receptor antagonists, such as Olcegepant and Telcagepant, have been developed as agents for the treatment of acute migraine (Non-patent literature 2). A preventive effect in migraine (suppressing an onset of migraine) of CGRP receptor antagonists, such as Telcagepant and LY2951742, has also been reported (Non-patent literatures 3 and 4), and thus CGRP receptors have been attracting attention as a target for both agents for the treatment of acute migraine and preventive agents for migraine.
Some of the above CGRP receptor antagonists were, however, discontinued. Therefore, a novel CGRP receptor antagonist having efficacy and safety has been still desired.
Compounds comprising pyrrolidine ring are disclosed in patent literature 1 and Non-patent literature 5. Patent literatures 2 and 3 can be illustrated relating to CGRP receptor antagonists, and compounds comprising pyrrolidine ring are described in the patent literatures. In the meantime, heterocyclic compounds which are tyrosine kinase inhibitors are described in patent literature 4.
However, the pyrrolidine derivatives of the present invention are neither described nor suggested in the above literatures.


A method and system of utilizing inexpensively manufactured, electrically conductive and mechanically compliant disks to interconnect an area grid array (xe2x80x9cAGAxe2x80x9d) chip to a printed wiring board. The conductive disk shaped leads are stamped from a thin sheet of conductive material. To increase solderability and protect the disk surface, the disks can be plated with tin or an equivalent material. Each disk is positioned tangent to the surface of an AGA chip in a specific orientation. One edge of each disk is electrically connected and mechanically secured to a corresponding conductive pad located on the surface of the AGA chip. The opposite edge of each conductive disk is positioned to align with a corresponding conductive surface pad on a printed wiring board (xe2x80x9cPWBxe2x80x9d). Each opposite edge is electrically connected and mechanically secured to the surface of the PWB, thereby establishing a compliant electrical connection between the AGA chip and the PWB.

1. Field of the Invention
The present invention relates generally to the mounting and connecting of devices and, more particularly, to the mounting and connecting of microelectronic units, such as semiconductor chips, on printed wiring boards.
2. Description of the Prior Art
Early methods of mounting and connecting semiconductor chips to printed wire boards frequently resulted in unreliable connections. Specifically, the early methods provided an electrical connection between a semiconductor chip and a printed wire board that consisted of a solder joint. Although suitable for normal environments, such as desk top use, this type of connection proved unreliable in external environments that subjected the board and chip to vibrations and temperature variations. The vibrations frequently caused fatigue failures in the solder joints. Temperature variations caused connection failures due to the difference in the thermal coefficients of expansion (xe2x80x9cTCExe2x80x9d) for the semiconductor chips and the printed wiring board (xe2x80x9cPWBxe2x80x9d). A material""s TCE is the rate at which the material expands or contracts in relation to its temperature. Printed wiring boards, for example, frequently have a TCE that is about three times greater than the TCE for semiconductor chips. This difference in the TCE between the semiconductor chip and PWB frequently caused solder joint strain on early chip mounted boards often interrupting the electrical connections between the chip and the printed wiring board.
To solve this problem, manufacturers developed improved methods of connecting semiconductor chips to printed wiring boards. For example, manufacturers developed peripheral grid array (xe2x80x9cPGAxe2x80x9d) chips configured to have leads arranged about the chip""s periphery. The PGA chip design initially incorporated S-shape leads to compensate for the differing TCE between the PGA chip and the PWB. See U.S. Pat. Nos. 4,827,611; 5,294,039; and 5,317,479.
However, the drive to miniaturize semiconductor chip and PWB assemblies soon led to the development of C-shaped leads, as the S-shaped lead left too much space between the surface of the PWB and the semiconductor chip. The C-shaped lead reduced the spacing between the surface of the chip and the PWB and thus provided a chip with a lower profile, when mounted, than a chip equipped with S-shaped leads. Reducing the lead length also enhanced performance by correspondingly reducing lead inductance. When used in external environments that subjected the mounted assembly to vibration and wide temperature variations, the C-shape retained the lead""s ability to compensate for the differing TCE of the chip and printed wiring board.
Prior to the advent of area grid array (xe2x80x9cAGAxe2x80x9d) semiconductor chips, the C-shaped lead and the S-shaped lead proved adequate in dealing with the problem of differing TCE between semiconductor chips and printed wiring boards. With AGA chips, however, the conductive connecting surface pads of the chip are arranged in a matrix. Each connecting surface pad in the matrix is electrically coupled to a similar conductive pad located within a reciprocal corresponding matrix on the PWB. The AGA chip is connected typically to the PWB via solder joints, each of which is individually formed into a spherical shape. AGA chips employing the typical solder ball joints are sometimes referred to as ball grid arrays (xe2x80x9cCBGAxe2x80x9d).
FIGS. 1 and 2 illustrate a prior art BGA. FIG. 1 illustrates an AGA chip 50 connected to a printed wiring board 70 using solder balls 90 and solder joints 55 and 77. Solder balls 90 are typically made from conventional solder such as Sn63:Pb37, i.e., 63 weight percent tin and 37 weight percent lead, or Sn10:Pb90, i.e., 10 weight percent tin and 90 weight percent, or an equivalent alloy. Typically, plastic BGA (xe2x80x9cPBGAxe2x80x9d) packages use the more common Sn63:Pb37 solder balls and ceramic BGA (xe2x80x9cCBGAxe2x80x9d) packages use Sn10:Pb90 solder balls. However, like the original semiconductor solder joints, solder ball joints are not very reliable when AGA chip 50 and PWB 70 are subjected to temperature variations and/or mechanical vibration.
Moreover, once AGA chip 50 is mounted on PWB 70, accessing a connection point between a single conductive pad on AGA chip 50 and a reciprocal conductive pad on PWB 70 is difficult. When a solder ball joint fails, the entire AGA chip 50 must be removed from PWB 70 in order to effect repairs. While BGA packages have provided space reduction between the chip and PWB, the reliability problems associated with solder joints between semiconductor chips and printed wiring boards have continued.
One attempted solution includes the use of solder columns instead of solder balls. The solder columns are typically made of Sn10:Pb90 solder alloy. Although solder columns enhance compliancy, the columns bend easily and often experience problems as a result of handling during production. Solder columns also fail to provide improved strength or reliability over solder balls. In addition, the high lead content of this solder alloy is highly undesirable due to environmental concerns over the introduction of additional lead into the environment.
Attempts have been made to use a conductive lead to connect an AGA chip to a PWB. For example, U.S. Pat. No. 5,455,390 discloses a method for placing a plurality of conductive connecting leads between the conductive surface pads of the AGA chip and the connecting surface pads of the PWB. However, this method still results in connection failures due to the less reliable type of material, e.g., gold, used to make the conductive connecting leads.
U.S. Pat. No. 6,000,126 issued to the present inventor discloses an improved method of interconnecting an AGA chip to a PWB. This method includes orienting a first side of a matrix of a plurality of conductive leads, secured relative to one another in parallel by an insulating carrier, so that the first ends of the matrix are aligned with a reciprocating matrix of conductive surface pads on an AGA chip. The leads are electrically connected to the connecting surfaces of the AGA chip. The second side of the matrix of leads is oriented so that the second ends are aligned with a reciprocating matrix of connecting surface pads on a PWB. The leads of the second side of the lead matrix are electrically connected to the connecting surface pads of the PWB thereby establishing an electrical connection between the AGA chip and the PWB.
While the method described in U.S. Pat. No. 6,000,126 offers substantial advantages over the prior art, implementation remains relatively expensive due to manufacturing issues and the availability of materials. Also, minimum lead length required for automatic insertion into an insulating carrier may be too long to accommodate some high density, high performance electronic requirements. In addition, most copper alloys used for drawing the leads for the automatic insertion process have relatively low thermal conductivity and thus exacerbate thermal management problems associated with high power components.
Thus, it would be desirable to have an inexpensive means to interconnect an AGA chip with a PWB that maintains high operational reliability across a vast range of operating temperatures and mechanical stresses.
The present invention comprises a method of utilizing inexpensively manufactured, electrically conductive and mechanically compliant disks to interconnect an area grid array chip to a printed wiring board. An automated punch press can be used to stamp disks from a thin sheet of conductive material. The conductivity of the material should be at least 270 kilo mho-cm. To increase solderability and protect the disk surface from oxidation, the disks can be plated with tin or an equivalent material. Conductive pads are located on the surface of an AGA chip in a specific orientation. Each disk is positioned tangent to a corresponding conductive pad. The preferred method of connecting the conductive disks to an AGA chip includes aligning a plurality of conductive disks, secured relative to one another by a rigid nest, in an orientation that corresponds to the specific orientation of the pads on the AGA chip surface. One edge of each disk is then electrically connected and mechanically secured to the connecting surface of the AGA chip. Next, the securing nest is removed. The opposite edge of each conductive disk, that is the point 180xc2x0 from the point tangent to the AGA chip, is then in position to align with a corresponding conductive surface pad on a PWB. The opposite edge of each conductive disk is then electrically connected and mechanically secured to its corresponding connecting pad located on the surface of the PWB, thereby establishing a compliant electrical connection between the AGA chip and the PWB.
In a preferred embodiment, the thin conductive disks of the present invention have an aspect ratio, i.e., the ratio of disk diameter to disk thickness, of about 3.5 to about 10. Thin conductive disks provide more mechanical compliancy than the high temperature solder balls or conductive wire leads well known in the art, and thus can better accommodate TCE mismatch between ceramic components, solder joints, and printed wiring boards. This capability enables electronic assemblies incorporating the disks and method of the present invention to operate reliably over a wide temperature range. In a preferred embodiment, copper disks provide the additional thermal and electrical conductivity required by ever more robust components that consume ever increasing amounts of power. However, conductive disks formed from any material with tensile and shear strength comparable to that of copper, silver, and aluminum and having a conductivity of at least 270 kilo mho-cm will work.
Using an automated hole punching press, disks can be fabricated with tight mechanical tolerances, typically on the order of+/xe2x88x920.0005 inches or less. By comparison, solder balls have diameter tolerances that typically vary from+/xe2x88x920.0007 inch to+/xe2x88x920.003 inch. Tighter mechanical tolerances improve the coplanarity of components, which in turn improves solder joint uniformity, thereby further enhancing reliability. The disks are also lighter in weight than lead solder balls of equal diameter.
In addition to enhancing electrical and thermal conductivity and reliability in both favorable and unfavorable external environments, the conductive disks of the present invention offer an inexpensive method of replacing the conductive solder balls of a BGA with lead-free, more environmentally friendly metals. Disk grid arrays thus provide an economically feasible way to advance the lead-free initiatives advocated by many governments around the globe. The present invention can use xe2x80x9clead-freexe2x80x9d solder and can be easily applied to new ceramic chip scale packages (xe2x80x9cCCSPxe2x80x9d) and plastic grid arrays (xe2x80x9cPGAxe2x80x9d).
In alternative embodiments of the present invention, the disks may be attached by solder, conductive adhesives, or socket or compression fittings.

Method and apparatus to compliantly interconnect area grid arrays and printed wiring boards

General Dynamics Information Systems, Inc.


The invention provides a phase compensation circuit that can carry out phase compensation grater than the variable delay time range of a variable delay circuit without increasing more than necessary the delay time of the variable delay circuit even in the case that the phase of the reference signal and the phase of the feedback signal change because of changes in the operating environment due to fluctuations in the power source voltage and fluctuations in temperature. The phase compensation circuit that compensates the phase of a clock signal provides a plurality of variable delay circuits, a first phase comparator that compares the phase of a reference signal to the phase of a feedback signal, a second phase comparator that compares the phases of the plurality of variable delay circuits, a switching circuit that switches the outputs of the plurality of variable delay circuits, and a control circuit. First, one among the plurality of variable delay circuits is selected as the path from the input to the output, then the output of the other variable delay circuits is controlled so as to differ from the phase of the output of the selected variable delay circuit by one cycle, and when the maximum value or minimum value of the variable delay time range of the selected variable delay circuit is reached, the output of the other variable delay circuits is switched from the path from the input to the path of the output.

1. Field of the Invention
The present invention relates to semiconductor integrated circuits and in particular to a circuit that compensates the phase of a periodic input signal such as a clock signal.
2. Description of the Related Art
A phase compensation circuit for clock signal is widely used in a memory and a processor etc. to compensate the phase of a reference signal and the phase of a feedback signal.
FIG. 10 is a drawing showing an example of the structure of a conventional phase compensation circuit. Referring to FIG. 10, this conventional phase compensation circuit is structured to provide a first variable delay circuit 1, in which the delay time between an input signal 100 and output signal 101 can be variably set, a first phase comparator 5 that compares the phase of a reference signal 102 and the phase of a feedback signal 103, which is the fed back output of the first variable delay circuit 1, and a control circuit 4.
The result of the comparison of the phases of the reference signal 102 and the feedback signal 103 in the first phase comparator 5 is supplied to the control circuit 4, and in the control circuit 4, based on the results of this comparison, the setting and control of the delay time of the first variable delay circuit 1 are carried out so that the phase of the reference signal 102 is the same as the phase of the feedback signal 103.
FIG. 11 is a drawing showing the relationship between the delay adjusted value of the first variable delay circuit 1 and the delay time. And shown in FIG. 11, the phase of the output of the first variable delay circuit 1 can be controlled within a variable delay time range.
Moreover, as a totally digital phase adjustment method providing a digitally adjustable delay circuit, Japanese Patent Application, First Publication, Hei 6-303096, proposes a phase shift method in which an infinitely long delay line is simulated by identifying a continuous terminal at a physical position along the delay line. In addition, Japanese Patent Application, First Publication, Hei 11-88153, discloses for example a digital DLL (delay locked loop) circuit providing a variable delay circuit that delays an input signal, a phase comparator that compares the phases of a reference signal and a feedback signal, and a counter that decrements the count value based on the output of the phase comparator and thereby controls the delay time of the variable delay circuit. Furthermore, in Japanese Patent Application, First Publication, Hei 11-55091, discloses a variable delay circuit of a DLL circuit.
However, a conventional phase compensation circuit explained referring to FIG. 11 has the following problems.
The first problem is that the range of the phase that can be phase compensated is limited. The reason is that this structure is such that the phase of the reference signal and the phase of the feedback signal are compensated using only one variable delay circuit.
That is, the variable delay circuit can change the delay time from the input terminal to the output terminal based on a control signal, but because the size of the variable delay circuit is finite (the number delay elements is limited), there exist a maximum value and a minimum value for the variable delay time.
Thus, for example, in the case that the phase is compensated when the delay time of the variable delay circuit is at the maximum value of the variable range, subsequently, when the delay time from the input signal to the feedback signal is increased due to a change in the operational environment, such as a fluctuation in the power source voltage or a fluctuation of the temperature, the variable delay circuit cannot further increase the delay time, and thus compensation of the phase becomes impossible.
Contrariwise, in the case that the phase is compensated when the delay time of the variable delay circuit is at the minimum value of the variable range, subsequently, when the delay time from the input signal to the feedback signal is reduced due to changes in the operating environment such as a fluctuation of the power source voltage or fluctuations of the temperature, the variable delay circuit cannot reduce delay time any further, and compensation of the phase becomes impossible.
The second problem is that when increasing the variable delay time range of the variable delay circuit with the object of increasing the range of the variable phase compensation range, the delay time of the variable delay circuit increases.
When the delay time of the variable delay circuit increases, the circuit becomes easily influenced by external influences such as power source noise, the jitter of the phase compensation circuit increases, and carrying out high precision phase compensation becomes difficult.
It is the object of the present invention to provide a phase compensation circuit that allows phase compensation grater than the variable delay time range of the variable delay circuit but does not increase more than necessary the delay time of the variable delay circuit even in the case that the phase of the reference signal and the phase of the feedback signal fluctuate due to changes in the operating environment such as the fluctuations in the power source voltage and fluctuations in temperature.
In order to attain this objective, the phase compensation circuit according to the present invention is characterized in providing a plurality of variable delay circuits whose output signal phases differ from each other by a specified cycle; a switching circuit that selects one variable delay circuit from among said plurality of variable delay circuits; a first comparator that compares the phase of the output signal of the currently selected variable delay circuit to the phase of a specified reference signal; and a control circuit that, based on the results of the comparison by said first phase comparator, controls the delay time of said currently selected variable delay circuit so that the phase of the output signal of the currently selected variable delay circuit agrees with the phase of said reference signal, and if the delay time after control exceeds the variable time delay range of the currently selected variable delay circuit, controls said switching circuit so as to select another variable delay circuit.
Preferably, the phase compensation circuit according to the present invention is characterized in further providing a second comparator that compares the phases of the outputs of said plurality of variable delay circuits to each other, and wherein said control circuit, based on the results of the comparison by said second comparison means, controls the delay time of said other variable delay circuits so that the phase of the output of the currently selected variable control circuit and the phase of the output of the other variable delay circuits differ by a specified cycle.
Preferably, two of said variable delay circuits are provided; and further said control circuit advances the phase of the output of the other variable delay circuits said specified cycle ahead the phase of the output of the currently selected variable delay circuit in the case that the delay time after said control is larger than the maximum value of the variable delay time range of the currently selected variable delay circuit, or contrariwise, delays the phase of the output of the other variable delay circuits said specified cycle behind the phase of the output of the said currently selected variable delay circuit in the case that the delay time after said control is smaller than the minimum value of the variable delay time range of the currently selected variable delay circuit.
Preferably, said specified cycle is one cycle or xc2xd cycle.
A first effect of the present invention is that even in the case that the delay time from the output signal to the feedback signal changes due to changes in the operating environment due to fluctuations in the power source voltage or fluctuations in temperature, phase compensation greater than the variable delay time range of the variable delay circuit can be carried out. The reason is that in the present invention, when the delay time of the one variable delay circuit currently selected among the plurality of variable delay circuits reaches the maximum value or minimum value of the variable time delay range, in the switching circuit the output is switched from the one variable delay circuit to another variable delay circuit whose output phase differs by one cycle from that of the one variable delay circuit, and thus phase compensation greater than the variable delay time of the variable delay circuit becomes possible.
A second effect of the present invention is that it can provide a phase compensation circuit that can carry out phase compensation without increasing more than necessary the delay time of the variable delay circuit.
A third effect of the present invention is that by making the delay time of the variable delay circuit small, jitter produced by the variable delay circuit itself can be reduced.


A plasma display panel (PDP) with excellent display quality, including a dielectric layer that does not contain lead, satisfies transmittance, insulation resistance and dielectric constant, and suppresses coloring. The PDP includes front panel and a rear panel disposed facing each other and sealed together at the peripheries thereof with discharge space provided therebetween. The front panel includes display electrodes, a dielectric layer and a protective layer on a front glass substrate. The rear panel includes electrodes, barrier ribs and phosphor layers on a substrate. In the PDP, the display electrode includes metal bus electrodes containing silver. The dielectric layer includes a first dielectric layer covering metal bus electrodes and containing bismuth oxide, and a second dielectric layer covering the first dielectric layer and containing bismuth oxide. The thickness ratio of the second dielectric layer to the first dielectric layer is 1.3 or more and 7.2 or less.

Since a plasma display panel (hereinafter, referred to as "PDP") can realize both high definition and a large screen, 65-inch class televisions have been commercialized. Recently, PDPs have been applied to full high-definition in which the number of scan lines is twice or more than that of a conventional NTSC method. Meanwhile, from the viewpoint of environmental problems, PDPs which do not contain lead have been demanded.
A PDP basically includes a front panel and a rear panel. The front panel includes a glass substrate of sodium borosilicate glass produced by a float process; display electrodes each composed of striped transparent electrode and metal bus electrode formed on one principal surface of the glass substrate; a dielectric layer covering the display electrodes and functioning as a capacitor; and a protective layer made of magnesium oxide (MgO) formed on this dielectric layer. On the other hand, the rear panel includes a glass substrate; striped address electrodes formed on one principal surface of the glass substrate; a base dielectric layer covering the address electrodes; barrier ribs formed on the base dielectric layer; and phosphor layers formed between the barrier ribs and emitting red, green and blue light, respectively.
The front panel and the rear panel are hermetically sealed and arranged so that their surfaces having electrodes face each other. Discharge gas of Ne—Xe is filled in a discharge space participated by the barrier ribs at a pressure of 400 Torr to 600 Torr. The PDP realizes a color image display by selectively applying a video signal voltage to a display electrode so as to generate electric discharge, and exciting a phosphor layer of each color with an ultraviolet ray generated by the electric discharge so as to emit red, green and blue light.
For the metal bus electrode of the display electrode, a silver electrode for securing electric conductivity is used, and for the dielectric layer, a low melting point glass material containing lead oxide as a main component is used. Recently, however, from the viewpoint of environmental problems, examples in which a dielectric layer does not contain a lead component have been disclosed (see, for example, patent documents 1, 2 and 3).
As previously mentioned, PDPs have been applied to full high-definition in which the number of scan lines is twice or more than that of a conventional NTSC method. With such a trend toward high definition, the number of scan lines is increased, and the number of display electrodes is increased. Furthermore, the interval between the display electrodes is reduced.
Therefore, diffusion of silver ions from a silver electrode constituting a display electrode to a dielectric layer is increased. When silver ions diffuse to the dielectric layer, they are subjected to a reduction reaction with alkali metal ions in the dielectric layer. Thus, silver oxide colloid is formed. Then, this silver oxide allows the dielectric layer to be strongly colored yellow or brown. At the same time, a part of the silver oxide is subjected to a reduction reaction so as to generate oxygen bubbles, and the bubbles cause insufficient insulation.
Then, it is proposed that a low melting point glass material such as bismuth oxide, which suppresses the reaction with a silver electrode, be used for a dielectric layer instead of using a lead component. However, when a large amount of low melting point glass materials such as bismuth oxide is used for a dielectric layer, the visible light transmittance of the dielectric layer is remarkably lowered. When the amount of the low melting point glass material such as bismuth oxide is reduced in order to suppress the lowering of the visible light transmittance of the dielectric layer, the reaction with silver electrode cannot be suppressed sufficiently, which may cause coloring and insufficient insulation.
Thus, a conventional dielectric layer which does not contain a lead component, which has been proposed from the viewpoint of environmental problems, has had a problem that it is difficult to achieve both the prevention of coloring and insufficient insulation and the suppression of lowering of the visible light transmittance in the dielectric layer.
[Patent document 1] Japanese Patent Unexamined Publication No. 2003-128430
[Patent document 2] Japanese Patent Unexamined Publication No. 2002-053342
[Patent document 3] Japanese Patent Unexamined Publication No. H9-050769

Plasma display panel with improved light transmittance


A headlamp with a light source, a power module to generate power for the light source from control information or a control signal, a control module for adjusting the power generated by the light source. The control module has a light sensor for sensing light from the environment of the lamp holder. The control module generates control information according to the information generated by the light sensor. The control module has an accelerometer to provide at regular intervals data representative of an acceleration of the headlamp along at least one horizontal axis and one vertical axis. The control module stores and processes accelerometry data. The control module includes a LUT lookup table stored in memory. The parameter read from the LUT lookup table is used in conjunction with information generated by the light sensor to determine the light output control information or signal.

The applicant of the present patent application has marketed a portable lamp, of the headlamp type, equipped with so-called reactive or dynamic lighting, the operating principle of which is illustrated in FIG. 1. This headlamp comprises an electronic circuit equipped with a sensor that analyzes the brightness outside to instantly deliver the adjusted lighting power and optimal beam shape for the situation.
This type of headlamp has proven to be particularly suitable for sport activities and particularly intensive sports because it relieves the user of the manual mode adjustments that would be necessary to switch between different beam power thresholds.
Thanks to this reactive lighting technique, the user has his hands free and his mind totally focused on his activity, whatever the lighting situation considered.
Thus, in proximity lighting, the user can thus observe or examine an object at a short distance (reading a map, making a tie-up knot or setting up a tent for example) and the lamp can generate a very wide and low-power light beam, automatically set to a minimum threshold value thanks to this dynamic lighting technique. The lighting automatically adapts to the distance of the object.
On the contrary, in a situation of movement, for example when the user engages in walking and/or running, the beam becomes mixed: wide at the level of the feet and focused to see at a few meters and anticipate the ground relief.
In addition, when in a situation of distant vision, the user raises his head to see far away—for example to look for a beacon during a run or even a relay attached to a climbing wall, the power of lighting increases dramatically and the beam becomes focused to best assist the lamp user.
Finally, we note that the reactive or dynamic lighting technology (Reactive Lighting) has proved to be particularly economical in use and makes it possible to advantageously increase the autonomy of the batteries since its implementation, under the control of a calculator, aims to optimize battery consumption, offering greater autonomy for your lamp.
As we can see, this reactive or dynamic lighting technology is undeniably a significant advance in the field of headlamps, and more generally of portable lighting, in particular in that it allows the lighting to be constantly adapted to fit lighting conditions.
However, practitioners have identified drawbacks in certain very specific situations.
In fact, in so-called trail running or running activities, the presence of many reflective surfaces on shoes, technical clothing and signs cause pumping phenomena in the level of the projected light, thus degrading the quality of the lighting and revealing an area of discomfort for the user.
When the latter is cycling with his headlamp, or even other very dynamic activities (ski touring or other), the minimum level of light might practically show to be insufficient to guarantee safe conditions of lighting when crossing with a luminous or natural obstacle (car headlights, tree branch, etc.). The area of discomfort noted previously may then turn out to be a danger zone.

Headlamp comprising improved dynamic lighting


Systems and methods for designing or determining parameters for a system are disclosed. These systems and methods exploit the Tensor Convolution Block Toeplitz (TCBT) structure involved in certain systems wherein a symmetric positive definite linear system of equations needs to be solved in the design or determination of the parameters for the system. Further, these methods and systems employ a TCBT-PCG process that uses a fast matrix-vector multiply in order to improve the computational efficiency in the design or determination of these system parameters.

The present invention relates generally to system design, and more particularly to improved methods and systems for designing controllable parameters for a system.
The solution of a Symmetric Positive Definite (SPD) Toeplitz (or block Toeplitz) linear system of equations is useful in system design. For example, digital filter design may involve the solution of a SPD Toeplitz linear system of equations. Further, the solution of these equations is often involved in designing a digital filter for an active noise and vibration control (ANVC) system.
Methods for solving symmetric positive-definite (SPD) Toeplitz (or block Toeplitz) linear systems of equations may be divided into direct and iterative methods. The direct methods may be further subdivided into classical methods, fast methods, and superfast methods. In the following paragraphs, which discuss these methods, we will refer to the problem of solving a SPD Toeplitz linear system of T equations and unknowns.
Classical direct methods include Gauss elimination as well as the Cholesky procedure which is well-know to be numerically stable even for ill-conditioned linear systems of equations. Unfortunately, because these methods do not exploit the Toeplitz structure, they are fairly slow in that they require O[T3] calculations, where O[xc2x7] indicates the order of the number of required calculations. Thus, O[T3] indicates that the solution takes on the order of T3 calculations.
The fast direct methods include Levinson-type algorithms, as well as the Schur type algorithms which are associated with displacement theory. Because they exploit the Toeplitz structure, they require only O[T2] calculations. Unfortunately, while these are known to be numerically stable for well-conditioned linear systems of equations, they often break down (yielding no solution) for ill-conditioned linear systems of equations.
The superfast direct methods exploit the Toeplitz structure and require only O[T(log T)2] calculations. However, these methods are relatively new and little is known regarding their numerical stability for ill-conditioned linear systems of equations.
The principal iterative method is the Conjugate Gradient (CG) method. This method offers good numerical stability and a faster solution than the direct methods. Further, it is flexible and can be applied to various quasi-Toeplitz linear systems of equations. This method has been popular for the solution of sparse linear systems of equations since the work of Hestenes and Steifel in 1952. In principal, the CG method converges to the exact solution in just T iterations. In practice, however, the iterations are stopped to yield an approximate solution after far fewer iterations. The CG method is often used with a preconditioner that serves to accelerate the procedure so that a good approximate solution will be obtained with a few iterations. This CG method using a preconditioner is referred to as the Preconditioned Conjugate Gradient (PCG) method. Although the CG and PCG methods are useful for the solution of sparse linear systems of equations, their computational cost can become quite large for dense linear systems of equations. Accordingly, because of the computational cost involved, the CG and PCG methods have not been popular for dense linear systems of equations.
In 1986, Strang showed how to apply the PCG method in a computationally efficient manner to Toeplitz (or block-Toeplitz) SPD linear systems of equations, despite the fact that these are dense linear systems of equations. By exploiting the Toeplitz structure, Strang""s approach could solve a Toeplitz SPD linear system of T equations using only O[T log T] calculations. Moreover, Strang""s method appears to remain numerically stable even for poorly-conditioned linear systems of equations. Consequently, Strang""s approach has been a method for solving large block-Toeplitz SPD linear systems of equations such as those that arise in the design of a digital filter for a large ANVC system.
Large system design problems, such as the design of a finite impulse response (FIR) digital filter (e.g., with T=1024 taps) for a multiple-input multiple-output ANVC system with many (e.g., M=32) input signals and many (e.g., xcex7=32) output signals, may involve the solution of a very large block Toeplitz SPD linear system of (e.g., xcex7MT=1,048,576) equations to determine the very large (e.g., xcex7MT=1,048,576) number of system parameters. Even with Strang""s approach the computational costs for such a system design can be very high and, since high computational costs are reflected in similarly high financial costs, these costs can be economically prohibitive.
As such, there is a need for computationally efficient methods and systems for determining the controllable parameters of a system, wherein this determination involves the solution of a linear system of equations.
Accordingly, the present invention is directed to methods and systems that obviate the above and other disadvantages of the prior art.
Methods and systems consistent with the present invention include a process for computing a plurality of controllable parameters that affect the operation of a system. This process includes generating a sequence of matrices V(r) using a known system, generating a sequence of matrices S(t) using an input signal, wherein the sequence of matrices V(r) and the sequence of matrices S(t) correspond to a Tensor-Convolution Block-Toeplitz structure, generating a vector b using the input signal and the known system, and generating the plurality of controllable parameters using the sequence of matrices V(r), the sequence of matrices S(t), and the vector b by a process employing a fast matrix-vector multiply.
In another aspect the invention comprises a system, wherein a plurality of controllable parameters that affect the operation of the system are expressible as a vector x, and wherein a constraint relationship related to the controllable parameters, is expressible in the form of a matrix A associated with the controllable parameters, and with a set of constraint limits, b, such that Ax=b. This system includes a memory for storing a sequence of matrices V(r), a sequence of matrices S(t), and a vector b, wherein the sequence of matrices V(r) and the sequence of matrices S(t) correspond to a Tensor Convolution Block Toeplitz structure, wherein the sequence of matrices V(r) is generated using a known system, and wherein the sequence of matrices S(t) is generated using an input signal. This system further includes a processor for determining a plurality of controllable parameters, x, using the sequence of matrices V(r), the sequence of matrices S(t), and the vector b, by a process employing a fast matrix-vector multiply, wherein the vector b is generated using the input signal and the known system.
In yet another aspect the invention comprises a process for determining a plurality of parameters for an unknown system given a known system. This process includes generating a sequence of matrices V(r) using a known system, generating a sequence of matrices S(t) using an input signal, wherein the sequence of matrices V(r) and the sequence of matrices S(t) correspond to a Tensor-Convolution Block-Toeplitz structure, generating a vector b using the input signal and the known system, and generating the plurality of controllable parameters using the sequence of matrices V(r), the sequence of matrices S(t), and the vector b by a process employing a fast matrix-vector multiply.

Methods and apparatus for designing a system using the tensor convolution block toeplitz-preconditioned conjugate gradient (TCBT-PCG) method


An HVAC system includes a variable speed electric motor driven fan for circulating air to an enclosed space through an indoor unit for providing heating or cooling effect to air circulated through the indoor unit. A controller with user or system installer actuatable switches includes a programmable microcontroller providing a pulse width modulated (PWM) signal to a motor control unit to select a predetermined air flowrate less than full air flowrate during system startup and shutdown. User input parameters include selected percentages of full air flowrate to satisfy requirements for reduced noise level, lower humidity and for improved sensible heating of air being circulated, the latter being effective particularly for heat pump applications. Selection of pre-run, short run and shutdown cycles may be provided.

In the art of heating, ventilating and air conditioning (HVAC) equipment there has been a continuing desire and need for a system and method for controlling indoor air flowrate due to varying circumstances and the types of equipment used in HVAC systems. For example, in many residential HVAC systems, the occupants of the house or dwelling being air conditioned may have a desire to vary the air flowrate, hence speed, of the indoor blower or fan which circulates the conditioned air throughout the dwelling. In situations where the humidity being sensed by the dwelling occupants needs to be reduced by varying amounts, such can be accomplished by changing the air flowrate over the air cooling heat exchanger, such as a vapor compression system evaporator coil. In other circumstances, such as for systems which utilize heat pumps for both heating and cooling, the occupants of the dwelling may desire to reduce air flow in the heating mode in order to have a sense of warmer air being circulated during system operation.
Still further, the occupants of a dwelling or other facility being air conditioned by a forced air HVAC system, may desire to operate the indoor air circulation blower or fan continuously and at selected variable speeds to control air flowrate and noise level, for example. Of course, the occupants of a dwelling or building being air conditioned by a forced air HVAC system may also have the desire to control indoor blower or fan speed and air circulation rate during startup and shutdown phases of operation of the system so as to be able to capture residual heating or cooling effect after system shutoff and to minimize the loss of heated or cooled air due to heat transfer in the system ductwork during periods of system shutoff. Accordingly, it is to provide the capability of changing air flowrates in an HVAC system to satisfy several needs and desires, including those mentioned above, that the present invention has been developed.

System and method for controlling indoor air flow for heating, ventilating and air conditioning equipment


A pressing roll for a tire building machine includes a shaft having a longitudinal axis; a plurality of discs inserted on the shaft in an axial series; a mounting arrangement for providing for an individual, radial displaceability of each disc relative to the longitudinal axis; and a force-exerting power arrangement for displacing the discs relative to the shaft.

The present invention relates to a tire building machine for the preparation of pneumatic tire blanks. The machine includes a building drum to accommodate tire plies and a pressing roll cooperating therewith. Tire building machines for bias ply as well as belted tires and for dual or single stage tire building are conventionally provided with various ply suppliers and other devices for introducing and treating the individual components of the blank. Usually, each tire component is associated with specially structured treatment devices, for example, several ply applying rolls, stitching rolls, pressing rolls, splicing rolls and the like. Yielding pressing rolls are made of a foamed material and do not permit an adjustment or control of the pressure along the width and circumference of the blank.

Pressing roll for a tire building machine

Krupp Maschinentechnik Gesellschaft mit beschrankter Haftung


A wearable display device for facilitating provisioning of a virtual experience is disclosed. Further, the wearable display device may include a support member configured to be mounted on a user. Further, the wearable display device may include a display device attached to the support member. Further, the wearable display device may include at least one disturbance sensor configured for sensing a disturbance in a spatial relationship between the display device and the user. Further, the wearable display device may include a processing device communicatively coupled with the display device. Further, the processing device may be configured for receiving a display data. Further, the processing device may be configured for analyzing the disturbance in the spatial relationship, and generating a correction data based on the analyzing. Further, the processing device may be configured for generating a corrected display data based on the at least one display data and the correction data.

Display devices are used for various types of training, such as in simulators. Such display devices may display virtual reality and augmented reality content.
However, in some situations, movement of a display device with respect to a user using the display device may alter a perception of the content that may be displayed. For instance, due to a movement of the display device due to external forces, such as movement of display devices in flight helmets due to acceleration of aircraft, the user's perception of the displayed content may change, which is not desired.
Therefore, there is a need for improved methods, systems, apparatuses and devices for facilitating provisioning of a virtual experience that may overcome one or more of the above-mentioned problems and/or limitations.

Methods, systems, apparatuses, and devices for facilitating provisioning of a virtual experience


Risk events occurring on a computer system are logged over time and a risk profile is dynamically generated and updated based on the logged risk events. In one embodiment, a security policy is dynamically set and updated based on the risk profile.

1. Field of the Invention
The present invention relates to the protection of computer systems. More particularly, the present invention relates to risk profiling and security policy setting.
2. Description of Related Art
Broadly viewed, a security policy defines the access and use of various resources, such as computer system resources. A security policy for a computer system is typically determined by a user and/or a system administrator. Developing a useful security policy can be a difficult task.
Much of the difficulty in developing a useful security policy arises from the attempt to cover a dynamic set of circumstances, environment, and users with a static security policy. Often some environments present more risk than others and some users are more prone to risky behaviors than other users.

Dynamic security policy through use of empirical security events


The present invention relates to novel synergistic compositions comprising known “clean-label” antimicrobial substances as well as processes for stabilizing food substances against typical food borne spoilage microorganisms and/or pathogens. It is a further object of the invention to provide novel combinations of “clean label” antimicrobials which may be employed in such a process.

Chemical preservatives in combination with various processing aids have been traditionally applied to food systems to prevent food spoilage microorganisms or foodborne pathogens. However, an increasing demand toward natural and additive-free food products from consumers prompted the food industry to seek effective "clean label" antimicrobial solutions which maintain safety and stability of the food products.
Cultured dextrose is a commercially available food additive produced by fermentation of sugar sources such as corn, cane sugar, or dairy based sources including skim milk. The cultured dextrose is composed of various fermentation metabolites where the main active components are antimicrobial peptides and organic acids. The microorganisms involved in the fermentation are mainly probiotic bacteria, such as propionic acid (including Propionibacterium freudenreichii) and lactic acid bacteria (including Lactococcus lactis). The main application of cultured dextrose is to inhibit the growth of bacteria, yeast, and mold in food systems. Cultured dextrose could be an effective preservative in various applications including dairy, baked goods, or culinary products. However, the product often imparts savory notes to the product when used in effective dosages.
The increased evidences that plant materials have a potential for antimicrobial activity led researchers to study different extracts to inhibit bacteria, yeasts, and molds in various applications. Plant secondary metabolites are natural compounds that are known for their plant defense mechanisms and possess multiple biological activities including antimicrobial effects. They include alkaloids, flavonoids, tannins, terpenes, quinones, and resins. One of the major limitations for using plant extracts as an antimicrobial agent in the food and feed industry is that the plant extracts often require high effective dosage and thus negatively impacts the organoleptic property of the applied matrices.
Essential oils are mixture of volatile compounds extracted from plant biomass and have been identified as natural antimicrobial agents where the activity is mainly understood to arise from phenolic components. However, the usage of essential oils as a food preservative is limited due to the high flavor profile, which flavor profile negatively impacts the organoleptic property of the applied food.
Buffered vinegar is another "clean label" alternative for chemical preservatives in the current food industry, especially for meat and poultry. Buffered vinegar is known to inhibit the growth of foodborne pathogens as well as common spoilage organisms. The taste impact of vinegar may be reduced by buffering the vinegar with sodium or potassium based alkalis. However, the concentration of buffered vinegar required to exhibit antimicrobial activity often imparts "vinegar" or "acidic" notes in the final products and negatively impacts the organoleptic property.
The current invention identifies synergistic combinations which could effectively suppress the growth of spoilage microorganisms or pathogens at lower concentrations and thereby diminish the associated flavor impact of the constituent antimicrobials. These synergistic combinations find application in meat and poultry, sauces and dressings, salads, hummus, seafood, cosmetics and/or nutritional supplements.

Synergistic antimicrobial effects among rosemary extract, cultured dextrose and buffered vinegar


A GPS speedometer comprising: a housing; a circuit board located in the housing; a microprocessor located on the circuit board; a GPS module located on the circuit and in signal communication with the micro-processor; a GPS antenna located on the circuit board and in signal communication with GPS module; and a readable speedometer display located on the housing and in signal communication with the microprocessor, where the readable speedometer display is configured to display the current speed of the vessel or vehicle calculated by the microprocessor based on data from a global positioning system. A GPS speedometer system comprising: a vessel, the vessel comprising an instrument panel; a GPS speedometer located on the instrument panel, the GPS speedometer comprising: a housing; a circuit board located in the housing; a microprocessor located on the circuit board; a GPS module located on the circuit and in signal communication with the micro-processor; a GPS antenna located on the circuit board and in signal communication with GPS module; a readable speedometer display located on the housing and in signal communication with the microprocessor, where the readable speedometer display is configured to display the current speed of the vessel or vehicle calculated by the microprocessor based on data from a global positioning system; and a global positioning satellite in signal communication with the GPS antenna.

All known GPS speedometers use an external GPS antenna when in communication with a GPS. However, there are many problems with using an external GPS antenna. It is often difficult and sensitive to route the antenna wiring throughout the vessel or vehicle, as well as the susceptibility of this antenna to damage from exposure to the environment. An external GPS antenna and the associated wiring require expensive environmentally sealed and resistant coatings and materials, plus the basic costs of a separate enclosure unit of the antenna itself increase the costs of such a speedometer system. Additional costs and complexity rise since the external antenna requires an internal battery (power source) to retain location information for quick TTFF (Time To First Fix) as typically required of a GPS. When this battery ultimately dies, approximately 3 years after installation, the external antenna ceases to provide quick TTFF.
Currently, all GPS speedometer indication instruments (gauge type indicators) require external antennas for acquiring a GPS signal.
Thus there is a need for a GPS speedometer that overcomes the above listed and other disadvantages.


A method of using styling tape for body part and hair accessorizing is disclosed. The method may include cutting a self-adhesive tape into a strip or other elongate shape and stretching it to obtain at least some tension. The user may wrap the self-adhesive strip around a bundle of hair or a body part, and may press the self-adhesive strip onto itself to secure the strip or other elongate shape.

The idea of decorating portions of the body and hair is known in the prior art, and is especially popular with children for both dress-up and amusement purposes. For example, use of necklaces, earrings, bracelets, anklets, and chokers have long been used to decorate the body. Similarly, many devices are known in the prior art that enable one to style or manage hair that also include an aesthetic benefit to the user. For example, items such as pony tail holders, pins, bungees, scrunchies, rubber bands, and barrettes have all been used to hold, manage, or otherwise decorate the hair.
Each of the above mentioned items, whether used to decorate the body, or whether used to manage the hair have, however, one or more undesirable qualities. For example, none of the above mentioned items are easily adapted to be used as both decoration for the body and for management of the hair.
Similarly, items used for decorating the body, such as the necklaces, earrings, and bracelets, may have additional undesirable qualities such as cost and safety concern. The cost of jewelry, for example, whether real, fake, or costume, may be very expensive when purchased for a child to use or play with. The jewelry may also create a safety concern, especially when used by a young child. A child may, for example, swallow an earring and/or get choked by a necklace or the like. The jewelry may also be difficult for a child to use, considering the complexity and diminutive size of some of the clasps or locking mechanisms.
The devices used to manage hair may have additional undesirable qualities, such as being uncomfortable and/or difficult to use. A device, such as a pony tail holder and a barrette may be hard and rigid in construction, which can cause discomfort for the wearer, especially while sleeping or during activities. The devices, such as the scrunchie, may also be difficult to use in that it may require know-how and or dexterity, or the assistance of another individual to correctly manipulate the hair into the device or vice versa.

This patent is subject to a terminal disclaimer.

Method and device for using styling tape for body and hair accessorizing


The compound represented by formula (1):

An organic electroluminescence (EL) device is generally composed of an anode, a cathode, and one or more organic thin film layers sandwiched between the anode and the cathode. When a voltage is applied between the electrodes, electrons are injected from the cathode and holes are injected from the anode into a light emitting region. The injected electrons recombine with the injected holes in the light emitting region to form excited states. When the excited states return to the ground state, the energy is released as light.
Many researches have been made on the applications of organic EL device to display, etc. because of its wide selection of emission colors by using various emitting materials in a light emitting layer. Particularly, the research on the materials each emitting three primary red, green, and blue colors has been made most actively, and the intensive research has been made to improve their properties.
One of the most important problems involved in organic EL devices is to achieve a high emission efficiency. To obtain an organic EL device with high emission efficiency, it has been known to form a light emitting layer by doping a host material with a several percent of a dopant material. For example, the compounds described in Patent Literatures 1 to 5 have been known as such materials for organic electroluminescence devices.

Organic electroluminescent element and electronic device

Abstract: wherein A, B, R1, and R2 are as defined in the description, provides organic electroluminescence (EL) devices having a high emission efficiency when operated at low voltage and a long lifetime and electronic devices including such organic EL devices.


A portable space heater in which a plastic tank is utilized underneath a relatively heavy heater unit. The plastic tank is protected against stresses exerted on it by the heater unit by a unique support structure that is supported on the same portable frame as the plastic tank.

Portable heaters of the type that included a metal tank over which is mounted a heater unit generally of a cylindrical shape have existed for a long time and have been the subject of much development efforts. Examples of this type of portable heater is disclosed in U.S. Pat. Nos. 4,081,238, 4,089,642, and 4,340,362. To our knowledge, this type of portable heater has always included a fuel tank constructed of metal such as steel. Such tanks have always been mounted on frames constructed in many instances of tubular piping and the frame has been mounted on wheels making the heater portable.
Further, to our knowledge, generally the heater unit which included a combustion chamber with a motor driven fan mounted within a cowling have been mounted directly on the top of the metal tank. As previously stated, efforts have been made to develop better and less costly portable heaters of this type with many different improvements having been made over the years.
The present invention is an improvement of this type of portable heater. Such improvement making the heater less costly to manufacture and also much lighter in weight which is important in portable heaters of this type.


There is provided a hammer shank for a piano which is capable of suppressing a change in the dimension between two arms due to dryness and wetness to thereby ensure smooth and stable operation of a hammer. A hammer shank is supported by a flange and pivotally moves in accordance with key depression. A shank body formed of wood has two bifurcated arms formed on one end thereof. These arms extend in facing and parallel relation to each other along respective opposite sides of the flange, and are pivotally supported by the flange. Phenol backers are attached on outer side surfaces of the respective two arms so as to prevent the two arms from being displaced in a direction in which they face each other.

1. Field of the Invention
The present invention relates to a hammer shank for a piano, which pivotally moves in accordance with key depression, and a method of manufacturing the same.
2. Description of the Related Art
Conventionally, a hammer of a piano, which has a hammer shank, has been disclosed e.g. in Japanese Laid-Open Patent Publication (Kokai) No. 2005-77455. The hammers are provided in association with respective keys, and each of the hammers is pivotally supported by a hammer shank flange (hereinafter simply referred to as "the shank flange"). Each of the hammers includes a long, slender wooden hammer shank and a hammer head fixed to a rear end of the hammer shank. The hammer shank has a front end thereof bifurcated into two left and right arms extending forward in facing and parallel relation to each other. The shank flange is formed by a synthetic resin molded article, and screwed to a hammer shank rail. The shank flange has a rear end thereof formed with an engaging part projecting rearward, and the two arms of the hammer shank are engaged on the opposite sides of the engaging part. Further, a pin is horizontally passed through the two arms and the engaging part. This pin is rigidly secured to the engaging part, but is supported by the two arms in a pivotally movable manner. Thus, the hammer is pivotally supported by the shank flange via the pin integral with the shank flange. The opposite side surfaces of the engaging part of the shank flange are formed parallel to each other, and each of the side surfaces of the engaging part of the shank flange is opposed to the inner side surface of an associated arm of the hammer shank with a slight clearance.
With the above-mentioned arrangement, as an associated key is depressed, an associated action operates to push up the hammer shank, whereby the hammer pivotally moves upward, and the hammer head strikes an associated string to thereby generate a piano tone. During the pivotal motion of the hammer, the hammer shank is guided by the two arms and the engaging part of the shank flange, so that the hammer can perform the pivotal motion without deflecting laterally.
However, the hammer shank, which is made of wood, is susceptible to a use environment of the piano, particularly to dryness and wetness, and hence there is a fear that smooth and stable pivotal motion of the hammer cannot be obtained due to a change in the dimension between the two arms. Specifically, when the dimension between the arms of the hammer shank is reduced due to shrinkage caused by dryness (see FIG. 5B), the clearances between the two arms and the engaging part is sometimes lost, which causes a defective operation of the hammer, such as incapability of smooth pivotal motion of the hammer (which will be hereinafter referred to as "a stick"). On the other hand, when the dimension between the arms of the hammer shank is increased due to expansion caused by wetness (see FIG. 5A), the clearances between the two arms and the engaging part become larger. As a result, there is a fear that the hammer deflects laterally or wobbles during pivotal motion, thereby hindering the hammer from properly striking the string.

Hammer shank of piano and method of manufacturing the same


Provided are: a circuit device which has improved connection reliability in a solder joint portion by suppressing the occurrence of sink of solder; and a method for manufacturing the circuit device. In a method for manufacturing a circuit device of the present invention, a plurality of solders (19), which are apart from each other, are firstly formed on the upper surface of a pad (18A), and a chip component (14B) and a transistor (14C) are affixed at the same time. After that, a solder paste (31) is supplied to the upper surface of the pad (18A) using a syringe (30), a heatsink (14D) is mounted on top of the solder paste (31), and melting is caused by a reflow process. There is little risk of sinking of the solders (19) in the present invention since the solders (19) are discretely arranged on the upper surface of the pad (18A).

With reference to FIG. 8, a conventional method for manufacturing a circuit device is described. Here, a description is given of a method for manufacturing a hybrid integrated circuit device in which a conductive pattern 108 and circuit elements are formed on a surface of a substrate 106 (refer, for example, to Patent Document 1 below).
Referring to FIG. 8A, first, solder 109 is formed at portions on a surface of the conductive pattern 108 formed on the surface of the substrate 106. The substrate 106 is for example a metallic substrate made of a metal such as aluminum, and is insulated from the conductive pattern 108 by an insulating layer 107. Pads 108A, pads 108B, and pads 108C are formed by the conductive pattern 108. In a later step, a heat sink is attached to an upper portion of each pad 108A. In a later step, a small-signal transistor is attached to each pad 108B. In a later step, a lead is attached to each pad 108C. Here, the solder 109 is formed on the surfaces of the relatively large pads 108A and the pads 108C.
Referring to FIG. 8B, next, a small-signal transistor 104C and a chip component 104B are attached with solder. In this step, heating is performed until the solder for connecting the transistor 104C and the like melts. Consequently, the solder 109 formed on the pads 108A and the pads 108C in the previous step also melt.
Referring to FIG. 8C, next, the small-signal transistor 104C is connected to predetermined portions of the conductive pattern 108 with thin wires 105B.
Referring to FIG. 9A, next, a heat sink 111 and a lead 101 are attached to each pad 108A and each pad 108C, respectively, by melting the solder 109 previously formed thereon. Here, the heat sink 111 has a power transistor 104A placed thereon, and is attached onto the pad 108A via the solder 109 previously formed. Then, the transistor 104A is connected to a desired portion of the conductive pattern 108 with a thick wire 105A.
Referring to FIG. 9B, a sealing resin 102 is formed to cover the circuit elements and the conductive pattern 108 formed on the surface of the substrate 106. With the steps above, a hybrid integrated circuit device 100 is manufactured.
Patent Document 1: Japanese Patent Application Publication No. 2002-134682

Circuit device and method for manufacturing same

SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC


A catalyst for the reduction of carbon dioxide into carbon monoxide includes tungsten sulfide alone or at least one catalyst support selected from among alumina, silica, activated carbon, zeolite, iron oxide, zirconia, titania, ferrite, yttria thoria, lanthania, neodymia and activated clay and tungsten sulfide deposited on the support. The catalyst is produced, for example, by a method including the steps of adding the support to an aqueous solution of ammonium tetrathiotungstate, an aqueous ammoniacal solution of it or an acid solution of it, drying the resultant solution and heating the resultant dried solid in a current of hydrogen, nitrogen, argon or helium, thereby decomposing the solid.

1. Field of the Invention
This invention relates to a method for the reduction of carbon dioxide into carbon monoxide, a catalyst for use in the reduction of carbon dioxide, and a method for the production of the catalyst.
In recent years, the earth's warming due to an increase in the carbon dioxide concentration of the atmospheric air has been arousing the public anxiety. Though the carbon dioxide has no toxicity in itself, it is now discharged in a colossal amount of about 20 billion tons annually into the atmospheric air. In the circumstances, the desirability of preventing a further increase in the carbon dioxide concentration in the atmospheric air has been finding widespread recognition. This prevention dictates an extreme decrease in the consumption of energy and an increase in the reclamation of produced carbon dioxide. The carbon monoxide which is obtained by reducing carbon dioxide can be utilized as a raw material for products of synthesis and as a fuel. This invention concerns the reduction of carbon dioxide mentioned above.
2. Description of the Prior Art
The method of reduction and fixation of carbon dioxide which resorts to catalytic hydrogenation of the carbon dioxide, i.e. the reduction of the carbon dioxide by reaction with hydrogen, possesses a prominent capacity for reducing and fixing the carbon dioxide per unit time per unit surface area and allows treatment of the carbon dioxide in a large amount as compared with the method of photochemical reaction, the method of electrochemical reaction, the method of polymer synthesis and the method of organic synthesis. It further enjoys the advantage that it allows application thereto of the technique of hydrocarbon synthesis by the Fischer-Tropsch process and, by reason of the vapor-phase reaction in mode of operation, permits the product of the reaction to be easily separated. Heretofore, for the reduction and fixation of carbon dioxide by the catalytic hydrogenation, the method which uses a catalyst of such noble metal as ruthenium or rhodium has been studied [as reported by F. Solymosi and A. Erdohelyi, J. Mol. Catal., Vol. 8, 471 (1980)].
This method, however, is disadvantageous in (1) that the catalyst to be used therein is expensive and is easily poisoned by such sulfur compounds as hydrogen sulfide and sulfur dioxide and is deprived quickly of its catalytic activity, (2) that this reaction which reduces carbon dioxide into methane is an exothermic reaction whose product has a lower energy than the raw material and, therefore, suffers from poor energy yield, (3) that more often than not the reaction fails to proceed smoothly unless it is carried out under high pressure and (4) that since the reaction is generally carried out at an elevated temperature and this elevation of temperature necessitates use of a fossil fuel, the reaction brings about no substantial repression of the occurrence of carbon dioxide.
In the circumstances, therefore, a desire is expressed strongly for a method which is capable of reducing carbon dioxide into carbon monoxide economically by a simple procedure with a notably small consumption of energy.
The present inventors have conducted various studies with a view to attaining this desire.
They have taken notice of the fact that tungsten sulfide which is used as a catalyst for hydrodesulfurization and a hydrogenating catalyst for ethylene hydrocarbons, for example, features the quality of defying the poisoning action of such sulfur compounds as hydrogen sulfide and sulfur dioxide gas, producing no toxic action, exhibiting strong resistance to acids, and enjoying durability, that the necessity for using an expensive noble metal can be obviated and that tungsten sulfide is black and amply absorbs the sunbeams. They have consequently conceived an idea that the use of tungsten sulfide results in accomplishment of the desire mentioned above. This invention has been perfected as a result.

Method for reduction of carbon dioxide, catalyst for the reduction, and method for production of the catalyst

Agency of Industrial Science & Technology

Ministry of International Trade & Industry


A system for processing modulated signals received, together with at least one interference signal, by an array of antenna elements in a communications receiver. The method of the invention includes demodulating the received signals, and processing the demodulated signals to produce an output signal that is substantially free of any interference signals, while at the same time effectively steering the antenna pattern produced by the array of elements, to move any spurious nulls in the pattern away from a source of information signals. This results in avoidance of any cycle slipping problems that might otherwise arise in receiver tracking control loops, and has the added benefit of significantly improving performance as measured by the signal-to-noise ratio.

This invention relates generally to apparatus for receiving and combining together a plurality of modulated signals and, more particularly, to apparatus of this kind that controllably weights the various signals being combined so as to null out an interference signal superimposed on each received modulated signal. Null processing receivers of this general type are useful in a variety of applications, but present invention is described in this specification in the context of a Global Positioning System (GPS) receiver for processing modulated radio-frequency (rf) signals received from multiple orbiting satellites, and accurately determining the position of the receiver.
In the presence of an interference signal, referred to as a jamming signal, received from an unpredictable and usually variable direction, a multi-element receiver antenna array may be used to minimize or null the effect of the interference. Such a system is described in the present inventor's prior patent, U.S. Pat. No. 4,734,701, entitled "Null Processing Receiver Apparatus and Method," to be referred to as the prior Grobert patent.
In a system of this general type, the antenna array elements receive modulated radio-frequency (rf) signals, which are typically summed together to produce a sum signal for subsequent down-converting, demodulation and baseband processing. Prior to summation, each elemental rf signal is controllably adjusted in amplitude and phase (an adjustment referred to as complex weighting), in such a manner as to null or cancel out the interference signal. This adaptive interference cancellation is usually performed in a way that maximizes the power of the sum signal, since it is assumed that the power of the interference signal greatly exceeds that of the desired information signal.
The prior Grobert patent discloses a system for avoiding the use of complicated and often unreliable hardware for complex weighting of the antenna signals. Basically, a hardware section of the system downconverts each rf signal received by an antenna element to an intermediate frequency, demodulates the signal to remove encoded data in the form of a pseudorandom (pn) code (included in the signals transmitted from satellites in the Global Positioning System), and mixes the signal with reference quadrature (I and Q) signals, to produce pairs of analog baseband data signals: I.sub.1, Q.sub.1 ; I.sub.2, Q.sub.2 ; I.sub.n, Q.sub.n. Then the hardware filters these analog signals and converts them to digital form for further processing in a software section of the system. The software section generates an I.sub.NULL signal and a Q.sub.NULL signal. The I.sub.NULL signal is obtained by summing a primary I signal, such as I.sub.1, with weighted versions of the auxiliary I signals, such as I.sub.2, I.sub.3, . . . I.sub.n. Each weighting circuit includes two multipliers and an integrator, and functions to multiply an auxiliary signal by a weighting factor generated by correlating the auxiliary signal with the summer output The Q.sub.NULL signal is generated in a similar fashion. The weighting circuits cooperate to cancel out the effect of a jamming signal, as explained in the prior Grobert patent, and the nulled I and Q signals are then used in tracking and detection circuitry.
The system described in the prior Grobert patent, and prior systems used for the same general purpose, produce a composite antenna pattern that presents a null region in the direction of a jamming signal source. Multiple jamming sources are handled in the same way, if the antenna array has enough elements, and the antenna pattern presents multiple nulls to the multiple jamming signal sources. Unfortunately, the resulting antenna pattern may also have spurious nulls that are directionally aligned with desired information signal sources, such as GPS satellites. Each spurious null reduces the signal energy from a signal source with which it may be aligned, and can also induce "cycle slips" in a carrier tracking phase lock loop in the receiver.
GPS receivers, as is generally well understood, include a number of synchronizing circuits, such as phase lock loops, to synchronize operation of the receiver with the incoming signals. Basically, a GPS signal consists of at least one rf carrier signal, modulated with data signals. One of the synchronizing circuits or tracking loops in the receiver is designed to lock onto the incoming carrier signal. If the incoming signal is weakened by a spurious antenna null, the carrier tracking loop may momentarily lose synchronism with the received carrier signal, and may thereby "slip" one or more cycles of the carrier. This is obviously disruptive to efficient operation of the receiver, and prevents continuous demodulation of satellite data. The present invention provides an elegant solution to this significant difficulty, and avoids associated carrier loop cycle slips.

Null processing and beam steering receiver apparatus and method


A semiconductor memory device includes a substrate with a cell array region, a first interface region, and a second interface region, the cell array region being provided with active regions, bit lines on the cell array region and the second interface region, dielectric patterns on top surfaces of the bit lines and extending along the top surfaces of the bit lines and further extending onto the first interface region, a device isolation pattern on the substrate, and including a first portion on the cell array region and a second portion on the first interface region, the first portion defining the active regions, the second portion being provided with first recesses, and each first recess being disposed between two adjacent dielectric patterns, and first sacrificial semiconductor patterns disposed on the first interface region and in the first recesses. The first sacrificial semiconductor patterns include polycrystalline silicon.

The present inventive concepts relate to a semiconductor memory device, and more particularly, to a semiconductor memory device including a sacrificial semiconductor pattern.
Semiconductor devices are beneficial in the electronic industry because of their small size, multi-functionality, and/or low fabrication costs. Semiconductor devices have been increasingly integrated with the development of electronic industry. Line widths of patterns of semiconductor devices are being reduced for high integration thereof. However, new exposure techniques and/or expensive exposure techniques are demanded for forming finer patterns such that it is difficult to highly integrate semiconductor devices. Various studies have thus recently been conducted for new integration techniques.