A non-volatile semiconductor memory cell with dual functions includes a substrate, a first gate, a second gate, a third gate, a charge storage layer, a first diffusion region, a second diffusion region, and a third diffusion region. The second gate and the third gate are used for receiving a first voltage corresponding to a one-time programming function of the dual function and a second voltage corresponding to a multi-time programming function of the dual function. The first diffusion region is used for receiving a third voltage corresponding to the one-time programming function and a fourth voltage corresponding to the multi-time programming function. The second diffusion region is used for receiving a fifth voltage corresponding to the multi-time programming function.

1. Field of the Invention
The present invention relates to a non-volatile semiconductor memory cell, and more particularly to a non-volatile semiconductor memory cell with dual functions.
2. Description of the Prior Art
Non-volatile memory is a type of memory that retains information even when power is not supplied to memory blocks thereof. Some examples include magnetic devices, optical discs, flash memory, and other semiconductor-based memory technologies. Non-volatile memory can be classified by the reprogrammable capability. For example, some non-volatile memory could be programmed only once (one time programmable ROM, OTP ROM), and other types may be programmed and reprogrammed multiple times. Considering the fabrication and process, the nonvolatile memory technology can be specified as the standalone and embedded memory one. As semiconductor memory technologies move forward, embedded non-volatile memory is able to come out an advantage that the ability to embed substantial amounts of memory cells into integrated circuits (ICs). In other words, the embedded memory cells are formed in the same process with the ICs. No complex and expensive fabrication steps are the key feature of the embedded non-volatile memory. These non-volatile memory technologies are also classified as the "CMOS non-volatile memory" or "logic non-volatile memory".
One goal of non-volatile memory devices is to fit increasing numbers of memory cells in smaller chip areas while utilizing the same fabrication process as other complementary metal-oxide-semiconductor (CMOS) devices in the IC. One method for increasing the number of memory cells utilizes "charge storage structures" to form 2-bit non-volatile semiconductor memory transistors. Please refer to FIG. 1, which is a diagram of a semiconductor memory transistor 100 according to the prior art. The semiconductor memory transistor 100 is formed on a substrate, which has two implanted source/drain regions 157-1 and 157-2 and a channel region 156. The channel region 156 and the implanted source/drain regions 157-1, 157-2 are formed under a gate region 152, and two charge storage structures 155-1 and 155-2 formed on either side of the gate region 152. The charge storage structures 155-1, 155-2 are made of a spacer material that has charge trapping properties, e.g. silicon-nitride or a high-k dielectric. The charge storage structure 155-2 is programmed by applying a gate voltage VG of 5 Volts and a drain voltage V2 of 5 Volts, with a source voltage V1 of 0 Volts. Thus, channel hot electrons from the source region 157-1 may enter the charge storage region 155-2 by traveling through the channel region 156. To erase the charge storage structure 155-2, a gate voltage VG of −5 Volts and a drain voltage V2 of −5 Volts may be applied, inducing band-to-band tunneling holes to enter the charge storage structure 155-2.
Another technique for providing a CMOS non-volatile memory cell that is fabricated using standard CMOS processes is shown in FIG. 2, which is a diagram of a CMOS non-volatile memory cell 200 ("memory cell 200" hereinafter) according to the prior art. The memory cell 200 is fabricated on a substrate 202, has two source/drain regions 204-1 and 204-2, and two poly gates 206-1 and 206-2 separated from the substrate 202 by gate dielectric layers 208-1 and 208-2, respectively. The gate dielectric layers 208-1/208-2 are formed of oxide-nitride-oxide (ONO) material. A programming layer 210 is formed between the two poly gates 206-1, 206-2, and is isolated from the two poly gates 206-1, 206-2 by an isolating layer 212. The programming layer 210 provides charge storage similar to a silicon-oxide-nitride-oxide-silicon (SONOS) structure utilized in flash memory cells. However, in the CMOS non-volatile memory cell 200, the two poly gates 206-1, 206-2 are utilized to program the programming layer 210. Silicon-nitride sidewall spacers 214-1 and 214-2 are deposited with the programming layer 210 for controlling e-field fringing near the source/drain regions 204-1, 204-2. Sidewall isolating layers 216-1 and 216-2 are grown with the isolating layer 212, and isolate the SiN sidewall spacers 214-1, 214-2 from the poly gates 206-1, 206-2 and the substrate 202. Second sidewall spacers 218-1, 218-2 are formed from silicon oxide. The programming layer 210 is programmed by grounding the poly gate 206-1, and leaving the source/drain regions 204-1, 204-2 and substrate 202 floating. A high voltage is applied to the poly gate 206-2 to attract electrons from the poly gate 206-1 into the programming layer 210 through the isolating layer 212. The negative charge of the programming layer 210 over the channel causes a negative bias, increasing threshold voltage of the memory cell 200 relative to non-programmed transistors in the same circuit.
Many various topologies are provided in the prior art for forming memory cells with charge storage layers. However, the memory cells are slow and inefficient.

Non-volatile semiconductor memory cell with dual functions


A system is disclosed that performs multi-factor authentication with respect to a hardware assembly. In one example, a method includes: storing a cryptographic identifier of a vehicle hardware assembly; transmitting, to the assembly, a validation message; receiving a response message; decrypting the response message using the identifier; and determining whether the assembly is authenticated.

Automotive vehicles increasingly come equipped with expensive modular components—e.g., such as a catalytic converter, alloy wheels, stylish tail lamp assemblies, and the like. Thieves may target these particular components and even replace them with counterfeit parts so that the vehicle owner is unaware of the theft. A system is needed to detect such theft.

Multi-factor authentication of a hardware assembly


A method for controlling a characteristic impedance during testing of a semiconductor die (13). The semiconductor die (13) is mounted in a TAB package (10 or 54 ) wherein the TAB package ( 10 or 54 ) lacks a ground plane. A conductive plate (40 or 70) is removably mounted to a test contact fixture ( 29 or 60 ) . The conductive plate (40 or 70) may be coated with a layer of dielectric material (50, 56, or 74) having a specified thickness. The layer of dielectric material (50, 56, or 74) contacts a plurality of conductive fingers (16). A microstrip transmission line is formed which includes the plurality of conductive fingers (16) , the layer of dielectric material (50, 56, or 74), and the conductive plate (40 or 70). The semiconductor die (13) is tested by a computer controlled automatic tester (28).

This invention relates, in general, to a method for adjusting characteristic impedances, and more particularly, to a method for adjusting a characteristic impedance for a semiconductor package.
Advances in semiconductor wafer processing and packaging techniques have paved the way for the manufacture of high speed electronic systems including high speed computer systems, automatic test equipment, instrumentation, and communications systems. The packaged semiconductor devices used as components in these systems send and receive electrical signals at such high speeds that the interconnects through which the electrical signals travel must be treated as transmission lines having a characteristic impedance Z.sub.0. An important parameter governing the characteristic impedance is the distance between a ground plane and the interconnect or signal line. For example, the characteristic impedance of a microstrip transmission line is approximated by the equation: ##EQU1##
The parameters "w" and "t" refer to the width and the thickness, respectively, of a conductive finger and the parameters "h" and "e.sub.r " refer to the thickness, and the relative dielectric constant, respectively, of a dielectric layer between a ground plane and the conductive finger. This formula applies when the ratio of "w" to "h" ranges between approximately 0.1 and approximately 3 and when the dielectric constant, e.sub.r. ranges between approximately 1 and approximately 15.
TAB (Tape Automated Bonded) packages include a region, commonly referred to as a fan-out region, in which the impedance of a plurality of conductors must be controlled to ensure the proper operation of a semiconductor die housed by the TAB package. This impedance control is accomplished using a two-metal TAB tape in which the plurality of conductors are fabricated from a first metal layer and a ground plane for the plurality of conductors is fabricated from the second metal layer. A dielectric film is sandwiched between the two metal layers and provides the desired separation between the plurality of conductors and the ground plane, and thereby forms a microstrip transmission line having a characteristic impedance Z.sub.0.
The two-metal TAB tape configuration is useful to the semiconductor manufacturer for testing the packaged semiconductor die and to "end-users" whose system design constraints permit using a packaged semiconductor die having an attached ground plane. However, for system designs in which the fan-out region is undesirable due to, for example, space constraints, the plurality of conductors must be severed near the semiconductor die such that the fan-out region and its attached ground plane are removed from the TAB package. In these types of applications, the ground plane is still used by semiconductor manufacturers for maintaining the characteristic impedance of the plurality of conductors while testing the packaged semiconductor die. Although including the ground plane by using a two-metal TAB tape is necessary for testing the TAB packaged semiconductor die, it increases the manufacturing costs associated with these components. Moreover, "end-users" who do not require the fan-out region are unwilling to pay for the extra costs incurred by using the additional metal layer.
Accordingly, it would be advantageous to have a method for electrically testing a packaged semiconductor die wherein a characteristic impedance of the plurality of conductors in the fan-out region is both controllable and adjustable. Moreover, the method should provide the desired features without increasing the time required to manufacture and test the packaged semiconductor die.

Method for electrically testing a semiconductor die using a test apparatus having an independent conductive plane


An electronically activated gas cooktop control system, responsive to a touch-sensitive user interface, and capable of providing a predetermined range of cooking and simmer levels of BTU output, has two complementary heating modes of operation A first heating mode of operation is provided to produce a wide selection of simmer levels of BTU output, by electronically sequencing a solenoid-operated modulating gas valve “on” and “off”, at a predetermined level of flame. A second cooking mode of operation is provided by electronically modulating the level of flame, through use of a pulse-width-modulation (PWM) output signal to produce a wide selection of cooking levels of BTU output. An igniter system capable of insuring proper ignition of gas without generating harmful electromagnetic interference is also provided.

While easily achieved in electric cooktops, simmer temperatures have until now been complicated issues for gas cooking apparatus. Conventional gas cooktops are generally operated by using manually activated mechanical actuator knobs, with infinitely varying settings of the flow of gas by rotating associated gas proportional valves. Most often, adjustment of cooking level is achieved by comparing level indicators printed on the knob, to a fixed pointer printed on the cooktop surface, immediately surrounding the knob. With such knobs and associated infinite valves, it often becomes difficult for the user to precisely re-adjust the valve to a predetermined preferred level of BTU output and thus repeatability is rarely achieved. This effect is of an even greater concern in simmer mode of cooking where delicate food such as chocolate or sauces can be spoiled, if cooked at slightly higher temperatures than those recommended. Additionally, mechanical knobs are also usually susceptible to wear and tear and are often vulnerable to contaminants normally present in cooking areas, such as greases and moisture infiltration that generally find their way through open areas, necessary for the mechanical valve installation in the cooking surface. Spark igniters are typically used to ensure ignition of the gas and are generally activated upon rotation of the above-mentioned mechanical knobs. Most often, integrated sensors, such as flame detectors, are used to continuously monitor proper combustion of the gas. Such sensors typically provide feedback to the spark ignition module, to ensure re-ignition of the gas, should it fail to combust. However, very low flames have been proven hard to detect by such sensor types and are often a cause for spark igniters to unnecessarily generate discharges in response to false detection incidents. Spark igniters are also known, by those in the industry, to emit powerful electromagnetic interference (EMI) that often disturbs electronic equipment working in their vicinity. Microcontrollers used in electronic controls are also known to be highly susceptible to EMI emission, and hence generally need additional protection when used in conjunction with spark igniter modules in gas cooking apparatuses. Due to their large orifice size, burners that are capable of high BTU output are usually not suitable for simmer, one of the reasons being that smaller flames have the tendency to self-extinguish in such conditions. Therefore, some cooktops have been equipped with simmer burners, featuring smaller orifice diameters and capable of delivering stable low-to-medium BTU output. This has often had the effect of reducing the number of available burners capable of high BTU output on a given cooking surface. Various methods involving flame sequencing have been used to provide gas-cooking appliances with low temperature output to provide a simmer. Sequencing the flame on and off in a timely fashion provides for an elegant solution to achieve very low is BTU output from a burner also capable of high BTU output, but simmer systems of the prior art generally involve synchronized re-ignition of the gas following each flame on/off cycle, complicating even further the design of simmer controls in gas cooktops. Moreover, repeated re-ignitions of the gas during simmer mode often have the undesirable effect of continuously generating harmful electromagnetic interference. As mechanical valves are traditionally used to adjust the gas flow, additional electrically controlled "on/off" cycling solenoid valves are generally added to provide the "on/off" sequencing of the flame in simmer mode, contributing to higher system cost and reliability issues.
U.S. Pat. No. 4,376,626 to Rossi et al. (Device for the control of a sequential burner of a cooking apparatus) discloses a control device for at least one sequential burner of a cooking apparatus, comprising in combination: a geared-down synchronous motor and a drum which can be driven in rotation by this motor, an electric circuit associated with this drum, comprising at least one electric contact pressing upon the surface of the drum and at least one electrically conductive track arranged on the drum in such manner as to permit operation of the burner according to heating sequences which are variable as a function of the position of the electric contact on the drum, and means for adjusting the position of the contact in relation to the conductive track in order that the duration of the heating sequences of the burner may be varied progressively and continuously.
U.S. Pat. No. 5,575,638 to Witham et al. (Stove burner simmer control) discloses a burner control which provides a pulsed flame sequence in response to a user's selective manipulation of an actuator through a range of response. A microcontroller-based control module switches both a burner igniter control and an electric valve for gas supply to the burner in a predetermined time sequence depending upon the actuator position within the predetermined range. Preferably, one or more of a plurality of burners on a single cooking top are controlled for pulsed sequence operation, and a single actuator for each channel, preferably in a form of a rotary knob, provides a simple user interface for utilizing the pulsed flame sequence, preferably in a low gas flow or simmer cooking range.
U.S. Pat. No. 6,116,230 to Clifford et al. discloses a gas appliance comprising a burner, a conduit, a control circuit, and a valve. The control circuit is adapted to provide a pulse-width-modulated signal to the valve, whereby the valve provides a substantially linear flow rate of fuel from a fuel source to the burner. The gas appliance of Clifford et al. employs a spark igniter.
Thus, there is a need for an electronically controlled gas cooktop appliance capable of delivering true simmer temperatures from gas burners that are also capable of high BTU output. There is also a need for an electronic gas cooktop appliance that is capable of fine, precise, and repeatable control of heating levels, provided by a direct level-dialing control, thus providing the user with a more precise selection of available and controllable temperatures. There is also a need for a gas cooktop appliance capable of assuring flame re-ignition without generating harmful electromagnetic interference. There is equally a need for a gas cooktop flame-sequencing simmer system integrating gas-flow modulation and "on/off" sequencing ability into a single gas valve. Finally, there is a need for a gas cooktop appliance integrating an electronic user touch interface for burner activation and selection of temperature settings.

Electronic gas cooktop control with simmer system and method thereof


The cab includes a front pillar on the first side face and a front pillar disposed on the second side face and located behind the front pillar. The cab includes a front transparent member located between the first side face and the second side face and a lateral transparent member provided the second side face and connected to the front pillar. The cab includes a roller disposed on the front transparent member and a bracket disposed on the lateral transparent member and provided with a rail member to guide the roller.

For example, Japanese Patent Laying-Open No. 2007-216957 (PTL 1) discloses a cab to be used in a work machine such as a hydraulic excavator. The cab disclosed in this publication is provided with pillars including a pair of front pillars disposed on both sides, respectively and a pair of rear pillars disposed on both sides, respectively.


A fryer unit includes a boil-out drain path that does not require boil-out fluid to pass through a pump.

A typical deep-fat fryer will include a fryer vat containing a heated bath of cooking oil. The cooking oil is adapted to receive baskets of food products such that the food products will be immersed within and cooked by the heated cooking oil. Such fryers include a heat exchanger, which may take the form of in vat fire tubes and associated burners, with combusted gases being passed therethrough to heat the oil.
To extend the useful life of the cooking oil, it is a common practice to filter the particulate food matter from the cooking oil to minimize the carbonization of such food matter within the cooking oil. Various configurations of filtering systems in which oil is drained from the vat into a pan, tub or other below unit containment vessel and then passed through a filter have been provided, with a pump used to return oil to the fryer vat after the oil has been filtered.
The cleaning process for fryer vats typically involves a "boil-out" process in which the vat is filled with a mixture of oil and vinegar and the heating system of the fryer is run to produce a boiling of the mixture, which in turn cleans the vat. Once the boil-out process is completed, the mixture must be removed from the vat, preferably drained without leaving any significant amount of the mixture in the unit and without running the mixture through the pump, as that may degrade the pump/motor assembly causing early failure. Typically, oil in the vat is drained into the pan, tub or other below unit containment vessel of the oil filtering system prior to the boil-out. Upon completion of the boil-out, including removal of the cleaning mixture, the oil in the vessel is returned to the vat. Since the oil is held in the below unit vessel during boil-out, the below unit vessel is not available for draining of the cleaning mixture. It would be desirable to provide a fryer that facilitates removal or draining of the boil-out cleaning mixture.

Fryer filtration arrangement with boil-out bypass


Templates that are engineered to contain a predetermined sequence and a hairpin structure are provided by a nested oligonucleotide extension reaction. The engineered template allows Single Primer Amplification (SPA) to amplify a target sequence within the engineered template. In particularly useful embodiments, the target sequences from the engineered templates are cloned into expression vehicles to provide a library of polypeptides or proteins, such as, for example, an antibody library.

Methods for nucleic acid amplification and detection of amplification products assist in the detection, identification, quantification, isolation and sequence analysis of nucleic acid sequences. Nucleic acid amplification is an important step in the construction of libraries from related genes such as, for example, antibodies. These libraries can be screened for antibodies having specific, desirable activities. Nucleic acid analysis is important for detection and identification of pathogens, detection of gene alteration leading to defined phenotypes, diagnosis of genetic diseases or the susceptibility to a disease, assessment of gene expression in development, disease and in response to defined stimuli, as well as the various genome projects. Other applications of nucleic acid amplification method include the detection of rare cells, detection of pathogens, and the detection of altered gene expression in malignancy, and the like. Nucleic acid amplification is also useful for qualitative analysis (such as, for example, the detection of the presence of defined nucleic acid sequences) and quantification of defined gene sequences (useful, for example, in assessment of the amount of pathogenic sequences as well as the determination of gene multiplication or deletion, and cell transformation from normal to malignant cell type, etc.). The detection of sequence alterations in a nucleic acid sequence is important for the detection of mutant genotypes, as relevant for genetic analysis, the detection of mutations leading to drug resistance, pharmacogenomics, etc.
There are many variations of nucleic acid amplification, for example, exponential amplification, linked linear amplification, ligation-based amplification, and transcription-based amplification. One example of exponential nucleic acid amplification method is polymerase chain reaction (PCR) which has been disclosed in numerous publications. See, for example, Mullis et al. Cold Spring Harbor Symp. Quant. Biol. 51:263-273 (1986); Mullis K. EP 201,184; Mullis et al. U.S. Pat. No. 4,582,788; Erlich et al. EP 50,424, EP 84,796, EP 258,017, EP 237,362; and Saiki R. et al. U.S. Pat. No. 4,683,194. In fact, the polymerase chain reaction (PCR) is the most commonly used target amplification method. PCR is based on multiple cycles of denaturation, hybridization of two different oligonucleotide primers, each to opposite strand of the target strands, and primer extension by a nucleotide polymerase to produce multiple double stranded copies of the target sequence.
Amplification methods that employ a single primer, have also been disclosed. See, for example, U.S. Pat. Nos. 5,508,178; 5,595,891; 5,683,879; 5,130,238; and 5,679,512. The primer can be a DNA/RNA chimeric primer, as disclosed in U.S. Pat. No. 5,744,308.
Some amplification methods use template switching oligonucleotides (TSOs) and blocking oligonucleotides. For example, a template switch amplification in which chimeric DNA primer are utilized is disclosed in U.S. Pat. Nos. 5,679,512; 5,962,272; 6,251,639; and by Patel et al. Proc. Natl. Acad. Sci. U.S.A. 93:2969-2974 (1996).
However the previously described target amplification methods have several drawbacks. For example, the transcription base amplification methods, such as Nucleic Acid Sequence Based Amplification (NASBA) and transcription mediated amplification (TMA), are limited by the need for incorporation of the polymerase promoter sequence into the amplification product by a primer, a process prone to result in non-specific amplification. Another example of a drawback of the current amplification methods is the requirement of two binding events which may have optimal binding at different temperatures. This combination of factors results in increased likelihood of mis-priming and resultant amplification of sequences other than the target sequence. Therefore, there is a need for improved nucleic acid amplification methods that overcome these drawbacks. The invention provided herein fulfills this need and provides additional benefits.

Nested oligonucleotides containing a hairpin for nucleic acid amplification


An improved optical power transient control scheme is provided for optical amplifiers used in long haul, high capacity DWDM optical networks. The optical power transient control scheme employs a combination of feed-forward and feedback control mechanisms to adjust the pump laser current of an amplifier. In this way, the optical power transient control scheme allows for very fast detection of transient changes in optical input power and fast control settling time with minimal optical power degradation.

The present invention relates generally to a method for controlling optical gain of an optical amplifier and, more particularly, to an optical power transient control scheme for erbium-doped fiber amplifiers (EDFA) used in long haul, high capacity dense wavelength division multiplexing optical networks.
EDFA amplifiers are used to compensate for the accumulated loss of various optical elements across an optical network and for the transmission loss across the optical fiber. These optical fiber amplifiers are operated at saturation such that the total optical output power is nearly constant independent of the number of wavelength channels present. If not controlled, the gain experienced by each channel will vary depending on the number of channels present.
Upon network reconfiguration, when wavelength channels are added or dropped or when the fiber is unexpectedly cut, sudden changes in the total input power are effected. Due to transient cross saturation in EDFA optical amplifiers, this sudden total power change induces power excursions on the surviving channels that can adversely affect the quality of service. Although this transient perturbation is generally slow in a single amplifier, the magnitude and speed of the transient power excursions accumulates as it passes through from stage to stage and grows quickly along a cascade of EDFA amplifiers. Surviving channel power variations can lead to unacceptable error bursts, due to exceeding the threshold for optical nonlinear effects, or, due to the receiver inability to handle such rapidly changing power levels.
Therefore, it is desirable to provide a method of electronically controlling the optical gain of an EDFA amplifier that will counteract the effect of sudden optical power change. This distributed control action across all of the optical amplifiers in the system together with optimized control performance will allow for very long chains of amplifiers in optical networks with dynamic wavelength provisioning. It is envisioned that the proposed control scheme will allow for very fast detection of transient changes in input optical power, as well as fast control settling time with minimal optical power degradation on the surviving channels. In addition, the proposed control scheme should be adaptable to specific optical network configurations and to handle unexpected add/drop in optical power.
In accordance with the present invention, an improved method is provided for electronically controlling an optical amplifier in an optical network. The method includes: receiving an optical signal into the optical amplifier; detecting input power of the optical signal entering the amplifier; supplying optical energy to the at least one doped fiber section associated with the optical amplifier using a laser source; detecting a sudden variation in the input power; and controlling the optical energy supplied by the laser source based only on the variation of the input power of the optical signal entering the amplifier.
In another aspect of the present invention, an alternative improved method is provided for electronically controlling the optical gain of an optical amplifier in an optical network. The method includes: receiving an optical signal into the optical amplifier; detecting output power of the optical signal at an output of a first doped fiber section, where the output of the first doped fiber section is connected to an input of a second doped fiber section; supplying optical energy to the second doped fiber section using a second laser source; and controlling the optical energy supplied by the second laser source based in part on the optical power detected at the output of the first doped fiber section.
For a more complete understanding of the invention, its objects and advantages, reference may be had to the following specification and to the accompanying drawings.

Optical power transient control scheme for EDFA amplifiers


Methods of forming a floating body cell (FBC) with faster programming and lower refresh rate and the resulting devices are disclosed. Embodiments include forming a silicon on insulator (SOI) layer on a substrate; forming a band-engineered layer surrounding and/or on the SOI layer; forming a source region and a drain region with at least one of the source region and the drain region being on the band-engineered layer; and forming a gate on the SOI layer, between the source and drain regions.

FBCs are simple and attractive in terms of scaling over conventional dynamic random-access memory (DRAM) because of the FBCs' capacitor-less structure. FBCs make use of a floating body to store data in the form of a floating body potential. For example, the value 1 is achieved in FBCs when a positive voltage is applied to a bitline (BL) to initialize impact ionization, and holes are accumulated in the body that raise the body potential. The value 0 is achieved when a negative voltage is applied to the BL, and holes are extracted from the body and reduce the body potential. Despite the foregoing, FBCs still experience issues associated with DRAM, such as refresh procedures to replenish the charge lost during read or after prolonged use. Additionally, limited data storage capacity in FBCs exacerbates the refresh rate issue.
A need therefore exists for methodology enabling formation of improved FBCs with faster programming and lower refresh rates, and the resulting device.


A host device is configured to communicate over a network with a storage system. The host device comprises a multi-path input-output (MPIO) driver configured to control delivery of input-output (IO) operations from the host device to the storage system over selected ones of a plurality of paths through the network. The MPIO driver is further configured to identify a plurality of partitions of a storage device of the storage system, the storage device being used for booting a server. The MPIO driver is also configured to monitor an amount of consumed space of each partition, to transmit to the storage system data corresponding to the amount of consumed space of each partition, to process data from the storage system indicating that a size of the storage device has been increased, and to increase a size of one or more of the partitions.

Storage arrays and other types of storage systems are often shared by multiple host devices over a network. Applications running on the host devices each include one or more processes that perform the application functionality. Such processes issue input-output (IO) operations for delivery to the storage system. In conventional approaches, storage arrays can identify amounts of consumed space of storage devices and/or storage groups (also referred to herein as "storage pools") corresponding to the storage devices.
In a boot from storage array network (SAN) scenario, servers utilize an operating system installed on external SAN-based storage to boot up rather than booting off the local internal disk of the server or direct attached storage. Boot from SAN allows for increased server density, easier server replacement by having a new server point to the previously used boot from SAN location, elimination of local disks on the servers, and increased reliability because a boot device can be accessed through multiple paths, avoiding a single point of failure.
When implementing boot from SAN, it is important that defined partitions in a boot device of an operating system are not fully allocated, and that there is sufficient space for the operating system to efficiently boot up and run without failing. For example, maintaining ample space in the partitions is necessary for proper patch management, upgrades, rebooting and overall performance of an operating system. As noted above, arrays may currently identify total consumption of boot from SAN devices, but lack the capability to identify defined partitions and partition utilization of boot from SAN devices, leading to significant performance degradations of an operating system.

Partition utilization awareness of logical units on storage arrays used for booting


An apparatus comprises a flexible substrate including a modular electrode array disposed on the flexible substrate. The modular electrode array includes a plurality of electrode modules, where an electrode module includes a plurality of electrodes. The flexible substrate also includes a spatial separation between the electrode modules of the modular electrode array, and conductive interconnect coupled to the electrodes of the plurality of electrodes.

Surface neural recording and stimulation involves placing an electrode array directly on the surface of the targeted neural tissue. The electrode array typically includes electrode sites that sense electrical activity in the tissue and can be used to assess neuronal activity. The electrode sites can also deliver small electrical currents to the tissue and can be used to stimulate neuronal activity. For example, electrocorticography, or ECoG, involves placing an electrode array directly on the cerebral cortex, the outer surface of the brain. ECoG can be used in epilepsy mapping procedures conducted to identify and locate diseased tissue in preparation for surgical resection of the diseased tissue. However, conventional surface arrays are large and have a limited spatial resolution that reduces the precision of sensed electrical activity or stimulated electrical activity, resulting in reduced precision of gathered neural activity information or activation. Thus, there is a need in the neural devices field to create an improved neural device with modular electrode arrays. This invention provides such an improved neural device.

Neural device with modular electrode array


An etching method and etching device are provided, enabling uniform rendering of the thickness of a film for processing on a wafer regardless of the film thickness profile thereof, and thereby enabling global planarizing of the wafer surface. In an etching method, the film thickness profile of the film for processing formed on the wafer is ascertained in advance, and wet etching is performed by discharging an etchant liquid L1 at a thick portion of the film for processing; simultaneously with the discharge of the etchant liquid L1, a diluting liquid L2 for the etchant liquid L1 is discharged at a thin portion of the film for processing.

1. Field of the Invention
This invention relates to an etching method to planarize the surface shape of a wafer, and an etching device employing this method.
2. Description of the Related Art
The rising integration levels in semiconductor devices in recent years have been accompanied by advances in the miniaturization and multilayer design of elements and wiring. Pattern formation for fine wiring may also rely on thin film fabrication techniques and lithography, but with the adoption of multilayer designs, a planarized base surface is indispensable for the precise formation of fine patterns.
For example, in reducing the size of a gate electrode, much depends on the performance of the exposure equipment used in lithography processes; however where miniaturization of device isolation regions and reduction of distances from other gate electrodes are concerned, techniques to planarize the base surface using shallow trench isolation (hereafter abbreviated "STI") are also attracting attention in addition to advanced lithographic techniques.
FIGS. 1A to 1C shows cross-sectional process diagrams of STI processes, as one example of a planarizing process. As shown in FIG. 1A, in an STI process, first a stopper layer 3 made of silicon nitride is patterned via a thermal oxide film 2 on the wafer 1 which is the silicon substrate, and this stopper layer 3 is used as an inorganic mask to form trenches 4 on the surface side of the wafer 1. Then, a buried insulating film 5 of silicon oxide is deposited so as to bury these trenches 4. Here, the buried insulating film 5 is formed by ordinary CVD; however when using CVD for film deposition, dispersion occurs in the deposited film thickness at the surface of the wafer 1, so that an insulating film is formed in which, compared for example with the thickness t1 at the center of the wafer 1, the film thickness t2 at the periphery is larger.
In this state, if CMP (chemical-mechanical polishing) is performed to planarize the buried insulating film 5, a global step existing at the surface of the initial buried insulating film 5 remains at the surface of the buried insulating film 5 even after polishing.
Hence as shown in FIG. 1B, as preprocessing for planarizing by CMP, etching is performed in order to render the thickness of the buried insulating film 5 uniform. In this etching, the film thickness profile of the buried insulating film 5 which is the film to be etched is ascertained in advance, and etchant liquid is discharged only at thick portions of the buried insulating film 5 to etch the buried insulating film 5. In this case, as for example shown in FIG. 2, the discharge position of the etchant liquid L1 is caused to move in the radial direction of the rotating wafer 1. At this time, the discharge position of the etchant liquid L1 is moved such that the etchant liquid L1 is supplied in greater total quantities to portions of the film that are thick, based on the film thickness profile information in the radial direction of the wafer 1 for the film to be etched (the buried insulating film 5), as shown by the film thickness profile of FIG. 3A.
Accordingly, buried insulating film the thickness of which is greater at the periphery of the silicon substrate than at the center (0) becomes such that the film thickness at the periphery and near the center (0) is the same, as shown by the profile of FIG. 3B, so that a globally planarized buried insulating film on the silicon substrate is obtained (see Japanese Patent Laid-open No. 2002-134466).
Further, in STI formation, when by the above-described etching the thickness of the buried insulating film 5 is rendered uniform as shown in FIG. 1B, CMP of the surface of the buried insulating film 5 is performed until the stopper layer 3 is exposed, as shown in FIG. 1C. Accordingly, excessive polishing at the center of the wafer 1 can be prevented without leaving buried insulating film 5 on the stopper layer 3 at the periphery of the wafer 1.
However, when using the above-described etching method, the film thickness profiles of the film for processing which can be corrected are limited; for example, the film thickness of a film for processing with a large film thickness near the center (0) of the wafer, as shown in FIG. 4A, cannot be rendered uniform. That is, if a film for processing having such a film thickness profile is subjected to correction of film thickness using the above-described etching method, the discharge position of the etchant liquid 1 is positioned near the center (0) of the wafer, where the film thickness is greatest, so that the etchant liquid L1 flows toward the wafer periphery due to centrifugal force and is supplied to the entire surface of the wafer. Hence even if such an etching method is used, the entirety of the film for processing is merely etched to become a thin film, as shown in FIG. 4B, and the film thickness cannot be rendered uniform.
In the STI formation process, planarizing by CMP is performed on the buried insulating film (film for processing) subjected to such etching. Consequently, as shown in FIG. 5A, if the CMP conditions are set so as to expose the stopper layer 3 at the wafer periphery, the buried insulating film 5 on the stopper layer 3 at the center of the wafer remains in place and is not polished. If this state is retained in the next process, and an attempt is made to remove the stopper layer 3 by wet etching using hot phosphoric acid or by isotropic chemical dry etching, the remaining buried insulating film 5 at the wafer periphery acts as a mask, and complete removal is not possible. As a result, the desired etched shape is not obtained at the wafer periphery, leading to unsatisfactory semiconductor device characteristics and drops in production yield.
Further, if in order to avoid the above adverse effects CMP polishing is performed so as to expose the stopper layer 3 at the center of the wafer as shown in FIG. 5B, the buried insulating film 5 in the trenches 4 is polished excessively at the wafer periphery, so that the thickness of the buried insulating film 5 in the trenches 4 is different at the wafer center and at the periphery. As a result, the element isolation characteristics are different across the wafer surface. Hence the desired semiconductor device characteristics are not obtained, and drops in production yield result.
In light of the above, this invention has as an object of providing an etching method and etching device, in which the film thickness of a film to be processed having any film thickness profile can be uniform, regardless of the film thickness profile of the film to be processed on the wafer, and global planarizing of the wafer surface can be obtained.


The present invention provides an apparatus and method for correcting buoy motion in Doppler moment estimates. In the present invention, it is assumed that the buoy is stationary over short periods of time, 0.5 seconds for example. The average pitch and roll angles are measured for the 0.5 second period. A short-term Doppler spectrum for a particular beam is computed and stored along with the corresponding average pointing angle. This short-term Doppler spectrum must be averaged with many others to be able to detect the clear air signal. To correct for motion broadening, the present invention shifts each short Doppler spectrum some number of velocity bins before averaging them together. This shifting scales the measured radial velocity at some measured pointing angle to the radial velocity that would have been measured if the antenna was pointing at some initial pointing angle, typically the steering angle if the antenna was level. The wind velocity derived from the average 30 second Doppler spectrum without shifting is used as a first guess. The equations are solved iteratively until spectral width is minimized.

Techniques for measuring wind velocity and direction using so-called Doppler radar are well known in the art. Atlas, U.S. Pat. No. 4,649,388, issued Mar. 10, 1987 and incorporated herein by reference, discloses one such Doppler radar for measuring low level wind shear. The problem of wind shear in aviation is well known, and application of such Doppler radars for measuring and detecting wind shear is well known in the art.
However, such radar systems may also be adapted for other uses as well. For example, measurement of wind velocities and directions at various altitudes may be useful in researching weather patterns, measuring air pollution, and the like. Jordan, U.S. Pat. No. 5,592,171 issued Jan. 7, 1997, and incorporated herein by reference, discloses such a wind profiling radar. The Jordan system provides a method for reducing the amplitude of a radar return signal from the ground and other sources of "clutter"; reflections from the ocean surface, birds, airplanes, and precipitation.
Such systems are also described in Clifford et al., Ground-Based Remote Profiling in Atmospheric Studies: An Overview, PROCEEDINGS OF THE IEEE, Vol. 82, No. 3, March 1994, also incorporated herein by reference.
In some instances, it may be desirable to mount such Doppler radar systems on moving platforms. For example, to measure weather patterns or detect wind shear over an ocean area, it may be desirable to mount a Doppler radar antenna on a ocean buoy or the like. Such a buoy mounting may be desirable to measure movement of pollution over the water, or for detecting wind movement near an ocean- or lake-side airport.
In addition, there may be other applications where a Doppler antenna maybe subject to movement, either intentionally or unintentionally. For example, an antenna may be mounted on a ship or airplane for measuring wind and weather patterns. In the prior art, it is known to provide gimbaled antenna systems for maintaining an antenna in a predetermined position regardless of vehicle movement. However, such antenna systems are cumbersome, expensive and heavy, which may be a disadvantage particularly in small craft (boats) and aircraft.
Moreover, such gimabaling systems may only provide motion compensation for a limited range of movements. In heave seas or other rough conditions or movements (e.g., sudden turn in small boat or airplane) such a system may not be able to compensate, and the antenna may run against the "stops" of the gimbal.
In other applications, it may be intended to maintain an antenna stationary, however, other factors may cause some slight movement in the antenna. For example, a tower-mounted antenna may tend to sway in the wind, introducing artifacts in a received signal.
When operating a wind profiler on a buoy (or any moving platform) motion of the buoy or platform produces spectral broadening. A wind profiler requires about 30 seconds of averaging time to reduce noise variance enough to detect a clear air signal. A buoy, for example, can sway back and forth through several cycles during a 30 second averaging time.
Buoy motion during the averaging time will broaden the clear air peak in the Doppler spectrum causing errors in the measured power (zeroth moment) radial velocity (first moment) and spectral width (second moment). Buoy motion is slow enough that it can be assumed to be negligible for a short time. Unfortunately, the time the buoy position can be assumed to be fixed does not in general allow enough averaging to detect the clear air signal in the Doppler spectrum.

Removing buoy motion from wind profiler moment


A wire insertion tool for a push-in wire connector has a frame and a slide assembly mounted for reciprocating motion on the frame. The frame includes a carriage on which a push-in wire connector is mounted. The slide assembly carries a wire holder which mounts an electric wire opposite the wire connector. An actuator extends to advance the slide assembly and carry a wire in the holder in a direction parallel to the axis of the wire. Advancement of the wire holder inserts the wire into the connector. The wire holder is then released and the slide assembly is retracted to prepare for the next insertion cycle.

Push-in wire connectors are a well-known type of wire connector having an electrically-insulating housing in which a conductive wire retainer is disposed. The housing has two or more openings therein through which the stripped ends of electrical wires can be inserted. The bare ends of the inserted wires engage the wire retainer in the interior of the housing. The wire retainer is often in the form of a spring clip. The spring clip includes spring fingers which are arranged to receive wires pushed into the housing and then grab or hold the wires to prevent them from being pulled out of the housing. The inserted wires are electrically connected to one another by the clip. A variation of this construction is a releasable push-in connector which has a spring finger which can be manipulated by a user to release the inserted wires and allow them to be retracted from the housing. Examples of push-in wire connectors are shown in U.S. Pat. Nos. 4,824,395 and 6,746,286, the disclosures of which are hereby incorporated by reference.
Push-in connectors are an alternative to twist-on wire connectors. In high volume applications push-in connectors may be used as an alternative to twist-on wire connectors in an attempt to avoid possible issues relating to repetitive stress injuries or trauma such as carpal tunnel syndrome. However, in certain situations this effort can be largely futile as the user is simply trading one repetitive motion for another. That is, the pincer-like finger grip of a wire required by the manual use of a push-in connector can be, for those so disposed, as much of a problem as the wrist twisting motion required by manual installation of a twist-on connector.
Another problem with push-in connectors occurs when they are used with stranded wires. Stranded wires have a tendency to buckle as they are inserted into a push-in connector by hand, especially if the user's grip is remote from the end of the wire. Or sometimes if the wire isn't carefully aligned with the housing opening some of the strands may get separated from the bulk of the strands and these individual strands get hung up on the exterior of the housing. For obvious safety reasons this is undesirable.

Wire insertion tool for push-in wire connectors


An apparatus comprising an inflatable vehicle occupant protection device (12) for, when inflated, helping to protect a vehicle occupant in the event of a vehicle collision. The protection device (12) has an inner surface (28) defining a volume (27) into which vehicle inflation fluid is directed to inflate the protection device. A source (14) of inflation fluid is provided which, when actuated, provides inflation fluid for inflating the protection device (12). A catalytic reducing material (50) for reducing components of the inflation fluid is adhered to at least a portion of the inner surface (28) of the protection device (12).

A known vehicle occupant protection system includes a vehicle occupant protection device, such as an air bag, and an inflator which provides inflation fluid to inflate the air bag. The air bag may be made of a gas permeable material and the inflation fluid may contain a quantity of nitrogen oxides (NO.sub.x) . It is desirable to reduce any NO.sub.x in the inflation fluid before the NO.sub.x can pass through the porous material of the air bag.


A layered body with a support substrate, the layered body being on the support substrate and comprising: metal foil B which is arranged on the support substrate and on which a wiring pattern is not formed; an insulating layer B which is arranged on the metal foil B; metal foil C which is arranged on the insulating layer B and on which a wiring pattern is not formed; non-through holes for a product and non-through holes for an alignment mark that penetrate the metal foil C and the insulating layer B and reach the metal foil B; and the alignment mark of a dot pattern in which the non-through holes for the alignment mark are filled by plating and gathered and arranged in an individually independent state.

For a multi-layer wiring substrate on which semiconductor elements are mounted, a multi-layer wiring substrate in which a buildup layer is formed on both surfaces of a core substrate is widely used. Here, the core substrate is a substrate to be a support substrate of the buildup layer, and includes an insulating layer and a wiring pattern on it, and as the insulating layer, generally, a rather rigid layer in which a thermosetting resin such as an epoxy resin is impregnated in a reinforcing material such as glass cloth and cured is used. Also, the buildup layer is a layer that is layered on the wiring pattern of the core substrate and includes an insulating layer and a wiring pattern on it. In recent years, together with thinning of the multi-layer wiring substrate and density increase of the wiring pattern, a multi-layer wiring substrate not including a core substrate has been provided. The multi-layer wiring substrate not including the core substrate (sometimes called a "coreless substrate", hereinafter) has merits that it is easy to be thinned and the wiring pattern can be formed in a high density.
As a method for fabricating such a coreless substrate, a method for fabricating a multi-layer wiring substrate by forming a laminate having a desired number of insulating layers and a wiring pattern on both surfaces of a metal foil clad laminate to be a support substrate, then separating the laminate from the support substrate, and performing subsequent processes to the separated laminate has been devised (see Patent Literatures 1 to 4). Also, a method for fabricating a multi-layer wiring substrate using a support substrate (sometimes called a "dummy core") which is used only in a fabricating process and does not configure the multi-layer wiring substrate itself to be a product in this way is called a coreless method hereinafter.
In the coreless method like this, as a method for forming a non-through hole for an interlayer connection of a multi-layer wiring substrate, a method (conformal method) for providing an opening on metal foil at a laser processing scheduled position, emitting a laser beam aiming at the opening, and processing an insulating layer thereunder with the metal foil as a mask is generally used.

Layered body with support substrate, method for fabricating same, and method for fabricating multi-layer wiring substrate


A system for scalably simulating multiple LTE UE devices includes an LTE multi-UE simulator. The simulator includes a common public radio interface (CPRI) module for receiving downlink data from an evolved node B (eNode B) under test and a downlink signal chain processing module including a common section for performing UE agnostic processing of the downlink data and a UE specific section for performing UE specific processing of the downlink data. The simulator further includes a control digital signal processor (DSP) for receiving the downlink data from the common section of the downlink signal chain processing module, for processing downlink data to obtain control information, and for forwarding the control information to the downlink signal chain processing module. The UE specific portion of the downlink signal chain processing module performs the UE specific processing using the control information.

Mobile communications networks are moving to the LTE standards defined by the Third Generation Partnership Project (3GPP). The LTE physical layer, which provides physical layer communications between user equipment (UE), such as mobile handsets, and evolved node Bs (eNode Bs) is defined in 3GPP TS 36.201 and TSs 36.211-216. The LTE physical layer provides modulation, physical channels, channel coding, and other aspects of physical layer communications between a UE and an eNode B
Before LTE equipment, such as eNode Bs, can be placed into service, the equipment must be tested under operational or simulated operational conditions. For example, in operation, an eNode B is required to handle simultaneous communications from multiple UEs. Accordingly, it is desirable for LTE test equipment to simulate multiple UE devices, including meeting all the timing requirements of the above-referenced LTE physical layer standards.
One particular timing requirement that must be met is the processing of a downlink radio frame in sufficient time for transmission of the corresponding uplink radio frame. In LTE networks, the downlink direction refers to transmission from the eNode B to the UE, and the uplink direction refers to transmission from the UE to the eNode B. The LTE physical layer defines a radio frame that is ten milliseconds in length and has ten subframes of one millisecond each. In the downlink direction, the physical downlink control channel (PDCCH) carries control information referred to as downlink control information or DCI. User data for plural UEs is carried on the physical downlink shared channel (PDSCH). The downlink DCI for subframe n is for the PDSCH data in the same subframe. The uplink DCI on subframe n has scheduling information for the physical uplink shared channel (PUSCH) in subframe n+4. This means that the UE or UE simulator has about four milliseconds from the time of reception of the scheduling information on the downlink signal to begin transmission of the corresponding uplink signal. In order to meet this constraint, the UE or multi-UE simulator needs to complete downlink processing, decode the downlink DCI, send grant information to a higher layer, get the protocol data unit (PDU) segmented from the radio link control (RLC) layer, perform all of the physical layer processing and modulation, and start transmission on the uplink. These and other timing requirements must be performed for each UE being simulated. Accordingly, there exists a need for a scalable architecture for LTE multi-UE simulation.

Scalable architecture for long term evolution (LTE) multiple user equipment (multi-UE) simulation


An improved regenerated cellulose membrane formed by ester-bonding an organic carboxylic acid or a functional derivative thereof to a polymeric membrane composed of a regenerated cellulose. This regenerated cellulose membrane exhibits an improved blood compatibility without lowering the dialysis performances of a regenerated cellulose membrane.

(1) Field of the Invention
The present invention relates to an improved regenerated cellulose membrane to be used for an artificial organ and the like and a process for the preparation thereof. More particularly, the present invention relates to a regenerated cellulose membrane having an improved blood compatibility, and a process for the preparation thereof.
(2) Description of the Related Art
Recently, rapid progress has been made in the development of artificial organs such as an artificial kidney and an artificial lung, and in a plasma-separating apparatus and as is well-known, especially in hemodialysis therapy, a regenerated cellulose membrane, particularly a cuprammonium regenerated cellulose membrane, is widely used. Together with the development of dialysis apparatuses or dialysis techniques, the regenerated cellulose membrane has made great contributions to the survival and rehabilitation of patients with end-stage renal disease. This importance of the regenerated cellulose membrane is due to the excellent dialysis performance, high mechanical strength, and high safety level thereof obtained in practical use over many years.
Nevertheless, in spite of the progress made in hemodialysis therapy, many problems concerning the dialysis still remain. For example, the problem of a side effect stemming from a long-period administration of a large quantity of an anti-coagulant and as has been pointed out, if hemodialysis using a regenerated cellulose membrane or a certain other kinds membrane is carried out, a transient reduction of leukocytes or activation of the complement occurs. The relationship between the latter phenomena and the clinical symptoms, or the clinical significance, has not been clarified, but there is obviously a need to provide a regenerated cellulose membrane capable of moderating these phenomena without an adverse affect on the excellent dialysis performances of the regenerated cellulose membrane mentioned above.
Membranes composed of synthetic polymers have been proposed to moderate the above problems or phenomena, but these membranes themselves have problems in that they have a poor mechanical strength and is very susceptible to the formation of pinholes, it is difficult to sterilize because of a low heat resistance, and is difficult to apply because the properties thereof are not well-balanced, that is, a good balance cannot be maintained between the amount of water permeability and the amount of substance permeability.
Various methods have been proposed for improving the blood compatibility in regenerated cellulose membranes. For example, U.S. Pat. No. 3,616,935 proposes a method in which the surface of a membrane is modified with heparin to impart an anti-thrombus property to the membrane. However, the effect attained is not satisfactory and the cost is high. Another method has been proposed in which the surface of a regenerated cellulose membrane is coated with a polymer or a vitamin. However, the coating stability is unsatisfactory or sterilization is difficult. European Patent No. 155,534 proposes a method in which a regenerated cellulose membrane is reacted with an isocyanate prepolymer, and DE 334,113 proposes a method in which a polymer acid is chemically bonded to a regenerated cellulose membrane through a bridging agent. These methods, however, are unsatisfactory in that the reactants have a poor stability and the reaction steps are complicated. European Patent No. 172,437 (U.S. Pat. No. 4,668,396) proposes a dialysis membrane formed by using a modified cellulose such as diethylaminoethyl cellulose. However, the improvement in the effect of moderating the coagulation of blood is not satisfactory.

Regenerated cellulose membrane and processes for preparation thereof


A method and apparatus for waterproofing game birds is provided. The game birds are sprayed with a waterproofing composition in amounts that prevent excessive water absorption by the feathers of the birds in wet weather, while still permitting the game birds to fly.

Hunting clubs and resorts have become a popular diversion for many Americans. These clubs and resorts provide a gathering spot for hunters to allow them to hunt for specific game. Game birds are a popular choice for hunting at these clubs and resorts. Due to the number of hunts that occur each year, a wild population of game birds such as quail, pheasant, chukar, partridge, grouse, ducks, etc., that would normally reside on the clubs or resorts grounds cannot support these hunts and still survive and/or thrive. For this reason, pen-raised birds are often let loose on the day of the hunt at specific locations to ensure a successful hunt for the clubs' or resorts' paying members. In practice, the hunters that are going out each day select a specific number of these pen-raised birds and pay a specified price for each bird to be placed out in the field in which they will hunt.
During wet weather, problems arise with hunts of pen-raised birds. The pen-raised birds often become waterlogged in rainy weather. On wet days, the birds may be prevented from flying due to the moisture matting their feathers down on their wings as well as the excess weight added by the absorption of the water into the feathers. Rainy day hunts may often have to be cancelled due to the fact that these birds cannot fly. It is estimated that a single hunting club or hunting resort may lose over $100,000 a year because of missed hunts due to rainy and damp weather.

Apparatus and method for waterproofing game birds


A routing address representing an alternative terminal is assigned to a particular service area. Such a service area comprises a Local Access and Transport Area (LATA), Mobile Switching Center (MSC) area, Location Area, and Cell Area. Whenever an incoming call is received towards a mobile station currently located within the particular service area, instead of transmitting a routing address representing the mobile station, the serving mobile switching center (MSC) transmits a signal containing the routing address representing the alternative terminal. Instead of routing the call to the intended mobile station, the gateway mobile switching center (GMSC) utilizes the received routing address and reroutes the incoming call to the alternative terminal. By rerouting all incoming calls towards the alternative terminal in case of an emergency, all available access channels are reserved for making outgoing calls by the mobile subscribers located within the emergency service area.

1. Technical Field of the Invention
The present invention relates to a mobile telecommunications system and, in particular, to providing different terminating call treatments to an incoming call based on the called mobile station's service area.
2. Description of Related Art
It is well known to provide different terminating call treatments for incoming calls within a telecommunications system. For example, an incoming call intended for a particular subscriber can be forwarded to the subscriber's designated forward-to-number, announcement machine, or answering machine. Furthermore, depending on the directory number associated with the caller, the incoming call may also be selectively screened and rejected. The intended subscriber may also receive a different ring signal depending on the category or the directory number of the incoming caller.
These different terminating call treatments are assigned and provided per each subscriber or subscriber group. For example, a telecommunications subscriber has to have a subscription agreement with his service provider for rerouting incoming calls to a specified forward-to-number. Such a subscription service includes Call Forwarding Don't Answer (CFDA), Call Forwarding Busy (CFB), Call Forwarding Variable (CFV), etc.
Unlike wireline telecommunications systems, mobile telecommunications systems have a limited number of channels available for providing mobile service to mobile subscribers within a particular service area. Some times, especially during peak service utilization, mobile subscribers are often unable to access mobile telecommunications service because all channels are being used. In a normal situation, this is not a problem for a mobile subscriber and the serving mobile telecommunications network. The mobile subscriber merely receives a congestion tone indicating that all access channels are currently being utilized and that another attempt should be made later.
In case of an emergency, however, such a lack of service due to congestion is undesirable, and it would be desirable to leave certain access channels available to enable mobile subscribers to make outgoing emergency or high priority calls.
An illustration of such an emergency situation is an earthquake or major civil unrest covering a particular mobile service area. In those situations, all of the mobile stations located within the particular mobile service area are affected and, as a result, the serving mobile telecommunications network provider would like to remain open the radio channels to enable the mobile subscribers to make outgoing emergency or high priority calls. Incoming calls terminating to the particular mobile service area during the emergency, however, could undesirably seize these certain channels. For example, when loved ones of mobile subscribers are informed of the emergency situation, a higher number of incoming calls tend to be generated to determine the safety of the subscribers. It would be advantageous if control could be exercised while terminating such incoming calls towards the service area covering the emergency situation.
The control over the termination of incoming calls may be of some benefit in other situations as well. Such a situation is where there is a major convention or meeting being held in a particular area. Preventing the termination of incoming calls to this particular area is necessary so that sensitive proceedings will not be disturbed. In other words, a "quiet" zone is desirable within this area. If a call attempts to terminate to this area, it would be desirable to reroute, for instance, to an operator or an announcement machine.

Method and apparatus for providing different terminating call treatments based on service area


There is provided a disk device that prevents entering of foreign matters, and that forms an opening/closing lid using an inclined surface of a front wall so that the disk device has a design according to which the thickness is not noticeable. A front wall 1a of an outer case 1 includes an inclined surface whose front part is inclined downward. An opening portion 1b is provided to the front wall 1a of the outer case 1, and a lid 2 that covers the opening portion 1b while allowing it to be opened or closed is provided. The lid 2 is configured to move, by rotating about a rotation shaft provided in a direction crossing a disk conveyance direction, between a closed lid position 2A in which the lid is flush with the inclined surface such that a disk insertion opening 1c is not exposed to the outside and an open lid position 2B in which the disk insertion opening 1c is exposed to the outside and a disk 200 is guided to the disk insertion opening 1c.

Conventionally, this type of disk device is normally configured to have a disk directly inserted into a casing through a disk insertion opening provided at a front surface of the casing (an outer casing). The disk which has been inserted through the disk insertion opening is loaded to a replayable position by a disk conveyance mechanism including a roller and the like.
With this type of disk device, since the disk insertion opening is exposed to the outside, foreign matters such as dust may enter the casing through the disk insertion opening. As a configuration for preventing entering of foreign matters, those disclosed in Patent Document 1 (JP 2010-55670 A), Patent Document 2 (JP 9-180332 A), and Patent Document 3 (JP 9-35464 A) are known, for example.
Patent Document 1 discloses a disk device having, attached to a disk insertion opening, a substantially anti-dust member which is provided with a slit through which a disk may be inserted. Also, the disk device of Patent Document 1 is configured such that after a disk has passed through the slit of the substantially anti-dust member, a lid provided on the inner side of the device than the substantially anti-dust member is rotated and the disk insertion opening is closed.
Also, Patent Document 2 discloses a disk device configured to include a front panel arranged in front of a disk insertion opening, where the disk insertion opening is opened or closed by the raising or lowering the front panel. Furthermore, the disk device of Patent Document 2 includes a protruding guide plate, provided so as to eliminate the difference in height between an upper portion of the front panel and the disk insertion opening in a state where the disk insertion opening is opened by the lowering of the front panel, for making insertion or ejection of a disk into or from the disk insertion opening smooth.
Furthermore, Patent Document 3 discloses a disk device configured to open or close a disk insertion opening by rotating a rotating-sliding lid. The disk device of Patent Document 3 includes a guide surface portion for guiding a disk to the disk insertion opening, and also, includes an auxiliary guide surface portion at a part of the lid for opening or closing the disk insertion opening, and when the disk insertion opening is opened, a disk may be guided to the disk insertion opening by a wide surface including the auxiliary guide surface portion of the lid and the guide surface portion.

Disk drive having a rotatable lid and a disk insertion opening


The process comprises the following steps: calculating, for an image, a depth map corresponding to the depth, in the three-dimensional space, of image pixels; calculating, for an image, a resolution map corresponding to the three-dimensional resolution of the image pixels, based on the depth map; matching a current image pixel with a pixel of another image of the sequence, pixels relating to a common point in the three-dimensional scene, by projecting the current image pixel onto the other image; selecting a current image pixel according to its resolution and to that of the pixels of the sequence matched with this said pixel; constructing the three-dimensional model from the selected pixels. One application concerns the generation of images for browsing.

1. Field of the Invention
The invention relates to a process for constructing a 3D scene model by analysing image sequences.
The domain is that of the processing of image sequences and the modelling of real static scenes in a navigation context. The sequence consists of images relating to static scenes within which the viewpoint, that is to say the camera, changes.
The objective is to allow a user to navigate virtually in a real scene. However, the data regarding the scene consist of image sequences which may represent an enormous quantity of information. These sequences must be processed in such a way as to provide, a compact representation of the scene, which can be used in an optimal manner for navigation, that is to say allows interactive rendition, with controlled image quality. The problem is to obtain a high rate of compression whilst avoiding the techniques of inter-image predictive type which are not suited to navigation.
2. Description of Prior Art
Various representations of scenes currently exist. It is possible to distinguish mainly:                representations based on 3D models, in which the geometry of the scene is generally represented in the form of plane facets with which texture images are associated. This modelling is much used to represent synthetic scenes obtained via software of the CAD (computer aided design) type. On the other hand, it is still little used to represent real scenes, since it is complex. The current methods use few images, generally photographs, and the resulting representations are not very detailed and lack realism.        non-3D representations obtained for example on the basis of the QuickTime VR software (Trademark of the Apple company). The data of the scene are acquired in the form of panoramic shots with transition image sequences for switching from one panoramic shot to another. Such a representation considerably limits the possibilities of navigation in the virtual scene.

Method for building a three-dimensional scene by analyzing a sequence of images


The present invention features a system for uniformly distributing luminance and a high degree of collimation from a back light module for flat-panel, liquid crystal displays (LCDs) simultaneously. A constant and uniform luminance output of the back light module in two directions is obtained through appropriate selection of lamps, geometry and optical components. An appropriate balance of lamps, lamp spacing, diffusers and light collimating optics are chosen to produce a high brightness back light module with very high intensity output over two very large surfaces. Variations in intensity over the illuminated area are minimized using light recycling in conjunction with the reflective diffusers and collimating optics. Precision collimators eliminate light beyond a defined angle, as required in tiled or monolithic flat-panel LCDs with predetermined display specifications.

Flat-panel displays (FPDs) made in accordance with known active matrix (e.g., TFT, etc.) liquid crystal display technologies (e.g., AMLCD) are typically mounted in front of a back light module which contains an array of fluorescent lamps. AMLCD flat-panel displays of this type have been increasing in size by about 1 to 2 inches diagonal, yearly. The median size in 1999 for use in desktop PCs was about 15 inches diagonal viewing area. A few very large displays are made in the range of 20 to 28 inches diagonal. Tiled AMLCD FPDs may be made in the range of 40 inches diagonal, as described in copending U.S. patent applications Ser. Nos. 09/368,921 (now U.S. Pat. No. 6,657,698) and 09/490,776 (now U.S. Pat. No. 6,680,761). Tiled FPDs, as described in U.S. Pat. No. 5,661,531, require extremely intense back light sources with highly collimated light, masked optical stacks, and pixel apertures that may have low emitted light efficiency. Thus, lighting with unusually high intensity ranges of 50,000 to 150,000 nits is desirable. Also, intensity uniformity over the very large areas of tiled FPDs is very important. Unique back light designs, including temperature control features, are necessary to achieve such high intensities at reasonable power consumption.
Maintaining bright (i.e., high intensity) and uniform illumination of the display over its entire active area is difficult to do. The intensity required for some applications and, in particular, that required for large, tiled, seamless flat-panel LCD displays, causes the lamps to produce a significant amount of heat. In addition, since fluorescent lamps are designed to run most efficiently at an elevated temperature, it is desirable to operate them at or near their ideal design temperature, which is usually about 50 to 60 degrees Centigrade.
Small, edge-lit back light modules, such as those used in notebook or laptop PCs, do not produce sufficient brightness for use in a large area display, nor are they capable of illuminating that large an area uniformly. Thus, it is necessary preferable to illuminate these larger areas with an array of large fluorescent lamps. The number of lamps required depends on the size of the area to be illuminated and the display brightness requirements. A large area display generally requires multiple lamps to illuminate it properly. A large area display that can be viewed from two sides (i.e., a back-to-back display) requires proportionally more lamps, as well as unique design features to achieve the desired intensities and maintain optimized lamp efficiency through temperature control of the lamps.
Since most displays are designed to be wider than they are tall, it is advantageous, from a reliability and power perspective, to place the lamps in a horizontal orientation. This typically results in the use of fewer lamps and, consequently, lower power consumption, since fewer lamp cathodes are present. The resulting preferred designs orient lamp tubes horizontally, one above the other with predetermined, preferred spacing relationships to each other and to each of the back-to-back displays, one disposed on each side of the lamp array.
It is, therefore, a principal object of the invention to provide a back light module designed to illuminate back-to-back displays.
It is an additional object of the invention to provide a back light module for use with large flat panel displays, either monolithic or tiled.
It is another object of the invention to provide a back light module designed to provide a high intensity light output.
It is a further object of the invention to provide a back light module capable of delivering highly collimated light.
It is an additional object of the invention to provide a back light module having a very high operating efficiency.
It is a still further object of the invention to provide a back light module having a cooling structure to maintain a substantially uniform operating temperature.
It is yet another object of the invention to provide a back light module utilizing an array of horizontally-mounted fluorescent tubes.
It is an additional object of the invention to provide a back light module incorporating a cavity to maximize and control light recirculation.
It is another object of the invention to provide a back light assembly incorporating diffusers, collimators and brightness-enhancing films (BEFs).
It is a further object of the invention to provide a back light assembly suitable for illuminating large, back-to-back, tiled flat-panel displays having visually imperceptible seams.

Back light assembly for use with back-to-back flat-panel displays


A circuit board with embedded components includes an inner layer board, electronic component disposed in the inner layer circuit board, and third to sixth conductive circuit layers. The third and fourth conductive circuit layers are on opposite surfaces of the inner circuit board through first and second adhesive layers. The third conductive circuit layer and the fourth conductive circuit layer are electrically connected to the first conductive circuit layer and the second conductive circuit layer.

Electronic products usually include circuit boards and a volume of the electronic product must be large enough to contain the board. Electronic components (such as resistors, capacitors, etc.) can be embedded in inside of the circuit board to reduce a thickness of the circuit board, thereby reducing a thickness of the electronic product. Generally, a method of making embedded circuit board includes steps of making a multi-layer flexible board having no circuit, opening holes in a multi-layer flexible board, and applying glue. An electronic component is placed in the hole through the glue, then a circuit layer board is pressed on the multi-layer flexible board. The glue is peeled off and another circuit layer board is pressed down. The above method of making the embedded circuit board includes making the multi-layer flexible board before opening holes and the electronic component is attached to the glue to cause the component to deviate from the center line of the embedded circuit board. In opening blind holes, there is a problem about a thickness difference of the electronic component relative to the multi-layer flexible board. Residual glue left during this method can affect a reliability of the embedded circuit board.

Printed circuit board with embedded components for electronic device and method for making the same

HongQiSheng Precision Electronics (QinHuangDao) Co., Ltd.


Generating a storage interface includes receiving a request for documents, detecting an accounting workflow type corresponding to request, and identifying a document organizational structure matching the accounting workflow type. Further, a virtual storage interface is built using an index on the documents and according to the document organizational structure, and presented.

Computing systems provide various computing functionality for users. One example of the functionality is in the storage and manipulation of files. At the hardware level, each document is partitioned into segments and each segment is stored into contiguous regions of a physical storage device. The operating system hides the hardware locations of the storage of documents by showing a file system interface. The file system interface is a static hierarchy of documents. The operating system stores specific identifiers of each folder and the contents of each folder in the hierarchy.


The machine includes: a bending head movable with at least two degrees of freedom in a transverse vertical plane; a first drive is arranged to move the bending head in the plane and to move a tool of the bending head between an open position, in which it defines with a die of the bending head a free space adapted to receive a tube to be bent, and a closed position, in which it clamps the tube against the die. A tube-carrying structure is rotatable about an axis of rotation perpendicular to the plane; a second drive is arranged to cause the tube-carrying structure to rotate about its own axis of rotation; and an electronic control unit is arranged to control the first and second drives so as to move the bending head and the tube-carrying structure in a position such that the tube is received with a desired orientation in the free space between the die and the tool.

The present invention relates to a tube bending machine comprising a bending head and an automatic loading system arranged to load a tube to be bent on the bending head. According to a further aspect, the present invention relates to a method for automatic loading of tubes on the bending head of a tube bending machine.
The term "tube" used in the following description and claims is to be intended as referring also to any other elongated blank, such as a bar or a profiled section. Likewise, the term "tube bending machine" is to be intended as referring also to a machine arranged to bend any other elongated blank, such as a bar or a profiled section.
Different kinds of automatic loading systems for tube bending machines are available on the market and in their simplest and cheapest form basically consist of an inclined plane on which the tube to be bent is caused to slide, the inclined plane being provided with stop members to stop the tube to be bent. The tube bending machines provided with such automatic loading systems are able to take a tube positioned on the inclined plane and to put down the worked tube on the ground by suitable control of the machine axes. In these tube bending machines, the position of the tube on the inclined plane is known in a transverse vertical plane (i.e. in a vertical plane perpendicular to the tube feed direction, or longitudinal direction), whereby the control unit of the machine is able to determine, on the base of suitable geometrical parameters of the machine, of the tube and of the inclined plane, the exact point where to position a loading tool (which may be either the bending tool normally present on the bending head of the machine or a tool specially designed for this purpose) to take the tube from the inclined plane. The tube is then made available to the bending head in an initial position, for instance the stop position at the bottom of the inclined plane defined by the aforesaid stop members, and is then moved by the bending head directly from this initial position to a final position where it can be clamped by a tube clamp or similar clamping member carried by the machine body. The automatic loading systems for tube bending machines currently available work well with tubes of circular cross-section, but not so well with tubes of non-circular cross-section. In case of tubes of non-circular cross-section, there is in fact the problem of properly orienting the tube relative to the loading tool in order to avoid damages to the tube resulting from the tube being clamped with a wrong orientation between the jaws of the loading tool or between the bending tool and the die. In order to avoid this problem, the automatic loading systems currently available on the market require a specific loading tool which can be oriented manually or a specific loading fixture designed so as to have exactly the same angle as the one existing between the loading tool and the axis of the tube to be loaded, which obviously involves problems in terms of time and costs for setting and mounting.

Tube bending machine with an automatic loading system and method for automatic loading of tubes on the bending head of a tube bending machine


A door stop assembly adapted for introduction into the space between the lower edge of a door and the adjacent floor surface. It has a wedge shaped block whose top surface and bottom surface are oriented toward each other at an acute angle. A flat strip of spring steel has a top leg and a bottom leg that are bent back upon each other in an acute angle. The bottom leg is secured to the bottom surface of the wedge shaped block. The too leg of the spring has a slightly concave curvature that spaces its bottom surface from the top surface of the wedge shaped lock so that any pressure applied to the top surface of the top leg member adjacent its front end will transfer all that pressure directly to the rear edge of the top leg member and force it downwardly against the top surface of the wedge shaped block. There is also structure secured to the bottom surface of the wedge shaped block for preventing it from sliding with respect to a support surface upon which it would be placed adjacent the bottom edge of a door.

The present invention relates generally to a new and novel door security device. More particularly, it relates to a portable security door stop assembly which can be utilized to resist entry of, for example, intruders and other unauthorized individuals.
The idea of a security device for a door to resist entry by unauthorized individuals is well known. Prior art devices have included a variety of door latching mechanisms permanently attached to, or built in the door. Examples of these devices include traditional dead bolt locks, sliding bolt locks and chain locks. Generally, the devices known in the prior art have several disadvantages. Many of these devices have to be integrally installed as part of the door, as is the case of traditional dead bolt locks. Such installations make the removal and transfer of such devices from one door to another very difficult. Other door latching mechanisms are installed onto the door and/or the surrounding frame by means of fasteners, such as screws or nails, as in the case of sliding bolt locks and chain locks. With these devices the strength of the fastener used often limits the amount of force the door latch mechanism can withstand. These devices also require special tools for installation and removal and are time consuming to move from one door to another. Generally, these devices require that the door be closed or substantially closed for the security device to be operative. Thus, if it is desirable to leave the door partially open, for example to provide ventilation, the security device may be inoperative.
Another concern with traditional door latching mechanisms is that they are often operated by a key or other implement. Thus, authorized individuals must have the appropriate key or implement readily available to unlock, or often lock, such devices. Further, the key or implement may come into the possession of unauthorized individuals, who may utilize the key for unauthorized entry through the door. This risk is particularly great in the case of apartments, and motel or hotel rooms, where numerous individuals have had access and possession of the key or implement to the door latching mechanism.
Other prior art devices have utilized various generally wedged-shaped components to secure a door. Examples of these prior art devices can be seen in U.S. Pat. No. 804,585 to Depue, U.S. Pat. No. 943,791 to Russell, U.S. Pat. No. 1,676,284 to Powell, U.S. Pat. No. 1,939,402 to Moser, U.S. Pat. No. 2,459,070 to Gard, and U.S. Pat. No. 4,230,353 to Bjorgum. Such devices have several disadvantages. Since primary contact between the inclined surface of the wedge and the bottom edge of the door is maintained only along a line contact, a minimum amount of surface area contact is available to resist the force of, for example, an unauthorized individual attempting to push the door open. Further if the distance between the floor and the bottom of the door exceeds the height of the wedge, such devices will not engage and secure the door. Also, many existing wedges cannot maintain their position without sliding rearwardly due to an excessive amount of force being applied to the door by someone trying to push it open. Also, wedge-shaped devices are normally somewhat bulky and thus would require additional storage space if utilized, by, for example, a traveler in a motel or hotel.
It is an object of the invention to provide a novel door stop assembly that is light weight, compact and can be easily carried in a traveler's suitcase.
It is also an object of the invention to provide a novel door stop assembly that has a unique structure on its bottom surface for preventing it from sliding with respect to a support surface upon which it would be placed adjacent the bottom edge of a door.
It is another object of the invention to provide a novel door stop assembly that is economical to manufacture and market.
It is an additional object of the invention to provide a novel door stop assembly that has unique structure such that any pressure applied to the top surface of the spring steel member adjacent the front end of the wedge block will transfer all of that pressure directly to the rear edge of the top leg member of the spring and force the rear edge of the spring downwardly against the top surface of the wedge shaped member.
It is a further object of the invention to provide a novel door stop assembly that has an adapter pad that can be installed on smooth, slippery surfaces such as tile or linoleum to function in coordination with the door stop assembly.