Provided are a method for producing a glass suitable for an information recording medium required to have high qualities, a process for the production of a glass substrate blank from the above glass and a process for the production of a glass substrate from the above blank. The method is for the production of a glass containing an alkali metal element by melting a glass material in a glass melting apparatus and uses, as said melting apparatus, a melting apparatus whose glass-contact portion is made of a material containing zirconium and containing substantially no alkali metal element. In the process for the production of a glass substrate blank, the glass obtained by the above method is press-molded or is subjected to a float process, and in the process for the production of a glass substrate, the above glass substrate blank is lapped and polished.

1. Field of the Invention
The present invention relates to a method for the production of a glass suitable for an information recording medium that is required to have high qualities, a process for the production of a glass substrate blank and a glass substrate from the glass obtained by the above production method, an information recording medium to which the above glass substrate is applied, and a glass melting apparatus for use in the above glass production method.
2. Prior Art of the Invention
Generally, as a material for a glass-contact-portion of a glass melting apparatus (to be sometimes referred to as "furnace material" hereinafter), an AZS (Al2O3—ZrO2—SiO2-containing) electrocast refractory material is used for a high-temperature portion and an alumina-containing electrocast refractory material is used for a relatively low-temperature portion. These furnace materials are desired for reasons that they cause less contamination to a glass and causes foaming to a less degree. For example, these materials are used in a glass-contact-portion of a melting apparatus for soda lime glass, a glass for CRT, an optical glass and a glass for electronic devices. For the same reason, it is considered desirable to use an AZS electrocast refractory material as a furnace material in a glass-contact portion for a glass as a material for a substrate of an information recording medium such as a glass substrate for a magnetic disk.
Meanwhile, it has been mainstream practice to use an aluminum substrate as a substrate for a conventional magnetic disk. With increasing demands for a higher density of a magnetic disk, the substrate material for the magnetic disk is shifting from an aluminum material to a glass material since the glass material has a high Young's modulus and can easily accomplish the flatness of a disk surface. Further, with an increase in the density of a magnetic disk, the distance between a recording medium and a write/read head decreases markedly. These days, the above distance is as close as a distance of approximately a few molecules arranged side by side. In operation of a magnetic disk, it is required to turn the disk several thousand times a second while maintaining the above fine distance as a distance between the head and the disk. The above state is something like a state in which a large jetliner flies tens centimeters above a ground without colliding with any obstacle, and the fact is that the surface of a substrate for an information recording medium is required to be free of any fine projection.
One of the substrate surface defects that hamper the above higher-density recording is a ZrO2 mound problem. It is assumed that the ZrO2 mound is caused as follows. ZrO2 has a higher hardness than glass. When the surface of a glass substrate containing ZrO2 particles is polished, the ZrO2 particles present in the surface decrease slowly and the glass decreases rapidly. As a result, ZrO2 particles present in the surface come to appear as fine projections on the substrate surface. These fine projections are zirconia mounds, and when the projections are present, forms of such projections are reflected on the surface of a recording medium and the projections cause a head crash that is a collision of a head with the surface of the magnetic disk. In high-density recording media provided these days, even the presence of only one fine ZrO2 mound causes the recording media to be defective. When a glass as a material for a substrate for an information recording medium is melted, therefore, it is required to perfectly prevent the inclusion of ZrO2 particles.
There are large glass demands in the above field, and under the circumstances, such demands can be fulfilled only when glass is mass-produced. There is therefore required a technique for stably producing a large amount of a glass containing no ZrO2 particles.
When a glass as a material for a substrate of the above information recording medium is melted in a glass melting apparatus made of an AZS electrocast refractory material, the ZrO2 mound problem is liable to be caused. It has been considered that the above problem is caused as follows. When the ZrO2 content in a glass is large, for example, 5% by weight or more, ZrO2 cannot be melted well, so that a non-melted substance of ZrO2 is liable to be generated. Therefore, attention has been paid only to the content of ZrO2, and no attention has been paid to the relationship between a melting apparatus and the generation of a ZrO2 crystal. Under the circumstances, it has been impossible to obtain a large amount of glass substrates that contain no ZrO2 crystal grains and are free of ZrO2 mounds.

Methods for the production of glass substrate blank


A drive circuit apparatus for use in generating a drive signal for energizing an actuator about a natural resonant frequency is disclosed. The circuit has a counter that generates a count sequence derived from a drive sense signal. Additionally, a demodulator is further coupled to the counter and generates a voltage level signal from the drive sense signal based on the count sequence. A digital to analog (D/A) converter is coupled to both the counter and demodulator. The D/A converter generates the drive signal in a substantially constant phase relationship with respect to the drive sense signal as derived from the voltage level signal and based on the count sequence. In addition, a method of generating a drive signal for energizing an actuator about a natural resonant frequency is provided.

Instrumentation sensors operating on a principle of vibration of constrained actuator masses are known in the art. Unlike gyroscopic instrumentation sensors, these sensors require no rotating parts. Vibrating actuator masses may take a number of different configurations such as forks, bars, plates, rings, or cups using piezoelectric or electromagnetic operation.
The principle of operation underlying vibratory mass instrumentation sensors is relatively simple. If the mass is vibrated or maintained in oscillation along the same direction as its guiding structural constraint, the mass will not apply any force (other than its own weight) in a direction transverse to the guide. This remains true so long as the guide structure maintains a constant orientation in space. However, if a guide is forced to rotate about an axis at right angles to itself, the oscillating member will apply alternating or pulsating forces to the guide structure. In this case, the average magnitude of the force will be proportional to the angular velocity of the forced rotation. Such forces can be measured by sensors such as piezoelectric structures. The forces exerted by the oscillating actuator mass on the sensor structure causes measurable electrical potential signals to be developed on the faces of the sensor structure. These signals can then be measured and calibrated to the rate of turn of the sensor instrument.
A drive circuit is required for such vibratory mass instrumentation systems. The drive circuit establishes and maintains the vibrating or oscillatory state of the actuator mass at an optimum level throughout the operative period of the instrument. Generally in such instrumentation, it is most desirable to vibrate the actuator mass at the natural resonance of the desired oscillatory mode. However, there are several resonant modes that may be close in frequency to the desired mode in most configurations. The usual means of allowing only one frequency of oscillation to be driven is to include a phase locked loop in the drive circuit. The phase locked loop serves as a bandpass filter with a substantially constant phase relationship to the sensed drive motion. The typical phase locked loop is digital in nature and will provide a square wave output. This square wave drive signal is rich in higher harmonics and will excite higher frequency resonant modes, which will interfere with the desired oscillatory mode.
Early designs of drive circuits commonly used square wave signals at adjustable frequencies based on the sensed drive signal. This caused transitional current or voltage spikes in the control signal that could not be adequately suppressed through conventional filtering techniques. These were subsequently abandoned for the more smooth transition of triangular or sinusoidal drive signals. Additionally, improved mass structures such as monolithic crystals and subsequent cup-style oscillator gyros have led to improvements in minimizing the differences between the drive element and the sensing element.
Commonly applied designs known in the art provide the drive circuit feedback signal by using a phase locked loop to generate the oscillations from the drive sense signal. This oscillation signal is further processed by a wave shaping device such as a switched integrator, providing a triangular shaped drive signal. Although this method provides improved transitions between oscillations, there is still a significant chance of generating harmonics resulting in unwanted vibrations in the drive mechanism. Subsequent filtering techniques tend to add complexity, and cost to the design and are not very effective at eliminating the harmonics. Therefore, a need exists for an electronic circuit that can generate a smooth oscillatory drive signal from the drive sense signal while maintaining substantially the same phase relationship. In addition such a circuit should have relatively low complexity and low cost.
The present invention provides a solution to this and other problems known in the art, and offers other advantages over the prior art.

AGC circuit for the reduction of harmonics in the drive signal


A bumper and front rail assembly includes first and second front rails with a steel cross-member extending therebetween. The steel cross-member has a substantially U-shaped cross-section. A steel forward member is secured to the cross-member and spans the length thereof. The forward member is configured to act as a spring for elastic deformation against the cross-member in a low energy impact. First and second steel crush cans are disposed in the cross-member adjacent the first and second front rails, respectively. The crush cans are configured for improved energy management.

Typically, vehicle bumpers comprise a primarily plastic and/or steel construction designed for elastic deformation up to a 5 mile per hour impact. These bumpers are typically not of sufficient structural integrity to dissipate substantial energy in a high energy impact, i.e., an impact above 5 mph and up to 40 mph. Accordingly, since such bumper systems are typically 4-6 inches in depth, this 4-6 inches is wasted length which could be used for energy management. Also, such bumpers typically have insufficient structural integrity to generate a deceleration pulse significant enough to be sensed by a vehicle deceleration sensor for airbag deployment.
Another shortcoming of such bumpers is that offset frontal impacts create an energy pulse which is absorbed almost entirely in one of the front rails, and the energy management characteristics of the opposing front rail is not utilized.
Accordingly, it is desirable to provide a bumper and front rail assembly for a vehicle which deforms elastically in a low energy impact (less than 5 miles per hour), and absorbs a greater amount of energy in a high energy or high velocity impact in a manner sufficient to create a deceleration pulse which may be sensed for deployment of an airbag. It is further desirable to create a bumper and front rail assembly for a vehicle in which both front rails are used to dissipate energy in an offset frontal impact.

Bumper and front rail assembly for vehicle


An electrical connector assembly (100) includes a securing box (3) and a electrical connector (2). The securing box (3) includes a box portion (31) for receiving the electrical connector (2). The electrical connector (2) includes an insulative housing (20), a number of terminals (21) retained in the insulative housing (20) and a metallic cover (22) covering the insulative housing (20). The metallic cover (22) includes a pair of cantilever arm (225) extending forwardly and outwardly from two sides thereof. The box portion (31) includes corresponding an extraction slot (317) and a locating slot (314) for receiving the cantilever arm (225), the extraction slot is used to remove the electrical connector by a tool inserted thereof and therefore, the electrical connector (100) can be easily assembled or replaced from an electronic equipment.

1. Field of the Invention
The present invention relates generally to an electrical connector assembly, and more particularly to an electrical connector assembly to be easily assembled on a printed circuit board (PCB) and/or replaced from the PCB.
2. Description of Related Arts
Universal Serial Bus (USB) interfaces are widely used in various electronic devices. In recent years, a micro USB interface is introduced to meet miniaturization requirement of electronic devices. Taiwan Utility Model No. M385114 discloses an electrical connector comprising an insulative cover and a connecting module. The insulative cover includes an upper surface, a lower surface faced to the upper surface, and a pair of side surfaces for cooperatively defining a receiving room. The receiving room has a contacting opening for insertion of a plug connector. The upper surface faces a PCB. The connecting module is received in the receiving room. The connecting module includes an insulative housing, a number of contact terminals, and a grounding contact. The contact terminals and the grounding contact are all fixed with the insulative housing by insert-molding. Each of the contact terminals and the grounding contact has a contacting part flexibly connecting with the PCB without soldering. The connecting module can be separated from the insulative cover, but the electrical connector is difficult to be assembled on the PCB and thus difficult to be replaced.
An electrical connector assembly that can be assembled on the PCB easily and replaced from the PCB easily is desired.

Electrical connector assembly with improved metallic cover


The invention provides, in a first embodiment, a blocking wax composition. The blocking wax comprises from about 50 to about 90 weight percent of a water-soluble continuous phase and from about 10 to about 50 weight percent of a discontinuous solid phase filler that is substantially inert to the continuous phase. The invention further provides a method for mounting a contact lens blank for machining.

One common method of manufacturing contact lenses is lathing the lens from a cylindrical contact lens button. Contact lens buttons may be cut from rod stock or sheet material, or individually cast in cups using a curable liquid monomer. While it is possible to attach the button directly to the lathe chuck, this is not commonly done when cutting the front curve of the lens since the chuck of the lathe machine uses radial compression to hold the work piece in place for lathing, and as such could impart damaging forces to the optical characteristics of the button. The base curve, on the other hand, may be cut by chucking the button or by adhesively mounting the button as described below.
For lathing the front curve and/or the base curve, the button is commonly mounted to one end of a separate metal pin, also referred to as a "block" or "mandrel", the opposite end of the block being configured as a spindle for removable insertion into the chuck of the lathe. The button is typically adhered to the block with an adhesive or special type of wax called "blocking wax" in the art. While the block and button are turned, a concave (or "base") curve is lathed into the exposed end of the button opposite the adhered end. While still attached to the chuck and rotating, a second "ledge" cut may be made in the outer cylindrical surface of the button for facilitating subsequent alignment with the front curve block, this cut typically termed a "base curve reference". A "front curve" block is then removably secured to the lathed base curve surface while attempting to maintain axial alignment with the first "base curve" block which is then removed from the button. The front curve block is mounted to the lathe chuck for lathing the convex or front curve of the button to form the finished lens. Lens edging and polishing operations may also be performed on each surface of the lens prior to removal from each block.
During machining, the lens lathe cutter head applies a normal force (perpendicular to the plane of the machined surface) to the surface of the lens blank. In response to this normal force, the lens blank elastically deforms. If the amount of elastic deformation were consistent among the blanks, then the lathe operator could in theory adjust the lathe settings to reliably account for this deformation. Thus it would be desirable for the extent of elastic deformation to be consistent within batches of contact lens buttons. If a correction for elastic deformation must be factored into the machining algorithms at all, it would be desirable for that correction to be as small as possible to minimize the potential for error. Thus it would be desirable to minimize elastic deformation of the contact lens button during machining.
Conventional blocking waxes are deformable adhesives. One example of a useful blocking wax for lathing rigid gas-permeable (RGP) contact lenses Kerr Optical Soluble wax, 6502-A from Universal Photonics of Hicksville, N.Y.
The conventional way of machining an RGP contact lens is to apply a small amount of blocking wax either to the end of a mandrel or to the RGP lens button, and then to press the RGP button onto the mandrel. Mounting and removing operations of the button to and from the blocks during the entire lathing process consumes a significant amount of time and is prone to error, especially in maintaining the necessary axial alignment between the base curve block and the front curve block. If the base and front curve blocks are not aligned precisely, an undesired prism may be introduced to the resultant lens that must then be scrapped.
The conventional ways of removing the lens button from the mandrel include mechanically prying the button off of the mandrel, or heating the mandrel so that the blocking wax melts. These extra steps make the manufacturing process more expensive.
Thus it would be desirable to formulate a blocking wax composition that provides a stable adhesive base to firmly hold the lens blank to the mandrel. It would also be desirable to provide a blocking wax composition that both reduces the extent of elastic deformation in the lens blank during machining and makes that elastic deformation more predictable. Finally, it would be desirable to provide a blocking wax composition that could easily be removed from the lens button and the lathe mandrel after the machining operations are complete.


A stack package may have a plurality of unit packages. Each unit package may include a first substrate, a semiconductor chip, and a second substrate. Conductive supports may stack the second substrate on the first substrate. Conductive bumps may be provided on the bottom surface of the first substrate. An encapsulant may seal the semiconductor chip exposing the top surface of the second substrate. The conductive bumps of an upper unit package may be connected to the second substrate of the lower unit package.

1. Field of the Invention
Example embodiments of the present invention relate to a semiconductor device, and more particularly, to a stack package that may implement conductive supports.
2. Description of the Related Art
The electronic industry may seek methods, techniques and designs to produce electronic products that may be (for example)smaller, lighter, faster, more efficient, operate at higher speeds, provide multiple functions and/or result in improved performance, at an effective cost. One method that has been implemented is a chip scale packaging technique. The chip scale packaging technique may provide chip scale packages or chip size packages (CSPs).
To increase the capacity of semiconductor chips and/or decrease package size, cells may be arranged more densely in a limited area of the semiconductor chip. One approach has been 3-D type semiconductor packaging technologies that may involve stacking semiconductor chips and/or semiconductor packages.
A 3-D stack chip packaging technique may involve stacking semiconductor chips. Such chip stacking may, however, negatively impact production rates. For example, a single faulty chip in a stack of semiconductor chips may cause the whole stack of semiconductor chips to be faulty and/or non-repairable. Typically, chips may not be validated until after they have been packaged.
Another 3-D stack chip packaging technique may involve stacking packages instead of chips. Although a stack of packages may be thicker than a stack of chips (e.g., because each chip may include its own package), each package may be individually validated before stacking.
A conventional stack package 100 implementing a board on chip (BOC) package is described with reference to FIG. 1.
Referring to FIG. 1, the stack package 100 may have two unit packages 10 inclusive of an upper unit package 10a and a lower unit package 10b.
Each unit package 10 may include a substrate 20 having a top surface supporting a semiconductor chip 30, and a bottom surface supporting conductive bumps 60. The substrate 20 may have a window 25, and the semiconductor chip 30 may have pads 31 exposed through the window 25. Bonding wires 40 may connect the pads 31 to the substrate 20 through the window 25. An encapsulant 50 may seal the pads 31 and the bonding wires 40. The conductive bumps 60, which may serve as external connection terminals, may be arranged on the bottom surface of the substrate 20.
In the package structure, the semiconductor chip 30 may be exposed to the external environment. The conductive bumps 60 may have a greater height than the encapsulant 50 so that the unit package 10 may be attached to a motherboard and/or another unit package, for example.
The stack package 100 may be assembled by connecting the upper unit package 10b to the lower unit package 10a by the conductive bumps 60. For example, a flux may be applied to the conductive bumps 60 of the upper unit package 10b. The conductive bumps 60 of the upper unit package 10b may be mounted on the lower unit package 10a and melted.
The encapsulant 50 of the upper unit package 10b may be close to the semiconductor chip 30 of the lower unit package 10a.
A substrate may be larger than a semiconductor chip. When the semiconductor package is mounted on external equipment, it may occupy a large mounting area.
Further, the semiconductor chip and the substrate may have different coefficients of thermal expansion. If thermal stresses are applied to a package, the package may warp, and conductive bump joint faults may be experienced.
The semiconductor chip 30 may be exposed to the external environment, and the semiconductor chip 30 may be susceptible to external factors.
An encapsulant may be provided on the top surface of the substrate. This may reduce a top surface area of the substrate that may be available for attachment of conductive bumps. Therefore, the encapsulant may be limited to an area of the top surface between a semiconductor chip mounting area and the conductive bump attaching area. Alternatively (or in addition), a larger substrate may be implemented.
On the one hand, the limited area of the encapsulant may be insufficient to resist the package warpage. On the other hand, the use of the larger substrate may increase the unit package area.
The bottom surface of the substrate corresponding to a chip mounting area may not be used as a conductive bump attaching area. If the number of conductive bumps increases, the use of a larger substrate having a larger conductive bump attaching area may be inevitable.

Stack package implementing conductive support


The present invention makes it possible to transmit and receive CSI-RSs adequately even when the number of CSI-RSs increase following the increase of antennas. The present invention provides a base station apparatus (20) that transmits CSI-RSs to a mobile terminal apparatus (10A) which is capable of receiving CSI-RSs for channel state measurement from a plurality of antennas, and to a mobile terminal apparatus (10B) which is capable of receiving CSI-RSs from a smaller number of antennas than the mobile terminal apparatus, and this base station apparatus has a CSI-RS allocation section (211) which allocates CSI-RSs for the number of antennas which the mobile terminal apparatus (10A) supports, to radio resources, and a transmitting/receiving section which reports, to the mobile terminal apparatus (10A), the resources where the CSI-RSs are allocated, and which, upon reporting the resources where CSI-RSs are allocated, to the mobile terminal apparatus (10B), reports part of the resources as resources to be muted.

In a UMTS (Universal Mobile Telecommunications System) network, for the purposes of improving spectral efficiency and improving the data rates, system features based on W-CDMA (Wideband Code Division Multiple Access) are maximized by adopting HSDPA (High Speed Downlink Packet Access) and HSUPA (High Speed Uplink Packet Access). For this UMTS network, for the purposes of further increasing high-speed data rates, providing low delay and so on, long-term evolution (LTE) has been under study (non-patent literature 1).
In the third-generation mobile communication system, it is possible to achieve a transmission rate of maximum approximately 2 Mbps on the downlink by using a fixed band of approximately 5 MHz. Meanwhile, in the LTE system, it is possible to achieve a transmission rate of about maximum 300 Mbps on the downlink and about 75 Mbps on the uplink by using a variable band which ranges from 1.4 MHz to 20 MHz. Furthermore, in the UMTS network, for the purpose of achieving further broadbandization and higher speed, successor systems of LTE have been under study (hereinafter referred to as, for example, "LTE-advanced" or "LTE-enhancement" (hereinafter "LTE-A")). Accordingly, in the future, it is expected that these multiple mobile communication systems will coexist, and configurations (base station apparatus, mobile terminal apparatus, etc.) that are capable of supporting these multiple systems will become necessary.
In the downlink of the LTE system (for example, Rel. 8), a CRS (Cell-specific Reference Signal) is defined. This CRS is used to demodulate user data, and, besides, used to measure downlink channel quality (CQI: Channel Quality Indicator) for scheduling and adaptive control, and furthermore used to measure an average downlink propagation path state for cell search and handover (mobility measurement). Meanwhile, in the downlink of a successor system of LTE (for example, Rel. 10), a CSI-RS (Channel State Information—Reference Signal) is under study for dedicated use of CSI (Channel State Information) measurement.

Base station apparatus, mobile terminal apparatus and communication control method


A method of transdermally or transmucosally delivering a hydrophilic salt form of a drug with a water-based pressure sensitive hydrophobic adhesive matrix patch optionally containing a permeation enhancer is disclosed. A matrix patch comprising a water-based pressure sensitive hydrophobic adhesive, a hydrophilic salt form of a drug, and optionally a permeation enhancer for transdermal or transmucosal delivery of the hydrophilic salt form of the drug is also disclosed.

This invention relates to compositions and methods for delivery of drugs. More particularly, the invention relates to pressure sensitive adhesive matrix patches and methods of use thereof for transdermal delivery of hydrophilic salts of pharmaceutical agents.
Transdermal delivery of various drugs is well known in the art of drug delivery. Pressure sensitive adhesive matrix patches for transdermal delivery of drugs are also known in the art. These matrix patches typically include an inert, impervious backing layer, a pressure sensitive adhesive layer containing the drug and optional selected excipients, and a release liner that is peeled off and discarded before applying the patch to the skin. Suitable pressure sensitive adhesives include polysiloxanes, polyacrylates, polyisobutylene, and the like. These pressure sensitive adhesive polymers are very hydrophobic and are typically purchased as solutions of polymer dissolved in organic solvents. The drug and selected excipients, if any, are directly incorporated into the organic-solvent-based pressure sensitive adhesive solution, mixed, cast as a thin film, and dried to evaporate the solvents, leaving a dried adhesive matrix film containing the drug and excipients. It is well known in the art that the drug has to be hydrophobic to be incorporated into the organic-solvent-based, hydrophobic adhesive. Hydrophilic salt forms of a drug are generally not compatible with such organic-solvent-based pressure sensitive adhesives and have to be converted to the more hydrophobic free acid or free base form for incorporation into the organic-solvent-based, hydrophobic adhesive.
Keshary et al., U.S. Pat. No. 5,002,773, describe transdermal delivery of a calcium antagonist compound, "TA-3090," to patients in need of a calcium channel blocking effect. Keshary et al. state that the free base form of TA-3090 can generally be incorporated in polymeric matrix materials in a higher percent by weight than the maleate salt form of TA-3090 and that the free base form is preferred for transdermal delivery. Chandrasekaran et al., U.S. Pat. No. 4,201,211, disclose a gelled mineral oil-polyisobutylene-clonidine free base skin patch for antihypertensive effect, whereas the hydrochloride salt is used in the manufacture of oral clonidine tablets. Urquhart et al., U.S. Pat. No. 4,262,003, describe a gelled mineral oil-polyisobutylene-scopolamine free base transdermal patch for the administration of scopolamine base to inhibit nausea and emesis. These examples illustrate the conversion of a hydrophilic salt form of a drug into the more hydrophobic free base form to render it more compatible for incorporation into a hydrophobic pressure sensitive adhesive matrix patch.
Water-based pressure sensitive adhesives are also commercially available. These water-based adhesives are formulated as emulsions wherein the hydrophobic pressure sensitive adhesive polymer is dispersed in water with the help of surfactants. Such water-based adhesives provide inherent advantages of safety and reduced environmental problems over solvent-based pressure sensitive adhesives, because the carrier is water and not an organic solvent. These water-based adhesives are widely used in the manufacture of medical tapes and bandages, and provide excellent skin adhesion.
Coughlan et al., U.S. Pat. No. 4,564,010, disclose a pressure sensitive adhesive film for medical use comprising a base layer laminated to a water-based pressure sensitive adhesive coating formed of a mixture of a polyacrylic latex, an ester resin, and a thickening agent. Coughlan et al. teach that such films can be used in transdermal delivery systems, however, they fail to describe the types of drugs that may be suitable for transdermal delivery with such a system. Yeh et al., U.S. Pat. No. 5,230,896, describe a transdermal delivery system for administration of nicotine comprising nicotine base, an acrylic polymer adhesive, a stabilizer, and a polyester film backing. It is stated that a nicotine salt is also contemplated in the practice of the invention. Such a nicotine salt is used to reduce volatility of the drug and is formed in situ by addition of acid. When an acid is used to produce the nicotine salt, an emulsion thickener is also required to increase the viscosity of the formulation. Nicotine is a unique compound in that both the free base and its salt forms are very water soluble. Sablotsky et al., U.S. Pat. No. 5,186,938, describe the use of a water-based emulsion adhesive patch for the transdermal administration of nitroglycerin.
Hydrophilic salt forms of hydrophobic drugs are generally readily soluble in water-based pressure sensitive adhesives because the solvent is water, not an organic solvent. What has hitherto gone unrecognized, and is the subject matter of the present invention, is that the hydrophilic salt form of a hydrophobic drug can not only be readily incorporated into the water-based hydrophobic pressure sensitive adhesive, but that the drug is then readily permeable across skin from the dried adhesive film. In fact, the skin flux of the hydrophilic salt form of a drug from a water-based pressure sensitive adhesive matrix is comparable to that of the hydrophobic free base or free acid form from an organic solvent-based pressure sensitive adhesive matrix patch. This finding is novel and contrary to conventional wisdom, which holds that hydrophilic compounds are much less permeable across skin than more hydrophobic substances. R. J. Scheuplein et al., Permeability of the Skin, 51 Physiological Reviews 702-47 (1972); G. L. Flynn, Mechanisms of Percutaneous Absorption from Physicochemical Evidence, in Percutaneous Absorption 27-51 (R. L. Bronaugh & H. I. Maibach eds., Marcel Decker, Inc. 1989). Gale et al., U.S. Pat. Nos. 4,645,502 and 4,904,475, disclose a reservoir patch device for transdermal delivery of highly ionized, fat-insoluble drugs. This invention is premised on the observation that unionized forms of most drugs are more permeable through skin than their ionized forms, i.e. the salt of a particular drug generally cannot be delivered through skin without significant permeation enhancement. For example, Keshary et al., U.S. Pat. No. 5,002,773, show that the free base form of TA-3090 is 7-10 fold more permeable than the maleate salt of TA-3090 from organic solvent based pressure sensitive adhesive matrix systems. In view of the foregoing, it will be appreciated that compositions and methods for efficient transdermal delivery of hydrophilic salt forms of drugs with hydrophobic pressure sensitive matrix patches would be a significant advancement in the art.

Pressure sensitive adhesive matrix patches for transdermal delivery of salts of pharmaceutical agents


The present invention provides a method for patterning a substrate with a template having a mold that features positioning conformable material between the substrate and the mold and filling a volume defined between the mold and the substrate with the conformable material through capillary action between the conformable material and one of the mold and the substrate. Thereafter, the conformable material is solidified. Specifically, the distance between the mold and the substrate is controlled to a sufficient degree to attenuate, if not avoid, compressive forces between the mold and the substrate. As a result, upon initial contact of the mold with the conformable material, spontaneous capillary filling of the volume between the mold and the substrate occurs.

The field of invention relates generally to micro-fabrication of structures. More particularly, the present invention is directed to patterning substrates in furtherance of the formation of structures.
Micro-fabrication involves the fabrication of very small structures, e.g., having features on the order of micro-meters or smaller. One area in which micro-fabrication has had a sizeable impact is in the processing of integrated circuits. As the semiconductor processing industry continues to strive for larger production yields while increasing the circuits per unit area formed on a substrate, micro-fabrication becomes increasingly important. Micro-fabrication provides greater process control while allowing a reduction in the minimum feature dimension of the structures formed. Other areas of development in which micro-fabrication has been employed include biotechnology, optical technology, mechanical systems and the like.
An exemplary micro-fabrication technique is shown in U.S. Pat. No. 6,334,960 to Willson et al. Willson et al. disclose a method of forming a relief image in a structure. The method includes having a mold make mechanical contact with the polymerizable fluid disposed on a substrate. The mold includes a relief structure. Under the compressive force created between the mold and substrate, the polymerizable fluid fills the relief structure in the mold. Thereafter, the polymerizable fluid is subjected to conditions to solidify and polymerize the same, forming a solidified polymeric material on the transfer layer that contains a relief structure complimentary to that of the mold. The mold is then separated from the solid polymeric material such that a replica of the relief structure in the mold is formed in the solidified polymeric material. The post processing steps are undertaken to transfer the relief image into the substrate.
To accurately form the pattern in the polymeric material, sufficient time and force is employed to ensure that the relief structure is completely filled while controlling the distribution of the polymerizable fluid over the substrate. For example, to decrease the time required to imprint a polymerizable fluid with a given viscosity, involves increasing the compressive force between the mold and the substrate. However, too great a compressive force results in the polymerizable fluid spreading to undesired regions of the substrate. Conversely, to obtain precise control over the distribution of the polymerizable fluid over the substrate, often involves decreasing the compressive force between the mold and the substrate. As a result, the time required to imprint the polymerizable material increases. Thus, a tradeoff exists between compressive force employed and time required to imprint the polymerizable fluid.
A need exists, therefore, to reduce the time required to pattern polymerizable fluid while maintaining adequate control of the distribution of the polymerizable fluid over the surface of the substrate.

This patent is subject to a terminal disclaimer.


A door lock mechanism for an overhead door employs a sliding pin or rod that passes into the path of the rollers in the track, and obstructs the roller from movement in the direction to open the door. A spring in the door lock frame biases the sliding pin towards a proximal open position. The sliding pin has an arm that extends radially from its proximal end, and which engages retaining structure at the proximal end of the door lock frame. The arm is rotated out of engagement with the retaining structure to release the pin so it may slide proximally to an unlocked position. The pin may slide into a receiver housing mounted on a door panel.

This invention relates to locking mechanisms for use with an overhead door, in particular with the type of overhead door on which supporting rollers move up or down in a vertical track or rail. The locking mechanism provides a bar or rod that passes into the path of the rollers in the track, and obstructs the roller from movement in the direction to open the door. The locking mechanism is a straightforward mechanical item with a frame, bar, spring, and a place to secure a padlock to hold the mechanism in its locked position.
To date, overhead door locks of this kind have been made of a sheet steel bent into a box shape which is mounted onto the door, with a bar that slides through slots in the box, and which enters a slot cut in the track or rail. These devices are prone to bending and deforming, and are often damaged after a period of normal use in an industrial or warehouse environment. Consequently, there is a need for frequent replacement. Also, the security afforded by these conventional overhead door locks is quite limited.
An example of a lock for an overhead door is described in Shoemaker U.S. Pat. No. 6,027,148 in which a fixed component mounted onto the frame of the overhead door, i.e., somewhere along the track, captures a rod that is mounted somewhere on the movable overhead door, entering an opening in a rotary element that turns and is retained in a detent. This is a fairly complex apparatus, with numerous moving parts which can be easily knocked out of alignment.
Another example of a lock for an overhead door is described in Shoemaker Patent Application Publication Pub. No. 2003/0188489, in which a rocking member, e.g., a cam, is disposed in a trackway of the overhead door, allowing the door to close but blocking a track wheel to prevent opening until the cam is moved out of the way. This device automatically moves the cam to the closed position, and a solenoid needs to be actuated to release the cam to permit the overhead door to open.

Sliding pin lock mechanism for overhead door


A cerumen barrier for a custom, in the ear type hearing instrument which consists, in combination, of a sound outlet base and a barrier door which prevents ear wax from reaching and damaging the internal components of a hearing instrument, particularly the transducer, in an arrangement which facilitates an accelerated and simplified attachment to the hearing instrument as compared with the state of the art. The sound outlet base comprises a cylindrical component, incorporating a bore insertable into the sound outlet port, and a counter-bore, which joins to the male connector on the barrier door.

1. Field of the Invention
The invention relates to ear wax barriers for custom in the ear hearing instruments in accordance with the general definition of patent claim 1.
2. Technical Background
Cerumen traps which prevent the ingress of ear wax into the hearing instrument and other cerumen traps which reduce the likelihood of ear wax blocking the sound outlet are already known.
From U.S. Pat. No. 4,972,488 which describes clearly detailed barrier designs which use a fine mesh screen in the sound channel wherein if sufficiently small screen holes are used, will eventually clog with wax and conversely when mesh is made with wider screen holes, wax will eventually migrate across the screen and damage the transducer. Such cellular synthetic screens can increase acoustic impedance between the transducer and the ear drum which may modify the frequency response and acoustic gain of the hearing aid device.
From U.S. Pat. No. 5,105,904 arrangements which utilize wax filters or caps necessitate the need to replace such filters when clogged with wax. Clogging can occur gradually depending upon variances of cerumen production in different hearing instrument wearers or immediately upon inserting the hearing instrument into the ear canal.
In the gradual clogging process, the wearer's perceived sound quality may gradually worsen evidenced by acoustic feedback or lack of output. The wearer must purchase or otherwise obtain additional filters and tools for replacement of the filters. First the wearer needs to visually verify the filter or screen needs changing or the cap is clogged. Visual acuity and finger dexterity are necessary for proper replacement and realignment of such filters or caps. Other mechanical, internal defects can develop in nearing instruments which display the same failure characteristics as wax clogging does, thereby leading to frustration when filter replacement does not alleviate an internal failure. Often times, it is more desirable for a trained hearing aid professional to clean the hearing instrument and verify specifications in order to reduce the wearer's frustration and chance of improper installation resulting in filters, screens or caps falling off the unit or into the wearer's ear canal. Thus it is desirable to have a barrier which does not need replacement over the life of the hearing aid.
If the filter, screen, or cap clogs when inserting the hearing aid, the filter acts as a wax "scoop", particularly if the wearer's canal diameter is small in respect to the diameter of the filter. Thus it is desirable to keep such barriers as small as possible to reduce the incidence of insertion clogging.
Three piece barrier systems are known which consist of a metallic hinge pin, inserted into a sound outlet base--typically made of Acrylonitrile-Butadiene-Styrene resin, "Cycolac", Tenite, Poly amide, or similar injection molded thermoplastic--and a barrier door, also made of a similar plastic, which attaches to the hinge pin.
The sound outlet base incorporates a bore to allow the outlet of sound from the transducer, and a small detent cavity which accepts a latch mechanism from the barrier door, and two small cavities parallel to the base which accept the hinge pin.
The sound outlet base perimeter is square. The side opposite the hinge pin is flat. This flat side is affixed to the tip of the hearing instrument shell (perpendicular to the long axis of the ear canal), typically with Methyl Methacrylate, Cyanoacrylate "super glue", or similar bonding agent of the aforesaid plastics. The square base must be trimmed and then buffed to match the contour of the tip of the wearer's hearing aid. The buffing process can disrupt the placement of components within the shell often resulting in non-conforming specifications such as acoustic feedback, or shorting. The buffing process can also reduce the size of the canal tip resulting in an improper fit for the hearing aid wearer. Thus a barrier is desirable which could eliminate this trimming process.
This three component barrier system utilizes the barrier door to prevent clogging of the sound outlet during insertion. The barrier door has a hinge at one end to rotate about the hinge pin and a latch at the other end to keep the door closed. Thus it is the barrier door hinge in combination with the hinge pin which attaches the barrier door to the sound outlet base and it is the latch on the barrier door which keeps the barrier door closed and parallel to the sound outlet base.
The barrier door when snapped onto the hinge pin and closed, leaves a clearance so that sound is not appreciably impeded once it exits the sound outlet bore. Such a clearance is desirable for a wax barrier which is large enough not to reduce the transducer output or significantly change the acoustic impedance of the hearing instrument.
Effective in the way it prevents wax from being scooped into the sound outlet, and in the elimination of replacement filters, it requires periodic cleaning when ear wax collects near the clearance between the base and door. The cleaning process is usually accomplished by unlatching and opening the barrier door, and then brushing away wax with a small brush. Difficulties arise when the plastic door hinge fatigues during the life of the hearing instrument, due to periodic cleaning (typically daily), and thus lose grip on the hinge pin. The wearer then risks the possibility of losing the small door or even an unhinged door falling into the ear canal while wearing the hearing instrument. Thus it is desirable for a barrier unit which minimizes fatigue on any such hinge or latch which connects the barrier to the hearing instrument.
Such barriers which, when open, extend the effective length of the hearing instrument (along the long axis of the ear canal), can possibly injure a wearer's ear drum if the end of the hearing instrument is already close in proximity to the ear drum. Thus it is desirable for a barrier which poses no threat of injury to the wearer's ear drum, particularly if the barrier is inserted into the ear canal when open.

Cerumen barrier for custom in the ear type hearing intruments


Provided are a thin film magnetic head capable of inhibiting an excessive temperature rise while reducing its size in accordance with a higher recording density, and obtaining a higher read output, a method of manufacturing the same, and a magnetic disk drive using the thin film magnetic head. A heat dissipation layer for transferring heat generated in a magnetic transducer film to outside is disposed adjacent to the magnetic transducer film on a side, the side being opposite to a side facing a recording medium. In a gap layer for electrically insulating between the magnetic transducer film and a pair of shield layers, a portion of the gap layer in contact with an end surface of the magnetic transducer film on a side, the side being opposite to a side facing the recording medium is formed so as to have a thin thickness ranging from 2 nm to 30 nm inclusive. Thereby, the heat generated in the magnetic transducer film can be more effectively dissipated than previously possible, and a temperature rise can be inhibited. Therefore, an increase in electrical resistance can be inhibited, and a higher read output can be obtained.

1. Field of the Invention
The present invention relates to a thin film magnetic head having a function of dissipating heat generated in a magnetoresistive effect film to outside, a method of manufacturing the same, and a magnetic disk drive comprising the thin film magnetic head.
2. Description of the Related Art
In recent years, an improvement in performance of thin film magnetic heads has been sought in accordance with an improvement in areal density of hard disk drives. As the thin film magnetic heads, composite thin film magnetic heads (hereinafter simply referred to as "thin film magnetic heads") are widely used. The composite thin film magnetic head comprises a laminate including a reproducing head portion having a magnetoresistive device (hereinafter referred to "MR device"), which is a kind of magnetic transducer, and a recording head portion having an inductive magnetic transducer.
As a typical MR device, a GMR device using a magnetic film (GMR film) exhibiting a giant magnetoresistive effect (hereinafter referred to as "GMR effect") is cited. In particular, a GMR device using a spin-valve type GMR film has been in the mainstream. The spin-valve type GMR film has a relatively simple structure, thereby is suitable for mass production, and exhibits a large change in magnetoresistance in spite of an extremely weak magnetic field. Such a GMR device has the following structure.
FIG. 18 shows a schematic sectional view of a structure of a conventional reproducing head portion including the GMR film. A reproducing head portion 110A has the following structure. On a base substrate (not shown) made of, for example, AlTiC (Al2O3—TiC) or the like, a bottom shield layer 101 made of a magnetic material is laminated with an insulating layer (not shown) made of, for example, aluminum oxide (Al2O3) or the like in between. On the bottom shield layer 101, a bottom gap layer 102 made of, for example, an insulating material such as aluminum oxide or the like is formed, and on the bottom gap layer 102, a GMR film 120 and an insulating layer 103 are formed so as to be adjacent to each other. On the GMR film 120 and the insulating layer 103, a top gap layer 105 is laminated. A bottom surface and a top surface of the GMR film 120 are in contact with the bottom gap layer 102 and the top gap layer 105, respectively. On one side end surface of the GMR film 120, a recording-medium-facing surface 119 facing a magnetic recording medium 11 is formed, and an end surface of the GMR film 120 on a side opposite to the recording-medium-facing surface 119 is in contact with the insulating layer 103. As in the case of the GMR film 120, a bottom surface and a top surface of the insulating layer 103 are in contact with the bottom gap layer 102 and the top gap layer 105, respectively. Further, on the top gap layer 105, a top shield layer 106 made of a magnetic material is laminated.
On the reproducing head portion 110A, a recording head portion (not shown) is laminated, and the combination of the reproducing head portion 110A and the recording head portion constitutes a thin film magnetic head 110.
In general, a length from the recording-medium-facing surface 119 to an end surface on a side opposite to the recording-medium-facing surface 119 in the MR device is called an MR height (or an MR device height). On the other hand, a length of the MR device in a direction perpendicular to a paper surface of FIG. 18 is a portion corresponding to a track width of a recording medium (hereinafter referred to as "MR device width"). Recently, in order to cope with a remarkable increase in recording density, the MR device width is becoming increasingly smaller. Accordingly, the MR height is also becoming increasingly smaller.
A problem resulting from heat generated in the MR device occurs due to a downsizing of the MR device. The problem is that due to the heat generated in the MR device, electromigration (a phenomenon in which a void is locally formed when metal atoms move in a conductor) or interlayer diffusion is induced, and as a result, it is difficult to sufficiently extend the lifetime of the MR device. The heat generated in the GMR device 120 is transferred to the top shield layer 106 and the bottom shield layer 101 through the top gap layer 105 and the bottom gap layer 102 to be dissipated. However, when the MR height and the MR device width become smaller, a heat dissipation area, that is, the whole surface area of the GMR film 120 is greatly reduced as a inevitable consequence, so sufficient heat dissipation can not be achieved. It can be considered that when the MR device becomes still thinner (smaller) in future, the temperature of the MR device will excessively rise to, for example, higher than 50° C., and as a result, electrical resistance of the thin film magnetic head will increase. In extreme cases, element diffusion may occur in the MR device, thereby characteristics of thin film magnetic head may be pronouncedly degraded. Further, it can be considered that even if the temperature of the MR film does not rise to as high as internal element diffusion occurs, a degradation in the characteristics resulting from the heat generated in the GMR film 120 such as a reduction in output during reproducing magnetically recorded information resulting from increased electrical resistance may occur.
As an MR device with improved heat dissipation, for example, a thin film magnetic head disclosed in Japanese Unexamined Patent Application Publication No. Hei 6-223331 is cited. In the thin film magnetic head disclosed in the publication, as an insulating layer of an MR device, a material with good insulation and good thermal conductivity such as a silicon film, a diamond-like carbon or the like is used so as to carry out heat dissipation of the MR device. Moreover, in a thin film magnetic head and a magnetic disk drive disclosed in Japanese Unexamined Patent Application Publication No. 10-222816, as not only an insulating layer of an MR device, but also a protective film of a magnetic head slider or a disk surface, a non-magnetic insulating film with a high heat dissipation ratio such as a hydrogen-containing amorphous carbon film, silicon-containing amorphous carbon, amorphous aluminum nitride or the like is used. Thereby, the occurrence of a phenomenon called thermal asperity (TA) resulting from heat caused by friction between the magnetic head slider and the magnetic disk, electromigration or the like can be prevented, so the characteristics of read output can be improved. However, even if the thermal conductivity of a component material around the MR device is higher, the heat dissipation area of the component around the MR device is relatively reduced resulting from a downsizing of the MR device, so heat dissipation capacity is limited.
The applicant of the present invention has been proposed a thin film magnetic head disclosed in Japanese Unexamined Patent Application Publication No. 2000-353308, which can overcome the above-described problem. An enlarged sectional view of a specific example of the thin film magnetic head disclosed in the publication is shown in FIG. 19. In the thin film magnetic head, a reproducing head portion 210A comprises a heat dissipation layer 104 in contact with a laminated surface of the GMR film 120, and heat generated in the GMR film 120 is dissipated to outside through the heat dissipation layer 104.
However, even in the case of the thin film magnetic head disclosed in the above publication, when a demand for a thinner MR device (a downsizing of the MR film in a thickness direction) grows in accordance with an even higher recording density in future, the heat dissipation layer 104 cannot have a sufficient thickness, and as a result, it can be expected that it will be more difficult to secure sufficient heat dissipation.

Thin film magnetic head including a heat dissipation layer, method of manufacturing the same and magnetic disk drive


A data communication system has a station that includes multiple antenna elements. The station communicates to the antenna elements by way of digital data channels. Each antenna is connected to an RF module that receives data by way of a corresponding digital data channel, encodes and transmits the data. Adaptive beamforming may be performed for interference mitigation. Embodiments use the strength of pilot signals and/or error vector magnitudes as cost functions for an adaptive beamforming alogorithm such as optimum combining. Unused sub-carriers may be applied to provide in-band communication to facilitate channel switching, data reallocation and other interference mitigation strategies.

Wireless data communication channels are affected by interference and various other effects. If not addressed, these effects can make wireless data communication channels unreliable. Some of these effects arise and/or are particularly difficult to address where one or more stations on the data communication channel are not at fixed locations. Time variations in a communication channel may be caused by moving terminals, moving interference sources, time-varying interference, and/or changing propagation paths caused, for example, by moving radiowave scatterers and the like. Examples of moving radiowave scatterers include close-proximity moving vehicles or scintillating scattering from a rippling water surface. An example of a time-varying interference signal is the signal from a frequency hopping communications system.
Sources of problems with wireless communication channels include effects that cause a low signal power relative to the noise power plus interference power, at the receiver. These include:                path loss caused by long distances or by other excessive radiowave attenuation between the transmitter and receiver terminals;        multipath fades, which result from destructive interference at a receiving antenna as a result of radiowave signals traveling via multiple propagation paths;        other signals competing to use the same radio spectrum at the same time (these signals are called interference). In licensed frequency bands, interference is typically less of a problem than it is within the unlicensed bands.
Interference can be exacerbated when the path loss is large as can occur, for example, where data transmission occurs over long distances and/or where the directional transmit power of the transmitted signal is low. Directional transmit power is typically constrained by law (for example by the Radio Regulations). There are no legal constraints on the directional gain of a receiving antenna. However, the higher the directional gain of an antenna, the narrower its beamwidth. A narrow beamwidth makes it more difficult to achieve and maintain alignment between a receive antenna and a desired signal. High directional gain, fixed-beam antennas, are normally unsuitable for mobile terminals because of this beam alignment problem.
The above-mentioned problems can cause reduced data throughput in the communications link. In extreme cases the communication channel becomes unusable. Such extreme cases are ubiquitous in the unlicensed industrial, scientific, and medical (ISM) radio frequency bands, where many users exploit the freely available radio spectrum for communications, including attempts at long distance communications.
Many industrial and commercial links operate in non-licensed bands, for example, the industrial, scientific, and medical (ISM) bands. The ISM bands are defined by the Radio Regulations of the International Telecommunications Union Radiocommunication sector (ITU-R). The ISM bands include bands at about 0.9 GHz, 2.4 GHz, and 5.8 GHz, among others. Current commercial wireless systems use the ISM bands at frequencies as high as about 60 GHz. The advantage of using these non-licensed bands is that the spectrum is free to use. The use of other (licensed) spectrum is expensive.
OFDM -based WiFi (an 802-11 standard) has emerged as the de-facto standard technology for unlicensed broadband communications. The basic reason for its success is that the architecture, when mass produced, is very inexpensive. A single digital transmitter and receiver are used for many different data streams which occupy separate, adjacent narrow bandwidths. The use of the many data streams permits high data throughput. The many narrow bandwidth data streams sum to occupy a wide bandwidth. Unlike many wideband signaling systems, currently available OFDM systems are highly susceptible to narrowband interference signals. 802.11n, which is a current iteration of WiFi standards has various features that can be used to improve performance (e.g. to improve data throughput in environments where received signals have a low signal-to-noise ratio (SNR) per unit bandwidth). However, our measurements, as well as those of others have indicated that systems which use the 802.11 standards do not work well and often not at all, in the presence of interference.
In ISM bands, the maximum transmit power levels are restricted (regulated in North America by the FCC and Industry Canada), but there is no regulatory coordination in the sharing of this spectrum. Therefore, broadband OFDM communications systems operating in ISM bands are particularly susceptible to interference from other users of the spectrum.
Much of the energy in the 2.4 GHz and 5.8 GHz ISM bands is generated by WiFi devices. Although WiFi systems are designed to coexist in the same space and use the same spectrum, they still compete for available capacity. The problem of interference caused by other WiFi systems is increasing because the number of WiFi users is increasing. In some locations, there are so many competing signals (both from WiFi and non-WiFi signal sources) that high throughput systems, as required in several industrial/commercial links are unworkable using currently-available technology.
Industrial/commercial applications that deploy long-distance broadband links in ISM bands typically use commercial grade WiFi radio modules such as those available from Ubiquiti Networks of Milipitas Calif. USA coupled with high-gain, fixed antennas to achieve the required range. However, such fixed-antenna systems remain susceptible to interference.
It is known to use adaptive antennas for interference cancellation and for enhancing gain of wanted signals. An adaptive antenna ideally strives to maximize the received power of a wanted signal to the sum of interference power and noise power. This ratio is known as the SINR. Here and in the following discussion, "power"refers to the power within time- and frequency-bands of interest except as otherwise indicated. Adaptive antennas of various types can provide improved gain for receiving wanted signals and reduced gain for receiving unwanted signals. However, many adaptive antennas do not perform as well as would be desired, especially in the presence of interference.
An adaptive antenna, in receiving mode, normally comprises several antenna elements. Signals received at the different antenna elements are combined in order to optimize some aspect of transmission. Some adaptive antennas receive signals from different antenna elements antennas, and combine these signals using variable weights in order to get improved reception. In transmit mode, similar adjustments can be made to the antenna parameters, for example adjusting the weights of signals transmitted by different elements in order to maximize transmit gain in particular directions. Adaptive antennas at transmitting and receiving ends of a communication link can be jointly optimized to maximize transmission gain as well. This is a form of MIMO (multiple input, multiple output) communication.
U.S. Pat. No. 7,257,425 discloses a 'smart antenna' module which weighs and combines signals received by multiple antennas.
There is a need for robust data communication systems that are practical and cost-effective. There is a specific need for such systems suitable for providing ship-to-shore data communication or other data communication with a moving end-point. Among the many specific applications scenarios, there is a need for such systems suitable for providing ship-to-shore data communication or other data communication with moving terminals. Advantageously, such systems could operate in an ISM band. Ship-to-shore radio has finite range because of the severe path loss (for long ranges, the path gain can be proportional to the inverse-fourth power with distance, as opposed to inverse square law as in free space) over the water. Moreover, particularly with ferry services linking built-up ports, the port and its surrounding areas (often within, or close to, a city) feature many radio users, so the level of interference is high at the locations where one may wish to locate terrestrial transceivers.

Reassignment of data among subcarriers in wireless data communication


According to one embodiment, a communication system includes at least one user apparatus and a datacenter apparatus. The datacenter apparatus includes a processor, a memory and a controller. The processor includes a plurality of containers required to execute a plurality of communication functions associated with the exchange processing between the communication terminals or between the communication terminal and the communication line. The memory stores a user ID used to identify the user apparatus. The controller provides a communication service using at least one of the plurality of containers when a use request of the communication function is received from the user apparatus.

In recent years, IP telephone systems, which bidirectionally exchange image and audio data as packet data in realtime via Internet Protocol (IP) networks such as a LAN and the Internet, have prevailed. In this IP telephone system, for example, an IP telephone server is equipped for each company or individual user, and IP telephone stations can be registered for each IP telephone server. In such IP telephone system, not only inter-extension communications and outside outgoing/incoming call can be made but also those between IP telephone servers can be made via the IP network.
When each company or user purchases and uses an IP telephone server, an IP telephone server including functions required at that time is selected. However, after the beginning of use, functions of the IP telephone server are required to be added and unnecessary functions are required to be reduced according to an increase in personnel, a change in business content, and the like. Also, for each company or user, the number of IP telephone servers is required to be increased or decreased.
However, immediate addition/reduction of functions or expansion/reduction of IP telephone servers imposes a heavy load on each company or user side.

Communication system, datacenter apparatus, and control method used in datacenter apparatus


Example embodiments relate to a capacitor, a method of forming the same, a semiconductor device having the capacitor and a method of manufacturing the same. Other example embodiments are directed to a capacitor having an upper electrode structure including a first upper electrode and a second upper electrode, a method of forming the same, a semiconductor device having the capacitor and a method of manufacturing the same. In a method of forming a capacitor, a lower electrode may be formed on a substrate, and then a dielectric layer may be formed on the lower electrode. An upper electrode structure may be formed on the dielectric layer. The upper electrode structure may include a first upper electrode and a second upper electrode. The second upper electrode may include at least two of a silicon layer, a first silicon germanium layer and a second silicon germanium layer doped with p-type impurities. The upper electrode structure may be formed without generating voids between the dielectric layer and the upper electrode structure. The capacitor and the semiconductor device having the upper electrode structure may have improved electrical characteristics.

1. Field of the Invention
Example embodiments relate to a capacitor, a method of forming the same, a semiconductor device having the capacitor and a method of manufacturing the same. Other example embodiments are directed to a capacitor having an upper electrode structure including a first upper electrode and a second upper electrode, a method of forming the same, a semiconductor device having the capacitor and a method of manufacturing the same.
2. Description of the Related Art
Among semiconductor devices, a dynamic random access memory (DRAM) device may have a unit cell including one access transistor and one storage capacitor. As the DRAM device becomes more highly integrated, the capacitor dimension may be reduced. The capacitor may increase storage capacity regardless of the reduced size of the DRAM device.
The capacity of the capacitor may be represented by the following equation:C=∈0∈×(A/d)
wherein ∈0 indicates a dielectric constant in a vacuum, and ∈ indicates a dielectric constant of a dielectric layer. A represents an effective area of a lower electrode, and d indicates a thickness of the dielectric layer.
As shown in the above equation, the capacity of the capacitor may be improved by increasing the effective area of the lower electrode, reducing the thickness of the dielectric layer and/or employing relatively high dielectric material as the dielectric layer. The lower electrode of the capacitor may have a cylindrical structure that has a height larger than a width thereof, thereby increasing the capacity of the capacitor.
In a conventional method of forming a cylindrical capacitor, an insulating interlayer having a contact pad may be formed on a semiconductor substrate, and then a cylindrical lower electrode having a relatively high aspect ratio may be formed on the contact pad. After a dielectric layer is formed on the cylindrical lower electrode, an upper electrode may be formed on the dielectric layer. The upper electrode may include a polysilicon germanium layer doped with p-type impurities.
The p-type polysilicon germanium layer of the upper electrode may be directly formed on the dielectric layer without forming a seed layer so that the size of the grains in the p-type polysilicon germanium layer may be undesirably increased. Voids may be generated between the dielectric layer and the upper electrode because the p-type polysilicon germanium layer having the relatively large grains may not be properly formed on the dielectric layer. When the voids are formed between the dielectric layer and the upper electrode, electrical characteristics of the capacitor may be deteriorated.

Capacitor, method of forming the same, semiconductor device having the capacitor and method of manufacturing the same


In an IBM PC/AT-compatible computer system, the frequency of the CPU bus clock signal is detected via a hardware apparatus in the I/O interface chipset. The CPU reads the hardware-detected clock frequency from an I/O register. In one embodiment, one bit of the data returned from the register indicates whether the clock frequency indicated by the remainder of the bits is valid. The CPU can trigger the hardware to autodetect the clock frequency by writing arbitrary data to the same address. The hardware clock frequency detection circuitry operates by, in response to a start signal, counting the number of cycles of the CPU clock signal which occur within a predefined number of cycles of the ISA-bus OSC signal. The start signal can be asserted in response negation of the system reset signal, or in response to a write access on the ISA bus to a predefined I/O register, or both. The clock frequency detection apparatus can include validation circuitry which asserts the validity signal only after the count is complete, and only if the count value has not exceeded a predetermined maximum count.

1. Field of the Invention
The invention relates to computer systems having a clock signal which can operate at different speeds in different systems, and more particularly to a mechanism for detecting such clock frequency.
2. Description of Related Art
A typical personal computer systems includes a microprocessor, such as an Intel i386, i486 or Pentium.RTM. microprocessor, which is coupled to a CPU bus having data, address and control signal lines. The typical IBM PC AT-compatible platform also includes DRAM main memory, and in many cases a timer, a real-time clock, and a cache memory. The typical IBM PC AT-compatible computer also includes an I/O bus, also known as an AT-bus, which is separate and distinct from the CPU bus. The I/O bus usually conforms to one of two industry-established standards known as ISA (Industry Standard Architecture) and EISA (Extended ISA). The I/O bus is coupled to the CPU bus via an I/O interface chipset, and includes address, data and control lines. The I/O address space is logically distinct from the memory address space and if the CPU desires to access an I/O address, it does so by executing a special I/O instruction. Such an I/O instruction generates memory access signals on the CPU bus, but also activates an M/IO# signal on the CPU bus to indicate that this is an access to the I/O address space. The I/O interface chipset recognizes the I/O signals thereby generated by the CPU, performs the desired operation over the I/O bus, and if appropriate, returns results to the CPU over the CPU bus.
In practice, some I/O addresses may reside physically on the CPU bus and some memory addresses may reside physically on the I/O bus. More specifically, the devices which respond to accesses to certain I/O space addresses may be connected to the control lines (and usually the address and data lines as well) of the CPU bus, while the devices which respond to accesses to certain memory space addresses may be connected to the control lines (and usually the address and data lines as well) of the I/O bus. The I/O interface circuitry is responsible for recognizing that a memory or I/O address access must be emulated by an access to the other bus, and is responsible for doing such emulation.
General information on the various forms of IBM PC AT-compatible computers can be found in IBM, "Technical Reference, Personal Computer AT" (1985), in Sanchez, "IBM Microcomputers: A Programmer's Handbook" (McGraw-Hill: 1990), in MicroDesign Resources, "PC Chip Sets" (1992), and in Solari, "AT Bus Design" (San Diego: Annabooks, 1990). See also the various data books and data sheets published by Intel Corporation concerning the structure and use of the iAPX-86 family of microprocessors, including Intel Corp., "Pentium.TM. Processor", Preliminary Data Sheet (1993); Intel Corp., "Pentium.TM. Processor User's Manual" (1994); "i486 Microprocessor Hardware Reference Manual", published by Intel Corporation, copyright date 1990, "386 SX Microprocessor", data sheet, published by Intel Corporation (1990), and "386 DX Microprocessor", data sheet, published by Intel Corporation (1990). All the above references are incorporated herein by reference.
The various signals on the CPU bus include the input/output signals of whichever microprocessor the system is built around. Such signals are therefore well known in the industry and can be determined by reference to the above-incorporated publications. The various signals on the I/O bus also are well known in the industry. The Solari book incorporated above describes the lines in detail.
In an effort to minimize the number of integrated circuit chips required to build a PC AT-compatible computers, several manufacturers have developed "PC AT chipsets" (also known as "core logic chipsets" or "I/O bus interface chipsets"), which integrate a large amount of the I/O bus interface circuitry and other circuitry onto only a few chips. An example of such a chipset is the 386WB PC/AT chipset manufactured by OPTi Inc., Santa Clara, Calif. These chipsets implement the I/O bus interface circuitry, the timer, real-time clock (RTC), DMA controller, as well as some additional functionality.
For many purposes, the I/O interface chipset needs to know what the CPU clock frequency is. The CPU clock frequency is the frequency of a clock signal upon which all synchronous operations on the CPU bus are timed. The CPU clock speed can vary widely for different microprocessors. Presently, CPU clock speeds can vary from about 25 MHz to about 66 MHz. Note that as used herein, the CPU clock frequency is the frequency of the clock signal on the CPU bus. This clock signal is applied to the CPU itself, and it may be doubled, tripled or quadrupled internally to the CPU.
One reason that the CPU clock frequency needs to be known is that in typical systems, the I/O interface chipset generates the I/O bus BCLK signal by dividing down the CPU bus clock signal. The ISA specification requires that BCLK be between 6 MHz and 8.33 MHz, and marketing considerations mandate that it be as close to 8.33 MHz as possible. The chipset therefore needs to know the CPU clock frequency in order to know what divisor to use to generate BCLK.
As another example, for certain lengthy combinational signal paths in the system, if the I/O interface chipset needs to sample the output of the signal path synchronously with the CPU clock, then the chipset needs to know how many CPU clock signals to wait before sampling the result. For optimum performance, this number of clock cycles will depend on the frequency of the CPU clock signal.
In the past, the CPU clock frequency was determined through a software technique at system boot time. Specifically, the ROM firmware contained code which performed 1000 loops in RAM. Each iteration of the loop took a known number of CPU cycles, for example 100 CPU cycles, because the number of CPU cycles required for each instruction in the loop was known. Before starting the loop, an internal counter/timer was initialized. When the 1000 loops completed, the counter/timer was read. Since the input clock to the counter/timer was known to be approximately 1.19 MHz, the autodetect software was able to calculate the internal CPU speed by dividing the total number of CPU cycles executed in the loop (e.g. 100,000), by the time in seconds read from the counter/timer. This division was performed by a software table look-up.
Once the internal CPU clock speed was known, the software routine would read the CPU revision ID. This ID was used, together with a knowledge of the particular platform hardware, to calculate the CPU clock frequency external to the chip. For example, if the microprocessor was a DX2 chip and the iterative procedure calculated an internal clock frequency of 66.67 MHz, then the software determined that the external CPU clock frequency was half of 66.67 MHz, or 33.33 MHz. The software would then program I/O registers in the I/O interface chipset according to the detected clock speed.
The use of the software routine for detecting the CPU clock speed causes a number of problems. First, it takes a certain amount of time to complete, time which it would be preferable to avoid. Second, while the timing loop itself may be small, a certain amount of code was required to place the system in a known state to ensure that each iteration of the loop did in fact take the number of internal CPU clock cycles expected. For example, caching must be enabled to ensure that all instructions in the loop were fetched with the timing of a cache read hit.
Most significantly, however, the software detection mechanism must be tuned differently for different platforms. For example, different systems have different caching configurations and may require adjustments for that reason. As another example, different ones of the Intel microprocessors, and especially different Intel-compatible microprocessors which are not manufactured by Intel, may take a different number of internal CPU clock cycles to perform the different instructions in the loop. As yet another example, personal computers which are built around RISC-based microprocessors are becoming increasingly popular. These microprocessors do not necessarily support even the same instructions as those used in the auto-clock detect loop for an Intel microprocessor. Such systems also may not even include a counter/timer, and if they do, they may not be clocked at the 1.19 MHz frequency at which the Intel counter/timers are clocked. It has been suggested that clock frequency detection apparatus be included in hardware circuitry in the I/O interface chipset, but no mechanism for performing such detection or for communicating the detected frequency to the CPU, has been proposed.
Accordingly, there is a need for a mechanism for automatically detecting the frequency of a clock signal in a computer system without relying on a software timing loop.

Clock frequency detection for computer system


Disclosed is context swapping in a multitasking operating system for a processor that includes providing a plurality of context blocks for storing context information for a plurality of processes, providing an array of pointers to the context blocks, providing an index to the array of pointers, and swapping context by adjusting at least one pointer in the array of pointers to point to a context block of a new process. Further included may be incrementing the index prior to adjusting the at least one pointer in the array of pointers. Further included may be, after adjusting at least one pointer in the array of pointers, decrementing the index and causing the processor to jump to an address indicated by a program counter value of the new process. The context information may include values for registers, a stack pointer, and a program counter for a process. The system described herein provides a small kernel that can run on a variety of hardware platforms, such as a PowerPC based Symmetrix adapter board used in a Symmetrix data storage device provided by EMC Corporation of Hopkinton, Mass. The core kernel code may be written for the general target platform, such as the PowerPC architecture. Since the PowerPC implementation specific modules are well defined, the system may be quite portable between PowerPC processors (such as the 8260 and 750), and should prove relatively easy to port to any PowerPC based Symmetrix adapter board/CPU combination. The kernel may also be ported to run on other RISC machines (Hitachi SH series) and can be ported to CISC architectures.

1. Field of the Invention
This application relates to the field of computer operating systems and more particularly to the field of multitasking-based operating systems that may be used on a microprocessor.
2. Description of Related Art
Operating systems may be used to facilitate sharing of a processor among a variety of separate processes. The operating system manages the sharing of the processor by providing each process with separate time slices for executing code.
For microprocessors, and for microprocessors used in device oriented applications, such as for data communication, it is often useful to provide an operating system that can manage processor sharing among the processes that handle different aspects of running the device. However, such operating systems may provide a number of drawbacks, such as requiring a significant amount of stack space that needs to be managed for each separate process. In addition, different mechanisms may be used for preempted task swapping (i.e., task swapping that uses interrupts) versus cooperative task swapping (i.e., processes relinquish the processor voluntarily). Furthermore, many operating systems are hardware and architecture specific so that an operating system implemented on one processor may not be easily be ported to another processor.
In addition, even in instances where it would be advantageous to use multiple process schedulers, many operating systems use a single process scheduler because of difficulties associated with changing process schedulers during run time. Context swapping in these operating systems may be cumbersome and, when both cooperative and preemptive techniques are used together, it may be difficult to avoid process starvation of a current process that is swapped in when a previous process voluntarily relinquishes the processor and the current process is subsequently preempted.
It is desirable to provide an operating system that overcomes the deficiencies discussed above.
According to the present invention, context swapping in a multitasking operating system for a processor, includes providing a plurality of context blocks for storing context information for a plurality of processes, providing an array of pointers to the context blocks, providing an index to the array of pointers, and swapping context by adjusting at least one pointer in the array of pointers to point to a context block of a new process. Further included may be incrementing the index prior to adjusting the at least one pointer in the array of pointers. Further included may be, after adjusting at least one pointer in the array of pointers, decrementing the index and causing the processor to jump to an address indicated by a program counter value of the new process. The context information may include values for registers, a stack pointer, and a program counter for a process. A number of context blocks that are used may vary according to a maximum number of nested context swaps expected at run time. Further included may be detecting a level of nested context swaps and, in response to the level exceeding a maximum number of allowed context swaps, prohibiting further context swaps. Prohibiting further context swaps may include disabling interrupts.
According further to the present invention, context swapping in a multitasking operating system includes storing context information for a plurality of processes, storing context information for at least one scheduler, providing a plurality of pointers to the context information, providing an index to the plurality of pointers, and context swapping by adjusting at least one of the index and the pointers. At least some of the context information may be stored as an array of context blocks. A number of context blocks that are used may vary according to a maximum number of nested context swaps expected at run time. Further included may be detecting a level of nested context swaps and, in response to the level exceeding a maximum number of allowed context swaps, prohibiting further context swaps. Prohibiting further context swaps may includes disabling interrupts. The plurality of pointers may be an array and the index may be an index to the array. Further included may be incrementing the index prior to adjusting the at least one pointer in the array of pointers. Further included may be, after adjusting at least one pointer in the array of pointers, decrementing the index and, causing the processor to jump to an address indicated by a program counter value of the new process. The context information may include values for registers, a stack pointer, and a program counter for a process.
The system described herein provides a small kernel that can run on a variety of hardware platforms, such as a PowerPC based Symmetrix adapter board used in a Symmetrix data storage device provided by EMC Corporation of Hopkinton, Mass. The core kernel code may be written for the general target platform, such as the PowerPC architecture. Since the PowerPC implementation specific modules are well defined, the system may be quite portable between PowerPC processors (such as the 8260 and 750), and should prove relatively easy to port to any PowerPC based Symmetrix adapter board/CPU combination. The kernel may also be ported to run on other RISC machines (Hitachi SH series) and can be ported to CISC architectures.
The system described herein may be implemented using approximately 8000 lines of commented source code and approximately 1200 lines of assembly code (e.g., PowerPC assembly code) that may be used for a vector table and context swapping routines. The rest of the source code may be written in a higher-level language, such as C. The system core kernel may include a context swapping model, a process and threading model, a locking and process synchronization model, a simple scheduler, base system calls, and a basic device driver model.
The system described herein does not necessarily require specific device drivers, specific boot up or processor initialization code, a specific memory management model (for example, sbrk, malloc and free), specific networking code, and/or specific applications, although some of these functions may be useful for the system. Since the system is meant to function as an embedded operating system rather than as a general purpose base platform, everything not directly connected to essential kernel services may be designed for each implementation. For example, even if inter-process communications were not part of the core kernel, a very rich set of signals, semaphores and process synchronization functions may be provided as part of the core kernel to allow virtually any model of inter-process communication to be incorporated.
The system may be built using the Cygnus GnuPRO tool. The Cygnus GnuPRO libraries (e.g., the multi-threaded libc) may be used to provide basic routines such as string functions, etc. The kernel may use standard calling conventions based on traditional Unix API calls (open, close, read, write, ioctl, etc.) and traditional Unix libc system calls (printf, strcpy, atoi, etc.).
There are some calls that may be specific to the system described herein The system described herein is fully 32-bit, pre-emptive and/or cooperative, multi-threaded, and multi-tasking. However, the system may run in a single address space. In some embodiments, there is no definable xe2x80x9cuserxe2x80x9d or xe2x80x9ckernelxe2x80x9d memory space enforced by the operating system. In addition, in some embodiments, the kernel memory areas may be statically defined, thus reducing the need for dynamic memory allocation. However, although there may be no kernel support for such routines as sbrk( ), malloc( ) and free( ), any task thread may employ analogous functions as desired. For example, a TCP/IP stack application can manage its own buffer space, and provide callable functions for buffer management.
In order to run on many different types of hardware, the system described herein supports a very simple and powerful organization that includes CPU initialization and boot code, a CPU vector table, a context swapping model, a scheduler interrupt service routine, a process/threading model, critical regions (non-preemptable areas), a scheduler, a simple locking mechanism, process synchronization, a device driver model, system calls, and general API""s. Some of these items may be hardware specific, but comprise a very small portion of the kernel. The modules for these items may be written in assembly language. The rest of the items may all be written in a high level language, such as C. With the exception of the context block information held for each process, the routines may be non-hardware specific, thus greatly enhancing kernel portability.
The system described herein exhibits many benefits. For example, processes need not carry around enough stack space to support a context swap, since context swaps may be made using very little, if any, stack space. When there are many processes, the amount of memory saved may be considerable. In addition, since the maximum number of interrupts that can be stacked may be generally well-known at compile time, the number of nested contexts may be known, and thus the maximum number of context blocks may be determined and may be statically allocated. The use of statically allocated context blocks and stack blocks may greatly enhance the debugging process because each process""s stack frame may be isolated, along with the process state and therefore it is not necessary to xe2x80x9cguessxe2x80x9d which parts of a system stack frame belong to which process. The kernel itself does not need a stack of its own. Parts of the kernel may use their own small stacks, such as the scheduler which runs as a pseudo-process (but also could run as a process in other embodiments), but there is no requirement for a special xe2x80x9csystem onlyxe2x80x9d stack. All interrupt service routines may start with interrupts disabled. Thus, the decision of whether to re-enable interrupts may be deferred to run-time, provided that the maximum number of nested contexts is not exceeded.
Interrupt services may be designed such that there is a very small ISR that runs when the interrupt is taken, with the bulk of the functionality being deferred to a process. Under this scheme, the role of the ISR may be to flag process(es) that it should run. Since processes may run with interrupts enabled (under most circumstances), this allows the scheduling algorithm and processes to be the major factors determining system responsiveness, rather than ISR processing and context swapping time.


A motorized control for a derailleur for bicycles including a box accommodating a motor. The motor has a drive axle pivotally connected to a worm for actuating a transmission mechanism comprising a drive gear, a couple of driven gears engaging with the drive gear, and a control wheel. The bottom side of the control wheel is provided with two symmetrical posts round which a cable may be wound. Two microswitches are disposed at the outer periphery of the control wheel. When the posts of the control wheel touches the respective microswitches, the rotational angle of the control wheel may be controlled and the control wheel positioned. The box is mounted on the bicycle and electrical switches are installed at the handlebar. When the motor rotates in a clockwise or counter-clockwise direction, the cable may be controlled via the control wheel to become taut or relaxed to thereby control the speed of the bicycle.

(a) Field of the Invention
The present invention relates generally to a motorized control for a derailleur, and more particularly to a derailleur which may be operated by pressing switches on the handlebar to achieve change of speed of bicycles in an easy and safe way.
(b) Description of the Prior Art
In conventional bicycles with derailleur, as a general rule, a cable is provided to control the chain to wind round different gears to achieve change of speed. The cable is connected to a shifter at the handlebar. By moving the shifter, the cable may be pulled taut or released so as to control the chain to fit onto the gear of a different diameter. But since the cyclist has to grip the handlebar in order to keep balance, control of the shifter when riding may be difficult and dangerous.

3F.,No. 7-2, Alley 1, Lane 174, Sec. 1, Nan Ya Hsi Rd.


Systems, methods and apparatus are disclosed for targeted regeneration of a catalyst device in an exhaust aftertreatment system of an internal combustion engine. The targeted regeneration can include interpreting, initiating, and/or completing a regeneration event for an SCR catalyst or other type of catalyst in response to a catalyst deactivation condition. A catalyst regeneration event includes at least one of exposing the catalyst to a sufficiently high temperature over a time period that removes contaminants from the catalyst and manipulation of the exhaust gas composition to initiate and/or accelerate removal of contaminants from the catalyst.

Selective catalytic reduction (SCR) catalysts are subject to deactivation resulting from the various conditions encountered in the exhaust aftertreatment system. For example, deactivation can result from poisoning of the SCR catalyst caused by various sulfur compounds and hydrocarbon species present in the exhaust gas as well as other deactivation conditions. Other types of catalysts in the exhaust system, such as an ammonia oxidation (AMOX) catalyst, are also subject to deactivation conditions.
In exhaust systems that include, for example, active particulate filter regeneration, the particulate filter regeneration event can serve in part as a regeneration event for the SCR catalyst and other catalysts as well. However, certain aftertreatment systems do not include a particulate filter requiring periodic regeneration. In other systems or operating conditions, the regeneration event for a particulate filter may provide insufficient exposure to regeneration conditions to provide a desired catalyst regeneration outcome. In addition, the conditions which indicate a need for particulate filter regeneration may not indicate a deactivation condition for catalyst regeneration. As a result, the catalyst may be required to operate while contaminated until a particulate filter regeneration event occurs. Therefore, further technological developments are desirable in this area.

Targeted regeneration of a catalyst in an aftertreatment system