Masks are produced for the fabrication of semiconductor structures based on layout data that has information for defining a mask layout with individual geometric structure elements. Layout data generated previously for a mask layout is checked to see whether geometric design requirements are satisfied. In the event of a violation of design requirements, the corresponding error locations in the mask layout are located. Further layout data are then generated, which contain information for defining correction figures to correct the respective error locations. The further layout data are linked with the layout data, so that the layout data are modified. This permits automated modification of the layout data and their technology-dependent optimization.

The invention lies in the semiconductor technology field. More specifically, the present invention relates to a process for producing masks for the fabrication of semiconductor structures, in which the production of a mask is carried out using layout data which contains information for defining a mask layout having individual geometric structure elements.
In the area of the fabrication of semiconductor structures, for example during the production of integrated circuits based on semiconductor wafers, a large number of individual areas, for example conductor tracks, are subdivided onto the semiconductor wafers. This structuring is carried out with the aid of the lithographic technique in which, in particular, masks or mask structures are generated which are used for the production of semiconductor structures belonging to the integrated circuit in subsequent process steps. During the production of masks or mask structures, the main objective consists in particular in generating a large number of structures on the semiconductor wafer true to size, in correct positions and without defects.
The continuous decrease in the dimensions in the production of integrated circuits increasingly demands auxiliary structures, as they are known, or modifications of the mask structures generated during the drafting of the respective mask, in order that the feasibility of producing the mask to be produced is ensured. Auxiliary structures are used, for example, for planarization. They are electrically non-active and, at the same time, permit a certain amount of geometric freedom in drafting the corresponding mask structure. Examples of technological advantages which are achieved by the modification of mask structures are improvements in the imaging properties, enlargement of the process window (process window as a general term for the admissible scatter of process parameters), improvements in the planarization properties, increases in yield or more robust designs.
In processes for producing masks, the production of a mask is usually carried out using generated layout data which contains information for defining a mask layout. In this case, the mask layout has individual geometric structure elements, which represent the mask structures. It is often the case, during the generation of the layout data, that the generation of a number of mask levels is necessary in order to optimize the fabrication process.
With the increasing complexity of the mask layout or of the layout data about a mask to be produced, and given the decrease in the dimensions, it becomes more difficult and more time-consuming to carry out modifications to the mask structures or the layout data during the mask generation, for example manually, in order that the feasibility of production of the mask is ensured. At the same time, generation errors in layout data are to be eliminated. For this purpose, it is necessary to perform technology-dependent optimization of the layout data.
The object of the present invention is to provide a method of producing masks for the fabrication of semiconductor structures which overcomes the above-noted deficiencies and disadvantages of the prior art devices and methods of this general kind, and wherein the modification of generated layout data about a mask to be produced is carried out in order to eliminate generation errors, so that the feasibility of producing the mask is ensured and which permits relatively quick modification of the layout data and its technology-dependent optimization.
With the above and other objects in view there is provided, in accordance with the invention, a method of producing masks for fabricating semiconductor structures, which comprises:
generating layout data with information defining a mask layout with individual geometric elements;
defining geometric design requirements and an arrangement for the individual structure elements;
checking the layout data as to whether the geometric design requirements and the arrangement for the individual structure elements are satisfied;
if the design requirements are not satisfied, locating corresponding error locations in the mask layout using the layout data;
generating further layout data with information for defining correction figures to correct the respective error locations; and
linking the layout data with the further layout data for modifying the layout data.
In accordance with an added feature of the invention, the further layout data are generated by modifying the layout data at the respective error locations.
In accordance with an additional feature of the invention, the layout data are generated for a single mask level or for a plurality of mask levels, and performing the method for each of the mask levels.
In sum, the above objects are achieved by a process for producing masks for the fabrication of semiconductor structures, in which the production of a mask is carried out using layout data which contains information for defining a mask layout which has individual geometric structure elements. The novel method includes the following steps:
layout data about a mask layout to be produced are generated;
geometric design requirements for individual structure elements and their disposition are defined;
the layout data are checked to see whether the geometric design requirements for the individual structure elements and their disposition are satisfied;
in the event that the design requirements are violated, the corresponding error locations in the mask layout are located using the layout data;
further layout data are generated which contain information for defining correction figures to correct the respective error locations; and
the layout data are linked with the further layout data so that the layout data are modified.
In order to carry out the process, use is made of the fact that the structure elements and their design requirements may be characterized by so-called situation-describing attributes. For example, isolated lines are distinguished by the attribute that, at a specific spacing, they are not adjacent structures. Structures for specific mask levels for improving the planarization properties are described by the attribute of an adequately large structure on the mask level to be planarized. Such attributes can be found and classified using software for physical verification (for example xe2x80x9cVampirexe2x80x9d). These classified attributes are also referred to as xe2x80x9cmarkersxe2x80x9d. These markers are then used to modify the layout data as a function of the situation.
As described in the introductory text above, during the generation of layout data about a mask to be produced, generation errors are produced because of higher and higher requirements relating to the production of integrated circuits, and said generation errors violate defined design requirements. Such generation errors are, for example, violations of the spacing or width of the structure elements of the mask layout. Once the corresponding error locations have been located in the mask layout, they are corrected by superimposing correction figures, which are intended to have the effect of eliminating the violation of the design requirements. In this connection, it is also possible to speak of repairing a data state in the mask design by means of so-called repair figures.
The further layout data, which contain the information for defining the correction figures are therefore generated with reference back to the mask requirements. The further layout data are, for example, generated by modifying the layout data at the respective error locations. Once layout data about a mask to be produced have been generated for one or more mask levels, then the process can advantageously be carried out for each of the mask levels.
The method according to the invention permits the errors produced during the generation of the layout data about a mask to be produced to be rectified completely, fully automatically and in accordance with technologically predefined optimization criteria. At the same time, the process can be integrated relatively simply into existing standard design flows. It is possible for various technological boundary conditions for the generation of the layout data to be predefined, so that a solution optimized in accordance with these boundary conditions can be found. At the same time, the process can be configured in such a way that manual reworking can be dispensed with, which means that the process is accelerated overall.
The generation errors can be eliminated by adding correction figures at the corresponding error locations or by cutting back the structure elements at the error locations. In the first case, the layout data at the respective error locations are linked additively to the further layout data in order to define the correction figures. In the second case, the layout data at the respective error locations are linked subtractively with the further layout data (subtractive correction figures).
By adding correction figures, the original mask layout or its structure elements and their disposition can be changed. As described at the beginning, during the fabrication of auxiliary structures belonging to an integrated circuit and electrically non-active in the integrated circuit, there is a certain amount of geometric freedom in configuring the structure elements and in their disposition. The method according to the invention can therefore advantageously be employed to produce masks which are used for fabricating auxiliary structures in an integrated circuit.
If the process is used to produce masks for fabricating semiconductor structures belonging to an integrated circuit, the structures being electrically active, then when the process is being carried out, care must be taken that the so-called connectivity relationships between the structure elements of the mask are not changed during the modification of the layout data.
In order to avoid repeated correction or repair of identical configurations with regard to propagation time and memory resources, it is advantageous to make use of an existing hierarchical structure of the layout data. To this end, by using the process, the layout data is modified successively in accordance with its hierarchical structure, taking account of the respective geometric context. At the same time, account is taken of the fact that individual structure elements or their disposition in the mask layout repeat regularly and, in so doing, can be combined to form a higher-order functional group in a hierarchical structure. If a correction of such a functional group at a specific hierarchical level is made, it is then advantageous to apply this directly to other comparable functional groups at the same or higher hierarchical levels, taking into account the geometric context of the respective functional group.
In order to avoid repeated, complicated solving of identical generation faults or optimization problems, it is advantageous to store the geometric configurations with associated correction figures in a data library and to reuse the results. For this purpose, the layout data about a mask to be produced, and the respectively associated further layout data for defining associated correction figures, are stored in a data library.
In accordance with another feature of the invention, the steps of checking the layout data, checking a location of the error locations, generating the further layout data, and linking the layout data with the further layout data are successively carried out until no more design requirements are violated. In other words, all the errors which are produced during the modification of the layout data (so-called secondary errors) are eliminated iteratively. To this end, the steps of checking the layout data, the location of the error locations, the generation of the further layout data and the linking of the layout data with the further layout data are carried out successively until no design requirements are violated any more. Existing secondary errors are therefore eliminated by the repeated application of the checking and modification steps.
In accordance with again another feature of the invention, the method also comprises:
generating the further layout data by edges of the correction figures being configured;
using a geometric context of the configured edges to set up inequalities for the edges of the correction figures describing potential positions of the edges;
setting up an optimization criterion relating to the geometric requirements on the correction figures;
applying a mathematical optimization method to determine the respective positions of the edges, so that in each case the inequalities set up and the optimization criterion are satisfied; and
defining the correction figures by the determined positions of the edges.
In other words, in this further embodiment of the method according to the invention, the correction figures are configurable. To this end, the further layout data are generated in such a way that the edges of the correction figures are configured. From the geometric context of the configured edges, inequalities for the edges of the correction figures are set up, said inequalities describing the potential positions of the edges. An optimization criterion relating to the geometric requirements on the correction figures is set up. In order to determine the respective positions of the edges, a mathematical optimization method is applied, so that in each case the inequalities set up and the optimization criterion are satisfied. As a result, the correction figures are defined by the determined positions of the edges. With this embodiment of the process, the correction figures can be generated in a context-dependent manner and in accordance with the optimization criteria and precisely in the form needed. In this way, no secondary errors are produced.
Other features which are considered as characteristic for the invention are set forth in the appended claims.
Although the invention is illustrated and described herein as embodied in a process for producing masks for the fabrication of semiconductor structures, it is nevertheless not intended to be limited to the details shown, since various modifications and structural changes may be made therein without departing from the spirit of the invention and within the scope and range of equivalents of the claims.
The construction and method of operation of the invention, however, together with additional objects and advantages thereof will be best understood from the following description of specific embodiments when read in connection with the accompanying drawings.

Method of producing masks for fabricating semiconductor structures


A method for providing a space market widget by a market server is disclosed. The method includes: generating the space market widget; forming applications related to the space market widget as objects arranged in the space market widget; transmitting the objects to a user device in which the space market widget is installed; requesting installation of objects moved to an arrangement space from a market space of the space market widget; and transmitting the applications corresponding to the moved objects to the user device so as to be installed in the user device, wherein the space market widget includes a market space displaying the objects that are not yet installed in the user device and an arrangement space arranging and displaying the objects installed in the user device.

(a) Field
Methods and apparatuses consistent with exemplary embodiments relate to a method for providing a space market widget, and a market server and a user device thereof.
(b) Description of the Related Art
An application market is a market that sells applications. Developers register applications in the application market and users access the application market to purchase the applications.
Referring to FIG. 1, in the conventional art, the application market has provided application lists.
In this case, a user installs applications in the user device one by one. Therefore, when the user wants to install a plurality of applications having high relevance, the user needs to download the applications from the application market one by one. Further, even though the user installs the plurality of applications in the user device, the user has no choice but to bind the applications in a folder and manage them. In addition, the user needs to check newly registered applications by accessing the application market at all times.
The above information disclosed in this Background section is only for enhancement of understanding of the background of the inventive concept and therefore it may contain information that does not form the prior art that is already known in this country to a person of ordinary skill in the art.

Method for providing space market widget, market server and user device thereof


A system for on-chip testing of embedded memories using Address Space Identifier (ASI) bus in Scalable Processor ARChitecture (SPARC) microprocessors. An integrated circuit includes a plurality of memory arrays, Address Space Identifier (ASI) bus interface logic connected by an ASI bus to the plurality of memory arrays, and a memory control unit and a memory built-in self-test (MBIST) engine connected to the ASI bus interface logic. Rather than direct access, the MBIST engine utilizes the ASI bus interface logic and the ASI bus to perform memory testing. The MBIST engine, programmed with memory array parameters, includes a programmable state machine controller to which is connected a programmable data generator, a programmable address generator, and a programmable comparator. The data generator provides data as appropriate. The address generator provides addresses as appropriate. The comparator provides test results information for the particular test situation. The MBIST engine generates a test status output.

In the integrated circuit industry, it has long been the practice to locate both data processing circuitry and memory storage circuitry on the same integrated circuit (IC) or "chip." This is especially the case for complex ICs such as microprocessors. In fact, there are typically a number of different memory arrays on a single microprocessor chip. The memory arrays can come in different forms and sizes and may perform a variety of general or dedicated functions. For example, one memory array may be an instruction cache and another may be a data cache. At various times in the life of any IC, it becomes necessary or desirable to test these memory arrays for structural defects. Conventionally, memory array testing can be performed by providing test stimulus and observing test response externally, internally, or a combination of the two. As the number and complexity of the memory arrays have increased, the dependence on external testing alone has decreased. External testing requires expensive tester resources such as automatic test equipment (ATE). Also, external testing alone is performed at a slower speed than can be achieved through internal testing. Internal testing can be performed at the rated speed of the chip being tested. At-speed testing takes less time and gives better defect detection capability. Memory testing by way of internal or on-chip circuitry is known as memory built-in self-test (memory BIST or MBIST) or array built-in self-test (array BIST or ABIST). Generally, the main component of the circuitry, called an MBIST engine, performs one or more test algorithms on one or more of the various memory arrays. For memory testing, one class of algorithms is known as the March algorithms for the methodical way the test sequence advances from one memory location to another. There are a number of March algorithms popular in the industry because the various test algorithms target different defect mechanisms or faults. It may be that more than one test algorithm is desired or required to identify the various types of faults. For example, one March algorithm, known as the moving inversions (MOVI) test, sequentially writes and reads through the memory array in such a way that all single stuck-at faults, address faults, transition faults, and coupling faults in the memory array may be detected. Generally, the on-chip test circuitry is organized in either a central or a distributed configuration. In the central configuration, there is one MBIST engine which controls the testing of all of the various memory arrays. In the distributed configuration, there is a dedicated MBIST engine that controls the testing of a specific memory array. Each of the dedicated MBIST engines is located in close proximity to its associated memory array. By general comparison, the former has less circuitry that is more complicated and the latter has more total circuitry that is less complicated. Further, the former has more wire routing in terms of length than the latter.
Taken together, the memory space of the various memory arrays in the IC can be logically viewed as the complete address space of the IC. The individual memory arrays are then viewed as a logical partition of this unified address space. The individual memory arrays can be identified by their address locations in the unified address space. One example of such organization, called the Address Space Identifier (ASI) architecture, is provided by the Scalable Processor ARChitecture (SPARC) microprocessor specification. The SPARC specification is an open specification created by the SPARC Architectural Committee of SPARC International. One can implement a microprocessor chip that is compliant with the SPARC specification by securing a license from SPARC International. The SPARC specification is well known and will serve as the basis of the discussion that follows. However, this is not to be interpreted as meaning that the following discussion is strictly limited to the SPARC specification.
Turning first to FIG. 1, a block diagram of relevant portions of an IC 10 is shown. The IC 10 includes a memory control unit (MCU) 12, core logic 14, ASI bus interface logic 16, and one or more memory arrays 18. The ASI bus interface logic 16 and the memory arrays 18 are connected by the ASI bus as shown. One of ordinary skill in the art will recognize that a conventional IC will likely include other blocks that are not shown here in the interest of clarity. The core logic 14 may include a wide assortment of logic for data processing. The core logic 14 may not necessarily be a single entity as shown. The block designated as memory arrays 18 may include any number of memory arrays. The various memory arrays will likely come in different forms and sizes and will likely be located in different regions of the IC. All of the various memory arrays are accessible via an ASI bus. The protocol of the ASI bus is controlled by the ASI bus interface logic 16. The ASI bus may be connected to the ASI bus interface logic 16 in any number of arrangements. The SPARC specification does not dictate the arrangement to be used. Two common arrangements are a loop and a star topology. In the loop topology, a first memory array is connected to the ASI bus interface logic 16 and to a second memory array. The second memory array is in turn connected to a third memory array which is in turn connected to the next memory array. This pattern is continued until the last memory array is connected back to the ASI bus interface logic 16. The memory arrays are said to form a loop or chain. In the star topology, each of the memory arrays is connected directly to the ASI bus interface logic 16 in a radiating pattern that is said to resemble a star. Other arrangements and combinations of arrangements exist. The actual arrangement is not critical so long as, whatever the arrangement, it is known by the ASI bus interface logic 16 so that any latency of accessing a specific memory array can be accounted for. Of course, for the IC designer, the actual arrangement will have implications on the routing area required for the physical implementation of the network of memory arrays 18.
Each of the various memory arrays 18 will include a plurality of memory locations (not shown). The number of memory locations will depend on the circumstances such as the function of the specific memory array. According to the current SPARC specification each of the memory locations is identified by an address consisting of two elements. The first element is a unique ASI for each memory array which distinguishes one memory array from another. For example, if the memory arrays 18 include an instruction cache and a data cache, then each will have a different ASI. The second element is an address which identifies an offset into its associated address space which corresponds to a particular memory location. Taken together, the two elements guarantee that each memory location on the IC has a unique address. The SPARC ASI specification also currently stipulates a data field, a read-strobe, and a write-strobe. Taken together these elements are collectively referred to as the ASI bus protocol of a SPARC microprocessor. The ASI bus standardizes the access of all of the memory arrays without necessitating knowledge of their physical structure.

On-chip testing of embedded memories using Address Space Identifier bus in SPARC architectures


Disclosed is an approach for detecting that a state of an air-conditioning system in a building has changed and ultimately determining the air-conditioning system's operating pattern, which could help improve collection and/or use of crowdsourced data for an indoor positioning solution and thus lead to more accurate position estimates. According to the disclosed approach, processor(s) may receive pressure and movement data from a mobile device. The pressure data may indicate a pressure change, and the movement data may indicate a movement pattern of the mobile device that occurred substantially during the pressure change. Given this, processor(s) could make a determination that the movement pattern lacks a substantial change in altitude of the mobile device during the pressure change and could use this determination as basis to detect that the state of the air-conditioning system has changed.

In practice, indoor positioning technologies could provide for numerous benefits, such as by enabling indoor navigation and/or tracking of assets inside of buildings, among other possibilities. Generally speaking, an indoor positioning solution can be commercially successful if it is globally scalable, has low deployment and maintenance costs, and offers an acceptable end-user experience. To facilitate this, the solution could be based on existing infrastructure in buildings and on existing capabilities in consumer devices, such as on radio (e.g., Wi-Fi and/or Bluetooth) technologies that are already supported in numerous consumer devices on the market.
One approach for such radio-based indoor positioning could involve crowdsourced collection of data from mobile devices (e.g., data representing measurements of radio signals respectively observed by the mobile devices), which may then be used for generating radio map(s). A radio map may effectively model a radio environment in an indoor area, and could enable an entity (e.g., a server or a mobile device) to determine characteristics of radio signals that are expected to be observable respectively at different locations in the indoor area. Given this, the entity could compare further (e.g., radio) measurements from a mobile device to the radio map, to estimate a position of the mobile device in the indoor area.
The crowdsourcing process could involve collection of altitude data from mobile devices in a building, which would be particularly beneficial for enabling a three-dimensional (3D) indoor positioning solution. Typically, due to structures of multi-level buildings, radio measurements (e.g., received signal strengths) in a horizontal location of an indoor area may vary significantly as a function of altitude/floor level. Given this, the crowdsourcing process may involve collection of altitude data from mobile devices, which may represent absolute and/or relative altitude(s) and/or may take the form of pressure data representing pressure measurements useful for determining such altitude(s). For instance, a mobile device could provide a "fingerprint" to a server configured to generate a radio map, the fingerprint including radio measurement(s) by the mobile device and altitude data representing an altitude of the mobile device substantially during the radio measurement(s). As such, the server could associate certain altitude data with certain radio measurements, so as to generate a radio map that accurately represents characteristics of radio signals expected to be observable respectively at different attitudes/floors of an indoor area, which in turn could enable accurate positioning estimations, e.g., in a multi-level building.
Although the above-described crowdsourcing process could help quickly build global coverage, there are various technical challenges associated with such a process. For instance, altitude data collected during the crowdsourcing process may sometimes be inaccurate, thereby potentially leading to generation of an inaccurate radio map and ultimately to inaccurate position estimates, which is problematic. Often, such inaccuracies may arise due to collection of crowdsourced data taking place while an air-conditioning system in a building is off.
More specifically, a barometer is typically relied upon to provide altitude data in the crowdsourcing process, because it is the only sensor that can ubiquitously provide information related to device altitude changes in consumer mobile devices. Generally, a barometer is configured to measure atmospheric (air) pressure in the environment. And because air pressure outdoors changes with altitude in a predictable manner (e.g., according to the well-known barometric formula), the barometer's pressure measurement(s) could be used for estimating altitude(s) of a mobile device.
Unfortunately, although the predictable relationship between pressure and altitude changes typically holds true in an outdoor environment, it does not always hold true in an indoor environment. In particular, the stack effect (also known as the chimney effect) relates to movement of air into and out of building due to a difference in air density between the inside and outside of the building. This difference in air density could result from temperature (e.g., heat) and/or moisture differences, among other possibilities. In any case, the stack effect may be problematic, because it may cause (i) indoor pressure in lower floors of a building to be lower than the pressure outdoors, and (ii) indoor pressure in higher floors of the building to be higher than the pressure outdoors, thereby leading an abnormal relationship between pressure and altitudes changes inside of the building (e.g., an abnormal vertical pressure gradient). Because this relationship may be abnormal, a barometer could inadvertently provide inaccurate altitude data inside of the building (e.g., due to pressure measurements that are unexpected at a given altitude of the mobile device).
Although the stack effect could present some issues, it is often possible to effectively remove the stack effect through use of an air-conditioning system in a building. When an air-conditioning system in a building is on, the pressure difference between the inside of the building and the outside of the building is kept either negative (the inside of the building has a lower pressure than the outside of the building) or positive (the inside of the building has a higher pressure than the outside of the building). This effectively removes the abnormal vertical pressure gradient that is caused by the stack effect, thereby makes the relationship between pressure and altitude inside of the building more predictable. As a result, a barometer is likely to provide more accurate altitude data when an air-conditioning system in a building is on compared to the altitude data it would provide when the air-conditioning system is off.
Given this, altitude data that is collected when an air-conditioning system in a building is on may be considered to be more accurate, reliable, and trustworthy. Thus, during the described crowdsourcing process, it would be more beneficial to collect data when the air-conditioning system is on, rather than off.
At issue then is how to automatically detect that a state of an air-conditioning system has changed (e.g., that the air-conditioning system has been switched on or off) A technical solution for accurately detecting the change at issue could help give rise to a globally scalable and high-definition 3D indoor positioning technology.

Analyzing a mobile device's movement pattern during a pressure change to detect that a state of an air-conditioning system has changed


An environment control system for a body of an aircraft that provides controlled ventilation of the interior space of an aircraft body, facilitating reduction of volatile organic compounds (VOCs) within cabin air, dehumidifying and reducing moisture condensation and thus corrosion and other moisture related problems within the envelope, allowing increased humidification of cabin air, and allowing suppression of fires within the envelope. The environment control system includes at least a cabin and an envelope. It includes supply means for supplying a flow of dry ventilation air to the aircraft body. An airflow control device is capable of dividing the flow of ventilation air onto an envelope ventilation air stream and a cabin ventilation air stream. An envelope ventilation duct system directs the envelope ventilation air stream into the envelope, and a cabin duct system directs the cabin ventilation air stream into the cabin. An anti-corrosion/sorption treatment is applied to surface subject to condensation in the envelope. A return air control unit is provided for selectively drawing return air from one of the envelope and the cabin. The environment control system can be incorporated into new aircraft construction, or can be installed as a retro-fit into existing aircraft.

The present invention relates to a method and apparatus for controlling the environment within an enclosed space. More particularly, the present invention relates to an environmental control system for providing controlled ventilation of the interior space of an aircraft body, such that interior condensation and corrosion is reduced, cabin air quality is improved, the cabin can be humidified to healthy levels without increasing condensation and associated deleterious effects, and envelope fires can be directly suppressed and vented.
In the embodiments of the invention described below and illustrated in the appended drawings, the xe2x80x9cbodyxe2x80x9d of an aircraft is comprised entirely within the fuselage, and excludes the wings and tail surfaces, as well as those portions of the nose and tail cones which extend beyond the respective nose and tail pressure bulkheads. However, it will be understood that the present invention is equally applicable to other aircraft geometries (such as, for example flying wing and lifting body designs). Thus in general, and for the purposes of the present invention, the xe2x80x9cbodyxe2x80x9d of an aircraft will be considered to be that portion of the aircraft which is pressurized during normal cruising flight, and within which it is desirable to control the environment in order to enhance safety and comfort of passengers and crew.
For the purposes of the present invention, the body of an aircraft is considered to be divided into a cabin, one or more cargo bays, and an envelope which surrounds both the cabin and the cargo bay(s). The terms xe2x80x9ccabinxe2x80x9d and xe2x80x9caircraft cabinxe2x80x9d shall be understood to include all portions of the interior space of the aircraft which may be occupied during normal flight operations (i.e. the passenger cabin plus the cockpit) The term xe2x80x9cenvelopexe2x80x9d shall be understood to refer to that portion of the aircraft body between the cabin (and any cargo bays), and the exterior surface of the pressure shell (including any pressure bulkheads) of the aircraft. In a conventional jet transport aircraft, the envelope typically comprises inter alia the exterior fuselage skin; nose, tail and wing root pressure bulkheads; insulation blankets; wire bundles; structural members; ductwork and the cabin (and/or cargo bay) liner.
The term xe2x80x9cventilation airxe2x80x9d is defined as outside air typically introduced as bleed air from an engine compressor. For the purposes of this invention, xe2x80x9cventilation airxe2x80x9d shall be understood to be outdoor air brought into the cabin by any means, for example, engine bleed air, either with or without filtering. xe2x80x9cVentilation airxe2x80x9d does not include recirculation air or cabin air, filtered or otherwise reconditioned, which is supplied back into the interior space of the aircraft. For the purposes of this invention, xe2x80x9crecirculation airxe2x80x9d shall be understood to comprise air drawn from the interior space of the aircraft, possibly conditioned, and then returned to the cabin.
To facilitate understanding of the present invention, the following paragraphs present an outline of condensation/corrosion, air quality, and fire problems encountered in typical jet transport aircraft, and conventional measures taken to address such problems.
Aircraft are subjected to sub-zero temperatures (e.g., xe2x88x9250xc2x0 C.) when flying at cruising altitudes. While the aircraft skin is slightly warmer than outside air due to air friction, temperatures behind and within the insulation blankets (particularly adjacent the skin) cool to 0xc2x0 C. to xe2x88x9240xc2x0 C., depending upon flight duration and altitude. When cabin air passes behind the insulation, it can reach the temperature at which its moisture starts to condense (i.e., its dew point). Further cooling beyond this temperature will result in additional condensation (as liquid water or ice) on the skin and other cold sinks.
Cabin air circulates behind the insulation, drawn through cracks and openings by pressure differences created when the cabin is depressurized during ascent for example, and during flight by stack pressures (buoyancy effect). Stack pressures are created by density differences between the cooler air behind the insulation and the warmer air in front of the insulation. The density difference creates a slight negative pressure in the envelope (relative to the cabin) near the ceiling of the cabin and a slight positive pressure in the envelope near the floor of the cabin.
The effects of this condensation range from a simple nuisance through increased operation costs to decreased aircraft life. The more an airplane is used, the greater its occupant density and the lower the ventilation rate per person, the higher its potential for condensation problems. Cases have been reported of water dripping from the cabin paneling. Wetting of insulation increases thermal conduction and, over time, adds weight, increasing operating costs. This condensation increases the potential for electrical failure. It can lead to the growth of bacteria and fungi. It causes corrosion, leading to earlier fatigue failure and reduced aircraft life. Some estimates place capital and maintenance costs attributable to such condensation at up to $100,000 annually for larger, heavily utilized passenger aircraft.
Conventionally, passive measures have been used to cope with the envelope moisture problem. These include anti-corrosion coatings, drainage systems, and deliberately maintaining cabin humidity well below American Society of Air-Conditioning Engineers (ASHRAE) Standard recommended levels.
U.S. Pat. No. 5,386,952 (Nordstrom) teaches a method for preventing moisture problems by injecting dehumidified cabin air into the envelope. However, the installation of dehumidifiers, as taught by Nordstrom, increases electrical consumption, occupies additional volume, and adds dead weight. Thus in a recently published study (xe2x80x9cControlling Nuisance Moisture in Commercial Airplanesxe2x80x9d) Boeing Aircraft Company concluded that active dehumidification systems, such as those taught by Nordstrom, are not cost-effective, even though they can reduce moisture condensation within the envelope. Additionally, the dehumidification system taught by Nordstrom is incapable of addressing related cabin air quality issues, as described below.
Relative humidities above 65 percent which commonly occur in aircraft envelopes for even relatively low cabin humidities can support microbial growth under appropriate temperature conditions. Such growth can include Gram-negative bacteria. yeasts and fungi. Where sludge builds up anaerobic bacteria may grow, producing foul smelling metabolites. Saprophytic microorganisms provide nutriment for Protozoa. Exposure to aerosols and volatile organic compounds (VOCs) from such microbial growth can result in allergenic reactions and illness.
The relative humidity of outside air at typical cruising altitudes is frequently less than 1-2% when heated and pressurized to cabin conditions. Consequently, since cabin air normally is not humidified, on longer flights some passengers may experience dryness and irritation of the skin, eyes and respiratory system, while asthmatics may suffer incidences of bronchoconstriction. High air circulation velocities compound this problem. While humidification of the cabin air during flight would alleviate the xe2x80x9cdrynessxe2x80x9d problem, it would also exacerbate the potential for microbial growth and damp material off-gassing in the envelope.
Thus, although it would be of benefit for health purposes to maintain higher cabin air relative humidities which are within the ASHRAE (American Society of Heating, Refrigerating and Air-Conditioning Engineers) Standard, this is made impracticable by the envelope condensation problem.
Other air contaminants in aircraft causing sensory irritation and other health effects can originate from ventilation air, passengers, materials, food, envelope anti-corrosion treatments, envelope microbial growth, etc. Ventilation air contaminants originate outdoors and within the engine (when bleed air is used). Potential contaminant gases and particulate aerosols include:
combusted, partially combusted and uncombusted hydrocarbons (alkanes, aromatics, polycyclic aromatics, aldehydes, ketones);
deicing fluids;
ozone, possibly ingested during the cruise portion of the flight cycle; and
hydraulic fluids and lubricating oils, possibly originating from seal leakage within the engine.
Gas chromatography/mass spectrometry (GC/MS) head space analyses of engine lubricating oil (FIG. 9a), jet fuel (FIG. 9b), and hydraulic fluid (FIG. 9c) indicate some of the potential VOCs that might be found in aircraft ventilation air.
FIG. 8a shows a GC/MS plot of a ventilation air sample taken in a jet passenger aircraft during the cruise portion of the flight cycle (28000 ft and xe2x88x9234xc2x0 C.) The total concentration was 0.27 mg/m3 at a cabin pressure altitude of approximately 8000 ft. For comparison, ventilation air VOC concentrations for downtown buildings typically are less than a third of this concentration. VOCs identified include 3-methyl pentane, hexane, 3-methyl hexane, toluene, hexanal, xylene, and many C9-C12 alkanes. Additional compounds reported by other researchers include formaldehyde, benzene and ethyl benzene. Many of the compounds in the jet fuel (FIG. 9b) can be seen in this ventilation air sample. The total VOC (TVOC) concentration was 0.27 mg/m3 at a cabin pressure altitude of approximately 8000 ft. Of this some 0.23 mg/m3 could have a petroleum (combustion source). The TVOC concentration is equivalent to a TOC exposure of 0.36 mg/m3 at sea level. In comparison, urban residential ventilation air TVOC concentrations are typically less than one-third this aircraft ventilation air concentration (i.e.,  less than 0.03 mg/m3), and building room air TVOC concentrations typically are less than 0.5 mg/m3. One postulate for the high VOC concentrations found in aircraft is that periodic incidents of lubricating oil leakage produce aerosols which enter the ventilation system and progressively coat the interior surfaces of the supply ducts. This coating, in turn, could sorb VOC""s ingested during taxi from the exhaust of other aircraft. These VOC""s may subsequently be released into the cabin during flight.
Contaminated ventilation air increases ventilation rate requirements to achieve any particular space concentration target. For example, a ventilation rate with TVOCs=0.36 mg/m3 must be three times higher than one with TVOCs=0.036 mg/m3 to maintain a room TVOC concentration of 0.5 mg/m3.
Cabin air contaminants can originate from materials and, possibly microbial growth in the envelope as well as from cabin furnishings, food and passengers. Contaminants in the envelope enter the cabin when cabin air is circulated behind the insulation drawn there by envelope stack pressures and by decreasing cabin pressures (for example, during ascent).
FIG. 8b shows a GC/MS plot of envelope air in an aircraft parked when the temperature in the air space between the skin and insulation was approximately 35xc2x0 C. The total (TVOC) concentration was 22 mg/m3. Of this, some 21 mg/m3 had a petroleum source and 0.6 mg/m3 could have had a microbial source. VOCs from one source of these envelope contaminants, an anti-corrosion treatment, is illustrated in FIG. 9e. This head space sample was taken at xe2x88x925xc2x0 C., a temperature representative of the temperature behind the insulation during the early portions of cruising flight. This anti-corrosion treatment emitted many of the compounds seen in the envelope and the ventilation air, plus a number of cycloalkanes and aliphatics not seen in the other samples. FIG. 9d shows the head space GC/MS plot of a general purpose cleaner (2-butanone or methyl ethyl ketone) used on this aircraft. This compound was also identified in the envelope, engine oil, ventilation air and anti-corrosion treatment samples.
When the envelope is cooled in flight or warmed on the ground, envelope material off-gassing and sorption of contaminant gases change. For example under ideal conditions, the deposition of VOCs of interest behind the insulation could increase a hundred-fold for temperature decreases over the typical flight cycle temperature range.
Condensation of higher molecular weight compounds at higher concentrations may occur when the envelope is cooled. For example, the maximum concentration of dodecane (a compound found in the ventilation air and anti-corrosion treatment samples), at xe2x88x9240xc2x0 C. is 0.26 mg/m3.
One implication of the above is that during the ascent and the early portions of the cruise flight cycle while the envelope is still relatively warm, envelope VOCs could pose an air quality problem for passengers. Another implication is that cabin air VOCs will be deposited (sorbed) in the envelope when it is cold, particularly during later stages of the cruise portion of the flight cycle. For example, both ventilation air VOCs (FIG. 8a) and the cabin cleaner VOC (FIG. 9d) can be found in the envelope air sample (FIG. 8b).
Some aircraft have high efficiency particulate filters (HEPA) filters which will remove human microbial aerosols that enter the circulation system. Some have catalytic converters to remove ozone. Very few have sorbent air cleaners to remove ventilation-air and cabin VOCs.
In the case of a fire, thermal and electrical insulation systems in the envelope as well as other materials in the cabin can undergo pyrolysis and burning, generating toxic smoke and combustion products. Conventionally, this problem is addressed by employing fewer combustible materials, and using hand-held containers with non-toxic fire suppressants. Currently, insulation is under review in this regard with a prevention program potentially involving more than 12,000 commercial aircraft.
Under any cabin fire emergency, the objective is to exhaust the smoke from the cabin while suppressing the fire. There is currently no method in place to directly suppress or extinguish fire and/or pyrolysis within the envelope. Nor is there any effective means of preventing smoke within the envelop from penetrating into the cabin. Furthermore, exhaustion of air from the cabin is usually via grilles at the floor. which undesirably enhances smoke circulation throughout the cabin.
U.S. Pat. No 4,726,426 (Miller) teaches a method of fire extinguishment in aircraft cabins using ventilation ducts in communication with the cargo fire extinguishment system. However, this system does not address envelope fires and/or pyrolysis, or the health and safety problems associated with exposing, passengers to potentially lethal combinations of fire suppressants and their combustion products in combination with fire and smoke.
It is an object of the present invention to provide an environment control system that overcomes the above-noted deficiencies in the prior art.
It is a further object of the present invention to provide an environment control system capable of inhibiting moist cabin air from contacting cold surfaces of the envelope, thereby reducing moisture condensation within the envelope, and associated xe2x80x9crain-in-the-planexe2x80x9d, electrical failures, corrosion, microbial growth, and dead weight.
It is a further object of the present invention to provide an environment control system capable of reducing infiltration of smoke from the envelope into the interior cabin space, thereby increasing passenger and crew safety during an in-flight fire situation.
It is a further object of the present invention to provide an environment control system capable of improving cabin indoor air quality (IAQ) by at least partially removing contaminants from ventilation air prior to entering the cabin.
Accordingly, an aspect of the present invention provides an environment control system for an aircraft including at least a pressure shell, an interior space including one or more of a cabin and a cargo hold, an envelope extending between the interior space and the pressure shell and a liner disposed between the interior space and the envelope. The environment control system comprises an envelope air distribution system having a plurality of nozzles located at spaced intervals and adapted to distribute an envelope air stream within the envelope in such a manner as to at least partially offset stack effect pressures.
Another aspect of the present invention provides an environment control system for an aircraft including at least a pressure shell, an interior space including one or more of a cabin and a cargo hold, an envelope extending between the interior space and the pressure shell and a liner disposed between the interior space and the envelope. The environment control system comprises an envelope air distribution system adapted to supply an envelope air stream to the envelope; and one or more flow-blockers adapted to at least partially block a flow of air within the envelope.
Another aspect of the present invention provides an environment control system for an aircraft including at least a pressure shell, an interior space including one or more of a cabin and a cargo hold, an envelope extending between the interior space and the pressure shell and a liner disposed between the interior space and the envelope. The environment control system comprises an envelope air distribution system adapted to supply an envelope air stream within the envelope; and sealing means adapted to at least partially seal the liner against leakage of air between the interior space and the envelope.
In embodiments of the invention, one or more flow-blockers are provided, and adapted to at least partially block a flow of air within the envelope. The envelope air distribution system may include a plurality of nozzles located at spaced intervals and adapted to distribute the envelope air stream within the envelope in such a manner as to at least partially offset stack effect pressures. Sealing means adapted to at least partially seal the liner against leakage of air between the interior space and the envelope may be included.
In embodiments of the invention, the envelope air distribution system may further include: at least one envelope supply duct; and at least one respective ventilation air branch line in communication with the envelope supply duct and one or more respective nozzles.
An insulation blanket may be disposed within the envelope between the liner and the pressure shell. At least one nozzle may be a shell-side nozzle adapted to inject envelope air between the insulation jacket and the pressure shell. At least one nozzle may be a cabin-side nozzle adapted to inject envelope air between the insulation jacket and the liner.
In embodiments of the invention, an air supply is adapted to generate the envelope air stream. The air supply may include an air supply duct adapted to conduct bleed air from a compressor stage of an engine of the aircraft into the body of the aircraft as ventilation air. The air supply may also include an airflow control device adapted to divide the flow of ventilation air into the envelope air stream and a cabin air stream. An air conditioner pack adapted to cool the ventilation air may also be included. The airflow control device may include at least one valve adapted for controlling the envelope air stream and the cabin air stream to maintain a predetermined pressure difference between the cabin and the envelope.
In embodiments of the invention, a cabin air distribution system is adapted to distribute the cabin air stream within the interior space of the aircraft body. The cabin air distribution system may include: an air conditioner communicating with the airflow control device for receiving at least a portion of the cabin air stream, and adapted to condition the cabin air stream to create cabin supply air; and a cabin supply air duct adapted to direct the cabin supply air into the cabin. The air conditioner may be adapted to control the relative humidity of the cabin supply air, e.g. to maintain a cabin relative humidity level in excess of 20%.
In embodiments of the invention, the sealing means is adapted to limit a leakage area of the cabin liner such that a predetermined pressure difference between the interior space and the envelope can be maintained at a predetermined minimum ventilation rate. The minimum ventilation rate may be about 0.55 lbs per passenger or less. The leakage area may be equivalent to about 73 cm2) per passenger, or less.
In embodiments of the invention, at least one flow blocker is arranged to reduce stack effect air flows within the envelope. The flow-blockers may be arranged to divide the envelope into one or more sections. In such cases, the envelope air distribution system may be adapted to control envelope ventilation within a section independently of other sections. At least one section may formed by dividing at least a portion of the envelope longitudinally, e.g. to form at least one section within a crown of the envelope. At least one section may be formed by dividing the envelope laterally, e.g. to form at least one section within a cockpit portion of the envelope. At least one section may formed by dividing the envelope both longitudinally and laterally, to form at least one section within the envelope proximal a food preparation area of the cabin.
In embodiments of the invention, a return air control unit is capable of drawing a return air stream from a selected one of the interior space and the envelope The return air control unit may include a housing, a first opening defined in the housing and in communication with the envelope, a second opening defined in the housing and in communication with the interior space, and a damper capable of selectively closing one of the first opening and the second opening. An outflow valve may be adapted to divide the return air stream into an exhaust air stream and a recirculation air stream, the exhaust air stream being vented out of the aircraft, and the recirculation air stream being supplied back to the cabin. The recirculation air stream may be supplied to the cabin via an air conditioner.
In embodiments of the invention an anti-corrosion/VOC sorption treatment is applied to an interior surface of the aircraft structure within the envelope. The anti-corrosion/VOC sorption treatment may be formulated to provide acceptable characteristics of: adhesion to metal surfaces; hydrophobic; low flammability; and low off-gassing at typical envelope temperatures during cruising flight. The anti-corrosion/VOC sorption treatment is formulated to: resist solidification within the aircraft envelope; sorb ventilation air VOCs at typical envelope temperatures during cruising flight and desorb said ventilation air VOC""s at warmer temperatures substantially without hysteresis.
In embodiments of the invention, a fire suppression system is provided in communication with the envelope air distribution system. The fire suppression system is preferably capable of releasing a flow of chemical fire suppressant into at least the envelope air distribution system when smoke or fire is detected in the envelope. The fire suppression system and the envelope air distribution system may be adapted to cooperate to flood at least a portion of the envelope with the chemical fire suppressant. The fire suppression system may include a container of chemical fire suppressant, a supply line in communication with the container and the envelope air distribution system for conducting the chemical fire suppressant between the container and the envelope air distribution system and a valve capable of controlling a flow of chemical fire suppressant from the container. The chemical fire suppressant may be any one or more of Halon, carbon dioxide, nitrogen and other fire suppressant agents, or mixtures, of these.
A further aspect of the present invention provides a method of controlling the environment within an aircraft including at least a pressure shell, an interior space including one or more of a cabin and a cargo hold, an envelope extending between the interior space and the pressure shell, and a liner disposed between the interior space and the envelope, the method comprising a step of distributing an envelope air stream within the envelope through a plurality of nozzles so as to at least partially offset stack effect pressures.
Another aspect of the present invention provides a method of controlling the environment within an aircraft body including at least a pressure shell, an interior space including one or more of a cabin and a cargo hold, an envelope extending between the interior space and the pressure shell, and a liner disposed between the interior space and the envelope. The method comprises the steps of: distributing an envelope air stream within the envelope; and providing one or more flow-blockers within the envelope and adapted to at least partially block a flow of air within the envelope.
Another aspect of the present invention provides a method of controlling the environment within an aircraft body including at least a pressure shell, an interior space including one or more of a cabin and a cargo hold, an envelope extending between the interior space and the pressure shell, and a liner disposed between the interior space and the envelope. The method comprises the steps of: distributing an envelope air stream within the envelope; and at least partially sealing the liner against leakage of air between the envelope and the interior space, such that a predetermined pressure difference between the envelope and the interior space can be maintained at a predetermined minimum ventilation rate.
In embodiments of the invention the envelope air stream is distributed within the envelope through a plurality of nozzles so as to at least partially offset stack effect pressures. At least a portion of the envelope air stream may be injected into a space between the pressure shell and an insulation jacket. At least a portion of the envelope air stream may be injected into a space between an insulation jacket and the liner.
In embodiments of the invention, a return air stream may be drawn from selected one of the envelope and the cabin. The return air stream may be divided into an exhaust air stream and a recirculation air stream, the exhaust air stream being vented from the aircraft and the recirculation air stream being supplied back to the cabin.
In embodiments of the invention, a supply air stream is divided into the envelope air stream and a cabin air stream. The cabin air stream is supplied to the cabin; and the envelope air stream and the cabin air stream are controlled to maintain a predetermined pressure difference between the cabin and the envelope.
In embodiments of the invention the cabin air is humidified, and the humidified cabin air is supplied to the cabin.
In embodiments of the invention, during a cruising portion of a flight cycle. the predetermined pressure difference is selected such that the envelope is at a higher pressure than the cabin. In such cases, the return air stream may be drawn from the cabin. Similarly, a portion of the return air stream can be vented out of the aircraft, and a remaining portion of the return air stream recirculate back into the cabin.
In embodiments of the invention, during a taxi and ascent portion of a flight cycle, the predetermined pressure difference is selected such that the envelope is at a lower pressure than the cabin. In such cases, the return air stream can be drawn from the envelope, and substantially all of the return air stream may be vented out of the aircraft.
In embodiments of the invention, during an in-flight fire and/or pyrolysis within the envelope or in the cabin, the predetermined pressure difference is selected such that the envelope is at a lower pressure than the cabin. In such cases, at least a portion of the envelope can be flooded with a chemical fire suppressant, and the cabin air stream may include substantially all of the total flow of ventilation air. The return air stream may be drawn from the envelope, and substantially all of the return air stream vented out of the aircraft.
In embodiments of the invention, during ground operations of the aircraft, the return air stream is drawn from the envelope and substantially all of the return air stream is vented out of the aircraft. In such cases, the ventilation air stream may be heated to accelerate volatilization of VOCs and any moisture within the envelope.
The environment control system of the invention can be incorporated into new aircraft construction, or installed as an upgrade or retrofit in an existing aircraft.

Environment control system for aircraft having interior condensation problem reduction, cabin air quality improvement, fire suppression and fire venting functions


An electrotechnical core for generating a cold atmospheric pressure or low-pressure plasma for the treatment of human, animal, or technical surfaces. The core has a side facing the surface and a side facing away from the surface and comprises the following layers, starting from the side facing the surface:                a first insulation layer,        a first electrode structure with a first contact between the first electrode structure and a power supply unit,        a second insulation layer to galvanically isolate the first electrode structure and a second electrode structure from one another,        wherein the second electrode structure is driven during operation by a voltage signal sufficient to ignite a plasma,        a third insulation layer to galvanically isolate the second electrode structure from a third electrode structure,        wherein the third electrode structure grounds the third electrode structure during operation.

For operation, a plasma applicator is typically connected via a cable to a power supply unit, e.g., a high-voltage generator, which provides a voltage signal that is sufficient to ignite a physical plasma. The power supply unit can comprise a controller which controls current, voltage or treatment time, for example.
The plasma applicator typically comprises an electrotechnical core. An electrotechnical core comprises a multi-layer system which, in the layer thickness direction, comprises the following layers in succession: a first insulation layer, a first electrode structure, a second insulation layer, in particular a dielectric layer, a second electrode structure. When a plasma applicator with such an electrotechnical core is placed on a surface to be treated, the first insulation layer, as the lowermost layer, is assigned to a surface to be treated. Typically, the second electrode structure is typically actively driven by a voltage signal and often embodied as a surface electrode. As a rule, the first electrode structure forms a counter electrode and is at ground potential.
A voltage, which may be modulated and typically is modulated, is applied during operation between the second electrode structure and a counter electrode, which may also be formed by a surface to be treated.
The potential of the counter electrode can be a ground potential or a potential deviating therefrom. Here, the voltage signal refers to the voltage applied, which may be modulated in sinusoidal, triangular or rectangular fashion, for example. Furthermore, the voltage signal can also be composed of individual pulses.
For reasons of simplicity, this description refers again and again to a "driven" electrode structure. The voltage—i.e., the voltage signal—is always applied between the driven electrode structure and the counter electrode. Since the counter electrode typically—but not necessarily—is at ground potential, the simplified expression "the voltage signal is applied to the driven electrode structure" is used to describe that the applied voltage acts between driven electrode structure and counter electrode.
As a rule, an electrotechnical core comprises a ground connector, which is electrically conductively connected to the first electrode structure, and a high-voltage connector, which is electrically conductively connected to the second electrode structure. The first and second electrode structure are typically connected to a power supply unit via a cable at the ground connector and the high-voltage connector, said power supply unit, during operation, providing a voltage signal that is sufficient to ignite a plasma and transmitted to the second electrode structure.
The second insulation layer is typically arranged between the first and the second electrode structure and electrically insulates the first and second electrode structure from one another. Consequently, the second insulation layer prevents a short circuit between the first and second electrode structure by way of galvanic isolation. By means of a voltage applied to the second electrode structure in the form of a voltage signal, a supplied gas or gas mixture, such as air, is ionized and converted into a reactive state in the sealed gas space formed between the plasma applicator and the surface to be treated. Thus, a physical plasma is generated. The plasma distributes uniformly in the sealed gas space and interacts with the surface to be treated.
Electrotechnical cores only comprising the second electrode structure and the second insulation layer are also known. Then, the second insulation layer is situated during operation on the side facing the surface to be treated. The first electrode structure, in particular, is not provided in such electrotechnical cores; instead, the function of the ground electrode is realized during operation by the human or animal body or the surface to be treated itself. By way of example, such an electrotechnical core is described in DE 10 2017 100 161 A1. In this case, the surface to be treated forms a counter electrode.
In addition to the three states of matter of solid, liquid and gas, plasma is referred to as the fourth state of matter. If sufficient amounts of energy, for example in the form of electrical energy, are supplied to a gas or gas mixture, some of the atoms in the gas are ionized, i.e., electrons are removed from the atomic shell and move as free particles, leaving the positively charged atom. If a gas consists of a sufficiently high proportion of free ions and electrons, the state of matter is referred to as physical plasma. Thus, physical plasma is matter, some of whose constituents are charged components, ions and electrons, which move as free charge carriers.
Collision processes cause some atoms of the ionized gas or gas mixture to be converted into an excitable state. Upon de-excitation, these atoms emit their energy in the form of electromagnetic radiation, the spectrum of which extends from the UV range via the visible spectral range up to the IR range. Additionally, the excited atoms and the ions can interact chemically and bind to form new molecules.
For the purposes of generating a plasma, plasma jets, torches, corona discharges and the dielectric barrier discharge (DBD) are known. In the case of dielectric barrier discharges (DBD), plasmas are typically generated at atmospheric pressure, far from thermal equilibrium. An applied AC voltage leads to the formation of tiny discharge channels with each period. Since the discharge channels only make up a fraction of the entire discharge volume and the time duration of the discharge is severely constrained by the capacitive coupling, the mean gas temperature in the discharge remains close to room temperature. Consequently, a cold plasma at atmospheric pressure or low pressure can be generated by way of the dielectric barrier discharge (DBD). Atmospheric pressure plasma refers to the special case of a physical plasma where the gas pressure in the plasma approximately corresponds to that of the surrounding atmosphere—so-called normal pressure. If the gas pressure in the plasma is lower than atmospheric pressure then this is referred to as a low-pressure plasma. Cold plasma, with a temperature below 40° C., is currently investigated for applications in plasma medicine and has already found its first applications.
The principal goal of plasma medicine lies in therapeutic use of plasma; i.e., physical plasma should be applied directly to the human or animal body. The primary targets here are plasma-assisted modification of bio-relevant surfaces, a plasma-based bio-decontamination/sterilization and a direct therapeutic use for promoting wound healing.
Possible applications lie, firstly, in the area of antimicrobial effects and, secondly, in the targeted and controllable modification of mammalian cells and tissue. Medical plasma applications are discussed, in particular, in the context of the support of healing processes, with a particular focus on the treatment of chronic wounds, the treatment of infectious skin diseases and the treatment of inflammatory skin diseases (dermatitis).
According to the current state of research, the principal active components of cold plasmas are reactive nitrogen and oxygen species, UV radiation, charged particles and electric fields. Reactive nitrogen and oxygen species are formed short-term and locally by coupling electrical energy into gases that are not biologically effective per se (argon, helium, nitrogen, oxygen, air and mixtures thereof) and by way of subsequent interaction with adjacent media (atmospheric air, liquids, surfaces). Electric fields and signals caused thereby play an important role in regulating body-inherent healing processes. In the case of an injury, these signals are some of the first signals that the body receives about said injury. Thus, for example, the electrostimulation of wounds is a recognized treatment method which can reactivate and maintain body-inherent and physiological repair processes in a targeted fashion.
Here, planar plasma applications which allow human and/or animal surfaces, in particular wounds, to be treated completely and homogeneously using a cold atmospheric pressure plasma are of particular medical interest.
DE 10 2014 220 488 A1 describes an apparatus for generating a cold atmospheric pressure plasma for treating human and/or animal surfaces. The apparatus comprises a flexible, planar multi-layer system with a side facing the surface to be treated and a side facing away from the surface to be treated. The multi-layer system, which forms an electrotechnical core, comprises the following layers:
a first electrode layer on the averted side of the multilayer system, a second electrode layer on the facing side of the multilayer system, wherein the electrode layer has a multiplicity of cutouts or a grid-like or meandering embodiment, a dielectric layer, which is arranged between the first electrode layer and the second electrode layer, and a spacer layer, which is arranged adjacent to the second electrode layer on the facing side of the multi-layer system and which, during operation, ensures a distance between the surface to be treated and the second electrode layer arranged at the bottom.
The described apparatus should facilitate large-area wound treatment, in particular of wounds greater than 200 cm2.
To generate the cold atmospheric pressure plasma, an apparatus as described in DE 10 2014 220 488 A1 is typically connected via a cable to a high-voltage generator in order to transfer a high voltage to the first electrode layer. Typically, the cable for transferring the high voltage can be connected to an electrode layer of an apparatus as described in DE 10 2014 220 488 A1 by means of a high-voltage-suitable plug-in apparatus.
DE 10 2015 101 391 B4 describes a plasma generating device, which comprises an electrode carrier and a first electrode and a second electrode. The first electrode is arranged on or in the electrode carrier. Furthermore, it comprises a high-voltage-suitable plug contact connection for electrically contacting at least one of the electrodes. The plug contact connection comprises a plug and a plug-in socket for receiving the plug. The plug-in socket is securely arranged on or in the electrode carrier and electrically conductively connected to one of the electrodes.


Disclosed herein is a device package that comprises a device having a top substrate that is disposed on a supporting surface of a package substrate. A package frame contacts the top surface of the top substrate and top surface of the package substrate, and hermetically seals the device between the top surfaces of the top substrate and package substrate. The device can be a semiconductor device, a microstructure such as a microelectromechanical device, or other devices.

Microstructures, such as microelectromechanical devices, have many applications in basic signal transduction. For example, a spatial light modulator based on a microelectromechanical device (MEMS) modulates light beams in response to electrical or optical signals. Such a modulator can be a part of a communication device or an information display. For example, micromirrors are key components of MEMS-based spatial light modulators. A typical MEMS-based spatial light modulator usually consists of an array of miniature reflective deflectable micromirrors. These micromirrors can be selectively deflected in response to electrostatic forces so as to reflect incident light by individual micromirrors for producing digital images. Such micromirrors, however, are sensitive to temperature and contamination, such as moisture and dust. This contamination has varying effects on the micromirrors, from capillary-condensation and post-release stiction to deterioration of the micromirror surfaces, which may result in mechanical failure of the micromirror devices in operation. For this and other reasons, micromirror devices are often packaged after releasing.
Regardless of differences of the packaging methods currently developed for a micromirror array device, two substrates, one for supporting the device and another one for covering the device, and sealing medium(s) for bonding the two substrates are utilized. Most of the sealing mediums require application of heat during bonding and sealing. The heat, however, may degrade the micromirror array device if not properly applied, especially for those microstructures and semiconductor devices that are temperature sensitive. For example, improperly applied heat may change the desired mechanical properties of the microstructures. It may also thermally activate particles, such as impurities and particles making up the functional components of the microstructures, prompting diffusion of these activated particles within the microstructures, thus exacerbating degradation of the microstructures. Or heat may decrease anti-stiction materials within the package.
Therefore, a method and an apparatus are needed for packaging microstructure, semiconductor, light emitting device, light modulating device, or light detecting device, particularly those that are temperature sensitive during packaging.


Layers suitable for stacking in three dimensional, multi-layer modules are formed by interconnecting a ball grid array electronic package to an interposer layer which routes electronic signals to an access plane. The layers are under-filled and may be bonded together to form a stack of layers. The leads on the access plane are interconnected among layers to form a high-density electronic package.

1. Field of the Invention
The present invention relates to the dense packaging of electronic circuitry and specifically to the stacking of ball grid array (BGA) format integrated circuit packages. The invention is also suitable for the stacking of fine ball grid array (FBGA) integrated circuit packages, micro-ball grid array packages and for bump-bonded bare die to form stackable layers which can be combined to form multi-layer electronic modules.
2. Description of the Background Art
The electronics industry continues to seek smaller, denser electronic packaging. An important advance in this regard has been the use of three-dimensional packaging techniques using stacked bare or packaged integrated circuit die.
Most of the background art disclosures describe methods of stacking multiple unpackaged IC chips. Oguchi et al., U.S. Pat. No. 5,332,922, Miyano et al., U.S. Pat. No. 5,440,171, and Choi et al., U.S. Pat. No. 5,677,569, disclose methods of stacking IC chips within a single package. Jeong et al., U.S. Pat. No. 5,744,827 discloses a new type of custom chip packaging which permits stacking, but which does not allow the use of off-the-shelf packaged IC's. Burns, U.S. Pat. No. 5,484,959 shows a method of stacking TSOP packages which requires multiple leadframes attached above and below each TSOP and a system of vertical bus-bar interconnections, but which does not conveniently allow an expansion of the number of vertically interconnecting leads.
The assignee of this application, Irvine Sensors Corporation, has been a leader in developing high-density packaging of IC chips, for use in focal plane modules and for use in a variety of computer functions such as electronic memory. Examples of Irvine Sensors Corp.'s high-density electronic packaging are disclosed in U.S. Pat. No. 4,672,737, to Carson, et al.; U.S. Pat. No. 5,551,629, to Carson et al.; U.S. Pat. No. 5,688,721, to Johnson; U.S. Pat. No. 5,347,428 to Carson, et al.; and U.S. Pat. No. 6,028,352 to Eide, all of which are fully incorporated herein.
The present invention relates to the stacking of layers containing integrated circuit chips (ICs), thereby obtaining high-density electronic circuitry. In general, the goal of the present invention is to combine high circuit density with reasonable cost. A unique aspect of this invention is that it provides a low cost method of stacking commercially available IC's in BGA packages while allowing the independent routing of several non-common I/O (input/output) signals from upper-level layers to lower layers or to the bottom of the stack. Cost reduction is accomplished by utilizing relatively low cost interposer boards as appropriate to reroute leads to an access plane and by the ability to stack pre-packaged and pre-tested off-the-shelf BGA packages.
None of the background art addresses the need for compact, dense microelectronic stacks that take advantage of the high speed and small outline of a BGA package that are low cost and highly reliable and incorporate known good die (KGD), each aspect of which the instant invention addresses.

Ball grid array package format layers and structure


The present disclosure relates to a network-based centralized security monitoring (CSM) system. An example CSM includes one or more memory devices configured to store instructions thereon that, when executed by one or more processors, cause the one or more processors to receive a plurality of parameter data elements comprising one or more characters for a plurality of parameter types from a monitored site, determine for each of the plurality of parameter types a number of occurrences of a plurality of different character groups in the plurality of parameter data elements, generate a count structure indicating the number of occurrences of the plurality of different character groups in the plurality of parameter data elements for each of the plurality of parameter types, and generate a security signature for the monitored site, the security signature comprising the count structure for each of the plurality of parameter types.

The present disclosure relates generally to the field of predictive security analysis and anomaly detection of a network-based, centralized security monitoring system. The present disclosure relates more particularly to generating a fixed length, site-independent representation of events occurring at a site of the centralized security monitoring system during an observation period.
Often, much of the event data that a security system or an alarm panel generates for events occurring at a site do not give rise to alarms. For example, when a user successfully disarms a building alarm before or upon entering the building, the alarm panel triggers an event without raising an alarm. Conventional network-based, centralized security monitoring centers respond only to events which give rise to alarms, and do not use the events that do not give rise to alarms. There is a need to provide a way for the unused events to be utilized to generate a representation that provides an understanding of all the security events taking place at a particular site.
Furthermore, much of the event data generated at a site is structured in a way that the data may be in free-text format (in other words, a lot of the event data may be full of text or string data). Hence, the event data is not in a suitable format to be readily processed by machine learning algorithms running on server computers. There is a need to find a representation of the free-text data in a format that is suitable for server computers to process more easily (and to allow further analysis of the event data by providing the representation of the data as an input to machine learning algorithms, for example).

Building security analysis system with site-independent signature generation for predictive security analysis


A semiconductor device has an active region composed of a group III-V nitride semiconductor and ohmic electrodes and a gate electrode each formed on the active region. The active region has an entire surface thereof exposed to a plasma such that a surface potential for electrons therein is lower than in the case where the entire surface is not exposed to the plasma.

The present invention relates to a semiconductor device composed of a group III-V nitride semiconductor represented by a general formula (InXAl1-X)YGa1-YN (where 0xe2x89xa6Xxe2x89xa61 and 0xe2x89xa6Yxe2x89xa61 are satisfied) and to a method for fabricating the same.
A group III-V nitride semiconductor such as GaN, AlGaN, InGaN, or InAlGaN, i.e., a so-called gallium nitride-based semiconductor is an important semiconductor for an optical device having a short oscillating wavelength such as a semiconductor laser device outputting, e.g., a blue laser beam. The applications of the gallium nitride-based semiconductor are not limited to the optical device. In recent years, attention has been focused on the gallium nitride-based semiconductor for its high dielectric breakdown field strength, high thermal conductivity, and high electron saturation velocity so that gallium nitride-based semiconductor is considered to be promising also as the material of an RF power device.
In an AlGaN/GaN heterojunction structure composed of aluminum gallium nitride (AlGaN) and gallium nitride (GaN) which are stacked in layers, in particular, electrons are accumulated at a high density in the vicinity of the heterojunction interface between AlGaN and GaN to form a so-called two-dimensional electron gas. The two-dimensional electron gas exhibits a high mobility since it exists spatially separated from a donor impurity used to dope AlGaN. Therefore, the AlGaN/GaN heterojunction structure achieves the effect of reducing a source resistance component when used in a field effect transistor (FET).
Since the distance d from a gate electrode to the two-dimensional gas is normally as small as several tens of nanometers, a ratio Lg/d between a gate length Lg and the distance d, which is termed an aspect ratio, can be held at a large value of 5 to 10 even if the gate length Lg is as small as about 100 nm. Hence, the use of the AlGaN/GaN heterojunction structure offers an advantage of easy fabrication of a FET with a reduced short channel effect and an excellent saturation characteristic.
The electron velocity of a two-dimensional electron in a high-field region of about 1xc3x97105 V/cm in the AlGaN/GaN-based heterojunction structure is double or more the electron velocity thereof in a gallium arsenide-based (GaAs-based) FET which is currently prevalent as an RF transistor, i.e., an AlGaAs/InGaAs heterostructure FET. In addition, the density of electrons accumulated at the heterointerface becomes as high as 1xc3x971013/cm2 when the composition of Al in AlGaN is 0.2 to 0.3, which is about three to five times as high as the density of electrons in the GaAs-based device. Accordingly, the FET having a GaN heterojunction structure is considered to be very promising.
However, the FET having a GaN heterojunction structure has the problem that it is difficult to form a gate electrode on the bottom surface of a recess provided in the upper semiconductor thereof, i.e., a so-called recessed gate structure.
The reasons for this is that AlGaN and GaN in, e.g., an AlGaN/GaN heterojunction structure have different lattice constants and therefore an upper semiconductor layer composed of AlGaN cannot be formed sufficiently thick on a lower semiconductor layer composed of GaN and that wet etching is difficult because AlGaN is a chemically extremely stable material. Accordingly, a conventional FET with a GaN-based heterojunction structure mostly has a structure in which ohmic electrodes as source/drain electrodes and a gate electrode are disposed on a principal surface of the upper semiconductor layer composed of AlGaN, not a recessed gate structure.
Thus, in the structure in which the individual electrodes are formed on the same surface, it is difficult to sufficiently reduce the value of a source-to-gate resistance so that excellent physical properties inherent to the materials composing the GaN-based heterojunction structure FET cannot be obtained.
Since the thickness of the upper semiconductor layer composed of AlGaN is particularly small between the gate and source, an electron density in the region lowers directly if a surface potential for electrons is increased by any factor in the fabrication process. No matter how intensively a gate voltage with a positive value is applied to the gate electrode, the electron density in a region under the gate electrode cannot be increased to a value not more than a maximum electron density determined in the region between the source and drain electrodes. The phenomenon in which the surface potential for electrons is increased by any factor in the fabrication process is fatal to the GaN-based heterojunction FET.
This raises a demand for a structure in which the thickness of the region of the upper semiconductor layer composed of AlGaN which is located between the source and drain is increased such that an electron density between the source and gate is not affected by a variation in surface potential, i.e., a recessed gate structure. However, the use of a recessed gate structure in a FET having a GaN-based heterojunction structure is technically difficult, as described above, so that it is necessary to minimize the surface potential between the source and drain.
The present invention has been achieved in view of the foregoing problems and it is therefore an object of the present invention to reduce a surface potential for electrons in a group III-V nitride semiconductor and thereby reduce a source resistance, improve a drain current value, and increase a drain breakdown voltage.
Specifically, a first method for fabricating a semiconductor device according to the present invention comprises the steps of: (a) exposing a surface of an active region composed of a group III-V nitride semiconductor to a plasma to reduce a surface potential for an electron in the active region; and (b) selectively forming an ohmic electrode and a gate electrode on the active region with the reduced surface potential.
Since the first method for fabricating a semiconductor device selectively forms the ohmic electrode and the gate electrode on the active region with the reduced surface potential, a source resistance is reduced and a transconductance is increased. This advantageously increases a drain current as well as a drain breakdown voltage.
In the first method for fabricating a semiconductor device, the step (a) is preferably performed under a pressure not more than 100 Pa.
A second method for fabricating a semiconductor device according to the present invention comprises the steps of: (a) selectively forming an ohmic electrode and a gate electrode on an active region composed of a group III-V nitride semiconductor; and (b) exposing the active region to a plasma by using the ohmic electrode and the gate electrode as a mask to reduce a surface potential for an electron in an exposed region of the active region.
In the first method for fabricating a semiconductor device, the step (b) is preferably performed under a pressure not more than 100 Pa.
A first semiconductor device according to the present invention comprises: an active region composed of a group III-V nitride semiconductor; and a gate electrode formed on the active region and source and drain electrodes each formed in spaced apart relation to the gate electrode, a portion of the active region interposed between the gate electrode and the source electrode having a surface thereof exposed selectively to a plasma such that a surface potential for an electron is lower therein than in the other portion of the active region.
In the first semiconductor device, a source resistance is reduced and a transconductance is increased so that a drain current is increased advantageously.
In the first semiconductor device, it is preferable for a portion of the active region interposed between the gate electrode and the drain electrode also to have a surface thereof exposed selectively to the plasma such that a surface potential for an electron is lower therein than in the other portion of the active region.
This also reduces a drain resistance so that the drain current is further increased.
A second semiconductor device according to the present invention comprises: an active region composed of a group III-V nitride semiconductor; and an ohmic electrode and a gate electrode each formed on the active region, the active region having an entire surface thereof exposed to a plasma such that a surface potential for an electron therein is lower than in the case where the entire surface is not exposed to the plasma.
In the second semiconductor device, a source resistance is reduced and a drain current is increased advantageously, while a gate-to-drain breakdown voltage is also increased advantageously.
A third semiconductor device according to the present invention comprises: a plurality of field effect transistors each having an active region composed of a group III-V nitride semiconductor, at least one of the plurality of the field effect transistors having a surface of the active region thereof being exposed selectively to a plasma such that a surface potential for an electron is lower therein than in the respective active regions of the other field effect transistors unexposed to the plasma.
In the third semiconductor device, the FETs having different threshold voltages can be formed on a single substrate.
In the first to third semiconductor devices, the active region exposed to the plasma is preferably exposed to the plasma under a pressure not more than 100 Pa.

Semiconductor device composed of a group III-V nitride semiconductor

Matsushita Electric Industrial Co., Ltd.


An isolator device and a corresponding method of forming the isolator device to include first and second electrodes, a layer of first dielectric material between the first and second electrodes, and at least one region of second dielectric material between the layer of first dielectric material and at least one of the first and second electrodes. The second dielectric material has a higher relative permittivity than the first dielectric material.

Most electronic circuits are implemented within microelectronic circuits, commonly referred to as "chips". Such a chip comprises a semiconductor die carrying the microelectronic circuit encapsulated within a plastics case. This enables the chip to be bonded or soldered to circuit boards and the like for the formation into more complex products. Many applications of microelectronic circuitry may require interfacing from a relatively low voltage side, where for example the supply rails may differ from each other by only a few volts, to higher voltage components as might be found in the energy, signaling, automation, communications or motor control arenas. There are also safety critical applications such as medical applications, where high voltages must not be allowed to propagate from the circuit towards a patient being monitored. Although these high voltages may not be generated deliberately, they might occur in certain fault modes, for example if a power supply were to develop a fault. It is known to isolate low voltage and high voltage sides of a circuit from one another using "isolators". These have typically involved discrete components, such a signal transformers, being mounted on a circuit board between a low voltage side of the board and the high voltage side of the board. More recently "chip scale" isolators have become available. Within a "chip scale" isolator the low voltage and high voltage sides of the circuit are provided within a plastics package of the type known in the provision of integrated circuits, such as a dual in line package.
The reduced dimensions in chip scale isolators start to give rise to breakdown mechanisms not seen in non-chip scale, i.e. discrete component isolators. Isolators are often given a rating called the breakdown voltage. When the voltage across electrodes of the isolator exceeds the breakdown voltage, the dielectric material between the electrodes may exhibit electrical breakdown and become electrically conductive, no longer performing as an effective isolator.
To increase the breakdown voltage, an isolator can be manufactured with a thicker layer of dielectric material between the electrodes.

Isolator and method of forming an isolator