An integrated circuit contains customer specified logic (12), an embedded core (14), and a plurality of speed path test cells (16 and 18). Once the core (14) is embedded within an integrated circuit (10), not all of the input and output terminals of the embedded core are available at external terminals of the integrated circuit (10). Therefore, the wrapper speed path test cells (16 and 18) are provided. The cell (16) contains two flip-flops (20 and 22) which can be used to launch logic transitions into the embedded core (14) to perform two clock speed path testing. The cell (18) contains flip-flops (26 and 28) which can perform a speed path launch operations to a customer specified logic (12). The cell (16) can perform speed path capture operations for the customer specified logic (12) whereas the cell (18) can perform speed path capture operations for the embedded core (14).

In the modern integrated circuit industry, there is a class of integrated circuits known as microcontrollers or "system-on-a-chip" devices. These devices are manufactured and designed to contain embedded core data processors wherein this embedded core communicates with peripherals, memory, or other circuitry on the same substrate. The embedded core may be designed and/or provided by the integrated circuit (IC) manufacturer, or may be designed and/or provided by a third party (not the customer or the integrated circuit manufacturer), whereas the peripherals and other circuitry is typically customer specific. In many cases, the customer specific material is provided and/or designed by a different party from that which designed/provided the embedded core. Therefore, testing of integrated circuits is made increasingly difficult due to the many parties and design/test methodologies that may be involved in the design as well as the inaccessibility of circuit elements embedded deep within a microcontroller design. As more embedded core processors, or "system-on-a-chip" devices are designed, or as the level of integration increases such that many embedded cores from many providers are included on a single device, new test methods must be used.
The embedded core, which is only a portion of the total integrated circuit (IC) and is surrounded by peripherals, typically contains a plurality of input and output terminals. If the embedded core is kept as a separate structure during test pattern generation and is not bundled together with the rest of the integrated circuit logic for test pattern generation, then there is an access problem (controllability and observability) related to these plurality of input and output terminals (e.g., the input and output terminals used to test the embedded core are not accessible by the microcontroller external terminals or package pins). In most cases, the plurality of input and output terminals of the embedded core are not directly accessible by the external pins of the integrated circuit, and therefore, no direct access is available to the embedded core for providing test vectors or for other test purposes.
In addition, the complexity and transistor count of integrated circuits (ICs) has significantly increased so that simple connectivity testing and stuck-at fault testing is not adequate for modern microcontrollers. It is important that the embedded core be tested for frequency compliance, input and output terminal timing specification compliance, manufacturing induced path delay faults and transition delay faults, in addition to stuck-at faults and connectivity. It is even more advantageous if the speed path verification tasks can be performed at the operational frequency of the embedded core.
One prior art method for overcoming these design and access difficulties to the embedded core is to provide a signal path between every input terminal and every output terminal of the embedded core and a different external pin of the integrated circuit. This architecture, commonly known as "multiplexor mode", creates significant overhead in the design. In addition, routing of the signal path for "multiplexor mode" may not be possible since the number of input/output terminals on the embedded core may exceed the number of external pins of the integrated circuit (IC). In addition, this method of signal path routing can complicate the testing of the timing of the inputs and outputs to the embedded core. Furthermore, this method can result in a lower quality test program, an impact to the device die area, or an impact to the design schedule (i.e., being late to market with microcontroller design derivatives). For example, to conduct a reasonable speed or timing test would require that each signal path connection for the device package pins to the embedded core inputs and outputs be fully characterized at each operating point (temperature and supply voltage) at which the device is to be tested. This characterization will never result in a fixed propagation delay along such a signal path, but will always provide a range of possible values for that propagation delay (minimum and maximum) due to process variation in the manufacture of such products. The magnitude of the range from the minimum to maximum propagation delay for each of these signals introduces an uncertainty into the measurement or validation of embedded core input and output specifications along such propagation paths. This additional uncertainty leads to either a reduced test quality, yield reduction, or both.
Another method for overcoming the design and access difficulties is to provide a wholly serial connection whereby the embedded core input and output terminals are provided data, or are interrogated for data, respectively, by using a common-in-the-art serial scan connections. This method has the drawback of increasing test time unreasonably and not allowing at-speed testing to occur. For example, an embedded core with 100 input terminals and 100 output terminals would require 200 clock cycles to provide and interrogate one data processor cycle of terminal data. A vector set with 1000 data processor clock cycles worth of test data would be extended or multiplied by 200 and would result in an actual applied clock cost of 200,000 clock cycles. The effective frequency tested would also be reduced by 200 so a 200 MHz data processor would effectively be tested at 1 MHz.
In another prior art method, the embedded core and associated peripherals can be placed on a single chip and modeled together in such a way that the whole chip design is considered as a single entity where the embedded controller is not individually testable. For this type of design the test vectors are generated for the entire integrated circuit (IC) whereby the hierarchy of the sub-components of the microcontroller are ignored. This method is typically time inefficient since each and every integrated circuit which contains the same embedded core must be separately processed to create new test vectors whereby existing or old embedded test vectors must be discarded. This design process is generally not supported in the industry due to the intellectual property content of the embedded core data processor or of the customer supplied logic. Most suppliers of embedded cores and peripherals do not desire to disclose extensive details of there designs thereby rendering new generation of test vectors very difficult after full integration.
It would be advantageous to generate an initial set of test vectors when designing the embedded core and provide a method and system to allow the use of these initial test vectors to perform testing on the embedded core regardless of which peripherals are integrated with the embedded core. It would be advantageous to provide a method which would decouple the embedded core test process from customer specific designs and peripherals which may be located on the same substrate with the embedded core. A new isolated embedded core test process is needed since most customer specific designs use different test methodologies from that originally designed into the embedded core and may contain proprietary information which cannot be communicated to the manufacturer of the embedded core. In addition, it is important that the substrate surface area overhead associated with this embedded core test circuitry be minimized.
Therefore, the need exists for a method and system which allows for speed path and at-speed testing of embedded core designs whereby test vectors can be reused and access to the embedded core is enabled in a substrate-space efficient manner.

Wrapper cell architecture for path delay testing of embedded core microprocessors and method of operation


Provided is a physical quantity measuring method using a Brillouin optical fiber sensor. An optical fiber is set on a structure and a pair of pulse lights having different pulse widths is selected. The pulse lights are sequentially transmitted through the optical fiber to obtain back scattering lights and Brillouin gain spectra. The Brillouin gain spectra are compared to each other to calculate a normalized spectrum and a Brillouin frequency is acquired based on the normalized spectrum. The Brillouin frequency is multiplied by a conversion factor of a corresponding physical quantity of the structure to obtain the physical quantity. Accordingly, a portion of the optical fiber from which a sensing signal can be acquired is shortened to improve spatial resolution.

1. Field of the Invention
The present invention relates to a method of measuring a physical variation in a static structure (a bridge, a building and so on) or a dynamic structure (an airplane, a vehicle and so on) using an optical fiber and Brillouin scattering of the optical fiber. More specifically, the invention relates to a physical quantity measuring method using a Brillouin optical fiber sensor, which is able to measure a physical quantity and its distribution of a corresponding structure with improved spatial resolution using two pulse lights and two back scattering lights acquired from the pulse lights.
2. Background of the Related Art
It is generally known that Brillouin scattering relates to a sound wave generated according to movement of molecules physically excited in a gas, liquid or solid. There has been developed a Brillouin optical fiber sensor using the Brillouin scattering of an optical fiber. The Brillouin sensor has a structure that a pulse light is reacted with an oscillating wave inside an optical fiber when the pulse light is transmitted through the optical fiber such that the pulse light is scattered at a frequency different from the frequency of the original pulse light. If a specific physical quantity (heat, load and so on) is applied to the optical fiber, molecules of the optical fiber, which are excited due to the physical quantity, form a sound wave and act on the pulse light. Accordingly, the scattered pulse light has a frequency different from the frequency of the pulse light when the pulse light is input to the optical fiber. The physical quantity can be measured by detecting the frequency of the scattered pulse light. Thus, the Brillouin optical fiber sensor can be utilized as a sensing structure.
FIG. 1 shows the construction of a conventional Brillouin sensor and FIG. 2 shows a Brillouin gain spectrum obtained by measuring temperature distribution of a specific structure using the sensor of FIG. 1.
Referring to FIG. 1, first and second light sources 20 and 30 are respectively arranged at both ends of an optical fiber 10, opposite to each other. The first light source 20 arranged at one end of the optical fiber 10 transmits a pumping pulse light to the other end of the optical fiber 10. The second light source 30 located at the other end of the optical fiber 10 transmits a continuous wave probe light to one end of the optical fiber 10. A portion of the optical fiber 10, exposed between the first and second light sources 20 and 30, is attached to a specific structure (a building, a bridge and so on, for instance) to serve as a sensing part.
When a light receiver 40 is connected to the optical fiber 10, the portion of the optical fiber 10, which is attached to the structure, functions as a sensing structure. Thus, the frequency of scattered light transmitted in response to a variation in the temperature of the structure can be compared with a difference between the frequency of the pumping pulse light and the frequency of the probe light. Furthermore, a structure capable of measuring a temperature is based on the fact that the frequency of the scattered light is changed as a temperature becomes changed.
When the frequency of the pumping pulse light input to one end of the optical fiber 10 is vp and the frequency of the continuous wave probe light input to the other end of the optical fiber 10 is vcw, the difference between the frequencies of the pumping pulse light and probe light corresponds to Δv=vp−vcw.
When the frequencies of the pumping pulse light and probe light are adjusted such that Δv corresponds to a Brillouin frequency shift of the optical fiber 10, the pumping pulse light is photo-energy-converted into the probe light and thus the probe light is amplified as Brillouin-light inside the optical fiber 10. Accordingly, analysis of Brillouin signals is facilitated.
The amplified probe light signal is converted into an electric signal by the light receiver 40. The electric signal has Brillouin gain spectrum characteristic shown in FIG. 2 based on Δv and time detected by the light receiver.
When the optical fiber 10 attached to the surface of the structure is subjected to a variation due to a temperature, for example, the Brillouin frequency value of the optical fiber 10 is changed as shown in FIG. 2.
The molecules of the optical fiber are thermally excited when the probe light meets the pumping pulse light to cause sound oscillation and generate Brillouin scattering light. This Brillouin scattering amplification is generated when the difference between the frequencies of the pumping pulse light and probe light has a specific value, which is the Brillouin frequency value. The Brillouin frequency value is a property of the optical fiber and it is varied in proportion to a physical quantity such as a temperature or strain.
When the Brillouin frequency shift corresponds to Δv, the maximum power of the optical fiber is obtained. FIG. 2 shows the distribution of the frequency shift value based on a frequency axis, an optical intensity axis (mW) and a length (km) of the sensing part of the optical fiber 10. The frequency shift Δv is shown to 10.8 GHz, 10.85 GHz, 10.9 GHz and 10.95 GHz on the frequency axis. A temperature variation based on the distribution of the frequency shift is shown as a graph above the graph showing the distribution of the frequency shift. The larger the number of Δv frequency shifts set on the frequency axis, the more accurate the distribution of the frequency shift is.
However, the conventional Brillouin sensor requires the structure in which the two light sources, that is, the first and second light sources 20 and 30, are arranged at both ends of the optical fiber 10 in order to acquire data about Δv and needs a very long period of time to obtain measurement results because the probe light of the second light source 30 is emitted in the form of pulse light. Accordingly, when the conventional Brillouin sensor is applied to a large structure, a factor causing a temperature variation, for example, a fire, cannot be immediately detected.
In the Brillouin optical fiber sensor structure, it is very important how long portion of the optical fiber is effective as a sensing part used for measuring a physical quantity. The size (or length) of a portion of the Brillouin optical fiber sensor, affected by a physical quantity based on a measured value at an arbitrary position, is called spatial resolution.
When the spatial resolution of an optical fiber sensor is 1 m, for example, it means that a single sensing signal is obtained within 1 m of a corresponding portion of the optical fiber. It is known that the spatial resolution is directly proportional to the width of the pumping pulse light in the optical fiber sensor structure.
A portion of the optical fiber, in which pumping pulse light is back-scattered, corresponds to half of the length of the optical fiber, occupied by the pumping pulse light. Thus, when the width of the pulse light is 10 nsec, the spatial resolution becomes 1 m (that is equal to 200,000 km/s×10 nsec×½) considering that the velocity of light transmitted inside the optical fiber is approximately 200,000 km/s.
Accordingly, a signal having the spatial resolution of 1 m is obtained when the optical fiber sensor is operated using the pumping pulse light with the pulse width of 10 nsec. To obtain the more accurate signal from the corresponding length of the optical fiber, it is required to operate the optical fiber sensor with smaller spatial resolution. In this case, however, the scattering light is decreased because the energy of the pumping pulse light is reduced.
It is known that the Brillouin scattering light amplification occurs only when a pulse light with a pulse width of at least 10 nsec is used and it is difficult to determine a gain peak with a pulse width of less than 50 nsec because the line width of the Brillouin scattering spectrum is remarkably increased.

Physical quantity measuring method using Brillouin optical fiber sensor

Korea Advanced Institute of Science and Technology

Korea Research Institute of Standards and Science


Compounds of the formulae ##STR1## in which R is hydrogen or methyl, and the dashed lines represent an additional bond in the 11- or 12-position,. have extraordinary olfactory properties.

As is known, musk is rare and expensive. Perfumes having a musky scent which are more readily available are therefore sought-after components for the perfume industry. 15-Pentadecanolide of the formula ##STR2## is a constituent of angelica root oil and has a delicate musky scent and the ability to act as a fixative. There have therefore already been intensive efforts to prepare such macrocyclic lactones. The most important syntheses at present start from 13-oxabicyclo [10.4.0]hexadec-1(12)ene, which can be prepared, for example, by free-radical addition of allyl alcohol onto cyclododecanone and acid-catalysed dehydration of the resulting 2-(.gamma.-hydroxypropyl)-cyclododecanone (DE-B 21 36 496)U.S. Pat. No. 3,856,815.
In another process, hydrogen peroxide or alkyl peroxide is added onto 13-oxabicyclo [10.4.0]hexadec-1(12)ene in the presence of sulphuric acid. Thermal or UV-initiated cleavage of the resulting 12-hydroperoxy-13-oxabicyclo[10.4.0]hexadecane (III) gives 15-pentadecanolide (I) and 15-pentadecenolides, which can be hydrogenated to give I (DE-B 2 026 056).
According to Russian Inventor's Certificate 1 133 274, 12-oxo-15-pentadecanolide is reduced in the presence of Raney nickel to give 12-hydroxy-15-pentadecanolide, which is then dehydrated, for example in the presence of phosphoric acid, to give the corresponding 15-pentadec-11- and -12-enolides, and these products are then hydrogenated in the presence of a nickel catalyst to give I.
Surprisingly, it has been found that tetradecenolides whose C.dbd.C double bonds are in the 11- or 12-position and the corresponding saturated compounds have valuable organoleptic properties.

Macrocyclic lactones as musk fragrance enhancers


A cluster computer system and method for distributed data storage enables distributed, reliable, low overhead mass storage systems. In particular, the system and method contemplate a plurality of computers connected in a network, each computer comprising a node having mass storage devices providing storage areas for data and redundancy information. Computer nodes access their locally attached mass storage devices independently and asynchronously, with a minimum of network transactions and storage overhead. The information stored on the mass storage devices is highly reliable due to the distribution of redundant information within the computer cluster. Redundancy information is used to reconstruct data associated with storage area access failures.

Large scale mass storage systems are driven by many emerging applications in research and industry. For instance particle physics experiments generate petabytes of data per annum. Many commercial applications, for instance digital video or medical imaging, require highly reliable, distributed mass storage for on-line parallel access. Mass storage systems of petabyte scale have to be built in a modular fashion as no single computer can deliver such scalability.
Large farms of standard PCs have become a commodity and replace traditional supercomputers due to their comparable compute power and their much lower prices. The maximum capacity of standard disk drives, such as installed in commodity PCs, exceeds 1 terabyte per node. Thus, a cluster installation with 1000 commodity PCs and disks would provide a distributed mass storage capacity, exceeding 1 petabyte at a minimal cost. The reason why this type of distributed mass storage paradigm has not been adopted yet is its inherent unreliability.
Local disks, connected to a central server, can be protected against data loss by using RAID technology (RAID: "Redundant Array of Independent/Inexpensive Disks"). Proposed by Patterson et al. (D. A. Patterson, G. Gibson, and R. H. Katz: "A Case for Redundant Arrays of Inexpensive Disks", SIGMOD International Conference on Data Management, Chicago, pp. 109-116, 1988), RAID aims at improving performance and reliability of single large disks by assembling them into one virtual device, while maintaining distributed parity information within this device. The cited paper introduces five RAID strategies, often quoted as RAID levels 1 through 5, which differ in terms of performance and reliability. In addition to these five levels, the RAID Advisory Board defined four more levels, referred to as levels 0, 6, 10 and 53. All these RAID schemes are defined for local disk arrays. They are widely used in order to enhance the data rate or to protect from data loss by a disk failure, within one RAID ensemble.
A next step was to apply the RAID concept to a distributed computer farm. Distributed RAID on a block level (as opposed to a file system level) as first proposed by Stonebraker and Schloss (M. Stonebraker and G. A. Schloss: Distributed RAID—A new Multicopy Algorithm, Proceedings of the International Conference on Data Engineering, pp. 430-437, 1990) and patented, for instance, in JP 110 25 022 A. This approach suffers often from several drawbacks: reliability, space overhead, computational overhead and network load. Most of these systems can only tolerate a single disk failure. Simple calculations show however, that inevitably larger systems must be able to cope with simultaneous errors of multiple components. This applies, in particular, to clusters of commodity components such as mentioned above, since the quality of standard components may be worse than that of high-end products. However, given the potential scale of the discussed systems, no compute node is reliable enough to provide appropriate reliability to support scalability to thousands of nodes. In addition, the space overhead, defined as the ratio of space required for redundant data to the space available for user data, induced by these systems is in most cases not optimal with respect to the Singleton bound (D. R. Hankerson: Coding Theory and Cryptography: The essentials, ISBN:0824704657). Codes that attain this bound are able to tolerate a disk failure for every redundancy region that is available within the system. It can be easily shown that as the minimal requirement for tolerating N disk failures, N redundancy regions are required. Distributed data mirroring, as for instance proposed by Hwang et al. (K. Hwang, H. Jin, and R. Ho: Orthogonal Striping and Mirroring in Distributed RAID for I/O-centric Cluster Computing, IEEE Transactions on Parallel and Distributed Systems, Vol. 13, no. 1, January 2002), is very inefficient, using only half of the total capacity for user data. In addition, the whole system can only tolerate a single disk error. For larger installations, the probability of a data loss scales linear with the system size, approaching 1 during a period of a few years for the named systems, even if highly reliable components are being used.
All these system have in common that they stripe logical data objects over several physical devices. For instance, logically adjacent blocks of a file are distributed over several disks in case of a distributed system on multiple nodes. For distributed systems, this distribution of data blocks has a major drawback. It requires network transactions for any read/write access to the said logical data object. For example, in case of a read access to a large file on an N-node distributed RAID system, the fraction 1-1/(N-P) of all read accesses have to be performed across the network from remote nodes, where P is the number of redundancy blocks in a stripe group (usually 1). This traffic increases both network and CPU overhead.
Other distributed systems use network-capable RAID controllers (e.g., N. Peleg: Apparatus and Method for a Distributed RAID, U.S. patent application Ser. No. 2003/0084397) or are meant for use in wide area networks (e.g., G. H. Moulton: System and Method for Data Protection with Multidimensional Parity, U.S. patent application Ser. No. 2002/0048284). Data striping also applies to systems that are able to tolerate multiple failures by using multidimensional parity (e.g., D. J. Stephenson: RAID architecture with two-drive fault-tolerance, U.S. Pat. No. 6,353,895).
PC clusters traditionally have centralized file servers and use the known RAID technology for their local devices. In addition, backup systems are provided to protect from data loss in the case of an unrecoverable server error. However, such backup systems may require substantial time for the recovery process. It is desirable to avoid the expensive installations of centralized file servers with their associated disadvantages of poor scalability, low network throughput and high cost by building a reliable mass storage system based on the unreliable components of the cluster.

Method and apparatus for enabling high-reliability storage of distributed data on a plurality of independent storage devices


A hand tool includes a handle and a function head is connected to an end of the handle. A first recess and a second recess are respectively defined in two opposite sides of the handle, and a strain transducer is engaged with the first recess. A display member and a processing unit are connected to the handle, and the strain transducer is electrically connected with the processing unit. A hole is defined through the handle and located between the first and second recesses.

A conventional hand tool generally does not include a strain transducer which is able to measure and indicate the torque that the workpiece is applied by the hand tool. U.S. Pat. No. 4,006,629 discloses a torque measuring apparatus which includes four strain transducers on two sides of the handle, and a display member is located on the handle so as to display the torque that the four strain transducers measure. A conductive wire extends from the display member and might be pulled unintentionally or be tangled by objects around the hand tool to cut off the circuit. Besides, four strain transducers are so costly that the hand tools are not competitive in the market.
The present invention intends to provide a hand tool that includes a hole defined through the handle and a strain transducer is installed close to the hole. The section with the hole of the handle is deformed so that the strain transducer can easily measure the torque.


A method of managing water content of a pulsed power drilling fluid, the method comprising contacting the pulsed power drilling fluid with a water absorbent material, wherein the pulsed power drilling fluid comprises water at a first water concentration, and whereby the water absorbent material absorbs at least a portion of the water from the pulsed power drilling fluid to provide a treated pulsed power drilling fluid and a spent water absorbent material comprising absorbed water, wherein the treated pulsed power drilling fluid comprises water at a second water concentration, wherein the second water concentration is lower than the first water concentration. A pulse power drilling fluid and a system for carrying out the method are also provided.

Processes using pulsed power technology are known in the art for breaking mineral lumps. In such processes, a conduction path or streamer is created inside a formation rock to break it. An electrical potential is impressed across electrodes which contact the rock, from a high voltage electrode to a low voltage or ground electrode. At sufficiently high electric field, an arc or plasma is formed inside the rock from the high voltage electrode to the low voltage or ground electrode. The expansion of the hot gases created by the arc fractures the rock. When the streamer connects one electrode to the next, current flows through the conduction path, or arc, inside the rock. The high temperature of the arc vaporizes the rock and any water or other fluids touching or adjacent the arc. The vaporization process creates high-pressure gas in the arc zone, which expands, breaking the rock into fragments.
During such pulse powered drilling processes, it is advantageous to use, as drilling fluid, an insulating liquid that has a high relative permittivity (dielectric constant) to shift the electric fields away from the liquid and into the rock in the region of the electrodes. The insulating drilling fluid should provide high relative permittivity (dielectric constant) to provide high electric fields at the electrodes and shift a higher proportion of the electric field into the rock near the electrodes, and low conductivity to provide low leakage current during the delay time from application of the voltage until the arc ignites in the rock. Water provides high relative permittivity, but has high conductivity unless virtually free of ions, thus creating high electric charge losses. Thus, water has excellent energy storage properties, but requires extensive deionization to render it sufficiently resistive that it does not discharge the high voltage components by current leakage through the liquid. Deionized water is very corrosive and can dissolve many materials, including metals. As a result, water must be continually conditioned to maintain the high resistivity required for high voltage applications. Even when deionized, water may quickly attain sufficient conductivity that it is not suitable for long-duration, pulsed power applications.
Thus, while pulsed power drilling has the potential to dramatically change hard rock drilling due to the very fast rate of penetration (ROP) that is possible, when water becomes entrained in a pulsed power drilling fluid, for example, when water kicks are encountered or formation water from cuttings become entrained in the drilling fluid, the drilling efficiency can be undesirably reduced or the process halted. Accordingly, there is a need for systems and methods of recovering water from pulse power drilling fluids, whereby drilling efficiency can be maintained during pulse powered drilling operations. Desirably, the systems and methods allow for real time, economical removal of water at a drill site, rather than via treatment at, for example, a mud plant.

Methods to manage water influx suitable for pulsed electrical discharge drilling


Chip stacks with decreased conductor length and improved noise immunity are formed by laser drilling of individual chips, such as memory chips, preferably near but within the periphery thereof, and forming conductors therethrough, preferably by metallization or filling with conductive paste which may be stabilized by transient liquid phase (TLP) processes and preferably with or during metallization of conductive pads, possibly including connector patterns on both sides of at least some of the chips in the stack. At least some of the chips in the stack then have electrical and mechanical connections made therebetween, preferably with electroplated solder preforms consistent with TLP processes. The connections may be contained by a layer of resilient material surrounding the connections and which may be formed in-situ. High density circuit packages thus obtained may be mounted on a carrier by surface mount techniques or separable connectors such as a plug and socket arrangement. The carrier may be of the same material as the chip stacks to match coefficients of thermal expansion. High-density circuit packages may also be in the form of removable memory modules in generally planar or prism shaped form similar to a pen or as a thermal conduction module.

1. Field of the Invention
The present invention generally relates to interconnection and packaging of integrated circuits and, more particularly, to high integration and packaging density and high performance integrated circuits, especially high capacity integrated circuit memories having improved noise immunity.
2. Description of the Prior Art
It has been long recognized that reduction in size of integrated circuits can provide numerous performance enhancements of the circuits produced as well as substantial economies in the manufacture thereof. In fact, at the present time, the operational speed of digital systems, sub-systems and circuits and elements thereof is often effectively limited by the time required for signal propagation over conductors interconnecting them and the individual circuit elements thereof, particularly because of the resistance and parasitic capacitances of the interconnections.
Further, elongated and/or tortuously routed connections, unless well-supported such as by encapsulation or lamination may decrease manufacturing yield, if imperfectly formed, or may cause increased susceptibility to damage through vibration, shock, thermal excursions or cycling and other environmental effects and conditions after an integrated circuit or modular package containing a plurality of integrated circuits is placed in service.
To provide potentially complex connections between potentially large numbers of individual integrated circuit chips (which may also be formed with diverse and mutually incompatible processes, while answering the above concerns to a substantial degree) so-called multi-layer modules (MLMs) have become known and highly developed as a packaging structure for highly complex and high performance electronic circuits.
Such modular packages have a complex array of connections made by patterns of conductors on the surfaces of each of a plurality of individual lamina (e.g. in ceramic structures the uncured ceramic lamina are referred to as "green sheets" with patterns formed thereon by conductive paste extruded thereon through a mask) which are then laminated together into a unitary structure with the conductive patterns embedded therein. Connections through lamina from one conductor pattern to another are generally accomplished by extruding the same conductive paste into holes or "vias" in the lamina although other materials and techniques, such as embedding conductive spheres and/or pins in the lamina, are known and can be used. Integrated circuits and connection structures (e.g. pins) are then mounted on respective surfaces thereof and the completed device with integrated circuits thereon is encapsulated to complete the device package.
Integrated circuit chips are generally mounted in a single layer modular circuit packages or devices and other structures, such as printed circuit boards, using so-called surface mount technology (SMT) in which connection pads on chips are soldered, using any of a plurality of techniques of solder application, to corresponding pads on the surface of a carrier, such as an MLM or circuit board. To save space and reduce length of some connections, it is known to mount one integrated circuit chip over another chip (generally of a similar type, such as memory chips) by commonly connected lead frames which, in turn, make connections to pads on each chip. In such arrangements, however, the connection path is not optimal since connections to each chip, which may in some cases be made in several layers, extend to and from a distance beyond the edge of the chip due to the use of a lead frame structure. However, since common connections are most often required to similar locations on each chip, such a structure results in additional conduction path length with attendant performance limitations and exposure to electrical noise.
Since the lead frame consumes additional space on the surface of the carrier, there is also a limitation on integrated circuit packing density due to the lead frame even when several circuits are stacked. Further, attachment of the lead frame to the chips and attaching the lead frames together and to the supporting structure, such as an MLM, may adversely affect manufacturing yield. Encapsulation of the lead frame may also be imperfect, compromising resistance of the overall circuit to damage from vibration, thermal effects and the like, mentioned above. Additionally, the extended conductors inherent in a lead frame cannot be effectively shielded and are therefore subject to electrical noise.
In summary, while interconnection techniques have become highly advanced and reliable and have supported significant performance increases, they are inherently not optimized and continue to impose limits on electrical performance, circuit durability and reliability, circuit density and manufacturing yield. Further, the use of lead frames and the manipulations thereof as well as attachment of lead frames to form common connections and encapsulation processes necessitated when chips are stacked are costly and contribute significantly to the total cost of the package.
At least since the development of the personal computer, it has been considered desirable to provide removable and interchangeable memory structures such as so-called floppy disks. Interchangeability of memory structures enables reduction of the amount of data and applications programs which are resident on the machine itself and allows portability of data between machines without a requirement for networking or other communication facilities. The reduction of size of floppy disks to sizes which may be carried in a user's pocket has been found to be an extremely convenient attribute. Removability provides security of data and/or application programs from corruption in the event of system malfunction such as in familiar back-up duplication of files and logging for archival storage of the state of data at particular points in time. Additional security is also possible since removable storage media may be conveniently stored under high security conditions (e.g. in a safe) without the need to secure the entire machine or system. Other security facilities, such as passwords, may be made specific to individual storage media or files to further limit access to data and/or programs stored thereon.
While these functions are most often accomplished (at least for personal computers) by so-called floppy disks, drives for these disks are slow and storage capacity of the floppy disks is limited although substantial gains have been made in both speed of access and storage capacity in recent years. Alternative storage media having higher performance are known but are generally less convenient or considerably more expensive to the point of impracticality for most personal computer applications and users. Removal and substitution of circuit boards containing non-volatile storage is an appropriate example since non-volatile memory is extremely expensive and/or requires a self-contained power supply. Circuit boards are difficult to install and remove from the computer and arrangements increasing the convenience of doing so may compromise the reliability of connections thereto when numerous insertions and removals of the memory structure are contemplated. Further, when not installed in the computer, the contacts must be physically protected in a manner which is convenient and natural to the user.
Nevertheless, solid state memory in the form of interchangeable, plug-in memory cards is being increasingly used in mobile and portable computing architectures which have additional security and environmental (e.g. temperature, moisture, etc.) concerns. Current technology for these devices utilizes Thin Small Outline Packages (TSOP) for the chips mounted on 15-20 mil thick glass epoxy laminate boards with low stand-off distances. The boards are then encased in a plastic frame with a metallic cover. These structures, however, are subject to numerous problems at the present state of the art.
Specifically, memory modules having such a structure have a large chip to plastic ratio if of high storage capacity. The coefficient of thermal expansion of the chips is generally incompatible with the carrier material which places stresses on the solder chip-to-carrier connections and leads to solder joint reliability problems. The low stand-off height compromises cleanability, secondary solder reflow and difficulty in rework of the boards. Further, the structure is not robust and must be protected against temperature extremes, moisture, shock, bending (since the package is of a relatively thin design for purposes of convenience), and the like. Moisture induced cracking of the packages has been a particularly severe problem. Additionally, the amount of memory which can be provided on a card of convenient size is limited to about eight megabytes at the present time.
Between these two extremes, the so-called Bernoulli Box, which achieved a degree of popularity about ten years ago, provided storage capacity and access time comparable to then-available hard disks although the removable storage media was substantially larger than floppy disks. At present, however, it does not appear that magnetic storage media will allow significant further increases in either access time or storage capacity which can match the processing capabilities of modern processors. Therefore, other media such as "write-once CD" media are being explored for such purposes as the floppy disk is now used. However, at the present state of the art, alternative media appear to have inherent attributes which render them less than optimally convenient, such as cost or, in the case of the "write-once CD", the fact that data, once written, may not be changed and thus the storage capacity is diminished by disabling a file each time the file is stored by being written to a new area of the medium.
Accordingly, there is a need in the art for a structure for mounting integrated circuits on carriers which both reduces the effective total footprint of the integrated circuits so mounted and improves functional performance, structural robustness and susceptibility to noise. This need is particularly acute for memory structures. By the same token, there is a need for increased amounts of storage which can be rapidly accessed in packages which are conveniently removable from and replaceable in a processor while maintaining reliability comparable to floppy disks. Since the latter need cannot seemingly be met by static storage devices such as non-volatile storage devices (e.g. EEPROMs) and optical and magnetic storage media, active storage devices may afford a solution if issues of carrier size, structural robustness, noise susceptibility and stand-by power can be solved in regard to mounting of integrated circuits. The present invention thus addresses these needs both separately and concurrently.

High density integrated circuit packaging with chip stacking and via interconnections

International Business Machines Corporation


A teletext receiver for automatically controlling a displaying time interval for frames. In the teletext receiver for automatically controlling a displaying time interval for frames, teletext data is stored in a memory by divided fields and displayed per one field for a predetermined time so that the frame can be shifted by a desired time interval in response to an output signal from a microcomputer.

The present invention relates to a teletext receiver for an image terminal in televisions, VCRs or other data banks, and more particularly to a teletext receiver for automatically controlling a displaying time interval between pages in which pages can be shifted at a desired time interval, in accordance with a user's wishes, upon displaying a teletext data on a screen.
In conventional TVs or VCRs, a page of teletext data is displayed after a large number of preceding pages has been displayed, and the page shifting time becomes too large because of the existence of a large amount of data. Further, the larger the shifting time, the longer the displaying time becomes in reading and displaying the teletext data from a teletext broadcasting or a data bank.

Teletext receiver for automatically controlling displaying time interval


Disclosed is an ink composition which comprises water, an anionic dye, and a monoquaternary cationic penetrant of the formula ##STR1## wherein R.sub.1 is either a benzyl group or an alkyl group having at least about 3 carbon atoms, R.sub.2, R.sub.3, and R.sub.4 each, independently of the others, are hydrogen atoms, methyl groups, or ethyl groups, wherein two or more R groups can be joined together to form a ring, X is an anion, and n is an integer representing the charge on the anion, wherein the ink exhibits rapid penetration when applied to plain paper. Also disclosed is a set of inks for generating multicolored images which comprises (a) a first ink as described above; and (b) a second ink comprising water and a pigment; wherein intercolor bleed between the first ink and the second ink is reduced. Further disclosed are ink jet printing processes with the ink and ink set described above.

The present invention is directed to inks and to methods for the use thereof. More specifically, the present invention is directed to inks and ink sets for use in ink jet printing processes, wherein intercolor bleed between the inks is reduced. One embodiment of the present invention is directed to an ink composition which comprises water, an anionic dye, and a monoquaternary cationic penetrant of the formula ##STR2## wherein R.sub.1 is either a benzyl group or an alkyl group having at least about 3 carbon atoms, R.sub.2, R.sub.3, and R.sub.4 each, independently of the others, are hydrogen atoms, methyl groups, or ethyl groups, wherein two or more R groups can be joined together to form a ring, X is an anion, and n is an integer representing the charge on the anion, wherein the ink exhibits rapid penetration when applied to plain paper. Another embodiment of the present invention is directed to a process which comprises applying an ink composition which comprises water, an anionic dye, and a monoquaternary cationic penetrant of the formula ##STR3## wherein R.sub.1 is either a benzyl group or an alkyl group having at least about 3 carbon atoms, R.sub.2, R.sub.3, and R.sub.4 each, independently of the others, are hydrogen atoms, methyl groups, or ethyl groups, wherein two or more R groups can be joined together to form a ring, X is an anion, and n is an integer representing the charge on the anion, to a plain paper substrate, wherein the ink exhibits rapid penetration of the substrate. Yet another embodiment of the present invention is directed to a set of inks for generating multicolored images which comprises (a) a first ink comprising water, an anionic dye, and a monoquaternary cationic penetrant of the formula ##STR4## wherein R.sub.1 is either a benzyl group or an alkyl group having at least about 3 carbon atoms, R.sub.2, R.sub.3, and R.sub.4 each, independently of the others, are hydrogen atoms, methyl groups, or ethyl groups, wherein two or more R groups can be joined together to form a ring, X is an anion, and n is an integer representing the charge on the anion; and (b) a second ink comprising water and a pigment; wherein intercolor bleed between the first ink and the second ink is reduced. Still another embodiment of the present invention is directed to a process for generating multicolored images on a recording sheet which comprises (a) providing a first ink comprising water, an anionic dye, and a monoquaternary cationic penetrant of the formula ##STR5## wherein R.sub.1 is either a benzyl group or an alkyl group having at least about 3 carbon atoms, R.sub.2, R.sub.3, and R.sub.4 each, independently of the others, are hydrogen atoms, methyl groups, or ethyl groups, wherein two or more R groups can be joined together to form a ring, X is an anion, and n is an integer representing the charge on the anion; (b) providing a second ink comprising water and a pigment; (c) applying the first ink to the recording sheet; and (d) applying the second ink to the recording sheet; wherein the first ink is in contact with the second ink on the recording sheet, and wherein intercolor bleed between the first ink and the second ink is reduced.
Ink jet printing systems generally are of two types: continuous stream and drop-on-demand. In continuous stream ink jet systems, ink is emitted in a continuous stream under pressure through at least one orifice or nozzle. The stream is perturbed, causing it to break up into droplets at a fixed distance from the orifice. At the break-up point, the droplets are charged in accordance with digital data signals and passed through an electrostatic field which adjusts the trajectory of each droplet in order to direct it to a gutter for recirculation or a specific location on a recording medium. In drop-on-demand systems, a droplet is expelled from an orifice directly to a position on a recording medium in accordance with digital data signals. A droplet is not formed or expelled unless it is to be placed on the recording medium.
Since drop-on-demand systems require no ink recovery, charging, or deflection, the system is much simpler than the continuous stream type. There are two types of drop-on-demand ink jet systems. One type of drop-on-demand system has as its major components an ink filled channel or passageway having a nozzle on one end and a piezoelectric transducer near the other end to produce pressure pulses. The relatively large size of the transducer prevents close spacing of the nozzles, and physical limitations of the transducer result in low ink drop velocity. Low drop velocity seriously diminishes tolerances for drop velocity variation and directionality, thus impacting the system's ability to produce high quality copies. Drop-on-demand systems which use piezoelectric devices to expel the droplets also suffer the disadvantage of a slow printing speed.
Another type of drop-on-demand system is known as thermal ink jet, or bubble jet, and produces high velocity droplets and allows very close spacing of nozzles. The major components of this type of drop-on-demand system are an ink filled channel having a nozzle on one end and a heat generating resistor near the nozzle. Printing signals representing digital information originate an electric current pulse in a resistive layer within each ink passageway near the orifice or nozzle, causing the ink in the immediate vicinity to evaporate almost instantaneously and create a bubble. The ink at the orifice is forced out as a propelled droplet as the bubble expands. When the hydrodynamic motion of the ink stops, the process is ready to start all over again. With the introduction of a droplet ejection system based upon thermally generated bubbles, commonly referred to as the "bubble jet" system, the drop-on-demand ink jet printers provide simpler, lower cost devices than their continuous stream counterparts, and yet have substantially the same high speed printing capability.
The operating sequence of the bubble jet system begins with a current pulse through the resistive layer in the ink filled channel, the resistive layer being in close proximity to the orifice or nozzle for that channel. Heat is transferred from the resistor to the ink. The ink becomes superheated far above its normal boiling point, and for water based ink, finally reaches the critical temperature for bubble formation or nucleation of around 280.degree. C. Once nucleated, the bubble or water vapor thermally isolates the ink from the heater and no further heat can be applied to the ink. This bubble expands until all the heat stored in the ink in excess of the normal boiling point diffuses away or is used to convert liquid to vapor, which removes heat due to heat of vaporization. The expansion of the bubble forces a droplet of ink out of the nozzle, and once the excess heat is removed, the bubble collapses on the resistor. At this point, the resistor is no longer being heated because the current pulse has passed and, concurrently with the bubble collapse, the droplet is propelled at a high rate of speed in a direction towards a recording medium. The resistive layer encounters a severe cavitational force by the collapse of the bubble, which tends to erode it. Subsequently, the ink channel refills by capillary action. This entire bubble formation and collapse sequence occurs in about 10 microseconds. The channel can be refired after 100 to 500 microseconds minimum dwell time to enable the channel to be refilled and to enable the dynamic refilling factors to become somewhat dampened. Thermal ink jet processes are well known and are described in, for example, U.S. Pat. No. 4,601,777, U.S. Pat. No. 4,251,824, U.S. Pat. No. 4,410,899, U.S. Pat. No. 4,412,224, and U.S. Pat. No. 4,532,530, the disclosures of each of which are totally incorporated herein by reference.
Acoustic ink jet printing processes are also known. As is known, an acoustic beam exerts a radiation pressure against objects upon which it impinges. Thus, when an acoustic beam impinges on a free surface (i.e., liquid/air interface) of a pool of liquid from beneath, the radiation pressure which it exerts against the surface of the pool may reach a sufficiently high level to release individual droplets of liquid from the pool, despite the restraining force of surface tension. Focusing the beam on or near the surface of the pool intensifies the radiation pressure it exerts for a given amount of input power. These principles have been applied to prior ink jet and acoustic printing proposals. For example, K. A. Krause, "Focusing Ink Jet Head," IBM Technical Disclosure Bulletin, Vol. 16, No. 4, September 1973, pp. 1168-1170, the disclosure of which is totally incorporated herein by reference, describes an ink jet in which an acoustic beam emanating from a concave surface and confined by a conical aperture was used to propel ink droplets out through a small ejection orifice. Acoustic ink printers typically comprise one or more acoustic radiators for illuminating the free surface of a pool of liquid ink with respective acoustic beams. Each of these beams usually is brought to focus at or near the surface of the reservoir (i.e., the liquid/air interface). Furthermore, printing conventionally is performed by independently modulating the excitation of the acoustic radiators in accordance with the input data samples for the image that is to be printed. This modulation enables the radiation pressure which each of the beams exerts against the free ink surface to make brief, controlled excursions to a sufficiently high pressure level for overcoming the restraining force of surface tension. That, in turn, causes individual droplets of ink to be ejected from the free ink surface on demand at an adequate velocity to cause them to deposit in an image configuration on a nearby recording medium. The acoustic beam may be intensity modulated or focused/defocused to control the ejection timing, or an external source may be used to extract droplets from the acoustically excited liquid on the surface of the pool on demand. Regardless of the timing mechanism employed, the size of the ejected droplets is determined by the waist diameter of the focused acoustic beam. Acoustic ink printing is attractive because it does not require the nozzles or the small ejection orifices which have caused many of the reliability and pixel placement accuracy problems that conventional drop on demand and continuous stream ink jet printers have suffered. The size of the ejection orifice is a critical design parameter of an ink jet because it determines the size of the droplets of ink that the jet ejects. As a result, the size of the ejection orifice cannot be increased, without sacrificing resolution. Acoustic printing has increased intrinsic reliability because there are no nozzles to clog. As will be appreciated, the elimination of the clogged nozzle failure mode is especially relevant to the reliability of large arrays of ink ejectors, such as page width arrays comprising several thousand separate ejectors. Furthermore, small ejection orifices are avoided, so acoustic printing can be performed with a greater variety of inks than conventional ink jet printing, including inks having higher viscosities and inks containing pigments and other particulate components. It has been found that acoustic ink printers embodying printheads comprising acoustically illuminated spherical focusing lenses can print precisely positioned pixels (i.e., picture elements) at resolutions which are sufficient for high quality printing of relatively complex images. It has also has been discovered that the size of the individual pixels printed by such a printer can be varied over a significant range during operation, thereby accommodating, for example, the printing of variably shaded images. Furthermore, the known droplet ejector technology can be adapted to a variety of printhead configurations, including (1) single ejector embodiments for raster scan printing, (2) matrix configured ejector arrays for matrix printing, and (3) several different types of pagewidth ejector arrays, ranging from single row, sparse arrays for hybrid forms of parallel/serial printing to multiple row staggered arrays with individual ejectors for each of the pixel positions or addresses within a pagewidth image field (i.e., single ejector/pixel/line) for ordinary line printing. Inks suitable for acoustic ink jet printing typically are liquid at ambient temperatures (i.e., about 25.degree. C.), but in other embodiments the ink is in a solid state at ambient temperatures and provision is made for liquefying the ink by heating or any other suitable method prior to introduction of the ink into the printhead. Images of two or more colors can be generated by several methods, including by processes wherein a single printhead launches acoustic waves into pools of different colored inks. Further information regarding acoustic ink jet printing apparatus and processes is disclosed in, for example, U.S. Pat. No. 4,308,547, U.S. Pat. No. 4,697,195, U.S. Pat. No. 5,028,937, U.S. Pat. No. 5,041,849, U.S. Pat. No. 4,751,529, U.S. Pat. No. 4,751,530, U.S. Pat. No. 4,751,534, U.S. Pat. No. 4,801,953, and U.S. Pat. No. 4,797,693, the disclosures of each of which are totally incorporated herein by reference. The use of focused acoustic beams to eject droplets of controlled diameter and velocity from a free-liquid surface is also described in J. Appl. Phys., vol. 65, no. 9 (1 May 1989) and references therein, the disclosure of which is totally incorporated herein by reference.
U.S. Pat. No. 5,019,166 (Schwarz), the disclosure of which is totally incorporated herein by reference, discloses a thermal ink jet printing composition comprising a dye, a liquid medium, and a surfactant selected from the group consisting of polyoxyalkylated ethers, anionic bitail fluorothio alkyls, alkyl aryl sulfonates, alkyl amine quaternary salts, and mixtures thereof. Also disclosed is a process for generating images which comprises causing the ink compositions disclosed herein to be ejected from a thermal ink jet printer in imagewise fashion onto a substrate.
Copending application U.S. Ser. No. 09/046,895, filed Mar. 24, 1998, entitled "Ink Compositions and Multicolor Thermal Ink Jet Printing Process for the Production of High Quality Images," with the named inventor John Wei-Ping Lin, the disclosure of which is totally incorporated herein by reference, discloses a set of inks for printing multicolor images in an ink jet printer, said ink set comprising (A) a first ink having a first color and comprising water and a colorant selected from the group consisting of (1) anionic dyes, (2) dyes having physical or chemically associated therewith a stabilizing agent having anionic groups thereon, (3) pigment particles having anionic groups chemically attached thereto, (4) pigment particles having physically or chemically associated therewith a stabilizing agent having anionic groups thereon, and (5) mixtures thereof; and (B) a second ink comprising water, an optional colorant having a color other than the first color, and an ammonium salt having at least two cationic ammonium functional groups, wherein the colorant in the first ink is capable of being immobilized on a printing substrate by interaction with the ammonium salt having at least two cationic ammonium functional groups in the second ink.
Copending application U.S. Ser. No. 09/047,097, filed Mar. 24, 1998, entitled "Ink Compositions With Improved Waterfastness and Smear Resistance," with the named inventors Kurt B. Gundlach, Richard L. Colt, Luis A. Sanchez, Maura A. Sweeney, and Edward J. Radigan, Jr., the disclosure of which is totally incorporated herein by reference, discloses an ink composition which comprises water, an anionic dye, and a polyquaternary amine compound selected from the group consisting of polydiallyl dimethyl ammonium compounds, polyquaternized polyvinylamines, polyquaternized polyallylamines, and mixtures thereof. Also disclosed are methods for using the aforementioned ink composition in ink jet printing processes.
Copending application U.S. Ser. No. 09/046,852, filed Mar. 24, 1998, entitled "Ink Compositions With Improved Shelf Stability", with the named inventors Kurt B. Gundlach, Luis A. Sanchez, Richard L. Colt, Maura A. Sweeney, and William M. Schwarz, the disclosure of which is totally incorporated herein by reference, discloses an ink composition which comprises (1) water; (2) a nonpolymeric salt comprising at least one cation and at least one anion; and (3) a colorant comprising an anionic dye complexed with a polyquaternary amine compound. Also disclosed is an ink composition which comprises (1) water; (2) a nonpolymeric salt comprising at least one cation and at least one anion; (3) an anionic dye; and (4) a polyquaternary amine compound. In one embodiment, the polyquaternary amine compound is selected from the group consisting of polydiallyl dimethyl ammonium compounds, polyquaternized polyvinylamines, polyquaternized polyallylamines, epichlorohydrin/amine copolymers, cationic amido amine copolymers, copolymers of vinyl pyrrolidinone and a vinyl imidazolium salt, and mixtures thereof.
Copending application U.S. Ser. No. 09/046,849, filed Mar. 24, 1998, entitled "Ink Compositions Containing Cationic Amido Amine Polymers", with the named inventor William M. Schwarz, the disclosure of which is totally incorporated herein by reference, discloses an ink composition which comprises (1) water; (2) a dye; and (3) a cationic amido amine copolymer. Also disclosed are methods for using the aforementioned ink composition in ink jet printing processes.
Copending application U.S. Ser. No. 09/047,278, filed Mar. 24, 1998, entitled "Ink Compositions Containing Vinyl Pyrrolidinone/Vinyl Imidazolium Copolymers", with the named inventor William M. Schwarz, the disclosure of which is totally incorporated herein by reference, discloses an ink composition which comprises (1) water; (2) an anionic dye; and (3) a copolymer of vinyl pyrrolidinone and a vinyl imidazolium salt. Also disclosed are methods for using the aforementioned ink compositions in ink jet printing processes.
Copending application U.S. Ser. No. 09/106,391; entitled "Ink Compositions Containing Oxy Acids or Oxy Acid Salts," with the named inventor William M. Schwarz, filed concurrently herewith, the disclosure of which is totally incorporated herein by reference, discloses an ink composition which comprises (1) water; (2) a colorant; and (3) an additive selected from the group consisting of oxy acids, oxy acid salts, and mixtures thereof. Also disclosed is a thermal ink jet printing process employing the ink.
Copending application U.S. Ser. No. 09/106,396; entitled "Ink Compositions Containing Ionic Liquid Solvents," with the named inventor William M. Schwarz, filed concurrently herewith, the disclosure of which is totally incorporated herein by reference, discloses an ink composition which comprises water, a colorant, and an ionic liquid material. In a preferred embodiment, the ink is substantially free of organic solvents. Also disclosed is a process which comprises incorporating the ink composition into an ink jet printing apparatus and causing droplets of the ink composition to be ejected in an imagewise pattern onto a substrate.
Copending application U.S. Ser. No. 09/106,621; entitled "Ink Compositions Substantially Free of Organic Liquids," with the named inventors Kurt B. Gundlach, Maura A. Sweeney, Luis A. Sanchez, Richard L. Colt, and Melvin D. Croucher, filed concurrently herewith, the disclosure of which is totally incorporated herein by reference, discloses an ink composition which comprises water, an acid dye, a monovalent salt, a polyquaternary amine compound, and an optional surfactant, said ink being substantially free of organic solvents. The ink is particularly suitable for applications such as ink jet printing and marking pens. The disclosed inks in some embodiments are substantially indelible. Also disclosed is a composition for removing the ink compositions from substrates to which they have been applied which comprises water and a dianionic surfactant, optionally further containing a salt, urea, and/or a viscosity building agent such as a gum.
While known compositions and processes are suitable for their intended purposes, a need remains for improved ink compositions for ink jet printing. In addition, a need remains for ink compositions which exhibit reduced intercolor bleed when printed adjacent to each other or on top of each other. Further, a need remains for ink compositions which exhibit reduced edge raggedness, feathering, and MFLEN, particularly when printed on plain paper. Additionally, a need remains for inks with desirable substrate penetrating characteristics. There is also a need for inks which exhibit reduced wet and dry smear characteristics. In addition, there is a need for ink compositions with good waterfastness characteristics. Further, there is a need for ink compositions with desirable substrate wetting characteristics.


A scaffold defines a plurality of channels, into which axons of a severed nerve may regenerate, such as after limb amputation. Each channel includes a corresponding electrode. Regenerating axons may make electrical contact with the electrodes. Each channel is at least partially filled with a growth factor selected to selectively stimulate axon regeneration. Adjacent channels may include different growth factors, so as to attract different types of axons, for example efferent axons and afferent axons, to each of the adjacent channels. The growth factors may be distributed in the channels so as to present a gradient across a geometry of each channel. This gradient provides enhanced differentiated geometric guidance to the axons, thereby yielding better specificity, in terms of which axons regenerate into which channels. Topography, such as geometric patterns in walls, ceilings and floors of the channels, may also be used to selectively encourage axon regeneration into the channels.

Limb amputations can significantly negatively impact amputees' lives. Fortunately, prosthetic devices can partially compensate for loss of limb structure (bone, skin, etc.) and actuation (muscle). An ideal, albeit not yet developed, prosthetic device would include a separate motor for each lost muscle or degree of limb freedom, and each such motor would be driven by a discrete signal from the amputee's nervous system. Similarly, the ideal prosthetic device would include a sensor (touch, temperature, etc.) corresponding to each sense signal the amputated limb would otherwise have sent to the amputee's nervous system.
In a nervous system, efferent axons, otherwise known as motor or effector neurons, carry nerve impulses from a central nervous system to effectors, such as muscles and glands. On the other hand, afferent axons, otherwise known as sensory nerves or receptor neurons, carry nerve impulses from receptors or sense organs towards the central nervous system. Neural interfaces are, therefore, important for coupling efferent and afferent nerves to motors and sensors, respectively, in prosthetic devices.
Interfacing with efferent and afferent axons is difficult, at least in part due to their small sizes. In general, as illustrated in FIG. 1, a peripheral nerve 100 includes blood vessels 102 and several fascicles 104, each fascicle containing a bundle of axons 106. A typical human fascicle is about 500μ in diameter.
In some prior art nerve interfaces, three electrodes are disposed longitudinally along a nerve or a fascicle. Two of the electrodes are used to establish an electrical reference voltage, and the third electrode provides an electrical measurement signal. However, the electrical measurement provides an integrated signal, i.e., a sum of signals from a plurality of axons in the nerve or fascicle. A fascicle contains a combination of efferent and afferent axons, and all the efferent axons typically do not control a single muscle. Thus, the integrated measurement signal is of limited value for selectively driving a motor of a prosthetic device.
Higher density neural interfaces, i.e., interfaces that provide an electrical signal from a small numbers of axons, ideally from one axon, would facilitate finer motor control in prosthetic devices than is achievable in the prior art. Similarly, higher density neural interfaces would facilitate more granular sensory feedback from prosthetic devices to central nervous systems.

Multi-layered micro-channel electrode array with regenerative selectivity

The Charles Stark Draper Laboratory, Inc.


A method for recording and displaying achievements on a martial arts belt is provided with a base member, which is removably or permanently coupled with the martial arts belt. A plurality of achievement indicators are provided to releasably engage the base member and display indicia relating to particular achievements. Indicia may be disposed along the base member and read using an electronic scanner that is coupled with a computer to track individual student attendance. Software may be provided for storing and organizing data relating to the achievements and attendance of each student.

1. Field of the Invention
The present invention relates to a method and means for recording and displaying martial arts achievements, and more particularly to a method that employs the use of a clip that is coupled with an individual's belt and receives one or more removable achievement indicators, which are prominently displayed on the clip, that assist in the tracking and recording of the individual's achievements and class attendance.
2. Description of the Prior Art
Martial arts schools have provided valuable exercise, self-defense training and discipline to countless students that range in age from young children to the elderly. Most structured martial arts programs provide their students with several different tests and various tasks that must be accomplished in order to rise through the various skill levels. Currently, colored adhesive stripes are used to indicate the student's attendance, rank or achievements within the program. The stripes are typically made from pre-cut adhesive strips, or colored tape that is torn into strips, and wrapped around a portion of the student's belt, forming a transverse stripe across the belt. Unfortunately, these stripes are not reusable and often fall off of the belt, which causes problems with tracking the student's achievements.
In one prior art attempt to resolve the issue of the student losing one or more stripes, strips of material are used, having a heat-activated adhesive on their rearward surfaces. These strips are positioned along the belt and, with heat from an iron, are adhered to the belt. While this reduces the likelihood that a student will lose one or more stripes, the heat-activated adhesive is known to fail from time to time. These types of stripes also fail to address the issue of being able to effectively reuse the stripes. Moreover, these stripes can cost as much as $1.29 a piece, which can become costly. Most martial arts schools have a large number of students enrolled in various classes. Each student will presumably earn multiple achievement stripes for every level attained while attending the martial arts school. Over time, hundreds of students, each attaining numerous achievements, could generate a sizable expense for a martial arts school.
Most successful martial arts schools also attempt to keep an accurate attendance count for their classes. Most schools issue identification cards that are presented by the students upon their arrival at class. Unfortunately, ID cards are frequently damaged, disorganized, lost or forgotten at home. Equipment used to produce the ID cards requires the investment in equipment, such as a laminating machine, that has few if any other uses at the martial arts school. Keeping track of attendance through a role call and a manual tabulation becomes a drain on valuable class time and creates records that are not easily reviewed in the future.
Accordingly, what is needed is a new method and means for displaying and tracking martial arts achievements and attendance that simplifies the tracking of achievements and attendance of martial arts students, while reducing relative long-term costs.

Method and means for recording and displaying martial arts achievements


During voice-over-Internet-protocol calls, data are gathered about packet loss on the path over the IP network. An algorithm (in the preferred embodiment, the Sliding Window Exponential Average Algorithm) is used to evaluate the packet loss. The Sliding Window Exponential Average Algorithm allows for past performance to be considered along with current performance. If the resulting evaluation fails to meet predetermined criteria, the path over the IP network is blocked and calls are routed over an alternative.

In voice-over-Internet-protocol (VoIP) telephony systems, voice calls are digitized, assembled into packets, and then directed over Internet protocol (IP) networks instead of being sent via the Switched Circuit Network (SCN). The SCN includes networks such as the Integrated Services Digital Network (ISDN) and the Public Switched Telephone Network (PSTN). Internet technologies were originally designed to handle the transport of data resilient to delays, jitter, and retransmissions, all of which can result in packet loss. Voice and other real-time media are much more sensitive to these inevitable IP network characteristics. IP instabilities can cause gaps in voice transmission, clicks and other background noises, and distortions. Acceptable quality of service (QoS) is a major concern in VoIP.
Currently, there is no system that ensures that VoIP calls are routed with acceptable quality. What is needed is a VoIP system that checks route quality and routes VoIP calls only over routes that meet a quality criterion.

Quality-of-service monitor for voice-over-Internet-protocol calls


Disclosure relates to a fixed abrasive-grain processing device and a method of fixed abrasive-grain processing used for producing a semiconductor wafer, and a method for producing a semiconductor wafer which make the surface of the semiconductor wafer possible to have preferable flatness and which can prevent the number of steps and the installation area of facilities from increasing. The producing of semiconductor wafers uses a fixed abrasive-grain processing device including a lower fixed abrasive-grain layer that is adjacent to the top surface of the lower surface-plate and that grinds the top surfaces of the plurality of semiconductor wafers; an upper fixed abrasive-grain layer that is adjacent to the bottom surface of the upper surface-plate and that grinds the bottom surfaces of the plurality of semiconductor wafers; a carrier plate that is horizontally interposed between the lower surface-plate and the upper surface-plate and that includes a plurality of holes each accommodating one of the plurality of semiconductor wafers; and a carrier rotating device that circularly moves the carrier plate, wherein the lower fixed abrasive-grain layer and the upper fixed abrasive-grain layer include fixed abrasive grain having a diameter of 4 μm or less and being dispersed and fixed in elastic members.

The methods illustrated in FIGS. 15 and 16 are known as conventional methods of producing a semiconductor (silicon) wafer.
In the method of FIG. 15, firstly in a slicing step S110 a single-crystal ingot is sliced into wafers W; in a beveling step S120 the edge (circumference) of the wafer W is beveled; in a lapping step S130 the both surfaces of a number of wafers W are concurrently lapped with abrasive grain (free abrasive grain) being relatively coarse (i.e. batch lapping), which is followed by an etching step S140 and a mirror-surface polishing step S150. Thereby, the wafers W after subjected to the lapping are formed into final products.
The lapping step S130 will now be detailed. The lapping step S130 is carried out through the use of a lapping device 100 as illustrated in FIG. 17. The lapping device 100 includes a lower surface-plate 101 having an upward supporting surface 101a; an upper surface-plate 102 having a supporting surface 102a that overlies the supporting surface 101a of the lower surface-plate 101; a sun gear 103 disposed at the inner radius of the lower surface-plate 101; an internal gear 104 disposed at the outer circumference of the lower surface-plate 101; a carrier plate 105 that is interposed between the supporting surface 101a of the lower surface-plate 101 and the supporting surface 102a of the upper surface-plate 102 and that engages with the sun gear 103 and the internal gear 104; and a slurry supplying device 106 that supplies wafers W set inside respective holes 105a of the carrier plate 105 with a slurry containing relatively rough abrasive grain (free abrasive grain having a granularity of #1000 through #1500).
While the lower surface-plate 101 and the upper surface-plate 102 are rotating relatively to each other, the sun gear 103 and the internal gear 104 cause the carrier plate 105 to make planet motion, so that free abrasive grain supplied to the supporting surfaces 101a and 102a from the slurry supplying device 106 laps the both surfaces of a number of wafers W set in each hole 105a at the same time.
In the meantime, in a method shown in FIG. 16, in a slicing step S210 a single-crystal ingot is sliced into wafers W. In the subsequent grinding step S220 the top surface and the bottom surface of a wafer W one surface for each time is ground with abrasive grain (fixed abrasive grain) having a relatively coarse granularity (single-wafer grinding). The ground wafer W is then subjected to a beveling step S230, an etching step S240, and a mirror-surface polishing step S250 to be formed into a final product.
The grinding step S220 will now be detailed. In the grinding step S220 a grinding device 200 shown in FIGS. 18(a) and 18(b) is used. The grinding device 200 includes a turntable 201; a chuck 202 that overlies the turntable 201 and that vacuum sucks a wafer W; a grindstone support 204 that overlies the chuck 202 and having a grindstone 203 fixed thereto; and a grinding-water supplying device 205 that supplies a wafer W with grinding water. The grindstone 203 is formed of abrasive grain having a granularity of, for example, #300 through #1000.
While the turntable 201 and the grindstone support 204 are rotating relatively to each other and the grinding-water supplying device 205 is supplying the grinding water, the grindstone 203 is pressed against the surface of a wafer W, so that the top and the bottom surfaces of the wafer W is ground one surface for each time.
The lapping device 100 and the grinding device 200 are disclosed in Patent Reference 1.
However, processing wafers W in the methods of FIGS. 15 and 16 may sometime leave scratches on the surface of the mirror-polished wafer W. In other words, since in the lapping step S130 and the grinding step S220 carried out before the mirror-surface polishing relatively coarse abrasive grain is used, the subsequent normal mirror-surface polishing sometime does not completely remove all scratches on the surface.
For the above, as shown in FIGS. 19 and 20, finish grinding steps S135 and S225 are carried out after the lapping step S130 and the grinding step S220, respectively and before the mirror-surface polishing step S150 or S250, respectively. The finish grinding steps S135 and S225 use abrasive grain having a granularity of #2000 through #8000, such as resin-bonded grindstone, and which relatively encourages self-sharpening to finish the top and the bottom surface of a wafer W by polishing one surface for each time.

Fixed abrasive-grain processing device, method of fixed abrasive-grain processing, and method for producing semiconductor wafer


Embodiments of the present invention are directed to an in-situ warpage monitoring system and method for preventing head-in-pillow (HIP) or other potential defect escapes during a solder reflow process. In a non-limiting embodiment of the invention, a product is passed through a reflow oven. The product can include a printed circuit board (PCB). An amount of warpage of the product is measured at one or more monitoring devices positioned along the reflow oven. Each measured amount of warpage is compared to a predetermined warpage limit. The product is sorted into one of a plurality of designated lots based on the comparison. The lots can include a pass lot, a fail lot, and a marginal pass lot.

The present invention generally relates to fabrication methods and resulting structures for semiconductor devices, and more specifically, to in-situ warpage monitoring of an assembly during the solder reflow process to prevent head-in-pillow (HIP) or other defects from escaping to downstream processes.
Once the formation of semiconductor devices and interconnects on a semiconductor wafer is completed, the semiconductor wafer is diced into individual semiconductor chips. A semiconductor chip, also commonly referred to as an integrated circuit (IC) chip or die, is typically assembled into a semiconductor chip package that is soldered to a printed circuit board during a far back end of line (FBEOL) integration scheme.
The packaging generally provides mechanical protection and electrical connections to an external element. One typical packaging technology is Controlled Collapse Chip Connection (C4) packaging. In C4 packaging a number of round solder bumps ("C4s") are attached to a top surface of each IC chip. The IC chip, via the solder bumps, is soldered to solder pads located along a surface of a package substrate, forming a metallurgical joint between the chip and the substrate. The packaging substrate may then be assembled on a larger circuit board. The combined chip and laminate may be referred to as a module or assembly in some cases. Of course, a module may include other elements, such as a lid.

Process for in-situ warpage monitoring during solder reflow for head-in-pillow defect escape prevention

International Business Machines Corporation


The present invention relates to a wireless communication system, and more particularly, to a method and apparatus for transceiving a downlink control channel. According to one embodiment of the present invention, method in which a base station transmits downlink control information in a wireless communication system comprises: a step for determining an allocatable resource region for an enhanced physical downlink control channel (E-PDCCH) of a local allocation system; a step for allocating an E-PDCCH to the determined allocatable resource region for the E-PDCCH; and a step for transmitting the downlink control information on the allocated E-PDCCH. The allocatable resource region for the E-PDCCH can be set as a group of partial resource regions in each of a plurality of partitions when a downlink system bandwidth contains said plurality of partitions.

In a conventional wireless communication system, an eNB can provide scheduling information for uplink transmission and/or downlink reception of user equipment (UE) through a physical downlink control channel (PDCCH) to the UE. Resources through which a downlink control channel such as the PDCCH can be transmitted are limited to a specific region in the conventional wireless communication system.
There are demands for support of increased transmission capacity, improvement of inter-cell interference coordination, support of coordinated multi-point (CoMP) and multi-user multiple input multiple output (MU-MIMO), etc. However, restrictions on locations of downlink control channel transmission resources in the conventional wireless communication system may not satisfy the above-described demands. Accordingly, introduction of a new downlink control channel, transmitted in a physical resource region different from a downlink control channel transmission region defined in the conventional wireless communication system, is under discussion.

Method and apparatus for transceiving a downlink control channel in a wireless communication system


The invention discloses a display panel, a method of manufacturing the same and a display device so as to simplify a process of transmitting an electrical signal between a first substrate and a second substrate of the display panel at a lower cost. The display panel includes a first substrate and a second substrate disposed opposite to each other. The first substrate has a concave groove surrounded by a convex section and facing the second substrate. The display panel also includes an electrode layer on the surface of the groove and having at least one first conductive section extending outward from inside of the concave groove to the top end face of the convex section; and at least one second conductive section on the second substrate and electrically connected with the respective first conductive section.

Flat panel displays having a small size, lightweight, low power consumption, no radiation and other features, such as Thin Film Transistor Liquid Crystal Display (TFT-LCD), Organic Light Emitting Diode (OLED) displays, and the like, have been developed rapidly in recent years.
A display panel of a flat panel display typically includes a first substrate, e.g., a color filter substrate of an LCD display or a package substrate of an OLED display, and a second substrate, e.g., a Thin Film Transistor (TFT) array substrate of an LCD display or an OLED display. When a common electrode or an inbuilt touch control pad of the display panel above is formed on the first substrate, a display function or a touch control function needs to be performed by providing a conduction scheme of electrically connecting the common electrode or the inbuilt touch control pad on the first substrate with a TFT array circuit on the second substrate. In the prior art, typically such a conduction scheme of electrically connecting a Flexible Printed Circuit Board (FPC) is adopted that one ends of a plurality of Flexible Printed Circuit Boards (FPCs) are bonded on the common electrode or the inbuilt touch control pad on the first substrate and the other ends thereof are bonded on leads of the TFT array circuit of the TFT array substrate respectively in two bonding processes so that the common electrode or the inbuilt touch control pad on the first substrate are electrically connected with the TFT array substrate on the second substrate. However, an implementation of such a conduction scheme requires multiple FPCs which have to be bonded twice, thus making the process flow complicated and costly.

Display panel, method of manufacturing the same and display device


Briefly, some embodiments of the invention may provide devices, systems and methods of memory mapping for one or more virtual machines. For example, a method in accordance with an embodiment of the invention may include mapping a memory area as a first category in relation to a first address space used by a virtual machine and as a second category in relation to a second address space used by a virtual machine monitor.

In the field of computing, a processor of a computing platform may execute instructions invoked by an environment known as a Virtual Machine (VM), for example, to simulate a certain Operating System (OS) or application. Some instructions, if executed by the host processor, may cause the computing platform to become unstable, to crash, or to behave unexpectedly.
It will be appreciated that for simplicity and clarity of illustration, elements shown in the figures have not necessarily been drawn to scale. For example, the dimensions of some of the elements may be exaggerated relative to other elements for clarity. Further, where considered appropriate, reference numerals may be repeated among the figures to indicate corresponding or analogous elements.

Device, system, and method of virtual machine memory mapping


Method and apparatus for producing vitreous optical elements by injection molding, which essentially includes the stages of: melting down a glass material into a molten state in a viscosity at or lower than a working point of the glass material; injecting molten glass under pressure into a mold cavity defined between transfer surfaces of relatively movable mold members of a mold assembly unit in communication with a sprue connecting the mold cavity with an injection port on the outer side of the mold assembly unit; and applying a predetermined pressure on the glass material in the mold cavity while cooling the mold assembly unit down to a temperature in the vicinity of yielding point of the glass material.

1. Field of the Art
This invention relates to a method and an apparatus for producing vitreous optical elements by infection molding, i.e., by introducing heated molten -glass into a mold cavity having transfer surfaces to be copied onto glass moldings.
2. Prior Art
In the manufacture of precision optics like optical glass lenses, it has long been the conventional practice to resort to a grinding and polishing process. However, the conventional grinding and polishing processes have a number of drawbacks such as low production efficiency, difficulty of producing aspheric lenses etc. As a substitute for the conventional grinding and polishing process, it has also been known in the art to produce optical elements by compression molding using preformed glass of a predetermined shape, i.e., by heating and softening a preform of glass and compressing same to shape within a die. Further, developments have been made for injection molding processes in regard to the production of optical elements of the class as mentioned above. Of these molding processes, the compression molding process requires to prepare a large number of preforms beforehand, while the injection molding process which is free of problems of this sort is superior in terms of production efficiency.
In an injection molding process, glass material is heated to lower its viscosity to a working point, and resulting molten glass of low viscosity is injected into a mold under a predetermined pressure to mold a vitreous optical element having contours defined by a mold cavity. In addition to the mold cavity with transfer surfaces, a mold assembly unit for use in injection molding is normally provided with a sprue in communication with the cavity for introduction of molten glass into the latter. At one end, the sprue is opened into the mold cavity, and, at the other end, opened on the outer periphery of a shell block of the mold assembly. Heated molten glass, maintained in a fluidized state by reduction in viscosity, is injected into the sprue under a predetermined pressure to fill in the mold cavity completely.
Subsequent to injection of molten glass into the mold cavity, the whole mold assembly unit is cooled down to let glass solidify to the shape of the mold cavity, copying the contours defined by mold cavity walls. Accordingly, a molded optical element of predetermined shape or contours is obtained upon ejecting the molded product from the mold and cutting off surplus glass from the sprue.
The temperature of glass working point, at which glass has suitable viscosity in injection molding, is normally higher than 600.degree. C. depending upon the properties of the glass material concerned, and at least higher than 550.degree. C. even in a case where glass material of particular properties is selected. Namely, prior to introduction into a mold, glass material is heated into a molten state having a temperature in the vicinity of or higher than the glass working point, and then cooled down for solidification of glass which initially takes place at a transformation temperature in the range of from 450.degree. C. to 400.degree. C. Glass stays in a fluidized state until the transformation temperature, and undergoes thermal contractions on further temperature drops. The thermal contractions of this sort gives rise to the problems of surface sink or shrink marks which occur to the surfaces of solidified glass within the mold as a result of thermal contraction, making it difficult to obtain products of high precision quality surface contour.

Method for producing vitreous optical elements by injection molding with pressure application


The present invention is intended to notify vehicle deceleration information more accurately. When an engine torque Te has a negative value, a sound volume adjustment coefficient kt is calculated depending on the engine torque Te, and a sound volume is adjusted depending on the sound volume adjustment coefficient kt. The sound volume adjustment coefficient kt is set to have a larger value as the absolute value of the engine torque Te becomes larger.

In the related art described in Patent Document 1, a sound pressure of a sound effect is adjusted depending on the rotational frequency of an engine, and the output of the sound effect is stopped when a variation per unit time of the rotational frequency is greater than a predetermined value.

Deceleration information notification device and deceleration information notification method