A new method to form a floating gate isolation test structure in the manufacture of a memory device is achieved. The method comprises providing a substrate. A gate oxide layer is formed overlying the substrate. A floating gate conductor layer is deposited overlying the gate oxide layer. The floating gate conductor layer is patterned to expose the substrate for planned source regions. Ions are implanted into the exposed substrate to form the source regions. Contacting structures are formed to the source regions. Contacting structures are formed to the floating gate conductor layer.

(1) Field of the Invention
The invention relates to integrated circuit devices, and more particularly, to a method to monitor isolation integrity of the floating gate in the manufacture of a nonvolatile memory device.
(2) Description of the Prior Art
Memory devices are an important building block in the art of integrated circuit design and manufacture. Memory devices are used for temporary and permanent data storage in the integrated circuit or system. For example, a random access memory, or RAM, can be used to temporarily store data values. RAM memories are formed in static or dynamic forms. In either case, RAM requires a continuous power supply in order to retain the data. Once power is removed, the RAM cell discharges and the data value is lost. In read-only memory, or ROM, data is permanently stored. Removal of the power supply doesn't erase the data state. Nonvolatile programmable memory devices, such as electrically erasable programmable ROM, or EEPROM, also maintain the data state in the absence of the power supply. However, EEPROM also adds the ability to program and re-program the data state values.
A popular form of EEPROM in the art is the flash EEPROM. In the flash EEPROM, a block of the memory array may be erased simultaneously. Typically, such flash EEPROM devices are MOSFET devices formed with a complex gate comprising a control electrode and a floating electrode. Referring now to FIG. 14, a cross section of a portion of an exemplary flash EEPROM memory array is illustrated. In this example, two flash transistors are formed around a common source region 50. In practice, a large array of these devices, or cells, are formed together in a memory chip. The devices are formed on a substrate 10. Each device comprises a floating gate and control gate. The floating gate comprises a floating gate conductor layer 22 overlying the substrate 10 with a floating gate oxide layer 18 therebetween. The control gate comprises a control gate conductor layer 90 overlying the substrate 10 with a control gate oxide layer 98 therebetween. In addition, a dielectric layer 96 is formed between the control gate conductor layer 90 and the floating gate conductor layer 22 to separate and to electrically isolate the floating and control gates. The flash transistors further comprise source regions 50 in the substrate. Here, the source region is a common source or source line. In addition, drain regions 92, or bit lines, are formed in the substrate 10. The exemplary flash transistors are split-gate devices. Split-gate devices are formed such the device channel between the drain regions 92 and the source regions 50 is controlled by two, distinct regions. In a first region, the control gate 90 directly overlies the substrate 10. In a second region, the floating gate 22 directly overlies the substrate 10.
In the flash device, the voltage threshold of the complex-gated MOSFET is controlled by charge storage on the floating gate 22. If the flash device is formed on a p-type substrate 10, then the resulting device is an NMOS transistor. This NMOS transistor will be turned ON when the control gate 22 voltage is forced to a value above the threshold voltage required to invert the p-type substrate 10 between the drain 92 and source 50 and to thereby create an n-channel region. In this case, a positive voltage must be forced onto the control gate 90 to invert the channel. In the first region, where the control gate 90 is directly over the substrate 10, inversion occurs as in a standard MOS device. However, in the second region, where the floating gate 22 directly overlies the substrate 10, the control gate voltage is divide by the series capacitance of the floating gate 22. Therefore, a larger control gate voltage is required to create the channel under the floating gate 22.
In addition to the capacitive effect, the threshold voltage of the flash device varies directly with the stored charge on the floating gate 22. For example, if a negative charge is stored on the floating gate 22, then the threshold voltage is increased due to the need to compensate for the negative charge prior to creating the channel. Conversely, positive charge on the floating gate 22 will decrease the threshold voltage. This effect is used in the flash device as a means of storing the data state. The device is erased or is programmed by either removing charge from or storing charge onto the floating gate 22. There are several mechanisms for moving charge onto or off from the floating gate 22. Each involves raising the energy of the electrons such that they cross one of the dielectric layers 18 and 96. For example, electrons may move from the source region 50 or from the substrate 10 onto the floating gate 22 during a programming operation. Electrons may move from the floating gate 22 to the control gate 90 during an erasing operation.
Once the floating gate 22 is charged/discharged, the flash device is designed to store that state indefinitely. Since the floating gate conductor layer 22 is not connected to any other conductor layer, the charge state of the floating gate 22 should, under ideal conditions, be maintained indefinitely. However, the charge storage capability may be compromised. If the floating gate oxide layer 18 is damaged or is otherwise incorrectly formed, then charge leakage paths 115 and 120 may be formed between the floating gate 22 and the substrate 10 or the source region 50. If the dielectric layer 38 between the floating gate 22 and the source plug layer 54 is defective, then charge can leak through this isolation interface 125.
In those cases where any of the dielectric layers surrounding the floating gate 22 is defective, then the floating gate 22 may be effectively shorted to the conductive layer on the other side of that defective dielectric. This condition is called a "stuck" condition. In this case, the floating gate 22 is typically described as "stuck" to the source 50 or to the substrate 10. In the art of integrated circuit testing, circuit nodes within the design are modeled as "stuck at" '0' or '1' for purposes of grading the comprehensiveness of the testing input signal pattern. A comprehensive testing pattern will detect all or nearly all possible circuit node "stuck at" conditions. The testing of nonvolatile memory arrays presents a unique testing problem because each cell in the array will need to be erased, programmed, and then read in each possible state (0 and 1). In addition, patterns of data have to be written to blocks of cells to detect inter-cell defects.
This functional testing regime is performed after all of the wafer-level processing for the integrated circuit is performed. In a typical product, between about 25 and 30 masking levels are used to process the complete sequence. The complete manufacturing process flow is therefore expensive and time consuming. If individual bit failures are detected at a low rate in the final wafer test, then it is possible to re-configure the product, through redundant circuits and cells formed on the IC, such that a functional memory device is still achieved. However, if a larger problem occurs such that redundancy is not sufficient to fix the problem, then the circuits are scrapped. A wafer-wide problem may cause the entire wafer to be scrapped and thereby result in a loss of the entire processing investment. It is found that a significant cause for such scrap is the integrity or quality of the dielectric isolation surrounding the floating gates. It is a central object of the present invention to provide a method to detect quality problems with this floating gate isolation early in the process flow so that the cost of scrapped wafers is reduced.
Several prior art inventions relate to methods to detect circuit faults in nonvolatile memory circuits. U.S. Pat. No. 5,606,527 to Kwack et al describes methods to detect short circuits between signal lines in a nonvolatile memory circuit. Testing circuits are added to create a test mode to check for shorts on the product memory device. U.S. Pat. No. 6,064,608 to Ikeda describes a method and a structure to test for short circuits between bit line and wordlines in a nonvolatile memory device. U.S. Pat. No. 5,343,431 to Ohtsuka et al describes a method and a circuit to detect bit line-to-bit line shorts in a nonvolatile memory device.

Architecture to monitor isolation integrity between floating gate and source line

Taiwan Semiconductor Manufacturing Co., Ltd.


A system and method for improving the accuracy of edge detection under high Inter-Symbol Interference, or ISI, conditions is disclosed. The amplified and filtered first derivative signal is offset by equal amounts in both directions to generate positive and negative offsets which serve as inputs to negative and positive peak detectors, respectively. The offset is determined by a fast adaptive peak detector provided by attenuating and AC-coupling the first derivative signal to the positive supply to drive a peak detector with a fairly short attack time, such that its output is nearly settled on the first peak of the first derivative signal, but having a decay time long enough to keep the threshold level approximately constant across the label. Peaks are qualified if the peak in question differs in amplitude from the previously qualified peak by the offset amount. Thus, peaks are qualified if their modulation depth exceeds a threshold, regardless of the absolute level of the peaks (such qualification strategy is referred to as modulation depth gating).

The field of the present invention relates to data reading devices, such as scanners and barcode reading devices. In particular, barcode readers are described herein which employ methods and apparatus for improved edge detection for more accurately measuring bar and space widths under high Inter-Symbol Interference (hereafter xe2x80x9cISIxe2x80x9d) conditions.
A barcode label comprises a series of parallel dark bars of varying widths with intervening light spaces, also of varying widths. The information encoded in the barcode is represented by the specific sequence of bar and space widths, the precise nature of this representation depending on the particular barcode symbology in use.
Barcode reading methods typically comprise the generation of an electronic signal wherein signal voltage alternates between two preset voltage levels, one representative of the dark bars and the other representative of the light spaces. The temporal widths of these alternating pulses of high and low voltage levels correspond to the spatial widths of the bars and spaces. The temporal sequence of alternating voltage pulses of varying widths comprising the electronic signal is presented to an electronic decoding apparatus for decoding of the information encoded in the barcode.
A variety of common and well developed methods exist for generating the electronic signal by converting the spatial bar/space sequences into temporal high/low voltage sequences, i.e., barcode reading. Common types of barcode readers include spot scanners and line scanners.
Spot scanners comprise barcode reading systems wherein a source of illumination, the reading spot, is moved (i.e., scanned) across the barcode while a photodetector monitors the reflected or backscattered light. In one type of spot scanner system, typically referred to as a wand reader, the reading spot of the scanner is manually moved across the barcode. In another type of spot scanner system the reading spot of the scanner is automatically moved across the barcode in a controlled pattern. In any of the spot scanner systems, the path followed by the scanned illumination beam is typically referred to as a scan line.
The illumination source in spot scanners is typically a coherent light source (such as a laser), but may comprise a non-coherent light source (such as a light emitting diode). A laser illumination source, however, offers the advantage of high intensity illumination over a small area which may allow barcodes to be read over a large range of distances from the barcode scanner (large depth of field) and under a wide range of background illumination conditions. The photodetector associated with spot scanners may generate a high current when a large amount of light scattered from the barcode impinges on the detector, as from a light space, and likewise may produce a lower current when a small amount of light scattered from the barcode impinges on the photodetector, as from a dark bar.
In automatic spot scanning systems, a scanning mechanism, or scan engine, is utilized to automatically scan the illumination beam across the barcode. Such scanning mechanism may comprise a rotating mirror facet wheel, a dithering mirror, or other means for repetitively moving the illumination beam.
In addition to a scan engine, a barcode scanner may also employ a set of scan pattern generating optics to produce a multiplicity of scan lines in various directions from the scanner and at varying orientations, thereby allowing barcodes to be read over a large angular field of view and over a wide range of orientations (i.e., a multi-dimensional scan pattern). The scan pattern generating optics typically comprise a set of mirrors aligned at varying angles, each of which intercepts the illumination beam during a portion of its motion and projects it into the region in front of the barcode scanner, hereinafter referred to as the scan volume. Each mirror in the set, in conjunction with the scan engine, produces a scan line at a particular position and at a particular orientation.
Early prior art spot scanner systems depended upon individual scan lines extending across the entire barcode for the barcode to be successfully read. These systems presented difficulties and inefficiencies in real-time, practical applications wherein the orientation of a barcode vis-a-vis the scanner was hard to control. Accordingly, specialized piecing mechanisms, comprising software or electronics, have been developed that are capable of taking partial portions of barcodes and assembling them into a complete code, a process commonly known as stitching. Further details regarding exemplary stitching methods and systems may be found in U.S. Pat. No. 5,493,108, entitled xe2x80x9cMethod and Apparatus for Recognizing and Assembling Optical Code Labelsxe2x80x9d and issued in the name of inventors Craig D. Cherry and Donald D. Dieball, which patent is owned by the owner of the present application and is hereby incorporated by reference as if fully set forth herein.
With respect to line scanner systems, an entire barcode is focused onto a multi-element linear or areal photodetector array and the image of the barcode is detected. The photodetector array may comprise a CCD array (charge coupled device), a CMOS active or passive pixel sensor array, or other multi-element photodetector array. This type of reader may also include a light source to illuminate the barcode to provide the required signal response corresponding to the image. The imaging optics which produce an image of the barcode on the photodetector array can alternatively be thought of as projecting an image of the photodetector array (a xe2x80x9cvirtual scan linexe2x80x9d) into the scan volume in a manner completely analogous to the real scan line produced by a spot scanner. Further, scan pattern generating optics may be used to project multiple virtual scan lines into the scan volume in various directions and at varying orientations, thereby generating a virtual scan pattern, once again completely analogous to the real scan pattern produced by a spot scanner. Virtual scan pattern systems are further described in U.S. Pat. No. 5,446,271, entitled xe2x80x9cOmnidirectional Scanning Method and Apparatusxe2x80x9d and issued in the name of inventors Craig D. Cherry and Robert J. Actis, which patent is owned by the owner of the present application and is hereby incorporated by reference as if fully set forth herein.
Regardless of which of the barcode readers described in the preceding paragraphs is used, a raw electronic signal is generated from which the relative widths of the bars and spaces must be extracted. High-to-low or low-to-high transitions (i.e., edges) in the electronic signal voltage may be detected by any of a number of means well known in the art. A common and well known technique for edge detection is second derivative signal processing. In second derivative signal processing systems, optical edges result in peaks in the first derivative signal, and zero crossings in the second derivative signal. In such systems, zero crossings of the second derivative of the electronic signal are found during selected timing intervals as a means of detecting valid transitions. Examples of this technique are described in U.S. Pat. No. 4,000,397 entitled xe2x80x9cSignal Processor Method and Apparatusxe2x80x9d issued in the name of Hebert et al., and in U.S. Pat. No. 5,925,868 entitled xe2x80x9cMethod and Apparatus for Determining Transitions Between Relatively High and Low Levels in an Input Signalxe2x80x9d issued in the name of Arends et al., and in U.S. Pat. No. 5,923,023 entitled xe2x80x9cMethod and Apparauts for Detecting Transitions in an Input Signalxe2x80x9d also issued in the name of Arends et al. Each of the three foregoing patents are assigned to the assignee of the present application, and each is hereby incorporated by reference as if fully set forth herein. U.S. Pat. No. 4,000,397 describes the xe2x80x9cclassicxe2x80x9d second derivative edge detector for bar code scanners, wherein zero crossings of the second derivative signal are considered valid edges if, at the moment of crossing, the absolute value of the first derivative signal exceeds a threshold. This threshold may be fixed, or it may be a function of the amplitude of neighboring first derivative peaks. In either case, though, the threshold level must be greater than the baseline level plus an allowance for noise. This is required since, in the absence of optical features, second derivative zero crossings would otherwise be considered valid.
While second derivative signal processing systems may perform satisfactorily under most conditions, the instant inventors have found that when the size of the laser spot as imaged on the target label is large compared with the smallest element (i.e., bar or space) width, then crowding, resulting in a phenomenon commonly referred to as intersymbol interference, or ISI, may occur. Such crowding occurs as the system impulse response of one edge interferes with that of neighboring edges. This effect tends to be most prevalent at the extremes of the depth-of-field (DOF) of the scanner. Accordingly, poor performance in high-ISI regions limits the scanner DOF. In the case of an edge surrounded by two adjacent edges of opposite polarity, it is possible that the first derivative peak will occur at or even below the baseline. In either of these cases, the threshold in the second derivative edge detector is not exceeded, and thus these legitimate edges may be incorrectly rejected as noise. The instant inventors have determined that, typically, when the spot size (measured as 1/e2 diameter) is more than about 2.5 times the size of the smallest target label feature (such ratio hereafter being referred to as the STBR, or spot-to-bar ratio), then unsatisfactory performance may result.
U.S. Pat. No. 5,210,397, to Eastman, et al., describes a dual diode edge detector for bar code scanners. In such implementation as provided in U.S. Pat. No. 5,210,397, edges are validated if the difference between the current and the previous first derivative peaks exceeds a threshold, regardless of absolute position with respect to the baseline. Thus, it is possible to detect peaks at or below the baseline and valleys at or above the baseline. Accordingly, such a detector may offer improved performance under high ISI conditions. While a dual-diode implementation may perform satisfactorily under many circumstances, the instant inventors have identified that such implementation is primarily suited to when the signal modulation depth is large compared to the forward voltage drop of the diodes. The instant inventors have further found, however, that numerous drawbacks may be inherent in such implementation under some circumstances. These drawbacks each result primarily from the fact that the threshold is effectively set by the diode forward drop. Typically, the diode forward drop is large, thus reducing the dynamic range. This is particularly apparent if the supply voltage is low. As well, the forward drop generally varies considerably over process, thus yielding inconsistent performance in production. Also, as will be further elaborated hereinbelow, the forward drop in such implementation cannot adapt to signal level. Lastly, it is necessary that the drop of the two diodes match accurately, or positive and negative going edges will not have the same relationship in time at the edge detector output as at the input.
The dynamic range of the dual diode detector is limited on the high side by the supply rails, and on the low side by the forward diode drop. This available range is typically much less than that required by the optical system in a long range scanner. While an automatic gain control can be employed to maintain the first derivative amplitude within the usable range, such controls require multiple passes for settling. As a result, response time is slowed. The instant inventors have identified a faster solution as provided herein.
The present disclosure relates to systems and methods for improving the accuracy of edge detection under high Inter-Symbol Interference, or ISI, conditions. The systems and methods detailed herein use an adaptive threshold set in real time as a function of peak amplitude. In a preferred embodiment, an amplified and filtered first derivative signal is offset by equal amounts in both directions to generate positive and negative offsets which serve as inputs to negative and positive peak detectors, respectively. In a further aspect, a preferred embodiment herein implements a fast adaptive approach wherein the first derivative signal is attenuated and AC-coupled to the positive supply to drive a peak detector with a fairly short attack time, such that its output is nearly settled on the first peak of the first derivative signal, but having a decay time long enough to keep the threshold level approximately constant across the label.
In a preferred embodiment, a peak is qualified if the original first derivative signal crosses one of the peak detector outputs. Alternatively viewed, peaks are qualified if the peak in question differs in amplitude from the previously qualified peak by the offset amount. Thus, peaks are qualified if their modulation depth exceeds a threshold, regardless of the absolute level of the peaks (such qualification strategy is hereafter referred to as xe2x80x9cmodulation depth gatingxe2x80x9d).
The disclosed approach has an improved ability to render highly crowded pulses with peaks occurring through most of the range between supply rails being properly detected and with the lower limit of the dynamic range being set by the noise floor and electronic offsets, which is significantly lower than the diode forward drop limit for the dual diode detector. The disclosed approach has a relatively broad dynamic range and fast response, as well as capability to reject baseline noise similar to that of second derivative systems. In the embodiment wherein the peak detector references to the supply rail, the peak detector stage may directly drive a following voltage-to-current converter while, at the same time, maintaining the largest possible dynamic range for the first derivative and offset signals. In an alternative embodiment, a slow AGC loop circuit is wrapped around the system to assist in maintaining the first derivative signal within the dynamic range.
The preferred embodiments herein may advantageously offer more accurate rendering of relative bar and space widths under high ISI conditions, thus allowing the barcode scanner to be used under a wider range of conditions. Accordingly, the preferred embodiments herein may provide one or more of the following objects and advantages:
to provide an edge detection system which is tolerant of a high degree of inter-symbol interference;
to provide an edge detection system wherein the dynamic range is limited on the low end only by the noise in the input signal and electronic offsets;
to provide an edge detection system capable of detecting peaks through most of the dynamic range between supply rails;
to provide an edge detection system having a fast adaptive response;
to provide an edge detection system capable of rejecting baseline noise similarly to that of second derivative edge detector systems; and,
to provide such a system and method which offers improved depth of field performance over that of second derivative edge detector systems.

Fast edge detection system tolerant of high degree of intersymbol interference


One aspect of the present invention relates to a photovoltaic cell. In one embodiment, the photovoltaic cell includes a first conductive layer, an N-doped semiconductor layer formed on the first conductive layer, a first silicon layer formed on the N-doped semiconductor layer, a nanocrystalline silicon (nc-Si) layer formed on a first silicon layer, a second silicon layer formed on the nc-Si layer, a P-doped semiconductor layer on the second silicon layer, and a second conductive layer formed on the P-doped semiconductor layer, where one of the first silicon layer and the second silicon layer is formed of amorphous silicon, and the other of the first silicon layer and the second silicon layer formed of polycrystalline silicon.

A solar cell or photovoltaic cell is a semiconductor device that converts solar/optical energy of light into electrical power by the photovoltaic effect. Generally, a solar cell is configured as a large-area P-N junction made of silicon that has a layer of N-type (negative type) silicon and a layer of P-type (positive type) silicon direct contacting with the layer of N-type silicon. When a photon hits the solar cell, the photon can pass straight through the silicon if it has lower photon energy, or reflect off the surface, or be absorbed by the silicon if it has photon energy higher than the silicon band gap value. The latter generates an electron-hole pair and sometimes heat, depending on the band structure of the solar cell. Due to the interfacial electrical field of the P-N junction, the generated hole moves towards an anode on the P-type silicon layer, while the generated electron moves towards a cathode on the N-type silicon layer in the silicon solar cell, thereby producing electricity.
Materials used for solar cells include silicon, group III-V semiconductors (e.g., GaAs), groups II-VI semiconductors (e.g., CdS/CdTe), organic/polymer materials, and others. Of them, silicon solar cells including monocrystalline silicon wafer based solar cells, polycrystalline silicon (poly-Si) thin-film based solar cells and amorphous silicon (a-Si) thin-film based solar cells are most developed. Group III-V semiconductor based solar cells are formed on bulk Ge substrates and have high efficiency, but they are prohibitively expensive for all but applications in satellites and integrated optics, because the Ge substrate constitutes a large portion of this cost. Additionally, group III-V and II-VI semiconductor based solar cells can not be easily integrated with Si-based CMOS and glass panel TFT-LCD and LTPS process. Furthermore, there are issues of heavy metal pollutions in fabricating group III-V and II-VI semiconductor based solar cells. Although a-Si thin-film solar cells have low cost, they have low efficiency and instability. Therefore, silicon wafer based solar cells are dominant in the solar cell market.
Solar cells operate as energy conversion devices, and are therefore subject to the Camot Limit of conversion efficiency, which is about 85%. So far, the highest conversion efficiency of which market available solar cells have achieved is about 33%. Therefore, there are rooms for the improvement of the efficiency of the solar cells.
Theoretically, photons with an energy below the band gap of the absorber material cannot generate a hole-electron pair, and so their energy is not converted to useful output and only generates heat if absorbed. For photons with an energy above the band gap energy, only a fraction of the energy above the band gap can be converted to useful output. When a photon of greater energy is absorbed, the excess energy above the band gap is converted to kinetic energy of the carrier combination. The excess kinetic energy is converted to heat through phonon interactions as the kinetic energy of the carriers slows to equilibrium velocity. The solar frequency spectrum approximates a black body spectrum at about 6000 K, and as such, much of the solar radiation reaching the Earth is composed of photons with energies greater than the band gap of silicon. These higher energy photons will be absorbed by the solar cell, but the difference in energy between these photons and the silicon band gap is converted into heat via lattice vibrations (phonons) rather than into usable electrical energy. For single junction (single band gap) solar cells, the highest conversion efficiency in theory is about 28%. However, the average conversion efficiency for monocrystalline silicon and poly-Si solar cells in the market is only about 15%, because of the intrinsic limitations of materials that are unable to absorb all incident photons with energy greater than the band gap, and of the free-carrier absorption of the materials that limit the 100% conversion of the photon absorption into electron-hole pairs.
For multi-junction (or multi-band gap) solar cells, which is a stack (tandem) of individual single-junction solar cells in descending order of band gap, the top cell captures the high-energy photons and passes the rest of the photons on to be absorbed by lower band gap cells. The use of multi-band gaps (or multi-junctions) can reduce the intra-band energy relation so as to reduce the probability of generating phonons, thereby reducing heat generation and improving the photovoltaic conversion efficiency, comparing to the single junction (single band gap) solar cells. However, the tandem solar cells have issues of junction loss and lattice mismatch.
Therefore, a heretofore unaddressed need exists in the art to address the aforementioned deficiencies and inadequacies.

Photovoltaic cells with multi-band gap and applications in a low temperature polycrystalline silicon thin film transistor panel


Apparatus located in an implantable medication infusion pump for quickly and easily detecting a condition adversely affecting medication delivery in the implantable medication infusion pump is disclosed which can reliably detect occurrences including an occluded catheter, the presence of air in the pumping mechanism, and the failure of the pumping mechanism. The system uses the amplitude of an acoustic signal generated by operation of the pumping mechanism as compared with a baseline signal to detect an encapsulated or occluded catheter or air in the fluid line. In addition, the system can detect a partially encapsulated or occluded catheter by detecting repeated downward slope patterns during repetitive, closely spaced pumping cycles.

Field of the Invention.
This invention relates generally to apparatus located in an implantable medication infusion pump for quickly and easily detecting a condition adversely affecting medication delivery in the implantable medication infusion pump, and more particularly to such an apparatus and method for reliably detecting occurrences including an occluded catheter, the presence of air in the pumping mechanism, and the failure of the pumping mechanism.
Medication infusion pumps are generally known in the art for use in delivering a selected medication to a patient in a scheduled or preprogrammed manner. In recent years, such medication infusion pumps have been developed in compact form adapted for implantation into the body of a patient. They are used to deliver a specific medication such as insulin to the patient in discrete (but essentially continuous) doses over an extended time period.
An implantable medication infusion pump of this general type typically includes an internal medication reservoir for receiving and storing a supply of the selected medication in liquid form. Other components incorporated in the device include a power source (typically a battery), a miniature pumping mechanism, and associated electronic programmed control means for delivering the medication to the patient according to a prescribed schedule. For one illustrative example of an implanted or implantable medication infusion pump of this general type, see U.S. Pat. No. 4,573,994, to Fischell.
Implantable medication infusion pumps are normally equipped with an inlet port through which fluid medication can be supplied to permit periodic refilling of the pump reservoir. This inlet port is typically positioned and shaped for receiving a transcutaneous needle through which the fluid medication is supplied from outside the patient's body. Accordingly, the pump reservoir can be filled or refilled without requiring surgical removal from the patient's body, and further without requiring any other significant surgical procedure.
The output port of an implantable medication infusion pump is typically connected to the proximal end of a catheter. The distal end of the catheter is located in the abdominal cavity, where it may either be free-floating or implanted in the tissue of the omentum. If the distal end is to be free-floating, which is currently seen as the better technique, an intermediate portion of the catheter having a 90 degree bend therein is anchored to the peritoneal wall. If the distal end is to be placed into a fold in the omentum tissue, the tissue is sutured around the distal end of the catheter. The medication is thus delivered by the implantable medication infusion pump through the catheter to the body of patient.
While implantable, refillable medication infusion pumps constitute a major step forward in reliable and convenient administration of certain medications, there are several conditions which may be encountered which are difficult to detect, and which may impede the efficacious delivery of medication to the patient. The most significant of these problems is the problem of a partially or completely blocked catheter. This is typically caused by one of two blocking mechanisms: first, by tissue growth encapsulating substantially the entire distal end of the catheter to form a "sock;" or secondly, by deposits aggregating inside the lumen of the catheter to block or occlude the lumen of the catheter. Either of these conditions may result in the flow of medication from the catheter being partially or fully obstructed.
A catheter may become partially encapsulated or occluded, which will act to raise the pressure in the catheter when medication is being delivered. More infrequently, a catheter may become virtually fully encapsulated or occluded, essentially preventing the medication from flowing from the distal end of the catheter. Such a condition will defeat the intended purpose of the implanted system by substantially preventing it from delivering medication.
In delivering medications such as insulin, periodic relatively larger doses (boluses) are periodically supplied as needed (such as immediately before meals) in addition to an essentially continuous supply of the medication at a low rate (basal rate). With a partially obstructed catheter, the delivery of medication at the basal rate may not be a problem, while the delivery of a larger bolus may cause pressure to build to a point where delivery is significantly impeded. It will be recognized by those skilled in the art that nondelivery of medication due to a catheter obstruction thus represents a significant problem.
Another problem encountered by implantable medication infusion pumps is the presence of a gas bubble in the pumping mechanism. This is a particularly serious problem in medication infusion pumps which are incapable of pumping gas. Still another problem is that of pump failure, in which the pumping mechanism simply stops working for whatever reason. These problems, like the problem of catheter obstruction, may result in vital medication not being delivered to a patient.
At present, the lack of medication being delivered to a patient is generally detected by physiological measures. Such measures, for example, may include blood glucose analysis (for insulin), surgical procedures such as laparoscopy, or the use of an invasive pressure measuring technique such as a side port. These measures are all effective at diagnosis only significantly after the problem has been encountered for some time. In the case of a partially obstructed catheter, these techniques may not be successful in making a correct diagnosis.
A promising development has been the use of an acoustic sensor built into the pumping mechanism of the implantable medication infusion pump, which is taught in U.S. Pat. No. 4,985,015, to Obermann et al. (the '015 patent), which patent is hereby incorporated herein by reference. This device uses a piezo element located in the pumping mechanism to sense noise, with the noise sensed (or not sensed) providing information about medication infusion pump operation. The '015 patent teaches that the amplitude and timing of the acoustic signal present information useful to diagnosis of various pumping conditions.
Specifically, with regard to the timing of a "normal" signal the '015 patent teaches that an empty reservoir is indicated when the signal is greatly premature, and that air bubbles in the pumped fluid are indicated when the signal is slightly premature. With regard to the amplitude of the acoustic signal, the '015 patent teaches an amplitude or threshold discriminator which produces a signal when the medication infusion pump is operating properly, and no signal when the catheter is occluded. In the event of a catheter occlusion beginning to occur, there will be a signal when pumping is started, which signal will disappear when pumping at a high rate (read pumping a bolus).
Thus, the '015 patent teaches the use of a threshold detected acoustic signal, the timing and presence of which provides operational information on the system. This is certainly a significant improvement in the detection of the problems mentioned above. However, the system of the '015 patent has certain disadvantages representing opportunities for improvement in the art.
The '015 patent uses a threshold detection system which is incapable of detecting whether no signal detected is indicative of an occlusion or pump failure. This is highly significant, since it would be undesirable to perform a surgery to replace a catheter when the catheter is fine and the medication infusion pump is not operating properly.
It is accordingly the primary objective of the present invention that it provide an improved apparatus located in the implanted medication infusion pump and an associated method for detecting the problems mentioned above in the implanted medication infusion pump. The apparatus and method for detecting problems in the implanted medication infusion pump must be capable of discriminating between problems such as an encapsulated or occluded catheter and a nonoperational pumping mechanism. It is yet another objective that the apparatus and method of the present invention be capable of determining the presence of air in the system. The apparatus and method of the present invention must therefore allow a correct diagnosis of problems to be made with a high degree of accuracy while avoiding entirely an incorrect diagnosis which could result in the removal of a properly functioning system.
The apparatus and method for detecting problems in an implanted medication infusion pump must also avoid interference with spurious signals. The apparatus should not add significantly to the cost of manufacturing the implantable medication infusion pump. In addition, a means should be provided to enable the analysis to be tailored to individual patients, to better follow the conditions of these patients. It is also an objective that all of the aforesaid advantages and objectives be achieved without incurring any substantial relative disadvantage.

Implantable medication infusion pump including self-contained acoustic fault detection apparatus


A fastener assembly includes an insert having a head and a sleeve extending from a bottom surface of the head, with the insert further defining an internal cavity. The head of the insert abuts a first panel with the sleeve extending through a first preformed hole in the first panel. A second panel with a second preformed hole is aligned with the first panel, and a shaft of a fastener pin is inserted through the second preformed hole and into the internal cavity of the insert. Upon rotating the fastener pin, a tee portion at the end of the shaft engages a seat positioned in the internal cavity of the insert. The fastener assembly also includes a compression member positioned around the shaft of the fastener pin that biases the tee portion of the fastener pin into engagement with the seat of the insert.

The present invention relates to a fastener assembly, a fastener assembly that has particular applicability and utility in the installation of radome panels.
A radome is an enclosure designed to protect radar antennas from outside weather and debris. A typical ground-based radome is constructed of a multitude of panels formed into a spherical enclosure. Each of the panels is connected by a plurality of fasteners, such that a typical 55-foot diameter radome may have more than 6,000 fasteners. Each fastener in a radome must be tightened to a specified torque value to ensure proper connection, and this requires extensive man-hours for fastener installation alone. By some estimates, each fastener takes about a minute to install, leading to over 100 man-hours for fastener installation alone in a typical 55-foot diameter radome.
In current installations, radome panels are often connected by a common nut-and-bolt fastener. A nut-and-bolt fastener requires a user to secure either the nut or the bolthead in place while tightening the other. However, in some situations, an adhesive is applied to the nut portion of the fastener to hold it in place while the bolt is tightened.
Nut-and-bolt fasteners are also likely to loosen over time, requiring even more man-hours in fastener inspection, along with the need for re-torqueing the fasteners over the life of the radome. When maintenance is required, if the adhesive bond on the nut is broken, the fastener may merely spin in place rather than tighten. In such a situation, depending on the configuration of the connection (e.g., the nut and bolt are on opposite sides of the radome panels), re-torqueing or removal of the fastener may require substantially more time, as simultaneous access to both portions of the fastener is not possible.
Thus, there remains a need for an improved fastener assembly which can be quickly installed and requires access to only one side of the adjacent radome panels.


Sorption media for removal of contaminants from fluid streams are provided. The sorption media comprise an active compound bound or linked to a support substrate or matrix. Support substrates can include iron- and alumina-based materials. A method for making sorption media for the removal of contaminants from fluid streams is also described. The method includes selecting a support substrate, and, optionally, providing a doping mixture comprising an active compound. The selected support substrate can be contacted with the doping mixture to form a doped mixture. The doped mixture can be reacted at a predetermined temperature and atmospheric environment for a predetermined duration to form an active media, wherein the active compound is bound or linked to the support substrate.

1. Field of the Invention
The present invention generally relates to the use of chemical sorbents to reduce the levels of contaminants in waste streams.
2. Description of Related Art
Industrial pollutants such as heavy metals, D-block metals, mercury and arsenic pose significant health-related risks to the public. For example, several metal ions and transition metal ions have been associated with asthma symptoms such as activation of mast cells and enhanced allergen-mediated mast cell activation. Walczak-Crzewiecka, et al. "Environmentally Relevant Metal and Transition Metal Ions Enhance Fc RI-Mediated Mast Cell Activation," Env. Health Perspectives 111(5) (May 2003). Because these substances are generated as a by-product of industrial processes, it is important to find effective means to reduce their release into the environment.
For example, mercury emissions from coal-fired utilities, commercial boilers and solid waste incinerators represent a serious environmental problem and have been the focus of many regulatory deliberations. At present, coal-fired power plants emit the largest source of mercury emissions at 32.7%. Municipal waste incinerators and non-utility boilers each contribute approximately 18% of mercury emissions. Medical waste incinerators contribute 10% of gas phase mercury emissions. In addition to gas phase mercury contamination, mercury contaminant exists in water phase as well such as water waste discharged by petroleum refineries and steel mills. For example, water phase contaminants may include elemental, ionic, organometallic, and/or inorganic mercury species.
Mercury exposure has been associated with neurological and developmental damage in humans. Developing fetuses and young children are at particular risk of the harmful effects of mercury exposure. Mercury contamination is also a concern for populations exposed to dental practices or dental waste, clinical chemistry laboratories, pathology laboratories, research laboratories, chlor-alkali facilities, and health care waste incinerators. However, despite the desire to reduce mercury emissions, presently there are no commercially available technologies to control mercury emissions.
Similarly, exposure to arsenic poses potentially significant health risks. Arsenic is a natural element, distributed throughout the soil and in many kinds of rock. Because of its ubiquitous presence, arsenic is found in minerals and ores that contain metals used for industrial processes. When these metals are mined or heated in smelters, the arsenic is released into the environment as a fine dust. Arsenic may also enter the environment from coal-fired power plants and incinerators because coal and waste products contain some arsenic. Once arsenic enters the environment, it cannot be destroyed.
Arsenic exposure causes gastrointestinal problems, such as stomach ache, nausea, vomiting, and diarrhea. Arsenic exposure can also yield decreased production of red and white blood cells, skin changes that may result in skin cancer, and irritated lungs. Inorganic arsenic has been linked to several types of cancer and is classified as a Group A, human carcinogen. In high amounts (above about 60,000 ppb in food or water), arsenic may be fatal. Similar adverse effects have been associated with other inorganic contaminants such as cadmium, chromium, lead, and selenium.
Various carbon-based sorbents have been identified for removing mercury vapor from gas streams. T. R. Carey and C. F. Richardson, "Assessing Sorbent Injection Mercury Control Effectiveness in Flue Gas Streams," Environmental Progress 19(3):167-174 (Fall 2000). For example, Selexsorb® HG (Alcoa World Alumina, LLC, Pittsburgh, Pa.) and Mersorb® (Nucon International, Inc., Columbus, Ohio) are commercially available carbon-based mercury sorbents. Recycled tires have also been identified as a source of activated carbon that could be used for mercury removal. C. Lehmann et al., "Recycling Waste Tires for Air-Quality Control," January 2000. Activated carbon has many drawbacks for use in large-scale industrial processes, however. In particular, commercially available activated carbon is a relatively expensive sorbent. Although transformation of waste tires into activated carbon is an environmentally friendly means of recycling harmful waste, it is a complicated, lengthy, energy-intensive and time-consuming process. Additionally, the yield of activated carbon from waste tires is relatively low.
Currently, carbon-based sorbents can be used for removal of contaminants from water, primarily through an adsorption effect of the carbon. However, this method suffers from drawbacks such as washing off of the active materials, thus making the use of carbon-based sorbent ineffective. In addition, the used active carbon materials need to be disposed of as a hazardous material, therefore adding cost and contributing to further environmental problems.
Other currently used methods include the use of catalysts to remove mercury from hydrocarbon gases. Similarly, such methods are not effective in aqueous streams due to washing off of the active catalysts.
Thus, there is a need for new technologies to efficiently and cost-effectively reduce the level of inorganic contaminants, such as mercury and arsenic for example, in industrial emissions and specifically in aqueous streams.

Media for removal of contaminants from fluid streams and method of making same


A display apparatus is disclosed which uses an improved precharge method and includes a reduced number of precharge switches. A pixel array section includes gate lines disposed in the direction of a row, signal lines disposed in the direction of a column, and pixels arranged in rows and columns at points at which the gate lines and the signal lines intersect with each other. A precharge switch is connected between a precharge line and each of the signal lines. A precharge drive circuit performs batch precharge wherein it drives the precharge switches at a time within a horizontal blanking period preceding to a horizontal scanning period to apply a precharge signal of a first level at a time to the signal lines and sequential precharge wherein it successively drives the precharge switches within the horizontal scanning period to successively apply a precharge signal of a second level to the signal lines.

The present invention relates to an active matrix display apparatus of the dot sequentially driven type, and more particularly to a display apparatus of the type mentioned which adopts a technique of suppressing crosstalk between pixels and so forth to assure a high picture quality.
An active matrix display apparatus uses a 1H inversion driving method wherein, when it performs dot sequential driving, a video signal to be written into pixels is inverted for each one horizontal scanning period (1H). In the 1H inversion driving, if charging/discharging current upon writing of a video signal into a signal line provided for each column of pixels disposed in rows and columns in high, then a defect called "vertical stripe" appears on the display screen. To suppress the charging/discharging current upon writing of a video signal as low as possible, a precharge drive method wherein a precharge signal is written prior to writing of a video signal is adopted conventionally.
A vertical stripe of a medium gray level is most likely to appear among such vertical stripes. Accordingly, a gray level with which a vertical stripe is most likely to appear is normally set as a level for a precharge signal. However, if the potential for the precharge signal is set to a gray level, then when a window pattern or the like is displayed, crosstalk in a vertical direction (such crosstalk may be hereinafter referred to as vertical crosstalk) is sometimes caused by the fact that the light leak amount between the source and the drain of a pixel transistor locally differs, and deteriorates the picture quality.
To prevent occurrence of such vertical crosstalk, the precharge signal should be set to a black level. Where the precharge signal is set in this manner, the leak current between the source and the drain of a pixel transistor becomes uniform over the entire screen. However, if the precharge signal is set to a black level, then a vertical stripe described above becomes likely to appear conversely. In other words, the "vertical crosstalk" and the "vertical stripe" have a relationship of tradeoff to each other.
Taking the foregoing into consideration, a "dot sequential 2-step precharge method" wherein a black level and a gray level are precharged at two steps has been proposed and is disclosed, for example, in Japanese Patent Laid-Open No. 2000-267067. An example of an active matrix display apparatus which adopts the dot sequential 2-step precharge method is shown in FIG. 9. FIG. 9 shows a general configuration of the display apparatus. Referring to FIG. 9, the display apparatus 0 shown includes a pixel array section 9, a pair of vertical drive circuits 4, a horizontal drive circuit 6 and a precharge drive circuit 8. The pixel array section 9 includes gate lines 1 extending in the direction of a row, signal lines 2 extending in the direction of a column, and pixels 3 disposed in rows and columns at points at which the gate lines 1 and the signal lines 2 intersect with each other. The vertical drive circuits 4 are connected to the gate lines 1 and successively select the pixels 3 in the individual rows in a predetermined vertical scanning period. The horizontal drive circuit 6 is connected to the signal lines 2 and writes a video signal dot-sequentially into the pixels 3 of a selected row within a predetermined horizontal period. It is to be noted that, though not shown, the video signal is supplied through predetermine video signal lines. Also the precharge drive circuit 8 is connected to the signal lines 2 and writes precharge signals of a black level and a gray level into the pixels in accordance with a dot sequential 2-step precharge method.
FIG. 10 shows a particular example of a configuration of the precharge drive circuit shown in FIG. 9. Referring to FIG. 10, in the configuration example shown, the precharge drive circuit 8 includes a shift register formed from flip-flops S/R connected at multiple stages. The shift register operates in response to a precharge clock PCK supplied thereto from the outside and successively transfers a precharge start pulse PST supplied thereto from the outside similarly to output shift pulses A, B, C, . . . . Further, precharge lines 7 for supplying precharge signals are disposed between the precharge drive circuit 8 and the pixel array section positioned on the upper side of the precharge drive circuit 8. The precharge signals are supplied from the outside through the precharge lines 7. In the arrangement shown in FIG. 10, four such precharge lines 7 are provided. The two upper side ones of the precharge lines 7 supply precharge signals PSIG-Gray1 and PSIG-Gray2 of a gray level, respectively. The two lower side ones of the precharge lines 7 supply precharge signals PSIG-Black1 and PSIG-Black2 of a black level, respectively. Further, a precharge switch set is provided between the precharge lines 7 and the signal lines 2 of the pixel array section side. In the arrangement shown in FIG. 10, a precharge switch PSWG is provided for each of the signal lines 2 corresponding to the upper side two precharge lines 7. Meanwhile, a precharge switch PSWB is provided for each of the signal lines 2 corresponding to the lower side two precharge lines 7. The first precharge switch PSWG is connected to the first precharge line 7, and the second precharge switch PSWG is connected to the second precharge line. In this manner, the precharge switches PSWG are connected alternately to the first and second precharge lines 7. Similarly, also the precharge switches PSWB are connected alternately to the third and fourth precharge lines 7. The precharge switches PSWG are driven to be opened or closed simultaneously for each set including two precharge switches PSWG. Also the precharge switches PSWB are driven to be opened or closed simultaneously for each set including two precharge switches PSWB. Generally, by driving a plurality of precharge switches to be opened or closed simultaneously as a unit, the frequency of the precharge clock PCK can be suppressed. However, the precharge switches may alternatively be driven successively one by one.
The shift pulse A outputted from the first stage of the shift register which forms the precharge drive circuit 8 is used to drive the precharge switches PSWG of the first set and the precharge switches PSWB of the second set to be opened and closed. The shift pulse B outputted from the second stage of the shift register is used to drive the precharge switches PSWG of the second set and the precharge switches PSWB of the third set to be opened and closed. The shift pulse C outputted from the third stage of the shift register is used to drive the precharge switches PSWG of the third set and the precharge switches PSWB of the fourth set to be opened and closed. While the precharge drive circuit 8 successively drives the precharge switches to be opened or closed in this manner, if attention is paid to one of the signal lines 2, normally a precharge switch PSWB is driven to be opened or closed first, and then a precharge switch PSWG is driven to be opened or closed. In other words, the precharge drive circuit 8 is configured such that the precharge signals PSIG-Black1 and PSIG-Black2 of the black level are sampled on the signal lines first, and then the precharge signals PSIG-Gray1 and PSIG-Gray2 of the gray level are sampled on the same signal lines.
It is to be noted that each of the pixels 3 included in the pixel array section is formed, in the arrangement shown in FIG. 10, from a liquid crystal cell LC and a pixel transistor TFT. The gate electrode of the pixel transistor TFT is connected to the corresponding gate line 1, and the source electrode is connected to the corresponding signal line 2 while the drain electrode is connected to the pixel electrode of the corresponding liquid crystal cell LC. The other electrode of the liquid crystal cell LC is grounded to a counter-potential VCOM through a common line.
FIG. 11 is a waveform diagram illustrating operation of the precharge circuit shown in FIG. 10. As described above, the shift register of the precharge drive circuit 8 operates in response to the precharge clock PCK to transfer the precharge start pulse PST to successively output shift pulses A, B, C, . . . . The precharge switches PSWG of the first set are opened in response to the shift pulse A, and the precharge signals of the gray level are held by the corresponding signal lines. Simultaneously, also the precharge switches PSWB of the second set are opened, and the precharge signals of the black level are held by the preceding signal lines. In this manner, dot sequence precharge driving is performed in accordance with the two-step method wherein the precharge signals of the black level are sampled first and then the precharge signals of the gray level are sampled. Naturally, the dot sequence precharge driving is performed in prior to successive writing of video signals into the pixels 3. By sampling the precharge signals of the black level first, "vertical crosstalk" is suppressed, and then by sampling the precharge signals of the gray level, a "vertical stripe" can be suppressed.
FIG. 12 illustrates the waveforms of the precharge signals PSIG-Black1 and PSIG-Gray1 supplied to the precharge lines 7. The precharge signal PSIG-Black1 exhibits an inversion after each 1H with respect to the counter-potential VCOM, and the level PSIG-Black therefor is set to the black. In the example shown in FIG. 12, the counter-potential VCOM is 7.5 V, and the level PSIG-Black is 7.5±5.0 V. It is to be noted that also the other precharge signal PSIG-Black2 of the black level has a same waveform as that of the precharge signal PSIG-Black1. On the other hand, also the precharge signal PSIG-Gray1 exhibits an inversion after each 1H with respect to the counter-potential VCOM, and the potential level PSIG-Gray therefor is set to a gray level (7.5±2.5 V) of a half tone. This similarly applies also to the other precharge signal PSIG-Gray2.
In a display apparatus of an ordinary resolution, a distance of approximately 20 μm can be assured between signal lines. In this instance, one precharge switch PSWG and one precharge switch PSWB can be disposed corresponding to each of the signal lines 2 as seen in FIG. 10. Accordingly, in the conventional precharge drive circuit shown in FIG. 10, the precharge switches PSWG and the precharge switches PSWB can be disposed in an overlapping relationship with each other in two stages.
On the other hand, in a display apparatus for the high definition television system, the distance between signal lines is reduced to approximately 10 μm. In this instance, an area sufficient to allocate switches to signal lines in a one-by-one corresponding relationship is not assured. Therefore, the precharge switches are disposed in an upwardly and downwardly displaced relationship as seen in FIG. 13. More particularly, of the precharge switches PSWG for writing a gray level, the odd-numbered ones are disposed in the upper stage while the even-numbered ones are disposed in the lower stage. According to the arrangement just described, an area corresponding to two signal lines can be allocated to one precharge switch PSWG. However, different from the arrangement of FIG. 10, the precharge switches PSWG must be arranged not in one stage but in two upper and lower stages. Similarly, also the precharge switches PSWB for writing the black level are divided into two upper and lower stages. Accordingly, in a panel of a high definition, where the conventional 2-step dot sequential precharge driving method is applied, the precharge switches must be arranged in four upper and lower stages. In this manner, as the pixel pitch decreases as a result of increase of the definition of a panel and reduction of the panel size, the precharge switches PSW cannot be laid out within a pitch of one pixel any more. Therefore, the precharge switches PSW must be laid out in two overlapping stages in a pitch of 2 pixels as seen in FIG. 13. However, where the precharge switches PSWB and PSWG are placed individually in two overlapping stages, the precharge switches PSW are placed totally in four stages, and there is a problem that the space becomes insufficient and the precharge switches PSW cannot be laid out.

This patent is subject to a terminal disclaimer.


A fine working method of a crystalline material comprises forming an ion injection region in a crystalline material by irradiating a focused ion beam on a crystalline material and subsequently removing a predetermined region of the ion injection region by applying a chemical etching treatment. The method includes performing ion injection where no removal of the predetermined region occurs even if the crystalline material is exposed to an etchant. The predetermined region is removed by injecting an etchant into the ion injection region.

1. Field of the Invention
This invention relates to a fine working method of a crystalline material. Particularly, the present invention relates to a fine working method of a crystalline material which performs etching working by use of a focused ion beam as a part of the working steps.
2. Related Background Art
In the prior art, as the fine working method by use of etching of a crystalline material such as bulk or thin film single crystalline materials, etc., there have been generally employed the method in which a resist, etc. is coated on its worked surface, a desired resist pattern is formed by lithography and then the portion without such resist pattern is removed chemically or physically.
However, in the above working method, for fine etching working with a line width of 1 micron or less, etching with high precision can be effected with difficulty, with resolution of the resist and expansion of the working region during etching presenting obstacles.
Also, according to the etching method as described above, working of a crystalline material into a cross-sectional shape having a region of reverse tapered shape or hollow shape could be done with extreme difficulty for the following reasons.
In the prior art, when working into a reverse tapered shape or a tunnel shape, anisotropic working has been practiced. Such anisotropic working utilizes the fact that etching speed is remarkably different depending on the crystal orientation. Accordingly, the crystal orientation of a crystalline material must be matched previously to a shape desired to be worked, and therefore this method could be applied only to a single crystalline material with limited orientation. Additionally, it could not be applied to those with different crystal orientations within the same plane such as a polycrystalline material. Further, when working in shape of a tunnel is to be performed, a bore must be opened at the side surface of the sample and the bore must be excavated by etching.
On the other hand, other than the fine working method according to lithography by use of a resist, there is also the method by use of focused ion beam. For example, J. Vac. Sci. Tehnol. B, Vol. 6, No. 3, p. 1014-1017, May/Jun 1988 "Fabrication of one-dimensional GaAs wires by focused ion beam implantation" shows fine working with a line width of 1 micron or less. Also, here is shown an example, in which etching is effected by use of HC1 after injection of focused ion beam injection of Si ions onto a GaAs substrate. However, also nothing is shown here about application to a complicated working such as hollow shape onto a crystalline material.

Method of etching crystalline material with etchant injection inlet


Arrangement enables liquid suction with a nozzle tip end in contact with a container bottom without causing damage to the nozzle and/or container bottom. Plural rails are disposed to extend upward from an arm which is movable three-dimensionally, so as to extend upward from the arm, and a pipe is fixed to a pipe fixing member movable along the rails. A pipe tip end functions as a nozzle. Plural resilient members disposed on the arm correct the inclination of the pipe fixing member. When the arm is moved downward and the tip end comes in contact with the bottom of the container 106, the pipe and the pipe fixing portion move upward along the rails, so that the pipe tip end can be brought into contact with the bottom surface of the container while avoiding damages in the pipe and container bottom, and to suck liquid in the container.

In an analysis or examination in the biochemical field or the immunological field, liquid of a sample or a reagent is dispensed into sample containers through a suction discharge operation. For example, in this suction discharge operation, liquid of a sample or a reagent, diluted solution, or cleaning solution stored in many small holes of many test tubes or microplates is sucked into a suction discharge nozzle, and the sucked liquid is discharged into other containers or small holes. Automation of this suction discharge operation is accomplished by implementing a suction discharge system including a suction discharge nozzle movable in the depth direction (Z direction) of a container and in the plane direction (X-Y direction) where many containers are arranged laterally and longitudinally, and a pump connecting to the nozzle via a pipe.
The suction discharge system moves the suction discharge nozzle downward into a container, and puts the nozzle tip end into liquid in the container, so as to suck the liquid. In general, at the time of moving the nozzle downward, a slight clearance is secured between the nozzle tip end and the bottom surface of the container, so as to prevent damage to the nozzle tip end and the bottom of the container due to collision therebetween. A sufficient clearance between the nozzle tip end and the bottom surface of the container facilitates positioning of the nozzle tip end in the Z direction and reduces variation in the size of sample containers due to mass production, and also reduces strictness of positioning the sample containers in the suction discharge system.
Patent Literature 1 discloses a method for preventing damage to the nozzle, and when the nozzle tip end collides with an obstacle, this method moves the nozzle and the pipe upward so that the pipe abuts to a spring-loaded earth plate, thereby stopping the aim from moving downward. Patent Literature 2 discloses a method for allowing a nozzle tip end to elastically contact with a bottom surface of a container at slow speed so as to suck slight amount of liquid stored in the container without causing deformation, damage or fatigue fracture to the nozzle and/or containers. Patent Literature 3 discloses that, for the purpose of retaining a displacement state of a relative height between a needle guide and a needle, there are provided a needle, a guide provided to the needle whose relative height is variable at a predetermined amount, means for urging the guide downward and a needle guide holder. Patent Literature 4 discloses a method of moving a movable body apart from a nozzle receiver when a nozzle tip end abuts to an obstacle, so that the nozzle moves in the reverse direction to the movement of the nozzle receiver. Patent Literature 5 discloses a method of configuring a nozzle holder for holding a nozzle to be slidable so as to adjust the reference height of the nozzle tip end relative to the X-Y plane with high accuracy.


A novel vehicle which is suitable for transporting and/or temporarily storing objects such as masks or reticles and is effective in eliminating or preventing electrostatic discharges on the masks, reticles or other objects. The vehicle includes a frame for receiving the objects and at least one ESD eliminator provided on the frame for neutralizing electrostatic charges on the objects. Neutralization of the electrostatic charges prevents electrostatic discharges from damaging microelectronic circuits, for example, on the masks, reticles or other objects.

The fabrication of various solid state devices requires the use of planar substrates, or semiconductor wafers, on which integrated circuits are fabricated. The final number, or yield, of functional integrated circuits on a wafer at the end of the IC fabrication process is of utmost importance to semiconductor manufacturers, and increasing the yield of circuits on the wafer is the main goal of semiconductor fabrication. After packaging, the circuits on the wafers are tested, wherein non-functional dies are marked using an inking process and the functional dies on the wafer are separated and sold. IC fabricators increase the yield of dies on a wafer by exploiting economies of scale. Over 1000 dies may be formed on a single wafer which measures from six to twelve inches in diameter.
Various processing steps are used to fabricate integrated circuits on a semiconductor wafer. These steps include deposition of a conducting layer on the silicon wafer substrate; formation of a photoresist or other mask such as titanium oxide or silicon oxide, in the form of the desired metal interconnection pattern, using standard lithographic or photolithographic techniques; subjecting the wafer substrate to a dry etching process to remove the conducting layer from the areas not covered by the mask, thereby etching the conducting layer in the form of the masked pattern on the substrate; removing or stripping the mask layer from the substrate typically using reactive plasma and chlorine gas, thereby exposing the top surface of the conductive interconnect layer; and cooling and drying the wafer substrate by applying water and nitrogen gas to the wafer substrate.
Photoresist materials are coated onto the surface of a wafer by dispensing a photoresist fluid typically on the center of the wafer as the wafer rotates at high speeds within a stationary bowl or coater cup. The coater cup catches excess fluids and particles ejected from the rotating wafer during application of the photoresist. The photoresist fluid dispensed onto the center of the wafer is spread outwardly toward the edges of the wafer by surface tension generated by the centrifugal force of the rotating wafer. This facilitates uniform application of the liquid photoresist on the entire surface of the wafer.
Spin coating of photoresist on wafers is carried out in an automated track system using wafer handling equipment which transport the wafers between the various photolithography operation stations, such as vapor prime resist spin coat, develop, baking and chilling stations. Robotic handling of the wafers minimizes particle generation and wafer damage. Automated wafer tracks enable various processing operations to be carried out simultaneously. Two types of automated track systems widely used in the industry are the TEL (Tokyo Electron Limited) track and the SVG (Silicon Valley Group) track.
The numerous processing steps outlined above are used to cumulatively apply multiple electrically conductive and insulative layers on the wafer and pattern the layers to form the circuits. The final yield of functional circuits on the wafer depends on proper application of each layer during the process steps. Proper application of those layers depends, in turn, on coating the material in a uniform spread over the surface of the wafer in an economical and efficient manner.
During the photolithography step of semiconductor production, light energy is applied through a reticle mask onto the photoresist material previously deposited on the wafer to define circuit patterns which will be etched in a subsequent processing step to define the circuits on the wafer. Because these circuit patterns on the photoresist represent a two-dimensional configuration of the circuit to be fabricated on the wafer, minimization of particle generation and uniform application of the photoresist material to the wafer are very important. By minimizing or eliminating particle generation during photoresist application, the resolution of the circuit patterns, as well as circuit pattern density, is increased.
A reticle is a transparent plate patterned with a circuit image to be formed in the photoresist coating on the wafer. A reticle contains the circuit pattern image for only a few of the die on a wafer, such as four die, for example, and thus, must be stepped and repeated across the entire surface of the wafer. In contrast, a photomask, or mask, includes the circuit pattern image for all of the die on a wafer and requires only one exposure to transfer the circuit pattern image for all of the dies to the wafer. Reticles are used for step-and-repeat steppers and step-and-scan systems found in wafer fabrication.
Reticles must remain meticulously clean for the creation of perfect images during its many exposures to pattern a circuit configuration on a substrate. The reticle may be easily damaged such as by dropping of the reticle, the formation of scratches on the reticle surface, electrostatic discharge (ESD), and particles. ESD can cause discharge of a small current through the chromium lines on the surface of the reticle, melting a circuit line and destroying the circuit pattern.
Reticles are transferred among various stations in a semiconductor fabrication facility in reticle pods, such as SMIF (standard mechanical interface) pods. SMIF pods are generally characterized by a pod door which mates with a pod shell to provide a sealed environment in which the reticles may be stored and transferred. In order to transfer reticles between a SMIF pod and a process tool in a fab, the pod is typically loaded either manually or automatically on a load port on the process tool. Once the pod is positioned on the load port, mechanisms in the port door unlatch the pod door from the pod shell such that the reticle may be transferred from within the pod into the process tool. Another mode of reticle transfer includes the use of a wheeled cart or vehicle which includes a frame and multiple shelves on which are supported the reticles.
Within a cleanroom environment, reticles are typically hand-carried from a stocker to a step-and-scan system which is used to transfer the circuit pattern image of the reticle to the wafer substrate. Typically, the step-and-scan system can only hold two reticles at a time, whereas a succession of multiple reticles may be used in the step-and-scan operations throughout a single day. Thus, many of the reticles must be placed on a reticle vehicle or other support to await the step-and-scan procedure.
To minimize damage to the reticles by electrostatic discharge (ESD) as the reticles are hand-carried or transported from the reticle stocker to the step-and-scan system, multiple ESD eliminators are provided in the cleanroom, typically beneath the cleanroom ceiling. As is well known, such ESD eleminators (also known as static eliminators or electrostatic eliminators) typically include a pair of discharge electrodes across which a high-voltage A.C. current is applied to generate ions of each polarity. Air is blown downwardly into the cleanroom environment through vents in the ceiling, and this air carries the ions generated by the ESD eliminators to the surfaces of the reticles and prevents the buildup of electrostatic charges which may otherwise discharge and damage the reticles.
One of the problems inherent in the conventional use of multiple ESD eliminators mounted beneath the ceiling of the cleanroom is that many areas in the cleanroom lack sufficient downflow of air to facilitate sufficient transfer of the neutralizing ions from the ESD eliminators to the surfaces of the reticles. This increases the likelihood of ESD-induced damage to the reticles as they are carried or transported from the reticle stocker to the step-and-scan system and as they await their turn for the step-and-scan procedure. Accordingly, a novel reticle vehicle which is equipped with an electrostatic charge eliminator or eliminators is needed for the transport and/or temporary storage of masks or reticles in a cleanroom environment.
An object of the present invention is to provide a novel vehicle which is suitable for applications including but not limited to the transport and/or storage of masks or reticles.
Another object of the present invention is to provide a vehicle which is equipped with at least one ESD eliminator and is capable of transporting and/or temporarily storing a variety of objects while preventing electrostatic discharges on the objects.
Still another object of the present invention is to provide a novel vehicle which includes an electrostatic charge (ESC) eliminator or eliminators for eliminating electrostatic charges on objects transported and/or stored on the vehicle.
Yet another object of the present invention is to provide a novel vehicle with an electrostatic charge eliminator or eliminators which are capable of preventing electrostatic discharge damage to sensitive electronic circuits provided on devices transported and/or stored on the vehicle.
A still further object of the present invention is to provide a novel vehicle which may include a vehicle frame for supporting an object or objects and at least one electrostatic charge eliminator provided on the frame for neutralizing electrostatic charges and preventing electrostatic discharges on the object or objects.
Yet another object of the present invention is to provide a novel vehicle with electrostatic charge eliminators, which vehicle may be used in a variety of applications including but not limited to transport and/or storage of reticles or masks from a reticle or mask stocker and a stepper or scanning system for the formation of a circuit pattern from the reticle or mask onto a semiconductor wafer substrate.

Vehicle with electrostatic charge eliminators


A cryptographic system (500) includes cryptographic sub-units (510) and associated input buffers (520) connected to a scheduler (530) and a reassembler (540). The scheduler (530) receives packets, where each of the packets includes one or more data blocks, and assigns each of the packets to one of the sub-units (510). The input buffers (520) temporarily store the packets from the scheduler (530). Each of the sub-units (510) performs a cryptographic operation on the data blocks from the associated input buffer (520) to form transformed blocks. The reassembler (540) receives the transformed blocks from the sub-units (510), reassembles the packets from the transformed blocks, and outputs the reassembled packets in a same order in which the packets were received by the scheduler (530).

1. Field of the Invention
The present invention relates generally to cryptography and, more particularly, to systems and methods that provide high performance cryptography.
2. Description of Related Art
Compared to network data transmission, cryptographic protection of data is a computationally-intensive task. There is a need, however, for network-speed cryptography to support the Secure Internet Protocol (IPsec) security standard for data protection between entities communicating over the Internet. This has lead to the development of cryptography units employing multiple cryptography engines, whose aggregate performance matches network data rates.
Existing parallel cryptography units employ one of three techniques to achieve higher performance: pipelined, block-parallel, and flow-parallel techniques. FIG. 1 is a diagram of a conventional pipelined system 100 that operates upon blocks of a packet. Each packet is broken into multiple fixed-sized data blocks before being operated upon by pipelined system 100.
Pipelined system 100 includes a series of cryptography stages 110 that perform a cryptographic (e.g., encryption or decryption) operation on data blocks of a packet. Each of cryptography stages 110 performs part of the cryptographic operation (f(X)) on a data block and passes it onto the next stage for the next part of the cryptographic operation. If the pipelined system 100 includes four cryptography stages 110, the portions of the cryptographic operation performed by the four cryptographic stages 110 may be represented by f1(X), f2(X), f3(X), and f4(X), respectively. In this case, the cryptographic operation may be defined as: f(X)=f4(f3(f2(f1(X)))).
FIG. 2 is a diagram of a conventional block-parallel system 200 that operates upon multiple blocks of a packet in parallel. Block-parallel system 200 includes multiple cryptographic sub-units 210 connected in parallel between demultiplexer 220 and multiplexer 230. Demultiplexer 220 delivers a new data block arriving for encryption or decryption to a currently unused cryptographic sub-unit 210. Demultiplexer 220 typically uses a round robin technique to select a sub-unit 210, since the cryptographic operation usually takes the same amount of time for each data block. Each of sub-units 210 performs a cryptographic operation on its data block and outputs the result to multiplexer 230. Multiplexer 230 multiplexes the results from sub-units 210 together into a single stream.
FIG. 3 is a diagram of a conventional flow-parallel system 300 that operates upon multiple packets in parallel. Unlike the other systems 100 and 200, flow-parallel system 300 operates upon units of packets rather than units of data blocks. Flow-parallel system 300 includes multiple cryptographic sub-units 310 connected in parallel via input buffers 320 and output buffers 330 to demultiplexer 340 and multiplexer 350.
Demultiplexer 340 uses information within the packet to be encrypted or decrypted to select a sub-unit 310 to process the packet. When IPsec is used, demultiplexer 340 normally uses the Security Association (SA) to which the packet belongs in determining which sub-unit 310 to select. There is typically a different SA for each remote entity with which the network device is communicating. Other characteristics of a packet, such as the TCP connection to which it belongs, can also be used.
Demultiplexer 340 stores the packet in an input buffer 320 of the selected sub-unit 310. Input buffer 320 typically includes a first-in first-out (FIFO) memory. Sub-unit 310 performs a cryptographic operation (e.g., encryption or decryption) on the packet and stores the result in output buffer 330. Output buffer 330 typically includes a FIFO memory. Multiplexer 350 receives packets from output buffers 330 and multiplexes them together into a single stream.
Pipelined and block-parallel systems suffer from an inability to handle common cryptographic modes, where the encryption or decryption of a block is dependent on the completion of the prior block in a series of blocks. In particular, the Cipher Block Chaining (CBC) mode, which is widely accepted as the only current cryptographic mode suitable for the encryption of packet data, has this property. Thus, pipelined and block-parallel systems are not suited for packet-based cryptography employing the CBC mode. The block-parallel technique can also experience difficulties with other modes, such as the "counter" mode, where certain state information must be shared among multiple sub-units working on the same packet.
It may be possible to modify the block-parallel technique so that all data blocks from a single packet are assigned, in sequence, to the same sub-unit. Assuming that all sub-units have similar performance, this means that short packets (with few data blocks) will finish faster than long packets (with many data blocks), resulting in packets becoming out of order, as short packets get ahead of longer ones. Packet reordering is considered a highly undesirable behavior because it degrades the throughput of the widely used TCP. Thus, such a modified block-parallel technique has significant disadvantages that prevent its successful use.
Flow-parallel systems can handle CBC and similar feedback modes because all related data blocks from a single packet are handled by the same sub-unit. These systems also avoid the problems of packet reordering because all packets from a single flow are processed in order through the same sub-unit. Reordering of packets between flows is considered acceptable behavior because it does not affect TCP throughput. Flow-parallel systems, however, limit the maximum throughput on any flow to the maximum performance of a single sub-unit. As a result, while large aggregate data rates can be achieved for many flows through a single cryptography device, individual flows cannot approach the full throughput of a high bandwidth network interface.
Also, flow-parallel systems can suffer from traffic imbalances among the different sub-units, with some sub-units going unused with no flows currently assigned to them or actually sending traffic enough to fill them, while other sub-units are oversubscribed with several high bandwidth flows that exceed the capacity of the sub-units. Because it is difficult to determine, a priori, what the bandwidth of a given flow will be, the assignment of flows to sub-units will generally be sub-optimal.
Therefore, there is a need for network-speed cryptography that supports current security protocols, such as IPsec, for data protection between entities communicating over a network at full line rate with no reordering.

Packet-parallel high performance cryptography systems and methods

Verizon Corporate Services Group Inc. & BBN Technologies Corp.


A method for controlling timing of ignition of a fuel charge in a compression-ignition engine operating in a controlled auto-ignition mode wherein the engine includes controllable intake and exhaust valve actuation systems is described. The method comprises determining a preferred ignition timing for a cylinder charge and a mass of the fuel charge based upon operator torque request. A portion of the fuel charge is partially oxidized during a negative valve overlap period immediately prior to a compression stroke. Magnitude of the portion of the fuel charge is based upon the preferred ignition timing of the cylinder charge. A remainder of the fuel charge is injected into the cylinder during the compression stroke.

The statements in this section merely provide background information related to the present disclosure and may not constitute prior art.
Compression-ignition engines, e.g., diesel engines, offer benefits including improved fuel economy. Manufacturers of vehicles, including passenger cars, commercial trucks, construction, and agricultural tractors, must meet stringent emissions requirements to market their products.
Controlling ignition timing, i.e., retarding or advancing timing, on a diesel engine is a valuable control option, in order to achieve low smoke emissions. For example, it has been demonstrated that in a system operating in lean air/fuel ratio in a compression-ignition mode with a premixed cylinder charge (i.e., controlled auto-ignition or homogeneous-charge compression-ignition, or HCCI), it is necessary to complete the injection of all fuel before ignition occurs, in order to achieve benefits related to lowered particulate matter (PM) emissions.
In an engine operating in auto-ignition mode, combustion of a cylinder charge is flameless, and spontaneously occurs throughout the entire combustion chamber volume. The homogeneously mixed cylinder charge auto-ignites as the cylinder charge is compressed and its temperature increases. The ignition timing of auto-ignited combustion depends on initial cylinder charge conditions including, primarily, temperature, pressure, and composition of the cylinder charge. Thus, it is important to coordinate engine control inputs, such as fuel mass, injection timing, and intake and exhaust valve motion, to ensure robust auto-ignition combustion.
Timing of fuel injection is currently used to control ignition and combustion timing in diesel engines. Injection timing during the main compression stroke is the main alternative control option for controlling ignition timing in diesel engines. By retarding timing of injection, ignition of the cylinder charge is retarded. However, it is necessary to complete the injection of all fuel before ignition occurs.
It is well known that techniques for achieving low NOx emissions and particulates associated with diesel auto-ignition combustion are limited to moderate loads, because ignition of the cylinder charge is too rapid at high loads. It would be useful to have a method for retarding ignition timing that is not related to injection timing. It would be useful to expand the operating range of a compression-ignition engine in auto-ignition mode to improve emissions performance and fuel economy.
It is well known from studies of gasoline HCCI engines with negative valve overlap (NVO) that fuel injected during the negative valve overlap (recompression) advances combustion timing. The reason given for this is that the fuel injected during negative valve overlap is partially oxidized, or reformed, releasing some heat so that the temperature of the trapped residual is increased. The presence of higher trapped residuals results in a higher temperature at intake valve closing, leading to earlier ignition in a gasoline engine operating in HCCI mode.
At moderate and high loads in a premixed diesel engine, the ignition delay is decreased due to high in-cylinder temperature. As a result, combustion timing is over-advanced, resulting in excessive engine noise and possibly higher soot emissions. Premixed diesel combustion relies heavily on recirculated exhaust gas (EGR) to retard combustion. During transient operation of premixed diesel combustion, a delay in EGR reaching the cylinder can result in unstable ignition timing. At high load, engine noise becomes a problem because sufficient EGR cannot be inducted into the combustion chamber.
There is a need to control ignition timing independently of injection timing in a compression-ignition engine operating in an auto-ignition mode. The benefits of so operating include expanding the dynamic operating range of the engine in the auto-ignition mode, improving emissions performance and fuel economy, and, minimizing engine noise.

Method and apparatus for controlling ignition timing in a compression-ignition engine operating in an auto-ignition mode


The invention provides methods for producing pine somatic embryos using a liquid development medium and/or a liquid stratification medium. In a first aspect, the methods comprise the step of culturing embryogenic cells in, or on, a liquid development medium to produce cotyledonary pine somatic embryos. In another aspect, the methods comprise the step of culturing pine cotyledonary somatic embryos in, or on, a liquid stratification medium to produce stratified cotyledonary somatic embryos. The invention also provides methods for producing pine somatic embryos in bioreactors.

The demand for coniferous trees, such as pines and firs, to make wood products continues to increase. One proposed solution to this problem is to identify individual trees that possess desirable characteristics, such as a rapid rate of growth, and produce numerous, genetically identical, clones of the superior trees by somatic cloning.
Somatic cloning is the process of creating genetically identical trees from tree tissue other than the male and female gametes. In one approach to somatic cloning, plant tissue is cultured in an initiation medium that includes hormones, such as auxins and/or cytokinins, to initiate formation of embryogenic cells, such as embryonal suspensor masses, that are capable of developing into somatic embryos. The embryogenic cells are then further cultured in a maintenance medium that promotes establishment and multiplication of the embryogenic cells. The multiplied embryogenic cells are then cultured in a development medium that promotes development of somatic embryos which can, for example, be placed within manufactured seeds and sown in the soil where they germinate to yield seedlings. The seedlings can be transplanted to a growth site for subsequent growth and eventual harvesting to yield lumber, or wood-derived products.
The present invention provides methods that are useful for somatic cloning of pine. In particular, the methods of the invention are applicable for the large-scale production of pine somatic embryos.

Development and stratification of pine somatic embryos using a liquid system


An internal combustion engine (2) of a vehicle (1A, 1B) is automatically stopped when a first automatic stopping condition is established while the vehicle is stationary or a second automatic stopping condition is established while the vehicle travels. The first automatic stopping condition requires a road gradient equal to or smaller than a first gradient threshold, and the second automatic stopping condition requires the road gradient equal to or smaller than a second gradient threshold. By setting the second gradient threshold at a smaller value than the first gradient threshold, a feeling of unease experienced by a driver when the engine is stopped on a slope is reduced.

Japanese Patent Application Publication No. 2008-14193, published by the Japan Patent Office in 2008, proposes an engine automatic stopping device that automatically stops an internal combustion engine when a predetermined condition is established while a vehicle is either traveling or stationary.
This prior art proposes that automatic stopping of the internal combustion engine be prohibited when an uphill gradient of a road equals or exceeds a predetermined value to prevent the vehicle from rolling back.

Engine automatic stopping device and engine automatic stopping method