An image processing apparatus includes an image input section, a color image/monochrome image converting section for performing image area division, a binarization circuit for binarizing a converted monochrome image, a reducing section for reducing a binary image, a boundary extracting section for extracting the boundaries between the areas of constituent elements constituting an input image, e.g., a binary image and a continuous gradation image, and a kind-of-image determining section for determining the kinds of images in partial areas defined by the extracted boundaries. For example, the image processing apparatus further includes a data compressing section. In the image processing apparatus, pre-processing is performed to efficiently performing pattern determination in consideration of localization of frequencies of occurrence of edges and black pixel patterns of an image, and kind-of-image determination is performed by a neural network on the basis of the data obtained by pre-processing, thus performing suitable processing such as data compression in accordance with the determination result.

1. Field of the Invention
The present invention generally relates to an image processing apparatus and, more particularly, to an image processing apparatus for dividing an in put image (to be referred to as a composite image hereinafter) having various kinds of input images, e.g., a typed character image, a handwritten character image, a photographic image, and a graphic pattern image, into areas of the respective kinds of images, and performing image processing such as data compression.
2. Description of the Related Art
Conventionally, when an image having continuously changing gradation (to be referred to as a continuous gradation image) such as a composite image (document image) having a character image, a graphic pattern image, a photographic image, and the like is to be filed as digital data, the image data is compressed to perform efficient data transfer for storing or communicating the data.
When a composite image is to be imaged by an image pickup unit, and image processing such as data compression is to be performed, it is generally desirable that the image be divided into areas having relatively different characteristics, e.g. a character area, a graphic pattern area, and a photographic area, and processing suitable for each area be performed.
As a method of dividing such a composite image into a character string area, a graphic pattern area, a photographic area, and the like, the following method is generally used. In this method, an overall image is decomposed into coupled components, and some kind of integration is performed to set areas as groups of the coupled components.
For example, as disclosed in "Image Area Division Scheme for Composite Image Having Character Image and Graphic Pattern Image (Halftone Image, Photographic Image)" THE TRANSACTIONS OF THE INSTITUTE OF ELECTRONICS, INFORMATION AND COMMUNICATION ENGINEERS OF JAPAN, D-II, Vol. J75-D-II, No. 1, pp. 39-47, Jan. 1992!, the following conventional scheme is used to determine a character image. First, edge emphasis processing is performed. Ternary processing is then performed by determination processing based on a proper threshold value. Areas in which black and white pixels continue are subjected to pattern matching to detect edge areas, thereby determining character image areas.
In addition, as disclosed in Jpn. Pat. Appln. KOKAI Publication No. 61-296481, there is proposed a document reader in which an input binary document image is reduced, and neighboring black pixels are integrated to detect an area.
As shown in FIG. 40, this document reader comprises an image information storage section 401 for storing binary image (document image) data obtained by optically scanning a document and photoelectrically converting the resultant data, a reduced image storage section 402 for dividing the document image data stored in the image information storage section 401 into small areas, reducing each small area to one pixel, and storing the resultant data, a black pixel integrating section 403 for scanning the reduced image data in a character-string direction and integrating neighboring black pixels, and an area detecting section 404 for detecting areas, of the image obtained by the black pixel integrating section 403, in which black pixels are coupled to each other as image areas.
The binary document image data stored in the image information storage section 401 is divided into small areas, each consisting of a predetermined number of pixels. If the number of black pixels in each small area is equal to or larger than a predetermined threshold value, a black pixel is assigned to each area. If the number of black pixels is less than the threshold value, a white pixel is assigned to each area. The resultant data is then stored in the reduced image storage section 402.
The black pixel integrating section 403 scans the reduced image data in a character-string direction and converts a white run having a length smaller than a predetermined threshold value into a black run, thus integrating neighboring black pixels. In the area detecting section 404, areas, of the image obtained by the black pixel integrating section 403, in which black pixels are coupled to each other are detected as image areas. With this operation, the image areas contained in the document can be detected.
A conventional image information processing system has a processing function of classifying an input composite image according to the kinds of images and converting the classified data into digital data.
One purpose of this processing is to minimize the total data amount of a composite image, when the composite image is stored in a storage medium in the form of digital data, while desired information quality is maintained, by using compression methods which allow data compression with the maximum efficiencies for all kinds of images. The other purpose is to adaptively select binarization methods to obtain better images when images classified as binary gradation images, e.g., character and line images, and continuous gradation images, e.g., a photographic image are expressed as binary images.
There are proposed various processing methods of dividing and classifying the composite image into description areas for all kinds of images. In many of these methods, feature amounts based on the kinds of images are extracted, and the extracted feature amounts are judged by predetermined estimation functions or decision functions, thus determining kinds of images. In many conventional image processing schemes, the frequency of occurrence of black pixels or edges, a luminance level histogram, a spatial frequency distribution, a line segment directivity distribution, and the like within a predetermined block area of an image are used as feature amounts. In addition, Jpn. Pat. Appln. KOKOKU Publication No. 4-18350 discloses a classification processing method using a density gradient frequency distribution of an input image as a feature amount, which is also used in the present invention. In this method, density gradients of a digital image as an input image are obtained in units of pixels in the horizontal and vertical directions, and directions calculated from the values of the obtained horizontal and vertical density gradients are counted in a divided small area, thereby obtaining its frequency distribution. The variance of the frequencies is calculated from the frequency distribution, and the variance is compared with a predetermined threshold value to determine whether the area is a character area or not.
In order to properly perform classification of image data by using the above-described conventional methods, the image data needs to be an ideal image in a relatively good state, including no noise and the like. In reality, however, input image data tends to be influenced by illumination irregularity, stains of a file document, or the like. In such an image, the contrast locally decreases or noise is generated. As a result, detection of black pixels and edge extraction cannot be performed stably. Therefore, it is very difficult to accurately determine kinds of images by using the conventional methods using black pixel detection and edge extraction as parameters.
Furthermore, in order to perform the above-described area division of a composite image without omitting end portions of image areas, it is required that the edge portions such as the end points of characters be faithfully reflected in reduction of an image. In the conventional techniques, however, an input binary composite image is divided into small areas, and a black pixel is assigned to each small area in which the number of black pixels is equal to or larger than a threshold value. If, therefore, the threshold value is larger than "0", a small area located at an end of an image area is not detected, resulting in omission of a portion. If the threshold value is set to be "0", a large amount of noise is picked up, and correction division processing cannot be performed.
In addition, in a reverse monochrome composite image, the overall document image is extracted as a large area.
The above-described distribution of directions calculated from a density threshold value can properly reflect the directivity distribution of edge portions of an image. Therefore, this distribution represents an effective feature amount for determining whether a given image is a typed character image having many edge components in the vertical and horizontal directions, for the difference between a typed character image and other kinds of images is conspicuous. To use the variance of distributions as an estimation criterion for performing determination on the basis of this feature amount is to observe localization of the directivity of edges. In addition, calculation of this variance can be performed with a relatively small calculation load, and hence this method is practical.
If only the variance of the direction distributions of density gradients is used for threshold determination, accurate determination is difficult to perform with respect to the following images: a so-called low-contrast image in which the range of luminance (density) levels is narrow; an image in which the ratio of the occupied area of character edge portions to a determination target small area is small; and an image in which the lines of a character are narrow; because the variance is reduced even if the image to be processed is a typed character image. This is because the direction distribution of density gradients of a background increases in frequency, and the relative difference in direction distribution between the background and a character portion cannot be recognized. Since the direction distribution of density gradients of a background generally has no direction dependency, the direction dependency of the direction distribution of the edges of a character portion is hidden by the distribution of the background.
Furthermore, when various kinds of images (a hand-written character image, a photographic image, a graphic pattern image, and a background image) as well as a typed character image are to be selected and classified, these images cannot be discriminated from each other at all by only observing the variance of the direction distribution of density gradients.

Image processing apparatus for performing adaptive data processing in accordance with kind of image


An electronic device includes one or more multinode pads having two or more conductive segments spaced from one another on a semiconductor die. A conductive stud bump is selectively formed on portions of the first and second conductive segments to program circuitry of the semiconductor die or to couple a supply circuit to a load circuit. The multinode pad can be coupled to a programming circuit in the semiconductor die to allow programming a programmable circuit of the semiconductor die during packaging. The multinode pad has respective conductive segments coupled to the supply circuit and the load circuit to allow current consumption or other measurements during wafer probe testing in which the first and second conductive segments are separately probed prior to stud bump formation.

Packaged electronic devices, such as integrated circuits (ICs) are manufactured using one or more semiconductor dies. A semiconductor die may be fabricated with external connection points, such as guide pads, allowing selective enablement and/or programming of certain functions. This configurability of the semiconductor die facilitates use of the die in a variety of different products. Unlike programmable internal fuses or memory registers, die configuration through external connections is done using bond wires during packaging. However, bond wire interconnections are limited by design rules, particularly for multi-die electronic devices where bond wire density is high.


A method of broadcasting frequency policy information in a cognitive radio based communication system, apparatus therefore and a communication method using the same are disclosed. In particular, a policy broadcaster is provided as a subject performing a broadcast of frequency policy information in cognitive radio communication. A method of broadcasting frequency policy information using the same and a method of performing cognitive radio communication by obtaining frequency policy information using the same are provided. Moreover, an enhanced superframe structure, which is capable of providing a seamless service in case that a narrowband terminal is introduced in the middle of a superframe, is provided.

Recently, it is expected that the demands for frequencies will rise to keep up with the ubiquitous age. So, the frequencies are regarded as resources having vast economic values and many efforts in a national strategic dimension are being made to the frequency managements by the governments of U.S.A., Great Britain, Japan, and the like. In particular, developments for spectrum managing tools, establishment of extended-term spectrum using plans, promotions in market-directional frequency collection and reassignment policy, unlicensed band extension, and introduction of market-voluntary open frequency policy in command & control are accelerated. And, many countries make aggressive efforts to research and develop the technologies for minimizing interferences with conventional frequencies and the frequency sharing technologies considering locality.
As the wireless communication broadcasting industry has been recently developed, the demands for the frequencies as bases of the corresponding services have risen rapidly. And, the frequency values are rapidly raised.
Since the demand for frequencies was not so high relatively in the past days, a frequency supply to a new service was no big deal. As the demands for frequencies rise explosively nowadays, it is very difficult to supply frequencies to the right places at the right times.
Moreover, there exist preferred bands having excellent radio wave characteristics and the demands for the bands are very high. So, providers often get involved in troubles for the preferred frequency bands.
Hence, frequencies have very high economic values and can be regarded rare resources of limited supplies. And, many efforts are made to research and develop such a new frequency sharing technology as UWB (ultra wide band), CR (cognitive radio), and the like to technically settle the frequency shortage.
The present invention is directed to a problem based on cognitive radio (hereinafter abbreviated CR) as one of the aforesaid radio transmission schemes to use frequencies efficiently in the future. And, the related art communication system and the CR based communication system are schematically explained as follows.
First of all, data transmission and reception are normally implemented by currently serviced radio communication services using fixed bandwidths. In particular, a mobile communication system obtains maximum performance through inter-cell frequency assignment using a resource allocated to a specific band. A scheme of transmitting/receiving a signal using a fixed band has a fixed frame for its implementation. In order to support a higher quality of service (e.g., increasing throughput, increasing a number of users to provide a service, etc.) by fitting a currently used system specifications, a cell structure is normally segmented into small pieces or a new infrastructure is established by expanding old system specifications to keep up with the demand.
In using a frequency resource so far, there are a service system using a fixed bandwidth and a recent service system using a scalable bandwidth that selectively applies one of various bandwidth options.
In determining a standard of a service, the service system using the fixed bandwidth performs a service by forming a standardized frame in a manner of applying various proper transmitting/receiving schemes to the corresponding band. And, a burden of modifying a whole service system in accordance with every variation of the standard is imposed on the service system using the fixed bandwidth.
On the contrary, the standard utilizing the scalable bandwidth is designed to facilitate controls of a variation of a bandwidth and a quality of service rather than the case of the fixed bandwidth. Yet, the scalable bandwidth service operates in a same manner of the fixed bandwidth service in an actual service operation situation. Namely, the scheme for changing a quality of service without increasing complexity of hardware uses the same scheme instead of changing the technique of broadening or narrowing a bandwidth to obtain a result from using the scalable bandwidth.
As mentioned in the foregoing description, as the demand for radio communication services rapidly increases and various techniques appear, a demand for frequencies exceeds a supply. So, there is a problem that there barely exists a band margin available for several GHz bands, in particular, a low frequency band having good frequency characteristics. To solve this problem, CR scheme appears. The CR scheme is proposed by Mitola in 1999 for the purpose of using a frequency band more efficiently. By the CR scheme, a vacant frequency, which is not actually in use, is detected and then shared and used efficiently.
In particular, CR is basically implemented based on software defined radio (SDR). The CR is able to judge and decide whether to set an unused spectrum to a basic communication band by searching spectrum, whether to change a service type by modifying SDR architecture in accordance with a searched service type, or whether to change a quality of service. Considering the basic concepts and the currently active various radio services, it is decided that personally carried wireless terminals converge into one type and it is also expected that a CR terminal will be suitable for the corresponding convergence.
Thus, communication systems according to the currently discussed frequency managing schemes can be categorized into 1) Fixed Bandwidth Communication System, 2) Scalable Bandwidth Communication System, and 3) CR Based Communication System. Ad, their operational systems are schematically explained with reference to the drawings as follows.
FIG. 1 is a diagram to explain a fixed bandwidth service system.
Referring to FIG. 1, a fixed bandwidth service system provides a service using a bandwidth set in an initial standardizing step like a current mobile communication system (CDMA or GSM), a wireless LAN (802.11 or HiperLAN), or a wireless PAN (802.15).
A frequency use approval for the service bandwidth is granted by a government or a predetermined quantity of the service bandwidth is used for a frequency band known in public.
This service, as shown in FIG. 1, is characterized in that there is no increase or decrease of a frequency bandwidth in accordance with time at all and in that a service within a preset bandwidth is optimized within the bandwidth. Hence, FIG. 1 shows that a preset bandwidth keeps being used regardless of a quantity of current traffics.
FIG. 2 and FIG. 3 are diagrams to explain a scalable bandwidth service system.
Scalable bandwidth service systems can be categorized in two types shown in FIG. 2 and FIG. 3, respectively. The two types include a type that a bandwidth used by a terminal is scalable in a state that a service band of a base station is fixed and a type that a bandwidth used by a base station is scalable as well.
First of all, an example that a bandwidth used by a base station is fixed and that a bandwidth serviced for a terminal in the bandwidth of the base station is scalable is shown in FIG. 2. The example of the service includes such a service using OFDM as 902.16, 802.20, and 3GPP LTE or such a CDMA service of assigning a bundle of channels to a terminal as EV-DO and EV-EV. In theses services, a corresponding service is accessed in a manner that a total bandwidth used by a base station is set and that a specific bandwidth is assigned to a bandwidth used by a terminal by a corresponding base station. In this case, a bandwidth to be used by a base station is set in advance in case of system installation.
On the contrary, a case that a bandwidth serviced by a base station varies in accordance with time, as shown in FIG. 3, is possible. This case corresponds to a service model generated when CR is accommodated by 802.22. In particular, an available spectrum per time is detected and a base station extends its service within an available bandwidth. In this case, requirements for a terminal include that the corresponding bandwidth should be entirely accommodated. FIG. 3 exemplarily shows variations of a frequency bandwidth used by a base station and a terminal in accordance with time.
FIG. 4 is a diagram to explain a CR based service system.
Basically, CR does not specify a specific scheme. And, CR means that a configuration of a terminal varies in accordance with a spectrum resource to use a current spectrum resource more efficiently.
FIG. 4 shows how a CR terminal makes an access if there is an unused portion in a spectrum. When there is a spectrum band to be observed, if an unused area is found from the corresponding band, a communication service to be implemented with CR within the area is provided. The communication service can include a fixed band service or a scalable band service. And, the communication service differs from a conventional service in that, since a spectrum varies in accordance with time, a protocol for managing the spectrum variation and a learning process are needed. Moreover, a current standard for implementing CR is 802.22 WRAN system.
Based on the above explanation, the CR can be defined as a technique for transmitting/receiving a radio signal without interference with another device in a manner of cognizing a surrounding radio environment and deciding a communication parameter optimal for a radio environment by itself.
In most countries, personal short-range radio devices use unlicensed frequency bands in general. Yet, a frequency band available without license is limited and the rest of frequency bands are almost assigned to other usages. So, it is difficult to secure a frequency band for a new service. Yet, in the present status of actual frequency use, a situation is a little different. Many frequency bands over 2 GHz are not actually in use and there exist frequency bands not used temporally or spatially in major frequency bands below 1 GHz for TV or mobile communications.
FCC (federal communications commission) performs a study for a real frequency use rate to survey an average frequency use rate varying temporarily or locally. And, the survey says that there is about 15˜85% of a use rate. FCC announces NPRM (notice of proposed rulemaking) to raise frequency use efficiency in December, 2003 to notice redundant use availability for vacant frequencies. Upon this opportunity, the frequency shortage problem can be considerably mitigated.
Since the frequency sharing use availability by CR technique was announced by FCC NPRM in December, 2003, many efforts have been made to develop a real system by a first meeting for IEEE802.22 in November, 2004. This organization discusses standardization for CR applied WRAN on a TV band shown in FIG. 5.
FIG. 5 shows a diagram to explain a CR sharing concept for TV frequency band.
Referring to FIG. 5, IEEE 802.22 provides WRAN service by sharing a TV band. And, a service unit is determined as an integral multiple of an available TV channel (6 MHz TV channel in FIG. 5).
In particular, if there is an unused TV channel, which is indicated as 'unused TV channel' in FIG. 5, cognized by a base station, this channel is used for WRAN service. And, if TV channels are consecutively available within a range proposed by a standardization, these channels are combined together to use as a single band. And, a service using the whole is provided. FIG. 5 shows a case that multi-carriers are transmitted to correspond to an unused TV channel environment for example.
And, a terminal cognizes the whole channel status of the base station and should extend its reception capability as well.
Meanwhile, a conventional frequency policy differs per a country or a region in frequency band and frequency assignment specifications for a mobile communication, a wireless LAN and the like. So, in order for a CR terminal to operate correctly, information on a local frequency policy should be retained. Based on this information, when the CR terminal accesses a frequency band in the future, a communication service selection and an operation of a communication system is governed.
However, a method for obtaining information on a frequency policy in a random area is not defined in the conventional frequency policy and the conventional communication method. So, when a power of a CR based terminal is turned on in a random area or a CR based terminal moves away into a random area, the CR based terminal fails to cognize a frequency policy corresponding to the area but is unable to be converted to a communication system suitable for a frequency of the corresponding area.
Moreover, if an open frequency policy depending on a self-regulating market is adopted to proceed instead of adopting a conventional command & control type frequency policy uniformly, the absence of the per area frequency policy information obtaining scheme may cause a considerable problem.

Method for cognitive radio based communication and method for broadcasting policy information for the same


The present invention relates to compounds of formula (IA):

The present invention relates to certain thiophene derivatives and their use in the practice of medicine as allosteric modulators of adenosine receptors.
Adenosine (Ado) is an autocoid (or local hormone) that modulates numerous functions in the cardiovascular and other organ systems. The actions of Ado are mediated by at least four subtypes of cell surface receptors called A1, A2a, A2b, and A3. Because the ubiquity of adenosine receptors (AdoRs) throughout the body of a human, their indiscriminate activation may cause undesirable side effects. Therefore, new drug design approaches to achieve receptor and organ selectivity are needed.
The overall function of Ado appears to be the regulation of the balance between oxygen (or energy) supply and consumption (or work). Ado increases oxygen supply by causing vasodilation and decreases oxygen consumption or work by inhibiting cellular functions, e.g., slowing of heart rate. Consistent with this protective function, A1AdoR agonists, Ado uptake blockers and Ado deaminase inhibitors have been shown to reduce cellular damage and dysfunction during hypoxia and ischemia. This protective role of Ado and A1AdoR agonists has been shown in heart, brain, liver, and intestines. This and other potentially beneficial actions of Ado have led to increased interest in the development of Ado-related drugs targeted to ameliorate conditions such as myocardial ischemia and stroke.
However, the widespread expression of Ado receptors and the lack of sufficiently selective adenosine agonists have been a major impediment to the successful development of direct-acting AdoR agonists to exploit the cytoprotective properties of Ado. Therefore, other pharmacological approaches such as allosteric modulators of Ado may prove to be a valuable alternative to direct-acting Ado agonists and nucleoside uptake blockers. Such agents should selectively modulate the response to Ado in only those organs or localized areas of a given organ in which production of Ado is increased. Thus, allosteric modulators of Ado function should provide a more selective therapeutic effect than direct-acting AdoR agonists. Their action will be limited to times and locations at which significant release of Ado occurs so that systemic side effects would largely be avoided.
Allosteric modulation of the actions of Ado on the A1AdoR by several 2-amino-3-benzoylthiophenes on cultured cells, cardiac and brain preparations have been reported. The specificity of these compounds for A,AdoRs have also been demonstrated.
A number of compounds known to modulate the action of neurotransmitters, hormones and peptides bind at sites distinct from, but functionally linked to, the primary recognition site of the respective receptors. This form of interaction between two different ligands at the same receptor protein, which may result in modulation in the form of enhancement or inhibition of each others binding and function, is referred to as allosterism. Positive (enhancement) or negative (inhibition) allosterism is an important mechanism of action of drugs. For example, allosteric interactions between the GABA receptor and benzodiazepines, to atrial natriuretic factor (ANF) receptor and amiloride, the dextromethorphan binding site and ropizine, and the muscarinic receptor and gallamine have been described.
The compounds of the present invention have been found to be potent, yet selective allosteric modulators of AdoR agonists, and in some cases, AdoR antagonists.

Allosteric adenosine receptor modulators

Abstract: the preparation thereof, pharmaceutical formulations thereof, and their use in medicine as allosteric adenosine receptor modulators for uses including protection against hypoxia and ischemia induced injury and treatment of adenosine-sensitive cardiac arrhythmias.

King Pharmaceuticals Research & Development, Inc.


A phototransistor includes an emitter and a base that comprises Ge. A collector comprises Si. The base, emitter, and collector form at least one Si/Ge heterojunction allowing the unpinning of Fermi energy level (EF) of the phototransistor.

The invention relates to the field of photodetectors, in particular photodetectors having higher breakdown voltages.
Photodetectors are fundamental devices that convert optical signals into electric signals. Fiber optical communication employs 1300 and 1550 nm wavelengths because of low attenuation coefficients of silica fibers. Er doped fiber amplifiers emphasize the importance of 1550 nm because of the direct amplification of optical signals without converting to electric signals. The amplification range between 1530-1560 nm is referred to as C-band, and the recently extended amplification range between 1570-1608 nm is referred to as L-band. The photodetectors for 1550 nm detection have so far been InGaAs photodetectors, since InGaAs is a direct semiconductor whose bandgap is 0.75 eV (corresponding to 1653 nm). Thus, InGaAs photodetectors can convert any optical signal in the C- and L-bands to electric signals. These optical fiber communication components are well developed.
High electric field application is generally necessary for photodetectors to achieve higher responsivity. However, breakdown voltage VBR is lower in narrow gap semiconductors which increases reverse leakage currents. Thus high field application is hard in photodetectors with similar bandgaps to Ge.
In general, the elements In, Ga, and As are all dopants in silicon to show donor or acceptor characteristics and could thus alter the circuit performance if diffused. Ge can be a candidate for on-chip photodetectors, since Ge is in the group IV element and produces no harmful effects if diffused. Thus, Ge provides a perfect opportunity to form highly efficient photodetectors.


A chemical supply system comprises, as principal elements, a chemical storage tank in which a liquid chemical for cleaning is stored in the state of its formulated concentrate, a chemical supply apparatus connected to the chemical storage tank for positively performing chemical supply, a piping system connected to the chemical supply apparatus to form a supply flow passage that is a passage for ultrapure water which the liquid chemical is to be mixed with, a pair of discharge nozzles disposed at end portions of the piping system so as to oppose surfaces of a wafer set in a cleaning chamber to supply a cleaning liquid onto the surfaces. Thereby, remarkable miniaturization/simplification of a cleaning liquid supply system including chemical tanks is intended, it is made possible easily and rapidly to compound and supply a cleaning liquid at an accurate chemical concentration, and particles or the like being generated and mixing in a cleaning liquid, are suppressed to the extremity.

1. Field of the Invention
The present invention relates to a chemical supply pump, a chemical supply apparatus, and a chemical supply system (a chemical supply method) for accurately supplying a desired quantity of a liquid chemical, in particular, it is suitable for applying to a substrate cleaning apparatus (a substrate cleaning method) for cleaning semiconductor wafers or the like.
2. Description of the Related Art
Conventionally in a semiconductor wet process, used is a substrate cleaning apparatus for performing a process such as cleaning with a cleaning liquid of ultrapure water and a liquid chemical. As such a substrate cleaning apparatus, remarked is a substrate single wafer spin cleaning apparatus in which substrates are loaded one by one and a cleaning liquid is supplied with rotating the substrate in a circumferential direction.
In a conventional substrate cleaning apparatus, it was indispensable to provide a plurality of large-sized cleaning liquid storage tanks for preparing various liquid chemicals at desired concentrations necessary for cleaning. Accordingly, the whole system becomes a very large scale and complex inevitably in this case.
Besides, due to the necessity of providing a plurality of cleaning liquid storage tanks according to the necessary kinds of cleaning liquids as described above, particles are easy to mix in when a cleaning liquid is compounded. Further, generation of particles and (metal) contamination from various liquid-contact portion caused by complication of the substrate cleaning apparatus is in question.
In this manner, at present, it is difficult to avoid increases in scale and complication of the whole apparatus attendant upon an increase in cleaning speed of substrate cleaning apparatus. It is the present state that establishment of a technique of preventing particle-mixing or the like in a cleaning liquid, is eagerly desired.
It is an object of the present invention to provide a chemical supply pump, a chemical supply apparatus, a chemical supply system, a substrate cleaning apparatus, a chemical supply method, and a substrate cleaning method, wherein remarkable miniaturization/simplification of a cleaning liquid supply system including chemical reservoirs (chemical storage tanks) is intended, it becomes possible easily and rapidly to compound and supply a cleaning liquid at an accurate chemical concentration when it is required in cleaning, and it is realized to suppress particles or the like being generated and mixing in a cleaning liquid, to the extremity.
In order to attain the above object, a chemical supply pump of the present invention is a chemical supply pump in which a flow passage for passing a predetermined liquid chemical is formed, a suction valve which is closed by pressure rise of said liquid chemical is provided at a flowing-in port of said flow passage, and a discharge valve which is closed by pressure fall of said liquid chemical is provided at a flowing-out port of said flow passage, wherein at least part of a liquid contact surface in said flow passage is made of a compact member with non-permeability and a high anti-corrosion property to said liquid chemical, and part of said compact member is made into a movable wall, and a shaker connected to said movable wall is provided, and said movable wall is oscillated in a direction substantially perpendicular to its wall surface by drive of said shaker to change the volume of said flow passage periodically.
A chemical supply apparatus of the present invention comprises a chemical supply pump, and a connecting flow passage connecting a supply flow passage that is a passage for a solvent with which said liquid chemical is mixed, and said chemical supply pump, wherein a tubule member directly connecting said supply flow passage is provided in said connecting flow passage. In said chemical supply pump, a flow passage for passing a predetermined liquid chemical is formed, a suction valve which is closed by pressure rise of said liquid chemical is provided at a flowing-in port of said flow passage, and a discharge valve which is closed by pressure fall of said liquid chemical is provided at a flowing-out port of said flow passage, at least part of a liquid contact surface in said flow passage is made of a compact member with non-permeability and a high anti-corrosion property to said liquid chemical, and part of said compact member is made into a movable wall, and a shaker connected to said movable wall is provided, and said movable wall is oscillated in a direction substantially perpendicular to its wall surface by drive of said shaker to change the volume of said flow passage periodically. Said chemical supply apparatus discharges said liquid chemical from said tubule member into said solvent passing through said supply flow passage by drive of said chemical supply pump to compound a mixture solution at a desired concentration.
A chemical supply system of the present invention is a chemical supply system comprising at least one kind of chemical reservoir easy to move, a chemical supply apparatus connected in correspondence to said chemical reservoir, and said supply flow passage. Said chemical supply apparatus comprises a chemical supply pump, and a connecting flow passage connecting the supply flow passage that is a passage for a solvent with which said liquid chemical is mixed, and said chemical supply pump, wherein a tubule member directly connected to said supply flow passage is provided in said connecting flow passage. In said chemical supply pump, a flow passage for passing a predetermined liquid chemical is formed, a suction valve which is closed by pressure rise of said liquid chemical is provided at a flowing-in port of said flow passage, and a discharge valve which is closed by pressure fall of said liquid chemical is provided at a flowing-out port of said flow passage, at least part of a liquid contact surface in said flow passage is made of a compact member with non-permeability and a high anti-corrosion property to said liquid chemical, and part of said compact member is made into a movable wall, and a shaker connected to said movable wall is provided, and said movable wall is oscillated in a direction substantially perpendicular to its wall surface by drive of said shaker to change the volume of said flow passage periodically. Said chemical supply apparatus discharges said liquid chemical from said tubule member into said solvent passing through said supply flow passage by drive of said chemical supply pump to compound a mixture solution at a desired concentration. Said chemical supply system discharges said mixture solution made into the predetermined concentration from a discharge portion provided at an end portion of said supply flow passage, by drive of said chemical supply pump of said chemical supply apparatus.
A substrate cleaning apparatus of the present invention is a substrate cleaning apparatus in which a cleaning liquid is supplied to a set substrate to clean, and comprises a chemical supply system. Said chemical supply system comprises at least one kind of chemical reservoir easy to move, a chemical supply apparatus connected in correspondence to said chemical reservoir, and a supply flow passage. Said chemical supply apparatus discharges said liquid chemical from said tubule member into said solvent passing through said supply flow passage by drive of said chemical supply pump to compound a mixture solution at a desired concentration, and comprises a chemical supply pump, and a connecting flow passage connecting the supply flow passage that is a passage for a solvent with which said liquid chemical is mixed, and said chemical supply pump, wherein a tubule member directly connected to said supply flow passage is provided in said connecting flow passage. In said chemical supply pump, a flow passage for passing a predetermined liquid chemical is formed, a suction valve which is closed by pressure rise of said liquid chemical is provided at a flowing-in port of said flow passage, and a discharge valve which is closed by pressure fall of said liquid chemical is provided at a flowing-out port of said flow passage, at least part of a liquid contact surface In said flow passage is made of a compact member with non-permeability and a high anti-corrosion property to said liquid chemical, and part of said compact member is made into a movable wall, and a shaker connected to said movable wall is provided, and said movable wall is oscillated in a direction substantially perpendicular to its wall surface by drive of said shaker to change the volume of said flow passage periodically. Said substrate cleaning apparatus uses said mixture solution as said cleaning liquid.
A chemical supply method of the present invention is a chemical supply method using a chemical supply pump, wherein, in said chemical supply pump, a flow passage for passing a predetermined liquid chemical is formed, a suction valve which is closed by pressure rise of said liquid chemical is provided at a flowing-in port of said flow passage, and a discharge valve which is closed by pressure fall of said liquid chemical is provided at a flowing-out port of said flow passage, at least part of a liquid contact surface in said flow passage is made of a compact member with non-permeability and a high anti-corrosion property to said liquid chemical, and part of said compact member is made into a movable wall, and a shaker connected to said movable wall is provided, and said movable wall is oscillated in a direction substantially perpendicular to its wall surface by drive of said shaker to change the volume of said flow passage periodically, and said chemical supply pump is driven, and said liquid chemical is discharged into a solvent passing through said supply flow passage to compound a mixture solution at a desired concentration.
A substrate cleaning method of the present invention is a substrate cleaning method in which a cleaning liquid is supplied to a set substrate to clean, wherein a chemical supply pump Is used in which a flow passage for passing a predetermined liquid chemical is formed, a suction valve which is closed by pressure rise of said liquid chemical is provided at a flowing-in port of said flow passage, and a discharge valve which is closed by pressure fall of said liquid chemical is provided at a flowing-out port of said flow passage, at least part of a liquid contact surface in said flow passage is made of a compact member with non-permeability and a high anti-corrosion property to said liquid chemical, and part of said compact member is made into a movable wall, and a shaker connected to said movable wall is provided, and said movable wall is oscillated in a direction substantially perpendicular to its wall surface by drive of said shaker to change the volume of said flow passage periodically, and said chemical supply pump is driven, said liquid chemical is discharged into a solvent passing through said supply flow passage, a mixture solution at a desired concentration is compounded, and said mixture solution is used as said cleaning liquid to clean said substrate surface.
A chemical supply system of the present invention is a chemical supply system for supplying a mixture solution in which a liquid chemical is mixed and diluted with a solvent, comprising at least one kind of chemical reservoir easy to move, in which said liquid chemical at a high concentration is stored, a chemical supply means for sucking a predetermined quantity of said liquid chemical from said chemical reservoir and feeding out it, and a piping system forming a flow passage for said solvent connected to said chemical supply means, and having a discharge portion for said solution at an end portion, wherein, at the time of use, a necessary quantity of said liquid chemical is mixed with said solution flowing in said piping system, said mixture solution at a desired concentration is produced, and said mixture solution is supplied from said discharge portion.
According to a chemical supply pump of the present invention, a movable wall is driven and controlled by a shaker to oscillate, and a liquid chemical is discharged by the pressure, and a desired quantity of the liquid chemical can be discharged and supplied with accuracy. Here, used is a compact member, preferably, amorphous carbon, that at least part of the liquid contact surface has non-permeability and a high anti-corrosion property to the liquid chemical. This amorphous carbon is a material easy to control its porosity, and one whose porosity is substantially zero is very superior in non-permeability and the high anti-corrosion property. Accordingly, by providing this amorphous carbon on the important portion of the liquid contact surface, the supply quantity control of the liquid chemical becomes more accurate, and mixing of particles or the like into the liquid chemical is suppressed.
Further in the present invention, provided is a chemical supply apparatus including this chemical supply pump as a component. This chemical supply apparatus mixes a liquid chemical from a tubule member with a solvent whose representative is ultrapure water passing through a supply flow passage by drive of the chemical supply pump, and mixture solutions at various concentrations can easily be compounded at need. Here, in case that the discharge direction of the liquid chemical is a direction substantially perpendicular to the flow direction of the above solvent, by applying a pressure to the liquid chemical such that the linear velocity of the liquid chemical discharged from the tubule member is sufficiently greater than the linear velocity of the solvent passing through the supply flow passage, the liquid chemical reaches the opposite wall surface of the supply flow passage in the solvent, and a mixture solution at a uniform concentration is compounded in a moment.
Further in the present invention, provided is a chemical supply system including this chemical supply apparatus as a component and for supplying the above mixture solution. In this chemical supply system, because it is possible to produce mixture solutions at desired concentrations at need as described above, enough is the easily movable small-sized reservoir for the liquid chemical that is the formulated concentrate. That is, in this chemical supply system, there is no necessity of providing very large reservoirs for mixture solutions different in chemical concentration and kind as conventionally, and not only particle mixing to a cleaning liquid, or the like, can be suppressed, but also remarkable reduction/simplification of the scale of the whole system can be realized. Accordingly, by applying this chemical supply system to, e.g., a substrate cleaning apparatus, it becomes possible rapidly and easily to supply various pure cleaning liquids (mixture solutions) different in concentration and kind.
Accordingly, according to the present invention, remarkable miniaturization/simplification of a cleaning liquid supply system including chemical reservoirs (chemical storage tanks) is intended, it becomes possible easily and rapidly to compound and supply a cleaning liquid at an accurate chemical concentration when it is required in cleaning, and it is realized to suppress particles or the like being generated and mixing in a cleaning liquid, to the extremity.


An RF device includes a signal layer disposed over a ground plane having radio frequency (RF) transmission lines configured and dimensioned to provide impedance matching along the RF lines. A shield is formed as a part of the RF lines and disposed below the RF choke of a DC current supply to form an intermediate capacitance between the choke and the shield to control parasitic effects.

1. Technical Field
Aspects of the present invention relate to optical transceiver modules, and more particularly to a wideband impedance matching circuit design that simultaneously provides a high bandwidth signal path from a laser diode driver to a laser diode and shields against parasitic effects from a DC current supply of the laser diode.
2. Description of the Related Art
Laser diodes operating in high data rate optical transceivers or transmitters need a wideband high-frequency (AC or RF) connection to the laser diode driver circuit which sends the data to be transmitted, and a DC current supply connection to the laser diode for establishing the operating point.
Some optical modules establish the operating point through RF lines, which require higher biasing voltage and produce higher power dissipation.
For the optical modules where DC and RF are connected using different circuits the following considerations may apply. The RF lines demand a careful design over the bandwidth of the signal to be transmitted (here up to 15 GHz for a 10 Gb/s application). The DC connection is less sensitive, but presents additional challenges for the RF design since it must be decoupled for the entire frequency range (e.g., above 10 MHz or in general 1×10−4 of the data rate).
This decoupling is done by so-called RF chokes which are commercially available. RF chokes represent a low impedance path for DC currents but a high impedance path for RF signals. However, parasitic electromagnetic effects (capacitive coupling and inductive voltage drops) associated with the placement and design of RF chokes can disable the decoupling and hence degrade signal transmission to the laser diode.

Impedance matching circuit with simultaneous shielding of parasitic effects for transceiver modules

International Business Machines Corporation


Disclosed is a semiconductor device which comprises a semiconductor element having a plurality of electrodes, a plurality of external electrodes disposed around the periphery of the semiconductor element, a fine wire electrically connected between at least one of surfaces of each of the plural external electrodes and at least one of the plural electrodes of the semiconductor element, and an encapsulating resin which encapsulates the semiconductor element, the plural external electrodes, and the fine wires and whose external shape is a rectangular parallelepiped, wherein a bottom surface of the semiconductor element and a bottom surface of each of the plural external electrode are exposed from a bottom surface of the encapsulating resin and a top surface of the semiconductor element and a top surface of each of the plural external electrode are located substantially coplanar with each other.

The present invention relates generally to a semiconductor device and to a method for the fabrication of such a semiconductor device. The present invention relates more particularly to an extremely thin semiconductor device of high packaging density type which is capable of coping with multipin (high pin count)-ization and to a method for the fabrication of such a low profile semiconductor device.
The recent trend that electronic equipment is toward becoming smaller and smaller in size requires the high packaging density of semiconductor components such as semiconductor devices of resin-encapsulated type, and semiconductor components are now becoming smaller in size and lower in profile. Further, multipin-ization is now advancing even for small size and thin (low profile) semiconductor devices. There have been placed demands for high-density, downsized, and thin semiconductor devices of the resin-encapsulated type.
Referring now to FIG. 15, a lead frame for a conventional semiconductor device will be described below.
FIG. 15 is a plan view showing a conventional lead frame structure. As shown, the conventional lead frame is made up of a frame portion 101, a rectangular die pad portion 102 within the frame portion 101 on which a semiconductor element will be mounted, a suspension lead portion 103 for supporting the die pad portion 102, a beam-like inner lead portion 14 which is electrically connected, when the semiconductor element is mounted on the die pad portion 102, to the mounted semiconductor element by a connection portion such as a metal fine wire, an outer lead portion 105, formed continuously with the inner lead portion 104, for establishing connection with an external terminal, and a tie bar portion 106 which interconnects and fixes together the outer lead portions 105 and which acts as a resin stopper during resin encapsulation.
Although in the lead frame of FIG. 15 only one pattern of the design of FIG. 15 is illustrated, practically a plurality of such patterns are arrayed laterally and vertically in succession.
Referring next to FIG. 16, a conventional semiconductor device will be described. FIG. 16 schematically depicts, in cross section, a semiconductor device of the resin encapsulation type making utilization of the lead frame of FIG. 15.
As shown in FIG. 16, a semiconductor element 107 is mounted on the die pad portion 102 of the lead frame. The semiconductor element 107 and the inner lead portion 104 are electrically connected together by a metal fine wire 108. The outer peripheries of the semiconductor element 107 on the die pad portion 102 and the inner lead portion 104 are encapsulated by an encapsulating resin 109. The outer lead portion 105 is so provided as to project outside a lateral surface of the encapsulating resin 109 with its end portion bent.
In a conventional semiconductor device fabrication method, the semiconductor element 107 is first bonded onto the die pad portion 102 of the lead frame by an adhesive (the die bond step), as shown in FIG. 17. Following the die bond step, the semiconductor element 107 and the tip of the inner lead portion 104 are connected together by the metal fine wire 108 (the wire bonding step). Thereafter, the outer peripheral of the semiconductor element 107 is subjected to encapsulation. In such encapsulation, the region encapsulated by the encapsulating resin 109 is surrounded by the tie bar portion 106 of the lead frame, while the outer lead portion 105 projects outside (the resin encapsulating step). Lastly, the boundary portion of the encapsulating resin 109 is subjected to cutting at the tie bar portion 106, the outer lead portions 105 are separated from each other, the frame portion 101 is removed, and the tip of the outer lead portion 105 is subjected to bending (the tie bar cut/bend step). In the way described above, the resin-encapsulated type semiconductor device of FIG. 16 can be fabricated. A broken line of FIG. 17 indicates the region to be encapsulated by the encapsulating resin 109.
The conventional lead frame configuration, however, suffers some problems when semiconductor elements are highly integralized and multipin-ized. There is the limit of reducing, when forming an inner lead portion (an outer lead portion), its width. Therefore, if the number of inner lead portions (outer lead portions) is increased with a view to coping with multipin-ization, this usually results in increasing the size of the lead frame itself. As a result, the dimensions of the semiconductor device also increase and it is hard to meet the demand for downsized, thin semiconductor devices. On the other hand, if the number of inner lead portions is increased to cope with semiconductor element multipin-ization without making an alteration in lead frame size, this requires that the width of each inner lead portion be reduced. This will produce many problems with processes such as etching used for lead frame formation.
Recently, as a surface-mount type semiconductor device, certain types of semiconductor devices have been developed (for example, Ball Grid Array (BGA)-type semiconductor devices and Land Grid Array (LGA)-type semiconductor devices). In such a type of semiconductor device, a semiconductor element is mounted on a carrier (a wiring board) having on its bottom surface an external electrode, electrical connections are established, and thereafter the top surface of the carrier is subjected to encapsulation. Such a type of semiconductor device is a semiconductor device onto which bottom surface a mother board is mounted. In future, semiconductor devices of the surface-mount type are expected to become a main stream of semiconductor devices. Accordingly, the problem that conventional lead frames and semiconductor devices making use of such conventional lead frames are unable to keep up with the trend toward the surface-mount type, is becoming serious.
In recent years, technologies for small size/thin packages have been proposed which use no die pad for element mounting. In such technologies, a semiconductor chip is reduced in thickness, electrodes are disposed around the chip, and the outer periphery is single-side encapsulated by encapsulating resin. However, such a single-side encapsulated package has the problem that electrodes are not efficiently exposed from the bottom surface of the encapsulating resin. Moreover, since the thickness is reduced, this produces another problem that stress, caused by encapsulating resin present between electrodes, is applied to these electrodes.
It is therefore an object of the present invention to provide an extremely thin semiconductor device capable of coping with multipin-ization.
The present invention provides a semiconductor device comprising:
a semiconductor element having a plurality of electrodes;
a plurality of external electrodes disposed around the periphery of the semiconductor element;
a fine wire electrically connected between at least one of surfaces of the plural external electrodes and at least one of the plural electrodes of the semiconductor element; and
an encapsulating resin which encapsulates the semiconductor element, the plural external electrodes, and the fine wires and whose external shape is a rectangular parallelepiped;
wherein a bottom surface of the semiconductor element and a bottom surface of each of the plural external electrodes are exposed from a bottom surface of the encapsulating resin; and
wherein a top surface of the semiconductor element and a top surface of each of the plural external electrodes are located substantially coplanar with each other.
It is preferable that depressed portions are formed in bottom surface areas of the semiconductor device defined between external electrodes of the plural external electrodes and between the semiconductor element and an external electrode of the plural external electrode, wherein the depressed portions are recessed inside the encapsulating resin.
It is preferable that the plural external electrodes are disposed, in double or more arrangement and in parallel with each other, around the outer periphery of the semiconductor element.
It is preferable that the semiconductor element and each of the plural external electrodes are substantially identical in thickness with each other.
It is preferable that the encapsulating resin is a permeable resin.
It is preferable that the fine wire is a metal fine wire which is surface insulated.
It is preferable that the total thickness of the semiconductor device is not more than 150 xcexcm.
The present invention provides a method for the fabrication of a semiconductor device comprising the steps of:
(a) preparing a frame member;
the frame member including:
a plate-like frame major portion having a top surface and a bottom surface;
a plurality of electrode constituent portions which are projections formed on the top surface of the frame major portion; and
an element housing portion located in a top surface area of the frame major portion surrounded by the plural electrode constituent portions, the element housing portion housing therein a semiconductor element to be fixed thereto;
(b) fixing to the element housing portion of the frame member the semiconductor element having a plurality of electrodes;
(c) after the step (b), electrically connecting by a fine wire between at least one of the plural electrodes of the semiconductor element and at least one of top surfaces of the plural electrode constituent portions;
(d) encapsulating, by a resin, a surface of the frame member on the side where the semiconductor element has been fixed to the element housing portion and has been electrically connected by the fine wire; and
(e) after the step (d), grinding the frame major portion of the frame member such that the plural electrode constituent portions are separated from each other to become individual external electrodes, and exposing both a bottom surface of each of the plural external electrodes and a bottom surface of the semiconductor element from the resin.
It is preferable that the frame major portion of the frame member prepared in the step (a) is made of a metal plate or a conductive plate.
It is preferable that the frame member prepared in the step (a) has the plural electrode constituent portions each of which projects for substantially the same amount as the thickness of the semiconductor element to be fixed to the element housing portion.
It is preferable that the step (e) is carried out such that depressed portions recessed inside the resin are formed in surface areas of the resin, wherein the resin surface areas are defined between external electrodes of the plural external electrodes and between the semiconductor element and an external electrode of the plural external electrodes, and wherein the bottom surface of each of the plural external electrodes and the bottom surface of the semiconductor element are exposed from the resin.
It is preferable that the step (e) is carried out using a grinding member.
It is preferable that (i) the frame member prepared in the step (a) includes a plurality of the element housing portions, (ii) the step (b) is a step of fixing a plurality of the semiconductor elements to the plural element housing portions, respectively, and (iii) the method further comprises after the step (e) a step of subjecting the plural semiconductor elements to characteristic testing and, after the characteristic testing, a step of dividing the plural semiconductor elements into individual semiconductor device pieces, respectively.
The present invention provides a semiconductor device comprising:
a semiconductor element having a plurality of electrodes;
a plurality of external electrodes disposed around the periphery of the semiconductor element, each of the plural external electrodes having at its top surface a projecting stepped portion and a projected portion;
a fine wire electrically connected between a surface of at least one of the projecting stepped portions of the plural external electrodes and at least one of the plural electrodes of the semiconductor element; and
an encapsulating resin which encapsulates the semiconductor element, the plural external electrodes, and the fine wire and whose external shape is a rectangular parallelepiped;
wherein both a bottom surface of the semiconductor element and a bottom surface of each of the plural external electrodes are exposed from a bottom surface of the encapsulating resin;
wherein a top surface of the semiconductor element and a top surface of each of the projecting stepped portions of the plural external electrodes are located substantially coplanar with each other; and
wherein each of the projected portions of the plural external electrodes is exposed from a top surface of the encapsulating resin.
It is preferable that depressed portions are formed in bottom surface areas of the semiconductor device defined between external electrodes of the plural external electrodes and between the semiconductor element and an external electrode of the plural external electrode, wherein the depressed portions are recessed inside the encapsulating resin.
The present invention provides a method for the fabrication of a semiconductor device comprising the steps of:
(a) preparing a frame member;
the frame member including:
a plate-like frame major portion having a top surface and a bottom surface;
a plurality of electrode constituent portions which are projections formed on the top surface of the frame major portion, each of the plural electrode constituent portions having at its top surface a projecting stepped portion and a projected portion; and
an element housing portion located in a top surface area of the frame major portion surrounded by the plural electrode constituent portions, the element housing portion housing therein a semiconductor element to be fixed thereto;
(b) fixing to the element housing portion of the frame member the semiconductor element having a plurality of electrodes;
(c) after the step (b), electrically connecting by a fine wire between at least one of the plural electrodes of the semiconductor element and a top surface of at least one of the projecting stepped portions of the plural electrode constituent portions,;
(d) encapsulating, by a resin, a surface of the frame member on the side where the semiconductor element has been fixed to the element housing portion and has been electrically connected by the fine wire;
(e) after the step (d), grinding the frame major portion of the frame member such that the plural electrode constituent portions are separated from each other to become individual external electrodes, and exposing both a bottom surface of each of the plural external electrodes and a bottom surface of the semiconductor element from the resin; and
(f) after the step (d), grinding a top surface of the resin on the side where the semiconductor element has been fixed to the element housing portion and has been electrically connected by the fine wire such that top surfaces of the projected portions are exposed from the resin top surface.
The present invention provides a semiconductor device comprising:
a semiconductor element having a plurality of electrodes;
a plurality of external electrodes disposed around the periphery of the semiconductor element, each of the plural external electrodes having at its top surface a projecting stepped portion and a projected portion and in its bottom surface a recessed portion;
a fine wire electrically connected between a surface of at least one of the projecting stepped portions of the plural external electrodes and at least one of the plural electrodes of the semiconductor element; and
an encapsulating resin which encapsulates the semiconductor element, the plural external electrodes, and the fine wire and whose external shape is a rectangular parallelepiped;
wherein both a bottom surface of the semiconductor element and a bottom surface of each of the plural external electrodes are exposed from a bottom surface of the encapsulating resin;
wherein a top surface of the semiconductor element and a top surface of each of the projecting stepped portions of the plural external electrodes are located substantially coplanar with each other; and
wherein each of the projected portions of the plural external electrodes is exposed from a top surface of the encapsulating resin.
It is preferable that depressed portions are formed in bottom surface areas of the semiconductor device defined between external electrodes of the plural external electrodes and between the semiconductor element and an external electrode of the plural external electrode, wherein the depressed portions are recessed inside the encapsulating resin.
The present invention provides a method for the fabrication of a semiconductor device comprising the steps of:
(a) preparing a frame member;
the frame member including:
a plate-like frame major portion having a top surface and a bottom surface;
a plurality of electrode constituent portions which are projections formed on the top surface of the frame major portion, each of the plural electrode constituent portions having at its top surface a projecting stepped portion and a projected portion and in its bottom surface a recessed portion;
an element housing portion located in a top surface area of the frame major portion surrounded by the plural electrode constituent portions, the element housing portion housing therein a semiconductor element to be fixed thereto;
(b) fixing the semiconductor element having a plurality of electrodes to the element housing portion of the frame member;
(c) after the step (b), electrically connecting by a fine wire between at least one of the plural electrodes of the semiconductor element and a top surface of at least one of the projecting stepped portions of the plural electrode constituent portions;
(d) encapsulating, by a resin, a surface of the frame member on the side where the semiconductor element has been fixed to the element housing portion and has been electrically connected by the fine wire such that at least a top surface of each of the projected portions of the plural electrode constituent portions projects; and
(e) after the step (d), grinding the frame major portion of the frame member such that the plural electrode constituent portions are separated from each other to become individual external electrodes each having at its bottom surface the recessed portion, and exposing both a bottom surface of each of the plural external electrodes and a bottom surface of the semiconductor element from the resin.
It is preferable that (i) the frame member prepared in the step (a) includes a plurality of the element housing portions, (ii) the step (b) is a step of fixing a plurality of the semiconductor elements to the plural element housing portions, respectively, and (iii) the method further comprises after the step (e) a step of forming a stacked structure by fitting the recessed portion in the bottom surface of the external electrode into a projected portion of a different semiconductor device, wherein the projected portion is formed on an external electrode of the different semiconductor device so as to correspond to the recessed portion and, after the stacked structure formation step, a step of dividing the plural semiconductor elements in a stacked structure state into individual lamination type semiconductor devices, respectively.

Semiconductor device and method for the fabrication thereof

Matsushita Electric Industrial Co., Ltd.


A semiconductor memory device having first and second memory architectures with different structures and allowing the possibility of selecting any one of the first and second memory architectures using a selection process and a memory system using the semiconductor memory device are provided. The first memory architecture has p banks, a page size of m/2 bytes of m/2 memory cells connected to one word line in each of the banks, and n/2 data terminals DQ. The second memory architecture has p banks, a page size of m bytes, and n data terminals. The option process may be realized by a bonding, a mask pattern, or a fuse. In a memory device, the page size and the number of memory banks are adjusted by a design option. Thus, the memory architecture is modified, redundancy flexibility is increased and power consumption is reduced.

1. Field of the Invention
The present invention relates to a memory device, and more particularly, to a memory device, the architecture of which is easily modified, having high redundancy flexibility, and low power consumption.
2. Description of the Related Art
Today""s multimedia development often requires having several specific applications simultaneously. For this and other reasons, the speed of operation of the CPU of high-performance computer systems has constantly increased, and also for this reason SDRAMs having a high bandwidth and a multi-bank structure have been developed.
Most SDRAMs currently used have a maximum frequency of about 133 MHz, which is considerably low compared to the CPU operation speed. Also, since a memory cell of a SDRAM is composed of one transistor and one capacitor like a memory cell of a DRAM, there is a certain limitation in reducing the time required for writing and reading data. The SDRAM generally has an internal four-bank structure, but the bandwidth of the SDRAM is not large enough to process the CPU-required data. Thus, a bottleneck phenomenon occurs in many computer systems.
In order to avoid this and further prevent the performance of computer systems from being degraded, the SDRAM bandwidth is generally increased by a prefetch method. In the prefetch method, (nxc3x97m) data obtained by multiplying n external DQ pads by m data in a memory cell array block is read all at once in a reading operation of the SDRAM. Next, m data are sequentially output in each of the n external DQ pads in a pipeline type operation by synchronizing the (nxc3x97m) data with an external clock signal. Also, data is received m times from each of the n external DQ pads in the writing operation of the SDRAM and written in a memory cell array all at once.
However, by increasing the bandwidth using the prefetch method, the column redundancy flexibility is reduced. This is because in column redundancy, if a memory cell selected from one memory bank is defective, bit lines of this defective memory cell are replaced with bit lines of a redundant memory cell. However, if the number of memory cells selected at a time increases to m, it is insufficient to merely replace the defective memory cells with limited redundant memory cells.
A way of overcoming reducing the column redundancy flexibility is by increasing a page size. The page size represents the number of memory cells activated by a one-time row access. In other words, the page size represents the number of sense amplifiers operated by one word line. The memory cells operated by one word line are set to be activated in two memory banks, and thus the column redundancy flexibility in each of the memory banks is not changed. However, this method of increasing the page size consumes a large amount of power since sense amplifiers in two memory banks operate.
Accordingly, a memory device capable of increasing redundancy flexibility and reducing power consumption is required.
To solve the above-described problems, it is a first object of the present invention to provide a memory device capable of maintaining uniform redundancy flexibility and reducing power consumption.
It is a second object of the present invention to provide a memory system having a memory module with the memory device.
In accordance with the invention, there is provided a semiconductor memory device including first and second memory architectures. The first memory architecture has p banks, a page size of m/2 bytes of m/2 memory cells connected to one word line in each of the banks, and n/2 data terminals DQ. The second memory architecture has p banks, a page size of m bytes, and n data terminals.
In one embodiment, one of the first memory architecture and the second memory architecture is selected using an option process.
A semiconductor memory device according to another embodiment includes first and second memory architectures. The first memory architecture has p banks, a page size of m/2 bytes of m/2 memory cells connected to one word line in each of the memory banks, and n/2 data terminals DQ. The second memory architecture has p/2 banks, a page size of m bytes, and n data terminals.
If the first memory architecture includes p/2 memory banks, the second memory architecture includes p memory banks.
Preferably, the option process is realized by a bonding, a mask pattern, or a fuse.
In accordance with another aspect of the invention, there is provided a memory system. The memory system includes a memory controller, a first memory module, and a second memory module. The first memory module is connected to the memory controller via data bus lines and includes i memory devices. The second memory module is connected to the memory controller via the data bus lines and includes i/2 memory devices. Each of the memory devices of each of the first and second memory modules includes first and second memory architectures. The first memory architecture is selected by the memory devices of the first memory module, and the second memory architecture is selected by the memory devices of the second memory module. The first memory architecture has p memory banks, a page size of m/2 bytes of m/2 memory cells connected to one word line in each of the memory banks, and n/2 data terminals DQ. The second memory architecture has p or p/2 memory banks, a page size of m bytes, and n data terminals DQ.
Preferably, the option process is realized by a bonding, a mask pattern, or a fuse.
The page size and the number of memory banks are adjusted by a design option. Thus, redundancy flexibility can increased and power consumption can reduced.

Semiconductor memory device having first and second memory architecture and memory system using the same


The present invention is based on a series of acrylic cross-linking agents containing two or more dehydroalanine moieties (H2Cxe2x95x90C(NHCORxe2x80x2)COOR) per monomer. Monomers of the general structure H2Cxe2x95x90C(NHCOCH3)COO(CH2)iOO(CH3CONH) Cxe2x95x90CH2 with i=4, 5, and 8 can be polymerized or copolymerized under UV-curing conditions or by simple heating above melting point, leading to cross-linked polymeric materials. When polymerized on metallic surfaces, exceptional adhesion is obtained with no need for additional adhesion enhancers.

This invention relates to the field of polymer coatings and, in particular, to acrylic cross-linking agents.
Polymer coatings are used commercially in a variety of applications. These include cross-linked resins for electronic and imaging industries, dental materials and other biomaterials, and hot melt adhesives. Additionally, polymeric layers are used for sensors containing a metallic interface such as quartz crystal microbalance (QCM). Polymer coatings are thus used on a wide range of substrates (metals, plastics, wood, body parts, etc.).
Polymer coatings on these various substrates are generally obtained by curing formulations containing polymerizable monomers. Many different technologies well known in the art can be used to cure the formulation, such as UV light, electron beam, radiation, or thermal curing. When free radicals are generated in the process, acrylic monomers are preferably used and account for the vast majority of commercial applications currently in use.
Use of acrylic monomers poses several well-known problems, including poor adhesion on metallic surface (in particular noble metals) and possible health/ environmental damage caused by the unreacted monomer. The problem of poor adhesion to metallic surfaces has a long history in polymer science and engineering and is considered one of the key issues in polymer curing on metallic surfaces. The physics of the phenomenon may be complex in its details, but the rationale for the poor adhesion is well known and understood: the polymer film shrinks during the curing while the underlying metallic substrate does not. This generates a large amount of stress at the interface. The problem is particularly difficult to solve for surfaces made of noble metals due to lack of chemical interactions at the interface between the metal and polymer coating. Most strategies to overcome the problem rely on well-known modifications of the metallic surface, such as metal surface oxidation or deposition of so-called xe2x80x9cprimersxe2x80x9d.
Therefore, what is needed is a polymer coating that allows for superior adhesion to metallic surfaces, particularly to the noble metals. Also, a coating is needed that is less harmful to the environment and is less toxic than coatings made from traditional acrylic monomers.
The present invention is a polymer coating with superior adhesion properties. The invention is based on the development of a new series of acrylic cross-linking agents containing two or more dehydroalanine moieties (H2Cxe2x95x90C(NHCORxe2x80x2)COOR) per monomer instead of the traditional acrylic (H2Cxe2x95x90CHCOOR) or methacrylic (H2Cxe2x95x90C(CH3)COOR) moieties. These vinyl monomers are not found in the prior art with the exception of a urea-containing system disclosed in U.S. Pat. Nos. 4,906,767 and 4,985,522 issued to Mathias et al, which discloses similar units, but does not disclose the structure of the present invention. Based on the properties disclosed in the prior art, it is doubtful those structures could be used as polymer coatings with suitable adhesion properties.
Monomers of the general structure H2Cxe2x95x90C(NHCOCH3)COO(CH2)iOO(CH3 CONH)Cxe2x95x90CH2 with i=4, 5, or 8 can be polymerized or copolymerized under UV-curing conditions or by simple heating above melting point, leading to cross-linked polymeric materials. Spontaneous and rapid thermal polymerization points to a new family of hot melt adhesives with tunable reactivities and high shelf-life stabilities below their melting point. When polymerized on metallic surfaces, exceptional adhesion is obtained with no need for additional adhesion enhancers.
Therefore, it is an aspect of this invention to provide a new series of acrylic cross-linking agents for use in forming polymer coatings.
It is another aspect of the invention to use novel acrylic monomers to allow superior adhesion to metallic surfaces.
It is a further aspect of this invention to provide a polymer coating with exceptional adhesion properties without the use of additional adhesion enhancers.
It is a further aspect of the invention to provide a polymer coating that may be less toxic than coatings formed from traditional acrylic monomers.
It is a further aspect of the invention to provide a coating formed by spontaneous and rapid thermal polymerization.
These aspects of the invention are not mean to be exclusive and other features, aspects, and advantages of the present invention will be readily apparent to those of ordinary skill in the art when read in conjunction with the appended claims.
The present invention is the result of experimenting with on-chip polymerization of molecular imprinting agents to provide MIP-functionalized QCM probes. Several approaches were explored for the synthesis of heavily cross-linked acrylic networks on the gold-made surface of a QCM probe.
The on-chip cross-linked coatings synthesized and studied for this invention were all obtained by fast UV-photopolymerization of a thin liquid film containing a commercial bis- or trisacrylate (tripropyleneglycol diacrylate (TPGDA) or trimethylopropane triacrylate (TMPTA)), a reactive diluent (benzyl methacrylate), a photoinitiator (2-benzyl-2-dimethylamino-4xe2x80x2-morpholino-butyrophenone (Irgacure 369), azo-bis(isobutyronitrile (AIBN) or tetraethylthiuram disulfide (TETD)) and various additives aimed at improving the adhesion of the final cross-linked polymer on the gold surface. The initial thin liquid film was obtained by spin coating a few microliters of a solution containing the reagents diluted in tetrahydrofuran (THF) or dichloromethane. The film had previously been deposited on the gold surface of the chip. The light source used in these experiments has a very high intensity allowing most of the photopolymerization to occur in less than 20 seconds. The exact amounts of each monomer/reagent and detailed experimental conditions are provided below.
Preliminary experiments with xe2x80x98simplexe2x80x99 acrylic networks obtained by photoirradiation of TPGDA and benzyl methacrylate indicated a limited adhesion of the film on the metallic surface: the film peeled off after immersion in either dichloromethane or acetonitrile. This behavior was both expected and surprising. It was surprising because claims made in the recent literature imply that conditions can be found to obtain good adhesion of acrylic or styrenic polymers on a gold surface. It was expected as this problem has a long history in polymer science and engineering and is still considered today as one of the key problem in UV-curing on metallic surfaces (UV-cured paintings or plastic coatings on cars are traditional examples). The physics of the phenomenon is complex in its details, but the rationale for the poor adhesion is well known and understood: the polymer film shrinks during the curing while the underlying metallic substrate does not, generating a very large amount of stress at the interface.
Strategies that were successively considered to solve this problem include:
1. use of acrylic acid as a co-monomer,
2. use of itaconic acid as a co-monomer,
3. modification of the gold surface with a thiol-capped acrylic monomer able to self-assemble on the surface,
4. use of tetraethylthiuram disulfide as a photoinitiator or chain-transfer agent,
5. use of triacrylate (TMPTA) as the multifunctional monomer,
6. use of bis(dehydroalanine) (DBHA) as the multifunctional monomer.
The rationale for the above curing conditions is as follows:
(1 and 2). Introduce carboxylic acid for improved adhesion with the gold surface. This strategy has been recently used in a MIP experiment (Haupt, K.; Noworyta, K.; Kuter, W. Anal Commun., 1999, 36, 391-393).
(3 and 4). Introduction of sulfur-containing groups for improved adhesion with the gold surface.
(5). Different stress buildup in the film.
(6). Monomer was available and had been shown to improve adhesion on several substrates.
None of the coatings obtained using strategies 1-5 showed adequate adhesion, although not enough conditions have been investigated experimentally to disprove the possibility that under slightly different conditions they might work. The use of the monomer shown in FIG. 1 solved the adhesion problem, however, and no further experiments to test the other strategies have been tested.
Experiments have demonstrated that monomers of the general structure H2Cxe2x95x90C(NHCOCH3)COO(CH2)iOO(CH3 CONH) Cxe2x95x90CH2 with i=4, 5, or 8 can be polymerized or copolymerized under UV-curing conditions or by simple heating above melting point, leading to cross-linked polymeric materials. When (co)polymerized on the surface of gold, exceptional adhesion is obtained with no need for additional adhesion enhancers. Following is a general synthetic procedure used to obtain these monomers.
General synthetic procedure for xcex1,xcfx89-alkanediol bis(xcex1-acetamido acrylate)s: A mixture of xcex1-acetamidoacrylic acid (0,016 mol, 2.064 g), xcex1,xcfx89-alkanedibromide(0.06 mol), K2CO3 (1.8 g) and DMSO (20 mL was stirred at room temperature for four days. 30 mL of doionized water was introduced and the resulting mixture was extracted with chloroform (30 mLxc3x972). The chloroform phases were collected and washed with water (15 mLxc3x973). The chloroform phase was dried over magnesium sulfate. Chloroform was evaporated by rotavapor and a solid was obtained. The remaining solvent was further removed under vacuum at room temperature to give a white solid product.

Polymer coatings with improved adhesion properties on metallic surfaces


A system and method for autonomous data path verification in a multi-module shelf configuration, such as in a digital cross-connect system, are disclosed. The system generally includes a source port module, a destination module, and optional n-stage network of mapping interface modules. The source port module is configured to reuse transport overhead bytes of received SONET or SDH signals by inserting data path verification data therefor. The destination module is configured to perform autonomous data path verification between the source port module and the destination module by examining the reused transport overhead bytes of the signals received from the source port module. The method generally includes reusing transport overhead bytes by inserting data path verification data into the overhead bytes of signals received by a first module, e.g., a source port module, and transmitting the signals with the data path verification data toward a second module, e.g., a destination port module. The second module emits a confirmed or unconfirmed pattern upon detecting presence or absence of an expected pattern in the reused transport overhead bytes, respectively, and reports changes in the received pattern to facilitate autonomous data path verification.

1. Field of the Invention
The present invention relates generally to high speed digital telecommunication systems. More specifically, a system and method for autonomous data path verification in a multi-module shelf configuration, such as in a digital cross-connect system, are disclosed.
2. Description of Related Art
Diagnosing and verifying data path connectivity in network transport and switching systems that involve multiple modules in the data path is increasingly more difficult and expensive due in part to their increasing complexity and flexibility. Conventional diagnostic and verification methods involve generating a signal and measuring its existence on every module independently. The reliance on every module to monitor its output greatly burdens each module and significantly restricts the traffic processing density of every module and thus the system. In addition, providing signal generation and detection circuitry on every data path on every module also increases costs significantly.
Thus, what is needed is a system and method to efficiently and effectively diagnose and verify data path connectivity in network transport and switching systems. Ideally, the system and method can provide always-on module diagnostics.

Autonomous data path verification in multi-module shelf configuration


A method in a first network node (105) for estimating a first timing offset difference between a first timing offset of a first base station and a second timing offset of a second base station, is provided. The first network node (105) receives Uplink Time Difference Of Arrival, UTDOA, measurements. The UTDOA measurements relate to a first UTDOA time difference. The first network node (105) further receives Observed Time Difference Of Arrival, OTDOA, measurements. The OTDOA measurements relate to a first measured OTDOA time difference. The first network node estimates a first timing offset difference between a first timing offset of the first base station and a second timing offset of the second base station based on the first UTDOA time difference and the first measured OTDOA time difference.

In a typical cellular network, also referred to as a wireless communication system, User Equipments (UEs), communicate via a Radio Access Network (RAN) to one or more core networks (CNs).
A user equipment is a mobile terminal by which a subscriber can access services offered by an operator's core network. The user equipments may be for example communication devices such as mobile telephones, cellular telephones, or laptops with wireless capability. The user equipments may be portable, pocket-storable, hand-held, computer-comprised, or vehicle-mounted mobile devices, enabled to communicate voice and/or data, via the radio access network, with another entity, such as another mobile station or a server.
User equipments are enabled to communicate wirelessly in the cellular network. The communication may be performed e.g. between two user equipments, between a user equipment and a regular telephone and/or between the user equipment and a server via the radio access network and possibly one or more core networks, comprised within the cellular network.
The cellular network covers a geographical area which is divided into cell areas. Each cell area is served by a base station, e.g. a Radio Base Station (RBS), which sometimes may be referred to as e.g. "eNB", "eNodeB", "NodeB", "B node", or BTS (Base Transceiver Station), depending on the technology and terminology used. The base stations may be of different classes such as e.g. macro eNodeB, home eNodeB or pico base station, based on transmission power and thereby also on cell size.
A cell is the geographical area where radio coverage is provided by the base station at a base station site. One base station, situated on the base station site, may serve one or several cells. Further, each base station may support one or several communication technologies. The base stations communicate over the air interface operating on radio frequencies with the user equipments within range of the base stations.
In some radio access networks, several base stations may be connected, e.g. by landlines or microwave, to a radio network controller, e.g. a Radio Network Controller (RNC) in Universal Mobile Telecommunications System (UMTS), and/or to each other. The radio network controller, also sometimes termed a Base Station Controller (BSC) e.g. in GSM, may supervise and coordinate various activities of the plural base stations connected thereto. GSM is an abbreviation for Global System for Mobile Communications (originally: Groupe Spècial Mobile).
In 3rd Generation Partnership Project (3GPP) Long Term Evolution (LTE), base stations, which may be referred to as eNodeBs or eNBs, may be directly connected to one or more core networks.
UMTS is a third generation, 3G, mobile communication system, which evolved from the second generation, 2G, mobile communication system GSM, and is intended to provide improved mobile communication services based on Wideband Code Division Multiple Access (WCDMA) access technology. UMTS Terrestrial Radio Access Network (UTRAN) is essentially a radio access network using wideband code division multiple access for user equipments. The 3GPP has undertaken to evolve further the UTRAN and GSM based radio access network technologies.
According to 3GPP/GERAN, a user equipment has a multi-slot class, which determines the maximum transfer rate in the uplink and downlink direction. GERAN is an abbreviation for GSM EDGE Radio Access Network. EDGE is further an abbreviation for Enhanced Data rates for GSM Evolution.
In the context of this disclosure, a base station as described above will be referred to as a base station or a Radio Base Station (RBS). A user equipment as described above, will in this disclosure be referred to as a user equipment or a UE.
The expression DownLink (DL) will be used for the transmission path from the base station to the user equipment. The expression UpLink (UL) will be used for the transmission path in the opposite direction i.e. from the user equipment to the base station.
The base stations in the cellular network are generally not time synchronized. This results in a timing offset difference between the base stations, which may also be referred to as a "timing relation" between the base stations.
Accurate timing relation information of base stations may be necessary for several purposes, for example for positioning of a user equipment.
Positioning of a user equipment in the cellular network may be based on measurements of the time of flight, i.e. of the time it takes for a radio signal to move between the user equipment and several respective base stations in its vicinity, or measurements of the differences between the times of flight between the user equipment and the respective base stations, e.g. measurements of the so called Time Difference Of Arrival (TDOA).
The time of flight of radio signals may be converted to an absolute distance by multiplying with the speed of light. If the times of flight between the user equipment and at least three base stations with known positions, or the differences of the respective times of flight, are measured, the user equipment's position may be estimated by so called trilateration, or multilateration, techniques. This will be described further down in this document.
Positioning methods using this principle include Enhanced Observed Time Difference (E-OTD), Uplink Time Difference of Arrival (UTDOA) and Observed Time Difference of Arrival (OTDOA). These methods are very similar in terms of their requirements on timing accuracy, and E-OTD is actually the 2G version OTDOA. All the above positioning methods have strict requirements on base station clock accuracy, and the timing offset differences of the involved base stations are parameters to be used during position calculation.
A problem is that such timing relation information may be either hard to obtain or may not be provided with good reliability due to implementation reasons.
One way to estimate the timing offset of a base station, is to compare the base station clock to a synchronization pulse from a Global Navigation System Satellite (GNSS), which may be received by a so called GNSS receiver.
A problem is that it is hard for the base station to achieve a timing accuracy better than about 100 ns. Even with a GNSS receiver, the 1 pps (pulse per second) signal from GNSS has limited accuracy, e.g. 100 ns, and is subject to some other factors such as the physical distance between the GNSS receiver and the base station.
For positioning purposes, the synchronization may need to be done to a level of accuracy of the order of tens of nanoseconds, as 10 nanoseconds uncertainty contributes 3 meters error in the position estimate.
Moreover, even after synchronization of base stations, drift and jitter in the synchronization timing must also be well-controlled as these also contribute to uncertainty in the position estimate.
Information about timing relations between base stations in the cellular network, i. e. the timing offset differences between the base stations, may also be required for other purposes than for positioning of user equipments. For example in LTE-TDD, Multicast Broadcast Single Frequency Network (MBSFN), Coordinated MultiPoint (CoMP), and enhanced Inter Cell Interference Cancellation (ICIC) in 3GPP specifications.
A problem is that sometimes the solution may be costly and subject to environment change. For example, a GNSS receiver may be required, and this normally may not function properly indoors.

Methods and arrangements for estimating timing offset differences in a cellular network