A surface acoustic wave filter device includes a piezoelectric substrate, and first and second surface acoustic wave filter elements disposed on the piezoelectric substrate. Each of the surface acoustic wave filters has a plurality of IDTs disposed along the surface acoustic wave propagation direction. The first and second surface acoustic wave filter elements are arranged such that they are substantially equal in transmission amplitude characteristic within a band but different in transmission phase characteristic by about 180xc2x0. One end of each of the first and second surface acoustic wave filter elements define an unbalanced terminal, and the other end of each of the first and second surface acoustic wave filter elements define a balanced terminal.

1. Field of the Invention
The present invention relates to a surface acoustic wave filter, and more particularly, to a surface acoustic wave filter having an impedance that is different between the input and output sides and which has an unbalance-to-balance conversion capability.
2. Description of the Related Art
In recent years, the size and the weight of portable telephones are becoming increasingly smaller. To this end, in addition to the reduction in the number of component parts and the reduction in the size thereof, development of components having a plurality of functions is being pursued.
In view of the above situation, research is being pursued to produce a surface acoustic wave filter having a balance-unbalance conversion capability called balun capability for use in the RF stage of portable telephones, and some surface acoustic wave filters are used mainly in GSM.
In portable telephones, a portion extending from an antenna to a bandpass filter is generally arranged in an unbalanced fashion and has a characteristic impedance of 50 xcexa9. On the other hand, amplifiers or other components following the filter are generally arranged in a balanced manner and have an impedance of 150 xcexa9 to 200 xcexa9. In view of the above, it has been proposed to form a bandpass filter using a surface acoustic wave filter having a capability of converting 50 xcexa9 unbalanced impedance to 150-200 xcexa9 balanced impedance.
In a technique disclosed in Japanese Unexamined Patent Application Publication No. 10-117123, four surface acoustic wave filter elements are used to realize conversion from an unbalanced input to a balanced output. FIG. 28 shows the structure of the surface acoustic wave filter device disclosed in Japanese Unexamined Patent Application Publication No. 10-117123 cited above. In this surface acoustic wave filter device, a first surface acoustic wave filter unit 203 is constructed by cascading two surface acoustic wave filter elements 201 and 202, and a second surface acoustic wave filter unit 206 is defined by cascading a surface acoustic wave filter element 204 and a surface acoustic wave filter element 205 having a transmission phase characteristic that is different by about 180xc2x0 from that of the surface acoustic wave filter element 204. The input/output terminals of the respective surface acoustic wave filter units 203 and 206 are connected in parallel or in series so that the parallel-connected terminals define unbalanced terminals and the series-connected terminals define balanced terminals.
FIG. 29 illustrates a surface acoustic wave filter device 211 having three IDTs, disclosed in Japanese Unexamined Patent Application Publication No. 6-204781. In this surface acoustic wave filter device 211, two output-side IDTs 212 and 213 are disposed on respective opposite sides such that phases become opposite to each other, and the output terminals of the respective IDTs 212 and 213 define balanced terminals. One end of an input-side IDT 214 disposed at a central location defines an unbalanced terminal. In this structure, the input impedance may be set to 50 xcexa9, and the output impedance may be set to 150-200 xcexa9.
In the surface acoustic wave filters having the balance-unbalance conversion capability, expansion of the passband is desired to meet the requirement of expansion of passbands in portable telephone systems. In surface acoustic wave filters having the balance-unbalance conversion capability, it is required that the transmission characteristics from the unbalanced terminal to the balanced terminals should be equal in amplitude but different by 180xc2x0 in phase, over the passband. That is, an improvement in the degree of balance is desired.
However, in the surface acoustic wave filter device disclosed in Japanese Unexamined Patent Application Publication No. 10-117123, the expansion of the passband causes the impedance of the surface acoustic wave filter elements to become capacitive. This resultant capacitance and the parasitic capacitance present between the two cascaded stages cause an impedance mismatch between surface acoustic wave filter units. This makes it difficult to achieve expansion of the passband.
Furthermore, because as many as four surface acoustic wave filter elements are used, complicated interconnections are required, and the complicated interconnections result in an increase in parasitic capacitance which in turn results in degradation in the degree of balance. Furthermore, the use of the large number of surface acoustic wave filter elements results in an increase in size which makes it difficult to obtain a small device size. Furthermore, the use of the large number of surface acoustic wave filter elements results in a reduction in the number of surface acoustic wave filter devices obtained from each wafer, and thus results in an increase in cost.
On the other hand, in the surface acoustic wave filter device disclosed Japanese Unexamined Patent Application Publication No. 6-204781, the two IDTs 212 and 213 have different structures so as to achieve the balanced terminals, and the locations of the IDTs 116 and 117 with respect to the location of the central IDT 214 are different from each other. Such differences in structure or location often cause degradation in the degree of balance. Furthermore, the series connection of the IDTs 212 and 213 on the balanced terminal side results in an increase in loss due to the resistance of the electrode fingers, which results in an increase in insertion loss in the passband.
In order to overcome the problems described above, preferred embodiments of the present invention provide a surface acoustic wave filter device which has unbalanced/balanced input/output terminals and which has a wide passband and a high degree of balance.
In the surface acoustic wave filter device according to a first preferred embodiment, the second and third surface acoustic wave filter elements are arranged such that they are substantially equal in transmission amplitude characteristic within the band but different in transmission phase characteristic by about 180xc2x0, and at least one IDT of the second surface acoustic wave filter element and at least one IDT of the third surface acoustic wave filter element are connected to at least one IDT of the first surface acoustic wave filter element. Thus, the surface acoustic wave filter device can achieve the balance-unbalance conversion capability by using the electrode connected to the first surface acoustic wave filter element as an unbalanced terminal and using the terminals connected to respective second and third surface acoustic wave filter elements as balanced terminals. In this surface acoustic wave filter device according to the first preferred embodiment of the present invention, unlike the conventional surface acoustic wave filter device in which four surface acoustic wave filter elements are used, the balance-unbalance conversion capability is achieved using only three surface acoustic wave filter elements. As a result, reductions in the size and the cost of the surface acoustic wave filter device having the balance-unbalance conversion capability are achieved.
Furthermore, the reduction in the number of surface acoustic wave filter elements results in a reduction in parasitic capacitance, which suppresses degradation in the degree of balance and which makes is easy to expand the passband.
In the surface acoustic wave filter device according to a second preferred embodiment of the present invention, the second and third surface acoustic wave filter elements are arranged such that they are substantially equal in transmission amplitude characteristic within a band but different in transmission phase characteristic by about 180xc2x0, a second IDT of the first surface acoustic wave filter element is connected to the second surface acoustic wave filter element, and a third IDT of the first surface acoustic wave filter element is connected to an IDT of the third surface acoustic wave filter element. Thus, the surface acoustic wave filter device can achieve the balance-unbalance conversion capability by using the electrode connected to the first surface acoustic wave filter element as an unbalanced terminal and using the terminals connected to respective second and third surface acoustic wave filter elements as balanced terminals. In this surface acoustic wave filter device according to the second preferred embodiment of the present invention, unlike the conventional surface acoustic wave filter device in which four surface acoustic wave filter elements are used, the balance-unbalance conversion capability is achieved using only three surface acoustic wave filter elements. As a result, reductions in the size and the cost of the surface acoustic wave filter device having the balance-unbalance conversion capability are achieved.
Furthermore, the reduction in the number of surface acoustic wave filter elements results in a reduction in parasitic capacitance, which suppresses degradation in the degree of balance and which makes is easy to expand the passband.
In the surface acoustic wave filter device according to the second preferred embodiment of the present invention, if the first space and the second space are arranged such that they are different by an amount within the range from about 0.48xcex to about 0.525xcex, the amplitude balance becomes equal to or lower than about 1.5 dB and the phase balance becomes equal to or smaller than about 20xc2x0. As a result, it is ensured that degradation in the degree of balance is prevented.
If the first space and the second space are arranged so as to satisfy Equations 1 and 2, respectively, a sufficiently large bandwidth can be obtained, and degradation in the degree of balance is minimized.
Furthermore, in the surface acoustic wave filter device according to the second preferred embodiment of the present invention, if the first space and the second space are arranged so as to satisfy Equations 3 and 4, respectively, a sufficiently large bandwidth can be obtained and degradation in the degree of balance is minimized, even when a variation in frequency due to a temperature variation is taken into account.
If the first space is within the range from about 1.72xcex to about 1.83xcex and the second space is within the range from about 2.22xcex to about 2.33xcex, the degradation in the degree of balance can be further suppressed and a sufficiently wide bandwidth can be achieved.
In the surface acoustic wave filter device according to the second preferred embodiment of the present invention, if a LiTaO3 substrate made of a LiTaO3 single crystal with an orientation rotated about the X axis from the Y axis to the Z axis within the range from about 36xc2x0 to about 44xc2x0 is used, and if at least one electrode finger is inserted in at least one of the first and second spaces so that the electrode covering ratio of the space in which the electrode finger is inserted becomes equal to or greater than about 50%, propagation of leaky waves becomes dominant, and thus a reduction in the insertion loss is achieved. In particular, if the electrode covering ratio is equal to or greater than about 63%, a further reduction in the insertion loss can be achieved.
In the surface acoustic wave filter device according to the second preferred embodiment of the present invention, if the distance between the first reflector and the second reflector is substantially equal to the distance between the third reflector and the fourth reflector, the filter characteristics of the second and third surface acoustic wave filter elements become substantially equal to each other, and thus, a further suppression in the degradation in the degree of balance is achieved.
The surface acoustic wave filter device according to a third preferred embodiment includes the first, second and third surface acoustic wave filter elements, wherein the second surface acoustic wave filter element is connected to the second IDT of the first surface acoustic wave filter element, the third surface acoustic wave filter element is connected to the third IDT of the first surface acoustic wave filter element, and there is a phase difference of about 180xc2x0 within a passband between the inputs or the outputs of the second IDT and the third IDT of the first surface acoustic wave filter element. Thus, the surface acoustic wave filter device can have the balance-unbalance conversion capability by using the electrode connected to the first surface acoustic wave filter element as an unbalanced terminal and using the terminals connected to respective second and third surface acoustic wave filter elements as balanced terminals. In this surface acoustic wave filter device according to the first preferred embodiment of the present invention, unlike the conventional surface acoustic wave filter device in which four surface acoustic wave filter elements are used, the balance-unbalance conversion capability is achieved using only three surface acoustic wave filter elements. As a result, reductions in the size and the cost of the surface acoustic wave filter device having the balance-unbalance conversion capability are achieved.
Furthermore, the reduction in the number of surface acoustic wave filter elements results in a reduction in parasitic capacitance, which suppresses degradation in the degree of balance and which makes is easy to expand the passband.
In the surface acoustic wave filter device according to the third preferred embodiment of the present invention, if the first space and the second space are arranged such that they are different by an amount within the range from about 0.48xcex to about 0.525xcex, the amplitude balance becomes equal to or lower than about 1.5 dB and the phase balance becomes equal to or smaller than about 20xc2x0. That is, it is ensured that degradation in the degree of balance is prevented.
In the surface acoustic wave filter device according to the third preferred embodiment of the present invention, if the first space and the second space are arranged so as to satisfy Equations 1 and 2, respectively, a sufficiently large bandwidth can be obtained, and degradation in the degree of balance is minimized.
Furthermore, in the third preferred embodiment of the present invention, if the first space and the second space are arranged so as to satisfy Equations 3 and 4, respectively, a sufficiently large bandwidth can be obtained and degradation in the degree of balance is minimized, even when a variation in frequency due to a temperature variation is taken into account.
If the first space is within the range from about 1.72xcex to about 1.88xcex and the second space is set within the range from about 2.22xcex to about 2.33xcex, the degradation in the degree of balance can be further suppressed and a sufficiently wide bandwidth can be achieved.
In the surface acoustic wave filter device according to the third preferred embodiment of the present invention, if the distance between the center of the first IDT and the first reflector and the distance between the center of the first IDT and the second reflector are set to be substantially equal to each other, a further suppression in the degradation in the degree of balance is achieved.
In the surface acoustic wave filter device according to one of the first to third preferred embodiments, if the interdigital overlapping length of the electrode finger of the IDTs defining the first surface acoustic wave filter element is within the range of about 1.5 to about 3.5 times the interdigital overlapping length of the electrode finger of the IDTs defining the second and third surface acoustic wave filter element, degradation in VSWR in the passband is suppressed.
In the surface acoustic wave filter device according to a fourth preferred embodiment of the present invention, the second surface acoustic wave filter element is arranged such that the transmission amplitude characteristic of the second surface acoustic wave filter element is substantially equal to that of the first surface acoustic wave filter element and such that the transmission phase characteristic of the second surface acoustic wave filter element is different by about 180xc2x0 from that of the first surface acoustic wave filter element, and one end of each of the first and second surface acoustic wave filter elements is electrically connected in parallel, and the other end of each of the first and second surface acoustic wave filter elements is electrically connected in series, so that the parallel-connected terminals form unbalanced terminals and the series-connected terminals define balanced terminals. Thus, a balance-unbalance conversion capability is achieved, as in the surface acoustic wave filter device according to the first to third preferred embodiments. Furthermore, because only two surface acoustic wave filter elements are used, further reductions in the size and cost can be achieved.
In the surface acoustic wave filter element according to the fourth preferred embodiment, if the first space and the second space are arranged such that they are different by an amount within the range from about 0.48xcex to about 0.525xcex, the amplitude balance becomes equal to or lower than about 1.5 dB and the phase balance becomes equal to or smaller than about 20xc2x0. That is, it is ensured that degradation in the degree of balance is prevented.
In the surface acoustic wave filter device according to the fourth preferred embodiment of the present invention, if the first space and the second space are arranged so as to satisfy Equations 1 and 2, respectively, a sufficiently large bandwidth can be obtained, and degradation in the degree of balance is minimized.
Furthermore, if the first space and the second space are arranged so as to satisfy Equations 3 and 4, respectively, a sufficiently large bandwidth can be obtained and degradation in the degree of balance is minimized, even when a variation in frequency due to a temperature variation is taken into account.
In the fourth preferred embodiment, if the first space is within the range from about 1.72xcex to about 1.88xcex and the second space is within the range from about 2.22xcex to about 2.33xcex, the degradation in the degree of balance can be further suppressed and a sufficiently wide bandwidth can be achieved.
Also in the fourth preferred embodiment of the present invention, if a LiTaO3 substrate made of a LiTaO3 single crystal with an orientation rotated about the X axis from the Y axis to the Z axis within the range from about 36xc2x0 to about 44xc2x0 is used, and if at least one electrode finger is inserted in at least one of the first and second spaces so that the electrode covering ratio of the space in which the electrode finger is inserted becomes equal to or greater than approximately 50%, propagation of leaky waves becomes dominant, and thus a reduction in the insertion loss is achieved. In particular, if the electrode covering ratio is equal to or greater than about 63%, a further reduction in the insertion loss can be achieved.
In the surface acoustic wave filter device according to the fourth preferred embodiment of the present invention, if the distance between the first reflector and the second reflector is substantially equal to the distance between the third reflector and the fourth reflector, the filter characteristics of the second and third surface acoustic wave filter elements become substantially equal to each other, and thus a further suppression in the degradation in the degree of balance is assured.
In the surface acoustic wave filter device according to the fourth preferred embodiment of the present invention, if the unbalanced-side terminal of the first surface acoustic wave filter element and the unbalanced-side terminal of the second surface acoustic wave filter element are connected to each other via an electrode pattern on the piezoelectric substrate, a reduction in parasitic capacitance is achieved, and thus a further reduction in the insertion loss is achieved.
In a fifth preferred embodiment of the present invention, the surface acoustic wave filter device includes first to third surface acoustic wave filter elements, the first and second spaces are arranged so as to satisfy Equation 1 and 2, respectively, the first IDT defines the unbalanced terminal, and the second and third IDTs are electrically connected in series so as to define the unbalanced terminal. Thus, the surface acoustic wave filter device can have the balance-unbalance conversion capability by using the electrode connected to the first surface acoustic wave filter element as an unbalanced terminal and using the terminals connected to respective second and third surface acoustic wave filter elements as balanced terminals. In this surface acoustic wave filter device according to the fifth preferred embodiment, unlike the conventional surface acoustic wave filter device in which four surface acoustic wave filter elements are used, the balance-unbalance conversion capability is achieved using only three surface acoustic wave filter elements. As a result, reductions in the size and the cost of the surface acoustic wave filter device having the balance-unbalance conversion capability are achieved.
Furthermore, the reduction in the number of surface acoustic wave filter elements results in a reduction in parasitic capacitance, which suppresses degradation in the degree of balance and which makes it easy to expand the passband.
Similarly, also in the surface acoustic wave filter device according to a sixth or seventh preferred embodiment, the surface acoustic wave filter device can have the balance-unbalance conversion capability by using the electrode connected to the first surface acoustic wave filter element as an unbalanced terminal and using the terminals connected to respective second and third surface acoustic wave filter elements as balanced terminals. In this surface acoustic wave filter device according to the first through sixth preferred embodiments, unlike the conventional surface acoustic wave filter device in which four surface acoustic wave filter elements are used, the balance-unbalance conversion capability is achieved using only three surface acoustic wave filter elements. As a result, reductions in the size and the cost of the surface acoustic wave filter device having the balance-unbalance conversion capability are achieved.
Furthermore, the reduction in the number of surface acoustic wave filter elements results in a reduction in parasitic capacitance, which minimizes degradation in the degree of balance and which makes is easy to expand the passband.
The surface acoustic wave filter device according to an eighth preferred embodiment also has the balance-unbalance conversion capability as in the first preferred embodiment. Furthermore, because the particular type of piezoelectric substrate is used as the piezoelectric substrate, propagation of leaky waves becomes dominant, and thus a reduction in the insertion loss is achieved. In particular, if the electrode covering ratio is equal to or greater than about 63%, a further reduction in the insertion loss is achieved. Furthermore, the first and second spaces are arranged so as to be different from each other by about 0.48xcex to about 0.525xcex so that the amplitude balance equal to or less than about 1.5 dB and the phase balance equal to or smaller than about 20xc2x0 can be achieved. Thus, degradation in the degree of balance is prevented. At least one electrode finger is disposed in each area between an electrode finger, which is one of the first IDT""s electrode fingers connected to a signal line and which is disposed at an outermost location, and an electrode finger which is one of the second or third IDT""s electrode fingers connected to a signal line and which is disposed at a location closest to the center, so that the electrode covering ratio in each area descried above becomes equal to or greater than about 50% thereby achieving a further reduction in the insertion loss.
In particular, if the electrode covering ratio is equal to or greater than about 63%, a further reduction in the insertion loss can be achieved.
In the present preferred embodiment, when a series terminal is connected on the unbalanced terminal side, the characteristic in terms of attenuation outside the passband is greatly improved.
Similarly, if surface acoustic wave resonators are connected in series to the respective terminals on the balanced terminal side, the characteristic in terms of attenuation outside the passband is greatly improved.
In the case where a surface acoustic wave filter in the form of a cascaded ladder circuit is disposed on the balanced terminal side, if the ladder-type surface acoustic wave filter is arranged such that its attenuation poles are located near the lower and upper edges of the passband, greater attenuation and better selectivity can be achieved. Furthermore, the surface acoustic wave resonator connected in parallel between the balanced terminals imposes equal influences upon both balanced terminals. This makes it possible to increase the attenuation outside the passband without causing degradation in the degree of balance.
In the surface acoustic wave filter device according to the present preferred embodiment, in the case where a chip on which surface acoustic wave filter elements are disposed is housed in a package, if at least one of the electrode pattern, the package, and the electrical connection member has a structure which are substantially axially symmetric, further suppression in degradation in the degree of balance can be achieved.
In particular, when at least two of the electrode pattern, the package, and the electrical connection member have structures which are substantially axially symmetric with respect to the same symmetry axis, further suppression in degradation in the degree of balance can be achieved.
The surface acoustic wave filter according to various preferred embodiments of the present embodiment can be used in duplexers or communication devices, as described above. In this case, a reduction in the size of the duplexers and communication devices can be achieved.
For the purpose of illustrating the invention, there is shown in the drawings several forms which are presently preferred, it being understood, however, that the present invention is not limited to the precise arrangements and instrumentalities shown.
Other features, elements, characteristics and advantages of the present invention will become apparent from the detailed description of preferred embodiments thereof with reference to the attached drawings.

Surface acoustic wave filter device with balanced and unbalanced terminals


A snow blower converter kit is provided for use with a snow blower. Such kit includes a mulcher blade and a squirrel cage adapted for being removably mounted on a drive shaft of the snow blower in concentric relationship between the conduit and the tines of the snow blower. Also included is a cover adapted for being removably mounted on the shield with a slot formed in a lower portion thereof for accepting leaves and the like therethrough.

1. Field of the Invention
The present invention relates to snow blowers and more particularly pertains to a new snow blower converter kit for allowing the dual use of a snow blower as a leaf collector.
2. Description of the Prior Art
The use of snow blowers is known in the prior art. More specifically, snow blowers heretofore devised and utilized are known to consist basically of familiar, expected and obvious structural configurations, notwithstanding the myriad of designs encompassed by the crowded prior art which have been developed for the fulfillment of countless objectives and requirements.
Known prior art includes U.S. Pat. No. 4,597,203; U.S. Pat. No. 5,090,142; U.S. Pat. No. 4,064,679; U.S. Pat. No. 4,294,027; U.S. Pat. Des. 307,912; and U.S. Pat. No. 3,200,519.
In these respects, the snow blower converter kit for collecting leaves according to the present invention substantially departs from the conventional concepts and designs of the prior art, and in so doing provides an apparatus primarily developed for the purpose of allowing the dual use of a snow blower as a leaf collector.

Snow blower converter kit for collecting leaves


An apparatus for converting a PCI/PCI X device into a PCI-Express device. The apparatus may include a first circuit configured to receive first data, wherein the first circuit is configured to translate the first data into PCI formatted data. The apparatus may also include a PCI data bus and a second circuit coupled to the first circuit via the PCI data bus. The second circuit is configured to receive the PCI formatted data from the first circuit via the PCI data bus. The second circuit is configured to translate the PCI formatted data received from the first circuit into PCI-Express formatted data. However, the PCI data bus transmits data between only the first and second circuits.

Computer systems include devices such as microprocessors, main memory, disk drives, network adaptors, etc., that communicate with each other via data buses. Typical computer systems include a system bus, a memory bus, and a local bus. FIG. 1 is a block diagram illustrating a computer system employing several devices coupled together via a system bus, a memory bus, and a PCI bus. More particularly, FIG. 1 shows a microprocessor 10, cache 12, and PCI bridge/memory controller (hereinafter PCI bridge) 14 coupled together via system bus 16. PCI bridge could be implemented in one or multiple devices. Main memory 20 is also included; however main memory 20 is coupled to PCI bridge 14 via memory bus 22. Additionally, FIG. 1 shows PCI bridge 14 coupled to PCI devices 24, 26, 28 and 30 via PCI bus 32. It is noted that two devices can be coupled together directly or indirectly. For example, PCI device 24 is coupled to PCI device 30.
PCI Local Bus Specifications (including version 2.3) and PCI-X Specifications (including version 2.0) (available at www.pcisig.com) are exemplary, published versions of the PCI bus specification that defines the PCI signaling and protocol characteristics of PCI bridge 14, PCI devices 24-30, and/or PCI bus 32. PCI Local Bus Specifications and PCI-X Local Bus Specifications are incorporated herein by reference in their entirety. For ease of explanation, operational characteristics of PCI bridges, PCI devices, and/or PCI buses will be described herein as components conforming to the signaling and protocol of the latest PCI Local Bus Specification.
PCI bridge 14 is a device well known in the art. PCI bridge 14 is provided as a buffer/translator between PCI bus 32 and system bus 16. The signaling and protocol on the PCI bus 32 (as defined, for example, by a PCI Local Bus Specification) is different than the signaling and protocol on the system bus 16. PCI bridge 14 "bridges" these differences between signaling and protocol so that PCI devices 24, 26, 28 and 30 may communicate with, for example, microprocessor 10, memory 20 or cache 12. In other words, PCI bridge 14 receives and subsequently translates PCI formatted data into data formatted for transmission over system bus 16 and memory bus 22, and vice versa.
FIG. 2 illustrates (in block diagram form) pin requirements for PCI devices 24, 26, 28 and 30 to interface with PCI bus 32 according to PCI Local Bus Specification. FIG. 2 shows that each PCI device requires a minimum of 47 pins for a target only device and 49 pins for a master device to handle data and addressing, interface control, arbitration, and system functions on PCI bus 32. A master device initiates a read or write-data transaction directed to another device. Targeted devices are those to which the read or write-data transactions are directed.
FIG. 2 shows the pins in functional groups, with required pins on the left side and optional pins on the right side. The clock (CLK) provides timing for all read or write transactions on PCI bus 32. Address and data (AD[31::00]) are multiplexed on the same PCI pins. A bus transaction consists of an address phase followed by one or more data phases. It is noted that PCI data bus supports both read and write bursts. The remaining definition of the signals shown in FIG. 2 can be found in PCI Local Bus Specification.
FIG. 3 illustrates, in block diagram form, relevant components of PCI devices 24 and 26. PCI devices 28 and 30 may take similar form. PCI device 24 includes core circuit 40, internal bus 44, and PCI interface 42, while PCI device 26 includes core circuit 50, internal bus 54, and PCI interface 52. PCI interfaces 42 and 52 are circuits coupled between parallel internal buses 44 and 54, respectively, and PCI bus 32.
Respective components in PCI devices 24 and 26 differ in structure and operating characteristics. In other words, core circuits 40 and 50 are substantially different in structure and operating characteristics from each other, internal buses 44 and 54 are substantially different in structure and operating characteristics from each other, and PCI interfaces 42 and 52 are substantially different in structure and operating characteristics from each other. To illustrate, core circuit 40 may take form in one or more components of a graphics controller, while core circuit 50 may take form in one or more components of a universal serial bus (USB) host controller. Data is transmitted back and forth between core circuit 40 and PCI interface 42 using a signaling and protocol unique to bus 44, while data is transmitted back and forth between core circuit 50 and PCI interface 52 using a signaling and protocol unique to bus 54. The signaling for buses 44 and 54 are different from each other. Moreover, the signaling and protocol on internal buses 44 and 54 are different from the signaling and protocol of PCI bus 32. PCI interface 42 translates the difference in signaling and protocol in PCI bus 32 and internal bus 44, while PCI interface 52 translates the difference in signaling and protocol in PCI bus 32 and internal bus 54. In other words, PCI interface 42 translates data received from core circuit 40 in a format for transmission over internal bus 44 into data formatted for transmission over PCI bus 32 and vice versa, while PCI interface 52 translates data received from core circuit 50 in a format for transmission over internal bus 54 into data formatted for transmission over PCI bus 32 and vice versa. The PCI interfaces operate according to the signaling and protocol of PCI Local Bus Specification and enable the core circuits 40 and 50 to communicate with other devices via PCI bus 32. Although the PCI interface circuits 42 and 52 can communicate with PCI bus 32, PCI interface circuit 42 cannot be successfully replaced with the PCI interface circuit 52 or vice versa.
PCI has been successfully used as a local bus in computer systems in the past. However, demands of emerging and future computer systems will exceed the bandwidth and scalability limits that are inherent in PCI bus implementations. PCI-Express bus is a new bus designed to replace the PCI bus and address limitations thereof. PCI-Express bus is also designed as a replacement to the system bus (e.g., system bus 16). However, the present invention will be described with reference to PCI-Express as a replacement to PCI bus.
PCI-Express bus and PCI bus are substantially different. Unlike the PCI bus, the PCI-Express bus is a serial bus, and as such PCI-Express bus employs a reduced number of traces (i.e., conductive lines) for transmitting data between PCI-Express devices. This provides several advantages. The reduction of traces eases the costs of computer systems employing the PCI-Express bus. The reduced number of traces also reduces electromagnetic interference (EMI) and radio frequency interference (RFI) shieldings.
FIG. 4 shows the computer system of FIG. 1 with the PCI bridge 14, PCI devices 24-30, and PCI bus 32 replaced by PCI-Express bridge 58, PCI-Express devices 64-70, and PCI-Express buses 72, respectively. PCI-Express is a point-to-point technology. As such, a separate PCI-Express bus 72 connects PCI-Express bridge 58 to individual PCI-Express devices 64, 66, 68, or 70 as shown. Several versions of PCI-Express Specification define the signaling and protocol characteristics of PCI-Express bridge 58, PCI-Express devices 64, 66, 68 and 70, and/or PCI-Express busses 72. Each version is incorporated herein by reference in its entirety.
Protocol and signaling for the system bus 16 is substantially different than the protocol and signaling for each PCI-Express bus 72. Without PCI-Express bridge 58, PCI devices 64, 66, 68 and 70 could not communicate with, for example, microprocessor 10. PCI-Express bridge 58 acts as a buffer/translator between a PCI-Express device and devices coupled to system bus 16 and memory bus 22. PCI Express bridge 58 translates PCI-Express formatted data into data formatted for transmission over system bus 16 and memory bus 22, and vice versa.
FIG. 5 is a block diagram showing relevant components of PCI-Express devices 64 and 66 coupled to respective PCI-Express buses 72. The PCI-Express devices shown in FIG. 5 are the PCI devices shown in FIG. 3 with the PCI interface circuits 42 and 52 replaced by PCI-Express interface circuits 82 and 92, respectively. PCI-Express interface circuit 82 is substantially different than the PCI interface circuit 42, and PCI-Express interface circuit 92 is substantially different than the PCI interface circuit 52. The signaling and protocol on internal buses 44 and 54 are different from the signaling and protocol of PCI-Express buses 72. PCI-Express interface 82 translates the difference in signaling and protocol in PCI-Express bus 72 and internal bus 44, while PCI-Express interface 92 translates the difference in signaling and protocol in PCI-Express bus 72 and internal bus 54. In other words, PCI-Express interface 82 translates data received from core circuit 40 in a format for transmission over internal bus 44, into data formatted for transmission over PCI-Express bus 72 and vice versa, while PCI-Express interface 92 translates data received from core circuit 50 in a format for transmission over internal bus 54, into data formatted for transmission over PCI-Express bus 72 and vice versa. The PCI-Express interfaces operate according to the signaling and protocol of a PCI-Express Specification and enable the core circuits 40 and 50 to communicate with other devices.
Although the PCI-Express interface circuits 82 and 92 can communicate with PCI-Express bus 72, PCI-Express interface circuit 82 cannot be successfully replaced with the PCI-Express interface circuit 92 or vice versa. Accordingly, each PCI interface circuit (or class of PCI interface circuits) of PCI devices 24, 26, 28 and 30 must be replaced with a unique PCI-Express interface circuit in order to successfully transform PCI devices 24, 26, 28 and 30 into PCI-Express devices 64, 66, 68 and 70, respectively. The time and cost for designing these replacement PCI-Express interface circuits may impede the manufacture and sale of computer systems such as that shown in FIG. 4. And the time and cost for designing these replacement PCI-Express interface circuits may impede the manufacture and sale of PCI Express devices such as that shown in FIG. 4.


A stator drain supports stator windings and rotor bearings and permits fluid coolant for the rotor bearings to be drained outward past the stator windings from the bearings. The drain is formed of a non-metallic material and has an inner surface for supporting a bearing liner of the rotor bearings, a plurality of spaced openings for receiving stator windings and drain slots extending through the annular member at locations corresponding to spaces between the stator windings for draining the fluid coolant. The stator drain is useful in a dual permanent magnet generator, for example.

Prior to the development of the dual permanent magnet generator (PMG), aircraft typically used wound field generating systems as a power supply. With weight and size considerations becoming of increased importance, however, PMG devices of the type shown in U.S. Pat. Nos. 4,305,031 and 4,654,577 were developed. These generators were considered relatively small and lightweight devices for generating electrical power from a motive power source because they do not require a separate electrical source for field excitation.
A PMG does not require a complex cooling apparatus and eliminates the need for a convertor by driving the system with a constant speed drive to limit the maximum voltage excursion in the case of a system fault. The output voltage of a PMG is, however, a function of the relative speed between the rotor and stator and of the current drawn by a load. This drawback has prevented PMG's from being used as a main power source in aircraft in lieu of wound field machines having exciters and rotating rectifiers driven at high speed. These high speeds required complex cooling apparatus to dissipate heat developed on the windings and in the rotating rectifiers.
When used in a generator, there is a set voltage on the generator which varies as the load varies and which cannot be controlled electronically. It has been found that the rotors in PMGs create a voltage control problem as the load varies. A dual permanent magnetic generator concept controls voltage by shifting two high speed rotors in and out of phase to keep the voltage constant as the load varies. For example, at a two per unit load, the magnetic poles are aligned, whereas at no load, the magnetic poles would be 78.degree. out of phase. If the main high speed rotors of the PMG which, at no load, are out phase with each other by about 78.degree. were kept in the same phase relationship as the generator load is increased, the output voltage would droop.
A PMG system using left-hand and right-hand helical ball splines to effect adjustment of rotors relative to each other is disclosed in commonly assigned U.S. Pat. No. 4,879,484. This system comprises a stator having an output winding for producing an output voltage, a rotor within the stator, the rotor including first and second magnet rotors rotatable about a common axis and a mechanism for angularly adjusting the first and second rotors relative to one another about the common axis. The angular adjustment of the rotors provides for rotation of each of the first and second rotors in opposite directions relative to the other for causing a relative angular adjustment of the rotors. Rotating the rotors simultaneously in opposite directions, each by half the required angle n requires much less power to overcome inertia than rotating only one rotor the full angle. A common drive shaft extending along the common axis of the rotors is used for rotatably driving both the first and second rotors about the common axis.
Left- and right-hand helical ball splines are located between the driven shaft and the first and second rotors, respectively. Rotation of the first and second rotors in opposite directions relative to one another is accomplished by causing axial movement of the drive shaft along the common axis relative to the rotors. In the system of the aforementioned patent, bearings are provided for rotatably supporting the rotors at essentially fixed locations at their ends along the common axis, and the drive shaft is permitted to move axially along the common axis relative to the rotors for angular adjustment of the rotors. The means for axially moving the drive shaft comprises a hydraulic drive means or an electric motor. In either case, the use of the oppositely directed helical ball splines together with the axial movement of the single drive shaft, reduces the friction required for angular adjustment of the rotors and thereby reduces the power necessary for accomplishing the adjustment.
One problem encountered with a dual PMG of the aforementioned type concerns the need to support and oil cool the center rotor bearings, that is, those bearings rotatably supporting the adjacent ends of the two in-line rotors of the generator. Electrical losses should be avoided or kept to a minimum as part of a solution to this problem.
U.S. Pat. No. 2,476,892 discloses a twin-motor bearing housing construction having a central bearing-housing which has a lubricating pipe. U.S. Pat. No. 4,728,840 depicts a water-cooled AC and DC motor-generator set on a common shaft with series cooling flow path. U.S. Pat. No. 4,514,652 relates to a liquid cooled high speed synchronous machine wherein oil flows axially through the stator in a single rotary generator. U.S. Pat. No. 4,644,207 is directed to an integrated dual pump system having center bearing separating two rotors. The bearings are supplied with lubricant through passages that extend radially into the bearings.

Stator drain and electrical apparatus employing the same


An organic electroluminescent display device is provided. The display device has a polarizing film disposed at a light exiting side thereof. The polarizing film has a plurality of polarization units, and adjacent polarization units have different polarization directions.

When an organic electroluminescent display device is produced, it is usually necessary to package the whole display device with a sealing film. However, because a thickness of the sealing film of the organic electroluminescence is in a same order of magnitude as wavelengths of visible lights, a wide-angle interference takes place between a transmitted light irradiating directly from a light exiting side and a reflected light from reflective electrode. Thus, the light extraction efficiency is reduced.

Organic electroluminescent display device

Hefei BOE Optoelectronics Technology Co., Ltd.


Methods for the diagnosis, prognosis, patient stratification and prediction of pharmacological response in patients afflicted by psychiatric disorders based on electroretinography (ERG) parameters are described.

Psychiatric disorders are characterized by alterations in thinking, mood or behaviour—or some combination thereof—associated with significant distress and impaired functioning.
Schizophrenia (SZ) and related disorders such as brief psychotic disorder, delusional disorder, schizoaffective disorder, and schizophreniform disorder, are characterized by psychotic symptoms. Psychotic symptoms include delusions, hallucinations, disorganized thinking and speech, and bizarre and inappropriate behavior. Schizophrenia is characterized by psychosis (loss of contact with reality), hallucinations (false perceptions), delusions (false beliefs), disorganized speech and behavior, flattened affect (restricted range of emotions), cognitive deficits (impaired reasoning and problem solving), and occupational and social dysfunction. Diagnosis is typically based on the patient's self-reported experiences and observed behavior.
Bipolar disorders (BP) are characterized by episodes of mania and depression, which may alternate, although many patients have a predominance of one or the other.
Major depressive disorder (MDD) (also known as recurrent depressive disorder, clinical depression, or major depression) is a mental disorder characterized by episodes of all-encompassing low mood accompanied by low self-esteem and loss of interest or pleasure in normally enjoyable activities.
There is no reliable diagnostic test for psychiatric disorders. The diagnosis of psychiatric disorders typically requires evaluation by a trained mental-health professional and usually an interview, administration of a variety of personality tests (and in some cases, neuropsychological tests), and gathering of background (including medical) information about the individual (e.g., patient's self-reported experiences, behavior reported by relatives or friends). Etiological heterogeneity within the Diagnostic and Statistical Manual of Mental Disorders (DSM) categories (meaning that within a particular DSM category, there are different subgroups of patients whose disease is underlain by different neurobiological pathologies) diminishes the power of pharmacological/clinical trials and neurobiological studies of major psychiatric disorders. No valid and replicable biomarkers of this heterogeneity have been identified. There is also an increasing awareness that the widely used DSM diagnoses have porous boundaries, meaning that some neurobiological etiological processes are common to several of these diagnoses. Obstacles to rapid progress are threefold: 1. Direct access to central nervous system in humans to investigate neurotransmitter system interplays; 2. Physiological endophenotypes that may help to stratify patients and to understand psychiatric disease processes and treatment response and 3. Longitudinal access to already available intelligent multiphenotype biobank.
There is thus a need for the development of novel methods and biomarkers that may help to screen, confirm diagnosis, stratify, select treatment or predict outcome of patients afflicted by psychiatric disorders.
The present description refers to a number of documents, the content of which is herein incorporated by reference in their entirety.

Use of electroretinography (ERG) for the assessment of psychiatric disorders


One purpose of this invention is to provide radiation tomography apparatus with easier maintenance. A specific approach for this purpose is as follows. That is, a detector ring in the radiation tomography apparatus includes two or more rings. Moreover, a ring moves as to approach a next ring, whereby both the rings are connected. If radiation tomography is conducted while a clearance is provided between the rings, detection sensitivity of the detector ring decreases due to the clearance. On the other hand, according to this invention, the ring moves as to approach the next ring, which results in a narrower clearance. Accordingly, radiation that is not observed may be reduced as much as possible.

In medical fields, radiation emission computed tomography (ECT: Emission Computed Tomography) apparatus is used that detects an annihilation radiation (for example, gamma rays) pair emitted from radiopharmaceutical that is administered to a subject and is localized to a site of interest for acquiring sectional images of the site of interest in the subject showing radiopharmaceutical distributions. Typical ECT equipment includes, for example, a PET (Positron Emission Tomography) device and an SPECT (Single Photon Emission Computed Tomography) device.
A PET device will be described by way of example. The PET device has a detector ring with block radiation detectors arranged in a ring shape. The detector ring is provided for surrounding a subject, and allows detection of radiation that is transmitted through the subject.
First, description will be given of a configuration of a conventional PET device. As shown in FIG. 10, a conventional PET device 50 includes a gantry 51 with an introducing hole that introduces a subject, a detector ring 53 having block radiation detectors 52 for detecting radiation being arranged inside the gantry 51 as to surround the introducing hole, and a support member 54 provided as to surround the detector ring 53. Each of the radiation detectors 52 has a bleeder unit 55 with a bleeder circuit. The bleeder unit 55 is provided between the support member 54 and the radiation detector 52 for connecting the support member 54 and the radiation detector 52. Such PET device is described, for example, in Patent Literature 1.
The PET device determines annihilation radiation pairs emitted from radiopharmaceutical. Specifically, an annihilation radiation pair emitted from inside of a subject M is a radiation pair having traveling directions opposite by 180 degrees.
[Patent Literature 1]
Japanese Patent Publication No. 2005-312930


A conductive probe may include a probe body for communicating with a circuit tester or a jumper. The probe body may be formed of metal and may have a free end. A probe tip may be mounted to the end of the probe body. The probe tip may be formed of thorium-tungsten. The probe tip may be configured for contacting a circuit node.

The incidence and complexity of electronic circuitry continues to increase, requiring improvements in the efficiency and functionality of the test equipment necessary to diagnose and repair such circuitry. Test equipment such as multi-meters and logic analyzers may generally communicate with the circuitry being tested via one or more conductive test probes. Test probes may be configured to pierce an insulated wire or contact an exposed electrical terminal. Measured parameters may include resistance, voltage, current, impedance, frequency, and digital waveforms. In addition, some multi-meters, such as the multi-meter disclosed in U.S. Pat. No. 7,184,899, have a "power and measure" feature, allowing a technician to probe a circuit, initiate current sourcing, and simultaneously measure electrical parameters, thus enhancing test efficiency. Some important quality goals for test equipment may include collecting accurate measurements at the required resolution without interfering with the operating point of the circuit under test. Unfortunately, certain design aspects of conventional test equipment may result in poor measurement quality when diagnosing a circuit.
For example, one cause of poor measurement quality may be a test probe resistance that is higher than the required measurement resolution. For example, a test probe resistance of 100 milliohms (mΩ) would interfere with the accurate measurement of a circuit resistance requiring a resolution of 10 mΩ by adding 100 mΩ to the measurement result. Test probe resistance is measured across the conducting length of the test probe, and does not include the contact resistance occurring between the test probe and the circuit node. Test probe resistance may depend on the resistivity of the conductor used, on corrosion, and on any damage that occurs due to misuse or high current flow. Often, the test probe may be fabricated from a metal material having a relatively low resistivity, which may be adequate for conducting moderate current flows of less than approximately 1 to 10 amps. For example, brass, an alloy of copper and zinc, has a resistivity of approximately 6-7 μΩ-cm, where metals in general may range from 1-300 μΩ-cm in resistivity. However, many automotive circuits require testing with high current flows of from approximately 10 to 100 amps or more, which may require the alteration of the geometry or diameter of a brass or steel test probe to insure that test probe resistance remains small.
Another cause of poor measurement quality may be electrical arcing that may occur between the test probe and the circuit node being measured. Arcing may generally begin during the making or breaking of contact involving a live circuit in close proximity. A live circuit may occur by either placing a test probe onto an energized circuit node having a voltage, or by placing an energized test probe onto a non-energized or passive circuit node, or both. A sustained arc having sufficient heat energy, i.e., sufficient current, may melt steel. The effect of even momentary arcing may be a break down or damage in the conductor material such as brass or steel, causing heating, burning, melting, material migration, molecular voids, and a permanent rise in test probe resistance that begins to interfere with the quality of the measurement. Arcing may self-extinguish once the distance between electrical nodes increases. However, the availability of larger current flows may increase the heat energy within an arc, increasing the possibility of material damage. A test probe susceptible to arc damage may degrade progressively over time, attracting larger and longer arcs, and increasing test probe resistance further. Conventional metallic test probes may therefore require frequent replacement.
Another cause of excessive test probe resistance may be a temporary heating of the sharpened tip through either arc heating or resistive heating. During arc heating, initiating an electrical contact may give rise to a momentary arc over the sharpened tip of the test probe, heating the surface of the probe tip. Since many metals, such as brass and steel, possess positive resistive temperature coefficients, their resistivity may increase upon the occurrence of an arc. A multi-meter measurement immediately following such an arc may experience increased test probe resistance that gives rise to measurement error. In addition to arc heating, a substantial current flow through the sharpened tip during a measurement may give rise to resistive heating that also creates increased resistivity, building on any preceding arc heating and causing more measurement error. For example, a sharpened tip comprised of a metal having a positive temperature coefficient may be required to conduct the flow of 100 amps through a very small volume of metal, generating heat and increased resistance, and subsequently measurement error. For example, a 100° C. increase in the temperature of the tip of a copper test probe having a temperature coefficient of 0.0043/° C. causes tip resistance to increase by 43% (i.e., 100×0.0043), and causing an increase in overall test probe resistance.
Another problem that may arise during measurements involving a conductive test probe relates to the arc detection circuitry disclosed in the above-mentioned application Ser. No. 13/404,644. During arc detection, high frequency spectra may be analyzed for evidence of arcing internal to the circuitry being powered and measured by the test equipment. The test may be terminated by a circuit breaker upon detection of an internal arc. The accuracy of the measurement depends on a fast rise time in the voltage or current, which requires a small test probe resistance. However, the occurrence of test probe arcing may interfere with the internal detection of arcing by interfering with the sense threshold causing arcing to increase before the sense threshold is achieved. Additionally, as the test probe resistance increases further and the rise time gets progressive slower, the response may eventually become so delayed that the circuit breaker does not shut down at all, posing a fire hazard to a circuit that is external arcing.
A further cause of excessive test probe resistance may be the use of test probe geometries that generate high resistive losses. For example, the sharpened tip of the test probe may be the location of highest current density and may thereby contribute excessively to the overall test probe resistance if there is a long path from the probe tip to a conductive portion of the test probe having relatively low current density. In addition, local heating may occur near the tip due to current flow, further increasing path resistance.
As can be seen, there exists a need in the art for a durable conductive test probe that can withstand arcing over many cycles under high current conditions. Additionally, there exists a need in the art for a test probe that maintains a low resistance at high currents during arcing so that measurement resolution and accuracy are maintained. Furthermore, there exists a need in the art for a test probe that preserves the rise time of arc detection circuitry by preventing an increase in test probe resistance caused by arcing. There also exists a need in the art for a test probe that can withstand many contact cycles under live circuit conditions. In addition, there exists a need in the art for a conductive test probe that has a compact (i.e., small) geometry that minimizes test probe resistance.


The method for reliabilization of the supervision of a network comprises: acquisition of a set of events, said events comprising a time stamp corresponding with the emission time of said event; storage of the received events; storage of at least one scenario (SC) comprising a first sequence (S1) of events to be received within a time interval threshold (ΔTs) and a first condition (CD1) to be satisfied; detection of at least a part (pS2) of a received second sequence of events (S2) similar to the first sequence (S1); determination of a second emission time interval (ΔT3) of the second sequence (S2); verification that the first condition (CD1) of the scenario (SC) is satisfied in function of the determined emission time interval (ΔT3), the time interval threshold (ΔTs) of scenario (SC), and the first sequence (S1) and the second sequence (S2) received, and generation of a second status message (M2ET).

At the present time, the tools for supervising network infrastructures such as enterprise networks, administrative networks or specific community networks are highly complex.
From a first aspect, the complexity is the result of the growing number of interfacing devices having access to a given network. At the present time, the devices involved in accessing a given network are:                nomadic devices such as smartphones, tablets;        computers, workstations, portable computers;        devices supporting the network such as commutating switches, routers, administrative servers, etc.
The growing number of devices creates increased complexity of the number of supervisory messages to be processed.
Another aspect concerns the quality of the network service, aimed in particular at improving the reliability and security of the network, which of course implies increased complexity of the administrative tools in order to eliminate all faults in a system.
Making the security of a network more reliable is even more important as the number of points from which the system is accessed increases with the number of devices mentioned in the first aspect.
Improving the reliable security of a network is the answer to the need to reduce the vulnerability of a network in the areas of applications, transmission protocols or intrusions for instance by pirating of encrypted keys or user passwords.
One of the dangers consists in letting an unauthorized person penetrate a network with the objective of causing harm, for instance by erasing data or stealing confidential information.
Because of this complexity, the tools have integrated correlators for processing in semi-automatic or automatic mode events occurring inside the network.
The correlators are capable of managing a set of events by analyzing for instance, their number, their redundancy, their nature, an expected sequence of a set among these events, the reception dates, emitters and receivers, etc.
These correlators are capable of assisting persons in their decision making by filtering and synthesizing all the emitted events.
More and more, correlators are taking the security aspects into account by identifying anomalies or irregularities in the reception of the received messages.
There are different types of solutions for detecting such anomalies. In the first place, we are mentioning the HIDS solution (the English language acronym means "Host Intrusion Detection System"), which enhances in particular the modifications of a system for detection of abnormal activities and gaps in security policy.
In the second place, the NIDS solution (the English language acronym means "Network Intrusion Detection System") for the detection of so-called "malicious" or pockmarked messages among the messages transiting through the system.
A third solution consists in using a firewall for detecting the use of unauthorized transmission ports in a given link.
Each envisaged solution comprises a common emission mechanism for alarm messages when an event occurs that can potentially endanger the security of the network or of the information transiting through the network. There are solutions such as, for instance, event journals of exploitation systems or applications where the emitted messages are not necessarily alarms but event notifications. There are numerous solutions comprising notification emission systems such as firewalls, anti-virus and other solutions.
In networks with real time constraints, for instance synchronized networks, the messages are in general time stamped. Time stamping improves in particular the routing protocols or the synchronization problems of a network. Network supervision devices do not use time stamping because the event correlators use the message arrival date to make a decision. In this way, messages can be classified chronologically, analyses can be performed and adequate decisions can be made, for instance, when a security failure is detected.
One major problem, resulting from the increased complexity of information systems and data networks, is that some anomalies significantly downgrade the analysis of events in synchronized networks. Among these anomalies we find incidents such as service interruptions, radio silence and too long latency times in addition to low volume of data.
As an example, during a voluntary or involuntary radio silence, occurring throughout the whole network or part of it, numerous messages can be received by the supervisory equipment at the end of the radio silence. A radio silence corresponds with a stop of message emission and reception during a time interval. This event can take place, for instance, in military applications. When the network returns to normal operation after the radio silence, the supervisory equipment must process thousands of messages arriving in mass all at the same time. Events such as intrusions could have occurred during the radio silence, which must be detected afterwards.
At the present time, correlators are not developed to meet these requirements. Therefore, they can make wrong decisions. In fact, all messages arriving at the same time at the entrance of the correlator can be received out of order. This has as consequence that if the correlator takes into account the reception time of a message, it risks making a bad decision or not making a decision, while in fact it should have generated an action in order to ensure the reliability of the data transiting through the network.

Process of reliability for the generation of warning messages on a network of synchronized data


Vehicle battery management systems (BMS) and methods are described, in which the output of a vehicle battery is reduced by activating a shutdown mode. A BMS may be configured to start a timer when the vehicle is turned off, e.g. based on when the main power between the vehicle and the battery is interrupted or based on a signal from the vehicle control system. The BMS may further be configured to store BMS data (e.g. variable data related to operation and/or status of the battery) to an electronic storage device, and to switch the battery to a shutdown mode, when the timer reaches a predetermined value. The BMS may be further configured to load the BMS data from the electronic storage device and/or to deactivate the shutdown mode when the vehicle is turned back on.

Exemplary embodiments of the present disclosure relate to battery management systems that may be used, for example, for managing power output and modes of one or more batteries in an electric vehicle.
An electric vehicle uses a battery pack as an energy source. To ensure that the electric vehicle operates properly, the battery pack is monitored and managed during discharge and charging, e.g. to maintain the battery pack within a certain range of temperature and other parameters. Operating within the working temperature ensures that the battery pack performs efficiently and has a long service life. Due to the large influence of temperature on the performance and the service life of the battery pack, the working temperature of the battery pack and the consistency of the working states of the battery cells within the battery pack are very important in the design of the electric vehicle and the battery pack. As such a battery management system (BMS) is typically used to manage the performance and operation of a rechargeable battery (e.g. a cell or battery pack), by protecting the battery from operating outside its working temperature, monitoring its state, and calculating and/or reporting data to other control systems in the vehicle. The BMS may also control recharging of the battery, e.g. by redirecting recovered or charger energy to the battery pack.
When an electrical vehicle is turned off, may maintain operation of at least some electrical subsystems that slowly drain the battery. This can result, for example, in "leakage" of 13 mA-4 mA of current from the battery.

THUNDER POWER NEW ENERGY VEHICLE DEVELOPMENT COMPANY LIMITED


The invention relates to an optical waveguide having a core made of one member selected from halide glasses, chalcogenide glasses and oxyhalide glasses. This one member is doped with both of erbium and cerium. The invention further relates to a 1.5 .mu.m-band optical amplifier having the optical waveguide for amplifying the light. Due to the doping of both erbium and cerium, it becomes possible to provide a highly efficient optical amplifier having low noise and wide band. With this, it becomes possible to construct an optical communication network having high credibility, high capacity and high speed.

The present invention relates to an optical waveguide and a 1.5 .mu.m-band optical amplifier in which the optical waveguide is used.
Hitherto, the light amplifying silica glass fiber containing an activation ion of Er has been used in the optical amplifier for amplifying 1.5 .mu.m optical signals. Thus, this glass fiber has played an important role in making the optical communication high-speed. In such optical amplifier, the Er ions can be excited by a pump light having a wavelength of 1.48 .mu.m or 0.98 .mu.m. As a result, the light emission of 1.5 .mu.m-band can be obtained through the stimulated emission transition of .sup.4 I.sub.13/2.fwdarw..sup.4 I.sub.15/2, as shown in FIG. 1. It is known that an optical amplifier using the excitation at 0.98 .mu.m has a lower noise than that of another optical amplifier using the excitation at 1.48 .mu.m. In recent years, the wavelength multiplex communication system has drawn much attention in the course of the increase of the communication capacity. Thus, it has been required to get a light amplifying medium which can achieve an effective light amplification in a wide band. In view of this, there have been recent studies on the widening of the band of Er-doped silica fibers and on Er-doped halide glasses and Er-doped chalcogenide glasses. It is known that an optical waveguide and an optical fiber used therefor, which are made of Er-doped halide glass, Er-doped chalcogenide glass or oxyhalide glass glasses are expected to become a light amplifying medium used for the 1.5 .mu.m -band wavelength multiplex communication. However, if the Er ions contained in these glasses are excited at 0.98 .mu.m in an optical amplifier, the excited state absorption (ESA) of the Er ions tends to occur, as shown in FIG. 1. The reason of this is that the phonon energy of halide glass, chalcogenide glass or oxyhalide glass is lower than that of oxide glass. With this, the chance of the occurrence of the multiphonon relaxation of the Er ions by the transition of .sup.4 I.sub.11/12.fwdarw..sup.4 I.sub.13/2 becomes small, and thus the fluorescent life time becomes long in the .sup.4 i.sub.11/12 level. As a result, the ESA loss of the Er ions increases, and thus the amount of the pump energy directed to the stimulated emission at 1.5 .mu.m-band is decreased. With this, the amplification efficiency is lowered. Thus, it has been impossible to prepare an optical amplifier having low noise and wide band by using halide glass, chalcogenide glass or oxyhalide glass. In order to prepare such optical amplifier, it becomes necessary to shorten the fluorescent life time of the Er ions in the .sup.4 I.sub.11/12 level, In view of this, Japanese Patent Unexamined Publication No. 8-222784 discloses a light amplifying fiber containing in its core both of a first dopant of Er and a second dopant which is at least one selected from Tb, Dy and Eu. However, this second dopant may absorb the pump light and/or the signal light and thus decrease the amplification efficiency, in case that the absorption wavelength is varied by the effect of the host material composition, or that the second dopant is added in large amount.

Optical waveguide and 1.5 .mu.m-band optical amplifier using same


A method of determining a therapeutic regimen for the treatment of cancer with Dickkopf (Dkk) protein in which a mathematical model of differential equations describing the major signaling pathways involved in stem cell regulation is created and used to simulate signals from the cancer stem cell environment based upon administration of at least a single dose of Dkk in vitro and/or in vivo. A method of modulating cancer stem cells is also provided in which the stem cell computer model is simulates the effect of Dkk and performs a calibration test to determine a threshold value above which Dkk induces cell differentiation and a threshold value below which Dkk induces stem cell proliferation.

Breast cancer is the most prevalent cancer among women worldwide [Parkin D M et al, CA Cancer 1− Clin. 55(2):74-108 (2005)]. To date conventional therapies for breast cancer such as surgery, chemotherapy and radiotherapy resulting in effective remission and diminishing risk of recurrence are still lacking. In the past few years accumulated data has indicated many solid tumors to be induced by cancer stem cells (CSCs) located within the tumor, denoted as "side population". These side populations preserve their capacity to proliferate and undergo self renewal [Seo D C et al, Mol Cancer, 6(1):75 (2007)]. In breast cancer cell lines (2%) of the cells suspected as CSCs [Kopper and Hajdu, Pathol Oncol Res. 10(2):69-73 (2004)]. CSCs are difficult to treat due to the unique features they comprise. The CSCs contain an increased number of multi-drug resistant transporter proteins which pump out chemotherapeutic drugs from the cells. This characteristic is manifested by the pumping out of Hoechst 33342 and Rhodamine-123 dies from the cells. Also, the CSCs were shown to be more resistance to radiation [Woodward W A et al, 1− Cell Sci. 118 (Pt 16): 3585-94 (2005)]. Thus, understanding the molecular mechanisms governing CSCs fate decisions may allow for their divergence from proliferation to differentiation.
Two main signaling pathways have been suggested to play an essential role in inducing tumorigenicity in mammary cancer stem cells, the Wnt and the Notch signaling pathways. The Wnt signaling pathway has been suggested to play a role in oncogenesis of numerous types of cancers including colon, leukemia, melanoma and breast [Reya T and Clevers H Nature 434, 843-850, (2005), Brennan K R and Brown A M, J. Mammary Gland Biol. Neoplasia 9, 119-131 (2004)]. The Wnt signaling pathway is initiated by the binding of Wnt ligands to the Frizzled/LRP transmembrane receptors. As a result, the complex Axin/APC/GSK3beta which is involved in beta catenin degradation is inhibited resulting in beta catenin translocation and accumulation in the nucleus. Beta catenin together with the transcription factors LEF/TCF bind to the target genes promoters and induces transcription of genes such as cyclin D1 and c-myc which induce cell proliferation. In the absence of nuclear beta catenin, LEF/TCF, the transcription repressor Groucho and the histone deacetylases comprise a transcription repressive complex that acts to repress the expression of the Wnt target genes which may lead to cellular Differentiation.
The Wnt signaling pathway is modulated by the Dickkopf (Dkk) family proteins. Dkk family proteins consist of 4 members (Dkk1 to Dkk4). Dkk1, Dkk2 and Dkk4 have been previously suggested to play a predominantly inhibitory role in the regulation of the Wnt pathway and increase cell differentiation [Aguilera O et al, Carcinogenesis, 28(9):1877-84 (2007)]. However, recently accumulated data have indicated that Dkk2 may in fact activate the Wnt pathway [Niehrs C, Oncogene 25, 7469-7481 (2006)] and/or induce cell proliferation [Gregory C et al, J Biol Chem, 278(30):28067-78 (2003)]. In the canonical mechanism Dkk1 binds the LRP5/6 receptor at the plasma membrane, induces its internalization and thus prevents the binding of Wnt to the receptor [Niehrs C, Oncogene, 25, 7469-7481 (2006)], which results in Wnt signaling pathway inhibition.
In the recent years, large body of evidence has indicated Dkk family genes as tumor suppressor genes. Dkk are frequently silenced due to promoter hypermethylation in cancer cell lines such as gastrointestinal and other tumors [Sato H, Carcinogenesis, 28(12):2459-66 (2007)]. Moreover, ectopic expression of Dkk in various cancer cell lines resulted in sensitization to apoptosis [Mikheev A M et al Biochem Biophys Res Commun. 352(3):675-80 (2007), Mikheev A M et al Carcinogenesis 25(1):47-59 (2004)]. Ectopic expression of Dkk was also shown to reduced tumorigenity of cancer cell lines [Mikheev A M, et al, Carcinogenesis 25(1):47-59 (2004)].
Another major signaling pathway involves in cancer stem cell is the Notch pathway. Following the binding of Delta, Serrate, Lag-2 (DSL) ligand to Notch receptor, Notch receptor is undergone a series of proteolitic cleavages by several metalloproteases such as, A Disintegrin And Metalloproteinase (ADAM), ADAM 10 and ADAM 17, resulting in the release of Notch intracellular domain (NICD). NICD fragment translocates to the nucleus, where it up-regulates gene expression such as Hes and Hey [Wu F et al, Front Biosci, 12:4370-83 (2007)]. Notch signaling pathway can be inhibited by Numb which binds the intracellular domain of Notch receptor leading to its recruitment into endocytic vesicles [Berdnik D et al, Dev. Cell, 3 (2):221-31 (2002)].
The Notch and the Wnt signaling pathways are cross-talk. In the promoter region of Numb two TCF/LEF binding sites have discovered and thus it was suggested to be a target for the Wnt pathway [Katoh M and Katoh M, Int J Mol Med. 18(3):517-21 (2006)]. In addition, activation of LEF/TCF up-regulate the Notch ligand Jag 1 (Katoh M and Katoh M Int J Mol Med, 17(4):681-5 2006).
Another important aspect concerning cancer stem cells is the effect of cell-cell contact formed by the adhesion molecule E-cadherin. Changes in E-cadherins expression may indicate cell condition. During cell differentiation the expression of E-cadherins is enhanced whereas deregulation of E-cadherins has been linked to lose of tissue organization and carcinogenesis. E-cadherin influences other signaling pathways such as the Wnt pathway: E-cadherin is connected to the cytoskeleton via beta catenin, which has a pivotal role in inducing cell proliferation as mentioned above, and thus represses transcription initiation, induced by the beta catenin/LEF/TCF complex.
Biological systems include complex interactions and relationships. This complexity often disturbs concise and accurate analysis of test results. Regarding the present invention, CSCs are hard to isolate and identify. Moreover, the role of SCs in solid tumors is controversial and the understanding of universal laws concerning SCs proliferation are lacking. Thus, in silico experimentations using mathematical models may overcome these shortcomings in the study of CSCs, the factors governing their cellular fate and their involvement in tumor formation, progression and recurrence.
In [Agur Z et al, J. Math. Biol. 44, 79-86 (2002), Agur Z et al, a simple discrete model for a developing tissue was put forward and analyzed. Analysis of this model, which is represented by cellular automata on a connected, locally finite undirected graph, shows the minimal number of basic properties responsible for maintaining tissue homeostasis and guaranteeing the ability of a few stem cells to repopulate the tissue after severe perturbations. Thus it is proven theoretically that a Quorum Sensing type of control, that is, regulation of proliferation/differentiation balance by a negative feedback of SCs on their own proliferation, suffices for ensuring homeostasis both in normal and in pathological tissues. However, the molecular mechanism underlying this control still remains to be investigated.
The present invention is aimed at elucidating the molecular mechanism governing SCs and CSCs fate decisions and to identify the crucial factor, whose modulation can divert them into final differentiation. A mathematical model was constructed illustrating the major signaling pathways involved in mammary CSCs cell fate. Moreover, the mathematical model integrates also signals from the CSCs environment. Mathematical analysis of this model shows that SC niche can be formed spontaneously in the tissue, rather than requiring external delimiting structures, as is currently thought [Kirnasovsky O. U, et al Math. Model. Nat. Phenom. 3, 7, 78-89 (2008)]. Moreover, the previous assertion that homeostasis in developing tissues is mainly controlled by a negative feedback on SCs proliferation, denoted Quorum Sensing, is substantiated by this analysis, singling out the Dkk signal in the Wnt pathway as the Quorum Sensing "counter." The analysis further suggests the relative dominance of the involved biochemical pathways in different tissue conditions.

Therapeutic implications of dickkopf affecting cancer stem cell fate


A system for the secure communication of a message from a transmitting user to a receiving user using a split key scheme. Each user generates a key component using a cryptographic engine. The key component is a pseudorandom sequence of bits with an appended error detection field which is mathematically calculated based on the pseudorandom sequence. This key component is then sent out on a communications channel from the transmitting user to the receiving user. The receiving user also sends its key component to the transmitting user. Each location performs a mathematical check on the key component received from the other location. If the key component checks pass at both locations, the transmit key component and the receive key component, including the error detection fields, are combined at both locations, forming identical complete keys at both locations. The identical complete keys are then used to initiate the cryptographic engines at both locations for subsequent encryption and decryption of messages between the two locations.

1. Field of the Invention
The present invention relates generally to cryptographic systems and more particularly to a novel technique and apparatus for encrypting all forms of electronic communication without using a public key of any type.
2. Description of the Background Art
While the specter of "spies" eagerly trying to obtain the defense information of various countries is very much still present in the defense and intelligence community, an equally serious threat is now presented by technological or commercial "spies" who desire to obtain commercial and technical proprietary information from competing companies. These agents use sophisticated means similar to those used by the defense and intelligence community in order to obtain commercially valuable information that reveals the plans and commercial activities of competitors, allowing the aggressor company to obtain a competitive advantage in the marketplace. Theft of commercially valuable information is a very real and ever-present threat.
To combat this type of commercial spying, various complex systems have evolved to protect proprietary company information. These systems involve physical controls over personnel as well as over the data flowing in and out of a company. For example, most computer systems used within companies require a password to be entered before the system can be accessed. It is frequently the case that confidential or proprietary company information must be passed electronically from one location to another in order to convey that information within the company in a timely fashion. Such electronic communication is easily susceptible to interception if not protected in some form in addition to password protection.
Encryption of data is a critical requirement in denying access to confidential information from those who are not so authorized. Cryptographic systems have evolved to fill the needs of companies and individuals wanting to protect the proprietary commercial information of a company from competitors and from those who generally should not have that information. Cryptographic "keys" are an essential part of the information encryption process. The cryptographic key, or "key" for short, is a sequence of characters represented by bytes of information which is manipulated by a cryptographic algorithm to transform data from plain (readable) text to a series of unintelligible text or signals known as encrypted or cipher text. The key is then used by the receiver of the cipher text to decrypt the message back to plain text. However, for two people to communicate successfully using keys, each must use the same key or inverse keys to encrypt the message being sent and to decrypt that message when received, assuming that the same encryption/decryption algorithm is used on both ends of the communication.
Various methods have evolved to manage the distribution of keys, known as "key management". For two people to communicate securely using conventional cryptography, those two persons must not only possess compatible cryptographic equipment, they must also have identical keys. Further, those keys must be kept secret from anyone not in a position of confidence with the two communicators and must be changed periodically to guard against compromise. In addition to the protection of the keys themselves, selecting the proper key sequence and increasing the frequency with which the key sequence is changed can enhance the security of this type of protection. The function of key management is the process of generating, distributing, changing, replacing, storing, checking on, and destroying cryptographic keys. This is a critically important function.
Two major key management schemes have been developed over the years and are in use at the present time: classic pair-wise distribution and public key distribution. Both of these forms of key management have drawbacks. Distributing classic pair-wise key information is typically accomplished through the use of a courier service. The keys for a particular key time period, such as a day, an entire series of days, or any time period during which a particular key is valid, are delivered in printed, punch tape, electronic, or other form to a number of locations. Either a courier travels to all locations from a central key distribution site or couriers from the individual sites travel to a central location to pick up the keys. During any particular key time period, the same key is used by all cleared parties within the communications network, allowing messages to be encrypted and decrypted using that particular key. One drawback to the security of this type of distribution scheme is that it is based on trust. Any couriers used must be trusted, as they play an integral part of the authentication process. Also, to distribute keys effectively in a network requires that a matrix architecture be implemented to track user connectivity. The more subscribers to the network there are, the more complex the key matrix will be and the more difficult it is to maintain key management among changing users, since it is frequently the case that not everyone in a network will be using the same keys.
Sometimes more than one key is necessary in a classic key distribution scheme. In a single key system, anyone within a network who has the key is privy to any communication within the network. If one member of the network wants to transmit a communication to only one other particular member, the single key will afford him no protection from others in the network because everyone within the network shares the same key and can decrypt the message. Likewise, if someone wants to communicate a message to a subset of the network, that is, to a particular group within the network, the single key would provide her with no extra security. In these and other cases, multilevel key access, or multiple keys, would provide a solution, albeit one that is quite unwieldy, inflexible, and difficult to manage by a key administrator. The cost of maintaining this matrix of keys, using the courier service, and risking the possibility that the courier system may be compromised are major drawbacks that have led to the creation of a modified classic distribution scheme.
The modified classic distribution scheme also uses a courier for key distribution. However, the courier does not deliver the keys that are used to encrypt the files. Instead, the courier delivers a distribution key which is used to encrypt other keys that are in turn used to encrypt the files. In this way, the courier alone cannot compromise the network. This scheme offers the advantage of allowing the changing of the file key more frequently than in the classic scheme previously described. The disadvantage of the modified classic distribution scheme is that a compromise of the distribution key is far more serious than in the ordinary classic scheme since a compromise affects a collection of file keys and therefore a larger base of protected files.
A method that has evolved to overcome some of these problems involves a public key distribution scheme. Such a public key distribution scheme is disclosed in U.S. Pat. No. 4,218,582 to Hellman et al. A public key cryptographic system employs more than one key for encryption and decryption of messages or data. One of the keys is private and only held by two parties or a subgroup of parties within a network. The other key is public, that is, available to everyone within the network. All communications within the network are encrypted using the public key. In addition, the private key is used to further encrypt messages between two parties or within a subgroup of the network. Confidentiality of the message is preserved since no one without the private key can decipher the message. In public key cryptography, the public and private keys are generated by an algorithm based on a discrete exponential function, the arithmetic of which is computed in modulo P, where P is a very large prime number. The security of such a system rests on the fact that one key is privately held, and that it is computationally infeasible to determine the resulting discrete logarithmic function without knowledge of the private key. One drawback of the public key system is that the algorithm must be based on a very large prime number in order to ensure the integrity of the communication. Primitive elements of the algorithm must satisfy a particular relationship with the prime number. Such primitive elements are known to always exist, but limit and complicate the task of implementing the algorithm.
An alternative to the public key system is a private key system known as a symmetric key system which is a cryptographic system using the same key for both encryption and decryption. This key is transmitted from the sender to the receiver over a secure channel in parallel with the encrypted message. One particular symmetric key system is known as the data encryption standard or "DES" which is published by the National Institutes of Science and Technology. The DES was originally specified for the encryption of sensitive government information unrelated to national security. The DES uses a sixty-four byte key, fifty-six of which are independent bytes and eight bytes which may be used for parity checking. The DES was first publishing in January 1977 in FIPS-PUB-46 which is available from the National Technical Information Service.
U.S. Pat. No. 4,405,829 to Rivest et al. discloses an example of a product key system. A product key system is implemented using a succession of simple keys, each of which adds a small amount of encryption that does not provide sufficient practical security. The cumulative effect of the application of successive keys, however, provides adequate secure encryption for a transmitted message. Like the algorithm used in public systems, the key in the Rivest et al. system is based on an exponential function and prime number relationships. U.S. Pat. No. 4,424,414 to Hellman et al. also discloses a cryptographic system utilizing an exponential function.

Cryptographic key management method and apparatus


The subject is an apparatus for consecutively marking a plurality of packaged semiconductor devices such as ICs by using a laser beam marker. A plurality of packaged semiconductor devices are put into a tubular holder so as to form a single file. The tubular holder is generally rectangular in cross-sectional shape and has a lengthwise opening in the upside wall. The tubular holder is placed on a conveyor belt and secured to the conveyor belt by guide belts each of which makes tight contact with the upside wall or one of the side walls of the tubular holder and advances in the same direction as the conveyor belt. On the conveyor belt the tubular holder passes a marking station where a laser beam is projected on the semiconductor devices in the holder one after another. The apparatus includes a computarized controller to automatically control the positions of the conveyor belt and the guide belts according to the width and height of the tubular holder. In changing the object of marking to another kind of semiconductor device there arises a change in the width and/or height of the tubular holder, but the positions of the conveyor belt and the guide belts can quickly be adjusted by the function of the controller.

This invention relates to a marking apparatus for consecutively marking a plurality of packaged semiconductor devices.
In the commercial production of ICs and many other semiconductor devices the final step is making markings on each semiconductor device which is already packaged. It is prevailing to use a laser beam marker.
Packaged semiconductor devices are transferred to a feeding station precedent to a marking station usually by using tubular holders in each of which a plurality of semiconductor devices are received in a single file. In the case of a conventional marking apparatus, at the feeding station one of the tubular holders is set lengthwise at an end of a chute to release the semiconductor devices into the chute in a file. The chute extends to a turntable which is a part of the marking station. The turntable has a plurality of radially arranged receptacles each of which accepts one of the semiconductor devices transferred by the chute. The turntable stops rotating when any of the receptacles arrives at a marking position, and a laser beam is projected from a laser beam marker on the upside face of the semiconductor device held in that receptacle. By subsequent rotation of the turntable the receptacle holding the already marked semiconductor device comes into alignment with another chute which extends to a receiving station, and the semiconductor device is released into the chute as the turntable stops rotating. In the receiving station a plurality of marked semiconductor devices are put into a tubular holder in preparation for transfer to another station.
In the above described apparatus the dimensions of the tubular holders, chutes and the receptacles of the turntable correspond to the dimensions of a packaged semiconductor device of a specific kind. Therefore, when the object of marking is changed to another kind of semiconductor device there is the need of adjusting the tubular holder handling parts in the feeding and receiving stations, replacing some of such parts and replacing the chutes and the turntable. Usually it takes about 1 hr to accomplish such adjustment and replacement of parts. This is an obstacle to enhancement of a net working rate of the marking apparatus. Besides, the marking operation using the turntable cannot be regarded as sufficiently high in productivity in view of the fact that the operation time for each semiconductor device amounts to about 1.0 to 1.5 sec.

Apparatus for marking semiconductor devices


The present invention relates to methods of making a flexible mold from a polymerizable resin composition, the flexible mold, the polymerizable resin composition, as well as methods of using the flexible mold.

Advancements in display technology, including the development of plasma display panels (PDPs) and plasma addressed liquid crystal (PALC) displays, have led to an interest in forming electrically-insulating barrier ribs on glass substrates. The barrier ribs separate cells in which an inert gas can be excited by an electric field applied between opposing electrodes. The gas discharge emits ultraviolet (UV) radiation within the cell. In the case of PDPs, the interior of the cell is coated with a phosphor that gives off red, green, or blue visible light when excited by UV radiation. The size of the cells determines the size of the picture elements (pixels) in the display. PDPs and PALC displays can be used, for example, as the displays for high definition televisions (HDTV) or other digital electronic display devices.
One way barrier ribs can be formed on glass substrates is by direct molding. This has involved laminating a mold onto a substrate with a glass- or ceramic-forming composition disposed therebetween. The glass or ceramic-forming composition is then solidified and the mold is removed. Finally, the barrier ribs are fused or sintered by firing at a temperature of about 550° C. to about 1600° C. The glass- or ceramic-forming composition has micrometer-sized particles of glass frit dispersed in an organic binder. The use of an organic binder allows barrier ribs to be solidified in a green state so that firing fuses the glass particles in position on the substrate.
The mold for producing the barrier ribs may be a flexible mold. The flexible mold may comprise a support and a shape-imparting layer comprising the reaction product of at least one urethane acrylate oligomer and at least one (meth)acryl monomer as described PCT Publication No. WO2005/021260. The flexible mold may be produced from a transfer mold having substantially the same microstructured pattern as the eventual barrier ribs.
Although various transfer molds and flexible molds suitable for use in the molding of barrier ribs have been described, industry would find advantage in new methods and molds.

Flexible mold comprising cured polymerizable resin composition