A metal sheet bending machine for bending a metal sheet inserted between an upper bender and lower bender to a desired angle. While the metal sheet is being bent to the desired angle, a linear image of projected measuring light, which rotates with a change in time bending angle of the metal sheet, is formed by a measuring light source on an outer face of the bent metal sheet and sequentially photographed and stored. Based on the stored images, the bending angle of the metal sheet is calculated. Based on the result of the calculation, the positions of the upper and/or lower benders are controlled whereby the metal sheet can be bent to the desired angle. The bending angle of the metal sheet may be obtained based on the rotating angle of the linear image of projected measuring light formed on the photographed images, or based on an angle formed by the linear image of projected measuring light and a linear image of projected reference light formed by a reference light source for projecting light onto the outer face of the metal sheet while the metal sheet is being bent to the desired angle so as to form the linear image at a desired fixed angle irrespective of the bending angle.

Conventional detection mechanisms for detecting the bending angle of a metal sheet, provided in metal sheet bending machines are broadly classified into two major categories, namely, contact and non-contact.
An example of a detection mechanism of the contact type is set out in Japanese Patent Publication Laid-Open No. 1-273618 (1989). The above disclosure teaches a continuous follow-up angle detection device to which a rectangular link is applied and wherein the inclination of a probe in contact with the inclined surface of a metal sheet is read by an encoder provided within the link mechanism, thereby detecting the bending angle of the metal sheet.
In a widely known detection mechanism of the non-contact type, by the use of a plurality of range sensors, the distance from each sensor to a bent metal sheet is detected and the difference between the respective distances is obtained, thereby detecting the bending angle of the metal sheet. Examples of the above detection mechanism are disclosed in Japanese Patent Publication Laid-Open No. 63-49327 (1988), No. 64-2723 (1989) and No. 1-271013 (1989). As the range sensors, the first mechanism employs eddy-current sensors, the second employs electrostatic capacitance sensors, and the third employs optical sensors.
Such a bending angle detection mechanism of the contact type as disclosed in Japanese Patent Publication Laid-Open 1-273618 (1989) requires that the bent legs of a metal sheet should be comparatively long in order to ensure high measurement accuracy, and it is therefore difficult to apply this mechanism to a metal sheet with short legs. It has other problems in that the long use of the mechanism causes the probe to wear and to be deformed because of the long contact with the metal sheet, resulting in the deterioration of the measurement accuracy, and the space required for measurement is restricted by the lower bender. Furthermore, in the case of a thin metal sheet to be bent, the metal sheet is prone to be deflected being in contact with the probe. This also makes it difficult to ensure accuracy in the detection of the bending angle.
In the bending angle detection mechanisms of the non-contact type wherein eddy-current sensors are employed as taught by Japanese Patent Publication Laid-Open No. 63-49327(1988), or electrostatic capacitance sensors are employed as taught by Japanese Patent Publication Laid-Open No. 64-2723(1989), the output varies according to the material of a metal sheet to be bent. and therefore measuring conditions have to be altered whenever different materials are used. In the mechanism of Japanese Patent Publication Laid-Open No. 1-271013(1989) wherein optical sensors are employed, illuminated light is diffused in some surface conditions of a metal sheet. This causes large measurement errors and the deterioration of the measurement accuracy.
One of the present invention is therefore to overcome the above problems by providing a metal sheet bending machine for bending a metal sheet to a desired angle, which is capable of detecting a bending angle with high accuracy during the bending process irrespective of the length of the bent legs of the metal sheet, even if metal sheets made of different materials are used.


A rapid simulation is made to create an illuminated scene of object with a simplified arithmetic of calculating an intended color change effect. The object illuminated with lighting fixtures are divided into discrete elements each having a lamp-by-element table defining lamp color component values of each of the influencing lighting fixtures. In accordance with the changes in the output characteristic and/or the position of the lighting fixture, it is determined which one or ones of the discrete elements are influenced by the changes. Then, the lamp-by-element tables only associated with thus determined elements are picked up in order to modify the color component values as a function of the changing output characteristic and the position of the influencing lighting fixture. The resulting color components at each discrete element are then processed to provide a color distribution over the array of the elements for rendering the view of the illuminated scene.

There have been proposed methods for simulating a three-dimensional illuminated scene with moving lighting fixtures. Typical methods are radiosity technique and laytrace technique both of which rely upon considerably complex arithmetic and therefore suffer from a delay in reproducing the illuminated scene, particularly with the use of a readily-available computing equipment. Because of this insufficiency, the above methods are practically limited to the reproduction of one still image of the illuminated scene, and are not well adapted for reproduction of dynamic image of the varying illuminated scene.

Simulation method, program, and system for creating a virtual three-dimensional illuminated scene


A step-down switching voltage regulator with a push-pull output stage is adapted to provide a voltage converter with an auxiliary voltage rail that supplies an auxiliary voltage that is higher than the input supply voltage. The push-pull output stage of the step-down voltage regulator is used to drive a charge pump voltage-doubler circuit. In this way, a single integrated topology provides a regulated low voltage output as well as an auxiliary high voltage output. The circuit topology enables a low component count resulting in lower component cost and smaller physical size.

This is the first application filed for the present invention.
Not applicable.
The present invention relates to voltage converters and, in particular, to a dual-output voltage converter that provides a regulated low voltage output as well as an auxiliary high voltage output.
Many computer peripherals are powered from a single fixed DC voltage power supply and use step-down switching voltage regulators to supply lower voltages for driving logic circuits. A step-down switching voltage regulator, more commonly known in the art as a xe2x80x9cbuckxe2x80x9d converter, converts an applied input voltage to a lower output voltage. The output stage of a synchronous buck converter typically includes a pair of switches coupled in series across the input voltage supply. One switch, the voltage switch, is coupled to the voltage supply and the other switch is connected to ground. An output filter typically including an inductor and a capacitor is connected to a junction formed by the pair of switches. The capacitor is responsible for reducing the ripple content in voltage across it, whereas the inductor smoothes the current passing through it. The combined action of the LC filter, therefore, reduces the ripple content in the output voltage supplied to a load connected to the buck converter. Typically, feedback from the output of the LC filter is provided to a controller which drives the switches to connect the output filter to the voltage supply or to ground in order to maintain the output voltage at some predetermined low voltage level.
At the same time, however, some applications require a higher voltage than available from the voltage supply to power linear (analog) devices. In this respect, battery-powered equipment use DC/DC step-up converters to generate auxiliary supply voltages for internal circuits that require higher voltages than the available battery voltage. The conventional approach is to use either a switched capacitor voltage booster (i.e. charge pump) or an inductive step-up converter (also called boost converter). Boost converters have a high efficiency over the entire input voltage range. Charge pumps, on the other hand, provide a high efficiency over selected input voltage ranges. Since their design does not require any knowledge of magnetics, charge pumps are much easier to design and implement. In either case, however, such auxiliary high voltage generators usually require the use of a dedicated integrated circuit to provide the boosted voltages.
FIG. 1 illustrates a simplified schematic of a conventional voltage converter 10 used for providing a regulated low voltage output (RLVO) as well as an auxiliary high voltage output (AHVO) from a single applied DC input voltage VIN. The input voltage VIN is received at an input terminal 11 and supplied separately to a step-down or xe2x80x9cbuckxe2x80x9d integrated circuit voltage regulator VR1 and to a charge pump voltage doubler circuit VR2. The step-down integrated circuit voltage regulator VR1 includes a circuit block 12, which includes a pair of switches S1 and S2 connected in series between the input terminal 11 and ground. Control circuitry for driving the switches S1 and S2 is not shown but understood to be embodied by the circuit block 12. An output filter that includes an inductor L and a capacitor C is connected at the junction between the pair of switches S1 and S2. The junction between the inductor and capacitor of the output LC filter provides the regulated low voltage output (RLVO). A feedback path 14 is further provided from the output of the LC filter to the circuit block 12 to permit the control circuitry to appropriately drive the switches S1 and S2, so that a constant regulated low voltage output may be maintained.
The charge pump voltage doubler circuit VR2 includes a circuit block 16, which includes a pair of switches S3 and S4 connected in series between the input terminal 11 and ground. The associated control circuitry for driving the switches S3 and S4 is not illustrated but understood to be embodied within the circuit block 16. A first stage of the charge pump circuit VR2 includes a first diode D1 and a first capacitor C1. The input terminal 11 is connected via the first diode D1 to one electrode of the first capacitor while the other electrode of the first capacitor C1 is connected to a junction between the pair of switches S3 and S4 of the circuit block 16. A second stage of the charge pump circuit VR2 includes a second diode D2 and a second capacitor C2. A junction between the first diode D1 and first capacitor C1 is connected via the second diode D2 to one electrode of the second capacitor C2. The other electrode of the second capacitor C2 is connected to ground. The junction between the second diode D2 and second capacitor C2 of the charge pump circuit VR2 provides the auxiliary high voltage output (AHVO).
The step-down voltage regulator VR1 and charge pump VR2 depicted in FIG. 1 are standard circuit topologies whose operation is well known to those skilled in the art and, as such, will not be detailed.
As seen in FIG. 1, a dedicated switched-capacitor voltage booster or charge pump circuit VR2 is needed to provide an auxiliary high voltage output from the single input DC voltage VIN applied to the step-down voltage regulator VR1. Alternatively, an inductive booster may be employed. Either approach, however, requires the use of a dedicated integrated circuit with associated control circuitry to provide an auxiliary boosted voltage from a single applied DC input voltage. This leads to a high component count resulting in higher cost while preventing improvement in integration density.
It is therefore an object of the present invention to provide a voltage converter that integrates the functions of both a step-down voltage regulator and a charge pump into a single device.
A further object of the present invention is to provide a voltage converter capable of generating both a regulated low voltage output as well as an auxiliary high voltage output from a single applied input DC voltage.
Thus, an aspect of the present invention uses the inherent properties of a conventional step-down or xe2x80x9cbuckxe2x80x9d switching voltage regulator with a push-pull output stage to provide an auxiliary output voltage higher than the applied input voltage. Specifically, the push-pull output stage of the step-down voltage regulator is used to drive a charge pump voltage doubler circuit. Advantageously, the novel circuit topology of the present invention provides a low component (i.e. two diodes and two capacitors) count resulting in lower component cost and smaller physical size.

Dual-output direct current voltage converter


A method of drilling a circuit substrate. A circuit substrate including at least a core layer and a metal layer covering one or both surfaces of the core layer is provided. A half-etching process is performed by etching the metal layer on the circuit substrate with an etchant to reduce the thickness of the metal layer. A surface treatment on the surface of the metal layer A via is formed in the circuit substrate by laser.

1. Field of the Invention
The present invention relates to a method of drilling a circuit substrate. More specifically, the present invention relates to a method of ablating an IC circuit substrate by laser.
2. Description of the related art
A laminated board is the substrate often used as a printed circuit board and an IC package substrate in current electronic-related industries. With the demand for increased integration of electronic products, the electronic products are designed to be smaller in size, lighter in weight and to have high performance. Accordingly, it is necessary to obtain a laminated board having an increased density, a decreased thickness, a reduced pitch between circuits and a smaller through hole.
FIGS. 1A to 1C are schematic, cross-sectional views of a conventional process of fabricating a circuit substrate are shown.
As shown in FIG. 1A, an inner substrate 104 having two circuit layers 102 is shown. The circuit layer 102 can be formed on both surfaces of an insulating layer 100 by photolithography and etching process.
As shown in FIG. 1B, an oxidation is carried out on the inner circuit layer 102 to form oxides thereon. That is, the surfaces of the inner circuit layer 102 are oxidized to make the surface thereof coarser, so that the adhesion of the inner circuit layer 102 to an insulator(s) is enhanced. Each side of the inner substrate 104 is provided with an adhesive 106 and a copper foil 108. Then, laminating is carried out for formation of another circuit layer in the subsequent step. It is noted that the adhesive 106 and the inner circuit layer 102 are bonded and cured before formation of another circuit layer in the subsequent step. However, the adhesive 106 and the inner circuit layer 102 are bonded only by pressing the adhesive 106 toward the inner circuit layer 102 with heating, which is known as thermal pressing, and by cooling while pressing, which is known as cool pressing.
As shown in FIG. 1C, a through hole or a guide hole 120, which is used for connection or installation, is formed at the position where a component is to be installed, and layers are communicated with each other, which is a step called drilling. After drilling, the insulating layer 100 becomes an insulating layer 110. After drilling, the inner circuit layer 102 becomes an inner circuit layer 112. After drilling, the copper foil 108 becomes copper foil 118. A plating through hole (PTH) is formed by plating the via 120 with copper to form a copper foil 122 in the via 120. The copper foils 118 and 122 are etched by using a mask to form an outer circuit layer. In the case of a four-layered laminate, a solder mask is applied on the outer circuit layer to expose the portions where other components are connected. Finally, a solder layer is formed on portions exposed from the solder mask on the outer circuit layer so as to protect the copper surface from being oxidized and increase the adhesion to the solder layer when soldering. Therefore, the portions having a solder mask applied will not be contaminated with the solder, and a short circuit can be thus avoided.
The formation of the via 120 can be achieved by drilling using drilling gimlets. However, the use of drilling gimlets has some disadvantages such as poor availability, high price, easily breakable, and difficulty in controlling the depth of the via. Drilling using punches always generates burrs. In the case of ablating using a CO2 laser, the depth of ablating is limited due to the lower energy of the CO2 laser. In the case of UV YAG laser ablating, the ablating speed is limited since a small beam size for the laser is used in the UV YAG laser ablating. In general, a positioning hole is first defined in the outer copper layer by photolithography and etching to expose part of the insulating layer. Then, the insulating layer exposed by the positioning hole is ablated through laser until the insulating layer is penetrated. If photolithography and etching are used in combination with laser ablating, then some disadvantages are generated, such as a complicated process, inconstant precision of forming a via, higher cost, and the difficult formation of a micro-via with a size that is less than 4 mil.
It is one object of the present invention to provide a method of ablating a circuit substrate to resolve problems such as limited speed of YAG laser ablating and to increase the alignment of the inner layer in a built-up process.
It is another object of the present invention to provide a method of ablating a circuit substrate. The process comprises at least providing a circuit substrate that at least includes a core layer and a metal layer covering one or both surfaces of the core layer. A half-etching process is carried out to etch the metal layer on the circuit substrate with an etchant to partly reduce the thickness of the metal layer. Then, the metal layer is subject to a surface treatment in order to increase the absorption of the laser. A via is formed in the circuit substrate by laser ablating.
According to one preferred example of the present invention, the core layer is formed by alternately superposing a plurality of insulating layers and a plurality of patterned circuit layers. In the method of drilling a circuit substrate according to the present invention, CO2 laser ablating with high energy is used and the copper foil is subject to a surface treatment to increase the absorption of the laser. Accordingly, disadvantages in the prior art, such as limited depth in a conventional CO2 laser ablating and limited speed in the conventional YAG laser ablating, can be prevented. Since the copper foil and the insulating layer are ablated directly in the method of the present invention, the process can be thus simplified. Meanwhile, the precision of forming a via is not affected by the expansion/contraction and exposure of the metal layers, thereby improving the alignment.

Advanced Semiconductor Engineering Material, Inc.

Advanced Semiconductor Engineering, Inc.


A bonded ceramic-metal composite substrate comprising a ceramic substrate having opposite surfaces and a copper sheet having a face directly bonded to one of the surfaces of the ceramic substrate, characterized in that the Vickers hardness of the copper sheet lies in the range from 40 kg/mm.sup.2 to 100 kg/mm.sup.2.

This invention relates to a bonded ceramic-metal composite substrate comprising a copper sheet directly bonded to a ceramic substrate, to a circuit board constructed of such a bonded composite, and to methods for their production.
In recent years, attempts have been made to develop bonded ceramic-metal composite substrates for use in electronic devices. For example, a capacitor element bonded to a ceramic aluminum nitride substrate is disclosed in Scace et al., U.S. Pat. No. 3,716,759. Direct bonding of metal sheets to ceramic substrates is also described in Hill, GB 2,099,742 and Jochym, U.S. Pat. No. 4,409,278, whereby channels are provided in the metal or ceramic substrate in order to avoid blistering by permitting gas escape during the bonding. Some of these attempts have involved disposing a metal sheet such as copper on a ceramic substrate and directly bonding the copper sheet to the substrate by heating at a temperature below the melting point of copper (1083.degree. C.) and above the eutectic point of copper and oxygen (1065.degree. C.).
This kind of composite has several advantages. It provides a strong adhesion between the conductive metal sheet and the ceramic substrate. It also provides a simpler structure which can be easily utilized to obtain a smaller circuit board. And it provides a potentially simpler method for producing a circuit board.
However, in attempting to use ceramic-copper substrates prepared in the foregoing manner in circuit boards for transistor modules, the present inventors found that some of them did not work correctly and others did not work at all. Thus, there is a need for bonded ceramic-copper substrates which will produce more reliable electronic devices.

Bonded ceramic-metal composite substrate, circuit board constructed therewith and methods for production thereof


A liquid crystal display (LCD) system, comprising a matrix of pixels, analyzes a video data stream for grayscale level jumps from extreme black to moderate gray levels. Transitions in grayscale levels are restricted between adjacent pixels so as to reduce image degradation due to fringe field effects. A memory, such as a plurality of shift registers, may be used to store grayscale levels of adjacent pixels which are compared and if a ratio between these grayscale levels exceeds a desire value then at least one of the grayscale levels is modified.

The present invention relates generally to liquid crystal display (LCD) devices, and more particularly to a system, apparatus and method for improving image quality by limiting the difference between gray scale values of adjacent pixels.
Liquid crystal displays (LCDs) are commonly used in devices such as portable televisions, portable computers, control displays, and cellular phones to display information to a user. LCDs act in effect as a light valve, i.e., they allow transmission of light in one state, block the transmission of light in a second state, and some include several intermediate stages for partial transmission. When used as a high resolution information display, as in one application of the present invention, LCDs are typically arranged in a matrix configuration with independently controlled display areas called xe2x80x9cpixelsxe2x80x9d (the smallest segment of the display). Each individual pixel is adapted to selectively transmit or block light from a backlight (transmission mode), from a reflector (reflective mode), or from a combination of the two (transflective mode).
A LCD pixel can control the transference for different wavelengths of light. For example, an LCD can have pixels that control the amount of transmission of red, green, and blue light independently. In some LCDs, voltages are applied to different portions of a pixel to control light passing through several portions of dyed glass. In other LCDs, different colors are projected onto the area of the pixel sequentially in time. If the voltage is also changed sequentially in time, different intensities of different colors of light result. By quickly changing the wavelength of light to which the pixel is exposed an observer will see the combination of colors rather than sequential discrete colors. Several monochrome LCDs can also result in a color display. For example, a monochrome red LCD can project its image onto a screen. If a monochrome green and monochrome blue LCD are projected in alignment with the red, the combination will be a full range of colors.
The monochrome resolution of an LCD can be defined by the number of different levels of light transmission or reflection that each pixel can perform in response to a control signal. A second level is different from a first level when a user can tell the visual difference between the two. An LCD with greater monochrome resolution will look clearer to the user.
LCDs are actuated pixel-by-pixel, either one at a time or a plurality simultaneously. A voltage is applied to each pixel area by charging a capacitor formed in the pixel area. The liquid crystal responds to the charged voltage of the pixel capacitance by twisting and thereby transmitting a corresponding amount of light. In some LCDs an increase in the actuation voltage decreases transmission, while in others it increases transmission. When multiple colors are involved for each pixel, multiple voltages are applied to the pixel at different positions (different capacitance areas being charged of a pixel) or times depending upon the LCD illumination method. Each voltage controls the transmission of a particular color. For example, one pixel can be actuated for only blue light to be transmitted while another for green light, and a third for red light. A greater number of different light levels available for each color results in a much greater number of possible color combinations. Colors may be combined from a red pixel, a green pixel and a blue pixel, each residing on a different LCD, to produce any desired combined pixel color. The three LCDs (red-green-blue or RGB) are optically aligned so that the resulting light from each of the corresponding RGB pixels produces one sharp color pixel for each of the pixels in the LCD pixel matrix. The LCD pixel matrix is adapted for displaying one frame of video per light strobe. Each light strobe (RGB) produces one video frame. A sequence of video frames produces video images that may change over time (e.g., motion video).
Converting a complex digital signal that represents an image or video into voltages to be applied to charge the capacitance of each pixel of an LCD involves circuitry that can limit the monochrome resolution. The signals necessary to drive a single color of an LCD are both digital and analog. It is digital in that each pixel requires a separate selection signal, but it is analog in that an actual voltage is applied to charge the capacitance of the pixel in order to determine light transmission thereof.
Each pixel in the array of the LCD is addressed by both a column (vertical) driver and a row (horizontal) driver. The column driver turns on an analog switch that connects an analog voltage representative of the video input (control voltage necessary for the desired liquid crystal twist) to the column, and the row driver turns on a second analog switch that connects the column to the desired pixel.
The video inputs to the LCD are analog signals centered around a center reference voltage of typically from about 6.5 to 8.0 volts. A voltage equal or close to this center reference voltage is called xe2x80x9cVCOMxe2x80x9d and is supplied to the LCD Cover glass electrode which is a transparent conductive coating on the inside face (liquid crystal side) of the cover glass. This transparent conductive coating is typically Indium Tin Oxide (ITO).
One frame of video pixels are run at voltages above the center reference voltage (positive inversion) and for the next frame the video pixels are run at voltages below the center reference voltage (negative inversion). Alternating between positive and negative inversions results in substantially a zero net DC bias at each pixel. This substantially reduces the xe2x80x9cimage stickingxe2x80x9d phenomena.
LCD technology has reduced the size of displays from full screen sizes to minidisplays less than 1.3 inches diagonal measurement, to microdisplays that require a magnification system. Microdisplays may be manufactured using semiconductor integrated circuit (IC) dynamic random access memory (DRAM) process technologies. The microdisplays consist of a silicon substrate backplane, a cover glass and an intervening liquid crystal layer. The microdisplays are arranged as a matrix of pixels arranged in a plurality of rows and columns, wherein an intersection of a row and a column defines a position of a pixel in the matrix. To incident light, each pixel is a liquid crystal cell above a reflecting mirror. By changing the liquid crystal state, the incident light can be made to change its polarization. The silicon backplane is an array of pixels, typically 10 to 20 microns in pitch. Each pixel has a mirrored surface that occupies most of the pixel area. The mirrored surface is also an electrical conductor that forms a pixel capacitor with the ITO layer as the other plate of the pixel capacitor (common to all pixel capacitors in the matrix of pixels. As each pixel capacitor is charged to a certain pixel value, the liquid crystals between the plates of the pixel capacitors xe2x80x9ctwistxe2x80x9d or xe2x80x9cuntwistxe2x80x9d which affects the polarization of the light incident to the pixels (reflections from the pixel mirrors).
Microdisplays may have an analog video signal input (xe2x80x9canalog displayxe2x80x9d) or a digital video signal input (digital display). Analog displays, generally, are addressed in a raster mode, while the pixels in a digital display may be addressed like a DRAM, in a random order. Random access allows updating only pixels requiring updating, thus saving on processing time and associated power consumption.
A problem exists in small LCDs, especially microdisplays, which have small pixel cell areas compared to the area of the gaps between the pixel cells. Fringe fields between the pixels are therefore significant in magnitude and the area affected by fringe fields is significant with respect to the overall pixel area. This leads to image degradation of increasing severity for small LCDs and high driving voltages. Limiting the driving voltages helps, but reduces the available contrast of the LCD.
The present invention overcomes the above-identified problems as well as other shortcomings and deficiencies of existing technologies by providing a system, method and apparatus for improving image quality of a liquid crystal display (LCD) by modifying the video source values written to the pixels in order to smooth the magnitude of voltage transitions from one adjacent pixel to another. If the voltage transitions between adjacent pixels is too large in magnitude, the large voltage transition can generate a strong fringe field effect between the adjacent pixels.
A liquid crystal on silicon (LCoS) microdisplay is adapted to receive video information from a digital video data source. The LCoS microdisplay may operate, e.g., in a normally white twisted nematic LC mode. A rubbing direction may be selected so that disclinations appear preferably at vertical pixel borders (between columns), e.g., a 60 degree twist self-compensated reflective twisted nematic mode. If a source image with black areas surrounded by light gray areas is displayed, a white line may be observed within a gray area that borders the black area on one side thereof, while on the other side of the black area a white spot may be observed therein. If the source video image for the pixels at the border of the gray/black areas are modified, e.g., a normally black pixel written more toward gray (lighter than black but darker than the normal gray), or a gray pixel written more toward black (darker), then the resulting LCD video image has significantly less image distortion due to fringe effect fields. Such a slight reduction in the blackness of a pixel or reduction of lightness of a pixel next to a black pixel has a strong effect in the applied voltage since the electro-optical response of the liquid crystal has a small gradient close to the saturation voltage for a black pixel.
For exemplary purposes in describing the embodiments disclosed herein, a pixel voltage value (the voltage value charge on the pixel capacitor) representing black may be referred to as black or level A (00h input to an 8-bit DAC), and a pixel voltage value representing white may be referred to as white or level D (FFh input to the 8 bit DAC). Gray levels may be referred to as gray or level C (greater than blackxe2x80x9400h and less than whitexe2x80x94FFh to the 8 bit DAC). 00h is 0 in base 10 and FFh is 255 in base 10.
There is a liquid crystal (LC) defect called xe2x80x9cdisclinationxe2x80x9d on a border where deep black pixels meet brighter (lighter or whiter) pixels. Top and bottom borders generally are not affected, but left and right borders may emit a bright line. A grayshade of 60 (out of 255) at a border of grayshade 10 (out of 255) is hardly noticeable, however, a grayshade (gs) of 60 at a border of grayshade 0 is very noticeable. A solution, according to the present invention, is to display black as gs 0 when it detects a fairly large swath of black. For example, given a gray flatfield of gs 60 with a broad black (grayshade 0) line running vertically across it. If the black line were 20 columns wide, the first few columns may be written, for example but not limited to, gs 15, gs 11, gs 7, gs 4, gs 2, gs 1 and finally gs 0. When coming out of the 20 column wide swath, the last few columns may be written, for example but not limited to, gs 1, gs 2, gs 4, gs 7, gs 11 and gs 15. Simply halving, e.g., dividing by two, the pixel gs values accomplishes the intended purpose of the present invention. Other divide ratios may be effectively used and are contemplated here.
An additional feature of the invention controls at what point the adjacent pixel gs values are xe2x80x9csoftenedxe2x80x9d or rounded. A limit may be defined which is used to restrict the range of gs values being divided by two. For example, if the limit were set to zero, all gs values would pass through the video stream without change. Conversely, if the limit where set to 255, then the divide-by-two operation would occur under all circumstances, e.g., whenever adjacent pixel gs values vary by more than a factor of two. For example an adjacent pixel pair transformation may be represented as follows:
An intermediate limit, e.g., 64, would not affect pixel gs values greater than 64. For example:
In an exemplary embodiment of the invention, eight registers may be used in performing the xe2x80x9cdivide-by-twoxe2x80x9d operations on the pixel gs values. It is contemplated and within the scope of the present invention that more or less than eight registers may be used to perform the divide-by-two operations. One implementation of the xe2x80x9cdivide-by-2xe2x80x9d algorithm may be as follows. Assign the input video pixel stream to 8 registers, A through G:
Gxe2x86x92Exe2x86x92Cxe2x86x92A :Aprmxe2x86x92Aprmdly
Hxe2x86x92Fxe2x86x92Dxe2x86x92B :Bprmxe2x86x92Bprmdly
Where {Bprm, Aprm} are the transformed pixel values at the same time point as {B, A} The arrows indicate where the clock steps are. {Bprmdly, Aprmdly} is just the solution of the previous pixel input which is needed to help in the calculation of Aprm and Bprm. Aprm and Bprm can be solved mathematically by the following:
Amin=MAX{min(H/128), limit/64), min (G/64, limit/32), min(F/32, limit/16), min(E/16, limit/8), min(D/8, limit/4), min(C/4, limit/2), min(B/2, limit), min(Bprmdly/2, limit)}
then if A less than Amin, Aprm=Amin; else Aprm=A
Bmin=MAX{min(H/64), limit/32), min (G/32, limit/16), min(F/16, limit/8), min(E/8, limit/4), min(D/4, limit/2), min(C/2, limit), min(Aprm/2, limit)}
then if B less than Bmin, Bprm=Bmin; else Bprm=B
The above equations may be implemented with digital logic, e.g., FPGA, PLA, ASIC, microcontroller, microprocessor and the like using reduced terms as follows:
term0=maximum(trunc(H/4), trunc(G/2))
term1=minimum(trunc(term0/16), trunc(limit/16))
term2=minimum(trunc(term0dly/4), trunc(limit/4)) (where term0dly is delayed one clock)
term3=minimum(term0dlydly, limit)(where term0dlydly is delayed two clocks)
term4=minimum(trunc(Aprm/2), limit)
term5=minimum(trunc(B/2), limit)
term6=minimum(trunc(Bprmdly/2), limit)
Amin=maximum(trunc(term1/2), trunc(term 2/2), trunc(term 3/2), term 5, term6)(calculate this before Bprm)
Bmin =maximum(term1, term2, term3, term4)
If A less than Amin, then Aprm=Amin; else Aprm=A
If B less than Bmin, then Bprm=Bmin; else Bprm=B
In an alternate embodiment, the above equations may be modified slightly to remove the Bmin dependency on Aprm and use terms based on A and Bprm_dly in its stead as follows:
Bmin=MAX{min(H/64), limit/32), min (G/32, limit/16), min(F/16, limit/8), min(E/8, limit/4), min(D/4, limit/2), min(C/2, limit), min(A/2, limit), min(Bprmdly/4, limit/2)}
Table 1 hereinbelow depicts some test vectors to illustrate how an exemplary embodiment of the invention may function. The vectors are depicted in single file, e.g., H, G, F, E, D, C, B, A rather than two-pixels per clock: e.g., {H,G}, {F,E}, {D,C}, {B,A}.
For a sequential color LCD system, only one set of shift registers need be used. For a three color (red-green-blue) LCD system, three sets of shift registers may be used, one for each color portion of the RGB LCDs.
Adjacent pixels on the same row may be as described herein as well as adjacent pixels on adjacent rows. It is contemplated and within the scope of the present invention that a video memory may be utilized to store voltage values written to pixels on previous rows and/or columns so that no adjacent pixel has a voltage value difference great enough to cause field fringe effects.
The present invention is directed to a system for improving image quality of a liquid crystal display (LCD), said system comprising: a matrix of pixels arranged in a plurality of columns and a plurality of rows, wherein an intersection of a row and a column defines a location of a pixel in said matrix; at least one digital-to-analog converter (DAC) having a digital input and an analog output; a plurality of column switches adapted for coupling the analog output of said at least one DAC to each of said plurality of columns; a plurality of row switches adapted for selectively coupling each of said plurality of rows to said plurality of columns; column control logic for controlling said plurality of column switches; row control logic for controlling said plurality of row switches; a video frame to gray scale conversion and pixel address logic for converting video information into LCD gray scale values and corresponding pixel address locations thereof; and video data comparator/modifier logic, said video data comparator/modifier logic adapted to receive the LCD gray scale values for each pixel of the matrix of pixels, wherein gray scale values of adjacent pixels are compared and if a ratio of the gray scale values of adjacent pixels is greater than a desired value, then one of the gray scale values is modified so that the ratio of adjacent pixel gray scale values is no greater than the desired value; said video data comparator/modifier logic is adapted for sending all unmodified gray scale values and any modified gray scale values to said at least one DAC; said video frame to gray scale conversion and pixel address logic adapted for sending said pixel address locations to said column control logic and said row control logic.
The present invention is also directed to a method for improving image quality of a liquid crystal display (LCD) comprising a matrix of pixels arranged in a plurality of rows and columns, wherein an intersection of a row and a column defines a position of a pixel in the matrix, said method comprising the steps of: determining if a ratio of gray scale values of adjacent pixels is greater than a desired value, wherein; if the ratio is less than or equal to the desired value, then writing the gray scale values to the adjacent pixels, and if the ratio is greater than the desired value, then modifying one of the gray scale values of the adjacent pixels so that the ratio is less than or equal to the desired value, and then writing a gray scale value and the modified gray scale value to the adjacent pixels.
A technical advantage of the present invention is improved image quality in microdisplays. Another technical advantage is in smoothing transitions between pixel voltages that generate strong fringe field effects. Other technical advantages of the present disclosure will be readily apparent to one skilled in the art from the following figures, descriptions, and claims. Various embodiments of the invention obtain only a subset of the advantages set forth. No one advantage is critical to the invention.

Image quality improvement for liquid crystal displays


An optical communication system transmitting a plurality of channel wavelengths is provided. The system includes a transmitter unit, a receiver unit, and an optical transmission path interconnecting the transmitter and receiver units. The transmission path has a concatonation of optical fibers defining a dispersion map such that each of the channel wavelengths are located at FMX and XPM antiresonances at which FWM and XPM are suppressed.

The introduction of multigigabit, multiwavelength optical communication systems operating over long distances (e.g., transoceanic) and high average powers has resulted in the exploration of fiber designs that can minimize signal degradation. Fibers in such systems typically have losses in the range of about 0.20 to 0.25 dB/km. To increase bandwidth, fibers need to be redesigned to reduce a number of nonlinear and polarization effects that become increasingly important at high bit rates and high powers. In particular transmission performance is limited by a number of phenomena, including accumulation of amplified spontaneous emission (ASE) noise, dispersion, and a nonlinear component to the refractive index of the fiber. For amplitude modulated digital signals temporal distortions due either to dispersion or Kerr effect are a significant contributing factor to the bit error rate (BER).
A design solution to minimize the effects of dispersion and Kerr effect nonlinearities is not simple. The obvious solution to dispersive waveform distortions is to have the fiber dispersion set to zero at the signal wavelength. When signals travel at the zero dispersion wavelength they do not suffer any temporal distortions. However, a signal traveling at the zero dispersion wavelength and ASE noise generated by the optical amplifiers travel at similar velocities so that there is good phase matching, and thus they have the opportunity to interact over long distances, via the Kerr effect. The result is the transfer of power out of the signal and into unwanted wavelengths. Similarly, if two, or more signal channels are located around the zero dispersion wavelength they will be well phase matched and thus interact strongly. As a result of the interaction, energy will be transferred from one signal to another leading to waveform distortions. Conversely if the signal propagates at a wavelength for which the dispersion is large then there is a large phase mismatch (i.e., a group velocity difference) between the signal and noise or two adjacent signal channels, which greatly reduces the efficiency of four wave mixing. However, large values of dispersion result in increased inter-symbol interference due to the temporal spreading of the signal.
In summary, the following competing system design factors need to be taken into account. If the fiber has non-zero chromatic dispersion, then pulse spreading results, with attendant intersymbol interference. On the other hand, if chromatic dispersion is zero everywhere along the transmission fiber then non-linear effects such as four-wave-mixing will cause power transfers between signal channels as well as between signal and noise. In either case the result is a degradation in system performance.
An important advance in the implementation of multi-channel WDM systems has been the use of dispersion management techniques. In view of the above mentioned conflicting demands, the basic principle of dispersion management is to keep local dispersion non-zero but make the overall system dispersion substantially zero. This can be accomplished by using a dispersion map in which the zero dispersion wavelengths of the constituent fibers are chosen so that they are appropriately far from the system's operating wavelengths. Constituent fibers with different zero dispersion wavelengths are then arranged in some periodic fashion so that the path average dispersion for the whole transmission line is appropriately small. For example, the transmission line may be divided into two or more sections approximately equal in length. In one section, the optical fiber has a zero dispersion wavelength less than the operating wavelengths. The following section has optical fiber with a zero dispersion wavelength greater than the operating wavelengths. The overall transmission line is thus constructed in a periodic manner from a concatenation of fiber sections having different zero dispersion wavelengths. By constructing the transmission line out of alternating lengths of positive and negative dispersion fiber, the path average dispersion can be adjusted so that it causes minimal temporal distortion. Moreover, by selecting the local dispersions of the constituent fibers to be large in magnitude, and making the period of the dispersion map an appropriate length, nonlinear interactions can be suppressed. The path-average dispersion of a fiber span of length L may be mathematically denoted as:Daverage=∫D(z′)dz
For applications involving the transmission of non-return-to-zero (NRZ) data, the desired Daverage is zero, while, for soliton data transmission, the desired Daverage is in the range of about 0.05 to 0.5 picoseconds per nanometer-kilometer.
The principle of using large local values of dispersion to suppress nonlinear interactions and concatenating segments of such fiber with opposite delay values to ensure temporal fidelity of the signal is sound. However the transmission line is a periodic structure; the regularly spaced amplifiers give rise to periodic fluctuations in the signal energy. This introduces an asymmetry to the FWM and XPM between signal channels as they traverse the line that can actually enhance these processes. So despite the use of dispersion maps to suppress nonlinear interactions, FWM and XPM can still be problematic. The periodicity of the transmission line can resonantly enhance FWM between channels that were otherwise poorly phase matched. The periodicity can, under certain circumstances, also enhance XPM between two otherwise benign channels.

Optical communication system having an antiresonant dispersion map suppressing four wave mixing and cross phase modulation


An apparatus for measuring the relative differential length of a sample of a web or sheet material. The apparatus includes a substantially flat surface adapted to support the sample. Air is removed between the sample and the substantially flat surface to position the sample in an unrestrained state. A translation member translates a plurality of non-contact sensors in a first direction along the length of the sample, whereby the plurality of non-contact sensors sense the distance from a reference plane to the sample and generate a signal representative of the distance sensed. A data collection system collects the generated signals and determines a relative differential length of the sample from the generated signals.

During the manufacturing of web or sheet material, differential tensions can form across the width of the web or sheet material, for example, from thermal or length variations. These differential tensions cause differential strains or distortions to exist in the web or sheet material, resulting in the web or sheet material exhibiting distortions or non-planarity when positioned on a flat surface. The web or sheet material can exhibit non-flatness characteristics such as bumps, wariness at the edges, or ripples across the width. FIG. 1 shows an exaggerated view of an unflat sheet 10 exhibiting wariness at the edges and FIG. 2 shows an exaggerated view of unflat sheet 10 exhibiting bumps in a central portion of the sheet.
As mentioned above, these differential tensions can result from length variations, i.e., internal material length difference in the web or sheet material. For example, referring to FIG. 3, if sheet 10 were cut into a plurality of strips 12, any strip 12a which exhibits a non-flatness characteristic (e.g., bump, wariness, or ripple) would have a length greater than (i.e., would be longer than) a strip 12b which does not exhibit a non-flatness characteristic.
Such internal length differences may be of particular concern when the sheet is used in a particular application. For example, in the printing industry or graphics art field, a final image may be generated using several different overlays. That is, several sheets each having a portion of the final image may be separately disposed in overlapping/overlaying registration onto each other to form the final image. If one of the sheets has sufficient internal length differences, the portions (of the final image) from the separate sheets will not properly register to each other. Consequently, the a final image that is produced may be unacceptable or unusable for its intended purpose.
Several methods have been employed to determine if a sheet includes non-flatness characteristics. For example, a user may conduct a simple visual inspection of the sheet. Such a visual inspection can be conducted by laying the sheet (or the section of the web material) on a flat surface or table, and then manually counting the number of bumps or waves in a given length. Such a visual inspection is time-consuming and prone to errors. In addition, this visual inspection does not provide a method for measuring the internal length differences in a web or sheet material.
An on-line web planarity measurement apparatus may provide an indication of whether the sheet includes non-flat characteristics. Such an apparatus is disclosed in U.S. Pat. No. 5,678,447 (Graff), commonly assigned and incorporated herein by reference. As noted above, the planarity of the web or sheet material is related to internal length differences. However, this reference does not provide a method for measuring the internal length differences in a web or sheet material.
In another method, the sheet is cut into individual strips, and then each strip length is measured. Such a method is accomplished by laying a section of the web material on a flat surface or table and then cutting a sheet from the web material. The resulting sheet has a uniform length across its width such that, as shown in FIG. 3, if the sheet is measured in it's full width form, the length X of the sheet is the same at every position Y across the sheet. The resulting sheet is then cut/slit into plurality of strips 12. Each strip is then disposed within a mechanical apparatus to measure it's length. Such a method is time-consuming and prone to errors. In addition, many mechanical apparatus do not have the resolution required to measure the minute differential lengths necessary for Applicant's application, which are in the range of microinches. For example, if a raised area of the sheet has a dimension 0.005 inches from the flat surface with the length of the raised area being 3 inches in length in the direction of the measurement (i.e., in the X direction; the direction of the cut/slit), the additional length of material in the sheet is about 0.000023 inches (23 microinches).
Accordingly, while each of these methods may have achieved certain degrees of success in their particular applications, a need continues to exist for an apparatus and method for measuring the relative differential length of a web or sheet material. The apparatus should be suitable for measuring minute differential lengths, and the method should not be time-consuming or prone to errors. In addition, the method should not adversely affect the web or sheet material whose differential length is being measured.

Apparatus and method for measuring the relative differential length in a sheet of material


A package structure includes an insulating encapsulation, at least one die, and conductive structures. The at least one die is encapsulated in the insulating encapsulation. The conductive structures are located aside of the at least one die and surrounded by the insulating encapsulation, and at least one of the conductive structures is electrically connected to the at least one die. Each of the conductive structures has a first surface, a second surface opposite to the first surface and a slant sidewall connecting the first surface and the second surface, and each of the conductive structures has a top diameter greater than a bottom diameter thereof, and wherein each of the conductive structures has a plurality of pores distributed therein.

Semiconductor devices and integrated circuits are typically manufactured on a single semiconductor wafer. The dies of the wafer may be processed and packaged with other semiconductor devices or dies at the wafer level, and various technologies have been developed for the wafer level packaging. Currently, integrated fan-out packages are becoming increasingly popular for their compactness. The improved routing capability and reliability provided by the integrated fan-out packages are key factors for future packages.

Package structure with porous conductive structure and manufacturing method thereof

Taiwan Semiconductor Manufacturing Company, Ltd.


Medical stent designs are disclosed. An example stent includes a tubular scaffold having a proximal end and a distal end. The tubular scaffold includes a first filament extending between the proximal end and the distal end, the first filament including a first biodegradable region positioned adjacent to a second biodegradable region. Further, the first biodegradable region includes a first biodegradable material, the first biodegradable material having a first rate of degradation. The second biodegradable region includes a second biodegradable material, the second biodegradable material having a second rate of degradation, wherein the first rate of degradation is different from the second rate of degradation.

Stents are utilized in a variety of medical procedures and situations, and accordingly, their structure and function are well known. A stent is generally a tubular prosthesis that is introduced via a catheter into a body lumen. The stent is introduced into the body lumen with a generally reduced diameter and subsequently expanded to the diameter of the body lumen. In its expanded configuration, the stent may support and reinforce the wall of the body lumen while maintaining the body lumen in an open, unobstructed condition.
In some instances, utilizing a medical stent to treat a target site may only require temporary placement of the stent. For example, in some instances it may be beneficial to implant a stent at a target site for a limited period of time, after which it may be desirable to remove the stent (for example, after completion of the treatment). However, it can be appreciated that trauma, such as tearing or similar damage to the wall of the body lumen may occur if the stent is forcibly removed from the body lumen. Accordingly, in some instances it may be desirable to design the stent to biodegrade in a controlled manner after the prescribed treatment period. Examples described herein disclose a stent designed to biodegrade in a controlled manner after a prescribed treatment period.


A matrix array image sensor integrated circuit chip is provided including horizontal and vertical scanning means with the sensor cells within columns of the array being associated with an analogue charge sense amplifier. The analogue charge sense amplifier includes a first amplifier in the form of an inverting charge integrator which provides a preliminary detection of the charge accumulated in the sensing cell by integrating the charge to produce a voltage which is capacitively stored in a voltage storage means. The sensing cell may then be reset by control logic while it is isolated from the stored voltage which is in turn selectively sampled using a switch to read out through a second amplifier stage to be provided as an output from the integrated circuit chip. A method for operation of the device in processing an image read cycle is also provided.

Solid state image sensors are presently realised in two common forms:
Charge Coupled Devices and MOS diode arrays. Both forms require specialised fabrication processes to suit them for image sensing and both forms also require substantial electronic circuits external to the sensing chip in order to drive the arrays and to process the output signal. A complete sensor subsystem therefore typically requires an assembly of many components (often between 10 and 100 components to realise a simple camera function) with consequent implications of high production costs, power consumption and physical size.
Diode array sensors are commonly based on a two dimensional array of photodiodes implemented as the reverse-biased semiconductor junctions of the type normally used to form the source and drain regions of MOS transistors. A high reverse bias is applied (typically of the order of 3 volts or greater) and the diode then is electrically isolated and exposed to light or other radiation to be detected. Incident radiation increases the reverse-bias leakage current to the diode and this current is effectively integrated on the reverse-bias capacitance of the isolated junction causing a reduction in the reverse-bias potential. The use of such techniques for conversion of radiation to electronic charge and potential is well known and practiced. In particular this technique is used in MOS diode array type sensors. In these sensors a single MOS transistor controls access to the diode for the purpose of writing to the cell (that is, resetting to a high reverse-bias) and reading from it by connecting the diode to a bit-line (i.e. sense line or column line) and thence ultimately to charge-sensing circuits which convert the charge stored within the cell to an output voltage.
Typically the array is accessed in scan-line format whereby the array is read as consecutive rows, and within each row by consecutive pixels. This process is also commonly practiced and involves enabling each row of cells by a "word-line" which is connected in common to the access transistor gates of all cells in the row. Digital circuitry is used to generate and to drive the necessary pattern of word-line signals. Normally this circuitry may take the form of a shift register. As each word-line is enabled, one row of cells is connected to bit-lines and thereby to peripheral circuitry at the top of the array. Further digital circuitry produces enabling signals that control analogue switching or sense circuitry to enable the signals on consecutive bit-lines to be connected to the output. Again the shift-register function may be used to realise the digital circuitry.
In order to realise a compact array it is desirable to maintain a small cell pitch, typically 20 microns or less horizontally and vertically, although the cell aspect ratio need not be square. This small pitch poses significant design problems in realising the vertical and horizontal scan register circuit and it is also a serious constraint on the realisation of analogue sense and switching circuitry located at the top of each bit line.
For these reasons it has been conventional practice for MOS array sensors to include only a simple analogue switch (for example, a MOS pass-transistor) to enable the bit-line to be connected to a common read out line and thence to a common charge sense amplifier. The requirements of the sense amplifier in the terms of sensitivity, dynamic range and speed are quite formidable considering the small charge originally resident at the cell site within the array, that the amplifier is required to sense. The design of such an amplifier can therefore become quite sophisticated and the present common practice is to realise such an amplifier in external circuitry.
Therefore this sensing amplifier and the tenuous connection to it becomes a critical factor in limiting the performance of the sensor system.


The present invention provides a novel pharmaceutical composition for treating and/or preventing cancer comprising, as an active ingredient, a polynucleotide derived from various miRNAs associated with cancer, a combination drug of the pharmaceutical composition and another antitumor agent, and a method for treating or preventing cancer in a subject having the cancer using the pharmaceutical composition or the combination drug. The present invention relates to a pharmaceutical composition for treating and/or preventing cancer comprising, as an active ingredient, a polynucleotide comprising the nucleotide sequence as set forth in SEQ ID NO: 1, or a nucleotide sequence comprising a substitution of one nucleotide in the nucleotide sequence as set forth in SEQ ID NO: 1 (wherein when at least a part of the polynucleotide is DNA, uracil in a region corresponding to the DNA in the nucleotide sequence is replaced with thymine).

MicroRNA (miRNA) is an RNA of 16 to 28 nucleotides that is not translated into a protein, and it is currently known that 2590 miRNAs are present in human according to the miRBase release 21 (http://www.mirbase.org/). In recent years, miRNAs have been receiving attention as molecules for suppressing in vivo expression of various genes. Each miRNA gene region is present on the genome, and is transcribed into a RNA precursor with hairpin loop by RNA polymerase II, and the RNA precursor is then cleaved by two types of dsRNA cleaving enzyme having RNase III cleavage activities that are called Drosha in the nucleus and Dicer in the cytoplasm, thereby forming a mature miRNA. It is known that the mature miRNA is taken into the protein complex called RISC and interacts with mRNAs of a plurality of target genes having its complementary sequence to suppress the expression of the genes (Non Patent Literature 1).
Certain types of miRNAs are suggested to be associated with human diseases including cancer, and particularly in cancer, for example, many miRNAs such as hsa-miR-8073, hsa-miR-6893-5p and hsa-miR-575 are known to be markers specific to pancreatic cancer in blood (Non Patent Literature 1 and Patent Literature 1).
Further, in addition to the miRNAs related to the growth of cancer cells, the presence of a miRNA which works in a direction of suppressing cancer cells is reported, suggesting a method for treating cancer utilizing the expression pattern of the miRNA. Specific examples of the known method include a method for treating diseases such as cancer by administering an activated serum comprising 153 miRNAs such as hsa-Let-7a and upregulating the miRNA (Patent Literature 2), a method for treating lung cancer using a body fluid comprising many miRNAs such as hsa-Let-7a (Patent Literature 3), and a method for treating blood cancer by administering antisense oligonucleotides of many miRNAs such as miR-1321 comprised in circulating exosomes in the body (Patent Literature 4).
Moreover, it is reported that miRNAs expressed in breast cancer cells, including hsa-miR-30a, hsa-miR-221-5p or hsa-miR-146a, have an effect of suppressing angiogenesis of normal blood vessels and these miRNAs can be utilized as therapeutic agents for tumors based on the effect (Patent Literature 5). However, in Patent Literature 5, only the effect of suppressing angiogenesis of normal blood vessels was experimentally confirmed, and the actual utility of the miRNAs as therapeutic agents for tumors cannot be recognized only based on the confirmation of the aforementioned effect. Accordingly, Patent Literature 5 discloses next to nothing about the actual utility of these miRNAs as therapeutic agents for tumors.

Pharmaceutical composition for treating and/or preventing cancer


A diagnostic system and method identifies fuel injector failure in a fuel cell system including a fuel processor and a fuel source. A fuel injector supplies fuel from the fuel source to the fuel processor. A pressure sensor generates a pressure signal based on pressure between the fuel source and the fuel injector. A fuel injector diagnostic identifies fuel injector failure based on the pressure signal. The fuel injector diagnostic includes a moving window tracker that tracks the pressure signal over a moving window. The fuel injector diagnostic further includes a standard deviation or variance calculator that generates a standard deviation or variance based on the pressure signal in the moving window.

The present invention relates to fuel injectors of fuel cells, and more particularly to a diagnostic system for identifying fuel injector failure in a fuel cell system.
Pulsed fuel injectors are used to control the delivery of fuel in internal combustion engines of vehicles. Pulsed fuel injectors are also typically used with fuel cell systems that convert liquid fuel to a hydrogen-rich gas stream. Pulsed fuel injectors are proven, robust, and cost effective due to experience gained from their use in internal combustion engines.
Conventional methods for diagnosing degradation and failure of a fuel injector in internal combustion engines are inadequate for fuel cell applications. Diagnostic systems for internal combustion engines typically check for negative effects of a failed fuel injector. For example, a vehicle On Board Diagnostic (OBD) method monitors cylinder misfires. When an injector fails, the failed injector causes a momentary decrease in crankshaft speed. A position sensor detects the decrease and triggers a check engine light.
In internal combustion engines, an injector typically fails in a closed position, which does not harm the engine. A short term misbalance between fuel, air and spark does not typically impact engine durability. In a fuel cell fuel processor, however, the balance of inputs is more critical. A proper balance between fuel, air, and water keeps the fuel processor catalysts in proper working condition.
If the fuel injector fails while running, the fuel processor temperature begins changing. If the injector fails in the near closed position, temperature may rise due to a higher oxygen to carbon ratio (O/C). If the injector fails fully closed or open, temperature will eventually drop. Since the fuel processor has appreciable mass, the temperature drop may not occur quickly. During this time, water and air are reaching the fuel processor components without proper reactions taking place, which may harm the fuel processor components. Also, any change in temperature may be caused by other problems such as incorrect air or water. Therefore, monitoring temperature does not necessarily identify a failed injector.
If the fuel injector fails during startup, the system may run for several minutes before detection. Temperatures often takes a significant amount of time to rise in a cold fuel processor, even with a working fuel injector. A failed injector cannot be diagnosed based on temperature until long after the first fuel command. By this time, a significant amount of incorrect fuel has been supplied to the fuel processor.
Fuel flow sensors can be used to diagnose a failed injector. Fuel flow sensors are expensive and typically have moving parts that may fail. Fuel flow sensors add cost, size, and weight, reduce reliability and have wiring and controller I/O requirements.
A diagnostic system and method identifies fuel injector failure in a fuel cell system including a fuel processor and a fuel source. A fuel injector supplies fuel from the fuel source to the fuel processor. A pressure sensor generates a pressure signal based on pressure between the fuel source and the fuel injector. A fuel injector diagnostic identifies fuel injector failure based on the pressure signal.
In other features, a fuel pump pumps fuel from the fuel source to the fuel injector. A regulator communicates with the fuel tank and regulates pressure between the fuel pump and the fuel injector. The fuel injector diagnostic is implemented using a controller with a processor and memory.
In still other features, the fuel injector diagnostic includes a moving window tracker that tracks the pressure signal over a moving window. The fuel injector diagnostic further includes a standard deviation calculator that generates a standard deviation based on the pressure signal in the moving window. Alternately, the fuel injector diagnostic includes a variance calculator that generates a variance based on the pressure signal in the moving window.
In still other features, the fuel injector diagnostic includes a diagnostic enabler that enables the fuel injector diagnostic. The diagnostic enabler includes a comparator that receives an injector command and an injector command minimum signal. A noise reducer communicates with the comparator and transitions from low to high after a first period after the comparator signal goes high and from high to low after a second period after the comparator signal goes low.
Further areas of applicability of the present invention will become apparent from the detailed description provided hereinafter. It should be understood that the detailed description and specific examples, while indicating the preferred embodiment of the invention, are intended for purposes of illustration only and are not intended to limit the scope of the invention.

Diagnostic system for identifying fuel injector failure in a fuel cell system


According to the embodiment, in a first period, the semiconductor storage device maintains the switch in an ON state. In a second period, the semiconductor storage device performs a first operation, a second operation and a third operation while maintaining the switch in an OFF state. The second period is a period after the first period. The first operation is an operation to supply the first pulse having the first polarity from the first pulse generation circuit to the other end of the first capacitive element. The second operation is an operation to supply the second pulse having the second polarity from the second pulse generation circuit to the other end of the second capacitive element. The third operation is an operation to connect the first bit line to the first data line.

In a semiconductor storage device including a memory cell, a bit line, a data line, and a sense amplifier, when the memory cell is connected to the sense amplifier via the bit line and the data line, a level of a signal output from the memory cell via the bit line and the data line is detected by the sense amplifier. At this time, it is desirable to appropriately detect the level of the signal of the memory cell.


A network routing method and system may include initializing the network by determining, for each node of the network, a number of hops to a root node and delaying forwarding to the root node, for each node, a packet received, wherein the delay in forwarding the packet received to the root node from a forwarding node depends upon the number of hops separating the root node from the forwarding node. A network routing method and system may include initializing the network by determining, for each node of the network, a number of hops to a root node, determining, for a forwarding node that receives a packet from a sending node, whether to forward the packet to a root node, determining a delay after which the packet is to be forwarded to the root node and determining a probability of forwarding the packet to the root node.

1. Field
This disclosure relates to networks, and more particularly to routing methods in convergecast networking.
2. Description of Related Art
Many sensor network applications require broadcast and convergecast for data dissemination or collection. Convergecast generally refers to a communication pattern in which the flow of data takes place from a set of nodes toward a single node in a network. Convergecast can be viewed as the opposite of broadcast or multicast, in which the flow of data takes place from a single node to a set of nodes in the network. FIG. 1 is a simple example that illustrates the characteristics of both broadcast and convergecast in a network. On the left-hand side is a broadcast example in which node A is the message source and nodes B, C, D are the expected recipients. Node B hears or receives node A's message directly, and forwards a copy of the message to nodes C and D. On the right-hand side is a convergecast example in which node A is the destination node. Nodes B, C, and D each have a message destined to node A. In this example, node B serves as the forwarding node, which is a relay node for nodes C and D.
The issue of designing efficient and reliable broadcast protocols for wireless ad hoc networks has received much attention in recent years. However, the issue of convergecast has only rarely been addressed. At first glance, it may appear that convergecast is the reverse process of broadcast. However, there is at least one critical difference between convergecast and broadcast that makes convergecast more than merely the reverse process of broadcast. In broadcast, the data being disseminated is identical for all recipients. As a result, the data only needs to traverse any edge in the network at most once, and the bandwidth utilization for broadcast process is essentially uniform across the entire network. On the other hand, convergecast is a many-to-one process wherein the data flowing to the recipient from different nodes are likely to be different. The result generally is a non-uniform bandwidth demand across the network because, for example, more bandwidth is needed for nodes closer to the sink, as seen in the illustration of FIG. 1. In the convergecast process illustrated in FIG. 1, the edge BA is traversed by three packets while edges CB and DB are traversed by only one packet.
It should be noted that in wireless networks, collision is a major adversary to communication reliability, and wastes resources (energy, bandwidth, time). Collisions generally occur when multiple nodes simultaneously transmit over the same channel to the same node, or when a receiver is in the range of another transmission over the same channel. Many schemes, especially Media Access Control (MAC) level ones, such as Carrier-Sense-Multiple-Access (CSMA), Carrier-Sense-Multiple-Access with Collision Avoidance (CSMA/CA), Frequency-Division Multiple Access (FDMA), Code-Division-Multiple-Access (CDMA), Time-Division-Multiple-Access (TDMA), have been proposed and used to reduce collisions in wireless communication. The concern for simplicity and scalability for large scale wireless sensor networks has led to the adoption of CSMA and its close variants such as the MAC layer strategies in the popular Mica mote platform.

Coordinated convergecast for AD HOC wireless networks


A seal system for a gas turbine vane includes a first seal layer and an optional second seal layer. Each first seal layer includes multiple seal segments, each of which includes a first leg, a second leg, and an intermediate portion between the first leg and the second leg. Each adjacent pair of seal segments of the first seal is separated by a gap. The seal segments define a substantially complete perimeter of a seal slot in which the first seal is installed. The second seal, which is also segmented, may or may not define the substantially complete perimeter of the seal slot. If present, the second seal segments are circumferentially offset from the first seal segments to block the gaps between the first seal segments. A turbine vane including the present seal system is also disclosed.

Some conventional turbo machines, such as gas turbine systems, are utilized to generate electrical power. In general, gas turbine systems include a compressor, one or more combustors, and a turbine. Air may be drawn into a compressor, via its inlet, where the air is compressed by passing through multiple stages of rotating blades and stationary nozzles. The compressed air is directed to the one or more combustors, where fuel is introduced, and a fuel/air mixture is ignited and burned to form combustion products. The combustion products function as the operational fluid of the turbine.
The operational fluid then flows through a fluid flow path in a turbine, the flow path being defined between a plurality of rotating blades and a plurality of stationary nozzles disposed between the rotating blades, such that each set of rotating blades and each corresponding set of stationary nozzles defines a turbine stage. As the plurality of rotating blades rotate the rotor of the gas turbine system, a generator, coupled to the rotor, may generate power from the rotation of the rotor. The rotation of the turbine blades also causes rotation of the compressor blades, which are coupled to the rotor.
Gas turbine vanes are static components of the turbine section, which are configured to direct hot gases (at temperatures above 2,200° F.) in a hot gas path to the rotating portions of the turbine to achieve rotational motion of the rotor. Though significant advances in high temperature capabilities have been achieved, superalloy components must often be air-cooled and/or protected with a coating to exhibit a suitable service life in certain sections of the gas turbine engine, such as the airfoils. In order to withstand the high temperatures produced by combustion, the airfoils in the turbine section are cooled. Cooling the airfoils represents a parasitic loss to the power plant, since the air that is used to cool the parts has to be compressed but the amount of useful work that be extracted is comparatively small. As such, it is desirable to cool these parts with as low flow of air as possible to allow for efficient operation of the turbine.
The volume of cooling air required may be reduced by using more advanced materials, which can withstand the high temperature conditions in the hot gas flowpath. These materials, such as ceramic matrix composites (CMCs), can increase gas turbine efficiency because their properties reduce the cooling requirements for the respective parts.
One challenge in developing CMC vanes that efficiently use the available cooling air is sealing between the CMC vane shell and the respective inner and outer side walls that define therebetween the hot gas path. Often, such side walls are made of a metal alloy with different thermal properties than the CMC vane shell, making sealing between the disparate materials difficult. Leakage of the cooling fluids from the vanes can increase the parasitic losses to the turbine (thereby reducing its efficiency) and can increase the temperature of the vanes (thereby leading to increased stress and/or wear).
An effective sealing system is needed to address this problem.

Vertically oriented seal system for gas turbine vanes


An apparatus for enabling provision of a localized virtual reality environment may include at least one processor and at least one memory including computer program code. The at least one memory and the computer program code may be configured, with the processor, to cause the apparatus to perform at least receiving information indicative of a current location of a mobile terminal, receiving information indicative of an orientation of the mobile terminal with respect to the current location, causing a stored image including a panoramic view of the current location to be displayed at the mobile terminal based on the orientation, and enabling provision of a virtual object on the panoramic view. A corresponding method and computer program product are also provided.

The modern communications era has brought about a tremendous expansion of wireline and wireless networks. Computer networks, television networks, and telephony networks are experiencing an unprecedented technological expansion, fueled by consumer demand. Wireless and mobile networking technologies have addressed related consumer demands, while providing more flexibility and immediacy of information transfer.
Current and future networking technologies continue to facilitate ease of information transfer and convenience to users. One area in which there is a demand to increase ease of information transfer relates to the delivery of services to a user of a mobile terminal. The services may be in the form of a particular media or communication application desired by the user, such as a music player, a game player, an electronic book, short messages, email, content sharing, etc. The services may also be in the form of interactive applications in which the user may respond to a network device in order to perform a task or achieve a goal. The services may be provided from a network server or other network device, or even from the mobile terminal such as, for example, a mobile telephone, a mobile television, a mobile gaming system, etc.
In some situations, mobile terminals may enhance the interaction that users have with their environment. Numerous use cases have developed around the concept of utilizing mobile terminals to enhance user interaction with their local area such as, for example, virtual tour guides and other mixed reality applications. Mixed reality involves the merging of real and virtual worlds. In some cases, mixed reality involves mixing real world image data with virtual objects in order to produce environments and visualizations in which physical and digital objects co-exist and potentially also interact in real time. Mixed reality includes augmented reality, which uses digital imagery to augment or add to real world imagery, and virtual reality, which simulates real world environments using computer simulation.
When incorporating augmented reality into a particular application or scenario, a user may be enabled to capture a live image or utilize a captured real world image and then add information to the image. A very common example of augmented reality is experienced frequently when watching a sporting event on television with streaming or otherwise intermittently presented score or other status information being overlaid onto the video of the sporting action itself. In the score or status information example described above, the augmentation has almost no relationship with the imagery it is augmenting. Accordingly, the augmentation can simply appear in a fixed location without any regard to what is going on in the real world imagery. However, when a virtual object is to be used to augment an image in the augmented reality situation, and the virtual object is desired to be correlated to a specific object or location within the image, the specific object or location must be tracked so that the virtual object can be positioned properly.
In some examples, the virtual object may act as an annotation that is registered to the specific object. Pixel accurate tracking may then be undertaken to try to ensure that the virtual object stays accurately correlated to the specific object. If the tracking is not accurate, the user may not be enabled to reliably see that which is being annotated. Thus, pixel accurate tracking may be essential to the quality of the user's experience in an augmented reality environment. However, pixel accurate tracking may be difficult in an environment where the user has three degrees of freedom (3DOF), and even harder when the user has six degrees of freedom (6DOF). Accordingly, it may be desirable to provide an alternative mechanism by which to provide a mixed reality experience to users.

Method and apparatus for providing a localized virtual reality environment


A cryogenic fluid storage/processing system which includes a tank for storing the cryogenic fluid, and a containment wall surrounding the tank and defining an impoundment area. The system further includes a vaporizer for regasification of the cryogenic fluid. Piping is discharges the vaporizer heating medium into the impoundment area, and/or routes it beneath the tank to heat the ground beneath the tank. Further, the system provides for all liquid hydrocarbons to be contained within the impoundment area with the pumps inside and the vaporizers mounted on the containment walls.

1. Field of the Invention
The present invention relates to cryogenic fluids. In another aspect, the present invention relates to methods and apparatus for processing, transporting and/or storing cryogenic fluids. In even another aspect, the present invention relates to receiving and/or dispensing terminals for cryogenic fluids and to methods of receiving, dispensing and/or storing cryogenic fluids. In still another aspect, the present invention relates to methods and apparatus for processing, transporting and/or storing liquified natural gas ("LNG").
2. Description of the Related Art
Interest in the use of liquified natural gas (LNG) as a fuel for motor vehicles has increased dramatically in recent years. Entire fleets of government and industrial vehicles have successfully been converted to natural gas. Some privately-owned vehicles have been converted as well. Congress has passed an energy bill that requires increased use of alternative fuels in government and private fleets. Several factors have influenced this increasing use of LNG as a fuel in motor vehicles. LNG is relatively inexpensive. In addition, it burns very cleanly, making it much easier for fleets to meet more restrictive pollution emission standards. And, in terms of reducing dependence on imported oil, natural gas is abundantly available in the United States.
Most conveniently, natural gas is transported from the location where it is produced to the location where it is consumed by a pipeline. However, given certain barriers of geography, economics, and/or politics, transportation by pipeline is not always possible, economic or permitted. Without an effective way to transport the natural gas to a location where there is a commercial demand, the gas may be burned as it is produced, which is wasteful.
Liquefaction of the natural gas facilitates storage and transportation of the natural gas (a mixture of hydrocarbons, typically 65 to 99 percent methane, with smaller amounts of ethane, propane and butane). When natural gas is chilled to below its boiling point (in the neighborhood of −260° F. depending upon the composition) it becomes an odorless, colorless liquid having a volume which is less than one six hundredth ( 1/600) of its volume at ambient atmospheric surface temperature and pressure. Thus, it will be appreciated that a 150,000 cubic meter LNG tanker ship is capable of carrying the equivalent of 3.2 billion cubic feet of natural gas.
When LNG is warmed above its boiling point, it boils reverting back to its gaseous form.
The growing demand for natural gas has stimulated the transportation of LNG by special tanker ships. Natural gas produced in remote locations, such as Algeria, Borneo, or Indonesia, may be liquefied and shipped overseas in this manner to Europe, Japan, or the United States. Typically, the natural gas is gathered through one or more pipelines to a land-based liquefaction facility. The LNG is then loaded onto a tanker equipped with cryogenic compartments (such a tanker may be referred to as an LNG carrier or "LNGC") by pumping it through a relatively short pipeline. After the LNGC reaches the destination port, the LNG is offloaded by cryogenic pump to a land-based regasification facility, where it may be stored in a liquid state or regasified. If regasified, the resulting natural gas then may be distributed through a pipeline system to various locations where it is consumed.
Of the known liquid energy gases, liquid natural gas is the most difficult to handle because it is so intensely cold. Complex handling, shipping and storage apparatus and procedures are required to prevent unwanted thermal rise in the LNG with resultant regassification. Storage vessels, whether part of LNG tanker ships or land-based, are closely analogous to giant thermos bottles with outer walls, inner walls and effective types and amounts of insulation in between.
LNG storage tanks in the United States have heretofor been built mostly above the ground with some frozen pit facilities properly characterized as mostly above the ground. Most such tanks have been enclosed by a low rising earthen dike. Such dikes were sized and placed to enclose an area and volume at least as great as the storage capacity of the largest tank (if not all of the tanks) within the diked area.
In addition, National Fire Protection Association (NFPA) guidelines (NFPA 59A, Para 108) for spill containment require impounding areas that hold the entire LNG capacity of the station in the event of a catastrophic spill. Furthermore, in accordance with NFPA guidelines, electrical controls must either be designed for explosion-proof conditions or be situated in designated safe areas outside of the impoundment area generally several hundred feet away. As explosion-proof controls are costly, the latter option is preferable.
Thus, LNG to be regasified is generally pumped to a heating device situated outside the impoundment area several hundred feet away in a designated safe area.
In spite of the presence of insulation, storage tanks will still cool if not freeze any ground in direct contact with the tank. Thus, an electrical heating element is placed in the ground to counter any cooling by the tank.
A number of patents relate to the processing, transporting, and storing of LNG.
U.S. Pat. No. 3,675,431 issued Jul. 11, 1972 to Jackson, discloses a partially submerged offshore storage tank for liquified energy gases. That patent described an insulated tank which was prefabricated, floated to a suitable offshore site and then sunk until its submerged base rested on the floor of the sea. An upper above-the-water domed metal cylinder extended from a concrete base. Insulation lined the interior of the tank. A thin and flexible membrane inside the insulation provided the required liquid tight interior lining of the tank. The insulation lining the submerged portion of the tank was said to be thinned, so that a layer of ice formed around the outside of the concrete base when the tank was filled with liquified gas. In accordance with the invention claimed in the patent, the ice layer supposedly acted as an outer seal for the submerged concrete.
U.S. Pat. No. 3,727,418, issued Apr. 17, 1973, to Glazier, discloses an LNG storage facility having an insulated interior membrane. A balancing fluid, said to be isopentane (2-methyl butane) transferred hydrostatic pressure from surrounding ambient water to the LNG contents.
U.S. Pat. No. 3,828,565, issued Aug. 13, 1974 to McCabe, discloses an insulated buoyant tank moved telescopically up and down in a larger receiver tank containing seawater, oil or other liquid in accordance with the quantity of LEG at atmospheric pressure stored therein from time to time.
U.S. Pat. No. 4,041,722, issued Aug. 16, 1977, to Terlesky et al., discloses an impact resistant tank for storing cryogenic fluids, includes an inner metal tank having a metal side wall and a metal bottom and a concrete outer wall around the inner metal wall and having reinforcement therein to resist impact loads thereon, and to serve as a secondary containment for the cryogenic fluid.
U.S. Pat. No. 4,209,267, issued Jun. 24, 1980, to Gnaedinger, proposes an improvement over the traditional earthen dike system around LNG storage tanks. Specifically, the storage system comprises a dike, impounding wall or drainage channel constructed of compacted earth, concrete, metal and/or other suitable substance surrounding an aboveground steel insulated tank used to store the liquefied gas. A drop shaft is used to communicate the diked area with an underground tunnel for temporary accumulation and subsequent safe disposal of liquid which has escaped from the storage tank.
U.S. Pat. No. 4,374,478, issued Feb. 22, 1983, to Secord et al., discloses tanks for land storage of liquefied gas at low temperature at or above atmospheric pressure. The invention provides a storage tank of the kind in which the walls are formed by a multiplicity of connected, parallel, part-cylindrical lobes presenting outwardly convex arcuate surfaces, which is characterized in that the side and end walls thereof are provided by a single tier of connected lobes, in that said lobes extend in one common direction over the tank, in that the end walls of the tank comprise part-spherical knuckles closing off the ends of the part-cylindrical lobes, and in that a separating plate is provided at each lobe connection to strengthen the tank against internal pressure and to divide it into separate storage compartments.
U.S. Pat. No. 5,682,750, issued Nov. 4, 1997, to Preston et al., discloses a portable self-contained delivery station for liquid natural gas (LNG) is provided on a movable skid frame and equipped with an instant on delivery system which may initiate LNG delivery immediately to a use vehicle. The skid is equipped with a spill containment feature such that the LNG may be contained in the event of spillage. A variable speed pump both controls LNG dispensing and saturation levels of the stored LNG. The pump is submerged in a sump tank which is separate from the bulk storage tank. The sump tank is flooded with an amount of LNG such that the pump is submerged. Delivery of LNG may thus occur instantly, without pre-cooling of the pump or associated meter.
U.S. Pat. No. 6,640,554, issued Nov. 4, 2003, to Emmer et al., discloses a portable self-contained liquid natural gas (LNG) dispensing system is housed in a container featuring opposing side and end walls and a bottom panel. The container is divided into a ventilated portion and a covered portion. A roof is over the covered portion while the ventilated portion features an open top. A bulk tank positioned within the container contains a supply of LNG with a head space thereabove and a pump is submerged in LNG within a sump that is also positioned within the container and communicates with the bulk tank. The container is lined with stainless steel sheets to define a containment volume that is capable of holding the entire supply of LNG in the bulk tank. A vent valve communicates with the head space of the bulk tank and is positioned under the open top of the ventilated portion of the container. The electric controls are positioned on the lower portion of the end wall of the covered portion of the container so as to be located in accordance with the appropriate safety guidelines.
All of the patents cited in this specification, are herein incorporated by reference.
However, in spite of the above advancements, there still exists a need in the art for apparatus and methods for processing, transporting, and/or storing LNG.
This and other needs in the art will become apparent to those of skill in the art upon review of this specification, including its drawings and claims.

Methods and apparatus for processing, transporting and/or storing cryogenic fluids


A method and structure for adjustment of the threshold voltage of a vertical metal-oxide-semiconductor transistor. Chemical vapor deposition of doped silicon dioxide and annealing are used to form a voltage-threshold-adjustment region in at least the channel layer of the transistor adjacent to the trench wall.

This invention relates to metal-oxide-semiconductor (MOS) transistors formed at the vertical sidewalls of trenches formed in layers of alternately doped semiconductor materials and, in particular, to construction using chemical vapor depositions and annealing to adjust the threshold voltage levels of those transistors.
Vertical MOS transistors, in general, have very narrow channel regions, those regions comprising thin layers between the source and drain layers. One method of decreasing the probability of undesired punch-through of the narrow channel regions at high bias voltages is to form the channel regions with impurity doping concentrations that are higher than the impurity doping concentrations in the source and drain areas. However, the high doping concentrations may result in transistors that, in many applications, have an undesirably high threshold voltage levels. Known prior-art vertical MOS transistor construction procedures and structures have not provided for adjustment of those high threshold voltage levels downward or, under other circumstances, for adjustment of the threshold voltage levels upward.

Vertical MOS transistor with threshold voltage adjustment