Aspects of the invention include retrieving, by a processor, a list of participants invited to a meeting, the list of participants including a first participant and a second participant. It is determined, by the processor, whether the first participant has previously interacted with the second participant. Output is provided, by the processor to a user interface of a user device. The output includes information about the second participant based at least in part on determining that the first participant has not previously interacted with the second participant. The output includes information about an interaction between the first participant and the second participant based at least in part on determining that the first participant has previously interacted with the second participant.

Embodiments of the present invention relate in general to using computer systems for electronic communication, and more specifically to providing insights about web conference attendees.
Many business organizations are using teleconferencing tools, such as web conferencing tools, to conduct business meetings. The participants, or attendees, of the meetings may work for the business organization, or they may be external to the business organization such as customers of the business organization or service providers to the business organization. During the meetings conducted using teleconferencing tools, the attendees often share content by sharing their screens in a virtual meeting room, where an attendee can see the name and sometimes a picture of other attendees which includes other people who have logged into the meeting. For a big meeting and/or an external meeting with people outside of the business organization, it can be difficult for an attendee to know the roles and responsibilities or backgrounds of the other attendees. The same issue can arise, for example during a kickoff meeting for a new project. For the participants in the conference call, it is often challenging to know what questions to ask or what information can be disclosed when they do not have information about the other participants in the call.
Accordingly, while computer systems for providing electronic communications are suitable for their intended purposes, what is needed are computer systems having certain features of embodiments of the present invention.

Providing insights about attendees of smart web-events

INTERNATIONAL BUSINESS MACHINES CORPORATION


The technique of the present invention provides a solution to the problem of routing or redirecting a given client to a replica or proxy server which has a relatively shortest propagation delay to the client. According to the technique of the present invention, a network device referred to as an intercept server sits in front of a host server, and intercepts packets routed to the host server. When desired, packets which are intercepted by the intercept server are replicated, encapsulated and tunneled to selected client servers in the overlay network. The tunneled packets are received and processed by each of the selected client servers, whereupon each of the selected client servers generates a respective spoofed response to the source device identified in the header of the originally intercepted packet. Further, according to the technique of the present invention, each of the selected client servers transmits its respective spoofed response to the identified source device at substantially the same time. The client server associated with the spoofed response which is first received at the identified source device is considered to have the relatively shortest propagation delay to the identified source device, and is identified as the successful client server. Thereafter, the source device will be directed or redirected to communicate directly with the successful client server when subsequently attempting to access information from the host server.

1. Field of the Invention
The present invention relates generally to data networks, and more specifically to a technique for distributed load balancing of network traffic across a data network.
2. Background
Content providers on the World Wide Web are willing to pay a great deal of money to guarantee that their content is delivered quickly and accurately to any given client. Accordingly, a great deal of research has been conducted to address the problem of speeding up HTTP transactions conducted between a client and a server, particularly in situations where there is a relatively large propagation delay between the client and the server.
Although the speed of data transmission across the Internet is continuing to increase, the propagation delay associated with the speed of an electrical signal traveling through a wire or fiberoptic cable (i.e. the speed of light) cannot be reduced. Such delays are becoming a significant factor in the overall propagation delay between the server and client. In order to reduce the overall propagation delay between a given server and a given client, conventional techniques have resorted to replicating the server system, and placing multiple copies of the replicated server system at locations as near as possible to the client.
Thus, for example, a common technique used by content providers is to store content from the host server in co-location spaces that are geographically distributed over a wide area. The co-location spaces form an overlay network that is more costly and less flexible, but provide better service than the traditional Internet. Typically the ISPs which manage the co-location spaces charge the content provider for each megabyte stored in the co-location space. The co-location spaces may be implemented as proxy servers, which pull specific data from the host server in response to specific client requests, or may be implemented as fully replicated servers which include all the information of the host server.
Although the use of co-location spaces will help reduce the overall propagation delay between a server and client, another issue which arises relates to the problem of determining how an arbitrary client is redirected to the nearest replica or proxy server, particularly where it is not known ahead of time which clients will be asking for information and where the clients are located. Some conventional techniques have been implemented to address this problem, but typically require the use of a gateway router.
An alternate technique for predicting, for a given client, the nearest replica or proxy server to that client has been developed by Akamai Technologies, Inc. (of Cambridge, Mass.). The proprietary Akamai routing technique involves constructing a network map of the Internet topology. The network map information is stored in a central network operating center or NOC which is located on a specific Akamai server. When a client attempts to access a content provider""s site which is part of the Akamai overlay network of co-location servers, the client will initiate a DNS resolution request, which is resolved by the NOC server. The NOC dynamically resolves the requested domain name to a co-location server address that is nearest topologically to the client, using information from the network map.
However, in order for Akamai""s routing technique to be successfully implemented, the network topology map must be continually updated and maintained. According to at least one school of thought, however, maintaining an accurate Internet topology may be nearly impossible since the Internet topology is dynamically changing and is exponentially growing in size and complexity each day.
More importantly, the Akaimi routing technique is limited only to resolving DNS queries implemented using DNS protocol. Currently, the Akaimi technique for re-routing clients to a nearest proxy server is not extendable to other protocols such as, for example, TCP. Thus, for example, when a client obtains a particular IP address of a server, and subsequently attempts to initiate a TCP connection with that server, the Akaimi technique can not be used to re-route the client to establish a TCP connection with a topologically closer proxy server.
Accordingly, in light of the foregoing, there exists a continual need to develop alternative solutions for providing fast and efficient routing and load balancing of web traffic across data networks.
According to specific embodiments of the present invention, a technique is provided for routing a client device to access a specific client server in a data network. The data network may include at least one host server, a sub-network of client servers associated with the at least one host server, and at least one client system. According to one embodiment, the data network corresponds to the Internet, wherein the at least one host server corresponds to the host server of a content provider, the sub-network of client servers corresponds to an overlay network of proxy or replica servers.
The technique of the present invention provides a solution to the problem of routing or redirecting a given client to a replica or proxy server which has a relatively shortest propagation delay to the client. According to the technique of the present invention, a network device referred to as an intercept server sits in front of a host server, and intercepts packets routed to the host server. When desired, packets which are intercepted by the intercept server are replicated, encapsulated and tunneled to selected client servers in the overlay network. The tunneled packets are received and processed by each of the selected client servers, whereupon each of the selected client servers generates a respective spoofed response to the source device identified in the header of the originally intercepted packet. Further, according to the technique of the present invention, each of the selected client servers transmits its respective spoofed response to the identified source device at substantially the same time. The client server associated with the spoofed response which is first received at the identified source device is considered to have the relatively shortest propagation delay to the identified source device, and is identified as the successful client server. Thereafter, the source device will be directed or redirected to communicate directly with the successful client server when subsequently attempting to access information from the host server.
Other embodiments of the present invention are directed to a method and computer program product for routing a client device to access a specific server in a data network. The data network includes a sub-network of client servers which are configured to include information corresponding to information stored on at least one host server. A first packet is received from a source device. Information relating to the first packet is then forwarded to a first portion of client servers in the sub-network. Each of the first portion of client servers is then caused to transmit, at substantially the same time, a respective spoofed response to the source device. Each spoofed response may be generated using information from the first packet. According to a specific embodiment, a successful client server may then be identified as being associated with generating a particular spoofed response that was first received at the source device. An ID of the source device may then be binded with an ID of the successful client server in order to cause subsequent requests from the source device to access information from the host server to be routed to the successful client server device for processing. Further, according to a specific implementation, the first packet received from the source device may correspond to a SYN segment of a TCP protocol for communicating with the host server. Additionally, each spoofed response may comprise a SYN, ACK segment which includes a unique sequence number relating to an identity of the client server which generated the spoofed response.
Additional embodiments of the present invention are directed to a method and computer program product for routing traffic in a data network. The data network comprises a sub-network of client servers configured to include information corresponding to information stored on at least one host server. A first packet from a source device is received at a first network device. The source device is identified using information from the first packet. Using the identified source device information, a first portion of the client servers is then selected for forwarding information relating to the first packet. Information relating to the first packet is then forwarded to the first portion of client servers. Each of the first portion of client servers is then caused to transmit a respective spoofed response to the source device at substantially the same time. According to a specific embodiment, the selection of the first portion of client servers may include at least one preferred client server associated with the identified source device, and may further include at least one randomly selected client server from the sub-network of client servers.
Further embodiments of the present invention are directed to a method and computer program product for routing traffic in a data network. The data network includes a sub-network of client servers configured to include information corresponding to information stored on at least one host server. A tunneled packet transmitted from an intercept server is received at a first client server. The tunneled packet includes encapsulated information related to a first packet intercepted by the intercept server. The first packet includes a source address and a destination address. The source address corresponds to a source device which generated the first packet. The first packet information relates to a request to open a communication connection with a host server. The first client server generates a first spoofed response to the first packet request using information from the received tunneled packet. The first spoofed response further includes information for identifying the first client server which generated the first spoofed response. The first spoofed response is then transmitted to the source device. According to a specific implementation, the first packet corresponds to a SYN segment of a communication utilizing a TCP protocol. Further, according to this embodiment, the first spoofed response comprises a SYN, ACK segment which includes a first sequence number relating to an identity of the first client server.
An alternate embodiment of the present invention is directed to a system for routing a client device to access a specific server in a data network. The system comprises a sub-network of client servers configured to include information corresponding to information stored on at least one host server. The system may further comprise at least one intercept server configured to intercept at least one packet routed to a host server. The intercept server is further configured to identify a source device which generated the intercepted packet. The intercept server may further be configured to forward information relating to the first packet to a selected portion of client servers. Further, the intercept server may be configured to cause each of the selected client servers to transmit a respective spoofed response to the source device at substantially the same time.
Another embodiment of the present invention is directed to a network device comprising at least one CPU and memory. The memory may include a first portion of memory configured to store content information which is substantially similar to content information stored on at least one host server in a data network. The network device may further comprise at least one interface for receiving a tunneled packet from an intercept server. The tunneled packet may include encapsulated information relating to a first packet intercepted by the intercept server. The first packet may include a source address and destination address, wherein the source address corresponds to a source device associated with generating the first packet. The first packet information may relate to a request to open a communication connection with the host server. The network device may be further configured to generate, using information from the received tunneled packet, a first spoofed response to the source device request, wherein the first spoofed response includes information for identifying the first client server which generated the first spoofed response. Additionally, the network device may further be configured to transmit the first spoofed response to the source device.
An alternate embodiment of the present invention is directed to a system for routing a source device to access a specific server in a data network. The system comprises a sub-network of client servers configured to include information corresponding to information stored on at least one host server. The system further includes at least one intercept server configured to intercept at least one packet addressed to a host server. The intercepted packet includes information for identifying a source device associated with the packet. The intercept server is further configured to forward information relating to the intercepted packet to a selected portion of the client servers in the sub-network. Each of the selected client servers is configured to transmit, at substantially the same time, a respective spoofed response to the source device, wherein each spoofed response is generated using information from the intercepted packet. According to a specific implementation, the intercept server is configured to identify a successful client server which generated a spoofed response that was first received at the source device. The intercept server is further configured to bind an ID of the source device with an ID of the successful client server device. In this way, subsequent requests from the source device to access information from the host server may be forwarded to the successful client server for processing.
Additional objects, features and advantages of the various aspects of the present invention will become apparent from the following description of its preferred embodiments, which description should be taken in conjunction with the accompanying drawings.

Distributed network traffic load balancing technique implemented without gateway router


In a flip-chip type semiconductor device, a pad electrode and a passivation film are formed on a semiconductor substrate. An insulating resin layer is formed on the passivation film, and an opening is formed above the electrode. A pad electrode adhesive metal film is formed on the substrate like a re-wiring pattern, and a plating feed layer metal film and a Cu plating layer are sequentially formed on the metal film to form a wiring layer. A metal post electrode is formed on the wiring layer. A solder bump is formed on the post electrodes, a support plate in which holes each having a diameter larger than the diameter of the solder bump are formed at positions adjusted to the solder bumps is arranged, and an insulating resin layer is formed between the support plate and the semiconductor substrate. Therefore, a stress acting on the solder bump is moderated.

1. Field of the Invention
The present invention relates to a flip-chip type semiconductor device obtained by mounting a semiconductor chip on a multi-layered wiring substrate and a manufacturing method of the same and, more particularly, to a flip-chip type semiconductor device which can be recycled, has high mounting reliability, and can be manufactured at a low cost and a method of manufacturing the same.
2. Description of the Related Art
FIG. 1A is an illustration showing a conventional flip-chip type semiconductor device, and FIG. 1B is an illustration showing a mounting state of a conventional flip-chip type semiconductor device.
As shown in FIG. 1A, in a conventional flip-chip type semiconductor device 100, projecting solder bumps 101 consisting of a solder or a metal material such as Au or an Snxe2x80x94Ag-based alloy are formed on external terminals which are provided in area array arrangement on a peripheral portion or an active region of a chip.
The flip-chip type semiconductor device 100 is mounted on a multi-layered wiring substrate 102 (mounting substrate) on which electrode pads (not shown) are formed in the same pattern as the bump arrangement pattern of the flip-chip type semiconductor device 100 on the side of an end user. When the flip-chip type semiconductor device 100 is mounted on the multi-layered wiring substrate 102, if a bump material is a solder, the flip-chip type semiconductor device 100 is mounted by an IR reflow (infrared reflow) process using a flux.
However, after the conventional flip-chip type semiconductor device 100 is mounted on the multi-layered-wiring substrate 102, due to incoincidence (mismatch) between linear expansion coefficients of the multi-layered wiring substrate 102 and the flip-chip type semiconductor device 100, especially, the temperature cycle characteristics of the mounting reliability are degraded disadvantageously. In order to solve the problem, the following measure is conventionally performed.
In order to make the linear expansion coefficient of the multi-layered wiring substrate close to the linear expansion coefficient of silicon, a ceramic-based material such as AlN, mullite, or glass ceramics which is substantially expensive among a material is used to minimize the mismatch between the linear expansion coefficients, thereby performing an attempt to improve the mounting reliability. This attempt is effective from the viewpoint of improvement in mounting reliability. However, since the expensive ceramic-based material is used as the material of the multi-layered wiring substrate, the application of the measure is limited to a super computer, a large-scale computer, or the like which is generally maximally expensive.
In contrast to this, in recent years, the following technique is proposed. That is, an under fill resin is arranged between a semiconductor chip and a multi-layered wiring substrate which is relatively low in cost and which uses an organic material having a large linear expansion coefficient to construct a flip-chip semiconductor device, so that mounting reliability can be improved. In this manner, the under fill resin is arranged between a semiconductor chip and a multi-layered wiring substrate using an organic material, so that a shearing stress acting on a bump joint portion existing between the semiconductor chip and the multi-layered wiring substrate using the organic material is dispersed, and the mounting reliability can be improved. When the under fill resin is interposed between the semiconductor chip and the multi-layered wiring substrate using the organic material, a multi-layered wiring substrate using an inexpensive organic material can be used.
However, in this conventional technique, when a void exists in the under fill resin, or when the adhesive characteristics of an interface between the under fill resin and the semiconductor chip and an interface between the under fill resin and the multi-layered wiring substrate using an organic material are poor, in a moist absorption reflow process of a product, a peeling phenomenon occurs on the interface, and a defective product is manufactured disadvantageously. For this reason, the conventional technique cannot reliably advance a reduction in cost of a flip-flop type semiconductor device.
In addition, since a flip-chip type semiconductor chip is generally used in an LSI having high performance, the products itself is expensive. Therefore, when a portion except for the semiconductor chip is defective in an electric selection process performed after the flip-chip type semiconductor chip is mounted on a multi-layered wiring substrate, non-defective semiconductor chip must be recycled. However, when an under fill resin is interposed between the semiconductor chip and the multi-layered wiring substrate using an organic material, the semiconductor chip cannot be recycled. In this case, since peripheral devices including the multi-layered wiring substrate using the organic material become defective, a reduction in cost can hardly be always advanced by using the multi-layered wiring substrate using the organic material.
On the other hand, when a ceramic-based multi-layered wiring substrate is used in a semiconductor chip, the linear expansion coefficient of the ceramic-based material is optimized to eliminate the necessity of an under fill resin. For this reason, a recycle process for a non-defective semiconductor chip can be relatively made easy.
FIG. 2A is an illustration showing a removing method of a flip-chip type semiconductor device, and FIG. 2B is an illustration showing the flip-chip type semiconductor device after the removal. When a semiconductor device 100 is to be recycled, a heating absorption tool 103 absorbs the semiconductor device 100 by sucking the semiconductor device 100 by means of a vacuum device (not shown) connected to an exhaust pipe 104 formed in the heating absorption tool 103, and the semiconductor device 100 is heated to a high temperature by a heater 105 to melt solder bumps 101 on the rear surface of the semiconductor device 100, thereby drawing the semiconductor device 100 from the multi-layered wiring substrate 102. In this manner, the non-defective semiconductor device 100 can be removed.
However, when the semiconductor device 100 is removed, the semiconductor device 100 is heated to a high temperature. For this reason, a passivation film consisting of a polyimide (PI)-based organic material or an inorganic material such as SiO and formed to protect the solder bumps 101a of the removed semiconductor device 100 or the barrier metal joint portion between the solder bumps 101 and the semiconductor device 100, and the active region of the semiconductor device 100 is damaged. For this reason, the non-defective semiconductor chip may be defective. In this manner, due to the above-described problem, it is difficult to recycle a non-defective flip-chip type semiconductor chip in the conventional technique.
It is an object of the present invention to provide a flip-chip type semiconductor device which can be recycled, has high mounting reliability, and can be manufactured at a low cost and a method of manufacturing the same.
A flip-chip type semiconductor device according to the present invention includes a semiconductor substrate, a pad electrode formed on the semiconductor substrate, an insulating film formed on the entire surface of the semiconductor substrate to be opened above the pad electrode, a wiring portion patterned on the pad electrode and the insulating film, an electrode formed on the wiring portion, a metal bump formed on the electrode, a support plate in which holes each having a diameter larger than the diameter of the metal bump are formed at positions adjusted to the metal bumps and which is arranged such that the metal bumps project with an appropriate interval above the semiconductor substrate, and an insulating resin layer formed to bury the electrode between the semiconductor substrate and the support plate.
In the present invention, since the insulating resin layer is formed on the semiconductor substrate, even though a thermal stress or a mechanical stress acts on the metal bump, the stress acting on the metal bump can be moderated by the elasticity of the insulating resin layer. For this reason, an active region or the like formed on the semiconductor substrate can be more protected, and the mounting reliability of the semiconductor device is improved. In addition, since an under fill resin is not used unlike a conventional device, the semiconductor device can be recycled without damaging peripheral devices including the multi-layered wiring substrate. Furthermore, since the metal bump is formed on the electrode buried in the insulating resin layer to project from the surface of the support plate, the height between the semiconductor substrate and the metal bump can be increased. For this reason, when the semiconductor device is mounted on a multi-layered wiring printed board or the like, a standoff height which is the interval between the semiconductor substrate and the multi-layered wiring printed board can be increased. Therefore, when the semiconductor substrate and the multi-layered wiring printed board are offset due to the mismatch between the linear expansion coefficients of the semiconductor substrate and the multi-layered wiring printed board, the offset can be reduced. Especially the temperature cycle characteristics of the mounting reliability can be improved.
In the present invention, the periphery of the joint portion between the metal bump and the electrode is preferably covered with the insulating resin layer. In this manner, since the joint portion between the metal bump and the electrode is reinforced, the mechanical strength of the joint portion of the metal bump is improved to improve protection properties against an external stress.
Furthermore, in the present invention, for example, the support plate can be made of a conductive material, an insulating film and a metal film can be formed on the support plate in the order named, and a metal bump, having a ground potential, of the metal bumps can be connected to the metal film with a conductive adhesive agent. For example, the support plate can be made of an insulating material, a metal film can be formed on the surface of the support plate, and a metal bump, having a ground potential, of the metal bumps can be connected to the metal film with a conductive adhesive agent. In this manner, since the metal film can be used as a GND plane function, the following electric characteristics can be improved. That is, a GND inductance in a package form can be reduced, EMI (Electromagnetic wave impedance) shield effect can be improved, and crosstalk noise can be reduced.
In addition, in the present invention, the insulating resin layer preferably contains at least one resin selected from the group consisting of an epoxy-based resin, a silicon-based resin, a polyimide-based resin, a polyolefin-based resin, a cyanate ester-based resin, a phenol-based resin, a naphthalene-based resin, and a fluorene-based resin.
In addition, in the present invention, the insulating film can be made of a photosensitive material. Further, the insulating film preferably has a thermal decomposition temperature of 200xc2x0 C. or more.
In a method of manufacturing a flip-chip type semiconductor device according to the present invention, a pad electrode is formed on a semiconductor substrate. An insulating film is formed on the entire surface of the semiconductor substrate, and the part of the insulating film that is on the pad electrode is removed to form an opening. A metal thin film layer is formed on the entire surface of the semiconductor substrate and the metal thin film layer is patterned to form a wiring portion. A resist film is formed on the entire surface of the semiconductor substrate. The resist film is patterned to remove the resist film on the wiring portion, and an electrode is formed in the opening. A metal bump is formed on the electrode. A support plate is arranged above the semiconductor substrate with an appropriate interval between the support plate and the semiconductor substrate. In the support plate, holes each having a diameter larger than the diameter of the metal bump are formed at positions adjusted to the positions where the metal bumps are arranged. An insulating resin is injected between the semiconductor substrate and the support plate.
In the present invention, since packages can be manufactured by the process in the state of a semiconductor device, the number of steps can be considerably reduced in comparison with a packaging method in which packages are manufactured from a conventional state of small pieces so that the cost can be considerably reduced.
In the present invention, the support plate can be made of a conductive material, an insulating film and a metal film can be formed on the support plate in the order named, and a conductive adhesive agent can be buried into the hole of the support plate located at the metal bump, having the ground potential, of the metal bumps.
Furthermore, the present invention preferably includes the step of burying a conductive adhesive agent into the hole of the support plate located at the metal bump, having the ground potential, of the metal bumps when the support plate is made of an insulating material and a metal film is formed on the surface of the support plate.
Still furthermore, in the present invention, the step of arranging the support plate above the semiconductor substrate is to place the support plate on jigs arranged at both the ends of the semiconductor substrate and each having an appropriate interval thickness.

Recyclable flip-chip semiconductor device


A method of securing a liner or inlay in an opening of a case surrounding a shaped explosive charge on all sides except for the opening, the opening facing the direction of the intended effect of the charge. The liner or inlay defines the shape of the charge in the direction of the intended effect of the charge. The method comprises immovably securing the liner or inlay in a direction parallel to the direction of the intended effect of the charge, and simultaneously resiliently securing the liner or inlay in a direction orthogonal to the direction of the intended effect of the charge, whereby a clearance is exists between an outer edge of the inlay or liner and an inner wall of the case.

The expression "shaped charges" is understood to mean charges for directed bursting or hollow charge effect. These charges consist of an explosive charge enclosed in a container or case and defined, forwardly in the direction of the intended effect by inlays or liners which are of a concave bulging, conical or trumpet-shape. On detonation of the rearwardly located explosive charge, these liners or inlays are converted into particle jets or more or less projectile-like slugs which, at supersonic speeds, are flung forwards in the intended effect direction of the charge. It is primarily the shape and material of the liner or inlay that which determines whether the main effect of a shaped charge is of the nature of a jet or a projectile. The most common material used for the liner or inlay is pure copper, but other metals such as iron, spent uranium, aluminium and tantalum have also been employed.
Ammunition must be capable of withstanding extreme temperature variations without its function being tangibly affected. As long as the shaped charge inlays were made of pure copper and the rest of the case surrounding the explosive charge was of steel, problems of temperature variation were not excessively difficult to solve, since steel and copper do not, after all, have all too different coefficients of thermal expansion.
However, now that there is a steady trend towards producing shaped charge inlays from tantalum in order to satisfy the demands placed on the efficiency of the charge, the problem of temperature variation becomes more acute. In particular, as the shaped charge inlays are intended to be permanently mounted in the steel case which generally surrounds the explosive charge portion included in the shaped charge on all sides except in the intended effect direction where the inlay or liner forms the concave cavity in the explosive substance that gives rise to the directed explosive effect. The reason for this is that tantalum and steel display large differences in thermal expansion. Previously, the inlays have normally been secured in shaped charges by means of a screw ring threaded in the mouth of the steel case and fixedly clamping the inlay against a folded edge in the case. Provided that the clearance between the wall of the case and the inlay is not too large, this securement method gives the permanent securement of the inlay that has been deemed necessary for the satisfactory functioning of the shaped charge. However, it is known in the art that the reforming of the inlay into a projectile or particle jet on detonation of the explosive charge is affected by the anchorage ring and the securement fold along that edge zone which, as it were, is shielded from the explosive since this does not reach all the way out to the outer edge of the inlay.
Now that the inlay is to be manufactured of tantalum, as this material gives an amplified effect as compared with the previously used copper, and the rest of the sleeve surrounding the explosive is made of steel, a clearance of 0.01 mm between inlay and case at .about.20.degree. C. would cause the inlay to suffer from a subsequently permanent change in shape if the charge were to be exposed to a temperature of -40.degree. C., a circumstance which must be considered as fully conceivable at any rate in cold climates such as in Sweden.
If greater clearance is to be permitted between the inlay and case, the folded edge and the screw ring fixedly clamping the inlay must be given a larger surface area which, in both cases, means parameters that negatively influence the effect of the charge on the target, as a larger portion of the inlay will then be shielded from the explosive.


An ornamental electrical molding comprising a body made up of flexible and moldable insulating material, where tubular conductors made up of helically wound wire are located. The molding is covered on its bottom face by a plastic foam strip coated with contact adhesive, and permits--together with a set of fittings assembled to each other--the performance of exposed surface installations quickly, easily and decoratively. The body that houses the wire conductor tubes has a double function, as insulator and as the frame for ornamental designs.

Modem life's demands bring about changes in the space configuration of buildings. New needs arise that the existing installations in buildings cannot meet and therefore lead to the use of accessory installations exposed on the surface. The existing systems with self-affixing means attempting to solve the above mentioned problem may be classified into two groups: a) surface conductors and b) cable carry ducts.
When considered as a whole, the systems above, obviously contemplate many of the problems posed by this kind of installation. However, when individually analyzed, they show inherent design limitations that leave a great deal of the problems unsolved.
For example, some systems whose conductors are wires, are flexible enough to suit various surface types, yet they cannot be easily spliced, which hampers the use of fittings. Examples: Cabral, U.S. Pat. No. 2,831,049; Stern U.S. Pat. No. 3,253,085; Hirtle, U.S. Pat. No. 2,701,819.
Other systems using rigid tubes as the electrical current conductor element may be relatively easily assembled by using connecting pins; however, the tubes' own rigidity prevents them from adapting to irregularly shaped surfaces. Such is the case of O'Brien, U.S. Pat. No. 2,413,032, who presents a continuous metallic tube requiring certain rigidity to perform its function; that rigidity becomes a problem in other senses. For example, contact reliability is little, since there is little tolerance allowed to achieve good adjustment between the connecting pin and the rigid tube. Therefore, a slight difference may impair contact between elements. Rigidity is a problem too in, cable carrying ducts, Santucci's, U.S. Pat. No. 4,602,124 which are extremely rigid on account of their double "U-shaped" structure (base and cover) which makes it impossible to adjust a channel with a section of that shape to a curved surface, for example. That same structure composed of double sidewalls made up of U-shaped channel and U-shaped channel cover sidewalls) is ugly and takes up space. In addition, it features superfluous insulating material in excess of the insulation provided in the cables that are carried.
The rigidity of systems with both rigid tubular conductors (O'Brien) and cable-carrying ducts (Santucci) complete the manufacturer to provide short lengths, which increases the number of cuts and splices, thus deteriorating the aesthetic aspect of the installation. Cable-carrying ducts are extremely useful for industrial applications, where it is necessary to protect and systematize installation of conductors, paying little attention to the aesthetic aspect. However, they do not solve the aesthetic/functional problem of urban uses, where the decorative aspect is important.
The above mentioned, already existing systems, do not provide a solution to the problem posed by the need to penetrate a wall or partition wall in order to extend installation from one room into another. In contrast, the system proposed herein makes it possible to extend installations from one partition's side into the other by combining conductors located concentrically and in juxtaposition through the use of an interconnecting plug.


If a configuration is employed in which modulation schemes used for an optical communication system can be switched depending on transmission conditions, it is difficult to make effective utilization of frequency resources without the power consumption increasing and the control becoming complex; therefore, an optical transmitter according to an exemplary aspect of the present invention includes an interface means for converting a digital signal to be transmitted under a predetermined transmission condition over an optical carrier wave into a parallel signal with a predetermined bit number at a predetermined transmission rate, and outputting the parallel signal; an encoding means for encoding the parallel signal using one coding system from among a plurality of convolutional coding systems with different degrees of redundancy; a mapping means for mapping an output bit signal output from the encoding means to a modulation symbol; an optical modulation means for modulating the optical carrier wave based on a symbol signal output from the mapping means; and an encoding control means for selecting a predetermined coding system corresponding to the predetermined transmission condition from among the plurality of convolutional coding systems and controlling the interface means, the encoding means, the mapping means, and the optical modulation means in such a way as to operate in accordance with the predetermined coding system.

It is important in an optical communication system using optical fibers to increase the receiving sensitivity and the frequency utilization efficiency per optical fiber in order to achieve a long-distance and large-capacity communication. It has been proposed to switch to use various modulation schemes that differ in the reachable transmission distance and the frequency utilization efficiency depending on a transmission distance and a transmission capacity that are required because the optical communication has a trade-off relationship between increase in transmission distance and improvement in frequency utilization efficiency. Examples of modulation schemes that differ in the reachable transmission distance and the frequency utilization efficiency include BPSK (binary phase shift keying), QPSK (quadrature phase shift keying), 8QAM (quadrature amplitude modulation), and 16QAM.
One example of optical transmitters that switch to use modulation schemes is described in Patent Literature 1. The related adjustable bit rate optical transmitter described in Patent Literature 1 includes a digital signal processing (DSP) unit and accompanying digital to analog conversion (DAC) circuitry and drives different programmable Mary-Quadrature Amplitude Modulation (M-QAM) schemes. The DSP is programmed to apply a control algorithm and select a proper QAM scheme from the multiple QAM schemes for the signal modulation of the optical transmitter. It is said that the configuration makes it possible to maintain a desired level of transmission performance or optimize the transmission performance without the need for replacing the optical transmitter.
The related adjustable bit rate optical transmitter, however, has the problem that frequency utilization efficiency has a surplus depending on conditions because the granularity is coarse in switching modulation schemes. If a single optical transceiver switches to use a plurality of modulation schemes such as BPSK, QPSK, 8QAM, and 16QAM, it is necessary to implement a digital signal processing circuit having a plurality of algorithms and bit precision that correspond to the plurality of modulation schemes. Consequently, there has been the problem that the power consumption of the optical transmitter and an optical receiver increases, and the control of them becomes complex.
A set-partitioning method in a multi-dimensional signal space is one of the methods by which making the granularity in switching modulation schemes fine down is balanced with preventing the signal processing circuit from getting complex under the above-described trade-off relationship between the transmission distance and the frequency utilization efficiency. The set-partitioning method has gotten attention recently because it has a high affinity for optical signals that are four-dimensional signals intrinsically. For example, Non Patent Literature 1 discloses a technology of obtaining coding gain through multi-dimensional optical coded modulation, that is, SP (set-partitioning)-32-4D (dimensions)-16QAM and SP-128-4D-16QAM.
Non Patent Literature 2 discloses a trellis-coded optical modulation scheme in which convolutional codes are combined with a set-partitioning method, as a method of achieving a transmission distance that exceeds a transmission distance anticipated from the above-mentioned trade-off relationship between a transmission distance and frequency utilization efficiency. The trellis-coded modulation enables a least-square free distance between code sequences to be extended by the convolutional encoding to the square of the distance between signals in the states that are partitioned by the set-partitioning method. This makes it possible to obtain coding gain that surpasses one achieved by the set-partitioning method.

Optical transmitter, optical communication system, and optical communication method


A brightness adjuster generating an image output to a panel, which displays the corresponding image according to the image output. The image output includes a red output signal, a green output signal, and a blue output signal. The brightness adjuster includes a determination unit, a calculation unit, and a digital to analog converting unit. The determination unit determines a main input signal according to a red input signal, a green input signal, and a blue input signal. The calculation unit adjusts the red, the green, and the blue input signals according to the main input signal. The digital to analog converting unit transforms the adjusted red, the adjusted green, and the adjusted blue input signals into the red, the green, and the blue output signals.

1. Field of the Invention
The invention relates to an adjuster, and more particularly to a brightness adjuster for a panel.
2. Description of the Related Art
Because cathode ray tubes (CRTs) are inexpensive and provide high definition, they are utilized extensively in televisions and computers. With technological development, new flat-panel displays are continually being developed. When a larger display panel is required, the weight of the flat-panel display does not substantially change when compared to CRT displays.
For flat-panel displays, power saving is an important issue. A conventional power saving method is to add a white pixel with high efficiency and reduce brightness of red, green, and blue pixels. However, this method results in color saturation being reduced.
Another conventional power saving method utilizes complex expressions and utilizes a frame memory to store data of a previous frame. However, this method increases costs.

Brightness adjuster, adjustment method, and electronic system utilizing the same


A method to remove selected parts of a thin-film material otherwise uniformly deposited over a template is disclosed. The methods rely on a suitable potting material to encapsulate and snatch the deposited material on apexes of the template. The process may yield one and/or two devices during a single process step: (i) thin-film material(s) with micro- and/or nano-perforations defined by the shape of template apexes, and (ii) micro- and/or nano-particles shaped and positioned in the potting material by the design of the template apexes. The devices made from this method may find applications in fabrication of mechanical, chemical, electrical and optical devices.

In conventional micro- and nano-fabrication, there are variety of cases in which a specific patterned thin-film material may need to be made. Examples may include production of micro- or nano-structure patterned thin-film electrical contacts on an electronic chip; micro- or nano-structure patterned perforated metallic film(s) in a plasmonic device; micro- or nano-structure textured electrodes for photo-voltaic cells, plasmonic devices, metamaterial devices, optical filters, bio-sensors, gas detectors, optical polarizers, displays, document security features, among many others.
In conventional micro- and nano-fabrication, there are also a variety of cases in which a specific spatial arrangement of precisely shaped micro- or nano-particles may need to be made. Examples may include production of micro- or nano-particles and structures as may be used in such applications as those listed above.
There are conventionally known methods that rely on established micro- or nano-fabrication processes that may provide for fabrication of micro- or nano-structures as may be used in such applications as those listed previously. Typically such conventional processes are often utilized for manufacturing many individual and separate small devices on a shared large wafer (e.g. silicon wafer). The total fabrication cost of producing a micro- or nano-structured wafer will be divided among the many separate individual devices that are manufactured on the same wafer; and therefore the cost of conventional manufacture of each device is typically defined by the cost per area of the wafer containing multiples of those conventional small devices.
However, there are cases in which the final micro- or nano-structure based device need to be large (such as for example >1 cm2) in area. Using conventional known wafer-scale micro- or nano-fabrication methods will typically make such large area devices undesirably or unfeasibly expensive for many potential applications. For example, a plasmonic color filter may comprise a 30 nm metal film perforated with 100 nm diameter holes periodically arranged in a lattice of 200 nm pitch or periodicity. As an example, the desired size of a plasmonic-based color filter should be in the range of ˜25 cm2 area for lighting or photography applications, the filtering efficiency should be high, and a desired price for such applications should be low (perhaps $1 per filter or less). If the filter is to be disposable, a high volume (millions or billions) of such devices should be reasonably produced. Such a relatively large area and relatively inexpensive price per device may not be possible using conventionally known fabrication processes where the cost of such a nano-structured filter device may typically be one or more orders of magnitude higher than desired for such an application.
In one conventional method, optical lithography may be used to make micro- or nano-structures in a thin-film material. The process typically involves: (i) optical resist coating, exposure, and development steps, (ii) thin-film material coating steps, and (iii) steps (e.g. wet etching, dry etching, and lift-off) to transfer patterns of the resist to the thin-film. In optical lithography many wafers can be patterned using a single often expensive optical mask; therefore the cost of the mask is divided among the many final patterned wafers, though the cost per unit area of the final wafer may still remain significantly higher than that which is desired due to the many steps that are required to pattern a final device. Also, the optical lithography often covers a range of minimum feature sizes larger than what may typically be needed for such applications as those listed above. Of special interest is the fabrication of precision nano-structures for which optical lithography typically may provide poor results. There are a range of conventional direct (i.e. maskless) fabrication methods that maybe used to directly pattern the final wafer at micro- or nano-sizes.
In one conventional maskless method, a focused ion beam (FIB) may be used to make micro- or nano-structures from a thin-film material deposited on a plain substrate. FIB may be used to mill features even smaller than 15 nm in a thin-film. However, such a method has the disadvantage of being very low throughput, which typically limits the practical device area to undesirably small sizes (e.g. <1 cm2).
In another conventional maskless method, Electron Beam Lithography (EBL) may be used to fabricate micro- or nano-structures. The process typically involves: (i) coating a substrate with a thin-film material, (ii) electron beam lithography to make openings in a resist that is spun on the thin-film, and (iii) reactive ion etching to etch through the thin-film that is not protected with the resist. Another typical process involves: (i) electron beam lithography to make openings in a resist that is spun on the substrate, (ii) coating the resist and the openings with a thin-film material, and (iii) lifting-off the material that is deposited on the resist by dissolving the resist in appropriate chemicals. EBL has a higher throughput compared to FIB; and that makes fabrication of larger area devices possible. However, EBL has the disadvantage of being too slow and too expensive for directly fabricating many large area micro and nano-structured devices.
In another conventional maskless method, interference lithography may be used to fabricate micro- or nano-structures. The process typically involves: (i) coating a substrate with photoresist, (ii) one-step or few-step interference lithography followed by resist development to yield periodic resist structures on the substrate, (iii) thin-film material deposition, and (iv) lift-off the thin-film from photoresist. Interference lithography is faster than EBL, and it can yield fast patterning of larger areas. However, interference lithography is considerably restricted in the shape and precision of the final patterns possible to make, and the materials which are compatible for this process.
In another conventional method, polystyrene nanospheres are self-assembled on a substrate. Subsequent reactive ion etching may be used to shrink the size of spheres to desired value. Thin-film material deposition on the spheres and lift-off yields periodic micro- or nano-structures. However, such nanosphere lithography is typically limited in control over the type of fabricated structures and their uniformity.
Such typical conventional processes rely on well-established micro- or nano-fabrication techniques to yield a single device or plurality of devices that share a single host wafer. That means to make another copy of the same device, almost the entire process must be undesirably repeated, which typically is a significant limitation for industrial scale production of desirably inexpensive large devices. However, the above conventional techniques or others in the art may be used to yield a single expensive master wafer with a template of patterns that may be replicated to many cheap copies using one of the known conventional replication methods.
In one conventional replication method, nanoimprint lithography may be used to replicate the micro- or nano-structures of an expensive master which is made by one of the conventional techniques listed above or others known in the art. The process typically involves: (i) bringing a polymer/resin in contact with the master surface and curing it in place, (ii) peeling off the hardened polymer/resin from the master. The peeled polymer/resin will carry a replica of the patterns on its surface. The process can be repeated many times to get many cheap replicas from a single master.
In another conventional replication method, soft lithography may be used to replicate the micro- or nano-structures of an expensive master. The process typically involves: (i) making a soft replica of a master wafer by nanoimprint lithography, (ii) coating the target substrate with a photoresist, (iii) bringing the soft replica in conformal contact with the target wafer, and (iv) UV exposure. Developing the exposed resist will result in a replica of the master to the target substrate.
In another conventional replication method, roll-to-roll nanoimprint lithography (also known as 'cast and cure', 'roll-to-roll UV casting', and 'roll-to-roll embossing') may be used to replicate the micro- or nano-structures of an expensive master. The process typically involves: (i) replicating a master into a flexible copy using nanoimprint lithography, soft lithography, etc. and/or further processing the copy to a metal (e.g. Ni) shim, and (ii) rolling the flexible copy over a mold roller which is pressed against a back roller. Similar to a printing machine, a thin substrate moves between the two rollers where it receives a copy of the patterns through a thermal or UV process. The massive throughput of a roll to roll process can cheaply replicate micro- and nano-patterns over a giant surface at a high speed. A variation of the same process can be implemented in a plate-to-roll format.
Such conventional replication techniques and others in the art typically provide a resin/plastic copy of a typically expensive master. One still needs to employ metal/material deposition, lift-off, etching, etc. to yield a final device that includes a micro or nano-structured thin-film material. Any process that can yield a micro or nano-structured thin-film material that is more cost effective than those known in the art, and without the use of lift-off or etching is of high industrial value, because it can reduce the cost and complexity of the manufacturing process.
In one conventional method to avoid lift-off or etching, template stripping may be used to selectively remove parts of a thin-film material otherwise uniformly deposited over template (a master or a replica of a master). The process typically involves: (i) coating the template with a thin-film material, (ii) pressing the coated template against a plastic substrate while heating the sandwiched materials to a temperature above a glass transition temperature of the plastic, and (iii) peeling of the cooled plastic. The process results in the transfer of a micro or nano structured thin-film material to plastic, leaving behind the thin-film in valleys of the template. The method leverages the poor adhesion of the thin-film to the template, and the good adhesion of the thin-film to the softened plastic.
Conventional template stripping may be implemented in different variants. In one variant a UV curable resin is applied over the thin-film coated template to strip the deposited thin-film. In another variant, an adhesive is applied over the thin-film coated template to strip the deposited thin-film. In another variant, the template is cleaned and reused at the start of each thin-film deposition and stripping cycle. In another variant, the ultra-smooth surface formed at thin-film and template interface is brought to the top functional surface of the final perforated thin-film enhancing the final device performance. In another variant, nano-tips for applications in near-field optical microscopy, nano-focusing, or others are fabricated using template striping. In another variant, all the thin-film material deposited over the template is transferred to a target substrate to yield a very smooth textured surface.
All the variants of template stripping, whether used for stripping the entire thin-film deposited on the template to make a very smooth surface, or used for stripping selected metal surface to make a micro- or nano-structured material, typically rely on specifically "poor" adhesion of the deposited thin-film material to the underlying template and a "strong" adhesion of the thin-film to an applied resin/adhesive layer for removal. It avoids lift-off or etching, and yields a low cost and more environmentally friendly process. However, such striping techniques typically rely on the use of adhesives to keep the final product on the final substrate, and the template typically needs to be cleaned and prepared before each use. Accordingly, such stripping techniques typically undesirably limit the structural robustness of the final product, the maximum throughput of an industrial implementation of the process, the selection of template material and/or its anti-adhesion surface treatment, and the type of deposited thin-film material.
Accordingly, there is a need for additional and improved methods of fabrication of micro- or nano-structured thin-films on substrate surfaces which may desirably allow for reducing the manufacturing expense per unit area of the desired micro- or nano-structures. Furthermore, there is a need for additional and improved methods of fabrication of micro- or nano-structured thin-films on substrate surfaces which may desirably increase the fabrication throughput. There is also a need for additional and improved methods of fabrication of micro- or nano-structured thin-films on substrate surfaces which may desirably increase the product robustness and the range of possible used materials.

Methods for micro and nano fabrication by selective template removal


Provided is a lens unit. A second lens is provided with a flange surface section that surrounds a lens surface. An image-side flange surface has an image-side flange surface inner-circumferential section which is shaped like a ring-shaped groove, and also has a ring-shaped image-side flange surface outer-circumferential section formed to the outside of the inner-circumferential section. The image-side flange surface inner-outer circumferential section is coated with black ink. The image-side flange surface outer-circumferential section is provided with boss-shaped positioning surface at six equidistant locations along the outer circumference. Ejector pin contact sections are formed between adjacent positioning surface, and said contact sections contact the ejector pins at the time of separation from the mold during resin molding.

In a lens unit, a structure may be adopted that a light shielding film (light shielding layer) is formed on an outer peripheral part which surrounds a lens face on an outer side in a radial direction to prevent incidence and reflection of unnecessary light (see, for example, Patent Literatures 1 and 2).
In a case that a lens is to be held by a lens barrel, when a flange part is formed in the lens, the lens can be easily held by the lens barrel. On the other hand, when a flange part is formed, for example, unnecessary light incident on the flange part is overlapped with necessary effective light and a ghost or flare may be generated.
Therefore, a structure has been known that black coating as a light shielding film is applied to a flange face of a first lens which is disposed on the most object side. In this case, a second lens and subsequent lenses (image side) are also formed with a flange part and thus a ghost and the like may be generated by the flange parts of the second lens and the subsequent lenses. However, restraint of generation of a ghost and the like caused by the flange parts of the second lens and the subsequent lenses has not been required.


A solenoid with two magnetically separate yoke regions, providing two distinct armature latching positions, is driven by a single effective winding. In one embodiment, the yoke regions consist of U-cores on either side of the armature and a single winding consisting of multiple turns, each turn looping through both U-cores and looping around the ends of the armature. In a second embodiment, distinct winding regions associated with the separate yoke regions are interconnected in series to make a single effective winding. Passage of the armature across a defined central position of minimum inductance is detected electrically, permitting a determination of absolute flux at a position of known inductance and thereby initializing a flux integration over time.

The invention relates to solenoid systems for the actuation of engine valves. More specifically, the invention relates to methods for minimizing wiring and electronic complexity in such solenoid systems while retaining full functionality, including an ability to latch solenoids for both valve-open and valve-closed positions and an ability to control armature trajectories for quick transition with controlled impact velocity.
Solenoid systems for electromagnetic actuation of engine valves are well known in the art. These systems are required to move a valve shaft between open and closed latching positions that are relatively far apart (e.g., one centimeter), completing each transition in a short time interval (e.g., 3 milliseconds or less). The most commonly seen and successful designs rely on a single armature traveling between two independently-controlled magnetic yokes, each yoke including its own separate electrical winding powered by a separate drive circuit. In U.S. Pat. No. 6,249,418, Bergstrom describes systems and methods whereby servo-controlled actuation of each of the two yokes is controlled entirely via pairs of conducting wires, one pair per yoke. Interpretation of the relationships among current, voltage, and time for each pair of wires is used to calculate the mechanical armature position to be controlled, leading to closed-loop servo control without separate sensing hardware or wiring. Even taking full advantage of the controller taught by Bergstrom, however, two independent sets of circuitry, independently connected to the two yoke windings, are required for full control of a dual-latching actuation system.
For an electric valve actuation system developed for Sagem, in European Patent EP0992658, Thierry et. al. describe a simplified actuation system achieving solenoid action of a single armature with latching in either of two positions. A single winding creates a magnetic potential difference across space, i.e., north and south magnetic poles in separate locations partially enclosing a gap space. Each of two curving jaws of the yoke carries a magnetic polarity, one jaw at north polarity and the other at south. Each of the jaws meets one end of the moving armature in either of two axial latching positions. When the armature is far off-center near one of these latching positions, magnetic forces predominate across the smaller yoke-armature gap on the side close to latching, giving rise to a strong force toward completed closure and latching on that side. Thus, application of current to the single winding can be used to latch the armature in either of two positions. There are two significant drawbacks to the invention taught by Sagem. First, the geometric constraints of bringing magnetic flux down from a winding on the top end of the solenoid (with the valve on the bottom end, opposite the winding) result in a substantial increase in the footprint area of the solenoid, as compared to comparable conventional solenoids with separate windings. Space is required for the flux cross-section to bring flux down to the bottom latching poleface area. Further space is required to provide an adequate gap between the armature and the vertical portions of the yoke, those portions conducting flux from the winding above to the lower latching poleface surfaces. Narrowing this gap causes high leakage of flux across the armature for all axial positions in the armature travel, resulting in flux that creates no axial attraction for moving the solenoid armature along its intended travel axis, but flux that nevertheless uses flux-carrying capacity in both armature and yoke. The non-functional flux results in added winding inductance. The second drawback, related to the first in engineering tradeoffs, is that the leakage flux across the armature in its middle range of travel is quite large for any practical gap allowance between the armature and the flux-conducting yoke bridges between the upper and lower poleface areas for attraction and latching. Leakage flux uses valuable and limited flux-carrying capacity, lowering the maximum axial force achievable within yoke saturation limits.
In light of the drawbacks and limitations of the prior art, it is an object of the current invention to generate magnetic flux separately in upper and lower magnetic yokes of a dual-latching valve actuation solenoid, avoiding ferromagnetic flux bridges from top to bottom, but employing a single winding or interconnected set of windings, operated from a single pair of electrical terminals. It is an object, in one embodiment of the invention, to generate magnetomotive force for latching in both top and bottom armature positions, using a single winding that surrounds the armature above, below, and across either end, thus concentrating magnetomotive force maximally in the armature and reducing flux that leaks between yoke parts without bridging between yoke and armature. In other embodiments of the invention, it is an object to create a single effective winding including series-connected parts in both upper and lower winding window areas of the yoke, thus driving and generating flux in both yokes from a single electrical circuit. It is a related object to configure a dual-latching solenoid so that magnetic flux flowing in the wider-gapped side of the solenoid is minimized. In the context of any of the above physical and electromagnetic embodiments, it is an object to use current and voltage information from the operation of the single effective winding to determine the time that the armature crosses a central location of minimum inductance, and from information involving the value and variation of current and voltage at that crossing, to determine the flux linkage and velocity of the armature in passing that location.
A common solenoid design uses a single armature and two separate yokes, each with a separate winding and separate drive circuitry, for moving the armature back and forth and for latching the armature in a first latching position against the first yoke, or a second latching position against the second yoke. Thus, the solenoid has four electrical terminals, two for each coil, or a minimum of three terminals if the two coils share a common voltage, e.g., ground potential. Separate control of electrical excitation of the two yokes is not always necessary, however. A saving in cost and complexity is obtained if the dual-latching solenoid is configured as a two-terminal device, behaving like a single load for a single driver circuit. When control is incorporated, that driver circuit may consist of a single voltage drive with current sensing, or alternatively as a single current drive with voltage sensing. The solenoid then has one effective coil circuit, even though that one coil circuit may include series connection of two winding regions, one for each of the two yokes. This configuration would appear to entail a considerable loss of efficiency, as well as control problems. As is shown in the following Specification, however, a one coil configuration for a dual latching solenoid has unsuspected advantages.
An advantageous embodiment of the one coil solenoid is illustrated in FIGS. 1a and 1b. Two U-core yokes attract a single armature to either of two latching positions. A single winding loops through both yokes and around the ends of the armature with each turn. The armature latches efficiently in contact with either of the two yokes. The system is made unsymmetrical by designing the mechanical spring restoration system to have a neutral point some distance away from the point of magnetic force balance, so that a current flowing through the winding exerts a force to move the armature away from that neutral point. Rhythmic application of coil current at a natural resonance frequency of the armature, its payload (e.g., a valve), and the spring system, makes it possible to excite the armature to a large amplitude oscillation and latch it. Once latched, the system can be released for re-latching on the opposite side. A controller, for example having a voltage driver and current sense circuitry (as drawn) can move the armature and detect when the armature passes a reference position of minimum solenoid inductance, obtaining timing information useful for control. The controller can also determine the absolute flux linkage, that is, the flux electromagnetically linking the winding turns (henceforth commonly referred to simply as xe2x80x9cfluxxe2x80x9d), at this point of crossing over minimum inductance position. Other embodiments are shown, using separate yokes with separate windings, one for each yoke, but with the windings interconnected in series to form one effective coil circuit.

Single-winding dual-latching valve actuation solenoid


An apparatus and method for automatic power control is disclosed. An optical recording apparatus utilizes a low-speed, peak-hold circuit to obtain and output a maximum of a front photodiode output signal during a predetermined window or plurality of windows of a total duration long enough to allow maximum peak-hold signal to stabilize. After stabilization, the maximum peak-hold signal is sampled and held in a sample and hold circuit. A reset then clears the signal and reinitializes the peak-hold circuit. In accordance with the difference between a reference voltage and the held peak-hold signal, a feedback controller unit outputs the required current level into a driving unit for producing desired recording pulses into a laser diode for recording information pits into an optical disc. A calibration gain may be used when, due to insufficient FPD response speed, the held signal is different than the real optical power output.

1. Field of the Invention
The present invention relates to a laser-power control apparatus employed in an optical recording device. More particularly, a power-control device for an optical disc recording system that controls the optical power stably during high-speed optical information recording even if using a relative low-speed front photodiode is disclosed.
2. Description of the Prior Art
A laser diode is usually used as a light source in a conventional optical recording apparatus. It is well known that the optical power output of a laser diode varies greatly with changes in environmental temperature. Accordingly, it is necessary to compensate for unwanted temperature-induced power fluctuations in the operation of laser diodes. A feedback control device for stabilizing the output power of a laser diode is called an automatic power control (APC) and is generally utilized in a conventional optical recording apparatus.
In order to record information pits into the optical recording medium, the optical output of the laser diode is modulated into recording pulses with different power levels and periods. This is referred to as the write strategy. FIG. 1 shows some common write strategies for present optical disc formats. To obtain a good recording quality, precise power control is necessary. A key to the success of the APC is a correct measurement of the optical output power of the laser diode.
FIG. 2 is a block diagram illustrating a prior art APC structure 10. In this figure, a laser diode LD radiates laser light onto an optical disc (not shown). The light radiated by the LD is received by a front photodiode FPD. The output of the FPD is converted into a voltage signal, front photodiode output (FPDO) signal, through a current-to-voltage conversion unit 20. The FPDO voltages corresponding to bias (read) power, erase power, and write power during reproduction and recording operations are respectively measured by a power level acquisition unit 30. The measured voltages are outputted by the power level acquisition unit 30 as Vb,m, Ve,m, and Vw,m. Feedback controller units 40, in accordance with the individual differences between the reference voltages Vb,r, Ve,r, and Vw,r set by a reference power level setting unit 50 and the measured voltages Vb,m, Ve,m, and Vw,m, output the required bias level, erase level, and write level currents into an LD driving unit 60 for producing desired recording pulses into the LD for recording information pits into the optical disc.
To correctly measure the output power of a laser diode, a sample and hold circuit is usually employed in the power level acquisition unit 30 of a conventional optical recording apparatus. Various sampling signals are issued according to the information data to be recorded and the corresponding write strategy. Then the voltage levels of the FPDO during the bias period, erase period, and write period are sampled and held for feedback control. Precise power control is thus obtained despite fluctuations in the temperature of the LD. Nevertheless, it is implicitly assumed, in the sample and hold scheme, that the response speed of the FPD is approximately the same as the modulation speed of the recording pulse of the LD. In other words, the FPDO must follow tightly the changes of each recording pulse of the LD so that a sampling device can correctly sample the power levels of the LD from the FPDO. For example, as shown in FIG. 3, the time duration of the erase period in a rewritable optical disc format is generally long enough to allow the FPDO to closely approximate the recording pulse of the LD and provide a qualified sampling area for APC.
In a high-speed and/or high-density optical recording application, the response speed of the FPD is likely to be slower than the modulation speed of the recording pulse of the LD. This results in the FPDO having only a short time period in steady state. This problem is illustrated in FIG. 4 where even though the FPDO response reaches steady state near the end of an erase period, a medium-speed sampling device may fail to correctly sample the desired FPDO value.
Obviously, implementation of a high-response-speed sample and hold circuit is expensive. In certain recording formats such as those using blue laser diodes, the recording pulse widths are so short that correctly sampling the FPDO is impossible for present hardware implementation technology under the constraint of reasonable costs. Additionally, as the recording pulses get shorter and shorter, it is very likely that the response speed of the FPD is much slower than the modulation speed of the recording pulse of the LD. As shown in FIG. 5, the FPDO cannot correctly reflect the optical power output of the LD. In this situation, the real output power cannot be measured correctly even with the use of a perfect sample and hold circuit regardless of cost.
The sampling problems in obtaining the write and bias power levels get worse for those optical disc formats with a multiple pulse train write strategies shown in FIG. 1 because the time duration in a modulated multiple pulse is several times less than during a write/erase period. The FPDO will fluctuate, as shown in FIG. 5, and no sampling device can provide correct optical power measurement. In addition, some optical disc formats like blu-ray disc can also adopt a multi-pulse write strategy in the erase period, as shown in FIG. 1. There may be no available sampling areas in the FPDO for the power level acquisitions of the erase, write, and bias periods.
One method employed in the power level acquisition unit 30 is to use a peak (or bottom) envelope detection device, which continuously tracks the peaks (or bottoms) of the FPDO for feedback control. Chuang, herein incorporated by reference, discusses such a device in U.S. Patent Application Publication US 2002/0141313. Here, peak envelope signals outputted from the envelope detection devices are fed to standard sample and hold circuits, which in turn, output to the respective feedback control units. However, to reliably detect and reflect peaks (or bottoms) of the FPDO, the discharge time constant of a peak (or bottom) envelope detection device cannot be too large compared to that of the recording pulses of the LD. If the discharge time constant is too large, the peak (or bottom) envelope detection device may not correctly follow the FPDO. If the discharge time constant is too small, output from the peak (or bottom) envelope detection device may incur small dropouts in the detected peak (or bottom) envelope in spite of the same amplitude for each peak (or bottom) in the FPDO shown in FIG. 6.
Additionally, when the response speed of the FPD is much slower than the modulation speed of the recording pulse of the LD, the FPDO cannot achieve steady state within a recording pulse, and hence the output signal of a peak (or bottom) envelope detection device will also follow the variation due to write strategy, as shown in FIG. 7. Since a peak (or bottom) envelope detection device will track the local maximum peaks existing in the inputted pulses train, the power measured by a peak (or bottom) envelope detection device will continuously change because of the write strategy when an FPD with low response speed is used. Since the acquired power deviations result from the write strategy and temperature drifts simultaneously, the feedback controller unit will perform wrong power adjustments because of erroneously sensed FPDO variations resulting from write strategy. Consequently, it will be difficult to stably compensate real power fluctuation resulting from the effect of temperature.

Apparatus and method for automatic power control


Device for closing and coupling carryall cases having a shell and a counter-shell which are mutually hinged, the shell being provided with brackets for coupling to racks of a motorcycle. The device has a shaped plate fixed inside an accommodation seat defined within the shell. The shaped plate has first pivoting lugs for linkages which define a first pivoting axis for lever systems for coupling to the counter-shell and a second pivoting axis for a locking plate. The shaped plate has second pivoting lugs for a handle of the case, and the locking plate is provided with a lock and bolt mechanism for closing the device and with an opening for permitting uncoupling of the carryall case from a motorcycle. A snap-action release button connects the linkages to the first pivoting lugs and connects the handle to the second pivoting lugs. The handle has a cross-member which, in closed position, is interposed between the lever systems and the locking plate.

The present invention relates to a device for closing and coupling luggage and the like, particularly for motorcycles.
Recently it has become popular to apply on the rear rack of motorcycles, both low- and high-powered ones, luggage or rigid bags which are applied by means of bracket-like elements provided on the case to engage coupling pins provided on the racks.
Such luggage are disclosed in prior patents in the name of the same Applicant, such as for example Italian patents 1,154,627 and no. 201,809, which are assumed included herein as reference.
The greatest problems of current motorcycle luggage, such as carryall cases, bags etc. are linked to two factors; namely, first of all the need to prevent theft of the cases or rigid bags, and secondly the need to provide easy opening of the case, combined with easy uncoupling of the case from the motorcycle, obviously by the user who owns a related opening key.
Furthermore, due to reasons which are also linked to the streamline of the motorcycle, it is important to eliminate the fixed external handle of the case, which currently protrudes from the body of most carryall cases or rigid bags installed on motorcycles.

Device for closing and coupling luggage and the like, particularly for motorcycles


An assembly includes a first waveguide and a second waveguide extending longitudinally along a first axis, each having an end, each comprising a first annular groove, the two ends being contiguous along the first axis, and an assembly device for assembling the first waveguide and the second waveguide, wherein the assembly device comprises a sleeve surrounding the ends of the first and second waveguides and having an inner wall comprising two first annular grooves facing the first annular grooves of the first and second waveguides, two reversibly deformable waveguides, each being positioned in a first annular groove of the sleeve and positioned in a first annular groove of the first and second waveguides, so as to block the first and second waveguides in terms of translation along the first axis.

A hollow waveguide is generally made up of rectilinear portions, but may more generally be of any shape, which need to be connected to one another or to equipment. For example, in the field of space applications, a hollow waveguide may be connected to a payload equipment of a satellite in order to provide radio frequency (RF) links. Waveguides allow propagation of high frequencies up to 50 GHz, with low losses and good adaptation to interfaces, and high shielding efficiency (referred to as "electromagnetic compatibility", also abbreviated to EMC).
The invention applies to hollow waveguides used to guide and to confine electromagnetic waves within a hollow cavity of the hollow waveguides. The hollow waveguides have walls to facilitate multiple reflections of the electromagnetic waves off of the walls of the waveguide. The invention applies more particularly to waveguides used for guiding radiofrequency waves. In other words, the waveguides are intended to be joined together via their respective adjacent ends. The waveguides are placed side by side so that the ends are contiguous. The invention applies to waveguides which may be of rectangular, elliptical or circular section.
Generally, the ends of the waveguides are provided with flanges. The flanges conventionally comprise holes facing each other. The waveguides are then assembled so that the holes are aligned and then screw-nut type systems enter these aligned holes to secure the sections. Four to ten screws are usually provided for assembling and keeping aligned the waveguides. On multi-spot complex payloads, but also on standard VHTSs (abbreviation of the acronym "Very High Throughput Satellites"), there are thousands of waveguides to be assembled. This represents for example more than 60,000 screws on a VHTS. Now, in addition to the time spent on fitting the screws in the aligned holes, the screws and washers represent a very significant cost.
Existing solutions propose retaining-clip systems on the existing flanges. Such solutions are not completely satisfactory because of problems of mass and accessibility of the assembly. Other solutions by welding or bonding the flanges pose a problem of ability to dismantle, and of complexity of implementation.
U.S. Pat. Nos. 7,955,145, 9,267,526, 7,722,415, 8,167,285, 9,534,625 disclose solutions for connecting two elongate members but are not concerned with waveguides subjected to the additional requirements of RF performance and EMC insulation.

Assembly comprising a sleeve connecting first and second hollow waveguides, wherein grooves for receiving reversible deformable elements therein are located waveguides and sleeve


A collapsible, self-supporting, fully portable hammock assembly in which the supporting framework is fabricated of light weight metal components. The apparatus can be quickly and easily extended from a compact, collapsible configuration into a self-supporting highly stable structure which safely carries the hammock. When the apparatus is in its folded configuration, it is mounted on a wheeled base assembly which permits easy transport of the collapsed apparatus from place to place.

1. Field of the Invention
The present invention relates generally to hammocks. More particularly, the invention concerns a collapsible, easily portable hammock for use in the outdoors such as at the beach or in the park or in the yard.
2. Discussion of the Invention
Hammocks have been known for many, many years, and have been widely used for both recreational and utilitarian purposes. Because of the recreational popularity of hammocks, numerous types of foldable hammock supporting structures for holding the hammock in an outstretched position have been suggested. However, such foldable or collapsible hammock supports, are typically complex in construction, and are often unwieldy, and difficult to use. Further, such structures are generally heavy, quite bulky when in a collapsed or folded configuration, and, accordingly, are extremely difficult to transport from place to place.
As will become more apparent from the discussion which follows, the apparatus of the present invention overcomes the drawbacks of the prior art collapsible hammocks, and provides for the first time a light weight, easy to operate hammock assembly, which folds into a compact configuration. The hammock support is conveniently mounted on a wheeled base so that it may readily be transported much in the same manner as a golf cart.


In one embodiment, a hydraulic pressure control circuit (4) of an automatic transmission includes a mechanical oil pump (MOP) and an electrical oil pump (EOP). The discharge side of the electrical oil pump (EOP) is caused to be in communication with the direct upstream side of a hydraulic pressure servo of a first clutch (C1) via a shunt hydraulic pressure supply passage (430). At the time of idle reduction, a linear solenoid (411) on the upstream side of the first clutch (C1) is caused to enter a forced closure state, thus preventing oil from the electrical oil pump (EOP) from flowing to a manual shift valve (410) side.

When an automobile traveling in an urban area or the like stops to wait for a traffic light at an intersection or the like, the engine enters an idle running state, and fuel is wasted in this state. In light of this, conventionally so-called "idle reduction control" (e.g., see Patent Literature 1 to 3 below) is performed in which, if a certain condition such as the automobile stopping is established, the supply of fuel to the combustion chamber is stopped (so-called "fuel cut"), thus stopping the engine.
Also, if a predetermined engine start condition (e.g., in an automatic transmission vehicle, a brake pedal release operation or the like) is established while the engine is in the stopped state (hereinafter, this state is called the "idle reduction state") according to the "idle reduction control", a starter mechanism is driven, and the driving force thereof is transmitted to the engine (so-called "cranking"), thus restarting the engine and enabling startup of the vehicle. In this case, with an automatic transmission vehicle, starting up the vehicle requires turning on (engaging) a startup clutch connected to a hydraulic pressure circuit of a transmission mechanism.
With a vehicle in which such "idle reduction control" is possible, when the idle reduction state is entered, a mechanical oil pump that was operating by the driving force of the engine is also stopped, and therefore the supply of hydraulic pressure from the mechanical oil pump stops. For this reason, an electrical oil pump that can be driven by an electrical motor is provided, and even when the engine is in a stopped state, oil (hydraulic oil, i.e., ATF) is supplied to a power transmission mechanism including a transmission mechanism and the like by the driving of the electrical oil pump, thus enabling ensuring hydraulic pressure for engaging the startup clutch. In particular, with an automatic transmission vehicle, the time period from when the engine start condition (brake pedal release operation) is established until when the car starts up is shorter than in the case of a manual transmission vehicle (the engine start condition being a clutch pedal press operation), and therefore it is effective to engage the startup clutch in advance by hydraulic pressure from the electrical oil pump.
Patent Literature 1 and 2 disclose that a mechanical oil pump and an electrical oil pump are provided, and when the idle reduction state is entered, the electrical oil pump is driven and hydraulic pressure is supplied to the startup clutch, thus turning on the startup clutch. Furthermore, such patent literature also discloses a configuration in which an oil passage for directly supplying hydraulic pressure from the electrical oil pump to the startup clutch is provided, thus enabling hydraulic pressure to be supplied to the startup clutch without causing the hydraulic pressure to pass through a hydraulic pressure control unit including various types of valves (a regulator valve, a modulator valve, and the like) in the hydraulic pressure circuit. This prevents occurrences of pressure loss and oil leakage in the various types of valves.

Hydraulic pressure supply control apparatus for automobile