In order to arrange a sensor unit completely in an interior e.g. of a cylinder of a piston cylinder unit and in order to be able to use a tension element sensor as a sensor the sensor unit is configured so that it includes a pressure tight wall through which a magnetic field sensitive sensor is configured to detect a magnetic field of an encoder magnet that moves on another side of the pressure tight wall and represents a rotational position and rotations of the winding drum whereas a housing of the sensor unit is sealed relative to an interior of the cylinder so that the sensor cavity in which the sensor is arranged represents a low pressure cavity which is advantageously only subjected to ambient pressure. This avoids hollow boring of the piston rod and no magnetic field permeable window has to be fabricated in a wall or in a base of the cylinder.

The problem is not to arrange the sensor if possible at all in the space with the different environmental conditions subsequently generally designated as positive pressure space without limiting the difficult condition to a physical magnitude of the pressure so that damages to the sensor are prevented.
On the other hand side the operating cylinder unit shall require as few as possible additional features possibly no additional features for housing the sensor unit in order not to increase cost of the operating cylinder unit.
On the other hand side arranging portions of the sensor unit on an outside of the cylinder of the operating cylinder unit is disadvantageous since they can be damaged easily in the typically rough environment where the operating cylinder unit are being used for example in construction equipment that is exposed to the elements.
So far the following solutions are typical:
a) infrared ultrasound sensors:
touch free scanning and detecting of a distance of a face of the piston by an infrared ultra sound sensor arranged in an interior of the cylinder at an end.
Sensors of this type are rater sensitive and still expensive and measuring precision is limited.
b) tension element sensors:
a positive pressure cavity in an interior of the cylinder includes a typical measuring cable sensor or a measuring band sensor in which a cable or band that is wound onto a winding drum and preloaded in the wind up direction by a flat spiral spring is attached with the free end at the piston.
The number of revolutions and the angular position of the cable drum are detected and a pull off length of the cable and thus a position of the piston in the cylinder is determined.
The sensor detecting the revolutions and the angular position of the cable drum can also be arranged in the positive pressure cavity which however can lead to damaging the sensor element easily.
The rotation and rotational position of the winding drum however can also be transmitted touch free by a magnet connected to the winding drum through an accordingly configured portion in the cylinder wall to the magnetic field sensitive sensor arranged on an outside of the portion of the cylinder wall.
Thus however the cylinder typically made from a thick steel material has to be provided with a window either with a smaller material thickness or made from another e.g. magnetic field permeable material which increases the fabrication cost of the cylinder by a large amount and also reduces its pressure bearing capacity by a large amount.
c) rod-sensor units of the magneto astrictive type:
The sensor unit made from a head and a sensor rod axially protruding therefrom is installed at an axial end in the cylinder and sealed at an outer circumference relative to the inner circumference of the cylinder so that the sensor rod protrudes towards another end of the cylinder, typically in a center of the cylinder.
The piston rod is bored hollow so that the sensor rod can penetrate into the longitudinal bore hole in the piston rod.
The piston rod supports a typically annular encoder magnet at an end that is oriented towards the sensor head wherein a magnetic field of the encoder magnet influences an electrical signal running in the wave conductor in an interior of the sensor rod through a current axial position of the encoder magnet along the sensor rod and influences a density wave in the wave conductor that runs back to the sensor head. Thus the sensor element arranged in the sensor head and in a subsequent processing unit facilitates detecting an axial position of the encoder magnet and thus of the piston rod relative to the sensor rod and thus relative to the cylinder.
Thus the sensor head typically contacts a shoulder proximal to the cylinder base. The data transfer from the sensor head that is typically performed by a cable is provided by a cable outlet from the sensor head on an ambient pressure side oriented away from the piston and a pass through opening in the cylinder typically arranged in a base of the cylinder.
The required complex hollow boring of the piston rod is a distinct disadvantage.

Sensor unit and working cylinder with a sensor unit

ASM Automation Sensorik Messtechnik GmbH


An array substrate of organic light-emitting diodes and a method for fabricating the same are provided to narrow an edge frame of product device of organic light-emitting diodes, to shorten the package process time, and to improve the substrate utilization and the production efficiency. The array substrate of organic light-emitting diodes includes a plurality of display panels disposed in an array of rows and columns, wherein at least two adjacent display panels are connected through a frame adhesive, and there is no cutting headroom between at least one side of the at least two adjacent display panels.

As illustrated in FIG. 1, an array substrate 10 of Organic Light-Emitting Diodes (OLEDs) in the prior art includes a plurality of display panels 11 arranged in an array, and each display panel 11 includes a display area 12, a frame adhesive 13 with a width of 0.7 mm at an edge frame of the display area 12, and a stepped area 14 which is an area in the display panel where an integrated circuit is fabricated. There is a cutting headroom between every two display panels 11, the cutting headroom is an area without frame adhesive 13 at the locations where the array substrate 10 is cut into a single display panel 11. In FIG. 1, there are a width B of a cutting headroom between two adjacent display panels 11 in the horizontal direction, and a width A of a cutting headroom between two adjacent display panels 11 in the vertical direction, and in order to prevent damage to the display panels being cut, the width A or B of the cutting headroom in a practical production process is preset to 600 to 800 micrometers.
In FIG. 1, due to the cutting headroom between every two display panels, each display panel needs to be packaged by coating the frame adhesive thereto separately and laser curing the coated frame adhesive separately. FIG. 2 illustrates a structural diagram of a single packaged display panel in a sectional view, the frame adhesive 13 is disposed between an upper substrate 21 and a lower substrate 20 and laser cured by disposing a reflection layer 22 on the lower substrate 20, to thereby better reflect a laser beam so as to make the laser beam more uniform.
In summary, the width A or B of the frame adhesive in the prior art is preset to 600 to 800 micrometers, so that the edge frame of the display panel may become large instead of being narrowed. Moreover it may take a long period of time to perform the packaging process in the prior art due to the separate adhesive coating process and the separate laser curing process, and each display panel has to be packaged by coating the frame adhesive thereto separately, and laser curing the coated frame adhesive separately, so that there may be wastes of time and materials, and the substrates may be underutilized. Moreover, it may take a long period of time to cure the adhesive by using laser, thus resulting in inefficiency.

This patent is subject to a terminal disclaimer.

Array substrate of organic light-emitting diodes and method for packaging the same


A vehicle fairing includes an electrical routing for conducting power and/or control signals between spaced-apart components of a vehicle structure. The vehicle fairing includes an outer surface configured to form part of an outer surface of a vehicle body. The electrical routing includes a printed circuit board having a substrate and a first conductive path for conduction of electrical current or signals provided on the substrate. The substrate is substantially rigid and forms at least a portion of the outer surface of the vehicle fairing.

Aircraft comprise complex wiring systems for the transmission of power and control signals between the various components and systems of the aircraft. Conventionally, these electrical components/systems are connected by cables routed through the aircraft structure. These cables are conventionally fastened within cable raceways, which are elongate metallic ducts comprising one or more channels in which the cables are retained. The raceways serve the purpose of guiding and securing the cables, protecting the cables from mechanical damage and also protecting them from electro-magnetic hazards (EMH), which include various electrical interferences and threats such as electromagnetic interference (EMI), electromagnetic coupling (EMC) and radio frequency interference (RFI).
The cables may also be provided as an over-braided cable harness, which comprises a bundle of cables within a protective sleeve, of a material such as Nome™, Kevlar™, nylon or other suitable material, and an outer braided metallic mesh. This provides the cables with both mechanical and electrical/EMH protection. The cable harness may then be secured by clips that retain the harness to the aircraft structure or within a raceway.
Such cable harnesses for the transmission of power and signals comprise a large number of components and a high weight of materials and also occupy a large volume of space on or within the vehicle structure. For example, the electrical raceways require mechanical fastening to the vehicle structure, the cables must be fastened within the raceway by clips or other suitable fasteners, and a minimum spacing must be provided between the harness and any conductive (e.g. metallic) structure to which the harness is attached, to reduce the risk of electrical arcing between the harness and the conductive structure should a cable become fretted and the conductive inner wire exposed. The complexity of these cable arrangements also results in a long installation time in the vehicle construction process, and a complex installation process.
In certain areas of an aircraft, cables must be routed externally, such as on the wings where fuel tanks are located. Here, since cables may not pass through the fuel tanks for safety reasons, yet power is required for the fuel pumps within the tanks, the power cables must be provided on the underside of the wing, and then covered with a fairing for environmental protection of the cables and aerodynamic performance of the wing. Again, this is a complex arrangement with long installation time as part of the aircraft construction process, and also results a number of relatively large additional fairing structures being disposed on the underside of the wing, reducing aerodynamic performance.
It is desirable to provide a vehicle fairing and electrical routing that substantially alleviates or overcomes one or more of the disadvantages mentioned above.

Vehicle fairing including an electrical routing


This disclosure describes a performance-monitoring system that computes a display performance metric of a remote application. During operation, the system performs a sequence of input events, and receives information which updates a graphical user interface (GUI). The GUI displays a sequence of frames rendered by a remote application in response to the input events. The system then samples colors at a number of pivot points on the GUI, and matches the a respective frame to a previously performed input event based on the sampled colors. The system subsequently computes a display performance metric for the remote application based on the frames and the corresponding input events.

1. Field
This disclosure is generally related to measuring the display performance of remotely executed applications. More specifically, this disclosure is related to performing and monitoring various workloads at a client device to measure the display performance of remote applications, such as a virtual desktop.
2. Related Art
The relentless growth of the Internet and ever-decreasing costs of bandwidth and computing power have created an unprecedented market for distributed computing. As a result, an increasing number of software applications are offered as services to end users over the network. These applications typically reside on a remote host, and the user interface is transmitted over the network and presented at a client device.
One such example is the virtual desktop infrastructure (VDI), which can include one or more servers that are used to host a virtualized desktop for a remote user. The virtual desktop servers may belong to a computer cluster or a data center, and are configured to provide a remote user interface to the user's client device over a network. The term "desktop" generally refers to a productivity environment, which typically receives mouse and keyboard inputs from the user and provides a graphical user interface (GUI) as an output. The user can use the mouse and keyboard to interact with software executing on a remote host system.
The virtual desktop is typically generated by an operating system, such as Microsoft Windows®, Linux, Mac OSX®, etc. The operating system and software applications can reside on a physical computer (e.g., a blade server in a data center), or within a virtual machine residing on a physical computer. A virtual desktop server includes software that captures the display output from the desktop, and optionally encodes the display output in a compressed format for transmission over a network to the user's client device.
However, the available bandwidth between a virtual desktop server (or a remote application in general) and a client device can vary due to, for example, network congestion. A virtual desktop server at one location may have a faster connection to the client device than another server at a different location. Further, the amount of required bandwidth for transmitting the desktop output can vary depending on the user's activity. Therefore, the user's experience is subject to the tasks being performed by the user. However, it is oftentimes difficult to determine whether a particular VDI configuration can adequately meet the needs of its users based on their intended activity.

Method and system for measuring display performance of a remote application


A siloxane mixture where the siloxanes carry aminoalkyl and alkoxy groups and, where appropriate, hydrocarbon groups and also where appropriate, hydroxyl groups.

1. Field of the Invention
The present invention relates to a specific siloxane mixture wherein the siloxanes carry aminoalkyl and alkoxy groups and, where appropriate, alkyl groups and also where appropriate, hydroxyl groups and the mixture is obtainable by a particular process. The present invention further relates to the use of such mixtures and to compositions, i.e., formulations, coatings, articles, etc., which are based on the inventive mixture.
2. Description of the Background
Organofunctional silanes and also siloxanes are used, inter alia, to modify the properties of surfaces or as a reactive component in formulations, especially in coating compositions or in compounds.
Mixtures of linear and cyclic siloxane oligomers may be obtained by controlled hydrolysis and/or condensation of organofunctional alkoxysilanes. One particular problem associated with the preparation of polyfunctional siloxane oligomers is the extremely different hydrolysis and/or condensation behavior of the individual organoalkoxysilanes and organochlorosilanes. The activity of differently composed or differently prepared siloxane mixtures is also generally different.
EP 0 716 128 A2, EP 0 716 127 A2, and EP 0 675 128 A1 disclose aqueous solutions of amino-functional and OH-containing organosilanes and organosiloxanes. These organosilane systems are almost completely hydrolyzed and the organofunctional silicon units are in random distribution in the cocondensates.
EP 0 518 057 A1 and DE 196 24 032 A1 disclose mixtures of linear and cyclic vinyl-functional and also alkyl-functional siloxane oligomers which also carry alkoxy groups. Such mixtures are used, for example, to hydrophobicize mineral surfaces and pulverulent surfaces and also as crosslinking agents for thermoplastic polyolefins.
DE 198 34 990 discloses mixtures of linear and cyclic siloxane oligomers containing acryloyloxypropyl or methacryloyloxypropyl groups. Such siloxane oligomer mixtures may be used, for example, to treat mineral surfaces or the surfaces of pulverulent substances, such as titanium dioxide, talc, clay, silicas, quartz, kaolin, aluminum hydroxide, magnesium hydroxide, bentonite, montmorillonite, mica (muscovite mica), and calcium carbonate (chalk, dolomite). Said siloxane oligomer mixtures are also used as adhesion promoters in rubber compounds filled, for example, with kaolin.
EP 0 997 469 A2 discloses mixtures of linear and cyclic siloxane oligomers which carry aminopropyl, alkoxy, and, if desired, alkyl groups, the organofunctional silicon units in these cocondensates also being in random distribution.
It is an object of the present invention to provide additional organofunctional siloxane mixtures based on amino-functional Si compounds.
It has surprisingly been found that a novel mixture of aminoalkyl-, alkoxy-, where appropriate alkyl-, and, where appropriate, hydroxy-functional siloxanes can be prepared by subjecting (i) at least one tetraalkoxysilane or (ii) at least one hydrocarbon-alkoxysilane or (iii) a mixture of at least one tetraalkoxysilane and at least one hydrocarbon-alkoxysilane to partial hydrolysis and precondensation by addition of water and acid, thereafter adding at least one aminoalkyl-functional alkoxysilane to the resulting siloxane reaction mixture, with aminoalkylsilanes being condensed onto the siloxane units present in the reaction mixture and substantially enveloping them so that the aminoalkyl groups are oriented outward, and subsequently removing the alcohol from the system. In this way it is possible in an advantageous way to provide a novel amino-functional siloxane mixture.
Thus, the present invention provides a mixture of aminoalkyl-, alkoxy-, and, optionally, alkyl-, and, optionally, hydroxy-functional siloxanes, obtainable by a process comprising subjecting (i) at least one tetraalkoxysilane or (ii) at least one hydrocarbon-alkoxysilane or (iii) a mixture of at least one tetraalkoxysilane and at least one hydrocarbon-alkoxysilane to controlled hydrolysis and precondensation by addition of water and acid to produce a siloxane reaction mixture, followed by adding at least one aminoalkyl-functional alkoxysilane to the siloxane reaction mixture, and removing alcohol from the reaction mixture.
The present invention also provides a process for preparing a siloxane mixture described above, comprising subjecting (i) at least one tetraalkoxysilane or (ii) at least one alkylalkoxysilane or (iii) a mixture of at least one tetraalkoxysilane and at least one alkylalkoxysilane to controlled hydrolysis and precondensation by addition of water and acid, thereafter adding at least one aminoalkyl-functional alkoxysilane to the resulting siloxane reaction mixture, and removing alcohol from the reaction mixture.
The present invention additionally provides an organic resin composition, comprising an organic resin and the siloxane mixture described above.
In addition, the present invention provides a method of making the resin composition described above, comprising incorporating the siloxane mixture described above into the organic resin.
The present invention also provides a paint composition, comprising a paint and the siloxane mixture as described above.
In another embodiment, the present invention provides a method of making the paint composition described above, comprising incorporating the siloxane mixture described above into the paint.
The present invention also provides a varnish composition, comprising a varnish and the siloxane mixture described above.
The present invention additionally provides a method of making the varnish composition described above, comprising incorporating the siloxane mixture described above into the varnish.
The present invention also provides a method of treating a mineral, organic, or metallic surface, comprising applying the siloxane mixture described above to the surface.
In another embodiment, the present invention also provides a method of hydrophobicizing a surface, comprising applying the siloxane mixture described above to the surface.
The present invention also provides a method of surface-modifying a pulverulent substance, comprising treating the substance with the siloxane mixture described above.
Further, the present invention also provides a method of silanizing fillers and pigments, comprising treating a filler or a pigment with the siloxane mixture described above.
A more complete appreciation of the invention and many of the attendant advantages thereof will be readily obtained as the same becomes better understood by reference to the detailed description below.


A semiconductor memory device includes a substrate, gate electrodes arranged in a thickness direction of the substrate, first and second semiconductor layers, a gate insulating film, and a first contact. The first semiconductor layer extends in the thickness direction and faces the gate electrodes. The gate insulating film is between the gate electrodes and the first semiconductor layer. The second semiconductor layer is between the substrate and the gate electrodes and connected to a side surface of the first semiconductor layer in a surface direction. The first contact extends in the thickness direction and electrically connected to the second semiconductor layer. The second semiconductor layer includes a first region in contact with the side surface of the first semiconductor layer and containing P-type impurities, and a first contact region electrically connected to the first contact and having a higher concentration of N-type impurities than the first region.

A semiconductor memory device includes a substrate, a plurality of gate electrodes arranged along a first direction intersecting a surface of the substrate, a semiconductor layer extending in the first direction and facing the plurality of gate electrodes, and a gate insulating film provided between the gate electrodes and the semiconductor layer.


A diamond Raman laser may include a diamond Raman oscillator (DRO) with a first diamond gain medium, a seed laser providing a seed beam at a seed wavelength, and a cavity configured to resonate at a first-Stokes wavelength, the first-Stokes wavelength corresponding to first-Stokes emission in diamond when pumped with the seed wavelength, and where the DRO outputs a first-Stokes beam at the first-Stokes wavelength. The diamond Raman laser may further include a diamond Raman amplifier (DRA) to amplify the first-Stokes beam and generate an amplified first-Stokes beam, where the DRA includes two or more diamond Raman amplification stages, each including one or more second diamond gain media, and one or more optical filters to filter light with a second-Stokes wavelength generated in at least one of the one or more second gain media.

While almost all high brightness laser development for the last few decades has been around 1 μm, many civil and defense applications such as material processing, atmospheric measurements, laser radar, laser rangefinders, and free-space optical communications are more suited to longer wavelengths. Lasers above 1.4 μm specifically benefit from high transmission in atmosphere and low eye-exposure risks, making them critical for any remote applications where bystanders may be involved. Erbium and direct diode lasers access these wavelengths, but have not achieved sufficiently high power for most of the aforementioned applications. Optical Parametric Oscillators (OPOs) have been shown to access these wavelengths with greater brightness and energy, however, they are impractically complex and costly for most commercial applications. There is therefore a need to develop systems and methods to cure the above deficiencies.

University of Central Florida Research Foundation, Inc.


A controllable bidirectional torque limiting device for driving a machine element. The input shaft is connected to a driver and the output shaft is connected to the machine element. The clutch mode of operation provides an adjustably limited torque output which rotates the machine element; the braking mode of operation provides an adjustable braking torque capable of stopping the rotating machine element upon cessation of the torque transmission. The assembly provides driving or braking actions as required. The device comprises a rotor, circular brake pad and two spaced apart pistons. Compressed air is introduced through a port in the bearing housing and is entrapped inside the piston cylinder walls. The resultant pressure exerts a force on the piston, causing the rotor to be pressed against the brake disc in the braking mode of operation, the amount of air pressure controlling the braking force. A plurality of steel balls are positioned between a pair of discs made of resilient material. In the clutch, or torque transfer, mode of operation the rotor compresses the balls between the two discs, causing resistance to the ball rolling. The torque input is transferred to the output side; if the air pressure is varied, the amount of indentation will vary, thus controlling the output torque.

1. Field of Invention
A bi-directional, variable torque output clutch utilizing a ring of spherical members compressed between layers of resilient material.
2. Description of the Prior Art
Conventional clutch devices operate on the principle of sliding friction and consists of a pair of friction discs arranged axially wherein one friction disc is attached to the device input shaft and the opposing friction disc is attached to the output shaft. Various techniques are used to provide a force which presses the two friction discs together. Energization of the driver (motor) results in an angular torque output which is limited by numerous factors including the applied force, coefficient of friction of the discs, etc. In these prior art designs, static-dynamic friction transitions occur, an undesirable characteristic. This is the primary cause for devices which operate on the sliding friction principle tend to skip and chatter and cause uneven start-up operation. Further, sliding friction type devices tend to wear faster than devices based on the concept of rolling friction. A prior art device which improves upon the conventional clutch devices utilizes magnetic particles, such as the model no. CB35DF3, manufactured by Force Limited, Santa Monica, Calif. In this device, clutching and braking functions are provided by the magnetic particles.
Systems in which the magnetic particle clutch device is utilized tend to have problems wherein rapid, braking forces are required. For example, in container inspection systems wherein containers are moved along a conveyor belt and wherein the containers are visually examined to ascertain if the containers are filled, damaged, etc. occasions have arisen wherein the bottles are stopped but the clutch drive is still engaged which causes excessive heat build up inside the clutch. If the condition is sustained for a long time period, the magnetic particles tend to fuse together, effectively damaging the clutch to the point wherein it has to be replaced. The magnetic particle based clutch is also relatively expensive.
In addition, most prior art clutch devices having output torque limiting features typically have one operating torque value. Those devices which provide adjustable torque capabilities tend to be cumbersome, expensive and unreliable.


In order to enable a brake booster to operate both with a pressure above atmospheric and with atmospheric pressure without any negative mutual influences of the two energy types and without any change in the responding behavior of the device in case of failure of either energy type, the invention provides a pneumatic system which, during the operation of the brake booster with pressure above atmospheric, causes a force constituent to become active so as to counteract the forces caused by the increased pressure difference and acting on the control valve piston as well as on the control valve housing.

This invention relates to a brake booster with a booster housing subdivided by means of a movable wall arranged therein into a chamber of constant pressure (vacuum chamber) and into a working chamber, with the movable wall being formed by a diaphragm disk and by a rolling diaphragm partially abutting the diaphragm disk, with a piston rod--coupled with a brake pedal--for actuating a control valve, which alternatively connects the working chamber with a vacuum or with a higher differential pressure wherein the control valve includes a control valve piston, axially displaceable in a control valve housing, acting on the end of a push rod through a reaction element.
A brake booster of this type has been disclosed in German Patent Specification (DE-PS) No. 29 25 550.
The particular feature about this type of brake booster is that a stop is provided at its control valve housing, which limits the initial advancing movement of the movable wall relative to the control valve housing. The stop is distanced axially at a predetermined distance with respect to the corresponding part of the movable wall when the movable wall and the control valve housing are in their respective rest positions. The movable wall is axially displaceable out of its rest position until it becomes engaged with the stop of the control valve housing, without exerting any force on the control valve housing which would carry the control valve housing along in the advancing direction. In the case of a small initial input stroke, the brake booster will have a predeterminable larger output stroke and, subsequently, an output stroke proportional to the input stroke.
The brake booster disclosed in the abovementioned patent specification also includes a power booster using a pressure source for generating a pressure difference acting on the movable wall. However, what is to be considered disadvantageous is the necessity of separating the chamber of constant pressure (vacuum chamber) from the existing vacuum source and of exposing it to the surrounding atmosphere since, in case of an excessive pressure difference, there will exist the danger of an undesired self-operation of the power booster which would result in an uncontrollable braking operation. This, however, means that there will be no boosting energy available in the case of a failure of the pressure source.


A wafer processing method is capable of easily handling even a thinly formed wafer during the processing thereof. An annular protective member is bonded to an outer circumferential excess region on an outer surface of the wafer, on which devices are not formed, and a rear surface is ground with the outer surface left in the mentioned condition. Since the outer circumference of the wafer is reinforced with the annular protective member, the handling of the wafer becomes easy even after the wafer becomes thinner due to a grinding operation.

1. Field of the Invention
The present invention relates to a wafer processing method used to facilitate the handling of a thinly formed wafer.
2. Related Art
A wafer having a plurality of devices such as IC and LSI formed on its surface is divided into parts of the devices individually by using a dicing unit, and the resultant devices are widely used by being incorporated into various kinds of electronic equipment. In order to reduce the dimensions and weight of the electronic equipment, the wafer not yet divided into parts corresponding to the individual devices is ground at a rear surface thereof, and the thickness of the wafer is set to, for example, 100 μm to 50 μm.
When the wafer becomes thin due to the grinding operation therefor, the rigidity of the wafer is lost, so that the handling of the wafer in a later step becomes difficult. For example, coating the rear surface of the wafer for conducting a probe test on the wafer with a metal film of gold, silver and titanium becomes difficult. Therefore, it becomes difficult to conduct an electric test on the devices. Techniques for grinding the rear surface of the wafer with a support member bonded to the outer surface thereof have also been proposed (for example, refer to JP-A-2004-22634 and JP-A-2003-209083).
However, when a support member is bonded to the outer surface of the wafer, it becomes necessary to peel off the same later, and, even after the support member is peeled off, the adhesive agent remains in some cases on the devices formed on the outer surface of the wafer. In order to completely remove the adhesive agent, a troublesome operation is needed. The handling of the wafer becomes difficult in this respect as well.


A vibrator is provided that includes a substrate having a major surface defined in width and length directions and one or more electrodes formed at least in a substantial entire region of the major surface of the substrate in the length direction, and that performs, as main vibration, expansion-contraction vibration along the width direction in accordance with a voltage applied to the electrodes. Moreover, a holder surrounds at least a portion of the vibrator; and a holding arm connects the vibrator to the holder. Moreover, the vibrator has a width Wo in the width direction positioned at an end in the length direction and includes, to have a width Wm differing from the width Wo and positioned between a pair of ends opposing in the length direction, a variant portion at least one or more locations that is in a shape recessed or projecting in the width direction.

Conventionally, resonators using MEMS (Micro Electro Mechanical Systems) technology are used as, for example, timing devices. Such resonators are mounted on a printed board incorporated in an electronic device, such as a smartphone. In MEMS resonators, many vibration modes are present, and, in a MHz band, a contour vibration mode is generally used.
In technology of resonators, vibration confinement performance is one of important characteristics. Specifically, it is known that, in the contour vibration mode, an end surface of a resonator serves as a node point at a predetermined aspect ratio (size in a length direction relative to a width direction), and confinement performance is improved (for example, Patent Document 1).
Patent Document 1: Japanese Patent No. 3139274.
Incidentally, when a direction in which displacement due to vibrations is relatively large is a width direction, and a direction in which displacement is small is a length direction, a frequency of a resonator is generally determined by a dimension in the width direction. Therefore, when downsizing of a resonator is taken into consideration, an aspect ratio is required to be reduced to obtain a desired frequency. In this case, depending on a selected aspect ratio, there is a case in which confinement performance becomes inappropriate.


A subsurface hydronic heat-exchanging apparatus and method are provided for controlling the temperature of a turf field. A temperature-controlling fluid is circulated from a temperature-controlled fluid source through a supply header laterally disposed to the field and coupled to an array of hollow tubular heat-exchanging elements underlying the field. Fluid is recirculated to the fluid source from the tubes through a return header laterally disposed to the field and coupled to the tubes. Temperature sensors are disposed adjacent the turf field which detect the temperature of the field and a temperature control device is provided which is responsive to the detected temperature.

The present invention relates to a method and apparatus for controlling the sub-surface temperature of a grass field which is subjected to less than optimal growing conditions. The method and apparatus have application, for example, in dramatically improving the growing conditions of golfing greens which are subject to shading from sunlight and temperature extremes which are harmful to grass surfaces.
It is well known in the prior art pertaining generally to plant growing that such growth is largely dependent on such factors as the extent to which a plant is exposed to sunlight and the temperature to which the root system is exposed.
Regarding temperature, it is well known that plant growth can be facilitated by maintaining plant growing temperatures within an optimal range. Systems for controlling the ambient temperature of plants have primarily been directed to the use of enclosures, such as greenhouses, in which the overall ambient air temperature is controlled, usually by varying radiant heat from solar or artificial sources, use of heat pipes in contact with the air, or air heat pumps or air conditioners, or various combinations of such methods.
Due to the substantial cost of energy required to control ambient temperature, energy efficiency in connection with the growing of plants has become a significant consideration. It is now widely recognized in the industry that one of the most efficient ways of growing plants is to create a micro-climate for the plants, through heating of the root zones of the plants, rather than by attempting to control the air temperature around the plants. In some installations it has been even found most advantageous to heat the plant root zone while cooling the foliage. Therefore, considerable effort has been expended in developing water-based heating systems which are installed underneath plant containers or in propagation benches or beds in combination with space heating or cooling apparatus. Such root heating or micro-climate temperature control systems have been found to achieve substantial energy savings as compared to conventional space heating systems. Unfortunately, such heating systems have also been accompanied by a significant increase in the system maintenance costs.
A patent disclosing such a system is U.S. Pat. No. 4,557,435 to Springer at al. This patent discloses a micro-climate temperature control apparatus wherein an array of heat-exchanging plastic tubes are disposed adjacent a plurality of plants in individual growing containers. Each plastic tube is connected to an inlet and outlet manifold which in turn are connected to a source of heated water.
U.S. Pat. No. 4,309,843 to Kato discloses a plant cultivation device using hot water pipes covered by a layer of wood chips and a second layer of soil. The heating pipes are enclosed in a complex structure including concrete blocks, slate-corrugated plates, partition wall plates and a shielding cover. Maintenance of such a system poses significant problems due to the inability to access manifolds in the event of leakage which can lead to destruction of root systems.
U.S. Pat. No. 5,120,158 to Husu discloses an apparatus for thawing a frozen grass playing field wherein an array of perforated pipes are arranged in a filter layer beneath the playing field. The perforated pipes are connected to blowers which circulate heated air through the pipes in order to thaw the frozen field and remove moisture therefrom.
Although such a system may be appropriate for raising the temperature of a field above the freezing point, and thereby thawing the field, temperature gradients which exist in a volume of air significantly limit the utility of such a system to control temperatures of plants in contact with such air. Further, such convective methods require considerably more time than a conductive heat transfer method to bring the overall temperature of a growing system to steady state conditions or to correct variations which occur due to factors outside the enclosed growing environment. Moreover, the heating and cooling of large volumes of air is generally less efficient and more costly as a heat transfer method than controlling a confined and smaller volume of water or other liquid exhibiting a greater heat conductivity than air.
Subsurface hydronic heating systems have been installed in golfing greens to control the green temperature and promote growth. However, significant drawbacks are associated with prior art systems which limit their overall utility. For example, such systems generally entail installation of a subsurface header assembly within the green area, thereby requiring major excavation of the green in the event of leakage at the headers or for completion of maintenance procedures. Also, prior art designs necessitate the use of excessive lengths of subsurface tubing which may result in uneven heat transfer and uneven heating of the green. Moreover, temperature sensor and control systems responsive to localized temperature fluctuations frequently result in the over heating or over cooling of regions of the green not subject to the localized temperature fluctuation, thereby resulting in less than optimum control of the temperature of the turf field and in a waste of energy.
Accordingly, one object of the present invention is the provision of an apparatus and method for maintaining the temperature of a grass field within a specified range, thereby promoting optimum growth of the field. Another object of the present invention is the provision of an apparatus and method for controlling the temperature of a turf field which permits maintenance and repair of a subsurface header assembly to be conducted in a simple and convenient manner without destructive excavation of the grass field. A further objective of the present invention is the provision of an apparatus and method which permits even heating throughout the grass field. An even further objective of the present invention is the provision of a turf heating apparatus and method which is leakage resistant and significantly more energy efficient than prior art devices and methods.
These and other objects of the present invention are attained by the provision of subsurface hydronic heat-exchanging apparatus and method wherein a temperature-controlling fluid is circulated from a temperature-controlled fluid source through a supply header to an array of hollow tubular heat-exchanging elements and back through a return header to the source. The headers are connected to the heat-exchanging elements through tubular extensions which permit placement of the header at a position outside the turf field, thereby permitting access to the subsurface headers without destructive excavation of the field. Temperature sensor means are disposed adjacent the turf field which detect the temperature of the field and temperature control means are provided which are responsive to the detected temperature.
In one preferred embodiment, multiple sensors are disposed at selected points throughout the field which transmit temperature information to a device which computes an average field temperature and a control device is provided which controls the temperature or flow rate of the temperature controlling fluid in response to the average field temperature, thereby minimizing the effect of localized temperature extremes in the field.
In another preferred embodiment, specially designed wedge-like coupling devices are employed to fluidly connect the large diameter tubular extensions to the supply and return headers with a leak resistant interference fit. The special couplings provide critical leak resistance while permitting the use of large diameter heat-exchanging tubes which reduces installation time, simplify plumbing and permit the use of complete circuits of substantially increased length without compromising heating or cooling evenness.
Other objects and advantages of the present invention will be more apparent from the following detailed description of preferred embodiments, when taken in conjunction with the drawings.

Apparatus and method for controlling temperature of a turf field


This disclosure describes a method of improving filter wheel imaging data capture and other functionality through use of an improved filter wheel design with pie shaped filter segments, continuously rotating image capture, multiple filtered images, and easily removable and attachable filter segments.

Filter wheels are used in many image-capture systems. While these filter wheel systems perform well they have found limited market success due to their slow image capture rates. In essence, the weakness in prior art systems is the time required for the filter wheel to sequence/rotate between filters, even in recent attempts to make the process faster, as shown in U.S. Publication 2011/0128545 to Cox et al. for a Fast-Indexing Filter Wheel And Method Of Use.
By changing the construction of the filter wheel one can make significant improvements to the time required to change between filters on a filter wheel. Additional changes to the rotational drive mechanism allow optimization and synchronization between filter position and image-capture timing.

Method to improve filter wheel imaging system data capture rate and add functionality through the use of an improved filter wheel design


A method for fabricating a semiconductor device includes the steps of: forming a semiconductor region of a first conductive type on a semiconductor wafer; forming a gate electrode on the semiconductor region; on the semiconductor region, forming a first insulating film over the whole surface including the upper surface of the gate electrode; by removing the formed first insulating film through etching from the top surface side, forming first sidewalls, covering the side surfaces of the gate electrode, from the first insulating film; and by implanting first impurity ions of a second conductive type to the semiconductor region by using an ion implantation device capable of processing a plurality of semiconductor wafers collectively, forming first impurity diffusion regions on both sides of the gate electrode in the semiconductor region. In the step of forming the first impurity diffusion regions, implantation of the first impurity ions are dividedly performed a plurality of times, and the semiconductor wafer is rotated in its wafer surface for each ion implantation.

The present invention relates to a method for fabricating a semiconductor device and fabricating apparatus therefor, and in particular, to a method for fabricating a semiconductor device with extension regions connected with a source diffusion region and a drain diffusion region, and fabricating apparatus therefor.
Conventionally, in a process of forming a source diffusion region or a drain diffusion region for suppressing a short channel effect due to miniaturization of a MOS transistor, there is known a method in which offset sidewalls are formed on the side surfaces of a gate electrode, and ion implantation is performed by using the gate electrode and the sidewalls as masks, whereby a source diffusion region or a drain diffusion region is formed in a self-aligned manner.
For example, Japanese Patent-Application Laid-open No. 2003-100902 describes a method in which, by using offset sidewalls formed on the side surfaces of a gate electrode, a source diffusion region and a drain diffusion region, and extension regions of low concentration connected with the source diffusion region and the drain diffusion region, are formed through ion implantations performed in two stages.
Hereinafter, a conventional method for fabricating a MOS transistor with extension regions will be described with reference to drawings.
FIGS. 7A to 7C, 8A and 8B show sectional structures in the order of steps of a conventional method for fabricating a MOS transistor.
First, as shown in FIG. 7A, isolation films 102 are selectively formed on a semiconductor wafer 101 made of silicon, and p-type impurity ions are diffused in a region between the formed isolation films 102, to thereby form a well diffusion region 103. Then, on the semiconductor wafer 101, a silicon oxide film 104 and a poly-silicon film 105 are formed over the whole surface including the upper surfaces of the isolation films 102 and the well diffusion region 103.
Next, as shown in FIG. 7B, the poly-silicon film 105 and the silicon oxide film 104 are pattered in order, to thereby form a gate insulating film 104A from the silicon oxide film 104 and form a gate electrode 105A from the poly-silicon film 105. Then, on the semiconductor wafer 101, a first insulating film 106 made of silicon oxide is formed over the whole surface so as to surround the gate electrode 105A.
Next, as shown in FIG. 7C, first sidewalls 106A covering the side surfaces of the gate electrode 105A are formed by etching the first insulating film 106 from the top surface side, and n-type impurity ions are implanted through a low energy ion implantation using the gate electrode 105A and the first sidewalls as masks, to thereby form extension regions 107. Then, using the gate electrode 105A and the first sidewalls as masks, pocket regions 108 are formed by implanting (pocket implanting) p-type impurity ions through ion implantation in which an ion beam is tilted to the gate electrode 105A.
Here, the extension region 107 is a low concentration diffusion region connected with a source diffusion region or a drain diffusion region, and suppresses a short channel effect due to a miniaturization of a semiconductor device. The pocket region 108 is an impurity diffusion region of an opposite conductive type to the extension region 107, whereby it suppresses lateral spreading of a depletion region under the gate electrode 105A, and reduces a leakage current between the gate and the drain.
Next, as shown in FIG. 8A, on the semiconductor wafer 101, a second insulating film 109 made of silicon oxide is formed over the whole surface including the upper surfaces of the gate electrode 105A and the first sidewalls 106A.
Next, as shown in FIG. 8B, the second insulating film 109 is etched to thereby form second sidewalls 109A covering the sides of the first sidewalls 106A. Then, source/drain regions 110 made of n-type impurities are formed through ion implantation by using the second sidewalls 109A as masks.
According to the conventional method for fabricating a MOS transistor, the extension regions 107 and the source/drain regions 110 are formed in a self-aligned manner by using the first sidewalls 106A and the second sidewalls 109A as masks. Thereby, it is possible to form easily and securely a semiconductor device capable of suppressing a short channel effect due to miniaturization and reducing a leakage current between the gate and the drain.
In the conventional method for fabricating a MOS transistor, the step of forming the extension regions 107 needs to use an extremely low-energy ion beam. In general, a so-called batch-type ion implantation device is used, which device is so configured as to enable ion implantation to be performed collectively to a plurality of semiconductor wafers 101. In particular, an ion beam with low energy is difficult to be scanned by deflection, whereby ion implantation is performed to the whole surfaces of respective semiconductor wafers 101 by rotating and moving a wafer supporting board called a disk.
Hereinafter, a conventional batch-type ion implantation device will be described with reference to the drawings.
FIG. 9 is a perspective view showing the shape of a disk used for a conventional batch-type ion implantation device. As shown in FIG. 9, the conventional batch-type ion implantation device holds semiconductor wafers 101 to which ion implantation is performed, in a plurality of wafer holding areas 201a provided in the periphery of the circle disk 201. With this device, an ion beam 210 consisting of impurity ions to be implanted is irradiated to the semiconductor wafers 101, to thereby implant impurity ions to the semiconductor wafers 101.
The disk 201 is configured to be rotatable and movable by a rotation axis 202 and a scan axis 203. In FIG. 9, it is assumed that an extending direction of the rotation axis 202 is z axis, an extending direction of the scan axis 203 is y axis, and a direction vertical to the y axis and the z axis is x axis.
When implanting impurity ions over the whole surfaces of the semiconductor wafers 101 by using the conventional batch-type ion implantation device, the disk 201 is rotated about the rotation axis 202 at a high speed and the scan axis is moved reciprocally in the y direction. Thereby, impurity ions can be implanted to a plurality of semiconductor wafers 101 collectively and over the whole surfaces of respective wafers.
Further, in the conventional batch-type ion implantation device, a direction of implanting the ion beam 210 is fixed in a direction parallel to the z axis, and when adjusting the implanting angle of the ion beam 210 to the semiconductor wafers 101, the disk 201 is used to be tilted to the ion beam 210.
When forming the extension regions 107 shown in FIG. 7C by using the batch-type ion implantation device in FIG. 9, a method in which the ion beam 210 is implanted at once vertically to the semiconductor wafers 101, or a method in which the ion beam 210 is dividedly implanted four times from four directions by tilting the ion beam 210 to the semiconductor wafers 101, is generally used.
However, with the aforementioned conventional methods for fabricating a semiconductor device, it is difficult to surely form the extension regions 107, formed on the sides of the gate electrode 105, so as to be symmetrical to the gate electrode 105A on the both sides thereof, whereby a problem of asymmetry of the MOS transistor may arise.
Such an asymmetry of the MOS transistor is caused since, when forming the extension regions 107 using the conventional batch-type ion implantation device, the implantation angles of the ion beam 210 differs at the center and at the periphery of the semiconductor wafer 101 even though the angle of the ion beam 210 is set to be a certain value.
Implantation angles of the ion beam and the asymmetry of the MOS transistor will be described below with reference to the drawings.
FIG. 10A to 10C are illustrations explaining the angular relationships defined by the semiconductor wafer 101 and the ion beam 210 in the conventional batch-type ion implantation device. In FIGS. 10A to 10C, the disk 201 is expressed linearly for convenience of explanation. Further, in FIGS. 10A to 10C, an x axis, a y axis and a z axis conform to the x axis, the y axis and the z axis in FIG. 9, respectively.
As shown in FIG. 10A, in the disk 201, a wafer holding area 201a is provided to be tilted at a certain angle (cone angle A) to the rotation surface of the disk 201. The cone angle A is fixed at a certain value for each batch-type ion implantation device such that the semiconductor wafer 101 may be easily held by the wafer holding area 201a when the disk 201 rotates about the rotation axis 202.
Further, as shown in FIGS. 10B and 10C, a first jyro angle B1 and a second jyro angle B2 of the disk 201 can be set to be desired values, whereby the angle of the semiconductor wafers 101 to the ion beam 210 can be adjusted. In FIGS. 10B and 10C, cases where the first jyro angle B1 and the second jyro angle b2 are 0° (that is, in the initial state where the disk 201 is disposed in parallel with the xy plane) are shown by dotted lines. The first jyro angle B1 is such an angle that the disk 201 rotates about the rotation axis 202 from the initial state in the y axis direction, and the second jyro angle B2 is such an angle that the disk 201 rotates in the y axis direction.
FIGS. 11A to 11C are illustrations explaining implantation angles of the ion beam 210 in the conventional batch-type ion implanting device. As shown in FIG. 11A and 11B, an angle defined by the semiconductor wafer 101 and the ion beam 210 is expressed by two angles (that is, tilt angle T1 and twist angle T2). The tilt angle T1 is defined by the normal (a line indicated by the dotted line in FIG. 11A) of the semiconductor wafer 101 and the ion beam 210, and the twist angle T2 is defined by, assuming that a line linking a notch 110a showing the crystal orientation of the semiconductor wafer 101 and the center of the semiconductor wafer 101 is the reference line, the reference line and a projection line 210a showing the projection of the ion beam 201 to the semiconductor wafer 101.
Further, as shown in FIG. 1C, when the ion beam is irradiated to a point P rotated by a rotation angle C from the center of the semiconductor wafer 101 by rotating the disk 201 about the rotation axis 202, assuming that a line linking the center of the semiconductor wafer 101 and the center of the disk 201 is the reference line and that a vertical leg down from the point P to the reference line is a point Q, the rotation angle C is expressed as follows by using a distance R1 from the center of the semiconductor wafer 101 to the point Q, and a distance R2 from the point P to the point Q:C=tan−1(R2/R1)   (1)Then, at the point P, the tilt angle T1 and the twist angle T2 are expressed as follows:T1=cos−1{cos(B1−A)cos B2 cos A+sin B2 sin A sin C−sin(B1−A)cos B2 sin A cos C}  (2)T2=tan−1(k/h)   (3)
provided that, in the equation (3),k=sin B2 cos C+sin(B1−A)cos B2 sinh=cos(B1−A)cos B2 sin C+sin(B1−A)cos B2 cos A cos C−sin B2 cos A sin C
As obvious from the equations (2) and (3), the tilt angle T1 and the twist angle T2 are functions of the rotation angle C, whereby their values change corresponding to the distance R2 vertical to the reference line linking the center of the disk 201 and the center of the semiconductor wafer.
FIG. 12 is a graph showing the relationship between the distance R2 from the center of the semiconductor wafer and the implantation angle of the ion beam. In FIG. 12, the lateral axis shows the distance R2 from the reference line, linking the center of the disk 201 and the center of the semiconductor wafer 101, to the irradiating position of the ion beam, and the positive and negative symbols indicate directions to the reference line. The vertical axis shows the implantation angle (tilt angle T1 and twist angle T2) of the ion beam.
As shown in FIG. 12, although the tilt angle T1 and the twist angle T2 are set to be 0° at the center (R2=0) of the semiconductor wafer 101, it is obvious that the tilt angle T1 and the twist angle T2 change as they move away from the center of the semiconductor wafer 101. In this way, although the desired implantation angle has been set at the center of the semiconductor wafer 101, ion implantation is performed at an implantation angle different from the set implantation angle at the periphery of the semiconductor wafer 101.
Next, an influence of the shift in the implantation angle of the ion beam on the asymmetry of the MOS transistor will be described with reference to the drawings.
Here, assuming that in the two source/drain regions 110 formed on both sides of the gate electrode 105A, a drain current, in a case of applying a certain forward bias to respective regions so that one becomes a source region and the other becomes a drain region, is IDS1, and a drain current, in a case of applying a reverse bias, is IDS2, the asymmetry of the source/drain can be measured as (IDS1−IDS2)/IDS1.
FIG. 13 shows measurement values of the asymmetry of the source/drain as the distribution in the semiconductor wafer 101, when a plurality of MOS transistors with extension regions 107 are formed by using the batch-type ion implantation device shown in FIG. 9. In FIG. 13, a numeral value in a square in the semiconductor wafer 101 is a representative value showing the asymmetry of the source/drain of each MOS transistor disposed at a region where the square is located, and a mark of x or triangle attached on the upper right of each numeral value indicates that the value does not satisfy the asymmetry standard of the source/drain.
As shown in FIG. 13, the asymmetry of the source/drain increases from the center of the semiconductor wafer 101 to the periphery thereof. In recent years, it is required that the asymmetry of the source/drain is 3% or less, so this Figure shows that most parts in the periphery of the semiconductor wafer 101 do not meet the standard.
As described above, it is obvious that the asymmetry of the source/drain increases, as it moves away from the center of the semiconductor wafer 101, that is, as the shifted amounts of the tilt angle T1 and the twist angle T2 from the set values increase.
In order to improve the asymmetry of the source/drain, there has been tried a method in which the tilt angle T1 is set to be larger than 0° in the step of forming the extension regions 107, and implantations are performed from four directions by changing the twist angle T2.
FIGS. 14A and 14B show the relationship between the changing amount of the ion beam implantation angle and the distance from the center of the semiconductor wafer 101, when changing the set value of the twist angle T2 in the conventional batch-type ion implantation device. FIG. 14A shows the relationship between the distance from the center of the semiconductor wafer 101 and the changing amount of the tilt angle T1, and FIG. 14B shows the relationship between the distance from the center of the semiconductor wafer 101 and the changing amount of the twist angle T2. In FIGS. 14A and 14B, the tilt angle T1 at the center of the semiconductor wafer 101 is set to be about 7°.
As shown in FIGS. 14A and 14B, when changing the twist angle T2 from 0° to 90°, 180° and 270°, the tilt angle T1 changes in great amount in the periphery of the semiconductor wafer 101 when the twist angle T2 is 90° and 270°, in particular. In the case of the tilt angle being 7°, if the values of the first jyro angle B1 and the second jyro angle B2 are (B1, B2)=(7°, 0°), the twist angle T2 is 0°, if (B1, B2)=(0°, 7°), the twist angle T2 is 90°, if (B1, B2)=(−7°, 0°), the twist angle T2 is 180°, and if (B1, B2)=(0°, −7°), the twist angle T2 is 270°. Accordingly, the changing amount of the tilt angle T1 increases as the absolute value of the second jyro angle B2 increases.
As described above, even when performing ion implantations from four directions by changing the twist angle T2, the implantation angle, of the ion beam at the periphery of the semiconductor wafer 101 may change in great amount, depending on the value of the jyro angle.
FIGS. 15A and 15B show positioning relationships between the gate electrode 105A and the extension regions 107 in the case where the extension regions 107 are formed by performing the ion implantations four times as described above. FIG. 15A shows a MOS transistor at the center of the semiconductor wafer 101, and FIG. 15B shows a MOS transistor at the periphery of the semiconductor wafer 101. In FIGS. 15A and 15B, each numeral shown on the upper side indicates a distance from a side surface of the gate electrode 105A to the edge of the extension region 107. Further, the twist angle is changed by 90° sequentially, from 0° to 90°, 180° and 270° in the first to the fourth ion implantations.
As shown in FIG. 15A, at the center of the semiconductor wafer 101, the extension regions are formed symmetrical to the gate electrode 105A, from the first layered extension regions 107a formed by the first ion implantation to the fourth layered extension regions 107d formed by the fourth ion implantation. However, as shown in FIG. 15B, at the periphery of the semiconductor wafer 101, although the first layered extension regions 107a and the second layered extension regions 107b, formed by the first and the second ion implantations, respectively, are formed symmetrical to the gate electrode 105A, the third layered extension regions 107c and the fourth layered extension regions 107d, formed by the third and fourth ion implantations, respectively, are formed asymmetrical to the gate electrode 105A.
In this way, even though the ion implantations are performed from four directions by changing the twist angle T2, it is obvious that the extension regions 107 cannot be formed symmetrical to the gate electrode 105A on the both sides thereof.
Further, as another method for improving the asymmetry of the source/drain, there is known a method in which the first sidewalls 106A, serving as masks when forming the extension regions 107, are filmed.
FIG. 16 is a graph showing the relationship between the distance from the center of the semiconductor wafer and the asymmetry of the source/drain when the offset film thickness of the first sidewall 106A (that is, the width of the bottom surface of the first sidewall 106 shown in FIG. 8B) is changed in the conventional method for fabricating a semiconductor device.
As shown in FIG. 16, as the offset film thickness of the first sidewall 106A increases, the asymmetry of the source/drain at the periphery of the semiconductor wafer 101 also increases. In order to make the asymmetry of the source/drain be 3% or less even at the periphery of the semiconductor wafer 101, the offset film thickness of the first sidewall 106A should be 3 nm or less, according to the Figure.
However, as the offset film thickness of the first sidewall 106A decreases, no effect of forming the first sidewalls 106A is achieved, whereby the extension regions 107 and the pocket regions 108 are not formed at the desired positions, and such effects as suppression of a short channel effect, reduction in gate leakage current, or the like cannot be achieved.
As described above, according to the conventional method for fabricating a semiconductor device, the implantation angle of the impurity ions changes in the wafer surface in the step of forming the extension regions using a batch-type ion implantation device, whereby the extension regions cannot be formed symmetrical to the gate electrode, causing the asymmetry of the source/drain. Further, even if performing ion implantations from four directions with the tilt angle being greater than 0° in order to solve the asymmetry of the source/drain, the tilt angle and the twist angle are shifted from the set values at the periphery of the wafer, whereby it is impossible to realize MOS transistors having fine symmetry of the source/drain with high yield.

Method and apparatus for fabricating semiconductor device

Matsushita Electric Industrial Co., Ltd.


A method of manufacturing a semiconductor device includes providing a semiconductor substrate, forming a diamond film on the substrate, etching the diamond film to form a first trench that extends to the substrate, epitaxially growing a first semiconductor material in the first trench to form a first semiconductor fin structure, and removing an upper portion of the diamond film to expose an upper portion of the first semiconductor fin structure.

The present invention relates to the field of semiconductor technology. Specifically, embodiments of the invention are directed to semiconductor device structures and manufacturing methods.
As device dimensions shrink, FinFET (Fin Field Effect Transistor, FinFET) has been widely used. However, compared with planar transistor devices, the FinFET three-dimensional structure is more complex. The inventor has identified that the self-heating effect is more serious with FinFET three-dimensional structures, thus affecting the stability of the device.

Method and device for reducing FinFET self-heating effect

Semiconductor Manufacturing International (Beijing) Corporation

Semiconductor Manufacturing International (Shanghai) Corporation


A vehicle lamp color-changing device includes a bracket, a swinging unit mounted to the bracket and swingable about an imaginary axis, and a rotary driving unit. The swinging unit includes a colored lens and an eccentric member disposed offset from the imaginary axis. The rotary driving unit has a rotary drive mounted to the bracket, a swingable arm connected with the rotary drive, and a pulling rod connected with the swingable arm and the eccentric member pivotally. In this way, the swingable arm is drivenable by the rotary drive to drive the pulling rod to move the eccentric member and thereby cause the swinging unit to swing in a way that the colored lens is swingable between an active position and an inactive position. As a result, the vehicle lamp color-changing device responds fast and is small-sized so as to be easily arranged in the vehicle lamp.

1. Field of the Invention
The present invention relates generally to vehicle lamp color-changing devices and more particularly, to a vehicle lamp color-changing device with a swingable arm.
2. Description of the Related Art
Taiwan Patent No. M461734 disclosed a rotary color-temperature-changing device for a lamp, which comprises a base for installation of a light source, a rotary mechanism installed on the base, and a colored lens attached to and driven by the rotary mechanism so that the color of lights emitted by the lamp is changeable by rotation of the colored lens. That is, the light color of the lamp is either the original light color of the light source or the color of light from the light source after projecting through the colored lens and thereby being changed in color temperature thereof.
However, for the purpose of spacial arrangement, the aforesaid rotary color-temperature-changing device for a lamp uses a set of bevel gears for transmission between a motor and the colored lens, resulting in slow response and a requirement of relatively larger torque outputted by the motor so that the motor corresponsively has a relatively larger size and causes further difficulties in spacial arrangement. Besides, a technical problem in designing the aforesaid device is liable to happen; that is, if the angular position of the colored lens is changed very often and fast, the colored lens is likely to bump against other elements, thereby making noises and/or possibly damaging the colored lens.

Vehicle lamp color-changing device with swingable arm


A call center handles TTY calls for the hearing and speech impaired. The call center includes a modem bank housing multiple modems. Each modem in the modem bank is connected to a switching system and a network. Terminals for handling the calls are also connected to the network. A call controller is connected to the network and to the switching system. When a call is received by the switching system, call information is transmitted to the call controller by the switching system. The call is then extended by the switch to a modem in a modem pool. The modem bank controller then requests the identity of an available terminal to handle the call from the call controller. The call controller determines which of terminals is available to handle the incoming call. The identity of the selected terminal is transmitted to the modem bank controller. The modem bank controller commands the modem receiving the call to then transmit data received to the selected terminal.

Not applicable
Not applicable
Not applicable
1. Field of the Invention
The invention is related to the provision of telecommunication services to the deaf and hearing impaired. More particularly, the invention is related to a call center for handling TTY calls for the deaf and hearing impaired. Still more particularly, this invention is related to reducing the number of TTY that are not completed and a system for accurately tracking the total number of calls to a TTY call center.
2. Description of the Prior Art
Title IV of the Americans with Disabilities Act of 1990 requires the Federal Communications Commission (FCC) to ensure that telecommunication services are provided to the hearing and speech impaired. Telecommunication Relay Services (TRS) are used provide the functional equivalent of telecommunication services to the hearing and speech impaired. TRS have been available on a nationwide basis since 1983.
TRS operates in the following manner. A calling party for this system may be a hearing or speech impaired person or a person wishing to talk to the hearing or speech impaired. The calling party has a TDD/TTY which is a device for transmitting and receiving typed messages. The calling party places a call by dialing a local toll free number. The call is extended to a communication assistant terminal in the call center. The call is a modem connection between the calling party and the communication assistant terminal. The calling party then types a telephone number that the calling party wishes to call. A call is then placed by the communication assistant to the telephone number. When a call is established with a party at the desired telephone number, the calling assistant relays the messages between the calling party and the called party. The calling party types in messages that are read by the calling assistant to the called party. The called party speaks to the calling assistant, who types in the called party""s message. This operation is performed in an opposite manner when a person is calling a hearing or speech impaired person.
The local toll free number called by a party extends the call to a call center that provides TRS. A conventional call center is illustrated in FIG. 1. In call center 100, a switching system 101 is connected to a modem 111 in each of terminals 110 and to a call controller 120. One type of switching system typically used in a call center 100 is a Rockwell Galaxy ACD switch. Call controller 120 is a system having a processing unit and associated memory.
Call controller 120 determines which terminal is available to handle a call. When switching system 101 receives a request for a call set-up, switching system 101 transmits a request to call controller 120 for an available terminal. Call controller 120 responds to switching system 101 by transmitting an identity of an available terminal. Switching system 101 then extends the call to the identified terminal.
Each terminal 110 is a computer system 112 that can convert signals received via modem 111 into a text message that is displayed upon screen 113. Each terminal 110 also has a telephone station 115 connected to switching system 101 to receive and to place voice telephonic calls. The communication assistant can enter text into computer system 112 via keyboard 114. Computer system 112 converts the entered text into text messages transmitted to a calling party over the connection established with modem 111. Computer 112 is also connected to a network 150. When a call is completed to a terminal 110, a Call Detail Record (CDR) is generated by computer system 112. The call detail record includes information pertaining to the length of the call. The CDR is then stored in computer system 112.
A billing system 151 is then connected to each terminal 110 via network 150. Periodically, each computer system 112 transmits stored CDRs to billing system 151 for processing. The billing system 151 then uses the call detail records to generate billing.
It is a problem that conventional call center 100 cannot record calls that are not completed to a terminal 110. In conventional system 100, a call is extended directly to a terminal 110. If the call is not answered at the terminal, there is no record of the call. It is common for a call not be completed, as the calling party may hang up before a calling assistant is available to handle the call at the terminal 110. Most TRS providers charge agencies for the amount of calls handled by the switching system 101. Currently, an algorithm is used to determined the amount of call that are received by switching system 101 but are not completed to a terminal. However, both service providers and agencies paying for the TRS service desire an improved call center which allows calls to be answered more efficiently as well as having a method for determining the amount of calls handled but not completed.
The above and other problems are solved and an advance in the art is made by a call center of this invention. A first advantage of this invention is that a record can be generated of all calls handled by the call center. A second advantage of this invention is that after a call is completed a terminal available to handle the call may be determined which allows for better assurance that the call will be handled. A third advantage is that a terminal handling the call does not have to be physically connected to the switching system.
This invention is a call center that handles TTY calls for the hearing and speech impaired. The call center includes a modem bank housing multiple modems. Each modem in the modem bank is connected to a switching system and a network. Terminals for handling the calls are also connected to the network. A call controller is connected to the network and to the switching system.
When a call is received by the switching system, call information is transmitted to the call controller by the switching system. The call is then extended by the switch to a modem in a modem pool. The modem bank controller then requests the identity of an available terminal to handle the call from the call controller.
The call controller determines which of terminals is available to handle the incoming call. The identity of the selected terminal is transmitted to the modem bank controller. The modem bank controller commands the modem receiving the call to then transmit data received to the selected terminal.
In a preferred embodiment, each of the terminals includes a computer system and a telephone station. Alternatively, the terminal may contain just a computer system that has software and a microphone to allow voice over IP applications. The computer system is connected to the network. The telephone station is connected to the switching system. The computer system handles calls in the following manner. When an incoming call is received, the computer system receives data of the incoming call from the selected modem in the modem bank. The data is converted by the computer system into a display of words. The display is then shown on a connected display to the communication assistant.
The communication assistant inputs data into the computer system via a keyboard or other device. The computer system receives the input data from the communication assistant. The input data is then converted into transmission data, and transmitted to the calling party via the selected modem in the modem bank handling the incoming call.
The call center may also include a Call Detail Record (CDR) server. The CDR server is connected to the network. The CDR server generates a connection record of each incoming call connected to one the modems in the modem bank. The connection record is then stored in a memory in the CDR server.
The CDR server may also generate a session record of each incoming call handled by a terminal. The session record may be a separate record or may be a subset of data in a call detail record. The session record is also stored in the memory in the CDR server. The session record is generated in the following manner. A terminal transmits a session established signal to the CDR server responsive to the terminal beginning to receive data for an incoming call from one of the modems. The terminal may then transmit a session complete signal to the CDR server responsive to the incoming call being disconnected. The CDR server receives said session established signal, receives the session complete signal, and generates the session record which includes a length of time of a session, and time of day of said session.
The modem bank includes a processing unit that executes instructions for operating the modem bank in the following manner. When one of the modems is connected to an incoming call, the modem bank generates a connection established signal and transmits the connection established signal to the CDR server. When one of the modems disconnects call, the modem bank generates a connection ended signal. The connection ended signal is transmitted by the modem bank to the CDR server. The CDR server receives the connection established signal, and the connection ended signal. From the connection established and connection ended signals, the CDR server generates the connection record from information in the established signal and the connection ended signal.
In order to determine which terminals are available to handle calls, the call controller may maintain agent database that indicates terminals are available to handle incoming calls. In order to maintain the agent database, the call controller may receive signals from terminals indicating the status of the terminal. When a communication assistant is at a terminal and the terminal is available to handle calls, the terminal generates an available signal and transmits the available signal to the call controller. When a terminal cannot handle a call, the terminal generates an unavailable signal responsive to said user not being available to handle incoming calls and transmits the unavailable signal to the call controller.
When the switching system receives a call to the call center telephone number, the switching system transmits a request to the call controller for an available modem in the modem bank. The call center then transmits the identity of a selected modem. The switching system receives the identity of the modem from said call controller and extends the incoming call to the modem. When a voice call is received by the switching system, the switching system transmits a request for an identity of a telephone station at one of the terminals available to receive an incoming call. The switching system receives the identity of a telephone station at one of the terminals and extends the incoming call to the telephone station.

System and method for assuring connection of TTY telephone calls to a call center


A multiple extend ball screw and nut linear actuator incorporates a revolvable axially restrained ball screw with a ball nut thereon. A constant speed reversible drive revolves the screw to move the ball nut forwardly and rearwardly. External helical threads of the same hand as the ball nut threads are provided externally on the ball nut but have a substantially reduced lead. A second rotatably restrained nut having threads matching the external threads on the ball nut mounts on the ball nut and connects to the system to be actuated.

Conventionally, variable speed motor input drives, are utilized to drive a primary stage ball screw and move a ball nut the greater proportion of the actuator""s linear stroke at a relatively high speed, and then are cushioned to abruptly decelerate during the end portion of the stroke. This is normal practice for multiple stage actuators, such as the type shown in the present assignee""s U.S. Pat. No. 3,762,227, in which there is a multiple extension of the actuator components in stages, but no provision for providing automatic xe2x80x9cend of strokexe2x80x9d speed reduction.
It is desirable that the actuator be improved so that the drive motor utilized can provide a constant speed input. The invention provides an elongate, revolvable, axially restrained ball screw and accompanying ball nut having thread forming helical land and groove portions which provide a raceway between them for load bearing balls, wherein the ball nut travels a major portion of the stroke of the multiple extend linear actuator. The ball nut is capable of rotation, as well as translation along the ball screw.
An actuator nut, with internal threads, is mounted on the ball nut, which is provided with matching external threads. The hand of the threads of the actuator nut is the same as the hand of the threads of the ball nut, but the actual nut threads have a shorter lead by at least a factor of two. The ball screw is provided with a resilient energy dissipating stop which extends into the path of the ball nut to first decelerate the travel of the ball nut and then to effect a coupling of the screw shaft and ball nut so that they begin rotating as an integrated assembly at the constant speed of the motor. This causes the actuator nut to extend, but at a significantly reduced speed. The reversing stroke of the actuator is similar in that the major portion of the reversing travel is created by the ball nut traveling along the ball screw, the ball screw then being stopped and rigidly coupled with the ball screw to initiate travel of the actuator nut in the reverse direction.
It is a prime object of the present invention to be able to to drive the ball screw at a constant speed during both the forwarding and reversing travel of the linear actuator.
It is a further object of the invention to provide an actuator assembly which is so constructed as to provide a linear deceleration of the ball nut and to effect a coupling of the ball nut to the screw shaft so that the ball screw and the ball nut rotate as a rigid couple which moves the actuate member being actuated at a much reduced speed at the end of the actuator stroke.
Another object of the invention is to provide a relatively durable, maintenance free, multiple stage actuator system which operates smoothly and reliably to effect an actuation of the system to which the actuator nut is connected.
Another object of the invention is to provide an economically available actuator and drive which does not impose undue loads on the system which it operates.
Other objects and advantages of the invention will become apparent with reference to the accompanying drawings and the accompanying descriptive matter.

Multiple stage, multiple extend, speed reducing ball screw linear actuator and method of constructing and operating the actuator


This disclosure relates to calibrating a volumetric estimation device for determining dimensions of an object. Two laser sources project two laser lines onto the object to form a rectangular calibration target. A camera captures an image of the rectangular calibration target and has a camera image plane and a camera image plane centre point. A processor measures the camera distortion effects to generate a filter to remove the distortion effects to approximate a pinhole camera. The camera image plane centre point and the points of projection of the laser sources are not collinear. The point of laser projection are not collinear with the camera image plane centre point. The processor uses locations of laser projected crosslines to determine a deviation angle from a direction perpendicular to the camera image plane and the distance between the camera image plane centre point and each laser source.

Freight forwarding and shipping is a global business, companies all around the world are involved in the global shipping business. Conventionally, shipping charges have solely been determined by weight of the freight. A weight-based shipping system provides easy, accurate, and fast shipping charges and can be integrated into freight moving devices like a forklift or other transportation device. The shipping industry has since moved toward dimensional weighting, whereby the volume of a package is included in the transport cost.
Volume is more difficult to measure than weight. In a volume-based freight system, shippers are tasked with assigning volumes to freight with the risk of challenge from the carrier(s) and/or receiver. The industry requirements for quickly transporting freight are very high, and carriers become increasingly pressured to process freight quickly, which makes manual dimensioning of freight infeasible. Carriers and receivers highly value the correct calculation of the freight shipping costs prior to onward shipment or final destination, respectively. Shippers may under-report dimensions to decrease the cost of shipping, which causes revenue leakage for the carriers and risk of payment upon delivery for the receivers.
Volumetric apparatus' can be constructed relatively easily. However, their accuracy can be questionable. It would be beneficial were the accuracy of the measurements high, avoiding errors that could result in higher costs either to the customers or the shipper. Therefore, the freight industry could benefit from devices, methods, and systems that help dimension freight in a way that is efficient, cost-effective, and minimally interferes with the normal flow of freight traffic.

Volumetric estimation methods, devices, and systems


A structure for cooling an integrated circuit. The structure may include; an interposer cold plate having at least two expanding channels, each expanding channel having a flow direction from a channel inlet to a channel outlet, the flow direction having different directions for at least two of the at least two expanding channels, the channel inlet having an inlet width and the channel outlet having an outlet width, wherein the inlet width is less than the outlet width.

The present invention generally relates to cooling chip packages, and more particularly to cooling chip stacks by employing an onboard cooling structure.
In general, it is important to cool semiconductor chips, such as processor chips, to maintain reliable operation, reduce leakage currents, and prevent thermal damage to electronic components. It is more problematic and difficult to implement effective mechanisms for cooling 3D chip stacks as compared to singular chips, and the ability to efficiently cool a chip stack can limit the height and total power of a chip stack. Common cooling techniques for chip stacks include the use of high-performance water cooling systems on a backside of the chip stack, but this technique may not be adequate for a stack structure with many chips or a chip stack having a high-power chip on the bottom of the stack. While a water-cooled thermal interposer can be used at the bottom of the chip stack, this structure is difficult to integrate and may require isolation of thru silicon vias (TSVs) from the liquid coolant that is used. If a dielectric fluid is used as the coolant, isolation of the TSVs is not required. However, with single phase cooling, the performance of dielectric fluids is inferior to water.
Other cooling techniques include two-phase cooling in which a liquid coolant having a relatively low boiling point is used (e.g., liquid which evaporates at an operating temperature of the chips being used). With two-phase cooling in closed channels, the heated liquid evaporates to create an annular flow whereby a thin liquid film (evaporation layer) is present on the surfaces being cooled, and heated evaporated coolant flows through confined channels to outlet ports. As such, compared to pure liquid (e.g., single phase) cooling techniques, two-phase cooling can provide greater cooling ability using a much lower volume of coolant fluid, lower coolant mass flow rates and lower operating pressure drop. Advantages of two-phase cooling include the ability to select the boiling temperature of the coolant or use an expansion valve for refrigeration.
Another cooling technique includes expanding radial channels to mitigate the acceleration in the stream-wise direction of the fluid cavity. Accordingly, the pressure drop and the dry-out risk can be reduced in the heat transfer cavity. However, a central hole is required in a chip stack to feed the refrigerant into the radial expanding channels.

Counter-flow expanding channels for enhanced two-phase heat removal

International Business Machines Corporation


The bit line for reading data in or writing data out from a CMOS integrated circuit latch is precharged to the trip point voltage of the latch (as determined by the latch's transistor design) shortly before the occurrence of a read operation. The precharging circuitry uses the latch circuit itself to generate the trip point, hence ensuring that the precharging circuit operates properly with regards to the latch characteristics in spite of temperature, voltage and fabrication process variations. The precharging circuitry ensures that during the operation of reading data from the latch, the bit line voltage never causes the latch to completely switch states, since at most the bit line voltage asymptotically approaches the trip point voltage. The precharging circuit is relatively simple, including only two logic gates and three other transistors.

1. Field of the Invention
This invention relates to the implementation of logic functions in an integrated circuit logic device, and more specifically to ensuring reliability of reading from and writing to a latch configuration data storage element.
2. Description of the Prior Art
Many complex integrated circuit chips require configuration information to be loaded after device reset or during normal operation to internally set up the proper state. To minimize the chip die area, this information is typically stored in latches that share common read/write lines ("bitlines"). A typical latch comprises two cross-coupled inverters (connected to form a loop), which holds a state until the state is overwritten in a write operation.
A prior art CMOS transistor latch circuit is shown in FIG. 1(a). To write data to a latch 5, write enable transistor 2 is turned on by an externally provided WRITE signal, enabling the inverting buffer 3 to provide the inverted DATAIN signal as a particular voltage (either Vcc or ground) to the bitline 1. Each inverter in FIG. 1(a) is (see FIG. 1(b)) conventionally a pair of CMOS transistors, one N-type "N" and the other P-type "P", with their gates connected to the inverter input and their drains commonly connected to the inverter output. Passgate 4 of FIG. 1(a) (shown as a single N-channel transistor, but which may alternatively be a CMOS transmission gate or a series of such structures) connects the latch 5 (including cross-coupled inverters 20, 22) to the bitline 1. Passgate 4 is turned on by a signal on line 8 in response to
(1) the ENABLE signal provided to transistors 12 and 13 as driven by inverters 16, 18 and PA1 (2) the address of this latch, which results in the gate terminals of all transistors 10 being held low.
In a complex integrated circuit chip, there are typically several latches 5 connected to each bitline 1. For each latch 5 there is a corresponding line 8 controlling a passgate 4. Transistors 10 in FIG. 1 are addressed differently for the different passgates 4 connected to the same bitline 1, and select which of several configuration latches shall connect to bitline 1.
When transistor 4 is first turned on, there is momentary logic contention if latch 5 is switching states, but the transistor characteristics of latch 5 are such that the output of inverter 20 is overpowered, and the value of the data stored in latch 5 becomes the logical state of bitline 1. The small numbers adjacent to or over each schematic symbol in FIG. 1(a) denote the size of the active area (channel region) of the transistors. The single number denotes width of the transistor, with the transistor length being the minimum allowed by the fabrication technology (currently about 1.0 .mu.m). Hence transistors 10 each have a channel width of 5 .mu.m; inverter 3 includes a P-type transistor of 30 .mu.m channel width and an N-type transistor of 20 .mu.m channel width.
To read data from latch 5, bitline 1 is floating (i.e. not being driven by any signal), when connecting passgate 4 is turned on as described above. This allows latch 5 to charge the bitline 1 voltage to the voltage which is the stored internal state (data) of latch 5. Read enable transistor 6 is then turned on (turning off P-type transistor 11) by the READ signal. Bitline 1 voltage is then inverted by inverting buffer 7 and read out as the DATAOUT signal.
Because of the capacitance of bitline 1, there is problematically a potential for "read disturb," whereby during a read operation, the latch data is lost when the latch 5 accidentally achieves the value of the floating bitline 1, which may have been left at high or low potential (different from that of latch 5) corresponding to the last voltage that was actively driven onto bitline 1.
To address the read disturb problem, a scheme for lowering the gate voltage of the passgate during a read operation while maintaining a full voltage during a write operation is disclosed in commonly assigned Hsieh, U.S. Pat. No. 4,820,937, [docket M-349] incorporated herein by reference. However, the circuit of Hsieh requires substantial complexity and hence expense.

Precharging bitlines for robust reading of latch data