An integrated test circuit, as part of an integrated circuit, includes phase-shifted test signals fed through inputs A and B. These test signals are conducted through a plurality of cascaded delay elements, the advancing of the first test signal through the delay elements being held and evaluated by the second test signal.

The invention relates to an integrated circuit with an integrated test circuit.
Integrated circuits are nowadays produced in inconceivably high numbers. As a result of the complex production technology, the need for minimum production costs and the requirements made of optimized technological properties, during production it is customary for individual elements to arise that do not correspond to the specification and have to be separated out by sorting. These integrated circuits are nowadays produced simultaneously on so-called wafers, a plurality of wafers being processed simultaneously for utilization of the costly production devices.
To prevent defective integrated circuits from being processed further, the integrated circuits are usually tested as early as on the wafer.
Complex test equipment is required for such a test, which equipment, in the case of integrated circuits having new technology or a changed behavior, has to be adapted to the integrated circuits.
The adaptation requires a high capital expenditure on the test devices, which readily stands in disproportion to the gain through determining defective integrated circuits in good time. The outlay for the test device rises particularly in the case of dynamic measurements because the switching times or signal propagation times to be measured require high-frequency measuring devices.
It is accordingly an object of the invention to provide an integrated test circuit that overcomes the hereinafore-mentioned disadvantages of the heretofore-known devices of this general type and that can be tested precisely with minimum outlay.
With the foregoing and other objects in view, there is provided, in accordance with the invention, an integrated test circuit, including a first input for receiving a first test signal, a second input for receiving a second test signal phase-shifted by a predetermined time with respect to the first test signal, series-connected delay elements connected to the first input and receiving the first test signal, each of the delay elements generating an output signal, and an evaluation circuit connected to the delay elements and receiving the output signals of the delay elements as an information carrier, and the second input and receiving the second test signal as a control signal.
The fact that the integrated circuit has a test circuit moves the problem of the measurement outlay into the individually integrated circuit. Because the latter is produced in the same technology, the behavior of the integrated test circuit can be used to deduce the behavior of the entire integrated circuit. If the requirements of the test circuit are not sufficient, then the integrated circuit, as such, is not sufficient overall. Consequently, only two test signals need be fed to the integrated circuit, which test signals must have a predetermined phase shift with respect to one another. The integrated circuit or its integrated test circuit outputs its test result at the output according to a xe2x80x9cYESxe2x80x9d/xe2x80x9cNOxe2x80x9d response.
In accordance with another feature of the invention, the evaluation circuit has a storage unit to which the output signals of the delay elements are fed in parallel.
In accordance with a further feature of the invention, the evaluation circuit has a storage unit connected to each of the delay elements and the storage unit receives the output signals of the delay elements in parallel.
By virtue of the fact that a storage unit is provided in the evaluation circuit, to which storage unit the output signals of the first delay elements are fed in parallel, the dynamic behavior of the integrated circuit, as such, can, thereby, be ascertained and evaluated as a snapshot. This is facilitated, in particular, by the fact that the storage device is controlled by the second test signal. Such control is advantageously accomplished by feeding the second test signal through a second delay element. If the second delay element effects a delay that is N/2 times that of the first delay elements, the evaluation is simplified.
In accordance with an added feature of the invention, the second test signal is fed as a control signal to the storage unit.
In accordance with an additional feature of the invention, there is provided a second delay element connected to the second input and to the storage unit, the second test signal being fed as a control signal to the storage unit through the second delay element.
In accordance with yet another feature of the invention, the storage unit contains content and a comparison device is connected to the storage unit and receives the content for comparison with at least one of an upper threshold value and a lower threshold value.
By providing a lower and upper limit or threshold value memory, the comparison device can be used to ascertain whether or not the result of the test measurement lies within a predetermined window.
In accordance with yet a further feature of the invention, the evaluation circuit has a calibration device. The provision of a calibration device means that the integrated test circuit as such is adjustable with regard to production fluctuations.
In accordance with yet an added feature of the invention, there is provided an input balance device.
In accordance with yet an additional feature of the invention, there is provided an input balance device connected to at least one of the first input and the second input for compensating for input-side loading. Providing the input balance device means that the accuracy of the test measurement can be increased.
With the objects of the invention in view, in an integrated circuit providing first and second test signals phase-shifted by a predetermined time with respect to one another, there is also provided an integrated test circuit including a first input for receiving the first test signal, a second input for receiving the second test signal, series-connected delay elements connected to the first input and receiving the first test signal, each of the delay elements generating an output signal, and an evaluation circuit connected to the delay elements and receiving the output signals of the delay elements as an information carrier, and the second input and receiving the second test signal as a control signal.
Other features that are considered as characteristic for the invention are set forth in the appended claims.
Although the invention is illustrated and described herein as embodied in an integrated test circuit, it is, nevertheless, not intended to be limited to the details shown because various modifications and structural changes may be made therein without departing from the spirit of the invention and within the scope and range of equivalents of the claims.
The construction and method of operation of the invention, however, together with additional objects and advantages thereof, will be best understood from the following description of specific embodiments when read in connection with the accompanying drawings.


The invention relates to high basicity polyaluminumchlorosulfates and their preparation process, said polyaluminumchlorosulfates being useful in the treatment of drinking water, aqueous effluents, and in the papermaking industry and having the formula: EQU Al(OH).sub.a Cl.sub.b (SO.sub.4).sub.c M.sub.d N.sub.e. in which:. M is an alkaline-earth metal; PA1 N is an alkaline metal; PA1 a, b, c, d and e are numbers such that:. 1.95<a<2.4; 0<c<0.15; 0<d<0.16; PA2 0<e<1.7; a+b+2c=3+2d+e.

The present invention relates to high basicity polyaluminumchlorosulfates and their preparation process, and to the application of such polyaluminumchlorosulfates to the treatment of drinking water, aqueous effluents, and in the papermaking industry.
Polyaluminumchlorosulfates are widely used in industry, notably the papermaking industry and in the treatment of their waste water and water intended for drinking, because of elevated coagulating and floculating ability. The performance and applications of these polyaluminumchlorosulfates is of course a function of their main characteristics. For the treatment of water intended for drinking, high basicity is required; for effective floculation, a high sulfate content is required; and for all applications, the compounds need to be stable.
Polyaluminumchlorosulfates the formula of which is Al.sub.n OH.sub.m (SO.sub.4).sub.k Cl.sub.3n-m-2k have a relatively high basicity, which can reach 65%. These products, described in FR-A-2 584 699, nevertheless suffer from the major disadvantage of leading to the production of gypsum as a by-product during their manufacture, the discharge of which presents environmental problems.
JP-52 113,384 describes and claims a process for producing high basicity polyaluminumchlorosulfates by adding, at a temperature less than 60.degree. C., an alkaline agent such as CaCO.sub.3, NaHCO.sub.3, Na.sub.2 CO.sub.3, Mg(OH).sub.2 or MgO to a solution of a polyaluminum compound previously obtained by reacting a low basicity polyaluminumchlorosulfate with CaCO.sub.3, leading to the production of gypsum which is separated out, the basicity of this intermediate polyaluminum compound being 50.
JP-53 001,699 describes and claims a process for producing high basicity polyaluminumchlorosulfate in which, in a first stage, a medium basicity polyaluminumchlorosulfate is reacted with an equimolar, based on the sulfate, amount of CaCO.sub.3, leading to the production of gypsum which is separated out, after which, in a second stage, the product from the preceding stage having a basicity comprised between 55 and 58, is reacted with a compound selected from the group comprising: CaCO.sub.3, NaHCO.sub.3, Na.sub.2 CO.sub.3, Mg(OH).sub.2 and MgO.
Nevertheless, the basicity of the polyaluminumchiorosulfates according to these two Japanese documents above is less than 70% and hence, in certain applications, is not sufficiently high. Moreover, these compounds have poor stability. One major disadvantage that these compounds suffer from is the production of gypsum the discharge of which presents an environmental problem, as mentioned previously.
FR-A-2 317,227 describes and claims a process for producing, at a temperature less than 50.degree. C., aluminum hydroxychlorides of general formula: EQU Al(OH).sub.a Cl.sub.b Y.sub.c/z1 M.sub.d/z2
in which:
Y is an anion of valency z1, typically SO.sub.4.sup.2- ; PA1 M is a cation of valency z2, such as ammonium, an alkaline or alkaline-earth metal; and PA1 1.2<a<1.7; PA1 0<c.ltoreq.0.6; PA1 0.2<d<1.7; and PA1 a+b+c=3+d. PA1 M is an alkaline-earth metal; PA1 N is an alkaline metal; PA1 a, b, c, d and e are numbers such that: PA1 2.05<a<2.25; 0.04<c<0.06; PA1 0.1<d<0.13; 0.4<e<0.8. PA1 M is an alkaline-earth metal; PA1 N is an alkaline metal; PA1 a, b, c, d and e are numbers such that: PA1 1<a'<1.95; 0<c'<0.15; PA1 a'+b'+2c'=3; PA1 1.1<a'<1.4; 0.04<c'<0.06; and PA1 0.1<M/Al<0.13 and 0.4<N/Al<0.8.
However, in this patent it is stated that even though the use of alkaline-earth metals is possible, the danger of precipitates appearing does exist, leading to poor stability.

Polyaluminumchlorosulfates and preparation and uses thereof


A method, system, and computer readable medium for translating a document is provided. A statistical machine translation engine is trained using a translation memory comprising an annotation. A translation rule associated with the annotation is defined. A source document in a source language is received. The source document comprises an instance of the annotation and a string. The string is translated using the statistical machine translation engine. The instance of the annotation is processed according to the translation rule. A target document in a target language is generated based on the translated string and the processed annotation.

1. Field of the Invention
The present invention relates generally to statistical machine translation of documents and more specifically to systems and methods for processing annotations associated with a translation memory.
2. Description of the Related Art
In the field of computer-generated translations, there are two approaches to translating a document from a source language into a target language. The first approach is statistical machine translation (SMT) which uses a set of statistical probabilities to match a word or phrase in one language to an equivalent word or phrase in another language. The set of probabilities is generated using a large quantity of documents that have been previously translated from the source language to the target language.
The second approach is translation memory (TM) which uses bilingual databases of parallel translations of sentence segments. A segment of a source document in a source language is matched to an entry in the TM. The corresponding entry, in the target language, is provided as a translation of the segment. However, TM techniques are limited to translating only the segments that have a corresponding entry in the TM database. For example, a sentence in French such as "Solaris—mise a jour (11-22 UC) serveur NET: 3 licence de utilization" can not be translated using a database with a similar entry such as:
Solaris - mise à jour (33-64 UC) Solaris - SPARC server serveur(33-64 CPU)SPARC: 1 licence de utilisationupgrade: 1 RTU licenseVoir page 122 pour le numéro deSee page 122 for theréférence de la mise à niveau de recommended warrantygarantie recommandée.upgrade part number.because the database does not include an entry that matches the sentence exactly. To adapt the TM to identify tags that indicate occurrences such as words or values, the TM includes abstract tags in the entries. For example, the database above may be rewritten as:
PRODUCTNAME - mise à jour PRODUCTNAME - (NUM-NUM PRODUCTNAMECOMPONENTNAME) serveurserver (NUM-NUM PRODUCTNAME: COMPONENTNAME)NUM licence de utilisationupgrade: NUM RTU licenceVoir page NUM pour le numéro deSee page NUM for the référence de la mise à niveau de recommended warrantygarantie recommandée.upgrade part number.where the tags (in capital letters) appear in place of the words indicating words such as the product name, the component name, and numerals. The rewritten database includes a match for the sentence above and can provide a perfect translation.
However, if the modified TM is used to train an SMT engine, the tags can interfere with the training process and result in less accurate translation probabilities when the system receives segments to be translated that have not been rewritten via the same process used to modify the TM. This may result in inaccurate translations.

Use of annotations in statistical machine translation


A system provides a zero interconnection height in a board-to-board interconnect while maintaining efficient space allocation for multiple axis connections by providing a floating connection in one plane thereby enabling a connection in another plane. A first circuit board having a first plurality of through-holes is aligned with a second circuit board having a second plurality of through-holes so that the first plurality of through-holes is matched with the second plurality of through-holes. An interconnection height of zero is provided between the first circuit board and the second circuit board. At least one pass-through socket, which includes pass-through socket through-holes, is aligned with the combination of the first circuit board and second circuit board. One or more pins disposed on a pin header are inserted through the pass-through socket, the first circuit board, and the second circuit board.

1. Field of the Invention
The present invention relates to an apparatus achieving a high density, zero-height board-to-board interconnect, and, more particularly to an apparatus suited for optical and electrical interconnections.
2. Description of the Related Art
Modern electronic equipment widely employ electrical connectors. Often, electrical connectors are utilized for coupling printed circuit boards together. One typical use of a connector is for connecting main circuit boards, or mother boards to other circuit boards, or "daughter boards."
Typically, mother board connectors include a "card edge" including housing with rows of conductive contacts within a slot for receiving a daughter board with contact pads. Mother board connectors typically include spring biased conductive contacts for maintaining electrical contact with the daughter board. Other types of contacts for mating mother boards to daughter boards include fork and blade contacts, and pin and receptacle contacts. Also known are flexible circuits for connecting points on a printed circuit board. Flexible circuits include conductive traces disposed on a flexible substrate with pressure mounted connectors for making contact between printed circuit boards.
When making connections between printed circuit boards, the considerations for determining the type of connector include the interconnection height, required signal density and the amount of mechanical float. Typically, connections between printed circuit boards occur in only a single axis due to the mating connectors' requirement to be displaced during interconnection. When additional axes of connection are required, connectors must be made to float, flex or rotate. For example, a printed circuit board with two axes requiring connections typically must have one or both connectors with the ability to float, flex or rotate into position. The mechanical difficulties in the typical two axis connector results in a limited number of signals. Attempts at employing flexible circuits have proved disadvantageous due to the decreased signal density and decreased reliability of flexible circuits. Further, flexible circuits typically bend in only one dimension.
The problems of connecting in multiple dimensions is compounded for circuit board interconnections of optics modules to mother boards. More particularly, optics modules require both electrical and optical interconnections to be mated, but with different displacements and different axes. Typically, optical connectors require large displacements during the mating of the connectors and in a different axis than the electrical connectors. As a result, the prior art teaches a board-to-board electrical connector with a discrete connection height for the electrical connection in tandem with optical connectors on loose fiber "pigtails" for optical connections. However the "pigtails" for optical connections present problems of signal density and reliability. In typical board-to-board interconnections, the electrical connectors present problems with distance between the circuit boards in space-limited applications.
What is needed is a connection mechanism that allows electrical and optical connections to be made on a single module with zero height between the module and the mother board. Additionally, what is needed is a connection mechanism that allows multiple axis connections.

High density, zero-height, free floating interconnect system


The present invention discloses a liquid crystal module having F-type frames and an assembly method thereof. An F-type frame assembly according to the present invention is assembled by a plurality of F-type frames. Each of the F-type frames has a cross-section of F shape, and has a first opening portion located in an upper half thereof and a second opening portion located in a lower half thereof. Besides, the first opening portions and the second opening portions of all of the F-type frames are correspondingly facing inward, so as to form a first receiving space and a second receiving space, respectively. In the present invention, by placing a liquid crystal panel in the first receiving space and placing a backlight module in the second receiving space, a liquid crystal module is assembled.

A liquid crystal display (LCD) is a kind of flat panel display (FPD) which displays images by the property of the liquid crystal material. In comparison with other display devices, the LCD has the advantages in lightweight, compactness, low driving voltage and low power consumption, and thus has already become the mainstream product in the whole consumer market. However, the liquid crystal material of the LCD cannot emit light by itself, and must depend upon an external light source. Thus, the LCD further has a backlight module to provide the needed light source.
Generally speaking, backlight modules have been developed based on size requirements into edge lighting type structures and bottom lighting type structures, which are categorized by locations of lamp tubes thereof. A light source of the edge lighting type structures is a single light source placed aside, and a light source of the bottom lighting type structures is placed right beneath. The lamp tubes of the backlight modules must be featured with high brightness and a long lifespan, etc., and include cold cathode fluorescent lamps (CCFL), hot cathode fluorescent lamps, light emitting diodes (LED) and electroluminescence (EL), etc. Nowadays, with the rise of environmental consciousness, because that using LEDs as backlight sources has an advantage of energy saving and environmental protection in comparison with the CCFL, it thus becomes a trend in backlight development to replace the CCFL by the LEDs. Besides, by using LEDs as a backlight source, an LCD or LCD TV is further developed toward a design direction of narrow frame.
Referring now to FIG. 1, a schematic cross-sectional side view of a traditional liquid crystal module is illustrated in FIG. 1. Specially explaining, for conveniently describing, the contents of this figure is shown with a simple and schematic method. A traditional liquid crystal module 90 comprises a back plate 91, a light guide plate and optical film assembly 92, a plastic housing 93, a liquid crystal panel 94 and a front frame 95. The back plate 91 is used for loading light sources (not shown) and the light guide plate and optical film assembly 92; the plastic housing 93 is disposed on an outer side of the back plate 91 downward from the top, and fix the light guide plate and optical film assembly 92 to form a backlight module; the liquid crystal panel 94 is loaded on the plastic housing 93; and the front frame 95 fixes the liquid crystal panel 94 on the backlight module. However, in the design and assembly process of the whole liquid crystal module 90, because the plastic housing 93 and the front frame 95 are needed for fixing the components, respectively, it will repeat a part of functions thereof and increase assembly steps. Besides, because the structure is more complex, it is disadvantageous for a development trend that LCD is designed toward narrow frame.
As a result, it is necessary to provide a liquid crystal module having F-type frames and an assembly method thereof to solve the problems existing in the conventional technologies.

Liquid crystal module having F-type frames and assembly method thereof

SHENZHEN CHINA STAR OPTOELECTRONICS TECHNOLOGY CO., LTD.


An approach is provided for associating applications, such as widgets, with content and actions. The approach specifies a hierarchy of content and/or actions to be presented and/or executed by a first widget based on state information of a second widget. This hierarchy is stored in an association framework for retrieval by active widgets.

Wireless (e.g., cellular) service providers and device manufacturers are continually challenged to deliver value and convenience to consumers by, for example, providing compelling network services, applications, and content, as well as user-friendly devices. An important differentiator in this industry is the user interface. In particular, light-weight applications also widely known as widgets have emerged as a convenient means for presenting information and accessing services. These widgets provide basic components of graphical user interfaces (GUIs) for users to interact with applications, and enable more robust and user-friendly controls for user devices.

Method and apparatus of associating application state information with content and actions


A zoom lens includes, in order from an object side to an image side, a first, a second, a third, a fourth and a fifth lens units respectively having positive, negative, positive, negative, and positive refractive powers. The first lens unit includes negative, positive, and positive lenses in order from the object side to the image side. The second lens unit includes negative, negative, and positive lenses in order from the object side to the image side. Each lens unit moves during zooming. The predetermined conditional expressions are satisfied.

1. Field of the Invention
The present invention relates to a zoom lens suitable, for example, such as a digital still camera, a video camera, a security camera, a broadcast camera and a silver-halide film camera.
2. Description of the Related Art
A wide angle of view, a high zoom ratio and a high optical performance in the entire zoom range zoom lens is demanded for an image-pickup lens for an image-pickup apparatus.
A five groups zoom lens comprising, in order from an object side to an image side, a first lens unit having a positive refractive power, a second lens unit having a negative refractive power, a third lens unit having a positive refractive power, a fourth lens unit having a negative refractive power, and a fifth lens unit having a positive refractive power is known (U.S. Pat. No. 8,169,711, U.S. Pat. No. 8,331,034).
If a zoom lens having five lens units of the above refractive power arrangements makes the focal length of the telephoto end longer so as further to achieve high zoom ratio, maintaining of high optical performance is difficult since aberration such as spherical aberration, astigmatism, and chromatic aberration in the zoom range of the telephoto end increases. Additionally, if refractive power of each lens unit is stronger so as to make the entire system smaller, correction of aberration such as axial chromatic aberration, chromatic aberration of magnification and comatic aberration at the telephoto end is difficult since a lot of the above aberration generate.


A coating composition for concrete that is an effective water barrier and that is relatively easily removed comprises an acrylic copolymer or a styrene copolymer latex and a polysaccharide. The polysaccharide makes the coating composition susceptible to enzyme action and thus easily removable by flooding the surface of the coated concrete with a dilute solution of enzyme reactive with the polysaccharide.

A temporary curing compound is customarily coated onto fresh concrete to prevent the evaporation of water, forcing the cement to hydrate and set, and to prevent the intrusion of water, salts or other contaminants into the concrete. The concrete coating industry requires that these curing compounds meet the requirements of ASTM C 309 (American Standard Test Methods) for water retention properties. Historically, curing compounds have been organic solutions of chlorinated rubbers, styrene copolymers, acrylic copolymers, hydrocarbon emulsions, oils and the like. Recently, fine particle size styrene copolymer and acrylic copolymer dispersions have been developed that address the performance requirements of cure and seal compounds and that comply with volatile organic emission restrictions. These compounds form tough films and are effective water vapor barriers and sealants. For some final uses these films must be removed after the concrete cures, and generally the removal requires time-consuming and strenuous mechanical abrasion, such as sand-blasting. This has created a need for an aqueous coating composition for concrete that has good water barrier and sealant properties, that complies with standards for restricting volatile organic compound emissions, and that is removable without the expenditure of the time and labor now required.

Dissipative curing and coating composition for concrete

National Starch and Chemical Investment Holding Corp.


A call control method is provided. The call control method includes broadcasting a message with a base station, wherein the message includes a plurality of check values respectively corresponding to different types of applications; receiving the message with a terminal device; selecting, with the terminal device, the check value corresponding to a specific application initiated with the terminal device; performing, with the terminal device, a persistence test to initiate a call to the base station for the specific application according to the selected check value; and requesting a MAC layer of the terminal device to initiate an access procedure of the call when the persistence test is passed.

Wireless communication system has been applied into various devices such as telephone, video, modem, or broadcast device. The multiple access technique can be applied in the wireless communication system to allow several earth stations to transmit in the same time span. This provides the way to network these stations together, either in a Star or a Mesh network. Common multiple access techniques include Frequency Division Multiple Access (FDMA), Time Division Multiple Access (TDMA), Code Division Multiple Access (CDMA) . . . etc.
These multiple access techniques have been applied in different communication standards and provided a common protocol such that different wireless devices can communicate in a city, in a country, in a region, or even in the whole earth. An example of utilizing the different communication standards is exHRPD, i.e. enhanced xHRPD. exHRPD is proposed by the organization for standardization 3GPP2 according to HRPD of the CDMA2000 evolution version. In existing HRPD spec, a persistence test scheme is used for the MAC layer to control the transmission over access channel. This control scheme has no knowledge of the types of application.

Call control method based on application priority


An apparatus for forming a winding for a stator of a dynamoelectric machine comprises a form (3) and a rotating unit (11) for winding a wire (W) around the form (3). The form (3) comprises two form sections (4) which are movable toward and away from each other along a direction orthogonal to the form axis (5). The apparatus further comprises motorized means (37b, 34, 32) for controlling the relative movement of said form sections (4), which can be activated even while the winding unit (11) is being rotated.

The present invention is directed to an apparatus for forming a winding for a stator of a dynamoelectric machine, of the type comprising:
a supporting structure, PA1 a form carried by the supporting structure, on which a wire is to be wound for forming a winding, and PA1 a rotatable unit, rotatably supported by the supporting structure around a central axis of the form, for winding the wire around said form in order to form the winding, PA1 wherein said form comprises two form sections movable toward and away from each other in a direction orthogonal to the form axis.
In the apparatus of the above indicated type which have been made heretofore, the relative displacement between the two form sections along a direction orthogonal to the form axis is driven manually or with the aid of a motorized auxiliary unit, when the apparatus is inoperative, by actuating adjustable screws provided on the form in order to adjust the size of the form and hence the windings obtained thereby. This operation is relatively troublesome and further implies a loss of productivity of the apparatus, due to the increase in the apparatus down-time.

Apparatus and method for forming a winding for a stator of a dynamoelectric machine


Disclosed are a semiconductor memory device with a mode register that prevents the semiconductor device from undesirably entering into a deep power down mode during the beginning of a power up and a method for controlling a deep power down mode therein. An internal power supply voltage generator generates an internal power supply voltage of the semiconductor memory device. A clock buffer buffers external clock and clock enable signals to generate internal clock and clock enable signals. A command decoder generates an intermediate deep power down mode entry signal or a mode register setting signal. A mode register setting latch circuit latches the mode register setting signal from the command decoder. A deep power down mode controller generates a final deep power down mode entry signal. A semiconductor memory device is accordingly prevented from undesirably entering into a deep power down mode during beginning of a power up.

1. Field of the Invention
The present invention relates to a semiconductor memory device, and more particularly to a semiconductor memory device with a mode register and a method for controlling both an entry into and a release from a deep power down (referred to as a xe2x80x9cDPDxe2x80x9d hereinafter) in the semiconductor memory device.
2. Description of the Prior Art
As generally known in the art, with the increase in the use of portable devices such as personal digital assistants or notebook computers, demand has risen for low power memory. A dynamic random access memory (referred to as a xe2x80x9cDRAMxe2x80x9d hereinafter) tends to use an external power supply of 2.5 V instead of a conventional external power supply of 3.3 V, and has a data input/output signal of 1.8 V instead of a conventional data input/output signal of 3.3 V, in order to embody the low power memory. Low power DRAMs having a self refresh cycle adjustment function and a partial self refresh function have been developed. The self refresh cycle adjustment function is a function which adjusts a self refresh cycle using the characteristic of the semiconductor memory device that a data duration time of a data cell varies according to a change in its temperature. The partial self refresh function is a function which does not refresh a total cell array but partially refreshes only necessary parts of the cell array.
A conventional DRAM typically includes an active mode and a standby mode as normal operation modes. The standby mode lowers a current driving performance of an internal power supply voltage generator as a low power mode. However, in order to further decrease power consumption, DRAMs operating in the DPD mode have been developed. The power consumption in the DPD operation mode is less than that in the standby operation mode. In such DRAMs, the current driving performance of the internal power supply voltage generator is not simply lowered, the internal power supply voltage generator does not operate at all, and only a clock buffer for receiving a clock signal operates, thereby minimizing power consumption of the DRAMs.
A conventional DRAM enters the DPD mode in synchronization with a clock signal CLK based on a predetermined combination of various different command signals, for example, when a clock enable signal CKE is at a low level, a row address strobe signal RASB and a column address strobe signal CASB are at high levels, and a write enable signal WEB and a chip select signal CSB are at low levels. When the clock enable signal CKE goes to a high level, the conventional DRAM is released from the DPD mode. After the release from the DPD mode, a normal operation is performed through a power sequence for a predetermined time, for example, 200 xcexcs. At the beginning of a power up, the clock enable signal CKE, the row address strobe signal RASB, the column address strobe signal CASB, the write enable signal WEB, and the chip select signal CSB are supplied from outside together with a power supply signal. Since circumstances of the CKE, RASB, CASB, WEB, and CSB signals are different from one another, ramp_up slopes thereof become different from one another. At any time during the beginning of power up, a case in which the levels of these signals satisfy the conditions for an entry into the DPD mode as described above can occur. In that case, an undesirable entry into the DPD mode may happen. Internal power supply is turned off, so that the semiconductor memory device does not perform a normal operation.
Accordingly, the present invention has been made to solve the above-mentioned problems occurring in the prior art, and an object of the present invention is to provide a semiconductor memory device with a mode register that prevents the semiconductor memory device from undesirably entering into an DPD mode during the beginning of a power up.
Another object of the present invention is to provide a method for controlling a DPD mode in a semiconductor memory device with a mode register that stably performs an entry into and a release from a DPD mode in the semiconductor memory device.
In accordance with an aspect of the present invention, there is provided a semiconductor memory device with a mode register, the semiconductor memory device comprising: an internal power supply voltage generator for generating an internal power supply voltage of the semiconductor memory device based on an external power supply voltage when the external power supply voltage is applied to the internal power supply voltage generator; a clock buffer for receiving and buffering external clock and clock enable signals in order to generate internal clock and clock enable signals; a command decoder for receiving the internal clock and clock enable signals from the clock buffer, for receiving an external command signal, and for generating either an intermediate deep power down mode entry signal instructing the semiconductor memory device to enter into a deep power down mode or a mode register setting signal commanding a setting of the mode register according to a predetermined combination of the internally received clock and clock enable signals with the received external command signals; a mode register setting latch circuit for latching the mode register setting signal from the command decoder when the mode register setting signal is received after a stabilization of the external power supply voltage; and a deep power down mode controller for receiving the intermediate deep power down mode entry signal from the command decoder, for generating a final deep power down mode entry signal when the deep power down mode controller receives the mode register setting signal from the command decoder, and for outputting the finally generated deep power down mode entry signal to the internal power supply generator.
Preferably, the clock buffer circuit operates by an external power supply voltage, and generates the deep power down mode release signal instructing the semiconductor memory device to be released from a deep power down mode using the external received clock enable signal, and for providing the generated deep power down mode release signal to the deep power down mode controller. The internal power supply voltage generator generates an external power supply voltage detecting signal having a first level when the external power supply voltage is stabilized, and outputs the generated external power supply detecting signal to the mode register setting latch circuit. The mode register setting latch circuit latches the mode register setting signal from the command decoder when the external power supply detecting signal reaches the first level.
The mode register setting latch circuit includes a first inverter for receiving and inverting the external power supply detecting signal; a first NAND gate for receiving an output signal of the first inverter as a first input signal; a second inverter for receiving and inverting the mode register setting signal; a second NAND gate for NANDing an output signal of the second inverter and an output signal of the first NAND gate to generate an output signal to be become a second input signal of the first NAND gate; and a third inverter for receiving and inverting an output signal of the first NAND gate and outputting the inverted signal as an output signal of the mode register setting latch circuit.
The deep power down mode controller includes a third NAND gate for NANDing the intermediate deep power down mode entry signal from the command decoder and an output signal of the mode register setting latch circuit; and a fourth inverter for receiving and inverting an output signal of the third NAND gate. The deep power down mode controller includes a fifth inverter for receiving and inverting an output signal of the fourth inverter; an NMOS transistor including a gate for receiving an output signal of the fifth inverter and a source being grounded; a latch section including first and second input terminals which are connected to a drain of the NMOS transistor and an output terminal of the fourth inverter, respectively; and a NOR gate for receiving the deep power down mode release signal and an output signal of the latch section as two inputs.
In accordance with another aspect of the present invention, there is provided a semiconductor memory device with a mode register, the semiconductor memory device comprising: a deep power down decoder for receiving external clock, clock enable, and command signals and for generating an intermediate deep power down mode entry signal instructing the semiconductor memory device to enter into a deep power down mode in response to a predetermined combination of the received external clock, clock enable, and command signals; a mode register setting decoder for receiving the external clock and command signals, and for generating a mode register setting signal instructing a setting of the mode register in response to a predetermined combination of the received external clock and command signals; a mode register setting latch circuit for latching the mode register setting signal from the mode register when the mode register setting signal is received after a stabilization of an external power supply; and a deep power down mode controller for receiving the intermediate deep power down mode entry signal from the deep power down decoder, and for generating a final deep power down mode entry signal when the mode register setting signal is received from the command decoder.
In accordance with a further aspect of the present invention, there is provided a method for controlling a deep power down mode in a semiconductor memory device with a mode register, the method comprising the steps of: (i) receiving external clock, clock enable, and command signals, and generating an intermediate deep power down mode entry signal instructing the semiconductor memory device to enter into a deep power down mode or a mode register setting signal commanding a setting of the mode register according to a predetermined combination of the received internal clock and clock enable with the external command signals; (ii) latching the mode register setting signal when the mode register setting signal is received after a stabilization of the external power supply voltage; and (iii) generating a final generated deep power down mode entry signal when the intermediate deep power down entry and mode register setting signals are received.

Semiconductor memory device with mode register and method for controlling deep power down mode therein


A fastener for mounting objects to a wall or to a floor. The fastener includes an anchor member having an elongate body with a shank portion having a spacer formed integrally with one end, a central longitudinal hole extending through the elongate body, and an internally thread section in the longitudinal hole near a second end of the shank. The shank further includes a deformable expansion region between the first end and the second end of the shank. The fastener further includes a mandrel configured to be received within the longitudinal hole of the elongate body.

The present invention relates to thin wall fasteners usable for a variety of purposes. More specifically, the present invention relates to a plug type thin wall fastener assembly utilizing a mandrel and an anchor member. The present invention is particularly suited for seismic restraint purposes and for fastening system applications used in steel stud construction.
Mounting an object to a thin wall or floor surface with a hollow space behind the wall or floor (hereafter referred to together as xe2x80x9cwallxe2x80x9d) is challenging. This is because one can not manually access the space behind the wall, and because the wall itself may not provide sufficient structure to resist the moment of a typical bolt or screw inserted therein once a load is applied to the bolt or screw.
Some prior art fasteners have attempted to overcome part of this problem by providing a means for expanding a portion of the fastener on the opposite side of the wall to prevent the fastener from pulling out of the hole in the wall into which the fastener has been inserted. Generally the wall is squeezed between a front portion of the fastener and the expanded portion of the fastener. Examples include nut and bolt arrangements, bolt and nut/washer combinations, toggle bolts, and deformable plug fasteners.
A toggle bolt is a bolt having a spring loaded expandable structure coupled to one end. The expandable structure can be collapsed so that the toggle bolt passes though a hole drilled into a wall. Once the expandable structure has passed through the hole in the wall, the expandable structure springs open. One disadvantage to such fasteners is that removing the bolt allows the expandable portion to fall to the bottom of the hollow space behind the wall. Furthermore, the expandable portion may not provide sufficient resistance to turning of the entire assembly as the bolt is tightened.
A deformable plug assembly is another type of thin wall fastener. Generally such devices comprise a plug formed as an elongate body having a central longitudinal hole, a top end, a deformable middle section and a threaded portion at the end opposite the top end. When the deformable plug assembly is placed in a hole in the wall, the screw is turned and the threaded portion moves toward the top end. The deformable portion expands to a configuration that is larger than the hole to provide clamping pressure on the back side of the wall. Such devices may include features to enhance rotational resistance to prevent the deformable plug from rotating along with the bolt. However, large fasteners, and fasteners for use with very heavy objects, may require large torquing forces to be applied to set the fasteners, and the large torquing forces required may overcome the rotational resistance features of the prior art, and in addition may crack brittle wall materials.
In a typical steel stud building, the steel studs will have some wall material placed over the steel studs to form the surface of the wall. A typical floor type used in multistory office buildings consists of concrete laid over sheets of corrugated steel. Prior art fasteners used on such concrete floors may crack the concrete when tightened. Also, the concrete may crack during seismic activity.
A typical wall material includes dry wall comprising a gypsum material sandwiched between two layers of paper. Prior art fasteners will squeeze the wall material when set, which can crack or crush the wall material, resulting in poorly set fasteners. Furthermore, seismic activity also tends to crack brittle materials such as dry wall and concrete.
What is needed is a thin wall fastener, a thin wall fastener assembly, and a method of using such thin wall fasteners that overcomes disadvantages of the prior art, that can withstand severe torquing, and that allows a bolt to be removed and replaced for affixing objects to the wall.
One embodiment of the invention is a thin wall fastener or anchoring apparatus for mounting objects to a thin wall or floor surface (hereafter xe2x80x9cwallxe2x80x9d). The anchoring apparatus is comprised of a spacer member having means for rotation encompassing an aperture, integral with an open ended cylindrically shaped shank member, integral with an open ended cylindrically shaped clinching member having means for expanding upon being compressed, integral with an open ended cylindrically shaped threaded member having internal threads. The members of the anchoring apparatus share a common central axis.
In other embodiments, the anchoring apparatus further comprises a mandrel having a head at one end with means suitable for rotation, and a cylindrical shaft extending from the head, the cylindrical shaft having an externally threaded distal end for engaging the internal threads of the anchoring apparatus. Together, the anchoring apparatus and mandrel combine to form a thin wall fastener assembly.
Additionally, the thin wall fastener assembly may further include a spanner wrench having means for preventing rotation of the anchoring apparatus, while also enabling rotation of the mandrel.


A calculable 3D color printing method is used for generating, on a 3D object surface, a user-specified color texture pattern, including: performing modeling and simulated calculation with respect to a motion and a deformation of a PVA film in a traditional water transfer printing process to obtain a mapping function between each of pixels on the PVA film and points on an object surface; and calculating, by using the mapping function, a texture pattern to print on the PVA film. This disclosure further includes a set of mechanical devices and a 3D vision system for realizing precise and controllable water transfer printing which precisely prints a user-specified texture pattern onto an object surface. This disclosure further includes a multiple water transfer printing method, including: partitioning a complex object surface into a plurality of regions, and separately coloring each region, until eventually completing coloring of the entire object surface.

Research background related to this disclosure is outlined in the following:
1. 3D Printing and Appearance Fabrication
Among numerous 3D printing technologies, many methods are included for fabricating models having desired physical attributes, such as for obtaining desired stress distribution (Stava, O., Vanek, J., Benes, B., Carr, N., Mech, R. 2012. Stress relief: Improving structural strength of 3d printable objects. ACM Trans. Graph. 31, 4, 48.), articulated models (Bacher, M., Bickel, B., James, D. L., Pfister, H. 2012. Fabricating articulated characters from skinned meshes. ACM Trans. Graph. 31, 4, 47; Cali, J., Calian, D. A., Amati, C., Kleinberger, R., Steed, A., Kautz, J., Weyrich, T. 2012. 3d-printing of non-assembly, articulated models. ACM Trans. Graph. 31, 6, 130.), model balance (Prevost, R., Whiting, E., Lefebver, S., Sorkine-Hornung, O. 2013. Make it stand: balancing shapes for 3d fabrication. ACM Trans. Graph. 32, 4, 81.), movable models (Coros, S., Thomaszewski, B., Noris, G., Sueda, S., Forberg, M., Sumner, R. W., Matusik, W., Bickel, B. 2013. Computational design of mechanical characters. ACM Trans. Graph. 793 32; Ceylan, D., Li, W., Mitra, N. J., Agrawala, M., Pauly, M. 2013. Designing and fabricating mechanical automata from mocap sequences. ACM Trans. Graph. 32, 6, 186; Thomaszewski, B., Coros, S., Gauge, D., Megaro, V., Grinspun, E., Gross, M. 2014. Computational design of linkage based characters. ACM Trans. Graph. 33, 4 (July), 64:1-64:9.), and deformable objects, etc. (Bickel, B., Bacher, M., Otaduy, M. A., Matusik, W., Pfister, H., Gross, M. 2009. Capture and modeling of non-linear heterogeneous soft tissue. ACM Trans. Graph. 28, 3 (July); Skouras, M., Thomaszewski, B., Coros, S., Bickel, B., Gross, M. 2013. Computational design of actuated deformable characters. ACM Trans. Graph. 32, 4, 82.). Yet, none of these methods considers surface color of the object.
There are other methods for creating desired appearance attributes, such as surface reflectance (Weyrich, T., Perrs, P., Matusik, W., Rusinkiewicz, S. 2009. Fabricating microgeometry for custom surface reflectance. ACM Trans. Graph. 28, 3, 32; Matusik, W., Ajdin, B., Gu, J., Lawrence, J., Lensch, H. P. A., Pellacini, F., Rusinkiewicz, S. 2009. Printing spatially varying reflectance. ACM Trans. Graph. 28, 5, 128; Lan, Y., Dong, Y., Pellacini, F., Tong, X. 2013. Bi-scale appearance fabrication. ACM Trans. Graph. 32, 4, 145.), subsurface scattering (Dong, Y., Wang, J., Pellacini, F., Tong, X., Guo, B. 2010. Fabricating spatially-varying subsurface scattering. ACM Trans. Graph. 29, 3, 62; Hasan, M., Fuchs, M., Matusik, W., Pfister, H., Rusinkiewicz, S. 2010. Physical reproduction of materials with specified subsurface scattering. ACM Trans. Graph. 29, 3.), and for realizing desired reflectance functions (Malzbender, T., Samadani, R., Scher, S., Crume, A., Dunn, D., Davis, J. 2012. Printing reflectance functions. ACM Trans. Graph. 31, 3, 20.). These methods produces desired appearance by modifying microscopic geometric details of the materials, and are limited to certain types of materials. Instead, the method of this disclosure is intended for accurately coloring 3D object surface according to user-specified texture without modifying the object itself, and is applicable for a wider range of material types.
2. 3D Object Surface Coloring Technologies
Existing technologies for coloring 3D object surface have their own merits and limitations. 3D color printers offer high quality coloring for curved surface, but supporting only limited selection of colors and materials, and incurring very high costs. Vinyl decals can print patterns of arbitrary colors onto object surfaces, but are only applicable to simple geometries. Electrical plating and enameling require sophisticated devices, and are only applicable to limited types of materials, such as metal and ceramics, incurring relatively high costs. Water transfer printing supports both complex textures and various material types, including metal, plastic, and woods, and has been extensively used to decorate furniture, electronic products, and automotive accessories. Yet, there is no method to-date for simulating the water transfer printing process. Thus, the traditional water transfer printing does not support accurately controllable printing process. These limitations have confined existing water transfer printing process to reproducing repeated patterns that do not require very accurate positioning.
3. Viscous Sheet Simulation
The presently disclosed calculable water transfer printing technology performs the simulated calculation by approximating a PVA film with a thin viscous sheet. The thin viscous sheet dynamics model is built on the foundation of continuum mechanics (Ribe, N. 2002. A general theory for the dynamics of thin viscous sheets. Journal of Fluid Mechanics 457, 255-283; Batty, C., Uribe, A., Audoly, B., Grinspun, E. 2012. Discrete viscous sheets. ACM Trans. Graph. 31, 4 (July).). Other than the thin viscous sheet kinematic model, the simulated calculation of this disclosure further involves Stokes flow (White, F. M., Corfield, I. 1991. Viscous fluid flow, vol. 3. McGraw-Hill New York.) as an approximation of the Navier-Stokes equation in the regime of low Reynolds numbers. In this disclosure, these models have been simplified to a two-dimension process in order to offer fast and accurate simulation for the dynamics of the thin sheet.
4. Texture Mapping
Texture mapping is widely used in coloring 3D models in the virtual regime. Numerous algorithms may be leveraged to calculate a mapping relationship between a 3D model surface and a planar pattern with minimum angle and/or area distortion (Sander, P. V., Snyder, J., Gortler, S. J., Hoppe, H. 2001. Texture mapping progressive meshes. In Proceedings of SIGGRAPH'01, ACM, New York, N.Y., USA, 409-416; Levy, B., Petitjean, S., Ray, N., Maillot, J. 2002. Least squares conformal maps for automatic texture atlas generation. ACM Trans. Graph. 21, 3, 362-371; Desbrun, M., Meyer, M., Alliez, P. 2002. Intrinsic parameterizations of surface meshes. Comput. Graph. Forum 21.) while satisfying user-specified feature corresponding relationship (Kraevoy, V., Sheffer, A., Gotsman, C. 2003. Matchmaker: constructing constrained texture maps. ACM Trans. Graph. 22, 3, 326-3338; Zhou, K., Wang, X., Tong, Y., Desbrun, M., Guo, B., Shum, H.-Y. 2005. Texturemontage: Seamless texturing of arbitrary surfaces from multiple images. ACM Trans. Graph. 24, 3.). Unlike the texture mapping which colors virtual models, the presently disclosed method colors real-world 3D objects.

Calculable three-dimensional color printing method


An X display may be dynamically rerouted to a different graphics terminal, or to several graphics terminals, without disrupting X clients. The corresponding X server architecture includes a static, protocol router part which acts as an endpoint for client connections and which routes X protocol to one or more X server displays, and a dynamic X display part which maintains the state and contents of the display. An X display may maintain its state and display contents entirely in memory without any need for physical display or input devices, in which case it is termed a “headless X display” and provides a virtual X server display that appears to the host as if it were a user-interactive display. The architecture allows for any number of X displays to be attached to the protocol router for multi-user, fault tolerant or suspend/resume functionality.

X Windows applications were developed for UNIX software platforms decades ago but continue to be in wide use today for many important applications including industrial graphics design. Companies have a lot invested in X applications and wish to continue to use and support them despite changes in network topography, workstation hardware and server architectures. Software companies such as Attachmate provide so-called X servers such as Reflection X® that continue to support this important X server legacy functionality.
In more detail, the X Window System (commonly X11 or X) is a networking and display protocol which provides windowing on bitmap displays. X originated at MIT in 1984. The current protocol version, X11, appeared in September 1987. The X.Org Foundation leads the X project, with the current reference implementation, version 11 release 7.2 (Feb. 15, 2007), available as free software under the MIT License and similar permissive licenses, incorporated herein by reference. X provides the standard toolkit and protocol to build graphical user interfaces (GUIs) on Unix-like operating systems and OpenVMS, and is supported by almost ALL other modern operating systems. X also provides the basic framework, or primitives, for building GUI environments: drawing and moving windows on the screen and interacting with a mouse and/or keyboard. X does not mandate the user interface—instead, individual client programs handle this. X features network transparency: the machine where an application program (the client application) runs can differ from the user's local machine (the display server). See also Wikipedia article on "X Window System" on the Internet.
The traditional X server is a monolithic application, written in C and developed over a period of two decades. It implements a network-based graphical windowing environment for applications known as "X clients." An X server accepts incoming connections from X clients, processes X protocol produced by these clients, and displays output in accordance with this protocol. The display may consist of one or more screens, but all screens are generally connected to one machine. There is only one display per instance of the X server. This X server instance is referred to as an "X session." In modern times, such display functionality is typically provided on a user's LINUX, WINDOWS, UNIX or other platform through an emulation process that provides suitable mapping/translation between X protocol and physical personal computer displays and input devices.
The traditional X server's design imposes several limitations. For example, any hardware or network failure in the X server generally causes clients to disconnect and crash. A second limitation is that session sharing is not possible without additional software, commonly referred to as a server proxy or a "middle tier" component. Such a "middle tier" component can be used to intercept X client protocol and duplicate to all X servers or displays in the shared session.
Using one exemplary prior art approach, a middle-tier "headless" X display is maintained on a server machine at all times, and a viewer application is developed to display the contents of that X display on a remote machine. Oftentimes, different viewers have needed to be developed for different remote machines.
Another past approach to session sharing has been to capture all X protocol for the entire session; then create a new X server, and replay the captured protocol into the new X server, thereby bringing the new X server to a state identical to that of an existing X server. However, this replaying process takes time. As more and more client protocol is generated and stored, the burden of replaying that protocol becomes larger and larger.
While much work has been done in the past, further improvements are possible and desirable.
The exemplary illustrative non-limiting implementation permits the display to be dynamically rerouted to a different graphics terminal, or to several graphics terminals, without disrupting X clients. In more detail, the exemplary illustrative non-limiting implementation breaks the previously-monolithic X server into two parts:                a static part which acts as an endpoint for client connections and which routes X protocol to one or more X server displays (the "protocol router"); and        a dynamic part which maintains the state and contents of the display (the "X display").An X display may maintain its state and display contents entirely in memory without any need for physical display or input devices, in which case it is termed a "headless X display" and provides a virtual X server display that appears to the host as if it were a user-interactive display when in fact it comprises an entirely automated computer process that does not require user input or interaction in order to keep a session active or "alive." The architecture allows for any number of X displays to be attached to the protocol router.
The exemplary illustrative non-limiting implementation creates a new X display to be attached by serializing or "cloning" an existing X display to create the new one. This serialization technique involves taking a snapshot of the entire memory footprint of the X display, sending that snapshot to another machine and recreating a completely new X display which has state and contents identical to the original X display. Such platform-independent migration has many advantages in terms of fault tolerance, mobility, etc.
Exemplary illustrative non-limiting features and advantages of the exemplary illustrative non-limiting implementations disclosed herein include:                Does not require a middle tier or permanent headless X server.        Any X server can be used as a source for cloning a new X server.        Avoids doubling the computing burden necessary with a middle tier (where graphics are drawn to the headless X server, as well as on all viewers.)        Alleviates the need for development of a separate viewer application and concomitant protocol.        Instantaneous, as compared to the approach of replaying X protocol.        Permits a user to insure their session against local machine or connection failure at any time, by creating a headless X display from the user's X display and parking it on a "safe" machine (inside the company's firewall, for example).        All the advantages of a middle tier solution without requiring the middle tier; and none of the disadvantages of a protocol-replaying solution because the current state of an X server can be captured and reproduced at will.        Imposes no additional burden when running in the canonical "one protocol router, one X display" mode. Both pieces may run inside the same process, and effectively reproduce the original configuration of a single X server.        "Headless" X display created only when a session is suspended.        X server written in a language such as Java that supports object serialization (i.e., an object oriented language) provides platform-independence.
There are at least three contexts in which the exemplary illustrative non-limiting implementation would be useful:
1) To suspend a session (e.g. at work) and resume it elsewhere (e.g. at home)
2) To share a session with other users (e.g., a classroom lecture; or, a user who temporarily needs help from the help desk)
3) To provide a backup against failure of the network (e.g. while working remotely over a poor quality line) or failure of the user's local machine.

Methods, apparatus and techniques for suspending, resuming, and sharing sessions using object serialization


A film sheet having a series of strips extending from an edge may have the film strips gathered and folded into a stacked array wherein the strips are in parallel abutment. The collected ends of the stacked strips are then suitable for receiving light for transmission into (and emission from) the body of the film sheet. A pair of frame members, when urged toward each other about the strips, may automatically collect and fold the strips into a parallel spaced array. This array may then be gathered by hand, or by a cover member translating adjacent the frame members, to generate the stacked array of parallel abutting strips. The resulting illumination device is particularly useful for illumination of display panels such as liquid crystal displays, organic light-emitting diode displays, or simply signs formed of paper, plastic, and/or other materials.

As discussed in International (PCT) Publication No. WO 2009/048863, a light guide made of a flexible transparent film sheet can be formed wherein an edge of the sheet is cut or otherwise formed into parallel strips, with the strips then being folded/bent into a stacked array (generally shaped like an elongated beam) through which light can be directed to or from the major area of the sheet (i.e., the portion from which the strips extend). Similar arrangements are seen in U.S. Pat. No. 4,151,582 to Grunberger and U.S. Pat. No. 4,824,194 to Karasawa. So long as the bends of the strips are not too great (which can disrupt the internal reflection that promotes light transmission within the strips), and/or so long as the bent regions are coated to deter light loss at the bends, illumination of the end of the beam-like stack of strips (as with one or more LEDs) transmits light through the strips and into the major area of the sheet. The major area of the sheet can be treated to emit the light from all or a portion of the major area. Such an arrangement is useful for applications such as general illumination, illuminated signage, and backlighting and/or frontlighting of Liquid Crystal Displays (LCDs) or other displays. Conversely, light may be collected in the major area of the sheet and transmitted therein to the beam-like stack for reception by a photovoltaic or other device, which can be useful for applications such as light sensors and solar collectors. Thus, a point or concentrated light source (at the stacked strips) can be used to illuminate a large area (the major area of the sheet), or conversely light incident over a large area (at the major area of the sheet) can be concentrated into a small area (at the stacked strips). Such film light guides have significant advantages over light guides formed of rigid transparent plates or the like owing to their lower cost, size, and weight, and their increased flexibility.
Despite the foregoing advantages, illuminators of the foregoing types are rarely used, largely owing to difficulties with their manufacture. Accurate formation of the strips in the film sheet is accomplished easily enough, as by running an array of blades along a film sheet to an edge. However, it is then difficult and time consuming to properly bend and align the strips into a stacked array suitable for receiving light from a light source. If the bending is done by hand, it is time- and labor-intensive, and if done by machine, it is capital-intensive insofar as it is expensive and difficult to build folding machines which precisely bend the fingers without damage (particularly if the machine is to accommodate sheets of different sizes with different strip configurations). It would therefore be useful to have more efficient and economical devices and methods for constructing film illumination devices such as those described in the foregoing patents.