An impeller for a high-temperature gas blower suitable for a floating conveyor furnace, having vanes each formed of a dispersion-strengthened alloy which includes as a disperse or internal phase 0.1-2.0% by weight of finely divided particles of an oxide of a high melting-point metal, such as Y.sub.2 O.sub.3, Ce.sub.2 O.sub.3, ZrO.sub.2, Al.sub.2 O.sub.3 and Cd.sub.2 O.sub.3, preferably dispersed in an austenite matrix or external phase of Cr, Fe, Al, Ti and Ni. A gas blower having such impeller, and a furnace using such gas blower are also disclosed.

1. Field of the Invention
The present invention relates in general to a high-temperature gas blower impeller, a gas blower device equipped with such impeller, and a high-temperature gas circulating furnace equipped with such gas blower device, and more particularly to a technique relating to improvements in the material of vanes or blades of the impeller.
2. Discussion of the Related Art
An blower or fan is used to blow a gas of a relatively high temperature in various industrial furnaces such as heat treating and heating furnaces. Such a high-temperature blower is utilized, for example, to stir or circulate a high-temperature atmosphere or gas of around 800.degree. C. within a furnace. Since the blower is used in such severe thermal environment, a rotating impeller of the blower is usually made of a heat-resistant steel capable of withstanding a reaction force and a centrifugal force which are produced during an operation of the blower to circulate the atmosphere.
However, the upper limit of the operating temperature of the impeller made of a heat-resistant steel is about 850.degree. C., above which the impeller does not have a sufficient strength. Also, the strength of the impeller limits the operating speed of the impeller to 1000 r.p.m. or so. To obtain a desired capacity or gas quantity, therefore, the gas blower device must be relatively large-sized. Whereas, it is desired to minimize the size of the gas blower device, particularly where the device is built in a furnace, such as a gas circulating furnace adapted to circulate a high-temperature gas within a heating chamber. In this case, an increase in the size of the blower device will undesirably lead to an accordingly large size of the furnace body.

High-temperature gas blower impeller with vanes made of dispersion-strengthened alloy, gas blower using such impeller, and gas circulating furnace equipped with such gas blower


A computerized system provides a salesperson with assistance related to training and sales of parts corresponding to particular products. More particularly, a computerized system incorporating a data storage device, a display apparatus, a part selection device and a user interface mechanism enhances the efforts of a parts salesman. The data storage device electronically stores graphic and textual partsrelated information including specifications, features and customer benefits. The display apparatus electronically displays portions of the graphic and textual information in order to provide training and sales assistance related to part features and customer benefits. The part selection device electronically selects a particular part by navigating through part choices menus based on stored part specifications. The user interface mechanism controls the operation of the display apparatus and the part selection device parts so that each of the respective parts are operatively coupled and related to one another.

Traditionally, a parts salesperson must carry with him or her all of the sales tools related to the particular kinds of parts that they wish to sell. These tools include parts catalogs, sample parts, and parts order forms. To carry the combination of all of these sales tools can be very cumbersome for a salesperson. For a salesperson to bring all of these sales tools into a customer visit could be quite difficult. In particular, if a parts salesperson must bring in parts catalogs for several types of parts as well as several different manufacturers of parts, and in addition the corresponding samples of each type of part by each of the manufacturers, the salesperson may find this overwhelming and choose to limit the number of parts that they sell or the particular manufacturers that they sell for.
Further, looking up a part number in a catalog can take significant amounts of time. In addition, trying to match a particular part with a particular need can be very difficult. For instance, trying to find a particular filter which will fit on a particular product may be impossible to accomplish in a limited amount of time. It can be even more difficult to determine all parts that a user with many types and brands of equipment may require. Further, the generation of a corresponding proposal or order, particularly a personalized one, has been difficult. An additional long felt need has been the need to educate sales people with respect to a particular product line of a manufacturer as well as the features and benefits of those particular products in comparison to other comparable products in a relatively quick and efficient manner.
The preferred system seeks to overcome these problems by linking these and other functions into a single system.


A digital computer machine and a data processing system, methods involving the same and products produced thereby, as well as data structures and articles of manufacture pertaining thereto, as pertains to an auction for trading preferred return securities. The method includes providing a first digital electrical computer apparatus including a digital computer having a processor, the processor electrically connected to a memory device for storing and retrieving machine-readable signals, to an input device for receiving input data and converting the input data into input electrical data, and to an output device for converting output electrical data into output having a visual presentation and programming the processor to control the apparatus to receive the input data and to produce the output data by steps including: respectively entering financial characteristics of preferred-return instruments representing investments; respectively entering amounts that buyers want to buy of a member from a first group, the first group consisting of at least one of the instruments and at least one group of the instruments, at the respective buyer's hypothetical current preferred return; respectively entering amounts that sellers want to sell of a member of a second group, the second group consisting of at least one of the instruments and at least one group of the instruments, at the respective seller's hypothetical current preferred return; computing a demand schedule for each of said instruments corresponding to the first group; computing a supply schedule for each of said instruments corresponding to the second group; comparing the schedules to produce a current preferred return for each of the corresponding instruments in both the first group and the second group; computing a price for each said instrument having a current preferred return; and generating output representing respective amounts of the instruments respectively in association with at least one member of a group consisting of the current preferred return and the price.

The present markets for preferred-return securities are divided into primary markets—the markets for the sale of newly-issued securities—and secondary markets—the markets for the resale of existing securities. The secondary markets are almost exclusively dealer markets in which dealers hold inventories of securities in order to make markets in those securities. The dealers offer to buy and sell securities at prices which may be changed without notice at any time. The dealers and participants in the market may use computer systems to support communications and their operations, but market itself is not managed by a data processing system.
The costs per transaction of operating a dealer market are such that dealers tend to offer a smaller spread (the difference between the asking price and the selling price quoted by the dealer) for larger transactions (multi-million dollar orders can command a tight spread). Investors must hold a variety of different securities in order to achieve a relatively safe degree of diversification. Thus, a tendency toward large transaction sizes induces all but the largest investors (funds providers) to refrain from direct participation in present markets for preferred-return securities.
Because present markets for preferred-return securities practically exclude all but the largest investors from direct participation in the market, most investors can economically invest in preferred-return securities only through the services provided by a large financial institution such as a mutual fund company or an insurance company. However, the management fees and other costs charged by these large institutional money managers generally consume a significant proportion of the return received by the investors—a significant problem for the investors.
Presently, vital market information for preferred-return securities is not available to all of the investors. The present markets do not provide data on certain current trades (e.g., price or volume)or data on current bid-ask prices from competing market makers. As a result of this lack of data, even large, sophisticated investors may suffer from high costs for transactions as a result of making trades at prices other than the best currently available price. (It is in the interest of the dealers to withhold information from investors because the information advantage possessed by the dealers enables the dealers to profit at the expense of the investors.)
The Securities and Exchange Commission (SEC) is currently attempting to reduce some of the current inequities of the present secondary markets relative to investors by requiring dealers to report at least some portion of actual transactions including amounts and prices. However, this change will not level the playing field for market participants because dealers will still maintain a large information advantage over investors.
Although the primary markets for the great majority of preferred-return securities are negotiated markets, the primary markets for a few preferred-return securities are operated as auction markets. However, with the exception of the primary market for U.S. Government securities, participation in these auctions tends to be limited to dealers in the secondary markets. Even in the primary market for U.S. Government securities, participation of investors who are not dealers is limited to non-competitive bids—i.e., these investors must commit to purchase a stated amount of new securities at whatever price and return is determined by the auction. Present auction primary markets are limited to relatively large transactions because participation is largely restricted to dealers and dealers must purchase securities in quantity in order to operate efficiently.
In negotiated primary markets the funds user negotiates the terms of the securities offering with an investment banker. The investment banker may guarantee the terms of the offering or may only attempt to place the issue on a best efforts basis.
The transactions costs in negotiated primary markets are sufficiently high that only large transactions are economical. Because the present primary markets for preferred-return securities (both auction and negotiated markets) are suitable only for rather large transactions, most funds users are shut out of the market for long-term capital because they are too small to be able to issue preferred return securities.
Therefore, the background of the present invention reflects many problems, both on the issuer and investor side. No resolution of the problems has been forthcoming, leaving funds users unable to access long term capital and investors unable to optimize their investment portfolios.

Digital computer system and methods for managing an auction market for preferred-return securities


A video CD reproduction controlling device comprising a CD-drive, a CD-ROM decoder, an MPEG decoder, an address storing unit for storing disk reproduction information read out from the first track on a video CD, and a controller for controlling each of the above units, the controller storing an address of moving image data recorded on the first track included in the disk reproduction information, into the address storing unit, and controlling the CD-drive, the CD-ROM decoder, and the MPEG decoder so as to reproduce the moving image data recorded on the first track by use of the address stored in the address storing unit, in the reproduction of the moving image data at the reproduction mode with playback control-off.

1. Field of the Invention
The present invention relates to a video CD reproduction controlling device and its controlling method for controlling reproduction of image data compressed and encoded by the MPEG-1 system recorded on a video CD.
2. Description of the Related Art
A video CD is capable of reproducing images and sounds for 74 minutes at the maximum, with compressed image data and sound data recorded in a time divided way on a CD-ROM format disk. Sounds and images including moving images and still images are recorded on a video CD in an efficient compress-encoding system by the MPEG-1 standard (hereinafter, referred to as the MPEG-1 system) regulated as the Advice ISO/IEC-11172-2 in 1993 by an expert group on ISO and CCITT (ISO/IEC, JTC1/SC2/WG8 (Moving Picture Expert Group: MPEG). The images and the sounds recorded on a video CD are reproduced by use of a video CD player with an MPEG video decoder and an MPEG audio decoder for respectively decoding MPEG-1 compression image data and MPEG-1 compression sound data mounted thereon.
FIG. 4 shows a schematic view of a construction of a disk for a video CD. With reference to FIG. 4, in the disk for the video CD, the data can be recorded on a lead-in L at the most inner portion, on a first track (T1), second track (T2), and third track (T3), successively to the maximum track 99. The lead-in L is the same as the lead-in provided in a musical CD (compact disc), where the information on each starting position for every track and the other necessary control information is recorded as the TOC information. The first track (T1) is a video CD data track with various disk information recorded therein. Further, the reproduction information T11 indicating the reproducing procedure of a disk and the image data T12 including moving images and still images can be recorded on the first track (T1). The second track (T2) and the later are MPEG-AV tracks respectively with one moving image recorded thereon. The MPEG data obtained by the time division and multiplexing of the compression image data and the compression sound data is recorded on these tracks.
A reproducing method of images and sounds recorded on a video CD includes a method for reproducing them in an interactive manner according to the reproduction information T11 recorded on the first track (T1) (referred to as reproduction with the playback control (PBC)-on) and a method for reproducing the second track (T2) and the later successively (referred to as reproduction with the PBC-off) regardless of the reproduction information T11.
FIG. 5 shows the constitution of the conventional video CD reproduction controlling device. The conventional video CD reproduction controlling device shown in FIG. 5 comprises a CD drive 51 for reading out the data recorded on a video CD, a CD-ROM decoder 52 for decoding the data read out through the CD drive 51 so to supply the reproduction data, an MPEG decoder 53 for decoding the MPEG data to supply image signals and sound signals when the reproduction data supplied from the CD-ROM decoder 52 is MPEG data, and a controller 54 for controlling the CD drive 51, the CD-ROM decoder 52, and the MPEG decoder 53.
The operation of the conventional video CD reproduction control in the case of PBC-off reproduction will be described with reference to the flow charts of FIGS. 4, 5, and 6. At the time of starting reproduction, if the PBC is set as off (Step 601), the controller 54 sends the CD drive 51 a seek request for the head of the second track (T2) that is the reproduction starting track (Step 602), in order to reproduce the images and sounds recorded on a disk set in the CD drive 51, and the data is read out and reproduced from the second track (T2) (Step 603). Namely, in case of the PBC-off reproduction, even if the image data T12 is recorded on the first track (T1), the same image data will be never reproduced, because the moving images recorded on the second track (T2) and the later are reproduced. The image data T12 recorded on the first track (T1) is to be reproduced only in case of the PBC-on reproduction.
Therefore, when a user wants to reproduce the images recorded on the first track (T1), he or she must select the PBC-on reproduction to perform the reproduction control of the video CD since it is impossible to reproduce the relevant images in the PBC-off reproduction.
There exists a video CD on which all the moving image data is recorded on the first track (T1) and no moving image data is recorded on the second track (T2) and the later. Although it is not against the video CD standards, such a video CD is incapable of reproducing the moving images completely when the PBC-off is selected.

Video CD reproduction controlling device and its controlling method


A set of instructions for implementation in a floating-point unit or other computer processor hardware is disclosed herein. In one embodiment, an extended-range fused multiply-add operation, a first look-up operation, and a second look-up operation are each embodied in hardware instructions configured to be operably executed in a processor. These operations are accompanied by a table which provides a set of defined values in response to various function types, supporting the computation of elementary functions such as reciprocal, square, cube, fourth roots and their reciprocals, exponential, and logarithmic functions. By allowing each of these functions to be computed with a hardware instruction, branching and predicated execution may be reduced or eliminated, while also permitting the use of distributed instructions across a number of execution units.

Elementary functions are mathematical functions such as square root, logarithm, exponential, etc., that are widely used in high performance computing (HPC) applications, scientific computing, and financial applications. The speed of elementary function evaluation often has a significant effect on the overall performance of such applications, making accelerated elementary function libraries an important factor in achieving high-performance on hardware.
Elementary function libraries, such as IBM MASS (Mathematical Acceleration SubSystem), are often called from performance critical code sections, and hence contribute greatly to the efficiency of numerical applications. Not surprisingly, such functions are heavily optimized both by the software developer and the compiler, and processor manufacturers provide detailed performance results which potential users can use to estimate the performance of new processors on existing numerical workloads.
Changes in processor design require such libraries to be re-tuned. For example, hardware pipelining and superscalar dispatch will favor implementations which use more instructions, and have longer total latency, but which distribute computation across different execution units and present the compiler with more opportunities for parallel execution. Additionally, Single-Instruction-Multiple-Data (SIMD) parallelism, and large penalties for data-dependent unpredictable branches favor implementations which handle all cases in a branchless loop body over implementations with a fast path for common cases and slower paths for uncommon, e.g., exceptional, cases. The present disclosure provides enhanced performance with these architectures through the use of elementary function algorithms and hardware instructions to accelerate such algorithms and simplify their use.

Hardware instructions to accelerate table-driven mathematical computation of reciprocal square, cube, forth root and their reciprocal functions, and the evaluation of exponential and logarithmic families of functions

International Business Machine Corporation


A self-cleaning varnish supply machine and method of using the same. The machine has a plurality of at least two cylindrical storage containers, a supply line, a return line, a pump, a compressed air supply source, a plurality of at least two outlet valves, a plurality of two inlet valves, and a compressed air supply source valve. The machine can be operated in three different modes. In the first mode, the machine can be used to supply varnish to a varnish application device. Next, the machine can be operated in an automated self-cleaning mode. Finally, the machine can be operated in a manual self-cleaning mode.

The use of varnish in the retail apparel ticketing industry is well known. Varnish is typically applied to apparel tickets to give apparel tickets a glossy finish, thus enhancing the appearance of the tickets. Additionally, the application of varnish to apparel tickets protects any underlying image that may be printed on the tickets.
Human workers may apply varnish to apparel tickets manually; however, more commonly, the application of varnish is accomplished using an automated process that utilizes machines. Varnish application can be accomplished using brushers, rollers, sprayers, or any other suitable method.
Current methods of supplying varnish to the machines that apply the varnish to the apparel tickets are unsatisfactory. The current methods of varnish supply allow the varnish solvent to quickly evaporate, thereby dramatically altering the viscosity of the varnish as the varnish thickens with the evaporation of the solvent. This is problematic, as it causes pumps used during the varnish application and supply process to become plugged, thus necessitating frequent maintenance and leading to prolonged downtimes. Furthermore, the thickened varnish affects the application of the varnish to the apparel tickets, and may negatively affect the quality of the desired final product. Furthermore, the current methods of varnish supply do not allow for a quick changeover between different varnish types. Therefore, whenever it is desired to apply a different type of varnish, the machines used in the varnish application and supply process must be manually cleaned, again leading to significant downtimes.
Therefore, what is needed is an improved machine for supplying varnish and an improved method for using such an improved machine.


Disclosed is an adaptive maximum request size process to change the maximum request size for a RAID system in order to reflect the highest possible maximum request size permitted by the RAID type and the physical drives included in the RAID system. The maximum request size is a primary limiting characteristic for physical drive and logical drive performance. The logical drive maximum request size is limited by the physical drive maximum request size. Physical drives supporting older revisions of the physical drive standards have a much lower maximum request size than physical drives supporting newer revisions of the physical drive standard. The adaptive maximum request size process permits a RAID system to adjust the maximum request size to reflect the highest possible maximum request size allowed for a given system based on the physical drives of the RAID system and the RAID types of all RAID logical drives. The adaptive maximum request size process also permits a RAID system to mix physical drives from older and newer generations while still achieving the highest possible maximum request size for the RAID system.

a. Field of the Invention
The present invention generally pertains to storage systems and more particularly to Redundant Array of Independent Disks (RAID) data storage systems.
b. Description of the Background
A Redundant Array of Independent Disks (RAID) data storage system is a method of using multiple physical hard drives to act as a single logical hard drive for interaction with a host computer. Each Physical Drive (PD) has a partition dedicated to the RAID Logical Drive (LD). The use of partitions on multiple physical drives is referred to as striping. The logical drive acts as a logical abstraction and allows the physical drives to interact with the host computer as a single data storage drive. Since it is possible to partition each physical drive into multiple partitions, it is possible to create multiple RAID logical drives using the same physical drives. While most of the advantages of a RAID system are lost, it is possible to create some types of RAID systems using a single physical drive. RAID controller software provides the abstraction interface to allow the RAID system to appear as an abstracted logical drive to the computer Operating System (OS). The RAID controller software may be implemented as a software driver running under the computer operating system, sometimes called a software RAID controller, or as a firmware controller running on a separate piece of hardware, sometimes called a hardware RAID controller. The software RAID controller is written in the form of a device driver for the computer operating system.
A RAID storage system has two primary advantages versus a single physical drive storage system, i.e., data redundancy and higher speed data communication Input/Output (I/O). A RAID system allows for data redundancy by duplicating data stored on a single physical drive onto at least two physical drives within the RAID storage system. The data redundancy feature insures against data loss and subsequent system failure if one of the physical drives fails. Higher speed data I/O is achieved by parallel communication with multiple physical drives for sending and receiving data that would typically be written to a single physical drive and would typically be limited to the physical I/O speed of the single physical drive. Data redundancy and higher speed I/O act in opposition to each other within a RAID storage system. That is, the more the system is optimized for data redundancy the slower the I/O speed, and the higher the I/O speed the lower the data redundancy. Hence, there are a variety of RAID types that vary the data redundancy and I/O tradeoffs in an assortment of schemes in order to optimize the RAID performance to achieve end user goals.
A RAID system that optimizes purely for speed, with no data redundancy, is referred to as a RAID-0 system. A RAID system that optimizes purely for redundancy, with no effort to achieve higher I/O speed, is referred to as a RAID-1 system. Other RAID types fall somewhere in the middle between a RAID-0 and a RAID-1 system, with a variety of efforts to maximize both the data redundancy and the higher speed I/O features of a RAID system. The selection of a RAID type is often dependant on the type of data that is intended to be stored on the RAID storage system. The type of data stored may vary by file size, whether the file is read or written more often, as well as other data file attributes.
Each non-redundant physical drive within the RAID system is counted as a stripe. Therefore, the number of stripes is equal to the number of non-redundant physical drives within a RAID system. The size of the partition on each physical drive is referred to as the stripe size. For a RAID-0 system, with no redundancy, the number of stripes is equal to the number physical drives in the RAID system. For a RAID-1 system, often referred to as a mirroring system, there are two redundant physical drives storing the same, or mirroring, the data. In the RAID-1 system, there is only one non-redundant physical drive, and hence, there is only one stripe for the system. Consequently, a RAID-1 system is often referred to as a non-striping RAID system. When multiple RAID logical drives use the same physical drives, each RAID logical drive may be a different RAID type. Hence, each RAID logical drive using the same physical drives may have a different stripe size and a different number of stripes.
A RAID system may use virtually any type of physical drive as the physical drives within the RAID system. There are two primary families of physical drive types. There are drives that follow the Integrated Drive Electronics/Advanced Technology Attachment (IDE/ATA) family of standards, and there are physical drives that follow the Small Computer System Interface (SCSI) family of standards. Each standard family has multiple generations, or revisions, of the standard specifying various aspects of the physical drive communication interface. New revisions of the standards reflect technology advancements and generally allow greater I/O capabilities for physical drives supporting the updated standard revision. Information on the IDE/ATA and SCSI standards is kept by the American National Standards Institute (ANSI). ANSI is located at 11 West 42nd Street, 13th Floor, New York, N.Y. 10036, telephone number 212-642-4900, and web site www.ansi.org.
Generally, RAID systems are created using physical drives that support the same standard family and revision. By using physical drives supporting the same standard family and revision, the RAID system operates all physical drives with the same I/O characteristics. One such I/O characteristic is the maximum request size of the RAID logical drive. The maximum request size controls the maximum amount of data that the computer Operating System (OS) may transfer to or from the logical drive in a single data transfer transaction. In order to support all varieties of physical drives, the RAID controller software typically sets the overall RAID logical drive characteristics, including the maximum request size, to match the characteristics of the oldest physical drive standard family revision that may be included in the RAID system.

Optimizing I/O performance in a RAID subsystem using an adaptive maximum request size for a logical drive


Automatically establishing and/or modifying a trust relationship between devices, including mobile devices, in communication, and customizing a user interface workflow based on the trust relationship. Trust relationships are based on numerous proximity-related factors including automatically gathered proximity data, length of time in proximity, and signals detected from a target communication device as well as other nearby communication devices.

The present invention relates generally to the field of trust levels between mobile communication devices (including mobile devices, mobile phones, smartphones, etc.).
Establishment of a trust level for computer users, computer hardware, computer software and/or data communications is known. A "trust level" is typically established for personal and/or data security reasons such that access to sensitive data is granted or restricted based upon a trust level of people, machine logic and/or hardware seeking access. Data security typically entails protecting data from disclosure to unauthorized users, and from tampering by unauthorized users.
US patent application 2015/0046696 discloses as follows: "Methods, apparatuses, and computer program products are herein provided for controlling access of communications in a Pervasive Social Network (PSN) using a local trust level and/or a general trust level . . . . [A] user operating a communication device on a PSN may select other users with at least a minimum level of local and/or general trust for secure communications. For example, users having a communication device (e.g., a mobile device) with a trust level lower than the minimum level of trust would not be configured to access the secure communications."

This patent is subject to a terminal disclaimer.

Establishing and using a trust level in mobile phones

International Business Machines Corporation


A dual-bus architecture that includes a high-seed system bus, called the NexBus (20), and a slower peripheral bus, called the alternate bus or AB (25). The NexBus and AB are coupled by control logic (45) which includes an arbiter (50) and an alternate bus interface (ABI) (60). The ABI is treated as a master for both the NexBus and the AB. While it would be possible to have the adapter always request the AB (which also requires the NexBus), that would slow down NexBus operations to the bandwidth of the AB. This problem is avoided by providing two request lines for each adapter, -NREQ (NexBus only) and -AREQ (both buses), having the adapter normally assert -NREQ first. However, if the addressed device is on the AB, the ABI automatically detects this fact and attempts to do a crossing transfer to the AB, even though the request was for the NexBus only. If the ABI is unable to do the crossing transfer because the AB was busy, the ABI automatically causes the NexBus adapter to retry the request using the -AREQ line. Thus the slower AB is only accessed when actually necessary.

The present invention relates generally to data bus communications, and more specifically to a system incorporating a high-speed bus and a relatively low-speed peripheral bus.
Although it is tempting to view the history of personal computers (PCs) solely in terms of the evolution of CPUs, a more complete view must take into account the evolution of the buses around which the computers are built. Nowhere is this more notable than in the case of IBM-compatible PCs, which are based on Intel-compatible microprocessors.
In 1981, IBM introduced the 8-bit IBM Personal Computer PC XT, based on the Intel 8088 microprocessor running at 4.77 megahertz (4.77 MHz), a 1-megabyte (1-MB) memory address space, 5.25-inch floppies and a system board with five 8-bit expansion bus slots. IBM adopted an open architecture policy and published the technical specifications of the system bus, electronics, and BIOS. IBM and Microsoft developed the 8-bit operating system called DOS. Many manufacturers were able to offer PCs that operated exactly like the IBM PC. This enabled the development and sale of hundreds of PC models, thousands of application software packages and hundreds of XT bus peripheral boards. The 8-bit XT bus ran at 4.77 MHz and offered a peak data transfer rate of less than 500 kilobytes/sec (500 KB/sec).
In 1984, IBM upgraded the PC by introducing the 16-bit PC AT, based on the Intel 80286 microprocessor with a 16-MB address range. This microprocessor was offered in 6-, 8-, 12- and 16-MHz versions. The system specification were enhanced and although the technical specifications were not released most PC companies were able to figure out the specifications and offer compatible products. The majority of the systems ran the 8-bit DOS operating system. This PC AT offered a 16-bit I/O bus that became known as the AT bus. This bus extended the XT bus by adding an extra connector and signals. The AT bus accepted both the older 8-bit XT bus cards as well as the new 16-bit AT bus cards. This bus later became known as the Industry Standard Architecture or ISA. The 16-bit AT bus ran at 8 MHz and offered a peak data transfer rate of approximately 2 MB/sec.
Since application software vendors compete against each other on the basis of software features, application software became more functional and complex, and required more processor speed and memory addressing capability. Intel responded in 1986 to these demands with the 16-MHz 32-bit 80386 microprocessor. The 32-bit capability enabled a 4-gigabyte (4-GB) memory address space. However, the majority of 386 systems were sold with the 16-bit ISA bus and 8-bit DOS operating system.
In 1987, IBM introduced a completely new PC architecture called the Micro Channel Architecture (MCA), which introduced a new concept to the PC world called bus mastering. A bus master is a special peripheral card that can transfer blocks of data directly to the system memory without CPU intervention. Bus-mastering off-loads the CPU to do other work. Bus-mastering was the first step in bringing multiprocessor technology to the PC. The MCA bus runs at 8 MHz and offers a peak transfer rate of 20 MB/sec.
In the absence of IBM extending the 16-bit ISA bus to 32 bits, many companies employed a two-bus approach-a proprietary 32 bit CPU-to-memory bus with the 16-bit ISA bus for I/O. Compaq offered the "Flex Architecture", AST the "Smart Slot", etc. These 32-bit CPU-to-memory buses were fairly simple and offered nothing more than increased memory bandwidth. Each system was designed to make the memory bus transparent to the operating system software and applications. Eventually, the 32-bit 80386 microprocessor was offered with clock speeds as high as 33 MHz, but the ISA bus remained at 16 bits and 8 MHz, thus becoming a system bottleneck especially in applications with intense disk or graphic activity. Dual bus PCs offered a 32-bit data path to memory matching the width of the CPU but did not address the problem of I/O bottleneck at all. These systems were the first "two-bus PCs" where each bus was tuned to different tasks.
In 1988, Compaq and a group of PC vendors offered a 32-bit extension to the 16-bit ISA bus. The EISA bus is a multi-master bus that runs at 8 MHz, offers a peak transfer rate of 33 MB/sec and can accept both EISA and ISA bus cards. Today, the EISA bus is being offered by many PC compatible companies and is becoming more popular as prices decline and bus cards become more available.
As more complex application software migrates to the PC architecture, faster processors incorporating the latest microprocessor architectural concepts are being developed. These high-performance microprocessors require a high bandwidth to main memory and also create a demand for high bandwidth I/O, far in excess of the bandwidth of the EISA or Micro Channel. Additionally, both of these buses are I/O buses and not multiprocessor buses. Architectures that employ multiples of these advanced microprocessors in a multiprocessor configuration require even higher bus bandwidth and special electronics to coordinate the processor activities. An efficient multiprocessor organization is a tightly-coupled, shared-memory architecture where multiple processors can access to a common main memory over a high-speed bus. Each CPU has its own cache memory. In a multiprocessor architecture, a prime concern is keeping the multiple caches synchronized with the most current data. The system bus must provide cache coherency capabilities so that each processor has an identical view of memory.
Corollary introduced a dual-bus architecture that brought multiprocessor capability and ECC memory to the PC architecture and was the first multiprocessor PC bus to be adopted by several computer companies. Corollary designed a bus that connected multiple CPU caches together which was dubbed the "C-Bus" for "cache" bus. It employs a 32-bit, 16-MHz, 64-MB/sec design and an interrupt scheme to handle multiple processors. This bus also interfaces to the ISA and EISA buses via a special CPU. The C-bus architecture requires this special CPU, called the master, to handle all PC bus system activity. This asymmetry becomes a serious bottleneck as the number of processors increases.

Bus arbitration in a dual-bus architecture where one bus has relatively high latency


A two-stage sampling data detector for a partial response channel having a channel code encoder for encoding user information sequences into blocks of code words in accordance with a predetermined channel block code characterized by a list of most likely error-events comprising impermissible code words. The detector includes a first-stage detector, such as a Viterbi detector, connected to receive samples from the partial response channel and matched to characteristics of the channel and not to the channel code, puts out unchecked bit estimates. A second stage post-processor checks the bit estimates in relation to derived detector decision metrics information and the channel block code, and puts out post-processed bit estimates to a channel code decoder after correcting detected erroneous sequences in accordance with the decision metrics information, information derived from the channel code, and the list of most likely error-events. A method for generating the channel block code is also described.

This invention relates to the detection of information within a sampled data detection channel, such as a magnetic recording and playback channel. More particularly, the present invention relates to a first stage maximum likelihood detector implementing the Viterbi detection algorithm adapted only to channel characteristics, and a second stage post-processor adapted to check and correct detection results based upon an embedded channel code imposed on the information within the channel by a channel code encoding process.
A partial response maximum-likelihood (PRML) channel with Viterbi detection is a high performance architecture used for detection of a signal e.g. read from a magnetic recording medium. PRML permits magnetic transitions to be placed closer to one another than heretofore (increased intersymbol interference) and thereby enables higher magnetic transition recording densities than have been obtained with prior peak detection approaches. In PRML the magnetic recording channel is equalized to a partial response channel with known intersymbol interference. Then, a Viterbi detector is used to determine the most likely recorded sequence. Noise added into the partial response channel could cause detection errors at the output of the Viterbi detector.
User data to be recorded upon a magnetic storage medium is typically recorded in substantial blocks, each block comprising a predetermined number of bits such as approximately four thousand information bits. In order to protect against channel/detector errors, an outer error correction code (ECC) process, typically implementing a Reed-Solomon code, considers the sequence of these information bits to comprise a single ECC code word, or several ECC interleaved code words. The outer ECC process calculates and appends a predetermined number of ECC check bytes onto the user data block or block ECC interleave. On playback from the recording channel, the ECC check bytes are analyzed in order to detect and correct one or several error burst sequences within the user data block or interleave. It may be the case, particularly at high recording densities, that so many errors are made in the detection process that the outer ECC process is overwhelmed and becomes incapable of locating and/or correcting all of the error bursts.
Adding an inner or embedded channel code to each ECC protected user data block can improve channel detection performance by reducing the number of detector errors reaching an input of the ECC decoding and correction process. Implementing a channel code that provides performance gain at high code rate has previously resulted in a Viterbi detector requiring a very complex implementation, since prior Viterbi detectors have been matched to both the channel characteristics and to the channel code constraints.
The Viterbi algorithm is an iterative process of keeping track of the path with a smallest accumulated metric leading to each state of a detection trellis (graph). The metrics of all of the paths leading into a particular state are calculated and compared. Then, the path with the smallest metric is selected as the survivor path. In this manner all paths which can not be part of the minimum metric path through the trellis are systematically eliminated. The survivor path to each state is stored in a path memory. Given that the path memory is made sufficiently long, all of the survivor paths will diverge from a single path within the span of the path memory. The single path from which all of the current survivor paths diverge is the minimum metric path. The input sequence associated with this path appears at the output of the Viterbi detector.
There are two forms of prior art which are generally relevant to the present invention. The first form of prior art and the thing that has most commonly been employed in magnetic recording is a simple run length coding process that is not meant to detect errors (a code which ensures that magnetic flux transitions happen sufficiently frequently in order to provide reliable channel timing and gain control based on the incoming coded data pattern). This is the most common prior art. And in this first case the Viterbi is not necessarily matched to the code, because the code is not providing error detection or correction capability. The other form of prior art employs a code that can detect and correct errors, and in this second example the number of states and path lengths required of a Viterbi detector trellis are matched to both the channel and the code, see e.g. R. Karabed and P. Siegel, xe2x80x9cMatched Spectral-Null Codes for Partial-Response Channelsxe2x80x9d, IEEE Transactions on Information Theory, Vol. 37, No. 3, May 1991, pp. 818-855.
The squared Euclidean distance between two noiseless paths along the detector trellis is equal to the sum of the squares of the differences between the ideal samples on the two paths. In the case of independent and identically distributed Gaussian noise added to the channel, the most-likely errors made by the Viterbi detector correspond to mistaking two sequences that are separated by the minimum distance. As a consequence the minimum squared Euclidean distance can be used to estimate the probability of error at the output of the Viterbi detector.
Channel noise can cause errors at the output of the Viterbi detector. Errors may be more likely to occur at higher magnetic recording densities. User information may be more reliably recovered from the high density (high data rate) magnetic recording channel by incorporating an appropriately designed channel code. In the past, many channel codes have not achieved significant performance gains because of low code rate and because the code may not have been optimized for the error-events or error patterns that are most likely to occur within a particular partial response channel. In the early development of partial response signaling, maximum likelihood detection within a recording channel, channel code rates were typically 8/9. Later codes had higher rates, such as 16/17 and 24/25. At the same time, channel developers were considering detector trellis codes which had the desirable property of detecting and correcting error-events. Early trellis codes had a rate of 8/10 or 16/19, for example. While rates were slowly increasing for trellis codes, they generally had a lower code rate than more efficient codes which were not useful for detecting or correcting error-events.
One example of a Viterbi detector which matched a modulo-N trellis code on a partial response channel is described in Fredrickson U.S. Pat. No. 5,257,272, the disclosure thereof being incorporated herein by reference. In that patented approach a Viterbi detector replicated a conventional trellis structure for the channel N times. The N copies of the channel response trellis were interconnected such that a predetermined function associated each state in the trellis with a particular integer value modulo-N. The number N and the predetermined function were selected in accordance with channel detection and coding constraints, such that diverging erroneous sequences of minimum distance led to detector states which were distinct. The detector trellis was time-varying such that only certain values of the preselected function were allowed every m bits. The time-variation was said to assure that there were no minimum distance extensions of erroneous sequences beyond a predetermined length. One drawback of the Fredrickson ""272 patent approach was its relatively complex Viterbi detector structure.
The number of states in a Viterbi detector matched only to the channel is equal to M=2Lxe2x88x921, where L is the length of the partial response, i.e. the span of non-zero terms. For a (1xe2x88x92D) dicode channel the number of Viterbi states is 2. For a (1xe2x88x92D)(1+D)2 EPR4 channel, the number of states is 8. Channels that provide better performance at higher densities tend to have even more states. When a modulo-7 code is used on a channel with M states, the combined Viterbi detector has 7M states. As the number of states in the channel increases, the complexity of the combined detector increases seven-fold.
An example of a Viterbi detector followed by a post-processor is described in co-inventor Kelly Knudson Fitzpatrick""s U.S. Pat. Nos. 5,521,945 and 5,689,532, both of which are commonly assigned with the present patent. The disclosures of the ""945 and ""532 patents are incorporated herein by reference thereto. The described post-processor employed certain information from a Viterbi detector optimized to a PR4 target spectrum in order to produce an estimated input sequence which approached a maximum likelihood sequence estimate for an EPR4 channel target.
A hitherto unsolved need has remained for a reduced-complexity detection architecture and method for detecting information in a partial response channel characterized by more complex transfer polynomials and use of error detecting channel codes having high code rates, and by using a Viterbi detector tuned to the channel transfer function followed by a post-processor responsive to the channel code and having a relatively simplified implementation.
A general object of the present invention is to provide a two-stage detection architecture and method for a partial response channel which overcomes limitations and drawbacks of the prior art.
More particularly, an object of the present invention provides a detection architecture and method for increasing the performance of a partial response channel by correcting most likely error-events in a way that is not too complicated.
Another more specific object of the present invention is to provide a two-stage detection architecture including a first-stage Viterbi detector tailored to characteristics of a partial response channel and a second-stage post-processor tailored to characteristics of a channel code for checking and correcting incoming sequence estimates of the Viterbi detector.
A further object of the present invention is to provide an improved two-stage detection architecture for a magnetic recording and playback channel which may be practically implemented in a read channel large scale integrated circuit chip.
One more object of the present invention is to provide a method for obtaining high rate channel codes which are optimized for error-events which occur in a particular partial response channel and imposing those codes on information passing through the channel in a manner which enables a first-stage Viterbi detector to be tailored solely to the characteristics of the partial response channel and a second-stage post-processor which corrects detected sequence estimates provided by the Viterbi detector with decision metrics information relating to decision accuracy of the Viterbi detector and by reference to the channel code, its characteristics, constraints and known likely error-events, the inventive method being accomplished in a manner overcoming limitations and drawbacks of the prior art.
As a related object of the present invention, a preferred channel code comprises either a predetermined modulo-n code, an interleaved parity code, or a cyclic code having a rate (R) greater than (2pxe2x88x921xe2x88x92p)/2pxe2x88x921 where p is equal to the number of parity bits.
As another related object of the present invention, a two-stage detection architecture for a partial response channel detects and corrects multiple error-events occurring within a single user data word or an error event spanning adjacent user data words, in a manner overcoming limitations and drawbacks of the prior art.
In accordance with principles of the present invention, a two-stage sampling data detector is provided for a partial response channel. The channel, which may be a magnetic digital data recording and playback channel, such as including a disk drive or tape drive, has a channel code encoder for encoding user information sequences into blocks of code words in accordance with a predetermined channel code. The channel code is characterized by a list of most likely error-events comprising impermissible code words. In preferred form the channel code comprises a predetermined modulo-n code, an interleaved parity code, or a cyclic code having a rate (R) greater than (2pxe2x88x921xe2x88x92p)/2pxe2x88x921, where p is equal to the number of parity bits. The detector includes a first-stage detector, preferably although not necessarily a Viterbi detector, connected to receive samples from the partial response channel. The first-stage detector, being matched to characteristics of the channel and not matched to the channel code, puts out unchecked bit estimates. A second-stage post-processor is connected to receive the unchecked bit estimates and develops decision metrics information from the samples and from the unchecked bit estimates. The second-stage post-processor puts out post-processed bit estimate sequences to a channel code decoder after checking and correcting said sequences in accordance with the decision metrics information and channel-code information including the list of most likely error-events. In one preferred form the second stage post-processor includes a sequence checker for checking sequences of the unchecked bit estimates to detect a violation of the channel code, and a sequence corrector responsive to a detected channel code violation and to the decision metrics information for determining a nearest code word in squared Euclidean distance and for putting out the nearest code word in place of the unchecked bit estimate sequence.

Two stage detector having viterbi detector matched to a channel and post processor matched to a channel code


A stabilized aqueous solution for use in preparing catalysts is described which comprises water, at least one Group VIB element, at least one Group VIII element, an inorganic phosphorus-containing acid, and an amount of a reducing agent effective to dissolve the Group VIB and Group VIII elements and stabilize the solution. Examples of useful reducing agents include hydrazine compounds and hydroxylamine compounds. A method of preparing catalysts utilizing the stabilized aqueous solutions also is described and comprises. (A) impregnating a foraminous carrier with an aqueous solution comprising water, at least one Group VIB element, at least one Group VIII element, an inorganic phosphorus-containing acid, and an amount of a reducing agent effective to dissolve the Group VIB and Group VIII elements and stabilize the solution wherein said Group VIB and Group VIII elements are present as salts capable of converted to their oxides upon calcination; and PA1 (B) thereafter drying and calcining the impregnated carrier to convert the Group VIB and Group VIII elements to their oxides.

Catalysts containing metals of Group VIB of the Periodic Table (IUPAC version), especially tungsten and molybdenum and their compounds, especially the oxides or the sulfides exhibit desirable activity in catalyzing a wide variety of reactions including among others, hydrogenation, dehydrogenation, oxidation, desulfurization, isomerization and cracking. Additional metals or their compounds have been combined with the Group VIB metals to provide enhanced catalytic activity. Among the metals utilized in combination with the Group VIB metals are metals of Group VIII of the Periodic Table such as iron, cobalt, nickel and copper or their compounds. Catalysts may be prepared from these mixtures of metals and metal compounds by preparing dilute solutions and applying the diluted solutions to the surface of a foraminous support material. The foraminous support material is usually of a low order of activity when compared to the catalytically active metals or compounds mentioned above, or the support material may be completely inactive catalytically. After the carder is impregnated with the solutions, the impregnated carrier is calcined and/or chemically treated to convert the catalytically active material to other forms and particularly to the oxide. One advantage of this method of preparing catalysts is that the active material present in the solution is evenly distributed over the available surface of the foraminous carrier material.
One of the problems which results when attempts are made to prepare solutions of mixtures of Group VIB and Group VIII metals or metal compounds is the difficulty of preparing solutions and, more particularly, solutions which are stable over a period of time.
U.S. Pat. No. 3,232,887 describes stabilized aqueous catalytically active solutions which comprise an aqueous solvent having dissolved therein catalytically active compounds containing at least one element from Group VIB, at least one element from Group VIII of the Periodic Table, and a stabilizing material which is a water-soluble acidic compound. The water-soluble acidic compound may be a hydroxy monocarboxylic acid, a polyhydroxy monocarboxylic acid, a hydroxy polycarboxylic acid, a polyhydroxy polycarboxylic acid, a monocarboxylic acid, or an oxygenated inorganic phosphorus-containing acid. Among the phosphorus-containing organic acids which are suggested as being useful are hypophosphorus acid, metaphosphorus acid, phosphoric acid, metaphosphoric acid, etc.
Other patents which describe the use of inorganic phosphorus-containing acids in solutions of Group VIB and Group VIII metals or compounds include U.S. Pat. Nos. 3,287,280, 3,755,150, 3,755,196 and 4,818,743. Some of these patents describe the ratio of phosphorus to one or more of the other metals as being an important consideration for improved solubility.

Stabilized aqueous solutions for preparing catalysts and process for preparing catalysts


A composition for treating or preventing COVID-19 infection is described. The composition includes attenuated Measles virus particles; attenuated Mumps virus particles; attenuated Rubella II virus particles; scorpion antivenom; and a pharmaceutically acceptable carrier. The composition can be used in a method of treating COVID-19 infection in a subject, and can also be used in a method of vaccinating a subject to decrease the risk or severity of infection by COVID-19.

Coronaviruses are enveloped viruses with a positive-sense single-stranded RNA genome and a helical symmetry. Coronaviruses primarily infect the upper respiratory or gastrointestinal tract of mammals and birds. Five to six different currently known strains of coronaviruses infect humans. SARS-CoV which causes severe acute respiratory syndrome (SARS), has a unique pathogenesis because it causes both upper and lower respiratory tract infections and can also cause gastroenteritis. Middle East respiratory syndrome coronavirus (MERS-CoV) also causes a lower respiratory tract infection in humans.
In November 2002, SARS or severe acute respiratory syndrome was first noted in Guangdong province, China. In February 2003, another outbreak of SARS occurred in Hanoi, Vietnam and was reported to the WHO. It was then on Mar. 10, 2003 that the China SARS of November 2002 and the Hanoi, Vietnam SARS of early 2003 officially became identified as SARS-CoV-1. The Middle East respiratory syndrome coronavirus (MERS-CoV) was subsequently discovered in June 2012. These two earlier coronavirus infections are viewed as primarily local epidemics compared to the 2019 SARS-CoV-2 pandemic.
Clinical samples from patients with pneumonia in Wuhan, China, SARS-CoV-2 was detected in December 2019. Following an initial report in Wuhan, China in December 2019, the World Health Organization (WHO) declared COVID-19 a pandemic on Mar. 11, 2020. COVID-19 has infected over 170 million people and killed 3.5 million people worldwide to date. Coronavirus disease-2019 is the name given to the disease caused by SARS-CoV-2 (COVID-19). SARS-CoV-2 is an extremely infectious and a large proportion of the population is vulnerable to this viral infection. COVID-19 has a broad clinical spectrum of diseases, including fever, dry cough, fatigue, shortness of breath, sore throat, and headache, but the disease can also be asymptomatic, be accompanied by severe pneumonia and progressive dyspnea, or even result in death.
COVID-19 can affect the upper respiratory tract (sinuses, nose, and throat) and the lower respiratory tract (windpipe and lungs). The lungs are the organs most affected by COVID-19 because the virus accesses host cells via the enzyme angiotensin-converting enzyme 2 (ACE2), which is most abundant in type II alveolar cells of the lungs. The virus uses a special surface glycoprotein called a "spike" (peplomer) to connect to ACE2 and enter the host cell, although additional cell surface receptors for COVID-19 entry into cells are also present.
The immune response to SARS-CoV-2 utilizes all the various components of the immune system that fight viral infections in order to eradicate them and recover from infection. Nevertheless, this increased immune response can also lead to a more severe and deadly course of the disease. Along with the vaccines that have been developed and used to date, several therapeutic methods are also being examined to prevent illness. It is believed that it is important at this stage of the COVID-19 pandemic to redesign or improve existing natural and/or pharmaceutical treatments to deal with the virus threat. Natural and herbal remedies have long been used to treat acute respiratory infections and usually demonstrate acceptable toxicity.
Both vaccines and drugs for treating COVID-19 are under development. Previous work to develop a vaccine against the coronavirus diseases SARS and MERS established knowledge about the structure and function of coronaviruses, which accelerated of various technology platforms for a COVID-19 vaccine. Diamond M S, Pierson T C, Cell Host and Microbe. 27 (5): 699-703 (2020). As of the present there are over 300 vaccine candidates in development. Drugs for treating COVID-19 include a number of repurposed antiviral drugs, as well as vasodilators, corticosteroids, immune therapies, lipoic acid, bevacizumab, and recombinant angiotensin-converting enzyme 2. However, neither a safe and effective drug or vaccine has yet been identified. Accordingly, there remains a need for drugs and vaccines that can be used to treat or prevent COVID-19 infection.

Multiple viral antigen COVID vaccine and therapeutic


An actuator assembly for use in conjunction with a pneumatic valve assembly of the type which includes an airway having an inlet port, an outlet port, and a valve disposed within the airway and configured to be moved between an open position and a closed position, comprises a first actuator coupled to the valve for moving the valve between the open position and the closed position in a first operational mode, and a second actuator coupled to the valve for opening the valve in a second operational mode.

Pneumatic valves configured to be positioned within an airway and capable of opening to permit airflow and closing to obstruct airflow are well-known. When such valves close, moisture formed by condensation may become trapped between the valve plate and the interior of the airway. If the trapped moisture freezes, opening the valve may be impeded or even prevented (valve icing).
Valve icing is of concern in air turbine starter (ATS) valve assemblies used to initiate aircraft turbine engine rotation. When the ATS flow control valve is closed, condensation may be trapped between the flow control valve plate and airway's interior. This may be problematic after engine shutdown in low temperature environments (i.e. at or below freezing) because the collected water could freeze and valve icing could result. An iced ATS control valve may not open when commanded and consequently delay or prevent engine start and takeoff. Though the iced valve may be replaced or de-iced (e.g. heated), it is preferable to avoid the problem by preventing valve icing.
From the above, it should be appreciated that it would be desirable to provide a pneumatic valve assembly that minimizes the likelihood of valve icing.

Anti-icing actuator assembly for pneumatic valve


An optimized press-fit between a resected bone and an articular implant may, for instance, reduce undesirable qualities, including excess micromotion, stress transmission, and/or strain. By taking into account heterogeneous bone properties, the parameters of a bone resection can be determined as to optimize the press-fit between a resected bone and an articular implant. An optimized press-fit is obtained by determining ideal engagement characteristics corresponding to the fit between the fixation features of an articular implant and a bone. Then, taking into account a bone's heterogeneous properties, the parameters of a bone resection that would substantially achieve the determined ideal engagement characteristics are determined.

In cementless orthopedic procedures robust biologic ingrowth may be a key element to long-term implant stability and performance. Biologic ingrowth may require sufficient stability of the implant with respect to adjacent bones and/or tissues, particularly during the first 6-8 months after implantation. During this time, bone growth onto a roughened surface or into a porous surface may only occur if the implant is held stable with respect to the bone. Ideally, in order to achieve desired stability, motion of the implant relative to the bone should be less than 150 microns particularly in the liftoff (i.e. normal) and sheer (i.e. bi-directional) directions with respect to the plane of the porous or roughened surface.
Implant manufacturers routinely utilize a variety of design features to attempt to provide a press-fit that aids in limiting the movement of the implant relative to surrounding anatomical structures. Fixation features such as pegs and keels, for example, generally include designed surface textures to increase the coefficient of friction between the implant and the surrounding anatomical structures. These implant fixation features may result in increasing success of cementless implants. However, bone quality including bone density, porosity, and elastic modulus, for example, varies from patient to patient and also varies by location within a particular patient. Variability in bone quality at the location which bone contacts fixation features results in variable effect of fixation and subsequently may result in deviations of the implant stability from the design intent.

Patient specific bone preparation for consistent effective fixation feature engagement


Embodiments of systems and methods for the efficient implementation of tuners are generally described herein. Other embodiments may be described and claimed.

Electronics devices for consumers and businesses include increasingly more diverse functionalities. Among the functions being provided in various electronic systems such as computer systems, stations, client devices, mobile internet devices, television receivers, satellite receivers, and set top boxes is the reception of television signals or similar multimedia streams and delivery over one or more channels using radio frequency signals.
Received radio frequency signals are typically converted or transformed by a tuner before the signals are passed to downstream components. The conversion process typically involves the use of a local oscillator to provide a signal frequency, or commutating frequency, that is mixed with the received signal to form a zero intermediate frequency signal and/or an intermediate frequency signal or commutating frequencies. In some architectures, conversion from received signal to output may involve two frequency conversion stages. In such architectures, generation of two or more commutating frequencies requiring two or more local oscillators (LO)\phase lock loops (PLL) in one or more tuners typically results in additional cost, space, and may lead to LO interaction resulting in degraded channel quality.
It will be appreciated that for simplicity and clarity of illustration, elements illustrated in the figures have not necessarily been drawn to scale. For example, the dimensions of some of the elements may be exaggerated relative to other elements for clarity. Further, where considered appropriate, reference numerals have been repeated among the figures to indicate corresponding or analogous elements.

Apparatus and methods for efficient implementation of tuners


The disclosure describes novel technology for inferring scenes from images. In one example, the technology includes a system that can determine partition regions from one or more factors that are independent of the image data, for an image depicting a scene; receive image data including pixels forming the image; classify pixels of the image into one or more pixel types based on one or more pixel-level features; determine, for each partition region, a set of pixel characteristic data describing a portion of the image included in the partition region based on the one or more pixel types of pixels in the partition region; and classify a scene of the image based on the set of pixel characteristic data of each of the partition regions.

The specification relates to image processing. In particular, the specification relates to inferring scenes from images.
Existing solutions for image analysis often rely on computationally expensive methods such as object recognition methods, pixel-level segmentation, or scanning a detection window over an image, etc. During object recognition, these existing approaches often analyze the pixel data in the image to determine how the image should be segmented, which requires significant processing time and can thus introduce latency or lag that can annoy users. As a result, it is generally impractical to use these solutions on mobile computing devices to analyze video streams being captured by those devices in real-time.
Many existing vehicular video systems provide little or no interpretation or analysis on images captured by them, such as images captured by current rear-view cameras. These systems may overlay the road geometry with images to highlight various aspects (e.g., a footprint of a vehicle when parking), but do so without interpreting the scene depicted by the images. Also, some systems may store or share images with other vehicles in compressed or reduced form, but they generally do not provide analysis or interpretation for the images. Other specialized vehicular video systems may identify specific driving-relevant features in the image, such as lane boundaries or crosswalks; they generally do not provide a holistic scene-level analysis to characterize the image.

Computationally efficient scene classification


A system and method for enhancing a diffusion limited CVI/CVD process is provided. The system may densify a porous structure by flowing a reactant gas around the porous structure. A mass flow controller may be configured to pulse the flow rate of the reactant gas around the porous structure. The mass flow controller may pulse the flow rate from a nominal flow rate to a first flow rate. The mass flow controller may pulse the first flow rate back to the nominal flow rate or to a second flow rate. The mass flow controller may pulse the flow rate between the nominal flow rate, the first flow rate, and the second flow rate, as desired.

Chemical vapor infiltration and deposition (CVI/CVD) is a known process for making composite structures such as carbon/carbon brake disks. The CVI/CVD process typically used for making carbon/carbon brake disks is sometimes referred to as "conventional" or "isothermal" CVI/CVD. This process involves passing a reactant gas or gas mixture around heated stack of porous structures (e.g., a carbonized stack of porous structures) at absolute pressures as low as a few torr (˜400 Pa or less). The gas diffuses into the stack of porous materials, driven by concentration gradients, and undergoes a CVD reaction such as thermal decomposition, hydrogen reduction, co-reduction, oxidation, carbidization, or nitridation to deposit a binding matrix.
During CVI/CVD, pores on the exterior of a stack of porous structures may become occluded. To resolve, one may remove the stack of porous structures from the process vessel and machine the stack of porous structures to open the pores. CVI/CVD may then be resumed.

System and method for enhancing a diffusion limited CVI/CVD process


An apparatus for quantifying irradiance has a first sensor having an output for providing a reference signal of irradiance within a first band, such as the visible light band. A filter and a second sensor are in optical series so that irradiance sensed at the second sensor is filtered. The second sensor outputs a filtered signal of irradiance within the first band. The filter particularly filters irradiance in the first band as a function of irradiance in the second band, such as the UV light band. In an exemplary embodiment, the filter is made from a material that darkens with increasing UV irradiance. A processor has inputs coupled to the outputs of the first and second sensors for determining irradiance in the second band from the reference signal and the filtered signal. Mathematical formulations for the processor are provided, as are methods and a computer program embodied on a medium. A single sensor embodiment is also described.

The public has become increasingly aware of the risk of skin cancer from overexposure to sunlight. It is widely accepted that the risk lies in overexposure to radiation within the ultraviolet (UV) region, generally considered between 8*1014 Hz to about 3.4*1016 Hz. The earth's ozone layer absorbs the vast majority of UV light from the sun, so it never reaches the surface. Humans cannot see UV light very well; the cornea generally absorbs UV radiation at the shorter wavelengths, and the eye lens strongly absorbs beyond 300 nm. For this reason, the amount of sunlight-induced radiation that we perceive ourselves as being exposed to represents only a portion of the overall radiation, the visible spectrum (generally 3.84*1014 Hz to about 7.69*1016 Hz or 455-780 nm). This visible spectrum is not a good indicator of UV light exposure, and consequent risk of skin cancer, due to variations in the earth's ozone layer that vary widely in time across the earth.
U.S. Patent Publication No. 2004/0155199 A1 describes a mobile UV-intensity indicator that is mounted on a vehicle or a portable article. The UV-intensity indicator includes a UV detector and an indicator such as a display or an alarm, and warns of overexposure under UV radiation by marking in the display or sounding the alarm. That publication does not provide a particular example of the UV-intensity indicator, but does show recognition of the need for a portable monitor of UV radiation.
It has been reported that a Japanese company, Macnica, has developed a very small UV detector for use in a cellular telephone handset that may be used as part of a UV monitoring service. The Macnica sensor is sensitive to UV light between 270-410 nm, and is reported to have almost no sensitivity to visible light.
While the need for accurate monitoring or measurement of UV light is established, the above solutions are not seen as optimum for the task. Typically, currently available UV sensors are made from silicon carbide, and are relatively expensive components. What is needed in the art is a method of monitoring or measuring UV light that may be performed by less expensive hardware components.

UV radiation meter using visible light sensors


A rectilinear sectioned water rod--preferably of square cross-section--is provided with horizontal grooves for keying to bands on the inner, water rod surrounding aperture of spacers. Each spacer is constructed preferably of Inconel and includes a specialized inner band for keying to the water rod. The inner spacer member includes an upper surrounding band, a lower surrounding band, and four connecting vertical members--one positioned at each corner of the water rod. Two adjacent vertical members are bent inward to contact one side of the water rod at spaced apart points on the corners of the water rod. The remaining two adjacent vertical members are bent inward to contact the remaining two corners at single points on each vertical member. There results a six point contact between the inner band of the spacer and the water rod with four contact points on one side of the water rod aligning the spacer normal to the water rod and the remaining two points firmly biasing the spacer into its normal relationship with respect to the water rod. An over center spring member extends between two of the vertical members--preferably those two members having the four stops configured thereon. This over center spring is maintained outwardly and away from the water rod during insertion of the spacer over the water rod. When the spacer is located overlying its respective horizontal locating groove, the spring is manually tipped from its over center disposition to contact the water rod and lodge within the horizontal groove.

In nuclear fuel bundles for boiling water reactors, assembly of the fuel bundle usually occurs around the water rods associated with such fuel bundles. To set the stage for this invention, the construction and operation of such a fuel bundle will first be summarily set forth. Second, the function of the large central water rod will briefly be delineated. Finally, the construction of the "tree" consisting of the spacers and the large central water rod will be discussed.
Nuclear fuel bundles for boiling water nuclear reactors typically include a lower tie plate for supporting a matrix of upstanding fuel rods of the bundle and for admitting water. An upper tie plate is secured to the other end of the fuel rods and enables the water and generated steam to exit the fuel bundle. Since the fuel rods are long and slender, they must be braced intermittently with respect to the tie plates. This being the case, normally seven so-called spacers are placed between the upper and lower tie plates. These spacers individually surround each fuel rod at the elevation of each spacer to prevent the fuel rods from abrading contact during the generation of steam and to maintain the design clearances between the fuel rods during bundle operation.
Typically, fuel bundles include large, central water rods. These water rods exceed by many times the diameter of the fuel rods and have for their main purpose the introduction of moderating water into the upper two phase region of the fuel bundle. Specifically, and during the generation of steam, the upper portion of a fuel bundle in a boiling water reactor has the steam fraction present in the fuel bundle predominate over the water fraction. This excess of steam renders the nuclear performance of the upper portion of the fuel bundle in a boiling water reactor deficient; more moderating water is needed in the upper two phase region of the fuel bundle for efficient nuclear performance. Hence, it has become a common practice to insert large central water rods.
These large central water rods attach at the lower tie plate, and communicate pure water from the lower portion of the fuel bundle to the upper portion of the fuel bundle. Thus, the water rods supply needed moderator to the upper two phase region of the fuel bundle.
As large central water rods have found their way into almost all boiling water nuclear fuel assembly designs, they have also entered into the construction of such fuel bundles. In the assembly of such fuel bundles, the spacers are first attached to the large water rods and registered at their respective water rod surrounding apertures to form a "tree" configuration. Thereafter, the individual fuel rods are threaded through the spacers at each successive fuel rod surrounding aperture to and towards one of the tie plates. The threaded rods pass successively through each rod aperture in each successive spacer until all such fuel rods are held firmly in place. Once all the fuel rods are in place, the remaining tie plate is attached and the fuel assembly--consisting of the tie plates, large central water rod, spacers, and fuel rods is ready for placement into the fuel channel.
Large central water rods are usually circular in cross-section; in the case under consideration here, the large central water rods are rectilinear in section--preferably square in cross-section.

Spacer capture method for rectilinear sectioned water rods


A flexible, efficient and easy-to-use computer security management system effectively evaluates and responds to informational risks on a wide variety of computing platforms and in a rapidly changing network environment. An individual computer system dynamically monitors its end user, without regard to network connectivity, in order to calculate a risk score and to ensure that the end user's behavior does not put corporate information or other assets at risk. Data regarding such risks and responses are analyzed and stored in real-time.

As corporations have grown, their computer needs and the corresponding computational infrastructures have increased in both size and complexity. Thousands or tens-of-thousands of computers may be connected to each other, even within a single organization. Numerous computer users, or end users, may have access to each computer. At any given time, each computer may be connected to or disconnected from a corporate intranet, the Internet, or another communications network. In addition, through the various networked computers, each end user may have access to sensitive, important and valuable corporate information. Information Technology managers are often tasked with preventing disclosure of this information to unauthorized individuals while simultaneously facilitating ubiquitous access to the same information by authorized individuals. While satisfying these difficult and often competing goals for a few end users is challenging, the problem increases exponentially as the number of end users grows.
In a typical corporate environment, several host computer systems are interconnected internally over an intranet to which individual workstations and other network resources are connected. These intranets, also known as local area networks (LANs), make legacy databases and information resources widely available for access and utilization throughout the organization. These same corporate resources also can be connected directly, or through wide area networks (WANs), to remote computational resources located throughout the Internet. By way of the Internet, external end users can be given restricted access to select corporate resources, such as a corporate website, for the purpose of completing limited transactions or data transfer.
Most current networks are based on the Transmission Control Protocol/Internet Protocol (TCP/IP) suite, such as that described in W. R. Stevens, "TCP/IP Illustrated," Vol. 1, Ch. 1, Addison-Wesley (1994). Computer systems and network devices employing the TCP/IP suite implement a network protocol stack, which includes a hierarchically structured set of protocol layers. In addition, other networking protocols and various network mediums have been implemented globally, creating a diverse and vibrant virtual universe.
The growth of distributed computing environments, especially those connected to the Internet, has created an increased need for computer security, particularly for protecting operating system and application software and stored data. Typically, a wide range of security applications and techniques are employed to ensure effective security. For example, firewalls and intrusion detection systems are necessary to combat would-be network intruders, the so-called "hackers" of the networking world. Similarly, antivirus scanning applications must be regularly executed and, equally importantly, updated, to detect and eradicate computer viruses, Trojan horses, and other forms of unauthorized content. Together, firewalls, intrusion detection systems, antivirus applications, and the like create a formidable array of reactive security applications.
In addition to these reactive security applications, dynamic security applications are increasingly being employed to combat external attacks. For example, vulnerability scanners probe and identify potential security risks and concerns within a company's network. Likewise, "honey pot" or decoy host systems create the illusion of a network of enticing, relatively unguarded, virtual hosts within which a would-be hacker can be tracked, traced, and identified.
While dynamic and reactive security applications form a powerful arsenal of defensive and offensive security tools, installing, configuring, and maintaining security applications, particularly on remote client systems, can be complex and time-consuming. Generic security management applications generally fail due to variations in installed hardware, operating system type and patch level, and application sets and version levels for each client system. Consequently, each client system must be individually evaluated before any changes are effected, a task which only adds more time to an already tedious process.
In addition to employing security applications, an organization will often implement security policies to maximize the effectiveness of the security applications in place. One security policy might require that individual client passwords be changed every month, or that they be established according to predetermined security guidelines. Another security policy might mandate that sensitive documents be password protected or encrypted. Access to secured information may also be restricted to include only highly trusted individuals.
Even within a given site, security policies may vary significantly and require different settings depending upon the platform and organizational needs. A uniform security policy might cause too much inconvenience to employees with limited informational access, while simultaneously leaving high-level executives' extremely sensitive information relatively unguarded. Furthermore, typical security policies, once established, do not provide any mechanism for automatic self-configuration. In essence, they follow a "one size fits all" approach.
Often, the time required to properly configure and maintain a network site grows dramatically with each installed platform. As networks expand, the problem of tracking and securing sensitive information, limiting external vulnerabilities, and providing universal informational access to authorized individuals can quickly overwhelm even the most sophisticated Information Technology department.
Finally, as use of the networked universe and the applications which leverage the network has grown, so too has each end user's responsibility for ensuring security. With growing network utilization, applications have become more complex and often overwhelm even experienced end users. These end users may inadvertently expose the networks and corporate intellectual property to security risks without knowing that they are doing so. Also, the growing complexity of computer systems may allow end users with malicious intent to more easily hide their efforts.


This disclosure is directed to the methods of enhancing hematopoietic stem cells (HSPC) and progenitor cell (HSPC) engraftment procedure. Treatment in vivo of a HSPC donor with compounds that reduce PGE2 biosynthesis or PGE2 receptor antagonists alone, or in combination with other hematopoietic mobilization agents such as AMD3100 and G-CSF, increases the circulation of available HSPCs. Compounds that reduce the cellular synthesis of PGE2 include non-steroidal anti-inflammatory compounds such as indomethacin. Treatment ex vivo of HSPC with an effective amount of PGE2 or at least one of its derivatives such as 16,16-dimethyl prostaglandin E2 (dmPGE2), promotes HSPC engraftment. Similar methods may also be used to increase viral-mediated gene transduction efficacy into HSPC.

Hematopoietic stem and progenitor cell (HSPC) transplantation is a proven therapy for the treatment of certain malignant and nonmalignant hematologic diseases and metabolic disorders. Sources of HSPC for transplantation include bone marrow, mobilized peripheral blood, and umbilical cord blood (UCB) (Goldman and Horowitz, 2002; Fruehauf and Seggawiss, 2003: Broxmeyer, et al., 2006). Physicians routinely perform transplants of bone marrow, mobilized peripheral blood stem cells and umbilical cord blood. These procedures require that sufficient numbers of hematopoietic stem and progenitor cells be harvested from healthy normal donors, or from patients before they develop a given condition or while they are in remission. The harvested materials are subsequently administered to patients whose hematopoietic system and presumably its diseased or malformed tissues and cells have been eradicated. After transplantation, the transplanted stem cells travel to or "home" to the appropriate bone marrow microenvironment niches, lodge within such niches, proliferate and produce new stem cells, a process called self-renewal (Porecha, et al., 2006; Broxmeyer, 2006; Hall et al., 2006). The cells also differentiate into lineage restricted progenitor cells and mature cells, thus restoring the blood forming hematopoietic system necessary for the health of the recipient. Progenitor cells are usually present in the transplanted materials and may be required in these grafts in order to produce mature cells. However, since progenitor cells are not stem cells and cannot self-renew, they participate in transplant therapy for only a limited period of time.
Because the transplant procedure stresses the transplanted material, a successful transplant requires that sufficient cells be transplanted to account for cells killed or damaged during the procedure. This presents a large problem for the transplant of umbilical cord blood grafts as these grafts include very limited numbers of stem cells. For this reason, cord blood grafts usually cannot be used to successfully transplant adults. Similarly 10-25% of patients and normal donors fail to mobilize sufficient cells for use in transplant procedures. In some patient populations, particularly those treated with some chemotherapeutic agents, failure to mobilize is seen in upward of 50% of patients. In general, the more cells that can be transplanted the greater the likelihood that the transplant will be successful, for example, current best practices recommend that peripheral blood stem cell transplantation procedures typically require minimum administration of approximately 2 million CD34+ cells per kilogram of recipient patient body weight, the more CD34+ cells that can be acquired and subsequently transplanted, the better the patient outcome (Pulsipher, 2009).
Inadequate stem cell number, inability to migrate/home to appropriate marrow niches, or poor engrafting efficiency and self-renewal of hematopoietic stem and progenitor cells can adversely affect transplant outcome, measured by the multi-step process of repopulation. Numerous approaches have been tried to try and expand the number of human hematopoietic stem and progenitor cells within isolated grafts in ex vivo settings with limited success. Strategies to improve HSPC transplantation efficacy is needed to overcome the challenge faced by the medical profession. Some aspects and embodiments of the invention disclosed herein address this need.

Materials and methods to enhance hematopoietic stem cells engraftment procedures

Indiana University Research & Technology Corporation


Flight management systems and control methods for meeting a required time of arrival (RTA) with reduced fuel burn. The method can account for probabilistic wind forecast uncertainty in RTA calculations by reformulating the speed and thrust profile problem as a multi-stage stochastic program, using a wind forecast uncertainty model to generate scenario sets for the fuel optimization problem. The method can iteratively calculate a fuel-efficient advised air speed for achieving an RTA over a flight path with an arbitrary number of recourse points.

1. Technical Field
Various implementations of the disclosed technology relate to flight management systems and control methods and, more particularly, flight management systems and control methods for meeting a required time of arrival with reduced fuel burn. Various implementations of the disclosed technology also relate to systems and methods for modeling wind forecast uncertainty.
2. Description of Related Art
Projected increased traffic loads in the national airspace as well as growing operational inefficiencies have motivated the development of trajectory based operations (TBO), specifically 4-D trajectories (4DT). The inclusion of 4DT-based technologies is meant to mitigate the impact of increased traffic loads on delays, cost of operation, and the environment by improving both an aircraft's ability to meet schedule constraints mid-flight, as well as the ground's ability to foresee and adjust to operational uncertainties.
Current aircraft systems enable 4DT and TBO via the Required Time of Arrival (RTA) mode in the on-board flight management system (FMS). The FMS calculates the control authority required to meet an assigned RTA by considering the distance to the RTA fix, the performance capabilities of the aircraft, and the forecasted wind along the aircraft's route. However, real world uncertainties in the forecasted wind speeds can lead to errors in time-to-fix calculations as forecast error aggregates over the course of the flight. In many cases, flight time prediction accuracy only improves to an acceptable level once the RTA fix is relatively close. By this point, excessive control effort beyond the aircraft's performance capabilities may be required to meet the assigned RTA, leading to increased fuel burn, emissions, and missed RTA assignments.
Conventional FMS RTA technologies lack robustness in two primary areas of operation: fuel expenditure required to meet an assigned RTA, and the ability to calculate a workable control schedule to meet an assigned RTA given known conditions. Both of these shortcomings can be attributed in large part to wind forecast uncertainty along the aircraft's planned route. Conventional FMS RTA technologies typically consider only a deterministic wind speed forecast. As these conventional technologies are unable to account for uncertainty in the forecasted wind speeds, a conventional FMS cannot consider all possible scenarios, including wind scenarios more favorable to the aircraft, in which an FMS can meet an assigned RTA.

Systems and methods providing a fuel-efficient RTA implementation with uncertain winds

Abstract: Methods for creating wind forecast uncertainty models applicable to a variety of routes through a given airspace, and for use with the flight management systems and control methods. An example wind forecast uncertainty model can be position-specific, data-driven and based on a Markov chain representing error values between historical wind speed data and forecasted wind speed data long a planned flight route or between an origin-destination pair.


The present invention provides an electron amplification plate placed between a first substrate and a second substrate of a field emission display device. The electron amplification plate comprises at least two insulating layers for electrical insulation; and at least one conductive electrode layer having plural apertures, wherein the conductive electrode layer is sandwiched between the insulating layers. The surface of the inner wall of the apertures is coated with an electron-amplifying material for multiplying the quantity of electrons as the surface is impacted. The inner wall of each aperture comprises an upper concave wall and a lower concave wall, and the lower concave wall is used for collecting electrons, and the upper concave wall is used for focusing electrons. Thereby, the electron beam emitted from the emitters can be effectively amplified, and color purity of the field emission display device is high.

1. Field of the Invention
The present invention relates to an electron amplification plate and, more particularly, to an electron amplification plate used in a field emission display device.
2. Description of Related Art
Many contemporary apparatuses, such as a computer, a television, a mobile phone, a personal digital assistant, or a vehicle information system, show signals through controlling a display device. Flat panel display devices, such as a liquid crystal display device, an organic light emitting display device, and a field emission display devices are the preferred display devices due to their low weight, small volume, and little effect to people's health. Among these flat panel display devices, the field emission display device (FED) has the advantages of good picture quality, high yield, short response time, easy-coordinating display characteristics, brightness of over 100 ftL, low weight, minimal thickness, large color-temperature range, good operation efficiency, and wide viewing angle. Compared with the field emission display device, the viewing angle, the range of operation temperature, and the response speed of the conventional liquid crystal display device are small. Besides, the field emission display device performs with high brightness even under sunlight because it is provided with a phosphor layer and it emits light without need for an additional back light module. Therefore, the field emission display device is considered to be the display device, which has ability to compete with or replace the liquid crystal display device.
Under a vacuum circumstance lower than 10−6 torr, the field emission display device can generate electrons from the emitters on the cathode electrode while supplying an electric field. The electrons emitted from the emitters are subsequently attracted by the positive voltage applied to the anode electrode to thereby impact the phosphor powder and illuminate at the same time. It is known that the electric field supplied to the cathode electrode affects a quantity of the electrons emitted from the emitters. In other words, the larger the electric field supply to the cathode electrode, the more electrons are emitted from the emitters. However, the gate electrode disposed around the emitters has a shape of a ring. As a result, the electric field is not uniform because the electric field is formed in the peripheries of the emitters by the difference in voltage between gate electrode and cathode electrode. For this reason, the dispersion of the electrons emitted from the emitters is presented with a ring shape, which results in disproportionate image brightness and decreases the picture quality of the field emission display device.
Therefore, it is desirable to provide an improved field emission display device to mitigate and/or obviate the aforementioned problems.

Electron amplification plate for field emission display device

Industrial Technology Research Institute