A power supply includes circuitry for gradually enabling switching rectifiers during a startup condition without drawing current from a pre-biased power supply output. A driver provides a control signal to synchronous rectifier. A driver supply circuit is coupled across the driver and has a first input receiving pulse signals provided by a pulse modulation controller, an output providing supply voltage to the driver, a second input receiving driver supply input voltage, and circuitry defining a time constant. The circuitry includes a first switching element that turns on when pulse signals are provided and a second switching element connected to the output. The time constant is associated with a rise time for the power supply, and defined by selected component values, such that the second switching element only becomes fully conductive after elapsing of the time constant.

The present invention relates generally to switched-mode power converters with circuitry controlling synchronous rectification. More particularly, the present invention relates to circuits for controlling the operation of synchronous rectifiers during a startup condition into pre-biased output voltage such that reverse current flow is reduced or eliminated.
DC-DC power converter devices are currently applied in numerous applications of power systems. These converters are electronic devices that convert a direct current (DC) input voltage into a predetermined, or nominal, DC output voltage. A typical isolated DC-DC converter includes a transformer with primary and secondary windings about a common magnetic core. A typical non-isolated converter does not require a transformer, but may instead comprise a simple DC input terminal. In either case, one or more power switches are provided that may be opened and closed to control energy transfer. In various examples of DC-DC converters, such as 5V or 12V output converters previously in common use, free-wheeling diodes were used to prevent reverse current flow from the converter output into the switching circuitry when a switch was closed. However, the use of diodes to perform this function resulted in significant inefficiencies such as power loss. These inefficiencies are even more significant in a relative sense for low output voltage converters and power supplies.
Synchronous rectification has become a desirable alternative to free-wheeling diodes in power converters due to the increased power conversion efficiency that results at least in part from reduced power losses and higher density. However, while free-wheeling diodes only permit current flow in one direction, synchronous rectifiers such as bipolar transistors, MOSFETs, or other equivalent semiconductor switches permit current flow in either direction. As a result, such converters may have both current-sourcing and current-sinking functions.
A problem common to many output power stages of power supplies employing synchronous rectification is therefore the drawing of current from a pre-existing voltage, or pre-biased output voltage, also known as reverse bias or back bias, during certain sequences such as startup or shutdown conditions. Pre-biased voltage may come from other power sources in a non-isolated system, or may come from a load. During a soft-start condition, the synchronous rectifiers may have a high duty ratio for the duration of the output voltage rise time of the power supply. Where a pre-biased voltage exists, a negative current may then be built in the filtering inductor, which may cause the output voltage to drop and correspondingly disturb other elements in the system.
FIG. 1 shows a typical prior art circuit for providing bias voltage to the synchronous rectifier driver 18 in a non-isolated converter. Q1 in this example represents a control rectifier while Q2 represents a synchronous rectifier.
FIG. 2 shows a typical prior art circuit for providing bias voltage to the synchronous rectifier driver 18 in an isolated converter. Q1 and Q2 in this example both represent synchronous rectifiers.
In either circuit as shown, the output voltage is measured across a filtering LC circuit and fed back to an error amplifier 14. The error amplifier 14 compares the feedback voltage to a reference voltage. During normal operation the error amplifier 14 may then produce no further signals, but during predetermined conditions such as a system startup for example the error amplifier 14 may instead provide a signal to the pulse width modulator (PWM) controller 16, which supplies a series of pulse signals to the driver 18 indicative of the condition. The driver 18 then provides control signals to rectifiers Q1, Q2 based on the pulse signals from the PWM controller 16 and having an amplitude associated with a driver supply input voltage V_driver.
However, immediately enabling the rectifiers Q1, Q2 in the presence of pre-biased voltage leads to reverse current flow of the inductor current. During the output voltage rise time period that is inherent to the specific power device, the reverse current flow is a significant problem as described above. Some prior art circuits have addressed this problem with circuits and methods that are undesirable for certain applications because they require additional circuitry for detecting system parameters or voltage clamping. These are generally impracticable where less space is physically available on a circuit board, and also cause additional problems due to increased numbers of components and cost.
Therefore, it is desirable that a circuit be provided for controlling synchronous rectifiers in a manner that reduces or eliminates reverse bias current draw.
It is further desirable that a circuit be provided for providing the above capabilities during a predetermined condition such as a soft start period for a power converter.
It is further desirable that the circuit efficiently and cost-effectively provide the above capabilities, with the ability to design for a broad range of foreseeable applications and outputs.

Circuit for controlling synchronous rectifiers during start-up into pre-biased output voltage


A buffer circuit is selectively operative in one of at least a first mode and a second mode as a function of a first control signal supplied to the buffer circuit. The buffer circuit includes interface circuitry operative to receive at least second and third control signals referenced to a first voltage level, and to generate an output signal referenced to a second voltage level, the second voltage level being greater than the first voltage level. The output signal is a function of the second control signal in the first mode and is a function of the third control signal in the second mode. The buffer circuit further includes at least first and second circuit portions coupled to the interface circuitry, each of the first and second circuit portions including at least one control input operative to receive the output signal generated by the interface circuitry.

Certain portable devices, including wireless handsets, notebook computers and personal digital assistants (PDAs), often employ circuitry which runs on two or more different voltage levels. For instance, circuitry utilized with such portable devices may be configured so that a portion of the circuitry, such as, for example, input/output (IO) buffers, runs at a higher voltage level (e.g., about 3.3 volts), as may be supplied by an IO voltage source, while another portion of the circuitry, such as, for example, core logic, runs at a substantially lower voltage level (e.g., about 1.0 volt), as may be supplied by a core voltage source. This difference in voltage levels often necessitates the use of a voltage level translator circuit for interfacing between the multiple voltage levels.
There are many applications which employ bidirectional buffer circuits including an input stage and an output stage. Some bidirectional buffer circuits utilize programmable control signals (e.g, buffer enable, pull-up, pull-down, etc.) generated, for example, by core logic circuitry that are applied to both the input and output stages of the buffer. Each of these control signals requires voltage level translation, typically by way of a voltage level translator circuit, in order to change the voltage level of the signal from the lower core voltage level to the higher voltage level of the IO driver. Unfortunately, however, each voltage level translator circuit consumes a significant amount of chip area in an integrated circuit device, and therefore the number of voltage level translator circuits in the integrated circuit should be minimized.
Accordingly, there exists a need for an improved buffer circuit that does not suffer from one or more of the problems exhibited by conventional buffer circuits.

Buffer circuit having multiplexed voltage level translation


One embodiment of the present invention sets forth a technique for reducing overhead associated with transmitting primitive draw commands from memory to a graphics processing unit (GPU). Command pairs comprising an end draw command and a begin draw command associated with a conventional graphics application programming interface (API) are selectively replaced with a new construct. The new construct is a reset topology index, which implements a combined function of the end draw command and begin draw command. The new construct improves efficiency by reducing total data transmitted from memory to the GPU.

1. Field of the Invention
Embodiments of the invention relate generally to draw commands for graphics, and more specifically to a restart index that sets a topology.
2. Description of the Related Art
In conventional graphics processing systems, an application programming interface (API), such as OpenGL, is used to convey scene information comprising primitive draw commands from a user application to a rendering engine. The rendering engine typically includes a graphics processing unit (GPU) configured to receive the primitive draw commands via buffers residing in memory. The OpenGL API includes explicit begin and end draw commands used to delineate primitive draw commands within an overall command sequence. Primitive draw commands are placed between a begin draw command and an end draw command as part of the overall command sequence, which is conventionally generated by the user application and transmitted via the API to the GPU for rendering. While begin and end draw commands enable the user application to delineate primitive draw commands within the overall command sequence, the begin and end draw commands also introduce overhead in the overall command sequence.
In common usage scenarios, primitive draw commands for different types of primitive topologies are typically intermixed within the overall command sequence. As scene complexity increases and finer scene detail becomes more common, command sequences are incorporating a greater portion of smaller primitives of different intermixed topologies. As a result, overhead in the command sequence is becoming more significant, thereby diminishing overall performance.
Accordingly, what is needed in the art is a technique for reducing the overhead associated with transmitting primitive draw command sequences.


In one example, an electronic system includes, a user interface comprising an input device, a first actuator and a second actuator, the first and second actuators dually actuated by the input device, and a controller, including a comparator, a programmable device, and executable instructions residing in non-transitory memory thereon to, receive first and second output signals from the first and second actuators, respectively, convert the first and second output signals to first and second real-time logic states at the comparator, input the first and second real-time logic states from the comparator to the programmable device, and determine a fault status of the first and second actuators based on the first and second logic states input to a state machine of the programmable device, wherein the first and second logic states input to the state machine include the real-time logic states and historical logic states stored at the controller.

Radiographic imaging systems may be used in medical and industrial applications as a less-invasive means to obtain images of an inner anatomy of a patient. Interventional radiology utilizes radiographic image-guided procedures to diagnose and treat internal organ ailments in real-time. Because the imaging and treatment procedures may be conducted concurrently in vivo, industry standards (e.g., IEC 60601) mandate continuous activation and dual switches for interventional radiology control systems. For example, in order to execute a control command, an operator may continually actuate a dually-actuated input device. Conventionally, fault tolerance in control systems can include providing dual redundant systems. For example, in computing systems, a duplicate set of devices, such as duplicate CPU's, switches, and/or nodes, and the like, may be incorporated into a system; as such, in the case where one set of hardware fails, data transmission may be preserved by utilizing the redundant set of devices. For dual switch control systems, such as those utilized in interventional radiology, fault tolerance is generally lacking; during conditions where one of the dually activated switches fail, the control command outright fails to execute.
The inventors have recognized potential issues with the above approaches. Namely, providing for redundant hardware systems is expensive, and increases system complexity. Furthermore, housing dual redundant hardware can be unwieldy and cumbersome especially in settings such as operating and surgery suites where dual switch control systems for medical technologies may be employed. Further still, in the absence of fault tolerance, dual switch controls may outright fail even when only one of the dual switches experiences a fault or error, including transient errors due to causes such as intermittent power fluctuations, electromagnetic interference, deteriorating wire connections, short circuits, and the like. For dual switch control systems employed in more sensitive applications such as interventional radiology, outright failure of the control system can have medically undesirable consequences since the failure may occur during real-time imaging and treatment of a patient. Further still, the severity of these undesirable consequences can far outweigh the risk to the dual switch control system functionality, especially when a failure may be transient in nature.

Methods and systems for operating an electronic system


The disclosure includes using dilation of speech content from an interlaced audio input for speech recognition. A learning model is initiated to determine dilation parameters for each of a plurality of audible sounds of speech content from a plurality of speakers received at a computer as an audio input. As part of the learning model, a change of each of a plurality of independent sounds is determined in response to an audio stimulus, the independent sounds being derived from the audio input. The disclosure applies the dilation parameters, respectively, based on the change of each of the independent sounds. A voice print is constructed for each of the speakers based on the independent sounds and the dilation parameters, respectively. Speech content is attributed to each of the plurality of speakers based at least in part on the voice print, respectively, and the independent sounds.

The present disclosure relates to techniques, using a computer, for speech recognition of speech content from an audio input. More particularly, the audio input includes interlaced speech content and translation or conversion of the speech content to text.
Techniques, using a computer, can be used to translate human speech to text. Human speech can include, for example, spoken words, singing, singularly or in a group. During human speech, the translation of a speech output or a speech output signal being translated to text can be challenging. For example, speech recognition and translation can be challenging when sounds are changed or less common than typical phonetics of words. For example, sounds can be elongated or intermixed with other noise or noises. In one example, there may be background noise when a speaker is speaking. In another example, a group of speakers may be speaking and there can be overlap of speakers. In another example, background noise may occur when one or more speakers are speaking. In another example, a speaker may change the typical phonetics of one or more words unintentionally, or intentionally for emphasis, or as part of an unorthodox or atypical speech pattern, or as part of an accent. Such changed and/or atypical sounds when a speaker speaks results in challenging speech for speech identification and translation from speech to text.

Speech recognition using data analysis and dilation of interlaced audio input

International Business Machines Corporation


A controller sets a target operation position and controls an operation position of a wastegate in accordance with the target operation position in a position control mode. The controller sets a target drive force and controls a drive force of the wastegate in accordance with the target drive force in a drive force control mode. The controller controls the wastegate in the position control mode when a boost pressure of an engine is less than or equal to a preset value and controls the wastegate in the drive force control mode when the boost pressure is greater than the preset value.

The present disclosure relates to a controller and a control method for a wastegate. The wastegate is provided in a bypass passage that allows exhaust gas to bypass the turbine wheel of an exhaust turbine-type forced-induction device.
As described in Japanese Laid-Open Patent Publication No. 2015-214935, some of the controllers for wastegates of exhaust turbine-type forced-induction devices control a boost pressure of the engine by performing feedback control in which the operation position of the wastegate detected by a sensor is a control amount and the drive force of the wastegate is an operation amount.
The feedback control of the operation position produces detection errors in the sensor that detects the operation position and errors resulting from machining tolerances of the wastegate or components of the actuator. In particular, in a high-boost region, slight differences in the operation position of the wastegate cause the boost pressure to vary to a large extent. This makes it difficult to ensure the control accuracy of the boost pressure in the feedback control of the operation position.
Thus, in some cases, the conventional controller is unable to properly control the operation of the exhaust turbine-type forced-induction device depending on the running state of the engine.

Controller and control method for wastegate


A brake control device that controls braking forces applied to wheels to stabilize the behavior of a vehicle turning a corner, and includes a turning condition detection unit detecting a turning condition of the vehicle; a braking amount setting unit setting braking amounts for the respective wheels based on the turning condition detected by the turning condition detection unit; a brake control unit applying braking forces to the wheels according to the braking amounts set by the braking amount setting unit; and a road surface friction coefficient estimation unit estimating a road surface friction coefficient of the road on which the vehicle is running. The braking amount setting unit changes upper limits of the braking amounts for the respective wheels according to the road surface friction coefficient when the vehicle is in a center differential lock mode or a direct four-wheel drive mode.

Vehicle behavior control devices control braking forces applied to individual wheels of a vehicle turning a corner according to the behavior of the vehicle. Meanwhile, when a center differential of a vehicle is locked, the rotational speeds of the rear wheels are restricted by those of the front wheels. Therefore, if a vehicle behavior control device is used while a center differential is locked, an unintended braking force or driving force may be applied to a wheel, and the balance between the front and rear wheels in terms of the anti-spin moment and the tire lateral force may change. Patent document 1 discloses a vehicle behavior control device intended to solve this problem. The disclosed vehicle behavior control device stops engine output control and brake control on the wheels while a center differential is locked to prevent undesired effects of vehicle behavior control.    [Patent document 1] Japanese Patent Application Publication No. 2000-344077


Row driving circuits drive a plurality of kinds of pixels in each scanning line. Column reading circuits read from the plurality of kinds of pixels in each column. A column selection circuit for GR colors selects outputs of the column reading circuits in even numbered columns, and a column selection circuit for GB colors selects outputs of the column reading circuits in odd numbered columns. In this way, in a predetermined line, only G signals are output from the column selection circuit for GR colors, and only B signals are output from the column selection circuit for GB colors. Similarly, in the next line, only R signals and only G signals are output from the selection circuits. By amplifying outputs of the column selection circuits with independent amplifications, pixel color based amplifications are possible. Amplifications can be changed in each line, and therefore the resolutions can be improved and outputs with good S/N ratio can be obtained with low speed devices.

1. Technical Field of the Invention
The present invention relates to solid-state image pickup elements such as color image sensors that have improved resolution and S/N ratio, and solid-state image pickup apparatuses using the same.
2. Conventional Technology
In recent years, a variety of solid-state image pickup apparatuses that use solid-state image pickup elements such as image sensors to obtain moving pictures or still-frame pictures have been developed. A color image sensor includes pixels that are composed of photodiodes and transistors, and the pixels are two-dimensionally arranged in an array to obtain two-dimensional images.
Pixel signals obtained by the photodiodes of the respective pixels are retrieved through the transistors. In this case, for example, all the pixels in one line are simultaneously selected, and supplied to a column reading circuit in the form of voltages or currents. Further, the pixel signals are sent from the column reading circuit to a column selection circuit, where the pixels are selected one by one and output.
In the color image sensor, pixels that respond to different wavelengths (colors) are alternately disposed, and color components are detected with a plurality of adjacent pixels of different colors. For example, filters of R (red), G (green) and B (blue) colors are appropriately disposed for each of the pixels to realize color imaging.
A so-called "Bayer" arrangement is often used as a pixel arrangement when, for example, a single plate type image pickup system is used. In a Bayer arrangement, green segments are arranged in a checkered pattern, and red and blue segments are alternately disposed in lines sequentially. In other words, although green segments exist at every other pixel in each line, green segments exist at every other pixel only in each odd numbered line, and blue segments exist at every other pixel only in each even numbered line.
Therefore, in this case, in one line, pixels are arranged in green, red, green, red, . . . , and in the next line, pixels are arranged in blue, green, blue, green, . . . There are a variety of other methods as to in what order color pixels are disposed and how colors are selected, but they are similar to one another in that color pixels are alternately disposed.
FIG. 5 is a block diagram of a conventional solid-state image pickup apparatus that uses the image sensor described above.
An image sensor 1 sequentially outputs analog pixel signals. An amplifier circuit 2 adjusts clamp levels according to optical black, and amplifies input pixel signals to output levels that are within a specified range. Outputs of the amplifier circuit 2 are converted into digital signals by an ADC (analog-to-digital converter) 3, and then supplied to a signal processing circuit not shown.
In this manner, pixels in each line are output one by one from the image sensor. Therefore, for example, when a Bayer arrangement is adopted, green pixels and red pixels are alternately output in one line, and green pixels and blue pixels are alternately output in the next line.
However, the transmittance of green filters is different from the transmittance of red filters or blue filters, and output levels of the solid-state image pickup element are higher in green pixels than in red or blue pixels. If the gain of the amplifier circuit is set according to green pixels, the output levels of the amplifier circuit for red pixels and blue pixels become relatively small, and thus the dynamic range of the ADC is not fully utilized, and their resolutions lower.
It is possible that the amplification of the amplifier circuit is changed for each of the colors; but in this case, the amplification needs to be changed for each of the pixels, which requires an extremely fast control and therefore is not practical.
The present invention is made in view of the problems described above, and one object is to provide a solid-state image pickup element that can set optimum amplifications for outputs from a sensor according to colors to thereby improve its resolution and S/N ratio, and a solid-state image pickup apparatus using the same.

Solid-state image pickup element having improved resolution and signal to noise ratio and solid-state image pickup apparatus using the same


Methods of operating nonvolatile memory devices include testing a plurality of strings of nonvolatile memory cells in the memory device to identify at least one weak string therein having a higher probability of yielding erroneous read data error relative to other ones of the plurality of strings. An identity of the at least one weak string may be stored as weak column information. This weak column information may be used to facilitate error detection and correction operations. In particular, an error correction operation may be performed on a first plurality of bits of data read from the plurality of strings using an algorithm that modifies a weighting of the reliability of one or more data bits in the first plurality of bits of data based on the weak column information. More specifically, an algorithm may be used that interprets a bit of data read from the at least one weak string as having a relatively reduced reliability relative to other ones of the first plurality of data bits.

Semiconductor memory devices are generally classified into volatile memory devices and nonvolatile memory devices. The volatile memory devices have a high read/write speed but lose data stored therein when power supply thereto is interrupted. On the other hand, the nonvolatile memory devices retain data stored therein even when power supply thereto is interrupted. Therefore, the nonvolatile memory devices are used to store data that must be retained regardless of power supply. Examples of the nonvolatile memory devices include Mask Read-Only Memory (MROM) devices, Programmable Read-Only Memory (PROM) devices, Erasable Programmable Read-Only Memory (EPROM) devices, and Electrically Erasable Programmable Read-Only Memory (EEPROM) devices.
Recently, a demand for higher capacity semiconductor memory devices is increasing with a sudden change in the mobile trend. Accordingly, the number of bits stored in one memory cell is increasing. For example, Multi-Level Cell (MLC) memory devices storing multi-bits in one memory cell are being universalized. Also, the number of memory cells integrated in the same area is increasing. However, the reliability of stored data decreases with an increase in the integration density and an increase in the number of bits stored in an MLC. What is therefore required is a technology for increasing the reliability of stored data while satisfying a demand for the massiveness of memory devices.

Methods of performing error detection/correction in nonvolatile memory devices


A smart window configured to transition between a substantially transparent state and a dimmed state. The smart window includes a first substantially transparent conductive layer; an ion storage layer on the first substantially transparent conductive layer; an electrolyte layer on a side of the ion storage layer away from the first substantially transparent conductive layer; an electrochromic layer on a side of the electrolyte layer away from the ion storage layer; a second substantially transparent conductive layer on a side of the electrochromic layer away from the electrolyte layer; and an antenna layer configured to receive wireless power transmissions to provide energy for the smart window to transition between the substantially transparent state and the dimmed state. An orthographic projection of the electrochromic layer on the first substantially transparent conductive layer substantially covers an orthographic projection of the antenna layer on the first substantially transparent conductive layer.

Electrochromism is a phenomenon in which a material exhibits a reversible electrochemically-mediated change in an optical property when placed in a different electronic state, typically by being subjected to a voltage change. The optical property is typically one or more of color, transmittance, absorbance, and reflectance. Examples of electrochromic materials include tungsten oxide (WO3). Tungsten oxide is a cathodic electrochromic material in which a coloration transition, transparent to blue, occurs by electrochemical reduction.

Smart window, smart window system, method of operating smart window, and method of fabricating smart window

Beijing BOE Technology Development Co., Ltd.


A brake pad backing (1) for a drum brake has a backing surface (2) that receives at least one friction pad (3). At least one opening (4, 4″) arranged inside the backing surface (2) is produced by shaping a material section (5, 5′) of the brake pad backing (1) so that when the friction pad (3) is pressed onto the backing surface (2), the material section (5, 5′), together with the opening (4, 4′), forms an impression cavity (6). The material section (5, 5′) projects from the brake pad backing (1) at one or more prescribed angles α in the pressing direction (7). In addition, a lateral guide (20) to guide the brake pad backing plate (1) in the housing of the brake assembly such as, for example, the brake drum, may be formed by bending or folding the edge (8) of the brake pad backing plate (1). The bent edge (8) is provided on several edge sections (11, 12, 13) of the appertaining lengthwise side (10) of the brake pad backing plate (1) that lie to the side of the backing surface (2) for the friction pad (3).

Brake pads can be attached to the brake pad backing of the brake assembly in different ways. In drum brakes, nowadays the brake pad is generally glued onto the usually metal brake pad backing and/or affixed thereto by means of rivets. The brake pad can also be attached to the brake pad backing by directly pressing the friction material onto the brake pad backing, whereby in this case, an adhesive has to be applied onto the brake pad backing prior to the pressing procedure.

Backing for brake devices, especially drum brakes, backing/friction lining unit and backing support of a pressing device


Embodiments of the present disclosure relate to a method for allocating computing resources, an electronic device, and a corresponding computer program product. The method may include: obtaining an available resource list associated with a computing resource requester according to determination that a resource use request from the computing resource requester is received, wherein the available resource list includes the number and available time periods of computing resources that can be provided by at least one computing resource provider. In addition, the method further includes: allocating computing resources to the computing resource requester based on the available resource list and the resource use request, so that the computing resource requester uses the allocated computing resources to run a workload. The embodiments of the present disclosure can flexibly allocate the computing resources, thereby realizing full utilization of the computing resources.

Currently, server computing resources of a data center or a large enterprise are often not fully utilized. For example, computing resources owned by a data center can usually be divided into in-use computing resources and backup computing resources. The backup computing resources can usually be used successively as the company's business grows, or when the in-use computing resources are not available, the backup computing resources can replace unavailable parts of the in-use computing resources. The backup computing resources here are not fully utilized most of the time. For another example, the computing resources of the data center are used during working hours and are idle during other periods. The idle computing resources here are not fully utilized.

Method for allocating computing resources, electronic device, and computer program product


A device for an operator sitting in the driver's seat of a vehicle to deposit a quantity of material at a target location on the ground adjacent the passenger side of the vehicle, from a hopper having a discharge aperture and a valve for selectively opening and closing the discharge aperture. The hopper is removably mountable to the passenger side of the vehicle. A discharge tube is operatively associated with the hopper discharge aperture and extends from the hopper, for receiving material from the hopper and discharging the material substantially at ground level adjacent the passenger side of the vehicle. A controller within reach of the driver and operatively associated with the valve permits opening and closing the valve and thereby selectively depositing a controlled quantity of granular material.

The present invention relates to the precise, ground level distribution of controlled quantities of granular material, particularly pest suppressants, at a multiplicity of distinct locations
Mosquito vector control in the United States has traditionally been carried out by State, County and Local Health Departments and their contractors. The elimination of mosquitoes as a health hazard and public nuisance is most effectively accomplished by treating stagnant water with a granular mosquito larva-killing product commonly referred to as "larvicide". Larvicide works by melting across the surface of stagnant water where the female mosquito lays hundreds of eggs after ingesting a blood meal from a warm blooded animal, including humans. The mosquito larva ingests the larvicide treated water, and dies soon after. Certain species of mosquitoes can transmit life threatening illnesses to humans. Many of these species lay their eggs in common "catch-basins"; also know as "storm-drains" which are found along roadways in mostly in urban and suburban settings, areas of high human population. These structures have inherent in their design, a "sump" at the bottom of the basin which collects silt and other debris. This "sump" is also notorious for holding stagnant water for long periods. The female mosquito which transmits West Nile Virus to humans is known to lay eggs in these "sumps". An untreated catch-basin can become a nursery for literally tens of thousands of mosquitoes.
Common practice of most health departments in applying larvicide to catch-basins has in the past involved scooping larvicide from a pail and pouring it directly into the basin. This task is normally at least a two-person function, and is highly labor intensive, messy, and potentially hazardous to the person administering the larvicide if conducted from the rear of pick-up trucks or from golf cart style vehicles, particularly in high-traffic areas.


In a solid immersion lithography apparatus, the final element of the projection system is maintained at a distance of less than about 50 nm from the substrate by an actuator system. The final element may be formed as two parts, with a fluid, e.g. a liquid, confined between them. The actuator system may be controlled relative to a reference frame, which may be supported by a bearing. Backscatter detection can be used to determine if the distance between the final element and the substrate is too large. A cleaning device can clean the substrate between exposures.

A lithographic apparatus is a machine that applies a desired pattern onto a substrate, usually onto a target portion of the substrate. A lithographic apparatus can be used, for example, in the manufacture of integrated circuits (ICs). In that instance, a patterning device, which is alternatively referred to as a mask or a reticle, may be used to generate a circuit pattern to be formed on an individual layer of the IC. This pattern can be transferred onto a target portion (e.g., including part of, one, or several dies) on a substrate (e.g., a silicon wafer). Transfer of the pattern is typically via imaging onto a layer of radiation-sensitive material (resist) provided on the substrate. In general, a single substrate will contain a network of adjacent target portions that are successively patterned.
Lithography is widely recognized as one of the key steps in the manufacture of ICs and other devices and/or structures. However, as the dimensions of features made using lithography become smaller, lithography is becoming a more critical factor for enabling miniature IC or other devices and/or structures to be manufactured.
A theoretical estimate of the limits of pattern printing can be given by the Rayleigh criterion for resolution as shown in equation (1):
                    CD        =                              k            1                    *                      λ            NA                                              (        1        )            where λ is the wavelength of the radiation used, NA is the numerical aperture of the projection system used to print the pattern, k1 is a process dependent adjustment factor, also called the Rayleigh constant, and CD is the feature size (or critical dimension) of the printed feature. It follows from equation (1) that reduction of the minimum printable size of features can be obtained in three ways: by shortening the exposure wavelength λ, by increasing the numerical aperture NA or by decreasing the value of k1.
In order to shorten the exposure wavelength and, thus, reduce the minimum printable size, it has been proposed to use an extreme ultraviolet (EUV) radiation source. EUV radiation is electromagnetic radiation having a wavelength within the range of 10-20 nm, for example within the range of 13-14 nm. It has further been proposed that EUV radiation with a wavelength of less than 10 nm could be used, for example within the range of 5-10 nm such as 6.7 nm or 6.8 nm. Such radiation is termed extreme ultraviolet radiation or soft x-ray radiation. Possible sources include, for example, laser-produced plasma sources, discharge plasma sources, or sources based on synchrotron radiation provided by an electron storage ring. However, although EUV lithography should enable a significant reduction in pitch, significant problems with it still remain to be solved. Therefore, there is interest in other, alternative lithography techniques.
One alternative lithography technique is so-called solid immersion lithography (SIL). This is was described in "Alternative Optical Technologies—More than curiosities?" by Bruce Smith (Optical Microlithography XXII, edited by Harry J. Levinson, Mircea V. Dusa, Proc. of SPIE Vol. 7274, 727402 (2009)).

Lithographic apparatus and device manufacturing method


An object of the present invention is to provide a packing material for solid phase extraction, ensuring excellent recovery of not only a hydrophobic substance but also an ionic substance by having hydrophobicity and an ion exchange group at the same time, and a solid phase extraction method, a packing apparatus, and a method for treating a sample, using the packing apparatus. A packing material for solid phase extraction of the present invention is a particle obtained by copolymerizing a hydrophobic monomer (A) and a hydrophilic monomer (B) and introducing thereinto an ion exchange group, in which the ion exchange group is introduced without impairing the hydrophobic site. The present invention also provides a solid phase extraction method, a packing apparatus for solid phase extraction and a method for treating a sample, using the packing material.

The present invention relates to a packing material for solid phase extraction, having a hydrophobic group and an ion exchange group within a particle, and also relates to a solid phase extraction method, a packing apparatus and a method for treating a sample, using the packing material.
A liquid-liquid extraction method has been heretofore used for extracting a sample from a liquid in many cases, however, this method has a problem in that the operation is cumbersome, a large amount of a solvent is used and the solvent used greatly affects the environment and the human body. At present, with the progress of synthesis methods, a solid phase extraction method using silica-based or synthetic polymer-based porous particles is used, where the operation is simple, the amount of solvent used is small and a large amount of sample can be automatically treated.
The packing material for use in the solid phase extraction includes those using an inorganic substrate, such as chemical bond-type silica gel where the surface of silica gel is subjected to a chemical modification with an octadecyl group to render the surface of the packing material hydrophobic, and those using an organic substrate, such as synthetic polymer represented by styrene-divinylbenzene. These packing materials utilize a hydrophobic interaction between the hydrophobic group of the packing material and the hydrophobic group of a sample, and therefore, are not suitable for the pretreatment operation of an ionic substance.
Accordingly, an ion exchange resin has been used for the operation of pretreating an ionic substance by solid phase extraction, however, since the ion exchange resin is obtained by introducing an ion exchange group into the surface of silica gel or a hydrophilic synthetic polymer or by introducing an ion exchange group into a hydrophobic substrate resin to change the property thereof to be extremely hydrophilic, the interaction between the packing material and a sample is only an ion exchange activity.
As such, in the case of conventional packing materials for solid phase extraction, the hydrophobic interaction or ion exchange activity of the packing material particle is used independently and studies have not been satisfactorily made on a packing material particle for solid phase extraction having different properties at the same time.
An object of the present invention is to obtain a packing material having excellent capabilities by studying conventional packing materials for solid phase extraction each having a property of bringing about a hydrophobic interaction or ion exchange activity independently, and a packing material having a hydrophobic site and an ion exchange site at the same time within a particle.
As a result of continuous and extensive investigations to overcome the above-described problems, the present inventors found that a packing material for solid phase extraction ensuring excellent recovery of samples including a hydrophobic substance and an ion exchange substance can be obtained by introducing an ion exchange site while not impairing the hydrophobic site within a particle, thereby having both properties. The present invention has been accomplished based on this finding.
More specifically, the present invention relates to the following embodiments.
[1] A packing material for solid phase extraction, comprising a synthetic polymer obtained by copolymerizing a hydrophobic monomer (A) and a hydrophilic monomer (B) and introducing thereinto an ion exchange group by a chemical modification.
[2] The packing material for solid phase extraction as described in [1] above, which contains an aromatic divinyl compound as the hydrophobic monomer (A) in an amount of 30% by mass or more based on the total amount of monomers.
[3] The packing material for solid phase extraction as described in [1] or [2] above, which contains an N-vinylcarboxylic acid amide as the hydrophilic monomer (B) in an amount of 5 to 60% by mass based on the total amount of monomers.
[4] The packing material for solid phase extraction as described in [3] above, wherein the N-vinylcarboxylic acid amide is N-vinyl-2-pyrrolidone or N-vinylacetamide.
[5] The packing material for solid phase extraction as described in any one of [1] to [4] above, which contains a (meth)acrylic acid ester of a polyhydric alcohol having a hydroxyl group as the hydrophilic monomer (B) in an amount of 10% by mass or more based on the total amount of monomers.
[6] The packing material for solid phase extraction as described in [5] above, wherein the (meth)acrylic acid ester of a polyhydric alcohol having a hydroxyl group is glycerol dimethacrylate.
[7] The packing material for solid phase extraction as described in any one of [1] to [6] above, wherein the ion exchange group is introduced by covalent bonding.
[8] The packing material for solid phase extraction as described in any one of [1] to [7] above, wherein the ion exchange group covalently bonded is a sulfo group or a quaternary ammonium.
[9] The packing material for solid phase extraction as described in any one of [1] to [8] above, wherein the amount of the ion-exchange group covalently bonded is 5xcexc-equivalent or more based on 1 dry gram of the packing material.
[10] The packing material for solid phase extraction as described in any one of [1] to [9] above, which is used by packing it in a packing apparatus.
[11] The packing material for solid phase extraction as described in [10] above, wherein the packing apparatus is a column, a cartridge or a reservoir.
[12] The packing material for solid phase extraction as described in any one of [1] to [11] above, which is used for concentrating an objective component and/or removing impurities or contaminants.
[13] The packing material for solid phase extraction as described in any one of [1] to [12] above, which has an average particle size of 1 to 200 xcexcm.
[14] A method comprising using the packing material for solid phase extraction described in any one of [1] to [13] above in solid phase extraction employing a column switching method.
[15] A column for solid phase extraction, which is packed with the packing material for solid phase extraction described in any one of [1] to [13] above.
[16] A cartridge for solid phase extraction, which is packed with the packing material for solid phase extraction described in any one of [1] to [13] above.
[17] The column for solid phase extraction as described in [15] above, which is used for concentrating an objective component and/or removing impurities or contaminants.
[18] The cartridge for solid phase extraction as described in [16] above, which is used for concentrating an objective component and/or removing impurities or contaminants.
[19] A solid phase extraction method for an environment-related, medical or biological sample, which uses the column for solid phase extraction described in [15] or [17] above.
[20] A solid phase extraction method for an environment-related, medical or biological sample, which uses the cartridge for solid phase extraction described in [16] or [18] above.
[21] The method as described in [19] above, which is performed for the purpose of identification or quantification of a drug sample in serum.
[22] The method as described in [20] above, which is performed for the purpose of identification or quantification of a drug sample in serum.

Packing material for solid phase extraction and solid phase extraction method


The present invention relates to a process for the preparation of tetrahydrogeraniol, wherein the product mixtures and distillation residues from linalool, citronellal, citronellol or geraniol/nerol synthesis are fed directly to catalytic hydrogenation.

The present invention relates to a process for the preparation of tetrahydrogeraniol, where the product mixtures and distillation residues from linalool, citronellal, citronellol or geraniol/nerol synthesis are fed directly to catalytic hydrogenation.
Tetrahydrogeraniol (3,7-dimethyloctanol) is an important intermediate in industrial organic synthesis and is used as a scent in its own right or as an additive in soaps and detergents.
The preparation of tetrahydrogeraniol by hydrogenation of unsaturated precursors such as citral, citronellol or citronellal, or nerol/geraniol has been known for a long time. As long ago as 1912, the hydrogenation of citral over palladium was described (Ipatjew, Chem. Ber., 45, 1912, 3222). The hydrogenation of citral over metals on potassium-graphite supports is described in Savoia, Tagliavini, Trombini, Umani-Ronchi J. Org.Chem., 1981, 46, 5344-5348. Tetrahydrogeraniol is obtained in a yield of 95% over Ni/graphite catalysts. In 1993, the hydrogenation of citronellol to give tetrahydrogeraniol over a Pd/C catalyst succeeded in yields of 93%. The hydrogenation of 3,7-dimethyloctanal over a homogeneous (NiCl2(PPh3)2) catalyst was documented in J. Chem. Soc. Chem. Com. 1995 (Iyer, Varghese (4), 465-466). It succeeds in a yield of 57%.
The hydrogenation of precursors that are already expensive to prepare and are present in pure form, such as citral, nerol or geraniol, does not make commercial sense. Total hydrogenation, eg. in the preparation of nerol/geraniol is inadvisable due to the poor separability of tetrahydrogeraniol from the unsaturated products.
It is an object of the present invention to provide an economical process for the preparation of tetrahydrogeraniol by the reaction or the use of residues that are obtained during the preparation of linalool, citronellal, citronellol or geraniol/nerol.
There is a need for a process whereby the hydrogenation of the residues from the abovementioned partial hydrogenations or rearrangements, particularly from linalool synthesis, can be conducted at high conversion and with good yields, selectivity and catalyst lifetime.
We have found that this object is achieved, surprisingly, by a process for the preparation of tetrahydrogeraniol, wherein the product mixtures and distillation residues resulting from linalool, citronellal, citronellol or geraniol/nerol synthesis are fed directly to catalytic hydrogenation.
Suitable starting materials include all product mixtures or distillation residues comprising more than one compound of the following basic structure of the general formula I
where
R1 is OH, H, CH3
R2, R3 are H, OH, CH3
R4 is H, CH3,
and one to four double bonds can be present at any site in the molecule.
The product mixtures or distillation residues preferably comprise more than one compound selected from the group consisting of nerol, geraniol, isonerol 2, citral, citronellol, 3,7-dimethyloctanal, isonerol 1, citronellal, linalool (from top to bottom in the formula scheme, linalool is not shown).
If, for example, the residues obtained from linalool synthesis (Table 1) are used, the total liquid phase concentration of linalool and geraniol/nerol of the residue or product mixture used is less than 30% by weight, preferably less than 20% by weight, particularly preferably less than 10% by weight. The total quantity of citronellol and isonerol is more than 50% by weight, preferably more than 80% by weight.
If, for example, the residues obtained from nerol/geraniol synthesis (Table 2) are used, the liquid phase content of usable products (geraniol and isonerols) is just under 60%.
If, for example, the residues obtained from a citronellal synthesis (Table 3) are used, the liquid phase content of usable products is just below 90%.
If, for example, the residues obtained from a citronellol synthesis (Table 4) are used, the liquid phase content of usable products (geraniol and isonerol) is 95%.
Suitable hydrogenation catalysts include in principle all hydrogenation catalysts that can be used for the hydrogenation of olefinic double bonds (eg. Houben Weyl, Methoden der organischen Chemie, Volume 4/1c).
Particularly suitable hydrogenation catalysts are catalysts that contain, as active components, elements selected from the group consisting of copper, silver, gold, iron, cobalt, nickel, rhenium, ruthenium, rhodium, palladium, osmium, iridium, platinum, chromium, molybdenum and tungsten, in each case in metallic form (eg. as Ra catalyst, oxidation state 0) or in the form of compounds, such as oxides, which are reduced to the corresponding metal under the process conditions.
The catalytically active components copper, silver, gold, iron, cobalt, nickel, rhenium, ruthenium, rhodium, palladium, osmium, iridium, platinum, chromium, molybdenum and/or tungsten are generally present in the catalytically active mass of the catalyst in quantities in the range from 0.1 to 80% by weight, preferably from 0.1 to 70% by weight, particularly preferably from 0.1 to 60% by weight, calculated as the metal in the oxidation state 0.
Preferred catalysts comprise elements as catalytically active components that are selected from the group consisting of copper, silver, cobalt, nickel, ruthenium, rhodium, palladium, platinum, chromium and molybdenum, in particular selected from the group consisting of copper, cobalt, nickel and palladium, in each case in metallic form (oxidation state 0) or in the form of compounds, such as oxides, which are reduced to the corresponding metal under the process conditions.
Particularly preferred catalysts are those with Co, Ni, Cu, Ru, Pd and/or Pt as active components. These can be used as unsupported catalysts, as supported catalysts or as activated metal catalysts (Raney catalysts).
The catalytically active mass of these preferred catalysts further comprises the support materials aluminum oxide (Al2O3), zirconium dioxide (ZrO2), titanium dioxide (TiO2), carbon and/or oxygen-containing compounds of silicon, in general in total quantities in the range from 20 to 99.9% by weight, preferably from 30 to 99.9% by weight, particularly preferably from 40 to 99.9% by weight, based on SiO2.
Of the Raney catalysts, catalysts such as Raxe2x80x94Ni are preferably used. Raxe2x80x94Co, Raxe2x80x94Coxe2x80x94Nixe2x80x94Fe, Raxe2x80x94Nixe2x80x94Coxe2x80x94Fexe2x80x94Cr or Raxe2x80x94Ni and Raxe2x80x94Co with doping of other transition metals are used in water-free form, or else in water-moist or solvent-free form.
The hydrogenation catalysts used in the process of the invention can be prepared by processes described in the prior art and can sometimes also be obtained commercially.
The hydrogenation can be carried out batchwise or continuously. To make comparatively large quantities ( greater than 500 t/a), a continuously operated hydrogenation is advisable.
The reaction can be carried out in a suspension or in a fixed bed. A continuously operated fixed bed variant can be operated by trickle or liquid-phase methods. Gas phase hydrogenation can also be considered.
Suspension hydrogenation can be carried out batchwise, generally in liquid phase.
For all variants, temperatures are chosen in the range from 20 to 250xc2x0 C., preferably from 30 to 200xc2x0 C., particularly preferably from 50 to 180xc2x0 C.
The pressure is generally selected in the range from 1 to 250 bar, preferably from 5 to 200 bar, particularly preferably from 10 to 100 bar.
The hydrogenation by the process of the invention can be carried out either with or without a solvent, for example alcohols such as methanol, ethanol, propanol, butanol, aliphatic or aromatic hydrocarbons such as toluene, xylene, cyclohexane, ethers such as THF, dioxane, methyl tert-butyl ether.
However, it is preferred to carry out the hydrogenation without a solvent.
The examples which follow illustrate the invention.
Linalool Synthesis
At the bottom of the column, geraniol/nerol is isomerized to give linalool with a homogeneously dissolved catalyst and the linalool formed is continuously distilled off, so that a steady state linalool concentration of from 3 to 8% is set in the liquid phase. Geraniol/nerol is continuously added to the liquid phase at the same rate at which linalool is distilled off. High boilers, and also citronellol and isonerols build up in liquid phase. When a content of, for example, 20% by weight of high boilers, 16% by weight of citronellol and 24% by weight of isonerol I+II is attained, the addition of geraniol/nerol is ceased and the remaining geraniol/nerol in the liquid phase is further isomerized and distilled off as linalool. Isomerization is continued until the total liquid phase content of linalool, geraniol/nerol is 10% by weight or less.
The pressure is then continuously reduced from 135 mbar to 5 mbar (only by way of example) and citronellol and isonerols, together with the remaining linalool, are distilled off. Composition: 35% of lin, 31% of citronellol, 34% of isonerol I+II. The residue (see Examples 1 to 4) is then, according to the invention, hydrogenated there or somewhere else.


Embodiments include devices and methods, including a method for processing a substrate. The method includes providing a substrate including a first portion and a second portion, the first portion including a feature, the feature including an electrically conductive region, the second portion including a dielectric surface region. The method also includes performing self-assembled monolayer (SAM) assisted structuring plating to form a structure comprising a metal on the dielectric surface region, the feature being formed using a process other than the SAM assisted structuring plating used to form the structure, and the structure being formed after the feature. Other embodiments are described and claimed.

A common issue during assembly of electronic devices is a change in components late in the design cycle or the need for different types of components in the same product.
One approach for addressing this problem is to have multiple footprints on a substrate, with each of the footprints configured to fit a particular component during final assembly and each of the footprints being electrically coupled to the die field so that during assembly the desired component can be positioned on the selected footprint region. Such an approach results in unused area on the board (the footprint region(s) that are not used) and can lead to potential signal integrity issues where the open lines in an unused footprint region can impact the signal quality.

Electronic devices with components formed by late binding using self-assembled monolayers


A semiconductor device includes an interlayer insulating film containing Si, O, C, and H, an under-bump metal film disposed over the interlayer insulating film and containing Ni, and a bump electrode disposed over the under-bump metal film. In the interlayer insulating film, a ratio of a peak height of Si—CH3 near a wave number 1270 cm−1 to a peak height of Si—O near a wave number 1030 cm−1 obtained by Fourier-transform infrared spectroscopy (FTIR) is 0.15 or greater and 0.27 or less. A ratio of a peak height of Si—CH2—Si near a wave number 1360 cm−1 to the peak height of Si—CH3 near the wave number 1270 cm−1 is 0.031 or greater.

The present invention relates to a semiconductor device and a manufacturing method thereof.
To improve the reliability of semiconductor apparatuses, various semiconductor device structures have been proposed in recent years.
Japanese Unexamined Patent Application Publication (Translation of PCT Application) No. 2008-530821 discloses a dielectric material serving as an interlayer insulating film of a semiconductor device as described below. The dielectric material contains Si, C, O, and H atoms and has a three-dimensional network structure. The peak area regarding the expansion or contraction of CH2 or CH3, the expansion or contraction of SiH, and a SiCH3 bond obtained by Fourier transform infrared spectroscopy (FTIR) falls within a predetermined range standardized by the thickness of the dielectric film. The porosity of the dielectric material exceeds 20%. For this reason, it is believed that a low-permittivity dielectric film exhibiting good electronic and mechanical properties can be provided.
Japanese Unexamined Patent Publication No. 2006-237278 discloses a semiconductor device including a bump electrode as described below. The semiconductor device includes a pad electrode, an under-bump metal film, and an Au bump electrode. The under-bump metal film includes a TiW film and an Au film. The thicknesses of the TiW and Au films of the under-bump metal film meet a predetermined formula. For this reason, it is believed that occurrence of cracks in the under-bump metal film in a flip chip bonding step can be controlled.

Semiconductor device and manufacturing method thereof


A display capable of suppressing the increase in current consumption is disclosed. The display comprises a first transistor connected to a first potential, a second transistor connected to a second potential, a third transistor for turning off the first transistor when the second transistor is in on state, a fourth transistor connected to the first potential, a fifth transistor connected to the second potential, and a sixth transistor operated to turn off when the third transistor is in on state and also operated to turn off the fourth transistor when the fifth transistor is in on state.

1. Field of the Invention
The present invention relates to a display, or in particular to a display having shift register circuits.
2. Description of the Background Art
A conventional inverter circuit of resistance load type having a load resistance is known. This inverter circuit is disclosed, for example, in Seigo Kishino: "Basis of Semiconductor Device" published by Ohmsha, Ltd., pp. 184-187, Apr. 25, 1985.
Also, a conventional shift register circuit having the inverter circuit of resistance load type described above is known. The shift register circuit is used with a circuit for driving the gate line and the drain line of, for example, a liquid crystal display and an organic EL display. FIG. 13 is a circuit diagram of the conventional shift register circuit having an inverter circuit of resistance load type. The conventional first-stage shift register circuit 104a1 shown in FIG. 13 is configured of a first circuit section 104b1 and a second circuit section 104c1. The shift register circuit 104a2 in the stage following the shift register circuit 104a1 is configured of a first circuit section 104b2 and a second circuit section 104c2.
The first circuit section 104b1 of the first-stage shift register circuit 104a includes n-channel transistors NT101, NT102, a capacitor C101 and a resistor R101. In the description of the prior art that follows, the n-channel transistors NT101, NT102, NT103 are referred to as the transistors NT101, NT102, NT103, respectively. The drain of the transistor NT101 is supplied with a start signal ST, and the source thereof is connected to a node ND101. The gate of the transistor NT101 is connected to a clock signal line CLK1. Also, the source of the transistor NT102 is connected to the negative potential (VSS), and the drain thereof is connected to a node ND102. Further, one of the electrodes of the capacitor C101 is connected to the negative potential (VSS), and the other electrode thereof is connected to the node ND101. A resistor R101 is interposed between the node ND102 and the positive potential (VDD). The transistor NT102 and the resistor R101 make up an inverter circuit.
The second circuit section 104c1 of the first-stage shift register circuit 104a1 is configured of an inverter circuit including a transistor NT103 and a resistor R102. The source of the transistor NT103 is connected to the negative potential (VSS), while the drain thereof is connected to the node ND103. The gate of the transistor NT103 is connected to the node ND102 of the first circuit section 104b1. A resistor R102 is interposed between the node ND103 and the positive potential (VDD). An output signal SR1 of the first-stage shift register circuit 104a1 is output from the node ND103. The node ND103 is connected with the first circuit section 104b2 of the second-stage shift register circuit 104a2.
The shift register circuits in the second and subsequent stages are configured similarly to the first-stage shift register circuit 104a1. The first circuit section of the shift registers in the following stage is connected to the output node of the shift register circuit in the preceding stage.
FIG. 14 is a timing chart of the conventional shift register circuit shown in FIG. 13. Next, with reference to FIGS. 13 and 14, the operation of the conventional shift register circuit is explained.
First, a L-level start signal ST is input as an initial mode. After the start signal ST is raised to H level, the clock signal CLK1 is raised to H level. As a result, the gate of the transistor NT101 of the first circuit section 104b1 of the first-stage shift register circuit 104a1 is supplied with the H-level clock signal CLK1, thereby turning on the transistor NT101. Thus, the H-level start signal ST is applied to the gate of the transistor NT102 thereby to turn on the transistor NT102. The potential of the node ND102 is then reduced to L level, and therefore the transistor NT103 is turned off. The potential of the node ND103 increases so that a H-level signal is output as an output signal SR1 from the first-stage shift register 104a1. This H-level signal is supplied also to the first circuit section 104b2 of the second-stage shift register circuit 104a2. By the way, the H-level potential is stored in the capacitor C101 as long as the clock signal CLK1 is at H level.
Next, the clock signal CLK1 is reduced to L level. As a result, the transistor NT101 is turned off. After that, the start signal ST is reduced to L level. In the process, even though the transistor NT101 turns off, the potential of the node ND101 is held at H level by the H-level potential stored in the capacitor C101, and therefore the transistor NT102 is kept on. Since the potential of the node ND102 is held at L level, the gate potential of the transistor NT103 is held at L level. As a result, the transistor NT103 is kept off, and therefore, a H-level output signal continues to be output as an output signal SR1 from the second circuit section 104c1 of the first-stage shift register circuit 104a1.
The clock signal CLK2 input to the first circuit section 104b2 of the second-stage shift register circuit 104a2 is raised to H level. In the second-stage shift register circuit 104a2, therefore, the H-level clock signal CLK2 is input with the H-level output signal SR1 input from the first-stage shift register circuit 104a1. Thus, the operation similar to the first-stage shift register circuit 104a1 is performed. As a result, a H-level output signal SR2 is output from the second circuit section 104c2 of the second-stage shift register circuit 104a2.
After that, the clock signal CLK1 is raised again to H level. The transistor NT101 of the first circuit section 104b1 of the first-stage shift register circuit 104a1 is turned on. In the process, the potential of the node ND101 drops to L level since the start signal ST is at L level. The transistor NT102 turns off, and therefore the potential of the node ND102 is raised to H level. As a result, the transistor NT103 is turned on, and the potential of the node ND103 is reduced to L level from H level. The L-level output signal SR1 is output from the second circuit section 104c1 of the first-stage shift register circuit 104a1. By the operation described above, H-level output signals (SR1, SR2, SR3 and so forth) shifted in timing are sequentially output from the shift register circuits in the respective stages.
In the first-stage shift register circuit 104a1 of the conventional shift register circuit shown in FIG. 13, however, the transistor NT102 is held in on state during the period when the output signal SR1 is at H level, and therefore, a through current inconveniently flows between the positive potential VDD and the negative potential VSS through the resistor R101 and the transistor NT102. Also, during the L-level period of the output signal SR1, the transistor NT103 is held on, and therefore, the through current inconveniently flows between the positive potential (VDD) and the negative potential (VSS) through the resistor R102 and the transistor NT103. Regardless of whether the output signal SR1 is at H level or L level, therefore, the through current always inconveniently flows between the positive potential (VDD) and the negative potential (VSS). The shift register circuits in other stages also have a similar configuration to the first-stage shift register circuit 104a1. Like the first-stage shift register circuit 104a1, therefore, the through current always inconveniently flows between the positive potential VDD and the negative potential VSS regardless of whether the output signal is at H or L level. As a result, in the case where the conventional shift register circuit described above is used as a circuit for driving the gate line or the drain line of a liquid crystal display or an organic EL display, the problem is posed that the current consumption of the liquid crystal display or the organic EL display, as the case may be, increases.

This patent is subject to a terminal disclaimer.


A joint detector detects a joint in an adhesive tape supplied from a tape supply section, and a computing unit determines a suitable cutting position of the adhesive tape for removing the joint in accordance with the detected results. A controller controls each mechanism to operate so as to satisfy the determined results by the computing unit. Thereafter, the adhesive tape including the joint is cut and removed.

1. Field of the Invention
This invention relates to adhesive tape joining method and apparatus for joining an adhesive tape to building materials including a large panel and a long object such as a strut and a reinforcing member.
2. Description of the Related Art
Recently adhesive tapes have been often used instead of conventional adhesives containing organic agents upon joining of the reinforcing member to the panel or building materials to each other. Moreover, adhesive tapes have been used for protecting a surface of the panel as a building material.
These building materials tend to larger in size for improved efficiency in assembling the materials. Consequently, in order to improve efficiency in joining the adhesive tape as many long or large building materials are to be used, an adhesive tape having a long length is used in which adhesive tapes of a predetermined length are joined to one another. In other words, a period of time to stop a joining apparatus required for exchanges of the adhesive tape tends to be reduced. See "Handbook of Adhesion", the third edition published in Oct. 1, 2005 by Japan Adhesive Tape Manufactures Association, 527-533.
In use of the adhesive tape in which adhesive tapes of a predetermined length are joined to one another, however, a following problem may arise. That is, where a joint is inserted into a joining portion of the building materials, the building materials have difference thickness due to the joint, and thus float may be occur on the joint. As a result, poor joining may arise.
Moreover, although an adhesive tape is used for protection of a panel, unnecessary pressure is to be applied to the joint portion having a large thickness when the panel is stacked for accommodation and handling, for example, thereby leading to bending of the panel inwardly or cracks in the panel.

Adhesive tape joining method and adhesive tape joining apparatus


Construction systems for constructing a structure on a foundation and methods relating thereto are disclosed. In an embodiment, the construction system includes a rail assembly configured to be mounted to the foundation. In addition, the construction system includes a gantry movably disposed on the rail assembly configured to translate along a first axis relative to the rail assembly. Further, the construction system includes a printing assembly movably disposed on the gantry and configured to translate along a second axis relative to the gantry. The second axis is orthogonal to the first axis. The printing assembly is configured to deposit vertically stacked layers of an extrudable building material on the foundation to construct the structure. The gantry has a width along the second axis that is configured to be adjusted relative to the foundation.

This disclosure is generally directed to the construction of structures (e.g., dwellings, buildings, etc.). More particular, this disclosure is directed to the construction of structures utilizing additive manufacturing techniques.
Structures (e.g., dwellings, buildings, sheds, etc.) may be manufactured with a multitude of different materials and construction methods. Among the materials commonly used in the construction of structures is concrete. For example, concrete may be used to form the foundation as well as the exterior walls of a structure.

Systems and methods for the construction of structures


A lightweight, attachable and detachable vehicle seat removal, transport, and reinstallation apparatus is disclosed, including a chassis, casters mounted to the chassis, a seat rear support pin coupled to the chassis for engaging a seat rear attachment of the vehicle seat, and a locking forward pin attached to the chassis for engaging a forward seat attachment of the vehicle seat. A method of vehicle seat removal is disclosed, including positioning one or more seat skates behind a seat such that the seat skates are aligned with vehicle seat attachment means, rotating the vehicle seat upward, rolling the one or more seat skates forward such that the one or more seat skates straddle respective vehicle seat attachment means, rotating the one or more seat skates upward, latching rear seat attachments of the vehicle seat to seat rear support pins of the seat skates, and lowering the vehicle seat for transport.

Automotive seats have been developed by many vehicle manufacturers to include means for latching, removal, and reinstallation. Able to remove one or more seats, a user may reconfigure the interior of the vehicle to suit various needs for transporting, for example, passengers and various amounts of cargo and/or baggage. Both single and bench seats are usually rather heavy, however, and a widely realized problem with such automotive seats is that once unlatched from the vehicle floor they can be awkward and difficult to lift and transport, requiring significant physical effort on the part of one or more users. Once removed from the vehicle, the seats may further be difficult not only to move about and store, but to eventually return to the vehicle for reinstallation. Some existing solutions are implemented as carriages that attach to the bottoms of the automotive seats or benches and include mechanisms for extending and retracting casters. These carriages tend to be heavy, complicated, and limiting in the case where the user may wish to use the apparatus to remove, move, and reinstall on one or more other vehicles. Indeed, attaching and detaching the carriage from the seat multiple times may be time consuming and requiring of substantial physical effort. Moreover, such complicated designs may lead to elevated manufacturing and acquisition expenses. Other solutions include permanently attached carriages that connect to specially designed features in the vehicle floor and are thus disadvantageously non-portable for use with multiple vehicles.
There is therefore a need for a lightweight, adjustable, affordable, portable, and easily attachable and detachable means enabling a user to conveniently remove single and bench seats from various vehicles, transport a seat from a vehicle to a storage location, transport the seat back to the vehicle, and finally reinstall the seat in the vehicle.

Method and apparatus for removing, installing, and transporting automotive seats


A cooktop burner assembly is described. The cooktop burner assembly includes a main burner, and a simmer burner located below the main burner, where a diameter of the simmer burner is greater than a diameter of the main burner. The closer placement of the main burner to a cooking vessel placed on top of the cooktop burner assembly as compared to the placement of the simmer burner from the cooking vessel increases thermal efficiency. Moreover, the farther placement of the simmer burner from the cooking vessel facilitates simmering of items in the cooking vessel and the larger diameter of the simmer burner reduces a possibility of overheating the main burner and the cooking vessel.

This invention relates generally to gas burners and more particularly to gas burners used as surface heating units in cooking appliances and apparatus and methods for improving operation of such burners.
For gas burners used as surface heating units in cooking appliances such as ranges and cooktops, a high turndown ratio, which is a ratio of maximum output to minimum output, is often desirable. For a given burner, the maximum output typically signifies the "power" or "speed" of the burner and the minimum output is related to the simmer capability of a burner. The maximum output is limited by system gas flow handling capabilities and safety considerations. The minimum output is limited by the ability of the burner to maintain a stable flame under transient pressure fluctuation conditions such as may be caused by air currents in the room, or sudden opening or closing of under the cooktop's cabinet doors or oven door.
Either horizontal or vertical staging of cooktop burners is used for improving cooking performances. A horizontally staged burner uses two or more rings of gas outlets or ports that are staged radially in a somewhat horizontal plane. The inner most stage is often used for simmer while all the combined stages are used for power cooking. In a vertically staged burner, either of two stages can be used for simmer while the combination of both stages is utilized for power cooking. In a vertically staged burner, if the simmer stage is the lower of two stages then this configuration has the added advantage of distance between the flame and a pot placed on top of the cooktop burner. Nevertheless, the above limitations on performance also apply to the horizontally and vertically staged burners.
A vast majority of gas burners used in cooking applications are partially pre-mixed burners using both primary-air and secondary-air. Based on whether the primary-air is drawn from above the cooktop or below the cooktop, these burners are either top-breathers or down-breathers respectively. Top-breather burners sometimes referred to as open or non-sealed burners, are insensitive to pressure fluctuations due to oven or cabinet doors but are sensitive to room air currents. The turndown of these burners is also limited due to lower port loading design constraints. In down-breather burners, also referred to as sealed burners, there is no gap around the burner to allow spills or air to get inside the cooktop. The sealed burners are sensitive to pressure fluctuations under the cooktop.
The partially-premixed burners generally use a venturi to induce primary-air into the burner and mix it with the fuel gas ejecting from the gas orifices. Venturi design has been traditionally mostly empirical or experimental. A burner designer looks at the physical geometrical constraints and then uses scaling factors or past experience to design the venturi. Optimization is also by trial-and-error. This does not fully exploit the potential of the venturi and slows down the design process and compromises performance of the partially-premixed burners.

Dual stacked gas burner and a venturi for improving burner operation


The electrical performance of a dielectric film for capacitive coupling in an integrated structure is enhanced by forming the polycrystalline electrically conductive layer coupled with the dielectric film substantially unigranular over the coupling area, commonly to be defined by patterning the stacked dielectric and conductive layers. The process forms a polycrystalline silicon film having exceptionally large grains of a size on the same order of magnitude as the dimensions of the patterned details. These exceptionally large grains are obtained by preventing the formation of xe2x80x9cprecursor nucleixe2x80x9d of subsequent grain formation and growth at the deposition interface with the dielectric that are apparently formed during the first instants of silicon CVD deposition and by successively growing the crystallites at a sufficiently low annealing temperature.

This invention relates to techniques for polycrystalline silicon (polysilicon) deposition for the fabrication of a semiconductor integrated device, and, more particularly, to the formation of a layer of polysilicon on a dielectric layer.
The scaling down toward ever smaller integrated structures and the consequent reduction of operating voltages, as well as of the thickness of dielectric layers for capacitive coupling, aggravates the criticality of residual imperfections in the dielectric. These imperfections occur during the process of formation of the dielectric layer and/or are induced in the dielectric film during the successive steps of fabrication of the integrated device that includes several different thermal treatments.
In highly critical dielectric layers, like for instance in the case of the tunnel oxide in a FLASH or EEPROM memory structure for the capacitive coupling between a floating gate patterned from a deposited polycrystalline silicon layer, eventually doped in-situ, and a drain region of the underlying monocrystalline silicon semiconductor, it is generally accepted that the dielectric properties may be affected by the characteristics of the layers interfacing or being coupled therewith. An interface layer may typically be polycrystalline silicon which is the conductor material interfaced to the dielectric film. Another critical dielectric layer is the so-called xe2x80x9cinterpolyxe2x80x9d dielectric layer for the capacitive coupling between a floating gate patterned from a first level polycrystalline silicon and a control gate patterned from a second level polycrystalline silicon. This influence manifests itself during thermal treatments taking place after the formation of these stacked layers and depends from the way these layers were formed (temperatures, pressure, gas flow rates, residence times, growth rate).
With identical fabrication conditions, it has been observed that the reliability of a dielectric layer for instance of a tunnel oxide, in terms of breakdown, is markedly influenced by certain characteristics of the electrically conducting layer deposited over the dielectric. Surprisingly, it has been found that a layer of tunnel oxide (SiO2) performs better the larger the grain size or the size of single crystal domains or crystallites of the conducting material deposited over the oxide layer. Such a conducting material is typically a doped polycrystalline silicon (polysilicon) layer.
It has been established further that a highly efficient structure is defined by interfacing, to a dielectric layer for capacitive coupling, an electrically conductive layer of doped polycrystalline silicon or equivalent electrically conductive material, having crystallization grains whose dimensions are substantially of the same size of the area of capacitive coupling to be defined. This means that, on such a coupling area, the conductive layer is of an ideally unigranular polycrystalline material or that there exists an extremely small number of distinct crystalline domains or crystallites.
It has been found that such a crystalline structure, for example of polycrystalline silicon, may be obtained by depositing an essentially amorphous silicon film at a sufficiently low temperature and crystallizing the deposited film by an annealing step conducted at a sufficiently low temperature lower than the deposition temperature, typically below 650xc2x0 C. The technological research aimed to fulfill such a requirement through economically viable techniques compatible with productivity requirements, has led to establish that is it possible to form layers of polycrystalline silicon, doped or undoped, with grains of dimensions comparable to those of the relevant structural features that are defined in modern fabrication processes of integrated circuits. This may be done by using a chemical vapor phase deposition reactor capable of being operated at relatively high pressures and with controlled rapid temperature variations.

Integrated structure comprising a patterned feature substantially of single grain polysilicon


A method of stripping coating from a portion of a coated surface of a component. The method includes fastening a mask sheet to the component over a region adjacent the portion of the coated surface. The mask sheet has a contour generally corresponding to a contour of the surface of the component. A high pressure fluid jet is sprayed from a spray head toward the portion of the coated surface after the mask sheet is fastened to the component to strip the coating from the portion of the surface. After the coating is stripped from the portion of the surface, the mask sheet is removed from the component.

The present invention relates generally to a method and apparatus for stripping coating from a component, and more particularly to a method and apparatus for stripping coating from only a portion of a coated surface of a component.
Various methods are used to protect metal components exposed to high temperature environments. For instance, thermal barrier coatings are applied to surfaces of components exposed to high temperature environments to reduce the amount of heat which is transferred to the component. However, if the thermal barrier coatings are damaged (e.g., by field exposure or handling damage) the protection offered by the coatings may be compromised necessitating a repair. Typically, the coating is repaired by stripping the damaged coating and applying a new coating. This procedure is complicated by the presence of cooling holes in the component.
Although damaged thermal barrier coating can be repaired by conventional methods of stripping the damaged coating from the entire component and applying a new coating to the component, cooling holes must be masked before applying the new coating or they must be re-drilled (e.g., by laser drilling) after applying the new coating to ensure the holes are not blocked by the coating. These masking and/or re-drilling operations increase the cost of repairing damaged thermal barrier coatings. By reducing the amount of coating which is stripped, significant time and expense can be avoided by reducing the masking needed when the new coating is applied or by reducing the amount of re-drilling which may be required. Thus, there is a need for a method and apparatus for stripping coating from only a portion of a component.
Among the several features of the present invention may be noted the provision of a method of stripping coating from a portion of a coated surface of a component. The method comprises the step of fastening a mask sheet to the component over a region adjacent the portion of the coated surface. The mask sheet has a contour generally corresponding to a contour of the surface of the component. Further, the method includes the step of spraying a high pressure fluid jet from a spray head toward the portion of the coated surface after the mask sheet is fastened to the component to strip the coating from the portion of the surface. In addition, the method includes removing the mask sheet from the component after the coating is stripped from the portion of the surface.
In another aspect, the present invention includes an apparatus for masking a surface of a component to permit selective stripping of coating therefrom. The apparatus comprises a flexible sheet sized and shaped for positioning over a region of the surface of the component adjacent a portion of the coated surface to be stripped. The apparatus also includes a clamp for forming the flexible sheet to a contour generally corresponding to a contour of the surface of the component and for holding the sheet in position adjacent the surface of the component. Further, the apparatus includes a fastener for fastening the clamp to at least one of the surface of the component and the sheet.
Other features of the present invention will be in part apparent and in part pointed out hereinafter.