A space-incremental garbage collector performs marking operations that are usually separated by several collection increments. It uses the marking results to compute collection-efficiency metrics for regions into which it treats the heap as divided. It bases its selection of regions for successive increments' collection sets on the metrics' values, whose computations also depend on the sizes of the regions' “remembered sets,” i.e., on the lists of locations where references to objects in those regions have been observed. Although the remembered-set sizes therefore potentially change between collection increments, the collector re-computes metrics in most collection increments for only a subset of the regions. It selects the subset in accordance with a sorting of all regions that it performed at the end of the most recent completed marking operation.

1. Field of the Invention
The present invention concerns computer-program compiling and in particular to what has in that discipline come to be referred to as "garbage collection."
2. Background Information
Garbage collection is the term that has come to be used for the operations by which data objects that a program will no longer use are recognized so that the computer memory occupied by those objects can be reclaimed for reuse. For the purposes of this discussion, the term object refers to a data structure represented in a computer system's memory. Other terms sometimes used for the same concept are record and structure. An object may be identified by a reference, a relatively small amount of information that can be used to access the object. A reference can be represented as a "pointer" or a "machine address," which may require, for instance, only sixteen, thirty-two, or sixty-four bits of information, although there are other ways to represent a reference.
In some systems, which are usually known as "object oriented," objects may have associated methods, which are routines that can be invoked by reference to the object. An object also may belong to a class, which is an organizational entity that may contain method code or other information shared by all objects belonging to that class. In the discussion that follows, though, the term object will not be limited to such structures; it will additionally include structures with which methods and classes are not associated.
Garbage collection is used almost exclusively in environments in which memory can be allocated to some objects dynamically. Not all systems employ dynamic allocation. In some computer languages, source programs must be so written that all objects to which the program's variables refer are bound to storage locations at compile time. This storage-allocation approach, sometimes referred to as "static allocation," is the policy traditionally used by the Fortran programming language, for example.
Even for compilers that are thought of as allocating objects only statically, of course, there is often a certain level of abstraction to this binding of objects to storage locations. Consider the typical computer system 10 depicted in FIG. 1, for example. Data that a microprocessor 11 uses and instructions for operating on them may reside in onboard cache memory or be received from further cache memory 12, possibly through the mediation of a cache controller 13. That controller 13 can in turn receive such data from system read/write memory ("RAM") 14 through a RAM controller 15 or from various peripheral devices through a system bus 16. The memory space made available to an application program may be "virtual" in the sense that it may actually be considerably larger than RAM 14 provides. So the RAM contents will be swapped to and from a system disk 17.
Additionally, the actual physical operations performed to access some of the most-recently visited parts of the process's address space often will actually be performed in the cache 12 or in a cache on board microprocessor 11 rather than on the RAM 14. Those caches would swap data and instructions with the RAM 14 just as RAM 14 and system disk 17 do with each other.
A further level of abstraction results from the fact that an application will often be run as one of many processes operating concurrently with the support of an underlying operating system. As part of that system's memory management, the application's memory space may be moved among different actual physical locations many times in order to allow different processes to employ shared physical memory devices. That is, the location specified in the application's machine code may actually result in different physical locations at different times because the operating system adds different offsets to the machine-language-specified location.
Some computer systems may employ a plurality of processors so that different processes' executions actually do occur simultaneously. Such systems come in a wide variety of configurations. Some may be largely the same as that of FIG. 1 with the exception that they include more than one microprocessor such as processor 11, possibly together with respective cache memories, sharing common read/write memory by communication over the common bus 16.
In other configurations, parts of the shared memory may be more local to one or more processors than to others. In FIG. 2, for instance, one or more microprocessors 20 at a location 22 may have access both to a local memory module 24 and to a further, remote memory module 26, which is provided at a remote location 28. Because of the greater distance, though, port circuitry 29 and 30 may be necessary to communicate at the lower speed to which an intervening channel 32 is limited. A processor 34 at the remote location may similarly have different-speed access to both memory modules 24 and 26. In such a situation, one or the other or both of the processors may need to fetch code or data or both from a remote location, but it will often be true that parts of the code will be replicated in both places.
Despite these expedients, the use of static memory allocation in writing certain long-lived applications makes it difficult to restrict storage requirements to the available memory space. Abiding by space limitations is easier when the platform provides for dynamic memory allocation, i.e., when the platform enables allocation of memory space to be delayed until after the program has been loaded and is already running.
Dynamic allocation has a number of advantages, among which is that the run-time system is able to adapt allocation to run-time conditions; for given objects the programmer can specify respective conditions on which space should be allocated to them. The C-language library function malloc( ) is often used for this purpose. Conversely, the programmer can specify conditions under which memory previously allocated to a given object can be reclaimed for reuse. The C-language library function free( ) results in such memory reclamation.
Because dynamic allocation provides for memory reuse, it facilitates generation of large or long-lived applications, which over the course of their lifetimes may employ objects whose total memory requirements would greatly exceed the available memory resources if they were bound to memory locations statically.
Particularly for long-lived applications, though, allocation and reclamation of dynamic memory must be performed carefully. If the application fails to reclaim unused memory—or, worse, loses track of the address of a dynamically allocated segment of memory—its memory requirements will grow over time to exceed the system's available memory. This kind of error is known as a "memory leak." Another kind of error occurs when an application reclaims memory for reuse even though it still maintains a reference to that memory. If the reclaimed memory is reallocated for a different purpose, the application may inadvertently manipulate the same memory in multiple inconsistent ways. This kind of error is known as a "dangling reference," because an application should not retain a reference to a memory location once that location is reclaimed. Explicitly managing dynamic memory by using interfaces like malloc( )/free( ) often leads to these problems.
Such leaks and related errors can be made less likely by reclaiming memory space more automatically. As was mentioned above, the software and/or hardware used for this purpose is typically referred to as a garbage collector. Garbage collectors operate by inspecting the running program's current state, determining from that state whether it can decide that there are some objects that the program can no longer reach, and reclaiming objects thus found not to be reachable. The criteria that garbage collectors use for this purpose vary, but, for example, a program's global variables are normally considered reachable throughout a program's life. Although they are not ordinarily stored in the memory space that the garbage collector manages, they may contain references to dynamically allocated objects that are, and the garbage collector will consider such objects reachable. It will typically also consider an object reachable if it is referred to by a reference in a register or a thread's call stack. And reachability is contagious: if a reachable object refers to another object, that other object is reachable, too.
It is advantageous to use garbage collectors because, whereas a programmer working on a particular sequence of code can perform his task creditably in most respects with only local knowledge of the application, memory allocation and reclamation tend to require more-global knowledge. A programmer dealing with a small subroutine, for example, may well be able to identify the point in the subroutine beyond which the routine has finished with a given memory portion, but knowing whether the application as a whole will be finished with it at that point is often much more difficult. In contrast, garbage collectors typically work by tracing references from some conservative notion of a "root set," e.g., global variables, registers, and the call stack: they thereby obtain reachability information methodically. By using a garbage collector, the programmer is relieved of the need to worry about the application's global state and can concentrate on (more-manageable) local-state issues. The result is applications that are more robust, having no dangling references and fewer memory leaks.
Garbage-collection mechanisms can be implemented by various parts and levels of a computing system. One approach is simply to provide them as part of a batch compiler's output. Consider FIG. 3's simple batch-compiler operation, for example. A computer system executes in accordance with compiler object code and therefore acts as a compiler 36. The compiler object code is typically stored on a medium such as FIG. 1's system disk 17 or some other machine-readable medium, and it is loaded into RAM 14 to configure the computer system to act as a compiler. In some cases, though, the compiler object code's persistent storage may instead be provided in a server system remote from the machine that performs the compiling. The electrical signals that typically carry the digital data by which the computer systems exchange that code are examples of the kinds of electromagnetic signals by which the computer instructions can be communicated. Others are radio waves, microwaves, and both visible and invisible light.
The input to the compiler is the application source code, and the end product of the compiler process is application object code. This object code defines an application 38, which typically operates on input such as mouse clicks, etc., to generate a display or some other type of output. This object code implements the relationship that the programmer intends to specify by his application source code. In one approach to garbage collection, the compiler 36, without the programmer's explicit direction, additionally generates code that automatically reclaims unreachable memory space.
Even in this simple case, though, there is a sense in which the application does not itself provide the entire garbage collector. Specifically, the application will typically call upon the underlying operating system's memory-allocation functions. And the operating system may in turn take advantage of hardware that lends itself particularly to use in garbage collection. So even a very simple system may disperse the garbage-collection mechanism over a number of computer-system layers.
To get some sense of the variety of system components that can be used to implement garbage collection, consider FIG. 4's example of a more complex way in which various levels of source code can result in the machine instructions that a processor executes. In the FIG. 4 arrangement, the human applications programmer produces source code 40 written in a high-level language. A compiler 42 typically converts that code into "class files." These files include routines written in instructions, called "byte code" 44, for a "virtual machine" that various processors can be software-configured to emulate. This conversion into byte code is almost always separated in time from that code's execution, so FIG. 4 divides the sequence into a "compile-time environment" 46 separate from a "run-time environment" 48, in which execution occurs. One example of a high-level language for which compilers are available to produce such virtual-machine instructions is the Java™ programming language. (Java is a trademark or registered trademark of Sun Microsystems, Inc., in the United States and other countries.)
Most typically, the class files' byte-code routines are executed by a processor under control of a virtual-machine process 50. That process emulates a virtual machine from whose instruction set the byte code is drawn. As is true of the compiler 42, the virtual-machine process 50 may be specified by code stored on a local disk or some other machine-readable medium from which it is read into FIG. 1's RAM 14 to configure the computer system to implement the garbage collector and otherwise act as a virtual machine. Again, though, that code's persistent storage may instead be provided by a server system remote from the processor that implements the virtual machine, in which case the code would be transmitted by electromagnetic signals to the virtual-machine-implementing processor.
In some implementations, much of the virtual machine's action in executing these byte codes is most like what those skilled in the art refer to as "interpreting," so FIG. 4 depicts the virtual machine as including an "interpreter" 52 for that purpose. In addition to or instead of running an interpreter, many virtual-machine implementations actually compile the byte codes concurrently with the resultant object code's execution, so FIG. 4 depicts the virtual machine as additionally including a "just-in-time" compiler 54.
The resultant instructions typically invoke calls to a run-time system 56, which handles matters such as loading new class files as they are needed and includes much of garbage-collector implementation. The run-time system will typically call on the services of an underlying operating system 58. Among the differences between the arrangements of FIGS. 3 and 4 in that FIG. 4's compiler 40 for converting the human programmer's code does not contribute to providing the garbage-collection function; that results largely from the virtual machine 50's operation.
Independently of the specific system-architecture levels at which the collector resides, garbage collection usually includes some amount of reference tracing to determine whether objects are at least potentially reachable; if they are not potentially reachable, they are garbage, and their memory space can therefore be reclaimed. The most straightforward and accurate way to do the tracing is to start at the root set and scan recursively for referred-to objects until all have been identified. If an object is not encountered in that process, it is not reachable, even if it is referred to by a reference in some other object.
Now, it would be unacceptable in many applications to have the mutator pause while the collector traces references through the whole heap. So some garbage collectors perform the tracing in threads of execution that (mostly) operate concurrently with the mutator. They mark the objects thereby encountered, and, possibly with some exceptions, objects that remain unmarked at the end of the marking operation can be recognized as garbage. The memory blocks occupied by thus-recognized objects can be reclaimed concurrently with mutator execution. Since most of such a marking-and-sweeping operation executes concurrently with mutator execution, this approach limits pause times. For large heaps, though, the marking is expensive, and it can slow mutator execution.
Another solution is for the garbage collector to operate "space-incrementally." In each successive collection increment, which typically (but not necessarily) is all performed during a single pause in mutator execution, the collector considers a small portion, or collection set, of the heap. As the mutator executes, it notifies the collector when it writes a reference, and the collector thereby maintains, for each of a plurality of heap regions, a list, or remembered set, of locations in other regions where the mutator has reported references to that region's objects. Without tracing reference chains from the basic root set throughout the entire heap during every collection increment, the collector can recognize a collection-set object as unreachable if no reference to it resides in any location that the collection-set regions' remembered sets identify.
Although incremental collection helps to limit pause times, collector overhead remains significant, and a great amount of effort has been expended in improving collector efficiency.

Collection-set selection using a small priority queue


An electronic blackboard displays information and optically detects input information on a display/writing surface by determining the corresponding coordinates. To determine the input coordinates, a predetermined number of pairs of light emitting elements and light detecting elements are placed in parallel for each axis near the edges. The light emitting elements and the light detecting elements are also linearly and equidistantly placed. A control unit is connected to the light emitting elements for sequentially activating these light emitting elements and for controlling the light detecting elements to detect the light in an overlapping manner. Based upon the above positional information from the light detecting elements, an input coordinate determination unit determines the input coordinates of an input on the display/writing surface.

Prior art whiteboards or electronic boards allow a user to handwrite on a writing surface such as a sheet using a certain writing instrument, and an onboard scanner scans the handwritten information. Furthermore, the scanned information is later printed on an image-recording medium via a printer. In more recent years, the electronic boards have a coordinates input/detection unit on a writing surface for inputting the hand written information into a computer on a real time basis. For example, Micrographic, Inc. offers an electronic whiteboard with an onboard input/detection unit on the writing surface for inputting the hand written visual data such as characters and pictures into a computer on a real time basis. The same electronic board system allows to display on a cathode ray tube (CRT) or a large screen using a liquid crystal projector the visual data stored in the computer from the electronic board. The visual data is also printed on an image-recording medium. Furthermore, a softboard is connected to a computer, and a computer screen is projected onto the softboard via a liquid crystal projector. A user operates the computer on the softboard.
Another type of electronic board includes a display unit for displaying characters and images; a touch panel/screen or coordinate input/detection unit located in front of the display unit for inputting and detecting the coordinate information; and a control unit for controlling the display unit based upon the input from the coordinate input/detection unit. Based upon the above units, the electronic board provides a display surface and a writing surface. For example, SMART Technologies Inc. offers SMART 2000, which projects characters, pictures, diagrams and graphic images onto a projection panel via a liquid crystal projector that is connected to a computer and inputs into the computer any hand-written information via the coordinate input/detection unit or the writing surface located in front of the projection panel. The hand-written information is then composed with the image information in the computer, and the composed image is again displayed via the liquid crystal projector on a real time basis.
The above described electronic blackboard systems superimpose the image from the coordinate input/detection unit over another image displayed on a screen by the display unit. Because of the superimposing feature, the electronic blackboard systems are already widely used in conferences, presentations and education, and the use is evaluated to be highly effective. Furthermore, certain electronic blackboard systems incorporate telecommunication such as audio and video features and provide videoconferencing capability for connecting remote locations via a communication line.
Various types of the coordinate input/detection units have been considered. Among various detection techniques, a coordinate input/detection device using an optical system and involving no physical surface such as a touch panel appears to be promising for the application to the above electronic blackboards. Optical coordinate input/detection devices have been proposed and used with various methods. For example, Carol Touch Co. offers Model 42 plasma display infrared touch panel frame for placing on the Model 42 display. A plurality of light-emitting diodes (LEDs) is placed in rows and columns at equal distance in both horizontal and vertical directions. Similarly, a plurality of phototransistors is placed in both horizontal and vertical arrangements at the same distance. By continuously scanning pairs of a LED and a phototransistor, it is checked if infra red light is interrupted in either X and or Y directions. Upon detecting the interruption of the infra red light, the corresponding coordinates are determined and then outputted to an external device. According to Japanese Patent 2705156, a plurality of pairs of a light emitting element and a light detecting element are placed from the upper left to the lower right as well as from the upper right to the lower left in a diagonal direction. Each of the light detecting elements detects light from two corresponding light emitting elements by time-dividing the detection. Furthermore, according to Japanese Patent 2980286, diffused light from a light source located near a central or terminal one of a single row of light detecting elements is reflected by a holographic reflector located to form parallel light. A plurality of the light detecting elements on the light source side receives the parallel light.
Using a coordinate input detection device such as the above described Carol Touch Inc.'s device having conventional light emitting elements such as LEDs and light detecting elements such as phototransistors, a detection path or line between the light emitting element and the light detecting element is parallel to those of other pairs. For this reason, the input resolution of the input coordinates depends upon the distance between the light emitting element and the light detecting element. In other words, in order to increase the resolution, the distance between the light emitting element and the light detecting element must be reduced. However, there is a limitation in decreasing the above distance, and the resolution cannot be substantially improved.
As described above, Japanese Patent 2705156 discloses that one light detecting element receives light from two light emitting elements by time division. Since the light paths for all of the light detecting elements are parallel in two directions, although there is a difference between horizontal/perpendicular relations and diagonal relations, as described with respect to the Carol Touch device, the resolution on the coordinates still depends upon the size of and the distance between the light emitting element and the light detecting element. For this reason, if a high resolution is required, the conventional coordinate input devices remains to be improved.
As described above, Japanese Patent 2980286 discloses that there is a diffused light path from a single light emitting element towards a holographic reflector in addition to parallel light paths between the holographic light reflector and each of the single row of the light detecting elements. However, the light detecting elements in certain areas near the holographic reflector do not receive light reflected by the holographic reflector. Due to the above area where coordinates are not determined from the interruption of the diffused light, if a high resolution level is required in a large area, the conventional coordinate input devices remains to be improved. That is, in the area near the holographic reflector, the resolution is determined by the placement distance of the light detecting elements. Furthermore, since the interruption of the path between the holographic reflector and the light emitting element or the interruption of the path between the holographic reflector and the light detecting element is detected by the same light detecting element, it is difficult to determine the true interruption position.
Accordingly, the current invention involves a plurality of light emitting and detecting elements that are placed in two directions to cross and surround a two-dimensional coordinate input and detection unit which receives a command from a operational unit so that input coordinates are determined at a high resolution level for the electronic blackboard. The current invention also improves efficiency for the coordinate determination by eliminating any unnecessary calculation processes.

Coordinate input detection device and method for electronic blackboard


A method of manufacturing a transparent, high density green material which comprises: sintering a PLZT ceramic compact in a vacuum of 1.times.10.sup.-2 to 1.times.10.sup.-5 Torr at 1150.degree. C. to 1250.degree. C. for 0.5 to 2 hours, fabricating the sintering product into a sheet of less than 1.5 mm thickness, embedding the sheet into a heat resistant vessel tightly packed with a powder of 50 .mu.m to 3000 .mu.m grain size comprising at least one of fused alumina, zirconia and magnesia and then applying HIP under 500 to 700 kg/cm.sup.2, at 1050.degree. C. to 1200.degree. C., for 0.5 to 2 hours by using an inert gas as a pressure medium. Ceramics for optical devices having high transparency and density can be mass produced economically in a short time.

1. Field of the Invention
The present invention relates to a method of manufacturing a transparent high density ceramic material containing oxides of Pb, La, Zr and Ti (hereinafter referred to as PLZT), and in particular to a manufacturing method which includes hot isostatic pressing of a sintered PLZT product for a short period of time.
2. Description of the Prior Art
PLZT has been used for various optical devices depending on the relative content of Pb, La, Zr and Ti, oxides for example, optical modulation devices which utilize the Pockels effect, optical shutters and optical switches which utilize the Kerr effect, image memory devices which utilize the memory effect, as well as optical shutters which make use of the electro-optical scattering effect, image memory devices which makes use of the surface electrostriction effect, optical memory devices which make use of the photochromic effect, image memory devices which make use of an optical ferroelectric effect, etc.
When PLZT is used as the transparent high density ceramic material, extremely high transparency is required in order to prevents scattering or absorption of light passing through the ceramic material.
Accordingly, it is necessary to reduce pores in the inside of the PLZT and to remove excess Pbo, which causes the PLZT yellow and absorb light.
As a method of obtaining PLZT, there is known a so-called monoaxial pressing-type hot pressing method of charging a starting material powder for PLZT ceramic in a die made of aluminum oxide, silicon carbide, graphite, etc; and then pressing the powder by means of a punch made of alumina (U.S. Pat. No. 3,666,666, 1972).
In this method, however, there is a limit for the size of products obtained in view of the strength of die, and punch at high temperature and uniform heating by using an external heater. Further, reaction between the punch or die material and the pressing product is inevitable and, further, the productivity is low.
Meanwhile, as a method of manufacturing piezoelectric ceramics, a hot isostatic pressing method (hereinafter referred to as HIP) using a high temperature and high pressure gas as a pressure medium is known and the applicant has previously proposed a method of manufacturing high density piezo ceramics such as PbTi.sub.3, PbNb.sub.2 O.sub.6, PbTi.sub.x Zr.sub.y O.sub.3 +Nb.sub.2 O.sub.5, etc; by using HIP (Japanese Patent Laid-Open Sho No. 58-182883).
However, even if the above-mentioned method is applied to PLZT, it is difficult to completely remove pores formed at the inside of the PLZT and, particularly, it is impossible to remove large pores, thus making it difficult to attain high transparency and high density as required as an optical device. Further, there is also been known an atmospheric sintering method of sintering in a PbO-oxygen atmosphere as a method of removing large pores formed upon sintering PLZT. However, it is difficult to control the PbO vapor pressure. If the PbO vapor pressure is higher than a predetermined pressure, excess PbO intrudes to the inside of the PLZT, thus turning the PLZT yellow. On the contrary, if the PbO pressure is low, the invasion of PbO can be prevented; however pores in the inside of the PLZT can not be removed, and thus the PLZT will not be stable.
Furthermore, even a combination of the above-mentioned sintering method with HIP can not stably obtain transparent; high density ceramic material having the required high transparency and freedom from pores.
In order to overcome such problems, the present inventor has already proposed that a transparent high density ceramic material having high transparency and freedom from pores can be obtained by sintering PLZT in a vacuum up to 90% of the theoretical density and, further, applying HIP processing (Japanese Patent Laid-Open Sho No. 62-105955).
Further, as the usage of PLZT has expanded the demand for a further improvement in transparency and freedom from pores has increased, has the desire to find a method of manufacturing the same with a good productivity.
Heretofore, sintering of PLZT has required a long time for obtaining the desired high transparency and, for example, it require more than 60 hours for sintering under a normal pressure, requires more than 16 hours for a hot pressing method (hereinafter referred as HP) conducted in an oxygen or reduced-pressure atmosphere, or more than 60 hours even in a multi-step sintering process comprising HP and sintering at a normal pressure or pressure reduction and normal temperature sintering.
Further, in the technique proposed by the inventor described above, sintering conditions and HIP processing conditions, etc; are also selected depending on the PLZT compositions. However, for satisfying high light transmittance, it requires at least more than 10 hours in total, that is, more than 5 hours for sintering at a normal pressure or in vacuum and more than 5 hours for HIP and, accordingly, improvement has been demanded also from an economical point of view and operationability.

Method of manufacturing transparent high density ceramic material


A partition module and system of partition modules provides an aesthetically pleasing partition for an interior space of a building. The front and rear exteriors of the module each include three-dimensional surface patterns configured to coextensively align with patterns on adjacent substantially identical modules to form a collective, dual-sided partition having a seamless visual appearance. The partition module may include a recess sized and shaped to receive a beam for supporting the partition structure and a plurality of alignment projections for self-alignment of the partition modules during construction.

1. Technical Field
The present disclosure generally relates to partitions, and more particularly, to partition modules having three-dimensional surface patterns for constructing a collective partition structure, and a system for assembling the same.
2. Description of the Related Art
Partitions for interior spaces in both residential and commercial buildings are well known in the art. For example, in the context of residential buildings well known partitions include partition walls of stud frame and drywall construction. Other known partitions include foldable screen partitions having a number of panels hinged together in an accordion style. In the context of commercial buildings, partition walls are particularly prevalent in office settings to create separate work spaces. For example, upholstered wall panels having interior engineered wood components and polymer trim around a perimeter of the panels are commonly used for work cubicles. These partition structures typically feature flat, opaque surfaces that separate one space from another to create privacy and reduce noise. Construction and assembly of such partitions is generally complicated and laborious.

Partition modules and assembly system thereof


In a slit lamp microscope, ease of maintenance of an illumination-power-supply cable is improved while preventing the cable from appearing untidy. An illumination support arm of a slit lamp microscope is provided with a groove-shaped cable holder in which the illumination-power-supply cable is disposed along the outer surface of the illumination support arm in an externally exposed state. This configuration facilitates replacement of the illumination-power-supply cable even when a problem, such as breaking of the illumination-power-supply cable, occurs, thus improving ease of maintenance. Furthermore, because the illumination-power-supply cable is disposed along the groove-shaped cable holder, the slit lamp microscope has a neat appearance.

Slit lamp microscopes are widely used to observe the condition of the eye to be examined in the ophthalmic field. The slit lamp microscopes in the related art include an illumination unit for radiating slit light onto the eye to be examined, and a microscope unit for observing the eye to be examined. The illumination unit and the microscope unit have an illumination support arm and a microscope support arm, respectively, and the illumination support arm and the microscope support arm are connected to each other by a common swivel shaft so as to be independently pivotable in the horizontal direction. By aligning the focal plane of the slit light radiated from the illumination unit onto the swivel shaft and the focal plane of the microscope, it is possible to illuminate and observe the eye to be examined at a desired angle.
A light source that radiates slit light is accommodated in the illumination unit. The slit light is radiated downward through an illumination optical system accommodated in the illumination unit, is reflected by a reflection mirror attached to the illumination support arm, and is radiated onto the eye to be examined. In a known system, power is supplied to the light source accommodated in the illumination unit through an illumination-power-supply cable suspended in the air between the upper part of a chin rest unit, to which an examinee is fixed, and the illumination unit (Patent Literature 1). In another known system, the illumination-power-supply cable is allowed to pass through the inner space of a hollow tubular illumination support arm without being exposed to the outside of the apparatus and is connected to the light source of the illumination unit (Patent Literature 2). In Patent Literature 2, not only the illumination-power-supply cable, but also a background-illumination-power-supply cable, which is connected to a background-illumination light source used when observation is performed with a microscope unit, is allowed to pass through the interior of the illumination support arm.


A fixing device includes a heat roller, a fuser member, an endless belt, a pressure member, a first rotation transmitter, a second rotation transmitter, a rotation sensor, a controller, a first biasing member, and a second biasing member. The heat roller is rotatable around a rotational axis thereof while subjected to induction heating. The fuser member is disposed parallel to the heat roller. The endless belt is looped for rotation around the heat roller and the fuser member. The pressure member is disposed opposite the fuser member via the endless belt. The first rotation transmitter is connected to the rotational axis of the heat roller to rotate around a rotational axis thereof upon rotation of the heat roller. The second rotation transmitter engages the first rotation transmitter to rotate around a rotational axis thereof upon rotation of the first rotation transmitter.

1. Technical Field
The present invention relates to a fixing device and an image forming apparatus incorporating the same, and more particularly, to a fixing device that fixes a toner image in place with heat and pressure, and an image forming apparatus incorporating such a fixing device.
2. Background Art
In electrophotographic image formation, an image is formed by attracting toner particles to an electrostatic latent image on a photoconductive surface for subsequent transfer to a recording medium such as a sheet of paper. After transfer, the imaging process is followed by a fixing process using a fixing device, which permanently fixes the toner image in place on the recording medium to obtain a print output.
One specific type of the fixing device is a roller-based fixing device employing a pair of cylindrical fixing rollers, one being a fuser roller subjected to heating, and the other being a pressure roller disposed opposite the fuser roller. The pressure roller presses against the fuser roller to form a fixing nip therebetween, through which the recording sheet is conveyed. At the fixing nip, the fuser roller heats the incoming sheet to fuse and melt the toner particles, while the pressure roller presses the sheet against the fuser roller to cause the molten toner to set onto the sheet surface.
Another, more thermally efficient fixing device employs a flexible, endless fuser belt formed of material with a low heat capacity, subjected to heating and disposed opposite the pressure roller. Compared to the roller-based configuration, which involves a pair of fuser and pressure rollers both exhibiting a relatively high heat capacity, the belt-based fixing device can swiftly heat the fuser assembly to a desired operational temperature upon start-up.
To date, some fixing devices employ induction heaters (IH) to heat a fuser member, such as a belt or roller, through electromagnetic induction heating. Use of induction heaters, which generally exhibit higher heat transfer rates, and therefore can heat the fuser assembly more rapidly than conventional heaters such as halogen heaters, allows for fast effective heating performance in thermal fixing process.
Electromagnetic induction heating, although highly efficient in terms of heat generation, may not work properly as desired when applied to heating of a rotatable fuser member. That is, where the fuser member occasionally stops rotation while subjected to electromagnetic induction heating, an extraordinary high amount of heat is imparted to a limited portion of the fuser member facing the induction heater. Such localized, excessive heating cause variations in temperature distribution across the fuser member, which translates into improper amounts of heat exerted to a toner image from the fuser member, resulting in incomplete fixing performance.
To address this problem, several methods have been proposed to provide a fixing device with a heating control capability that controls heating of a rotatable fuser member, in particular, an endless belt, according to readings of a rotation sensor detecting rotation of the fuser member.
For example, one such method employs a rotatable fixing film formed into a cylindrical configuration. The fixing film has a plurality of detection marks disposed along a rotational, circumferential direction of the fixing film, to which an optical sensor is directed to detect movement of the fixing film in the circumferential direction based on displacement of the detection marks. Instead of an optical sensor, detection of the film movement may be implemented using a rotary encoder in combination with a detection roller disposed in contact with the fixing belt.
Another method employs an endless fuser belt entrained around multiple rollers, including a fuser roller disposed opposite a pressure roller via the belt, and a heat roller subjected to induction heating. The fuser belt has one or more perforations along a circumferential, rotational direction thereof, to which an optical sensor is directed to detect movement of the belt in the circumferential direction based on displacement of the perforations.
Still another method employs an endless fuser belt including a thermally conductive, heat-generating layer that generates heat when subjected to induction heating. The fuser belt has one or more detection portions that are relatively transparent to infrared radiation compared to the heat-generating layer along a circumferential, rotational direction thereof, to which an infrared sensor is directed to detect movement of the belt in the circumferential direction based on displacement of the detection portions.
Yet still another method employs an endless fuser belt entrained around multiple rollers, including a fuser roller disposed opposite a pressure roller via the belt, and a heat roller subjected to induction heating. A detection roller is disposed opposite the heat roller via the belt to rotate with the belt. A rotation detector is provided, including an optical rotary encoder formed of a notched disk and a photodetector directed to the notched disk to detect rotation of the detection roller indicating concurrent movement of the belt in the circumferential direction.

Fixing device having a rotation sensor driven by a heat roller and image forming apparatus incorporating same


Methods and systems for selectively depositing a p-type doped silicon germanium layer and structures and devices including a p-type doped silicon germanium layer are disclosed. An exemplary method includes providing a substrate, comprising a surface comprising a first area comprising a first material and a second area comprising a second material, within a reaction chamber; depositing a p-type doped silicon germanium layer overlying the surface, the p-type doped silicon germanium layer comprising gallium; and depositing a cap layer overlying the p-type doped silicon germanium layer. The method can further include an etch step to remove the cap layer and the p-type doped silicon germanium layer overlying the second material.

Because of their relatively high electron and/or hole mobility, high-mobility semiconductors, such as silicon germanium, may be desirable to use in the fabrication of electronic devices, such as semiconductor devices. Devices formed with high-mobility semiconductor materials may exhibit better performance, faster speeds, reduced power consumption, and have higher breakdown fields, compared to similar devices formed with lower-mobility semiconductor materials, such as silicon.
Monocrystalline silicon germanium (Si1-xGex) semiconductor materials may be deposited or grown using a variety of techniques. For example, gas-phase processes, including molecular beam epitaxy and chemical vapor deposition, may be used to epitaxially grow or deposit monocrystalline silicon germanium films on a substrate.
In some semiconductor device applications, the silicon germanium film may include one or more dopants to obtain a desired carrier concentration. For example, the silicon germanium film may include a p-type dopant, such as boron, to increase the carrier concentration of the material. While boron-doped silicon germanium films may work well in some applications, the contact resistance of the boron-doped silicon germanium films may be undesirably high, particularly for use as source/drain regions in field effect transistors (FET). Attempts to lower the contact resistance include the addition of another dopant and a high-temperature anneal process. Such techniques may be problematic because the use of the relatively high temperatures during the anneal process can lead to clustering of one or more of the dopants of the doped silicon germanium films.
In many applications, it may be desirable to selectively deposit the silicon germanium material on a first material relative to a second material. For example, it may be desirable to selectively deposit the silicon germanium material overlying semiconductor material relative to dielectric or insulating material. However, attempts to selectively deposit a p-type doped silicon germanium layer that has relatively low contact resistance have been challenging. Accordingly, improved methods and systems for selectively depositing layers of p-type doped silicon germanium with relatively low contact resistance are desired.
Any discussion, including discussion of problems and solutions, set forth in this section has been included in this disclosure solely for the purpose of providing a context for the present disclosure. Such discussion should not be taken as an admission that any or all of the information was known at the time the invention was made or otherwise constitutes prior art.

Methods for selective deposition using a sacrificial capping layer

Hatanp{hacek over (a)}{hacek over (a)} et al.


One embodiment is a non-volatile memory cell with random access read, program, and erase. The memory cell includes a cell transistor that includes a source region, a drain region, a first insulating spacer, and a second insulating spacer. The memory cell also includes a source-side transistor, a drain-side transistor, a source-side multiplexer, a drain-side multiplexer, a source-side sense amplifier, and a drain-side write driver. A first binary value is stored in a first bit in the memory cell by trapping or releasing a first electric charge in the first insulating spacer. The first bit is read by sensing the resistive change in the cell transistor or by sensing the threshold voltage change in the cell transistor.

1. Field of the Invention
The present invention relates to computer memory and more specifically to random access read, program, and erase memory.
2. Description of Background
There are two major groups of computer memory, volatile memory and non-volatile memory. In volatile memory constant energy input is required to retain information while in non-volatile memory constant energy input is not required. Examples of volatile memory devices include Dynamic Random Access Memory (DRAM) and Static Random Access Memory (SRAM). DRAM requires the memory element to be constantly refreshed (requiring energy) while SRAM requires a constant supply of energy to maintain the state of the memory element. Examples of non-volatile memory devices are Read Only Memory (ROM), Flash Electrical Erasable Read Only Memory, Ferroelectric Random Access Memory, Magnetic Random Access Memory (MRAM), and Phase Change Memory (PCM). As stated, the information in the memory elements of non-volatile memory can be retained for days to decades without power consumption. The present invention is directed to flash electrical erasable read only memory.
A problem in flash memory is that reading, programming, and erasing operations are carried out in blocks. That is, an entire group of bits in a flash device must be read, programmed, or erased at the same time. This poses problems pertaining to read and write speeds of the flash memory device.

Non volatile cell and architecture with single bit random access read, program and erase

International Business Machines Corporation


System and method for converting a flat netlist into a hierarchical netlist are disclosed. The method includes receiving the flat netlist, traversing the flat netlist in a bottom-up fashion, and identifying isomorphic subcircuits in the flat netlist. The method further includes creating a set of cross-coupling capacitor collections for storing information of cross-coupling capacitors, creating a set of net collections for storing information of isomorphic subcircuits, traversing each hierarchical level of the hierarchical netlist in a top-down fashion, and generating the hierarchical netlist using the set of net collections and the set of cross-coupling capacitor collections.

A complex integrated circuit may contain millions of electronic components such as transistors, resistors, and capacitors. The design of such a complex integrated circuit may involve multiple teams of engineers. It is advantageous to partition the design of such complex integrated circuit using a hierarchical approach, whereby certain circuit components are grouped together and may be reused repeatedly through the integrated circuit or in a subsequent design. A method for design and simulation of an integrated circuit with a hierarchical data structure is disclosed by U.S. patent application Ser. No. 10/724,277, entitled "System and Method for Simulating a Circuit Having Hierarchical Structure", filed on Nov. 26, 2003, which is incorporated expressly by reference in its entirety herein.
FIG. 1a illustrates an example of a chain of six inverters in a circuit design. The chain of inverters couples to each other back-to-back. At the highest level of the hierarchical netlist, the root level, the chain of inverters includes an input power signal Vin, a chain of six inverters X1 (Level 1), a power supply V1 coupled to the Vdd terminals of the inverters, and a capacitor load Cload coupled to the output of the chain of six inverters X1. An instance name of the chain of six inverters is X1. At Level 1, the chain of inverters may be grouped into three groups of subcircuits, namely X11, X12, X13 (Sub2), and each group of Sub2 is coupled to the next group of Sub2 through the net T1 or T2 as shown in FIG. 1a. At Level 2, each Sub2 circuit includes two inverters coupled back-to-back via the net T1. Each inverter comprises an input net A, an output net Y, a PMOS transistor Mp, and an NMOS transistor Mn.
FIG. 1b illustrates a hierarchical representation of the chain of inverters of FIG. 1a according to an embodiment of the present invention. At the root level, also referred to as Level 0, the components Vin, V1, Cload, and the ports In, Out, Vdd and 0 (Gnd) are connected as shown. In addition, the root level includes a reference to Level 1 though a call function having a set of call parameters (In, Out, Vdd, 0). At Level 1, the call parameters from the root level are received at a port having a corresponding set of parameters (In, Out, Vdd, 0). The subcircuits X11, X12, X13 are connected via the nodes In, T1, Vdd, 0, T2 and Out respectively. Level 1 includes references to Level 2 through three call functions originating from subcircuits X11, X12, and X13. Each of the call functions of subcircuits X11, X12, and X13 has a set of parameters (In, Out, Vdd, 0). Similarly at Level 2, the call parameters from Level 1 are received at a port having a corresponding set of parameters (In, Out, Vdd, 0). The subcircuits X21 and X22 are connected via the nodes In, T1, Out, Vdd, and 0 respectively. Level 2 includes references to an inverter (Level 3) through two call functions originating from subcircuits X21 and X22. Each of the call functions of subcircuits X21 and X22 has a set of parameters (In, Out, Vdd, 0). At Level 3, a single inverter formed by a PMOS transistor Mp and an NMOS transistor Mn, which is also referred to as a leaf circuit, is coupled to the nodes In, Out, Vdd, and 0 as shown in FIG. 1b.
The hierarchical representation of the chain of six inverters as shown in FIG. 1b works well as a behavior model for design and simulation of the integrated circuit. However, it does not accurately represent all the physical aspects of the circuit after it is laid out and back-annotated as a flat netlist, which is also referred to as a gate-level netlist.
Existing circuit simulators simulate a back-annotated circuit, such as the chain of inverters of FIG. 1a, as a flat circuit. As a result, the performance of the simulation suffers significantly because of the large number of circuit components, such as the back-annotated parasitic resistors and capacitors, which have to be simulated. Additionally, simulating the flat netlist requires more memory because of the large number of circuit components of the back-annotated flat netlist. Therefore, there is a need for a system and method for converting a flat netlist into a hierarchical netlist for the simulation of a complex integrated circuit.


A method and apparatus for a graph database instance (GDI) maintaining a secondary index, that indexes data from a sparse data map storing graph application data, within a sparse data map dedicated to the secondary index. The GDI formulates row-keys, for the secondary index map, by hashing the values of key/value pairs stored in rows of a map storing application data. The GDI stores for each formulated row-key, in the row of the secondary index that is indexed by the formulated row-key, references to rows of the map storing application data that match the key/value pair on which formulation of the row-key was based. The row-keys into the secondary index map may incorporate bucket identifiers, which, for each key/value pair, allows the GDI to spread the references to graph elements that match the key/value pair among a set number of “buckets” for the key/value pair within the secondary index map.

Increasingly, there is a need to model, within database data, resources (such as documents, people, physical objects, abstract concepts, etc.) and connections between the resources. This kind of information is referred to as graph data, where the resources are represented as "nodes" or "vertices" within the graph data, and the connections between resources are represented as "edges". Storing data as graph data is especially useful to configure the stored data to respond to queries about relationships between resources. For example, social graph data that models person resources as vertices (among other resources, such as companies, schools, etc.) and the relationships between those resources as edges are especially good for gathering data for queries such as "Who are the friends of people who graduated from a particular high school in the class of 1997?" or "In what fields of work are former employees of a particular company currently engaged?".
In order to model graph data, a data store stores an entry for each unique resource (which includes information describing the resource), and an entry for each unique relationship (again, with information describing the relationship), and also information about how the stored resources relate to the stored edges. This style of data organization is known as a graph data store, where the graph data store organizes information for resources and edges (both of which are graph data elements), and also for relationships between the graph data elements.
For example, FIG. 1 depicts a simple property graph example 100 that has two vertices and one edge. Vertex 110 has the properties name and age, while vertex 120 has the properties company name and location. The edge is a directional edge from the outgoing vertex 110 to the incoming vertex 120. The edge has a text label "is a current employee of" and a property type identifying the type of relationship between vertices 110 and 120.
In order to record this property graph, the graph data store stores, within a vertex storage structure, an entry for "John Smith" (which includes, e.g., his name, age, and any other metadata describing the person resource, such as social security number, residence, level of education, etc.) and an entry for BigCorp, Inc. (which, in turn, includes the name of the company resource, location, and any other metadata describing the company resource). The data store further stores, within an edge storage structure, an entry for the predicate "is a current employee of". The data store also stores, within a graph data store, an entry that defines the desired graph relationship, i.e., where the "John Smith" resource is identified as the outgoing vertex of a relationship, the "BigCorp, Inc." resource is identified as the incoming vertex of the relationship, and the "is a current employee of" edge is identified, in the relationship, as the directional connection between the two vertices.
Graph data may be stored in non-relational data stores, which are non-relational at least in part because they are not bound by defined columns as are relational data stores. An example of a non-relational data store is a sparse, distributed, persistent, multidimensional sorted map (referred to herein as a "sparse data map"). Sparse data maps comprise a set of rows that are indexed by unique sortable strings called row-keys, where each row stores an arbitrary amount of information that is not bound by defined columns. Sparse data maps are configured for speedy lookup of the stored information using the row-keys as a primary index. Furthermore, sparse data maps are horizontally-scalable (e.g., across database shards), and as such provide low latency, elastic scalability, and high availability when accessing the data stored therein.
Disadvantageously, there can be limited support for secondary indexing, which provides an index on information in a sparse data map other than the primary row-key index, for non-relational data stores storing data in sparse data maps. For example, Apache HBase (which implements a version of sparse data maps) has no support for secondary indexing. When secondary indexing is not supported for sparse data maps, the only efficient way to query this kind of data store is using the row-keys. However, row-key-based queries generally do not allow for finding row entries that match particular data stored within the rows of the sparse data map. Without secondary indexing, in order to identify those rows in a sparse data map that match particular data criteria is via an expensive map scan in which all of the rows of data stored in the map are scanned to identify matching rows.
It would be beneficial to expand support for secondary indexing for sparse data maps to facilitate the common use case of finding rows that match given search criteria.
The approaches described in this section are approaches that could be pursued, but not necessarily approaches that have been previously conceived or pursued. Therefore, unless otherwise indicated, it should not be assumed that any of the approaches described in this section qualify as prior art merely by virtue of their inclusion in this section.

Hash-based efficient secondary indexing for graph data stored in non-relational data stores


In one embodiment, a first Edge Device may join a multicast group via a multicast router, wherein the first Edge device is in a first site of a network and the multicast router is in a second site of the network. The first Edge Device may ascertain an existence of both a first multicast source in the first site of the network and a second multicast source in the second site of the network. The first Edge Device may select the first multicast source as a multicast source from which to receive multicast data for the multicast group. The first Edge Device may notify the second multicast source in the second site of the network that the first Edge Device is not interested in receiving multicast data for the multicast group from the second multicast source.

1. Technical Field
The present disclosure relates generally to optimizing the transmission of multicast data in a communication network and more particularly, to optimizing the transmission of multicast data from a multicast source to receivers that are in the same network site as the multicast source.
2. Description of the Related Art
Businesses often maintain a private network that is accessible via multiple business sites in different geographical locations. Each of these sites may support any number of users. In addition, each of the sites may store data or provide services that may be accessed at one or more of the sites.
Unfortunately, transmitting multicast traffic from one site to another site often results in an undesirable delay and inefficient bandwidth usage.

Optimizing OTV multicast traffic flow for site local receivers


A pipeline installation and maintenance method and system is disclosed in which a number of interconnectible platform modules are assembled into drilling platforms from which a segmented pipeline route is flexibly installed. Using modified push/pull rigs to carry out a transverse drilling process established between platforms, successive portions of the pipeline are installed such that equipment used to create completed segments is moved down line and re-used in subsequent drilling and installation stages. Further segments of the line are similarly constructed, using one or more of the modified directional drilling techniques and transverse reaming processes disclosed herein. Ultimately, a long series of adjacent pipeline segments are installed along a desired pipeline route, while only minimal and temporary disturbance is caused to associated ground surfaces during installation and maintenance operations.

A wide variety of industrial applications require access to man-made transport conduits in order to safely and efficiently practice associated technologies. For example, liquid and gas transportation services, utilities, communications and power installations, fiber optics, and slurry and water transportation facilities all require pipeline access in order to carry out their various operations.
Other technical fields requiring pipeline installations include oil and gas exploration and production. However, many potential oil and gas exploration and production sites are significantly constrained by environmental regulations and other special circumstances that make transportation, installation and maintenance of pipeline equipment difficult or impossible to readily achieve.
For example, oil and gas reserves are often found in terrain with near-surface water accumulations, such as swamps, captive lakes, estuaries, shorelines, and permafrost regions. In the case of swamps, the ground is generally too soft to safely support trucks and other heavy equipment required to deliver and install pipeline trenching and support equipment. Captive lakes are also troublesome, especially when disposed between terminal points of a pipeline installation; in such cases, the pipeline generally has to be re-routed around the lake, which greatly increases the complexity and expense of the operation. Near estuaries and shorelines, the associated land-to-water interface is often unsuitable for supporting pipeline installation equipment, while in permafrost regions, installation of heavy equipment is supportable only during certain months of the year, viz., those winter months when the ground surface is securely frozen. In still other regions, for example, near gorges and canyons, interfering terrain features often effectively preclude cost-efficient drilling and production of oil and gas reserves.
Under cities and towns, the technical aspects of pipeline installation and maintenance are generally more straightforward, since associated ground surfaces are usually firmer and more capable of supporting multiple conduit and infrastructure installations than wilderness regions; however, costs associated with rights of way and competition for shared physical resources can greatly diminish the value of a prospective pipeline operation. Conversely, shoreline regions often pose significant construction and maintenance challenges for pipeline operations, and environmental constraints can significantly impact the location of a pipeline route and the means by which it is installed and maintained.
Many regions in which oil and gas reserves are disposed are also environmentally sensitive, and surface access by heavy transport vehicles can seriously damage the underlying terrain and/or affect wildlife breeding areas and migration paths. Such problems are particularly acute in arctic tundra and permafrost regions, where road construction is often prohibited or limited to temporary seasonal access, and operations are frequently encumbered by wildlife and regulatory concerns.
Wherever a well is drilled and produced, the resulting oil and gas must eventually be transported from the wellhead to either a storage or transportation facility. Currently, the most common method of transporting oil and gas is by means of a pipeline. Under normal circumstances, pipelines are run above ground and affixed to a series of braces set in trenches dug into a ground surface. Other pipelines, including those that run shorter distances under obstacles such as buildings or rivers, are typically carried out by either tunneling operations or horizontal drilling technology. Tunneling operations, however, are much more expensive and complicated than trenching technology, and thus pipelines are generally disposed above surface trenches whenever possible.
Since tunneling is generally the most expensive and complicated fluid transport solution, and since the setting of trenches in premium locations sought by drillers and explorers is often prohibitively difficult and expensive to achieve, there is presently a widespread need for a system and method of installing and maintaining a pipeline that is independent of both trenching and tunneling technologies, and especially for a system and method that avoids trenching and tunneling while minimizing disturbance to associated ground surfaces during pipeline installation and maintenance operations.

Method and system for installing and maintaining a pipeline while minimizing associated ground disturbance


Provided herein are dimeric IL-7-Fc fusion proteins that include Fc domains and one or more IL-7s. Also provided herein are variant IL-7s with modifications to reduce heterogeneity and/or reduced affinity/potency. Such variant IL-7s are useful, for example, in the subject dimeric IL-7-Fc fusion proteins. The dimeric IL-7-Fc fusion proteins can be used for applications where increased IL-7 activity is useful, for example, for increasing the proliferation of lymphocyte populations in mounting an anti-tumor response in a subject in need thereof.

In order for the immune system to mount an effective anti-tumor response, two things must occur. T cells in the tumor environment must first engage antigenic tumor peptides presented by major histocompatibility complexes (MHC) on tumor cells. Next, the T cells must be induced by cytokines such as IL-15 and IL-2 to produce costimulatory cytokines such as IFNγ. Recognition of tumor peptides alone in the absence of cytokine induction leads to T cells becoming anergic, thereby leading to tolerance. Accordingly, a very promising approach in cancer immunotherapy is cytokine-based treatments. For example, IL-2 has been approved for use in patients with metastatic renal-cell carcinoma and malignant melanoma.
IL-7 is another cytokine that exerts cell signaling through the common gamma chain (γC; CD132) which is shared by IL-15 and IL-2, in addition to a unique IL-7 receptor (IL-7Rα). Recombinant IL-7 is a promising cytokine-treatment due to its broad effect in activating the immune system as IL-7 signaling contributes to survival, proliferation, and development of naive and memory B and T cells, mature T cells, and NK cells. However, while there have been several clinical trials investigating IL-7 fusions in treatment of cancer, there are currently no approved uses of recombinant IL-7 in humans. Thus, there remains a need for novel IL-7 based compositions for the treatment of cancers.


A liquid crystal display device includes displaying each picture with two frame images in sequence; drive voltages of adjacent two sub-pixels on each frame image including a high drive voltage and a low drive voltage, and the drive voltages of each sub-pixel in the first frame image and in the second frame image including a high drive voltage and a low drive voltage; determining backlight brightness adjusting signals of each backlight sub-area according to the drive voltages of a first frame image area and a second frame image area corresponding to each backlight sub-area; the backlight brightness adjusting signals being in groups; and performing independent brightness adjustment on a backlight source of the sub-pixels of various colors in corresponding backlight sub-areas in respective frame images of a next picture according to the backlight brightness adjusting signal of each backlight sub-area.

Typical large-size liquid crystal display devices most adopt a negative type VA liquid crystal or IPS liquid crystal technology. The VA type liquid crystal driving is fast saturated with a drive voltage under a large viewing angle, which leads to relatively severe viewing angle color cast and further affects a picture quality.

CHONGQING HKC OPTOELECTRONICS TECHNOLOGY CO., LTD.


The present invention provides articles resistant to the adsorption of proteins, cells and bacteria. The articles can either have a chemical chain bonded thereon where the chemical chain can comprise a terminal group free of a hydrogen bond donor or where a hydrogen bond donor is sufficiently buried such that an exposed surface of the article including the chemical chain is free of a hydrogen bond donor. The chemical chain, or plurality of chemical chains, can comprise a monolayer such as a self-assembled monolayer (SAM) which can be homogeneous (one type of SAM) or mixed, i.e. or more different types of SAMs. Other more specific examples of chemical chains are provided. The plurality of chemical chains can comprise a polymer such as a polyamine. In many aspects, the plurality of chemical chains is sufficiently free of cross-linking or branching. The present invention also provides an article capable of specific binding of a desired biomolecule while preventing non-specific binding of biomolecules.

Continuous efforts are being made to develop new and improved biocompatible materials for the manufacture of medical devices, medical articles or materials used for various medical treatments. Generally, biocompatibility is achieved by designing materials that resist the adsorption and deposition of proteins, cells, and/or bacteria. The applications for such biocompatible materials are numerous, and include materials for prostheses, tissue substitutes, wound dressings, materials for the transfer of drugs and vaccines, and sensing devices. These materials can also be useful to prevent fouling, such as in watercraft devices that tend to accumulate bacteria, mold or marine organisms.
Surfaces including a low density distribution of high molecular weight ethylene glycol units have been reported to be effective for resisting the adsorption of proteins. Du et al. describes grafting poly(ethylene glycol) on lipid surfaces to inhibit the adsorption of proteins and cells (Biochimica et Biophysica Acta, Vol. 1326, pp. 236-248, 1997). Substrate surfaces have also been derivatized with poly(ethylene glycol) units via self-assembled monolayers. Harder et al. describes silver and gold surfaces bonded to n-alkanethiolates derivatized with oligo(ethylene glycol)-terminated units (J. Phys. Chem. B, Vol. 102, pp. 426-436, 1998). Prime et al. describes mixed self-assembled monolayers on gold in which oligo(ethylene oxide)-grafted alkanethiolate chains are mixed with alkanethiolate chains (J. Am. Chem. Soc., Vol. 115, pp. 10714-10721, 1993).
Cunliffe et al. describes silica surfaces derivatized with poly(ethylene oxide) that exhibit resistance to the adsorption of bacteria (Applied and Environmental Microbiology, Vol. 65 (11), pp. 4995-5002, November 1999).
Oligo(ethylene glycol) units are disadvantageous, however, because these units can be susceptible to autoxidation. Thus, there is a need for surfaces derivatized with compositions other than ethylene glycol units. Van der Heiden describes a poly(ether urethane) surface derivatized with phosphorylcholine to produce a passivated surface towards protein adsorption and platelet adhesion (J. Biomed. Mater. Res. Vol. 40, pp. 195-203, 1998). Deng et al. describes a surface containing self-assembled monolayers of tri(propylene sulfoxide) groups, which can be mixed with alkane terminated chains, to prepare surfaces which resist the adsorption of proteins (J. Am. Chem. Soc., Vol. 118, pp. 5136-5137, 1996).
Certain polymers also display protein-resistant properties. U.S. Pat. No. 4,241,682 (Konstandt) describes the use of a polymeric solution which can be coated onto a painted surface to increase the life of the painted surface. The solution includes a mixture of polyethylenimine and a hydrophilic acrylic polymer. U.S. Pat. No. 5,312,873 describes polymers having surface nitrile groups which are converted to amides, resulting in a membrane that resists absorptive fouling. U.S. Pat. No. 4,925,698 (Klausner et al.) describes a chemical modification of polymeric surfaces that renders the polymers more resistant to the deposition of proteins. In particular, the chemical modification involves acylation.
As there is no material that completely resists the adsorption of proteins, cells and bacteria, there remains a need to develop new materials.

Surfaces that resist the adsorption of biological species


Device context-based user interface techniques are described. In one or more embodiments, a context is determined for a device based on a configuration of hardware associated with the device. When the configuration of hardware associated with the device changes, the context of the device may also change. Based on the determined context of the device, a user interface configuration may be selected for display. For example, when the device is connected to a mouse or a keyboard a user interface configuration may be selected that facilitates interactions performed substantially with a mouse and keyboard. However, when a mouse and keyboard are not connected to the device, but touch functionality of the device is used, a user interface configuration may be selected that facilitates interactions performed substantially using the touch functionality. A user interface for an application may be configured using the selected user interface configuration.

The configuration of computing devices is ever increasing. For example, use of computing devices expanded with the advent of desktop personal computers. Configurations of personal computers continued to expand and thus so too did the pervasiveness of computing devices in everyday life, such as from the desktop computer to laptop computers, netbooks, mobile communications devices such as mobile phones and tablet computers, and so on.
As these configurations continue to expand, there is an increasing focus in some instances on making a single device that is usable in a variety of different configurations. A user of a tablet device may, for instance, connect the tablet device to a mouse and keyboard so that the mouse and keyboard may be used to provide input to the tablet device. At other times, the user may use a stylus to provide input to the tablet device. Further, the user may not use the tablet device with any additional input devices but may instead interact with the tablet device simply using touch functionality of the tablet device. In some conventional approaches, an application may display a same user interface regardless of whether a user interacts with the application using a mouse and keyboard, a stylus, or just touch functionality. In other conventional approaches, an application may support interactions involving just one particular configuration of the device, e.g., using touch functionality but not using a mouse and keyboard. However, these approaches may hamper experience of a user.


A method of automatically generating user documentation includes the steps of providing a file of tables that defines, at least in part, the software system; providing a file of text and commands that defines the desired documentation; providing a documentation output file; examining each entry of the text and command file and, determining if an entry is a command. Each command is executed. Any required output is generated. At least some of the generated output is stored in the output file. If an entry is text, the text is inserted into the output file.

During the last 10-15 years, the volume of software that has been generated in the United States and the rest of the world has been enormous. This growth in software has in part been fed by the proliferation of relatively inexpensive, high performance, personal computer systems. Many of these computers have, by standards of only a few years ago, very large random access memories. As a result, very complex, sophisticated languages and application programs are now available for use with desk-top computers.
Along with this explosion in software there has been an enormously increased need for accurate, and timely user documentation. The need for accurate and timely user documentation is exacerbated by the fact that the majority of users of these sophisticated and complex application programs are not programmers or analysts but are business persons.
Today's user, as a result of the wholesale proliferation of personal computer systems, on average knows less about the operation of his or her computer system and the related software than at any other time. Hence, such users need accurate and timely user documentation more than ever.
The present need for accurate and timely user documentation must be viewed against a relatively long-term failure of the data processing industry to effectively deal with the documentation problem. It has been estimated that 90% of the world's computer software is undocumented. Further, it has been estimated that the existing documentation for the other 10% is out of date.
The problem, it is generally agreed, has evolved from not only the high cost of producing accurate and timely documentation manually but also due to a lack of interest on the part of many programmers and analysts in preparing documentation. This lack of interest is in part due to the orientation and training of such individuals.
However, this lack of interest is also in part due to a long-term and ongoing shortage of such individuals in the market place. As a result, most qualified programmers and analysts usually are very busy attempting to meet deadlines for new systems or attempting to keep existing systems running in a satisfactory fashion.
Thus, there is now and there has been a need for a system and a method which make it possible to create user documentation without taking valuable time from the existing programmers and analyst. Further, such system and method should be relatively automatic and not require large amounts of manual input. That system and method should also be cost effective in terms of computer resources required and run time needed to produce the documentation.
User education is one of the largest problems in the development of computer systems today. Minimizing the time required to learn how to operate computer systems is crucial. If a system is difficult to learn, its value is diminished and the cost to operate the system is increased.
The problem is further compounded by high employee turnover in today's fast-paced business world. When an employee resigns he or she takes the detailed knowledge of their job. This is especially true for users of computer systems. New replacement employees often take months (and even years) to become as productive as the prior worker.
This dilemma has caused corporate management to look for new innovative training methods. In the computer field, this has often led to the development of Tutorial systems. To date these are mock-ups of the computer screens and processes. The Tutorial consists of sample screens that must simulate the operation of the actual system.
This has two major problems:
First, the development of simulated Tutorials is extremely time-consuming. Since each detail of the system must be re-created, the process is tedious and extremely expensive. It often takes as much as 8 hours for a specially trained individual to re-create a single screen.
Second, any modifications to the system (no matter how minor) must be reflected in the Tutorial. Since computer systems are continually enhanced to meet changing requirements, this is a major problem. The result causes the ongoing costs of maintaining Tutorials to skyrocket.
Thus, there is a continuing need to provide user assistance information on screens while an application is being executed. The development of such displayable information can be time consuming and expensive. There is thus a need for software tools which ease the development of such displays.

Method for generating user documentation for an application program by executing commands associated with different aspects of the application program in response to analysis of the application program


A transmitting apparatus and method, and a receiving apparatus and method for communicating a pack of 2,048 bytes using the digital interface in accordance with the IEEE 1394 standard. A 4-byte time stamp is added to a 2,048-byte pack of MPEG (Moving Picture Experts Group)-PS (program stream) data. Also, 124 bytes of padding data is added to this pack in order that the overall byte length of data be a multiple of 16. Then the data is divided into a number of fractions which is a multiple of 2 (e.g., 32), thereby being converted into a number of data blocks equal to the number of fractions. Each data block has a byte length of a multiple of 4 (e.g., 68 bytes). A CIP header and the like are added to a predetermined number of the data blocks to form a packet.

1. Field of the Invention
The present invention relates to a transmitting apparatus and method, and a receiving apparatus and method, and, more particularly, to a transmitting apparatus and method and a receiving apparatus and method for transmitting or receiving a pack of 2,048 bytes through the digital interface in accordance with the IEEE 1394 standard.
2. Description of the Related Art
The DVD (digital versatile disc)-Video (hereinafter referred to simply as DVD) has recently been standardized. It is expected to be used widely. In the DVD, video data is recorded by being compressed in the MPEG (Moving Picture Experts Group)-PS (program stream) form. A DVD player reproduces, in its drive section, data from the DVD, and decodes, in its decoding section, the data in the MPEG program stream form reproduced from the DVD. The DVD player outputs the decoded data to a television receiver or the like to display images corresponding to the data.
It is possible that a television receiver having, for example, a function of decoding MPEG-PS-encoded data will be developed. In such a case, it is conceivable that a DVD player and a television receiver having such a decoding function are connected to each other through an AV bus, and a bit stream in an encoded state is output from the DVD player and is supplied via the AV bus to the television receiver having the decoding function to be decoded on the television receiver side.
A system has been conceived in which a DVD player and a television receiver are connected through an AV bus as described above, and in which an interface in accordance with the IEEE (The Institute of Electrical and Electronic Engineers) 1394 High Performance Serial Bus standard is used to perform data communication.
FIG. 20 shows an example of the relationship between original data and actually transmitted packets in isochronous communication in accordance with the IEEE 1394 standard.
As shown in FIG. 20, a 4-byte source packet header and padding data for controlling the data length are added to each of source packets, which are original data, and each packet is thereafter divided into a predetermined number of data blocks. The unit of data in each transmitted packet is one quadlet (=four bytes). Therefore, the byte length of each of data blocks, various headers and so on is set to a multiple of 4.
FIG. 21 shows the format of the source packet header. As 25 bits in the header, a time stamp which is used to suppress jitter, for example, when MPEG-TS (transport stream) data used in digital satellite broadcasting or the like is transmitted in isochronous communication is written.
Such a packet header, a common isochronous packet (CIP) header (described below) and any other sort of data are added to a predetermined number of data blocks, thus forming a packet.
FIG. 22 shows the structure of a packet for isochronous communication. An isochronous communication packet is formed of a packet header, a header cyclic redundancy check (header CRC), a data field and a data cyclic redundancy check (data CRC).
The packet header is formed of "Data_Length" at representing the data length, "Tag" representing the kind of format of the corresponding packet (presence/absence of a CIP header or the like), "Channel" representing the number of a channel in which the packet is transmitted one of 0 to 63), "tcode" representing a code for processing, and a sync code Sy prescribed according to each of applications. The header CRC (Header_CRC) is a packet header error detection code, and the data CRC (Data_CRC) is a data field (Data field) error detection code. The data field is formed of a CIP header and real time data. Real time data in the data field is essential data to be transmitted (the above-mentioned data blocks).
FIG. 23 shows the format of a CIP header having an SYT area provided for synchronization of frames of a video signal. This CIP header is formed of an SID (source node ID) area for a transmission node number, a DBS (data block size) area for the length of a data block, an FN (fraction number) area for the number of fractions into which data is divided to form a packet, a QPC (quadlet padding count) area for the number of quadlets of padding data, an SHP area for a flag indicating the presence/absence of a source packet header, a DBC (data block counter) area for detecting a lacuna in the packet, an FMT area for a signal format representing the sort of transmitted data, a FDF (format dependent field) area used according to the signal format, and an SYT (sync time) area.
An area rev is provided as a reserved area.
Such a CIP header having an SYT area is used, for example, when data of a digital camera-recorder is transmitted.
FIG. 24 shows the relationship between the value in the FMT area and sorts of data. For example, if DVCR (digital video cassette recorder) data is transmitted, the value in the FMT area is set to 000000 (binary). If MPEG data (MPEG-TS data) is transmitted, the value in the FMT area is set to 100000 (binary).
FIG. 25 shows the format of the SYT area. As shown in FIG. 25, lower 12 bits in 16 bits in the SYT area represent a time stamp.
FIG. 26 shows the format of a CIP header having no SYT area. In this CIP header, the SYT area in the CIP header shown in FIG. 23 is used as an FDF area.
As described above, packets for isochronous communication are formed in accordance with formats corresponding to various sorts of data to be transmitted. For example, MPEG-TS data can also be transmitted in isochronous communication as well as DVCR data transmitted in isochronous communication as described in Japanese Patent Laid-Open No. 350649/1994.
However, communication of MPEG-PS data has not been performed by using the digital interface in accordance with the IEEE 1394 standard; it is difficult to perform communication of MPEG-PS data by using the digital interface in accordance with the IEEE 1394 standard.
That is, in MPEG-PS data, the pack forming a unit of data has a length of 2,048 bytes, which is much longer than that of the pack of MPG-TS data (188 bytes). Correspondingly, the number of fractions into which data is divided to form a packet is large. However, since only two bits are assigned to the FN area of the CIP header in which the number of fractions is written, the number of fractions is limited to 1 (=2.sup.0), 2 (=2.sup.1), 4 (=2.sup.2), and 8 (=2.sup.3), and it is difficult to increase the number of fractions above 8.
The above-mentioned padding data for MPEG-PS, data is usually longer than, for example, that for MPEG-TS data, but only three bits are assigned to the QPC area of the above-described CIP header. Therefore, it is difficult to use padding data equal to or larger than 8 quadlets.

Transmitting apparatus and method, receiving apparatus and method


A fish grip having a touch control locking mechanism includes a base. A front end of the base is provided with a left gripper and a right gripper that cooperate with each other. A locking member is movable relative to the base for locking a trigger when the left gripper and the right gripper are in an open position. A triggering member is also connected to the base for automatically triggering the locking member when the left gripper or the right gripper extends into the mouth of a fish thus driving the left gripper and the right gripper to a closed position. During use, the trigger is pulled or pushed to open the left gripper and the right gripper, and the trigger may be locked by the locking member to maintain the open position of the left and right gripper.

A fish grip is a kind of fishing tackle that has become increasingly popular among fishing enthusiasts. Commonly used fish grips are maintained in an open position by manual control, resulting in an inconvenient user experience. Moreover, a continuous manual control, such as pulling a trigger for a long time can easily cause fatigue and lasting pain and damage to a user's hand and finger. Additionally, present fish grips require the user to contact the fish, which to some users may be undesirable.

Fish grip having touch control locking mechanism


A system and method for allocating network resources are disclosed herein. In one embodiment, the system and method are configured to perform: receiving, by a Polar code encoder, a plurality of information bits; encoding, by the Polar code encoder, the plurality of information bits using a construction sequence to generate a plurality of encoded information bits, wherein the construction sequence comprising a plurality of construction sequence indexes, wherein the encoding comprises placing the plurality of information bits on respective indexes according to at least one of a plurality of subsets of the construction sequence indexes; and outputting the plurality of encoded information bits.

In a communications system, channel encoding is generally performed to improve reliability of data transmission and ensure quality of communication. A Polar code is an encoding technique that can achieve a Shannon limit and has low coding-decoding complexity. The Polar code is a linear block code. A generator matrix of the polar code is GN, and an encoding process of the polar code is xN=uNGN, wherein xN (xN={x1, x2, . . . , xN}) is typically referred to as a Polar code output, uN(uN={u1, u2, . . . , uN}) is typically referred to as a Polar code input, and N represents a code length, which is required to be a power of 2 (i.e., 2n, wherein n is a positive integer).
In general, a construction sequence having a plurality of indexes are provided, and respective index locations of a plurality of information bits that are to be processed by the generator matrix GN are determined based on the indexes. For purposes of clarity of illustration, such an index of the construction sequence is herein referred to as a "construction sequence index." Also, as mentioned above, since the Polar code input and output are required to be an integer power of 2, respectively, when a bit length of a codeword to be transmitted is not the integer power of 2, a rate matching technique is typically performed to discard one or more encoded bits (e.g., one or more bits of the Polar code output).
However, due to various application demands in a new radio (NR) wireless communication system/network, existing construction sequences and rate matching techniques are not entirely satisfactory, respectively.

System and method for processing polar code