An optical disc having marks for dispersed addresses that can be easily detected with high precision. A dispersed address comprises synchronization marks, positive marks, and negative marks. Synchronization marks, positive marks, and negative marks are formed along a groove as partial discontinuities or partial modifications in the wobbled groove.

1. Field of the Invention
The present invention relates to an optically rewritable optical disc and to an apparatus and method for reading addresses prewritten to the optical disc.
2. Description of Related Art
DVD-RAM, CD-RW, and MD are examples of user-recordable optical discs that have become available in the last few years. This type of recordable optical disc has grooves formed along a spiral or plural concentric tracks with a phase change material or magneto-optical material formed on the groove surface. Addresses for specifying a particular location on the disc are also pre-recorded to the tracks using rewritable marks. This type of address is described in Japanese Patent Laid-Open Publication (kokai) H8-315426.
Kokai H8-315426 describes providing discontinuities in the grooves and using these discontinuous parts for forming a pattern corresponding to the address signal. A pattern corresponding to the address signal is a binary signal that inverts at each discontinuity, an on/off signal used for generating an ATIP (Absolute Time Pregroove) signal. The discontinuities are therefore used simply as a signal indicating presence or absence.
(Technical Problem to be Solved)
More address values and a method for more efficiently assigning address values is needed in order to create an optical disc with an even higher recording density. In an optical disc according to the related art, however, the discontinuities are nothing more than a trigger signal for signal inversion and can carry only one piece of information (trigger data). Numerous marks are therefore required.
Furthermore, the approximate location of a track can be detected with the ATIP signal, but the position where recording starts cannot be precisely determined. This means that when appending a new recording after recording once, or when overwriting data in the middle of a previous recording, new data may be recorded over previously recorded data that is still necessary. Crosstalk also occurs more easily when the track pitch is reduced.
The present invention is directed to a solution for these problems and provides an optical disc wherein discontinuities or modifications are formed in the grooves and two or more meanings are imparted to the discontinuities or modifications in order to provide address information more efficiently.
A further object of the invention is to provide an optical disc whereby the positioning precision of the recording start point can be increased.
A yet further object of the invention is to provide an optical disc enabling the track pitch to be reduced.
A yet further object of the invention is to provide an optical disc that is recordable and playable with full CLV (constant linear velocity) control.
A yet further object of the invention is to provide an apparatus and method of simple design for accurately reading address information from an optical disc having address information containing two or more meanings imparted to discontinuities or modifications formed in the grooves.
The invention as described in claim 1 is a rewritable optical disc with a spiral or concentric track comprising:
a groove formed with a sinusoidal wobble along the track;
a sector block disposed along the track;
sectors formed by dividing each sector block into a plurality of parts;
a synchronization mark formed in the first sector in each sector block; and
positive marks or negative marks formed in sectors other than the first sector in each sector block;
each positive mark being a first groove discontinuity creating a discontinuity of a first width W1 in the track direction of the groove,
each negative mark being a second groove discontinuity creating a discontinuity of a second width W0 in the track direction of the groove, and
each synchronization mark being a third groove discontinuity creating a discontinuity of a third width Ws in the track direction.
The invention as described in claim 2 is an optical disc as described in claim 1, wherein the first, second, and third groove discontinuities have a mirror surface.
The invention as described in claim 3 is an optical disc as described in claim 1, wherein the first, second, and third groove discontinuities are formed in maximum amplitude parts of the wobble groove.
The invention as described in claim 4 is an optical disc as described in claim 1, wherein the first, second, and third groove discontinuities are formed in the minimum amplitude part of the wobble groove.
The invention as described in claim 5 is an optical disc as described in claim 1, wherein the first, second, and third widths W1, W0, and Ws are all longer than the longest mark contained in data recorded to a groove and less than or equal to xc2xd wobble period.
The invention as described in claim 6 is an optical disc as described in claim 1, wherein the first, second, and third widths W1, W0, and Ws are all longer than the longest mark contained in data recorded to a groove and less than or equal to xc2xc wobble period.
The invention as described in claim 7 is an optical disc as described in claim 1, wherein the ratio between first, second, and third widths W1, W0, and Ws is 1:2:4 where any one of widths W1, W0, and Ws is 1.
The invention as described in claim 8 is an optical disc as described in claim 1, wherein the ratio between first, second, and third widths W1, W0, and Ws is 2:1:4.
The invention as described in claim 9 is an optical disc as described in claim 1, wherein the first, second, and third widths W1, W0, and Ws are two bytes, one byte, and four bytes, respectively.
The invention as described in claim 10 is a rewritable optical disc with a spiral or concentric track comprising:
a groove formed with a sinusoidal wobble along the track;
a sector block disposed along the track;
sectors formed by dividing each sector block into a plurality of parts;
a synchronization mark formed in the first sector in each sector block; and
positive marks or negative marks formed in sectors other than the first sector in each sector block;
each positive mark, negative mark, and synchronization mark being formed as a groove top offset portion where the groove is locally offset in a first direction perpendicular to the track direction, a groove bottom offset portion where the groove is locally offset in a second direction perpendicular to the track direction, or a combination of groove bottom offset portions and groove top offset portions.
The invention as described in claim 11 is an optical disc as described in claim 10, wherein:
a positive mark is a groove top offset portion;
a negative mark is a groove bottom offset portion; and
a synchronization mark is a combination of a groove top offset portion and groove bottom offset portion.
The invention as described in claim 12 is an optical disc as described in claim 10, wherein the groove bottom offset portions and groove top offset portions are disposed at maximum amplitude parts of the wobble groove and are offset in a track center direction.
The invention as described in claim 13 is an optical disc as described in claim 10, wherein groove bottom offset portions and groove top offset portions of a synchronization mark are mutually adjacent at n+(xc2xd) wobble cycles (where n is a positive integer).
The invention as described in claim 14 is an optical disc as described in claim 13, wherein n is 0.
The invention as described in claim 15 is a rewritable optical disc with a spiral or concentric track comprising:
a groove formed with a sinusoidal wobble along the track;
a sector block disposed along the track;
sectors formed by dividing each sector block into a plurality of parts;
a synchronization mark formed in the first sector in each sector block; and
positive marks or negative marks formed in sectors other than the first sector in each sector block;
each positive mark, negative mark, and synchronization mark being formed by a groove ascending-phase inversion part for vertically phase inverting an approximately xc2xc wobble cycle part from a trough in the wobble groove, a groove descending-phase inversion part for vertically phase inverting an approximately xc2xc wobble cycle part from a peak in the wobble groove, or a combination of a groove ascending-phase inversion part and groove descending-phase inversion part.
The invention as described in claim 16 is an optical disc as described in claim 15, wherein a positive mark is formed by a groove ascending-phase inversion part, a negative mark is formed by a groove descending-phase inversion part, and a synchronization mark is formed by a combination of a groove descending-phase inversion part and groove ascending-phase inversion part.
The invention as described in claim 17 is an optical disc as described in claim 15, wherein both ends of said groove descending-phase inversion parts and groove ascending-phase inversion parts are a groove discontinuity.
The invention as described in claim 18 is an optical disc as described in claim 15, wherein both ends of said groove descending-phase inversion parts and groove ascending-phase inversion parts are an abruptly displaced groove.
The invention as described in claim 19 is a rewritable optical disc with a spiral or concentric track comprising:
a groove formed with a sinusoidal wobble along the track;
a sector block disposed along the track;
sectors formed by dividing each sector block into a plurality of parts;
a synchronization mark formed in the first sector in each sector block; and
positive marks or negative marks formed in sectors other than the first sector in each sector block;
each positive mark, negative mark, and synchronization mark being formed by a groove ascending-rectilinear portion connected to the wobble peak by forming the groove at a trough level from a trough in the wobble groove to an approximately xc2xc wobble cycle portion of the wobble groove, then abruptly changing to a peak level and forming the groove at the peak level in the next xc2xc wobble cycle portion,
a groove descending-rectilinear portion connected to the wobble trough by forming the groove at a peak level from a peak in the wobble groove to an approximately xc2xc wobble cycle portion of the wobble groove, then abruptly changing to a trough level and forming the groove at the trough level in the next xc2xc wobble cycle portion, or
a combination of a groove descending-rectilinear portion and groove ascending-rectilinear portion.
The invention as described in claim 20 is an optical disc as described in claim 19, wherein a positive mark is formed by a groove ascending-rectilinear portion, a negative mark is formed by a groove descending-rectilinear portion, and a synchronization mark is formed by a combination of a groove descending-rectilinear portion and groove ascending-rectilinear portion.
The invention as described in claim 21 is an optical disc as described in claim 19, wherein each positive mark, negative mark, and synchronization mark is formed by said groove ascending-rectilinear portion being repeated for a plurality of cycles of the wobbled groove, said groove descending-rectilinear portion being repeated for a plurality of cycles of the wobbled groove, or said combination of a groove descending-rectilinear portion and groove ascending-rectilinear portion being repeated for a plurality of cycles of the wobbled groove.
The invention as described in claim 22 is an optical disc as described in claim 21, wherein each positive mark is formed by said groove ascending-rectilinear portion being repeated for a plurality of cycles of the wobbled groove,
each negative mark is formed by said groove descending-rectilinear portion being repeated for a plurality of cycles of the wobbled groove, and
each synchronization mark is formed by said combination of a groove descending-rectilinear portion and groove ascending-rectilinear portion being repeated for a plurality of cycles of the wobbled groove.
The invention as described in claim 23 is an address reading apparatus for detecting synchronization marks, positive marks, and negative marks contained in an optical disc as described in claim 1 and accumulating 1 and 0 data obtained from positive marks and negative marks dispersedly contained in one sector block to read said sector block address, comprising:
an optical head (2) for emitting a laser beam to a track of the optical disc and detecting reflected light by means of two photodetectors separated along the track direction;
a subtracter (4) for getting a difference of signals from the two photodetectors and generating a difference signal;
a filter (6) for removing a wobble frequency component of a wobbled track and generating a groove discontinuity pulse;
a discriminator (12) for detecting a groove discontinuity pulse width and discriminating each synchronization mark, positive mark, and negative mark based on said width to generate a synchronization mark signal, positive mark signal, and negative mark signal; and
a demodulator (14) for generating 1s and 0s according to each positive mark signal and negative mark signal contained between one synchronization mark signal and a next synchronization mark signal.
The invention as described in claim 24 is an address reading method for detecting synchronization marks, positive marks, and negative marks contained in an optical disc as described in claim 1 and accumulating 1 and 0 data obtained from positive marks and negative marks dispersedly contained in one sector block to read said sector block address, comprising:
emitting a laser beam to a track of the optical disc and detecting reflected light by means of two photodetectors separated along the track direction;
getting a difference of signals from the two photodetectors and generating a difference signal;
removing a wobble frequency component of a wobbled track and generating a groove discontinuity pulse;
detecting a groove discontinuity pulse width and discriminating each synchronization mark, positive mark, and negative mark based on said width to generate a synchronization mark signal, positive mark signal, and negative mark signal; and
generating 1s and 0s according to each positive mark signal and negative mark signal contained between one synchronization mark signal and a next synchronization mark signal.
The invention as described in claim 25 is an address reading apparatus for detecting synchronization marks, positive marks, and negative marks contained in an optical disc as described in claim 10 and accumulating 1 and 0 data obtained from positive marks and negative marks dispersedly contained in one sector block to read said sector block address, comprising:
an optical head (2) for emitting a laser beam to a track of the optical disc and detecting reflected light by means of two photodetectors separated along the track direction;
a subtracter (4) for getting a difference of signals from the two photodetectors and generating a difference signal;
a filter (6) for removing a wobble frequency component of a wobbled track and generating a groove bottom offset portion pulse in a negative direction and a groove top offset portion pulse in a positive direction;
discriminators (52, 54, 12) for discriminating each synchronization mark, positive mark, and negative mark based on said groove top offset portion pulse, groove bottom offset portion pulse, and groove bottom offset portion pulse and groove top offset portion pulse pair to generate a positive mark signal, negative mark signal, and synchronization mark signal; and
a demodulator (14) for generating 1s and 0s according to each positive mark signal and negative mark signal contained between one synchronization mark signal and a next synchronization mark signal.
The invention as described in claim 26 is an address reading method for detecting synchronization marks, positive marks, and negative marks contained in an optical disc as described in claim 10 and accumulating 1 and 0 data obtained from positive marks and negative marks dispersedly contained in one sector block to read said sector block address, comprising:
emitting a laser beam to a track of the optical disc and detecting reflected light by means of two photodetectors separated along the track direction;
getting a difference of signals from the two photodetectors and generating a difference signal;
removing a wobble frequency component of a wobbled track and generating a groove bottom offset portion pulse in a negative direction and a groove top offset portion pulse in a positive direction;
discriminating each synchronization mark, positive mark, and negative mark based on said groove top offset portion pulse, groove bottom offset portion pulse, and groove bottom offset portion pulse and groove top offset portion pulse pair to generate a positive mark signal, negative mark signal, and synchronization mark signal; and
generating 1s and 0s according to each positive mark signal and negative mark signal contained between one synchronization mark signal and a next synchronization mark signal.
The invention as described in claim 27 is an address reading apparatus for detecting synchronization marks, positive marks, and negative marks contained in an optical disc as described in claim 15 and accumulating 1 and 0 data obtained from positive marks and negative marks dispersedly contained in one sector block to read said sector block address, comprising:
an optical head (2) for emitting a laser beam to a track of the optical disc and detecting reflected light by means of two photodetectors separated along the track direction;
a subtracter (4) for getting a difference of signals from the two photodetectors and generating a difference signal;
a filter (6) for removing a wobble frequency component of a wobbled track and generating a groove descending-phase inversion part pulse in a negative direction and a groove ascending-phase inversion part pulse in a positive direction;
discriminators (52, 54, 12) for discriminating each synchronization mark, positive mark, and negative mark based on said groove ascending-phase inversion part pulse, groove descending-phase inversion part pulse, and groove descending-phase inversion part pulse and groove ascending-phase inversion part pulse pair to generate a positive mark signal, negative mark signal, and synchronization mark signal; and
a demodulator (14) for generating 1s and 0s according to each positive mark signal and negative mark signal contained between one synchronization mark signal and a next synchronization mark signal.
The invention as described in claim 28 is an address reading method for detecting synchronization marks, positive marks, and negative marks contained in an optical disc as described in claim 15 and accumulating 1 and 0 data obtained from positive marks and negative marks dispersedly contained in one sector block to read said sector block address, comprising:
emitting a laser beam to a track of the optical disc and detecting reflected light by means of two photodetectors separated along the track direction;
getting a difference of signals from the two photodetectors and generating a difference signal;
removing a wobble frequency component of a wobbled track and generating a groove descending-phase inversion part pulse in a negative direction and a groove ascending-phase inversion part pulse in a positive direction;
discriminating each synchronization mark, positive mark, and negative mark based on said groove ascending-phase inversion part pulse, groove descending-phase inversion part pulse, and groove descending-phase inversion part pulse and groove ascending-phase inversion part pulse pair to generate a positive mark signal, negative mark signal, and synchronization mark signal; and
generating 1s and 0s according to each positive mark signal and negative mark signal contained between one synchronization mark signal and a next synchronization mark signal.
The invention as described in claim 29 is an address reading apparatus for detecting synchronization marks, positive marks, and negative marks contained in an optical disc as described in claim 19 and accumulating 1 and 0 data obtained from positive marks and negative marks dispersedly contained in one sector block to read said sector block address, comprising:
an optical head (2) for emitting a laser beam to a track of the optical disc and detecting reflected light by means of two photodetectors separated along the track direction;
a subtracter (4) for getting a difference of signals from the two photodetectors and generating a difference signal;
a filter (6) for removing a wobble frequency component of a wobbled track and generating a groove descending-rectilinear portion pulse in a negative direction and a groove ascending-rectilinear portion pulse in a positive direction;
discriminators (52, 54, 12) for discriminating each synchronization mark, positive mark, and negative mark based on said groove ascending-rectilinear portion pulse, groove descending-rectilinear portion pulse, and groove descending-rectilinear portion pulse and groove ascending-rectilinear portion pulse pair to generate a positive mark signal, negative mark signal, and synchronization mark signal; and
a demodulator (14) for generating 1s and 0s according to each positive mark signal and negative mark signal contained between one synchronization mark signal and a next synchronization mark signal.
The invention as described in claim 30 is an address reading method for detecting synchronization marks, positive marks, and negative marks contained in an optical disc as described in claim 19 and accumulating 1 and 0 data obtained from positive marks and negative marks dispersedly contained in one sector block to read said sector block address, comprising:
emitting a laser beam to a track of the optical disc and detecting reflected light by means of two photodetectors separated along the track direction;
getting a difference of signals from the two photodetectors and generating a difference signal;
removing a wobble frequency component of a wobbled track and generating a groove descending-rectilinear portion pulse in a negative direction and a groove ascending-rectilinear portion pulse in a positive direction;
discriminating each synchronization mark, positive mark, and negative mark based on said groove ascending-rectilinear portion pulse, groove descending-rectilinear portion pulse, and groove descending-rectilinear portion pulse and groove ascending-rectilinear portion pulse pair to generate a positive mark signal, negative mark signal, and synchronization mark signal; and
generating 1s and 0s according to each positive mark signal and negative mark signal contained between one synchronization mark signal and a next synchronization mark signal.
The invention as described in claim 31 is an address reading apparatus for detecting synchronization marks, positive marks, and negative marks contained in an optical disc as described in claim 21 and accumulating 1 and 0 data obtained from positive marks and negative marks dispersedly contained in one sector block to read said sector block address, comprising:
an optical head (2) for emitting a laser beam to a track of the optical disc and detecting reflected light by means of two photodetectors separated along the track direction;
a subtracter (4) for getting a difference of signals from the two photodetectors and generating a difference signal;
a filter (6) for removing a wobble frequency component of a wobbled track and generating a groove descending-rectilinear portion pulse in a negative direction and a groove ascending-rectilinear portion pulse in a positive direction;
a first counter (93) for counting a number of groove descending-rectilinear portion pulses in a negative direction contained in one sector;
a second counter (94) for counting a number of groove ascending-rectilinear portion pulses in a positive direction contained in one sector;
discriminators (95 to 99) for comparing a first count from the first counter and a second count from the second counter and discriminating each synchronization mark, positive mark, and negative mark according to whether the first count is sufficiently high, the second count is sufficiently high, or the first count and second count are substantially equal to generate a positive mark signal, negative mark signal, and synchronization mark signal; and
a demodulator (14) for generating 1s and 0s according to each positive mark signal and negative mark signal contained between one synchronization mark signal and a next synchronization mark signal.
The invention as described in claim 32 is an address reading method for detecting synchronization marks, positive marks, and negative marks contained in an optical disc as described in claim 21 and accumulating 1 and 0 data obtained from positive marks and negative marks dispersedly contained in one sector block to read said sector block address, comprising:
emitting a laser beam to a track of the optical disc and detecting reflected light by means of two photodetectors separated along the track direction;
getting a difference of signals from the two photodetectors and generating a difference signal;
removing a wobble frequency component of a wobbled track and generating a groove descending-rectilinear portion pulse in a negative direction and a groove ascending-rectilinear portion pulse in a positive direction;
counting a number of groove descending-rectilinear portion pulses in a negative direction contained in one sector as a first count;
counting a number of groove ascending-rectilinear portion pulses in a positive direction contained in one sector as a second count;
comparing the first count and second count and discriminating each synchronization mark, positive mark, and negative mark according to whether the first count is sufficiently high, the second count is sufficiently high, or the first count and second count are substantially equal to generate a positive mark signal, negative mark signal, and synchronization mark signal; and
generating 1s and 0s according to each positive mark signal and negative mark signal contained between one synchronization mark signal and a next synchronization mark signal.
The invention as described in claim 33 is an optical disc as described in claim 19, wherein the synchronization mark further has a block mark indicating a sector block starting position.
The invention as described in claim 34 is an optical disc as described in claim 33, wherein said block mark is formed by disposing a discontinuity in the track groove.
The invention as described in claim 35 is an optical disc as described in claim 33, wherein said block mark is formed by locally changing a width of the track groove.
The invention as described in claim 36 is an optical disc as described in claim 33, wherein said block mark is formed by locally changing wobble amplitude.
The invention as described in claim 37 is an optical disc as described in claim 19, wherein each wobble cycle is formed so that the duty ratio differs according to positive data and negative data.
The invention as described in claim 38 is an optical disc as described in claim 19, wherein only one edge of the track groove is wobbled.
(Advantages Over the Related Art)
Meaning other than simply identifying the presence or absence of a modification can be imparted to each groove modification by forming groove modifications of multiple different shapes in a wobble groove. More information can therefore be recorded with fewer groove modifications.
An address reader of simple configuration according to the present invention can also accurately and efficiently read dispersed addresses.

Optical disc and optical disc address reading apparatus and method

Matsushita Electric Industrial Co., Ltd.


A vehicle includes an engine and driven wheels each having an associated friction brake. A brake pedal is operable to engage the friction brakes. The vehicle includes a transmission having an input shaft driveably connected to the engine, an output element driveably connected to the driven wheels, and a gear mechanism adapted to establish at least one torque flow path between the input shaft and the output element. The transmission further includes a shift element that interrupts the torque flow path when disengaged. A gear selector is disposed in the passenger cabin and includes at least one forward-drive position, a reverse position, and a neutral position. At least one vehicle controller is configured to, in response to the gear selector being in the forward-drive position, a speed of the vehicle being zero, the vehicle being within a first predefined distance of a stoplight, and the brake pedal being depressed, disengage the shift element to put the transmission in neutral idle.

Motor vehicles include a powertrain that transmits torque to the driven wheels to propel the vehicle. The powertrain includes an engine and a transmission. The transmission is operable to change a speed ratio between an input connected to the engine and an output shaft connected to the driven wheels. The speed ratios are created by planetary gear sets disposed within the gear box. A series of clutches and brakes control the planetary gear sets to establish one or more power flow paths between the input and output shafts.
The transmission includes an associated gear shifter disposed within a passenger compartment of the vehicle. The gear shifter includes a plurality of positions such as PARK, REVERSE, NEUTRAL, and DRIVE. Movement of the gear shifter causes one or more of the clutches and brakes to engage or disengage placing the transmission in the desired state. When the gear shifter is in NEUTRAL, all of the controllable clutches of the transmission are disengaged to isolated the input and output shafts from each other.
Some transmissions include a neutral-idle operation in which the vehicle controller automatically places the vehicle in NEUTRAL when the vehicle is stopped with the brake pedal depressed and the gear shifter in DRIVE. Providing neutral-idle operation improves fuel economy by reducing the workload on the engine when the vehicle is stopped in gear. Some neutral-idle systems include a delay timer that inhibits neutral idle during stops of short duration.

Control system and method for neutral idle operation


An accelerator system includes a plurality of cells. Each cell includes a focus magnet and a defocus magnet each configured to create a magnetic field so as to confine and accelerate a particle beam, the focus magnet being configured to focus the particle beam in a horizontal direction and defocus the particle beam in a vertical direction, and the defocus magnet being configured to focus the particle beam in a vertical direction and defocus the particle beam in a horizontal direction. Each of the plurality of cells is configured to confine the particle beam in an isochronous orbit during acceleration. The accelerator system is a non-scaling fixed field alternating gradient particle accelerator (FFAG).

Accelerators are becoming increasingly important in medicine, clean energy and national security. Accelerators can be used for safer nuclear reactors, industrial irradiation, cancer therapy and cargo inspection.
A strong economic consideration is accelerator footprint; synchrotrons and linacs typically reserve much larger civil accommodations. With its compact footprint and continuous beam current, both high and low intensity, the cyclotron is the current industrial and medical standard. A new player to advanced accelerator applications is the Fixed Field Alternating Gradient Accelerator (FFAG), including a scaling FFAG version and a more recent invention, a non-scaling FFAG.
The so-called scaling FFAG (either spiral or radial-sector FFAGs) is characterized by geometrically similar orbits of increasing radius. Direct application of high-order magnetic fields and edge focusing maintains a constant tune and optical functions during the acceleration cycle and avoids low-order resonances. In general, scaling FFAG designs are not compatible with isochronous orbits and therefore not compatible with CW operation.
The non-scaling FFAG was subsequently developed (C. Johnstone, et al., "Fixed Field Circular Accelerator Designs", PAC '99, New York, P. 3068.). The non-scaling FFAG was proposed for muon acceleration and utilized simple, combined function magnets like a synchrotron. However, it did not maintain a constant tune and was not suitable for an accelerator with a modest RF system and a slower acceleration cycle.
An initial approach to tune stabilization in a linear-field non-scaling FFAG was developed (See U.S. Pat. No. 7,880,146 B2; "Tune-stabilized, non-scaling, fixed-field, alternating gradient accelerator", Johnstone, Carol J.) in which a set of seven equations relate a number of parameters specifying focus and defocus magnets together. A linear field condition was assigned in order to stabilize machine tune, but given the linear condition, compact stable orbits cannot be achieved at near relativistic and relativistic energies.
Further, U.S. Publication No. 2012/013274 describes a Non-Scaling FFAG Accelerator design, wherein the linear field condition is removed in order to realize advanced machine properties and optimal designs. The nonlinear field condition, or high-order field, allows for more constant machine tune as a function of momentum or energy and more compact machines resulting in smaller apertures. Limits were set on the extraction and injection radii for compact machines in an optimizer search for stable solutions, but this is a constraint that does not reflect fundamental dynamics unlike limits required on cell phase advance or tune. These additional conditions were imposed only to guide the optimizer search but do not comprise a solution.
With the cyclotron as the current industrial and medical standard, a competing CW FFAG could potentially have a broad impact on medical accelerators, proton drivers for neutron production, accelerator-driven nuclear reactors, accelerator transmutation of waste (ATW), and production of radiopharmaceuticals, as well as open up a range of as-yet unexplored industrial applications.

Method and system for stable dynamics and constant beam delivery for acceleration of charged particle beams in a non-scaling fixed field alternating gradient magnetic field accelerator


A plastic or polytetrafluoroethylene split seal ring having highly flexible, annularly extending, axially spaced apart side walls is disclosed for sealing opposed, concentrically overlapping open end portions of a pair of gas conduits together or for sealing a sleeve of a flexible coupling to end portions of two opposed, spaced apart gas conduits is disclosed. The ring includes an annularly extending base portion, a pair of axially spaced apart, annularly extending side walls connected to and along opposite sides of the base portion. The side walls project radially beyond a radially inwardly or radially outwardly facing surface of the base portion to form a groove in which an expansion or contraction member can be disposed to effect a gas tight seal of the ring against and around a surface of one of the conduits. A pair of annularly extending, axially spaced apart slots are formed in the base portion next to the side walls to give the side walls enhanced flexibility to form a seal in a ring housing or channel to maintain an effectively gas tight seal between the conduits with axial misaligning movement, translational movement, rotational movement or vibration of the conduits. A third annularly extending slot can be formed on an axial centerline of the base portion so as to open toward the opposing conduit to further increase flexibility of the seal ring.

This invention relates generally to sealing rings and, more specifically, to sealing rings used in the flexible joinder of end portions of two opposed gas conduits for permitting gas flow therebetween during angular misalignment movement or offset, axial translation, axial rotation, and vibration of the conduits with a minimum of gas leakage.
Flexible coupling devices which employ sealing rings for joining gas or air conduits together in an effectively air tight or gas tight manner while permitting the previously mentioned types of movement of the adjoined conduits have, broadly speaking, long been known and used in the prior art. See, for example, the flexible couplings or sleeves and various sealing ring combinations used therewith as disclosed in U.S. Pat. No. 5,106,129 granted to L. A. Camacho et al. on Apr. 21, 1992. Another type of prior art coupling or sleeve (not including the rings shown therewith) for joining high pressure/high temperature air conduits together as used in the commercial air craft industry is shown at 12 in FIG. 1 of the accompanying drawings.
In commercial aircraft the sealing ring assemblies used in the ring housings of flexible coupling sleeves or in ring channels disposed between opposed, concentrically overlapping end portions of gas conduits of different diameters typically operate at air pressures from 40 to 70 psig at temperatures from ambient up to 350 to 500.degree. F. Silicone seal rings have typically been used for this purpose in the prior art. While such prior art seal rings have good flexibility when originally installed and operated at low temperatures of from ambient up to about 200.degree. F., they have a tendency to crack, become cracked and brittle and developed burned spots or areas when subjected to the typical high operating temperature range encountered in gas ducting or conduct systems of commercial jet engines. As a result, they actually suffer a loss of ring material, as through vaporization and become deformed so as to lose certain of their design dimensional characteristics. They also become set so that they can no longer adjust to relative movements of between two gas conduits being sealed by the rings in the sleeve housing or ring channel such that gas leakages occur past the rings.
Other materials, such as polytetrafluoroethylene and certain types of plastics do not encounter these problems in the 350 to 500.degree. F. operating temperature range as does silicone. However, these latter materials are ordinarily not sufficiently flexible to adjust well at low temperatures to vibratory and other movements between adjoined conduits and therefore have not previously been found to be useful as sealing rings in aircraft engine gas or air ducting systems.
By means of my invention, I have developed a sealing ring which can be made of such polytetrafluoroethylene and plastic material which has none of the problems encountered with silicone rings in the 350 to 500.degree. F. operating temperature range, yet is sufficiently flexible at all temperatures from ambient up to and through this typical high temperature range to provide excellent sealing characteristics for adjoined gas conduits which are subject to various vibratory and other movements relative to one another.

Seal rings for low loss flexible coupling of gas conduits


An aspect provides an apparatus, including: a receptacle for an information handling device having a user display, the receptacle having at least a first side, a second side, and at least one edge, wherein the first side of the receptacle has at least one opening therein through which the information handling device is insertable there-through and the second side forms a back of the receptacle; a protrusion from the second side of the receptacle pivotably attached to the second side of the receptacle and of sufficient length such that the protrusion will wrap around an edge of the receptacle and cover the opening in the first side of the receptacle; and wherein at least a portion of the protrusion comprises thereon a mechanism that permits the edge of the receptacle to be held in position. Other aspects are described and claimed.

Information handling devices ("devices") come in a variety of forms, for example tablet computing devices, smart phones, and the like. Users of many of these devices prefer to place the devices inside a case, which offers protection to the device from scratches or other damage that may occur when the device is not in use. When in use, however, a user often prefers to place the information handling device at an angle for easier viewing.

Multi-angle stand for an information handling device


A power supply device for vehicles is disclosed, which device includes a backup unit to the power supply as an auxiliary power supply employing a capacitor unit formed of plural capacitors. The auxiliary power supply includes a power supply section allowing the capacitor unit to power an electronic controller, and a compulsory operating section for operating the power supply section. An operating status of the power supply section is monitored even when a battery operates normally, so that the power supply device for vehicles with higher reliability and improved safety is obtainable.

Development of hybrid cars and electric vehicles has progressed rapidly, which entails the rapid development of electrical brakes.
An electrical application of a brake in a vehicle generally uses a battery as a power source. In such a case, if the battery fails to supply power due to some reason, the brake cannot be applied. Therefore, an auxiliary battery independent of the main battery is included in the vehicle as an auxiliary power supply.
Japanese Patent Application Non-Examined Publication No. H05-116571 discloses prior art to the present invention.
In such a power supply device for vehicles, since the auxiliary power supply is responsible for braking the vehicle when the main battery fails, it is critical to supply power to the auxiliary power supply without fail at an emergency. Therefore, it is important to predict the service life of the auxiliary power supply accurately and keep detecting the status of the auxiliary power supply.
However, if a battery is used as the auxiliary power supply, it is difficult to predict the service life of this battery. While voltage of the battery can be monitored, it is difficult to detect battery abnormality by only monitoring voltage. Thus the battery has been replaced periodically with a new one ahead of time so that the safety can be more positively ensured. The periodical replacement of the battery ahead of time is somewhat effective; however, it is difficult to monitor the status of the battery everyday or every time when a user starts the vehicle. Further improvement is thus demanded.


A method of manufacturing toner includes forming liquid droplets. The forming liquid droplets includes vibrating a toner constituents liquid in a liquid column resonance liquid chamber having a plurality of nozzles to form a liquid column resonance pressure standing wave therein, and discharging the toner constituents liquid from the nozzles. The method further includes solidifying the liquid droplets. The toner constituents liquid includes an organic solvent and toner constituents dissolved or dispersed in the organic solvent. The toner constituents include a resin, a colorant, and a release agent. The nozzles are disposed within an area including an antinode of the liquid column resonance pressure standing wave. One of the nozzles disposed closer to a node of the liquid column resonance pressure standing wave has a smaller outlet diameter than that disposed farther from the node. The toner constituents liquid is applied with a uniform pressure at a vicinity of each nozzle.

1. Technical Field
The present disclosure relates to a method of manufacturing toner, an apparatus for manufacturing toner, and a method of manufacturing resin particle.
2. Description of Related Art
Pulverization methods are generally known as toner manufacturing methods. In a pulverization method, toner constituents are melt-kneaded by double rolls or a double-axis extruder. The kneaded product is pulverized into coarse particles and the coarse particles are pulverized into fine particles. The fine particles are classified by size and the desired-size particles are collected. The collected particles are further mixed with an external additive, such as a fluidizer, by a HENSCHEL MIXER, if needed. The coarse pulverization can be performed by an instrument such as ROATPLEX and PULVERIZER. The fine pulverization can be performed by an instrument such as JET MILL and TURBO MILL. The classification can be performed by a wind power classifier such as ELBOW-JET CLASSIFIER.
Atomization methods are also known as toner manufacturing methods. In an atomization method, a toner constituents liquid is formed into liquid droplets in a gas phase by the use of an atomizer, such as single-fluid nozzle (pressurized nozzle) atomizer, multi-fluid spray nozzle atomizer, and rotating disc atomizer. The single-fluid nozzle atomizer is configured to atomize a liquid from nozzle holes by application of pressure. The multi-fluid spray nozzle atomizer, such as two-fluid or four-fluid spray nozzle atomizer, is configured to atomize a mixture of a liquid and a compressed gas. The resulting liquid droplets are finer than those resulting from the single-fluid nozzle atomizer. The rotating disc atomizer is configured to form a liquid into liquid droplets by centrifugal force from a rotating disc. The atomization methods can be generally performed by commercially available spray dry systems which are configured to perform atomization and drying simultaneously. When drying by the spray dry system is insufficient, the secondary drying, such as fluidized-bed drying, can be performed. The resulting particles are further mixed with an external additive, such as a fluidizer, by a HENSCHEL MIXER, if needed.
It is likely that toner particles produced by the pulverization or atomization method include a large amount of ultrafine particles, which is not preferable. The ultrafine particles should be removed because they contaminate carrier particles (in two-component developer) and a developing device. As the content of ultrafine particles increases, productivity decreases and production cost increases.
Injection granulation methods are also known as toner manufacturing methods. In an injection granulation method, a liquid is formed into liquid droplets by discharging the liquid from nozzle holes having a diameter similar to a target toner diameter by the use of a vibration generator. Japanese Patent Application Publication No. 2007-199463 describes an injection granulation method which forms liquid columns by discharging a toner constituents liquid from a pressure chamber through nozzles upon application of pressure in a certain direction and dividing the liquid columns into liquid droplets upon application of weak ultrasonic vibration. The toner constituents liquid is supplied to the pressure chamber from a toner constituents liquid container. The toner constituents liquid container has an agitation member for generating a flow of the toner constituents liquid. Due to the generated flow, each toner constituents are kept evenly dispersed in the toner constituents liquid. The toner constituents liquid in the pressure chamber is pressurized in a certain direction and formed into liquid columns through the nozzles. The liquid columns are divided into uniform liquid droplets by inducing the Rayleigh fission by applying weak vibration from a vibration generator. The liquid droplets are then solidified into toner particles. When employing the Rayleigh fission, the liquid is discharged from the nozzles due to vibration as well as pressure. Therefore, the vibration generator has to generate only weak vibration with only low voltage.
In the described method, liquid droplets, formed upon application of pressure to the toner constituents liquid in a certain direction, have a diameter about twice the inner diameter of the nozzle. Therefore, the inner diameter of the nozzle should be smaller when forming small-sized particles, which is more likely to cause nozzle clogging due to the pressure.
Japanese Patent No. 3786034 describes another injection granulation method in which a raw material liquid of toner is discharged from a nozzle by uniformly applying pressure to the raw material liquid retained in a raw material retention part. FIGS. 1A to 1E are views for explaining a mechanism of liquid droplet discharge described in the above reference. A raw material retention part 101 repeatedly goes through the following three states so that liquid droplets are intermittently formed. FIG. 1A is a view of the first state in which a discharge signal is not yet input. A piezoelectric body 102 does not deform, the raw material retention part 101 does not change its volume, and therefore the raw material liquid 103 is not discharged from a nozzle 104. FIGS. 1B and 1C are views of the second state in which a discharge signal is input. The piezoelectric body 103 deforms such that the raw material retention part 101 reduces its volume. In the second state, the raw material retention part 101 instantaneously and uniformly increases its inner pressure and thereby discharges a liquid droplet 105 from the nozzle 104. The raw material retention part 101 is communicated with a raw material storing part, not shown, for storing and feeding the raw material liquid 102. FIGS. 1D and 1E are views of the third state in which one liquid droplet has been discharged. Voltage supply is terminated and the piezoelectric body 103 has returned to its original shape. Due to negative pressure in the raw material retention part 101, the raw material retention part 101 is replenished with the raw material liquid 103 from the raw material storing part.
After being replenished with the raw material liquid 103, the raw material retention part 101 needs to go through the first state in which the raw material liquid 103 is not discharged, which reduces toner productivity.
The method generally produces relatively large liquid droplets. Small liquid droplets can be produced only when the nozzle diameter is relatively small or the toner raw material is diluted. It is likely that a small-diameter nozzle is clogged with solid toner constituents, such as pigment and release agent, thereby reducing production stability. A diluted toner raw material requires a greater amount of energy when being dried, thereby also reducing production stability. When production stability is low, the raw material liquid 103 accumulates in the raw material retention part 101 for an extended period of time, resulting in undesirable fixation of toner constituents to production equipments.
In this method, each raw material retention part 101 has only one nozzle. Provision of a plurality of nozzles may increase productivity but may decrease size uniformity of the produced particles.

This patent is subject to a terminal disclaimer.

Method of manufacturing toner, apparatus for manufacturing toner, and method of manufacturing resin particle


An encoding device performing an encoding process according to an encoding scheme using a CTS indicating time at which presentation or reproduction is performed, comprising: an encapsulator that generates a media unit in which one or more access units encoded by the encoding scheme are capsulated, and a transmitter that transmits information indicating an absolute time of an access unit included at a top portion of the media unit, in addition to the media unit, wherein the encapsulator adds a CTS relative value to the nth access unit included in the media unit, the CTS relative value being a difference between the CTS of the nth access unit and the DTS of the n+1th access unit.

In a related art encoding device, as a format of an access unit correlated with a time stamp, PES (Packetized Elementary Stream) prescribed by MPEG (Moving Picture Experts Group)-2 System is known (Non Patent Literature 1).
As illustrated in FIG. 19(a), this PES 90 includes a field indicating a PES packet length (PES_packet_length), a field indicating a DTS (Decoding Time Stamp) and a field indicating a PTS (Presentation Time Stamp). Further, this PES 90 can encapsulate (i.e., store) one access unit (AU: Access Unit). In FIGS. 19(a) and 19(b), a part of the fields is not illustrated.
Further, in a related art encoding device, a format of RTP (Real-time Transport Protocol) payload prescribed by IETF (Internet Engineering Task Force) is also known (Non Patent Literature 2).
As illustrated in FIG. 19(b), this RTP payload 91 includes a field indicating a base time stamp (Base_Timestamp). Further, in this RTP payload 91, a plurality of NAL (Network Adaptation Layer) units which are smaller units than the access units can be encapsulated. At this time, the RTP payload 91 includes, for each NAL unit, a field indicating the size of this NAL unit (NALu1_length, NALu2_length) and a field indicating an offset value from a time stamp (NALu1_TS_offset, NALu2_TS_offset). The RTP payload 91 does not include a concept of decoding timing and, therefore, the time stamp indicates presentation timing.

Method for encoding and decoding scheme using time stamp


In order to realize appropriate communications in a next generation communication system, the present invention provides a user terminal including: a reception section that receives broadcast information transmitted from a radio base station; and a control section that controls reception in a random access procedure. The reception section receives given broadcast information in the random access procedure. The given broadcast information may be broadcast information for a specific user terminal group.

In a UMTS (Universal Mobile Telecommunications System) network, for the purposes of achieving higher-speed data rates, providing low delay and so on, long-term evolution (LTE) has been standardized (see Non Patent Literature 1). For the purposes of achieving further broadbandization and higher speed beyond LTE (also called LTE Rel. 8), LTE Advanced (also called Rel. 10, 11 or 12) has been standardized and successor systems to LTE (LTE Rel. 13 or later) have been also studied.
In LTE Rel. 10/11, in order to achieve broadbandization, there has been introduced carrier aggregation (CA) in which a plurality of component carriers (CCs) are aggregated. Each CC corresponds one unit of the system band of LTE Rel. 8. In CA, a user terminal (UE: User Equipment) is configured with a plurality of CCs of the same radio base station (eNB: eNodeB).
On the other hand, there has been also introduced dual connectivity (DC) in which UE is configured with a plurality of cell groups (CGs) of different radio base stations. Each cell group consists of at least one cell (CC). Since a plurality of CCs of different radio base stations are aggregated in DC, DC is also called inter-eNB CA.
In these LTE Rel. 8 through 12, transmission time interval (TTI) applied to DL transmission and UL transmission between a radio base station and a user terminal is controlled to be set to 1 ms. The transmission time interval is also called transmit time interval and TTI in the LTE system (Rel. 8-12) is also called subframe length.

User terminal, radio base station and radio communication method


A series of the relay of the electromagnetic launcher with a gun and a floating launch platform to launch projectiles in space, wherein the projectile is accelerated along a path using electromagnetic force until the projectile reaches a desired direction and position. The direction of the path is determined by orienting the path in the desired direction using a catcher. the catcher and rail gun projectile as high above as possible, coming close to near space. When the said projectile will reach the last platform, it will be launched by the railgun and ignite its rocket engine to take the payload in space or as required to eliminate the need for large rocket boosters to launch the projectile.

Launching a projectile is one of the most important endeavors in human history. From the launch of the first arrow by a human to today's rocket launches, human civilization has come a long way. Earlier projectile launches used the brute force of human hand, then we slowly advanced to mechanical systems like a catapult and finally to a controlled explosion like that in a gun or even rocket launchers. o launch a projectile to great distances or heights, like in missiles or rockets, we need to add engines to the projectiles and burn lots of fuel to constantly power them towards their destination. Furthermore, to throw a projectile far, we needed to do more powerful explosions, which presents accident hazards.
There was a need for a method to launch projectile higher without using any controlled explosion at high speed, thereby enabling it to go far or high.
For decades, projectile launchers have been popular. One method of launching rockets or projectile has been with the use of solid-fuel rocket engines. These Solid-fuel rocket engines provide ample thrust to launch a rocket Several hundred feet into the air. However, there are many dangers involved with the use of solid fuel engines, and are not cost-effective.
Further conventionally used designed to include a pressure tank in which pressurized air or water is Stored and expelled through a nozzle to propel the projectile.
Another popular method of launching projectiles has been with a launcher which utilizes compressed air behind the rocket to propel it forward. While these rockets do not utilize dangerous Solid fuel-burning engines they typically do not have enough power to propel the rocket to great heights.
An example of a projectile currently available and intended for use in the projectile launching apparatus of the prior art, as well as the invention described herein, is the 40-min cartridge grenade used by the U. 8. Army and other military forces. This 40-mm cartridge includes a self-contained propellant that is ignited by a percussion primer to propel a grenade or other type of projectile.
None of the above inventions and patents, taken either singly or in combination, is seen to describe the present invention as claimed. Thus, a launcher that can propel a projectile Such as a rocket or mines, missiles with a Relay system for launching projectiles in a space, wherein the system uses Electromagnetic Force that solving the aforementioned problems is desired.
Accordingly, there is also a need for a launcher that can propel a projectile Such as a rocket or mines, missiles with great velocity by using a Relay system for launching projectiles in a space, wherein the system uses Electromagnetic Force but without a prolonged burning of fuel. It is to the provision of such therefore that the present invention is primarily directed.
Features and advantages of the invention will be set forth in the description that follows, and in part will be apparent from the description, or may be learned by practice of the invention. The advantages of the invention will be realized and attained by the structure particularly pointed out in the written description and claims hereof as well as the appended drawings.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory and are intended to provide further explanation of the invention as claimed.
The present invention addresses the issues as discussed above

Relay based system to launch a projectile


A display unit with which diffraction reflection is able to be decreased is provided. The display unit includes a display section having an organic EL device and a pixel circuit for every pixel. The pixel circuit has a first transistor for writing a video signal and a second transistor for driving the organic EL device based on the video signal written by the first transistor. The second transistor has a gate, a source and a drain. The organic EL device has an anode, an organic layer, and a cathode. An upper face of the source or the drain is formed at least in a region opposed to the anode or the cathode.

1. Field of the Invention
The present invention relates to a display unit including an organic EL (electro luminescence) device.
2. Description of the Related Art
In recent years, in the field of display units for displaying images, display units including as a light emitting device of a pixel, a current drive type optical device with the emission luminance changeable according to the flowing current value such as an organic EL device have been developed, and such display units are facilitated to be commercialized (for example, see Japanese Unexamined Patent Application Publication No. 2008-083272).
The organic EL device is a self-luminous emitting device differently from a liquid crystal device or the like. Thus, a display unit (organic EL display unit) including the organic EL device does not need a light source (backlight). Accordingly, in the organic EL display unit, compared to a liquid crystal display unit necessary for a light source, the image visibility is high, the electric power consumption is low, and the device response speed is high.
Drive systems in the organic EL display unit include simple (passive) matrix system and active matrix system as in the liquid crystal display unit. The former system has a disadvantage that it is difficult to realize a large and high definition display unit, though its structure is simple. Thus, currently, the active matrix system has been actively developed. In such a system, a current flowing through a light emitting device arranged for every pixel is controlled by an active device provided in a drive circuit provided for every light emitting device (in general, TFT (Thin Film Transistor)).
FIG. 14 illustrates a schematic configuration of a general organic EL display unit. A display unit 100 illustrated in FIG. 14 includes a display section 110 in which a plurality of pixels are arranged in a matrix state and a drive section for driving each pixel 120 (a horizontal drive circuit 130, a write scanning circuit 140, and a power source scanning circuit 150).
Each pixel 120 is composed of a red-use pixel 120R, a green-use pixel 120G, and a blue-use pixel 120B. As illustrated in FIG. 15 and FIG. 16, the pixels 120R, 120G, and 120B are composed of an organic EL device 121 (organic EL devices 121R, 121G, and 121B) and a pixel circuit 122 connected thereto. FIG. 15 illustrates a circuit configuration of the pixels 120R, 120G, and 120B. FIG. 16 illustrates a layout of the pixels 120R, 120G, and 120B.
The pixel circuit 122 is composed of a sampling-use transistor Tws, a retentive capacity Cs, and a drive-use transistor TDr, and has a circuit configuration of 2Tr1C. A gate line WSL drawn from the write scanning circuit 140 is extended in the row direction, and is connected to a gate 123A of the transistor Tws through a contact 126A.
A drain line DSL drawn from the power source scanning circuit 150 is also extended in the row direction, and is connected to a drain 124C of the transistor TDr through a leading wiring 128A. Further, a signal line DTL drawn from the horizontal drive circuit 130 is extended in the column direction, and is connected to a drain 123C of the transistor TWS through a contact 126B and a leading wiring 128B. A source 123B of the transistor TWS is connected to a gate 124A of the drive-use transistor TDr and an end of the retentive capacity Cs (terminal 125A) through a contact 126C. A source 124B of the transistor TDr and the other end of the retentive capacity Cs (terminal 125B) are connected to an anode 127A of the organic EL devices 121R, 121G, and 121B (hereinafter referred to as organic EL device 121R and the like) through a contact 126D. A cathode 127B of the organic EL device 121R and the like is connected to a ground line GND.


A level shifter that accommodates lower driving voltage of a driver circuit and has a sufficient capability of converting the amplitude of an input signal even when the voltage amplitude of the input signal is low is provided. A level shifter utilizing a current mirror circuit 150 and a differential circuit 160 is used in a portion for converting the voltage amplitude of the signal. Since the potential difference of a signal input through transistors 105 and 106 to the differential circuit 120 is amplified and outputted, the voltage amplitude can be normally converted without influence of the threshold of a transistor even when the voltage amplitude of the input signal is low.

1. Field of the Invention
The present invention relates to a level shifter used in a driver circuit for a display device, and in particular, to a level shifter used in a driver circuit for a display device, the driver circuit using thin film transistors (hereinafter referred to as TFTs) formed on an insulator. It is to be noted that, in this specification, a display device means one used as an LCD (a liquid crystal display), an OLED (an organic EL display), or the like.
2. Description of the Related Art
Recently, semiconductor microfabrication technology has been advanced, which is accompanied by miniaturization of LSIs. This results in more active application of such LSIs to small-sized apparatus such as personal digital assistants, which requires lower power consumption of such LSIs. Today, LSIs driven at low power supply voltage such as 3.3 V are mainly used.
On the other hand, with regard to LCDs (liquid crystal displays) the demands for which are remarkably increasing these days in the field of personal digital assistants, monitors for computers, and the like, liquid crystal is often driven by a signal having the voltage amplitude of 10 V-20 V. Therefore, a driver circuit of such liquid crystal includes at least a circuit portion driven by high power supply voltage.
Accordingly, it is indispensable that a controller LSI using the abovementioned LSI which is driven at low power supply voltage is connected to a circuit for driving the liquid crystal which is driven at high power supply voltage through a level shifter for changing the amplitude voltage of the signal.
FIGS. 12A and 12B illustrate circuit diagrams of commonly used level shifters. It is to be noted that in this specification each power supply potential is denoted as VDD# (# is a numeral) or GND. Here, VDD1, VDD2, VDD3, and VDD4 are used wherein VDD4 less than VDD3 less than GND less than VDD1 less than VDD2. For the sake of simplicity, GND is fixed to 0 V.
The level shifter illustrated in FIG. 12A converts an input signal having the voltage amplitude of GNDxe2x88x92VDD1 into an output signal having the voltage amplitude of GNDxe2x88x92VDD2. More specifically, the amplitude is converted by fixing the lower potential side and converting the potential at the higher potential side. The level shifter is structured as follows. Both of a source region of a first p-type TFT 1201 and a source region of a second p-type TFT 1202 are connected to the power supply VDD2. A drain region of the first p-type TFT 1201 is connected to a source region of a third p-type TFT 1203, and a drain region of the second p-type TFT 1202 is connected to a source region of a fourth p-type TFT 1204. A drain region of the third p-type TFT 1203 is connected to a drain region of a first N type thin film transistor (hereinafter referred to as an n-type TFT) and a gate electrode of the second p-type TFT 1202. A drain region of the fourth p-type TFT 1204 is connected to a drain region of a second n-type TFT 1206 and a gate electrode of the first p-type TFT 1201. Both of a source region of the first n-type TFT 1205 and a source region of the second n-type TFT 1206 are connected to GND (=0 V). An input signal (In) is input to a gate electrode of the third p-type TFT 1203 and a gate electrode of the first n-type TFT 1205. An inverted signal of the input signal (Inb) is input to a gate electrode of the fourth p-type TFT 1204 and a gate electrode of the second N-type TFT 1206. An output signal (Out) is taken out from the drain region of the fourth n-type TFT 1204. Here, an inverted output signal (Outb) can also be taken out from the drain region of the third p-type TFT 1203.
It is to be noted that, though there are n-type and p-type as the conductive types of a TFT, in this specification, in the case where the polarity of a TFT is not specifically limited, the conductive types are described as a first conductive type and a second conductive type. For example, when the first conductive type TFT is of the n-type, the second conductive type means the p-type. Conversely, when the first conductive type TFT is of the p-type, the second conductive type means the n-type.
Next, basic operation of the conventional level shifter is described. When an Hi signal is input as the input signal (In), the n-type TFT 1205 is in a conductive state while the p-type TFT 1203 is in a nonconductive state. Therefore, a signal having the potential of GND, that is, an Lo signal, is input to the gate electrode of the p-type TFT 1202, and the p-type TFT 1202 is in a conductive state. On the other hand, here, the inverted input signal (Inb) is an Lo signal. Therefore, the n-type TFT 1206 is in a nonconductive state while the p-type TFT 1204 is in a conductive state. Since both of the p-type TFTs 1202 and 1204 are in a conductive state, an Hi signal is outputted as the output signal (Out) with the potential of VDD2. It is to be noted that the p-type TFT 1201 is in a nonconductive state, which assures that the potential of the gate electrode of the p-type TFT 1202 is held at Lo=GND.
When the potential of the input signal (In) is Lo, since the level shifter illustrated in FIG. 12A is structured to be symmetrical, an Lo signal is outputted from the output terminal (Out) with the potential of GND, that is, 0 V.
In this way, an input signal having the voltage amplitude of GNDxe2x88x92VDD1 is converted into an output signal having the voltage amplitude of GNDxe2x88x92VDD2.
Next, the level shifter illustrated in FIG. 12B converts an input signal having the voltage amplitude of VDD3xe2x88x92GND into an output signal having the voltage amplitude of VDD4xe2x88x92GND. More specifically, the amplitude is converted by fixing the higher potential side and converting the potential at the lower potential side. The level shifter is structured as follows. Both of a source region of a first n-type thin film transistor (hereinafter referred to as an n-type TFT) 1211 and a source region of a second n-type TFT 1212 are connected to a power supply VDD4. A drain region of the first n-type TFT 1211 is connected to a source region of a third n-type TFT 1213, and a drain region of the second n-type TFT 1212 is connected to a source region of a fourth n-type TFT 1214. A drain region of the third n-type TFT 1213 is connected to a drain region of a first p-type thin film transistor (hereinafter referred to as a p-type TFT) 1215 and a gate electrode of the second n-type TFT 1212. A drain region of the fourth n-type TFT 1214 is connected to a drain region of a second p-type TFT 1216 and a gate electrode of the first n-type TFT 1211. Both of a source region of the first p-type TFT 1215 and a source region of the second p-type TFT 1216 are connected to GND (=0 V). An input signal (In) is input to a gate electrode of the third n-type TFT 1213 and a gate electrode of the first p-type TFT 1215. An inverted signal of the input signal (Inb) is input to a gate electrode of the fourth n-type TFT 1214 and a gate electrode of the second p-type TFT 1216. An output signal (Out) is taken out from the drain region of the fourth n-type TFT 1214. Here, an inverted output signal (Outb) can also be taken out from the drain region of the third n-type TFT 1213.
Next, basic operation of the conventional level shifter is described. When an Lo signal is input as the input signal (In), the p-type TFT 1215 is in a conductive state while the n-type TFT 1213 is in a nonconductive state. Therefore, a signal having the potential of GND, that is, an Hi signal, is input to the gate electrode of the n-type TFT 1212, and the n-type TFT 1212 is in a conductive state. On the other hand, here, the inverted input signal (Inb) is an Hi signal at this time. Therefore, the p-type TFT 1216 is in a nonconductive state while the n-type TFT 1214 is in a conductive state. Since both of the n-type TFTs 1212 and 1214 are in a conductive state, an Lo signal is outputted as the output signal (Out) with the potential of VDD4. It is to be noted that the n-type TFT 1211 is in a nonconductive state, which assures that the potential of the gate electrode of the n-type TFT 1212 is held at Hi=GND.
When the potential of the input signal (In) is Hi, since the level shifter illustrated in FIG. 12B is structured to be symmetrical, an Hi signal is outputted from the output terminal (Out) with the potential of GND, that is, 0 V.
In this way, an input signal having the voltage amplitude of VDD3xe2x88x92GND is converted into an output signal having the voltage amplitude of VDD4xe2x88x92GND.
A problem with regard to the level shifters illustrated in FIGS. 12A and 12B is now described. It is to be noted that, since the problem is common to the level shifters illustrated in FIGS. 12A and 12B, only the one illustrated in FIG. 12A is described by way of example. As described in the above, today, controller LSIs operating at 3.3 V are mainly used. Suppose the level shifter illustrated in FIG. 12A carries out conversion in case of VDD1=3 V and VDD2=10 V. When the amplitude of the input signal to the TFTs 1203, 1204, 1205, and 1206 is 3 V and the threshold voltage of the n-type TFTs 1205 and 1206 is 3 V, the level shifter is not expected to operate normally. More specifically, since, as the voltage amplitude before conversion becomes smaller, the gate-source voltage becomes less likely to be high enough to make the TFTs sufficiently conductive, normal operation becomes more difficult.
Accordingly, an object of the present invention is to provide a novel level shifter the normal operation of which can be guaranteed even in case a driver circuit is driven at lower power supply voltage, which is accompanied by a lower voltage amplitude of an input signal.
In order to solve the above problem, the present invention is structured as in the following.
In the conventional level shifter, an input signal is input to gate electrodes of TFTs 1203, 1204, 1205, and 1206 in FIG. 12A. When the voltage amplitude of the input signal becomes lower than the absolute values of the thresholds of the TFTs, gate-source voltage high enough to make the TFTs sufficiently conductive can not be obtained, which makes normal operation impossible.
Therefore, in a level shifter according to the present invention, the paths of the input signal are contrived to make the thresholds of the TFTs less liable to have the adverse effect even when the voltage amplitude of the input signal becomes lower. Further, in converting the voltage amplitude, by using a differential amplifier circuit which is a combination of a current mirror circuit and a differential circuit, high gain can be obtained.
The configuration of the level shifter of the present invention is disclosed hereinbelow.
According to the first aspect of this invention, a level shifter for converting a signal having a low voltage amplitude into a signal having a high voltage amplitude and for outputting the converted signal, comprising:
a current mirror circuit;
a differential circuit having the current mirror circuit as a load;
a first current source for supplying current to the differential circuit; and
first and second source follower circuits,
is characterized in that:
a first input signal is input through the first source follower circuit to the differential circuit; and
a second input signal is input through the second source follower circuit to the differential circuit.
According to a second aspect of the present invention, a level shifter for converting a signal having a low voltage amplitude into a signal having a high voltage amplitude and for outputting the converted signal, comprising:
a current mirror circuit;
a differential circuit having the current mirror circuit as a load;
a first current source for supplying current to the differential circuit;
first and second transistors, a gate electrode and a drain region of the first transistor being electrically connected to each other and a gate electrode and a drain region of the second transistor being electrically connected to each other; and
second and third current sources for supplying current to the first and second transistors, respectively,
is characterized in that:
a first input signal is input through the first transistor to the differential circuit; and
a second input signal is input through the second transistor to the differential circuit.
According to a third aspect of the present invention, a level shifter for converting a signal having a low voltage amplitude into a signal having a high voltage amplitude and for outputting the converted signal, comprising:
a current mirror circuit;
a differential circuit having the current mirror circuit as a load;
a first current source for supplying current to the differential circuit;
first and second transistors, a gate electrode and a drain region of the first transistor being electrically connected to each other and a gate electrode and a drain region of the second transistor being electrically connected to each other; and
second and third current sources for supplying current to the first and second transistors, respectively,
is characterized in that:
the differential circuit comprises third and fourth transistors;
a drain region of the first transistor and a gate electrode of the third transistor are electrically connected to each other;
a drain region of the second transistor and a gate electrode of the fourth transistor are electrically connected to each other;
a first input signal is input through the first transistor to the gate electrode of the third transistor; and
a second input signal is input through the second transistor to the gate electrode of the fourth transistor.
According to a fourth aspect of the present invention, a level shifter for converting a signal having a low voltage amplitude into a signal having a high voltage amplitude and for outputting the converted signal, comprising:
a first transistor of a first conductive type, a gate electrode and a drain region thereof being electrically connected to each other;
a second transistor of the first conductive type, a gate electrode and a drain region thereof being electrically connected to each other;
a differential circuit comprising a third transistor of the first conductive type and a fourth transistor of the first conductive type;
a current mirror circuit comprising a fifth transistor of a second conductive type and a sixth transistor of the second conductive type, a gate electrode and a drain region of the fifth transistor being connected to each other;
a seventh transistor of the first conductive type for electrically connecting the differential circuit and a first current source;
an eighth transistor of the second conductive type for electrically connecting the fifth transistor and a second current source;
a ninth transistor of the second conductive type for electrically connecting the sixth transistor and a third current source; and
a power supply portion for supplying potential to gate electrodes of the seventh, eighth, and ninth transistors,
is characterized in that:
a first input signal is input through the first transistor to a gate electrode of the third transistor; and
a second input signal is input through the second transistor to a gate electrode of the fourth transistor.
According to a fifth aspect of the present invention, a level shifter for converting a signal having a low voltage amplitude into a signal having a high voltage amplitude and for outputting the converted signal, comprising:
first and second current mirror circuits;
a differential circuit electrically connected to the first and second current mirror circuits;
a first current source for supplying current to the differential circuit; first and second transistors, a gate electrode and a drain region of the first transistor being electrically connected to each other and a gate electrode and a drain region of the second transistor being electrically connected to each other; and
second and third current sources for supplying current to the first and second transistors, respectively,
is characterized in that:
a first input signal is input through the first transistor to the differential circuit; and
a second input signal is input through the second transistor to the differential circuit.
According to a sixth aspect of the present invention, a level shifter for converting a signal having a low voltage amplitude into a signal having a high voltage amplitude and for outputting the converted signal, comprising:
first and second current mirror circuits;
a differential circuit electrically connected to the first and second current mirror circuits;
a first current source for supplying current to the differential circuit;
first and second transistors, a gate electrode and a drain region of the first transistor being electrically connected to each other and a gate electrode and a drain region of the second transistor being electrically connected to each other; and
second and third current sources for supplying current to the first and second transistors, respectively,
is characterized in that:
the differential circuit comprises third and fourth transistors;
a drain region of the first transistor and a gate electrode of the third transistor are electrically connected to each other;
a drain region of the second transistor and a gate electrode of the fourth transistor are electrically connected to each other;
a first input signal is input through the first transistor to the gate electrode of the third transistor; and
a second input signal is input through the second transistor to the gate electrode of the fourth transistor.
According to a seventh aspect of the present invention, a level shifter for converting a signal having a low voltage amplitude into a signal having a high voltage amplitude and for outputting the converted signal, comprising:
a current mirror circuit;
a differential circuit having the current mirror circuit as a load;
a first current source for supplying current to the differential circuit; first and second source follower circuits; and
a transistor for reset,
is characterized in that:
a first input signal is input through the first source follower circuit to the differential circuit;
a second input signal is input through the second source follower circuit to the differential circuit; and
during a period where voltage amplitude of an input signal is not converted, current supply by the first current source is blocked by a reset signal input to the transistor for reset.
According to an eighth aspect of the present invention, a level shifter for converting a signal having a low voltage amplitude into a signal having a high voltage amplitude and for outputting the converted signal, comprising:
a current mirror circuit;
a differential circuit having the current mirror circuit as a load;
a first current source for supplying current to the differential circuit;
first and second transistors, a gate electrode and a drain region of the first transistor being electrically connected to each other and a gate electrode and a drain region of the second transistor being electrically connected to each other; and
second and third current sources for supplying current to the first and second transistors, respectively,
is characterized in that:
a first input signal is input through the first transistor to the differential circuit;
a second input signal is input through the second transistor to the differential circuit; and
during a period where voltage amplitude of an input signal is not converted, current supply by the first, second, and third current sources is blocked.
According to a ninth aspect of the present invention, a level shifter for converting a signal having a low voltage amplitude into a signal having a high voltage amplitude and for outputting the converted signal, comprising:
a first transistor of a first conductive type, a gate electrode and a drain region thereof being connected to each other;
a second transistor of the first conductive type, a gate electrode and a drain region thereof being connected to each other;
a differential circuit comprising a third transistor of the first conductive type and a fourth transistor of the first conductive type;
a current mirror circuit comprising a fifth transistor of a second conductive type and a sixth transistor of the second conductive type, a gate electrode and a drain region of the fifth transistor being connected to each other;
a seventh transistor of the first conductive type for connecting the differential circuit and a first current source;
an eighth transistor of the second conductive type for electrically connecting the fifth transistor and a second current source;
a ninth transistor of the second conductive type for electrically connecting the sixth transistor and a third current source;
a power supply portion for supplying potential to gate electrodes of the seventh, eighth, and ninth transistors;
a first transistor for reset of the second conductive type; and
a second transistor for reset of the first conductive type,
is characterized in that:
a drain region of the first transistor and a gate electrode of the third transistor are electrically connected to each other;
a drain region of the second transistor and a gate electrode of the fourth transistor are electrically connected to each other;
a source region of the first transistor for reset is electrically connected to source regions of the seventh and eighth transistors, and a drain region of the first transistor for reset is electrically connected to gate electrodes of the seventh and eighth transistors;
a source region of the second transistor for reset is electrically connected to a source region of the ninth transistor, and a drain region of the second transistor for reset is electrically connected to a gate electrode of the ninth transistor;
a first input signal is input through the first transistor to the gate electrode of the third transistor;
a second input signal is input through the second transistor to the gate electrode of the fourth transistor; and
during a period where voltage amplitude of an input signal is not converted, current supply is blocked by a reset signal input to the first and second transistors for reset, and by making the seventh, eighth, and ninth transistors in a nonconductive state.
According to a tenth aspect of the present invention, a level shifter is characterized in that the first input signal is a signal having a low voltage amplitude, and the second input signal is a signal having a low voltage amplitude and in an opposite phase to that of the first input signal.
According to an eleventh aspect of the present invention, a level shifter is characterized in that the first input signal is a signal having a low voltage amplitude and the second input signal is a signal having a constant potential in a range of the amplitude of the first input signal.
According to a twelfth aspect of the present invention, a level shifter is characterized in that voltage amplitude of the input signal is 5V or lower.

Semiconductor Energy Laboratory Co., Ltd.


An extractor cleaning machine that includes a base having a suction nozzle and a body coupled to the base. The extractor cleaning machine also includes a suction source in fluid communication with the suction nozzle. The extractor cleaning machine further includes a recovery tank configured to store fluid and dirt drawn through the suction nozzle, and a tank tray coupled to at least one of the base and the body. The tank tray including a top surface and a bottom surface. The recovery tank is coupled to the tank tray adjacent the top surface. The extractor cleaning machine also includes an air duct coupled to the tank tray adjacent the bottom surface to define a passageway that fluidly couples the recovery tank and the suction nozzle.

The present invention relates to extractor cleaning machines and, more particularly, to air ducts for extractor cleaning machines.
An extractor cleaning machine typically includes a recovery tank for recovering liquids and dirt drawn off of a surface being cleaned by a suction nozzle. An air duct fluidly connects the recovery tank and the suction nozzle.

Air duct for an extractor cleaning machine


Load carrier mountable above a bed structure of a vehicle having an upper surface and an internal bed rail system is disclosed. The load carrier broadly includes an upright base support member, an internal rail clamping assembly, and a clamp adjustment assembly. The upright base support member rests upon the upper surface of the side wall of the bed structure and connects with the internal rail clamping assembly. The upright base support member has a first clamp surface for asserting a clamping force upon the upper surface of the side wall of the bed structure. The rail clamping assembly is releasably securable to the internal bed rail system and includes a second clamp surface for asserting a clamping force upon the internal bed rail system. The clamp adjustment assembly positionally adjusts the first clamping surface with respect to the second clamping surface between clamped and unclamped positions.

Load carriers, and particularly sports equipment carriers, for vehicles having bed structures are known devices for transporting cargo above the bed structure of a vehicle. Common uses of such load carriers can include the transport of generally elongate objects, such as ladders, piping, lumber, construction materials, etc. Likewise, sport related uses of such load carriers can include the transport of canoes, kayaks, paddles and similar equipment. An example of a particularly commercially successful load carrier for a vehicle having a bed structure is Thule's XSPORTER carrier.
As illustrated in FIGS. 1-3 of the present application, the XSPORTER carrier broadly includes a plurality of upright base support members each configured for securing a generally vertically adjustable upright member. A pair of upright members is shown as securing a load bearing crossbar member therebetween such that cargo can be set and secured thereon. Each upright base support member includes a generally flat, planar lower surface configured for resting and being clampably secured to the top rail of a truck bed side wall. Heretofore, top rails of pickup truck beds were primarily formed from a single ply of relatively rigid sheet metal bent upon itself to form a generally inverted J-shaped structure forming a hollow. To clampably secure a base support member to the top rail, a clamping assembly was used in conjunction with the base support member to apply a clamping force upon the upper and lower surfaces of the top rail.
While the above-described XSPORTER carrier and associated clamping assemblies remain popular and successful, they are, however, occasionally incapable of securing load carriers upon some types of new vehicles; i.e., pickup trucks having new types of top rail structure and/or internal bed rail systems; examples include the 2006 TOYOTA TACOMA, 2006 HONDA RIDGELINE, AND 2006 NISSAN TITAN AND FRONTIER pickup trucks. In these examples the new top rail structures are not generally J-shaped and/or do not generally allow ready access to the upper and lower surfaces of the top rail. Similarly, current load carriers and clamping assemblies therefor are not configured for being secured to the rails of the internal bed rail systems of these newer vehicles.
It should be appreciated that a primary reason that the vehicle manufacturers have changed to these alternative configurations are predominantly cost driven. To reach this goal, more of the truck bed components, including those relied upon for securing load carriers of the type presently addressed, are made from plastic, composites and similar materials that are significantly more flexible than the traditional sheet metal used in pickup bed construction. This loss in structural rigidity further contributes to the difficulties experienced in mounting load carriers of the present type upon pickup trucks where these carriers have traditionally relied heavily upon the fortitude of the top rail of the truck bed.
An effect of the truck manufacturers using installed rail systems for receiving such things as load carrier mountings in the pickup truck beds is that the rail configurations on different makes and models of trucks now vary widely. This presents a problem for load carrier manufacturers in that the use of universal mounting hardware is no longer possible and a wide variety of differently configured mounting hardware must be provided in order to accommodate owners of different vehicles. This means that this cost-saving move of the truck manufacturers has resulted in a cost increase to the load carrier manufacturers. Therefore, a goal of the present invention is to minimize this detrimental impact on load carrier manufacturers while at the same time providing a superior truck bed style load carrier to consumers.

Load carrier arrangement for a vehicle bed comprising an internal bed rail system


Penetration of various drugs through living membranes is improved by their use in transdermal compositions containing certain penetration-enhancing systems. A new delivery device is also described.

Diphenhydramine, hydrochloride (Benadryl.RTM., or 2-(diphenylmethoxy) N, N-dimethylethylamine), is known to be useful for its antihistaminic, anticholinergic, antitussive, antiemetic, and sedative properties The compound and its preparation are described in U.S. Pat. No. 2,421,714 which is hereby incorporated by reference.
The base is a liquid and its salts have acceptable solubilities in standard liquid media. Thus, diphenhydramine-based drugs are conventionally used in dosage forms such as oral and parenteral. However, there are undesirable digestive side effects possible with oral formulations. Generally there are compliance problems with parenterals.
Diphenhydramine is a nonprescription drug widely used alone or in combination with other drugs as an effective antihistamine with a sedative side effect. Carruthers, et al (Clin Pharmacol Ther 1978; 23:375-382) showed that the sedative side effect of diphenhydramine hydrochloride could be eliminated if the blood concentration remains in the range of 25 to 50 ng/ml (equivalent to 21.9 to 43.9 ng/ml diphenhydramine base). This indicates that a sustained dosage form which could provide such constant blood levels would be a very useful and viable dosage form in the treatment of allergy.
Tetrahydroaminoacridine (1,2,3,4-tetrahydro-9-acridinamine, tacrine, or THA) is a very old compound known to have anticholinesterase activity. It has been shown that THA improves the amnesia characteristic of Alzheimer's disease (Brinkman and Gershon, 1983; Flood et al, 1985; Rathman and Conner, 1984; McGeer, 1984).
Tazifylline is known to be useful as an antihistamine. It is covered in U.S. Pat. No. 4,374,835 which is hereby incorporated by reference.
Atenolol, 4-[2-hydroxy-3-[(1-methylethyl)amino]propoxy]benzeneacetamide, is covered in U.S. Pat. Nos. 3,663,607 and 3,836,671 hereby incorporated by reference. It is a .beta.-adrenergic blocker.
2-Methoxy-4-[2-(5-methyl-1H-pyrazol-3-yl)ethenyl]phenol is covered in pending application 861,179. It has antiasthma, antiallergy, antiinflammatory, antipsoriatic, analgesic, and cardiovascular activities.
Diltiazem and verapamil are coronary vasodilators (calcium antagonists) covered by U.S. Pat. Nos. 3,562,257 and 3,261,859.
Hydrocortisone is an adrenocortical steroid and is useful as a topical antiinflammatory. Hydrocortisone and methods for preparing it are covered in U.S. Pat. No. 2,602,769.
While the above drugs are highly efficacious, their use is subject to such problems as dose dumping and high drug use requirements.
U.S. Pat. No. 4,611,008 discloses the use of Miglyol-812 or Miglyol-829 in a coronary-active gel-containing preparation.
U.S. Pat. No. 4,331,651 covers in part, caprylic/capric acid -1,2-propanediol diester used as a release-promoting substance used in a silicone rubber carrier for an active ingredient.
U.S. Pat. No. 4,336,243 covers a microsealed transdermal delivery pad for nitroglycerin administration which contains a silicon matrix having microsealed compartments of silicone rubber mixed with a hydrophilic solvent system, the solvent system can contain a saturated coconut oil such as miglyol oil which improves the transport and absorption of the nitroglycerin.
U.S. Pat. No. 4,788,063 covers a transdermal pharmaceutical composition for delivery of cholinergic and anticholinergic basic drugs. The active ingredients are in a vehicle such as a lower fatty acid which serves as a solvent and a transdermal delivery agent.
U.S. Pat. No. 4,485,087 covers a process for preparing a composite pharmaceutical preparation.
European Application 243891 covers a laminar structure for administering a chemical at a controlled rate.