In the present invention, unlike a conventional circuit, discrimination is not made by integrating a logical code that includes “0” and “1” to some extent and produced from a random code, but repetition of an identical pattern of a well-known preamble signal added to a head portion of a signal is discriminated when a bit-rate of the signal is changed. More specifically, the repetition of the identical pattern is converted into a consecutive identical signal to generate the consecutive identical signal (having a length of tens bits to thousands bits). Although the consecutive identical signal is longer than a same-code continuation length included in the signal, and is shorter than a time constant necessary to the conventional circuit by about one to three digits. Therefore, an integration time can be shortened to the same degree as the generated consecutive identical signal length, and the bit-rate can be discriminated at high speed within a preamble signal receiving time.

Although communication carriers provide various bit-rate services with the spread of the Internet, maintenance and operation cost increases because a different transmission device is used in each bit-rate. There is a demand for unifying the transmission devices in order to prevent the cost increase. There has been proposed a transmission device that can deal with plural bit-rates to discriminate the bit-rate inside the device (Patent Document 1), and there has also been proposed a mechanism in which optical receiver sensitivity is varied according to the bit-rate (Patent Document 2).
A bit-rate discrimination circuit that discriminates the bit-rates is roughly classified into two type methods. In one of the methods, an edge portion (logical code switching portion of "0"/"1") of a signal is output as a pulse having a constant time width, and the pulse is integrated with respect to the time to specify a signal switching frequency (that is, bit-rate) (Patent Document 1, hereinafter referred to as edge detection method). In the other method, the bit-rate is specified by detecting a low-frequency component of a consecutive identical signal included in the signal (Patent Document 2, hereinafter referred to as low-frequency detection method). Both the methods are based on the assumption that the communication is always conducted at the specified bit-rate after the bit-rate is specified, and the methods do not take into account the high-speed following of the constantly-changing bit-rate. This is because of the following reasons.
In the edge detection method, the edge portion of the signal is detected, and edge density is changed according to same-code continuation included in the signal. The edge density is obtained to some extent for an alternating signal even in the low bit-rate signal, while the edge density is reduced when many long continuous codes are included in the high bit-rate signal. Thus, in order to enhance discrimination accuracy, it is necessary to take some time to statistically make discrimination (usually, time of ten thousand bits to one million bits in terms of bit number). Therefore, an integration time of the edge signal is lengthened. In the low-frequency detection method, because the low-frequency component is detected as its name suggests, it is necessary to set a band of a lowpass filter to a low frequency. Therefore, a time constant of the lowpass filter becomes large order similarly to the integrator in the edge detection.
Recently, a point-to-multipoint network that deals with plural users with one station apparatus becomes widespread, and the need to accommodate users of different bit-rates arises with diversification of the transmission speed. However, for the above-described reasons, a function of instantaneously discriminating the bit-rate with respect to the signal whose bit-rate is switched at high speed is difficult to realized using the bit-rate discrimination circuit of Patent Document 1 or Patent Document 2.
A bit-rate discrimination mechanism that automatically discriminates and detects the received bit-rate is required in order to realize a multi-rate receiver that deals with the plural bit-rates. Furthermore, when the plural bit-rates to be dealt with do not have a relationship of an integral multiple or an integral fraction, a circuit and a device which are connected to a subsequent stage of the receiver must also be able to deal with the plural bit-rates that do not have the relationship of the integral multiple or integral fraction. Therefore, a signal discrimination circuit that can separate the signals according to the bit-rate of the input signal and output the signals from different output terminals in each bit-rate group having a relationship of the integral multiple or integral fraction or in each bit-rate is needed (for example, see Patent Document 3).
FIG. 25 is a block diagram illustrating a conventional receiver that deals with plural bit-rates by combining a signal discrimination circuit and a bit-rate discrimination apparatus automatically detecting received plural bit-rates.
The receiver in FIG. 25 automatically discriminates the bit-rates using the bit-rate discrimination circuit and the signal discrimination circuit, and individually outputs the desired bit-rates from different output ports. Specifically, the receiver includes a photo-detector 101, a trans-impedance amplifier (TIA) 102, a low bit-rate limiting amplifier (LA) 103, a high bit-rate limiting amplifier (LA) 104, a low-bit-rate-side control port 105, a gate circuit 106, a high-bit-rate-side control port 107, a gate circuit 108, a low bit-rate clock and data recovery circuit (CDR) 109, a high bit-rate clock and data recovery circuit (CDR) 110, a low bit-rate signal output terminal 111, a high bit-rate signal output terminal 112, a low-bit-rate discrimination circuit 113, a high-bit-rate discrimination circuit 114, and a reset-set flipflop circuit 115. The receiver in FIG. 25 outputs the received signal from the low bit-rate signal output terminal 111 and the high bit-rate signal output terminal 112 according to the high-bit-rate optical signal and low-bit-rate optical signal, which are input to the photo-detector 101. In the configuration of the receiver in FIG. 25, an output voltage of the high bit-rate limiting amplifier (LA) 104 is partially input to the low-bit-rate discrimination circuit 113 and the high-bit-rate discrimination circuit 114 to discriminate the bit-rates. In other words, the receiver in FIG. 25 has the configuration in which the bit-rates are discriminated by inputting the signals having the plural bit-rates from one input port to the respective bit-rate discrimination circuits.
Thus, the optical transmission receiving circuit can be formed using the bit-rate discrimination circuit and the signal discrimination circuit having the discrimination function such that the bit-rates are automatically discriminated to individually output the signals having the desired bit-rates from different output ports.

Bit-rate discrimination method and its apparatus

Nippon Telegraph and Telephone Corporation


A system, method, and computer-readable medium to facilitate treatment of a damaged vehicle by gathering crash information, estimating an extent of vehicle damage, and transmitting information associated with treating the damaged vehicle.

Every year, vehicles are involved in accidents, e.g., collisions, which result in varying amounts of damage to the vehicle. If the damaged vehicle is insured, an insurance claim is usually filed shortly after the collision. The damaged caused to the vehicle may be estimated in a variety of ways, including using images, video, or a combination thereof, and/or the damaged vehicle may be brought to a location for an appraisal or assessment of the damage. Depending on the extent of the damage and the treatment facility where the damaged vehicle was brought, the damaged vehicle may then need to be further transported to a different treatment facility that is capable of performing the necessary repairs; or in the case where the vehicle damage is too costly to repair, to a salvage or a scrap facility. Additional steps and costs may be incurred when the damaged vehicle is brought to a first location for an initial appraisal and then to a subsequent location for the repair, salvage, or scrap treatment. By determining the extent of vehicle damage and the corresponding treatment shortly after a collision, the steps, costs, and time involved to customarily process an insurance claim may be reduced by estimating the extent of vehicle damage shortly after the collision and then transporting the damaged vehicle from the collision location to an appropriate vehicle treatment facility.

This patent is subject to a terminal disclaimer.

System and method for using a specialty vehicle data identifier to facilitate treatment of a vehicle damaged in a crash

STATE FARM MUTUAL AUTOMOBILE INSURANCE COMPANY


A method of processing images obtained with a microscope along a line on an object, in which the object, having trenches or lines, is moved in the z direction to form a cloud plot; signals in the z direction are scanned to form a linescan vector; the linescan vectors are clustered and classified; a centroid is defined; a similarity curve is created from the linescan vectors and the centroids; and the distance between adjacent points on the similarity curve are measured to provide a measure of line or trench width.

Submicrometer dimensional measurement is essential for semiconductor processing. It is necessary to measure the width of a critical line structure, for example, the gate width of a transistor. More importantly, critical line-width measurements are often used to characterize VLSI processing steps. For example, in photolithography, the measured width is directly related to critical process parameters such as focus distances and exposure periods.
Traditional techniques based on thresholding of the intensity of an optical image taken with a standard optical microscope are not accurate enough for submicrometer measurements. By using a confocal or correlation microscope, good results for narrow trenches down to widths of 0.4 .mu.m can be obtained. However, for photoresist lines and arrays of lines and trenches, the relation between measured line-width and nominal line-width is not always linear. Furthermore, in the latter case, it is sometimes difficult to pick out the width of lines less than 0.7 .mu.m wide.
For critical dimensional measurements, one is usually interested in line-widths. Thus, instead of acquiring a whole two-dimensional image, one only needs to acquire a line-scan at the same x location on the object every time its focus position changes. FIG. 1 schematically shows a microscope objective 11 focused at a spot 12 with respect to an object 13 which includes a line structure 14 to be scanned. The object is placed on a stage 16 which can be moved in the x-y-z directions so that the focal spot impinges upon different surfaces and locations on the object. To obtain a linescan, the object is moved along a line in the x-direction so there is scanning in the x-directions and then stepped in the z-direction to scan another line at another elevation. The image acquired by the microscope is applied to a CCD camera 17 which digitizes the signals which are stored in a computer 18. The computer controls the positioning stage. In the preferred embodiment, the focal spot extends over an area to create an image of a plurality of lines of the line structure and the output of the CCD camera is lens scanned to give readings for the x-direction. The stage is only moved to observe a different area. In either embodiment, the signals can then be processed and displayed on display 19 as a cloud plot. The cloud plot is a gray scale display of intensity as a function of horizontal position x and axial focusing position z along a line. FIGS. 2A and 2B are examples of cloud plots of 0.5 .mu.m wide dense resist structures recorded by a confocal microscope and a correlation microscope (the Mirau Correlation Microscope), respectively.
The traditional approach to line-width measurements is to plot the intensity of the cloud plot as a function of x at various focus planes, z, of interest. For example, as illustrated in FIGS. 3A and 3B, for a Mirau correlation microscope and confocal microscope, respectively, L.sub.top is the top width of the photoresist strips, L.sub.bot is the width at the trench bottoms and L.sub.resist measures the width of the resist strips at the substrate interface. We shall call the respective line scans (along x) at the top of the resist; the bottom of the trench and the bottom of the resist l.sub.top (X), l.sub.bot (x), and l.sub.resist (x), respectively. Typically, the width of the actual line is then taken to be the width between the 1/2 or 1/3 power points of linescans taken in the x direction at these positions in z. For the confocal microscope, the intensity linescan is used; while for the correlation microscope, the linescan can be taken at the transformed intensity image. FIG. 2C is the transformed intensity image of the cloud plot of FIG. 2B; it is equivalent to the intensity cloud plot for the confocal microscope. Typically, it is standard practice to take the width of the line to be the distance between the 1/2 or 1/3 power points of a linescan in the x direction at a fixed position z corresponding to either the top or bottom of a trench or line. It is difficult to determine in the cloud plot the exact axial locations where the linescans l.sub.top (x), l.sub.bot (x), and l.sub.resist (x) should be taken, as the absolute locations may shift due to optical waveguiding or resonance effects inside the line structures. The shapes of the lines l.sub.top (x), l.sub.bot (x), or l.sub.resist (x) may change as the true line-widths vary. Typically these regions are picked out by looking for the position of maximum intensity in a scan in the z direction, as illustrated in FIGS. 3A and 3B. Consequently, it is not easy to construct an automatic measurement algorithm which tracks the true hne-width consistently.

Method and apparatus of measuring line structures with an optical microscope by data clustering and classification

The Board of Trustees of the Leland Stanford Junior University


A two-compartment container has a lid portion and a base portion hingedly connected to one another and openable and closable in the manner of a clamshell. Both the lid portion and the base portion have partitions, which extend from the hinge and which are aligned with one another. When the container is closed, the partitions abut against one another, effectively isolating the two compartments formed in the base portion by its partition from one another. The base portion includes a locking flap which fits into a gap between the partition in the lid portion and its face and seals it to further isolate the two compartments from one another.

1. Field of the Invention
The present invention relates to the packaging arts. More particularly, the present invention relates to the containers, often made of foamed or solid (unfoamed) polystyrene sheet material, in which food, especially that intended to be purchased at a restaurant or similar establishment and consumed off-premises, is packaged.
2. Description of the Prior Art
The prior art is replete with examples of containers of the subject type. For example, U.S. Pat. No. 4,915,251 to Payne discloses a thermoformed plastic carton constructed from two half sections which are integrally connected along one side by a hingable joint to allow the half sections to be folded upon each other. The carton also includes resiliently deflectable latches extending up from an edge of one carton half which each mate with and become lodged in a receptacle in the other carton half section when the carton half sections are folded one upon another.
One of the two half sections, the base, is formed with one or more compartments for receiving food. As illustrated in the patent, the base has three such compartments. The lid, that is, the other of the two half sections, has no compartments. Clearly, when the carton is closed, the three compartments, each possibly having a different food item, are not isolated from one another. As a consequence, a warm item in one of the compartments will lose heat to the entire interior of the closed carton. This may not present a problem unless an item in another compartment, such as a salad, is better when kept cold.
In view of the above, there has been a need for a multi-compartment container having compartments which are isolated from one another when the container is closed. That need is met by the present invention.


A request for reading data from a memory location of a main memory is received, the memory location being identified by a physical memory address. In response to the request, a cache memory is accessed based on the physical memory address to determine whether the cache memory contains the data being requested. The data associated with the request is returned from the cache memory without accessing the memory location if there is a cache hit. The data associated is returned from the main memory if there is a cache miss. In response to the cache miss, it is determined whether there have been a number of accesses within a predetermined period of time. A cache entry is allocated from the cache memory to cache the data if there have been a predetermined number of accesses within the predetermined period of time.

Most modern processors use a cache memory (or hierarchy of cache memories) to reduce average access times to memory and improve overall system performance. Cache memories take advantage of the principle of locality which says that the data most recently used is very likely to be accessed again in the near future. Modern dynamic random access memory (DRAM) (e.g., double data rate, DDR2 or DDR3) has many timing constraints which can limit the performance of the memory device. In particular, the row cycle time (tRC) imposes a minimum time between consecutive activations of the same memory bank. This timing parameter is significant because it limits the maximum frequency with which a single piece of data can be accessed. Today's DDR3 devices have a tRC of approximately 45 nanoseconds (ns).
A cache memory is a component that improves performance by transparently storing data such that future requests for that data can be served faster. The data that is stored within a cache memory might be values that have been computed earlier or duplicates of original values that are stored elsewhere. If requested data is contained in the cache memory, this request can be served by simply reading the cache memory, which is comparably faster. Otherwise, the data has to be recomputed or fetched from its original storage location (e.g., main memory), which is comparably slower. Hence, the more requests can be served from the cache the better the overall system performance is.
To be cost efficient and to enable an efficient lookup of data, cache memories are comparably small. Nevertheless, cache memories have proven extremely effective in many areas of computing because access patterns in typical computer applications have locality of reference. References exhibit temporal locality if data is requested again that has been recently requested already. References exhibit spatial locality if data is requested that is physically stored close to data that has been requested already.
Typically, each location (also referred to as a cache entry) in a cache memory contains data (also referred to as a cache line). The size of the cache line is usually larger than the size of the usual access requested by an instruction. Each location in the cache memory also has an index, which is a unique number used to refer to that location. The index for a location in main memory is called an address. Each location in the cache memory has a tag that contains the index of the datum in main memory that has been cached.
When a processor needs to read or write a location in main memory, it first checks whether that memory location is in the cache. This is accomplished by comparing the address of the memory location to all tags in the cache that might contain that address. If the processor finds that the memory location is in the cache, a cache hit has occurred; otherwise, there is a cache miss. In the case of a cache hit, the processor immediately reads or writes the data in the cache line.
In the case of a miss, the cache memory allocates a new entry, which comprises the tag just missed and a copy of the data. The reference can then be applied to the new entry just as in the case of a hit. Read misses delay execution because they require data to be transferred from a much slower main memory than the cache memory itself. Write misses may occur without such penalty since the data can be copied in background.
In order to make room for the new entry on a cache miss, the cache has to evict one of the existing entries. The heuristic that it uses to choose the entry to evict is called a replacement policy. One popular replacement policy replaces the least recently used (LRU) entry.
A cache memory can be a direct-mapped, 2-way, 4-way, or full associative cache memory. Associativity is a trade-off. If there are ten places the replacement policy can put a new cache entry, then when the cache is checked for a hit, all ten places must be searched. Checking more places takes more power, chip area, and potentially time. On the other hand, cache memories with more associativity suffer fewer misses, so that the processor spends less time servicing those misses.
In order for a cache memory to be effective, the memory access pattern must exhibit locality. In computer science, locality of reference, also known as the principle of locality, is the phenomenon of the same value or related storage locations being frequently accessed. There are two basic types of reference locality. Temporal locality refers to the reuse of specific data and/or resources within relatively small time durations. Spatial locality refers to the use of data elements within relatively close storage locations. Sequential locality, a special case of spatial locality, occurs when data elements are arranged and accessed linearly, e.g., traversing the elements in a one-dimensional array. Locality is merely one type of predictable behavior that occurs in computer systems. Systems which exhibit strong locality of reference phenomenon are good candidates for performance optimization through the use of techniques, like the cache memory and prefetching technology concerning the memory, or like the advanced branch predictor at the pipelining of processors.
Furthermore, a cache memory must be large enough to hold a significant amount of the working set of a workload. If not, cache thrashing can occur in which multiple main memory locations compete for the same cache lines, resulting in excessive cache misses. Designing a system without a cache memory is equally problematic. Because of the tRC of DDR3 memory, the same memory location may be accessed once every 45 ns. In certain systems, such as a network packet processing system or network processor, processing logic must process a new packet in less than 7 ns. A DDR3-based memory system may not have sufficient performance if greater than 1 in 6 packets require access to a single datum (e.g., greater than once every 42 ns). Thus, there is a balance between the size of a cache memory and the cost of the cache memory.

Method and apparatus for accessing cache memory


A system of distributed control of an interactive animatronic show includes a plurality of animatronic actors, at least one of the actors a processor and one or more motors controlled by the processor. The system also includes a network interconnecting each of the actors, and a plurality of sensors providing messages to the network, where the messages are indicative of processed information. Each processor executed software that schedules and/or coordinates an action of the actor corresponding to the processor in accordance with the sensor messages representative of attributes of an audience viewing the show and the readiness of the corresponding actor. Actions of the corresponding actor can include animation movements of the actor, responding to another actor and/or responding to a member of the audience. The actions can result in movement of at least a component of the actor caused by control of the motor.

1. Field of the Invention
The system and method relates to an interactive show, and more particularly, to distributed control of the interactive animatronic show.
2. Description of the Related Technology
An animatronic figure is a robotic figure, puppet, or other movable object that is animated via one or more electromechanical devices. The term "animated" is meant to be interpreted as to move to action. The electromechanical devices include electronics, mechanical, hydraulic, and/or pneumatic parts. Animatronic figures are popular in entertainment venues such as theme parks. For example, animatronic characters can be seen in shows, rides, or other events in a theme park. The animatronic character's body parts, such as the head and the arms, may generally move freely. Various animatronic systems have been created over a number of decades to control the animatronic figure.
Currently animatronic shows are controlled by centralized systems. These systems use precise synchronized clocks and dedicated high speed communication links to trigger events and playback content throughout the system. This existing approach is expensive, requires specialized infrastructure, suffers from having a single point of failure, and is difficult to scale to large and interactive shows. The standard approach involves a centralized show controller, generally a computer, that sends signals to individual components—be it sound, lighting, or figure motions. In theater, there is typically a person "at a control board" triggering events via protocols such as Musical Instrument Digital Interface (MIDI), Digital Multiplex (DMX), etc. In theme park style attractions, the control is typically from a dedicated control box.

System and method of distributed control of an interactive animatronic show


A system may include a plurality of wireless devices, each wireless device including a time source and configured to selectively communicate with at least one other of the plurality of wireless devices by way of a packet-based time precision protocol. The plurality of wireless devices may include a first wireless device and a second wireless device, the first wireless device being configured to determine whether the first wireless device and the second wireless device are in selective communication over a single-hop wireless link; determine a one-way delay over the single-hop wireless link by way of at least one packed-based time precision protocol message; and calculate a distance measurement between the first wireless device and the second wireless device based at least in part on the one-way delay.

In a wired communications system, a location of a particular device may be relatively fixed by a wired connection from the device to a base station, where the base station acts as an access point to a communications network. However, with the advent of wireless communications systems, wireless devices now have greater freedom of movement around the communications network. Because of this freedom, a wireless device may move in location with respect to a base station with which the wireless device may be in selective communication. Moreover, the wireless device may move from being in communication with one or more base stations to a location wherein the wireless device may be in communication with other base stations. Thus, the communications network may desire specific information regarding the position of a wireless device in relation to the one or more base stations presently providing communications services to the wireless device.

Packet based location provisioning in wireless networks


A vehicle side-view mirror control system includes a pair of extendable side-view mirrors and a controller configured to receive and store one or more trailer identifying indicia and one or more predetermined extendable side-view mirror configurations. The controller is configured to control translation of at least one of the pair of side-view mirrors to a one of the one or more predetermined extendable side-view mirror configurations according to the one or more stored trailer identifying indicia. The one or more trailer identifying indicia define or identify a specific trailer having been previously towed by the vehicle.

As is well-known, motor vehicles typically include side-view mirrors to provide the vehicle driver with a suitable field of view extending to the side and behind the vehicle. Conventionally, an orientation or angular position of the side-view mirror reflective surface is adjustable by pivoting to tailor the driver field of view as desired. For vehicles towing trailers, often such side view mirrors (also referred to as tow mirrors) are also equipped with mechanisms for longitudinally extending the side-view mirror, i.e. altering a distance from the vehicle side at which the mirror reflective surface is held. This allows adjusting the driver's field of view to accommodate the presence of vehicle-attached trailers of varying length and width dimensions. When the vehicle is not towing a trailer, the extendable side-view mirrors may be returned to an original configuration as specified by the driver. Such mechanisms for altering a side-view mirror length and/or orientation of the mirror reflective surface may be manually adjustable, or more conveniently may comprise powered mechanisms operable by the driver from the interior of the passenger cabin.
Most drivers will not tow a trailer with their vehicle all of the time, but instead will occasionally attach a trailer for recreational or work purposes. Alternatively, some drivers may tow a variety of trailers using the same vehicle. In each situation, the driver typically must adjust the extendable side view mirrors to provide a field of view to his or her satisfaction each time the trailer is attached to the vehicle. This can be inconvenient for the user. Moreover, this can be dangerous if the user neglects to make the needed adjustments to the side view mirror position prior to operating the vehicle with the trailer in tow.
To solve this and other problems, the present disclosure relates to vehicle tow mirror control systems and methods. Advantageously, the described systems and methods automatically adjust the vehicle side view mirrors to a predetermined extension length and/or reflective surface orientation in accordance with specific identifying indicia for a particular trailer being towed. Still more, such specific trailer identifying indicia are stored, and so by the simple expedient of approaching and/or attaching the specific trailer to the vehicle, the extendable side view mirrors are configured as to extension and reflective surface orientation to the user's particular specifications according to the stored trailer identifying indicia.


A power-on reset circuit input stage includes a current source charging a capacitor from a first power supply voltage to produce a reset signal, and a current shutoff means for shutting off the current source when the reset signal reaches a desired threshold voltage (i.e., when the capacitor is charged up). Beneficially, the current shutoff means comprises a transistor connected between the current source and a second power supply voltage. Advantageously, the transistor is controlled by a feedback voltage that may be the output signal, or a voltage derived from the output signal by a capacitive divider, for example.

This invention pertains to the field of digital circuits, and more particularly, to a power-on reset circuit for a digital circuit, and a semiconductor device including the same.
When a power supply voltage is turned on, to be supplied to a digital circuit (such as a memory circuit), there is a period of time necessary for the power supply voltage to ramp-up to its final (steady-state) value and stabilize. If the power supply voltage is applied to the digital circuit during this ramp-up period, then an unpredictable and undesired operation of the digital circuit may occur, including possible latch-up problems, etc. Such problems may not recover once the power supply voltage reaches its final value and stabilizes.
Accordingly, it is common to provide a power-on reset circuit for a digital circuit to provide a reset signal to the digital circuit to reset the digital circuit to a known state once the power supply voltage reaches a desired threshold voltage level. Such a power-on reset circuit typically includes a delay circuit connected to the power supply voltage to provide a delayed reset signal that will only reach a reset threshold voltage level to reset the digital circuit(s) after the power supply voltage reaches a desired power supply voltage threshold level.
FIG. 1 illustrates the input stage 100 of a conventional power-on reset circuit. The input stage 100 includes first and second PMOS transistors 110 and 120, resistor 130, and capacitor 140. The power supply voltage is indicated as VSS and the output signal is indicated as VOUT. The input stage 100 is followed by a second stage, typically a Schmidt trigger, to provide a power-on reset signal to the remaining digital circuits as will be described in more detail below.
The input stage 100 can be modeled as a current source connected in series with the capacitor 140. The current source is established by the current mirror relationship of first and second PMOS transistors 110 and 120. The output signal VOUT is a ramp signal whose slope is determined by the current of the current source and the capacitance of the capacitor 140. The VOUT ramp signal is provided to a second stage, typically a Schmidt trigger, having a threshold to convert the VOUT ramp signal into a VRESET pulse signal having a sharp transition edge.
Because of the current mirror, a power-on reset circuit having the input stage 100 can produce a reset signal VRESET with a much higher delay for the same values of resistor 130 and capacitor 140 compared to a power-on reset circuit whose input stage is a simple RC delay circuit. For example, if the current mirror scales down the current through the capacitor 140 by a factor of ten (10), then the resulting delay will be scaled up by about the same factor of 10 compared to an RC delay circuit having the same size capacitor. This can be especially beneficial when the power-on reset circuit having the input stage 100 is incorporated into a digital integrated circuit (IC) device where space considerations are very important.
Unfortunately, there are problems with the conventional power-on reset circuit having the input stage 100. For example, once the power-on reset circuit has performed its principle function (providing a delayed reset signal upon power-up), there remains a DC static current through the circuit by means of the current through the current mirror transistor 110 and the resistor 130. As a result, the power-on reset circuit will needlessly consume and waste power even in its xe2x80x9cstandbyxe2x80x9d mode of operation.
One solution to the above-mentioned problem has been disclosed in U.S. Pat. No. 6,052,006. However, the disclosed solution requires more than five additional transistors to stop the current flow through the power-on reset circuit once the circuit has performed its principle function.
Accordingly, it would be desirable to provide an improved power-on reset circuit, and in particular, a power-on reset circuit having an improved input stage. It would also be desirable to provide a power-on reset circuit that consumes very little, if any, power in a standby mode. It would be further desirable to provide a power-on reset circuit that eliminates static DC current flow through the circuit during a standby mode. It would be still further desirable to provide a power-on reset circuit that includes a less complicated means of eliminating static DC current flow through the circuit during a standby mode. The present invention is directed to addressing one or more of the preceding concerns.
In one aspect of the invention, a power-on reset circuit comprises a current mirror connected to a first power supply voltage, a capacitor receiving current from the current mirror, and current shutoff means connected between the current mirror and a second power supply voltage, the current shutoff means being adapted to shut off the current received by the first capacitor when a voltage across the capacitor reaches a threshold voltage level.
In another aspect of the invention, a semiconductor device includes a digital circuit having a reset input and power-on reset circuit providing a reset signal to the reset input, the power-on reset circuit comprising a current mirror connected to a first power supply voltage, a first capacitor receiving current from the current mirror, and current shutoff means connected between the current mirror and a second power supply voltage, the current shutoff means being adapted to shut off the current received by the first capacitor when a voltage across the capacitor reaches a threshold voltage level.

Power-on reset circuit with current shut-off and semiconductor device including the same


A semiconductor device including a vertical transistor and a method for forming the same are disclosed, which can greatly reduce a cell area as compared to a conventional layout of 8F2 and 6F2, and need not form a bit line contact, a storage node contact, or a land plug, such that the number of fabrication steps is reduced and a contact region between the bit line and the active region is increased in size. The semiconductor device including a vertical transistor includes an active region formed over a semiconductor substrate, a first recess formed to have a predetermined depth at both sides of the active region, and a bit line buried in the first recess.

Embodiments of the present invention relate to a semiconductor device and a method for forming the same, and more particularly to a semiconductor device including a vertical transistor, and a method for forming the same.
A semiconductor memory device includes a plurality of unit cells each having a capacitor and a transistor. The capacitor is used to temporarily store data, and the transistor is used to transfer data between a bit line and the capacitor in response to a control signal (word line). The transistor has three regions, i.e., a gate, a source, and a drain. Electric charges move between the source and the drain according to a control signal inputted to the gate of the transistor. The movement of the electric charges between the source and the drain is achieved through a channel region.
When a typical transistor is formed over a semiconductor substrate, a stack-type gate is formed on the semiconductor substrate, and impurities are doped at both sides of the gate to form a source and a drain. In this case, a region between the source and the drain under the gate becomes a channel region of the transistor. The transistor including the horizontal channel region occupies a large-sized area of the semiconductor substrate. Accordingly, it is difficult to reduce the overall area of a complicated semiconductor device since semiconductor device includes a plurality of transistors.
A variety of methods have been proposed to reduce the overall area of the semiconductor device. A representative method uses a vertical transistor including a vertical channel region instead of a conventional planar transistor including a horizontal channel region.

Semiconductor device including vertical transistor and method for manufacturing the same


A method, computer program product and computer system for scaling and managing requests on a massively parallel machine, such as one running in MIMD mode on a SIMD machine. A submit mux (multiplexer) is used to federate work requests and to forward the requests to the management node. A resource arbiter receives and manges these work requests. A MIMD job controller works with the resource arbiter to manage the work requests on the SIMD partition. The SIMD partition may utilize a mux of its own to federate the work requests and the computer nodes. Instructions are also provided to control and monitor the work requests.

This invention relates to parallel computing. More specifically, it relates to scaling and managing requests on a massively parallel machine.
Parallel computing is an area of computer technology that has experienced advances. Parallel computing is the simultaneous execution of the same task (split up and specially adapted) on multiple processors in order to obtain results faster. Parallel computing is based on the fact that the process of solving a problem usually can be divided into smaller tasks, which may be carried out simultaneously with some coordination. Parallel computing may be implemented in architectures optimized to execute in a mode of 'Single Instruction, Multiple Data' ('SIMD') or in a mode of 'Multiple Instruction, Multiple Data' ('MIMD').
A MIMD machine is a computer in which multiple autonomous processors simultaneously execute different instructions on different data. Distributed systems are generally recognized to be MIMD architectures—either exploiting a single shared memory space or a distributed memory space. Many common computer applications are implemented with MIMD architectures, including, for example, most accounting programs, word processors, spreadsheets, database managers, browsers, web applications, other data communications programs, and so on.
A SIMD machine is a computer that exploits multiple data streams against a single instruction stream to perform operations which may be naturally parallelized. SIMD machines are ubiquitous on a small scale, in digital speech processors, graphics processors, and the like. SIMD machines execute parallel algorithms, typically including collective operations. A parallel algorithm can be split up to be executed a piece at a time on many different processing devices, and then put back together again at the end to get a data processing result. Some algorithms are easy to divide up into pieces. For example, the job of checking all of the numbers from one to a hundred thousand to see which are primes could be done, by assigning a subset of the numbers to each available processor, and then putting the list of positive results back together. In this specification, the multiple processing devices that execute the individual pieces of a parallel program are referred to as 'compute nodes.' A SIMD machine is composed of compute nodes and other processing nodes as well, including, for example, input/output (I/O) nodes, and service nodes.
Parallel algorithms are designed also to optimize the data communications requirements among the nodes of a SIMD machine. There are two ways parallel processors communicate: shared memory or message passing. Shared memory processing needs additional locking technology for the data and imposes the overhead of additional processor and bus cycles and also serializes some portions of the algorithm. Message passing uses high-speed data communications networks and message buffers, but this communication adds transfer overhead on the data communications networks as well as additional memory need for message buffers and latency in the data communications among nodes. Designs of SIMD machines use specially designed data communications links so that the communication overhead will be small, but it is the parallel algorithm that decides the volume of the traffic. It is possible to partition the machine into sets of compute nodes such that neighboring partitions are electrically isolated from each other. This allows multiple message passing interface (MPI) type jobs to execute concurrently.

Scaling and managing work requests on a massively parallel machine

International Business Machines Corporation


A packing case for packing a lock device is disclosed. The lock device includes a rose portion and a handle portion connected to the rose portion. The packing case includes a first casing, a second casing and at least one constraining structure. A first recessed portion is formed on the first casing for containing the rose portion. The second casing is combined with the first casing in a closable manner, and the handle portion is contained and constrained between the first casing and the second casing. The at least one protruding structure is disposed on the second casing for abutting against the rose portion when the second casing is combined with the first casing, so as to constrain the rose portion inside the first recessed portion.

1. Field of the Invention
The present invention relates to a packing case, and more specifically, to a packing case for packing a lock device or an object.
2. Description of the Prior Art
In general, a manufacturer usually utilizes a packing case to pack a lock device for preventing scratches or damages of the lock device caused by colliding with other object during the lock device is transported or marketed. The packing case is usually made of plastic material and has a recessed portion formed by a vacuum forming process. The recessed portion is used for containing the lock device, so that the lock device could be packed inside the packing case.
In practical application, the size of the recessed portion is greater than the size of the lock device, so as not only to prevent interference between the lock device and the packing case due to the manufacturing tolerances when the lock device and the packing case are assembled, but also to facilitate the assembly of the lock device and the packing case. As a result, there is a gap accordingly formed between the lock device and the packing case when the lock device is contained in the recessed portion of the packing case. However, shaking of the lock device may frequently occur inside the packing case due to the aforesaid gap when the lock device is transported or marketed, resulting in scratches or damages of the lock device when the lock device collides with the side wall of the recessed portion. Thus, the outer appearance of the lock device could be influenced accordingly.


An improved carrier system is provided for easy attachment and detachment of the carrier from a wheeled conveyance such as a bicycle or motorcycle. When not attached to the conveyance, the carrier can also be used in a fashion similar to roller luggage.

This invention relates generally to cycle accessories and in particular to carriers which are removably mounted onto cycles for transporting gear and the like.
Many devices exist for carrying articles on open human or motor-powered cycling conveyances, such as bicycles, mopeds, motorcycles, or tricycles. Typically such devices consist of containers in the form of flexible or fabric bags or rigid boxes or baskets which mount on an intermediary carrier rack which is more or less permanently attached to the cycle's frame. When not in use, the rack typically serves no other purpose, adds additional weight to the cycle, and is aesthetically unappealing. Also, the containers when removed from the rack are generally carried by hand, on the shoulder, or on the back of the cyclist. Furthermore, the mounting and dismounting of the containers requires the cyclist to bend, stoop, lift, and/or perform fine manipulation. This becomes more cumbersome and difficult for the cyclist when multiple containers, like panniers, are involved. What is needed is a cycle-transportable container which is simpler to attach and detach, and which is easier to use when detached from the cycle.


An adaptive gate discharge circuit for discharging the gate of a power FET transistor. The adaptive gate discharge circuit includes discharge driver circuitry which responds to the control signal by discharging the power FET gate from the initial "on" potential of the power FET to below a selected potential at which the power FET is turned off. During gate discharge, but prior to the potential of the power FET gate dropping below the selected potential, adaptive bias circuitry continues to operate to provide biasing current both to the discharge driver circuitry as well as to any other circuitry it may be biasing. However, when the potential of the power FET gate drops below the selected potential, low current biasing circuitry reduces the operating voltage of the adaptive biasing circuitry thereby turning off the adaptive biasing circuitry and any other circuitry it may be biasing.

1. Field of the Invention
The present invention relates to electronic circuits and, in particular, to a power FET gate discharge circuit which remains active after all other circuitry is turned off to fully discharge the power FET gate and then turns itself off so that only a single low current path remains between supply and ground.
2. Discussion of the Prior Art
The gate impedance of a large power MOSFET transistor is highly capacitive. Hence, the terms "charge" and "discharge" are used to describe turning the power transistor on and off, respectively.
In all high-side driver applications (and in low-side drivers operating from low supply voltages), the gate of the power FET must be raised above the supply potential in order to turn the power FET on. This requires the use of charging circuitry which "pumps" the power FET gate above the supply to the desired potential. Typically, this charging circuitry is designed to maintain the desired potential on the power FET gate after the FET has been turned on while at the same time minimizing extraneous current drain.
Similarly, discharge circuitry is required to pull the gate of the power FET down to turn the FET off. Optimally, the discharge circuitry should conserve current when the power FET is off. For example, in automotive applications, it is required that some circuitry (e.g. clock, memory radio, etc.) remain powered even when the ignition is turned off; it is highly desirable in this application to provide power to these selected circuits while at the same time minimizing the current drain on the car battery.
Typically, MOS circuitry is utilized for implementing charging and discharging circuitry for power FETs because of the true on-off and high speed switching capability of MOS transistors.
However, a major deficiency of MOS switches is that, in some harsh operating environments, the low breakdown voltages of the MOS transistors are insufficient for the transistors to withstand high voltage transients. For example, in automotive systems, the possibility of inadvertent reverse battery conditions or loose battery cables has caused some automotive manufacturers to specify that integrated circuits (IC) utilized in these applications be capable of withstanding up to 60V, well above the breakdown voltage of commonly available MOS transistors. Thus, additional protective circuitry is required to shield the MOS switching transistors from voltage transients.
Discharging circuitry can be implemented utilizing bipolar transistors configured to withstand high voltage transients. However, substantial bias currents are typically required in order to maintain desired on/off switching speeds.

Adaptive gate discharge circuit for power FETS


A drawer system and method for carrying and transporting tools and equipment on a vehicle. In particular, embodiments of the present invention are directed to a drawer system mounted into the rear section of a utility truck and that includes a drawer that is accessible from either side of the truck. Further, the drawer system of the present invention includes multiple catch points that permit the drawer to be securely arranged in a plurality of preferred extension positions.

1. Field
Embodiments of the present invention are directed to a drawer system and method for carrying and transporting tools and equipment on a vehicle. In particular, the embodiments are directed to a drawer system integrated into the rear section of a utility truck and that includes a drawer accessible from either side of the truck. Further, the drawer system of the present invention includes catch points that permit the drawer to be securely arranged in a plurality of extension positions.
2. Related Art
Utility trucks commonly incorporate the use of drawer systems to store and transport tools. Such drawer systems are generally integrated into the sides of the utility truck, usually within the truck's rearward section. Such configurations permit each side of the truck to hold several drawers. The drawers can be designed in various shapes and sizes to store and carry different types of tools and material. The length and width of utility trucks are natural constraints on drawer size.
Standard drawers generally have a length that is shorter than one-half the width of the truck. Because the drawers are normally positioned on opposite sides of the truck, this size restriction ensures that the drawers will not interfere with each other while in the closed position. This restriction also permits a user to access an individual drawer only from a side of the truck where the drawer is located. Thus, in order to access a first drawer located on a driver's side of the truck, the user must position himself on the driver's side. Alternatively, if the user needs to access a second drawer located on a passenger's side of the truck, the user must walk around to the passenger's side to access the drawer.
In addition, standard drawers are generally only secured, or latched in place, when in a fully retracted, or closed, position. For instance, if the utility truck is parked on an angled surface, the drawers can unexpectedly move or shift due to gravity. Such instability can pose security and safety hazards because of the size and weight of the tools that are generally carried by utility trucks.

Dual-access vehicle drawer system and method


A rotary electric motor has a stator core (1) with salient poles (4, 3), some of them ferromagnetic and some of them permanent-magnetic, which are spaced-apart and which are all simultaneously magnetizable by means of a magnetizing winding (5A, 5B). The rotor core has either reluctance poles (7) with intervening pole gaps and constant pole pitch, or permanent-magnetic poles (10) with constant pole pitch and without intervening pole gaps, alternating poles being of opposite polarities. Each reluctance pole (7) or permanent-magnetic pole (10) has a width which over a portion of the pole corresponds to respectively one-half of or the full pole pitch and is smaller over the remaining portion so that each pole (7 or 10) has a part (7B or 10A) which projects in a direction common to all poles. The ferromagnetic and permanent-magnetic poles (3, 4) of the stator (1) have a width corresponding to the width of the narrower portion of the poles (7 or 10) of the rotor (2). The number of permanent-magnetic poles (3) and, optionally, also the number of ferromagnetic poles (4) of the stator (1) is smaller than the number of reluctance poles (7) or permanent-magnetic poles (10) of the rotor (2), the positioning of the poles being such that when the motor is running, all ferromagnetic stator poles (4) will be simultaneously positioned opposite respective rotor poles (7 or 10) and all permanent-magnetic stator poles (30 likewise are simultaneously positioned opposite respective rotor poles (7 or 10).

Technical field and Prior Art
The present invention relates to a rotary electric motor which has a single, predetermined direction of rotation and which can be controlled in respect of its supply with current and its speed by a simple electronic circuit. The motor is a further development of the type of motor described and shown in Swedish Patent Application 8802972-3 (=WO 90/02437).

Electric motor with combined permanent and electromagnets


A method for measuring a structure that contains overlying and underlying films in a region where the overlying film""s thickness rapidly decreases until the underlying film is exposed (e.g., an edge-exclusion structure). The method includes the steps of: (1) exciting acoustic modes in a first portion of the region with at least one excitation laser beam; (2) detecting the acoustic modes with a probe laser beam that is either reflected or diffracted to generate a signal beam; (3) analyzing the signal beam to determine a property of the structure (e.g., the thickness of the overlying layer) in the first portion of the region; (4) translating the structure or the excitation and probe laser beams; and (5) repeating the exciting, detecting, and analyzing steps to determine a property of the structure in a second portion of the region.

This invention relates to methods for determining the thickness of thin films on small areas of structures used in microelectronics fabrication, e.g., near a semiconductor wafer""s edge or on a damascene-type structure.
During the fabrication of microelectronic devices, thin films of metals and metal alloys are deposited on silicon wafers and for use as electrical conductors, adhesion-promoting layers, and diffusion barriers. Microprocessors, for example, use metal films of copper, tungsten, and aluminum as electrical conductors and interconnects, titanium and tantalum as adhesion-promoting layers, and titanium:nitride and tantalum:nitride as diffusion barriers. Thickness variations in these films can modify their electrical and mechanical properties, thereby affecting the performance of the microprocessor. The target thickness values of these films vary depending on their function: conductors and interconnects are typically 3000-10000 angstroms thick, while adhesion-promoting and diffusion-barrier layers are typically between 100-500 angstroms thick. The deposition of each of these films must be controlled such that the film""s thickness is within a few percent (e.g., 5-100 angstroms, a value roughly equivalent to one or two seconds human fingernail growth) of its target value. Furthermore, the uniformity of the film over the surface of the wafer must be closely controlled in order to assure uniform behavior of the individual microprocessors and, consequently, high manufacturing yields. Because of these rigid tolerances, film thickness is often measured as a quality-control parameter during and/or after the microprocessor""s fabrication.
The metal films are often deposited and patterned in complex geometries and this complicates the measurement process. In a typical fabrication process, a titanium:nitride film is deposited over the entire surface of a silicon wafer. A tungsten film is then deposited onto the titanium:nitride film to leave an xe2x80x9cedge-exclusion zonexe2x80x9d, i.e., a small (about 1 or 2 mm) region where the titanium:nitride is exposed, near the wafer""s edge. The edge-exclusion zone prevents delamination of the tungsten film neat its edges. Near this region, the thickness of the tungsten film rapidly increases to its target value; this takes place over a distance of a few hundred microns. Without this rapid increase in film thickness, devices patterned near the wafer""s edge-exclusion zone will contain non-ideal tungsten films not having adequate thickness, and they will not meet specifications.
An example of a complicated film geometry recently introduced in commercial microelectronics fabrication is a xe2x80x9cdamascenexe2x80x9d or xe2x80x9cdual damascenexe2x80x9d structure. These structures, used especially to form copper conductors and interconnects, are typically formed by a multi-step process: copper is first deposited onto a wafer having a dielectric layer that has been etched to have a series of trenches; the wafer is then polished by chemical-mechanical polishing (CMP) to remove excess copper, leaving only copper-filled trenches. The resulting structure is typically a series of separated copper lines having a thickness of a few thousand angstroms, a width of about 0.5 microns, a periodicity of about 2 microns, and a length of several millimeters.
Measuring film thickness in and near the edge-exclusion zone and in damascene-type structures is difficult and impractical using conventional techniques. For example, blanket metal films are typically measured using a 4-point probe. Here, two separated pair of conducting probes contact the film; electrical resistance, as measured by the probes, relates to the film""s thickness. Because the spatial resolution of the 4-point probe is typically a few hundred millimeters, this instrument is impractical for both edge-profile and damascene-type structures. Moreover, a film""s resistance often depends on both its thickness and geometry, a complication that further reduces the accuracy of the 4-point probe when used to measure complex geometries. Another film-measuring instrument, called a stylus profilometer, drags a stylus needle over a sample, recording variations in topography. This instrument, however, is slow, cumbersome, sensitive to slight amounts of sample curvature, and inaccurate when used to measure relatively long distances (e.g., the hundreds of microns required for tungsten build-up near the exclusion zone).
In addition to these disadvantages, both 4-point probes and stylus profilometers require contacting and thus contaminating a sample. These instruments are therefore typically used on monitor or test samples, rather than samples containing actual product. Other methods for measuring the thickness of metal films, such as X-ray fluorescence and Rutherford backscattering, are non-contact, but are slow and have poor spatial resolution.
In general, in one aspect, the invention provides a method for measuring a structure that contains overlying and underlying films in a region where the overlying film""s thickness rapidly decreases until the underlying film is exposed (e.g., an edge-exclusion structure). The method includes the steps of: (1) exciting acoustic modes in a first portion of the region with at least one excitation laser beam; (2) detecting the acoustic modes with a probe laser beam that is either reflected or diffracted to generate a signal beam; (3) analyzing the signal beam to determine a property of the structure (e.g., the thickness of the overlying layer) in the first portion of the region; (4) translating the structure or the excitation and probe laser beams; and (5) repeating the exciting, detecting, and analyzing steps to determine a property of the structure in a second portion of the region.
In one embodiment, the exciting, detecting, analyzing, and translating steps are repeated to determine a property of the structure in multiple portions of the region. In one case, the above-mentioned steps are repeated in an edge-exclusion structure until the thickness of the overlying film is measured from where the underlying film is exposed to where the overlying film""s thickness is at least 80% of its average value. This particular method can be extended so that the steps are repeated in the structure until a diameter of the overlying film is measured. Typically, this xe2x80x9cdiameter scanxe2x80x9d embodiment includes repeating the above-mentioned step on each side of the overlying film""s diameter, and measuring multiple points near the center of the film.
In another embodiment, the exciting, detecting, analyzing, and translating steps are repeated until a property of the underlying film (e.g., the width of the edge-exclusion zone) is measured from where it is exposed to the edge of the wafer.
In typical embodiments: the overlying film is selected from a metal such as tungsten, copper, aluminum, and alloys thereof; the underlying film is selected from materials such as oxides, polymers, and metals such as titanium, titanium:nitride, tantalum, tantalum:nitride, and alloys thereof. These films are usually deposited on a silicon wafer.
The structure is typically measured using an optical method where the acoustic modes are excited with at least one optical pulse having a duration less than 1 nanosecond. In a particular embodiment, the exciting step features exciting time-dependent acoustic modes in the structure by directing a spatially periodic excitation radiation field defined by a wavevector onto the sample. The radiation field, for example, is formed by overlapping two optical pulses in time and space in or on top of the sample. The detecting step then includes diffracting probe radiation off a modulated optical or mechanical property induced on the sample""s surface by the acoustic modes. To determine thickness of the overlying layer, the density and acoustic properties of the overlying and underlying layers, the wavevector, and a frequency of the acoustic mode are analyzed (e.g., by comparing them to a mathematical model).
In another aspect, the invention features a method for measuring a structure comprising multiple thin, metallic, rectangular-shaped or linear regions, each having a width of less than 5 microns and being disposed between neighboring regions that include a second, non-metallic material (e.g., a damascene-type structure). The method includes the steps of: (1) exciting acoustic modes in at least one metallic, rectangular-shaped region by irradiating the region with a spatially periodic excitation field defined by a wavevector; (2) detecting the acoustic modes by diffracting a probe laser beam off a ripple morphology induced in the regions by the acoustic modes; and (3) analyzing the diffracted signal beam to determine a property of the structure (e.g., the thickness of the metallic, rectangular-shaped regions).
In a particular embodiment, the exciting step includes irradiating multiple metallic, rectangular-shaped regions with the excitation field. A probe laser beam is then diffracted off the surface ripple induced in each region by the acoustic modes. Thickness can be determined by analyzing a density and acoustic properties of the metal included in the region, the wavevector, and a frequency of the acoustic mode. Here, the width of the metallic, rectangular-shaped region or a distance separating consecutive regions may be used in the analysis. In still other embodiments, the signal beam can be further analyzed (e.g., by monitoring diffraction of the probe beam) to determine a width of the metallic, rectangular-shaped region or a distance separating consecutive metallic, rectangular-shaped regions.
In embodiments, each of the metallic, rectangular-shaped regions comprises copper, tungsten, aluminum, or alloys thereof, and have a width of less than 1 micron. The rectangular-shaped regions can also include more than one layer. For example, the trench may be lined with tantalum and then filled with copper.
In another aspect, the invention provides a method for measuring a structure comprising multiple thin, metallic, rectangular-shaped regions, each having a width of less than 1 micron and being disposed between neighboring regions comprising a second, non-metallic material. The method includes the steps of: (1) exciting acoustic modes in multiple metallic, rectangular-shaped regions by simultaneously irradiating the regions with a spatially periodic excitation field defined by a wavevector; (2) detecting the acoustic modes by diffracting a probe laser beam off a modulated optical or physical property induced in each of the regions by the acoustic modes; and (3) analyzing the signal beam to determine an average thickness of the metallic, rectangular-shaped regions irradiated by the excitation field.
The invention has many advantages. In particular, the method makes accurate measurements of film thickness in and near the edge-exclusion zone, in damascene-type structures, and in other small-scale structures. Measurements feature all the advantages of optical metrology, e.g., noncontact, rapid and remote measurement over a small region. The method collects data from a single measurement point having an area of between 10 and 100 microns in less than a few seconds. From these data film thickness in the small-scale structures is determined with an accuracy and repeatability of a few angstroms. For damascene-type structures, the method simultaneously measures the thickness multiple metal lines lying within the optical spot size with virtually no decrease in data quality, accuracy, or repeatability. For typical films used in a microelectronic device, the measurement determines thickness to within a fraction of a percent of the film""s true value.
In addition to thickness, the measurement determines the width of an exclusion zone, the diameter of the useable area on the wafer, the film""s slope near the edge-exclusion zone, and properties of damascene-type structures, such as the width and periodicity of the metal lines and the number of defects in the structure.
The optical system used to make these measurements is compact, occupying a footprint of about 2 square feet, and composed primarily of inexpensive, commercially available components.
Because of its small size, the optical instrument can be a stand-alone unit, or can be attached directly to a film-formation tool (e.g., a chemical-vapor deposition tool, a plasma-vapor deposition tool, a cluster tool, or a vacuum chamber) or a film-processing tool (e.g., a chemical-mechanical polisher). In these embodiments, the film-formation tool includes an optical port (e.g., a glass window) that is transparent to the excitation and probe radiation. Thus, during operation, the film-measuring instrument is oriented so that the excitation and probe radiation, and the diffraction signal, pass through the optical port.
Other features, aspects, and advantages of the invention follow from the following detailed description, and from the claims.

Method and device for measuring the thickness of thin films near a sample""s edge and in a damascene-type structure


One of a plurality of video channels is selected for viewing. A specific one of a plurality of video channels is bookmarked. An object representing said bookmarked channel is displayed. A displayed object is selected to select the bookmarked channel.

In a conventional television system, a plurality of channels are utilized to broadcast, simultaneously, a plurality of programs to a television set. A user is then able to view any one of the plurality of channels received by the television. Further, the user may utilize personalized or virtual channels. The user may, for example, use a remote control to select between the channels.
However, with the increasing number of channels available to a user, it is increasingly difficult for the user to browse through the channels quickly. For example, a user may wish to browse through other channels during commercial breaks and then return to the main channel quickly. This is tedious and time consuming as the number of channels increase. Traditionally, the user remembers the channel number of the current channel in order to quickly return to it once he has finished browsing. Simple mechanisms for returning to the current channel like, for example, pressing a "Previous Program" key or "Alternate Channel" key are effective if the user has only browsed one other channel. However, these mechanisms are not effective when the user has browsed more than one other channel. Other mechanisms, such as the Electronic Program Guide or the "P+", "P−" keys can be used but do not enable the user to return to their current channel with a single key press.
There exists a method of bookmarking channels, in which a user can select a channel to be bookmarked. The bookmarked channels can then be recalled in the future so that the user is not required to remember the numbers associated with the channels, and is not required to browse the channels to find one of interest.
One known method for bookmarking channels can be found in the patent application WO 9737490. In this disclosure, programs or channels are bookmarked for later selection. At any time while watching the television, the viewer can bookmark programs or channels to which he or she wants to return quickly and/or at a later time by pressing a button on a remote control. When a channel or program is bookmarked, a checkmark is shown in the corner of the screen to indicate that the program is marked. The checkmark only remains visible for a short period of time. Furthermore, when a viewer switches channel, the checkmark disappears. The result of bookmarking more than one channel is that each bookmarked channel is added to a list. Then, when the user wishes to return to a bookmarked channel, they are required to press a Recall button. Upon pushing the recall button, the first bookmarked channel is recalled. The user is then required to press the recall button again to retrieve the second bookmarked channel and so on.
Further examples of known methods can be found in the patent applications US 2002/0075408 and WO 00/62533.
These known methods for selecting a preferred video channel for viewing require the user to browse through a list of bookmarked channels. This may be time consuming if the user has bookmarked many channels.

Method and apparatus for selecting one of a plurality of video channels for viewings


An apparatus and method is described herein for automatically labeling using labels having a fluid activatable adhesive along the back surface of such label. The apparatus has multiple pallets each being positionable with the lowermost label of a stack of one or more labels to releasably secure by suction the label against the pallet, and multiple pads each being positionable with respect to pallets to receive labels from the pallets and then releasably retain such labels until application onto containers. Fluid for activating adhesive is applied by an applicator onto labels retained upon the pad to change the fluid activatable adhesive along the label's back surface from a non-tacky state to a tacky state just prior to application of the label onto container.

For over 50 years, automated machines have been used to apply labels onto containers, such as bottles, cans or jars. Typically these machines utilize cold glue or hot melt adhesives which are applied by a roller onto a pad prior to pickup and then transfer of a label onto another pad or drum which applies it to a container. Conventional automated labeling machines include those manufactured by Krones AG in Germany or Krones, Inc. in Franklin Wis. (Krones AG and Krones, Inc., being referred to herein as "Krones"). Other adhesives that have been used on such labeling machines include UV curable adhesives, which operate and are less tacky than cold glue or hot melt adhesives, until UV light is applied to the adhesive label. Although these adhesives are useful for their intended purpose, it has been found that applying tacky liquid adhesives prior to pickup of labels and throughout the entire label application process is undesirable as the liquid adhesives fall onto various parts of the machine creating a mess and can require excessive maintenance including machine downtimes to cleanup the machine.
In addition to cold and hot glue applied labeling methods, preprinted pressure sensitive adhesive (PSA) labels are also used. These labels utilize a release liner to protect the preprinted label face from interacting with the tacky PSA. The use of traditional PSA labels results in several million pounds of waste per year in the bottling industry. PSAs also lack removability properties desirable in downstream recycling and bottle reusing facilities.
U.S. Pat. Nos. 6,306,242; 6,517,664; and 6,663,749 to Dronzek describe an additional example of a labeling system for applying labels to plastic and glass bottles. The labeling system includes applying a layer of a hydrophilic solid material to a polymeric label to form a hydrophilic layer on said polymeric label; applying water, water containing a cross-linking agent or a water based adhesive over said hydrophilic layer to form a fastenable polymeric label; fastening said fastenable polymeric label to a glass, plastic or metal container or surface; and curing said polymeric label on said glass, plastic or metal surface or container. In this system the fluid contains functional chemical components in the form of solids suspended, dispersed, or dissolved in a liquid carrier.

Automated labeling apparatus using labels having a fluid activatable adhesive


Device for lifting an article from a roller conveyor having a fork that can be raised and lowered, and having a plurality of spaced-apart elongate tines which, in the lowered position, move with the tines between or below the rollers of the roller conveyor in order to lift one or a plurality of articles from the rollers as the fork is being raised into the raised position with the tines, where the tines form a carrier surface for the article and the tines can be expanded in the direction transverse to the longitudinal extension thereof in order to form an expanded carrier surface.

The invention relates to a device for lifting one or a plurality of articles from a roller conveyor by a fork which can be raised and lowered having one or a plurality of spaced-apart elongate tines which, in the lowered position, are lowered with the tines between or below the rollers of the roller conveyor in order to lift the article(s) from the rollers as the fork is being raised into the raised position with the tines, wherein the tines form a carrier surface for the article.
The use of forklifting devices is known for lifting objects from the rollers of roller conveyors or lowering them onto the rollers thereof by means of tines of the fork engaging between the rollers. Particularly small goods, however, which are transported on roller conveyors can slip, tip over or fall when being lifted by means of a conventional fork mechanism or belt lifting mechanism. In particular in the area of packet transportation, this problem cannot always be avoided by using smaller roller and fork spacings. Nevertheless, during transportation of these small goods, it must also be possible to effect lifting in order thus to carry out e.g. intermediate buffering or changing of the transportation sequence.

Device for lifting one or a plurality of articles from a roller conveyor


A fastening system includes a housing and a plurality of spindles. The plurality of spindles are not fixedly attached to the housing. The fastening system has a first axis. Each of the plurality of spindles is moveable parallel to the first axis. The fastening system also has a second axis, which is substantially perpendicular to the first axis. Each of the plurality of spindles is also moveable parallel to the second axis. A template member is configured to locate the plurality of spindles, and is not permanently fastened to the housing.

In industry, numerous types of fasteners may be used to attach workpieces together or to attach other components to workpieces. Manufacturing and assembly facilities may use equipment of various sizes to drive or install multiple fasteners at substantially the same time. The equipment may be hard-tooled, such that it is generally fixed in the facility for a single purpose, function, or production line.


For maintenance after wet cleaning of a plasma processing apparatus which processes a specimen in a vacuum processing chamber by using a plasma, when restoration processing after the wet cleaning of members configuring the vacuum processing chamber is performed with the vacuum processing chamber opened to the atmosphere, it is automatically or semiautomatically judged whether the restoration processing is appropriate or not according to a predetermined optimum sequence inherent in the apparatus, and the next processing is started automatically or semiautomatically according to the results.

The present invention relates to a maintenance method and system for a plasma processing apparatus having a vacuum processing chamber, and more particularly to maintenance during a restoring operation after completing the maintenance such as wet cleaning involving the opening of the vacuum processing chamber to the atmosphere.
Conventionally, the restoring operation after the maintenance involving the opening of a plasma processing apparatus to the atmosphere needs to check whether the air etc. leaks out of the vacuum processing chamber after starting vacuum evacuation, to check an attained pressure in the vacuum processing chamber, to check an amount of conveyed foreign substances and an amount of foreign substances produced by an electric discharge, and to check an etching rate or a film forming rate. Besides, because a judgment in each operation stage must be made based on experiences, it is necessary to have a person to operate or decide in each stage.
FIG. 7 shows an example of a processing procedure after wet cleaning according to a conventional method.
After completing a wet operation, the evacuation by a vacuum pump is started. Then, a leak check and an attained pressure check are performed in about two hours. If their results are NG (no good), the evacuation is performed again. And, if they are OK, a transfer, a gas discharge, a foreign substance check (that is, the checking of the increase of the number of foreign substances on a foreign substance checking wafer before and after QC (quality control such as the transfer processing)) (pre-measurement before QC, QC, post-measurement after QC) are performed. If they are OK, a dummy run (checking of the electric discharge using checking sample) is performed. Besides, an electric discharge foreign substance check (that is, the checking of the increase of the number of foreign substances on a foreign substance checking wafer before and after QC (discharge processing in this case)) (pre-measurement before QC, QC, post-measurement after QC) is performed, and if it is OK, a rate check (checking of the etching rate or the film forming rate) (pre-measurement before QC, QC, post-measurement after QC) is performed. If it is OK, processing of preproduction wafers (that is, the processing of an actual wafer before the production of the wafers) is started, and if it is OK, the wet operation is terminated. Then, processing of products is started.
As described above, the restoring operation after the maintenance work by the conventional method often requires the intervention of a person and the decision by a person. Therefore, the efficiency of work is poor, many people are required to start the operation and it takes lots of time to restore.
Accordingly, it is an object of the present invention to provide a maintenance method and system for a plasma processing apparatus which can omit complex works requiring the intervention of people and a judgment for pass or fail (suitability of processing) in each stage of restoration processing based on experiences and can realize saving of the manpower before starting the operation or shortening of restoration time.
One aspect of the invention is directed to a maintenance method after wet cleaning of a plasma processing apparatus which processes a specimen by plasma in a vacuum processing chamber, wherein:
when restoration processing after the wet cleaning of members configuring the vacuum processing chamber is performed with the vacuum processing chamber opened to the atmosphere for maintenance or the like,
it is automatically or semiautomatically judged whether the restoration processing is appropriate or not according to a predetermined optimum sequence inherent in the apparatus, and the next processing is started automatically or semiautomatically according to the results.
Another aspect of the invention is directed to a maintenance system for a plasma processing apparatus, which is provided with a vacuum processing chamber, a vacuum evacuation section, a plasma generating gas supply section, a plasma generating section, and a specimen stage on which a wafer to be processed in the vacuum processing chamber is placed, which comprises an operation circuit for performing a sequence for a restoring operation after wet cleaning, a storage section for storing measured data, a plurality of detection sensors for collecting measured data values from the operating plasma processing apparatus, an I/O section for determining prescribed values, and a comparison/decision circuit for comparing the prescribed values with the data stored in the storage section.
According to the present invention, the complex works requiring the intervention of people are previously combined as an optimum sequence inherent in the apparatus, a check program is semiautomatically or automatically activated according to the sequence, it is judged whether each stage of the restoration processing has passed or failed (whether the processing is appropriate or not), and according to the results, the processing can be proceeded semiautomatically or automatically to the next stage and processing, so that the manpower before starting the operation can be saved or the restoration time can be shortened.

Maintenance method and system for plasma processing apparatus etching and apparatus


Systems and methods are disclosed for precisely determining the delay between data being received at the pins of a circuit and being processed by gearbox circuitry, to being processed by a time-stamp unit of the circuit. In an exemplary embodiment, the gearbox circuitry may output a data valid signal which may be monitored by the time-stamp unit. By monitoring the data valid signal, the time-stamp unit may synchronize a local state machine with the internal state of the gearbox circuitry and thus determine the total delay through the combined processing circuitry with high accuracy.

In many important network applications there is a need to synchronize clocks running at various nodes in a computer network. Such synchronization of clocks over the network is generally achieved by transmitting data packets containing timestamps to the clocks being synchronized. The IEEE 1588 protocol standardized by the Institute of Electrical and Electronic Engineers (IEEE) is one protocol that can be used to synchronize clocks over a network. The IEEE 1588 protocol is designed to measure the time taken by data packets containing timestamps to travel across a communication medium (typically the Ethernet) and the time taken to transport these data packets over intermediate nodes in the network that may have variable buffering delays. However, after these data packets containing timestamps reach the receiver of a destination node there may be additional delays between the time instance when a data packet is received at the pins of the receiver and the time instance when the processing circuitry of the receiver reads the timestamp contained in the data packet. Typical implementations of the IEEE 1588 protocol do not account for these additional delays precisely.
There may be several sources of potential delay uncertainty between the time instance when a data packet is received at the pins of the receiver and the time instance when the processing circuitry of the receiver reads the timestamp contained in the data packet. For example, receivers in 10G-baseR Ethernet networks may include a deserializer circuit, a gearbox circuit, a word-aligner circuit, and/or a first-in-first-out (FIFO) queue circuit. Each of these circuits may potentially introduce delays as a data packet traverses that circuit.
Some 10G-baseR Ethernet networks do not need to resolve the delay uncertainties discussed above. Other 10G-baseR Ethernet networks make considerable effort to timestamp data packets on the pin-side of the gearbox circuit so that the receiver's processing circuitry can determine the delay introduced by the gearbox circuit. Yet other 10G-baseR Ethernet networks mark all data packets that are potentially IEEE 1588 protocol data packets at the pin-side of the gearbox circuit, create a special deterministic latency path that eventually feeds data packets to the receiver's processing circuitry, and finally re-tie each data packet from the special path. The latter two techniques for determining the delays introduced by various receiver circuitries are invasive and sometimes incompatible with existing receiver architectures.


A tactical transport cart manually navigable over both topographic and hydrographic terrains has a frame, a payload support on the frame, a hard point of attachment or connection on the frame or the payload support, a pair of wheels or other terrain-engaging transport propulsion members attached to the frame, a handle structure attached to the frame, at least one motor connected in driving relation to the transport propulsion members, a battery for providing motive power to the motor, and a control device connected between the battery and the motor for controlling supply of motive power to the motor. The frame, transport propulsion members and handle structure are cooperatively dimensioned and configured for movement of the cart over ground surfaces of topographic terrains and for partially and fully submerged movement over water-covered surfaces of hydrographic terrains.

Utility carts of many diverse structures with varied features, capabilities and end-use applications are known. The most basic carts are in the nature of unpowered wheelbarrows, wagons or trailers of a sufficiently small size and weight to be manually pushed or pulled over paved or generally flat or level unpaved surfaces. Some such carts contemplate a structure having active positive buoyancy to float on the surface of bodies of water to allow pushing or pulling motivation through water. Other carts are motorized to supplement manual movement and guidance, but no such carts are known to be operable within or through bodies of water or other water-covered terrain.
The conditions under which military, law enforcement, fire, rescue, and other emergency personnel operate are especially diverse and demanding. They may be called upon to navigate over remote and undeveloped terrains that may be hilly, rocky, and otherwise hazardous, as well as over water-covered areas ranging from creeks, streams, swamplands, ponds, and rivers that are equally or more difficult and hazardous. Such personnel also typically must transport various types of supplies and equipment into and out of such areas, and in some cases to move wounded or injured persons who are incapable of walking or moving under their own power. None of the known carts are suitable to operate under such differing conditions, for the varied tactical uses and purposes, and over the differing possible terrains as persons in these professions must deal with.
Accordingly, a need exists for a tactical cart adapted for manual navigation over both land and water-covered terrains to transport diverse articles.

Tactical transport cart for manual navigation over both topographic and hydrographic terrains

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