A linerless label roll-up preventing device for a thermal printer that prevents roll-up of the linerless label 3 on the platen roller 13. A roll-up preventing plate 23 is applied to a slit (22) formed in the outer surface of the platen roller (13), and protrudes to form a roll-up preventing edge (29) at a portion of the roll-up prevention plate (23). A roll-up preventing plate 23 being fixed to a slit (22), formed in the radial surface of the platen roller (13), relatively to the platen roller (13), and formed with a roll-up preventing projection edge, at a portion of the roll-up preventing plate (23), projecting out slightly from the outer circumferential surface of the platen roller (13) and capable of contacting the back surface of the linerless label (3).

The present invention relates to a linerless label roll-up preventing device of a thermal printer and which particularly performs printing by loading a linerless label.
A strip-form label sheet is known which uses a linerless label to save resources. A wireless label does not use a liner (or peeling sheet) that is temporarily attached to an adhesive layer on the back surface of the label base member. Printers for such a linerless label have also been developed.
FIG. 4 is a schematic side-view of a thermal printer 1, which is an example of a conventional linerless label printer. The thermal printer 1 is, for example, configured to be portable. It has a printer housing 2, a label sheet holding and supplying unit 4 holding a linerless label sheet 3 in a roll, an internal transfer route 5, and a printing unit 6.
A belt 7 on the printer housing 2 makes the thermal printer 1 portable, to be carried for example, on the waist W of an operator.
The linerless label 3, as shown enlarged in FIG. 4a, has a strip-form label base member 8, an adhesive layer 9 formed on the back surface of the label base member 8, a lower layer thermal color forming agent layer 10 and an upper layer separating agent layer 11 formed on the surface of the label base member 8.
Therefore, if the linerless label sheet 3 is loaded in a roll form at the holding and supplying unit 4, since the separating agent layer 11 is contacting the adhesive agent layer 9, the inner layer side and the outer layer side of the roll will not adhere to each other, which enables feed out of the rolled linerless label 3 in a strip-form to the transfer route 5.
Furthermore, perforations (not shown in the diagram) at a predetermined pitch along the linerless label 3, enable cutting the printed linerless label 3 in a predetermined size.
The printing unit 6 has a thermal head 12 and an opposing platen roller 13. The printing unit 6 supplies the linerless label sheet 3 between the thermal head 12 and the platen roller 13, and transfers the linerless label sheet 3 by the rotating drive of the platen roller 13 such that it is possible to perform printing of a predetermined contents on the surface of the label base member 8.
Furthermore, the thermal head 12 is provided at the printer housing 2, and the platen roller 13 is provided rotatably at an end portion of an openable cover 15 around an opening-closing shaft 14 fixed on the printer housing 2.
The linerless label sheet 3 printed at the printing unit 6 is discharged outside of the printer housing 2 from the label outlet 16 of the printer housing 2, cut at the perforations of the label sheet, and attached to the predetermined portion.
In the thermal printer 1 having such a configuration, the parts of the transfer route 5 and the platen roller 13, etc., which contact the adhesive agent layer 9 at the back surface of the linerless label 3, are ensured of non-adhesiveness by themselves, by the use of necessary separable material or by being provided with surface preparation such that the surface has detachability (non-adhesiveness). For example, silicone rubber is used for the platen roller 13.
However, in prolonged use of the thermal printer 1 by its continuous use, the non-adhesiveness of the platen roller 13 will deteriorate, so the adhesive agent (adhesive paste) of the adhesive agent layer 9 gradually infiltrates into the platen roller 13, and furthermore, the adhesive agent adheres to the platen roller 13. Particularly as shown by the virtual line in the drawing, the printed linerless label sheet 3 is not transferring in the outlet 16 direction, but with the rotation of the platen roller 13, the printed linerless label 3 is adhering to the outer circumferential surface of the platen roller 13. This causes a problem in issuance and discharge of the linerless label 3 since the label is being rolled-up around the outer circumferential surface of the roller 13.

Linerless label roll-up preventing device of thermal printer

Kabushiki Kaisha Sato Chishiki Zaisan Kenkyusyo


The present invention provides a process for producing a polymer optical waveguide, comprising the steps of: preparing a mold comprising a concave portion; bringing a substrate into contact with the mold, filling the concave portion with a core-forming curable resin; curing the core-forming curable resin in the concave portion; removing the mold from the substrate; and forming a clad layer on the substrate; wherein the mold comprises a cured resin layer and a reinforcing member, the cured resin layer has the concave portion, the reinforcing member has an introduction portion which communicates with the concave portion and an injection inlet which communicates with the introduction portion, and a discharge portion which communicates with the concave portion is provided in the reinforcing member, the cured resin layer and/or a space between the cured resin layer and the reinforcing member, and a resin injecting device which is used in the process.

1. Field of the Invention
The present invention relates to a process for producing an optical waveguide, in particular, a flexible polymer optical waveguide, and to a resin injecting device.
2. Description of the Related Art
As a process for producing a polymer optical waveguide, the following processes are suggested: (1) a process of impregnating a film with a monomer, selectively exposing a core portion to light to change a refraction index thereof, and sticking a film thereto (selective polymerization); (2) a process of applying a core layer and a clad layer to a substrate, and forming a clad portion by reactive ion etching (RIE); (3) a process using photolithography, in which an ultraviolet ray-curable resin obtained by adding a photosensitive material to a polymer is imagewise exposed to light and developed (direct exposure); (4) an injection molding process and; (5) a process of applying a core layer and a clad layer to a substrate, and exposing a core portion to light to change a refraction index of the core portion (photo bleaching).
However, the selective polymerization process (1) has a problem with regard to the sticking of the film, and the processes (2) and (3) result in an increase in costs since photolithography is used. The process (4) has a problem with regard to precision of the resultant core diameter, and the process (5) cannot provide a sufficient refraction index difference between the core layer and the clad layer.
At present, practical processes which have superior performance include only the processes (2) and (3). However, these processes also have a problem with regard to costs as described above. Additionally, none of the processes (1) to (5) can be applied to the formation of a polymer optical waveguide on a flexible plastic substrate having a large area.
A process of filling a pattern substrate (clad) in which a pattern of grooves, which are to serve capillaries, is formed with a polymer precursor material for a core, curing the precursor material to form a core layer, and then bonding a flat substrate (clad) onto the core layer is known as a process for producing a polymer optical waveguide. However, in this process, not only the capillary grooves but also the entirety of the narrow space between the pattern substrate and the flat substrate is filled with the polymer precursor material, and, when the polymer precursor material is cured, a thin layer having the same composition as the core layer is formed between the pattern substrate and the flat substrate. Therefore, light leaks out through this thin layer.
As one method of solving this problem, David Heard suggests a method of fixing a pattern substrate in which a pattern of grooves, which are to serve as capillaries, is formed to a flat substrate with a clamping member, sealing a contacting portion between the pattern substrate and the flat substrate with a resin, and then reducing an internal pressure to fill the capillaries with a monomer (diallyl isophthalate) solution, thereby producing a polymer optical waveguide (Japanese Patent Gazette No. 3151364).
This method uses the monomer as the core forming resin material instead of using a polymer precursor material to reduce a viscosity of the filling material and fill the capillaries with the filling material using capillarity, so that no other space than the capillaries is filled with the monomer.
However, because of the use of the monomer as the core forming material in this method, a volume shrinkage ratio of the monomer is large when the monomer is polymerized. Consequently, transmission loss of the polymer optical waveguide becomes large.
This method is also a complicated method, in which the pattern substrate and the flat substrate are fixed to each other with the clamp, and the contacting portion is sealed with the resin. Thus, this method is not suitable for mass production. As a result, a reduction in costs cannot be expected. Moreover, this method cannot be applied to the production of a polymer optical waveguide using, as a clad, a film having a thickness on the order of several millimeters or a thickness of 1 mm or less.
Recently, George M. Whitesides et al. at Harvard University have suggested, as a method for forming a nanostructure and as a soft lithographic process, a method called capillary micromolding. This is a method of using photolithography to form a master substrate, making use of adhesiveness of polydimethylsiloxane (PDMS) and an easily-peelable property thereof to transfer the nanostructure of the master substrate onto a mold made of PDMS, pouring a liquid polymer into this mold by capillarity, and curing the polymer. A detailed description thereof appears in SCIENTIFIC AMERICAN September 2001 (Nikkei Science, 2001, December).
Moreover, a patent for the capillary micromolding method was granted to Kim Enoch et al. of George M. Whitesides' group at Harvard University (U.S. Pat. No. 6,355,198).
However, even if the production process described in this patent is applied to the production of a polymer optical waveguide, it takes much time to form a core portion thereof since a sectional area of the core portion of the optical waveguide is small. Thus, the process is unsuitable for mass production. This process also has a drawback in that when a monomer solution is polymerized, a volume change is caused, so that a shape of the core is also changed, and consequently transmission loss becomes large.
B. Michel et al. of IBM Zurich Laboratory suggest a lithographic technique exhibiting a high resolution by the use of PDMS, and report that this technique provides a resolution on the order of several tens of nanometers. A detailed description thereof appears in IBM J. REV. & DEV. VOL. 45 NO. 5 Sep. 2001.
As described above, the soft lithographic technique using PDMS and the capillary micromolding method are techniques which have been recently drawing attention as nanotechnologies, primarily in the U.S.A, but elsewhere as well.
However, when an optical waveguide is formed by a micromolding method as described above, reduction of the volume shrinkage ratio of a polymer (so that transmission loss is reduced) when the polymer is cured is incompatible with reduction of the viscosity of a filling liquid (the monomer and so forth) in order to attain easy filling. Accordingly, in a case where reduction of transmission loss is preferentially considered, the viscosity of the filling liquid cannot be lowered sufficiently and a filling speed becomes slow. Thus, the mass production of optical waveguides by this method cannot be expected. The micromolding method is carried out on the assumption that a glass or silicon plate is used as a substrate. Thus, use of a flexible film substrate in this method has not been considered in this method.

This patent is subject to a terminal disclaimer.

Process for producing polymer optical waveguide and resin injecting device


There is provided a melting kneading devolatilizing extruder in which the surface renewability of a molten raw material is improved.

Hitherto, melting kneading devolatilizing extruders for a resin raw material are disclosed in, for example, Patent Literature 1 and Patent Literature 2.
Patent Literature 1 discloses a configuration in which a kneading portion and a devolatilizing portion are alternately provided in a plurality of places, a vacuum state is brought about in the devolatilizing portion, and devolatilization is performed by transporting and kneading of a screw in the devolatilizing portion.
On the other hand, similarly to Patent Literature 1, Patent Literature 2 discloses an apparatus, which has a kneading flight twisted so that a raw material can be transferred to the downstream, in a devolatilization region where air-tightness is maintained in a filling portion by a raw material, and which kneads the material to separate a volatile component while the material is fed the downstream. The apparatus disclosed in Patent Literature 2 is shown in FIG. 11. The extruder has a rotatable screw 102 within a cylinder 101 including a vacuum vent 103 which sucks an inside of the cylinder into a negative pressure state. The raw material supplied into the extruder is transported to the kneading portion 104 by a screw inserted into the cylinder 101, is melted in the kneading portion 104 while a shearing force is added thereto, and is transported to the downstream. In the devolatilization region 105 which is brought into a negative pressure state as air is sucked through from the vacuum vent 103, a volatile component contained in the molten raw material is separated from the molten raw material and is removed from the extruder.
In Patent Literature 2, it is reported that the volatile component contained can be more efficiently removed by installing a screw segment 106 having surface renewability (allowing a molten raw material which is not exposed to ambient air to be exposed to ambient air when a raw material is kneaded), in the devolatilization region 105 where air-tightness is maintained, and by transporting the raw material to the downstream while kneading the raw material. A front view of the screw segment of Patent Literature 2 which has surface renewability is shown in FIG. 12(a), and a side view thereof is shown in FIG. 12(b). The screw segment 106 is composed of two rotor blade segments having a pair of kneading flights which protrude in mutually opposite directions in a radial direction, and the screw segment 106 has a lower tip portion 107 with large tip clearance with the inner wall of the cylinder and a high tip portion 108 with small tip clearance. By forming a thin film of a raw material on the inner wall of the cylinder in the lower tip portion 107, and by scraping off the thin film formed by the high tip portion 108, it is possible to repeatedly perform surface renewal to more effectively promote devolatilization.
Patent Literature 1: Japanese Patent No. 3857411
Patent Literature 2: JP-A-2006-1252

Melting kneading devolatilizing extruder

Abstract: The melting kneading devolatilizing extruder of the invention includes at least one surface renewable screw segment each including a plurality of discs that are arrayed such that a phase angle E, which is a deviation angle between the discs around an axis of a screw, is 0°<E<90° within a surface renewal region, and the surface renewable screw segment includes a void portion between the discs so that the discs are arranged at intervals in a direction of the axis of the screw.


In a digital TV broadcast signal receiver connected to a multi-directional antenna called smart antenna and receivable not only digital TV broadcast signals but also analogue TV broadcast signals, an optimum signal receiving direction of an analogue TV broadcast signal of an optional channel can be decided with reducing affect of ghost due to reflection of the TV broadcast signal by such as a high-rise building, or the like. An NTSC decoder takes a still image data from an analogue TV broadcast signal in each signal receiving direction of the multi-directional antenna, and performs an A/D conversion processing and a JPEG compression processing to the image data. A controller decides a direction, in which a complexity, such as bit rate of the image data is the smallest, as an optimum signal receiving direction of the channel.

1. Field of the Invention
The present invention relates to a digital television (TV) broadcast signal receiver that can receive not only digital television broadcast signals such as ATSC (Advanced television systems Committee), but also analogue television broadcast signals such as NTSC National Television System Committee).
2. Description of the Related Art
In the North American Continent where an ATSC digital television broadcast (it is abbreviated to a hereinafter digital TV broadcast) is performed, plains are dotted with metropolises, so that various TV broadcast signals broadcasted in the suburbs of each metropolis can be received at other cities or the halfway point of the cities. In consideration from a user who receives the TV broadcast signals, since many TV broadcast signals are transmitted in various directions, it is necessary to regulate a direction of an antenna in an orientation to a TV broadcasting station from which a program which he wants to watch is delivered. Therefore, a multi-directional antenna such as a smart antenna is put into practical use.
With respect to an apparatus for controlling a signal receiving direction of an antenna, Publication of Japanese Patent Application No. 5-232205 shows an apparatus mounted on a moving body such as a vehicle for following a communication satellite. Publication of Japanese Patent Application No. 2003-60423 shows a smart antenna used for communicating between a mobile phone and a base station.
According to the EIA-909 technical standard, it is provided that a smart antenna has sixteen signal receiving directions in respective directions where a circle is divided into sixteen. A digital TV broadcast signal receiver in compliance with the EIA-909 technical standard can switch an effective signal receiving direction of the multi-directional antenna such as the smart antenna to one of all the sixteen signal receiving directions. In addition, the digital TV broadcast signal receiver can receive conventional NTSC analogue TV broadcast signals.
There are digital TV broadcast signal receivers having an automatic scanning function for selecting a signal receiving direction of the multi-directional antenna in which a TV broadcast signal of a channel chosen by a user can be received at the best condition. In general, an antenna of a TV station, that is, a position of a TV tower is invariance. Thus, a TV broadcast signal of each channel is searched in each sixteen signal receiving direction as an initial processing of the digital TV broadcast signal receiver, and a signal receiving direction, in which the signal receiving condition is the most suitable, is set as an optimum signal receiving direction of each channel. For example, in the United States, a TV station can be established relatively easier. In contrast, a TV station suddenly becomes bankrupt. Therefore, it happens that a new channel, which cannot be received beforetime, can be received, or an old channel receivable long before cannot be received. Furthermore, a signal receiving condition of a TV broadcast signal of a channel is varied due to construction of a high-rise building. Thus, it becomes necessary to reset an optimum signal receiving direction for receiving a TV broadcast signal of a channel chosen by a user.
In general, a direction showing the largest value of the sensitivity of the TV broadcast signal among the directions in which the TV broadcast signal can be received is defined as an optimum signal receiving direction with respect to each channel. However, when a megastructure such as the high-rise building exists in the vicinity of a multi-directional antenna, a reflected TV broadcast signal reflected by the megastructure is superimposed on a TV broadcast signal directly transmitted from a TV station of a predetermined channel in a signal receiving direction of the multi-directional antenna, so that it is possible that a sensitivity of the TV broadcast signal in the signal receiving direction becomes larger than a sensitivity of a TV broadcast signal directly transmitted from the TV station. In such a case, if the direction showing the largest value of the sensitivity of the TV broadcast signal is regarded as an optimum signal receiving direction of the channel, color signals and/or horizontal synchronized signal cannot be received normally due to ghost image, since the reflected TV broadcast signal is superimposed an the TV broadcast signals directly transmitted from the TV station. Consequently, the colors of the image cannot be reproduced on a monitor screen, or image displayed on the monitor screen rolls from side to side. By the way, when the TV broadcast signal is digital signal, the digital TV broadcast signal receiver has error correction function, so that it is possible to judge the optimum signal receiving direction while error correction process. Accordingly, the above-mentioned problem relates to analogue TV broadcast signals, essentially.

Digital television broadcast signal receiver


Chip performance is measured using LSSD logic to propagate a signal through the LSSD scan path of the chip. The measurement data is compared to tabular data which is used to classify the AC chip performance. The use of the LSSD scan path provides an accurate overall measurement of an entire chip. The circuitry is internal to the system and does not require external test circuitry. No unique test patterns are required for a given chip design. The chip measurements can be made after installation of the chip in a field operational environment as well as during a manufacturing and testing environment. The chip measurements can be made by local execution of the testing or controlled from a remote location.

1. Technical Field
The present invention relates to chip performance measurement, and in particular to the use of LSSD scan path circuit delay data in comparison with a predetermined value to evaluate overall AC chip performance.
2. Background Art
The continuing increase in complexity and speed of electronic circuitry has posed numerous problems in measurement or testing of circuits to ensure that they meet minimum performance criteria. In particular, the development and use of integrated circuits of ever increasing size and complexity has posed numerous problems in the area of AC performance testing in a field operational environment. The difficulties involved in AC performance testing present additional problems in an field operational environment due to the complexity of tests, the expensive and inconvenient nature of the test equipment, and the possibility of not detecting AC defective circuits with known techniques. For purposes of this patent application, AC performance testing refers to dynamic time dependent testing, as opposed to DC stuck fault testing which is non-time dependent testing forpurposes of error isolation.
Typically, AC performance testing is performed during manufacture and test of circuitry using external test equipment. One reason why testing is not done when the circuitry is installed in a field operational environment is that the external test equipment used for AC performance testing is both expensive and inconvenient.
It is known to use the LSSD scan path to characterize LSSD logic delay. In that method, a measurement is used wherein the clocks are turned on, and a signal is flushed entirely through the scan path. For purposes of this disclosure, flushing is defined as holding the clock inputs to an LSSD latch to an active level, thereby allowing a value placed on the input to the first latch in the scan path to scan through the scan path at the switching speed of the latches. This technique allows a single pass/fail result to be achieved for a test based on a given clock speed. However, this technique is not feasible for many situations, because the scan input or output is not accessible to probing by external test equipment for measurement due to packaging considerations.
It is also known to do performance testing through the use of complicated test patterns which exercise the functional logic unique to each chip. When using complicated test patterns, the path lengths are typically short compared to the LSSD scan path. This results in measurements which require very precise test equipment for accuracy which causes high cost to obtain the measurement data. Further, such prior attempts at testing have only been able to test on a pass/fail basis for a given clock speed.
Another prior art approach at pass/fail testing is to use clock shifting to allow testing with less expensive testers. However, the same problems of inability to detect marginal circuits due to the pass/fail nature of the test, and the expense and inconvenience of using external testers in the field apply to this method, just as they did to the methods discussed previously.
In summary of the problems associated with the prior art, typically, AC performance measurement is performed in a manufacturing or test environment and not in a field operational environment. A factor that limits the use of AC chip performance measurements in the field is that the measurements generally require precise and expensive external test equipment. Transporting such equipment around in the field is a highly undesirable practice. After circuits leave the manufacturing and test environment, AC defective circuits are difficult to detect in the field operational environment.
Further, AC chip performance testing often requires detailed knowledge of the underlying chip design in order to generate elaborate test data patterns to exercise the functional logic of each chip design to obtain a measurement. Test data patterns are expensive to generate because they must be individually created for each particular circuit design. In addition, AC performance testing is done on a pass/fail basis for a given clock speed.

Calculating AC chip performance using the LSSD scan path

International Business Machines Corporation


A method for controlling powering of a mobile platform 201 comprising a first Finite State Machine (FSM) 202 and a second FSM 203. The method comprises synchronizing the first FSM with the second FSM, wherein the first FSM is arranged on a first Integrated Circuit (IC) 207 comprised in the mobile platform and configured to control a first Power Management Unit (PMU) 205 arranged on the first IC, and wherein the second FSM is arranged on a second IC 208 comprised in the mobile platform and configured to control a second PMU 206 arranged on the second IC, whereby the first PMU and the second PMU are synchronized to operate simultaneously during rank-up and rank-down, thereby providing power control of the mobile platform.

Modern mobile platforms have constantly increasing power demands. Platforms will require more power supplies, i.e. regulators, to supply different functions in the platform. Granularity in power supply usage is required to optimize efficiency, as load currents may be high. Thus supply voltage should preferably be optimised in order to avoid any efficiency loss. Eventually, more and more regulators are required to achieve good battery life time for future mobile electronic products. Often regulators are Switched Mode Power Supplies (SMPS) which achieves good efficiency. If all power supplies in a platform are concentrated to a single Integrated Circuit (IC), location of the SMPS on the Printed Circuit Board (PCB) might be non-optimum versus the load location. Further, thermal heating might become too excessive for one IC to sustain. Thus, a solution is to add more and more regulator ICs, i.e. more and more ICs that each comprises one or more regulators such as one or more SMPS, to the mobile platform. However, with many regulator ICs it becomes more complex to control all the regulators, especially taking into account that regulators are typically controlled and enabled during boot up sequence when platform Soft Ware (SW) is not yet in charge of the regulator control. Further, it is important that regulators are enabled and disabled in certain specific orders. Start-up order is important in order to guarantee platform functionality but also to avoid all SMPS to activate simultaneously with excessive momentary battery currents as a result.
Even if two similar regulator ICs would be enabled exactly at the same time point, they could enable their one or more regulators at different times because the time base in each regulator IC varies. The reason for that is typically that, due to cost reasons, low precision oscillators are used in the regulator ICs in order to take care of the time base. In a mobile platform this could lead to a misaligned rank sequence and cause malfunctioning of the mobile platform.
In case a plurality of ICs is present in the mobile platform, one of the ICs is normally defined to be a master circuit, while the other circuits are defined to be slave circuits. The master circuit controls the power-up and power-down of the entire system. This may be realized with an enable signal which is controlled by the master circuit and which can be detected by the slave circuits. Whenever the enable signal becomes active, the slave circuits cause the associated functional components to be powered up, and whenever the enable signal becomes inactive, the slave circuits cause the associated functional components to be powered down.
U.S. Pat. No. 7,395,440 B2 relates to an electronic device comprising at least two power management circuits and a signal line connecting the circuits. Each of the circuits is adapted to control a power supply to at least one functional component of the electronic device. Each of the circuits is adapted to detect a condition which requires powering down functional components of said electronic device and to set the signal line to a predetermined state, in case the circuit detects a condition which requires a powering down of the electronic device. Further, each of the circuits is adapted to monitor a state of the signal line and to power down all functional components associated to it upon detection of the predetermined state of the signal line.
US 2004/0227404 A1 discloses that power supplies, supplied with an input voltage to produce output voltages, are controlled in a desired sequence, and their output voltages are monitored, by respective state machines of two or more control units which are coupled in cascade by a bidirectional path on which commands and acknowledgements are coupled serially in frames.
A drawback with the prior art is that they don't provide simultaneous power control of a plurality of power units.


A method and an apparatus for reducing process non-uniformity across a processed semiconductor wafers. A first semiconductor wafer is processed. A process non-uniformity associated with the first processed semiconductor wafer is identified. A feedback correction in response to the process non-uniformity during processing of a second semiconductor wafer is performed and/or a feed-forward compensation is performed in response to the process non-uniformity during a subsequent process performed across the first semiconductor wafer is performed.

1. Field of the Invention
This invention relates generally to semiconductor manufacturing, and, more particularly, to a method and apparatus for reducing non-uniformity across a processed semiconductor wafer using a dynamic process adjustment in a tool.
2. Description of the Related Art
The technology explosion in the manufacturing industry has resulted in many new and innovative manufacturing processes. Today""s manufacturing processes, particularly semiconductor manufacturing processes, call for a large number of important steps. These process steps are usually vital, and therefore, require a number of inputs that are generally fine-tuned to maintain proper manufacturing control.
The manufacture of semiconductor devices requires a number of discrete process steps to create a packaged semiconductor device from raw semiconductor material. The various processes, from the initial growth of the semiconductor material, the slicing of the semiconductor crystal into individual wafers, the fabrication stages (etching, doping, ion implanting, or the like), to the packaging and final testing of the completed device, are so different from one another and specialized that the processes may be performed in different manufacturing locations that contain different control schemes.
Generally, a set of processing steps is performed across a group of semiconductor wafers, sometimes referred to as a lot. For example, a process layer composed of a variety of materials may be formed across a semiconductor wafer. Thereafter, a patterned layer of photoresist may be formed across the process layer using known photolithography techniques. Typically, an etch process is then performed across the process layer using the patterned layer of photoresist as a mask. This etching process results in the formation of various features or objects in the process layer. Such features may be used for a gate electrode structure for transistors. Many times, trench isolation structures are also formed across the substrate of the semiconductor wafer to isolate electrical areas across a semiconductor wafer. One example of an isolation structure that can be used is a shallow trench isolation (STI) structure. Typically, forming trenches across the semiconductor wafer and filling such trenches with an insulating material, such as silicon dioxide, form STI structures across the semiconductor wafers.
The manufacturing tools within a semiconductor manufacturing facility typically communicate with a manufacturing framework or a network of processing modules. Each manufacturing tool is generally connected to an equipment interface. The equipment interface is connected to a machine interface to which a manufacturing network is connected, thereby facilitating communications between the manufacturing tool and the manufacturing framework. The machine interface can generally be part of an advanced process control (APC) system. The APC system initiates a control script, which can be a software program that automatically retrieves the data needed to execute a manufacturing process.
FIG. 1 illustrates a typical semiconductor wafer 105. The semiconductor wafer 105 typically includes a plurality of individual semiconductor die 103 arranged in a grid 150. Using known photolithography processes and equipment, a patterned layer of photoresist may be formed across one or more process layers that are to be patterned. As part of the photolithography process, an exposure process is typically performed by a stepper on approximately one to four die 103 locations at a time, depending on the specific photomask employed. The patterned photoresist layer can be used as a mask during etching processes, wet or dry, performed across the underlying layer or layers of material, e.g., a layer of polysilicon, metal or insulating material, to transfer the desired pattern to the underlying layer. The patterned layer of photoresist is comprised of a plurality of features, e.g., line-type features or opening-type features that are to be replicated in an underlying process layer.
Turning now to FIG. 2, a flow chart illustration of a prior art process flow is illustrated. A manufacturing system processes a lot/batch of semiconductor wafers 105 (block 210). The manufacturing system then generally acquires metrology data relating to the processed semiconductor wafers 105 (block 220). The manufacturing system may also acquire sensor data, such as pressure sensor data, temperature sensor data, humidity sensor data, gas flow rate sensor data, and the like. Generally, the manufacturing system then analyzes the metrology data and/or the sensor data to determine whether there are appreciable errors across the processed semiconductor wafers 105 (block 230).
The manufacturing system may then perform feedback and/or feed-forward corrections on processes performed across the semiconductor wafers 105 based upon the analysis of the metrology/sensor data (block 240). One of the problems associated with the current processing system is the production of non-uniformly processed semiconductor wafers, which may be due to processes performed across the semiconductor wafers 105 (hereinafter referred to as xe2x80x9cprocess non-uniformityxe2x80x9d). In other words, results from processing may not be uniform across the entire semiconductor wafer 105, which is a condition that may not be detected by simply analyzing the metrology/sensor data as described above. For example, a chemical mechanical polishing (CMP) tool may polish the center of a semiconductor wafer 105 at a different speed than the outer portion of a semiconductor wafer 105. This may result in non-uniform polishing across the processed semiconductor wafer 105. In other cases, a gradient effect may occur across a semiconductor wafer 105, wherein one portion of the semiconductor wafer 105 may be processed differently from another portion. For example, during an etch process, the left half of a semiconductor wafer 105 may be etched at a faster rate than the right half of the semiconductor wafer 105, resulting in non-uniform etching across the semiconductor wafer 105.
Non-uniformity across processed semiconductor wafers 105 may result in improper correction of errors detected across the processed semiconductor wafer 105. Furthermore, devices produced from the processed semiconductor wafer 105 may be of varying qualities, wherein devices produced from the inner portion of the semiconductor wafers 105 may be of inferior quality as compared to devices produced from the outer sections of a processed semiconductor wafer 105, or vice versa. Additionally, performance of devices manufactured from one portion of the non-uniform semiconductor wafers 105 may significantly vary from the performance of devices manufactured from another portion of the semiconductor wafers 105. Furthermore, prediction of yield and/or other manufacturing planning may be adversely affected due to non-uniform areas that may exist across the processed semiconductor wafers 105.
The present invention is directed to overcoming, or at least reducing, the effects of, one or more of the problems set forth above.
In one aspect of the present invention, a method is provided for reducing process non-uniformity across a processed semiconductor wafers. A first semiconductor wafer is processed. A process non-uniformity associated with the first processed semiconductor wafer is identified. A feedback correction in response to the process non-uniformity during processing of a second semiconductor wafer is performed and/or a feed-forward compensation is performed in response to the process non-uniformity during a subsequent process performed across the first semiconductor wafer is performed.
In another aspect of the present invention, a system is provided for reducing process non-uniformity across a processed semiconductor wafers. The system of the present invention comprises: a process controller adapted to control processing of a first processed semiconductor wafer; a uniformity detection unit operatively coupled to the process controller, the uniformity detection unit being adapted to determine an area of non-uniformity across the first processed semiconductor wafer; and a feedback non-uniformity correction unit operatively coupled to the uniformity detection unit and to the process controller, the feedback non-uniformity correction unit being adapted to modify a process variable relating to the area of process non-uniformity during processing of a second semiconductor wafer.
In yet another aspect of the present invention, a computer readable program storage device encoded with instructions is provided for reducing process non-uniformity across semiconductor wafers. The computer readable program storage device encoded with instructions when executed by a computer: processes a first semiconductor wafer; identifies a process non-uniformity associated with the first processed semiconductor wafer; and performs a feedback correction in response to the process non-uniformity during processing of a second semiconductor wafer, and/or a feed-forward compensation in response to the process non-uniformity during a subsequent process performed across the first processed semiconductor wafer.

Dynamic process state adjustment of a processing tool to reduce non-uniformity


The present invention provides an optoelectronic module and an imaging apparatus such as an endoscope comprising such module. The optoelectronic module includes a housing and an image sensor. The image sensor's face has a perimeter S, the cross section of the optoelectronic module along the face has a perimeter H, and S<H<1.6S. In an example, illumination components such as a flashing LED and the image sensor are confined within the minimum bounding circle of the sensor's face. The invention exhibits technical advantage in minimizing the size of the insert portion of the endoscopy.

Endoscopes of small size are desired in many industrial and medical applications. For example, when natural orifices and lumens of a human body are small, small endoscopes are required for insertion through such orifices and lumens to target locations within the body. For single incision laparoscopy, smaller endoscopes are preferred to provide an inside-the-body view of the surgical site, particularly when the incision itself is of minimal dimensions. Sometimes, patients may feel irritating when an endoscope is being inserted into his or her body, and a smaller endoscope may mitigate such unpleasant experience and may minimize trauma to the patient. Moreover, a physician may improve diagnostic and procedural protocols with a smaller endoscope. For example, transnasal endoscopy may sometimes replace trans-oral endoscopy.
To meet the small-size requirement, an apparent solution is to decrease the size of each individual component within the endoscope, for example, using a smaller size camera or a smaller size fiber bundle. However, there are limits to how much reduction can be achieved, and each size reduction has its cost in terms of performance and assembly complexity. Advantageously, the present invention provides a new solution to solve the problems.

Optoelectronic module and an imaging apparatus comprising the same

Ningbo WISE OptoMech Technology Corporation


A selecting circuit having minimal signal distortion caused by non-linearity of semiconductor switching elements includes a plurality of circuit groups each comprising an input terminal (INa); serially connected resistors (R1a, R2a) having a first end connected to the input terminal; a semiconductor switching element (SW1a) having a first end connected to a node between the resistors; and semiconductor switching elements (SW2a, SW3a) having first ends connected to a second end of the resistors (R1a, R2a). The circuit further includes an operational amplifier (OP) having an inverting input terminal to which second ends of semiconductor switching elements (SW1a, SW1b, . . . , SW1n) in respective ones of the circuit groups are connected in common, and an output terminal to which second ends of semiconductor switching elements (SW2a, S2b, . . . , SW2n) in respective ones of the circuit groups are connected in common; and an output terminal (OUT) to which second ends of semiconductor switching elements (SW3a, SW3b, . . . , SW3n) in respective ones of the circuit groups are connected in common.

Signal processing in audio equipment often includes converting all of a plurality of different sound sources to analog signals, selecting one analog signal from the plurality of analog signals by a selecting circuit, converting the analog signal to a digital signal by an analog-to-digital (A/D) conversion and then applying audio processing by a DSP (Digital Signal Processor), etc. For example, Patent Document 1 describes a selector circuit that eliminates the need for analog switches, etc., that block output signals from playback units. In accordance with this selector circuit, a plurality of playback units receive a control signal and only a control unit that has been selected based upon the control signal is placed in the operating state; control units other than that placed in the operating state are made inoperative. Outputs from the playback units are supplied to and added by an adder circuit comprising an operational amplifier. In this case, only the playback units that have been placed in the operating state produce outputs; a playback unit that has been rendered inoperative does not produce an output. All outputs from playback units that have been placed in the operating state flow into the adder circuit. Accordingly, even if the output resistance of a playback unit rendered inoperative is low, the output from an operative playback unit will not be drawn into an inoperative playback unit. As a result, the output from a playback unit rendered operative will not be interfered with by a playback unit that has been rendered inoperative. This makes analog switches unnecessary.
The selector circuit described in Patent Document 1 operates so as to render an unused playback unit inoperative and add output signals from all playback units using an adder circuit. Consequently, it is required that the circuit operate in such a manner that each playback unit be rendered operative or inoperative. The result is a complicated circuit arrangement. Further, since an output signal from a playback unit that has been rendered inoperative is input to the adder circuit, there is the danger that noise from an inoperative playback unit will mix in.
Patent Document 2 discloses an integrating analog multiplexer that includes a plurality of multiplexer inputs, a multiplexer output, a switch device and a differential amplifier having an inverting input, a non-inverting input and an output. In this multiplexer the amplifier output forms the multiplexer output, the differential amplifier is connected as an inverting amplifier by a feedback path from the amplifier output to the inverting input, and the switch device selectively connects any one of the plurality of multiplexer inputs to the inverting input.
Patent Document 3 provides a space-saving and cost-effective on-chip solution for an audio output device and discloses a circuit that makes it possible to superimpose various audio input signals such as voice, music and a call signal. This circuit includes two or more audio input channels, a switch arrangement for driving different input audio signals, an arrangement of resistors for each of audio signal input lines, and an inverting voltage amplifier having inputs and an output and serving as an output stage for controlling superimposed audio signals. The input is coupled to a reference voltage and the audio signals are superimposed by an activated switch or switches. The output can be used in order to activate a loudspeaker. This circuit further includes input resistors for the voltage amplifier and means for setting the gain of the amplifier of the output stage.
As related art, Patent Document 4 discloses a gain control circuit capable of inputting a signal that has exceeded power-supply voltage and of changing the set range of gain. The gain control circuit is a circuit that operates as a simple power supply and has an amplifier so adapted that gain can be varied. The circuit has a plurality of input terminals to each of which is connected one end of a respective one of a plurality of resistance elements having weighted resistance values. The other ends of the plurality of resistance elements are tied together and the common connection node is connected to the input side of a variable resistance circuit for varying gain. It is possible to input a signal to all or some of the plurality of input terminals.    Patent Document 1: JP Patent Kokai Publication No. JP-A-8-79032    Patent Document 2: JP Patent Kokai Publication No. JP-P2003-198345A    Patent Document 3: JP Patent Kokai Publication No. JP-P2004-7590A    Patent Document 4: JP Patent Kokai Publication No. JP-P2003-229736A


This disclosure relates to a method, article of manufacture, and apparatus for automated time-based testing of a distributed system. In some embodiments, this includes setting a backup schedule for a backup of data on a client using a server scheduler on a server, setting a recover schedule using a client scheduler on the client, wherein the client includes a data simulation for generating the data and a repository, wherein the repository includes attributes of the data and a metadata of the backup, starting the data simulation on the client, according to the backup schedule, from the server, triggering a set of backup scripts to perform the backup of the data generated by the data simulation, and according to the recover schedule, triggering a set of recover scripts to perform a recover of the data on the client.

Traditional testing methods often involve creating inputs to a system and verifying the outputs against the expected correct response. To date, inputs have been supplied and outputs have been verified either by manual or automated test execution. Manual execution is time and labor intensive. Thus, automation is important to achieve economical test coverage.
Automation using scripts enables simulating manual activities with no or minimal human intervention. However, in a system where a set of inputs depend on the timing and status of a set of outputs, simple scripts may be inadequate. For example, multiple features of a product may need to be tested consecutively. The execution of a first feature may depend on the completion of a second feature. When consecutive testing of such features is performed in order to determine the load and reliability of the product, simple scripts may not be able to detect the status change of each feature test execution and analyze the outputs in time. Thus, monitoring the progress and validating the outputs may present a challenge. This challenge may be particularly acute in a distributed system, where different features of a product may be deployed across multiple hosts. In order to thoroughly test the product, the start and end of different test scripts may require careful planning and coordination.
There is a need, therefore, for an improved automated time-based testing method for distributed systems.

Automated time-based testing method for distributed system


In one embodiment, in accordance with the present invention, a method, computer program product, and system for managing and redistributing unused bandwidth between devices connected to a mobile telecommunications network is provided. One or more computer processors determine a predicted amount of data to be used by a mobile device. The one or more computer processors determine a surplus of allocated data based on whether the predicted amount of data is less than an allocated amount of data. The one or more computer processors, upon determining that there is a surplus of allocated data, move the surplus of allocated data to a data pool to be used by one or more additional mobile devices.

The present invention relates generally to the field of mobile telecommunications networks, and more particularly to managing and redistributing unused bandwidth between devices connected to a mobile telecommunications network.
Smart devices (e.g., mobile phones, tablets and laptop computers) have become popular in recent years. Applications on smart devices typically require an internet connection to operate, whether it's a video streaming application or social media application. Two common methods of connecting a device to the internet are via a Wi-Fi connection (e.g., in a home or hotspots provided by a service provider or business owner), and via a mobile data plan (e.g., a service provided by telecommunication companies that provide internet service). Currently, it is common that a user buys a data plan which can be shared among multiple users.

Managing bandwidth in mobile telecommunications networks

International Business Machines Corporation


A fuel injection valve having a nozzle body can be inserted into a receiving bore of a cylinder head of an internal combustion engine for direct injection of fuel into the combustion chamber of the internal combustion engine. A metal ring arranged on the nozzle body is deformed when heated, producing a radial pressure of the fuel injection valve in the receiving bore only when heated after the fuel injection valve has been inserted into the receiving bore.

Such fuel injection valves are described in German Patent No. 30 00 061 and British Patent No. 759 524. German Patent No. 30 00 061 describes the use of a heat shield sleeve on the nozzle body of the fuel injection valve. A flange of the heat shield sleeve is inserted into an inside groove in the fuel injection valve and sealed by a sealing ring with respect to the receiving bore of the cylinder head. On the spray side, the heat shield sleeve has a ring-shaped collar that is bent inward, with an elastic heat shield ring supported on the collar. The heat shield ring is arranged between the spray end of the nozzle body of the fuel injection valve and the ring-shaped collar of the heat shield sleeve that is bent inward.
With the fuel injection nozzle described in British Patent No. 759 524, a flexible heat shield element inserted between an end face of the nozzle body and a collar of a clamping nut is designed as a disk-shaped heat shield ring made of a thermal insulation material. To protect the inside of the heat shield ring, which is not covered by the collar or the nozzle body, from attack by combustion gases, the inside is bordered by a U-shaped ring of thin sheet metal.
A disadvantage of these conventional fuel injection valves is that the thermal coupling between the nozzle body and the cylinder head is not entirely satisfactory because the radial pressure is limited due to the maximum allowed assembly forces. Therefore, there is the risk of overheating the nozzle body and coking during operation of the internal combustion engine.


A Multi-Chip Module (MCM) package includes a substrate having a plurality of metal terminals and at least a first die attach area. An encapsulant is around the substrate including on at least a portion of the topside and at least a portion of the bottomside of the package. At least a first device including at least two device terminals is attached face up on the first die attach area. At least a second device including at least two device terminals is flip-chip attached and stacked on the first device. At least one of the first device and second device include a transistor. At least one metal clip is between the first device and second device including a plurality of clip portions isolated from one another connecting at least one device terminal of each of the first device and second device to respective metal terminals of the plurality of metal terminals.

Demand for semiconductor devices for lower-cost, higher performance, increased miniaturization and greater packaging densities have lead to MCM structures. MCM structures include two or more die and optionally other semiconductor components mounted within a single semiconductor package. The number of dies and other components can be mounted in a vertical manner, a lateral manner, or a combination of a vertical and lateral manner.
One arrangement of first and second power MOSFETs (hereafter a "power FET") is implemented as stacked lateral power FETs. Stacked lateral power FETs are conventionally assembled by placing one leadframe matrix subassembly having one power FET soldered thereto on top of another leadframe matrix subassembly having another power FET soldered thereto. Challenges in such assembly include reducing the movement between the two subassemblies prior to reflowing the solder and insuring flatness between the two subassemblies to provide good interconnection all at once during solder reflow.

Multi-chip module including stacked power devices with metal clip


To achieve, by a simple circuit configuration, a DRAM that permits refresh current to be effectively reduced by selectively setting refresh cycles. A memory cell array is divided into 64 subarrays, and each subarray is further divided into 8 blocks. A refresh cycle control circuit has a fuse circuit for setting a frequency dividing ratio of 1 or 1/2, a frequency divider that divides the frequency of a predecode signal by the set frequency dividing ratio, fuse circuits for setting a frequency dividing ratio of 1 or 1/4, and frequency dividers for dividing predecode signals by the set frequency dividing ratio. The refresh cycle control circuit is capable of setting a 64-ms or 128-ms refresh cycle for the 64 subarrays and a 64-ms or 256-ms refresh cycle for 512 blocks.

Reducing power dissipation of integrated circuits in battery-driven equipment, such as a cellular telephone or a personal digital assistant (PDA), is a significant challenge. Previously, static random access memories (SRAMs) have been used extensively in semiconductor memory applications, because a SRAM memory cell typically has six complementary metal oxide semiconductor (CMOS) transistors and allows data to be retained with a minimal amount of current drain. In terms of area, however, the SRAM memory cell, is larger than a DRAM memory cell by a factor of twenty or more. In addition, memory capacities are increasing proportionately with circuit and wiring densities. As such, fabricating a 32-Mbit or 64-Mbit SRAM using current wiring technology of about 0.2 μm to about 0.13 μm inevitably results in an excessively large chip. Consequently, from the viewpoint of area efficiency, SRAMs are inferior to DRAMs, and the disadvantage of poor area efficiency ultimately inhibits continued process technology scaling. For this reason, in many applications SRAMs are being replaced by DRAMs.
The DRAMs, however, require stored data to be refreshed, resulting in a considerably larger standby current than for SRAM arrays. To successfully replace SRAMs consuming less power with space-saving DRAMs, a trade-off is made between array density and stand-by power dissipation.
To solve the problem described above, a multi-chip package that combines a large-capacity DRAM and a small-capacity SRAM has been provided. The SRAM serves to back up the DRAM, and only the data that has to be retained among the data in the DRAM is stored in the SRAM. Even this product, however, has not achieved satisfactory reduction in power consumption.
According to a typical standard of DRAMs, a specified data retention rate is 64 ms. A memory controller is required to refresh each memory cell in a cycle bounded by the specified data retention rate. DRAM manufacturers conduct a "retention test" with sufficient margins to satisfy the aforementioned requirement and ship the products passing the test. The total number of memory cells exhibiting a retention rate with an extremely small margin is rather small compared to the number of cells in the array. Furthermore, memory cells having such short data retention rates usually exhibit one or more defects and are replaced by redundant memory cells and not actually used. Hence, the number of the memory cells with short data retention rates that are actually used is extremely small, as compared with the overall number of memory cells in the DRAM array under test.
Actual measurements of data retention time show that most DRAMs of any manufacturers exhibit long retention that easily exceeds the range of several seconds even at 85° C. For the retention test, an allowance is added to 64 ms to provide a reference value of, for example, 100 ms. For a given array, only a few dozen memory cells are incapable of exceeding the reference value. Typical distributions of data retention rates indicates that about 99% of the memory cells have data retention rates exceeding one second and an extremely small number of memory cells are distributed at the bottom where the data retention time is relatively short.
In a conventional DRAM, all memory cells are refreshed at the same interval, e.g., 64 ms, according to the standard, which ensures the shortest data retention rate of all memory cells is used for the refresh cycle. The study of the capability distribution of data retention rates described above reveals that the majority of memory cells are refreshed more frequently than necessary, wasting a considerable amount of power. Ideally, therefore, individual memory cells should be refreshed at intervals suited to the data retention rate capability of each memory cell. Thus, only a few dozen memory cells in a given array need refreshing at the shortest intervals of 64 ms, while the remaining majority of memory cells may be refreshed at intervals that are far longer, allowing considerable power to be saved. However, setting a refresh cycle based on the capability value of each memory cell would require a circuit of an enormous scale and complexity, rendering such a solution infeasible.
To solve the problem described above, an invention has been proposed in which memory cells are divided into groups and an optimum refresh cycle is set for each group. For instance, Japanese Unexamined Patent Application Publication No. 4-34794 discloses an invention in which an optimum refresh cycle is set for each word line. This invention, however, requires a circuit of an enormous scale and complexity to set different refresh cycles for numerous word lines. Japanese Unexamined Patent Application Publication No. 5-109268 discloses an invention in which an optimum refresh cycle is set for each subarray. Japanese Unexamined Patent Application Publication No. 5-266657 shown below has disclosed an invention in which an optimum refresh cycle is set for each memory cell array. In these inventions, however, the number of arrays is small, so that a satisfactory result cannot be obtained if memory cells having comparably short values of data retention rate are scattered among all arrays.


A manufacturing apparatus including a first capsule containing a predetermined amount of a first formulation, and a second capsule containing a predetermined amount of a second formulation, the first and second capsules being distinct from each other; a receiving device configured to receive the first and second capsules; and a mixing machine configured to receive the receiving device equipped with the first and second capsules, and to mix the first and second formulations contained in the first and second capsules so as to obtain the cosmetic product.

FR3026622 discloses an apparatus for manufacturing a cosmetic product, including:                a first capsule containing a predetermined amount of a first formulation,        a second capsule containing a predetermined amount of a second formulation,        a mixing machine configured to receive the first and second capsules, and to mix the first and second formulations contained in the first and second capsules so as to obtain the cosmetic product.
Such a manufacturing apparatus enables an easy manufacture, by an end consumer, of a customized cosmetic product from different capsules.
However, the mixing machine described in FR3026622 has a structure whose simplicity and ease of use may be further improved.

Apparatus for mixing formulations to produce a personalized cosmetic product


A signal testing system of a handheld device is described in the present invention. The signal testing system comprises a testing apparatus and a computer device. The testing apparatus is connected with the handheld device. The computer device is connected with the handheld device and the testing apparatus, and is configured to control the handheld device accessing a signal testing state and receives a power value corresponding to the signal testing state through the testing apparatus.

Attending with the progress of technology, the smart phone have become a major product of the telecommunication industry. It is demanded to have the smart phone supporting the various code division multiple access (CDMA) standards globally. To fulfill the need, the smart phone usually covers all the CDMA frequency bands and the corresponded second path to enhance signal receiving ability.
Generally, the CDMA frequency bands include the 820˜900 MHz cellular band, the 1850˜1990 MHz PCB band, the 1710˜1755 MHz AWS-U band, and the 2110˜2155 MHz AWS-D band. In considering the frequency bands and the corresponded second path, various signal testing items need to be completed when manufacturing the cell phones.
The testing method in present needs the tester to operate the testing equipment manually to complete the signal emitting/receiving test of cell phone under signaling mode. Because the testing is manually operated, there exist the problems of time consuming and bad testing efficiency.

Signal testing system of a handheld device and a signal testing method thereof

INVENTEC APPLIANCES (PUDONG) CORPORATION

INVENTEC APPLIANCES (JIANGNING) CORPORATION


The present invention relates to a transparent film for flooring comprises a polyvinyl chloride resin and a polymethyl methacrylate (PMMA) resin.

In general, flooring includes a sheet, a papered floor, a tile, etc., used mainly for finishing floors of buildings such as a building, a house, etc., provides a hygienic space by blocking dust and cold air from a cement floor, and has various patterns printed thereon, and thus, it is possible to exhibit decorative effects such as changing an indoor atmosphere according to customer's taste, etc.
Generally, when the flooring has a print layer and a transparent film layer formed thereon, there are many cases in which total volatile organic compounds (hereinafter referred to as "TVOCs") are released above the reference value. In particular, in a universally used PVC tile, an emission amount of TVOCs is much higher than 0.10 mg/m2·h regarding the provisions of environmentally friendly building materials. Accordingly, an interest in environmentally friendly flooring in which the emission amount of TVOCs is reduced has increased day by day.
The flooring is required to have a predetermined level of mechanical strength so as to be widely used in residential or commercial use, and also is required to have hardness on a surface of a product so that scratches, etc., do not occur by daily use. Therefore, abrasion performance of the transparent film layer applied to the flooring is directly related to a lifespan of the product. There is a limitation in complementing the strength of the flooring only by adjusting a thickness of the transparent film layer.

Transparent film for flooring and flooring comprising same


An apparatus, system, and method are disclosed for controlling an electronic display. An activity module receives a brightness restore signal and sets a brightness level of an electronic display to a default brightness level in response to the brightness restore signal. A brightness decay module dims the brightness level of the electronic display from the default brightness level to an intermediate brightness level at a first dimming rate. The intermediate brightness level is selected from one or more intermediate brightness levels. A plateau module maintains the brightness level of the electronic display at the intermediate brightness level for a predefined period of time. A minimum brightness module dims the brightness level of the electronic display from an intermediate brightness level to a minimum brightness level at a second dimming rate.

1. Field of the Invention
This invention relates to electronic displays and more particularly relates to controlling a brightness level of an electronic display.
2. Description of the Related Art
Electronic displays are becoming increasingly ubiquitous. Electronic displays are used in computer systems, televisions, gas station pumps, advertisements, cash registers, toys, vehicles, telephones, handhelds, and in countless other devices. An electronic display, however, uses a large portion of the total power consumed by a device. This increases the cost of powering a device, and decreases the battery life of portable devices.
Additionally, many electronic displays have finite lifetimes, after which a display may exhibit decreased usability or be unusable. Often, an electronic display's backlight uses the majority of the power consumed by the electronic display. The backlight may also be the component that determines the lifetime of an electronic display, fading with use. In some environments, such as retail environments, electronic displays are in nearly continuous use throughout the day, and sometimes around the clock. This constant use wears out electronic displays, and consumes large amounts of power. Users also routinely set the brightness level of an electronic display to the maximum level. The higher the brightness level of an electronic display, the more power that the display consumes, and the shorter the operating life of the display.
While electronic displays sometimes have user configurable display settings, many companies have large numbers of electronic displays. For example, a company may have a computer monitor for each employee, a retail chain may have several cash registers in each store, and a gas station chain may have a display at each pump. The aggregate power consumption costs of these electronic displays can be large, and there is currently no easy way to propagate uniform display settings across multiple electronic displays.

Apparatus, system, and method for controlling an electronic display


A multiple frequency band planar antenna formed on one-side surface of a circuit board comprises: a first antenna pattern, a second antenna pattern, a third antenna pattern and a fourth antenna pattern, each antenna pattern further comprising an elongated portion and a conductor portion; wherein the second elongated portion at a point between its two ends is short-circuited to a feeding transmission line formed on another-side surface of the circuit board through a via. Thus, the multiple frequency band planar antenna can operate at three frequency bands with their central frequencies at 2.4 GHz, 3.5 GHz and 5.8 GHz, respectively, suitable for both WIFi LAN and WiMAX MAN applications.

1. Field of the Invention
The present invention generally relates to a planar antenna, and more particularly, to a multiple frequency band planar antenna.
2. Description of Related Art
As the wireless internet access technology continues to evolve, users are able to access the internet at a higher speed at a fixed place where an internet station is located, such as, a train station, a university, etc., within a wireless local area network (WLAN). As a result, the wireless notebook has become a mainstream product in the notebook market because it allows users to freely access the internet, compared with the traditional notebook with wire internet access. Recently, a WiFi wireless Local Area Network (LAN) has been developed, which operates at about 2.4 GHz and ˜5 GHz (this frequency is referred to as a communication carrier frequency modulated by data signals with any modulation technology, such as an orthogonal frequency division multiplex (OFDM) technology). However, the wireless WiFi LAN technology has some drawbacks which limit its usage to only the neighbourhood of the aforementioned fixed place. These drawbacks include, for example, a low capacity and a short communication range (about several hundred meters) for wireless communication carriers, which limits the users to access the internet to a limited range away from the Internet station. Currently, a wireless WiMAX communication technology (i.e. IEEE 820.16 standard) has been developed to overcome the drawbacks of the wireless WiFi LAN technology; that is, WiMAX allows wireless communication carriers to have a higher capacity and a longer communication range without a significant attenuation so as to make it feasible to access the Internet at any place in a metropolitan area in which a WiMAX metropolitan area network (MAN) is constructed. Moreover, currently, the wireless internet-access technology employs several frequency bands with their operating frequencies at 2.4 GHz, 3.5 GHz, 5.15˜5.35 GHz and 5.8 GHz, respectively. Among these frequencies, 2.4 GHz, 5.25 GHz and 5.8 GHz are applied in the WiFi LAN while 2.3˜2.5 GHz, 3.5 GHz, 5.15˜5.35 GHz and 5.8 GHz are applied in the WiMAX MAN. Accordingly, in response to the need for both WiFi LAN and WiMAX MAN applications, a planar antenna with its operating frequencies at least including 2.4 GHz and 5.15˜5.35 GHz can be a suitable one. This broad-band antenna is referred to as a multiple frequency broad-band antenna.
Furthermore, a planar antenna is widely employed in the wireless communication technology because it is easily integrated with a printed circuit board (PCB), which, for example, is a glass-epoxy or Teflon-glass circuit board, so as to achieve compactness and low cost. For example, U.S. Pat. No. 6,535,167 B2 disclosed a laminate pattern antenna capable of operating at a wider frequency band. The laminate pattern antenna comprises an inverted-F-shaped antenna pattern formed as a driven element on the obverse-side surface of a PCB, and an inverted-L-shaped antenna pattern formed as a passive element on the reverse-side surface of the PCB. By virtue of setting a path length of the inverted-F-shaped antenna pattern to a specific value, this antenna makes the low-frequency side of its usable frequency range shift to the low-frequency side. Likewise, by virtue of setting a path length of the inverted-L-shaped antenna pattern to another specific value, this antenna makes the high-frequency side of its usable frequency range shift to the high-frequency side. As a result, the laminate pattern antenna is able to operate at a wider frequency band; however, its operating frequency is about 2.4 GHz, which limits its application to only WiFi LAN, but not WiMAX MAN. Besides, as the laminate pattern antenna has a complicated structure, its fabricating procedures are accordingly lengthy because they comprise procedures for forming the inverted-F-shaped antenna pattern and then the inverted-L-shaped antenna pattern on both surfaces of the PCB, which in turn increases a fabricating cost. Accordingly, the laminate pattern antenna fails to meet a compactness requirement of a planar antenna due to its laminated structure, in addition to its narrow frequency band. Hence, the design of a novel pattern planar antenna that has multiple frequency bands, a simple antenna structure and a low fabricating cost is highly desired.


A base station and wireless device are configured to support TDD operation. In exemplary embodiments, the base station or UE can make use of the available symbols in the DwPTS or UpPTS of a special subframe respectively for NB-IoT transmissions. In one example, the base station can use OFDM symbols in the DwPTS to repeat in a predetermined manner some of the symbols transmitted in an immediately preceding downlink subframe, or in a succeeding downlink subframe. In other embodiments, the UE can use symbols in the UpPTS to repeat in a predetermined manner some of the symbols transmitted in the immediately succeeding uplink subframe, or in a preceding uplink subframe. The symbols repeated in the special subframe can be coherently combined at the receiver with corresponding symbols transmitted in a downlink or uplink subframe to improve decoding performance, reduce errors, improve channel estimation, and increase system capacity.

Long Term Evolution (LTE) supports both Frequency Division Duplex (FDD) operation and TDD operation. In the case of FDD operation, different carrier frequencies are used for downlink and uplink transmissions. The type 1 frame structure is used for FDD operations. In the case of TDD operations, the same carrier frequencies are used for both uplink and downlink transmissions. The type 2 frame structure is used for TDD operations. In the type 2 frame, the subframes within a radio frame are allocated for use as downlink subframes, uplink subframes, or special subframes. Downlink subframes are used for downlink transmissions and uplink subframes are used for uplink transmissions. Switching between downlink and uplink occurs during special subframes.
The special subframe is divided into three parts: the Downlink Pilot Time Slot (DwPTS), the Guard Period (GP) and the Uplink Pilot Time Slot (UpPTS). In LTE, the DwPTS is sometimes treated like a normal downlink subframe and used for data transmission, although the length of the DwPTS is less than a normal subframe and the amount of data that can be transmitted is correspondingly smaller. The UpPTS is not typically used for data transmission but may be used for channel sounding or random access. The UpPTS can also be left blank and serve as an extended guard period.
The Third Generation Partnership Project (3GPP) is currently developing a standard called Narrowband Internet of Things (NB-IoT) that is specifically adapted for the Internet of Things (IoT). This new radio access technology is intended to provide improved indoor coverage, support for massive numbers of low throughput devices, low delay sensitivity, ultralow device cost, low device power consumption, and optimized network architecture. The NB-IoT radio access technology supports three modes of operation: (1) standalone operation where NB-IoT uses a standalone carrier in any available spectrum; (2) guard band operation where NB-IoT uses the spectrum within an LTE guard band; and (3) inband operation where NB-IoT uses spectrum within a normal LTE carrier.
The 3GPP has recently approved a work item on NB-IoT enhancements to support TDD operation. In LTE systems, the DwPTS field of the special subframe may be used to transmit user data or control information on the downlink. By using a proper transport block size and taking advantage of the fact that the Transmission Time Interval (TTI) length is always equal to one millisecond, a special subframe can be used to carry autonomous data (e.g., new data, new scheduling information, etc.), and therefore be treated as any other available downlink subframe.
In contrast to conventional LTE systems, NB-IoT transmissions use a large number of repetitions and variable Resource Unit (RU) lengths. Because NB-IoT uses repetitions and variable TTI lengths, the usage of the DwPTS for downlink transmissions cannot be applied in the same way for NB-IoT. A further complication is that NB-IoT has three modes of operation. It would be desirable to use a common TDD design for all three modes of operation.

Special subframe utilization for NB-IoT transmission in TDD mode


An embodiment of a semiconductor device includes a transistor cell array having transistor cells in a semiconductor body. A planar gate structure is on the semiconductor body at a first side. Field electrode trenches extend into the semiconductor body from the first side. Each of the field electrode trenches includes a field electrode structure. A depth d of the field electrode trenches is greater than a maximum lateral dimension wmax of the field electrode trenches at the first side.

In semiconductor devices such as semiconductor power insulated gate field effect transistors (IGFETs), for example metal oxide semiconductor field effect transistors (MOSFETs) static and dynamic losses have an impact on device performance. Whereas a drain-to-source on-state resistance (Rdson), drain-source and gate-source leakage currents (IDSS, IGSS) typically contribute to the static losses, input and output capacitances determined by device specific capacitances such as gate-to-drain capacitance (CGD), gate-to-source capacitance (CGS) and drain-to-source (CDS) as well as a gate resistance typically contribute to the dynamic losses.
It is desirable to improve both static and dynamic losses of a semiconductor device.

Semiconductor device comprising planar gate and trench field electrode structure


The present invention relates to cyclic ketones represented by the following formula ##STR1##. and to drugs in which an effective component is such a cyclic ketone or a pharmacologically acceptable salt thereof.. The cyclic ketones of the present invention encourage the production of blood platelets, leukocytes and erythrocytes, and can be employed in the prevention or treatment of cytopaenia brought about by cancer chemotherapy, radiotherapy or drug therapy, or by immunological abnormality, anaemia and the like.

Cyclic ketone derivatives include lactones and lactams.
The lactones are known in the form of natural materials such as carolic acid and carolinic acid, and as synthetic materials such as the compounds described in J. Chem. Soc. Perkin Trans. I, 14, 1485-1491 (1976) and Synth. Comm., 22(6), 809-816 (1992). As lactams, there are known, for example, the compounds disclosed in Japanese Unexamined Patent Publication (Kokai) Nos 2-279691, 4-49289, 2-48591 and 1-313488, Chem. Pharm. Bull., 32(10), 4197-4204 (1984), Pharmazie, 43(7), 473-474 (1988), Monatsh. Chem., 123(1-2), 93-98 (1992), J. Inorg. Biochem., 24(3), 167-181 (1985), J. Am. Chem. Soc., 107(18), 5219-5224 (1985), J. Org. Chem., 50(8), 1344-1346 (1985) and Chem. Rev., 95, 1981-2001 (1995).
With regard to the applications of the lactones, the compounds described for example in Japanese Unexamined Patent Publication (Kokai) No. 5-43568 and EP 0508690 are known as anti-inflammatory agents with phospholipase A.sub.2 inhibitory activity; the compounds described in Archive des Pharmazie (Weinhelm, Ger.) (1983), 316(2), 115-120 are known as anticoagulants; and the compounds described in J. Anitbiot., (1994), 47(2), 143-7 are known as an anti-AIDS drug with HIV-protease inhibitory activity. With regard to the applications of the lactams, the compounds described in for example Chem. Pharm. Bull., 32(10), 4197-4204 (1984) are known as drugs with antimicrobial activity and the compounds described in Antibiot., 33(2), 173-181 (1980) are known as anaerobic antibiotics.
However, cyclic ketone derivatives with a haemopoietic action are totally unknown. The present invention has the objective of offering cyclic ketone derivatives with an outstanding haemopoietic action.

Cyclic ketone derivatives and their medical applications


An improved centering control for an elevator horizontal suspension having at least one actuator and includes a circuit for disabling the control or braking the actuator in response to an error signal indicative of the difference between a reference signal and a sensed signal indicative of the degree of centering of the car. Of course, both braking and disabling may be carried out instead of just one. For those cases in which two actuators are acting in concert to center the car, where the control is responsive to the error signal for only selecting one of the opposed actuators at a time, a small centering window is set up about the centered condition and part of the window is used to disable or brake one of the actuators and another part to disable or brake the other of the actuators. Again, both disabling and braking operations may be carried out at the same time with respect to a given actuator. For a centering control in which opposed actuators are used with individual feedback control loops to achieve a preselected preload, the improved control only uses the feedback loop when the corresponding actuator is unselected for actuation.

In European Patent Application No. 91306517 published on Jan. 22, 1992 under Publication No. 0467673A2, an elevator active suspension system was disclosed showing a method and apparatus for actively counteracting a disturbing force acting horizontally on an elevator platform moving vertically in a hoistway. In particular, as it relates to the invention disclosed herein, a control scheme is shown in FIG. 69 thereof for a pair of active guides. Even more particularly, a centering control is shown for counteracting low frequency, relatively large forces tending to de-center, shift, cant or otherwise tip the car from a steady horizontal position as it moves up and down the hoistway. A similar centering control is shown in FIG. 9 of U.S. Pat. No. 5,117,946. Both of the above-mentioned documents disclose inventions assigned to assignee hereof.
The details of an exemplary elevator horizontal suspension is shown in the above-mentioned U.S. Pat. No. 5,117,946 particularly at column 5, line 56 and concluding at column 6, line 66, which is hereby incorporated by reference along with the related Figures in the drawing thereof.
Also in both of the above-mentioned documents, an elevator horizontal suspension is shown on opposite sides of an elevator car. Both front to back and side to side suspension controls are considered, the front-to-back control being much simpler than the side-to-side control on account of a need, in the side-to-side control, for comparing the position of the car with respect to both rails on opposite sides of the hoistway and centering the car with respect thereto. Two separate front to back controls can be handled independently, if desired, with respect to the separate rails.
During extensive testing of the system disclosed in the above-mentioned documents it was found that the filters and compensation were be difficult to select in a way that permitted the control to be fast enough to satisfy the objectives for quickly centering the car yet slow enough to maintain stability. It was also found that, for a geared motor control that was back-driveable, there was an undesired back driving phenomenon when forces were sufficient to overcome the rather weak control provided in background for the homing control, primarily for the actuator not being utilized. The intent of the homing control was to maintain a constant preload on the unselected roller. In other words, while one of the actuators was actively centering the car the other we designed to be returned to a home position using a weak control primarily intended for use when the actuator was not being utilized to center the car but nonetheless left on all the time.

Centering control for elevator horizontal suspension


Methods, computer-readable media and computing systems are provided for analyzing service impacts on one or more VPNs on a computer network. A topology of each VPN may be identified. A protocol failure may be detected between routers of the computer network. It may then be determined how the VPN is affected by the protocol failure based on the identified topology and VRF information obtained from routers of the computer network.

Service provider networks may include computer networking infrastructure, or a "backbone," through which one or more customers may communicate and establish logical, or "virtual," networks. Data are often transmitted over such networks in suitably-sized packets, regardless of the data type. This is known as packet switching. Customers who wish to establish sustained logical networks on a service provider network may utilize virtual circuit switching, also known as connection-oriented switching. Examples of virtual circuit switching protocols include multiprotocol label switching ("MPLS") and asynchronous transfer mode ("ATM").
An exemplary service provider network 10 is shown in FIG. 1. Service provider network 10 includes core infrastructure 12 (referred to as "MPLS CORE" in FIG. 1) that includes one or more intermediate routers 14 and one or more provider edge ("PE") routers 16. Each PE router 16 may connect to one or more customer edge ("CE") routers 18. Customers who wish to utilize service provider network 10 may do so through a CE router 18.
A virtual private network ("VPN") is a logical network that is overlaid on an underlying computer network and that provides a way for users of the VPN (referred to herein as "customers") to communicate without interfering with other network traffic. A VPN may be secure, which means customers may communicate with each other over the VPN confidentially. A VPN also may be trusted, which means the VPN is used for traffic segmentation between various customer sites connected to a service provider network. Trusted VPNs may provide quality of service ("QoS") guarantees and other features to customers. A VPN customer need not be aware of the structure of the underlying service provider network. In FIG. 1, two VPNs called "VPN BLUE" and "VPN RED" are implemented on service provider network 10.
One type of VPN is a so-called "Layer 3" VPN ("L3VPN"). Two exemplary L3VPNs, BLUE VPN and RED VPN, can be seen in FIG. 1 by observing that BLUE VPN and RED VPN sites are shown connected to the service provider network via the CE routers. These VPNs may be implemented using various technologies or combinations thereof, including but not limited to MPLS, the Border Gateway Protocol (BGP") and Multiprotocol BGP ("MP-BGP"), which is an extension of BGP. PE routers may exchange VPN route prefixes using BGP. A PE router may identify as peers other PE routers with which the PE router exchanges VPN route prefixes.
Total failure of a network element (e.g., loss of power, hardware failure) may not be detectable until after-the-fact, which may delay significantly a determination of the failure's effect on services of a VPN. Sometimes, however, a network element may not experience total failure, but a software communication process on the element may experience failure that nonetheless affects VPNs and VPN services.
For example, a BGP communication process executing on a PE router may experience a failure. Such software failure may have various causes, such as buffer overflow or insufficient memory. Although the PE router is still up and running, VPN sites connected to the PE router, including CE routers, may experience degradation in performance or even total loss of connectivity. Without being able to detect such a protocol failure, a network administrator may have difficulty diagnosing a root cause of the failure or responding to the problem quickly enough to avoid customer complaints.

Analyzing service impacts on virtual private networks

Hewlett-Packard Development Company, L.P.