A wall-mounted assembly may include one or more host devices which receive line voltage and generate low voltage power on one or more contacts for powering one or more modular devices. The one or more modular devices may be installed adjacent to the host device and may share a faceplate with the host device, such as a standard decorator faceplate. The modular devices may receive power from the host device via a power bus between the host device and the one or more modular devices. Further, the power bus may include a communication bus for communication between the host device and the modular devices. The faceplate may be a smart faceplate, which may include circuitry, such as a battery backup, occupancy sensing, a charging dock for a mobile phone, etc.

Home automation systems, or "smart homes", have electrical loads and/or electronic smart devices located within a home which may be controlled by a user in a remote location from the devices. For example, a homeowner may connect appliances, lights, window treatments, thermostats, cable or satellite boxes, security systems, telecommunication systems, and other devices to each other via a wireless network. The homeowner may control these devices using a controller or user interface provided via a smart phone, a tablet, a computer, or other device directly connected to the network or remotely connected via the Internet, which may include touch, voice, or gesture inputs from the user. These devices may communicate with each other and the controller to improve their efficiency, their convenience, and/or their usability.
One drawback of smart home integration and the addition of smart devices, specifically, is where to place smart devices in the home. It would be advantageous to have smart devices that could be installed without taking up appreciable table space, occupying electrical receptacles, or adding clutter to the walls and ceiling which may detract from the aesthetics of the home.


A new and distinctive spray carnation cultivar particularly distinguished by its very large size flowers being generally white color and slightly pale pink in color at the center of the petal with a greenish base, the flowers being carried on erect stems.

This spray carnation cultivar originated as a sport in my nursery at Le Pradet, France. The sport was selected from a field of carnation varieties maintained at my nursery. This sport was selected because of the unusual flower coloration on a plant having moderately abundant foliage, favorable growth characteristics and resistance to Fusarium oxysporum. This plant most resembles Opale. (U.S. Plant Pat. No. 8,185) Opale is a spray carnation. However, Opale is pale cyclamen pink in color and has round, large petals. White Opale is white in color, and slightly pale pink at the center of the petal. Also, White Opale has fan-shaped petals. Under my direction, propagation was done by means of cuttings. This plant has been asexually reproduced at our nursery in Le Pradet, France. The initial success of the propagation was continued through several successive generations which proved that the new variety retained all of the distinguished characteristics hold true from generation to generation and appear to be firmly fixed.


An apparatus and method for driving a field emission display (FED) device are disclosed. By applying a voltage to a specific electrode (data electrode or mesh electrode) of the FED device during a blanking time of a display frame of an FED, electric charges unnecessarily charged in the FED device can be removed.

1. Field of the Invention
The present invention relates to a field emission display (FED) and, more particularly, to an apparatus and method for driving an FED device.
2. Description of the Conventional Art
Recently, demands on displays are increasing according to the rapid development of information communication technologies and the structures of displays are variably changing. For example, in an environment requiring mobility, a mobile information communication device such as a light, small and low power-consuming display is required, while when the display is used as a typical information conveying medium, a display with a large screen such as a CRT (Cathode Ray Tube), an LCD (Liquid Crystal Display), a PDP (Plasma Display Panel), a VFD (Vacuum Fluorescent Display) is required. Thus, the development for FEDs that can provide high resolution as well as having a reduced size and power consumption are being actively pursed.
The FED is receiving attention as a flat panel display for supporting next-generation information communications as it overcomes many shortcomings of currently developed or mass-produced flat panel displays (e.g., LCDs, PDPs, VFDs, etc.). The FED device has a simple electrode structure, can be operated at high speed such as the CRT, and has the advantage of being able to display a wide variety of colors, gray scale tones and provides high luminance.
Recently, FED devices having carbon nano tubes (CNTs) are being commonly used. The CNT is mechanically strong, chemically stable and has excellent in electron emission characteristics at a low degree of vacuum. By having a relatively small diameter (approximately 1.0˜scores of nm), the CNT has a superior field enhancement factor when compared with an emitter having a micro tip, and thus can emit electrons at low turn-on electric fields (approximately 1.0˜5.0V/μm). Thus, by applying the CNT to an FED device, a power loss and production unit cost of the FED device can be reduced.
A structure of the FED device having the CNT will now be described with reference to FIG. 1.
FIG. 1 is a sectional view showing the structure of a general FED device.
As shown in FIG. 1, a conventional FED device includes an upper glass substrate 10; an anode electrode 11 formed on the upper glass substrate 10; a phosphor layer 12 formed on the anode electrode 11; a lower glass substrate 1; a gate electrode 2 formed on the lower glass substrate 1; an insulation layer 3 formed on the gate electrode 2; a cathode electrode 5 formed on the insulation layer 3; a CNT (Carbon Nano Tube) 6 formed on the cathode electrode 5; and a counter electrode 4 electrically connected with the gate electrode 2 exposed through a via hole of the insulation layer 3 and formed on the same plane with the cathode electrode 5. The upper glass substrate 10 and the lower glass substrate 1 are disposed at the opposite side with a certain interval therebetween.
In order to drive the FED device, when a high voltage is applied to the anode electrode and a low voltage is applied to the gate electrode 2 and to the cathode electrode 5, electrons are emitted from the CNT 6, accelerated by the high field of the anode electrode 11, and then collide with the phosphor layer 12.
Since the counter electrode 4 and the cathode electrode 5 are formed on the same plane, electrons emitted from the CNT 6 move toward the counter electrode 4 and then move toward the phosphor layer 12 by the high field of the anode electrode 11.
However, since the high voltage applied to the anode electrode 11 affects the CNT 6, electron beams can be easily distorted to degrade the display quality and cross talk (interference) is caused among neighboring cells due to the distorted electron beams.
Therefore, in order to prevent the distortion of electron beams and concentrate electron beams into the cell, a mesh electrode is additionally formed.
FIG. 2 is a sectional view of an FED device having a mesh electrode in accordance with the conventional art.
As shown in FIG. 2, the FED device having a mesh electrode includes: an upper glass substrate 110; an anode electrode 100 formed on the upper glass substrate 110; a lower glass substrate 15; a conductive layer 20 formed on the lower glass substrate 15; an insulation layer 30 formed on the conductive layer 20; a cathode electrode 40 formed on the insulation layer 30; a CNT 50 formed on or near the cathode electrode 40; a gate electrode 25 electrically connected with the conductive layer 20 exposed through a via hole of the insulation layer 30; and mesh electrodes 70 supported by structures 60 formed on the cathode electrode 40 and on the gate electrode 25. The upper glass substrate 110 and the lower glass substrate 15 are disposed with a spacer 80 therebetween at a certain interval in a facing manner.
The structures 60 are made of glass, and the mesh electrodes 70 are formed on the structures 60. The mesh electrodes 70 are disposed at an upper side of the gate electrode 25 and the cathode electrode 40, thereby spreading and distortion of electron beams can be prevented.
When a high voltage is applied to the anode electrode 100 and a low voltage is applied to the cathode electrode 40, electrons are emitted from the CNT 50. At this time, a fixed amount of DC voltage is applied to the mesh electrodes 70.
The mesh electrodes 70 shields electric field generated by the anode electrode 100 so that the high voltage applied to the anode electrode 100 cannot affect the gate electrode 25 and the cathode electrode 40. Thus, electrons emitted from the CNT 50 are accelerated by the voltage applied to the mesh electrodes 70 and proceed toward the mesh electrodes 70. After passing through the mesh electrodes 70, electrons are accelerated by the anode electric field, and then, collide with the phosphor layer 90. Namely, the mesh electrodes 70 serve to concentrate electron beams into the cell.
However, since the insulation layer 30 with a dielectric component is positioned between the gate electrode 25 and the cathode electrode 40, electric charges are charged in the insulation layer 30, and as the electrons emitted from the CNT 50 collide with the mesh electrodes 70, electric charges are also charged not only in the mesh electrodes 70 but also in the structures 60 supporting the mesh electrodes 70, causing a problem that electron beams are distorted, and thus a leakage current is increased to increase power consumption.
In addition, it is difficult to drive the FED device due to the high voltage because of the electric charges charged in the insulation layer 30, the mesh electrodes 70 and the structures 60 supporting the mesh electrodes 70, and thus, the luminance of the FED deteriorates.
As mentioned above, the FED device has the following problems.
That is, since the electric charges are charged in the insulation layer of the FED device, electron beams are distorted.
In addition, since the electric charges are charged in the mesh electrodes and in the structures for supporting the mesh electrodes, a leakage current increase, and distortion of the electron beams causes cross talk (interference) among neighboring cells.
U.S. Pat. Nos. 6,169,372, 6,646,282 and 6,672,926 also disclose various conventional techniques of the FED device.

Apparatus and method for driving field emission display device


An overvoltage protector having a housing and at least one overvoltage limiter arranged in the housing, especially a gas-filled surge arrester (1), a suppressor diode (2) or a varistor. The functional ability and the state of the overvoltage protector can be controlled during operation by associating a monitoring component with the overvoltage limiter which detects a current (i) flowing over the overvoltage limiter component, and by providing an evaluation unit that evaluates the signal of the monitoring component.

1. Field of the Invention
The invention relates to an overvoltage protector with a housing and with at least one overvoltage limiter which is located in the housing, the overvoltage limiter being especially a gas-filled surge arrester, a spark gap, a suppressor diode or a varistor.
2. Description of Related Art
Overvoltage protection can be divided into different areas of application. Here, it is distinguished between overvoltage protection for power supply, for measurement, open-loop and closed loop control (MSR) technology and for information technology and telecommunications. Interfaces of MSR technology are far more sensitive to overvoltages than power supply systems. For overvoltage protection, therefore, in the MSR domain, generally, overvoltage protectors with combined protective circuits are used, at least one overvoltage limiter being used for coarse protection and at least one overvoltage limiter being used for precision protection. Often, an indirect parallel connection of a gas-filled surge arrester and a suppressor diode is used, a decoupling resistor being located between the gas-filled surge arrester and the suppressor diode.
The known overvoltage protectors are often made as "protective plugs" which form an overvoltage protection device together with the bottom part of the device. For installation of this overvoltage protection device, there are corresponding terminals for the individual conductors on the bottom part of the device. For simple mechanical and electrical contact-making of the bottom part of the device with the respective overvoltage protector, the connecting elements in the overvoltage protector are made as plug pins for which there are corresponding sockets connected to the terminals in the bottom part of the device so that the overvoltage protector can simply be slipped onto the lower part of the device.
In these overvoltage protection devices, the installation and mounting can be done very easily in a time-saving manner due to the plug-in capacity of the overvoltage protector. In addition, these overvoltage protectors partially have a remote reporting capability, as a primary detector of the state of the overvoltage protector which is conventionally made as a changeover contact, and an optical state display in the overvoltage protector. The state display indicates whether the overvoltage limiter located in the overvoltage protector is still serviceable or not. Depending on the application of the overvoltage protector, varistors, gas-filled surge arresters, spark gasps or diodes, especially suppressor diodes, are used as overvoltage limiter.
Due to ageing, prior damage by discharge processes and intermittently occurring overvoltages (TOV) in the range of seconds, an unwanted increase of the leakage current of the varistor at operating voltages occurs, especially in overvoltage protectors with a varistor as the overvoltage limiter. Therefore, overvoltage protectors with a varistor as arrester, at present, often have a thermal disconnect device by which a varistor which is no longer reliably serviceable is electrically disconnected from the current path which is to be monitored. Moreover, thermal disconnection devices are often also used in overvoltage protectors with spark gaps as arresters.
Such an overvoltage protector is known, for example, from German Patent Application DE 20 2004 006 227 U1. In the known overvoltage protector, the state of the overvoltage limiter, especially a varistor, is monitored according to the principle of a temperature switch so that, when the varistor overheats, a solder connection provided between the varistor and a disconnector is interrupted; this leads to electrical disconnection of the varistor. Moreover, when the solder connection is interrupted a plastic element is pushed by the reset force of a spring out of a first position into a second position in which the disconnector, which is made as an elastic metal tongue, is thermally and electrically disconnected from the varistor by the plastic element. Since the plastic element has two colored markings which are located next to one another, it also acts in addition as an optical state display, as a result of which the state of the overvoltage protector can be easily read off directly on site. However only one defect of the overvoltage protector can be signaled by such an integrated display.
Since overvoltage protection devices are exposed to high peak current loads, the individual overvoltage limiters can be damaged depending on the level and frequency of the stresses so that the serviceability of the overvoltage elements should generally be monitored. To monitor the serviceability of plug-in overvoltage protectors, Phoenix Contact GmbH & Co. KG sells a portable arrester test device under the name "CHECKMASTER" (catalog TRABTECH 2007, pages 166 to 173) which has a test receiver into which the protective plug which is to be tested at the time can be plugged. In doing so, the current electrical parameters of the overvoltage limiters are determined and compared to reference values, by measuring the tolerance values highly loaded components being identified as damaged beforehand. The arrester test device thus enables—in addition to the display of a defective overvoltage protector—also a precautionary examination of an overvoltage protector. But the disadvantage is that for this purpose the overvoltage protector must be removed from the bottom part of the device so that a test is not possible during operation.


A first metal film is formed on a piezoelectric substrate surface. A pattern of openings forming a first resist mask is formed in the first metal film. Portions of the metal film are removed by etching. The substrate is brought into contact with a first etching solution to remove substrate material to shape an outer surface. After, openings in the first metal film are filled in with a second metal film. The substrate is shaped into a first plurality of piezoelectric resonators using a second etching solution. Rough frequency adjustment is conducted by etching side surfaces of the substrate in increments and cutting a piezoelectric resonator from the substrate. The rough frequency adjustment continues until a measured oscillation frequency is within a predetermined frequency range. Electrode patterns then are formed for each one of the second plurality of piezoelectric resonators.

1. Field of the Invention
The present invention relates to a technology for manufacturing, for instance, a tuning fork type piezoelectric resonator using a piezoelectric substrate made of, for instance, quartz crystal or the like.
2. Description of the Related Art
The tuning fork type quartz resonator has long been adopted as a signal source for pacing of a wrist watch owing to its compactness, inexpensiveness and low power consumption, and the uses thereof are still expanding. The CI (crystal impedance) value of this quartz resonator is required to be as small as possible for the purpose of reducing the power loss, and therefore a quartz resonator of which oscillation efficiency is enhanced by forming a groove therein has been used for this purpose.
As shown in FIG. 7, the quartz resonator is provided with a pair of vibrating arms 2a and 2b in a base 1, and the grooves 31 and 32 are respectively arranged on both main surfaces of the respective vibrating arms 2a and 2b. Excitation electrodes for exciting tuning fork vibration based on bending vibration are formed in these grooves 31, 32 and the respective vibrating arms 2a, 2b.
The above-described quartz resonator is manufactured according to the following process (refer to Patent Document 1). FIGS. 8A to 8E and FIGS. 9F to 9I are views showing the manufacturing processes of the cross sectional portion along A-A line in FIG. 7. First, after polishing and cleaning a cutout quartz wafer 10, a metal film 11 is formed by a sputtering method (FIG. 8A). A film in which gold (Au) is stacked on a backing film of, for instance, chromium (Cr) is used as the metal film 11.
Then, after applying photoresist on such a metal film 11 by a spray method for instance (FIG. 8B), the photoresist is exposed and developed in a manner to obtain a pattern having the shape of the quartz piece 10, namely, a tuning fork shape pattern, so that a tuning fork shaped resist film 12 is formed (FIG. 8C). Thereafter, the portion of the metal film 11 not covered with the resist film 12 is removed by etching, and the whole resist film 12 remaining on the quartz wafer 10 is removed (FIG. 8D).
Next, photoresist is applied to the whole surface of the quartz wafer 10 by, for instance, a spray method, and the photoresist is exposed and developed to form a resist film 13 (FIG. 8E). Then, the resist film 13 is peeled off so that the outside shape of the quartz piece is left, and the resist film 13 at portions corresponding to the grooves 31 and 32 shown in FIG. 7 is peeled off (FIG. 9F).
Thereafter, wet etching is conducted by immersing the quartz wafer 10 in hydrofluoric acid which is an etching solution using the resist film 13 as a mask to form the outside shape of the quartz piece (FIG. 9G). 14 and 15 in FIGS. 9F to 9I are portions corresponding to the vibrating arms 2a and 2b, and 16 and 17 in FIGS. 9F to 9I are outer frame portions described for convenience of taking out a sheet of quartz piece from the quartz wafer. Then, wet etching is conducted by immersing the quartz wafer 10 in a potassium iodide (KI) solution using the resist film 13 as a mask to remove the metal film 11 at the portions corresponding to the grooves 31 and 32 shown in FIG. 7 (FIG. 9H). Then, wet etching is performed by immersing the quartz wafer 10 in hydrofluoric acid. By these processes, the grooves 31 and 32 are formed on both main surfaces of the quartz piece 10 (FIG. 9I).
Thereafter, a frequency matching process (rough adjustment in oscillation frequency) through which matching to a prescribed frequency is performed by reprocessing the side surfaces of the outside shape of the quartz piece 10 and the grooves 31, 32 by immersing the quartz wafer 10 in hydrofluoric acid. The frequency matching process includes immersing the quartz wafer 10 in hydrofluoric acid, suspending the wet etching after a predetermined period of time, cutting out a quartz piece from the original which is in a state of before forming an electrode pattern and forming the electrode on the quartz piece. A prescribed voltage is applied to the electrode and the oscillation frequency f is detected to determine whether or not the oscillation frequency f is within the predetermined frequency.
Thereafter, an electrode pattern is formed on the surface of the quartz piece 10, a fine adjustment in the oscillation frequency is conducted by shaving the metal film formed on the tip portion of the vibrating arm so as to adjust the thickness thereof.
The oscillation frequency of quartz resonator is determined depending upon the length and the width of the vibrating arms 2a and 2b, the length, width and depth of the grooves 31, 32 and the like shown in FIG. 7. Accordingly, in the frequency matching process before forming the above-described electrode pattern, since the side surfaces of the outside shape and the grooves 31, 32 of the quartz piece 10 are etched simultaneously, the change in frequency is very large, and it is difficult to suspend the etching process at the most suitable point where the predetermined frequency is obtained. Therefore, it has a problem that fine frequency adjustment doesn't go well even through the frequency adjustment process after the electrode pattern forming process, which reduces yields.
[Patent Document 1]
Japanese Patent Application Laid-open No. 2002-76806 (columns 0094 to 0113, FIG. 9 to FIG. 13)

Method for manufacturing piezoeletric resonator


An electron beam melting machine and a method of operation are provided which maintains constant energy absorption within a build layer by adjusting an incident energy level to compensate for energy not absorbed by the additive powder. This unabsorbed energy is detected in the form of electron emissions, which include secondary electrons, backscattered electrons, and/or electrons which are transmitted through the build platform.

Additive manufacturing processes generally involve the buildup of one or more materials to make a net or near net shape (NNS) object, in contrast to subtractive manufacturing methods. Though "additive manufacturing" is an industry standard term, additive manufacturing encompasses various manufacturing and prototyping techniques known under a variety of additive manufacturing terms, including freeform fabrication, 3D printing, rapid prototyping/tooling, etc. Additive manufacturing techniques are capable of fabricating complex components from a wide variety of materials. Generally, a freestanding object can be fabricated from a computer aided design (CAD) model.
Electron beam melting (EBM) is a common industry term used to refer to producing three-dimensional (3D) objects by using an electron beam to sinter, melt, or otherwise fuse a fine powder. During an EBM process, the powder to be melted by the electron beam is spread evenly over a powder bed on a build platform, and the electron beam sinters or melts a cross sectional layer of the object being built under control of an electronic control unit or an emission directing device. The build platform is lowered and another layer of powder is spread over the powder bed and object being built, followed by successive melting/sintering of the powder. The process is repeated until the part is completely built up from the melted/sintered powder material.
Notably, the surface chemistry of additive powder naturally varies as the additive powder ages and picks up impurities. Moreover, the surface chemistry of the additive powder can significantly affect the secondary electron emissions of the powder layer and can lead to variability in the energy absorbed by the additive powder. When the energy level of the electron beam remains constant at a target energy level, these variations in powder energy absorption may lead to over-melting, under-melting, or otherwise improper fusing of the additive powder. This improper fusing of the additive powder can result in build imperfections, warping, delamination, microstructure variation, and other printing irregularities which result in lower quality parts, structural weaknesses, and even defective parts.
Accordingly, an additive manufacturing machine that facilitates a more stabilized build process that generates fewer defective or suboptimal parts would be useful. More particularly, an electron beam melting machine that is capable of detecting electron emissions or energy deposition and adjusting the electron beam to maintain constant energy at the powder layer would be particularly beneficial.

Electron beam melting additive manufacturing machine with dynamic energy adjustment


A topical seasoning for snack foods, the seasoning comprising a plurality of seasoning particles, the seasoning particles comprising a shell surrounding an encapsulated central core, the shell comprising a matrix including at least one solid lipid and the core comprising sodium chloride.

Field of the Invention
The present invention relates to a topical seasoning for a snack food, such as a starch-based snack food for example a potato chip or an expanded snack food produced from a starch-based snack food pellet. The present invention also relates to a snack food seasoned with a topical seasoning.
Description of the Related Art
It is well known to employ topical seasoning for flavouring snack foods, for example starch-based snack foods, typically in the form of snack chips, such as potato chips or expanded snack foods produced from a starch-based snack food pellet. On subsequent cooking, the pellet expands to produce an expanded low density porous snack food.
Known topical seasonings include sodium chloride, since many snack foods require a salty seasoning to meet the taste demands of the consumer. Such topical seasonings include sodium chloride crystals, in micronised or larger particle dimension, mixed with other seasoning ingredients.
There is a general desire to reduce the salt content of many foods, including processed foods such as snack foods. However, for snack foods, there is a problem of achieving a reduced sodium chloride content of the topical seasoning, and of the resultant snack food product, while also achieving the desired taste sensation required by consumers.


The invention proposes a novel automatic product feed in which an analog signal is formed and at least one other digital signal which is adjustable independently of the analog signal is generated and used for the automatic product feed for supervising the product feed functions by a mechanical probe (8) in the product flow. In this way, all previously known controlling and regulating functions can be realized with a minimum of electronics or at the highest level of computer control as a function of the product feed or for optimizing the grinding conditions, possibly with externally initiated digital signals for various stage adjustments and with the use of very simple automatic component means. The invention further proposes a corresponding method for grinding with a milling roller mill (1).

1. Field of the Invention
The invention is directed to an automatic product feed for a milling roller mill having a mechanical sensor, a product feed device with adjustable drive means for the feed rolls, as well as engaging and disengaging means for the grinding rolls, and to a method for controlling the grinding in a milling roller mill.
2. Description of the Related Art
Strictly defined general conditions must be met for regulating the product feed in a milling roller mill. They are:
a uniform product distribution over the entire length of the grinding rolls PA0 the amount of product flowing into the roller mill must be processed within a bandwidth and metered to the grinding rolls while compensating for temporary feed fluctuations as far as possible; PA0 during an interruption in the product feed to the roller mill, the product feed to the grinding rolls must be stopped with minimum delay and the grinding rolls must be moved apart simultaneously. PA0 a mechanical arrangement is still the most inexpensive of all sensor technologies. PA0 a mechanical arrangement is more reliable and requires no specialized technical background for handling. PA0 a mechanical arrangement always has frictional forces in every movement. PA0 the regulation of the amount of product PA0 engagement and disengagement, PA0 An optimal feed roll speed can be adjusted, depending on grinding conditions, in the regulation of the amount of product by regulating the segment approximately in accordance with EP-PS 38 054 via a pneumatic regulation of the metering gap. PA0 An optimal value can be adjusted for the metering gap by means of a digital signal of a control unit in regulating the product amount by means of regulating the feed roll speed according to DE-GM 86 14 505.
With respect to apparatus, various basic elements such as distributing rolls and feed rolls as well as a mechanical probe as sensor for precision regulation of the flow to the grinding rolls have been used successfully for decades. In principle, the momentary adjustment of the amount of product flowing into the grinding rolls can be effected in two ways: by regulating the rate of rotation or speed of the feed rolls or by regulating the metering gap between a proportioning slide and the feed roll which is also known as segment distribution.
Both arrangements, i.e. speed regulation and segment distribution, are currently practiced.
An example of speed regulation is described in DE-GM No. 86 14 505 and has proven very successful for some applications. However, speed regulation is not as widely used as segment distribution. A regulation of the metering gap is disclosed in EP-PS 38 054, likewise by the present Applicant. When the product to be metered has a flour-like or gritty quality, segment distribution is preferred in practice by the majority of millers. On the other hand, speed regulation has often proved superior to segment distribution in the case of flaky products as in the metering of break, e.g. prior to the second grinding passage in the mill.
The problem which now arises consists in the fact that it must first be determined in principle for every roller mill which concept to install for regulating the feed. A subsequent conversion is often not carried out and thus an absence of optimal feed regulation may recur repeatedly in individual grinding passages.
The grinding process is acknowledged as the core of every mill. Therefore, the quality of the grinding is influenced by a number of parameters. Special importance is attached to the regulation of the product feed to the grinding rolls and to trouble-free operation of the elements required for this. The degree of automation in a modern mill has already reached a particularly high level. A further increase in automation is demanded, not least of all, to ensure quality, at least to the extent that the parameters already presently influenced by hardware technology can be exploited to achieve even greater perfection so as to enable easier access through human intervention and management of the process.
Significantly, an actual conflict of goals can be discerned precisely in regard to the roller mill. This is caused in part by prejudices of an almost ideological character, even in technical circles. Some say that mechanics are now out of date, that modern techniques such as electronics or sensor technology, e.g. optical, capacitive, infrared measuring technology, are superior and more advantageous since electrical/electronic signals are generated immediately. Many trained specialists still attach an almost mystical significance to computer technology accompanied by a strong reliance or euphoric acceptance. As a result, a great number of solutions are offered, each of which, without exception, has achieved only partial acceptance.

Automatic product feed and method for controlling a milling roller mill


A high voltage metal oxide semiconductor device. The high voltage device comprises a high voltage NMOS, a high voltage PMOS, or a high voltage CMOS. A field oxide layer is used to isolate the gate from the source region, while a diffusion region is formed under the field oxide layer. A channel region around the source drain extends across a first doped well and a second doped well having different dopant concentration. The channel region further comprises two grading regions with different dopant concentrations around the drain region.

1. Field of Invention
The present invention relates to a semiconductor fabricating method. More particularly, the present invention relates to a method of forming a metal oxide semiconductor.
2. Description of Related Art
Due to the increasing number of semiconductor elements incorporated in integrated circuits, the size of metal oxide semiconductor (MOS) components is greatly reduced. Accordingly, as the channel length of the MOS is decreased, the operating speed is increased. However, there is an increased likelihood of a problem, referred to as "short channel effect", caused by the reduced channel length. If the voltage level is fixed, according to the equation of "electrical field=electrical voltage/channel length", as the channel length is shortened, the strength of electrical field is increased. Thus, as the intensity of electrical filed increases, electrical activity increases and electrical breakdown is likely to occur.
To solve the problem of electrical breakdown, a method to fabricate a high voltage device being able to withstand a high intensity of electric field has been developed. An isolation structure and a drift region, which is below the isolation structure, are formed on a substrate between a gate and a source/drain of a MOS to increase the distance between the source/drain region and the gate.
In the application of radio frequency (RF), a higher power gain is required to improve frequency response. The method to obtain a higher power gain is to increase the transconductance of the devices. While increasing the transconductance of devices, the intensity of electrical field of the junction between the source region and the channel region increases. In other words, as the electrical field of the channel region increases, the transconductance of the device is increased. In order to avoid the short channel effect and electrical breakdown, the electrical field of channel region must be limited. Thus, a high transconductance is difficult to obtain in the conventional fabrication method of a MOS.
FIG. 1 is a cross-sectional view showing a conventional fabrication process of forming a lateral double-diffused MOS (LDMOS).
In FIG. 1, a conventional LDMOS includes a P-type substrate 100, a field oxide layer 101, a gate oxide layer 102, a gate layer 103, an N.sup.+ drain region 104, an N.sup.- drift region 105, a N.sup.+ source region 106, and a P-doped region 107.
The dopant concentration in the N.sup.- drift region 105 is lightened in the conventional LDMOS in order to achieve a high voltage operation. However, this level of enhance voltage is limited, and consequently, the driving current is reduced. In the application of radio frequency, a higher transconductance is required, that is, the intensity of electrical field strength at the junction between the source region and the channel is increased, or the dopant concentration in the P-doped region of the source region is increased. In this manner, an electrical breakdown is easily caused. Hence, the increase of transconductance is not easy to achieve. Therefore, the application of conventional LDMOS is limited.


An electrical shielded data connector includes an inner terminal support housing carrying a plurality of electrical terminals such as where the terminal support housing includes a shielded assembly surrounding the terminal support housing. The shielded sub-assembly is insertable into an outer housing and is latchably attached therein and a rear support plate and cable support member are barred by part tide in nature and can be assembled around the cable after the termination of the multi conductor cable. The cable clamp portion can be positioned in one of two orientations to provide for either a straight through or an angled cable exit.

1. Field of the Invention
The subject invention relates to an improved shielded data connector for use in local area network connections.
2. Description of the Prior Art
U.S. Pat. No. 4,501,459 discloses a local area network connector specifically for use in the data communications industry. These connectors can be employed in a closed loop data communications link fin which various equipment such as computer terminals can be interconnected in a system. These connectors are specifically adapted for use in interconnecting numerous micro or mini computers in a micro computer network in an office environment. Connectors of this type have standard interface dimensions and configurations. These connectors must also be shielded to prevent the spurious electrical signals and noise from affecting the signals in the network. These connectors also require a shunting capability since the conductors are part of a network and can be connected in series with other similar connectors. This shunting capability is necessary to prevent disruption of a network when an individual plug is not connected to external equipment.
The structure and components of local area network connectors of this type is represented by the structure of the connectors shown in the before mentioned U.S. Pat. No. 4,501,459. These connectors include a plurality of spring metal terminals having insulation displacement wire barrels for establishing electrical connection with the individual conductors forming the multi-conductor shielded cable. Terminals are positioned on a support housing and upper and lower shields can be positioned in surrounding relationship to the terminals and the support housing. Shield members are permanently attached to upper and lower cover members and the cover members are mated to both encapsulate the conductor and to cover the upper and lower shields to the cable shielding.
There exists within the industry a need for a low cost local area network connector of this general type which can be easily hand assembled at the end user's facility. One such design is shown in PCT publication WO88/04841 and shows an inner insulative terminal retaining housing having upper and lower shields surrounding the housing where the shielded sub-assembly is insertable into a premoulded outer boot housing. The boot housing contains latching structure for mateable interconnection with a like connector in the data link. While the above mentioned PCT publication itself provides an enhanced low cost data connector assembly, this design also is not suitable for all data connection needs.
For instance, it is typical that the cable should have the possibility of exiting the electrical connector along a longitudinal line, straight out from the connector. The cable should also have the possibility of exiting at an angle, in applications where the cable drops to the floor or, where the connector is otherwise in a small clearance application.
Furthermore there are some applications where the outer housing should be slidably received over the inner housing after the termination of the electrical conductors to the electrical terminals and after the outer shield members are positioned in place on the shielded data cable. In the disclosure of the above mentioned PCT application, the pre-moulded boot must be inserted over the cable prior to assembling the individual data conductors to theft corresponding terminals in the terminal support housing.
There also exists a need for a local area network connector for this general type which can be easily hand assembled at the end user's facility, but can still meet or exceed present requirements for shielding and cross talk specifications. In the present designs, the connectors include so called stuffer caps which locate the individual wires and hold them in their lateral positions for presentation over the wire barrels of the electrical terminals. The wires which are used in such connectors are twisted pairs, and therefore the "untwisting" of the pairs must be kept to a minimum.
It is an object of the invention to provide for an electrical connector assembly where the outer housing can be inserted over the inner shielded sub assembly, after the termination of the wires to their corresponding electrical terminals.
It is a further object of the invention to provide a low cost shielded data connector where the assembly includes the possiblity of various cable exit angles, and in particular, where the alternate angled position does not require a redundancy of connector parts.
It is a further object of the invention to provide a low cost shielded data connector where the assembly includes adequate EMI/RFI and cross talk requirements.


A railroad collision avoidance system and method are disclosed that utilize impulse radio technology to effectively warn a person when there is a locomotive in their vicinity. In one embodiment, the railroad collision avoidance system includes a transmitting impulse radio unit coupled to a locomotive and a receiving impulse radio unit coupled to a vehicle. The transmitting impulse radio unit operates to transmit an impulse radio signal towards the vehicle when the locomotive is a predetermined distance from a railroad crossing. Upon receiving the impulse radio signal, the receiving impulse radio unit makes sure the person operating the vehicle is informed about the potentially dangerous situation. Several embodiments of the railroad collision avoidance system and method are disclosed all of which operate to warn a person when there is a locomotive in their vicinity.

1. Field of the Invention
The present invention generally relates to the railroad field and, in particular, to a railroad collision avoidance system and method for preventing train accidents.
2. Description of Related Art
When it comes to public safety and personal safety, it is always desirable to improve upon the way people are warned about potentially dangerous situations involving a locomotive. To date there does not appear to be any railroad collision avoidance system that can effectively warn a person when there is a locomotive in their vicinity. Presently, there are approximately 259,000 railroad crossings in the United States of which approximately 22% are active railroad crossings which means that they are protected by some sort of railroad collision avoidance system. The conventional railroad collision avoidance system uses warning lights and retractable gates to alert a motorist that there is an oncoming locomotive. This means that over 200,000 railroad crossings are passive railroad crossings which are particularly dangerous since they have no warning lights or retractable gates to warn a motorist that a locomotive is approaching the railroad crossing. Even with the use of conventional railroad collision avoidance systems at the active railroad crossings and the lack of collision avoidance systems at passive railroad crossings there is still an unacceptable number of train-vehicle accidents. For instance, in 1999, there were 399 deaths and 1360 people seriously injured in train-vehicle accidents in the United States.
In past years, several railroad collision avoidance systems have been patented in an attempt to reduce the number of train-vehicle accidents. One such system was described in U.S. Pat. No. 4,942,395 which appears to disclose a wireless railroad grade crossing motorist warning system that warns motorists traveling within a given proximity of a railroad crossing that there is an oncoming train. The wireless railroad grade crossing motorist warning system uses a three-transceiver system, wherein the oncoming train has a mounted transceiver that communicates a warning radio signal to a transceiver located at a railroad grade crossing which, in turn, emits a coded radio signal to a transceiver unit located within a motor vehicle. Unfortunately, the wireless railroad grade crossing motorist warning system uses conventional radio communication technology and as such suffers from the traditional problems associated with that technology including, for example, interference from other radios, high power consumption and multipath interference.
Another system was described in U.S. Pat. No. 5,864,304 which appears to disclose a railroad-crossing warning system for protecting pedestrians and motorists from an oncoming train. In one embodiment, the railroad-crossing warning system has six magnetic probes that cover a 40xc3x9740 foot area in the railroad crossing that detects the presence of a stalled vehicle. If there is a stalled vehicle, the railroad-crossing warning system communicates information about the stalled vehicle to the oncoming train. In addition, the railroad-crossing warning has a series of wireless trackside devices that are equally spaced along the length of the railroad track for detecting the presence of the oncoming train at a specified location and time and for determining vital warning information about the oncoming train. The train warning information is transmitted to a two-sided light emitting (LED) display located at the railroad crossing. While this system is an improvement over many others it is still subject to interference from other transmitters and must operate within an assigned frequency that can be adversely affected by different types of interference commonly associated with traditional communication technology. Accordingly, there has been a need for a railroad collision avoidance system and method that can effectively warn a person when there is a locomotive in their vicinity. This need and other needs are satisfied by the railroad collision avoidance system and method of the present invention.
The present invention includes a railroad collision avoidance system and method that utilize impulse radio technology to effectively warn a person when there is a locomotive in their vicinity. In one embodiment, the railroad collision avoidance system includes a transmitting impulse radio unit coupled to a locomotive and a receiving impulse radio unit coupled to a vehicle. The transmitting impulse radio unit operates to transmit an impulse radio signal towards the vehicle when the locomotive is a predetermined distance from a railroad crossing. Upon receiving the impulse radio signal, the receiving impulse radio unit makes sure the person operating the vehicle is informed about the potentially dangerous situation. Several different embodiments of the railroad collision avoidance system and method all of which operate to warn a person when there is a locomotive in their vicinity are described below.

Railroad collision avoidance system and method for preventing train accidents


A cell stack device in the present disclosure includes a cell stack including a plurality of arranged cells, and a first manifold configured to fix a first end of each of the cells with a sealing material and supply reactive gas to the cells. The first manifold includes a frame body configured to fix the first end of each of the cells with the sealing material inside the frame body, and a plate body bonded to a first end portion of the frame body and having a rigidity lower than that of the frame body. A module in the present disclosure includes a housing and the cell stack device housed in the housing. Furthermore, a module housing device in the present disclosure includes an external casing, the module in the external casing, and an auxiliary device configured to operate the module in the external casing.

In recent years, various technologies have been proposed as next generation energy sources including: fuel cell modules that include a fuel cell stack device constituted by a plurality of fuel cells being arranged in a housing, the fuel cells being a type of cell capable of generating power using a fuel gas (hydrogen-containing gas) and an oxygen-containing gas (air); and fuel cell devices that include fuel cell modules in an exterior casing (e.g. Patent Document 1).
Additionally, technologies have been proposed such as: electrolytic modules that include an electrolytic cell stack device housed in a housing, the electrolytic cell stack device being constituted by arranging a plurality of electrolytic cells which produce hydrogen and oxygen (O2) by electrolyzing water vapor (water) via provision of water vapor and voltage; and electrolytic devices that include electrolytic modules in an exterior casing (e.g. Patent Document 2).

Cell stack device, module, and module housing device


The present disclosure includes devices, systems, and methods for memory address translation. One or more embodiments include a memory array and a controller coupled to the array. The array includes a first table having a number of records, wherein each record includes a number of entries, wherein each entry includes a physical address corresponding to a data segment stored in the array and a logical address. The controller includes a second table having a number of records, wherein each record includes a number of entries, wherein each entry includes a physical address corresponding to a record in the first table and a logical address. The controller also includes a third table having a number of records, wherein each record includes a number of entries, wherein each entry includes a physical address corresponding to a record in the second table and a logical address.

Memory devices are typically provided as internal, semiconductor, integrated circuits and/or external removable devices in computers or other electronic devices. There are many different types of memory including random-access memory (RAM), read only memory (ROM), dynamic random access memory (DRAM), synchronous dynamic random access memory (SDRAM), phase change random access memory (PCRAM), and flash memory, among others.
Flash memory devices can be utilized as volatile and non-volatile memory for a wide range of electronic applications. Flash memory devices typically use a one-transistor memory cell that allows for high memory densities, high reliability, and low power consumption. Flash memory devices often may have a "NAND" or "NOR" memory array architecture, so called for the logical form in which the basic memory cell configuration of each is arranged. Uses for flash memory include memory for solid state drives (SSDs), personal computers, personal digital assistants (PDAs), digital cameras, cellular telephones, portable music players (e.g., MP3 players), and movie players, among other electronic devices. Data, such as program code, user data, and/or system data, such as a basic input/output system (BIOS), are typically stored in flash memory devices.
A flash memory device may include a flash transition layer (FTL). An FTL can be used (e.g., during a programming operation performed on the flash memory device) to map a logical address associated with a data entry to a physical address in the flash memory. An FTL may include an address mapping table in the local memory of the flash memory device to perform the mapping operation. However, the size of (e.g., the amount of data stored in) address mapping tables used in previous FTL approaches may be fixed. Because the size of address mapping tables used in previous FTL approaches may be fixed, address mapping tables used in previous FTL approaches may not be adaptable to different types of flash memory devices. That is, previous FTL approaches may be used in only one type of flash memory device.

This patent is subject to a terminal disclaimer.


Provided are a low pass filter circuit having a small output voltage shift caused by a substrate leakage current at high temperature, and a voltage regulator using the low pass filter circuit, which has a small output voltage shift at high temperature. In a low pass filter circuit using a PMOS transistor as a resistive element, a back gate terminal of the PMOS transistor is set to have a higher voltage than a source of the PMOS transistor. Further, in a voltage regulator incorporating the low pass filter circuit to an output of a reference voltage circuit, the voltage of the back gate terminal of the PMOS transistor which is higher than that of the source thereof is generated by the reference voltage circuit.

1. Field of the Invention
The present invention relates to a low pass filter circuit in a semiconductor integrated circuit, and a voltage regulator including the low pass filter circuit.
2. Description of the Related Art
In an electronic device equipped with a high frequency circuit or a wireless device, a low noise power supply is required, and hence a low-dropout (LDO) voltage regulator having good noise characteristics is used. Primary factors of output noise of the voltage regulator include 1/f noise generated in an internal reference voltage circuit and resistor thermal noise generated in a resistor voltage dividing circuit for determining an output voltage. In recent years, following the demand for extended operating time of mobile electronic devices, there is an increasing tendency to use a CMOS transistor integrated circuit having smaller current consumption than a bipolar transistor integrated circuit. However, it is known that the CMOS transistor circuit has larger 1/f noise than the bipolar transistor circuit. It is therefore required to suppress noise of a voltage regulator in the CMOS transistor circuit. It is generally considered that the 1/f noise depends on an interfacial effect in a channel of a MOS transistor, and the 1/f noise is large in a low frequency region. In order to obtain a lower noise voltage, it has been known to use a configuration in which a low pass filter circuit is connected to an output of an internal reference voltage circuit (see Japanese Patent Application Laid-open No. Hei 05-127761). However, the 1/f noise is large in a low frequency region, and hence, in order to sufficiently suppress noise by the low pass filter circuit, it is necessary to set a cutoff frequency to be very low, for example, about several Hz to several tens of Hz.
First, a conventional low pass filter circuit is described. FIG. 4 is a diagram illustrating a voltage regulator including the conventional low pass filter circuit.
The voltage regulator including the conventional low pass filter circuit includes a ground terminal 100, a power supply terminal 101, an output terminal 102, a low pass filter circuit 403, an amplifier 105, an output transistor 106, and a reference voltage generation circuit 407 (see, for example, U.S. Pat. No. 7,397,226).
Next, the operation of the voltage regulator including the conventional low pass filter circuit is described.
In the reference voltage generation circuit 407, an amplifier 104 controls a voltage of a gate terminal of a PMOS transistor 120 so that an output voltage Vref of a reference voltage source 108 and a divided voltage Vfb obtained by dividing the output voltage Vref by resistors 151 and 152 are equal to each other. Vfb and Vref are equal to each other, and hence, when the resistance values of the resistor 151 and 152 are represented by R1 and R2, respectively, a voltage Vref2 of a drain terminal of the PMOS transistor 120 is determined by a voltage dividing ratio of R1 and R2 as expressed by Expression (1)Vref2=Vref·(R1+R2)/R2  (1)
In general, in an integrated circuit, the fluctuations in absolute value of resistive elements are large. However, the resistance ratio can be set relatively accurately, and hence, by adjusting the resistance ratio of the resistors 151 and 152, the voltage Vref2 can be accurately set to an arbitrary value. A voltage of an input terminal 112 and a voltage of an output terminal 113 of the low pass filter circuit 403 are equal to each other in the steady state, and hence a voltage of the an inverting input terminal of the amplifier 105 is equal to the reference voltage Vref2.
The amplifier 105 controls a voltage of a gate terminal of the output transistor 106 so that the voltage of the output terminal 113 of the low pass filter circuit 403 and a voltage Vout of the output terminal 102 of the voltage regulator are equal to each other. Therefore, the output voltage Vout becomes equal to Vref2. As described above, Vref2 is determined by the resistance ratio of the resistors 151 and 152, and hence the output voltage Vout can be arbitrarily adjusted through the adjustment of the resistance ratio of the resistors.
Next, the operation of the low pass filter circuit is described. A current source 111 is designed so as to cause a very small current I1 of, for example, about sub-nA to several nA, to flow. The current I1 is equal to a drain current of a PMOS transistor 122, and hence the PMOS transistor 122 operates in the weak inversion region and has a very large ON-state resistance of, for example, about several hundreds of MΩ. An ON-state resistance Ron of a PMOS transistor 121 which is current-mirror connected to the PMOS transistor 122 is similarly very large. Thus, a cutoff frequency fc of a low pass filter determined by the ON-state resistance Ron and a capacitor 161 is very low.
The low pass filter circuit 403 suppresses 1/f noise which is contained in the reference voltage Vref2 and generated in the reference voltage generation circuit 407 and thermal noise which is generated in the resistor voltage dividing circuit of the resistors 151 and 152. Thus, smaller noise appears in the output terminal 102. Therefore, a voltage regulator with small output noise can be obtained.
In the voltage regulator including the conventional low pass filter circuit, at high temperature, the output voltage shifts due to a substrate leakage current of the PMOS transistor.
In the PMOS transistor, parasitic diodes are formed between p-type conductive source, channel, and drain regions and an n-type conductive well. Then, a thermo-stimulated current flows in the forward direction of the diodes. The thermo-stimulated current increases exponentially with an increase in temperature, and hence the forward current becomes larger at a higher temperature. In the PMOS transistor, holes flow into the n-type conductive well due to the forward current. The holes flowing into the n-type conductive well flow to the ground via a parasitic reverse diode formed between the well and a p-type conductive substrate, or alternatively the holes are recombined with electrons as major carriers in the n-type conductive well and disappear to generate a recombination current, which becomes a substrate leakage current in total. In particular, when the PMOS transistor is operated in the weak inversion region in order to reduce a cutoff frequency of the low pass filter circuit enough, a potential difference between the channel region and the well becomes smaller than a potential difference between the source and the well, and hence the substrate leakage current from the channel region increases. In the conventional circuit, the potential of the input terminal of the low pass filter, that is, the source potential of the PMOS transistor of the low pass filter is controlled to be constant. However, when a leakage current flows from the channel region, the potentials of the channel and the drain are decreased. When the drain potential decreases, the output voltage of the low pass filter circuit decreases, and hence the output voltage of the voltage regulator also decreases along with the operation of the voltage regulator.
The mechanism for holes has been described above, but the same holds true for electrons.

Low pass filter circuit and voltage regulator


This invention provides a load-balancing structure for packet switches and its constructing method. In this method, the structure based on self-routing concentrators is divided into two stages, that is, a first stage and a second stage fabric. A virtual output group queue (VOGQ) is appended to each input group port of the first stage fabric, and a reordering buffer (RB) is configured behind each output group port of the second stage fabric. Packets stored in the VOGQ are combined into data blocks with preset length, which is divided into data slices of fixed size, finally each data slice is added an address tag and is delivered to the first stage fabric for self-routing. Once reaching the RB, data slices are recombined into data blocks. This invention solves the packet out-of-sequence problem in the load-balancing Birkhoff-von Neumann switching structure and improves the end-to-end throughput.

The so-called switching structure, in the application of telecommunications, is a kind of network equipment which achieves routing for data units and forwards them to the node of next hop.
When the distribution of arriving traffics to a switching system is unbalanced, some ports or internal line will become saturation while others are still in idle state because the internal capacity of any switching system is bounded. In order to avoid unbalanced traffic, load-balancing switching structure is used to solve this problem. The structure makes traffic uniformly distributed inside the switch, that is, the utilization of all ports and internal lines are identical. Such switching structure can improve throughput to the maximum extent and decrease the internal blocking.
The structure of load-balancing Birkhoff-von Neumann (LB-BvN) switches can solve the problem of internal blocking.
As shown in FIG. 1, the LB-BvN switch consists of two crossbar switch stages and one set of virtual output queue (VOQ) between these stages. The first stage performs load balancing and the second stage performs switching. This switch does not need any schedulers since the connection patterns of the two switch stages are deterministic and are repeated periodically. The connection patterns should be selected so that in every consecutive N time slot, each input should connect to each output exactly once with a duration of one time slot. It is clear this said load-balancing switching structure solves the problem of data blocking.
However, traffic is different and un-uniform for each input port, the number of packets belong to different flows is variable, so the size of mid-stage VOQ is also different. As queues are served uniformly independent of their sizes, this LB-BvN structure brings about queuing delay and packet out-of-sequence problem. Packet out-of-sequence makes TCP (Transmission Control Protocol) triggering a fast recovery processing, and its sliding window is reduced by half, thus the end-to-end throughput of this connection is reduced by half.

Load-balancing structure for packet switches and its constructing method

Peking University Shenzhen Graduate School

Shanghai Research Institute of Microelectronics (Shrime), Peking University


A method for cleaning a semiconductor substrate is provided. The method initiates with introducing a liquid onto the top surface of the semiconductor substrate. Then, a bottom surface of a resonator is coupled to a top surface of a semiconductor substrate through the liquid. Next, sonic energy is transmitted through the resonator to the liquid. Then, the liquid is heated through the bottom surface of the resonator. A method for applying localized heating to a cleaning chemistry during a cleaning operation of a semiconductor substrate is also provided. The method initiates with positioning a resonator to contact a surface of a cleaning chemistry applied to a semiconductor substrate. Then, heat energy is simultaneously applied with the sonic energy through the resonator to clean the semiconductor substrate. A device for cleaning a semiconductor substrate and system for cleaning a semiconductor substrate are also provided.

The present invention relates generally to surface cleaning and, more particularly, to a method and apparatus for megasonic cleaning of a semiconductor substrate following fabrication processes.
Megasonic cleaning is widely used in semiconductor manufacturing operations and can be employed in a batch cleaning process or a single wafer cleaning process. For a batch cleaning process, the vibrations of a megasonic transducer creates sonic pressure waves in the liquid of the cleaning tank which contains a batch of semiconductor substrates. A single wafer megasonic cleaning process often uses a relatively small transducer above a rotating wafer, wherein the transducer is scanned across the wafer using a liquid stream coupling, or in the case of full immersion in a single wafer tank system a larger transducer which can couple to a larger portion of the wafer. In each case, the primary particle removal mechanism from megasonic cleaning is by cavitation and acoustic streaming. Cavitation is the rapid forming and collapsing of microscopic bubbles in a liquid medium under the action of sonic agitation. Upon collapse, the bubbles release energy which assists in particle removal by breakling the various adhesion forces which cause the particles to adhere to the substrate. Sonic agitation involves subjecting the liquid to acoustic energy waves. Under megasonic cleaning, these acoustic waves occur at frequencies between 0.4 and 1.5 Megahertz (MHz), inclusive. Lower frequencies have been used for other cleaning applications in the ultrasonic range, but these applications are used primarly for part cleaning, and not semiconductor substrate cleaning, due to the potential for damage to the substrates at the lower frequencies.
FIG. 1A is a schematic diagram of a batch megasonic cleaning system. Tank 100 is filled with a cleaning solution. Wafer holder 102 includes a batch of wafers to be cleaned. Transducer 104 creates pressure waves through sonic energy with frequencies near 1 Megahertz. These pressure waves act in concert with the appropriate chemistry to control particle re-adhesion and provide the cleaning action. Because of the long cleaning times and chemical usage required for batch cleaning systems, efforts have been focused on single wafer cleaning systems in order to decrease chemical usage, increase wafer-to-wafer control, and decrease defects in accordance with the International Technology Roadmap for Semiconductors (ITRS) requirements. Batch systems suffer from another disadvantage in that the delivery of megasonic energy to the multiple wafers in the tank is non-uniform and can result in xe2x80x98hot spotsxe2x80x99 due to constructive interference, or xe2x80x98cold spotsxe2x80x99 due to destructive interference, each being caused by reflection of the megasonic waves from both the multiple wafers and from the megasonic tank walls. Therefore, a higher megasonic energy as well as multiple transducer arrays must be applied in order to reach all regions of the wafers in wafer holder 102. Single wafer megasonic which couple to the wafer through a meniscus also suffer from reflected power reducing the cleaning efficiency. FIG. 1B is a schematic diagram of a single wafer cleaning tank. Here, tank 106 is filled with a cleaning solution. Wafer 108 is submerged in the cleaning solution of tank 106. Transducer 110 supplies the energy to clean the wafer. One shortcoming of the single wafer cleaning tank is that particles remain inside the tank requiring that the cleaning fluid be replaced or re-circulated and filtered regularly. Furthermore, removal of the wafer from the tank after megasonic cleaning also runs the risk of particle re-attachment.
FIG. 1C is a schematic diagram of nozzle-type megasonic cleaning configuration for a single wafer. Nozzle 112 provides fluid stream 114 through which the megasonic energy is coupled. Transducer 116, which is connected to power supply 118, provides the megasonic energy through the fluid stream 114 to the substrate as the fluid stream flows through the nozzle. Megasonic energy supplied through fluid stream 114 provides the cleaning mechanism to clean wafer 120. One shortcoming of the nozzle cleaning configuration includes requiring a high flow rate of fluid stream 114 to cool the transducer 116. Fluid stream 114 generated through nozzle 112 covers a small area, therefore, a fairly high megasonic energy is needed to clean the wafer in a reasonable time. The high energy required here necessitates cooling of the transducer. Consequently, the high flow rate of fluid stream 114 is due in good part to the cooling requirements, which are driven by the high energy requirements. This makes cleaning using a cleaning chemistry other than deionized water less desirable, due to cost associated with the high flow rates and effluent handling requirements.
In view of the foregoing, there is a need for a method and apparatus to provide a single wafer megasonic cleaning configuration that is capable of cooling the transducer or resonator while limiting the volume of cleaning chemistry consumed.
Broadly speaking, the present invention fills this need by providing a megasonic cleaner that is configured to provide cooling to the resonator with a fluid stream separate from the cleaning chemistry fluid stream. It should be appreciated that the present invention can be implemented in numerous ways, including as an apparatus, a system, a device, or a method. Several inventive embodiments of the present invention are described below.
In accordance with one aspect of the present invention, a device for cleaning a semiconductor substrate is provided. The device includes a resonator for propagating megasonic energy. The device has a double jacketed housing having an inner jacket and an outer jacket. The double jacketed housing includes an inner jacket region defined within the inner jacket. The inner jacket region at least partially encloses the resonator. The inner jacket region includes a bottom outlet, a cooling fluid inlet and a cooling fluid outlet. The bottom outlet is located so that energy propagated through a cooling fluid in contact with the resonator can pass through the bottom outlet. An outer jacket region defined between the outer jacket and the inner jacket is included. The outer jacket region includes a cleaning agent inlet and a cleaning agent outlet. The cleaning agent outlet is substantially aligned with the bottom outlet. A cylindrical arm having a first end and a second end is included. The first end of the cylindrical arm extends from the cleaning agent outlet, the second end of the cylindrical arm has a nozzle disposed thereon.
In accordance with another aspect of the invention, a system for cleaning a semiconductor substrate is provided. The system includes a substrate support configured to support and rotate a semiconductor substrate about an axis of the semiconductor substrate. A megasonic cleaner configured to move radialy above a top surface of the semiconductor substrate is included. The megasonic cleaner includes a transducer and a resonator affixed to the transducer. The megasonic cleaner has a double jacketed housing having an inner jacket and an outer jacket. The double jacketed housing includes an inner jacket region defined within the inner jacket. The inner jacket region is at least partially enclosed by the resonator. The inner jacket region has a bottom outlet, a cooling fluid inlet and a cooling fluid outlet. The bottom outlet is located so that energy propagated through a cooling fluid in contact with the resonator can pass through the bottom outlet. The double jacketed housing includes an outer jacket region defined between the outer jacket and the inner jacket. The outer jacket region has a cleaning agent inlet and a cleaning agent outlet. The cleaning agent outlet is substantially aligned with the bottom outlet. The megasonic cleaner includes a cylindrical arm having a first end and a second end. The first end of the cylindrical arm is attached to the cleaning outlet and the second end of the cylindrical arm has a nozzle attached thereto.
In accordance with another aspect of the invention, a method for cleaning a semiconductor substrate with a sonic cleaner is provided. The method initiates by introducing a cooling fluid into an inner jacket region of a sonic cleaner to cool a sonic resonator positioned within the inner jacket region. Then, a cleaning agent is introduced into an outer jacket region of the sonic cleaner to clean a semiconductor substrate. Next, a cooling fluid/cleaning agent interface is defined at an orifice located between the inner jacket region and the outer jacket region. Then, sonic energy from the resonator is transmitted to the cleaning agent through the interface at the orifice. Next, the cleaning agent is applied to the semiconductor substrate.
It is to be understood that the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the invention, as claimed.

Method and apparatus for cooling a resonator of a megasonic transducer


Distributed data processing of problems representing resource assignment tasks. The problems are modeled as programs, and the programs are partitioned into sub-instances. Those sub-instances are executed in a distributed computing environment. The partitioning reduces communication costs between sub-instances and convergence time for the optimization program.

This invention relates, in general, to distributed data processing, and in particular, to distributed solutions for problems arising from large-scale resource assignment tasks.
Due to emerging technologies in computing and communications, current day machines are able to collect, store, and handle large-scale data. As a result, the size of problems, such as optimization problems, arising, for example, from resource assignment tasks, such as scheduling, load balancing, resource allocation, and pricing, are becoming larger and larger, as well. The problems often become so large that they cannot be stored, let alone solved, on a single compute node.
Therefore, to solve these problems, multiple compute nodes are used. When multiple compute nodes are involved in a solution, however, fault tolerance often becomes an issue, as well as communications overhead and inefficiencies.
Moreover, often the problems are dynamic in nature—the parameters of the problems change over time, e.g., decision variables are added or removed, constraints or objective functions of the problem are added or removed, etc. These changes typically require a restart of the computation, leading to inefficiencies.

Distributed solutions for large-scale resource assignment tasks

International Business Machines Corporation


A wireless communication device includes a housing and an antenna. The housing includes a frame. The frame includes a metal portion and a non-metal portion connected to the metal portion. The antenna includes a base board and a radiating body. The radiating body is partially surrounding the base and electrically connected to the base board. The radiating body is formed by the metal portion.

1. Technical Field
The disclosure generally relates to antennas, and particularly to an antenna used in global position system (GPS) and a wireless communication device using the antenna.
2. Description of Related Art
Wireless communication devices usually include an antenna used to transmit and receive wireless communication signals. In addition, to appear aesthetically pleasing to consumers, the shells of the wireless communication devices are made of metal. However, the metal shells may generate interference to the antenna and lead to a frequency shift of the antenna. Therefore, the communication performance of the antenna may be negatively affected.
Furthermore, the antenna positioned in the wireless communication device commonly occupies a relatively lager space of the wireless communication device, making it difficult to miniaturize the wireless communication devices.
Therefore, there is room for improvement within the art.

Antenna and wireless communication device using the same


Disclosed is a multi-stage degassing unit for degassing waste water, such as effluent from grain milling processes, through impingement upon successive impact plates. The degassing unit has one or more stages of impact plates, which alternate with redistribution trays that receive the waste water that impinges upon the impact plates directly above the trays and then redistributes the waste water through a plurality of apertures in the redistribution tray. The process of impinging the waste water against the impact plates, collecting the water, and redistributing the water into a plurality of streams may be repeated as necessary to sufficiently remove gas clinging to biomass in the waste water. This degassing will promote the settlement of the biomass for reuse in the water treatment process to reduce biological oxygen demand.

In the processing of grains, such as the wet milling of corn, waste water or effluent containing organic biomass is produced. The waste water will have a certain biological oxygen demand (BOD), which may vary depending on the type of processing occurring at the facility. If the BOD is high enough, it must be reduced to acceptable levels before the waste water is reintroduced to the environment. Typically, the waste water will be introduced into an anaerobic digester to help break down the organic material in the waste water to reduce its BOD. During the anaerobic digestion process, microorganisms such as bacteria in the waste water break up the organic material and gases, such as carbon dioxide, methane, and nitrogen are released. It is desirable to remove these gases from the waste water for a number of reasons. For example, methane produced can be captured and used in other industrial processes as an energy source.
Because the treatment process is continuous, microorganisms needed for the digestion process frequently need to be replenished. However, the gases created during anaerobic digestion can adversely affect the water treatment process by hindering the recapture of these microorganisms. In particular, the gases released during anaerobic digestion can tend to cling to the microorganisms, causing them to float. This is problematic, because in order to isolate and recapture the microorganisms, they must be allowed to settle in a settling tank to prevent them from being sent to further treatment and eventually being disposed of when the fully treated water is released. A polymer, such as a cationic polyacrylamide polymer, may be added to the waste water prior to entering the settlement tank to help flocculate the remaining biomass, which promotes sedimentation of the solids. However, if insufficient microorganisms are recovered from the digestion process, the capacity of the anaerobic digester will be reduced, thereby reducing upstream production capacity.
In order to remove gas from the waste water after the anaerobic digestion process, the waste water is introduced into a degassing tank. Prior known methods for degassing waste water, such as by an agitator, may not sufficiently remove gas from the waste water, particularly when the flow rate of waste water or the BOD load is relatively high. Further, space limitations can rule out other known methods of degassing. Thus, improvement in the degassing of waste water is desirable.

Apparatuses and methods for degassing effluent


Methods, systems, computer-readable media, and apparatuses may provide a mobile device with the ability to locally detect fraudulent activity by an unauthorized user. A mobile device may include a fraud detection module that may build a historical usage pattern of a user of the mobile device. The fraud detection module may monitor usage of the mobile device for multiple parameters and record events pertaining to the parameters. Periodically or in response to each event, the fraud detection module may compute a current usage pattern using each of the current parameter values. The fraud detection module may compare the current usage pattern with the historical usage pattern and may use the comparison result to compute a confidence score. The fraud detection module may then compare the confidence score with a preset confidence score to determine whether fraudulent activity is occurring at the mobile device.

Smartphones store and/or have access to the owner's personal and work-related information. For instance, many smartphone owners store a vast amount of personal information on their smartphone such as financial information, address information, contacts, photos, texts, personal email, etc. Additionally, many companies have implemented bring your own device (BYOD) programs to save money by enabling employees to access work-related information using their personal smartphones. For example, the smartphone may store confidential information such as email, documents, spreadsheets, calendar, contacts, etc. Further, smartphones may have access to company databases and servers that may store a vast amount of other client confidential information.
Smartphone theft is becoming an increasingly common problem. Currently, mobile operating systems include few access protection features to prevent unauthorized persons from fraudulently accessing the smartphone. For example, many mobile operating systems include a lock code features that forces a user to enter an appropriate pin number in order to gain access to the smartphone. While this feature may prevent unauthorized access in some instances, most owners do not use such features since it requires them to enter the pin number each time they wish to access their smartphone, which can be numerous times a day for some people. Some smartphones have biometric access protection features such as a fingerprint scanner or facial recognition camera. While these features may be more convenient that lock codes, they can produce false positives thereby enabling access to the smartphone by an unauthorized person.
Once a thief or another unauthorized person gains access to the smartphone, they can change the smartphone's security settings to enable future access to the smartphone. For example, they can deactivate the lock code and possibly the biometric access features. Additionally, they may alter the security settings by, for example, providing a new lock code or a new biometric template for use with the fingerprint scanner or facial recognition camera.
Additionally, the thief or unauthorized person may obtain personal (e.g., financial) and/or work-related information stored on the smartphone or accessible by the smartphone. Exacerbating the situation is the fact that many mobile operating systems and mobile applications have settings that automatically store passwords thereby obviating any safeguards afforded by password protection.
One current "solution" is to remotely wipe the smartphone in order to remove all information. However, if the smartphone does not have a communications connection, the smartphone cannot receive the wiping instruction and, as a result, will not wipe the smartphone. Lastly, when a smartphone is stolen or accessed by an unauthorized person, the owner may mistakenly believe that the phone is lost and may spend hours looking for the phone before implementing a remote wipe solution (if it's available). During this time, the unauthorized person may access valuable personal and work-related information of the owner and may store this information on a storage device (e.g., a computer) for later use.
Accordingly, there is a persistent need to prevent unauthorized access to content stored on or accessible by smartphone devices.

Automatic intelligent local device fraud detection